FreeBSD/ports 461fcd4devel/py-maturin Makefile Makefile.crates

devel/py-maturin: Update to 1.15.0

Changelog:

https://github.com/PyO3/maturin/releases/tag/v1.15.0
DeltaFile
+19-21devel/py-maturin/distinfo
+8-9devel/py-maturin/Makefile.crates
+2-3devel/py-maturin/Makefile
+29-333 files

LLVM/project b0dc60fflang/lib/Lower Bridge.cpp PFTBuilder.cpp, flang/test/Lower assigned-goto-target-in-loop.f90

[flang][PFT] Mark ASSIGN'd labels as assigned GO TO targets (#218674)

An assigned GO TO with an explicit label list only marked the listed
labels as branch targets. Lowering is more permissive: genFIR for
AssignedGotoStmt in flang/lib/Lower/Bridge.cpp builds the switch from
the labels ASSIGN'd to the variable and ignores the list.

A construct holding an ASSIGN'd label that the list omits therefore
looked wrappable, was placed in an scf.execute_region, and the branch
then crossed a region boundary:
```
  error: 'fir.select' op branching to block of a different region
```
Mark both sets so the wrappability analysis sees every escape.
DeltaFile
+17-21flang/lib/Lower/PFTBuilder.cpp
+27-0flang/test/Lower/assigned-goto-target-in-loop.f90
+2-0flang/lib/Lower/Bridge.cpp
+46-213 files

OPNSense/ports 2616876net/miniupnpd Makefile, net/miniupnpd/files patch-set-pool-af

net/miniupnpd: set pool address family

Taken from: https://github.com/miniupnp/miniupnp/pull/906
DeltaFile
+29-0net/miniupnpd/files/patch-set-pool-af
+1-1net/miniupnpd/Makefile
+30-12 files

FreeBSD/ports 035f477deskutils/coolreader/files patch-CMakeLists.txt

deskutils/coolreader: Fix building with CMake 4

Approved by:    portmgr (blanket)
DeltaFile
+9-0deskutils/coolreader/files/patch-CMakeLists.txt
+9-01 files

LLVM/project 73e729fllvm/lib/Target/AVR AVRInstrInfo.td AVRExpandPseudoInsts.cpp, llvm/test/CodeGen/AVR stack-realignment.ll

[AVR] Support stack realignment (#187129)

fixes https://github.com/llvm/llvm-project/issues/169190
DeltaFile
+253-8llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
+250-0llvm/test/CodeGen/AVR/stack-realignment.ll
+37-57llvm/lib/Target/AVR/AVRRegisterInfo.cpp
+38-32llvm/lib/Target/AVR/AVRFrameLowering.cpp
+66-0llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+19-3llvm/lib/Target/AVR/AVRInstrInfo.td
+663-1008 files not shown
+687-10514 files

OPNSense/core 84b73b7src/www interfaces.php

interfaces: finally remove this obsolete code
DeltaFile
+0-201src/www/interfaces.php
+0-2011 files

NetBSD/src iN9BRqSsys/nfs nfs_syscalls.c

   nfs: Work around missing VM_MIN/MAX_KERNEL_ADDRESS in rump.

   Let's get the builds unbroken before making this perfect.

   PR kern/60645: nfssvc(2): arithmetic overflow in input array sizing
VersionDeltaFile
1.169+3-6sys/nfs/nfs_syscalls.c
+3-61 files

OPNSense/core 66baf88. plist

pkg: fix plist
DeltaFile
+1-0plist
+1-01 files

LLVM/project cae2f65offload CMakeLists.txt, offload/liboffload CMakeLists.txt

[Offload] Add rpath to LLVM libs if dynamically linked (#215557)

Summary:
The offload/ library is different from every other LLVM runtime in that
it links the LLVM libraries themselves. The issue here is that in the
normal configuration, `libomptarget.so` goes in `lib/<triple>` while the
LLVM libs it depends on goes in `lib/`. If the LLVM libraries are
statically linked, there is no problem. However, we need to make sure
these point to the right place transitively when built in a shared
configuration. This solves the edge from `libomptarget -> LLVM`. The
edge from `user app -> libomptarget` should be solved by
`-frtlib-add-rpath`.

Should ideally fix the LLVM half of
https://github.com/llvm/llvm-project/pull/215532
DeltaFile
+10-0offload/CMakeLists.txt
+1-1offload/libomptarget/CMakeLists.txt
+1-1offload/liboffload/CMakeLists.txt
+12-23 files

LLVM/project 180a0fcmlir/docs SymbolsAndSymbolTables.md, mlir/include/mlir/IR SymbolTable.h SymbolInterfaces.td

[mlir][IR] Fix symbol visibility API (#218910)

Fix `SymbolTable::get/setSymbolVisibility`. These functions used to
read/write the hard-coded `sym_visibility` attribute, even though the op
may store visibility in a different way. The new implementations
dispatch to `SymbolOpInterface::get/setVisibility`.

No change in functionality for the interface methods: Their default
implementations still read/write `sym_visibility`. (That may change in a
follow-up commit.) This commit just aligns the
`SymbolTable::get/setSymbolVisibility` API with the op interface.

Also turn `SymbolOpInterface::isNested/setNested/...` into
non-overridable helper functions. Users should implement
`SymbolOpInterface::get/setVisibility` instead.

Assisted-by: Opus 5 High
DeltaFile
+51-40mlir/include/mlir/IR/SymbolInterfaces.td
+52-32mlir/lib/IR/SymbolTable.cpp
+11-5mlir/include/mlir/IR/SymbolTable.h
+8-4mlir/docs/SymbolsAndSymbolTables.md
+4-3mlir/lib/Interfaces/FunctionImplementation.cpp
+7-0mlir/unittests/IR/SymbolTableTest.cpp
+133-845 files not shown
+145-9411 files

FreeBSD/ports bc61cecftp/R-cran-curl Makefile distinfo

ftp/R-cran-curl: Update to 8.0.0

Changelog: https://cran.r-project.org/web/packages/curl/NEWS
DeltaFile
+3-3ftp/R-cran-curl/distinfo
+1-1ftp/R-cran-curl/Makefile
+4-42 files

LLVM/project bfd1a00mlir/lib/Dialect/Bufferization/IR BufferizationOps.cpp, mlir/test/Dialect/Bufferization invalid.mlir

[mlir][Bufferization] Separate AllocTensorOp properties from discardable attribute in assembly (#218914)

Print and parse inherent properties separately from discardable
attributes in the AllocTensorOp custom assembly format.

Keep operand segment sizes inferred from the operand syntax and move
memory space spellings to the property dictionary.

Assisted-by: Codex
DeltaFile
+41-8mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
+7-7mlir/test/Dialect/Bufferization/Transforms/one-shot-bufferize-encodings.mlir
+4-4mlir/test/Dialect/SCF/one-shot-bufferize.mlir
+4-4mlir/test/Dialect/SCF/one-shot-bufferize-invalid.mlir
+8-0mlir/test/Dialect/Bufferization/invalid.mlir
+3-3mlir/test/Dialect/Bufferization/Transforms/tensor-copy-insertion-memory-space.mlir
+67-267 files not shown
+78-3713 files

LLVM/project bdfc806lldb/docs dil-expr-lang.ebnf, lldb/source/ValueObject DILLexer.cpp DILParser.cpp

[lldb] Restrict expressions to one top-level assignment in DIL (#214348)

This patch restricts DIL expression to have only one assignment and only
at top level. This has to be done to avoid unsequenced modifications to
the same ValueObject in one expression.
DeltaFile
+81-41lldb/source/ValueObject/DILParser.cpp
+46-0lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
+39-0lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILCompositeAssign.py
+12-10lldb/docs/dil-expr-lang.ebnf
+6-0lldb/source/ValueObject/DILLexer.cpp
+2-2lldb/test/Shell/Commands/command-dil-diagnostics.test
+186-532 files not shown
+191-548 files

OPNSense/core 6929459src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes FilterRuleField.php

missing received-on should also move into the disfunct priority group
DeltaFile
+12-9src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes/FilterRuleField.php
+12-91 files

LLVM/project f2175d8llvm/lib/Transforms/Utils LoopUtils.cpp

Fixups
DeltaFile
+1-1llvm/lib/Transforms/Utils/LoopUtils.cpp
+1-11 files

LLVM/project e44e9bfllvm/lib/Transforms/Utils LoopUtils.cpp, llvm/test/Transforms/LoopVectorize compress-idioms.ll compress-store-vec-epilogue.ll

Fixups
DeltaFile
+37-40llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
+3-3llvm/lib/Transforms/Utils/LoopUtils.cpp
+0-2llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+40-453 files

OPNSense/core d740eecsrc/etc/inc interfaces.lib.inc, src/opnsense/scripts/interfaces list_mediaopts.php

Interfaces: split media and mediaopt with tabs instead of spaces as spaces may exist in the actual output.
DeltaFile
+48-0src/opnsense/scripts/interfaces/list_mediaopts.php
+2-2src/www/interfaces.php
+1-1src/etc/inc/interfaces.lib.inc
+51-33 files

LLVM/project 159ec47mlir/lib/Conversion/FuncToEmitC FuncToEmitC.cpp

fix after rebase
DeltaFile
+2-2mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
+2-21 files

LLVM/project 1cd8a0fmlir/docs SymbolsAndSymbolTables.md

address comments
DeltaFile
+3-2mlir/docs/SymbolsAndSymbolTables.md
+3-21 files

LLVM/project 2dcc5a9mlir/docs SymbolsAndSymbolTables.md, mlir/include/mlir/IR SymbolTable.h SymbolInterfaces.td

[mlir][IR] Fix symbol table visibility API
DeltaFile
+51-40mlir/include/mlir/IR/SymbolInterfaces.td
+52-32mlir/lib/IR/SymbolTable.cpp
+11-5mlir/include/mlir/IR/SymbolTable.h
+7-4mlir/docs/SymbolsAndSymbolTables.md
+4-3mlir/lib/Interfaces/FunctionImplementation.cpp
+7-0mlir/unittests/IR/SymbolTableTest.cpp
+132-844 files not shown
+142-9210 files

LLVM/project 126061emlir/test/Conversion/MPIToLLVM mpitollvm.mlir

fix stacking regression
DeltaFile
+3-3mlir/test/Conversion/MPIToLLVM/mpitollvm.mlir
+3-31 files

LLVM/project ad9dc60mlir/lib/Transforms ViewOpGraph.cpp, mlir/lib/Transforms/Utils DialectConversion.cpp

[mlir][IR][Rewrite] Use split inherent/discardable attribute APIs (#218907)

Migrate core IR implementation, interfaces, rewriting, pass printing,
and focused tests to explicit discardable or inherent attribute access.

Assisted-by: Codex
DeltaFile
+11-9mlir/test/lib/IR/TestVisitorsGeneric.cpp
+10-7mlir/lib/Transforms/Utils/DialectConversion.cpp
+11-3mlir/lib/Transforms/ViewOpGraph.cpp
+8-5mlir/test/lib/IR/TestFunc.cpp
+6-6mlir/unittests/Pass/PassManagerTest.cpp
+7-5mlir/unittests/Interfaces/DataLayoutInterfacesTest.cpp
+53-3522 files not shown
+122-7628 files

OPNSense/core 72f6b93src/opnsense/mvc/app/models/OPNsense/IPsec/FieldTypes IPsecProposalField.php

ipsec: add ML-KEM as a first additional key exchange
DeltaFile
+54-0src/opnsense/mvc/app/models/OPNsense/IPsec/FieldTypes/IPsecProposalField.php
+54-01 files

LLVM/project 0d79745llvm/lib/Target/X86 X86ISelDAGToDAG.cpp, llvm/test/CodeGen/X86 is_fpclass.ll cmp.ll

[X86] Emit ADD instead of SHL by 1 when shrinking TEST with a mask (#217508)

The immediate-TEST shrink rewrites (and x, 0x7fffffffffffffff) == 0 into
SHL64ri $1 + TEST64rr, expecting the redundant TEST to be "subsequently
eliminated" (per the comment). For shift amounts 1-3 it never is:
isDefConvertible() rejects those SHLs so that they stay convertible to
LEA, and the dead TEST survives into final binaries.

Emit ADD64rr x, x instead when the shift amount is 1. Doubling is value-
and ZF-identical to the shift at the same encoding length, executes on
more ports, and ADDrr is def-convertible, so the peephole really does
fold the TEST away, leaving add+jcc/setcc instead of shl+test+jcc/setcc.

The shape is common: it is Rust libstd's panic-counter fast path
(GLOBAL_PANIC_COUNT & ~(1 << 63) == 0, inlined at every
std::thread::panicking() check -- 249 copies in uutils coreutils) and
LLVM's own is_fpclass zero-class lowering, as the is_fpclass.ll diff
shows.


    [7 lines not shown]
DeltaFile
+101-0llvm/test/CodeGen/X86/cmp.ll
+15-1llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+2-4llvm/test/CodeGen/X86/is_fpclass.ll
+118-53 files

OpenBSD/ports 0jejI8fnet/icecast Makefile, net/icecast/patches patch-src_util_crypt_c

   Fix crash when trying to access the /admin/ page

   Apparently checking passwords goes through checks for hash algorithms
   supported by crypt(3). But since none of the algorithms checked are
   supported by the OpenBSD libc, the code ends up dereferencing a NULL
   pointer. I'm not sure yet why the code checks for algorithms supported
   by crypt(3), as the code wasn't present in icecast-2.4.4.

   To fix this, avoid dereferencing said NULL pointer. While here, add
   DEBUG_PACKAGES.

   Problem reported by Olivier Cherrier.
VersionDeltaFile
1.1+18-0net/icecast/patches/patch-src_util_crypt_c
1.78+3-0net/icecast/Makefile
+21-02 files

LLVM/project e803e57clang/test/CodeGen/RISCV rvp-intrinsics.c, cross-project-tests/intrinsic-header-tests riscv_packed_simd.c

[RISCV][P-ext] Support Packed "Q-format" Multiply Parts Accumulate Intrinsics(#217918)
DeltaFile
+388-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+177-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+169-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+126-0cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+88-4llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+87-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+1,035-46 files not shown
+1,210-912 files

LLVM/project aa09790mlir/lib/Dialect/SparseTensor/Transforms Sparsification.cpp SparseReinterpretMap.cpp, mlir/lib/Dialect/SparseTensor/Transforms/Utils CodegenUtils.cpp

[mlir][SparseTensor] Use split discardable/inherent attribute APIs (#218904)

Migrate SparseTensor IR, lowering, code generation, and loop emission to
explicit discardable or operation-specific attribute access.

Assisted-by: Codex
DeltaFile
+5-4mlir/lib/Dialect/SparseTensor/Transforms/SparseVectorization.cpp
+5-4mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
+4-3mlir/lib/Dialect/SparseTensor/Transforms/SparseGPUCodegen.cpp
+2-2mlir/lib/Dialect/SparseTensor/Transforms/Utils/CodegenUtils.cpp
+2-2mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
+2-2mlir/lib/Dialect/SparseTensor/Transforms/SparseReinterpretMap.cpp
+20-172 files not shown
+23-198 files

LLVM/project 7b6eb69mlir/docs SymbolsAndSymbolTables.md

address comments
DeltaFile
+3-2mlir/docs/SymbolsAndSymbolTables.md
+3-21 files

LLVM/project 20ad451mlir/lib/Conversion/FuncToEmitC FuncToEmitC.cpp, mlir/lib/Conversion/FuncToLLVM FuncToLLVM.cpp

[mlir][Func][Async][EmitC] Use split discardable/inherent attribute APIs (#218905)

Use operation-specific accessors and explicit discardable attribute APIs
in the Func, Async, and EmitC dialects and their associated conversions.

Assisted-by: Codex
DeltaFile
+25-19mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
+16-5mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
+7-4mlir/lib/Dialect/Async/Transforms/AsyncToAsyncRuntime.cpp
+5-4mlir/lib/Dialect/EmitC/IR/EmitC.cpp
+4-4mlir/lib/Dialect/Func/IR/FuncOps.cpp
+4-3mlir/lib/Dialect/Async/IR/Async.cpp
+61-397 files not shown
+76-5213 files

LLVM/project a908adbllvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU cttz_zero_poison.ll ctlz_zero_poison.ll

[AMDGPU] Fix unsaturated add when moving 64-bit ctlz/cttz to the VALU (#216707)

The ffbh/ffbl add is saturated via a clamp modifier, but on gfx6/7/8 it
lowers to V_ADD_CO_U32_e32, which has no clamp operand, so
ctlz/cttz.i64(0, false) returns 31 instead of 64 there

ffbh/ffbl only produce 0..31 or -1, so uaddsat(x, 32) is just x | 32

Use V_OR_B32_e32 instead, which needs no clamp and works everywhere
DeltaFile
+484-8llvm/test/CodeGen/AMDGPU/move-to-valu-ctlz-cttz.ll
+4-7llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+2-2llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
+2-2llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
+492-194 files