FreeBSD/ports f07a084net/socat distinfo Makefile

net/socat: Update to 1.8.1.2
DeltaFile
+3-3net/socat/distinfo
+1-1net/socat/Makefile
+4-42 files

FreeBSD/ports da55470net-mgmt/gping distinfo Makefile.crates

net-mgmt/gping: Update to 1.20.4
DeltaFile
+39-77net-mgmt/gping/distinfo
+19-38net-mgmt/gping/Makefile.crates
+1-1net-mgmt/gping/Makefile
+59-1163 files

FreeBSD/ports 85eb3e1net/py-python-socks distinfo Makefile

net/py-python-socks: Update to 2.8.2
DeltaFile
+3-3net/py-python-socks/distinfo
+1-1net/py-python-socks/Makefile
+4-42 files

LLVM/project affc89fcompiler-rt/lib/builtins CMakeLists.txt, compiler-rt/lib/builtins/arm addsf3.S

[compiler-rt][ARM] Optimized single precision FP add/sub (#179929)

This adds new implementations of single-precision add/sub in both Thumb1
and Arm/Thumb2 assembler.

Both of the new implementations are included in the builtins library if
the `COMPILER_RT_ARM_OPTIMIZED_FP` cmake option is enabled (as it is by
default).

There was already a Thumb1 assembler implementation of single-precision
add/sub, slower but also smaller. I've kept it (although it's been moved
into the `thumb1` subdirectory), and if you _don't_ enable
`COMPILER_RT_ARM_OPTIMIZED_FP`, it will be selected in place of the new
version.
DeltaFile
+670-230compiler-rt/lib/builtins/arm/addsf3.S
+890-0compiler-rt/lib/builtins/arm/thumb1/addsf3fast.S
+385-0compiler-rt/test/builtins/Unit/addsf3new_test.c
+383-0compiler-rt/test/builtins/Unit/subsf3_test.c
+285-0compiler-rt/lib/builtins/arm/thumb1/addsf3.S
+6-1compiler-rt/lib/builtins/CMakeLists.txt
+2,619-2316 files

FreeBSD/ports aa90200x11-drivers/xf86-video-mga Makefile distinfo

x11-drivers/xf86-video-mga: Update to 2.1.0

Update WWW and pkg-descr.
Add LICENSE.

https://lists.x.org/archives/xorg-announce/2022-July/003184.html
https://lists.x.org/archives/xorg-announce/2024-October/003539.html

PR:             296281
Approved by:    x11 (arrowd)
Approved by:    fluffy (mentor)
DeltaFile
+5-6x11-drivers/xf86-video-mga/Makefile
+3-3x11-drivers/xf86-video-mga/distinfo
+2-1x11-drivers/xf86-video-mga/pkg-descr
+10-103 files

NetBSD/pkgsrc nIKp8aUdoc CHANGES-2026 TODO

   Updated devel/py-filebytes, textproc/py-patiencediff, net/py-hpack, net/py-zeroconf
VersionDeltaFile
1.4020+5-1doc/CHANGES-2026
1.27496+1-2doc/TODO
+6-32 files

NetBSD/pkgsrc Os93zlynet/py-zeroconf distinfo Makefile

   py-zeroconf: updated to 0.150.0

   0.150.0 (2026-06-22)

   Features
   - Add async_update_interfaces to rescan network interfaces at runtime
VersionDeltaFile
1.59+4-4net/py-zeroconf/distinfo
1.62+2-2net/py-zeroconf/Makefile
+6-62 files

NetBSD/pkgsrc OPSehdsnet/py-hpack distinfo Makefile

   py-hpack: updated to 4.2.0

   4.2.0 (2026-06-22)

   **API Changes (Backward Incompatible)**

   - Support for Python 3.9 has been removed.
   - Support for PyPy 3.9 has been removed.

   **API Changes (Backward Compatible)**

   - Support for Python 3.14 has been added.

   **Bugfixes**

   - Headers marked as `sensitive` will no longer log their value at DEBUG level. Instead a placeholder value of `SENSITIVE_REDACTED` is logged.
   - Fixed perfect match missed for headers with empty values.
   - Restricted variable integer decoding to uint32 to prevent run-away computation. With thanks to `Hiroki Nishino`_.
VersionDeltaFile
1.10+4-4net/py-hpack/distinfo
1.12+2-3net/py-hpack/Makefile
+6-72 files

NetBSD/pkgsrc BhnsfRltextproc/py-patiencediff distinfo Makefile

   py-patiencediff: updated to 0.2.19

   0.2.19
   Support pyo3 0.29
   CI and dependency maintenance (ruff, actions/checkout, upload/download-artifact)
VersionDeltaFile
1.7+4-4textproc/py-patiencediff/distinfo
1.10+3-5textproc/py-patiencediff/Makefile
+7-92 files

LLVM/project af1c5a4llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV xqcilo-split-gep.ll xqcilia-addimm-mulimm-loop.ll

[RISCV] Extend legal addressing modes to support 26-bit addi/Xqcilo offsets (#204734)

Extend `RISCVTargetLowering::isLegalAddImmediate` and `isLegalAddressingMode` 
to accept 26-bit signed immediates/offsets when the corresponding Qualcomm uC
extensions are enabled

These callbacks are queried by some pre-ISel passes. Adding support for
the wider range lets those passes keep large immediates inline and large offsets
folded into addressing modes.
DeltaFile
+54-0llvm/test/CodeGen/RISCV/xqcilo-split-gep.ll
+45-0llvm/test/CodeGen/RISCV/xqcilia-addimm-mulimm-loop.ll
+44-0llvm/test/Transforms/CodeGenPrepare/RISCV/xqcilo.ll
+28-0llvm/test/Transforms/ConstantHoisting/RISCV/xqcilia.ll
+19-3llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+190-35 files

NetBSD/pkgsrc wKv0xgydevel/py-filebytes Makefile PLIST, devel/py-filebytes/patches patch-setup.py

   py-filebytes: updated to 0.10.2

   0.10.2
   Unknown changes
VersionDeltaFile
1.1+31-0devel/py-filebytes/patches/patch-setup.py
1.3+7-8devel/py-filebytes/Makefile
1.2+6-5devel/py-filebytes/PLIST
1.4+5-4devel/py-filebytes/distinfo
+49-174 files

FreeBSD/ports 8a2996bwww/py-litestar distinfo Makefile

www/py-litestar: Update to 2.24.0
DeltaFile
+3-3www/py-litestar/distinfo
+1-1www/py-litestar/Makefile
+4-42 files

FreeBSD/ports 14574abwww/tikiwiki distinfo Makefile

www/tikiwiki: Update to 29.2
DeltaFile
+3-3www/tikiwiki/distinfo
+1-1www/tikiwiki/Makefile
+4-42 files

FreeBSD/ports a800d7ewww/tcexam distinfo Makefile

www/tcexam: Update to 17.1.1
DeltaFile
+3-3www/tcexam/distinfo
+1-1www/tcexam/Makefile
+4-42 files

FreeBSD/ports 5d65743devel/py-rich-toolkit distinfo Makefile

devel/py-rich-toolkit: Update to 0.20.1
DeltaFile
+3-3devel/py-rich-toolkit/distinfo
+1-1devel/py-rich-toolkit/Makefile
+4-42 files

FreeBSD/ports 7ec1d26deskutils Makefile, graphics Makefile

*/Makefile: Sort SUBDIRs
DeltaFile
+3-3graphics/Makefile
+1-1www/Makefile
+1-1deskutils/Makefile
+5-53 files

LLVM/project ebc68b3clang/include/clang/Basic CodeGenOptions.def, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+77-17clang/lib/CodeGen/BackendUtil.cpp
+27-29clang/lib/CodeGen/CGLoopInfo.cpp
+9-0clang/test/CodeGen/X86/newpm.c
+8-0clang/include/clang/Options/Options.td
+1-0clang/include/clang/Basic/CodeGenOptions.def
+1-0clang/lib/CodeGen/CMakeLists.txt
+123-466 files

LLVM/project 601e3fbclang/lib/CodeGen CGLoopInfo.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+27-29clang/lib/CodeGen/CGLoopInfo.cpp
+27-291 files

LLVM/project 41566adclang/lib/CodeGen CGLoopInfo.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+27-29clang/lib/CodeGen/CGLoopInfo.cpp
+27-291 files

NetBSD/pkgsrc XCDkdgIdoc CHANGES-2026

   doc: Updated devel/argp to 1.5.0nb1
VersionDeltaFile
1.4019+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc gkielY5devel/argp buildlink3.mk PLIST, devel/argp/patches patch-meson.build

   argp: install shared library

   Bump PKGREVISION.

   Fixes xentools420 build, tested by gdt@ - thanks!
VersionDeltaFile
1.1+15-0devel/argp/patches/patch-meson.build
1.6+3-5devel/argp/buildlink3.mk
1.4+2-2devel/argp/PLIST
1.16+2-1devel/argp/distinfo
1.13+2-1devel/argp/Makefile
+24-95 files

LLVM/project 433bed0clang/docs ReleaseNotes.rst

[AArch64] Add hip12 to release notes. (#205899)

This adds the hip12 cpu added in #203446 to the release notes, and
rejigs them to match the format used in previous releases.
DeltaFile
+4-1clang/docs/ReleaseNotes.rst
+4-11 files

FreeBSD/ports e581c3edevel/py-ty distinfo Makefile.crates, devel/py-ty/files patch-ruff_crates_ty_Cargo.toml

devel/py-ty: Update to 0.0.54

Changelog: https://github.com/astral-sh/ty/blob/0.0.54/CHANGELOG.md

Reported by:    portscout
DeltaFile
+31-43devel/py-ty/distinfo
+14-20devel/py-ty/Makefile.crates
+1-1devel/py-ty/files/patch-ruff_crates_ty_Cargo.toml
+1-1devel/py-ty/Makefile
+47-654 files

OpenBSD/src 2tAcTS4regress/lib/libcrypto/x509 Makefile

   With x509_vfy.c 1.153, the x509_crl regress passes
VersionDeltaFile
1.29+1-3regress/lib/libcrypto/x509/Makefile
+1-31 files

LLVM/project 0075a8fllvm/include/llvm/Analysis PHITransAddr.h MemoryDependenceAnalysis.h, llvm/include/llvm/Transforms/Scalar GVN.h

[GVN] Support load PRE through select addresses (incl. indexed selects) (#203863)

This resurrects and extends the approach from the reverted
[D142705](https://reviews.llvm.org/D142705) ("[GVN] Support address
translation through select instructions"), adapting it to the current
GVN dependency model so that GVN can eliminate a redundant load whose
address is a `select` hidden behind cast/GEP indexing (the classic
`std::min_element` / min-index idiom, e.g. `data[*it] < data[*smallest]`
or returning the index `minloc`).

### What it does

When PHI translation of a load address fails along an edge because the
incoming value resolves to a `select`, we now translate **both** sides
of
that select to obtain the "true" and "false" addresses. If both
addresses
have a dominating, non-clobbered value of the right type, the load is
rematerialized as a `select` of those two values, letting the

    [40 lines not shown]
DeltaFile
+134-22llvm/test/Transforms/GVN/PRE/pre-load-through-select.ll
+57-25llvm/lib/Transforms/Scalar/GVN.cpp
+47-6llvm/lib/Analysis/PHITransAddr.cpp
+49-1llvm/include/llvm/Analysis/PHITransAddr.h
+23-4llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
+21-0llvm/include/llvm/Transforms/Scalar/GVN.h
+331-581 files not shown
+350-597 files

OpenBSD/src qvUatWrlib/libcrypto/x509 x509_vfy.c

   x509_vfy: sync get_crl_sk() with BoringSSL and OpenSSL

   Among CRLs with the same score prefer the one with the most recent
   lastUpdate (RFC 5280 thisUpdate). This pulls in OpenSSL commits
   626aa248, e032117d, 8b7c51a0 from 2016, so before the license change.
   This uses the annoying ASN1_TIME_diff() API, but there is no better
   way, really. Every other ASN1_TIME API will be just as awkward.

   This fixes the currently failing x509_crl test cases.

   ok kenjiro
VersionDeltaFile
1.153+18-6lib/libcrypto/x509/x509_vfy.c
+18-61 files

LLVM/project eac9044clang/lib/AST/ByteCode Interp.cpp, clang/test/AST/ByteCode mutable.cpp cxx11.cpp

[clang][bytecode] Don't check instance pointers for mutability (#205820)

The instance pointer being mutable is perfectly fine, we just can't read
anything from it.

This regresses a test case in `cxx11.cpp` where we now diagnose an extra
frame for `U(g1.u)`, but this seems correct since the read is happening
in the copy constructor of `U`.
DeltaFile
+23-0clang/test/AST/ByteCode/mutable.cpp
+7-13clang/lib/AST/ByteCode/Interp.cpp
+1-0clang/test/AST/ByteCode/cxx11.cpp
+31-133 files

OpenBSD/src SaIW5tsregress/lib/libcrypto/x509 Makefile x509_crl.c

   x509_crl regress: enable the failing test and mark as XFAIL
VersionDeltaFile
1.28+3-1regress/lib/libcrypto/x509/Makefile
1.2+1-3regress/lib/libcrypto/x509/x509_crl.c
+4-42 files

OpenBSD/ports Bqn19n2www/chromium/patches patch-v8_src_objects_simd_cc, www/iridium/patches patch-v8_src_objects_simd_cc

   unbreak build on arm64 until the compiler is actually fixed

   fatal error: error in backend: Cannot implicitly convert a scalable size to a fixed-width size in `TypeSize::operator ScalarTy()`
   clang++: error: clang frontend command failed with exit code 70 (use -v to see invocation)
VersionDeltaFile
1.3+22-94www/chromium/patches/patch-v8_src_objects_simd_cc
1.1+28-0www/ungoogled-chromium/patches/patch-v8_src_objects_simd_cc
1.1+28-0www/iridium/patches/patch-v8_src_objects_simd_cc
+78-943 files

LLVM/project 8d60471llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp, llvm/test/CodeGen/SPIRV/hlsl-intrinsics reversebits.ll

[SPIR-V] Fix correction shift for i8 bitreverse in shader mode (#203829)

selectBitreverse16 hardcoded the post-reverse shift to 16, but it also
handles i8, where the reversed bits land in [31:24] and a shift of 16
truncated to always 0

Compute the shift as `32 - bitwidth` instead
DeltaFile
+13-10llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+2-1llvm/test/CodeGen/SPIRV/hlsl-intrinsics/reversebits.ll
+15-112 files