[SCEV] Update comment for check BE formula in howManyLT (NFC) (#219170)
Update outdate comments around the code for picking the check BE
formula. It includes the following updates:
* define End = max(RHS,Start), as used later, use instead of incorrect
max(End,Start)
* precondition for the code use check min(RHS,Start) > Start - Stride
* update remaining test to be consistent
* Stride = umax(1, Stride) instead of umin, which matches the code
above; umin would not avoid divide by 0.
Preparation for https://github.com/llvm/llvm-project/pull/218694
PR: https://github.com/llvm/llvm-project/pull/219170
AMDGPU: Pass MachineRegisterInfo to getImmOrMaterializedImm (#219422)
The only used the operand to reach the MachineRegisterInfo. Pass it
directly so it no longer depends on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[lldb] Reject an unusable memory-cache-line-size (#219217)
`target.process.memory-cache-line-size` is an unbounded `UInt64`, so
`settings set` accepts 0, and `MemoryCache` keeps the value in a
`uint32_t`, so it also accepts any multiple of 2^32, which truncates to
0. Every consumer then takes a remainder by 0.
`Process::ReadCStringFromMemory` divides on the first iteration of its
loop, before it touches inferior memory, so any address reproduces it.
On an x86_64 host that is a `SIGFPE` and lldb dies; on AArch64 `udiv` by
zero yields 0, so `addr % 0` evaluates to `addr` and the subtraction
underflows to a huge chunk size, and the bug hides.
```
$ lldb -b \
-o 'settings set target.process.memory-cache-line-size 0' \
-o 'target create --core linux-x86_64.core'
Floating point exception: 8
```
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RISCV: Pass MachineRegisterInfo to isVLKnownLE (#219402)
isVLKnownLE and its getEffectiveImm helper used the VL operands to reach
the MachineRegisterInfo. Pass it directly so they no longer depend on
MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
py-jwcrypto: updated to 1.5.9
1.5.9
Add ML-DSA post-quantum signature support (RFC 9964)
Support fully specified algorithms per RFC 9864
Skip unknown kty in JWKSet import per RFC 7517 §5
Reject non-empty encrypted key in bare ECDH-ES
Limit dot splits during JWE and JWS parsing
py-starlette: updated to 1.6.0
1.6.0 (August 8, 2026)
Added
* Add `max_body_size` to `Starlette` and route classes
* Expose `http.response.debug` information via response extensions
AMDGPU: Pass MachineRegisterInfo to getImmOrMaterializedImm
The only used the operand to reach the MachineRegisterInfo. Pass it
directly so it no longer depends on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
CodeGen: Pass instruction and operand index to isPCRelRegisterOperandLegal
Replace the MachineOperand argument to the
TargetInstrInfo::isPCRelRegisterOperandLegal hook with the containing
instruction and operand index. The M68k implementation only used the operand
to recover its parent instruction and operand number, so this drops the
dependence on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
bulk-test-go: Update Terraform/OpenTofu dependencies
Build all Terraform and OpenTofu versions and adjust DEPENDS for
providers that have now version suffixes in PKGNAME and PKGPATH.
Noticed via pkgsrc-bulk@ and thanks to <jperkin>!
Update to pkgconf 3.0.6
This mostly adds OS/2 support. The only change relevant for OpenBSD is
- --variable accepts multiple modules and prints the requested
variable's value for each module, in argument order. --path and
--print-variables remain limited to a single module.
Which is the diff in cli/core.c. Apart from that little to nothing
changes for us (some #ifdefs cause line numbers to change).
ok djm
[SelectionDAG] Preserve CTTZ_ELTS lane count during expansion (#217982)
Fixes #216649
`expandCttzElts` derives `VL` from its legalized auxiliary step vector.
When that helper vector is widened for target legality, its lane count
may differ from the logical lane count of the `CTTZ_ELTS` operand.
On X86 with AVX512F, the step vector for a semantic `<4 x i1>` mask is
widened from `v4i8` to `v16i8`. As a result, an all-zero
`llvm.experimental.cttz.elts` input returns 16 instead of the required
result of 4.
Preserve the `ElementCount` from the `CTTZ_ELTS` operand and use it when
materializing `VL`. Auxiliary step-vector legalization can still widen
its representation without changing the logical lane domain of the
operation.
Add AVX512F regression coverage for the affected `v4i1` and `v8i1`
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[Clang] Fix -Wunused-parameter for implicit coroutine uses (#217518)
Clang's coroutine semantic analysis builds references to coroutine
parameters
while looking up a class-specific allocation function. When overload
resolution
falls back to a size-only `operator new`, these speculative references
currently
suppress `-Wunused-parameter`.
Preserve each parameter's referenced state while collecting placement
arguments, then mark the parameters referenced only when those arguments
are
included in the selected allocation call. Keep this distinction when
placement
arguments are replaced by `std::nothrow`.
Apply the same rule to promise initialization: when initialization using
the
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Revert "Revert "workflows/release-binaries: Disable flang on Darwin (#164667)"" (#218978)
Reverts llvm/llvm-project#216667
This change was ported to the `release/23.x` branch in #217059, and when
we created the first release that included this change (3.1.0), the job
for the MacOS ARM binaries was killed when the job hit the 6 hour mark.
Previous 3.1.0-rc release did not include this change and all completed
well within the 6 hour time out.
To enable the job that builds the release binaries to complete within
the allotted time, I am reverting this change which will essentially
disable flang from building on Darwin.
In the future if we get faster builders, we can explore re-enabling
building flang.
(cherry picked from commit 3d771f477aa026ca41cb3c4e492d7a07fa852cbe)
[X86] LowerAVXCONCAT_VECTORS - fix some clang-format messiness. NFC. (#218504)
Bad indentation and missing braces
Pulled out of #218381 to simplify functional diff
(cherry picked from commit a6eb1e1e75a2d29f8f458c6ee513ae5b030ff9a0)
[X86] LowerAVXCONCAT_VECTORS - collect all subvector operands before ReplaceAllUsesWith call (#218381)
We can end up referencing a node replaced with ISD::DELETED_NODE
Fixes #218379
(cherry picked from commit 7bced7f78781d3bdc179e64c777f50ef46ab1375)
[SLP]Fix narrow-tree gate width and extract miscount
Measure the narrowness of in-loop trees by the actual vectorization
width instead of the feeder-load width, and skip vector-typed scalars
in the instruction count check to match the cost model.
Fixes #216715
Reviewers: efriedma-quic, bababuck, RKSimon, kartcq
Pull Request: https://github.com/llvm/llvm-project/pull/216797
