OPNSense/core 95f552bsrc/etc/inc interfaces.lib.inc interfaces.inc

interfaces: skip pfsync interface reconfiguration if peer unchanged (#10924)

also check if mtu actually changes before applying it on pfsync0
DeltaFile
+16-2src/etc/inc/interfaces.inc
+14-0src/etc/inc/interfaces.lib.inc
+30-22 files

LLVM/project 4aa4a6dllvm/lib/DebugInfo/PDB/Native InfoStreamBuilder.cpp NamedStreamMap.cpp, llvm/test/DebugInfo/PDB pdbdump-raw-bytes.test

[PDB] Correctly read/write the named stream map's niMac value (#225729)

The serialization of a PDB stream's named stream map ends with an
integer value, NMTNI::niMac in the microsoft-pdb code.

Since 05d5e6136f5a3f5de28ae64077200bbdc2cacfb4, LLVM was writing this
out as an undocumented zero between the named streams map and feature
codes, and reading it as an unknown/ignored feature code.

The actual value doesn't seem particularly important, but it's better to
read/write these explicitly, and it should not be read as a feature
code.

This fixes one of the issues in
https://github.com/llvm/llvm-project/issues/206120
DeltaFile
+14-5llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
+1-3llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
+1-1llvm/test/tools/llvm-pdbutil/explain-pdb-stream.test
+1-1llvm/test/DebugInfo/PDB/pdbdump-raw-bytes.test
+17-104 files

LLVM/project 3be1abdllvm/lib/Target/RISCV RISCVInstrInfoXAndes.td, llvm/test/MC/RISCV xandesvsinth-invalid.s xandesvsinth-valid.s

[RISCV] Require Zve32f for XAndesVSIntH FP conversions (#226001)

`XAndesVSIntH` currently implies only `Zve32x`. This commit requires
vector floating-point support for its four integer-to-FP conversion
instructions.
DeltaFile
+9-9llvm/test/MC/RISCV/xandesvsinth-valid.s
+15-0llvm/test/MC/RISCV/xandesvsinth-invalid.s
+4-0llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
+28-93 files

LLVM/project 5b6bfedclang/docs ReleaseNotes.md, clang/lib/Sema SemaOpenMP.cpp

[Clang][OpenMP] Use the list item location as point of instantiation in mapper lookup (#225604)

Fixes #154704

When a variable is implicitly mapped on `#pragma omp target`, Clang
looks for a user-defined mapper for its type through ADL, and ADL may
have to instantiate class template specializations named by the type's
template arguments (for `std::map<int, int>` that's its allocator).
Implicit map clauses carry no source location by design, and the
"default" mapper id was stamped with that empty location, so the
instantiation was recorded with an invalid point of instantiation and
`setPointOfInstantiation` asserted.

`buildUserDefinedMapperRef` now takes the location of the mapped list
item and uses it for the ADL and the derived-class checks, which is what
the other default-mapper lookups in `SemaOpenMP.cpp` already did.
Diagnostics about the mapper id and the mapper reference itself keep the
mapper-id location, so explicit `mapper(id)` behavior is unchanged. The
instantiation is now attributed to the mapped variable inside the
region, which is also where the "in instantiation requested here" note
points.
DeltaFile
+33-0clang/test/OpenMP/gh154704.cpp
+16-12clang/lib/Sema/SemaOpenMP.cpp
+2-0clang/docs/ReleaseNotes.md
+51-123 files

LLVM/project 61df043llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/AArch64 reassociate-fma-pairs.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+274-67llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+98-110llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
+22-41llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
+31-30llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
+25-23llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
+17-17llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
+467-28810 files not shown
+549-35816 files

LLVM/project 0273f1dllvm/test/CodeGen/ARM machine-outliner-stack-fixup-thumb.mir

Update CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
DeltaFile
+1-1llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
+1-11 files

LLVM/project 89c1bfallvm/lib/CodeGen MachineOutliner.cpp, llvm/test/CodeGen/AArch64 machine-outliner-operand-flags.mir

[AArch64][PAC] Reset `killed` operand flags in outlined functions

Presently, MachineOutliner does not take `killed` operand flags into
account when merging instruction sequences. While it sounds perfectly
reasonable not to inhibit merging of the instruction sequences that
only differ in `killed` flags (for N flags there is technically 2^N
valid ways to drop some subset of them), copying these flags from
an arbitrarily chosen representative instruction may result in
incorrect codegen of PAuth-related pseudo instructions on AArch64.

To keep `killed` flags conservatively correct as if `OUTLINED_FUNCTION`s
are virtually re-inserted at every call site, this patch takes the
simplest approach of resetting every `killed` flag inside the
outlined functions.
DeltaFile
+82-0llvm/test/CodeGen/AArch64/machine-outliner-operand-flags.mir
+1-0llvm/lib/CodeGen/MachineOutliner.cpp
+83-02 files

LLVM/project 0145adeclang/lib/AST/ByteCode Interp.h, clang/test/AST/ByteCode invalid.cpp

[clang][bytecode] Diagnose array-to-pointer-decays on unsized opaque pointers (#226027)
DeltaFile
+12-0clang/test/AST/ByteCode/invalid.cpp
+10-1clang/lib/AST/ByteCode/Interp.h
+22-12 files

LLVM/project d098bf2libc/src/__support/OSUtil/linux/syscall_wrappers renameat.h, libc/src/stdio renameat.h

[libc] Implement renameat in stdio (#225739)

Implement the standard POSIX.1-2008 / POSIX.1-2024 function renameat in
<stdio.h>.

Fixes #225679
DeltaFile
+99-0libc/test/src/stdio/renameat_test.cpp
+42-0libc/src/__support/OSUtil/linux/syscall_wrappers/renameat.h
+33-0libc/src/stdio/linux/renameat.cpp
+26-0libc/src/stdio/renameat.h
+23-0libc/test/src/stdio/CMakeLists.txt
+14-0libc/src/stdio/linux/CMakeLists.txt
+237-06 files not shown
+268-012 files

FreeBSD/ports 9afe11cgames/gcompris-qt pkg-plist Makefile

games/gcompris-qt: Update to 26.2

Announcement: https://gcompris.net/news-en.html#2026-09-23
DeltaFile
+3-3games/gcompris-qt/distinfo
+1-1games/gcompris-qt/Makefile
+1-0games/gcompris-qt/pkg-plist
+5-43 files

FreeBSD/ports 20a7492net/libslirp Makefile distinfo

net/libslirp: Update to 4.9.5
DeltaFile
+3-3net/libslirp/distinfo
+1-1net/libslirp/Makefile
+4-42 files

LLVM/project 896f344llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstCombine vectorgep-crash.ll gep-vector.ll

[ConstantFolding] Use getGetElementPtr() overload accepting DataLayout (#226104)

To directly create the constant GEP in canonical form. The practical
effect is that we a) canonicalize vector GEPs and b) decline to
create a GEP which can't be represented in ptradd form (in the
constant_fold_custom_dl test due to a non-canonical index type).
DeltaFile
+5-3llvm/lib/Analysis/ConstantFolding.cpp
+3-3llvm/test/Transforms/InstCombine/gep-vector.ll
+5-1llvm/test/Transforms/InstCombine/gep-custom-dl.ll
+2-2llvm/test/Transforms/InstCombine/vectorgep-crash.ll
+15-94 files

LLVM/project e051f6dllvm/test/CodeGen/Generic sjlj-eh-prepare.ll, llvm/test/Transforms/SjLjEHPrepare sjlj-eh-prepare.ll

CodeGen: Move Generic sjlj test to Transforms

Test the IR-only SjLjEHPrepare pass in the dedicated pass test
directory. Also add the module flag so it is really triple
independent.
DeltaFile
+47-0llvm/test/Transforms/SjLjEHPrepare/sjlj-eh-prepare.ll
+0-44llvm/test/CodeGen/Generic/sjlj-eh-prepare.ll
+47-442 files

LLVM/project f96febaflang/lib/Optimizer/Transforms/CUDA CUFAddConstructor.cpp, flang/test/Fir/CUDA cuda-managed-descriptor-component.fir cuda-constructor-2.f90

[flang][cuda] Share the managed companion pointer across translation units (#225710)

A non-allocatable managed module variable is accessed through a
companion pointer in the `__nv_managed_data__` section, which the CUDA
runtime fills in with the unified memory address at module
initialization. Every translation unit referencing the variable emitted
its own internal pointer and registered it. The runtime populates only
the registration performed first for a given variable name (*), so every
other unit was left loading through a null pointer and crashed at run
time.

Emit a single pointer with external linkage instead. The unit defining
the variable emits the definition, zero-initialized and in
`__nv_managed_data__`, and registers it; a unit that only USEs the
variable emits a declaration and no registration, resolving to that
definition at link time.

(*) I verified this using the following reproducer:


    [31 lines not shown]
DeltaFile
+53-0flang/test/Fir/CUDA/cuda-managed-pointer-linkage.cuf
+36-13flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
+40-2flang/test/Fir/CUDA/cuda-constructor-2.f90
+6-1flang/test/Fir/CUDA/cuda-managed-descriptor-component.fir
+135-164 files

LLVM/project 453900cllvm/test/CodeGen/X86 memset.ll, llvm/test/Transforms/LoopVectorize/X86 intrinsiccost.ll

[X86] Prepare bdver tests for TuningPrefer128Bit (#226103)

Ensure the check prefixes correctly handle XOP targets independently,
I've also reordered some of the tests so we can cleanly order the
eventual AVX128/AVX256/AVX512 checks

Help reduce the diff for #225838
DeltaFile
+269-99llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
+87-64llvm/test/CodeGen/X86/memset.ll
+17-83llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
+17-83llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
+10-10llvm/test/Transforms/SLPVectorizer/X86/fcopysign.ll
+10-10llvm/test/Transforms/SLPVectorizer/X86/fabs.ll
+410-3492 files not shown
+419-3588 files

LLVM/project 7a19120llvm/lib/Target/RISCV RISCVSubtarget.h RISCVTargetTransformInfo.cpp

[RISCV] Remove getMaxLMULForFixedLengthVectors. NFC

The value can no longer be overridden after https://github.com/llvm/llvm-project/pull/207312. Now there's nothing specific about it to fixed vectors, so just inline it.
DeltaFile
+0-6llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+2-4llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+1-1llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+0-1llvm/lib/Target/RISCV/RISCVSubtarget.h
+3-124 files

OpenBSD/src 8EwR4dyusr.sbin/pkg_add/OpenBSD PackageRepository.pm

   key= in the signify gzip comment used to include the path, but this was
   dropped in signify.c:1.137 so that only bare filenames are used. teach
   pkg_add about this so that the signer is still recorded in +CONTENTS
   for installed packages. from espie
VersionDeltaFile
1.179+5-3usr.sbin/pkg_add/OpenBSD/PackageRepository.pm
+5-31 files

LLVM/project 36aa7eallvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp

Use getTypeLegalizationCost
DeltaFile
+5-9llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+5-91 files

OpenBSD/src M1FEtUdusr.sbin/pkg_add/OpenBSD PkgInfo.pm

   for pkg_info -C, don't print an error if there's no @signer in the plist
   from espie; problem reported by Luigi Vianello
VersionDeltaFile
1.55+3-2usr.sbin/pkg_add/OpenBSD/PkgInfo.pm
+3-21 files

NetBSD/pkgsrc DKapYtXdoc TODO CHANGES-2026

   Updated devel/py-wcwidth, www/py-yarl
VersionDeltaFile
1.6316+3-1doc/CHANGES-2026
1.27977+1-2doc/TODO
+4-32 files

NetBSD/pkgsrc uMRsfuDwww/py-yarl distinfo Makefile

   py-yarl: updated to 1.25.1

   v1.25.1

   Contributor-facing changes

   - Stopped running the test suite inside the riscv64 wheel builds; every wheel
     for that architecture is built under emulation and the test run did not fit
     in the job timeout.


   v1.25.0

   Bug fixes

   - Made the C and pure Python quoting implementations reject ``%`` in ``safe``
     or ``protected`` when requoting and a space in ``safe`` or ``protected`` for
     query strings, since the two implementations disagreed on those
     configurations.

    [15 lines not shown]
VersionDeltaFile
1.60+6-6www/py-yarl/Makefile
1.53+4-4www/py-yarl/distinfo
+10-102 files

LLVM/project fe66579clang/test/CodeGen/AArch64/sve dup.c, clang/test/CodeGen/AArch64/sve-intrinsics acle_sve_dup.c

[clang][AArch64] Consolidate codegen tests for SVE's DUP intrinsics (#223933)

This patch completes the migration of the tests from:

* clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c

to:

* clang/test/CodeGen/AArch64/sve/dup.c

`dup.c` covers all the cases previously tested by `acle_sve_dup.c`.
However, unlike `acle_sve_dup.c`, it was only tested as C. Add `-x c++`
RUN lines to provide the equivalent C++ coverage, including lowering
via CIR.
DeltaFile
+0-1,130clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
+146-80clang/test/CodeGen/AArch64/sve/dup.c
+146-1,2102 files

NetBSD/pkgsrc 1XMAItSdevel/py-wcwidth PLIST Makefile

   py-wcwidth: updated to 0.9.1

   0.9.1 *2026-09-23*
   * **Bugfix** a regression in 0.9.0 Python and libwcwidth_ `width()`_ mis-measured CSI sequences
     over 64 bytes
   * **Performance** improvement of ~15% for 11 many Python API functions when using
     default ``ambiguous_width`` and ``term_program`` arguments.

   0.9.0 *2026-09-23*
   * **New** Optional CPython extension using libwcwidth_, improving performance 10-58x
   * **Drop Support** for Python 3.8
VersionDeltaFile
1.31+3-5devel/py-wcwidth/Makefile
1.28+4-4devel/py-wcwidth/distinfo
1.14+4-1devel/py-wcwidth/PLIST
+11-103 files

LLVM/project 23cc19allvm/lib/Target/AMDGPU SIWholeQuadMode.cpp, llvm/test/CodeGen/AMDGPU wqm.mir

AMDGPU: Invalidate VCC live ranges when lowering kill instructions (#226040)

lowerKillInstr replaces the kill pseudo with a v_cmp defining VCC plus
two instructions reading it, but left any previously computed VCC
regunit ranges alone. If something had already materialized them, the
new uses have no live segment:

  *** Bad machine code: No live segment at use ***
  - instruction: $exec = S_ANDN2_B64_term $exec, $vcc, implicit-def $scc

Drop the ranges so they are recomputed on demand, as is already done for
EXEC and SCC.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+38-0llvm/test/CodeGen/AMDGPU/wqm.mir
+2-0llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+40-02 files

LLVM/project 373c617llvm/lib/Transforms/Instrumentation SanitizerCoverage.cpp

[SanitizerCoverage] Directly create ptradd constant expression (NFC) (#226107)

Don't go through an IRBuilder without insertion point for a case
that always creates a constant expression.
DeltaFile
+2-3llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
+2-31 files

LLVM/project c223b63llvm/lib/CodeGen RDFGraph.cpp MachineLICM.cpp, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

CodeGen: Derive ARM EH pointer/selector registers from MCAsmInfo

Whether the exception pointer and selector are delivered in registers is an
object-format property, not a program-state one. ARM was the only target to
consult the exception model here, to test for SjLj EH, and that is a constant
for the triple already recorded in MCAsmInfo. Read it from there and drop the
ExceptionHandling argument that was threaded through
getExceptionPointerRegister and getExceptionSelectorRegister.

This is the effective revert of fdc178994aa7.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+5-9llvm/lib/Target/XCore/XCoreFrameLowering.cpp
+9-4llvm/lib/Target/ARM/ARMISelLowering.cpp
+4-8llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+2-7llvm/lib/CodeGen/MachineLICM.cpp
+3-6llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+2-6llvm/lib/CodeGen/RDFGraph.cpp
+25-4027 files not shown
+79-13433 files

LLVM/project c3fae69llvm/test/CodeGen/AArch64 arm64-ccmp-heuristics.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-memory-metadata.mir regbankselect-split-scalar-load-metadata.mir

[llvm] Update tests to use struct path TBAA (#226051)

The new format was introduced more than a decade ago, so make sure it's
used in tests. The tests currently get away with it due to a TBAA
upgrade applied in the IR parser.

Disclosure: AI-generated change.
DeltaFile
+12-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
+8-6llvm/test/CodeGen/X86/merge_store_duplicated_loads.ll
+6-5llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
+6-3llvm/test/CodeGen/Hexagon/circ_ld.ll
+6-3llvm/test/CodeGen/AArch64/arm64-ccmp-heuristics.ll
+6-2llvm/test/Transforms/SROA/tbaa-struct2.ll
+44-2340 files not shown
+148-7746 files

LLVM/project c2aef22llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.h AArch64InstructionSelector.cpp

[AArch64][GlobalISel] Improve fixed-point int-to-fp selection (#224055)

Select scalar fixed-point integer-to-float conversions directly in
GlobalISel when their integer operand is already in the FPR bank. Teach
the fixed-point immediate matcher about reciprocal constants. Refine
register-bank selection for scalar conversion intrinsics.
DeltaFile
+152-185llvm/test/CodeGen/AArch64/fcvt-fixed.ll
+56-42llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+49-4llvm/lib/Target/AArch64/AArch64InstrInfo.td
+9-0llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+7-0llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
+273-2315 files

OPNSense/core aeb9df1src/opnsense/mvc/app/models/OPNsense/Interfaces NetworkInterface.php

interfaces: compare first, then call the real toLegacy() when needed

Saves a few cycles after we have to pull the data twice.
DeltaFile
+33-28src/opnsense/mvc/app/models/OPNsense/Interfaces/NetworkInterface.php
+33-281 files

OpenBSD/ports KPQzYLPdevel/orc Makefile distinfo

   update to orc-0.4.44, from Brad (maintainer)
VersionDeltaFile
1.14+2-2devel/orc/distinfo
1.30+1-1devel/orc/Makefile
+3-32 files