FreeNAS/freenas 7bbebebsrc/middlewared/middlewared/plugins/pool_ snapshot.py, src/middlewared/middlewared/plugins/zfs snapshot_crud.py snapshot_rollback_helpers.py

Address reviews
DeltaFile
+18-45src/middlewared/middlewared/plugins/zfs/snapshot_rollback_impl.py
+4-35src/middlewared/middlewared/pytest/unit/plugins/zfs/test_snapshot_rollback_helpers.py
+2-15src/middlewared/middlewared/plugins/zfs/snapshot_rollback_helpers.py
+0-7src/middlewared/middlewared/plugins/zfs/snapshot_crud.py
+0-2src/middlewared/middlewared/plugins/pool_/snapshot.py
+24-1045 files

FreeNAS/freenas f2acb6csrc/middlewared/debian control

NAS-141885 / 27.0.0-BETA.1 / Depend on websockify explicitly for SPICE display (#19365)

## Problem
VMs with a SPICE display device shell out to the `websockify` binary at
runtime (truenas_pylibvirt's display device runs `websockify --web
/usr/share/spice-html5/ ...` to proxy the console to the web UI). We
never declared that dependency though — websockify only got installed as
a transitive `Recommends:` of `spice-html5`. Once truenas_build disabled
`install_recommends` by default, the `truenas` package started
installing with `--no-install-recommends`, so websockify silently
stopped being pulled in and SPICE consoles broke.

## Solution
Add `websockify` to middlewared's `Depends`. It's a genuine hard runtime
dependency of the SPICE path, so declaring it explicitly makes it come
in regardless of the build's recommends setting and keeps us correct
even if spice-html5's packaging changes.

(cherry picked from commit 44dd41a18e7db2c8466c6fbd72e75be226a9491e)
DeltaFile
+1-0src/middlewared/debian/control
+1-01 files

FreeNAS/freenas 768f438src/middlewared/debian control

NAS-141885 / 27.0.0-BETA.1 / Depend on websockify explicitly for SPICE display (#19365)

## Problem
VMs with a SPICE display device shell out to the `websockify` binary at
runtime (truenas_pylibvirt's display device runs `websockify --web
/usr/share/spice-html5/ ...` to proxy the console to the web UI). We
never declared that dependency though — websockify only got installed as
a transitive `Recommends:` of `spice-html5`. Once truenas_build disabled
`install_recommends` by default, the `truenas` package started
installing with `--no-install-recommends`, so websockify silently
stopped being pulled in and SPICE consoles broke.

## Solution
Add `websockify` to middlewared's `Depends`. It's a genuine hard runtime
dependency of the SPICE path, so declaring it explicitly makes it come
in regardless of the build's recommends setting and keeps us correct
even if spice-html5's packaging changes.

(cherry picked from commit 44dd41a18e7db2c8466c6fbd72e75be226a9491e)
DeltaFile
+1-0src/middlewared/debian/control
+1-01 files

LLVM/project a86b585lld/test/ELF amdgpu-tid.s, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

AMDGPU: Remove xnack and sramecc subtarget features (#212792)

Now that these are controlled by module flags, the subtarget
features were just used for assembler and disassembler controls.
Now that the assembler and disassembler can infer these from
the e_flags and target directives, they are no longer necessary.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+9-76llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+71-12llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+38-24llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+44-14llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
+30-14lld/test/ELF/amdgpu-tid.s
+16-12llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx10.s
+208-15224 files not shown
+320-25430 files

LLVM/project be7f0c8llvm/test/CodeGen/AArch64 arm64-abi_align.ll, llvm/test/CodeGen/AMDGPU loop-address.ll

llvm: Remove phantom relocation-model attributes from tests (#221931)

"relocation-model" was never a real function attribute.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-4llvm/test/CodeGen/AArch64/arm64-abi_align.ll
+2-2llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
+1-1llvm/test/CodeGen/Hexagon/insert4.ll
+1-1llvm/test/CodeGen/AMDGPU/loop-address.ll
+10-102 files not shown
+12-128 files

LLVM/project accf16eclang/include/clang/Lex Lexer.h, clang/lib/Parse ParseTentative.cpp ParseExprCXX.cpp

[clang][CUDA/HIP] Fix parsing of `operator<<<...>` (#218384)

In CUDA mode Lexer merges `<<<` into a single token and Parser fails to
recognize that it is actually a template specialization of `operator<<`
and not a CUDA kernel call expression. Split `<<<` following operator
token to `<<` and `<`.
DeltaFile
+53-0clang/test/Parser/cuda-operator-lesslessless.cu
+30-0clang/lib/Parse/ParseExprCXX.cpp
+7-0clang/lib/Parse/ParseTentative.cpp
+1-1clang/include/clang/Lex/Lexer.h
+91-14 files

LLVM/project 6b72801bolt/lib/Target/RISCV RISCVMCSymbolizer.cpp, bolt/test/RISCV unsymbolized-long-jump.s unsymbolized-call-entry.s

[BOLT][RISCV] Fix AUIPC/JALR call rewriting (#216882)

This builds on the RISC-V decoder support from #217550 and the BOLT
target symbolizer and GOT relocation handling from #217944, both of
which are now merged.

`R_RISCV_CALL` and `R_RISCV_CALL_PLT` cover an AUIPC/JALR pair, but BOLT
treated them as four-byte relocations and decoded only the AUIPC
immediate. Read both instructions and combine their signed high and low
immediates so relocated call targets retain the low 12 bits.

LTO can also leave linker-resolved intra-section AUIPC/JALR calls
without relocations. On RV64, recognize standard call and tail-call
pairs during disassembly, reconstruct the target (including JALR
target-bit clearing), and attach an exact entry-point symbol before
function reordering. Alternate link-register preservation is provided by
the merged #218408.

This follows the RISC-V Unprivileged ISA sections on AUIPC and JALR:

    [21 lines not shown]
DeltaFile
+116-0bolt/test/RISCV/unsymbolized-call-edge.s
+98-1bolt/lib/Target/RISCV/RISCVMCSymbolizer.cpp
+78-0bolt/test/RISCV/call-relocation-pair.s
+60-0bolt/test/RISCV/unsymbolized-call-entry.s
+60-0bolt/test/RISCV/unsymbolized-call.s
+38-0bolt/test/RISCV/unsymbolized-long-jump.s
+450-13 files not shown
+474-79 files

LLVM/project 48ae4d3libcxx/include/__optional optional_ref.h, libcxx/test/std/utilities/optional/optional.monadic transform.pass.cpp

[libc++] Fix `optional<T>::transform` into `optional<T&>` (#221506)

Resolves #220332

- Make `optional<T>` a friend of `optional<T&>`, and add tests.
DeltaFile
+33-0libcxx/test/std/utilities/optional/optional.monadic/transform.pass.cpp
+3-0libcxx/include/__optional/optional_ref.h
+36-02 files

FreeBSD/ports fbfab35mail/cyrus-imapd310 Makefile distinfo, mail/cyrus-imapd310/files patch-imap__lmtp_sieve.c

mail/cyrus-imapd310: Update to 3.10.4
DeltaFile
+0-10mail/cyrus-imapd310/files/patch-imap__lmtp_sieve.c
+3-3mail/cyrus-imapd310/distinfo
+1-1mail/cyrus-imapd310/Makefile
+4-143 files

FreeBSD/ports 126d202mail/cyrus-imapd312 Makefile distinfo, mail/cyrus-imapd312/files patch-imap__lmtp_sieve.c

mail/cyrus-imapd312: Update to 3.12.4
DeltaFile
+0-10mail/cyrus-imapd312/files/patch-imap__lmtp_sieve.c
+3-3mail/cyrus-imapd312/distinfo
+1-1mail/cyrus-imapd312/Makefile
+4-143 files

FreeBSD/ports c46c3f3mail/cyrus-imapd38 Makefile distinfo, mail/cyrus-imapd38/files patch-imap__lmtp_sieve.c

mail/cyrus-imapd38: Update to 3.8.8
DeltaFile
+0-10mail/cyrus-imapd38/files/patch-imap__lmtp_sieve.c
+3-3mail/cyrus-imapd38/distinfo
+1-1mail/cyrus-imapd38/Makefile
+4-143 files

LLVM/project 0952067lldb/source/Target StackFrameRecognizer.cpp, lldb/test/API/commands/frame/recognizer/step-through TestFrameRecognizerStepThrough.py

[lldb] Match frame recognizers by function when the frame has no symbol (#222060)

A frame can have a function without having a symbol: a PE/COFF image
built with DWARF carries no symbol table at all, so `symctx.symbol` is
null on Windows while `symctx.function` resolves fine from the debug
info. `GetRecognizerForFrame` bailed out on `!symbol`, so no frame
recognizer ever matched there.

Fall back to the function's start address when there is no symbol. The
symbol still wins when both are present, so this is a no-op on
ELF/Mach-O.

This fixes `TestFrameRecognizerStepThrough.py`.
DeltaFile
+7-3lldb/source/Target/StackFrameRecognizer.cpp
+0-1lldb/test/API/commands/frame/recognizer/step-through/TestFrameRecognizerStepThrough.py
+7-42 files

NetBSD/pkgsrc wfaaVjewww/nginx-devel Makefile distinfo

   nginx-devel: updated to 1.31.5

   Changes with nginx 1.31.5                                        02 Sep 2026

   *) Feature: control API.

   *) Feature: predicate locations.

   *) Feature: the ngx_http_json_module.

   *) Feature: the "client_body_early_read" directive.

   *) Bugfix: use-after-free might occur in a worker process if proxying
      with buffering was used and an error occurred while sending the
      response to an HTTP/2 client.

   *) Bugfix: a worker process might not exit or "accept4() failed (9: Bad
      file descriptor)" alerts might appear in logs if the worker process
      ran out of file descriptors before graceful shutdown.

    [6 lines not shown]
VersionDeltaFile
1.134+4-4www/nginx-devel/distinfo
1.171+2-3www/nginx-devel/Makefile
+6-72 files

LLVM/project 7923040clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp

[clang][AST][NFC] Make ASTContext::isPFPField() static (#220265)
DeltaFile
+1-1clang/lib/AST/ASTContext.cpp
+1-1clang/include/clang/AST/ASTContext.h
+2-22 files

LLVM/project 4200a8ellvm/lib/Target/X86 X86CompressEVEX.cpp, llvm/test/CodeGen/X86 avx512-regcall-NoMask.ll compress-evex-vpmov-kill.mir

[X86] Compress masked VPBLENDM using VBLENDV (#221838)

Fixes #221678.

This extends the X86 EVEX compression pass to recognize compatible
`VPMOVD2M/VPMOVQ2M + VPBLENDMD/VPBLENDMQ` patterns and replace them with
the corresponding VEX `VBLENDVPS/VBLENDVPD` instruction when the mask
width and element granularity match.

For example, the reported AVX-512 sequence:

```asm
vpslld    $31, %xmm0, %xmm0
vpmovd2m  %xmm0, %k1
vpblendmd %xmm1, %xmm2, %xmm0 {%k1}
```

is reduced to:


    [31 lines not shown]
DeltaFile
+61-0llvm/test/CodeGen/X86/compress-evex-vpmov-blendv.mir
+35-9llvm/lib/Target/X86/X86CompressEVEX.cpp
+30-0llvm/test/CodeGen/X86/compress-evex-vpmov-kill.mir
+3-6llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
+129-154 files

LLVM/project 3d2f88dllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 avx512-masked-op-fusion.ll

[X86] Fix commuteSelect miscompile with double-used condition value (#219436)

The multi-use loop iterated `Cond->users()` which yields duplicates when
a select uses the condition in multiple operand positions. This caused a
double-commute and iterator corruption, leaving other selects with an
inverted condition but unswapped operands.

Remove the in-place mutation loop and return a new select node. The DAG
combiner visits each select independently and `getSetCC` CSEs the
inverted condition so all commuted selects share it.
DeltaFile
+63-0llvm/test/CodeGen/X86/avx512-masked-op-fusion.ll
+2-14llvm/lib/Target/X86/X86ISelLowering.cpp
+65-142 files

LLVM/project 95dfce1llvm/lib/Target/AArch64 AArch64SchedNeoverseV3.td, llvm/test/tools/llvm-mca/AArch64/Neoverse V3-neon-instructions.s

[AArch64] Add Neoverse V3 scheduling info for v264 frecpe (#221917)

This was missing, falling back to the default information. It should be
like the others.

This is the Neoverse V3 equivalent of #219115
DeltaFile
+5-5llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-neon-instructions.s
+1-0llvm/lib/Target/AArch64/AArch64SchedNeoverseV3.td
+6-52 files

LLVM/project f920a67llvm/test/CodeGen/AArch64 arm64-abi_align.ll, llvm/test/CodeGen/Hexagon/vect vect-xor.ll vect-v4i16.ll

llvm: Remove phantom relocation-model attributes from tests

"relocation-model" was never a real function attribute.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-4llvm/test/CodeGen/AArch64/arm64-abi_align.ll
+2-2llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
+1-1llvm/test/Transforms/LoopVectorize/vectorize-once.ll
+1-1llvm/test/Transforms/LoopVectorize/dbg.value.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
+10-102 files not shown
+12-128 files

LLVM/project 6a20cacllvm/docs/CommandGuide llvm-objdump.md, llvm/tools/llvm-objdump ObjdumpOpts.td

[llvm-objdump] Document selecting symbols containing commas (#221619)

The documentation does not clearly distinguish how
`--disassemble-symbols=`
and `--disassemble=<symbol>` handle their arguments, making it easy to
overlook how to select symbols whose names contain commas.

Update the command guide and help text to explain that the former
accepts
a comma-separated list of symbols, while the latter accepts a single
symbol
name and may be specified multiple times.

Assisted-by: OpenAI Codex
DeltaFile
+12-3llvm/docs/CommandGuide/llvm-objdump.md
+3-2llvm/tools/llvm-objdump/ObjdumpOpts.td
+15-52 files

FreeBSD/ports 8d8fa3egames/linux-enemyterritory Makefile, games/linux-enemyterritory/files et.in

games/linux-enemyterritory: Fix sound

The game starts writing audio s_mixPreStep seconds into the sound
buffer, but s_mixPreStep defaults to 0.05 (50ms), and sound(4) hands out
a ~46ms buffer by default (hw.snd.latency=2), so 50ms is already past
the end of the buffer and nothing is ever written. Start writing at 20ms
instead, which leaves space for sound to be written.

Approved by:    arrowd, arved
PR:             251660
Sponsored by:   The FreeBSD Foundation
DeltaFile
+3-1games/linux-enemyterritory/files/et.in
+1-1games/linux-enemyterritory/Makefile
+4-22 files

LLVM/project cc38b29llvm/test/MC/MachO zero-space.s weakdef.s, llvm/test/tools/llvm-readobj/MachO file-headers-arm64.test file-headers.test

[llvm-readobj] Display Mach-O CPU capability bits (#221617)

The Mach-O file header output masks the capability bits out of
`cpusubtype`
without printing them separately, so this information is missing from
the
output.

Add a `CpuCapabilities` field to print the high byte in hexadecimal,
matching the numeric representation used by `llvm-objdump`.

Fixes #80198.

Assisted-by: OpenAI Codex (implementation, tests, and initial
description).
DeltaFile
+61-0llvm/test/tools/llvm-readobj/MachO/cpu-capabilities.yaml
+2-0llvm/tools/llvm-readobj/MachODumper.cpp
+2-0llvm/test/tools/llvm-readobj/MachO/file-headers.test
+1-0llvm/test/tools/llvm-readobj/MachO/file-headers-arm64.test
+1-0llvm/test/MC/MachO/zero-space.s
+1-0llvm/test/MC/MachO/weakdef.s
+68-03 files not shown
+71-09 files

OpenBSD/ports 0GfcLbRnet/tdesktop Makefile, net/tdesktop/patches patch-Telegram_cmake_lib_fido2_cmake patch-Telegram_SourceFiles_webauthn_webauthn_common_cpp

   net/tdesktop: remove libfido2 patches

   After update libfido2 in base and adding libfido2.pc we don't need any
   of them anymore.

   Diff from Nazarenko Mykyta

   OK: kn@
VersionDeltaFile
1.231+1-0net/tdesktop/Makefile
1.2+0-0net/tdesktop/patches/patch-Telegram_cmake_lib_fido2_cmake
1.2+0-0net/tdesktop/patches/patch-Telegram_SourceFiles_webauthn_webauthn_common_cpp
+1-03 files

LLVM/project 4e76287llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

[GlobalISel] Restrict value offset tracking to aggregates (NFC) (#221287)

The single-vreg fast path added in d30d5fe8dd5d3 still populated an
offset list, even though offsets are only necessary for aggregate
values.

This wasn't the only place doing so. Avoid creating or updating offset
lists for non-aggregate values and add an assertion to enforce this
invariant.

Small -0.04% geomean improvement on CTMark aarch64-O0-g.

https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=2aeb9d236a2cacf8ab93722b8b629243384bae68&stat=instructions:u

Assisted-by: codex
DeltaFile
+10-9llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+10-91 files

NetBSD/pkgsrc jAfUgAmdoc TODO

   doc/TODO: + fuse3-3.18.3 (security fix release).
VersionDeltaFile
1.27878+2-1doc/TODO
+2-11 files

NetBSD/src k2NGh2rdoc 3RDPARTY

   libpcap 1.10.7 out
VersionDeltaFile
1.2244+2-2doc/3RDPARTY
+2-21 files

LLVM/project ae9cbb7llvm/lib/Target/AMDGPU SIMemoryLegalizer.cpp, llvm/test/CodeGen/AMDGPU memory-legalizer-non-volatile.mir

Comments
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.mir
+1-1llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+4-42 files

LLVM/project f3d9ca0llvm/test/CodeGen/AMDGPU memory-legalizer-non-volatile.mir

Fix MIR test
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.mir
+3-31 files

LLVM/project 192f788llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU SIInstrInfo.h SIMemoryLegalizer.cpp

[AMDGPU][SIMemoryLegalizer] Consider scratch operations as NV=1 if GAS is disabled

- Clarify that `thread-private` MMO flag is still useful.
- If GAS is not enabled (which is the default as of last patch), consider an op as `NV=1` if it's a `scratch_` opcode, or if the MMO is in the private AS.
- Add tests for the new cases.
- Update AMDGPUUsage GFX12.5 memory model
DeltaFile
+181-0llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.mir
+75-36llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
+13-6llvm/docs/AMDGPUUsage.rst
+14-3llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+3-1llvm/lib/Target/AMDGPU/SIInstrInfo.h
+286-465 files

LLVM/project 4263ea7llvm/docs AMDGPUUsage.rst, llvm/test/CodeGen/AMDGPU memory-legalizer-non-volatile.mir memory-legalizer-non-volatile.ll

Restack + comments
DeltaFile
+2-14llvm/docs/AMDGPUUsage.rst
+2-2llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
+1-1llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.mir
+5-173 files

LLVM/project 900aa4cllvm/test/CodeGen/AMDGPU memory-legalizer-private-system.ll memory-legalizer-private-wavefront.ll

Rebase
DeltaFile
+6,392-4,414llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+6,171-4,193llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
+6,158-4,156llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
+6,006-4,004llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
+6,006-4,004llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
+522-0llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+31,255-20,7713 files not shown
+31,402-20,8389 files