relayd: correct edh relayd.conf.5
The previous wording implied that omitting "params" defaulted to auto.
"edh" alone enables EDH in auto mode, while leaving the directive out
keeps EDH disabled (equivalent to no edh / edh params none).
clang/AMDGPU: Migrate cc1 tests to subarch triples (8) (#211870)
Rewrite SemaHIP cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
TableGen: Use a compact table for CPU aliases
Previously each ProcessorAlias was emitted as a full SubtargetSubTypeKV
entry in the processor subtype table, duplicating the canonical
processor's feature masks and scheduling model index. At 104 bytes per
entry: AArch64's 18 aliases added ~1.8KB, and X86 will add more as aliases
are introduced.
Emit aliases into a separate SubtargetSubTypeAliasKV table instead. Each
alias is just a name string offset plus the index of the canonical
processor it resolves to.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
X86: Use ProcessorAlias for duplicated processor names
Many X86 processors were defined multiple times under different names,
emitting an identical ProcessorModel for each spelling and duplicating
the feature masks, tune features, and scheduling model index in the subtype
table.
Define each processor once under its canonical name and express the
alternate spellings with ProcessorAlias, using the tablegen alias
mechanism. This deduplicates the redundant subtype table entries and saves
about 4.6k with the new alias table.
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
AMDGPU: Use ProcessorAlias for legacy arch names
Older targets have aliasing names which were previously implemented
by defining a second copy of the processor, identical except for the name
Use the recently improved tablegen mechanism for defining name-only aliases.
This dedupliates some redundant table entries, like the sched model.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
TableGen: Add first class support for processor aliases
Previously isCPUStringValid was virtual so TableGen could emit an
AArch64 specific hack for recognizing cpu aliases. Teach tablegen
about aliases, and insert each alias into the CPU subtype table as its
own entry (sorted by name, carrying the canonical processor's features
and scheduling model).
There is further opportunity for code sharing improvements. AArch64's
aliases are consumed by ARMTargetDefEmitter to emit a custom inc file
in TargetParser which should be universalized.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
GSteamer1: Uppdate to 1.28.5
multimedia/gstreamer1-plugins-rust is now a first-class citizen using gstreamer
tagging.
Refactor custom targets in multimedia/gstreamer1 and fix a few bugs in
generate-vuxml-entry.py.
MFH: 2026Q3
Security: 6eee35e6-fca5-4db2-ab73-f27add3e3ef1
(cherry picked from commit 703f5a47c30b7de3c5cc5a7baa98b0372d1c7449)
GSteamer1: Uppdate to 1.28.5
multimedia/gstreamer1-plugins-rust is now a first-class citizen using gstreamer
tagging.
Refactor custom targets in multimedia/gstreamer1 and fix a few bugs in
generate-vuxml-entry.py.
MFH: 2026Q3
Security: 6eee35e6-fca5-4db2-ab73-f27add3e3ef1
httpd: add custom HTTP header support
Allow httpd.conf to set/add/remove custom HTTP response headers or Suppress
existing ones. This enables httpd to add security headers, custom metadata,
or remove unwanted headers without modifying app/fastcgi code.
Three new directives are added:
header option
Manipulate HTTP response headers. Multiple header statements may
be specified. Valid options are:
set name value [always]
Set a custom HTTP response header with the specified name
and value. If a header with the same name is already
present in the response, its value will be replaced. The
header is added to successful responses (2xx and 3xx
status codes) by default.
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