LLVM/project 9da068blldb/cmake/modules LLDBConfig.cmake

[lldb] Default LLDB_ENABLE_MTE to OFF when Sanitizers are enabled. (#186884)

The MTE launcher complicates injecting the sanitizer runtime libraries.
DeltaFile
+13-9lldb/cmake/modules/LLDBConfig.cmake
+13-91 files

LLVM/project 013f254llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize epilog-vectorization-reductions.ll

[LV] Simplify and unify resume value handling for epilogue vec. (#185969)

This patch tries to drastically simplify resume value handling for the
scalar loop when vectorizing the epilogue.

It uses a simpler, uniform approach for updating all resume values in
the scalar loop:

1. Create ResumeForEpilogue recipes for all scalar resume phis in the
main loop (the epilogue plan will have exactly the same scalar resume
phis, in exactly the same order)
2. Update ::execute for ResumeForEpilogue to set the underlying value
when executing. This is not super clean, but allows easy lookup of the
generated IR value when we update the resume phis in the epilogue. Once
we connect the 2 plans together explicitly, this can be removed.
3. Use the list of ResumeForEpilogue VPInstructions from the main loop
to update the resume/bypass values from the epilogue.

This simplifies the code quite a bit, makes it more robust (should fix

    [11 lines not shown]
DeltaFile
+62-196llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+102-4llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
+95-4llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
+14-14llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
+14-14llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
+4-10llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
+291-24228 files not shown
+362-33034 files

LLVM/project 0fa9a77clang/test/CodeGen/AArch64/neon bf16-getset.c

[Clang][AArch64] Update comments in tests (nfc) (#186885)
DeltaFile
+10-2clang/test/CodeGen/AArch64/neon/bf16-getset.c
+10-21 files

LLVM/project b503da8clang/lib/CodeGen CodeGenModule.cpp

use parseTargetAttr on x86 and AIX to parse target_clones string
DeltaFile
+5-5clang/lib/CodeGen/CodeGenModule.cpp
+5-51 files

LLVM/project ddaaf4fllvm/lib/Transforms/Utils InlineFunction.cpp, llvm/test/Transforms/Inline ret_attr_nofpclass.ll ret_attr_align_and_noundef.ll

[Inliner] Fix return attribute propagation across multiple return sites (#186076)

Fixes #185159 

This patch fixes a bug in `AddReturnAttributes()` where propagated
return attributes could incorrectly leak across multiple return sites in
the callee being inlined.

`AddReturnAttributes()` walks the callee's return instructions and tries
to backward-propagate return attributes from the callsite to the
returned call when the callee directly returns a call result. However,
the propagated attribute builders were updated in-place while iterating
over return sites. As a result, attributes refined for one return site
could be reused when
processing a later return site. This is incorrect because each return
site should be handled independently, starting from the original
callsite attributes.

This patch ensures that propagated return attributes are reinitialized
for each return site, so propagation is computed independently per
returned call.
DeltaFile
+39-0llvm/test/Transforms/Inline/ret_attr_nofpclass.ll
+37-0llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
+5-3llvm/lib/Transforms/Utils/InlineFunction.cpp
+81-33 files

FreeNAS/freenas f4fc7d5src/middlewared/middlewared/alert/source quota.py, src/middlewared/middlewared/plugins sysdataset.py

NAS-140297 / 26.0.0-BETA.2 / Use truenas_os_pyutils (by anodos325) (#18472)

Several functions that were originally provided by middlewared/utils
were moved to the truenas_os_pyutils module so that they can be cleanly
consumed by python modules outside of the middleware repository without
causing odd inter-dependencies. This commit finishes up the moves by
swapping out imports at call sites and removing redundant tests.

Original PR: https://github.com/truenas/middleware/pull/18458

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+0-828tests/unit/test_atomic_replace.py
+5-294src/middlewared/middlewared/utils/mount.py
+1-187src/middlewared/middlewared/utils/io.py
+0-80tests/unit/test_io.py
+3-3src/middlewared/middlewared/alert/source/quota.py
+2-2src/middlewared/middlewared/plugins/sysdataset.py
+11-1,39426 files not shown
+38-1,42132 files

LLVM/project ffbdec6libclc/clc/lib/generic/math clc_pow_base.inc clc_pow.inc

libclc: Update pow functions

The 4 flavors of pow were originally ported from rocm
device libs between c45ec604f593fcb03d770f4398142d2446017f68,
cc5c65b2c25e0a82fbad95f0ce3bb5262e29eeee, and
fe8e00bc3c65115b2e3d2a43cf3d0d756a934a52. Update to a newer
version. Additionally expose fast variants for use by the
libcall optimizer (e.g, __pow_fast) for float types.
DeltaFile
+542-0libclc/clc/lib/generic/math/clc_pow_base.inc
+0-438libclc/clc/lib/generic/math/clc_pow.inc
+0-414libclc/clc/lib/generic/math/clc_powr.inc
+0-405libclc/clc/lib/generic/math/clc_rootn.inc
+0-402libclc/clc/lib/generic/math/clc_pown.inc
+78-0libclc/clc/lib/generic/math/clc_ep.inc
+620-1,65923 files not shown
+990-1,72629 files

FreeNAS/freenas d5ed5adsrc/freenas/usr/bin install-dev-tools

NAS-140313 / 26.0.0-BETA.2 / Add flake8 deps as well when dev tools are installed (by sonicaj) (#18471)
DeltaFile
+11-2src/freenas/usr/bin/install-dev-tools
+11-21 files

LLVM/project 45e80d9clang/lib/Sema SemaConcept.cpp, clang/test/SemaTemplate concepts.cpp

add test case and explanation for regression introduced by #183010
DeltaFile
+9-0clang/test/SemaTemplate/concepts.cpp
+6-1clang/lib/Sema/SemaConcept.cpp
+15-12 files

LLVM/project ed76cbcllvm/include/llvm/CodeGen RegisterScavenging.h, llvm/lib/Target/AArch64 AArch64FrameLowering.cpp

[AArch64] Allocate two emergency spill slots for MTE to fix register … (#186505)

…scavenger crash

When `-sanitize=memtag-stack` is enabled and the compiler optimizes
contiguous ST2Gi instructions into an MTE loop (via
`TagStoreEdit::emitLoop`), it spawns two new post-RA virtual registers
simultaneously:
1. `BaseReg`
2. `SizeReg`

Under extremely high register pressure (such as in Swift async
continuation thunks, where almost all registers are kept live), the
Register Scavenger must fall back to using emergency spill slots to
assign physical registers to `BaseReg` and `SizeReg`.

Prior to this patch, `determineCalleeSaves` assumed that a maximum of
one register would ever need to be scavenged at a time. It either
allocated a single emergency spill slot, or bypassed the allocation

    [20 lines not shown]
DeltaFile
+190-0llvm/test/CodeGen/AArch64/memtag-stg-loop-reg-pressure.mir
+28-0llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+2-0llvm/include/llvm/CodeGen/RegisterScavenging.h
+220-03 files

LLVM/project 1a85eb9clang/test/SemaTemplate concepts.cpp

Address feedback
DeltaFile
+16-2clang/test/SemaTemplate/concepts.cpp
+16-21 files

FreeBSD/src aa15df4sys/sys queue.h

queue.h: Reorder STAILQ_INSERT_TAIL

The current implementation briefly violates the tail invariant.  This
is not usually an issue, but if an insert is in flight when a panic
occurs, we may then trip the invariant while dumping core.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Sponsored by:   NetApp, Inc.
Reviewed by:    obiwac, olce, jhb
Differential Revision:  https://reviews.freebsd.org/D55819
DeltaFile
+2-1sys/sys/queue.h
+2-11 files

LLVM/project a12b612clang/test/CodeGenHLSL/resources res-array-global-unbounded.hlsl, llvm/include/llvm/Analysis DXILResource.h

[HLSL] Use 0 to represent unbounded resources (#186022)

SPIRV backend uses 0 to represent unbounded arrays. This patch makes
unbounded resources be represented with 0 when binding them, as well as
makes sure the backend uses OpTypeRuntimeArray to represent such cases.
Fix: https://github.com/llvm/llvm-project/issues/183367
DeltaFile
+29-0llvm/test/CodeGen/SPIRV/hlsl-resources/unbounded-arr.ll
+5-7llvm/lib/Analysis/DXILResource.cpp
+6-6clang/test/CodeGenHLSL/resources/res-array-global-unbounded.hlsl
+8-3llvm/include/llvm/Analysis/DXILResource.h
+2-3llvm/lib/Target/DirectX/DXILOpLowering.cpp
+4-0llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+54-1912 files not shown
+70-3518 files

LLVM/project 58ffc93llvm/lib/Transforms/InstCombine InstCombinePHI.cpp, llvm/test/Transforms/PhaseOrdering phi-protected-field-ptr.ll

Address review comments

Created using spr 1.3.6-beta.1
DeltaFile
+42-0llvm/test/Transforms/PhaseOrdering/phi-protected-field-ptr.ll
+2-4llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
+44-42 files

LLVM/project cb92017clang/lib/Sema SemaTemplateDeduction.cpp, clang/test/CXX/expr/expr.prim/expr.prim.req nested-requirement.cpp

[clang] use canonical arguments for checking function template constraints

This is a partial revert of #161671, restoring the original behaviour
where the canonical template arguments are used for function template
constraint checking in diagnostics.

This reverts the fix from #183010, which attempted to fix #182344
but it causes regressions. These regressions now have test cases included.

The attempt at #183010 is flawed because in the general case we can't
check satisfaction for constraints which have unsubstituted template arguments,
even if they don't affect the canonical type (ie they are purely syntactical),
because these types can still turn out to be invalid after substitution.

This is a problem when directly evaluating a concept specialization, but
it's not a problem with other template specializations because the as-written
types are preserved, and will be later substituted, and any failures here will
cause the program to be ill-formed anyway.


    [13 lines not shown]
DeltaFile
+4-4clang/test/SemaCXX/cxx2b-deducing-this.cpp
+3-4clang/lib/Sema/SemaTemplateDeduction.cpp
+2-2clang/test/SemaTemplate/concepts-recursive-inst.cpp
+1-1clang/test/CXX/expr/expr.prim/expr.prim.req/nested-requirement.cpp
+10-114 files

LLVM/project 297d52bllvm/lib/Target/AVR AVRExpandPseudoInsts.cpp, llvm/test/CodeGen/AVR return.ll

[AVR] Improve expansion of pseudo instruction SPREAD (#186780)

It would be better to set the higher register to zero for devices
without `SPH`.
DeltaFile
+18-12llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+28-0llvm/test/CodeGen/AVR/pseudo/SPREAD.mir
+7-7llvm/test/CodeGen/AVR/calling-conv/c/tiny.ll
+4-4llvm/test/CodeGen/AVR/return.ll
+1-1llvm/test/CodeGen/AVR/pseudo/SPWRITE.mir
+58-245 files

LLVM/project 81841b7clang/include/clang/Options Options.td

[Clang][Docs] Discontinue documenting the GCC -I- and --include-barrier options. (#184941)

Clang has never implemented the GCC `-I-` and `--include-barrier`
options. An error is issued if they are used. GCC deprecated these
options in GCC 4. Advertising their availability in documentation and
help text is misleading.
DeltaFile
+2-2clang/include/clang/Options/Options.td
+2-21 files

LLVM/project d30e680llvm/lib/Transforms/Scalar SeparateConstOffsetFromGEP.cpp

[LLVM] [SeparateConstOffsetFromGEP] patch PR 183402 to handle negative C correctly (#186858)

Small typo in negative C threshold calculation would result in a
threshold that is too conservative due to overflow.
DeltaFile
+1-1llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
+1-11 files

NetBSD/src Rrg6JvKtests/usr.bin/xlint/lint1 c11_generic_expression.c, usr.bin/xlint/lint1 cgram.y

   lint: don't evaluate the controlling expression of a _Generic expression
VersionDeltaFile
1.537+10-7usr.bin/xlint/lint1/cgram.y
1.25+2-5tests/usr.bin/xlint/lint1/c11_generic_expression.c
+12-122 files

LLVM/project c953411llvm/lib/Target/PowerPC PPCRegisterInfo.td PPCRegisterClasses.td, llvm/lib/Target/PowerPC/AsmParser PPCAsmParser.cpp

[PowerPC][NFC] Refactor Register class and operand definitons (#185647)

Created a comprehensive base class system in PPCRegisterClasses.td to
eliminate repetitive RegisterOperand definitions across PowerPC register
files and introduced PPCRegOperand multiclass in to automatically
generate AsmOperandClass and RegisterOperand definitions, eliminating
~50 lines of boilerplate.

Asissted by AI.
DeltaFile
+114-305llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+101-0llvm/lib/Target/PowerPC/PPCRegisterClasses.td
+47-42llvm/lib/Target/PowerPC/PPCRegisterInfoMMA.td
+26-23llvm/lib/Target/PowerPC/PPCRegisterInfoDMR.td
+4-4llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+1-0llvm/lib/Target/PowerPC/PPCInstrInfo.td
+293-3746 files

LLVM/project ff4cccbclang/lib/Format BreakableToken.cpp, clang/unittests/Format FormatTest.cpp

[clang-format] Fix a bug in indenting lambda comments with only tabs (#186862)

Fixes #175151
DeltaFile
+35-33clang/lib/Format/BreakableToken.cpp
+10-0clang/unittests/Format/FormatTest.cpp
+45-332 files

LLVM/project 6655312.github/workflows libc-fullbuild-tests.yml

[libc] Build fuzzing tests in pre-merge CI tests (#185018)

At the moment, no CI job tests whether the fuzzing tests build
correctly.

This patch adds the build of fuzzing tests to the pre-merge CI job.

Only two configurations have it enabled for now. The none-eabi
configurations seemingly do not support it because in their cmake
configs compiler-rt is not enabled, hence libFuzzer isn't built. I did
not dig too much to understand why that is, preferring to just leave it
disabled for these configurations. For the remaining ones that seem to
support it, I selected one x86 and one aarch64.

In addition, it removes one outdated comment about the build type used
and changes the action to run on all branches, not only on PRs that
target main.

If we limit it to run only on PRs to the main branch, it will not run on
stacked PRs. I believe it is also okay to run it on PRs to release
branches. Therefore it is just easier to remove the limit altogether.
DeltaFile
+26-7.github/workflows/libc-fullbuild-tests.yml
+26-71 files

LLVM/project 8fa7660llvm/lib/Target/SPIRV SPIRVGlobalRegistry.cpp, llvm/test/CodeGen/SPIRV single-element-vector-nested-aggregate.ll

[SPIR-V] Fix scalarization of 1-element vector (#185529)

Previous patch #180735 didn't handle 1-element vectors nested in
aggregates.
DeltaFile
+129-0llvm/test/CodeGen/SPIRV/single-element-vector-nested-aggregate.ll
+8-0llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+137-02 files

FreeNAS/freenas 32dcfc4src/freenas/etc/systemd/system/nfs-idmapd.service.d override.conf, src/freenas/etc/systemd/system/nfs-mountd.service.d override.conf

Disable systemd rate-limiting for NFS-related services
DeltaFile
+5-0src/freenas/etc/systemd/system/nfs-idmapd.service.d/override.conf
+5-0src/freenas/etc/systemd/system/nfs-mountd.service.d/override.conf
+5-0src/freenas/etc/systemd/system/rpc-statd.service.d/override.conf
+5-0src/freenas/etc/systemd/system/rpcbind.service.d/override.conf
+4-0src/freenas/etc/systemd/system/nfs-server.service.d/override.conf
+24-05 files

FreeNAS/freenas c7c50e0src/middlewared/middlewared/migration 0009_system_global_id.py

Generate nfs.conf after system global ID creation on first boot
DeltaFile
+7-0src/middlewared/middlewared/migration/0009_system_global_id.py
+7-01 files

OpenBSD/src PoqrhXElib/libc/sys unveil.2

   clarify unveil usage
   with job
VersionDeltaFile
1.23+9-9lib/libc/sys/unveil.2
+9-91 files

OpenBSD/ports sx99Lmpdevel/py-python-discovery/pkg PLIST DESCR

   Add pkg/* directory and files
VersionDeltaFile
1.1+44-0devel/py-python-discovery/pkg/PLIST
1.1+4-0devel/py-python-discovery/pkg/DESCR
+48-02 files

FreeBSD/ports 78e7496net/dhcpcd distinfo Makefile, net/dhcpcd/files patch-src_privsep-root.c

net/dhcpcd: update to 10.3.1

Changes:        https://github.com/NetworkConfiguration/dhcpcd/releases/tag/v10.3.1
DeltaFile
+0-84net/dhcpcd/files/patch-src_privsep-root.c
+3-3net/dhcpcd/distinfo
+1-2net/dhcpcd/Makefile
+4-893 files

Illumos/gate 80989e5usr/src/head libintl.h, usr/src/lib/libipsecutil/common ipsec_util.c

17960 want format_arg attribute
Reviewed by: Robert Mustacchi <rm+illumos at fingolfin.org>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+9-7usr/src/head/libintl.h
+3-2usr/src/lib/libipsecutil/common/ipsec_util.c
+4-0usr/src/uts/common/sys/ccompile.h
+16-93 files

LLVM/project 52cd109clang/lib/Format UnwrappedLineParser.cpp, clang/unittests/Format FormatTest.cpp

[clang-format] Identify include guard #endif followed by comments (#186848)

Fixes #176321
DeltaFile
+10-6clang/lib/Format/UnwrappedLineParser.cpp
+7-0clang/unittests/Format/FormatTest.cpp
+17-62 files