[Offload][Omp] Get device image through liboffload (#239252)
Add a new `olGetProgramInfo` API to retrieve information about a
`ol_program` and add properties to get the Device Image after loading.
Move the handling of `ImageIR` directly to libomptarget (only used for
Record Replay).
Use the new API to remove the helper calls and references to the
`DeviceImageTy` from the Plugin interface.
Assisted by Claude.
[mlir][SPIR-V] Derive Aligned memory operand for PhysicalStorageBuffer in vector.load/store coop matrix lowering (#239293)
Mirror calculateMemoryRequirements from MemRefToSPIRV.cpp, since
PhysicalStorageBuffer pointers carry no implicit alignment guarantee
Continuation of https://github.com/llvm/llvm-project/pull/214200
[GlobalISel] Support fixed vectors in constant-fold combines. (#220876)
This patch Extend the GlobalISel constant-folding combines to
element-wise fold **fixed vectors**, in addition to scalars. Previously
these rules only fired when the operands were scalar constants; a
`G_BUILD_VECTOR` of constants was left un-folded.
This covers all five families:
- Integer/pointer binops (`constant_fold_binop`)
- FP binops (`constant_fold_fp_binop`)
- FMA (`constant_fold_fma`)
- Integer casts — `G_ZEXT`/`G_SEXT`/`G_ANYEXT` (`constant_fold_cast_op`)
- FP unary ops — `G_FNEG`, `G_FABS`, `G_FSQRT`, `G_FLOG2`, `G_FPEXT`,
`G_FPTRUNC`, `G_FCEIL`, `G_FFLOOR`, `G_INTRINSIC_TRUNC/ROUND/ROUNDEVEN`,
`G_FRINT`, `G_FNEARBYINT` (`constant_fold_unary_fp_op_rule`)
This is a pre-requisite to support scalar/vector Ops constant foldings
for GISel MIR-pattern rules.
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[SPIR-V] Use MapVector for per function maps (#239349)
Iterating a DenseMap keyed by Function pointers made the order of
FPFastMathDefault execution modes and their constants may vary between
runs with SPV_KHR_float_controls2
[libc++][docs] Introduce `Experimental` Implementation Status (#235526)
Resolves #234320
Introduces a new |Experimental| tag in which to mark experimental paper
implementations.
This also marks `optional::iterator`, `chrono::tzdb` (and related items)
and `<syncstream>` implementations as experimental based on the testing
`params.py`.
PSTL is deliberately left alone as I understand it is still in active
development.
[AMDGPU] Update src2 live range when converting WMMA to three-address form (#239283)
Since #225174, `LiveIntervals` is computed before the two-address
instruction pass. A two-address WMMA ties `src2` to an early-clobber
`vdst`, so if `src2` dies at the WMMA, its live range ends at the
early-clobber slot. When the pass converts the WMMA to the three-address
form, `src2` is no longer tied and is read at the register slot, but
`SIInstrInfo::convertToThreeAddress` only updates the live range of the
def. The machine verifier then reports "Live segment ending at early
clobber slot must be redefined by an EC def in the same instruction".
This PR moves the end of such a segment to the register slot, for the
main range and the subranges.
Fixes LCOMPILER-3197.
[NFC][tests] compare-flags.ll: replace `sed -E` with Python one-liner
Addresses CI failure on AIX where `sed -E` is unsupported.
Avoids using two POSIX BREs per flag with plain `sed`.
[AMDGPU] Mark V_LSHL_ADD_U64 rematerializable (#238114)
V_LSHL_ADD_U64 has no side effects, so it can be rematerialized. _U32
version is already marked so.
Add a MIR test for gfx950 and gfx1250 covering rematerializing.
Assisted-by: Claude Sonnet 5.5
[GVNHoist] call patchReplacementInstruction in rauw
In Replace all User With function, we actually need to relax flag for
hoisting. In one miscompilation bug we have (see:
https://github.com/llvm/llvm-project/issues/236581). We actually need
dropPoisonGeneratingFlags.
After taking a look at patchReplacementInstruction, we actually need
callsite relaxation also.
As a result, we make rauw call this function directly. The only
difference is that Hoisting actually move the instruction so we cannot
set combineMetadataForCSE to true. We add a parameter to pass the
value and set the value to false by default.
Assisted-by: Claude # Test
[AMDGPU] Update src2 live range when converting WMMA to three-address form
Since #225174, `LiveIntervals` is computed before the two-address instruction
pass. A two-address WMMA ties `src2` to an early-clobber `vdst`, so if `src2`
dies at the WMMA, its live range ends at the early-clobber slot. When the pass
converts the WMMA to the three-address form, `src2` is no longer tied and is
read at the register slot, but `SIInstrInfo::convertToThreeAddress` only updates
the live range of the def. The machine verifier then reports "Live segment
ending at early clobber slot must be redefined by an EC def in the same
instruction".
This PR moves the end of such a segment to the register slot, for the main range
and the subranges.
Fixes LCOMPILER-3197.
[orc-rt] Replace 'sps_ci' namespace with nested 'sps::ci'. (#239464)
Not all SPS-based utilities are CI (Controller Interface). To reflect
this, this commit breaks the `sps_ci` namespace up into an `sps`
namespace (to be shared between all code that depends on SPS), and a
nested `sps::ci` namespace for CI code that depends on SPS.
[X86] Enable SlotIndexes compaction by default
Compacting SlotIndexes before greedy allocation drops the entries of
erased instructions, so live range sizes and instruction distances
reflect the code being allocated rather than how much was erased
before it. AMDGPU has done this since #235806; do the same for X86.
Codegen changes only through allocation: no new crashes, verifier
errors or allocation failures in the lit suites, including
EXPENSIVE_CHECKS, and a stage-2 build of LLVM, clang and lld with
-verify-machineinstrs passes its own tests. On llvm-test-suite at -O3,
spills drop 0.3% and .text 0.06%, with compile time unchanged.
Most test updates are regenerated checks. misched-matmul now inserts
20 spills instead of 24. live-debug-vars-stale-slotindexes.mir gets
one more use of %27 so that accumulate_fit still reaches the stale
index path it was written for.
[lldb] Correct Symbol's ctor from another Symbol (#239381)
As I was working on another issue with Claude, it happened to see this
discrepency but it wasn't directly relevant to the work I was doing
there, so I'm handling it separately.
Symbol::operator= initializes m_size_is_synthesized of the lhs object to
the value of the rhs side's ivar.
But Symbol::Symbol(const Symbol &rhs) does not copy this ivar, it
initializes it to false. Likely someone copied the basic constructor's
init list and missed this variable.
[orc-rt] Identify controller handlers by tag address (#239462)
orc_rt_ControllerHandlerTag was a void * whose value was passed to the
controller, but tags are meant to be global variables whose *address*
identifies the handler. Passing a tag variable's value instead would
silently pass the same (zero) value for every tag.
This commit makes orc_rt_ControllerHandlerTag a one-byte struct, moves
it into its own header (orc-rt-c/bedrock/ControllerHandlerTag.h), and
changes all APIs to take tags by pointer. Passing a tag by value is now
a compile error.
Tags must have distinct addresses, so:
- The struct is non-empty (an empty struct is a GNU extension in C, with
size 0, so distinct tags could share an address).
- Tags must not be const: the linker may fold identical read-only data
(e.g. under identical code folding). APIs take tags by non-const
pointer, so passing a const tag is an error in C++ and a warning in C.
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Attributor: Check for assume knowledge once per attribute query
hasAttr and getAttrs looked for assume knowledge separately for each
queried attribute kind, but most modules have none.
CTMark instructions:u with -attributor-enable=light changes by O3
-0.13%, ThinLTO -0.10%. The attributor-light pass itself is 1.6-4.1%
faster (callgrind), and 0.6-1.7% faster with the other pending
Attributor compile-time changes applied.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[libc++] Adapt the LNT tooling to the new format of GET /series (#239352)
LNT's GET /series endpoint now accepts several metrics at a time, which
changes slightly its output format. Update the scripts to account for
that.
Assisted by Claude
misc/crush: Update to 0.100.0
While here, remove DISABLE_COMMAND_BLOCKING option.
Upstream has introduced "sysadmin mode" in which crush can run any
command, which is essentially equivalent to
DISABLE_COMMAND_BLOCKING. In addition, the upstream has also
introduced "permission" command with which you can configure which
commands are dangerous to your system.
Changelog: https://github.com/charmbracelet/crush/releases/tag/v0.100.0
Reported by: GitHub (watch releases)
