LLVM/project cd08ff0llvm/test/CodeGen/AArch64/GlobalISel knownbits-add.mir knownbits-fshl-fshr.mir

[AArch64][GlobalISel] Regenerate knownbits tests. NFC (#220200)

Mostly just adding IsKnownNeverZero. knownbits-srem.mir now has auto
generated check lines.
DeltaFile
+463-463llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+101-101llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
+101-101llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
+97-97llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
+95-95llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
+80-80llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
+937-93732 files not shown
+1,857-1,87138 files

OPNSense/core 80e403esrc/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Only normalize when changing away from pass, as we don't know the intention when switching back to pass
DeltaFile
+1-3src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+1-31 files

FreeBSD/ports 6cb4074math/scilab-toolbox-swt pkg-plist distinfo

math/scilab-toolbox-swt: 0.3.3

Update to release of January 9, 2025.
https://atoms.scilab.org/toolboxes/swt/0.3.3

Postponed expiration as upstream seems active and math/scilab was undeprecated.
But as nobody noticed when the port was broken I doubt we have any users of this.
If you use this, please speak up and mail the maintainer.

Depend on fortran to fix: (fortran was indirectly pulled in by the dependency on math/scilab)
====> Running Q/A tests (stage-qa)
Error: /usr/local/share/scilab/contrib/swt/sci_gateway/c/libswt_c.so is linked to /usr/local/lib/gcc14/libgfortran.so.5 from lang/gcc14 but it is not declared as a dependency
Error: /usr/local/share/scilab/contrib/swt/sci_gateway/c/libswt_c.so is linked to /usr/local/lib/gcc14/libquadmath.so.0 from lang/gcc14 but it is not declared as a dependency

Remove REINPLACE_CMD for:
====> Running Q/A tests (stage-qa)
Warning: Possible REINPLACE_CMD issues:
- - REINPLACE_CMD ran, but did not modify file contents: sci_gateway/c/swt_common.h

Approved by:    no maintainer
DeltaFile
+5-10math/scilab-toolbox-swt/Makefile
+3-3math/scilab-toolbox-swt/distinfo
+0-1math/scilab-toolbox-swt/pkg-plist
+8-143 files

LLVM/project b0a9909llvm/lib/Transforms/Vectorize VPlan.h VPlanUtils.cpp, llvm/test/Transforms/LoopVectorize runtime-checks-difference.ll nested-loops-scev-expansion.ll

[VPlan] Expand AddRecs in Plan's entry (#209921)

Extend VPSCEVExpander to expand AddRecs in the Plan's entry. In the
general case, an AddRec's loop header refers to a BasicBlock that is no
longer in the Plan, and we have to fall back to the IR SCEV expander.
However, when the Plan's entry has a canonical IV that we can re-use as
a VPIRPhi, expand the AddRec to VPInstructions.
DeltaFile
+50-9llvm/test/Transforms/LoopVectorize/VPlan/expand-scev.ll
+33-6llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+1-2llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+1-2llvm/test/Transforms/LoopVectorize/nested-loops-scev-expansion.ll
+1-1llvm/lib/Transforms/Vectorize/VPlan.h
+86-205 files

LLVM/project 7a98322llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp, llvm/test/CodeGen/SPIRV/debug-info debug-scope-same-line.ll debug-scope-block.ll

Add support for NSDI DebugScope, DebugNoScope and DebugInlinedAt
DeltaFile
+127-18llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+83-0llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at-recursive.ll
+68-0llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
+67-0llvm/test/CodeGen/SPIRV/debug-info/debug-scope.ll
+66-0llvm/test/CodeGen/SPIRV/debug-info/debug-scope-block.ll
+63-0llvm/test/CodeGen/SPIRV/debug-info/debug-scope-same-line.ll
+474-1815 files not shown
+658-2121 files

LLVM/project 7fc91d9llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.h SPIRVNonSemanticDebugHandler.cpp, llvm/test/CodeGen/SPIRV/debug-info debug-typedef-namespace-scope.ll debug-lexical-block-namespace.ll

Add support for DebugLexicalBlock. (#217965)

Emit
[DebugLexicalBlock](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugLexicalBlock)
for LLVM DILexicalBlock and DINamespace.

This also lets module-scope debug entities (globals, typedefs,
functions, composites) reference a lexical parent instead of always
choosing the compilation unit.

Summary of changes:

1. Collect DILexicalBlock / DINamespace and keep track of their relative
order for later emission.
2. Emit namespace scopes as DebugLexicalBlock before DebugFunction so
namespace-scoped functions and globals can use them as Parent.
3. Emit IR-function-body DILexicalBlock scopes as DebugLexicalBlock
after DebugFunction so these DebugLexicalBlock can properly reference
their parents.
4. Update the already-existing parent scope handling in other opcodes to
use the new data available.
DeltaFile
+120-5llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+61-0llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block.ll
+51-0llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block-namespace-in-block.ll
+48-0llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block-namespace.ll
+31-0llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+26-0llvm/test/CodeGen/SPIRV/debug-info/debug-typedef-namespace-scope.ll
+337-52 files not shown
+355-158 files

LLVM/project af6ae63clang/lib/StaticAnalyzer/Checkers StdLibraryFunctionsChecker.cpp, clang/test/Analysis stdlibraryfunction-darwin.c

[clang][analyzer] Fix false positive in StdLibraryFunctionsChecker for mmap with MAP_ANON (#219568)

On Darwin,`mmap(2)` acccepts a Mach VM tag encoded in the fd argument
when `MAP_ANON` is set; the encoding is done using `VM_MAKE_TAG(tag)`,
which expands to `(tag << 24)` and is therefore a large negative signed
value for tags >= 128.

This causes a false positive with the existing constraint, which
restricts `fd` to be >= 1, when code uses a `VM_MAKE_TAG` value as the
`fd` argument. The fix here is to eliminate the false positive by
omitting the `fd` constraint on Darwin targets, because it can't be
expressed as a simple range. This does give rise to false negatives (any
`fd` < -1 on Darwin when `MAP_ANON` is not set), but any code with such
a false negative would crash immediately when trying to use the invalid
file descriptor, rather than exhibiting some more subtle dangerous
behavior.

AI disclosure: I used Claude Sonnet 4.6 to help diagnose the original
false positive and suggest possible fixes.

rdar://185124909
DeltaFile
+31-0clang/test/Analysis/stdlibraryfunction-darwin.c
+21-7clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
+52-72 files

LLVM/project 9139bffclang/lib/CIR/CodeGen CIRGenModule.cpp, clang/test/CIR/CodeGenCUDA template-class-static-member.cu

[CIR][CUDA/HIP] Fix template static member filtering (#219536)

Check host/device attributes before emitting static member of template
instantiation. This is basically a CIR version of
77fd30f7ce0795b4bbc22e65b3ff42856839d708 .
DeltaFile
+79-0clang/test/CIR/CodeGenCUDA/template-class-static-member.cu
+2-1clang/lib/CIR/CodeGen/CIRGenModule.cpp
+81-12 files

LLVM/project 1954606lldb/include/lldb/Utility Locked.h, lldb/unittests/Utility LockedTest.cpp

[lldb] Add Guarded<T, Mutex> to Locked.h

LLDB's code base has many variables that have an associated mutex that
needs to be locked to safely access that variable from multiple
threads. However, this locking scheme is currently not enforced by the
compiler and code sometimes accesses these variables without aquiring
the respective mutex first.

This patch introduces a `Guarded` class that strictly enforces that
some memory is only accessed after the respective mutex has been
aquired. This class hands out `Locked` objects for every access which
guarentee that the mutex is held as long as the variable is in scope.
DeltaFile
+37-0lldb/unittests/Utility/LockedTest.cpp
+28-0lldb/include/lldb/Utility/Locked.h
+65-02 files

LLVM/project 6a65e58clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGenHIP amdgcn-buffer-rsrc-type.hip

[CIR] Support direct-in-registers aggregates and array coercions in call-conv lowering
DeltaFile
+22-0clang/test/CIR/Transforms/abi-lowering/amdgpu-scalars.cir
+14-3clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+2-5clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
+38-83 files

LLVM/project 9225cf4lldb/include/lldb/Utility Locked.h, lldb/source/Plugins/LanguageRuntime/CPlusPlus CPPLanguageRuntime.h CPPLanguageRuntime.cpp

Revert "[lldb] Use Guarded in CPPLanguageRuntime" (#220201)

Reverts llvm/llvm-project#219428

This was merged by accident and the parent PR should have been merged.
DeltaFile
+0-37lldb/unittests/Utility/LockedTest.cpp
+0-28lldb/include/lldb/Utility/Locked.h
+5-4lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
+2-3lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
+7-724 files

LLVM/project 946fa18llvm/lib/IR Verifier.cpp, llvm/test/Verifier DILocalScope-cycle.ll DILocation-atomgroup-cycle.ll

[Verifier] Reject cyclic DIScope parent chains (#217997)

A DIScope parent chain must be acyclic. Diagnose cycles so later walks
of getScope() cannot loop.

One of the proposed tests triggers an infinite loop in the verifier:
https://godbolt.org/z/Toz9jeqc9
DeltaFile
+76-4llvm/lib/IR/Verifier.cpp
+33-0llvm/test/Verifier/DISubprogram-retained-node-cycle.ll
+32-0llvm/test/Verifier/DIScope-cycle.ll
+30-0llvm/test/Verifier/DILocation-atomgroup-cycle.ll
+30-0llvm/test/Verifier/dbg-record-scope-cycle.ll
+27-0llvm/test/Verifier/DILocalScope-cycle.ll
+228-42 files not shown
+231-78 files

LLVM/project cf584bdllvm/lib/Target/Sparc SparcAsmPrinter.cpp, llvm/test/CodeGen/SPARC inlineasm-global-memory.ll

[SPARC] Preserve inline asm relocation modifiers (#219971)

Make sure that inline assembly that references a global symbol gets the
correct relocation.

sethi %hi(fsr_storage), %i0
st %fsr, [%i0+fsr_storage]
ld [%i0+fsr_storage], %i0
-->
sethi %hi(fsr_storage), %i0
st %fsr, [%i0+%lo(fsr_storage)]
ld [%i0+%lo(fsr_storage)], %i0
DeltaFile
+14-0llvm/test/CodeGen/SPARC/inlineasm-global-memory.ll
+12-0llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
+26-02 files

LLVM/project 7e2b018llvm/test/CodeGen/SPIRV/debug-info debug-typedef-namespace-scope.ll debug-lexical-block-namespace-in-block.ll

Merge branch 'users/mgcarrasco/nsdi-debug-lexical-scope' into users/jmmartinez/nsdi-debug-lexical-scope-nfc-0
DeltaFile
+51-0llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block-namespace-in-block.ll
+26-0llvm/test/CodeGen/SPIRV/debug-info/debug-typedef-namespace-scope.ll
+77-02 files

OPNSense/core 2820c60src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Add a small js change handler for non pass rules to remove or change unsupported combinations
DeltaFile
+17-0src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+17-01 files

OPNSense/core e864acbsrc/opnsense/www/js opnsense_ui.js

ui: reduce diff
DeltaFile
+23-47src/opnsense/www/js/opnsense_ui.js
+23-471 files

OPNSense/core 3afc33csrc/opnsense/mvc/app/models/OPNsense/Firewall Filter.php

Remove specific match validations since backend already normalizes or disables invalid state types or route-to gateway rules
DeltaFile
+9-46src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.php
+9-461 files

LLVM/project 3c82a13clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGenHIP amdgcn-buffer-rsrc-type.hip

[CIR] Support direct-in-registers aggregates and array coercions in call-conv lowering
DeltaFile
+23-0clang/test/CIR/Transforms/abi-lowering/amdgpu-scalars.cir
+15-4clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+2-5clang/test/CIR/CodeGenHIP/amdgcn-buffer-rsrc-type.hip
+40-93 files

FreeBSD/ports 07fcd55net-im/signal-desktop Makefile, textproc/obsidian Makefile

*/*: Bump port revision after electron43 update (6d42f1e2f558)
DeltaFile
+1-1textproc/obsidian/Makefile
+1-0net-im/signal-desktop/Makefile
+2-12 files

FreeBSD/ports 6d42f1edevel/electron43 Makefile distinfo, devel/electron43/files patch-electron_spec_api-browser-window-spec.ts patch-electron_shell_app_electron__main__delegate.cc

devel/electron43: Update to 43.5.0

Changelog: https://github.com/electron/electron/releases/tag/v43.5.0

Reported by:    GitHub (watch releases)
DeltaFile
+28-19devel/electron43/files/patch-electron_spec_api-app-spec.ts
+18-19devel/electron43/files/patch-electron_shell_browser_electron__browser__main__parts.cc
+15-15devel/electron43/distinfo
+17-8devel/electron43/files/patch-electron_shell_app_electron__main__delegate.cc
+10-10devel/electron43/files/patch-electron_spec_api-browser-window-spec.ts
+13-5devel/electron43/Makefile
+101-7630 files not shown
+205-17136 files

FreeBSD/ports 71b0420www/py-google-api-python-client Makefile distinfo

www/py-google-api-python-client: Update to 2.200.0

ChangeLog:

1. https://github.com/googleapis/google-api-python-client/releases/tag/v2.200.0

Reported by:    "release-please[bot]" <notifications at github.com>
DeltaFile
+3-3www/py-google-api-python-client/distinfo
+2-2www/py-google-api-python-client/Makefile
+5-52 files

OPNSense/core 7952627src/opnsense/mvc/app/models/OPNsense/Firewall Filter.php

Remove specific match validations since backend already normalizes or disables invalid state types or route-to gateway rules
DeltaFile
+20-44src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.php
+20-441 files

OPNSense/core c73ba38src/opnsense/mvc/app/views/layout_partials base_dialog.volt, src/opnsense/mvc/app/views/layouts default.volt

ui: implement dialog search field
DeltaFile
+119-0src/opnsense/www/js/opnsense_ui.js
+7-2src/opnsense/mvc/app/views/layout_partials/base_dialog.volt
+1-0src/opnsense/mvc/app/views/layouts/default.volt
+127-23 files

FreeBSD/src 12c799esys/dev/ice ice_drv_info.h

ice(4): Add two more 4-part IDs for E835 adapters

Two additional subdevice IDs were introduced
to distinguish between adapters with and without
manageability over USB support.

Signed-off-by: Krzysztof Galazka <krzysztof.galazka at intel.com>

Reviewed by:    erj
Tested by:      Mateusz Moga <mateusz.moga at intel.com>
Sponsored by:   Intel Corporation
Differential Revision:  https://reviews.freebsd.org/D57337

(cherry picked from commit f370d9e4d5844daa06d77e57236e03bd7c5f4ba1)
DeltaFile
+6-0sys/dev/ice/ice_drv_info.h
+6-01 files

FreeBSD/src e0954f7sys/dev/ixgbe if_ix.c

ix(4): Sanitize negative error codes

Due to development history FreeBSD driver error codes are reported
the same way as in Linux (as negatives) which is inconsistent
with FreeBSD standard. It may cause unexpected behavior when driver
errors are interpreted by a kernel as syscall handler return values.
This patch converts error codes from negative to positive values for
NVM access functions.

Signed-off-by: Pawel Sobczyk <pawel.sobczyk at intel.com>

Reviewed by:    kbowling, erj, milosz.linkiewicz_intel.com
Tested by:      Mateusz Moga <mateusz.moga at intel.com>
Sponsored by:   Intel Corporation
Differential Revision:  https://reviews.freebsd.org/D57642

(cherry picked from commit 33e2eac3e3e738daa95a06f42d6c661b87ad9aac)
DeltaFile
+19-4sys/dev/ixgbe/if_ix.c
+19-41 files

FreeBSD/src 05ef239sys/dev/ixgbe ixgbe_e610.c

ix(4): Remove workaround for 2.5/5G speeds on E610

The problem observed on X550 adapters with 2.5 and 5 Gbps speeds
negotiation on some switches is not affecting E610 adapters.
Remove workaround, which omitted those speeds in the list
of initially advertised speeds and advertise all speeds
supported by adapter.

Signed-off-by: Krzysztof Galazka <krzysztof.galazka at intel.com>

Reviewed by:    kbowling
Tested by:      Mateusz Moga <mateusz.moga at intel.com>
Sponsored by:   Intel Corporation
Differential Revision:  https://reviews.freebsd.org/D57339

(cherry picked from commit 62d5d119ee7d935ac05966f1c7c4333c33c4f3a9)
DeltaFile
+12-23sys/dev/ixgbe/ixgbe_e610.c
+12-231 files

LLVM/project 7370cbellvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/AMDGPU store-atomic-flat.ll load-atomic-flat.ll

[CodeGen][AMDGPU] Allow elementwise atomic load/store at element alignment
DeltaFile
+120-0llvm/test/CodeGen/AMDGPU/load-atomic-global.ll
+72-0llvm/test/CodeGen/AMDGPU/store-atomic-global.ll
+36-5llvm/lib/CodeGen/AtomicExpandPass.cpp
+40-0llvm/test/CodeGen/AMDGPU/load-atomic-flat.ll
+37-0llvm/test/Transforms/AtomicExpand/AMDGPU/unaligned-atomic.ll
+24-0llvm/test/CodeGen/AMDGPU/store-atomic-flat.ll
+329-54 files not shown
+365-1210 files

LLVM/project e982316llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

[CodeGen] Pass alignment and size to isAtomicAlignmentSupported. NFC (#216621)

Replace `supportsUnalignedAtomics()` with
`isAtomicAlignmentSupported()`, passing the
access alignment and size as target independent properties.

Move the natural alignment check into the default implementation of the
new
hook. The default behavior remains unchanged: targets that enable
SupportsUnalignedAtomics accept any alignment, while other targets
require the
access to be naturally aligned.
DeltaFile
+8-2llvm/include/llvm/CodeGen/TargetLowering.h
+2-4llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+10-62 files

LLVM/project c0c24bflldb/include/lldb/Utility Locked.h, lldb/source/Plugins/LanguageRuntime/CPlusPlus CPPLanguageRuntime.h CPPLanguageRuntime.cpp

Revert "[lldb] Use Guarded in CPPLanguageRuntime (#219428)"

This reverts commit 579d7295a9ca6e16d7d1019f7c56387f0e36095a.
DeltaFile
+0-37lldb/unittests/Utility/LockedTest.cpp
+0-28lldb/include/lldb/Utility/Locked.h
+5-4lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
+2-3lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
+7-724 files

LLVM/project 579d729lldb/include/lldb/Utility Locked.h, lldb/source/Plugins/LanguageRuntime/CPlusPlus CPPLanguageRuntime.h CPPLanguageRuntime.cpp

[lldb] Use Guarded in CPPLanguageRuntime (#219428)

Use Guarded to make sure m_vtable_info_map cannot be accesses without
locking the respective lock.
DeltaFile
+37-0lldb/unittests/Utility/LockedTest.cpp
+28-0lldb/include/lldb/Utility/Locked.h
+4-5lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
+3-2lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
+72-74 files