[OptBisect] Merge shouldRun logic of -opt-bisect and -opt-disable (#177122)
Hi everyone,
After the introduction of `-opt-disable` in,
one of its main limitations has been that it cannot be used together
with `-opt-bisect`, since `getGlobalPassGate()` returns either
`getOptDisabler()` or `getOptBisector()`, but not both. Allowing them to
work simultaneously would be useful for disabling individual passes
while still restricting the pipeline. This is especially relevant given
the recent updates to `-opt-bisect`, such as interval support.
For example, when a defect is caused by a particular pass but its impact
is masked by another, it can be difficult to identify the actual culprit
through bisecting alone. Being able to disable passes individually while
using `-opt-bisect` would make this process much more efficient.
In this PR, I have merged the logic of the two flags so that they can
interoperate. Specifically:
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[AMDGPU][AsmParser] Forbid Fake16 instructions in Real16 mode (#176934)
We don't need to support both simultaneously in tests now that all
True16 instructions are supported.
[IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (#174693)
Following on from #170796, this PR implements the second part of
https://discourse.llvm.org/t/rfc-allow-non-constant-offsets-in-llvm-vector-splice/88974
by allowing non-constant offsets in the vector splice intrinsics.
Previously @llvm.vector.splice had a restriction enforced by the
verifier that the offset had to be known to be within the range of the
vector at compile time. Because we can't enforce this with non-constant
offsets, it's been relaxed so that offsets that would slide the vector
out of bounds return a poison value, similar to
insertelement/extractelement.
@llvm.vector.splice.left also previously only allowed offsets within the
range 0 <= Offset < N, but this has been relaxed to 0 <= Offset <= N so
that it's consistent with @llvm.vector.splice.right.
In lieu of the verifier checks that were removed, InstSimplify has been
taught to fold splices to poison when the offset is out of bounds.
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IR: Add !nofpclass metadata
This adds the analagous metadata to the nofpclass attribute
to assert values are not a certain set of floating-point classes.
This allows the same information to be expressed if a function
argument is passed indirectly. This matches the bitmask encoding
of nofpclass.
I also think this should be allowed for stores to symmetrically handle
sret, but leave that for later.
Alternatively we could add a more expressive !fprange metadata,
but that would be much more complex. It's useful to match the attribute,
and more annotations can always be added.
Fixes #133560
biology/gkl: pin to jdk 8 and 11
Error on jdk17+:
Could NOT find JNI (missing: JAVA_INCLUDE_PATH JAVA_INCLUDE_PATH2 AWT JVM)
...
CMake Error: The following variables are used in this project, but they are set to NOTFOUND.
Please set them or make sure they are set and tested correctly in the CMake files:
JAVA_AWT_INCLUDE_PATH (ADVANCED)
PR: 292244
Approved-by: maintainer timeout
devel/arduino18: support jdk11+
Java 8 had a jre/lib/ext directory which does not exist anymore.
Put the jssc-2.8.0.jar in JAVALIBDIR and embed it in arduino18 so we
are sure it is properly on the classpath.
NB: the patch is modified a little bit over the attachment in the
issue. It now uses less local patches than the original patch.
PR: 292242
Approved-by: maintainer timeout
[AArch64][PAC] Rework the expansion of AUT/AUTPAC pseudos
Refactor `AArch64AsmPrinter::emitPtrauthAuthResign` to improve
readability and fix the conditions when `emitPtrauthDiscriminator` is
allowed to clobber AddrDisc.
* do not clobber `AUTAddrDisc` when computing `AUTDiscReg` on resigning
if `AUTAddrDisc == PACAddrDisc`, as it would prevent passing raw,
64-bit value as the new discriminator
* move the code computing `ShouldCheck` and `ShouldTrap` conditions to a
separate function
[AArch64][PAC] Group arguments of emitPtrauthAuthResign (NFC)
The caller of `AArch64AsmPrinter::emitPtrauthAuthResign` has to analyze
the operands of MachineInstr being emitted and pass them explicitly to
this method, which leads to large number of function arguments, some of
them being optional.
This commit introduces `struct PtrAuthSchema` to pass semantically-
related parameters as a single argument and to better express the idea
that the second schema can only be passed or omitted as a whole.
Furthermore, `AUTVal` argument is renamed to `Pointer`, as unlike other
arguments with the `AUT` prefix, it does not relate to the authentication
schema, but represents a tied in-out operand used throughout the entire
expanded instruction sequence.
[NFC][llvm-objcopy] Eliminate else after return in llvm-objcopy (#177112)
Eliminate else after return in `getDriverConfig`.
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)
These are long overdue for removal. These were originally a hack
to support loading half values before there was any / decent support
for the half type through the backend. There's no reason to continue
supporting these, they're equivalent to fpext/fptrunc with a bitcast.
SelectionDAG stopped translating these directly, and used the
bitcast + fp cast since f7a02c17628e825, so there's been no reason
to use these since 2014.
py-xandikos: updated to 0.3.1
0.3.1
Bump docker/metadata-action from 5.7.0 to 5.9.0
deps(deps-dev): bump ruff from 0.14.2 to 0.14.6 in the pip group
Bump actions/checkout from 4 to 6
Bump docker/metadata-action from 5.9.0 to 5.10.0
deps(deps-dev): bump the pip group with 2 updates
Fix two RRULE related bugs
Fix caldav server tester
Move tests to root
Publish Docker images for every commit with commit SHA tags
Add ARMv7 platform support to container builds
Add basic chunked encoding support
Improve error
Limit recurrence expansion for unbounded queries
Implement limit-freebusy-set
Restrict supported dulwich versions
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[mlir][tosa] Add support for assert equal shape op (#176900)
Adds support for assert_equal_shape operation after spec change:
https://github.com/arm/tosa-specification/commit/575a50016de50d227eb517775eb4e7b137421fa1
This includes:
- Operator definition
- Tests
Change-Id: I6652bbcbd5e3716f140681b9d73ef8940564d7d3
Signed-off-by: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
