[X86][ACEV1] Address review comments
- Drop the AMX_TILE dependency; under acev1 enable only the AMX
instructions that ACE v1 actually shares.
- Namespace the ACE-invented intrinsics under llvm.x86.acev1.* and leave
the shared AMX-AVX512 ones in the flat llvm.x86.* namespace.
- Sync the public intrinsic and builtin names with GCC, and add the
helper macros from the ACE v1 spec.
- Tighten Sema checking of the outer-product group bits, and add driver,
preprocessor and feature-error test coverage.
- Spell BSR0 literally in the AsmStrings with Defs/Uses instead of
carrying it as a custom operand, which removes the bespoke handling
from X86AsmParser and both instruction printers.
- Drop the unused BSR register class; like TMMCFG, BSR0 needs only its
X86Reg definition and the getReservedRegs entry.
- Adopt the operand-type record naming convention, 't' for a TILE and
'e' for a GR32 index, on both the instructions and their pseudos,
retiring the ad-hoc _REG suffix.
- Use WriteSystem rather than WriteVecLogic for the tile outer products
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[SandboxVec][DAG] Add assertion in setScheduled() (NFC) (#240967)
This checks that we don't try to schedule a non-ready instruction.
Some unittests were marking nodes as scheduled when non-ready, so this
patch fixes them.
Update sysutils/intel-microcode-netbsd to 20261110
# Release Notes
## [microcode-20261110
### Purpose
- Update for functional issues. Refer to 13th/14th Gen Intel Core Processor Specification Update for details.
- Update for functional issues. Refer to 4th Gen Intel Xeon Scalable Processors Specification Update for details.
- Update for functional issues. Refer to 5th Gen Intel Xeon Scalable Processors Specification Update for details.
- Update for functional issues. Refer to Intel Core Processors (Series 3) Specification Update for details.
- Update for functional issues. Refer to Intel Core Ultra Processors (Series 3) Specification Update for details.
- Update for functional issues. Refer to Intel Xeon 6700 Series Processors with E-cores Specification Update for details.
- Update for functional issues. Refer to Intel Xeon 6900/6700/6500 Series Processors with P-cores Specification Update for details.
- Update for functional issues. Refer to Intel Xeon 6900E+ Series Processors Specification Update for details.
- Update for functional issues. Refer to Intel Xeon 6700P-B/6500P-B-Series SoC with P-Cores Specification Update for details.
### New Platforms
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[clang][deps] Don't share real paths from `LocalFS` via the shared cache (#241463)
`DependencyScanningWorkerFilesystem::getRealPath()` computed uncached
real paths via the overlay of `LocalFS` and the global FS, but stored
the result in the shared cache. Since `LocalFS` is specific to the
worker, this leaked its real paths to other workers, and could hide
`LocalFS` real paths behind results cached by other workers.
Resolve real paths of files that exist in `LocalFS` through `LocalFS`
and only cache them locally, the same way `getOrCreateFileSystemEntry()`
does for status and contents. Compute all other real paths through the
global FS.
[libc] Reorder and pack File state fields (#238054)
This reduces the size of the File struct, on 64-bit targets from 144
bytes to 120 bytes, and on 32-bit targets from 92 bytes to 76 bytes (and
60 bytes on baremetal in single-threaded mode).
Assisted-by: Gemini
[Clang][CodeGen][NFC] Add regression test for repeated `target_clones` redeclarations (#237830)
Fixes #149372
A `target_clones` definition, a bare redeclaration and then one
repeating the attribute asserted with `Default or Generic case must be
last` in the `x86` resolver. Sema did not link the bare redeclaration to
the definition, so CodeGen saw two functions named `f` and collected
every version twice.
#169259 fixed the `Sema` side, so the attribute is inherited and each
version is collected once. This adds the shape from the report.
Assisted-by : LLM tools.
[test][ThinLTO] Precommit iFDO test for LowerTypeTests and ICP ordering (#241632)
Add an instrumentation PGO (!VP metadata) ThinLTO backend test for
indirect
call promotion to CFI jump table members. With LowerTypeTestsPass
running
before ICP, the promoted comparisons check @foo.cfi instead of the jump
table
entry @foo.
Needed by #241582.
Assisted-by: Gemini
[flang][OpenACC] Don't crash on unresolved names in DECLARE data clauses (#169500)
When name resolution cannot resolve a name in a data clause of an
OpenACC DECLARE directive, it reports an error (for example "No explicit
type declared for 'm'" under IMPLICIT NONE) and leaves the name without
a symbol. The duplicate-occurrence check for DECLARE clauses then
dereferenced the null symbol and crashed before that error was printed.
All eight data clauses that DECLARE accepts were affected, and the name
could be the enclosing module's name, a misspelled variable or an
intrinsic procedure name.
The check now skips names without a symbol, as the other OpenACC
data-clause checks already do, so only the name-resolution error is
reported.
Fixes #169487
Assisted-by: AI
[KnownFPClass] Avoid the FPClassTest round trip in apply*DenormalMode (#241622)
The contract for `applyInputDenormalMode` and `applyOutputDenormalMode`
is that they only modify zero/subnormal classes. The round trip from
`FPClassMask` to `FPClassTest` via `getKnownFPClasses` and
`setKnownFPClasses` loses information, since `FPClassMask` represents
more information than `FPClassTest` (currently just the sign bit of NaN,
but `FPClassMask` will be able to represent additional classes in the
future).
