LLVM/project f5517e2clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Implement lowering for __builtin_amdgcn_dispatch_ptr
DeltaFile
+29-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+37-62 files

LLVM/project bcb555dlldb/test/API lit.cfg.py, llvm/utils/lit/lit TestingConfig.py main.py

Revert "[lit] Move maxIndividualTestTime from global to test suite config (#1…"

This reverts commit 4ee7e900f321c78271c87da47f1d7bd4263f3e7c.
DeltaFile
+0-16llvm/utils/lit/lit/TestingConfig.py
+12-1llvm/utils/lit/lit/main.py
+4-4llvm/utils/lit/lit/TestRunner.py
+1-4llvm/utils/lit/lit/LitConfig.py
+2-2llvm/utils/lit/lit/formats/googletest.py
+1-1lldb/test/API/lit.cfg.py
+20-285 files not shown
+25-3311 files

LLVM/project 6bbbf74llvm/docs/CommandGuide llvm-debuginfo-analyzer.rst, llvm/include/llvm/DebugInfo/LogicalView/Readers LVIRReader.h

[llvm-debuginfo-analyzer] Add support for LLVM IR format. (#135440)

llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level format.

Add support for the LLVM IR format and be able to generate logical
views. Both textual representation (.ll) and bitcode (.bc) formats
are supported.
DeltaFile
+2,630-0llvm/lib/DebugInfo/LogicalView/Readers/LVIRReader.cpp
+362-0llvm/unittests/DebugInfo/LogicalView/IRReaderTest.cpp
+302-0llvm/include/llvm/DebugInfo/LogicalView/Readers/LVIRReader.h
+87-134llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
+168-0llvm/test/tools/llvm-debuginfo-analyzer/IR/08-ir-multiple-compile-units.test
+151-0llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
+3,700-13435 files not shown
+5,406-15241 files

LLVM/project a3adb54clang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeSafety.h, clang/include/clang/Basic DiagnosticSemaKinds.td

[LifetimeSafety] Add details for `-Wlifetime-safety-return-stack-addr` diagnostic (#199432)

Most of the diagnostic's wording was taken from `-Wreturn-stack-address`
with exceptions such as:
- We do not special-case `[[clang::musttail]]`
- We do not special-case `CompoundLiteralExpr` as it is mostly a C
thing.

This patch does not add any new tests, it only updates already existing
test warnings to follow the new wording.

Comes as part of completing #186002
DeltaFile
+106-106clang/test/Sema/warn-lifetime-safety.cpp
+44-44clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
+29-6clang/lib/Sema/SemaLifetimeSafety.h
+13-11clang/test/Sema/warn-lifetime-safety-suggestions.cpp
+9-10clang/include/clang/Basic/DiagnosticSemaKinds.td
+1-2clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
+202-1791 files not shown
+203-1807 files

LLVM/project 505a611.github new-issues-labeler.yml

Auto-label LifetimeSafety issues with `clang:temporal-safety` (#199522)

cc: @usx95
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+3-0.github/new-issues-labeler.yml
+3-01 files

NetBSD/pkgsrc-wip 448878fwasi-compiler-rt Makefile

wasi-compiler-rt: tool depend on wip/lld

This has no effect but, seems more correct.
DeltaFile
+1-1wasi-compiler-rt/Makefile
+1-11 files

FreeBSD/ports a0451f7misc/codex distinfo Makefile.crates

misc/codex: Update to 0.134.0

Changelog: https://github.com/openai/codex/releases/tag/rust-v0.134.0

Reported by:    GitHub (watch releases)
DeltaFile
+11-3misc/codex/distinfo
+4-0misc/codex/Makefile.crates
+1-1misc/codex/Makefile
+16-43 files

LLVM/project 034ba70clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Implement lowering for __builtin_amdgcn_dispatch_ptr
DeltaFile
+23-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+31-62 files

LLVM/project d16d14fllvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.av.load.b128.ll accvgpr-spill-scc-clobber.mir

Merge branch 'main' into users/el-ev/_itaniumdemangle_fix_template_args_subst
DeltaFile
+23,873-20,923llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+12,365-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+5,568-0llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+55,118-41,0446,730 files not shown
+369,552-189,0656,736 files

LLVM/project 5954e21llvm/utils/lit/tests lit-config-readonly.py, llvm/utils/lit/tests/Inputs/lit-config-readonly lit.cfg dummy.txt

feedback addressed

Created using spr 1.3.7
DeltaFile
+1-1llvm/utils/lit/tests/lit-config-readonly.py
+0-1llvm/utils/lit/tests/Inputs/lit-config-readonly/lit.cfg
+0-1llvm/utils/lit/tests/Inputs/lit-config-readonly/dummy.txt
+1-33 files

FreeNAS/freenas 9b3936fsrc/middlewared/middlewared/etc_files/webshare config.json.py, src/middlewared/middlewared/plugins etc.py

NAS-141100 / 26.0.0-RC.1 / Fix webshare config files not being generated (by themylogin) (by bugclerk) (#19016)

All webshare-related entries refuse to generate their config files if
`WEBSHARE_PATH` does not exist. `WEBSHARE_PATH` resides on the system
dataset, so system dataset must be mounted before we try to generate a
webshare-related entry.

Original PR: https://github.com/truenas/middleware/pull/19005


Original PR: https://github.com/truenas/middleware/pull/19009

Co-authored-by: themylogin <themylogin at gmail.com>
DeltaFile
+28-3src/middlewared/middlewared/plugins/etc.py
+2-2src/middlewared/middlewared/etc_files/webshare/config.json.py
+30-52 files

LLVM/project 957a7e0llvm/test/CodeGen/AMDGPU accvgpr-spill-scc-clobber.mir pei-build-av-spill.mir, mlir/lib/Dialect/XeGPU/Transforms XeGPUSubgroupDistribute.cpp

rebase

Created using spr 1.3.7
DeltaFile
+5,568-0llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,000-96llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
+3,075-0llvm/test/CodeGen/AMDGPU/debug-frame.ll
+0-2,280mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+2,208-72llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
+2,196-0llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+16,047-2,4481,331 files not shown
+53,515-19,9531,337 files

LLVM/project bdd1fc2llvm/test/Transforms/VectorCombine/X86 bitop-of-castops.ll

update test
DeltaFile
+2-2llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
+2-21 files

LLVM/project 9beadf7llvm/test/Transforms/VectorCombine/X86 bitop-of-castops.ll

test
DeltaFile
+25-0llvm/test/Transforms/VectorCombine/X86/bitop-of-castops.ll
+25-01 files

LLVM/project 7c3d200llvm/lib/Transforms/Vectorize VectorCombine.cpp

[VectorCombine] Remove disjoint flag in foldBitOpOfCastops
DeltaFile
+10-0llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+10-01 files

LLVM/project 4f54064clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp, llvm/include/llvm/IR MemoryModelRelaxationAnnotations.h

[IR] Introduce an appendTags() idiom to set MMRA metadata [NFC] (#199621)

This is a simple set-union of new tags and existing tags. This is safer
than directly setting metadata, which can over-write existing MMRAs.

Assisted-By: Claude Opus 4.6

---------

Co-authored-by: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
DeltaFile
+15-0llvm/lib/IR/MemoryModelRelaxationAnnotations.cpp
+1-4clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+4-0llvm/include/llvm/IR/MemoryModelRelaxationAnnotations.h
+20-43 files

LLVM/project 4ee7e90bolt/test lit.cfg.py, llvm/utils/lit/lit TestingConfig.py main.py

[lit] Move maxIndividualTestTime from global to test suite config (#198192)

Simplify LitConfig initialization and setter to allow None values.
TestingConfig.maxIndividualTestTime is initialized to 0 (or resolved to
0 if None) strictly during initialization.

This fixes an issue where the aggressive BOLT timeout of 60s (previously
set globally on lit_config) was leaking and affecting libc++ tests. By
moving the timeout configuration from the global lit_config to the
individual test suite config, we ensure that timeouts are isolated and
respect suite-local settings without leaking.

PR Stack:
* ➤ https://github.com/llvm/llvm-project/pull/198192
* https://github.com/llvm/llvm-project/pull/198193

Assisted-by: Gemini
DeltaFile
+16-0llvm/utils/lit/lit/TestingConfig.py
+1-12llvm/utils/lit/lit/main.py
+4-4llvm/utils/lit/lit/TestRunner.py
+4-1llvm/utils/lit/lit/LitConfig.py
+2-2llvm/utils/lit/lit/formats/googletest.py
+1-1bolt/test/lit.cfg.py
+28-205 files not shown
+33-2511 files

LLVM/project 532940bllvm/include/llvm/Object BBAddrMap.h BBAddrMap.def

[BBAddrMap] Drive Features and Metadata bits from BBAddrMap.def (#196906)

Move the bit name list of BBAddrMap::Features and BBAddrMap::BBEntry::Metadata
into a new BBAddrMap.def and derive the enum, bitfield, encode(), decode(),
and operator== from it. Adding a new bit now only requires one line in the
.def file.

Also expose BBAddrMap::Features::KnownMask for future use.
DeltaFile
+45-48llvm/include/llvm/Object/BBAddrMap.h
+45-0llvm/include/llvm/Object/BBAddrMap.def
+90-482 files

LLVM/project 9d71870llvm/lib/Target/AMDGPU SIMemoryLegalizer.cpp

remove unreachable "default:" case in switch
DeltaFile
+0-2llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+0-21 files

LLVM/project 18ddec7lldb/source/Target Process.cpp

[lldb] Use private stop for breakpoint-delaying decision (#199639)
DeltaFile
+1-1lldb/source/Target/Process.cpp
+1-11 files

LLVM/project f7d5de2clang/lib/CIR/CodeGen CIRGenFunction.h

code format update
DeltaFile
+9-9clang/lib/CIR/CodeGen/CIRGenFunction.h
+9-91 files

NetBSD/pkgsrc c0wC4Jhdoc CHANGES-2026

   Updated www/py-flask-caching, www/py-flask-security
VersionDeltaFile
1.3297+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc rz4ZBKfwww/py-flask-security Makefile distinfo

   py-flask-security: updated to 5.8.1

   Version 5.8.1

   Fixes
   - (:issue:`1222`) Fix for GHSA-w2j7-f3c6-g8cw - Possible open-redirect with ALLOW_SUBDOMAIN option.
   - (:issue:`1215`) Fix for GHSA-97r5-pg8x-p63p - Possible oauth bypass in /verify


   Version 5.8.0

   Features & Improvements
   - (:pr:`1170`) Add API :py:meth:`.UserMixin.check_tf_required` to allow applications to control which users
     require two-factor authentication.
   - (:issue:`1178`) Add Cache-Control headers.
   - (:issue:`1165`) Add support for using Social Login (OAuth) for verification.
   - (:issue:`1188`) Add tracking of failed authentication attempts via :py:meth:`.UserMixin.track_failed_authn`
     and signal :py:data:`user_failed_authn`
   - (:issue:`1192`) Add API for application to decide if a particular user account is locked.

    [13 lines not shown]
VersionDeltaFile
1.25+4-4www/py-flask-security/Makefile
1.18+4-4www/py-flask-security/distinfo
1.8+3-1www/py-flask-security/PLIST
+11-93 files

NetBSD/pkgsrc uivgqfewww/py-flask-caching Makefile distinfo

   py-flask-caching: updated to 2.4.0

   2.4.0

   - Modernize project setup
   - Update ``intersphinx_mapping`` for Sphinx 8 compatibility.
   - Pass CACHE_OPTIONS as kwargs to redis_from_url.
   - Pass sentinel_kwargs to redis client via CACHE_OPTIONS
   - Fix ``response_hit_indication`` return True always.
VersionDeltaFile
1.18+5-5www/py-flask-caching/Makefile
1.16+4-4www/py-flask-caching/distinfo
1.10+1-2www/py-flask-caching/PLIST
+10-113 files

LLVM/project a8b11f7llvm/test/CodeGen/AMDGPU accvgpr-spill-scc-clobber.mir pei-build-av-spill.mir, mlir/lib/Dialect/XeGPU/Transforms XeGPUSubgroupDistribute.cpp

Merge remote-tracking branch 'upstream/main' into users/ssahasra/refactor-acq-rel
DeltaFile
+5,568-0llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,000-96llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
+3,075-0llvm/test/CodeGen/AMDGPU/debug-frame.ll
+2,208-72llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
+0-2,280mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+2,196-0llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+16,047-2,4481,537 files not shown
+59,239-23,2041,543 files

LLVM/project c85c8afcompiler-rt/lib/builtins CMakeLists.txt

[compiler-rt][ARM] Add missing SUPERSEDES for optimized FP comparison sources (#199604)

PR #179924 and #179925 added optimized assembly implementations for ARM
double-precision and single-precision FP comparisons (arm/cmpdf2.S,
arm/gedf2.S, arm/unorddf2.S, arm/cmpsf2.S, arm/gesf2.S, arm/unordsf2.S)
but only added SUPERSEDES annotations for the thumb1 variants. The arm
variants were missing these annotations, causing both the generic and
optimized implementations to be included in libclang_rt.builtins.a.

For double-precision, the archive contains:
  - comparedf2.c.obj (pos 28): defines __unorddf2, __aeabi_dcmpun, ...
  - divdc3.c.obj (pos 32): defines __divdc3; refs __aeabi_dcmpun
  - unorddf2.S.obj (pos 126): defines __unorddf2, __aeabi_dcmpun
  - aeabi_dcmp.S.obj (pos 158): defines __aeabi_dcmpeq; refs __eqdf2

When linking divdc3_test.c, the linker loads divdc3.c.obj which
introduces __aeabi_dcmpun as undefined. BFD-like linkers (GNU ld, ELD)
continue scanning forward and resolve __aeabi_dcmpun from unorddf2.S.obj
(pos 126). Later, aeabi_dcmp.S.obj introduces __eqdf2 as undefined,

    [18 lines not shown]
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+2-0compiler-rt/lib/builtins/CMakeLists.txt
+2-01 files

NetBSD/pkgsrc eGhm3Lddoc CHANGES-2026

   Updated shells/nushell, devel/lazygit
VersionDeltaFile
1.3296+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc wGw6LYYdevel/lazygit distinfo go-modules.mk

   lazygit: updated to 0.62.0

   0.62.0

   Enhancements

   Retry on ref lock errors during fetch/pull
   Preserve whitespace when remembering commit message
   Define PR colors as hex colors to make them the same as GitHub's
   Revamp keybinding mechanism to support richer keybindings (e.g. ctrl-alt-shift-x )
   Platform-specific edit bindings for move-by-word and backspace-word
   Change canonical keybinding syntax (<ctrl+a> instead of <c-a>)
   Use more widely-supported Unicode symbols for the commit graph
   Show push URLs for remotes that have any
   Support GitHub Enterprise for the Pull Requests feature
   Allow keybindings to configure more than one key
   Add <alt+up>/<alt+down> as alternate keybindings for moving commits up/down
   Add support for git flow using the git-flow-next tool


    [10 lines not shown]
VersionDeltaFile
1.23+76-88devel/lazygit/distinfo
1.18+24-28devel/lazygit/go-modules.mk
1.74+2-3devel/lazygit/Makefile
+102-1193 files

NetBSD/pkgsrc cofDRj5shells/nushell distinfo cargo-depends.mk

   nushell: updated to 0.113.0

   0.113.0

   This release adds fast in-memory indexing and search via idx, stream inspection
   without collection via peek, structured verbose output for file operations, and
   a more concise default output mode for from md.
VersionDeltaFile
1.72+211-136shells/nushell/distinfo
1.62+69-44shells/nushell/cargo-depends.mk
1.87+9-5shells/nushell/Makefile
+289-1853 files

LLVM/project 0e9e1aellvm/test/CodeGen/AMDGPU accvgpr-spill-scc-clobber.mir pei-build-av-spill.mir, mlir/lib/Dialect/XeGPU/Transforms XeGPUSubgroupDistribute.cpp

Merge branch 'main' into users/ssahasra/mmra-append-tag
DeltaFile
+5,568-0llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,000-96llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
+3,075-0llvm/test/CodeGen/AMDGPU/debug-frame.ll
+0-2,280mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+2,208-72llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
+2,196-0llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+16,047-2,4481,300 files not shown
+51,829-19,2531,306 files