net-mgmt/netbox: Update to 4.6.9
Changelog:
Enhancements:
* Add InfiniBand 4X interface types
* Add an interface type for HPE Synergy interconnect links
* Restrict images in rendered Markdown to HTTP(S) and relative URLs
* Add a 100GBase-X-SFP112 interface type
Performance Improvements:
* Prefetch cable terminations to avoid N+1 queries when fetching cables
via the GraphQL API
Bug Fixes:
* Prevent a server error when bulk import validation raises an error
referencing a field omitted from the import data
* Avoid loading all associated jobs into memory when deleting a custom
script or other job-bearing object
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databases/cassandra-cpp-driver: unbreak with CMake 4
While at it, adjust the GH repo to com/apache/cassandra-cpp-driver and
bump portrevision (the tarball SHA has changed).
PR: 297916
Reported by: arrowd
net-mgmt/semaphore: update to 2.19.7, restore web UI
The port was frozen at 2.9.2 and installed only the REST API server; the
bundled web UI was never built, so every UI route returned 404. Update
to
2.19.7 and restore the embedded Vue UI.
Upstream dropped BoltDB support in 2.19; the supported dialects are now
mysql, postgres and sqlite. BoltDB installations must import their data
with a Semaphore 2.18 binary before the upgrade, because 2.19 no longer
ships the import tool. Changing the dialect without importing silently
creates an empty database and all projects, templates, access keys and
the
task history are lost. Add a pkg-install check that warns during
PRE-INSTALL when the configuration still selects the bolt dialect or a
database.boltdb is present, a pkg-message for upgrades from before 2.19,
and an UPDATING entry documenting the procedure.
Further changes:
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[AMDGPU] Add stalls for DS FIFO buffer (#192323)
This PR adds modeling for the LDS FIFO, and adds support for modelling
other types of buffers with similar characteristics.
The LDS unit has a FIFO which allows us to issue multiple LDS
instructions while the first is still executing. However, the FIFO is
sized, and, if we exceed the capacity, we will need to wait for a spot
in the FIFO before we can issue the instruction. This adds modeling for
this feature, which has impacts on: 1. the stall cycle calculations, and
2. the total usage of the HardwareUnit. The reason why this impacts 2.
is because previously we just summed the cycle count for each LDS
instruction for the total cycle. But, we can actually run N LDS
instructions in N + SingleInstructionCycle * N / BufferSize cycles. So,
if we scheduled 2 DS_LOAD instructions back to back, with
SingleInstructionCycle of 20 and BufferSize of 16, it would take 21
cycles to execute them instead of 40.
The SchedModel doesn't really have any good way to express this. It has
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www/redmine61: update to 6.1.3
Security and bug fix release. Rails updated to 7.2.3.1.
While here, fix portclippy ordering for TRILOGY_DESC and
TRILOGY_RUN_DEPENDS.
[InstCombine] Simplify conditional round-up to power-of-2 alignment (#184989)
The pattern `(X + (X % P == 0 ? 0 : P)) & -P`, that may arise when
computing `div_ceil(V, P) * P`, can be canonicalized to `(X + P-1) &
-P`, with P being a power of 2.
Proof: https://alive2.llvm.org/ce/z/ehyiNf.
Fixes: https://github.com/llvm/llvm-project/issues/184762.
[AMDGPU] Model ordered XDL writes in expert scheduling
Treat qualifying XDL WMMA as VA_VDST fences so expert scheduling can use
nonzero waits after out-of-order event mixes.
An XDL instruction with a destination register of 8 or more VGPRs decrements
VA_VDST after all instructions that were issued earlier.
This offers a significant benefit in compute bound kernels since we are not
required to pessimistically wait for WMMAs to write their results when
interleaving LDS.
```
VALU def r0
TRANS
VALU
TRANS
WMMA
va_vdst(1) # previously this would require va_vdst(0)
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cmake cmake-gui: updated to 4.4.3
4.4.3
Swift policy CMP0215's NEW behavior has been updated to require policies CMP0157 and CMP0195 to also be set to NEW.
