igbv: Retry transient VLAN admission failures
A PF mailbox NACK does not distinguish the SR-IOV VLAN request rate
limit from permanent VLVF exhaustion. Preserve desired VLAN membership
and retry four additions per 500 ms timer tick, matching the PF
sustained allowance.
Bound the whole recovery batch to eight seconds from its first failure
and consolidate restore diagnostics, so a full table cannot create a
permanent mailbox poller or repeated per-VID log bursts.
Sponsored by: BBOX.io
e1000: Sample statistics at timer cadence
Mailbox and link interrupts share iflib admin service with the periodic
timer. Mark timer-driven passes explicitly and run the hardware
statistics sweep only for those samples instead of repeating 66 PF MMIO
reads for every VF mailbox message.
DTrace on the I350 DUT measured the PF sweep at about 79 us on average.
The normal hz/2 timer continues to extend clear-on-read counters
safely; exported counters may trail hardware by up to 500 ms.
Sponsored by: BBOX.io
igb: Rate-limit VF VLAN rebuild requests
Give each VF a burst of 64 VLAN additions and refill it at eight
additions per second. Removals remain unrestricted, idempotent requests
consume nothing, and trusted PF-wide initialization replenishes the
burst while guest resets do not. Checks VLVF capacity before charging
a token.
Do not apply this policy to multicast requests because Linux igbvf and
DPDK ignore their reply status; aggregate MTA write elision bounds
those updates instead.
Sponsored by: BBOX.io
igb: Update only changed IOV VLAN filters
Keep the full VFTA/VLVF software recomputation and clear-map-set
ordering, but compare each phase against the authoritative old value.
Write only VFTA words and VLVF slots whose effective contents change.
I350 uses its software VFTA shadow because erratum 20 makes live reads
unreliable; an invalid shadow forces a complete clear before sparse
restoration. 82576 continues to diff against live VFTA reads.
Add SDT probes for every logical write phase and the final software
images so hardware tests can verify exact elision counts. On my I350
DUT, the old full table path averaged 819 us across 31 VLAN removals
versus about 79 us for the PF statistics sweep.
Sponsored by: BBOX.io
igb: Update only changed IOV multicast hashes
Build the aggregate PF/VF multicast bitmap in software and compare it
with the e1000 MTA shadow. Write only registers whose desired value
changed, while forcing a complete write after PF reset invalidates the
hardware table.
This bounds alternating VF multicast updates without NACKing them.
Linux igbvf and DPDK ignore multicast reply status, so a command-rate
limiter could otherwise acknowledge configuration while leaving
hardware state stale.
Sponsored by: BBOX.io
igb: Stop writing the legacy TADV register
TADV is an em-class interrupt delay register and is absent from the
82575 and later register model. The igb attach path does not expose or
initialize that control, but transmit initialization still wrote its
zero valued storage into a reserved queue-window offset.
Apply the same igb_mac_min boundary already used for TIDV and the
absolute-delay sysctls.
MFC after: 1 week
Sponsored by: BBOX.io
igbv: Support secondary unicast filters
Support the Linux igbvf secondary-MAC mailbox subprotocol, used by
Linux guests running MacVTap.
Replay up to three non-primary unicast addresses after reset and
whenever the address list changes, subject to PF allow-set-mac policy.
Sponsored by: BBOX.io
AMDGPU: Eliminate old macro driven processor name parsing
Previously the generated inc file had a series of macros for use
with StringSwitch; now just directly scan the generated name table.
Co-authored-by: Claude (Claude-Opus-4.8)
AMDGPU: TableGen the subarch to processor name mapping table
Replace the hand-written AMDGPUSubArchNames array (SubArch -> canonical GPU
name) with a generated table.
Co-authored-by: Claude (Claude-Opus-4.8)
AMDGPU: TableGen subarch to major subarch table
Replace the hand-written AMDGPUMajorFamilies array with a
generated lookup table. Adds a special case for the major
arches missing a concrete generic target definition (we probably
should just define those to avoid this).
Co-authored-by: Claude (Claude-Opus-4.8)
AMDGPU: Handle more TargetParser queries in tablegen (#212357)
Previously we had various enum switches. Start generated tables
indexed by enums. Avoid some special cases by defining the dummy
"generic" and "generic-hsa" targets as real processors.
Co-authored-by: Claude (Claude-Opus-4.8)
igbv: Improve VF mailbox and status behavior
Treat VF media as fixed 1000baseT full duplex and report PF not ready
and generated MAC fallback states during attach.
After a successful reset handshake, reconcile a PF rejected MAC back
into the ifnet. If the PF is unavailable, defer MAC, multicast, VLAN,
LPE, and promiscuity replay until CTS is restored. Track a rejected
VLAN removal separately so leaked traffic remains tagged until reset
proves that the stale hardware filter is gone.
Baseline VF counters at attach, collect the four loopback packet and
octet counters with rollover-safe deltas, and account software RX
checksum offload results. Preserve accumulated statistics across PF
resets by rebasing the raw hardware counters, and sample them while
physical link is down because VF loopback can remain active.
Retain the 82576 VFMPRC hardware statistic, but do not read it on I350
VFs because specification update errata 31 says it is unavailable.
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igbv: Isolate VF policy and validate its registers
Give igb virtual functions a separate ifdi method table and move
VF-specific attach, reset, queue, interrupt, and diagnostic policy to
if_igbv.c. Keep shared descriptor-ring mechanisms in if_em.c.
Derive VF identity from IFLIB_IS_VF and assert that hardware
identification agrees. Under INVARIANTS, validate normal VF CSR
accesses against the sparse 82576 and I350 VF register maps.
Stop shared setup from accessing PF-only controls. Require MSI-X and
defer VF sysctls until attach succeeds so failed attachment cannot
leave handlers pointing at freed driver state.
Advertise only VF capabilities, run adaptive moderation without the
PF receive-buffer guard, enable SRRCTL.DROP_EN, and provide a VF-safe
diagnostic register view.
The moved implementation is the existing FreeBSD code. Register model
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MSP430: Mark more generic libgcc functions as available
The generic soft-float, conversion, comparison and integer helper
routines (__addsf3, __divli's __divsi3, __ashlsi3, ...) exist in the MSP430
libgcc port alongside the preferred __mspabi_* variants. They were previously
removed to force selection of the __mspabi_* names, back when only one
implementation per libcall could be recorded.
Stop hiding them: only __lshrsi3 stays excluded, since the MSP430 libgcc
port provides the 32-bit logical right shift solely under __mspabi_srll and
never defines a generic __lshrsi3.
Repost of #210962
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
igb: Reprogram descriptor queues while disabled
Disable each igb-class transmit and receive queue and flush before
changing its descriptor-ring registers. Restore the head and tail
indices that Intel documents as surviving a VF reset.
Use the igb queue-enable control instead of programming legacy TXDCTL
granularity, low-water, and reserved bits that do not belong to the
82575 and later.
Sponsored by: BBOX.io
MFC after: 1 week
[SBVec] Refactor BottomUpVec pass for clarity and maintainability
- Corrected comments to clarify the direction of def-use and use-def chains.
- Changed the initialization of the SchedDirection variable to improve clarity.
- Updated documentation in vectorizeRec() to better describe the purpose of UserBndl.
- Removed outdated TODO comment regarding top-down vectorization scheduling.
[SandboxIR] Fix notifyEraseInstr to skip scheduled neighbors
Guard both loops with !PredN->scheduled() / !SuccN->scheduled() so
scheduled neighbors are left untouched, and add a unit test that erases
a node with one scheduled and one unscheduled predecessor to cover the
fix.
[SBVec] Add top-down vectorization to the unified Sandbox Vectorizer
Extend the Sandbox Vectorizer's `bottom-up-vec` pass so a single
implementation can vectorize in either direction, and add the top-down
strategy that walks def-use chains forward from a seed.
Direction selection
--------------------
The pass direction is chosen from the Region's auxiliary pass argument:
"bottom-up" (or empty, the default) and "top-down" map onto a
SchedDirection, and any other value is rejected with a fatal usage error.
The vectorizer always runs in the same direction as the scheduler.
Top-down traversal
------------------
Bottom-up starts from a seed slice (e.g. stores to consecutive addresses)
and recurses into operands. Top-down instead starts from a seed of
consecutive loads and recurses into *users*:
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