[SLP] Cost using TCK_CodeSize under -Os and -Oz (#217398)
Refactor to centralize the cost kind decision in the SLP.
In practice there appears to be little change in the codegen as a result
of this change due to current backend costing.
Fixes #153376.
[WIP][VPlan] Optimize blend masks during creation
Sort the incoming edges according to RPOT order so that we could use
simpler source block mask instead of the edge mask.
[NewPM] Mark EHContGuardTargets as CFG-preserving
Address review feedback on #217843: the pass only inserts symbols at
existing instructions and never modifies the CFG, so it should
preserve CFG analyses. Add the corresponding getAnalysisUsage
override for the legacy pass, matching passes like
ExpandPostRAPseudos and BreakFalseDeps.
Assisted-by: Claude Sonnet 5
[MLIR][XeGPU][XeVM] Lower xegpu.lane_shuffle to xevm.bitcast_shuffle (#215306)
Lower `xegpu.lane_shuffle` onto `xevm.bitcast_shuffle` in
`convert-xegpu-to-xevm`:
// pack mode, a vector<4xbf16> fragment per lane
%0 = xegpu.lane_shuffle %frag pack : vector<4xbf16>
`xevm.bitcast_shuffle` concatenates its operand's components across the
subgroup
and hands the bits back out in result-component-sized chunks. Taking a
lane's
`vector<NxT>` fragment as a single `N * width(T)` bit scalar makes that
exactly
`lane_shuffle`'s pack numbering, so pack is a vector-to-scalar shuffle
followed by
a bitcast back to the fragment type, and unpack is the inverse.
`xevm.bitcast_shuffle` only accepts integers, so a floating point
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[clang-tidy] Fix modernize-raw-string-literal crash on raw literal operators (#217229)
Fixes #213891.
Raw user-defined literals like `12_w` can produce a synthetic
`StringLiteral` whose source text is not actually a string literal. This
caused `modernize-raw-string-literal` to look for quotes that were not
present and crash.
Check that the source token is a string literal before analyzing its
source text.
AI assistance: I used ChatGPT and Claude Code for codebase navigation,
investigation, implementation planning, and drafting parts of the
change. I reviewed and tested the final implementation and understand
the submitted changes.
[mlir][xegpu] Report failure when no valid layout can be determined for anchor ops (#214875)
This PR makes XeGPU layout propagation fail immediately when it
encounters an anchor op (store or dpas) that it can't determines its
layout.
It reports an error message at the offending op during propagation step,
rather than leaving the layout unlabeled and letting the problem crash
or misreport in a later pass. So user has better understanding about the
lowering issue.
assisted-by-claude
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
[bazel] Link emutls to interpreter (#218065)
This is needed to fix #209717.
https://github.com/llvm/llvm-project/pull/217700 tries to fix it cleanly
but it's blocked on review. Get this in while we wait for review.
[flang][CUDA] Preserve data attrs on assignment RHS (#207849)
Background: The Fortran standard enforces that the right hand side of a
defined assignment be treated as a value by parenthesizing the rhs in
the defined assingment translation: `lhs = rhs` is semantically
equivalent to `user_defined_assignment(lhs, (rhs))`. This would normally
prevent generic resolution from distinguishing defined assignment
procedures based on the variable attributes of any variable used as
`rhs` because the `(rhs)` has no variable attributes.
Cuda Fortran relies on Variable Attributes to track the location of data
between the host and the device. This PR suppresses the parenthesis
insertion during procedure lowering in order to allow overloading
assignment based on device variable attributes of the right hand side
variable. It also bypasses some semantic enforcement of user-defined
assignements that is happening at the HLFIR level by lowering the
assignment to a function call of the defined assignment subroutine
instead of a `hlfir.region_assign` operator.
[MLIR][XeVM] Add xevm.bitcast_shuffle op and lowering to LLVM (#215303)
Add `xevm.bitcast_shuffle`, matching the SPIR-V
OpSubgroupBitcastShuffleINTEL
instruction from SPV_INTEL_subgroup_bitcast_shuffle. It performs a
bit-preserving
conversion and shuffle of its operand across a subgroup: all invocations
cooperate, the components of the operand are concatenated in
subgroup-local-id
order, and the resulting bit stream is handed back out in chunks the
size of a
result component.
// pack: gather one value per lane out of the components spread across
the subgroup
%scalar = xevm.bitcast_shuffle %vec : (vector<4xi16>) -> i64
// unpack: the exact inverse
%vec2 = xevm.bitcast_shuffle %scalar : (i64) -> vector<4xi16>
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net-mgmt/monitoring-plugins: Add CURL option to build check_curl
Upstream deprecated check_http in 3.0.0 and declared check_curl its
stable replacement, so make the plugin available here as an option.
It is off by default, like every other option in this port that pulls
an external library.
check_curl requires libcurl and uriparser. configure only knows
--with-libcurl and --with-uriparser, so pass those explicitly instead
of relying on autodetection. The submitted patch used a --with-curl
knob that does not exist and was missing the libcurl dependency.
PR: 296901
Submitted by: franz at electromail.org
Sponsored by: Netzkommune GmbH
net-mgmt/monitoring-plugins: Add CURL option to build check_curl
Upstream deprecated check_http in 3.0.0 and declared check_curl its
stable replacement, so make the plugin available here as an option.
It is off by default, like every other option in this port that pulls
an external library.
check_curl requires libcurl and uriparser. configure only knows
--with-libcurl and --with-uriparser, so pass those explicitly instead
of relying on autodetection. The submitted patch used a --with-curl
knob that does not exist and was missing the libcurl dependency.
PR: 296901
Submitted by: franz at electromail.org
Sponsored by: Netzkommune GmbH
[NFC][AMDGPU] Remove redundant CodeGen test coverage
This PR removes duplicate test files, cases, and RUN commands while preserving all effective coverage.
Deleted files:
- `unexpected-reg-unit-state.mir` duplicates the bar case in `fast-ra-kills-vcc.mir`.
- `schedule-fs-loop.ll` produces the same bitcode and output as `schedule-fs-loop-nested-if.ll`.
- `regbankselect-add.s16.mir` duplicates the first four cases in `regbankselect-add.mir`.
- The dynamic-indirect-access LDS tests duplicate the static-dynamic versions, including their ASAN variants.
- The two removed NextUseAnalysis tests duplicate `sequence_2_loops.mir` and `triple-nested-loops.mir`.
Trimmed test cases:
- Remove generic OR cases from `atomicrmw-xor.ll`; `atomicrmw-or.ll` contains them.
- Remove the fcmp ord case from `fmax_legacy.ll`; `fmin_legacy.ll` contains it.
- Remove `variable_memcpy_caller1` from `lower-mem-intrinsics.ll`; `caller0` provides identical coverage.
Deduplicated test commands:
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