[libc] feat(filemode): implement class and helper functions to handle file modes for an opened file (#220906)
I moved the logic from `mode_flags` function to the `FileMode`
constructor.
The `FileMode` class has several helper methods to work with modes which
can then be called in `File` class.
Issue: #213374
---------
Signed-off-by: tdadadavid <davidtofunmidada at gmail.com>
Co-authored-by: Michael Jones <michaelrj at google.com>
[RISCV] Teach RISCVOptWInstrs that zext.w is fixable to sext.w. (#223559)
Note, in some cases erasing the zext.w and fixing an earlier
instruction would be even better but that requires more extensive
changes.
nfs_nfsdkrpc.c: Fix the "glue" for the nfsrdma.ko modules for NFSv3
Without this patch, nd_xprt is only set for NFSv4.1/4.2.
The nfsrdma.ko needs it to be set for all versions of NFS,
so this one line patch does that.
No semantics change for non-RDMA NFS service.
MFC after: 3 months
Fixes: 7144a1d58c5c ("nfsd: Add glue for the nfsrdma.ko module")
nfs_nfsdkrpc.c: Fix the "glue" for the nfsrdma.ko modules for NFSv3
Without this patch, nd_xprt is only set for NFSv4.1/4.2.
The nfsrdma.ko needs it to be set for all versions of NFS,
so this one line patch does that.
No semantics change for non-RDMA NFS service.
MFC after: 3 months
Fixes: 7144a1d58c5c ("nfsd: Add glue for the nfsrdma.ko module")
[mlir] Migrate AMDGPU/ROCDL to targets, not chipset versions
**migration tl;dr:** Replace usages of `amdgpu::Chipset` with `ROCDL::TargetInfo`, ideally move from `chipset=` to `arch=`. If you don't use upstream pipelines, call 'TargetInfo::migrateArchFeaturesToModuleFlags` at the appropriate location.
Further note: if you've got a build pipeline that's getting a `gfxXXX` name from something like `rocm_agent_enumerator`, using a full triple name like the ones you get from `rocminfo` is preferred.
`amdgpu::Chipset` was an awkward hack that was hard to keep up to date
with changes in the compiler/new architectures, and didn't properly
support generic targets (and has been strongly disfavored by the
compiler team).
This PR replaces `amdgpu::Chipset` with `ROCDL::TargetInfo`, a
structure that uses LLVM's TargetParser and the underlying LLVM
features tables to get the real nature of the target being compiled
for.
This also helps MLIR move to
new-style (`-mtriple=amdgpuX.YZ-amd-amdhsa`) over "old
style" (`-mtriple=amdgcn-amd-amdhsa -mcpu=gfxXYZ`) triples.
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[mlir][ROCDL] Add TargetInfo to replace Chipset, allow features queries
Add a now ROCDL::TargetInfo struct that parses AMDGPU triples and
target names using the same logic that Clang and LLVM
use (TargetParser) and maintains the set of features available on a
given GPU.
This is an improvement over the old `amdgpu::Chipset` struct since
that was just a version number and often became stale compared to the
knowledge exposed by LLVM, such as gfx1170 having OCP FP8 support even
though other gfx11 chips don't have it.
This struct also allows for moving to new-style
triples (amdgpu9.42-amd-amdhsa vs amdgcn-amd-amdhsa--gfx942, for
example), which is an ongoing migration in other parts of the compiler
that this PR lets us follow.
It also enables compiling for generic targets, like `gfx11-generic`,
which can be run on all chips in a generation.
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[AMDGPU] Expose more subtarget features for MLIR
- `FeatureAtomitFaddNoRtnInsts` is needed to control when atomic emulation
for buffer operations happens
- `FeatureBackOffBarrier` controls an inline-assembly workaround for
LDS-only barriers on old gfx9
- `FeatureLfsBarrierArriveAtomic` is a precise flag compared to arch versions
- `FeatureORPFP8ConversionInsts` controls which MLIR FP8 types can be
lowered to LLVM
- `FeaturePermlane16Insts`is another feature check
Clang and flang tests are updated since they look at the feature set
AI disclosure: Claude made these changes, I wrote this message
Mark compatibility stubs as unused
Several compatibility functions either do nothing, always fail, or are
deprecated initialization helpers that applications no longer need.
Mark them LCRYPTO_UNUSED so calls from namespaced library builds produce
deprecation warnings. Remove the remaining in-tree calls to the obsolete
EVP initialization and cleanup functions.
ok tb
[ScalarEvolution] howManyLessThans infer stride isPositive from guard (#214014)
Infer Stride is positive from loop guard.
This enables SCEV to compute symbolic-max backedge-taken count for
multi-exit loops.
Motivating example:
void example(int *p, int n, int stride, int bound) {
if (stride <= 0) __builtin_trap(); // dominating guard => stride > 0
for (int i = 0; i < n; i += stride) {
if (i > bound) __builtin_trap(); // per-iteration bounds check (2nd
exit)
p[i] = 0;
}
}
[CIR][AMDGPU] Add support for AMDGCN bitop3 builtins (#223104)
Adds codegen for the following AMDGCN bitop3 builtins:
- __builtin_amdgcn_bitop3_b32
- __builtin_amdgcn_bitop3_b16
These are lowered to the corresponding `llvm.amdgcn.bitop3` intrinsic.
[SystemZ][z/OS] Add AMODE to PR symbols
Contrary to the documentation, setting the AMODE at PR symbols is
required. The symptom is that references to variables `optind` and
`optarg` (from include `<getopt.h>`, the LE-provided C runtime)
results in "missing symbol" errors.
Fix is to add AMODE to PrAttr, analog to LdAttr.
[SSAF][SourceEdit] The last patch of expression rewrite rules for the initial version
Add a list of rewrite rules:
- '&var'/'&member' is rewritten to 'addr_of(var)', if it needs to have
bounded type;
- 'this' is rewritten to 'make_single(this)', if it needs to have
bounded type;
- A non-empty list-initializer flowing into a bounded_array LHS gets an
extra '{...}' layer;
- A union with a transformed variant member gets a '= {}' default
initializer added to one member, if necessary;
- 'delete e' gets '.data()' appended to 'e' when its base is
transformed.
Final step of
rdar://187125348
[BOLT] Share one LSDA type table across function fragments
## Motivation
The type table, the action table and the type index table of an LSDA are all
per-function. BOLT copies the first and the last verbatim from the input and
re-encodes the type table, but it emits a whole LSDA per fragment, so every one
of those tables is duplicated once per fragment even though the copies are
identical.
## Change
Emit the type table and the type index table once per function, after the LSDA
of the last fragment. Each fragment header points at that one @TType base. This
works because the base is an unsigned forward offset, because all LSDAs go to a
single section, and because the fragments of a function are emitted one after
another.
The action table stays per fragment. The personality routine locates it
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AMDGPU: Use LiveIntervals in SIOptimizeVGPRLiveRange when available
LiveVariables has been long deprecated. Use LiveIntervals if available.
With the current pass structure, this will use LiveVariables.
Co-authored-by: Claude (Claude-Opus-4.8)
