LLVM/project 6fe7d97llvm/test/CodeGen/RISCV target-abi-valid.ll

[RISC-V] Test ELF e_flags for llc -target-abi without module flag (#225128)

Verify that `llc -filetype=obj -target-abi=...` sets the ELF header
`e_flags`
according to `-target-abi` even when the input IR has no `"target-abi"`
module
flag and the enabled extensions (such as `+d`) would default to a
different ABI.

This commit was created with the help of AI tools
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+13-01 files

LLVM/project 6854d29clang/lib/CIR/CodeGen CIRGenBuiltin.cpp, clang/test/CIR/CodeGenBuiltins builtin-stdc-bit-c2y.c

[CIR] Lowering for the C2Y `stdc` bit builtins  (#218852)

Implemented CIR lowering for the C2Y `stdc` bit builtins currently
covered by this PR.

This adds support for:

- `stdc_rotate_left_*` / `__builtin_stdc_rotate_left`
- `stdc_rotate_right_*` / `__builtin_stdc_rotate_right`
- `stdc_memreverse8u8/u16/u32/u64`
- `stdc_memreverse8` / `__builtin_stdc_memreverse8`

The rotate builtins lower to `cir.rotate`, which then lowers to the LLVM
funnel-shift intrinsics.

For `stdc_memreverse8`, CIR matches classic CodeGen behavior:

- sizes `0` and `1` are no-ops, while still evaluating the pointer
argument

    [5 lines not shown]
DeltaFile
+116-0clang/test/CIR/CodeGenBuiltins/builtin-stdc-bit-c2y.c
+47-4clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+163-42 files

LLVM/project eb701aeclang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp, clang/test/CIR/CodeGen var-arg-int128.c var-arg-vector.c

[CIR] Expand callee-side va_arg on x86_64 (#222420)

CallConvLowering now classifies every `cir.va_arg` on its own, as an
unnamed argument with a full register budget, and expands it in place. A
fetch that fits the budget reads from the saved register area, and
everything else reads the overflow area and bumps the cursor. An
aggregate, an x87 long double, and an `__int128` all lower correctly
now. Each fetch reads at the alignment the argument area gives it, which
for an over-aligned record is higher than its type reports.

A non-trivially-copyable type still reports NYI.

`rewriteVAArg` takes the register demand from the ABI library rather
than rebuilding it from the shape of the coerced type. The library
computes it in `classifyArgumentType` as the `NeededInt` and `NeededSSE`
out-parameters and used to drop it, so `llvm::abi::ArgInfo` and
`mlir::abi::ArgClassification` now carry it. Expanding a `cir.va_arg`
needs the inputs to that decision rather than its result, because the
choice has to become a runtime branch on the va_list cursor.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+499-19clang/test/CIR/CodeGen/var-arg-aggregate.c
+410-0clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+176-0clang/test/CIR/CodeGen/var-arg-direct-offset.cpp
+155-8clang/test/CIR/CodeGen/var_arg.c
+96-0clang/test/CIR/CodeGen/var-arg-vector.c
+73-0clang/test/CIR/CodeGen/var-arg-int128.c
+1,409-2710 files not shown
+1,699-3716 files

HardenedBSD/src 9fbd88fshare/man/man4 ulpt.4 uled.4, sys/dev/hwpmc hwpmc_amd.c

Merge remote-tracking branch 'rad/hardened/current/master' into hardened/current/cross-dso-cfi
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+41-2sys/dev/hwpmc/hwpmc_amd.c
+35-5usr.sbin/pciconf/pciconf.c
+13-18share/man/man4/umcs.4
+8-14share/man/man4/umct.4
+6-11share/man/man4/ulpt.4
+6-11share/man/man4/uled.4
+109-616 files not shown
+133-6512 files

HardenedBSD/src 040a98fshare/man/man4 ulpt.4 uled.4, sys/dev/hwpmc hwpmc_amd.c

Merge remote-tracking branch 'rad/hardened/current/master' into hardened/current/pledge
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+41-2sys/dev/hwpmc/hwpmc_amd.c
+35-5usr.sbin/pciconf/pciconf.c
+13-18share/man/man4/umcs.4
+8-14share/man/man4/umct.4
+6-11share/man/man4/ulpt.4
+6-11share/man/man4/uled.4
+109-616 files not shown
+133-6512 files

HardenedBSD/src df87c4dshare/man/man4 ulpt.4 uled.4, sys/dev/hwpmc hwpmc_amd.c

Merge branch 'freebsd/current/main' into hardened/current/master
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+41-2sys/dev/hwpmc/hwpmc_amd.c
+35-5usr.sbin/pciconf/pciconf.c
+13-18share/man/man4/umcs.4
+8-14share/man/man4/umct.4
+6-11share/man/man4/ulpt.4
+6-11share/man/man4/uled.4
+109-616 files not shown
+133-6512 files

HardenedBSD/ports 5004e34net-p2p/amule Makefile

HBSD: Resolve merge conflict

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
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+0-51 files

HardenedBSD/ports 93dde88graphics/py-mayavi Makefile, misc/lean-ctx Makefile distinfo

Merge remote-tracking branch 'rad/freebsd/main' into hardenedbsd/main

Conflicts:
        net-p2p/amule/Makefile (unresolved)
DeltaFile
+363-635misc/lean-ctx/distinfo
+187-319misc/lean-ctx/Makefile
+146-1net-mgmt/icinga-php-thirdparty/pkg-plist
+78-0net-p2p/amule/files/patch-fix-tests
+61-0misc/lean-ctx/files/patch-src_core_engine__artifact_unix.rs
+25-19graphics/py-mayavi/Makefile
+860-97438 files not shown
+1,056-1,06744 files

OpenBSD/ports DTTHn2tlang/scala Makefile distinfo, lang/scala/pkg PLIST

   lang/scala: update to 3.9.0
VersionDeltaFile
1.19+146-158lang/scala/pkg/PLIST
1.22+2-2lang/scala/distinfo
1.36+1-1lang/scala/Makefile
+149-1613 files

HardenedBSD/ports bb10451net-p2p/amule distinfo pkg-plist, net-p2p/amule/files patch-CMakeLists.txt patch-fix-tests

net-p2p/amule: Update to 3.1.0

- Remove WEBSERVER_USES=readline option as it is defined in global USES
- Apply upstream tests fix patch

ChangeLog: https://github.com/amule-org/amule/releases/tag/3.1.0
DeltaFile
+78-0net-p2p/amule/files/patch-fix-tests
+12-5net-p2p/amule/files/patch-CMakeLists.txt
+6-6net-p2p/amule/Makefile
+6-2net-p2p/amule/pkg-plist
+3-3net-p2p/amule/distinfo
+105-165 files

FreeBSD/ports bb10451net-p2p/amule distinfo pkg-plist, net-p2p/amule/files patch-CMakeLists.txt patch-fix-tests

net-p2p/amule: Update to 3.1.0

- Remove WEBSERVER_USES=readline option as it is defined in global USES
- Apply upstream tests fix patch

ChangeLog: https://github.com/amule-org/amule/releases/tag/3.1.0
DeltaFile
+78-0net-p2p/amule/files/patch-fix-tests
+12-5net-p2p/amule/files/patch-CMakeLists.txt
+6-6net-p2p/amule/Makefile
+6-2net-p2p/amule/pkg-plist
+3-3net-p2p/amule/distinfo
+105-165 files

LLVM/project 7da7ac8clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add InterlockedCompareExchangeFloatBitwise coverage to the texture test
DeltaFile
+5-0clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+5-01 files

LLVM/project 5127e94clang/include/clang/Basic Builtins.td

Remove the comment on the InterlockedCompareExchangeFloatBitwise builtin
DeltaFile
+0-1clang/include/clang/Basic/Builtins.td
+0-11 files

LLVM/project f34a39cclang/test/CodeGenHLSL/builtins RWBuffer-Interlocked.hlsl RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl, clang/test/SemaHLSL/BuiltIns ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl InterlockedCompareExchangeFloatBitwise-errors.hlsl

First attempt implementing InterlockedCompareExchangeFloatBitwise



DeltaFile
+119-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchangeFloatBitwise-errors.hlsl
+43-0clang/test/CodeGenHLSL/builtins/InterlockedCompareExchangeFloatBitwise.hlsl
+42-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl
+32-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
+25-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
+10-0clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
+271-05 files not shown
+298-311 files

LLVM/project e558a48clang/lib/Sema SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl InterlockedCompareStoreFloatBitwise.hlsl

First attempt implementing InterlockedCompareStoreFloatBitwise



DeltaFile
+100-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareStoreFloatBitwise-errors.hlsl
+39-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStoreFloatBitwise-sm60.hlsl
+35-0clang/test/CodeGenHLSL/builtins/InterlockedCompareStoreFloatBitwise.hlsl
+30-0llvm/test/CodeGen/DirectX/ResourceAtomicCompareStoreFloat.ll
+27-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
+16-6clang/lib/Sema/SemaHLSL.cpp
+247-66 files not shown
+311-1012 files

LLVM/project 4e45d0cclang/include/clang/Basic Builtins.td

Remove the comment on the InterlockedCompareExchange builtin
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+0-1clang/include/clang/Basic/Builtins.td
+0-11 files

LLVM/project 2d4c772clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add InterlockedCompareExchange coverage to the texture test
DeltaFile
+5-0clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+5-01 files

LLVM/project 9fffbecclang/include/clang/Basic Builtins.td

Remove the comment on the InterlockedCompareStoreFloatBitwise builtin
DeltaFile
+0-1clang/include/clang/Basic/Builtins.td
+0-11 files

LLVM/project 35d5061clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add InterlockedCompareStoreFloatBitwise coverage to the texture test
DeltaFile
+7-0clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+7-01 files

LLVM/project f0f34c7clang/lib/Sema HLSLExternalSemaSource.cpp SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl RWByteAddressBuffer-InterlockedCompareExchange.hlsl

First attempt implementing InterlockedCompareExchange



DeltaFile
+93-81clang/lib/Sema/SemaHLSL.cpp
+113-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchange-errors.hlsl
+70-0clang/test/CodeGenHLSL/builtins/InterlockedCompareExchange.hlsl
+41-24clang/lib/Sema/HLSLExternalSemaSource.cpp
+44-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchange.hlsl
+35-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl
+396-1056 files not shown
+480-12212 files

LLVM/project 2a904a8clang/include/clang/Basic Builtins.td

Remove the comment on the InterlockedCompareStore builtin
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+0-1clang/include/clang/Basic/Builtins.td
+0-11 files

LLVM/project 2aa5cbfclang/include/clang/Basic Builtins.td, clang/lib/Sema HLSLBuiltinTypeDeclBuilder.cpp

Remove comments on the float InterlockedExchange declarations
DeltaFile
+0-3clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+0-1clang/include/clang/Basic/Builtins.td
+0-42 files

LLVM/project 01957e6clang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Sema HLSLExternalSemaSource.cpp

First attempt implementing InterlockedCompareStore
DeltaFile
+88-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareStore-errors.hlsl
+54-0clang/test/CodeGenHLSL/builtins/InterlockedCompareStore.hlsl
+45-7clang/lib/Sema/HLSLExternalSemaSource.cpp
+29-7clang/lib/CodeGen/CGHLSLBuiltins.cpp
+36-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStore.hlsl
+33-0llvm/test/CodeGen/DirectX/ResourceAtomicCompareStore.ll
+285-147 files not shown
+393-1613 files

LLVM/project b58b0f0clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add float InterlockedExchange coverage to the texture test
DeltaFile
+7-1clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+7-11 files

LLVM/project 8d1cfa9clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add InterlockedCompareStore coverage to the texture test
DeltaFile
+13-8clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+13-81 files

LLVM/project 9cb3152llvm/lib/Target/DirectX DXILResourceAccess.cpp, llvm/test/CodeGen/DirectX ResourceAtomicBinOp-texture-nonscalar.ll ResourceAtomicExchangeFloat.ll

Lower atomicrmw on scalar float texture resources
DeltaFile
+18-0llvm/test/CodeGen/DirectX/ResourceAtomicExchangeFloat.ll
+4-4llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-nonscalar.ll
+5-2llvm/lib/Target/DirectX/DXILResourceAccess.cpp
+27-63 files

LLVM/project 18aed18clang/test/SemaHLSL/BuiltIns InterlockedExchange-errors.hlsl ByteAddressBuffer-InterlockedExchangeFloat-sm60.hlsl, llvm/lib/Target/DirectX DXILResourceAccess.cpp DXILLegalizePass.cpp

First attempt implementing float InterlockedExchange
DeltaFile
+40-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedExchangeFloat-sm60.hlsl
+39-0llvm/test/CodeGen/DirectX/LegalizeAtomicExchangeFloat.ll
+38-0llvm/test/CodeGen/DirectX/ResourceAtomicExchangeFloat.ll
+21-14clang/test/SemaHLSL/BuiltIns/InterlockedExchange-errors.hlsl
+29-0llvm/lib/Target/DirectX/DXILLegalizePass.cpp
+17-3llvm/lib/Target/DirectX/DXILResourceAccess.cpp
+184-178 files not shown
+246-2814 files

LLVM/project e2ddff7llvm/lib/Target/DirectX DXILResourceAccess.cpp, llvm/test/CodeGen/DirectX ResourceAtomicCompareExchange-texture-nonscalar.ll

Reject cmpxchg on a texture with a non-scalar element type
DeltaFile
+69-0llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange-texture-nonscalar.ll
+11-3llvm/lib/Target/DirectX/DXILResourceAccess.cpp
+80-32 files

LLVM/project 71c42f8llvm/include/llvm/IR IntrinsicsDirectX.td

Drop IntrArgMemOnly from the resource atomic intrinsics

Neither intrinsic has a pointer-typed argument, so IntrArgMemOnly claims
that they access no memory at all. Omit the attribute so they keep the
conservative read-write default, as the other resource intrinsics do.
DeltaFile
+2-4llvm/include/llvm/IR/IntrinsicsDirectX.td
+2-41 files

LLVM/project dc0abebllvm/docs/CommandGuide lit.md, llvm/utils/lit/lit cl_arguments.py main.py

Revert "[lit] Add --rerun-failed-serially <REGEX> mechanism (#223504)" (#225205)

This reverts commit 49923e950b3e8f0adb693aa68b99df6a2479418b.

People reported flakyness in the LIT test for this lit change.
DeltaFile
+0-91llvm/utils/lit/tests/rerun-failed-serially.py
+2-31llvm/utils/lit/lit/main.py
+4-19llvm/utils/lit/lit/cl_arguments.py
+0-22llvm/utils/lit/tests/Inputs/rerun-failed-serially-retries/needs-four-attempts.py
+0-17llvm/utils/lit/tests/Inputs/rerun-failed-serially/fails-once.py
+0-16llvm/docs/CommandGuide/lit.md
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