LLVM/project ada3f57llvm/lib/Target/WebAssembly WebAssemblyFastISel.cpp, llvm/test/CodeGen/WebAssembly signext-inreg.ll

[WebAssembly][FastISel] Fix sext i1 to i64 with +sign-ext (#213734) (#214007)

Fixes #213734
---

## Summary

At `-O0`, WebAssembly FastISel could miscompile programs that
sign-extend an i1 value to i64 when the `+sign-ext` target feature is
enabled. The bug was introduced in LLVM 23 by the FastISel sign-ext
optimization (#179855).

For `sext i1 to i64`, FastISel fell through its switch without emitting
any instruction and returned an undefined register. Code that uses this
pattern to adjust integer division results (such as floor division)
could then compute the wrong answer. The issue reporter saw `-1` instead
of the correct `-2`.

This patch restructures `signExtend()` so i8, i16, and i32 still use

    [18 lines not shown]
DeltaFile
+14-16llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
+23-2llvm/test/CodeGen/WebAssembly/signext-inreg.ll
+37-182 files

FreeBSD/ports f510d10www/element-web Makefile distinfo

www/element-web: Update to 1.12.25

Approved by:    maintainer (implicit, version bump, as per PR 258262)
DeltaFile
+92-104www/element-web/pkg-plist
+3-3www/element-web/distinfo
+2-2www/element-web/Makefile
+97-1093 files

LLVM/project 0063c51flang/lib/Semantics check-io.cpp, flang/test/Semantics enumeration-type-io-pdt-order.f90

Corrected the recursion block to have memory, preventing exponential blowup.  I also tested this with an ad-hoc test and verified the problem and fix.
Added a couple of test cases to demonstrate that order does not prevent error detection.
DeltaFile
+60-44flang/lib/Semantics/check-io.cpp
+44-0flang/test/Semantics/enumeration-type-io-pdt-order.f90
+104-442 files

LLVM/project a2a177allvm/test/CodeGen/AMDGPU llvm.amdgcn.rsq.bf16.ll llvm.amdgcn.rcp.bf16.ll

[AMDGPU] Autogen tests with new changes

Change-Id: Id3635fa58a367495b11e98e6a2846f8994233d16
DeltaFile
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
+8-8llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
+20-202 files

LLVM/project 1fae080llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs pre-process.ll pre-process.ll.expected, llvm/utils update_llc_test_checks.py update_test_checks.py

[UTC] Support RUN lines with pre-processing for `update_analyze_test_checks` (#214046)

AI-disclaimer: created using AI, then reviewed/manually cleaned up.
DeltaFile
+12-6llvm/utils/update_analyze_test_checks.py
+1-13llvm/utils/update_test_checks.py
+14-0llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/pre-process.ll.expected
+13-0llvm/utils/UpdateTestChecks/common.py
+9-0llvm/test/tools/UpdateTestChecks/update_analyze_test_checks/Inputs/pre-process.ll
+1-7llvm/utils/update_llc_test_checks.py
+50-261 files not shown
+56-267 files

LLVM/project 4240193llvm/lib/Target/X86 X86InstrInfo.cpp, llvm/test/CodeGen/X86 remove-redundant-cmp-tzcnt-i64.ll remove-redundant-cmp-lzcnt-i64.ll

[Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (#210069)

fix #193178
relands PR #208392

`lzcnt rax, rdi`/`tzcnt rax, rdi` instruction only replaces `cmp rdi, 1`
when the next instructions are either `adc` `sbb` `rcl` or `rcr` (uses
and modifies the EFLAGS) because these use the CF Flag (same as when set
by `lzcnt` or `cmp` in this case)
DeltaFile
+202-0llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt.ll
+186-0llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt.ll
+77-0llvm/test/CodeGen/X86/remove-redundant-cmp-lzcnt-i64.ll
+74-0llvm/test/CodeGen/X86/remove-redundant-cmp-tzcnt-i64.ll
+38-1llvm/lib/Target/X86/X86InstrInfo.cpp
+577-15 files

FreeBSD/ports 733437asysutils/mdfried Makefile Makefile.crates

sysutils/mdfried: Update to 0.22.4

Reported by:    portscout!
DeltaFile
+21-17sysutils/mdfried/distinfo
+9-7sysutils/mdfried/Makefile.crates
+2-2sysutils/mdfried/Makefile
+32-263 files

FreeBSD/ports 38d3b18textproc/ugrep Makefile distinfo

textproc/ugrep: Update to 7.8.4
DeltaFile
+3-3textproc/ugrep/distinfo
+1-1textproc/ugrep/Makefile
+4-42 files

FreeBSD/ports b39679awww/bunkerweb Makefile distinfo, www/bunkerweb/files patch-src_common_core_limit_confs_http_limitconn.conf

www/bunkerweb: Update to 1.6.13

This covers the 1.6.12 and 1.6.13 releases.

Security: session fixation on login and an open redirect via the
post-login "next" parameter in the web UI, a second open redirect in
the antibot post-challenge flow, and cache deletion routes that
bypassed authorization. Biscuit token generation now binds the Host
header, client IP and username as typed terms, and adds an optional
API_ALLOWED_HOSTS allowlist. Reverse DNS results are forward-confirmed
before an IGNORE_RDNS or GREYLIST_RDNS suffix match is honored, so a
self-configured PTR record no longer bypasses blocking. ACME challenge
tokens are validated against the base64url character set, closing a
path traversal through the internal API. TOTP verification is enforced
on the exact validation endpoint instead of any path containing /totp.

New settings: REVERSE_PROXY_SSL_VERIFY and friends for upstream HTTPS
certificate verification, USE_LIMIT_REQ_GLOBAL and
LIMIT_REQ_GLOBAL_RATE for an aggregate per-service request rate,

    [19 lines not shown]
DeltaFile
+596-521www/bunkerweb/pkg-plist
+0-23www/bunkerweb/files/patch-src_common_core_limit_confs_http_limitconn.conf
+3-3www/bunkerweb/distinfo
+1-2www/bunkerweb/Makefile
+600-5494 files

LLVM/project 2ec3d71llvm/include/llvm/MC DXContainerInfo.h

[MC][DXContainer] Initialize SourceNames::Header scalar fields (#211751)

The previous constructor left these fields undefined. This updates it to
initialize the fields explicitly and switch to default constructor.
Making sure that on every use the fields are automatically initialized.
DeltaFile
+4-4llvm/include/llvm/MC/DXContainerInfo.h
+4-41 files

NetBSD/pkgsrc r3DHKAJdoc CHANGES-2026

   doc: Updated net/tailscale to 1.102.2
VersionDeltaFile
1.5000+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc W0hLUgmnet/tailscale Makefile distinfo

   tailscale: update to 1.102.2

   A regression causing incoming Tailscale Funnel connections to fail is
   resolved.
VersionDeltaFile
1.11+4-4net/tailscale/distinfo
1.28+3-3net/tailscale/Makefile
+7-72 files

LLVM/project c338734clang/lib/CodeGen TargetInfo.h, clang/lib/CodeGen/TargetBuiltins NVPTX.cpp

[LLVM] Unify atomic scope handling between LLVM and Clang (#213810)

Summary:
This PR attempts to unify the atomic scope handling between clang and
LLVM. The difficulty is that clang emits ABI-mandated integers for these
while the backends use arbitrary strings. We still want the flexibility
of these being arbitrary strings, but we should put this in a single
source of truth.

The main motivation is so IR passes can determine which scope clang used
when creating these, and so future additions all go in one place. This
was modeled after the AtomicOrdering.h file.
DeltaFile
+136-0llvm/include/llvm/TargetParser/AtomicScope.h
+59-36clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
+65-0llvm/unittests/TargetParser/AtomicScopeTest.cpp
+5-26clang/lib/CodeGen/Targets/AMDGPU.cpp
+19-12llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
+30-0clang/lib/CodeGen/TargetInfo.h
+314-7414 files not shown
+424-18520 files

LLVM/project 53dedf6llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 fmuladd-absorbed-copyable-sched-deps.ll

[SLP]Fix unscheduled-deps assert for operands of copyable user lanes

When every copyable model of an edge is skipped because the user is
itself a copyable lane, the instruction's own schedule data still
carries the def-use dependency counted by calculateDependencies. Release
it instead of returning early just because copyable data was found.

Fixes https://github.com/llvm/llvm-project/pull/213369#issuecomment-5189475412

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/214283
DeltaFile
+32-0llvm/test/Transforms/SLPVectorizer/AArch64/fmuladd-absorbed-copyable-sched-deps.ll
+6-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+38-22 files

LLVM/project 133c0d9llvm/lib/Target/RISCV RISCVInstrInfo.td

fix simm12_optional inheritance

Created using spr 1.3.8-beta.1-arichardson
DeltaFile
+1-1llvm/lib/Target/RISCV/RISCVInstrInfo.td
+1-11 files

LLVM/project 9afffc9llvm/lib/Target/AMDGPU AMDGPURegisterBankInfo.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.sqrt.bf16.ll llvm.amdgcn.log.bf16.ll

[AMDGPU][GISel] RegBankLegalize rules for BF16 variants of transcendental intrinsics (#214040)
DeltaFile
+166-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
+98-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.bf16.ll
+38-32llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+5-3llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+2-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sqrt.bf16.ll
+2-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.log.bf16.ll
+311-512 files not shown
+315-558 files

LLVM/project 0c4fda8llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ptr.ll llvm.amdgcn.permlane.ll

[AMDGPU][GlobalISel] RegBankLegalize rules for amdgcn_permlane16 (#214062)
DeltaFile
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+629-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+3-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+4,612-3,6903 files

LLVM/project 8a5bd74llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fneg.mir legalize-fabs.mir

[AMDGPU][GlobalISel] Legalize BF16 fneg and fabs (#214050)

Restore the BF16 semantic types omitted by the extended LLT migration
and preserve packed vector legalization.
DeltaFile
+112-0llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir
+112-0llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir
+3-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+227-13 files

LLVM/project 6f0763dclang/docs ReleaseNotes.md, clang/lib/Parse ParseCXXInlineMethods.cpp

[OpenACC/OpenMP/Parser] Teach ParseCXXInlineMethods about pragmas (#214259)

Both OMP and OpenACC count on being able to reach their end-annotation
token in order to properly recover from errors/leave the parser in good
shape. This works well for 'free' functions.

However, when we do a pre-parse so we can delay-evaluate member
functions, a stray end-brace can end up matching the end of the
function. As a result, the examples in the test would have that brace
ending with an EOF, which confused both of the pragma languages.

This patch teaches the ParseCXXInlineMethods functionality to ignore any
braces/etc inside of a OpenACC/OpenMP pragma for the purposes of
matching, since these shouldn't count towards that scoping anyway.

Fixes: #214195
DeltaFile
+21-0clang/lib/Parse/ParseCXXInlineMethods.cpp
+9-0clang/test/OpenMP/gh214195.cpp
+7-0clang/test/ParserOpenACC/parse-constructs.cpp
+1-0clang/docs/ReleaseNotes.md
+38-04 files

LLVM/project 957ba4clibc/shared rpc.h, libc/test/src/__support/RPC CMakeLists.txt rpc_doorbell_test.cpp

[libc] Skip the RPC doorbell interrupt when the mailbox is uninitialized (#214037)

## Overview

`rpc::Process::notify()` guards `doorbell->value` but then
unconditionally
dereferences `doorbell->mailbox`. The two are not initialized together.
The
AMDGPU offload plugin sets `value` to the address of a field in its HSA
signal,
so it is never null, while `mailbox` is that signal's
`event_mailbox_ptr`, which
is zero unless the signal is interrupt-backed:

```c++
Value   = reinterpret_cast<uint64_t *>(&Doorbell->value);
Mailbox = reinterpret_cast<uint64_t *>(Doorbell->event_mailbox_ptr);
```


    [28 lines not shown]
DeltaFile
+51-0libc/test/src/__support/RPC/rpc_doorbell_test.cpp
+10-0libc/test/src/__support/RPC/CMakeLists.txt
+3-1libc/shared/rpc.h
+64-13 files

LLVM/project be12f8ellvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 fixed-length-sve-interleave.ll sve-streaming-mode-fixed-length-interleave.ll

[AArch64] Lower fixed-length interleaved stores with SVE (#213692)

Allow uses of SVE instruction for fixed length vector interleave
intrinsic that can not be lowered through NEON.
DeltaFile
+406-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-interleave.ll
+152-0llvm/test/CodeGen/AArch64/fixed-length-sve-interleave.ll
+39-6llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+597-63 files

LLVM/project 0130acfllvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-trig.ll

[KnownFPClass] Do not propagate non-NaN through `asin` and `acos` (#213812)

`KnownFPClass` incorrectly assumed that a non-NaN input to `asin` or
`acos` implies a non-NaN result. However, both `asin` and `acos` can
return NaN from a finite input when `|x| > 1.0`, such as `asin(2.0)` or
`acos(2.0)`.

I have fixed this by removing the calls to
`Known.propagateNaN(KnownSrc)`, which incorrectly propagated that
`asin(non-NaN) == non-NaN`.

I discovered this while working on
https://github.com/llvm/llvm-project/issues/211686. The same issue was
previously noted in a post-merge review comment on
https://github.com/llvm/llvm-project/pull/190609#discussion_r3632814122

AI disclosure:
I used OpenAI Codex (GPT-5.6-sol) to help generate the test updates,
which I reviewed and tested locally.
DeltaFile
+26-3llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
+4-4llvm/test/Transforms/Attributor/nofpclass-trig.ll
+0-4llvm/lib/Support/KnownFPClass.cpp
+30-113 files

HardenedBSD/src e27e9d6libexec/rc rc.conf, libexec/rc/rc.d os-release

HBSD: Update /etc/os-release and /var/run/os-release

Now that we have completed the migration to Radicle, we need to update
the URLs and other auxiliary data in the os-release files.

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
MFC-to:         15-STABLE
DeltaFile
+4-4libexec/rc/rc.conf
+2-2libexec/rc/rc.d/os-release
+6-62 files

OpenBSD/ports TioA0PTsecurity/openssl/4.0 Makefile, security/openssl/4.0/patches patch-crypto_x509_x509_vfy_c

   openssl/4.0: plug client-side memleak

   Free bs when the OCSP basic response contains no single responses.

   I have no idea why this utterly trivial change needed almost as many lines
   of explanatory comment as it took weeks to merge it, plus a CVE on top, but
   here we are. My time's already been wasted...

   Free BS indeed: https://www.openwall.com/lists/oss-security/2026/08/05/8
VersionDeltaFile
1.1+27-0security/openssl/4.0/patches/patch-crypto_x509_x509_vfy_c
1.6+2-0security/openssl/4.0/Makefile
+29-02 files

LLVM/project 6e05112llvm/lib/Target/RISCV RISCVInstrInfoXqci.td RISCVInstrInfo.td, llvm/test/MC/RISCV tlsdesc.s rv32i-invalid.s

use simm12_optional for xqci

Created using spr 1.3.8-beta.1-arichardson
DeltaFile
+4-1llvm/lib/Target/RISCV/RISCVInstrInfo.td
+2-2llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+1-0llvm/test/MC/RISCV/tlsdesc.s
+1-0llvm/test/MC/RISCV/rv32i-invalid.s
+8-34 files

LLVM/project e920fdbutils/bazel/llvm-project-overlay/bolt BUILD.bazel

[BOLT] Build BOLT runtime with bazel (#213729)

Add bazel definitions for the BOLT instrumentation and hugify runtime
libraries.
DeltaFile
+73-0utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
+73-01 files

LLVM/project 7454858llvm/utils/gn/secondary/llvm/tools/bugpoint BUILD.gn

[GN] Remove bugpoint build

Bugpoint was removed in 9d5574dda60151dcd1eb6f315c20e4d9120596f9.

Reviewers: oontvoo

Pull Request: https://github.com/llvm/llvm-project/pull/214250
DeltaFile
+0-44llvm/utils/gn/secondary/llvm/tools/bugpoint/BUILD.gn
+0-441 files

LLVM/project a7ddd4fclang/test/CodeGen/Sparc sparc-complex-abi.c, libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy pstl.destroy.pass.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+585-0clang/test/CodeGen/Sparc/sparc-complex-abi.c
+17-323llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+305-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
+150-0libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/pstl.destroy.pass.cpp
+2,393-1,25191 files not shown
+3,624-1,68997 files

LLVM/project 6a7c334llvm/utils bugpoint_gisel_reducer.py findmisopt

[Utils] Remove bugpoint specific scripts

These scripts are specific to bupoint, which was removed in
9d5574dda60151dcd1eb6f315c20e4d9120596f9. Given they have not been updated,
it seems like no one is using them, so delete them.

Reviewers: oontvoo

Pull Request: https://github.com/llvm/llvm-project/pull/214249
DeltaFile
+0-177llvm/utils/findmisopt
+0-152llvm/utils/bugpoint_gisel_reducer.py
+0-3292 files

LLVM/project cc8e95allvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-trig.ll

[KnownFPClass] Mark cosh result as non-zero and non-subnormal (#213763)

`cosh(x)` is `>= 1.0` or NaN for all inputs. So I have marked `cosh` as
returning a value that is not-negative, not-subnormal, and not-zero.

This addresses the `cosh` portion of
https://github.com/llvm/llvm-project/issues/211686 (but not the `acos`
portion).

AI disclosure:
I used OpenAI Codex (GPT-5.6-sol) to help generate the test updates,
which I reviewed and tested locally.
DeltaFile
+5-5llvm/test/Transforms/Attributor/nofpclass-trig.ll
+4-4llvm/unittests/CodeGen/GlobalISel/KnownFPClassTest.cpp
+3-2llvm/lib/Support/KnownFPClass.cpp
+12-113 files