LLVM/project f951c8b — llvm/test/tools/llvm-mca/AArch64/Neoverse V3AE-basic-instructions.s V3-basic-instructions.s

[AArch64][Neoverse] Updating integer divisions latency/throughput (#224592)

Measured average latencies/throughput on spec intrate train data set and the result is:

Form    Divides         Mean    Median  p90     p99     Max     At minimum
W-form  955,659,771     6.12    6       7       11      12      39.5%
X-form  177,481,992     5.38    5       7       8       20      83.4%

Benchmark       W mean  X mean  Share of all divides
541.leela_r     5.90    7.81    60.1%
531.deepsjeng_r 6.09    9.42    16.8%
505.mcf_r       5.93    5.31    11.7%
502.gcc_r       7.83    5.25    7.8%
523.xalancbmk_r 9.43    5.39    3.3%
500.perlbench_r 5.26    5.37    0.2%
520.omnetpp_r   9.67    5.68    0.1%

Choose p90 as compromise regarding worst-case previous setting.
DeltaFile
+9-9llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
+9-9llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
+9-9llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
+9-9llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
+9-9llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
+9-9llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
+54-548 files not shown
+91-10714 files

LLVM/project 3d32432 — llvm/lib/Target/AArch64 AArch64.td AArch64SVEInstrInfo.td

fixup! Make predicate more condensed

Remove the sve_perm256 predicate and replace the only other predicate
using it with a more condensed one and make it capture the entire
condition.
DeltaFile
+2-4llvm/lib/Target/AArch64/AArch64InstrInfo.td
+2-2llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+1-1llvm/lib/Target/AArch64/AArch64.td
+5-73 files

LLVM/project 6248bfb — mlir/lib/Conversion/VectorToSPIRV VectorToSPIRV.cpp, mlir/test/Conversion/VectorToSPIRV vector-to-spirv.mlir

[mlir][SPIR-V] Derive Aligned memory operand for PhysicalStorageBuffer in vector.load/store (#214200)

Mirror calculateMemoryRequirements from MemRefToSPIRV.cpp, since
PhysicalStorageBuffer pointers carry no implicit alignment guarantee
DeltaFile
+61-37mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
+30-0mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
+91-372 files

LLVM/project cc081b8 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64AsmPrinter.cpp, llvm/test/CodeGen/AArch64 rcpc3.ll

[AArch64] Support FP atomic stores with memory hints

This patch extends the atomic-store-hint pseudos to accept preserved
floating-point atomic stores. It adds an FPR16 pseudo family and direct
half, bfloat, float, and double patterns for the supported addressing
modes.

The pseudos expand relaxed stores to STR and RCPC3 release and
sequentially consistent stores to STLUR, retaining memory hints without
cross-register-bank copies.
DeltaFile
+145-0llvm/test/CodeGen/AArch64/rcpc3.ll
+59-0llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+33-1llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+8-24llvm/test/CodeGen/AArch64/Atomics/aarch64-relaxed-store-hint.ll
+2-6llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-hint.ll
+0-5llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+247-361 files not shown
+251-367 files

LLVM/project 1e7631b — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrAtomics.td, llvm/test/CodeGen/AArch64 rcpc3.ll atomic-fp-cast.ll

[AArch64] Support direct RCPC3 FP atomic loads and stores

Preserve half, bfloat, float, and double atomic loads and stores
through AtomicExpand for acquire and release orderings, and preserve
sequentially consistent stores, when RCPC3 and NEON are available.

Add SelectionDAG patterns for the RCPC3 LDAPUR and STLUR operations,
including unscaled offsets, and update the existing FP lane patterns to
match the preserved floating-point atomic nodes. Targets without the
required features continue to use integer lowering.
DeltaFile
+182-0llvm/test/CodeGen/AArch64/atomic-fp-store.ll
+118-0llvm/test/CodeGen/AArch64/atomic-fp-load.ll
+65-8llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+47-5llvm/test/CodeGen/AArch64/atomic-fp-cast.ll
+20-12llvm/test/CodeGen/AArch64/rcpc3.ll
+9-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+441-256 files

LLVM/project 3afa38c — clang/lib/AST/ByteCode Interp.h Pointer.cpp, clang/test/AST/ByteCode invalid.cpp

[clang][bytecode] Reject invalid opaque pointer base conversions (#231366)

We can't reject them as they happen because that needs to work for other
tests. So reject them when computing the layout offset.
DeltaFile
+8-6clang/lib/AST/ByteCode/Pointer.cpp
+9-0clang/test/AST/ByteCode/invalid.cpp
+1-1clang/lib/AST/ByteCode/Interp.h
+18-73 files

LLVM/project 0535c11 — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp, llvm/test/CodeGen/AMDGPU amdgpu-sw-lower-lds-flat-arg-kernel-id.ll

update
DeltaFile
+4-2llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+3-1llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-flat-arg-kernel-id.ll
+7-32 files

LLVM/project 1172448 — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp

update
DeltaFile
+2-2llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+2-21 files

LLVM/project 38ce5fa — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp, llvm/test/CodeGen/AMDGPU amdgpu-sw-lower-lds-flat-arg-kernel-id.ll

[AMDGPU][SwLowerLDS] Lower non-kernels with LDS instructions and assign kernel IDs to their callers
DeltaFile
+122-84llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+152-0llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-flat-arg-kernel-id.ll
+274-842 files

LLVM/project afe497d — lldb/test/API/functionalities/process_save_core_minidump TestProcessSaveCoreMinidump.py

[lldb][test] Fix cleanup in test_save_linux_minidump_one_region (#231809)

On Windows you cannot unlink a file that is open
in something else. So we must delete lldb's target before trying to
unlink the minidump file.

Another follow up to #231448. Same thing I did to the other tests but I
missed this one.
DeltaFile
+6-1lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
+6-11 files

LLVM/project 7cdf221 — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp

update
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+1-11 files

LLVM/project a244d77 — llvm/lib/Transforms/Scalar ScalarOptions.td LoopFuse.cpp, llvm/test/Transforms/LoopFusion triple_loop_nest_inner_guard.ll sunk-phi-nodes.ll

[LoopFusion] Initial Cost Model (#224626)

Adds an initial memory-reuse profitability filter to LoopFusion as part of the effort towards #189117. The full design, evaluation, and proposed follow-up heuristics are discussed in the [RFC](https://discourse.llvm.org/t/loopfusion-initiating-a-cost-model-for-loopfusion/91859).

Fusion requires at least one cross-loop reuse at corresponding iterations, identified through either:
* a same-iteration RAW flow dependence from DependenceAnalysis
* an exact affine RAR match using the load type and SCEV start and step.

Multiple consumers of the same producer count as one reuse. The
threshold is configurable with -loop-fusion-min-reused-values; setting it to zero restores the previous unrestricted behaviour

This is intentionally a low-cost first filter rather than a complete cost model. Future work may consider vectorization compatibility, register pressure, and the strength of locality benefits.

Creation of this patch was partly assisted by AI tools.
DeltaFile
+245-0llvm/test/Transforms/LoopFusion/cost_model_rar.ll
+180-0llvm/test/Transforms/LoopFusion/cost_model_reuse.ll
+151-24llvm/lib/Transforms/Scalar/LoopFuse.cpp
+4-0llvm/lib/Transforms/Scalar/ScalarOptions.td
+1-1llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
+1-1llvm/test/Transforms/LoopFusion/sunk-phi-nodes.ll
+582-2617 files not shown
+599-4323 files

FreeNAS/freenas 57926ae — tests/api2 test_300_nfs.py

Fix api2.test_300_nfs.TestNFSops.test_nonroot_behavior
DeltaFile
+36-53tests/api2/test_300_nfs.py
+36-531 files

FreeBSD/ports 48b43e7 — biology/vcflib pkg-plist distinfo, biology/vcflib/files patch-src_zig_build.zig patch-CMakeLists.txt

biology/vcflib: Update to 1.0.15

This updates the Zig dependency to lang/zig015 and fixes the libzig.a
build from the undefined __zig_probe_stack bug. Also apply Makefile
cleanup and formatting.

Approved by:    arrowd (co-mentor)
Approved by:    makc (mentor)

(cherry picked from commit 3d63dea5e43d012cae4b303ed2498e3c2f2bec0e)
DeltaFile
+26-29biology/vcflib/Makefile
+0-31biology/vcflib/files/patch-src-zig-samples.zig
+15-9biology/vcflib/distinfo
+2-15biology/vcflib/files/patch-CMakeLists.txt
+10-0biology/vcflib/files/patch-src_zig_build.zig
+2-1biology/vcflib/pkg-plist
+55-856 files

LLVM/project cee6926 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-broadcast.ll

[LoongArch] Legalize broadcasting the first element of 256-bit vector using `xvreplve0` (#169271)
DeltaFile
+19-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+6-10llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-broadcast.ll
+25-102 files

FreeBSD/ports 3d63dea — biology/vcflib pkg-plist distinfo, biology/vcflib/files patch-src_zig_build.zig patch-CMakeLists.txt

biology/vcflib: Update to 1.0.15

This updates the Zig dependency to lang/zig015 and fixes the libzig.a
build from the undefined __zig_probe_stack bug. Also apply Makefile
cleanup and formatting.

Approved by:    arrowd (co-mentor)
Approved by:    makc (mentor)
DeltaFile
+26-29biology/vcflib/Makefile
+0-31biology/vcflib/files/patch-src-zig-samples.zig
+15-9biology/vcflib/distinfo
+2-15biology/vcflib/files/patch-CMakeLists.txt
+10-0biology/vcflib/files/patch-src_zig_build.zig
+2-1biology/vcflib/pkg-plist
+55-856 files

FreeNAS/freenas 4903047 — src/middlewared/middlewared/plugins/vm crud.py

Assign the default video model directly

## Context
`do_create` built a copy of the payload just to fill in the default `video_model`. The API model is mutable and the payload belongs to this call, so assigning the field is enough.
DeltaFile
+1-1src/middlewared/middlewared/plugins/vm/crud.py
+1-11 files

LLVM/project 4263b7b — llvm/lib/Target/LoongArch LoongArchTargetTransformInfo.h LoongArchTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/LoongArch arith-fp.ll arith-int.ll

Revert "[LoongArch] Add arithmetic instruction costs" (#231795)

Reverts llvm/llvm-project#231094. Failing on several of our buildbots
e.g. https://lab.llvm.org/buildbot/#/builders/65/builds/41776.

Failed Tests (2):
  LLVM :: Analysis/CostModel/LoongArch/arith-fp.ll
  LLVM :: Analysis/CostModel/LoongArch/arith-int.ll
DeltaFile
+0-1,161llvm/test/Analysis/CostModel/LoongArch/arith-int.ll
+0-329llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.cpp
+0-135llvm/test/Analysis/CostModel/LoongArch/arith-fp.ll
+0-7llvm/lib/Target/LoongArch/LoongArchTargetTransformInfo.h
+0-1,6324 files

LLVM/project 34aba97 — clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR][AMDGPU][SPIR-V] Complete __builtin_amdgcn_fence lowering implementation (#230829)

Emit MMRA (memory model relaxation annotations) for address space
arguments, reject unsupported scopes, translate AMDGPU scope names to
SPIR-V ones on SPIR-V targets, matching classic codegen
DeltaFile
+64-7clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+63-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-fence.hip
+33-26clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+160-333 files

LLVM/project 2ad9099 — utils/bazel/llvm-project-overlay/llvm BUILD.bazel

Remove unused ArmTargetTdFiles from bazel
DeltaFile
+0-7utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+0-71 files

LLVM/project 2d6beb4 — mlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp, mlir/test/Conversion/SPIRVToLLVM arithmetic-ops-to-llvm.mlir

[mlir][SPIR-V] Add SPIRVToLLVM conversions for SMulExtended and UMulExtended (#228052)
DeltaFile
+72-0mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
+47-0mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+119-02 files

LLVM/project add0149 — lldb/test/API/functionalities/step-avoids-no-debug TestStepNoDebug.py

[lldb][test] Narrow TestStepNoDebug.py XFAIL to dwarf and dwo (#231818)

Follow up to #230116.

These tests were xfailed due to
https://github.com/llvm/llvm-project/issues/56292, which still applies.
They pass with PDB.

Also remove the debug info types from the docstrings, they must be from
a time before we automatically ran tests with different debug info
formats.
DeltaFile
+9-6lldb/test/API/functionalities/step-avoids-no-debug/TestStepNoDebug.py
+9-61 files

LLVM/project 8ec9440 — llvm/lib/CodeGen TargetInstrInfo.cpp, llvm/lib/Target/LoongArch LoongArchFrameLowering.cpp

Address arsenm's comments
DeltaFile
+302-0llvm/test/CodeGen/RISCV/postra-sched-sanitize.mir
+79-11llvm/test/CodeGen/RISCV/postra-sched-sanitize.ll
+79-11llvm/test/CodeGen/LoongArch/postra-sched-sanitize.ll
+13-10llvm/lib/CodeGen/TargetInstrInfo.cpp
+22-1llvm/lib/Target/LoongArch/LoongArchFrameLowering.cpp
+8-8llvm/test/CodeGen/LoongArch/stack-probing-frame-setup.mir
+503-413 files not shown
+513-449 files

OPNSense/core d8f8317 — src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterController.php

firewall: Be more selective which searches get decorated as well
DeltaFile
+5-4src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterController.php
+5-41 files

FreeBSD/ports eba10e3 — finance/py-openbb-yfinance Makefile

finance/py-openbb-yfinance: fix fetch

Reported by:    fallout

(cherry picked from commit adaf5185260141a77a7e5d7b4a8e7344789f530b)
DeltaFile
+1-0finance/py-openbb-yfinance/Makefile
+1-01 files

FreeBSD/ports adaf518 — finance/py-openbb-yfinance Makefile

finance/py-openbb-yfinance: fix fetch

Reported by:    fallout
DeltaFile
+1-0finance/py-openbb-yfinance/Makefile
+1-01 files

FreeNAS/freenas e78755e — src/middlewared/middlewared/plugins nfs.py, src/middlewared/middlewared/plugins/nfs_ directories.py config.py

NAS-144443 / 28.0.0-BETA.1 / `nfs` plugin mypy (#20001)
DeltaFile
+171-237src/middlewared/middlewared/plugins/nfs_/status.py
+8-287src/middlewared/middlewared/plugins/nfs.py
+261-0src/middlewared/middlewared/plugins/nfs_/__init__.py
+73-74src/middlewared/middlewared/plugins/nfs_/debug.py
+144-0src/middlewared/middlewared/plugins/nfs_/config.py
+92-0src/middlewared/middlewared/plugins/nfs_/directories.py
+749-59811 files not shown
+849-65317 files

FreeNAS/freenas b1faf93 — src/middlewared/middlewared/test/integration/utils audit.py

Fix audit tests pagination

(cherry picked from commit 6b0b78e5d0a88e6ebdcec5565a57dee8d3ca37ec)
DeltaFile
+5-6src/middlewared/middlewared/test/integration/utils/audit.py
+5-61 files

FreeNAS/freenas 8a74039 — src/middlewared/middlewared/test/integration/utils audit.py

NAS-144456 / 28.0.0-BETA.1 / Fix audit tests pagination (#20010)

`api2.test_staticroutes.test_staticroute` and `api2.test_webshell_audit`
always fail. The reason is that they execute later in testing sequence,
and, at that point, we have more than `DEFLIMIT = 10000` audit records,
and newer records are never fetched.
DeltaFile
+5-6src/middlewared/middlewared/test/integration/utils/audit.py
+5-61 files

LLVM/project 5bdf185 — mlir/include/mlir/Remark RemarkStreamer.h, mlir/lib/Remark CMakeLists.txt RemarkStreamer.cpp

[MLIR][Remark] Report why the LLVM remark streamer could not be created

LLVMRemarkStreamer::createToFile dropped the reason it failed: a file that
could not be opened and a serializer that could not be created both turned
into a bare failure, and enableOptimizationRemarksWithLLVMStreamer failed
without a diagnostic.

- createToFile returns llvm::Expected. It opens the file with
  mlir::openOutputFile and returns its message; a serializer error is
  returned as a FileError naming the file.
- enableOptimizationRemarksWithLLVMStreamer emits the error on the context.

Assisted-by: Claude Code (Claude Opus 5.5)
DeltaFile
+30-0mlir/unittests/IR/RemarkTest.cpp
+12-15mlir/lib/Remark/RemarkStreamer.cpp
+5-2mlir/include/mlir/Remark/RemarkStreamer.h
+5-0mlir/test/Pass/remark-output-error.mlir
+1-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+1-0mlir/lib/Remark/CMakeLists.txt
+54-176 files