FreeBSD/src 6bd97e9sys/netinet sctp_syscalls.c

sctp: fix NOINET build

Reported by:            ngie
Fixes:                  454212b9718b ("sctp: fix so_proto when peeling off a socket")
MFC after:              3 days
DeltaFile
+20-1sys/netinet/sctp_syscalls.c
+20-11 files

LLVM/project 9270406llvm/lib/Target/X86 X86TargetTransformInfo.cpp, llvm/lib/Transforms/Vectorize VectorCombine.cpp

[VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (#183575)

Unless we're working with AVX512 mask predicate types, sign extending a
vXi1 comparison result back to the width of the comparison source types
is free.

VectorCombine::foldShuffleOfCastops - pass the original CastInst in the
getCastInstrCost calls to track the source comparison instruction.

Fixes #165813
DeltaFile
+12-54llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
+14-0llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+2-2llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+28-563 files

FreeBSD/ports 86c4c07databases/pgloader3 Makefile

databases/pgloader3: Unbreak with SBCL >= 2.5.11

PR:             293478
Reported by:    bob at vesterman.com
DeltaFile
+4-0databases/pgloader3/Makefile
+4-01 files

LLVM/project 4708508llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Skip last corrections and scaling for afn llvm.sqrt.f64

Device libs has a fast sqrt macro implemented this way.
DeltaFile
+180-660llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+143-625llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+23-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+22-17llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+368-1,3194 files

LLVM/project a5bbedfllvm/test/Transforms/LoopVectorize/AArch64 scalable-reductions-tf.ll

[LV] Convert test to UTC. NFC
DeltaFile
+40-16llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
+40-161 files

FreeBSD/src db16856sys/conf files, sys/dev/acpica acpivar.h

xen/acpi: implement hook to notify Xen about entering sleep state

This is required so that ACPI power-off (entering S5) works as expected, as
the ACPI PM1a and PM1b blocks might not be accessible by dom0 directly.
Additionally, Xen also needs to do cleanup before entering a sleep state,
so it needs to be notified about it.

With this patch FreeBSD dom0 now powers off the host correctly:

acpi0: Powering system off...
(XEN) [   85.686598] arch/x86/hvm/emulate.c:415:d0v0 fixup p2m mapping for page fedc6 added
(XEN) [   85.687606] arch/x86/hvm/emulate.c:415:d0v0 fixup p2m mapping for page fbc10 added
(XEN) [   85.692357] Preparing system for ACPI S5 state.
(XEN) [   85.692702] Disabling non-boot CPUs ...
(XEN) [   85.694471] Broke affinity for IRQ9, new: {0-7}
[...]
(XEN) [   85.903118] Entering ACPI S5 state.

Should be a non-functional change when not running as a Xen dom0.

    [5 lines not shown]
DeltaFile
+75-0sys/dev/xen/acpi/xen-acpi.c
+13-0sys/dev/acpica/Osd/OsdHardware.c
+13-0sys/dev/acpica/acpivar.h
+1-0sys/conf/files
+102-04 files

NetBSD/pkgsrc ctr2LpSdevel/premake5 distinfo, devel/premake5/patches patch-binmodules_luasocket_gem_myps2pdf

   premake5: fix unportable test(1) operator
VersionDeltaFile
1.1+47-0devel/premake5/patches/patch-binmodules_luasocket_gem_myps2pdf
1.5+2-1devel/premake5/distinfo
+49-12 files

LLVM/project 96a65cfllvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU rsq.f64.ll fdiv.f64.ll

AMDGPU: Skip last corrections in afn f64 reciprocal

Device libs has a fast reciprocal macro that is close
to the fast division expansion, but skips the last terms
compared to the full division.

The basic reciprocal handling has identical output to this
macro. The negative reciprocal case has different fneg placement
and smaller code size, but I believe should be the same.
DeltaFile
+32-116llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+37-7llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
+16-0llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+15-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-2llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
+0-4llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
+112-1291 files not shown
+112-1317 files

LLVM/project becbc33llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll

AMDGPU: Improve fsqrt f64 expansion with ninf

Address todo to reduce the is_fpclass check to an fcmp with 0.
DeltaFile
+52-92llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+10-6llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+7-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+3-2llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
+72-1034 files

NetBSD/pkgsrc GHk8XYvmath/py-scikit-learn Makefile

   py-scikit-learn: replace python binary name in another file

   hopefully fixes builds on confused systems with multiple pythons installed
VersionDeltaFile
1.35+2-1math/py-scikit-learn/Makefile
+2-11 files

FreeBSD/ports 3404ae2sysutils/mise distinfo Makefile

sysutils/mise: update 2026.2.19 → 2026.2.21

Reported by:    portscout
DeltaFile
+171-3sysutils/mise/distinfo
+85-1sysutils/mise/Makefile
+256-42 files

FreeBSD/ports dd463f0devel/cli11 distinfo Makefile

devel/cli11: update 2.6.1 → 2.6.2

Reported by:    portscout
DeltaFile
+3-3devel/cli11/distinfo
+2-2devel/cli11/Makefile
+5-52 files

FreeBSD/ports a6e3e54sysutils/procs distinfo Makefile

sysutils/procs: update 0.14.10 → 0.14.11

Reported by:    portscout
DeltaFile
+373-335sysutils/procs/distinfo
+186-168sysutils/procs/Makefile
+559-5032 files

FreeBSD/ports cc1c973security/tor distinfo Makefile, security/tor/files patch-doc_asciidoc-helper.sh

security/tor: update 0.4.8.22 → 0.4.9.5
DeltaFile
+6-4security/tor/files/patch-doc_asciidoc-helper.sh
+3-3security/tor/distinfo
+1-1security/tor/Makefile
+10-83 files

FreeBSD/ports 5bc5323devel/py-uv distinfo Makefile, devel/py-uv/files patch-pyproject.toml

devel/{,py-}uv: update 0.10.2 → 0.10.6
DeltaFile
+177-139devel/uv/distinfo
+87-68devel/uv/Makefile.crates
+7-6devel/py-uv/files/patch-pyproject.toml
+3-3devel/py-uv/distinfo
+1-1devel/uv/Makefile
+1-1devel/py-uv/Makefile
+276-2186 files

FreeBSD/ports 70ca4b6security/openfhe pkg-plist distinfo

security/openfhe: update 1.2.4 → 1.5.0

Reported by:    portscout
DeltaFile
+6-4security/openfhe/pkg-plist
+3-3security/openfhe/distinfo
+1-1security/openfhe/Makefile
+10-83 files

FreeBSD/ports a3772b7devel/py-uv-build distinfo Makefile, devel/py-uv-build/files patch-pyproject.toml

devel/py-uv-build: update 0.10.2 → 0.10.6
DeltaFile
+3-3devel/py-uv-build/distinfo
+2-2devel/py-uv-build/files/patch-pyproject.toml
+1-1devel/py-uv-build/Makefile
+6-63 files

FreeBSD/ports 4cf61e6math/lean4 pkg-plist, math/lean4/files patch-stage0_src_CMakeLists.txt patch-src_CMakeLists.txt

math/lean4: update 4.25.2-20251201 → 4.29.0.r2
DeltaFile
+1,130-193math/lean4/pkg-plist
+27-16math/lean4/files/patch-stage0_src_CMakeLists.txt
+27-16math/lean4/files/patch-src_CMakeLists.txt
+25-0math/lean4/files/patch-stage0_src_runtime_thread.h
+25-0math/lean4/files/patch-src_runtime_thread.h
+5-5math/lean4/files/patch-tests_lakefile.toml
+1,239-2306 files not shown
+1,252-24312 files

LLVM/project b0b3e3ellvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/RISCV reductions.ll tail-folding-cast-intrinsics.ll

[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)

After #183080 vscale can no longer be a non-power of 2, which means the
canonical IV can't overflow with tail folding w/ scalable vectors
anymore. Therefore we don't need to drop the NUW flag.

IVUpdateMayOverflow is left to be removed in a separate PR since it
removes further runtime checks.
DeltaFile
+36-36llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
+22-22llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
+18-18llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
+17-17llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
+7-25llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+14-14llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
+114-13254 files not shown
+243-26160 files

OpenBSD/ports e9NjEPzsysutils/terraform distinfo Makefile

   Update to terraform-1.14.6.
VersionDeltaFile
1.134+2-2sysutils/terraform/distinfo
1.149+1-1sysutils/terraform/Makefile
+3-32 files

OpenBSD/ports Qj7lGP7fonts/adwaita-fonts distinfo Makefile

   Update to adwaita-fonts-50.0.
VersionDeltaFile
1.3+2-2fonts/adwaita-fonts/distinfo
1.3+1-1fonts/adwaita-fonts/Makefile
+3-32 files

OpenBSD/ports fCIHANJsysutils/amazon-ssm-agent distinfo Makefile

   Update to amazon-ssm-agent-3.3.3883.0.
VersionDeltaFile
1.164+2-2sysutils/amazon-ssm-agent/distinfo
1.178+1-1sysutils/amazon-ssm-agent/Makefile
+3-32 files

OpenBSD/ports jL5blJlproductivity/libphonenumber distinfo Makefile

   Update to libphonenumber-9.0.25.
VersionDeltaFile
1.81+2-2productivity/libphonenumber/distinfo
1.92+1-1productivity/libphonenumber/Makefile
+3-32 files

HardenedBSD/src 4f80c0estand/efi/include efizfs.h, stand/efi/libefi efizfs.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+41-8stand/efi/loader/main.c
+8-11stand/efi/libefi/efizfs.c
+3-2sys/netinet/ip_divert.c
+0-2stand/efi/include/efizfs.h
+52-234 files

HardenedBSD/src 5195362stand/efi/include efizfs.h, stand/efi/libefi efizfs.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+41-8stand/efi/loader/main.c
+8-11stand/efi/libefi/efizfs.c
+3-2sys/netinet/ip_divert.c
+0-2stand/efi/include/efizfs.h
+52-234 files

HardenedBSD/src 205489fsys/contrib/dev/broadcom/brcm80211/brcmfmac cfg80211.c sdio.c, sys/contrib/dev/broadcom/brcm80211/brcmsmac main.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+28,572-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/phy/phy_n.c
+10,099-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c
+8,689-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/cfg80211.c
+8,065-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/main.c
+5,151-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c
+4,650-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/sdio.c
+65,226-0472 files not shown
+127,772-4,100478 files

HardenedBSD/ports 0fce4f7devel/gitaly distinfo, net-im/teams distinfo

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+13-13devel/gitaly/distinfo
+6-6www/gitlab/distinfo
+5-5net-im/teams/distinfo
+5-5net/gitlab-agent/distinfo
+5-5www/gitlab-pages/distinfo
+5-5www/gitlab-workhorse/distinfo
+39-396 files not shown
+48-4912 files

NetBSD/pkgsrc xkOsWgcdoc CHANGES-2026

   Updated sysutils/py-ansible-compat, sysutils/ansible-lint
VersionDeltaFile
1.1431+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc KfhxKM3sysutils/ansible-lint distinfo PLIST

   ansible-lint: updated to 26.2.0

   26.2.0

   Features

   feat: complexity[tasks] for task and handler files
   feat: adding new argument_spec rule and tests
   feat: allow users to opt into rules while still using profiles
   feat: use uv for installation and add override_version input

   Fixes

   fix: no-free-form transform parsing
   fix: make ansible-lint work with AWS CodeBuild Lambda
   fix: skip_list with sub-rules no longer skips entire rule
   fix: update pre-commit hook to support Python 3.14
   fix: respect custom yamllint config
   fix: use pip instead of uv when setup_python is false

    [5 lines not shown]
VersionDeltaFile
1.73+4-4sysutils/ansible-lint/distinfo
1.29+5-1sysutils/ansible-lint/PLIST
1.82+2-2sysutils/ansible-lint/Makefile
+11-73 files

OPNSense/plugins c8c7436www/caddy/src/opnsense/mvc/app/controllers/OPNsense/Caddy/forms dialogLayer4.xml, www/caddy/src/opnsense/mvc/app/models/OPNsense/Caddy Caddy.php Caddy.xml

www/caddy: Add Layer 4 upstream originate TLS feature (#5263)

* www/caddy: Add Layer 4 upstream originate TLS feature, which can connect to an upstream via TLS after TLS has been terminated

* Add a proper validation for OriginateTls and modernize validation logic with framework cast helpers
DeltaFile
+45-40www/caddy/src/opnsense/mvc/app/models/OPNsense/Caddy/Caddy.php
+21-15www/caddy/src/opnsense/service/templates/OPNsense/Caddy/includeLayer4
+10-0www/caddy/src/opnsense/mvc/app/controllers/OPNsense/Caddy/forms/dialogLayer4.xml
+6-1www/caddy/src/opnsense/mvc/app/views/OPNsense/Caddy/reverse_proxy.volt
+6-0www/caddy/src/opnsense/mvc/app/models/OPNsense/Caddy/Caddy.xml
+88-565 files