FreshBSD

DragonFlyBSD/src 2a1028c — contrib/binutils-2.27/bfd elf.c, contrib/binutils-2.34/bfd elf.c

2026-04-21 02:08:14 UTC by Sascha Wildner on ⎇

master

Fix some GCC 12.5 -Woverflow warnings (cast at initialization).

Delta		File
+2	-1	usr.sbin/zic/zic.c
+2	-1	contrib/binutils-2.34/bfd/elf.c
+2	-1	contrib/binutils-2.27/bfd/elf.c
+6	-3	3 files

LLVM/project 021672f — llvm/test/Transforms/LowerTypeTests x86-jumptable.ll aarch64-jumptable.ll

2026-04-21 01:53:20 UTC by Vitaly Buka via GitHub on ⎇

main

[test][LowerTypeTests] Re-generate jump table tests with --check-globals (#192734)

Debug information will be updated in the
https://github.com/llvm/llvm-project/pull/192736,
so we want to track the difference.

Delta		File
+74	-9	llvm/test/Transforms/LowerTypeTests/x86-jumptable.ll
+20	-8	llvm/test/Transforms/LowerTypeTests/aarch64-jumptable.ll
+94	-17	2 files

LLVM/project e55bc19 — lldb/source/ValueObject DILEval.cpp

2026-04-21 01:51:02 UTC by Dave Lee via GitHub on ⎇

main

[lldb] Remove unused GetDynamicOrSyntheticValue (NFC) (#193111)

Delta		File
+0	-22	lldb/source/ValueObject/DILEval.cpp
+0	-22	1 files

LLVM/project 04f3d43 — llvm/lib/CodeGen InlineSpiller.cpp LiveRangeEdit.cpp, llvm/test/CodeGen/X86/apx foldmemory.mir

2026-04-21 01:49:01 UTC by Phoebe Wang via GitHub on ⎇

main

[X86][APX] Add assert isReserved if source operand is PhysReg (#192595)

Delta		File
+112	-0	llvm/test/CodeGen/X86/apx/foldmemory.mir
+2	-0	llvm/lib/CodeGen/InlineSpiller.cpp
+2	-0	llvm/lib/CodeGen/LiveRangeEdit.cpp
+116	-0	3 files

LLVM/project 89087c3 — llvm/test/CodeGen/RISCV/rvv vitofp-sdnode.ll vfptoi-sdnode.ll

2026-04-21 01:37:32 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/nfccodegen-rename-hash-functions-in-machineblockhashinfo-for-consistency

rebase

Created using spr 1.3.7

Delta		File
+878	-428	llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
+862	-426	llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
+668	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
+619	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
+4,183	-870	30 files not shown
+6,939	-1,884	36 files

LLVM/project 1d1ec7f — llvm/test/CodeGen/RISCV/rvv vitofp-sdnode.ll vfptoi-sdnode.ll

2026-04-21 01:37:21 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/main.nfccodegen-rename-hash-functions-in-machineblockhashinfo-for-consistency

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+878	-428	llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
+862	-426	llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
+668	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
+619	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
+4,183	-870	30 files not shown
+6,939	-1,884	36 files

LLVM/project 6e63274 — llvm/test/CodeGen/RISCV/rvv vitofp-sdnode.ll vfptoi-sdnode.ll

2026-04-21 01:37:18 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/nfcmachineblockhashinfo-fork-hash_16_bytes-to-guarantee-stability

rebase

Created using spr 1.3.7

Delta		File
+878	-428	llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
+862	-426	llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
+668	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
+619	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
+4,183	-870	30 files not shown
+6,939	-1,884	36 files

LLVM/project 26ff57c — llvm/test/CodeGen/RISCV/rvv vitofp-sdnode.ll vfptoi-sdnode.ll

2026-04-21 01:37:17 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/main.nfcmachineblockhashinfo-fork-hash_16_bytes-to-guarantee-stability-1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+878	-428	llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
+862	-426	llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
+668	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
+619	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
+4,183	-870	30 files not shown
+6,939	-1,884	36 files

LLVM/project f0ab987 — llvm/test/CodeGen/RISCV/rvv vitofp-sdnode.ll vfptoi-sdnode.ll

2026-04-21 01:37:15 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/codegen-add-constexpr-and-static_assert-to-fold64to16

rebase

Created using spr 1.3.7

Delta		File
+878	-428	llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
+862	-426	llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
+668	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
+619	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
+4,183	-870	26 files not shown
+6,570	-1,882	32 files

LLVM/project 458e9c4 — llvm/lib/Target/Mips MipsDelaySlotFiller.cpp, llvm/test/CodeGen/Mips unalignedload.ll mips1-load-in-delay-slot.ll

2026-04-21 01:32:35 UTC by JaberwockySeamonstah via GitHub on ⎇

main

Prevent undefined behavior caused by combination of branch and load delay slots on MIPS1 (#185427)

Under certain conditions the LLVM `MipsDelaySlotFiller` fills a branch
delay slot with an instruction requiring a load delay slot. However the
`MipsDelaySlotFiller` does not check the filled instruction for hazard
which leads to code like this:
```asm
        beqz    $1, $BB0_5
        lbu     $2, %lo(_RNvCs5jWYnRsDZoD_3app13CONTROLLERS_A)($2)
# --- Some other instructions
$BB0_5:
        andi    $1, $2, 1
```
`lbu` got moved into the branch delay slot but has a load delay slot -
so when jumping to `$BB0_5` the value for `$2` will not be ready, which
leads to undefined behavior.

This PR suggests to declare instructions with a load delay slot to be
hazardous for the branch delay slot, only for `MIPS1`. This will prevent

    [21 lines not shown]

Delta		File
+221	-84	llvm/test/CodeGen/Mips/llvm-ir/load.ll
+225	-35	llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
+179	-32	llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+62	-6	llvm/test/CodeGen/Mips/unalignedload.ll
+61	-0	llvm/test/CodeGen/Mips/mips1-load-in-delay-slot.ll
+50	-0	llvm/test/CodeGen/Mips/gprestore.ll
+798	-157	1 files not shown
+800	-158	7 files

LLVM/project c7ed47d — llvm/lib/CodeGen MachineBlockHashInfo.cpp, llvm/lib/Target/RISCV RISCVInstrInfoP.td

2026-04-21 01:29:17 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/codegen-add-constexpr-and-static_assert-to-fold64to16

rebase

Created using spr 1.3.7

Delta		File
+225	-0	llvm/test/CodeGen/RISCV/rv64p.ll
+135	-0	llvm/test/CodeGen/RISCV/rv32p.ll
+13	-25	llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+5	-1	llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+378	-26	4 files

LLVM/project f9b5aed — clang/lib/CodeGen CGObjCMac.cpp, clang/test/CodeGenObjC objc2-constant-literals-ptrauth.m

2026-04-21 01:18:16 UTC by Akira Hatanaka via GitHub on ⎇

main

[ObjC] Fix missing ptrauth signing of isa in constant ObjC literals (#191091)

154d2267b897 added support for emitting ObjC number, array, and
dictionary literals as constants, but did not sign the class pointer
fields in NSConstantIntegerNumber, NSConstantFloatNumber,
NSConstantDoubleNumber, NSConstantArray, and NSConstantDictionary
structs with the ObjCIsaPointers ptrauth schema on arm64e. Fix this by
using addSignedPointer instead of add when emitting those fields.

rdar://174359070

Delta		File
+32	-0	clang/test/CodeGenObjC/objc2-constant-literals-ptrauth.m
+15	-5	clang/lib/CodeGen/CGObjCMac.cpp
+47	-5	2 files

LLVM/project e08c1c5 — llvm/test/CodeGen/RISCV/rvv vitofp-sdnode.ll vfptoi-sdnode.ll

2026-04-21 01:09:18 UTC by Brandon Wu via GitHub on ⎇

main

[RISCV][llvm] Support [s|u]int_to_fp and fp_to_[s|u]int for zvfbfa (#192287)

Delta		File
+878	-428	llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll
+862	-426	llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll
+369	-109	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll
+201	-73	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
+114	-2	llvm/test/CodeGen/RISCV/rvv/vitofp-constrained-sdnode.ll
+114	-2	llvm/test/CodeGen/RISCV/rvv/vfptoi-constrained-sdnode.ll
+2,538	-1,040	7 files not shown
+2,743	-1,094	13 files

LLVM/project 5fa31cb — llvm/lib/Target/RISCV RISCVInstrInfoVSDPatterns.td RISCVInstrInfoVVLPatterns.td, llvm/test/CodeGen/RISCV/rvv vfwmacc-sdnode.ll fixed-vectors-vfwmacc.ll

2026-04-21 01:08:48 UTC by Brandon Wu via GitHub on ⎇

main

[llvm][RISCV] Handle miscompile of widening fma in zvfbfa codegen (#192412)

Delta		File
+40	-40	llvm/test/CodeGen/RISCV/rvv/vfwmacc-sdnode.ll
+40	-40	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmacc.ll
+14	-10	llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
+3	-2	llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+97	-92	4 files

LLVM/project 33c5aeb — llvm/test/CodeGen/RISCV/rvv fixed-vectors-vfwadd.ll fixed-vectors-vfwsub.ll

2026-04-21 01:08:25 UTC by Brandon Wu via GitHub on ⎇

main

[RISCV][llvm] Support widening fadd, fsub and fmul codegen for zvfbfa (#192414)

Delta		File
+668	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll
+619	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwsub-sdnode.ll
+578	-4	llvm/test/CodeGen/RISCV/rvv/vfwadd-sdnode.ll
+414	-4	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll
+326	-4	llvm/test/CodeGen/RISCV/rvv/vfwmul-sdnode.ll
+3,183	-24	4 files not shown
+3,266	-301	10 files

LLVM/project acc3f73 — llvm/lib/Target/X86 X86InsertVZeroUpper.cpp X86VZeroUpper.cpp, llvm/test/CodeGen/X86 llc-pipeline-npm.ll

2026-04-21 00:58:32 UTC by Kyungtak Woo via GitHub on ⎇

main

[NewPM] Port x86-insert-vzero-upper (#181597)

Had to move X86InsertVZeroUpper to its own file like in
https://github.com/llvm/llvm-project/pull/179864
No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.

Redo of https://github.com/llvm/llvm-project/pull/180886

Delta		File
+366	-0	llvm/lib/Target/X86/X86InsertVZeroUpper.cpp
+0	-353	llvm/lib/Target/X86/X86VZeroUpper.cpp
+6	-1	llvm/lib/Target/X86/X86.h
+4	-0	llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+1	-2	llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1	-1	llvm/lib/Target/X86/X86PassRegistry.def
+378	-357	2 files not shown
+380	-359	8 files

LLVM/project 890c3fc — clang/lib/CodeGen CGObjCMac.cpp

2026-04-21 00:52:13 UTC by Akira Hatanaka via GitHub on ⎇

main

[CodeGen] NFC: Fix and improve comments in CGObjCMac.cpp (#193119)

Extract comment changes from #191091.

Delta		File
+37	-31	clang/lib/CodeGen/CGObjCMac.cpp
+37	-31	1 files

LLVM/project 125fa54 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

2026-04-21 00:45:13 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/codegen-add-constexpr-and-static_assert-to-fold64to16

rebase

Created using spr 1.3.7

Delta		File
+26,606	-0	llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078	-0	llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604	-1,567	llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0	-1,370	llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662	-662	llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291	-0	llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241	-3,599	1,092 files not shown
+63,356	-20,992	1,098 files

LLVM/project d6c5a20 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

2026-04-21 00:45:12 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/main.codegen-add-constexpr-and-static_assert-to-fold64to16

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+26,606	-0	llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078	-0	llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604	-1,567	llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0	-1,370	llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662	-662	llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291	-0	llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241	-3,599	1,092 files not shown
+63,356	-20,992	1,098 files

LLVM/project 2e1d160 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

2026-04-21 00:45:10 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/nfccodegen-rename-hash-functions-in-machineblockhashinfo-for-consistency

rebase

Created using spr 1.3.7

Delta		File
+26,606	-0	llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078	-0	llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604	-1,567	llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0	-1,370	llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662	-662	llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291	-0	llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241	-3,599	1,092 files not shown
+63,356	-20,992	1,098 files

LLVM/project 5585194 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

2026-04-21 00:45:06 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/main.nfccodegen-rename-hash-functions-in-machineblockhashinfo-for-consistency

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+26,606	-0	llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078	-0	llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604	-1,567	llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0	-1,370	llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662	-662	llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291	-0	llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241	-3,599	1,092 files not shown
+63,356	-20,992	1,098 files

LLVM/project df4dd38 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

2026-04-21 00:44:58 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/nfcmachineblockhashinfo-fork-hash_16_bytes-to-guarantee-stability

rebase

Created using spr 1.3.7

Delta		File
+26,606	-0	llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078	-0	llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604	-1,567	llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0	-1,370	llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662	-662	llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291	-0	llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241	-3,599	1,092 files not shown
+63,356	-20,992	1,098 files

LLVM/project 3afda98 — llvm/lib/Target/RISCV RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rv64p.ll rv32p.ll

2026-04-21 00:44:28 UTC by Craig Topper via GitHub on ⎇

main

[RISCV][P-ext] Remateralize pli and plui (#193110)

Test cases were written by Claude Sonnet 4.5.

Delta		File
+225	-0	llvm/test/CodeGen/RISCV/rv64p.ll
+135	-0	llvm/test/CodeGen/RISCV/rv32p.ll
+5	-1	llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+365	-1	3 files

LLVM/project 4d2df3b — llvm/utils/gn/secondary/llvm/lib/Target/AArch64 BUILD.gn

2026-04-21 00:35:36 UTC by Nico Weber via GitHub on ⎇

main

[gn] port c95a333de7108 (#193121)

Delta		File
+4	-1	llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
+4	-1	1 files

LLVM/project ad180de — clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp ItaniumMangle.cpp

2026-04-21 00:31:14 UTC by Matheus Izvekov on ⎇

users/mizvekov/fix-decltype-dependence

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.

This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.

Fixes #8740
Fixes #61818
Fixes #190388

Delta		File
+906	-175	clang/lib/AST/ASTContext.cpp
+312	-12	clang/test/SemaTemplate/instantiation-dependence.cpp
+151	-93	clang/lib/AST/ItaniumMangle.cpp
+76	-68	clang/lib/AST/Type.cpp
+76	-48	clang/lib/Sema/SemaTemplate.cpp
+95	-16	clang/include/clang/AST/ASTContext.h
+1,616	-412	83 files not shown
+2,381	-777	89 files

NetBSD/src JRhn0GQ — external/bsd/jemalloc/dist/include/jemalloc/internal quantum.h, external/bsd/jemalloc/include/jemalloc/internal quantum.h

2026-04-21 00:28:08 UTC by christos on ⎇

HEAD

   Add missing archs

Version	Delta		File
1.2	+80	-73	external/bsd/jemalloc/dist/include/jemalloc/internal/quantum.h
1.6	+7	-2	external/bsd/jemalloc/include/jemalloc/internal/quantum.h
	+87	-75	2 files

LLVM/project 0a5870d — llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

2026-04-21 00:25:59 UTC by Ziqing Luo on ⎇

users/ziqingluo/PR-172429193-2-split-1

Merge remote-tracking branch 'origin/main' into users/ziqingluo/PR-172429193-2-split-1

 Conflicts:
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.h
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
        clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
        clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp

Delta		File
+275,101	-0	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679	-0	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+57,682	-0	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+41,844	-0	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
+40,613	-0	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
+37,209	-0	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
+597,128	-0	3,037 files not shown
+986,155	-65,820	3,043 files

Linux/linux b4e0758 — kernel/trace .gitignore

2026-04-21 00:25:56 UTC by Linus Torvalds on ⎇

master

tracing: tell git to ignore the generated 'undefsyms_base.c' file

This odd file was added to automatically figure out tool-generated
symbols.

Honestly, it *should* have been just a real honest-to-goodness regular
file in git, instead of having strange code to generate it in the
Makefile, but that is not how that silly thing works.  So now we need to
ignore it explicitly.

Fixes: 1211907ac0b5 ("tracing: Generate undef symbols allowlist for simple_ring_buffer")
Cc: Vincent Donnefort <vdonnefort at google.com>
Cc: Nathan Chancellor <nathan at kernel.org>
Cc: Steven Rostedt (Google) <rostedt at goodmis.org>
Cc: Arnd Bergmann <arnd at arndb.de>
Cc: Marc Zyngier <maz at kernel.org>
Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>

Delta		File
+1	-0	kernel/trace/.gitignore
+1	-0	1 files

LLVM/project 1290b82 — clang/test/SemaCUDA float128.cu

2026-04-21 00:24:52 UTC by Pranav Kant via GitHub on ⎇

main

[test] Remove redundant typedef (#193116)

Delta		File
+0	-1	clang/test/SemaCUDA/float128.cu
+0	-1	1 files

Linux/linux f154634 — tools/testing/selftests Makefile, tools/testing/selftests/kselftest runner.sh

2026-04-21 00:19:30 UTC by Linus Torvalds on ⎇

master

Merge tag 'linux_kselftest-next-7.1-next-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest

Pull kselftest fixes from Shuah Khan:
 "Fix regressions in non-bash shells and busybox support, and revert a
  commit that regressed in build and installation when one or more tests
  fail to build.

  Fix duplicated test number reporting introduced in ktap support patch"

* tag 'linux_kselftest-next-7.1-next-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest:
  selftests: Fix duplicated test number reporting
  selftests: Fix runner.sh for non-bash shells
  selftests: Fix runner.sh busybox support
  selftests: Deescalate error reporting

Delta		File
+24	-25	tools/testing/selftests/kselftest/runner.sh
+4	-4	tools/testing/selftests/Makefile
+28	-29	2 files