FreeBSD/ports a5cf85adeskutils/qownnotes Makefile, devel/qca Makefile

security/botan3: bump consumers after update
DeltaFile
+1-1editors/encryptpad/Makefile
+1-1security/keepassxc276/Makefile
+1-1security/rnp/Makefile
+1-1devel/qca/Makefile
+1-0deskutils/qownnotes/Makefile
+1-0editors/rehex/Makefile
+6-41 files not shown
+7-47 files

FreeBSD/ports 1896733security/botan3 Makefile distinfo

security/botan3: update to 3.12.0 release (+)

Release notes:  https://botan.randombit.net/news.html#version-3-12-0-2026-05-06
DeltaFile
+3-3security/botan3/Makefile
+3-3security/botan3/distinfo
+3-0security/botan3/pkg-plist
+9-63 files

LLVM/project cfb2520clang/docs ReleaseNotes.md, clang/lib/Parse ParseDecl.cpp

[Clang] Ensure correct template parameter depth for abbreviated templates (#208699)

Fixes https://github.com/llvm/llvm-project/issues/200682
DeltaFile
+37-0clang/test/SemaTemplate/concepts-lambda.cpp
+7-1clang/lib/Parse/ParseDecl.cpp
+1-0clang/docs/ReleaseNotes.md
+45-13 files

LLVM/project f114842clang/docs ReleaseNotes.md, clang/lib/Sema SemaTemplateInstantiate.cpp

[Clang] Fix a bug in parameter mapping substitution (#208663)

When building parameter mapping, both substitution and
CheckTemplateArguments were marked as ParameterMappingSubstitution,
while CheckTemplateArguments could also substitute into default
arguments eagerly such that some type constraints were transformed too
early.

It turned out that we don't have to enforce that rebuild in
SubstTypeConstraint, so this reverts that behavior.

Fixes https://github.com/llvm/llvm-project/issues/197597
DeltaFile
+58-0clang/test/SemaTemplate/concepts-no-early-substitution.cpp
+1-1clang/lib/Sema/SemaTemplateInstantiate.cpp
+1-0clang/docs/ReleaseNotes.md
+60-13 files

LLVM/project c3cb696lldb/source/Breakpoint BreakpointResolverFileLine.cpp

[lldb] Fix data race when setting a breakpoint in mulitple debuggers. (#208485)

When you have two SBDebugger with a target for the same `a.out` and you
try to add a breakpoint at the same location.

The data race happens in `CompileUnit::GetSupportFiles()` one debugger
sees the there is no support files. it sets the parsed flag and parses
the support file. The other debugger sees the parsed flag is set and
will not set the breakpoint since the support file is still parsing and
and will assume the symbol file does not have support files.
DeltaFile
+8-5lldb/source/Breakpoint/BreakpointResolverFileLine.cpp
+8-51 files

NetBSD/pkgsrc m4aXL1bdoc CHANGES-2026

   Updated security/cargo-deny, audio/py-discid, time/py-tzdata
VersionDeltaFile
1.4381+4-1doc/CHANGES-2026
+4-11 files

NetBSD/pkgsrc CXIPziTtime/py-tzdata distinfo Makefile

   py-tzdata: updated to 2026.3

   2026.3

   Briefly:

   Alberta moved to permanent -06 on 2026-06-18. Morocco moves to permanent +00 on
   2026-09-20. More integer overflow bugs have been fixed in zic.
VersionDeltaFile
1.24+4-4time/py-tzdata/distinfo
1.27+2-2time/py-tzdata/Makefile
+6-62 files

NetBSD/pkgsrc bLG3S0Qaudio/py-discid distinfo Makefile

   py-discid: updated to 1.4.2

   Changes in 1.4.2 (2026-07-10):
   * Provide Python wheel on PyPI.
   * Removed remaining Python 2 specific code from ``util.py``.
VersionDeltaFile
1.5+4-4audio/py-discid/distinfo
1.6+2-2audio/py-discid/Makefile
+6-62 files

FreeBSD/ports 9d403aeeditors/vscode Makefile, graphics/drawio Makefile

*/*: Bump port revision after electron42 update (4ed0ee6e7044)
DeltaFile
+1-1graphics/drawio/Makefile
+1-1net-im/deltachat-desktop/Makefile
+1-1net-im/signal-desktop/Makefile
+1-0editors/vscode/Makefile
+4-34 files

FreeBSD/ports 4ed0ee6devel/electron42 distinfo Makefile.version, devel/electron42/files patch-electron_script_lib_utils.js

devel/electron42: Update to 42.6.1

Changelog: https://github.com/electron/electron/releases/tag/v42.6.1

Reported by:    GitHub (watch releases)
DeltaFile
+5-5devel/electron42/distinfo
+2-2devel/electron42/files/patch-electron_script_lib_utils.js
+1-1devel/electron42/Makefile.version
+0-1devel/electron42/files/packagejsons/package.json
+0-1devel/electron42/files/packagejsons/yarn.lock
+8-105 files

NetBSD/pkgsrc C6ThQI7security/cargo-deny distinfo cargo-depends.mk

   cargo-deny: updated to 0.20.2

   0.20.2
   Fixed
   - fixed snapshot filenames on Windows which caused the release binary publish to fail...again.

   0.20.1
   Fixed
   - fixed snapshot filenames on Windows which caused the release binary publish to fail.

   0.20.0
   Changed
   - refactored the CLI, moving some duplicated options/flags into the root and removing several deprecated options/flags/values. See the PR for a full list of changes.

   Added
   - resolved 873 by adding a new [`bans.std-replacements`](https://embarkstudios.github.io/cargo-deny/checks/bans/cfg.html#the-std-replacements-field-optional) lint which checks the graph for crates.io sourced crates that have been partially or fully replaced in `std` and/or `core`.

   Fixed
   - resolved 765 by respecting non-default build script paths in manifests.
   - resolved 874 by cleaning up the CLI, deduplicating some options/flags that caused bug in the `list` subcommand.
VersionDeltaFile
1.3+13-19security/cargo-deny/distinfo
1.3+3-5security/cargo-deny/cargo-depends.mk
1.3+2-2security/cargo-deny/Makefile
+18-263 files

NetBSD/pkgsrc BIL0R1Jdoc CHANGES-2026

   doc: Updated audio/kew to 4.1.8
VersionDeltaFile
1.4380+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 3KRXoskaudio/kew distinfo Makefile

   kew: update to 4.1.8

   Fixes end of list crash on Ubuntu/Wezterm
VersionDeltaFile
1.23+4-4audio/kew/distinfo
1.26+2-2audio/kew/Makefile
+6-62 files

LLVM/project fcf7f6eorc-rt/include/orc-rt-c config.h.in Logging.h, orc-rt/lib/executor Logging.cpp

[orc-rt] Rename the "disable logging" level from "none" to "off" (#208697)

Rename ORC_RT_LOG_LEVEL_NONE to ORC_RT_LOG_LEVEL_OFF. The old name
collided with the "none" backend (a different mechanism) and could be
misread as "no filtering" rather than "no output"; "off" avoids both
issues.
DeltaFile
+2-2orc-rt/test/unit/LoggingTest.cpp
+2-2orc-rt/include/orc-rt-c/config.h.in
+1-1orc-rt/include/orc-rt-c/Logging.h
+1-1orc-rt/lib/executor/Logging.cpp
+6-64 files

LLVM/project 2ad788bclang/lib/Headers acev1intrin.h, clang/test/CodeGen/X86 ace-api.c

[X86][ACE] Add x86_bsr type and Block Scale Register support

This patch adds comprehensive support for the Block Scale Register (BSR),
a 1024-bit architectural register used by ACE (AI Compute Extensions) for
storing scale factors in mixed-precision matrix operations.

- Add x86_bsr as an IR type and update similar to x86_amx

Intrinsics Infrastructure:
- Add x86_bsr intrinsics in IntrinsicsX86.td:
  - bsrmovf: Store both halves to hardware BSR
  - bsrmovh_set/bsrmovl_set: Store individual halves
  - bsrmovh_get/bsrmovl_get: Read individual halves
  - bsr_create: Create x86_bsr from two 512-bit vectors
  - Conversion intrinsics between x86_bsr and vector types

X86 Backend:
- Add X86LowerBSRType pass to lower x86_bsr SSA values to implicit
  hardware register operations (similar to X86LowerAMXType)

    [7 lines not shown]
DeltaFile
+373-0llvm/lib/Target/X86/X86LowerBSRType.cpp
+239-5clang/lib/Headers/acev1intrin.h
+176-0llvm/test/CodeGen/X86/ACE/ace-internal-intrinsics.ll
+97-23llvm/include/llvm/IR/IntrinsicsX86.td
+87-0clang/test/CodeGen/X86/ace-api.c
+36-36llvm/test/Instrumentation/Instrumentor/load_store_noreplace.ll
+1,008-6455 files not shown
+1,442-27161 files

LLVM/project 345c306llvm/test/CodeGen/AMDGPU llvm.exp10.f64.ll llvm.exp.f64.ll, llvm/test/CodeGen/AMDGPU/GlobalISel sdiv.i64.ll srem.i64.ll

AMDGPU/GlobalISel: Switch RegBankLegalize lowering to extended LLTs

Stop using LLT::scalar for lowering in AMDGPURegBankLegalizeHelper
Affects integer lowering code for RegBankLLTMappingApplyID and
custom cpp for LoweringMethodID.
DeltaFile
+2,694-1,347llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
+2,478-1,239llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
+2,422-1,211llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
+2,186-1,321llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
+2,168-1,313llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
+1,874-1,554llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
+13,822-7,985207 files not shown
+39,447-24,886213 files

FreeNAS/freenas 4e7aec2src/middlewared/middlewared/pytest/unit/plugins/pool test_validate_topology.py

Fix ruff check
DeltaFile
+2-1src/middlewared/middlewared/pytest/unit/plugins/pool/test_validate_topology.py
+2-11 files

LLVM/project b6d22bcclang/include/clang/Driver CommonArgs.h, clang/lib/Driver/ToolChains CommonArgs.cpp AMDGPU.cpp

clang/AMDGPU: Fix double linking opencl libs with --libclc-lib

Noticed by inspection. If using an explicit --libclc-lib flag,
do not attempt to also link the rocm device libs which will contain
different implementations of the same opencl symbols.

Co-Authored-By: Claude <noreply at anthropic.com>
DeltaFile
+8-7clang/lib/Driver/ToolChains/CommonArgs.cpp
+9-0clang/test/Driver/opencl-libclc.cl
+5-1clang/include/clang/Driver/CommonArgs.h
+2-1clang/lib/Driver/ToolChains/AMDGPU.cpp
+24-94 files

LLVM/project c8c8f71clang/lib/Driver/ToolChains AMDGPU.cpp HIPAMD.cpp

clang/AMDGPU: Merge toolchain subclasses

Simplify the toolchain implementations by collapsing
them into one. Previously we had a confusing split. The
AMDGPUToolChain base class implemented much of the base
support. It was subclassed by ROCMToolChain, which would
have been more accurately described as the offloading subclass.

That was further subclassed into HIP and OpenMP specific subclasses.
Deleting those two is the important part of this change. There was
code duplication, and features arbitrarily handled in one but not
the other. The offload kind is passed in almost everywhere if you
really need to know the original language. However, I consider
this an antifeature, and it is really poor QoI to have the HIP
and OpenMP toolchains behave differently in any way. The platform
should be consistent and the driver behaviors should not depend
on the language.

There is additional mess in the handling of spirv, which this

    [9 lines not shown]
DeltaFile
+281-125clang/lib/Driver/ToolChains/AMDGPU.cpp
+2-211clang/lib/Driver/ToolChains/HIPAMD.cpp
+0-94clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
+53-23clang/lib/Driver/ToolChains/AMDGPU.h
+0-68clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
+1-55clang/lib/Driver/ToolChains/HIPAMD.h
+337-5764 files not shown
+362-59110 files

LLVM/project b605242clang/lib/Driver/ToolChains AMDGPU.cpp, clang/test/Driver amdgpu-openmp-gpu-max-threads-per-block.c

clang/AMDGPU: Remove driver restriction on --gpu-max-threads-per-block

Previously this flag was only handled for HIP, and would produce an unused
argument warning. There is a custom warning produced by cc1 that the
argument isn't supported, but practically speaking that was unreachable
due to not forwarding the argument. Also add a test for the untested warning.
Also use a simpler method for forwarding the flag to cc1.
DeltaFile
+14-0clang/test/Frontend/openmp-warn-gpu-max-threads-per-block.c
+2-8clang/lib/Driver/ToolChains/AMDGPU.cpp
+6-0clang/test/Driver/amdgpu-openmp-gpu-max-threads-per-block.c
+22-83 files

LLVM/project 9992792llvm/test/CodeGen/AMDGPU llvm.exp10.f64.ll llvm.exp.f64.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-sdiv.mir legalize-udiv.mir

AMDGPU/GlobalISel: Switch legalizer custom lowering to extended LLTs

Stop using LLT::scalar in custom lowering in AMDGPULegalizerInfo.
The exception is S1 since it seems to work fine.
Does not change legalizer actions. In general this is intended as a
mechanical step in amdgpu's switch to extended LLTs, just try to
avoid LLT::scalar in instructions generated after IRtranslator,
since it seems like a step in the right direction. Some tests remove
-global-isel-abort=2 since GIM_SwitchType no longer fails on
LLT::scalar. Exposes a couple of new failures with 16bit bitcast.
DeltaFile
+7,518-3,753llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
+6,870-3,429llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
+6,643-3,290llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
+4,890-2,337llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+3,044-3,044llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
+2,912-2,912llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
+31,877-18,765260 files not shown
+89,724-60,871266 files

OPNSense/src c579a84share/man/man9 mbuf.9, sys/netinet ip_fastfwd.c ip_input.c

Revert "ip: improve deferred computation of checksums"

This reverts commit bba71b3f7c1561fd40d279001536540f43c707c4.

PR: https://github.com/opnsense/src/issues/294
DeltaFile
+9-23sys/netinet/ip_fastfwd.c
+0-6sys/netinet/ip_input.c
+2-3share/man/man9/mbuf.9
+11-323 files

LLVM/project 0ea6d9dllvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Extend wave reduction intrinsics to Pre-gfx8 (#208071)

Add support for gfx6/7 families.
These subtargets don't support 64-bit Scalar Compares
or S_MUL_HI_U32. Added workarounds for these where
they come up in the code path.
DeltaFile
+666-58llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+627-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+576-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+520-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+3,377-824 files not shown
+4,875-9010 files

LLVM/project 68e1d0corc-rt/include/orc-rt-c Logging.h config.h.in, orc-rt/lib/executor Logging.cpp CMakeLists.txt

[orc-rt] Add backend-independent category and level APIs to Logging.h (#208696)

Add orc_rt_log_Category_getName, orc_rt_log_Level_getName, and
orc_rt_log_Level_parse. These are independent of the logging backend and
will be used by the printf backend and by upcoming test tools.
DeltaFile
+57-0orc-rt/lib/executor/Logging.cpp
+53-1orc-rt/test/unit/LoggingTest.cpp
+34-0orc-rt/include/orc-rt-c/Logging.h
+2-0orc-rt/include/orc-rt-c/config.h.in
+1-0orc-rt/lib/executor/CMakeLists.txt
+147-15 files

LLVM/project de16400clang/lib/Headers acev1intrin.h, clang/test/CodeGen/X86 ace-api.c

[X86][ACE] Add x86_bsr type and Block Scale Register support

This patch adds comprehensive support for the Block Scale Register (BSR),
a 1024-bit architectural register used by ACE (AI Compute Extensions) for
storing scale factors in mixed-precision matrix operations.

- Add x86_bsr as an IR type and update similar to x86_amx

Intrinsics Infrastructure:
- Add x86_bsr intrinsics in IntrinsicsX86.td:
  - bsrmovf: Store both halves to hardware BSR
  - bsrmovh_set/bsrmovl_set: Store individual halves
  - bsrmovh_get/bsrmovl_get: Read individual halves
  - bsr_create: Create x86_bsr from two 512-bit vectors
  - Conversion intrinsics between x86_bsr and vector types

X86 Backend:
- Add X86LowerBSRType pass to lower x86_bsr SSA values to implicit
  hardware register operations (similar to X86LowerAMXType)

    [7 lines not shown]
DeltaFile
+373-0llvm/lib/Target/X86/X86LowerBSRType.cpp
+239-5clang/lib/Headers/acev1intrin.h
+176-0llvm/test/CodeGen/X86/ACE/ace-internal-intrinsics.ll
+97-23llvm/include/llvm/IR/IntrinsicsX86.td
+87-0clang/test/CodeGen/X86/ace-api.c
+36-36llvm/test/Instrumentation/Instrumentor/load_store.ll
+1,008-6455 files not shown
+1,442-27161 files

LLVM/project 7fcfcf1openmp/runtime/src ompt-general.cpp

[OpenMP] Use secure_getenv when read OMPT library path (#208652)

An internal review flagged the use of `getenv` when reading the OMPT
tool library path from the environment and passing it to the loader as a
potential vuln.

This patch replaces the use of getenv in question with the use of
secure_getenv on glibc platforms.
On non glibc platforms, no change is implemented.
DeltaFile
+7-1openmp/runtime/src/ompt-general.cpp
+7-11 files

LLVM/project 7b60771llvm/test/CodeGen/AMDGPU/GlobalISel legalize-llvm.amdgcn.image.sample.a16.ll irtranslator-call.ll

AMDGPU/GlobalISel: Switch CallLowering to extended LLTs

Stop using LLT::scalar for argument lowering in AMDGPUCallLowering.
Mostly straightforward, worth noting that some places now require
a bitcast between integer and float.
DeltaFile
+2,670-1,990llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
+927-925llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
+909-723llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
+675-766llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
+488-488llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+470-469llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
+6,139-5,361144 files not shown
+11,007-11,784150 files

LLVM/project 15eeda4llvm/test/CodeGen/AMDGPU llvm.exp10.f64.ll llvm.exp.f64.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-llvm.amdgcn.image.sample.a16.ll legalize-store-global.mir

AMDGPU/GlobalISel: Switch to extended LLTs

IRtranslator now translates bfloat. Switch tablegen to use extendedLLTs.
Around 300 regression tests fail to inst-select because GIM_SwitchType
does not accept LLT::scalar. Around 100 mir inst select tests had input
updated to i32/f32 and select successfully. Then there are 24 various
crashes, mostly combiner or machine-verifier, those tests are disabled.

Most problems come from mixing s32 with i32/f32 and the way operator==
works with extendedLLTs compared to GIM_SwitchType.
In general, for inst-select fixes, I think it would be best to avoid
explicit use of LLT::scalar in lowering to avoid mixing it with
LLT::integer/LLT::float See inst-select-extendedLLTs.mir and
inst-select-extendedLLTs-err.mir.
DeltaFile
+5,524-11,062llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
+5,056-10,126llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
+4,877-9,819llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
+5,052-5,052llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
+4,710-4,710llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
+3,093-5,580llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+28,312-46,349685 files not shown
+170,777-238,706691 files

OpenBSD/ports eVjReVidevel/py-cffi distinfo Makefile, devel/py-cffi/pkg PLIST

   update to py3-cffi-2.1.0
VersionDeltaFile
1.18+7-1devel/py-cffi/pkg/PLIST
1.14+2-2devel/py-cffi/distinfo
1.36+1-2devel/py-cffi/Makefile
+10-53 files

FreeNAS/freenas d728a48src/middlewared/middlewared/api/v25_10_0 nvmet_subsys.py, src/middlewared/middlewared/api/v25_10_1 nvmet_subsys.py

Fix nvmet defaults

(cherry picked from commit 74fbdcdb8c5f92e6ba726d3ed54876dee9a67847)
DeltaFile
+12-4src/middlewared/middlewared/api/v25_10_1/nvmet_subsys.py
+12-4src/middlewared/middlewared/api/v25_10_2/nvmet_subsys.py
+12-4src/middlewared/middlewared/api/v25_10_0/nvmet_subsys.py
+12-4src/middlewared/middlewared/api/v25_10_3/nvmet_subsys.py
+12-4src/middlewared/middlewared/api/v26_0_0/nvmet_subsys.py
+60-205 files