LLVM/project 3e7af90llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize tail_fold_uncountable_exits.ll early_exit_with_stores.ll

Don't unwrap the freeze, copy it over in side effect early exit loops
DeltaFile
+27-27llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+12-12llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
+8-8llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
+8-8llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
+6-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+2-2llvm/test/Transforms/LoopVectorize/tail_fold_uncountable_exits.ll
+63-632 files not shown
+67-678 files

FreeNAS/freenas fa22bdcsrc/middlewared/middlewared/apps file_app.py, src/middlewared/middlewared/plugins/test pipes.py

NAS-143782 / 26.0.0 / Report a failed job on `/_download` instead of an empty 200 (by themylogin) (#19718)
DeltaFile
+101-0tests/api2/test_download.py
+41-20src/middlewared/middlewared/apps/file_app.py
+25-1src/middlewared/middlewared/plugins/test/pipes.py
+167-213 files

FreeNAS/freenas 6d6ed8etests/api2 test_replication_concurrency.py

NAS-143644 / 26.0.0 / Test that multiple `replication.run_run_onetime` jobs submitted at once work properly (by themylogin) (#19719)
DeltaFile
+78-0tests/api2/test_replication_concurrency.py
+78-01 files

LLVM/project e78970fllvm/lib/Target/AMDGPU AMDGPU.td VOP3Instructions.td, llvm/test/MC/AMDGPU gfx13_asm_vop3_err-fake16.s gfx13_asm_vop3_err.s

[AMDGPU] MC support for v_wave_match_b32 on gfx13 (#223360)
DeltaFile
+45-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+45-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+37-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
+30-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_err-fake16.s
+11-0llvm/lib/Target/AMDGPU/VOP3Instructions.td
+5-0llvm/lib/Target/AMDGPU/AMDGPU.td
+173-06 files

LLVM/project 1e6a620llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86/avx512-shuffles shuffle-chained-bf16.ll

Make extract vector for bf16 types legal (#222913)

Fixes #222585

Makes EXTRACT_SUBVECTOR legal for bf16 types leading to this new codegen
```asm
# $ ./build/bin/clang test.c -O3 -march=novalake -mprefer-vector-width=512 -ffast-math -S -o -
foo:
        vmovups (%rsi), %zmm0
        vmulph  (%rdi), %zmm0, %zmm0
        vextractf64x4   $1, %zmm0, %ymm1
        vaddph  %zmm1, %zmm0, %zmm0
        vextractf128    $1, %ymm0, %xmm1
        vaddph  %xmm1, %xmm0, %xmm0
        vshufpd $1, %xmm0, %xmm0, %xmm1         # xmm1 = xmm0[1,0]
        vaddph  %xmm1, %xmm0, %xmm0
        vmovshdup       %xmm0, %xmm1            # xmm1 = xmm0[1,1,3,3]
        vaddph  %xmm1, %xmm0, %xmm0
        vpsrld  $16, %xmm0, %xmm1

    [19 lines not shown]
DeltaFile
+2-22llvm/test/CodeGen/X86/avx512-shuffles/shuffle-chained-bf16.ll
+1-0llvm/lib/Target/X86/X86ISelLowering.cpp
+3-222 files

LLVM/project 492410dclang/include/clang/Basic TargetID.h, clang/lib/Basic TargetID.cpp

Reapply "clang: Use TargetID parsing from AMDGPUTargetParser" (#213824) (#213847)

This reverts commit 8f82ba2c79f4e6a69a884cc9e19bd0b8c0bbe932.

Clang subarch patches have landed, so the prematurely build bots should be OK now.
DeltaFile
+30-167clang/lib/Basic/TargetID.cpp
+61-64clang/lib/Driver/ToolChains/AMDGPU.cpp
+39-42clang/lib/Driver/OffloadBundler.cpp
+10-34clang/include/clang/Basic/TargetID.h
+25-18clang/lib/Basic/Targets/AMDGPU.cpp
+20-14clang/lib/Basic/Targets/AMDGPU.h
+185-3397 files not shown
+256-38113 files

LLVM/project c6ec955llvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/test/CodeGen/AArch64 wineh-async-eh-pad-instr-size.ll

[TargetInstrInfo] Disable size verification for EH_LABEL (#223641)

EH_LABEL may produce a nop if using async exceptions and followed
by a trapping instruction.

Suppress the verification error until the incorrect size reporting
is fixed.
DeltaFile
+34-0llvm/test/CodeGen/AArch64/wineh-async-eh-pad-instr-size.ll
+3-0llvm/include/llvm/CodeGen/TargetInstrInfo.h
+37-02 files

LLVM/project 3d2514fllvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp

[NFC][LLVM][AArch64TTI] Remove redundant type checking of convert_to_svbool operand. (#222945)
DeltaFile
+4-6llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+4-61 files

FreeNAS/freenas be97464tests/api2 test_job_result.py

Test the client does not hang when it is given `job=True` for a non-job
DeltaFile
+14-0tests/api2/test_job_result.py
+14-01 files

FreeBSD/doc 6a1f4b5website/content/en/cgi man.cgi

add manual pages for macOS 27.0
DeltaFile
+3-2website/content/en/cgi/man.cgi
+3-21 files

LLVM/project fe47933llvm/docs LangRef.md, llvm/include/llvm/Support CodeGen.h

IR: Introduce "exception-model" module flag (#220052)

Add an "exception-model" IR module flag intended to replace
TargetOptions::ExceptionModel, such that the ABI is fully
computable from the IR alone. Add the basic documentation and
verifier/linker tests, but doesn't wire up the consumers.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+49-0llvm/include/llvm/Support/CodeGen.h
+44-0llvm/docs/LangRef.md
+43-0llvm/test/Assembler/module-flags-exception-model.ll
+37-0llvm/test/Verifier/module-flags-exception-model.ll
+28-0llvm/test/Linker/module-flags-exception-model.ll
+11-0llvm/lib/IR/Verifier.cpp
+212-011 files not shown
+248-1517 files

LLVM/project f215866llvm/lib/Transforms/Scalar LICM.cpp, llvm/test/Transforms/LICM promote-single-thread.ll

LICM: Drop -licm-force-thread-model-single in favor of the module flag (#223158)

Now that the threading model is carried by the "thread-model" IR module
flag, the hidden -licm-force-thread-model-single override is redundant: a test
can select the single-threaded model by setting the module flag directly.
isThreadLocalObject reads only Module::getThreadModel.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+1-5llvm/lib/Transforms/Scalar/LICM.cpp
+3-1llvm/test/Transforms/LICM/promote-single-thread.ll
+3-0llvm/test/Transforms/LICM/Inputs/thread-model-single.ll
+7-63 files

LLVM/project 16449e7llvm/lib/Target/SPIRV SPIRVNonSemanticDebugInfo200.h SPIRVNonSemanticDebugInfo200.cpp

[reviews] Simplify nested namespaces.
DeltaFile
+2-6llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugInfo200.h
+2-6llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugInfo200.cpp
+2-6llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+6-183 files

LLVM/project 3ac6885llvm/test/Transforms/LoopVectorize fmin-without-fast-math-flags.ll epilog-vectorization-fmaxnum-reductions.ll, llvm/test/Transforms/LoopVectorize/AArch64 fmax-without-fast-math-flags.ll

Remove VPInstruction::usesFirstLaneOnly change

InstCombine will canonicalize this anyway https://godbolt.org/z/r7PsGxh6G
DeltaFile
+66-29llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
+51-24llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
+43-20llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags-interleave.ll
+42-20llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
+33-15llvm/test/Transforms/LoopVectorize/epilog-vectorization-fmaxnum-reductions.ll
+22-10llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
+257-1183 files not shown
+290-1409 files

LLVM/project 791fec8llvm/test/CodeGen/AMDGPU merge-m0.mir

review: fix test
DeltaFile
+12-28llvm/test/CodeGen/AMDGPU/merge-m0.mir
+12-281 files

LLVM/project 96ecbc9llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp

Fix build error after rebase.
DeltaFile
+2-1llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+2-11 files

LLVM/project 1232d0ellvm/lib/Target/AArch64 AArch64SVEInstrInfo.td AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-fp-constrained-intrinsics.ll

[LLVM][CodeGen][SVE] Add isel for constrained cast operations. (#221976)

Implements lowering for constrained variants of fpext, fptosi, fptoui,
fptrunc, rint, sitofp and uitofp. Support covers scalable vectors of
half, float and double element type, with bfloat support due in a
follow-up PR.
DeltaFile
+368-9llvm/test/CodeGen/AArch64/sve-fp-constrained-intrinsics.ll
+56-38llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+8-8llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+432-553 files

FreeNAS/freenas 76e8614tests/api2 test_replication_concurrency.py

Test that multiple `replication.run_run_onetime` jobs submitted at once work properly

(cherry picked from commit 913bf40a62ec1f70c1f045610701a8329bfdc73c)
DeltaFile
+78-0tests/api2/test_replication_concurrency.py
+78-01 files

FreeNAS/freenas 03d1124tests/api2 test_replication_concurrency.py

NAS-143644 / 27.0.0-BETA.1 / Test that multiple `replication.run_run_onetime` jobs submitted at once work properly (#19715)
DeltaFile
+78-0tests/api2/test_replication_concurrency.py
+78-01 files

LLVM/project e5f0af8llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp SPIRVNonSemanticDebugInfo200.cpp, llvm/test/CodeGen/SPIRV/debug-info debug-expression-extra-ops-200.ll debug-declare-expression-unsupported-200.ll

[SPIR-V] Emit extra DebugExpression ops under NonSemantic.Shader.DebugInfo.200

Map DWARF ops beyond Fragment only when -spirv-nonsemantic-debug-info-version=200.
DeltaFile
+194-0llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugInfo200.h
+159-0llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugInfo200.cpp
+38-17llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+53-0llvm/test/CodeGen/SPIRV/debug-info/debug-expression-operations-200.ll
+44-0llvm/test/CodeGen/SPIRV/debug-info/debug-declare-expression-unsupported-200.ll
+42-0llvm/test/CodeGen/SPIRV/debug-info/debug-expression-extra-ops-200.ll
+530-172 files not shown
+536-208 files

NetBSD/src X2vu3GVsys/compat/linux/arch/alpha linux_syscallargs.h, sys/compat/linux/arch/arm linux_systrace_args.c linux_syscallargs.h

   regen
VersionDeltaFile
1.102+8-3sys/compat/linux/arch/powerpc/linux_syscallargs.h
1.96+8-3sys/compat/linux/arch/mips/linux_syscallargs.h
1.123+8-3sys/compat/linux/arch/m68k/linux_syscallargs.h
1.100+8-3sys/compat/linux/arch/arm/linux_syscallargs.h
1.126+8-3sys/compat/linux/arch/alpha/linux_syscallargs.h
1.33+4-4sys/compat/linux/arch/arm/linux_systrace_args.c
+44-1915 files not shown
+69-4421 files

NetBSD/src 2BStfqIsys/compat/linux/arch/alpha syscalls.master, sys/compat/linux/arch/arm syscalls.master

   Propagate writev changes that started in amd64 fixing behaviour when iovcnt=0
VersionDeltaFile
1.113+3-3sys/compat/linux/arch/alpha/syscalls.master
1.91+2-2sys/compat/linux/arch/powerpc/syscalls.master
1.86+2-2sys/compat/linux/arch/mips/syscalls.master
1.110+2-2sys/compat/linux/arch/m68k/syscalls.master
1.87+2-2sys/compat/linux/arch/arm/syscalls.master
+11-115 files

LLVM/project 36ef642llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.h SPIRVNonSemanticDebugHandler.cpp

[review] Simplify code.
DeltaFile
+14-17llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+0-2llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+14-192 files

LLVM/project 680c2efllvm/test/Transforms/LoopVectorize predicated-early-exits-interleave.ll predicated-multiple-exits.ll

[VPlan] Use frozen combined condition in early exit first-active-lane

Combined is used both to compute if an early exit was taken via VPInstruction::AnyOf, as well as the index of the early-exited lane in VPInstruction::FirstActiveLane.

Combined can have poison lanes past the exited lane, so the AnyOf uses freeze to prevent branching on poison. However FirstActiveLane on a vector with a poison lane is poison, so we need to also use the frozen version of Combined to prevent poison there.
DeltaFile
+32-32llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
+24-24llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
+14-14llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
+12-12llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
+10-10llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
+6-6llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
+98-9817 files not shown
+144-14223 files

LLVM/project 2357e86llvm/test/Transforms/LoopVectorize/AArch64 early_exit_costs.ll

Fix early_exit_costs.ll test
DeltaFile
+2-2llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
+2-21 files

LLVM/project f9ef625llvm/lib/Transforms/Vectorize VPlanConstruction.cpp, llvm/test/Transforms/LoopVectorize single-early-exit-anyof-fold.ll

Remove FIXME
DeltaFile
+3-6llvm/test/Transforms/LoopVectorize/single-early-exit-anyof-fold.ll
+1-1llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+4-72 files

LLVM/project cb77cb4llvm/test/Transforms/LoopVectorize single-early-exit-anyof-fold.ll

Precommit test
DeltaFile
+54-0llvm/test/Transforms/LoopVectorize/single-early-exit-anyof-fold.ll
+54-01 files

LLVM/project 2dd4ebbllvm/test/Transforms/LoopVectorize fcmp-uno-fold-interleave.ll, llvm/test/Transforms/LoopVectorize/AArch64 fmax-without-fast-math-flags.ll cmp_cost.ll

[VPlan] Fix VPInstruction::AnyOf combine undoing freeze

There is an any-of combine for unrolled VPlans which does:

    any-of (fcmp uno A, A), (fcmp uno B, B), ...-> any-of (fcmp uno A, B)

However any-of implicitly freezes each individual operand and this means we go from `freeze (fcmp uno A, A)` to `freeze (fcmp uno A, B)` which isn't sound: alive2.llvm.org/ce/z/UdQM7C

This causes miscompiles today with early exit loops, see the attached test case in single-early-exit-anyof-fold.ll.

This fixes it by explicitly modelling the freeze in VPlan. There are three places where we use AnyOf:

1) early exit loops: the freeze needs to be applied per-lane, so apply it to `(any-of (freeze (combined-conds-to-exit)))`
2) handleMaxMinNumReductions: If any lane of the reduction was poison in the scalar loop, the final result will be poison. We only need to freeze the result of AnyOf to prevent immediate UB when branching. Freezing individual operands blocks the any-of combine otherwise.
3) handleFindLastReductions: we need to freeze Cond itself since it's got multiple uses, but I plan on fixing this in a separate PR
DeltaFile
+51-48llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
+32-36llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
+35-31llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
+28-32llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
+31-27llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
+30-27llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+207-20120 files not shown
+380-35426 files

LLVM/project e1dd491clang/lib/StaticAnalyzer/Checkers CallAndMessageChecker.cpp

Format for loop.
DeltaFile
+2-1clang/lib/StaticAnalyzer/Checkers/CallAndMessageChecker.cpp
+2-11 files

LLVM/project e7be7aellvm/lib/Transforms/Vectorize VPlanLowering.cpp

Remove debugloc now that it's a default arg
DeltaFile
+2-2llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
+2-21 files