zvol: Fix uses of uninitialized variables in zvol_rename_minors_impl()
Reported-by: GitHub Copilot
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Mark Johnston <markj at FreeBSD.org>
Closes #18191
(cherry picked from commit 943a05528494b2f4585541089606796476fb229e)
Make zvol_set_common() block until the operation has completed
This is motivated by a FreeBSD AIO test case which create a zvol with -o
volmode=dev, then immediately tries to open the zvol device file. The
open occasionally fails with ENOENT.
When a zvol is created without the volmode setting, zvol_create_minors()
blocks until the task is finished, at which point OS-dependent code will
have created a device file. However, zvol_set_common() may cause the
device file to be destroyed and re-created, at least on FreeBSD, if the
voltype switches from GEOM to DEV. In this case, we do not block
waiting for the operation to finish, causing the test failure.
Fix the problem by making zvol_set_common() block until the operation
has finished. In FreeBSD zvol code, use g_waitidle() to block until
asynchronous GEOM operations are done. This fixes a secondary race
where zvol_os_remove_minor() does not block until the zvol device file
is removed, and the subsequent zvol_os_create_minor() fails because the
(to-be-destroyed) device file already exists.
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zvol: Hold the zvol state writer lock when renaming
Otherwise nothing serializes updates to the global zvol hash table.
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Mark Johnston <markj at FreeBSD.org>
Closes #18191
(cherry picked from commit d7b8eef9d281f6831ac7d9cb27362509ec434fb2)
FreeBSD: Fix zvol teardown races
zvol_geom_open() may be called to taste an orphaned provider. The test
for pp->private == NULL there is racy as no locks are synchronizing the
test.
Use the GEOM topology lock to interlock the pp->private == NULL test
with the zvol state checks. This establishes a new lock order but I
believe this is necessary. Set pp->private = NULL under the GEOM
topology lock instead of the per-zvol state lock. Modify
zvol_os_rename_minor() to drop the zvol state lock to avoid a lock order
reversal with the topology lock.
Also reverse the order of tests in zvol_geom_open() and zvol_cdev_open()
as at least zvol_geom_open() may race with zvol_os_remove_minor(), which
sets zv->zv_zso = NULL. Testing for ZVOL_REMOVING first avoids a race
which can lead to a NULL pointer dereference.
Add a new OS-specific flag to handle the case where zvol_geom_open()
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[clang][Sema] Allow abstract declarators to specify cv-qualified function types as per CWG1417 (#209836)
Abstract declarator contexts (specifically `DeclaratorContext::TypeName`) now properly bypass this restricted rule, allowing cv-qualified function types in `__typeof__` while maintaining restrictions in other contexts like `typeid`, `sizeof`, C-style casts, and `new` expressions per CWG1417.
[flang][acc] Emit NYI messages for unsupported directives (#211894)
Add an OpenACC MLIR pass that emits not-yet-implemented messages for
unsupported directives immediately after HLFIR generation. This allows
OpenACC dialect operations to be emitted with -emit-hlfir while making
full compilation fail early with clear diagnostics, instead of later
when unhandled OpenACC operations reach LLVM dialect conversion.
[ProfileData] Make FunctionSamples profile-format flags atomic (#208964)
`lld/test/ELF/lto/sample-profile.ll` is failing in ThreadSanitizer
build.
In a parallel in-process ThinLTO link, each backend thread reads the
sample profile in SampleProfileLoader::doInitialization and writes these
globals.
Make the variables std::atomic<bool> so the same-value writes are
well-defined. An architectural ideal solution that holds these states in
a container seems very intrusive.
[SPIRV] Emit NonSemantic DebugTypeArray. (#211537)
This PR adds `DebugTypeArray` to `SPIRVNonSemanticDebugHandler`:
1. `partitionTypes` buckets `DICompositeType` nodes tagged
`DW_TAG_array_type` without `DINode::FlagVector` (vectors are emitted
separately).
2. `emitNonSemanticGlobalDebugInfo` emits one `DebugTypeArray` per node
after the pointer types and records the id in `DebugTypeRegs`.
3. `emitDebugTypeArray` appends one `OpConstant` component count per
`DISubrange`, in subrange order. A subrange with no constant count emits
0, matching `OpTypeRuntimeArray`. An array whose element type is not in
`DebugTypeRegs` is skipped.
Clang lowers a matrix to a `DW_TAG_array_type` with two subranges in
`CGDebugInfo::CreateType(const ConstantMatrixType *)`, so an HLSL
`float4x4` emits as a `DebugTypeArray` with two counts.
`DebugTypeMatrix` needs a distinguishing flag from the frontend.
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[SLP] Only consider BuildVector inserts into the same object. (#212269)
When following insertelement instruction for a BuildVector sequence, we
may discover a user that inserts into a different vector.
Bail out when that happens instead of crashing.
PR: https://github.com/llvm/llvm-project/pull/212269
workflows/release-binaries: Add missing action to checkout (#211720)
The upload-release-artifact action uses the require-team-membership
action so we need to make sure that latter is checkout out when calling
upload-release-artifact.
[LoopInfo] Build dominator tree only for irreducible CFG (#212098)
analyze() requires a dominator tree, so LoopAnalysis and
MachineLoopAnalysis request one for every function, though only an
irreducible CFG queries it. Clients that build their own, from
InlineCost to XRayInstrumentation, need it for nothing else.
Take the function and a callback returning the tree instead, and call it
when an edge re-enters a loop. Add an analyze(F) overload for a client
that holds no tree.
The number of dominator tree builds does not change in an -O2 pipeline
building sqlite3.bc, where SROA and InstCombine cache one before
LoopAnalysis runs.
Tests that observed the tree through LoopAnalysis now require it
explicitly.
MachineLoopInfoWrapperPass keeps requiring one: the legacy pass manager
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TableGen: Use a compact table for CPU aliases
Previously each ProcessorAlias was emitted as a full SubtargetSubTypeKV
entry in the processor subtype table, duplicating the canonical
processor's feature masks and scheduling model index. At 104 bytes per
entry: AArch64's 18 aliases added ~1.8KB, and X86 will add more as aliases
are introduced.
Emit aliases into a separate SubtargetSubTypeAliasKV table instead. Each
alias is just a name string offset plus the index of the canonical
processor it resolves to.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Merge commit 26bf39cdba0b from llvm-project (by Jessica Clarke):
[ELF][PowerPC] Don't assume TOC pointer is valid in IPLT entries (#207555)
Unlike normal PLT entries, IPLT entries can be called indirectly even
when in PIEs/DSOs, and so there's no guarantee on what's in the TOC
pointer register at that time. Therefore we must emit variants of the
existing code that work without it, whether r12-relative (playing the
same role as MIPS's $25) in the same number of instructions, or first
retrieving PC in an i386-like manner, being careful not to clobber LR.
On 32-bit PowerPC even direct calls to IPLT entries face the same issue,
since we'd use the TOC base of the resolver, which may not be the same
as the caller, even within the same object.
Normal canonical PLTs still look broken on 64-bit PowerPC as they use
the TOC pointer register too, and similarly on 32-bit PowerPC for PIEs.
We should probably treat these cases the same as PIE on i386 (except
including PDEs for 64-bit PowerPC), where it's an error due to the use
of %ebx in PLT entries.
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Merge commit cbf48349e3e1 from llvm-project (by Jessica Clarke):
[NFC][ELF][PPC64] Pass address not offset to writePPC64LoadAndBranch (#212275)
Every caller currently subtracts the TOC base in its argument, so move
that into common code inside writePPC64LoadAndBranch. This will also
allow a different computation to be used in some cases in a future
commit.
Note that offset is now unsigned not signed; even previously, all
arguments were uint64_t, and all uses are unsigned, so making it signed
doesn't make much sense.
MFC after: 1 week
X86: Use ProcessorAlias for duplicated processor names (#211953)
Many X86 processors were defined multiple times under different names,
emitting an identical ProcessorModel for each spelling and duplicating
the feature masks, tune features, and scheduling model index in the
subtype table.
Define each processor once under its canonical name and express the
alternate spellings with ProcessorAlias, using the tablegen alias
mechanism. This deduplicates the redundant subtype table entries and
saves about 4.6k with the new alias table (#211952)
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
AMDGPU: Use ProcessorAlias for legacy arch names (#211776)
Older targets have aliasing names which were previously implemented
by defining a second copy of the processor, identical except for the
name Use the recently improved tablegen mechanism for defining name-only
aliases. This dedupliates some redundant table entries, like the sched model.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
TableGen: Add first class support for processor aliases (#211775)
Previously isCPUStringValid was virtual so TableGen could emit an
AArch64 specific hack for recognizing cpu aliases. Teach tablegen
about aliases, and insert each alias into the CPU subtype table as its
own entry (sorted by name, carrying the canonical processor's features
and scheduling model).
There is further opportunity for code sharing improvements. AArch64's
aliases are consumed by ARMTargetDefEmitter to emit a custom inc file
in TargetParser which should be universalized.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
