LLVM/project 8a81eccllvm/test/CodeGen/X86 avx512-trunc.ll

[X86] avx512-trunc.ll - add basic masked trunc coverage for #200617 (#201318)
DeltaFile
+282-0llvm/test/CodeGen/X86/avx512-trunc.ll
+282-01 files

LLVM/project 5961e1fflang/lib/Semantics check-omp-structure.h

format
DeltaFile
+4-4flang/lib/Semantics/check-omp-structure.h
+4-41 files

LLVM/project d5aa0d7llvm/test/CodeGen/AMDGPU atomic_optimizations_global_pointer.ll atomic_optimizations_pixelshader.ll

Drop mattr wavefrontsize32 from RUN line
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+1-1llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
+1-1llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
+1-1llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
+1-1llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
+1-1llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
+7-76 files

LLVM/project 9877fa7flang/lib/Semantics check-omp-structure.cpp check-omp-structure.h

[flang][OpenMP] Separate checks for type-parameter inquiry and subobject

This will make it possible to diagnose these situations independently.
This isn't perfect, but will be improved gradually in the future.
DeltaFile
+49-28flang/lib/Semantics/check-omp-structure.cpp
+5-1flang/lib/Semantics/check-omp-structure.h
+54-292 files

OPNSense/core a4aa93csrc/opnsense/mvc/app/controllers/OPNsense/Firewall/Api SourceNatController.php

Change searchRuleAction() output based on selected snat_mode to either include automatic rules/manual rules or not
DeltaFile
+42-19src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/SourceNatController.php
+42-191 files

LLVM/project 90d907bllvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/lib/Target/AMDGPU SMInstructions.td SIInstructions.td

[AMDGPU] Add llvm.amdgcn.s.prefetch.inst intrinsic (#192440)

- New intrinsic
- New SubtargetFeature for all s_prefetch_inst*/data*
- Support blockaddress
DeltaFile
+569-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.inst.ll
+24-10llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+24-4llvm/lib/Target/AMDGPU/SMInstructions.td
+18-0llvm/lib/Target/AMDGPU/SIInstructions.td
+9-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+8-0llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+652-146 files not shown
+679-1812 files

FreeBSD/ports 13b04aa. MOVED

MOVED: remove entry for devel/viewvc

It was recently returned to the ports tree.

PR:             295729
DeltaFile
+0-1MOVED
+0-11 files

LLVM/project 66ceecdllvm/lib/Target/AMDGPU SIRegisterInfo.td AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU peephole-fold-imm.mir set-gpr-idx-peephole.mir

Revert "[AMDGPU] Remove definition of hi16 for scalar registers" (#201309)

Reverts llvm/llvm-project#197467 as it causes a buildbot failure.
DeltaFile
+53-65llvm/lib/Target/AMDGPU/SIRegisterInfo.td
+57-0llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
+16-16llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
+6-8llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
+5-5llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+6-2llvm/test/CodeGen/AMDGPU/phys-partial-liveness.mir
+143-9611 files not shown
+166-11717 files

LLVM/project 2fabed5llvm/lib/Target/SPIRV SPIRVUtils.cpp, llvm/test/CodeGen/SPIRV cloned-funcs-metadata-oob.ll

[SPIR-V] Diagnose out-of-bounds argument index in function type metadata (#200601)

The argument index in spv.cloned_funcs/spv.mutated_callsites metadata
was used to index the parameter list with only a lower bound assert

Add boundaries check it and report_fatal_error rather than silently
miscompiling
DeltaFile
+15-0llvm/test/CodeGen/SPIRV/cloned-funcs-metadata-oob.ll
+9-4llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+24-42 files

LLVM/project 869be01llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp VOP3Instructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.tanh.ll

[AMDGPU] Diagnose unsupported permlane16/mov.dpp8/tanh intrinsics (#200585)
DeltaFile
+19-0llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+10-8llvm/lib/Target/AMDGPU/VOP3Instructions.td
+12-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+8-0llvm/lib/Target/AMDGPU/AMDGPU.td
+3-3llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+5-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
+57-114 files not shown
+68-1510 files

LLVM/project 13b689allvm/lib/Target/AMDGPU SIISelLowering.cpp

Update llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
DeltaFile
+1-4llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-41 files

LLVM/project b5da64fllvm/lib/Target/AMDGPU SIISelLowering.cpp

Update llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
DeltaFile
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-11 files

LLVM/project 82bc4cdllvm/lib/Target/AMDGPU AMDGPURegisterBankInfo.cpp

Update llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+1-11 files

OpenBSD/ports YYN4qrjlang/rust distinfo Makefile, lang/rust/patches patch-library_std_src_sys_paths_unix_rs patch-compiler_rustc_session_src_options_rs

   update lang/rust to 1.96.0

   Announce: https://blog.rust-lang.org/2026/05/28/Rust-1.96.0/
   Release notes: https://doc.rust-lang.org/stable/releases.html#version-1960-2026-05-28

   ok landry@
VersionDeltaFile
1.28+74-58lang/rust/pkg/PLIST-src
1.1+21-0lang/rust/patches/patch-library_std_src_sys_paths_unix_rs
1.166+10-10lang/rust/distinfo
1.248+14-6lang/rust/Makefile
1.29+4-4lang/rust/patches/patch-compiler_rustc_session_src_options_rs
1.20+2-2lang/rust/patches/patch-src_bootstrap_src_core_build_steps_test_rs
+125-804 files not shown
+127-8310 files

LLVM/project 62da90fllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-chained.ll partial-reduce-usabs.ll

[LV] Optimize partial reduction extends before handling inloop subs

The crash avoided in #194660 was caused by the extend optimizations
failing to match as due to the extra sub/negation added to the
"ExtendedOp".

A similar crash exists for [us]abs partial reductions
(see https://godbolt.org/z/MerMon5rE), which is fixed with this patch.

This patch solves the underlying issue by running the extend optimizations
before any inloop sub/fsub handling.

Fixes #194000
DeltaFile
+70-66llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
+60-0llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-usabs.ll
+3-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+133-723 files

LLVM/project c7ecad5cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers ScriptDebuggerController.py, cross-project-tests/debuginfo-tests/dexter/dex/dextIR StepIR.py

[Dexter] Add basic debugging support for structured scripts (#197418)

This patch adds a debugger controller for structured scripts. This
controller operates as follows:
- !where nodes at the root of the script (currently the only kind
allowed) have function or line breakpoints set to cover them.
- Whenever the debugger stops, the controller will examine the stack to
determine whether any !where nodes are in scope.
- While any !where is in scope, its associated !values will be evaluated
in the debugger and the results stored, and the debugger will
single-step.
- When no !where is in scope, the debugger will continue.

This is a simplified implementation compared to the final version, as it
is missing support for nested !where nodes, Scope evaluation, and
conditions/hit counts; these will be added in later commits.
DeltaFile
+242-0cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
+65-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/simple_where_function.cpp
+41-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/where_file_paths.cpp
+40-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/simple_where_line.cpp
+27-7cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
+21-0cross-project-tests/debuginfo-tests/dexter/dex/dextIR/StepIR.py
+436-74 files not shown
+463-910 files

NetBSD/src gL0CRxSsys/dev/i2c nxp75a.c nxp75areg.h

   Add a driver for the NXP LM75A temperature sensor.
   The chip is used in the Sun Ultra 45.
   Note, that this is not the same as the TI LM75A temperature sensor (lmtemp).
VersionDeltaFile
1.1+304-0sys/dev/i2c/nxp75a.c
1.1+82-0sys/dev/i2c/nxp75areg.h
+386-02 files

FreeBSD/ports cafc626shells/rura distinfo Makefile

shells/rura: Update to 1.4.0
DeltaFile
+3-3shells/rura/distinfo
+1-1shells/rura/Makefile
+4-42 files

FreeBSD/ports 4042842net/nats-nkeys distinfo Makefile

net/nats-nkeys: Update to 0.4.16
DeltaFile
+5-5net/nats-nkeys/distinfo
+1-2net/nats-nkeys/Makefile
+6-72 files

NetBSD/src LSXraOusys/dev/i2c lm95221.c lm95221reg.h

   Add a driver for the Texas Instruments LM95221 temperature sensor.
   The chip is used in the Sun Ultra 45.
VersionDeltaFile
1.1+279-0sys/dev/i2c/lm95221.c
1.1+102-0sys/dev/i2c/lm95221reg.h
+381-02 files

OPNSense/core 34e8023src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api SourceNatController.php

Since we have a volatile field we can use it directly here
DeltaFile
+1-2src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/SourceNatController.php
+1-21 files

LLVM/project e2efa2ellvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 phi-vectorization-budget.ll

[SLP] Gather wide PHI bundles to avoid compile-time blow-up

Vectorizing a PHI bundle recurses into one operand bundle per incoming
value, so the analysis cost grows with bundle_size * num_incoming_values.
With revectorization, very wide PHIs from jump threading make
opt -O3 hang for minutes/hours. Such PHIs are not profitable to vectorize,
so gather the bundle once that product exceeds a budget (new hidden option
-slp-phi-vectorization-budget, default 1024).

Fixes #201181

Reviewers: hiraditya, bababuck, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/201227
DeltaFile
+55-0llvm/test/Transforms/SLPVectorizer/X86/phi-vectorization-budget.ll
+21-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+76-02 files

FreeBSD/ports 1260d31devel/electron42 distinfo, devel/electron42/files patch-electron_spec_api-app-spec.ts patch-electron_shell_browser_browser__linux.cc

devel/electron42: Update to 42.3.2

Changelog:
- https://github.com/electron/electron/releases/tag/v42.3.1
- https://github.com/electron/electron/releases/tag/v42.3.2

Reported by:    GitHub (watch releases)
DeltaFile
+22-22devel/electron42/files/patch-electron_spec_api-app-spec.ts
+7-7devel/electron42/distinfo
+7-7devel/electron42/files/patch-electron_shell_browser_browser__linux.cc
+11-2devel/electron42/files/patch-components_password__manager_core_browser_features_password__features.cc
+6-6devel/electron42/files/patch-content_browser_renderer__host_render__widget__host__view__aura.cc
+5-7devel/electron42/files/patch-base_system_sys__info__freebsd.cc
+58-5123 files not shown
+145-10229 files

LLVM/project 1441d74compiler-rt/include/sanitizer safestack_interface.h

Fix clang-format

Created using spr 1.3.7
DeltaFile
+3-3compiler-rt/include/sanitizer/safestack_interface.h
+3-31 files

LLVM/project 94c0e6flibcxx/include __locale, libcxx/include/__locale_dir money.h messages.h

[libc++][locale] Applied `[[nodiscard]]` (#200726)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/localization

Remarks:
- Virtual functions are not marked `[[nodiscard]]` because they are not
expected to be directly called by users.
- `messages::open` is marked `[[nodiscard]]` because it is logically
similar to `operator new` and its friends.
DeltaFile
+245-0libcxx/test/libcxx/localization/nodiscard.verify.cpp
+77-66libcxx/include/__locale
+9-9libcxx/include/__locale_dir/money.h
+3-2libcxx/include/__locale_dir/messages.h
+1-1libcxx/test/libcxx/localization/locales/use_facet.abort.pass.cpp
+335-785 files

NetBSD/pkgsrc 5KNfuq4doc CHANGES-2026

   Updated misc/py-trove-classifiers, www/py-idna
VersionDeltaFile
1.3476+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc 5v1Rj7Twww/py-idna distinfo Makefile

   py-idna: updated to 3.18

   3.18

   - When decoding a domain, add a `display` argument that will pass
     through invalid labels rather than raising an exception.
VersionDeltaFile
1.27+4-4www/py-idna/distinfo
1.29+2-2www/py-idna/Makefile
+6-62 files

NetBSD/pkgsrc rh3Xj8smisc/py-trove-classifiers distinfo Makefile

   py-trove-classifiers: updated to 2026.6.1.19

   2026.6.1.19
   Restrict OIDC token to publish job
VersionDeltaFile
1.50+4-4misc/py-trove-classifiers/distinfo
1.52+2-2misc/py-trove-classifiers/Makefile
+6-62 files

LLVM/project c958962llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange lcssa-incoming-value-is-not-instr.ll

[LoopInterchange] Assume LCSSA PHI incoming value may not be instruction (#201069)

This patch fixes one of the assertion failures reported in #200819. The
root cause in this case is that `moveLCSSAPhis` assumes the incoming
values of LCSSA PHIs are always instructions and unconditionally casts
them to `Instruction`.
This assumption does not always hold, especially when the incoming value
is a constant. For such LCSSA PHI nodes, it's enough to merely replace
all the uses with its incoming value.
DeltaFile
+64-0llvm/test/Transforms/LoopInterchange/lcssa-incoming-value-is-not-instr.ll
+13-2llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+77-22 files

LLVM/project 7496ee9llvm/test/Transforms/SLPVectorizer/X86 sincos.ll

[SLP][NFC]Add a test with non-vectorized sincos, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/201312
DeltaFile
+114-0llvm/test/Transforms/SLPVectorizer/X86/sincos.ll
+114-01 files