[clang][OpenMP] Add no-loop SPMD kernel promotion
A target teams distribute parallel for that is guaranteed a thread for
every iteration does not need the loop around its body. Flang already
drops it and runs the region as a no-loop kernel.
Enable the same optimization for Clang through mirroring Flang's MLIR
promotion using OpenMPIRBuilder. The kernel is tagged SPMD_NO_LOOP, so
the runtime sizes the grid to the iteration space, and the body is
emitted without a loop around it. The canonical loop it consumes is
reconstructed in the no-loop branch rather than taken from an
OMPCanonicalLoop node, so the promotion does not require
-fopenmp-enable-irbuilder.
Restrict offload entry creation to module level finalize, preventing
asserts on missing offload entries from nested CodeGenFunction
finalizing before module completion.
monit: log from the first line, reconfigure through the base class
The local reconfigureAction() only started or reloaded monit when the
whole output of "monit -t" was exactly "Control file syntax OK", so the
first Apply on a new install ("New Monit id: ...") and any deprecation
warning left monit stopped or not reloaded while reporting "ok".
Drop it, and checkAction(), in favor of ApiMutableServiceControllerBase.
Move "set log" to the top of monitrc: monit only logs a parse error
after it has parsed "set log", so an invalid control file now leaves
its reason in the monit log, whether rc refused the reload or monit
refused to start.
Fixes https://github.com/opnsense/core/issues/10928
(cherry picked from commit 681a0fd644768dd349f5dd8332437f419b6eea03)
Revert "[mlir][tosa] Lower ROW_GATHER to Linalg" (#229388)
Reverts llvm/llvm-project#225417 because it breaks
`mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir`.
[ValueTracking] Compute known bits of and/or recurrences from start and step (#226164)
For simple phi recurrences of the form `%iv = %iv op %step` we currently
only derive trailing zero bits for and/or, in a case shared with
add/sub/mul. This moves and/or into their own case and propagates full
known bits:
* or: bits that are zero in both the start value and the step stay zero,
and bits that are one in the start value stay one.
* and: bits that are zero in the start value stay zero, and bits that
are one in both the start value and the step stay one.
The step only applies from the second iteration on, so every fact must
also hold for the start value alone. This subsumes the trailing-zeros
rule for these operations. The nsw handling of the add/sub/mul case
never applied to them.
The two AMDGPU tests are adjusted to use an opaque start value for their
recurrences, so that the improved known bits don't fold away the
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