LICM: Drop -licm-force-thread-model-single in favor of the module flag
Now that the threading model is carried by the "thread-model" IR module flag,
the hidden -licm-force-thread-model-single override is redundant: a test can
select the single-threaded model by setting the module flag directly.
isThreadLocalObject reads only Module::getThreadModel.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
CodeGen: Replace TargetOptions::ThreadModel with module flag (#223157)
Migrate the threading-model consumers off TargetOptions::ThreadModel and
onto the "thread-model" module flag. The main user was ARM's pass config,
which is moved into AtomicExpand, which now performs the single-thread
expansion directly.
Few tests use the -thread-model flag, so delete it and migrate those
cases to use the module flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[flang] Delete a trailing CYCLE that is the last statement of its DO (#223399)
A CycleStmt at the end of the body of its own DoConstruct is a no-op:
branching to the EndDoStmt and falling through to it are the same thing.
Branch analysis nonetheless marks the DoConstruct unstructured, which
costs the structured form of the loop and the induction variable
semantics that later passes rely on.
Delete such a CycleStmt in the PFT. The statement must be unlabeled, so
that it is not itself a branch target, and it must name either no
construct or this one.
R-xts: update to 0.14.3.
Fixes build with current R.
xts 0.14.3 (2026-09-26)
Fix deprecated special names in structure() calls. (#440)
Fix time-of-day subsetting (e.g. x["T18:00/"]) to create
fractional seconds as decimal fractions instead of raw integers.
The previous behavior could return incorrect results, and error
on R-devel (r90486). (#441)
xts 0.14.2 (2026-02-27)
Removed ATTRIB() and SET_ATTRIB() from C code, since they are
not part of the public R API. (#436)
Fixed crash when endpoints() was called on an xts object with
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[VPlan] Fix VPInstruction::AnyOf combine undoing freeze
There is an any-of combine for unrolled VPlans which does:
any-of (fcmp uno A, A), (fcmp uno B, B), ...-> any-of (fcmp uno A, B)
However any-of implicitly freezes each individual operand and this means we go from `freeze (fcmp uno A, A)` to `freeze (fcmp uno A, B)` which isn't sound: alive2.llvm.org/ce/z/UdQM7C
This causes miscompiles today with early exit loops, see the attached test case in single-early-exit-anyof-fold.ll.
This fixes it by explicitly modelling the freeze in VPlan. There are three places where we use AnyOf:
1) early exit loops: the freeze needs to be applied per-lane, so apply it to `(any-of (freeze (combined-conds-to-exit)))`
2) handleMaxMinNumReductions: If any lane of the reduction was poison in the scalar loop, the final result will be poison. We only need to freeze the result of AnyOf to prevent immediate UB when branching. Freezing individual operands blocks the any-of combine otherwise.
3) handleFindLastReductions: we need to freeze Cond itself since it's got multiple uses, but I plan on fixing this in a separate PR
R-Rcpp: update to 1.1.2.
Committed during the freeze since it should help with the execinfo
problems on *BSD.
Changes in Rcpp release version 1.1.2 (2026-07-01)
Changes in Rcpp API:
Use of execinfo.h is again conditional to avoid build complexity (Dirk in #1445 addressing #1442)
An internal state component for Datetime is now int (Dirk in #1448 and #1449 fixing #1447)
Three new (in R 4.6.0) attribute accessors are used conditionally (Dirk in #1450 closing #1432)
An UBSAN error in the Sugar-based NA comparison has been corrected (Iñaki in #1453 fixing #1452)
Treatment of Inf outside of integer range in Sugar function has been corrected (Iñaki in #1458 fixing #1455)
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[AMDGPU] Model the cost of the expanded integer to/from floating point casts
No instruction converts to or from a 64 bit integer, and narrow vector
lanes are converted one at a time. Price these expansions by the FP64
rate, sdwa and 16 bit instruction support, and price i33 to i63 like
i64 and bf16 like f32 plus rounding.
Assisted-by: Claude Code Opus 5
[ProfCheck] Add expand-multi-result.ll to profcheck-xfail.txt (#223614)
From #218634
Added for the same reason as other
`PreISelIntrinsicLowering/AArch64/expand-*` tests. Fixes `profcheck`
failure.
[AMDGPU] Scale the frame register in place when lowering scalar frame indices (#221972)
Lowering a scalar frame index needs a scalar temporary, and under full
SGPR pressure the scavenger emergency-spills instead, which flips EXEC
with `s_not_b64` and clobbers SCC, With SCC live the spill builder gives
up with `error: unhandled SGPR spill to memory`.
Use `FrameReg` itself as the temporary and restore it after the
instruction with `S_MUL_I32`, which unlike `S_LSHL_B32` does not write
SCC, folding a non-zero offset back through an
`S_ADDC_U32`/`S_BITCMP1_B32`/`S_BITSET0_B32` sequence when SCC is still
live.
This is restricted to SALU instructions with a single frame index that
do not otherwise touch `FrameReg`; everything else keeps the existing
path, including the emergency spill.
Assisted-by: Claude Opus 5
[LAA] Allow zero-distance dependences between mixed-width accesses (#221531)
Allow zero-distance dependences between mixed-width accesses to be
classified as `Forward` when they have a common byte stride.
`getDependenceDistanceStrideAndSize` already requires non-zero strides
in the same direction, each a multiple of the corresponding type's
allocation size. A common byte stride is therefore at least as large as
either access. With equal starting addresses, accesses from different
iterations cannot overlap.
Alive2: https://alive2.llvm.org/ce/z/KN6Hke
Fixes #218320
[Docs][TySan] Correct optimisation remarks (#205577)
I think I got my wires crossed here between TySan and other sanitizers
when I was using their docs for reference on how to structure this file.
If a strict aliasing violation was going to cause problems, by the time
higher level optimizations come through and restructure the code, say by
removing a load/store, you no longer have the behaviour TySan would pick
up on.
simulavr: fix build with compilers defaulting to c++17
They have std::byte in the namespace (due to 'using namespace std),
which conflicts with the local byte typedef.
Bump PKGREVISION.
