LLVM/project b738491llvm/lib/Target/AMDGPU SIMemoryLegalizer.cpp SIInstrInfo.h, llvm/test/CodeGen/AMDGPU memory-legalizer-non-volatile.ll promote-constOffset-to-imm-gfx12.mir

[AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (#179413)

- Add `MONonVolatile` MachineMemOperand flag.
- Set nv=1 on memory operations on GFX12.5 if the operation accesses a
constant address space,
  is an invariant load, or has the `MONonVolatile` flag set.
DeltaFile
+365-0llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
+43-13llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+5-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+1-1llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
+1-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+415-145 files

LLVM/project 134bf19llvm/test/CodeGen/RISCV/rvv abs-vp.ll fixed-vectors-abd.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+319-0llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
+308-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+247-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
+203-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
+156-0llvm/test/CodeGen/RISCV/rvv/abd.ll
+107-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
+1,340-020 files not shown
+1,764-6026 files

LLVM/project aa64ae5llvm/test/CodeGen/RISCV/rvv abs-vp.ll fixed-vectors-abd.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+319-0llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
+308-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+247-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
+207-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
+156-0llvm/test/CodeGen/RISCV/rvv/abd.ll
+107-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
+1,344-020 files not shown
+1,846-6226 files

LLVM/project 35ab0e2llvm/test/CodeGen/RISCV/rvv abs-vp.ll fixed-vectors-abd.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+319-0llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
+308-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+247-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
+156-0llvm/test/CodeGen/RISCV/rvv/abd.ll
+107-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
+94-0llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll
+1,231-020 files not shown
+1,644-6026 files

LLVM/project 59d1eadllvm/test/CodeGen/RISCV/rvv abs-vp.ll fixed-vectors-abd.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+319-0llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
+308-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+247-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
+203-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
+156-0llvm/test/CodeGen/RISCV/rvv/abd.ll
+107-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
+1,340-020 files not shown
+1,764-6026 files

LLVM/project ce07248llvm/lib/Transforms/Utils SimplifyLibCalls.cpp, llvm/test/Transforms/InstCombine double-float-shrink-1.ll sqrt.ll

InstCombine: Only propagate callsite attributes in sqrt->sqrtf

This was propagating the callee's attributes instead of just the
callsite. It's illegal to set denormal_fpenv on a callsite. This
was also losing callsite attributes which may have been more useful;
there's no point in setting the callee's attributes on the callsite.
DeltaFile
+48-22llvm/test/Transforms/InstCombine/double-float-shrink-1.ll
+5-4llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+3-3llvm/test/Transforms/InstCombine/sqrt.ll
+56-293 files

FreeBSD/ports e0df53cdevel Makefile, devel/py-tree-sitter-sql Makefile distinfo

devel/py-tree-sitter-sql: Add new port

Tree-sitter-sql is a general/permissive SQL grammar for tree-sitter.

https://github.com/derekstride/tree-sitter-sql
DeltaFile
+21-0devel/py-tree-sitter-sql/Makefile
+3-0devel/py-tree-sitter-sql/distinfo
+1-0devel/Makefile
+1-0devel/py-tree-sitter-sql/pkg-descr
+26-04 files

OpenBSD/src tmODBQfusr.bin/tmux format.c

   Also check PANE_STATUSREADY for pane_dead format to match
   pane_dead_status. GitHub issue 4841 from Joshua Pollack.
VersionDeltaFile
1.343+5-3usr.bin/tmux/format.c
+5-31 files

FreeBSD/ports 1f6996bdeskutils/ekphos distinfo Makefile

deskutils/ekphos: Update to 0.20.10

ChangeLog:      https://github.com/hanebox/ekphos/releases/tag/v0.20.10
Reported by:    han <notifications at github.com>
DeltaFile
+3-3deskutils/ekphos/distinfo
+1-1deskutils/ekphos/Makefile
+4-42 files

OpenBSD/ports ohetgzUdevel/perltidy distinfo Makefile

   Update to perltidy-20260204.
VersionDeltaFile
1.46+2-2devel/perltidy/distinfo
1.54+1-1devel/perltidy/Makefile
+3-32 files

LLVM/project 60f74c9clang/lib/CodeGen TargetInfo.h TargetInfo.cpp, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

Use StringRef
DeltaFile
+29-42clang/lib/CodeGen/Targets/AMDGPU.cpp
+3-3clang/lib/CodeGen/TargetInfo.h
+3-3clang/lib/CodeGen/Targets/SPIR.cpp
+1-1clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+1-1clang/lib/CodeGen/TargetInfo.cpp
+37-505 files

LLVM/project d64a609llvm/lib/Target/X86 X86.h

[NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (#180122)

I believe I exposed in
https://github.com/llvm/llvm-project/pull/179864/changes#diff-5b9707ff829bc5b6523a59982f375d99d6b4ded670fbd91dd095555f4ac80a14R428
. Getting rid of it to avoid possible undefined reference/linker errors.
DeltaFile
+0-1llvm/lib/Target/X86/X86.h
+0-11 files

LLVM/project 8cc0642llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel strict_fma.f64.ll strict_fma.f32.ll

Adding support for G_STRICT_FMA in new reg bank select (#170330)

This patch adds legalization rules for G_STRICT_FMA opcode.

---------

Co-authored-by: Abhinav Garg <abhigarg at amd.com>
DeltaFile
+1,048-65llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f64.ll
+987-65llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
+913-98llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+2,949-2294 files

LLVM/project a262589llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp

[AArch64][GloballISel] Put result of fp16 -> s16 convert intrinsic on fpr

Previously, RegBankSelect would place the result of an fp16 -> s16 conversion intrinsic on a gpr. This would cause Instruction Selection to fail, as there are no 16-bit gprs.
Example floating point convert intrinsics:
fcvtnu / fcvtns
fcvtau / fcvtas
fcvtzu / fcvtzs
DeltaFile
+3-2llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+3-21 files

LLVM/project b214f6dllvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoZvabd.td, llvm/test/CodeGen/RISCV/rvv fixed-vectors-abd.ll abd.ll

Rebase

Created using spr 1.3.6-beta.1
DeltaFile
+42-14llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+24-8llvm/test/CodeGen/RISCV/rvv/abd.ll
+14-5llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+10-5llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
+90-324 files

OpenBSD/ports 1nbhxSBdevel/p5-Sub-HandlesVia distinfo Makefile

   Update to p5-Sub-HandlesVia-0.053005.
VersionDeltaFile
1.5+2-2devel/p5-Sub-HandlesVia/distinfo
1.6+1-1devel/p5-Sub-HandlesVia/Makefile
+3-32 files

LLVM/project 15d8489llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoZvabd.td, llvm/test/CodeGen/RISCV/rvv fixed-vectors-abd.ll abd.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+42-14llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+24-8llvm/test/CodeGen/RISCV/rvv/abd.ll
+13-5llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+10-5llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
+89-324 files

NetBSD/pkgsrc MwQEYCXaudio/amarok Makefile, audio/ardour Makefile

   *: recursive bump for nettle 4.0 shlib major bump
VersionDeltaFile
1.215+2-2audio/amarok/Makefile
1.107+2-2audio/ardour/Makefile
1.137+2-2audio/ario/Makefile
1.175+2-2audio/audacious-plugins/Makefile
1.10+2-2audio/boca/Makefile
1.8+2-2audio/boca/buildlink3.mk
+12-121,299 files not shown
+2,610-2,5211,305 files

LLVM/project 9d11a66llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU freeze.ll

AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (#179796)

Move G_FREEZE handling to AMDGPURegBankLegalizeRules.cpp.
Added support for uniform S1.
DeltaFile
+134-0llvm/test/CodeGen/AMDGPU/freeze.ll
+21-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+9-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+0-7llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+2-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+166-105 files

NetBSD/pkgsrc zgIPnICdoc CHANGES-2026

   doc: Updated security/nettle to 4.0
VersionDeltaFile
1.925+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc KHpSa20security/nettle distinfo PLIST, security/nettle/patches patch-Makefile.in

   nettle: update to 4.0.

   NEWS for the Nettle 4.0 release

        This is a new major release. It includes one new feature,
        support for SLH-DSA. There are several changes to Nettle's
        API, as well as deletion of obsolete features. There are also
        several improvements to the ABI that leaves the API mostly
        unchanged, in particular, smaller context structs for several
        algorithms.

        The most disruptive API change is that the *_digest functions
        no longer takes the desired digest size as argument. Truncated
        hashes appeared to be an important use case decades ago when
        the previous interface was designed, but that is now rather
        obscure.

        Feedback on the new interfaces is appreciated, e.g., if the
        variable tag length for OCB and CCM should be supported

    [165 lines not shown]
VersionDeltaFile
1.12+7-7security/nettle/patches/patch-Makefile.in
1.32+5-5security/nettle/distinfo
1.15+2-5security/nettle/PLIST
1.35+3-3security/nettle/Makefile
+17-204 files

LLVM/project 4e6282allvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoZvabd.td, llvm/test/CodeGen/RISCV/rvv fixed-vectors-abd.ll abd.ll

Limit SEW to 8/16

Created using spr 1.3.6-beta.1
DeltaFile
+42-14llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abd.ll
+24-8llvm/test/CodeGen/RISCV/rvv/abd.ll
+13-5llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+10-5llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
+89-324 files

NetBSD/pkgsrc lbgj6wWdoc CHANGES-2026

   doc: Updated devel/jj-docs to 0.38.0
VersionDeltaFile
1.924+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc VGv2F7Mdevel/jj-docs distinfo Makefile

   jj-docs: update to 0.38.0.

   To match jj.
VersionDeltaFile
1.5+4-4devel/jj-docs/distinfo
1.5+2-2devel/jj-docs/Makefile
1.5+1-0devel/jj-docs/PLIST
+7-63 files

NetBSD/pkgsrc qat6snKdoc CHANGES-2026 TODO

   doc: Updated devel/jj to 0.38.0
VersionDeltaFile
1.923+2-1doc/CHANGES-2026
1.26762+2-1doc/TODO
+4-22 files

NetBSD/pkgsrc pXZLIGrdevel/jj distinfo cargo-depends.mk

   jj: update to 0.38.0.

   Add test target, depend on git.

   ## [0.38.0] - 2026-02-04

   ### Release highlights

   * Per-repo and per-workspace config is now stored outside the repo, for security
     reasons. This is not a breaking change because we automatically migrate
     legacy repos to this new format. `.jj/repo/config.toml` and
     `.jj/workspace-config.toml` should no longer be used.

   ### Breaking changes

   * The minimum supported `git` command version is now 2.41.0. macOS users will
     need to either upgrade "Developer Tools" to 26 or install Git from
     e.g. Homebrew.


    [110 lines not shown]
VersionDeltaFile
1.31+394-382devel/jj/distinfo
1.30+130-126devel/jj/cargo-depends.mk
1.37+12-6devel/jj/Makefile
+536-5143 files

OPNSense/plugins 630cd20. LICENSE, security/q-feeds-connector/src/opnsense/scripts/qfeeds qfeedsctl.py

LICENSE: fix a typo and sync
DeltaFile
+1-1security/q-feeds-connector/src/opnsense/scripts/qfeeds/qfeedsctl.py
+1-1LICENSE
+2-22 files

FreeBSD/ports b381b02java/netbeans pkg-plist Makefile

java/netbeans: Update 17 => 28, take maintainership

Changelogs:
https://github.com/apache/netbeans/releases/tag/18
https://github.com/apache/netbeans/releases/tag/19
https://github.com/apache/netbeans/releases/tag/20
https://github.com/apache/netbeans/releases/tag/21
https://github.com/apache/netbeans/releases/tag/22
https://github.com/apache/netbeans/releases/tag/23
https://github.com/apache/netbeans/releases/tag/24
https://github.com/apache/netbeans/releases/tag/25
https://github.com/apache/netbeans/releases/tag/26
https://github.com/apache/netbeans/releases/tag/27
https://github.com/apache/netbeans/releases/tag/28

- Repalce PORTVERSION with DISTVERSION.
- Remove shebangfix variables with default values.
- Parametrize netbeans with PORTNAME.
- Fix warnings from portclippy.

    [5 lines not shown]
DeltaFile
+403-978java/netbeans/pkg-plist
+28-27java/netbeans/Makefile
+3-3java/netbeans/distinfo
+434-1,0083 files

OPNSense/ports 58c441f. MOVED UPDATING, Mk/Uses electron.mk fam.mk

Framework: sync with upstream

Taken from: FreeBSD
DeltaFile
+819-0Mk/Uses/electron.mk
+220-5MOVED
+110-17UPDATING
+0-60Mk/Uses/fam.mk
+60-0Mk/Uses/dbus-testing.mk
+29-18Mk/Uses/go.mk
+1,238-10034 files not shown
+1,479-23740 files

OpenBSD/ports ELA0xH6devel/p5-Data-Alias Makefile distinfo

   Update to p5-Data-Alias-1.29.
VersionDeltaFile
1.26+5-3devel/p5-Data-Alias/Makefile
1.8+2-2devel/p5-Data-Alias/distinfo
+7-52 files