LLVM/project 9a8eddd — llvm/lib/CodeGen PHIElimination.cpp, llvm/test/CodeGen/AMDGPU phi-elimination-subrange-liveintervals.mir

[PHIElim][AMDGPU]: shrink source subranges to lane-specific uses (#228073)
DeltaFile
+468-0llvm/test/CodeGen/AMDGPU/phi-elimination-subrange-liveintervals.mir
+396-0llvm/test/CodeGen/Hexagon/phi-elim-subreg-lanes.mir
+19-4llvm/lib/CodeGen/PHIElimination.cpp
+883-43 files

LLVM/project 9be0873 — llvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/lib/Target/Hexagon HexagonHardwareLoops.cpp HexagonOptAddrMode.cpp

Targets: Remove redundant TRI arguments from InstrInfo helpers

This is directly available in TargetInstrInfo.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+9-8llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+7-8llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
+6-8llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+4-6llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+3-3llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+2-2llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
+31-358 files not shown
+41-5014 files

LLVM/project 5b76f27 — llvm/include/llvm/CodeGen MachineScheduler.h, llvm/lib/CodeGen MachineScheduler.cpp

Fix unused variables
DeltaFile
+11-19llvm/lib/CodeGen/MachineScheduler.cpp
+4-4llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-5llvm/include/llvm/CodeGen/MachineScheduler.h
+1-1llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+0-1llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
+18-305 files

LLVM/project 67f1ac0 — llvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/CodeGen TargetInstrInfo.cpp

CodeGen: Remove TRI arguments from TargetInstrInfo hooks

TRI can now always directly be referenced from TargetInstrInfo

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+24-29llvm/lib/Target/X86/X86InstrInfo.cpp
+16-18llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+14-19llvm/include/llvm/CodeGen/TargetInstrInfo.h
+9-13llvm/lib/Target/X86/X86InstrInfo.h
+10-10llvm/lib/CodeGen/TargetInstrInfo.cpp
+6-9llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+79-9826 files not shown
+140-18432 files

LLVM/project 94c023d — llvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/Target/AArch64 AArch64TargetMachine.cpp

Fix accidental ReorderWhileClustering change in cluster mutations
DeltaFile
+12-12llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+2-2llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+2-2llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+2-2llvm/include/llvm/CodeGen/TargetInstrInfo.h
+18-184 files

LLVM/project d046523 — orc-rt/test/regression lit.cfg.py, orc-rt/test/regression/languages/c lit.local.cfg

[orc-rt] Disable some builds on windows. Normalise amd64 (#228357)
DeltaFile
+8-1orc-rt/test/regression/lit.cfg.py
+3-0orc-rt/test/regression/languages/c/lit.local.cfg
+11-12 files

OpenBSD/src Nqr5vWt — sys/dev/ic qwx.c

   also sync qwx DMA memory before updating the ring pointer via sc->ops.write32
VersionDeltaFile
1.146+3-1sys/dev/ic/qwx.c
+3-11 files

NetBSD/pkgsrc-wip 1d98941 — chromium distinfo, chromium/patches patch-third__party_ots_src_src_name.cc

chromium: fix SIGABRT on imgur.com
DeltaFile
+15-0chromium/patches/patch-third__party_ots_src_src_name.cc
+1-0chromium/distinfo
+16-02 files

NetBSD/pkgsrc-wip 45d5551 — chromium Makefile distinfo, chromium/patches patch-third__party_test__fonts_fontconfig_BUILD.gn patch-third__party_test__fonts_fontconfig_generate__fontconfig__caches.cc

chromium: update to 154.0.8037.97
DeltaFile
+38-4chromium/COMMIT_MSG
+0-26chromium/patches/patch-third__party_test__fonts_fontconfig_generate__fontconfig__caches.cc
+4-5chromium/distinfo
+1-1chromium/patches/patch-third__party_test__fonts_fontconfig_BUILD.gn
+1-1chromium/Makefile
+44-375 files

FreeBSD/ports e9c2fe6 — devel/doxygen/files patch-examples_CMakeLists.txt

devel/doxygen: try to fix parallel building og docs/examples (+)

PR:     298219
MFH:    2026Q4
(cherry picked from commit 48681c24ef54884db0aee1cd4485cd9d860c7d5f)
DeltaFile
+49-0devel/doxygen/files/patch-examples_CMakeLists.txt
+49-01 files

LLVM/project 70c82f1 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 reduction-gathered-root-erased-scalars.ll

[SLP]Skip gathers with erased scalars in the cast context

The cast context of the reduction root is requested after the tree is
vectorized, when the scalars of the gathered root with the vectorized
subvector are already erased and have no operands, causes the crash.

Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5944875384

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/228395
DeltaFile
+35-0llvm/test/Transforms/SLPVectorizer/X86/reduction-gathered-root-erased-scalars.ll
+4-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+39-22 files

LLVM/project adeb6ee — llvm/lib/Transforms/Vectorize LoopVectorize.cpp

[LV][NFC] Fix unused variable warning (#228383)
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+1-11 files

FreeBSD/ports 48681c2 — devel/doxygen/files patch-examples_CMakeLists.txt

devel/doxygen: try to fix parallel building og docs/examples (+)

PR:     298219
MFH:    2026Q4
DeltaFile
+49-0devel/doxygen/files/patch-examples_CMakeLists.txt
+49-01 files

LLVM/project ba680de — lldb/test/API/functionalities/thread/exit_during_step TestExitDuringStep.py

[lldb][Windows] XFAIL TestExitDuringStep.py on ARM64 (#228392)

This is a follow up to https://github.com/llvm/llvm-project/pull/227318
which re-enabled `TestExitDuringStep.py` on Windows.

Those tests still fail on ARM64 Windows (see
https://github.com/llvm/llvm-project/pull/228391). XFAIL them for now.
DeltaFile
+15-1lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
+15-11 files

LLVM/project fe36d3f — clang/lib/CIR/Dialect/Transforms TargetLowering.cpp, clang/test/CIR/CodeGen spirv-target-lowering-as.cpp amdgpu-target-lowering-as.cpp

[CIR] Convert null pointer constant types in target lowering (#228068)

The pass converted the cir.const result type but not the type inside its
`#cir.ptr` attribute, so the verifier rejected address-space null
constants
DeltaFile
+7-3clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+10-0clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
+8-0clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
+25-33 files

OpenBSD/ports 3m6FSeW — www/apache-httpd Makefile distinfo, www/apache-httpd/patches patch-server_mpm_unix_c

   security update to 2.4.69
   20 CVE fixed, details at https://httpd.apache.org/security/vulnerabilities_24.html
   ok sthen@
VersionDeltaFile
1.43+9-0www/apache-httpd/pkg/PLIST
1.56+2-2www/apache-httpd/distinfo
1.146+1-2www/apache-httpd/Makefile
1.8+0-0www/apache-httpd/patches/patch-server_mpm_unix_c
+12-44 files

GhostBSD/install-station 5ef16f3 — src install_station

Merge pull request #18 from ghostbsd/improve-rc

Run the installer in a MATE session instead of marco and feh
DeltaFile
+9-4src/install_station
+9-41 files

LLVM/project a0cbcd0 — llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AArch64 sve-ldst.ll masked_ldst.ll

Reland [AArch64][CostModel] Consider some nxv1 operations as legal (#214471) (#228371)

This is allowing some operations on vscale x 1 types, namely:
 - load/store
 - masked load/store
 - arithmetic instructions like add/sub/mul

For those, there is already codegen coverage. See e.g.
 - llvm/test/CodeGen/AArch64/sve-int-arith.ll
 - llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
 - llvm/test/CodeGen/AArch64/sve-masked-gather.ll
 - llvm/test/CodeGen/AArch64/sve-masked-scatter.ll

These types are relevant for enabling REVEC in LoopVectorizer. For
AArch64, the main target there is turning NEON vector sizes into SVE
vector size, i.e. using VF = "vscale x 1". For loops with mixed vector
and scalar types, we'll want to allow vectorising scalar types with such
a VF.


    [2 lines not shown]
DeltaFile
+22-41llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
+48-9llvm/test/CodeGen/AArch64/sve-int-arith.ll
+31-20llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+4-4llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
+0-6llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
+3-3llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
+108-834 files not shown
+114-8910 files

NetBSD/pkgsrc-wip e5e2ea8 — rust-beta Makefile distinfo

rust-beta: update to 1.100.0beta.2
DeltaFile
+3-3rust-beta/distinfo
+1-1rust-beta/Makefile
+4-42 files

LLVM/project f6025b0 —

[lldb][Windows] Report a process exit once the process is gone (#228115)

When a debugged process exits, lldb and lldb-server report the exit
while Windows is still tearing the process down. Its executable and DLLs
are still loaded at that point, so a test that deletes or replaces one
of them right after the exit fails with `"access denied"`. This is what
makes `TestReplaceDLL` fail on Windows CI.

This patch reports the exit only after the debugger has released the
exit event and the process has fully terminated, which matches how POSIX
reports an exit.

On a Windows 11 host, `TestReplaceDLL` fails to delete `foo.dll` in 246
out of 640 runs before the change and in 0 of 1,600 after.

rdar://188918066
DeltaFile
+0-00 files

FreeNAS/freenas a4b16fe — src/middlewared/middlewared/plugins/network_ common.py

NAS-144144 / 27.0.0 / Fix network.common.check_dhcp_or_aliases never rejecting unconfigured interfaces (by Qubad786) (#19909)

## Problem
The check passed a list of each interface's settings to `any()`, and a
non-empty list is always truthy, so `interface.commit` only failed when
there were no interfaces at all. Committing a config where no interface
had DHCP, IPv6 autoconfig or an address would go through and `sync()`
would unconfigure every NIC.

## Solution
Check each interface's IPv4 DHCP, IPv6 autoconfig and aliases directly,
failing only when none of them is configured.


Original PR: https://github.com/truenas/middleware/pull/19898

Co-authored-by: M. Rehan <mrehanlm93 at gmail.com>
DeltaFile
+7-5src/middlewared/middlewared/plugins/network_/common.py
+7-51 files

FreeBSD/ports bc34cbc — japanese/p5-MeCab Makefile

japanese/p5-MeCab: Update MASTER_SITES and WWW

PR:             298585
Approved by:    perl (maintainer timeout, 2 weeks)
Approved by:    osa, fluffy (mentors, implicit)
DeltaFile
+2-2japanese/p5-MeCab/Makefile
+2-21 files

FreeNAS/freenas 867959f — src/middlewared/middlewared/plugins/network_ common.py

NAS-144144 / 28.0.0-BETA.1 / Fix network.common.check_dhcp_or_aliases never rejecting unconfigured interfaces (#19898)

## Problem
The check passed a list of each interface's settings to `any()`, and a
non-empty list is always truthy, so `interface.commit` only failed when
there were no interfaces at all. Committing a config where no interface
had DHCP, IPv6 autoconfig or an address would go through and `sync()`
would unconfigure every NIC.

## Solution
Check each interface's IPv4 DHCP, IPv6 autoconfig and aliases directly,
failing only when none of them is configured.
DeltaFile
+7-5src/middlewared/middlewared/plugins/network_/common.py
+7-51 files

FreeNAS/freenas 7d37a38 — src/middlewared/middlewared/alert/source mseries_nvdimm_and_bios.py, src/middlewared/middlewared/plugins/hardware m_series_nvdimm.py

NAS-144158 / 27.0.0 / Read NVDIMM health from the kernel instead of running ixnvdimm (by yocalebo) (#19908)

The NVDIMM alert check ran the ixnvdimm program twice for every module.
That made 24 firmware requests per module every five minutes. The check
used the results of only seven of them. Any of those requests can fail
when kernel memory is fragmented. The check now asks the kernel directly
through a new helper in utils/hardware/nvdimm.py. It makes three
requests per module on each check. Values that only change on reboot are
read once and kept. A failed request is tried one more time. If it fails
again the check keeps the alerts it already has. The three warning
threshold names now each use their own bit. ixnvdimm tested the lowest
bit for all of them.

Original PR: https://github.com/truenas/middleware/pull/19905

Co-authored-by: Caleb St. John <30729806+yocalebo at users.noreply.github.com>
DeltaFile
+263-170src/middlewared/middlewared/plugins/hardware/m_series_nvdimm.py
+156-0src/middlewared/middlewared/pytest/unit/plugins/test_m_series_nvdimm.py
+109-0src/middlewared/middlewared/pytest/unit/utils/test_hardware_nvdimm.py
+73-0src/middlewared/middlewared/utils/hardware/nvdimm.py
+19-0src/middlewared/middlewared/pytest/unit/alert/source/test_mseries_nvdimm.py
+10-2src/middlewared/middlewared/alert/source/mseries_nvdimm_and_bios.py
+630-1726 files

GhostBSD/networkmgr c20b127 — NetworkMgr configuration.py trayicon.py, po zh_CN.po sv.po

Merge pull request #127 from ghostbsd/issue-99-wifi-auth-feedback

Drive Wi-Fi through wpa_cli, save networks only once they connect
DeltaFile
+1,244-453NetworkMgr/net_api.py
+763-329NetworkMgr/trayicon.py
+449-375NetworkMgr/configuration.py
+0-227tests/unit/test_enterprise_wpa.py
+175-36po/zh_CN.po
+175-36po/sv.po
+2,806-1,45620 files not shown
+4,049-1,98626 files

FreeBSD/doc 48f6dee — website/content/en/cgi ports.cgi

ports.cgi: minor perl bugfixes
DeltaFile
+6-10website/content/en/cgi/ports.cgi
+6-101 files

GhostBSD/networkmgr 66e8140 — src setup-nic.py

Bring the wireless interface up on first setup

On a fresh system wpa_supplicant has no saved network. driver_bsd
downs the interface while it initializes and only raises it again to
scan or associate, which it never does without an enabled network.
rc does not run ifconfig up on WPA interfaces either, so the card
stayed down and wpa_supplicant sat in INTERFACE_DISABLED, refusing
scan requests with FAIL-BUSY.

When setup-nic.py declares the wlan in rc.conf for the first time, it
now marks the interface up after pccard_ether starts it, so
wpa_supplicant sees the interface enabled and starts scanning.
DeltaFile
+8-2src/setup-nic.py
+8-21 files

LLVM/project f718ebe — clang/include/clang/Sema SemaOpenMP.h, clang/lib/Sema SemaOpenMP.cpp

[clang][OpenMP] Keep 'requires' directives read from an AST file (#220058)

An OpenMP `requires` directive is recorded in Sema when the directive is
parsed
(`SemaOpenMP::ActOnOpenMPRequiresDirective`). Nothing repopulated that
list from an AST
file. A translation unit that gets its `requires` directive from a PCH
or a module
therefore behaves as if the directive were absent, and clang rejects
valid code.

`OMPRequiresDecl` is already serialized and eagerly deserialized, so the
declaration is
present in the AST. Only Sema's view of it was missing.

## Reproducer

```c++
// rev.h

    [60 lines not shown]
DeltaFile
+28-0clang/test/OpenMP/requires_module.cpp
+24-0clang/test/OpenMP/requires_pch.cpp
+16-0clang/lib/Serialization/ASTWriter.cpp
+13-0clang/lib/Serialization/ASTReader.cpp
+12-0clang/lib/Sema/SemaOpenMP.cpp
+6-0clang/include/clang/Sema/SemaOpenMP.h
+99-04 files not shown
+108-010 files

LLVM/project 6fd74fd — llvm/test/Transforms/SLPVectorizer/X86 absorbing-copyable-lane.ll wide-load-absorbed-lane.ll

[SLP][NFC]Add a test with the non-optimal vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/228385
DeltaFile
+401-0llvm/test/Transforms/SLPVectorizer/X86/wide-load-absorbed-lane.ll
+303-0llvm/test/Transforms/SLPVectorizer/X86/absorbing-copyable-lane.ll
+704-02 files

LLVM/project 4d2c189 — llvm/test/Transforms/SLPVectorizer/X86 absorbing-copyable-lane.ll wide-load-absorbed-lane.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+401-0llvm/test/Transforms/SLPVectorizer/X86/wide-load-absorbed-lane.ll
+303-0llvm/test/Transforms/SLPVectorizer/X86/absorbing-copyable-lane.ll
+704-02 files