[AMDGPU] Ignore debug instructions in invertSCCUse scan budget (#229961)
`invertSCCUse` limits how many instructions it scans after an SCC
definition. The loop currently counts `DBG_VALUE`s, so enough debug
records can exhaust `ScanLimit` before the following instruction proves
SCC dead. This makes the peephole result depend on debug information and
leaves a redundant compare.
Use `instructionsWithoutDebug` so the budget counts ordinary
instructions. The MIR regression test places nine `DBG_VALUE`s inside
the scan window; it fails on unmodified `main` because `S_CMP_LG_U32`
remains and passes with this patch when the redundant compare is
removed.
[Plugins] Always export `llvmGetPassPluginInfo()` (#229801)
The function is always meant to be exported and is never imported
"directly" via implicit linking. Instead, this is always done via
`dlsym` / `GetProcAddress`.
In order for the symbol to be properly exported from a plugin dylib, it
must be defined as `__declspec(dllexport)` on Windows. In general,
plugin symbol declaration must be declared with `LLVM_ABI_EXPORT`, as
the documentation for that macro indicates.
This was tested in dylib and non-dylib configurations on both Windows
and macOS and confirmed to work in both configurations.
The effort to build LLVM as a dylib is tracked in #109483.
[CIR] Register TargetLowering, LoweringPrepare and LibOpt in cir-opt (#229575)
Part of : https://github.com/llvm/llvm-project/issues/227917
Now that LoweringPrepare and LibOpt no longer take an ASTContext, all
three passes only read the module (triple, #cir.lowering_lang_options,
opt info), so they can run on .cir files directly. Register them in
cir-opt so they can be tested without going through CIRGen.
One nit is that LoweringPrepare asserted that the module has a triple,
assuming CIRGen always sets one. That no longer holds for hand-written
.cir, so I decided to emit a diagnostic/error and fail the pass instead.
These are the tests those transformations cover :
- lowering-prepare.cir: static-local guard lowering follows
threadsafe_statics from #cir.lowering_lang_options.
- lowering-prepare-global-ctor.cir: a global with a ctor region keeps
its
initial value through LoweringPrepare, including a lowered null member
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[CIR] Print the initial value of globals with a ctor region (#229565)
Globals were not printing their initializer when a ctor region existed
for the op. So round tripping the serialized op before running
LoweringPrepareo on a .cir module was throwing this error from the
verifier:
```sh
error: 'cir.global' op symbol declaration cannot have public visibility
```
The global lost its initial value on the round trip. Once
LoweringPrepare moved the ctor region out, had no initial value and no
regions, so it looked like a public declaration.
The initial value is now printed before the ctor region, the same way
the dtor region already works:
```mlir
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nodejs: updated to 26.11.1
26.11.1 (Current)
- Revert "build: toggle doc-kit verbosity based on V" (Antoine du Hamel)
- Revert "build, doc: move to redesign" (Antoine du Hamel)
- Revert "tools: bump the doc group in /tools/doc with 4 updates" (Antoine du Hamel)
[mlir][acc] Declare the memory effects of acc.atomic.read (#228899)
The operation read `x` and wrote `v` but declared no memory effects at
all, so every memory analysis had to treat both locations as unknown and
stay maximally conservative. In particular it could not be seen to
overwrite `v`.
Declare the effects per operand so the read on `x` and the write on `v`
are visible.
[HLSL] Add Barrier builtin (#228277)
This PR adds the Barrier builtin for HLSL for shader model 6.8, only
available for the DirectX backend.
Fixes: https://github.com/llvm/llvm-project/issues/99234
Assisted by: Github Copilot
---------
Copilot-Session: 2a688632-6a2b-4e02-b8fd-c68b2b1bbd64
[RISCV] Prefix option names with riscv-, turn disable- to positive options (#228922)
Rename the RISCV CodeGen options so that they start with riscv-, and
turn the -disable-* options that default to false into positive options
that default to true.
Preparatory for migrating to LibraryOptions.
Aided by Opus 5.5
[RISCV] Remove redundant sign extensions from BEXT indices (#228398)
`RISCVOptWInstrs` can remove redundant `sext.w` operations when all
users only depend on bits preserved by the original 32-bit value, but
does not account for the limited width of the `BEXT` index operand.
Extend `hasAllNBitUsers` to recognize that the `BEXT` index operand only
requires `log2(XLEN)` low bits. On RV64, `BEXT` effectively uses `index
& 63`, so `sext.w` does not affect the selected bit when its result is
used only as the index. The rule is intentionally limited to the index
operand, as the data operand may require the full XLEN-wide value.
Tests cover index sign-extension elimination, preservation of the data
operand, shared data/index uses, additional full-width users,
propagation through `COPY` and `PHI`, the six-bit boundary and five-bit
negative case, as well as RV32 behavior. Focused and nearby RISC-V tests
pass with MachineVerifier enabled.
AI tool usage: OpenAI Codex assisted with investigation, implementation,
and validation. I reviewed and understand the implementation, tests, and
validation results and take responsibility for the contribution.
[msan] Propagate shadow through addrspacecast. (#229860)
MemorySanitizer does not currently have a visitor for an `addrspacecast`
instruction. This means that the sanitizer inserts a check of the shadow
at the point of the `addrspace` instruction.
Since, on CPU builds, `addrspacecast` is a NOP, the compiler is free to
hoist it out of conditional code. For example, this bug was noticed
because a conditional access of the `addrspace` casted pointer in an
`std::variant` was turned into a `select` instruction by the compiler
and the cast itself was done before the select. MSAN inserts a shadow
check here and reports a false-posiitive "use-of-uninitialized value".
This change implements shadow tracking for `addrspacecasts` (like the
other casts) and propagates the operand's shadow to the resulting SSA
value instead of checking it at the point of the cast itself.
Tests have been added that show that tracking value propagates across
the cast.
[Clang] Update Codepoint names to Unicode 18. (#229080)
There were changes since the beta...
https://www.unicode.org/L2/L2026/26151.htm
This is technically a breaking change,
not that it's likely to affect anyone.
[CIR] Use alloca address space for CallConvLowering temporaries (#229792)
Summary:
- `call-conv-lowering` coercion and flattening temporaries were always
created in default AS which is invalid for targets with non zero alloca
AS.
- This PR creates these allocas in data layout AS.
- Added test to check callee, call-site and return coercion, the
flattening slot and Expand member pointers.
Assisted by : claude opus 5.5
cargo-nextest: updated to 0.9.148
0.9.148
Changed
For setup scripts, slow-timeout no longer accepts on-timeout = "pass", and nextest now reports a configuration error if it is specified. A setup script that times out always fails the run. Previously, this setting was accepted but handled inconsistently: the timed-out script was counted as a failure, but the run was not cancelled.
Internal dependency updates: guppy updated to 0.19.1, and target-spec updated to 3.7.0, updating built-in targets to Rust 1.98.
Fixed
Stress runs now exit with a non-zero code if any iteration failed. Previously, with fail-fast disabled, the exit code reflected only the last iteration, so a stress run with failures in earlier iterations exited with code 0 if the last iteration passed.
Stress runs now always run at least one iteration. Previously, --stress-duration with a very short duration (such as 1ns) could finish without running any tests.
Runs stopped by immediate fail-fast (--max-fail N:immediate) are now treated as failed rather than cancelled. Previously, in stress runs, the summary read 0 passed; cancelled due to test failure and the failing iteration was not counted as failed.
When the global timeout fires with immediate fail-fast enabled, nextest now reports the global timeout as the reason the run was cancelled. Previously, the tests terminated by the timeout counted as failures, so nextest printed a second Cancelling due to test failure line and reported a test failure as the reason.
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[flang][cuda] Add cuf.launch_config attribute recording a kernel directive's launch configuration (#229980)
Add a `cuf.launch_config` attribute to the CUF dialect, together with a
`getLaunchConfigAttrName()` helper for the attribute name.
The attribute records how a `!$cuf kernel do` directive spelled its
launch configuration: the number of dimensions the directive names, and
each grid dimension as written. A grid dimension left to the compiler is
spelled `*`, a constant by its value, and a variable by its name.
```mlir
#cuf.launch_config<dims = 2 : i64, grid = ["*", "*"]>
```
[BOLT] Match mmap events by build id (#229596)
Profiling on a host running two versions of the target binary with `perf
-a` might result in a profile containing mmap events from the desired
target and the second copy of that binary. In this case, perf2bolt will
attribute samples from both processes to the target binary. Match by
build id to filter samples.
Co-authored-by: Alexey Moksyakov <moksyakov.alexey at huawei.com>
[flang][cuda][semantics] Reject unguarded host-only and device-only calls in CUDA HOST,DEVICE procedures (#228176)
Previously, semantic checking allowed host-only and device-only calls
throughout a HOST,DEVICE procedure. This change requires unguarded
callees to support both its host and device versions.
A condition that checks the intrinsic ON_DEVICE permits host-only and
device-only calls in its guarded arms. The allowance includes one-line
IF statements, nested branches, and USE aliases. In an IF/ELSE IF chain,
a guard also applies to subsequent ELSE IF and ELSE arms. Guards
established inside an arm remain local to that arm.
When an ON_DEVICE arm, or its associated plain ELSE arm, contains an
unconditional RETURN, the allowance extends to the continuation after
the IF. Unconditional BLOCK constructs propagate these guards. A RETURN
in an unrelated IF/ELSE IF arm does not establish a continuation guard.
Unrelated branches restore their incoming checking context while
retaining an enclosing guard.
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