[ProfileData] Avoid magic layout indices in SampleProfileWriter (NFC) (#215981)
This patch removes hardcoded section layout indices in
SampleProfileWriterExtBinary in favor of finding the first unwritten
matching entry in SectionHdrLayout.
Previously, writeDefaultLayout and writeCtxSplitLayout passed magic
integer indices to writeOneSection to specify the position of each
section in SectionHdrLayout.
This patch introduces findUnwrittenEntry to dynamically look up the
matching unwritten section entry in SectionHdrLayout and determine its
ordinal among sections of the same type. This allows
writeDefaultLayout and writeCtxSplitLayout to iterate over declarative
arrays of sections without magic indices, and allows removing the
index-based addSectionFlag overload.
Assisted-by: Antigravity
[ProfileData] Remove SampleSorter (NFC) (#215941)
This patch removes SampleSorter in favor of direct iteration over
BodySamples and CallsiteSamples.
Originally, BodySamples and CallsiteSamples used DenseMap. Because
DenseMap does not guarantee iteration order, SampleSorter was
introduced to sort samples by LineLocation on demand when printing or
writing text profiles.
In December 2015, commit 10cf124bb920 switched BodySamples and
CallsiteSamples from DenseMap to std::map to reduce memory usage, but
SampleSorter was retained. Since std::map is already ordered by
LineLocation, SampleSorter is redundant.
Assisted-by: Antigravity
Reland "[Profile] Add a more descriptive message to the bad_header error" (#216230)
At the moment, the raw profile reader diagnoses different problem with
the same error message "invalid instrumentation profile data (file
header is corrupt)". On AIX, we had users report such problems thinking
it's a compiler bug, while the real problem was truncated profiles. The
particular case they hit was the condition
[here](https://github.com/llvm/llvm-project/blob/668803fa73bdf2f8d095162a1f81c000d18458c9/llvm/lib/ProfileData/InstrProfReader.cpp#L652):
```
Error RawInstrProfReader<IntPtrT>::readHeader(...) {
...
if (Start + ValueDataOffset > DataBuffer->getBufferEnd())
return error(instrprof_error::bad_header);
```
This could indicate a corrupted header (large garbage values for some
sections) or a truncated file.
I figured if we print the values and sizes we read in the header, it
will give the user more info.
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[BOLT][RISCV][NFC] Add a test for GOT references with a non-adjacent load (#215991)
The RISC-V psABI pairs the two halves of a PC-relative address through
the label that the %pcrel_lo relocation refers to, so the load holding
the low part does not have to follow the AUIPC directly.
Pin down the current behavior in that case. All three references name
the same symbol and should therefore resolve to the same GOT entry, but
only the first one does, because BOLT takes the low part from whatever
instruction follows the AUIPC: an unrelated ADDI in the second case, and
the terminator of the basic block in the third. The next commit fixes
this and updates the checks.
[DebugInfo][NFC] Document debug record salvage (#215907)
Document the order salvageDebugInfoForDbgValues works in: a dbg.assign
address before its variable location, stop once a variable location
can't be salvaged, and kill every supplied record when none of them were
processed.
salvageDebugInfo is documented on both its declaration and its
definition, keep the header copy and update it.
No regressions on check-llvm.
[ORC] Realign EPCGenericJITLinkMemoryManager Create API (#216216)
Bring EPCGenericJITLinkMemoryManager into alignment with
EPCGenericMemoryAccess and EPCGenericDylibManager: a Bindings
constructor plus static Create methods that build the bindings from the
ProxySpecs using the default controller-interface names.
Create(JITDylib&) resolves the SimpleNativeMemoryMap symbols in the
given JITDylib; Create(ExecutionSession&) uses the bootstrap JITDylib.
Clients targeting a different protocol can construct their own Bindings
directly.
This replaces the previous scheme where Create took a
SimpleExecutorMemoryManagerSymbolNames override.
[libc][Semaphore] Fix tests - remove APPEND_LIBC_TEST macro uses. (#216219)
APPEND_LIBC_TEST was removed in abeb492322c12860a4533426208d6d26155cd0bc
, remove it from the newly added semaphore tests as well.
[CIR][CodeGen] Emit cir.fmuladd for FP-contracted mul+add/sub (#215382)
Ports the FP-contraction fusion from classic CodeGen (`tryEmitFMulAdd` /
`buildFMulAdd`) to CIRGen. Under `-ffp-contract=on / fast`, `a * b + c`
and `a * b - c` fuse into `cir.fmuladd` (with the addend negated for the sub
form) instead of separate `cir.fmul` + `cir.fadd/fsub`.
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
routing: Fix table sizes
Tables that have one element per protocol or address family were
previously sized by AF_MAX + 1 since AF_MAX was off by one. Now that
AF_MAX has been corrected, we need to apply the opposite correction to
these tables.
Fixes: ddd850aa7720 ("sys/socket.h: Fix AF_MAX")
MFC after: 3 days
Sponsored by: Klara, Inc.
Sponsored by: NetApp, Inc.
Reviewed by: pouria, kevans, glebius
Differential Revision: https://reviews.freebsd.org/D58826
libifconfig: Fix table size
Tables that have one element per protocol or address family were
previously sized by AF_MAX + 1 since AF_MAX was off by one. Now that
AF_MAX has been corrected, we need to apply the opposite correction to
these tables.
Fixes: ddd850aa7720 ("sys/socket.h: Fix AF_MAX")
MFC after: 3 days
Sponsored by: Klara, Inc.
Sponsored by: NetApp, Inc.
Reviewed by: kevans
Differential Revision: https://reviews.freebsd.org/D58827
pciconf: Sort resource windows in order of decreasing alignment
instead of size.
Consider pci0 has two ppb's. ppb0 has a memory window larger in
size, but smaller in alignment. ppb1 has one smaller in size, but
larger in alignment.
In this case, the memory window of ppb1 must be allocated earlier.
Otherwise, total size of required memory exceeds pci0's mem_total,
in general, due to padding region.
[mlir][xegpu] Lower lane_data repack convert_layout to lane_shuffle (#210837)
Extend the SgToLaneConvertLayout pattern to lower a convert_layout that
only repacks lane_data between round-robin and contiguous form (keeping
lane_layout and order unchanged) into xegpu.lane_shuffle. Each lane
keeps the same elements and total bits along the repacked dimension, but
their assignment to lanes changes, so the data is moved across lanes
with a bit-preserving bitcast_shuffle.
assisted-by-claude
---------
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
[mlir][XeGPU] Distribute create_nd_tdesc/load/store with SliceAttr layout (#216104)
## Summary
- `WgToSgCreateNdOp` and `XeGPUWgToSgDistributePass`'s dynamic legality
check only matched `xegpu::LayoutAttr` on a tensor_desc's layout, not
`xegpu::SliceAttr` (also a `DistributeLayoutAttr`).
- A tensor_desc feeding a unit-dim-expanding `vector.shape_cast` carries
a `SliceAttr`, so such `create_nd_tdesc`/`load_nd` ops were left
undistributed while their consumers were already converted to subgroup
shape, causing a `vector.shape_cast` element-count mismatch.
- Match on `DistributeLayoutAttr` instead, consistent with the rest of
the pass (`getSgShapeAndCount`, `genOffsetsList`, etc.).
## Test plan
- [x] Added a regression test to `xegpu-wg-to-sg.mlir`:
`create_nd_tdesc`/`load_nd` with a `SliceAttr` layout feeding
`shape_cast` (expand) → `arith.addf` → `shape_cast` (collapse) →
`store_nd`.
- [x] Verified the new test fails on `main` with the reported error and
passes with this fix.
Remove minor version from kmods repo
We don't have a kmods_quarterly_5 repo for releng/14.5 so don't point
users at it.
Direct commit to releng/14.5, hopefully to be reverted once the repo
exists.
Approved by: re (cperciva)
Sponsored by: OpenSats Initiative
