LLVM/project d1de038 — clang/include/clang/Basic BuiltinsHexagon.td BuiltinsHexagonDep.td, libc/src/__support/math pow_accurate_256.h

Merge branch 'main' into users/jmmartinez/tempfile_keep_exdev
DeltaFile
+2,631-0libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.noexceptions.nonew.abilist
+2,147-0clang/include/clang/Basic/BuiltinsHexagonDep.td
+1-2,137clang/include/clang/Basic/BuiltinsHexagon.td
+445-738libc/src/__support/math/pow_accurate_256.h
+16-1,151llvm/test/CodeGen/X86/masked_expandload_f16.ll
+1,072-0llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
+6,312-4,0261,563 files not shown
+46,137-20,4701,569 files

LLVM/project 786de2a — .github/workflows libc-shared-tests.yml compiler-rt-libc-builtins-tests.yml

Revert "[libc] Enable baremetal Armv7-M pre-merge tests" (#240765)

Reverts llvm/llvm-project#233498

This change made a bug in the GitHub workflow apparent, although it did
not cause it.

Reverting while we fix this bug in order to have a clean CI.
DeltaFile
+3-3.github/workflows/libc-overlay-tests.yml
+3-3.github/workflows/libc-fullbuild-tests.yml
+2-2.github/workflows/libc-shared-tests.yml
+2-2.github/workflows/compiler-rt-libc-builtins-tests.yml
+10-104 files

LLVM/project e0e76a2 — llvm/docs LangRef.md, llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp

[LangRef] Make VP intrinsics with EVL > num elements non-UB

For the remaining VP intrinsics which don't access memory:

- vp.merge
- vp.reduce.*
- vp.cttz.elts
- vp.splice
- vp.reverse

These are marked as speculatable. However the LangRef states that if the EVL > the number of elements in the vector then the behaviour is undefined. The two are inconsistent, so this PR tightens the result in this scenario to be poison.

As a result the vp.reverse expansion needs to be updated to clamp the EVL so it doesn't read outside of the stack object.

vp.udiv/vp.sdiv/vp.urem/vp.srem are also included here even though they're not speculatable. They can still cause UB if division by zero or overflow occurs on any lane even when EVL > number of elts, so I've added lines to clarify this.

VP intrinsics that read/write memory need to remain UB to match how backends lower them, they just use the EVL verbatim without any clamping or checks.
DeltaFile
+24-9llvm/docs/LangRef.md
+10-5llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
+8-3llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
+4-4llvm/lib/IR/IntrinsicInst.cpp
+4-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+50-215 files

LLVM/project 947c87e — llvm/docs LangRef.md, llvm/lib/CodeGen ExpandVectorPredication.cpp

[LangRef][CodeGen] Fix vp.udiv and friends introducing UB during expansion and clarify poison lanes (#240755)

The LangRef isn't immediately clear on how poison lanes (`%mask AND
%evl`) are handled in vp.udiv/vp.sdiv/vp.urem/vp.srem. This PR updates
it to clarify that they return a poison lane, but also perform division
and can cause UB.

So as a result, vp.udiv/vp.sdiv/vp.urem/vp.srem only have UB if a
divison by zero/overflow occurs, even if the mask lane contains poison.
E.g. `vp.udiv x, <1, 1, 1, 1>, mask=<poison, poison, poison, poison>,
evl=4` should be poison, but shouldn't be UB.

When vp.udiv/vp.sdiv/vp.urem/vp.srem are expanded, they're expanded to a
safe divisor like `udiv op0, (select mask, op1, 1)`.
If one of the mask lanes is poison then the new divisor is poison, which
is immediate UB. We need to freeze mask to prevent propagation.

It's possible to add a combine to avoid the x86 codegen regression but I
don't think it's worth it. The loop vectorizer doesn't emit VP

    [4 lines not shown]
DeltaFile
+10-5llvm/test/Transforms/PreISelIntrinsicLowering/expand-vp.ll
+8-5llvm/docs/LangRef.md
+8-4llvm/test/CodeGen/X86/expand-vp-int-intrinsics.ll
+4-2llvm/lib/CodeGen/ExpandVectorPredication.cpp
+30-164 files

LLVM/project 63e7c9e — mlir/lib/Dialect/SPIRV/IR SPIRVOps.cpp, mlir/test/Dialect/SPIRV/IR composite-ops.mlir

[mlir][SPIR-V] Reject single constituent vector CompositeConstruct (#240507)

Spec requires at least two constituents when constructing a vector
DeltaFile
+8-0mlir/test/Dialect/SPIRV/IR/composite-ops.mlir
+5-0mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
+13-02 files

FreeBSD/src daa4c25 — sys/compat/freebsd32 freebsd32_sysent.c freebsd32_proto.h, sys/kern init_sysent.c

sysent: regen after adding COMPAT15 support
DeltaFile
+6-0sys/sys/sysproto.h
+6-0sys/kern/init_sysent.c
+6-0sys/compat/freebsd32/freebsd32_sysent.c
+6-0sys/compat/freebsd32/freebsd32_proto.h
+24-04 files

FreeBSD/src 57763e6 — sys/kern syscalls.master, sys/tools/syscalls config.lua

sysent: add support for COMPAT15 syscalls

Sponsored by:   DARPA, AFRL, Innovate UK

Reviewed by:    kevans
Differential Revision:  https://reviews.freebsd.org/D61342
DeltaFile
+1-0sys/tools/syscalls/config.lua
+1-0sys/kern/syscalls.master
+2-02 files

LLVM/project 0752b5f — offload/include/Shared APITypes.h, offload/plugins-nextgen/amdgpu/src rtl.cpp

[Offload][NFC] Move __tgt_async_info into PluginInterface.h (#240772)

__tgt_async_info is no longer used by libomptarget (only by liboffload
and the plugins). Move it from the shared APITypes header to the plugin
interface header. The plugins don't need anything from the APITypes
header anymore so remove includes.

Assisted by Claude.
DeltaFile
+22-1offload/plugins-nextgen/common/include/PluginInterface.h
+0-21offload/include/Shared/APITypes.h
+3-2offload/plugins-nextgen/common/include/GenericProfiler.h
+0-1offload/plugins-nextgen/cuda/src/rtl.cpp
+0-1offload/plugins-nextgen/common/src/PluginInterface.cpp
+0-1offload/plugins-nextgen/amdgpu/src/rtl.cpp
+25-276 files

NetBSD/pkgsrc eRtx71S — net/py-aio-pika Makefile PLIST

   py-aio-pika: updated to 10.2.3

   10.2.3

   Await generator-based callback coroutines
   Allow pool item release after shutdown
VersionDeltaFile
1.24+4-4net/py-aio-pika/distinfo
1.27+3-3net/py-aio-pika/Makefile
1.5+5-1net/py-aio-pika/PLIST
+12-83 files

LLVM/project 9c9a892 — clang/lib/AST/ByteCode Interp.cpp

[clang][bytecode][NFC] Avoid a `getLocation()` call in `InvalidCast` (#240748)

First, `getSource()` is better than `getLocation()` because it
potentially avoids a `getExprLoc()` call, which is slow. Second, we
don't need `Loc` at all for `CastKind::ReinterpretPtrToInt`.
DeltaFile
+3-5clang/lib/AST/ByteCode/Interp.cpp
+3-51 files

NetBSD/pkgsrc X6ldgyv — doc CHANGES-2026

   Updated net/py-pamqp, net/py-aiormq
VersionDeltaFile
1.7893+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc jkghjRQ — net/py-aiormq Makefile distinfo

   py-aiormq: updated to 7.2.5

   7.2.5
   Update pamqp to version 5
VersionDeltaFile
1.16+4-4net/py-aiormq/distinfo
1.19+3-3net/py-aiormq/Makefile
+7-72 files

LLVM/project c99d6db — llvm/lib/Target/RISCV RISCVInstrInfo.h

[llvm, RISC-V] Fix name hiding of TargetInstrInfo::isSafeToMove (NFC) (#240361)

When RISCVInstrInfo::isSafeToMove was added, it accidentally hidden the
TargetInstrInfo::isSafeToMove due to the name hiding rules.

from .../llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp:18:
.../llvm/include/llvm/CodeGen/TargetInstrInfo.h:1805:16: warning:
‘virtual bool llvm::TargetInstrInfo::isSafeToMove(const
llvm::MachineInstr&, const llvm::MachineBasicBlock*, const
llvm::MachineFunction&) const’ was hidden [-Woverloaded-virtual=]
 1805 |   virtual bool isSafeToMove(const MachineInstr &MI,
      |                ^~~~~~~~~~~~
.../llvm/lib/Target/RISCV/RISCVInstrInfo.h:349:15: note: by ‘static bool
llvm::RISCVInstrInfo::isSafeToMove(const llvm::MachineInstr&, const
llvm::MachineBasicBlock::iterator&)’
  349 |   static bool isSafeToMove(const MachineInstr &From,
      |               ^~~~~~~~~~~~
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVInstrInfo.h
+1-01 files

NetBSD/pkgsrc Ogk11vj — net/py-pamqp Makefile distinfo

   py-pamqp: updated to 5.0.0

   5.0.0 (2026-10-30)
   - Encode `bytes` field table and field array values as the AMQP byte array (`x`) type, the same as `bytearray`
   - **Breaking:** decode AMQP byte array (`x`) values as `bytes`, not `bytearray`. Code that changes a decoded value in place must copy it to a `bytearray` first
VersionDeltaFile
1.8+4-4net/py-pamqp/distinfo
1.10+3-3net/py-pamqp/Makefile
+7-72 files

LLVM/project 36f307f — offload/test/offloading get_num_devices_device.c

[Offload][Omp] Mark aarch64 as unsupported in get_num_devices_device test (#240399)

The test get_num_devices_device.c was added in #238271 and marked x86_64
as unsupported but it seems we also need to mark aarch64.
DeltaFile
+1-2offload/test/offloading/get_num_devices_device.c
+1-21 files

LLVM/project 9750662 — flang/test/Integration/OpenMP dispatch.f90

[NFC][flang] Skip x86-only test (#240458)

Quick fix for builders which don't build x86 backends.
DeltaFile
+1-0flang/test/Integration/OpenMP/dispatch.f90
+1-01 files

LLVM/project a9d7831 — llvm/include/llvm/CodeGen SelectionDAG.h SelectionDAGAddressAnalysis.h, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp SelectionDAGAddressAnalysis.cpp

[CodeGen] Extend Address Analysis for Scalable Offsets (#234553)

Extending Address analysis for scalable offsets for finding contiguous
load/store.
Using StackOffset which can represent fixed and scalable offsets.
DeltaFile
+36-20llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp
+51-0llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp
+18-16llvm/test/CodeGen/AArch64/extbinopload.ll
+22-6llvm/include/llvm/CodeGen/SelectionDAGAddressAnalysis.h
+13-8llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+12-2llvm/include/llvm/CodeGen/SelectionDAG.h
+152-526 files

NetBSD/pkgsrc s0Kt26l — devel/libelf Makefile

   libelf: add new mirror link

   Fixes make fetch for the package. Uses the same mirror as homebrew.
VersionDeltaFile
1.19+3-3devel/libelf/Makefile
+3-31 files

LLVM/project 03cee82 — llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/lib/Transforms/Vectorize VPlanRecipes.cpp VPlanPatternMatch.h

[LV] Support widening predicated loads/stores to UF x VF (#233782)

This patch follows #217670 and adds support for widening loads/stores to
UF x VF in loops that use a wide active lane mask.

When widening predicated loads/stores, we also update the mask PHI to
the full mask width. This allows the widened loads/stores to use the
full-width mask directly.

On AArch64, this style of loop can be lowered to multi-vector
loads/stores using a predicate-as-counter for masking.
DeltaFile
+600-1llvm/test/Transforms/LoopVectorize/AArch64/multi-vector-mem-ops.ll
+72-18llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+52-14llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-printing-multi-vector-mem-ops.ll
+26-9llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+19-5llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+16-4llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+785-514 files not shown
+813-5510 files

LLVM/project 40a48a5 — llvm/docs LangRef.md, llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp

[LangRef] Make VP intrinsics with EVL > num elements non-UB

For the remaining VP intrinsics which don't access memory:

- vp.merge
- vp.reduce.*
- vp.cttz.elts
- vp.splice
- vp.reverse

These are marked as speculatable. However the LangRef states that if the EVL > the number of elements in the vector then the behaviour is undefined. The two are inconsistent, so this PR tightens the result in this scenario to be poison.

As a result the vp.reverse expansion needs to be updated to clamp the EVL so it doesn't read outside of the stack object.

vp.udiv/vp.sdiv/vp.urem/vp.srem are also included here even though they're not speculatable. They can still cause UB if division by zero or overflow occurs on any lane even when EVL > number of elts, so I've added lines to clarify this.

VP intrinsics that read/write memory need to remain UB to match how backends lower them, they just use the EVL verbatim without any clamping or checks.
DeltaFile
+24-9llvm/docs/LangRef.md
+10-5llvm/test/CodeGen/RISCV/rvv/vp-reverse-mask.ll
+8-3llvm/test/CodeGen/RISCV/rvv/vp-reverse-int.ll
+4-4llvm/lib/IR/IntrinsicInst.cpp
+4-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+50-215 files

LLVM/project b742496 — llvm/lib/Analysis LoopAccessAnalysis.cpp, llvm/test/Analysis/LoopAccessAnalysis negative-step-deref-off-by-eltsize.ll deref-start-below-base.ll

[LAA] Drop redundant start check in evaluatePtrAddRecAtMaxBTCWillNotWrap  (#237282)

The function bailed out unless AR's start was known u>= StartPtr. This
is
implied by the final MaxOffset u<= DerefBytes check, which in both
directions bounds StartOffset by DerefBytes: for a non-negative step
MaxOffset is StartOffset + AccessedBytes, built without overflow; for a
negative step it is StartOffset itself.

StartOffset is Start - StartPtr modulo 2^N, so Start == StartPtr +
StartOffset with StartOffset in [0, DerefBytes]:

```
  StartPtr                 StartPtr + DerefBytes
     |                              |
     |===================|==========|   dereferenceable, cannot wrap
     |<-- StartOffset -->|          |
                       Start
```

    [6 lines not shown]
DeltaFile
+131-0llvm/test/Analysis/LoopAccessAnalysis/deref-start-below-base.ll
+5-8llvm/test/Analysis/LoopAccessAnalysis/negative-step-deref-off-by-eltsize.ll
+5-5llvm/lib/Analysis/LoopAccessAnalysis.cpp
+141-133 files

LLVM/project ffc804d — llvm/lib/Passes PassBuilderPipelines.cpp, llvm/test/Transforms/PhaseOrdering speculative-devirt-anon-globals.ll

[WPD] Fix crash during devirtualization in non-LTO mode due to anon globals (#237274)

When the WPD pass runs without LTO, it will construct a module summary
index for itself, which will cause a crash if there are multiple
anonymous globals in the module. This happens because the anonymous
globals will be assigned the same GUIDs by the AssignGUID pass, so there
will be multiple summaries associated with one GUID.
DeltaFile
+23-0llvm/test/Transforms/PhaseOrdering/speculative-devirt-anon-globals.ll
+1-0llvm/lib/Passes/PassBuilderPipelines.cpp
+24-02 files

LLVM/project 9662826 — llvm/lib/Transforms/IPO ArgumentPromotion.cpp, llvm/test/Transforms/ArgumentPromotion implicit-pointer-dbginfo.ll

Revert "[ArgumentPromotion] Emit DW_OP_LLVM_implicit_pointer for promoted poi…"

This reverts commit 25f8e5702e2d82d7445a789705ec4dd066930b3c.
DeltaFile
+0-113llvm/test/Transforms/ArgumentPromotion/implicit-pointer-dbginfo.ll
+3-64llvm/lib/Transforms/IPO/ArgumentPromotion.cpp
+3-1772 files

NetBSD/pkgsrc GUQjUrL — doc TODO

   doc/TODO: + MesaLib-26.3.
VersionDeltaFile
1.28353+2-1doc/TODO
+2-11 files

NetBSD/pkgsrc lzqBP9A — doc CHANGES-2026

   Updated textproc/py-bracex, graphics/py-svglib
VersionDeltaFile
1.7892+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc E5yCRip — graphics/py-svglib Makefile distinfo

   py-svglib: updated to 2.4.0

   2.4.0 (2026-11-04)

   Added

   - `<textPath>` is now supported: text follows the `<path>` named by its `href`
     or `xlink:href`, with `startOffset` (a length or a percentage) and
     `text-anchor`, and styled `<tspan>` children. ReportLab can't draw text along
     a path, so each glyph is placed and rotated individually, at the point of the
     path under its midpoint; glyphs beyond the end of the path are dropped. Only
     paths of the same document can be followed, and `side`, `method`, `spacing`
     and per-glyph `dx`/`dy`/`rotate` are not supported
   - The plain `opacity` property is now supported, as a presentation attribute,
     in `style` attributes and in `<style>` rules, including percentages. Opacity
     composes down the tree, so a shape at 0.5 inside a group at 0.5 is drawn at
     0.25. It is applied per shape, so overlapping shapes inside a translucent
     group show through each other, and images are not affected
     thanks to @Pharex38).

    [48 lines not shown]
VersionDeltaFile
1.6+4-4graphics/py-svglib/distinfo
1.8+2-2graphics/py-svglib/Makefile
+6-62 files

LLVM/project b34140c — llvm/include/llvm/Frontend/OpenMP OMPKinds.def, llvm/test/Transforms/OpenMP add_attributes.ll

[OpenMP] Drop optimistic attributes from taskloop bound arguments

Under the default off -openmp-ir-builder-optimistic-attributes flag the
loop bounds get attributed as captures(none) nofree.
Changing them to AttributeSet() removes those claims from the
__kmpc_taskloop and __kmpc_taskloop_5 declarations. The runtime uses
the bounds' addresses to locate the bounds for each task it creates.
Even though the memory also reachtes the runtime through the task
argument the claims in the IR about the arguments are still wrong.
DeltaFile
+4-3llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
+2-2llvm/test/Transforms/OpenMP/add_attributes.ll
+6-52 files

LLVM/project ccc134e — clang/lib/Serialization ASTWriterDecl.cpp, clang/test/Modules codegen-exclude-from-explicit-instantiation.cpp

[clang][Modules] Don't home functions excluded from explicit instantiation (#240594)

With `-fmodules-codegen`, inline functions and implicit template
instantiations are emitted into the module's object file and users of
the module only reference them. libc++ marks most of its inline
functions as hidden and excluded from explicit instantiation, so such a
reference can't be resolved if the module's object file is linked into a
different shared library than the user. For example, a test that links
against the shared library of a module that instantiates
`std::vector<T>` fails with "undefined hidden symbol" for the members of
`std::vector<T>` that it calls.

Emit these functions in every user instead, just like `always_inline`
functions. This matches the meaning of the attribute, which already
makes every user instantiate the function despite an explicit
instantiation declaration. Before e9d85264ac replaced `always_inline`
with `exclude_from_explicit_instantiation` in libc++, its hidden
functions were never homed because of the `always_inline` check.

Assisted-by: Claude Code (Claude Opus 5.5)
DeltaFile
+43-0clang/test/Modules/codegen-exclude-from-explicit-instantiation.cpp
+6-2clang/lib/Serialization/ASTWriterDecl.cpp
+49-22 files

LLVM/project 1a8375b — clang/lib/CIR/Dialect/Transforms CIRCanonicalize.cpp, clang/test/CIR/CodeGenOpenACC compute-reduction-clause-default-ops.c

[CIR] Make cir-canonicalize a full canonicalizer

cir-canonicalize applied the CIR canonicalization patterns and folders
only to a hand-written list of operations. It now builds the pattern set
once in initialize() and runs the greedy driver over every operation, so
every pattern and folder applies everywhere. Dead code elimination is
disabled: CIR stays close to the source, so unused locals and ignored
expressions are kept as in classic codegen, and only the inputs of a
folded operation can be left unused. Empty scopes and switches were
removed only because they were dead, so they get explicit
canonicalization patterns.

The pass uses the multi-op driver because the region driver always
erases blocks without a CFG predecessor, and a block that starts with
cir.label is reached only through cir.goto until the goto solver runs.
Region simplification stays off for the same reason. The new
test-convergence option fails the pass when the driver does not reach a
fixpoint, as in the upstream canonicalizer.

Assisted-by: Claude Code (claude-opus-5-5).
DeltaFile
+49-58clang/lib/CIR/Dialect/Transforms/CIRCanonicalize.cpp
+48-0clang/test/CIR/CodeGenOpenACC/compute-reduction-clause-default-ops.c
+42-0clang/test/CIR/Transforms/canonicalize-dead-code.cir
+29-2clang/test/CIR/Transforms/canonicalize.cir
+30-0clang/test/CIR/Transforms/vector-cmp-fold.cir
+25-0clang/test/CIR/Transforms/bit.cir
+223-6035 files not shown
+376-7341 files

LLVM/project 1b007cb — llvm/test/CodeGen/AArch64 freeze-multi-use.ll, llvm/test/CodeGen/AMDGPU freeze-multi-use.ll

Precommit cross-block freeze tests

Assisted-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+94-0llvm/test/CodeGen/AMDGPU/freeze-multi-use.ll
+32-0llvm/test/CodeGen/RISCV/freeze-multi-use.ll
+23-0llvm/test/CodeGen/AArch64/freeze-multi-use.ll
+20-0llvm/test/CodeGen/X86/freeze-multi-use.ll
+169-04 files