FreeNAS/freenas 8a253e9src/middlewared/middlewared/plugins/nvmet port.py

Add VLAN support for RDMA in nvmet.port.transport_address_choices

(cherry picked from commit d00d2721860808c904a81d137c749d92a769d73b)
DeltaFile
+34-0src/middlewared/middlewared/plugins/nvmet/port.py
+34-01 files

FreeNAS/freenas b986baesrc/middlewared/middlewared/plugins/nvmet port.py

NAS-138867 / 25.10.3 / Add VLAN support for RDMA in nvmet.port.transport_address_choices (#18088)

DeltaFile
+34-0src/middlewared/middlewared/plugins/nvmet/port.py
+34-01 files

LLVM/project 12b3a9fllvm/test/tools/llvm-exegesis/AArch64 debug-gen-asm.s

[llvm-exegesis] Add -mtriple to AArch64 test (#177485)

Similar to https://github.com/llvm/llvm-project/pull/148968
DeltaFile
+2-2llvm/test/tools/llvm-exegesis/AArch64/debug-gen-asm.s
+2-21 files

LLVM/project bc4b276llvm/lib/Target/AMDGPU AMDGPUSubtarget.h GCNSubtarget.h

[NFCI][AMDGPU] Refine `AMDGPUSubtarget.h` (#177473)

This PR is to move code around to pave the path for using
`GET_SUBTARGETINFO_MACRO` in `GCNSubtarget.h`.
DeltaFile
+60-88llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+14-1llvm/lib/Target/AMDGPU/GCNSubtarget.h
+74-892 files

LLVM/project a68bd39llvm/lib/Transforms/Vectorize VPlan.cpp, llvm/test/Transforms/LoopVectorize exact.ll tripcount.ll

capture weights
DeltaFile
+27-7llvm/lib/Transforms/Vectorize/VPlan.cpp
+30-3llvm/test/Transforms/LoopVectorize/exact.ll
+9-6llvm/test/Transforms/LoopVectorize/tripcount.ll
+66-163 files

LLVM/project 7d5622foffload/test/mapping declare_mapper_target_checks.cpp

[NFC][OpenMP] Mark new mapper test as XFAIL on intelgpu. (#177491)

Other tests in the directory already do this. The new test was added in
#177059.
DeltaFile
+2-0offload/test/mapping/declare_mapper_target_checks.cpp
+2-01 files

LLVM/project 476a194libc/src/__support/CPP/type_traits is_integral.h, libc/src/__support/wchar character_converter.h

[libc] Handle charNN_t in cpp::is_integral (#177463)

In C++20, char8_t is a distinct type from unsigned char, but is
still an integral type.  char16_t and char32_t are integral types
in both C++17 and C++20.

This also reverts the change in PR #177421, which is not needed
when cpp::is_integral_v<char8_t> works correctly in all modes.
DeltaFile
+10-5libc/src/__support/CPP/type_traits/is_integral.h
+1-2libc/src/__support/wchar/character_converter.h
+11-72 files

LLVM/project 8a954fellvm/lib/Transforms/Vectorize LoopVectorize.cpp

[LV] Replace legacy FindLast check with VPlan-based one (NFCI).

Checking directly in VPlan is more accurate, as the reductions could
have been transformed. This does not happen yet, so currently NFC.
DeltaFile
+1-4llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+1-41 files

LLVM/project d7697c3llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine binop-itofp.ll pow-to-ldexp.ll

InstCombine: Use SimplifyDemandedFPClass on fmul

Start trying to use SimplifyDemandedFPClass on instructions, starting
with fmul. This subsumes the old transform on multiply of 0. The
main change is the introduction of nnan/ninf. I do not think anywhere
was systematically trying to introduce fast math flags before, though
a few odd transforms would set them.

Previously we only called SimplifyDemandedFPClass on function returns
with nofpclass annotations. Start following the pattern of
SimplifyDemandedBits, where this will be called from relevant root
instructions.

I was wondering if this should go into InstCombineAggressive, but that
apparently does not make use of InstCombineInternal's worklist.
DeltaFile
+12-12llvm/test/Transforms/InstCombine/binop-itofp.ll
+10-10llvm/test/Transforms/InstCombine/pow-to-ldexp.ll
+9-7llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+2-13llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+13-1llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+4-4llvm/test/Transforms/InstCombine/pow_fp_int16.ll
+50-4713 files not shown
+75-7419 files

LLVM/project 58f3159flang/include/flang/Evaluate real.h

[flang][AIX] Suppress AIX compat error (NFC) (#177174)

DeltaFile
+9-0flang/include/flang/Evaluate/real.h
+9-01 files

LLVM/project 98b42e3clang/test/CodeGenHLSL/builtins atan2-overloads.hlsl cos-overloads.hlsl

[HLSL] Make atan2, cos, ceil overload tests stricter NFC  (#177431)

This patch updates atan2, cos and ceil overload tests to use -O1 instead
of -disable-llvm-passes; also, the checks are updated to match the
change accordingly.

This work is part of https://github.com/llvm/llvm-project/issues/138016.
DeltaFile
+102-42clang/test/CodeGenHLSL/builtins/atan2-overloads.hlsl
+82-42clang/test/CodeGenHLSL/builtins/cos-overloads.hlsl
+66-42clang/test/CodeGenHLSL/builtins/ceil-overloads.hlsl
+250-1263 files

OpenBSD/ports wY8PWgzsecurity/libsodium Makefile, security/libsodium/patches patch-src_libsodium_crypto_ipcrypt_ipcrypt_aesni_c patch-src_libsodium_crypto_ipcrypt_ipcrypt_armcrypto_c

   gcc 4.x fixes, found by tb
VersionDeltaFile
1.1+17-0security/libsodium/patches/patch-src_libsodium_crypto_ipcrypt_ipcrypt_aesni_c
1.1+17-0security/libsodium/patches/patch-src_libsodium_crypto_ipcrypt_ipcrypt_armcrypto_c
1.1+17-0security/libsodium/patches/patch-src_libsodium_crypto_ipcrypt_ipcrypt_soft_c
1.42+1-0security/libsodium/Makefile
+52-04 files

LLVM/project a7b57cfclang/test/OpenMP target_map_array_section_of_structs_with_nested_mapper_codegen.cpp target_map_array_of_structs_with_nested_mapper_codegen.cpp, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[OpenMP][Mappers] Fix ref-count tracking for maps inserted by mappers. (#177059)

This is a fix for https://github.com/llvm/llvm-project/issues/61636.

Ravi had this implemented downstream before he retired. This PR is a
chery-pick of that.

The test is taken from @jdoerfert's WIP change in

https://github.com/jdoerfert/llvm-project/commit/527bf4b1293f452aac1f872c4f771c7950b911f9.

The change partially undoes the changes done in
0caf736d7e1d16d1059553fc28dbac31f0b9f788, so @alexey-bataev might need
to take a look.

---------

Co-authored-by: Ravi Narayanaswamy <ravi.narayanaswamy at intel.com>
Co-authored-by: Johannes Doerfert <johannes at jdoerfert.de>
DeltaFile
+140-146clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
+107-113clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
+164-0offload/test/mapping/declare_mapper_target_checks.cpp
+5-20clang/test/OpenMP/declare_mapper_codegen.cpp
+0-8llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+3-5offload/libomptarget/omptarget.cpp
+419-2922 files not shown
+422-3008 files

FreeNAS/freenas d00d272src/middlewared/middlewared/plugins/nvmet port.py

Add VLAN support for RDMA in nvmet.port.transport_address_choices
DeltaFile
+34-0src/middlewared/middlewared/plugins/nvmet/port.py
+34-01 files

LLVM/project 30fc5c1llvm/lib/Target/PowerPC PPCAsmPrinter.cpp, llvm/test/CodeGen/PowerPC ppc64-patchpoint-size-check.ll

[PPC64] Convert assert in patchpoint emission to usage error. (#177453)

If the patchpoint intrinsic has requested less bytes then it takes to
make the call then report a fatal usage error. Also fixed a bug where we
forgot to count one of the instructions emitted.
DeltaFile
+15-0llvm/test/CodeGen/PowerPC/ppc64-patchpoint-size-check.ll
+10-2llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+25-22 files

LLVM/project 707ae1dllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU vector-reduce-mul.ll integer-mad-patterns.ll

Reland "[AMDGPU][GlobalISel] Add RegBankLegalize support for G_MUL (#… (#177481)

…177314)"

Original reverted due to v2s16 test failure caused by upstream gfx6/7
16-bit vector behavior change that landed shortly before.

Rebased and regenerated mul.ll test.

Original PR: #177314
DeltaFile
+195-203llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
+242-57llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
+106-101llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
+21-21llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
+23-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+9-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+596-3832 files not shown
+598-3838 files

OpenBSD/ports X9vYIMEsysutils/docker-compose distinfo modules.inc

   sysutils/docker-compose: update to 5.0.2
VersionDeltaFile
1.30+64-58sysutils/docker-compose/distinfo
1.26+22-20sysutils/docker-compose/modules.inc
1.33+1-1sysutils/docker-compose/Makefile
+87-793 files

FreeBSD/ports b6b8d5fdevel/arduino Makefile

devel/arduino: pin to openjdk8

Dependency comms/rxtx is tied to openjdk8 and installs jars in
PREFIX/openjdk8/jre/lib/ext. This directory is gone in jdk9+, but
arduino expects it.
So pin arduino to openjdk8 also.
If anybody wants this to be supported by jdk9+, patches are welcome.

PR:     292651
DeltaFile
+3-3devel/arduino/Makefile
+3-31 files

NetBSD/pkgsrc 0QjZGQDdoc CHANGES-2026

   doc: Updated security/mbedtls4 to 4.0.0nb1
VersionDeltaFile
1.569+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc zrAog8jsecurity/mbedtls4 Makefile

   mbedtls4: fix pkg-config files

   Remove some unnecessary lines.

   Bump PKGREVISION.
VersionDeltaFile
1.2+7-4security/mbedtls4/Makefile
+7-41 files

LLVM/project 53b0a64llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/RISCV clmul.ll rv64zbc-intrinsic.ll

[SelectionDAG] Add very basic computeKnownBits support for ISD::CLMUL. (#177445)

This implements leading zero count support so we can remove some
unnecessary ANDs.
DeltaFile
+60-125llvm/test/CodeGen/RISCV/clmul.ll
+10-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+2-4llvm/test/CodeGen/X86/clmul-vector.ll
+1-2llvm/test/CodeGen/RISCV/rv64zbc-intrinsic.ll
+73-1314 files

LLVM/project 778ee54libc/src/__support/CPP limits.h

[libc] Clean up cpp::numeric_limits (#177461)

This adds the missing is_signed member and uses a generic
implementation for all integral types, using the same methods
employed by the libc++ implementation.
DeltaFile
+26-62libc/src/__support/CPP/limits.h
+26-621 files

OpenBSD/ports waWTO1mgames/nudoku distinfo Makefile

   Update nudoku to 7.0.0.
VersionDeltaFile
1.8+2-2games/nudoku/distinfo
1.11+1-1games/nudoku/Makefile
+3-32 files

LLVM/project 1e6e255libc/src/__support/CPP/type_traits is_unsigned.h

[libc] Clean up cpp::is_unsigned (#177456)

There are no unsigned floating-point types, so make it a
subset of is_integral instead of is_arithmetic.
DeltaFile
+3-3libc/src/__support/CPP/type_traits/is_unsigned.h
+3-31 files

NetBSD/pkgsrc WV0LEdpsecurity/mbedtls4 buildlink3.mk

   mbedtls4: fix bl3.mk define
VersionDeltaFile
1.2+4-4security/mbedtls4/buildlink3.mk
+4-41 files

OpenBSD/ports eTcO41Paudio/ocp distinfo Makefile

   Update ocp to 3.1.1.
VersionDeltaFile
1.20+2-2audio/ocp/distinfo
1.43+1-1audio/ocp/Makefile
+3-32 files

NetBSD/pkgsrc w95Gg65security/mbedtls4 distinfo, security/mbedtls4/patches patch-tf-psa-crypto_drivers_builtin_src_platform__util.c

   mbedtls4: fix build on NetBSD
VersionDeltaFile
1.1+15-0security/mbedtls4/patches/patch-tf-psa-crypto_drivers_builtin_src_platform__util.c
1.2+2-1security/mbedtls4/distinfo
+17-12 files

LLVM/project 3219f1aopenmp/device/src Configuration.cpp

[OpenMP] Force initialization of global device environment

Summary:
This causes issues when we omit this, which requires a constructor from
an incompatible address space and bad things happen.
DeltaFile
+2-2openmp/device/src/Configuration.cpp
+2-21 files

LLVM/project 99dfb1bllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll

Merge branch 'main' into skipLeadingDim-Fix
DeltaFile
+47,697-51,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+14,474-16,242llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+16,328-12,881llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+13,036-14,705llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+11,668-13,311llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+10,558-11,908llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+113,761-120,425742 files not shown
+253,211-230,587748 files

LLVM/project c657d26mlir/lib/Dialect/XeGPU/Transforms XeGPUBlocking.cpp, mlir/test/Dialect/XeGPU xegpu-blocking.mlir

keep leading dimesnion for xegpu ops and vector shape changing ops
DeltaFile
+13-10mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
+3-3mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
+16-132 files