LLVM/project e9e8650mlir/test/Dialect/OpenMP ops.mlir

Remove space in test
DeltaFile
+1-1mlir/test/Dialect/OpenMP/ops.mlir
+1-11 files

LLVM/project 6de6f7bllvm/docs AMDGPUUsage.rst, llvm/lib/Object ELFObjectFile.cpp

[AMDGPU] Define gfx1310 target with ELF number 0x50 (#177355)

For now this is identical to gfx1250.

---------

Co-authored-by: Jay Foad <jay.foad at amd.com>
DeltaFile
+10-1llvm/docs/AMDGPUUsage.rst
+9-0llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
+8-0llvm/lib/Target/AMDGPU/GCNProcessors.td
+7-0llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+7-0llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
+4-0llvm/lib/Object/ELFObjectFile.cpp
+45-119 files not shown
+74-325 files

OPNSense/core d151959src/opnsense/scripts/filter list_legacy_rules.php

Firewall: Rules:  Migration assistant - fix category fieldname
DeltaFile
+1-1src/opnsense/scripts/filter/list_legacy_rules.php
+1-11 files

OPNSense/core 94081fdsrc/opnsense/scripts/filter list_legacy_rules.php

Firewall: Rules:  Migration assistant - fix disabled rules in export.
DeltaFile
+1-1src/opnsense/scripts/filter/list_legacy_rules.php
+1-11 files

LLVM/project de3e03cclang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Detect dangling fields
DeltaFile
+151-0clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+51-17clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+48-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+0-28clang/test/Analysis/lifetime-cfg-output.cpp
+16-9clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
+17-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+283-6614 files not shown
+380-9420 files

OPNSense/plugins d276199net/frr/src/etc/rc.syshook.d/carp 50-frr

net/frr: Fix stall on carp hook by redirecting stdout
DeltaFile
+2-1net/frr/src/etc/rc.syshook.d/carp/50-frr
+2-11 files

LLVM/project 3954cd2llvm/lib/Target/SPIRV SPIRVCallLowering.cpp SPIRVCallLowering.h, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers fp_no_return.ll

[SPIRV] Process indirect function calls immediately (#177222)

The SPIR-V backend processes indirect function calls in
`SPIRVCallLowering`, which is a subclass of the generic `CallLowering`.

It intends to process them function by function, by first collecting all
indirect calls in a function, and then processing all of a function's
indirect calls at once when the call lowering for the function is about
to end.

Today, it relies on the `lowerReturn` virtual function to be called by
the generic call lowering infra to know the function processing is about
to end, and at that time it processes all of the collected indirect
calls and clears the vector of indirect calls.

The problem is that not all functions have return instructions. Every
basic block must have a terminator instruction, but it does
[not](https://llvm.org/docs/LangRef.html#terminator-instructions) have
to be a return.

    [39 lines not shown]
DeltaFile
+16-26llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
+37-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_no_return.ll
+2-2llvm/lib/Target/SPIRV/SPIRVCallLowering.h
+55-283 files

LLVM/project 842631eclang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Detect dangling fields
DeltaFile
+151-0clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+51-17clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+48-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+0-28clang/test/Analysis/lifetime-cfg-output.cpp
+17-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+16-9clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
+283-6613 files not shown
+369-9319 files

LLVM/project 711e8e5llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/AArch64 aarch64-mops.ll

[AArch64] Optimize memcpy for non-power of two sizes (#168890)

The previous getMemcpyLoadsAndStores implementation would chain
load/store instructions from "NumLdStInMemcpy - GlueIter -
GluedLdStLimit" to "NumLdStInMemcpy - GlueIter". This approach caused
issues when copying non-power-of-two sizes, as it would chain leading
load/stores with subsequent instructions at non-power-of-two aligned
offsets.

This chaining pattern prevented optimal optimizations in
aarch64-ldst-opt pass for these load/store instructions.

This commit modifies the chaining range to be from GlueIter to GlueIter
+ GluedLdStLimit, enabling proper optimization of load/store
instructions in aarch64-ldst-opt.


Closes https://github.com/llvm/llvm-project/issues/165947
DeltaFile
+245-24llvm/test/CodeGen/AArch64/aarch64-mops.ll
+10-10llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+255-342 files

FreeNAS/freenas 03094ddsrc/middlewared/middlewared/api/v26_04_0 app.py

Fix docstring
DeltaFile
+2-2src/middlewared/middlewared/api/v26_04_0/app.py
+2-21 files

FreeNAS/freenas af8ee4esrc/middlewared/middlewared/plugins/apps upgrade.py

Selectively raise app alerts
DeltaFile
+24-4src/middlewared/middlewared/plugins/apps/upgrade.py
+24-41 files

FreeBSD/ports 5a7eba0java/jfreechart Makefile

java/jfreechart: allow building with jdk21

PR:     292647
Approved-by:    olgeni@ (maintainer)
DeltaFile
+1-0java/jfreechart/Makefile
+1-01 files

FreeBSD/src dec3ea4lib/libiconv_modules/mapper_std citrus_mapper_std.c

libiconv: Fix typo in comment
DeltaFile
+1-1lib/libiconv_modules/mapper_std/citrus_mapper_std.c
+1-11 files

LLVM/project 553ef19clang/lib/Sema SemaAPINotes.cpp, clang/test/APINotes methods.cpp

[APINotes] Support overloaded operators

This adds support for annotating C++ operators via API Notes. For instance:
```
Tags:
- Name: MyTag
  Methods:
  - Name: operator+
    Availability: none
```

rdar://148534260
DeltaFile
+10-4clang/lib/Sema/SemaAPINotes.cpp
+10-0clang/test/APINotes/methods.cpp
+6-0clang/test/APINotes/Inputs/Headers/Methods.apinotes
+2-0clang/test/APINotes/Inputs/Headers/Methods.h
+28-44 files

LLVM/project 1493ae5flang/lib/Parser program-parsers.cpp message.cpp, flang/lib/Semantics resolve-names.cpp check-coarray.cpp

[flang] Allow missing space in some free-form keywords (#177254)

When asked to emit warnings about missing spaces in free form source
code, flang-new is emitting some warnings in cases when the space is an
optional one between keywords. Use the existing token matching
capability that allows these ("END " with a trailing blank), add a test
for all cases in Table 6.2, and fix a couple other bogus warning exposed
by compiling that test with -pedantic.

Fixes https://github.com/llvm/llvm-project/issues/177098.
DeltaFile
+156-0flang/test/Parser/keyword-optional-spaces.f90
+7-7flang/lib/Parser/program-parsers.cpp
+4-0flang/lib/Parser/message.cpp
+2-0flang/lib/Semantics/resolve-names.cpp
+1-0flang/lib/Semantics/check-coarray.cpp
+170-75 files

LLVM/project c66546bflang/lib/Semantics check-declarations.cpp, flang/test/Semantics declarations06.f90

[flang] Improve error message for polymorphic implicit interface (#177225)

PROCEDURE(CLASS(...)) specifies a procedure with an implicit interface
whose result is polymorphic. That turns out to never be a valid
declaration, since a CLASS(...) function result is required to also be
POINTER or ALLOCATABLE, both of which require the presence of an
explicit interface. We caught this error already, but the message should
be improved for procedures.

Fixes https://github.com/llvm/llvm-project/issues/176861.
DeltaFile
+9-3flang/lib/Semantics/check-declarations.cpp
+4-4flang/test/Semantics/declarations06.f90
+13-72 files

LLVM/project d6e1f70flang/include/flang/Evaluate initial-image.h, flang/lib/Evaluate initial-image.cpp

[flang] Allow multiple identical DATA initializations (#177063)

ISO Fortran disallows DATA statements from affecting the same bit of
memory more than once; however, all (but one) other compilers allow this
usage. They differ, however, in the case of multiple distinct
initializations -- some compilers take the "last" value in source order,
some don't.

This patch accepts multiple identical DATA initializations, which is
portable usage that appears in code, and emits an optional warning. It
continues to detect and report multiple distinct DATA initializations,
since they are not portable.
DeltaFile
+86-53flang/lib/Semantics/data-to-inits.cpp
+28-11flang/test/Semantics/data23.f90
+25-11flang/lib/Evaluate/initial-image.cpp
+24-10flang/lib/Semantics/data-to-inits.h
+24-9flang/include/flang/Evaluate/initial-image.h
+9-11flang/test/Semantics/equivalence02.f90
+196-1057 files not shown
+223-11913 files

LLVM/project 7f7d78dllvm/lib/Target/AArch64 AArch64ConditionOptimizer.cpp, llvm/test/CodeGen/AArch64 aarch64-condopt-cross-block-different-regs.mir combine-comparisons-by-cse.ll

[AArch64] Add register check to ConditionOptimizer cross-block logic (#176528)

This patch adds a missing guard to the AArch64 ConditionOptimizer pass

Previously, the cross-block optimization would not check for register
equivalence before modifying the two comparison instructions.

This means that two cmp instructions with suitable cond codes and
immediates would be modified, even if their registers were different,
which would not trigger CSE afterwards. This doesn't affect correctness
but is unhelpful.

A negative ll test and mir tests has also been added to confirm this
fix.
DeltaFile
+128-0llvm/test/CodeGen/AArch64/aarch64-condopt-cross-block-different-regs.mir
+69-0llvm/test/CodeGen/AArch64/combine-comparisons-by-cse.ll
+15-0llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
+212-03 files

OPNSense/core 63c3fe3src/etc/inc/plugins.inc.d hostwatch.inc

Interfaces: Neighbors: Automatic Discovery - add xmlrpc registration, closes https://github.com/opnsense/core/issues/9628
DeltaFile
+12-0src/etc/inc/plugins.inc.d/hostwatch.inc
+12-01 files

LLVM/project fe5f6f5flang/lib/Semantics check-declarations.cpp, flang/test/Semantics cuf03.cuf

[flang][cuda] Allow pointer object with the managed attribute (#177304)

DeltaFile
+2-2flang/lib/Semantics/check-declarations.cpp
+1-2flang/test/Semantics/cuf03.cuf
+3-42 files

LLVM/project 7dc6c1fclang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

Detect dangling fields
DeltaFile
+314-315clang/lib/Sema/AnalysisBasedWarnings.cpp
+151-0clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+51-17clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+48-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+0-28clang/test/Analysis/lifetime-cfg-output.cpp
+16-9clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
+580-37313 files not shown
+671-40419 files

NetBSD/pkgsrc uVO3rAharchivers/libarchive Makefile, pkgtools/cwrappers Makefile

   *: Add missing BOOTSTRAP_PKG=yes where required.

   These packages are definitely part of bootstrap.  Avoids issue in bulk builds
   where an older version of the package may be provided by the bootstrap kit and
   the pkg_add test will fail, causing a build failure.  pkg_add does not exit
   with an error if the versions happen to be identical, which is likely why this
   hasn't been noticed until now.
VersionDeltaFile
1.60+2-1archivers/libarchive/Makefile
1.29+2-1pkgtools/cwrappers/Makefile
1.98+2-1pkgtools/libnbcompat/Makefile
1.6+2-1pkgtools/mktools/Makefile
+8-44 files

FreeNAS/freenas f254fb7src/middlewared/middlewared/pytest/unit/plugins/apps test_list_apps.py

Fix failures in unit test
DeltaFile
+1-1src/middlewared/middlewared/pytest/unit/plugins/apps/test_list_apps.py
+1-11 files

LLVM/project a8aa95eclang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

Detect dangling fields
DeltaFile
+313-315clang/lib/Sema/AnalysisBasedWarnings.cpp
+151-0clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+51-17clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+48-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+0-28clang/test/Analysis/lifetime-cfg-output.cpp
+17-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+580-37213 files not shown
+670-40419 files

FreeNAS/freenas 7096d66src/middlewared/middlewared/api/v26_04_0 app.py, src/middlewared/middlewared/plugins/apps/ix_apps query.py

Include latest app version in app.query response
DeltaFile
+12-8src/middlewared/middlewared/plugins/apps/ix_apps/query.py
+2-0src/middlewared/middlewared/api/v26_04_0/app.py
+14-82 files

LLVM/project ada79f4clang/lib/Serialization ModuleManager.cpp

[clang][modules] Read PCM validation timestamp earlier (#177062)

When building a module, the PCM file is always written first and then
the validation timestamp gets created. Clang needs to first read the
validation timestamp and only then read the PCM file. Otherwise, it
could read an out-of-date PCM file and then read the validation
timestamp for its new up-to-date version. This would erroneously skip
validation with `-fmodules-validate-once-per-build-session`. I'm not
concerned about multiple Clang instances seeing different filesystem
contents from each other within a single build session, since that would
break the assumption `-fmodules-validate-once-per-build-session` relies
on.
DeltaFile
+5-5clang/lib/Serialization/ModuleManager.cpp
+5-51 files

NetBSD/pkgsrc YNUaN8ndoc CHANGES-2026

   doc: Updated print/qpdf to 12.3.1
VersionDeltaFile
1.556+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc PdMyVBZprint/qpdf distinfo Makefile

   print/qpdf: Update to 12.3.1

   Changelog:
   12.3.1: January 19, 2026

           Bug fixes

               Fix failure of QPDFJob::run and QPDFJob::createQPDF when called
               with a copy of a destroyed QPDFJob object. This affects using
               the job interface from pikepdf.
VersionDeltaFile
1.51+4-4print/qpdf/distinfo
1.67+2-2print/qpdf/Makefile
1.25+2-2print/qpdf/PLIST
+8-83 files

LLVM/project d23b3a5llvm/lib/Target/RISCV RISCVRegisterInfo.td

[RISCV] Add sub_128 SubRegIndex. Use if for FPR256. (#176986)

Instead of branching FPR256 from FPR32, branch it from FPR128. The
hardware that supports FPR256 doesn't have D or Q, but I assume if it
did, the FPR64/FPR128 registers would be subregs of FPR256.
DeltaFile
+7-5llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+7-51 files

LLVM/project 986be54llvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/lib/Target/RISCV/Disassembler RISCVDisassembler.cpp

[RISCV] Use DecoderMethod and a template function to reduce the amount of boilerplate for decodings a register class. NFC (#177296)

The decode functions for GPR/FPR and their compressed register classes
are very similar. We just need the number of registers, the constant for
the first register in the class, and whether or not the register class
is shrunk by RVE.

I've added a template function that takes this information and used the
DecoderMethod in tablegen to provide the values for the the template
parameters.

I kept an alias for DecodeGPRRegisterClass because it has multiple
callers.

---------

Co-authored-by: Sam Elliott <sam at lenary.co.uk>
DeltaFile
+8-128llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+25-8llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+33-1362 files