LLVM/project 984e122 — llvm/lib/IR AsmWriter.cpp, llvm/test/Assembler thinlto-summary-escaped-names.ll

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+40-0llvm/test/Assembler/thinlto-summary-escaped-names.ll
+17-7llvm/lib/IR/AsmWriter.cpp
+57-72 files

FreeBSD/src 1681aa4 — contrib/bsnmp/lib asn1.c

bsnmp: zero-fill the destination on a short ASN.1 IpAddress

asn_get_ipaddress_raw() meant to pad the 4-byte buffer after a short
copy, but the loop bound was the already-reached len and never ran,
leaving addr[len..3] uninitialised.  Pad to 4.

This is harmless for the in-tree consumers (bsnmpd(1) and
libbsnmpclient) which zero the PDU before decoding it.

Reviewed by:    harti, maxim
Approved by:    harti
MFC after:      2 weeks

Differential Revision:  https://reviews.freebsd.org/D60923

(cherry picked from commit b5e57452b62e7c185706ed8b2a86e9f8ac483357)
DeltaFile
+1-1contrib/bsnmp/lib/asn1.c
+1-11 files

LLVM/project a736d3c — llvm/lib/Transforms/IPO Attributor.cpp

Apply suggestion from @tgymnich

Co-authored-by: Tim Gymnich <tim at gymni.ch>
DeltaFile
+3-5llvm/lib/Transforms/IPO/Attributor.cpp
+3-51 files

LLVM/project c107c05 — llvm/lib/Transforms/IPO Attributor.cpp

Apply suggestion from @tgymnich

Co-authored-by: Tim Gymnich <tim at gymni.ch>
DeltaFile
+2-3llvm/lib/Transforms/IPO/Attributor.cpp
+2-31 files

LLVM/project 548b831 — llvm/lib/Target/AMDGPU AMDGPUCtorDtorLowering.cpp, llvm/test/CodeGen/AMDGPU lower-multiple-ctor-dtor.ll lower-ctor-dtor.ll

[AMDGPU] Enable GEP canonicalization in ctor/dtor lowering (#241309)

Use the default IRBuilder GEP canonicalization and regenerate the
constructor and destructor lowering checks. Callback array traversal
uses byte offsets of 8 and -8, with unchanged generated code.

Assisted by: GPT 6.1 Sol

Follow up to: https://github.com/llvm/llvm-project/pull/240885
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
+2-2llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
+2-2llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
+0-1llvm/lib/Target/AMDGPU/AMDGPUCtorDtorLowering.cpp
+6-74 files

LLVM/project 353383c — llvm/include/llvm/IR RuntimeLibcalls.td, llvm/test/Transforms/Util/DeclareRuntimeLibcalls systemz.ll bsd.ll

RuntimeLibcalls: Add attributes inferLibFuncAttributes gives libcalls

Remove more differences with the attributes the InferFunctionAttrs
pass would add to the declared libcalls.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+88-77llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+71-63llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+67-59llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+57-51llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+63-14llvm/include/llvm/IR/RuntimeLibcalls.td
+40-36llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+386-30019 files not shown
+697-57025 files

LLVM/project 0eadadf — llvm/test/Transforms/Util/DeclareRuntimeLibcalls systemz.ll sparc.ll

RuntimeLibcalls: Add attributes to atomic libcalls

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+1,155-1,145llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+524-516llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+393-387llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+393-387llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+262-258llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+262-258llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sparc.ll
+2,989-2,95122 files not shown
+4,989-4,83428 files

LLVM/project dcf0bdf — llvm/test/Transforms/Util/DeclareRuntimeLibcalls hexagon.ll arm.ll

RuntimeLibcalls: Add attributes to compiler-rt helper libcalls

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+740-740llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+664-664llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+524-524llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+498-498llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+376-376llvm/test/Transforms/Util/DeclareRuntimeLibcalls/arm.ll
+328-328llvm/test/Transforms/Util/DeclareRuntimeLibcalls/hexagon.ll
+3,130-3,13011 files not shown
+5,236-5,23617 files

LLVM/project 1522af7 — lld/ELF Driver.h LTO.cpp, lld/test/ELF/lto thinlto-dontneed-split-unit.ll

[LLD][LTO] Release bitcode pages earlier in distributed ThinLTO (#241536)

Under --thinlto-index-only, LLD calls markBuffersAsDontNeed() after the
lto->add() loop to MADV_DONTNEED mmap'd inputs. Two issues remain:

1. Bitcode pages stay resident across the entire lto->add() loop,
   peaking alongside the growing ThinLTO summary index.
2. With split LTO units (-fsplit-lto-unit, e.g. CFI), regular LTO
   modules with summaries are deferred until LTO::runRegularLTO(),
   re-faulting their pages into RSS for the rest of the thin link.

Evict standalone bitcode buffers incrementally after each lto->add()
call
when skipLinkedOutput is set, clear RegularLTO.ModsWithSummaries once
linked, and add lto::Config::PostRegularLTOLinkHook so LLD can call
markBuffersAsDontNeed() again before running the LTO/ThinLTO backends.

Assisted-by: Gemini
DeltaFile
+54-0lld/test/ELF/lto/thinlto-dontneed-split-unit.ll
+12-5llvm/lib/LTO/LTO.cpp
+13-2lld/ELF/Driver.cpp
+7-0lld/ELF/LTO.cpp
+6-0llvm/include/llvm/LTO/Config.h
+1-0lld/ELF/Driver.h
+93-76 files

LLVM/project 205a327 — llvm/lib/Target/AMDGPU GCNSubtarget.h GCNFeatures.td, llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

[AMDGPU] Add FeatureScaleOffset. NFCI (#241425)
DeltaFile
+16-13llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+7-0llvm/lib/Target/AMDGPU/GCNFeatures.td
+0-3llvm/lib/Target/AMDGPU/GCNSubtarget.h
+23-163 files

LLVM/project 6c22d9a — llvm/docs LangRef.md

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+26-3llvm/docs/LangRef.md
+26-31 files

FreeBSD/ports 64ceed4 — databases/py-redisvl Makefile distinfo

databases/py-redisvl: Update to 0.32.0

Changelog: https://github.com/redis/redis-vl-python/releases/tag/v0.32.0

Reported by:    Repology
DeltaFile
+3-3databases/py-redisvl/distinfo
+1-1databases/py-redisvl/Makefile
+4-42 files

LLVM/project d9129fc — llvm/lib/DWARFLinker Utils.cpp, llvm/test/tools/dsymutil/AArch64 accel-specification-cycle.test

[DWARFLinker] End the qualified name hash at a repeated DIE (#240929)

hashFullyQualifiedName follows a type's DW_AT_specification or
DW_AT_abstract_origin chain and then recurses into the parent of the DIE
it lands on. If the chain points into the type's own subtree, the
recursion keeps coming back to the same DIE until the stack overflows.
finiteLoop only bounds the chain.

Keep track of the DIEs the chain lands on and end the name when one
repeats. Every step depends only on the previous DIE, so an endless
recursion always revisits one. Hashes for well-formed input don't
change.

Assisted-by: Claude
DeltaFile
+30-5llvm/test/tools/dsymutil/AArch64/accel-specification-cycle.test
+12-7llvm/lib/DWARFLinker/Utils.cpp
+42-122 files

LLVM/project 62fa836 — llvm/test/ThinLTO/X86 pass-pipeline.ll cfi-icall-samplepgo-icp.ll

[test][ThinLTO] Precommit tests for LowerTypeTests and ICP ordering (#241598)

Add tests for the ThinLTO backend pass order around LowerTypeTestsPass
and
for sample profile ICP to CFI jump table members. With the current
order,
the sample profile loader does not annotate the .cfi bodies, and
promoted
calls compare against @foo.cfi instead of the jump table entry @foo.

Needed by #241582.

Assisted-by: Gemini
DeltaFile
+95-0llvm/test/ThinLTO/X86/cfi-icall-samplepgo-icp.ll
+54-0llvm/test/ThinLTO/X86/pass-pipeline.ll
+149-02 files

LLVM/project 3298a21 — llvm/test/Transforms/Util/DeclareRuntimeLibcalls sparc.ll systemz.ll

RuntimeLibcalls: Add missing attributes to libm libcalls (#241510)

Add the function and memory attributes inferLibFuncAttributes would
give the scalar libm functions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+697-682llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+652-645llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+629-617llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+575-566llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+451-445llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+352-346llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sparc.ll
+3,356-3,30112 files not shown
+5,224-5,10518 files

LLVM/project 7503f9f — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Rebase, address comments

Created using spr 2.0.0-beta.1
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-09,953 files not shown
+1,073,804-146,0599,959 files

LLVM/project fac76fe — lldb/cmake/modules AddLLDB.cmake, lldb/scripts extract-dynamic-script-interpreter-exports.py

[lldb] Fix universal liblldb with dynamic script interpreters (#240614)

Without --arch, llvm-nm only dumps the host slice of a universal object.
Symbols that mangle differently per architecture, such as those taking a
va_list, ended up in the liblldb exports list with only the host
spelling. ld64 requires every literal name in an exports list to exist
in every slice, so the other slice failed to link.

Scan each slice in CMAKE_OSX_ARCHITECTURES. Keep names common to all
slices literal and bracket the last character of the rest, which turns
them into patterns.

Fixes #240535

Assisted-by: Claude
DeltaFile
+26-11lldb/scripts/extract-dynamic-script-interpreter-exports.py
+3-0lldb/cmake/modules/AddLLDB.cmake
+29-112 files

FreeBSD/ports d0d450a — databases/py-sqlmodel Makefile distinfo

databases/py-sqlmodel: Update to 0.0.49

Changelog: https://github.com/fastapi/sqlmodel/blob/0.0.49/docs/release-notes.md

Reported by:    Repology
DeltaFile
+3-3databases/py-sqlmodel/distinfo
+2-3databases/py-sqlmodel/Makefile
+5-62 files

LLVM/project 242454f — lldb/source/Symbol Symtab.cpp, lldb/test/Shell/ObjectFile/MachO symbol-size-shared-address.s

[lldb] Support relocatable Mach-O DWARF sections (#239801)

Symtab::InitAddressIndexes gives symbols without a size the distance
to the next symbol, capped at the end of the section that contains the
symbol's address.

With relocatable DWARF, every section in the __DWARF segment of a
Mach-O object starts at address 0, just like __text. That means the
lookup by address can incorrectly return a DWARF section instead of
__text. The last symbol in __text then gets a size that extends past
the end of __text.

Fix this by using the section the symbol is defined in, and fall back
to the lookup by address for symbols without one.

Assisted-by: Claude
rdar://192083461

depends on https://github.com/llvm/llvm-project/pull/239797
DeltaFile
+26-0lldb/test/Shell/ObjectFile/MachO/symbol-size-shared-address.s
+3-1lldb/source/Symbol/Symtab.cpp
+29-12 files

LLVM/project 21f138c — llvm/test/Transforms/SLPVectorizer/X86 interchangeable-cmp-predicates.ll

[SLP][NFC]Add extra test for trunc-icmp conversion, NFC

Pull-request: https://github.com/llvm/llvm-project/pull/241608
DeltaFile
+22-0llvm/test/Transforms/SLPVectorizer/X86/interchangeable-cmp-predicates.ll
+22-01 files

FreeBSD/ports d85eb05 — games/veloren-weekly Makefile distinfo

games/veloren-weekly: update to s20261110

Changes:        https://gitlab.com/veloren/veloren/-/compare/da6626e6ed...6c99b292e0
(cherry picked from commit df59271b75396dd2197048cabd5a88c920575587)
DeltaFile
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-52 files

FreeBSD/ports ce02374 — benchmarks/clpeak Makefile distinfo

benchmarks/clpeak: update to 3.0.4

Changes:        https://github.com/krrishnarraj/clpeak/releases/tag/3.0.4
Reported by:    GitHub (watch releases)

(cherry picked from commit 7ec40aadc2713c7e3734c31402cfee459210fc77)
DeltaFile
+3-3benchmarks/clpeak/distinfo
+1-1benchmarks/clpeak/Makefile
+4-42 files

FreeBSD/ports 922c2e9 — graphics/mesa-devel Makefile distinfo

graphics/mesa-devel: update to 26.3.b.1934

Changes:        https://gitlab.freedesktop.org/mesa/mesa/-/compare/087e1fe4e6a...6d4d60f15c9
DeltaFile
+3-3graphics/mesa-devel/distinfo
+2-2graphics/mesa-devel/Makefile
+5-52 files

FreeBSD/ports df59271 — games/veloren-weekly Makefile distinfo

games/veloren-weekly: update to s20261110

Changes:        https://gitlab.com/veloren/veloren/-/compare/da6626e6ed...6c99b292e0
DeltaFile
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-52 files

FreeBSD/ports 7ec40aa — benchmarks/clpeak Makefile distinfo

benchmarks/clpeak: update to 3.0.4

Changes:        https://github.com/krrishnarraj/clpeak/releases/tag/3.0.4
Reported by:    GitHub (watch releases)
DeltaFile
+3-3benchmarks/clpeak/distinfo
+1-1benchmarks/clpeak/Makefile
+4-42 files

LLVM/project a37eb69 — lldb/include/lldb/Core ThreadSafeDenseSet.h Module.h, lldb/source/Core Module.cpp

[lldb] Track shown Module diagnostics in a ThreadSafeDenseSet (NFC) (#241603)

Module kept a heap-allocated once_flag per diagnostic, behind a
recursive mutex, only to report each message once. A thread-safe set of
message hashes does the same with less machinery, and other owners can
deduplicate diagnostics the same way.

Assisted-by: Claude
DeltaFile
+13-15lldb/source/Core/Module.cpp
+5-6lldb/include/lldb/Core/Module.h
+3-2lldb/include/lldb/Core/ThreadSafeDenseSet.h
+21-233 files

LLVM/project 1d35b66 — llvm/include/llvm/Target/GlobalISel Combine.td, llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp

[GlobalISel] Don't fold saturating shifts in shift_of_shifted_logic_chain (#241191)

Fixes #241100

`shift_of_shifted_logic_chain` rewrote

```
SHIFT (LOGIC (SHIFT X, C0), Y), C1 -> LOGIC (SHIFT X, C0+C1), (SHIFT Y, C1)
```

for every opcode in `shift_chain_frags`, including
`G_USHLSAT`/`G_SSHLSAT`.
This is wrong for saturating shifts, since saturation depends on bits
the
logic op can clear or flip. 32-bit `ushl.sat(ushl.sat(8, 20) & 15, 11)`:
original = 0, combined = `ushl.sat(8, 31) & ushl.sat(15, 11)` = 30720.

Add `plain_shift_chain_frags` (`[G_SHL, G_ASHR, G_LSHR]`) and use it for
this

    [14 lines not shown]
DeltaFile
+115-104llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic-shlsat.mir
+97-0llvm/test/CodeGen/RISCV/GlobalISel/combine.mir
+5-8llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+9-2llvm/include/llvm/Target/GlobalISel/Combine.td
+226-1144 files

FreeBSD/ports d2ee076 — textproc/ast-grep Makefile Makefile.crates

textproc/ast-grep: Update to 0.51.2

Changelog: https://github.com/ast-grep/ast-grep/blob/0.51.2/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+19-19textproc/ast-grep/distinfo
+8-8textproc/ast-grep/Makefile.crates
+1-1textproc/ast-grep/Makefile
+28-283 files

LLVM/project d2de796 — clang/lib/Basic/Targets Hexagon.cpp

[Hexagon] NFC: Refactor repetitive code in getTargetDefines (#237318)
DeltaFile
+18-69clang/lib/Basic/Targets/Hexagon.cpp
+18-691 files

OpenBSD/src zmfrPL3 — sys/dev/ic rtwnvar.h r92creg.h, sys/dev/usb if_urtwn.c

   Power the RTL8188CU/8192CU off in urtwn_stop().

   urtwn_stop() left the chip running, so the chip was never reset between inits,
   and under TX load the device could hang with "device timeout"; only a replug
   recovered it.

   Power the chip off on stop, ported from FreeBSD urtwn_r92c_power_off()
   (R92C path mostly from NetBSD), so each init starts from the same state
   as after a replug.  Bring back the APSD_CTRL "Initialize MAC" step in
   urtwn_r92c_power_on(), removed in r1.85 when nothing turned the MAC
   off.  RTL8188E/8188F/8192E are left alone.

   Patch by Mikolaj Kucharski

   Also tested by jmc@ and myself
VersionDeltaFile
1.115+134-1sys/dev/usb/if_urtwn.c
1.32+7-1sys/dev/ic/r92creg.h
1.17+2-1sys/dev/ic/rtwnvar.h
+143-33 files