Render s3 access key expires_at into credentials.conf
Emit the key's expiry as a Unix timestamp so the daemon can enforce it
per request, not only at render time.
[mlir][linalg] Hoist transfer pairs through disjoint subview slices (#220244)
`hoistRedundantVectorTransfers` previously bailed whenever a transfer
pair was based on a view like `memref.subview`, since another view of
the same buffer could alias it. This patch replaces that blanket bail
with an actual aliasing check: the pair is hoisted when no other access
to the base's underlying buffer in the loop conflicts with it, i.e.
every other access is either the matching read/write or a slice provably
disjoint from the base's static per-dimension footprint. When the base
has no static footprint (e.g. a dynamic subview offset or a
collapse_shape root), the pair still hoists as long as nothing else in
the loop touches the buffer; otherwise it conservatively bails.
The check is implemented as a reusable utility
`memref::hasNoAliasingAccessInScope` in MemRefUtils, and the existing
lone-read path (noAliasingUseInLoop) is unified onto it.
Adds lit tests: positive cases for disjoint static subviews, a dynamic
(loop-invariant) offset, and a collapse_shape root; negative cases for
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[mlir][gpu] Keep memref.load/store attributes in decompose-memrefs (#221312)
`gpu-decompose-memrefs` rewrites a `memref.load`/`memref.store` inside a
`gpu.launch` into a `reinterpret_cast` to the linearised offset plus a
0-d access, but rebuilds the op from the new memref only. `nontemporal`,
`alignment` and `invariant` are dropped from the load, `nontemporal` and
`alignment` from the store:
```mlir
%res = memref.load %arg0[%tx, %ty, %tz] alignment(16) nontemporal(true) invariant(true) : memref<?x?x?xf32>
// becomes
%1 = memref.load %reinterpret_cast[] : memref<f32, strided<[], offset: ?>>
```
The rewrite accesses the same element with the same type, so all of
them still hold on the new op. Pass them to the builder; the attribute
form is the one that also carries `invariant`.
Tests: a load and a store case next to the existing `@decompose_load`
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[lld-macho] Parallelize ObjFile::sourceFile() during STABS emission. (#222087)
This is part of the ld64.lld performance improvements tracked by #222068
Currently, SymtabSection::emitStabs() calls emitBeginSourceStab() it
passes in file->sourceFile(), which will call
ObjFile::sourceFile(). This method reads the component's root DIE, which
is a bottleneck when done serially as at this stage the DWARF sections
have not been parsed yet.
This commit parallelizes the calls to ObjFile::sourceFile(), as we
already have the file ids stable sorted.
AI tool use: this is one of the commits that was prototyped by AI. I
rewrote this commit and ran the benchmarking myself.
**Benchmark for mac_debug_component_sym_2**
LLD Baseline
Time (mean ± σ): 8.630 s ± 0.479 s [User: 7.170 s, System: 2.012 s]
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[flang][cuda] Back ALLOCATABLE components with managed memory under -gpu=mem:managed
Under -gpu=mem:managed, select the managed allocator index at the ALLOCATE site for ALLOCATABLE/POINTER components, reusing the branch #210149 added for -gpu=unified; the existing kDefaultAllocator test filters out the already-attributed entities.
[AMDGPU] Form VOPD3 pairs with pair-local literal moves
VOPD3 cannot encode literal operands, but its src0 can read scalar registers.
In this PR, we try to allow to form a pair with one distinct non-inline constant
value by moving that value to a free SGPR. If both components use the same value,
one move serves both, but we reject pairs that need two different values, since
that doesn't buy us anything. Ffunctions without tracked liveness, and functions
optimized for size are also rejected.
With this change, `GCNCreateVOPD` checks every adjacent pair before it selects a
greedy non-overlapping pair. This lets an infeasible pair fall through to the
overlapping next one. We use one reverse liveness walk to find an SGPR that is
free over each pair-local range. Disjoint selected pairs can reuse the same SGPR.
Each accepted pair adds at most one `S_MOV_B32` for the one instruction removed
by fusion.
The post-RA scheduler uses the same matcher policy, so it will not cluster a
two-value pair that the create pass cannot build.
comms/py-pynitrokey: Update nethsm dependency version range
security/py-nethsm has been updated to 3.0.0.
PR: 298490
Approved by: osa, vvd (Mentors, implicit)
security/py-nethsm: Update 2.1.2 => 3.0.0
While here, remove extra space before backslash in RUN_DEPENDS field.
Changelog:
- Breaking change: Return FullClusterJoinData instead of ClusterJoinData
from add_cluster_member (requires NetHSM v5)
https://github.com/Nitrokey/nethsm-sdk-py/releases/tag/v3.0.0
PR: 298489
Approved by: osa, vvd (Mentors, implicit)
[CIR] Drop res_attrs when a rewritten return has no result (#222465)
An Indirect return moves the value to an sret pointer argument the pass
inserts, and an Ignore return drops it, so the rewritten func or call
has no result for the per-result `res_attrs` array to describe. The
function rewrite and both call rewrites now remove it.
Assisted-by: Cursor / claude-opus-5
Add truenas.entitlements.facts and deprecate system.product_type
This commit adds changes to expose the hardware and license facts that entitlement decisions are computed from through a new truenas.entitlements.facts method, and marks system.product_type removed_in v27 now that it has a proper successor. Hardware is reported as TRUENAS or COMMUNITY off is_appliance, so a Mini reads as COMMUNITY exactly like product_type reported it, and license_type is left as a plain string so a newer license type doesn't fail validation on an older system.
The models are mirrored into both v26 and v27 since this gets backported. Usage reporting keeps emitting the old ENTERPRISE/COMMUNITY_EDITION platform string after moving off product_type, otherwise every existing usage report would stop lining up with the new ones.
[SPIR-V] Add -spirv-nonsemantic-debug-info-version to select the NSDI set
The backend hardcoded NonSemantic.Shader.DebugInfo.100 as its debug-info
ext-inst set. Add a flag selecting .100 (the default) or .200.
[AMDGPU] Rename the alignment-aware operand predicates to *Target, NFC
The predicates take a *_AlignTarget/_Target operand, so name them after
it. The HwMode resolution behind the operand's class is an implementation
detail that need not appear in the name.
[AMDGPU] Make custom AsmParser matchers alignment aware
Currently custom matchers accept registers belonging to unaligned classes,
leaving the alignment check and its diagnostic to validateVGPRAlign. The problem
is that validateVGPRAlign does not account for the operand register class, which
may have a different alignment requirement on mixed-alignment targets.
The fix is to make a custom matcher resolve the operand's _AlignTarget class via
HwMode and use that resolved class to accept a register. However, doing so alone
would reject a misaligned register with a generic "invalid operand for
instruction" diagnostic, so extra infrastructure conveys the alignment diagnostic
instead: on a class miss, diagnoseRegAlign re-checks the register against the same
class with alignment relaxed (getUnalignedEquivalentRC, new in AMDGPUBaseInfo);
if it fits, the only problem is alignment, so it records
OperandMatchError::VGPRAlignMismatch on the operand. matchAndEmitInstruction
selects that reason and prints the alignment error, now at the offending operand
column instead of column 1.
This commit converts the input-mods and DP-ALU DPP matchers. The no-modifier
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[AMDGPU] Drop the misaligned VGPR-tuple AsmParser diagnostic
The alignment-aware matchers already reject a misaligned tuple, so a
misaligned operand now fails as a plain invalid operand. Keeping the
dedicated "vgpr tuples must be 64 bit aligned" message only for that
case is not worth the extra match-error ranking, the per-operand
diagnostic, and getUnalignedEquivalentRC, so remove all of it.
[AMDGPU] Update no-modifier operand tests for the dropped align diagnostic
The no-modifier reg-or-inline operands routed through the HwMode
predicate now report a misaligned tuple as a plain invalid operand,
matching the diagnostic dropped earlier in the stack.
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate
Convert the reg-or-inline operands with no modifiers (MFMA VGPR/AGPR
sources, VCSrc, v_pk_mov_b32, VOP scalar f64) from the fixed-class
isRegOrInlineNoMods to the HwMode-aware isRegOrInlineNoModsByHwMode, so an
odd-aligned tuple is rejected at the offending operand column instead of by
the validateVGPRAlign catch-all.
Co-Authored-By: Claude <noreply at anthropic.com>
dtrace/tests: compile D sources at runtime on test target
Previously, we would precompile D test dependencies using the
host's dtrace, which unconditionally outputs ELF files in the
host's format. This breaks the cross-compile build with errors
like the following:
dtrace: failed to link script: incorrect ELF machine type for
object file: tst.usdt.pieo
--- usdt.o ---
*** Failed target: usdt.o
This patch moves compilation to runtime for all C-based testcases
that have a dependent D source file.
Reviewed by: markj
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59030
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lib/googletest: also use -O0 for internal tests with GCC
This fixes the build with gcc 16's aggressive inlining.
Reviewed by: ngie
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59538
(cherry picked from commit 243bdaff75853606ce477807e87e4fbcc1decfb1)
