LLVM/project c5e5d5blldb/include/lldb/Host Config.h.cmake, lldb/source/Plugins/ScriptInterpreter/Python ScriptInterpreterPython.cpp

[lldb] When LLDB_ENABLE_MTE is ON always run the driver with MTE (#186322)

When LLDB_ENABLE_MTE is set to ON, we should always run the driver with
MTE by signing with the checked-allocations entitlement.
DeltaFile
+16-2lldb/tools/driver/CMakeLists.txt
+10-0lldb/tools/driver/lldb-mte-entitlements.plist
+9-0lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
+2-0lldb/include/lldb/Host/Config.h.cmake
+37-24 files

LLVM/project 769ffa0llvm/lib/Transforms/IPO ForceFunctionAttrs.cpp, llvm/test/Transforms/ForcedFunctionAttrs forced.ll

[ForceFunctionAttrs] Fix handling of conflicts for more attributes (#186304)

Fixes #185277 

ForceFunctionAttrs currently only checks the `alwaysinline`/`noinline`
conflict when forcing function attributes. This is incomplete, because
LLVM verifier rules define additional incompatible function attribute
combinations.

Extend hasConflictingFnAttr() to reject more conflicting function
attributes, including combinations involving `optnone`, `minsize`,
`optsize`, and `optdebug`.

Also add required companion attributes when forcing function attributes:
`optnone` requires `noinline`, so forceattrs now adds `noinline`
automatically when needed.
DeltaFile
+108-7llvm/test/Transforms/ForcedFunctionAttrs/forced.ll
+43-4llvm/lib/Transforms/IPO/ForceFunctionAttrs.cpp
+151-112 files

OpenZFS/src f80338fcontrib/debian openzfs-zfsutils.install, man Makefile.am

zarcsummary: add man page

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Christos Longros <chris.longros at gmail.com>
Closes #18330
DeltaFile
+179-0man/man1/zarcsummary.1
+1-0contrib/debian/openzfs-zfsutils.install
+1-0man/Makefile.am
+181-03 files

LLVM/project c0ccfd0flang/test/Semantics test_errors.py

[flang] Reorder messages wrt line number before diff(actual, expect) (#186812)

When messages are attached together, the source locations to which they
refer are not necessarily monotonically increasing. For example
```
error: foo.f90:10: There is a problem here         # line 10
because: foo.f90:12: This thing is invalid         # line 12 (attached)
error: foo.f90:11: There is another problem here   # line 11
```
There is no way to represent that in the source file via ERROR
annotations, so before running unified_diff "canonicalize" the list of
messages into an order that corresponds to the line numbers.

---------

Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
DeltaFile
+47-5flang/test/Semantics/test_errors.py
+47-51 files

OpenZFS/src f9d26b8man/man1 zilstat.1

zilstat: add AUTHORS section to man page

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Christos Longros <chris.longros at gmail.com>
Closes #18329
DeltaFile
+4-0man/man1/zilstat.1
+4-01 files

HardenedBSD/src 541fbf2sys/net if.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+3-21sys/net/if.c
+3-211 files

HardenedBSD/src bbffe59sys/net if.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+3-21sys/net/if.c
+3-211 files

FreeBSD/ports 031f92fwww/nextcloud-news distinfo Makefile

www/nextcloud-news: Update to 28.0.1
DeltaFile
+3-3www/nextcloud-news/distinfo
+1-1www/nextcloud-news/Makefile
+4-42 files

FreeBSD/ports 5b86d9fwww/nextcloud-contacts distinfo Makefile

www/nextcloud-contacts: Update to 8.4.1
DeltaFile
+3-3www/nextcloud-contacts/distinfo
+1-1www/nextcloud-contacts/Makefile
+4-42 files

FreeBSD/ports d48decamail/nextcloud-mail distinfo Makefile

mail/nextcloud-mail: Update to 5.7.3
DeltaFile
+3-3mail/nextcloud-mail/distinfo
+1-1mail/nextcloud-mail/Makefile
+4-42 files

FreeBSD/ports 72ec378security/nextcloud-twofactor_admin Makefile distinfo

security/nextcloud-twofactor_admin: Update to 4.11.0
DeltaFile
+2-4security/nextcloud-twofactor_admin/Makefile
+3-3security/nextcloud-twofactor_admin/distinfo
+5-72 files

LLVM/project 00061bdllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.strictwqm.ll llvm.amdgcn.wqm.ll

[AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn_wqm amdgcn_softwqm amdgcn_strict_wqm (#186214)

This patch adds register bank legalization rules for amdgcn_wqm
amdgcn_softwqm amdgcn_strict_wqm in the AMDGPU GlobalISel pipeline.
DeltaFile
+145-0llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.strictwqm.ll
+70-1llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.ll
+66-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.wqm.mir
+69-1llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.softwqm.ll
+3-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+353-75 files

FreeNAS/freenas 2901c36src/freenas/usr/bin install-dev-tools

Fix dev install script
DeltaFile
+1-1src/freenas/usr/bin/install-dev-tools
+1-11 files

LLVM/project 83a16ffllvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

[AMDGPU] Fix setreg handling in the VGPR MSB lowering

There are multiple issues with it:

1. It can skip inserting S_SET_VGPR_MSB if we set the mode via
   piggybacking. We are now relying on the HW bug for correct
   behavior. If/when the bug is fixed lowering will be incorrect.
2. We should just unconditionally update MSBs if immediate allows it.
   We shall set correct bits and keep the rest of the immediate
   (that is done). There is no reasonable way for an user to change
   MSBs nor does it do anything good to set it with SETREG and then
   immediately overwrite with S_SET_VGPR_MSB.
3. We can always update immediate if Offset is zero.
4. Redundant mode changes created as seen in the
   hazard-setreg-vgpr-msb-gfx1250.mir.
5. Decoding of the immediate was also wrong with non-zero offset
   and did not factor MSB fixup offset handling.

With unconditional immediate update most of time and not relying on

    [12 lines not shown]
DeltaFile
+126-33llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+30-38llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+12-18llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
+5-2llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+173-914 files

LLVM/project 58d34e2lldb/test/API/functionalities/data-formatter/synthetic_subscript main.c

[lldb] Include stdio.h in synthetic subscript test (#186847)

The [lldb-aarch64-windows](https://lab.llvm.org/buildbot/#/builders/141)
buildbot failed with:

```
lld-link: error: undefined symbol: printf
>>> referenced by main.o:(main)
```

I'm assuming that's because of the use of `__builtin_printf`. In other
tests, we use `printf` form `stdio.h` and these build fine, so I added
an include and used `printf`.
DeltaFile
+3-1lldb/test/API/functionalities/data-formatter/synthetic_subscript/main.c
+3-11 files

OPNSense/core 57015c2src/opnsense/mvc/app/controllers/OPNsense/Kea/forms dialogOption4.xml, src/opnsense/mvc/app/models/OPNsense/Kea KeaDhcpv4.php KeaDhcpv4.xml

Services: Kea: DHCPv4: Remove option auto-conversion of string to binary  (#9979)

Cleanup: https://github.com/opnsense/core/commit/8350fcb73b9dd44e8b1e00d2ea03ced71e0f71ac

It's not as it seems, it only supports flat options and is very picky. It will create wrong expectations, rather than what hexadecimal byte pairs do - which are really generic.
DeltaFile
+2-16src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.php
+0-6src/opnsense/mvc/app/models/OPNsense/Kea/FieldTypes/KeaOptionDataField.php
+1-1src/opnsense/mvc/app/controllers/OPNsense/Kea/forms/dialogOption4.xml
+0-1src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.xml
+3-244 files

LLVM/project 9d3d0d7llvm/lib/Transforms/InstCombine InstCombineAddSub.cpp, llvm/test/Transforms/InstCombine sub.ll

[InstCombine] Support disjoint or in add-sub reassociation fold (#186827)
DeltaFile
+52-0llvm/test/Transforms/InstCombine/sub.ll
+13-6llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+65-62 files

LLVM/project 39f47a4llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.s.waitcnt.ll llvm.amdgcn.s.wait.event.ll

AMDGPU/GlobalISel: RegBankLegalize rules for s_wait intrinsics (#186254)
DeltaFile
+9-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+4-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll
+2-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
+1-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx12.ll
+1-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.gfx1250.ll
+17-65 files

LLVM/project 9191b90llvm/test/CodeGen/X86 known-pow2.ll

[X86] known-pow2.ll - add min/max vector test coverage for #182369 (#186841)
DeltaFile
+149-0llvm/test/CodeGen/X86/known-pow2.ll
+149-01 files

OpenZFS/src 488f04etests/test-runner/bin zts-report.py.in

ZTS: Add back redundancy_draid_spare3 exception

Observed again in the CI.  Put the maybe exception back in place
and reference a newly created issue for this sporadic failure.

Signed-off-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Closes #18320
DeltaFile
+1-0tests/test-runner/bin/zts-report.py.in
+1-01 files

LLVM/project 8775dacclang/test/CodeGenCXX pfp-load-store.cpp

Fix test

Created using spr 1.3.6-beta.1
DeltaFile
+1-1clang/test/CodeGenCXX/pfp-load-store.cpp
+1-11 files

LLVM/project 47d019cclang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp teams_distribute_parallel_for_simd_schedule_codegen.cpp, libc/AOR_v20.02/math/test/traces sincosf.txt exp.txt

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+0-31,999libc/AOR_v20.02/math/test/traces/sincosf.txt
+0-16,000libc/AOR_v20.02/math/test/traces/exp.txt
+5,294-4,814clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+5,238-4,758clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+4,350-4,098clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+4,004-3,524clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
+18,886-65,1933,045 files not shown
+215,055-229,5713,051 files

LLVM/project 6826098clang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp teams_distribute_parallel_for_simd_schedule_codegen.cpp, libc/AOR_v20.02/math/test/traces sincosf.txt exp.txt

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+0-31,999libc/AOR_v20.02/math/test/traces/sincosf.txt
+0-16,000libc/AOR_v20.02/math/test/traces/exp.txt
+5,294-4,814clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+5,238-4,758clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+4,350-4,098clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+4,004-3,524clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
+18,886-65,1933,047 files not shown
+215,107-229,5713,053 files

LLVM/project ef05a12llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU cttz_zero_undef.ll ctlz_zero_undef.ll

AMDGPU/GlobalISel: RegBankLegalize rules for ctlz/cttz_zero_undef (#186546)
DeltaFile
+141-82llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
+81-51llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
+60-21llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
+3-2llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+290-1611 files not shown
+291-1617 files

LLVM/project f41c30fllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.ds.read.tr.gfx950.ll

AMDGPU/GlobalISel: RegBankLegalize rules for ds_read_tr* (#186006)
DeltaFile
+92-65llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.read.tr.gfx950.ll
+16-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+5-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+3-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+116-654 files

LLVM/project 0a3384blibc/shared/math log_bf16.h, libc/src/__support/math log_bf16.h CMakeLists.txt

[libc][math] Refactor log_bf16 to Header (#186618)
DeltaFile
+145-0libc/src/__support/math/log_bf16.h
+2-121libc/src/math/generic/log_bf16.cpp
+23-0libc/shared/math/log_bf16.h
+22-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+15-0libc/src/__support/math/CMakeLists.txt
+1-7libc/src/math/generic/CMakeLists.txt
+208-1283 files not shown
+213-1289 files

FreeBSD/ports a39ab5dfinance/py-finnhub-python distinfo Makefile

finance/py-finnhub-python: update 2.4.20 → 2.4.27
DeltaFile
+3-3finance/py-finnhub-python/distinfo
+2-2finance/py-finnhub-python/Makefile
+5-52 files

HardenedBSD/ports a39ab5dfinance/py-finnhub-python distinfo Makefile

finance/py-finnhub-python: update 2.4.20 → 2.4.27
DeltaFile
+3-3finance/py-finnhub-python/distinfo
+2-2finance/py-finnhub-python/Makefile
+5-52 files

FreeBSD/ports e104e35finance/py-finviz Makefile distinfo

finance/py-finviz: update 1.4.6 → 2.0.0
DeltaFile
+10-15finance/py-finviz/Makefile
+3-3finance/py-finviz/distinfo
+13-182 files

HardenedBSD/ports dcbb782textproc/py-phonemizer-fork Makefile pkg-descr, textproc/py-phonemizer-fork/files patch-test_test__espeak.py patch-test_test__festival.py

textproc/py-phonemizer-fork: New port: Fork of phonemizer for text to phones conversion
DeltaFile
+62-0textproc/py-phonemizer-fork/Makefile
+22-0textproc/py-phonemizer-fork/files/patch-test_test__espeak.py
+22-0textproc/py-phonemizer-fork/files/patch-test_test__festival.py
+19-0textproc/py-phonemizer-fork/files/patch-test_test__main.py
+10-0textproc/py-phonemizer-fork/files/patch-test_test__espeak__path__venv.py
+6-0textproc/py-phonemizer-fork/pkg-descr
+141-02 files not shown
+145-08 files