OpenZFS/src f1f96f5 — module/zfs dbuf.c

dbuf: restore BP_IS_HOLE() recheck after dnode_block_freed()

Commit 79cf54582 ("Fix reads for blocks freed after being cloned")
reworked the level-0 check in dbuf_read_hole() and dropped the
BP_IS_HOLE() recheck that followed dnode_block_freed(), together with
the comment explaining it.  That recheck was not about overrides: it
closes a race with dnode_sync().

dnode_sync_free_ranges() drops dn_mtx, clears the bps through
dnode_sync_free_range_impl() -> free_blocks(), then retakes dn_mtx and
removes the range from dn_free_ranges.  For blkptrs held in the dnode
(dn_nlevels == 1), free_blocks() writes the bp without the parent's
db_rwlock, so holding that lock in dbuf_read() does not serialize
against it.  A reader that saw a non-hole bp, then waited on dn_mtx in
dnode_block_freed() until the range was removed, gets "not freed" while
the bp it is about to copy is already a hole (with HOLE_BIRTH, lsize
and birth preserved).  dbuf_read_impl() then hands that hole to
arc_read(): no child I/O is issued, checksum verification fails with
EINVAL, and without ZIO_FLAG_CANFAIL the pool is suspended.

    [19 lines not shown]
DeltaFile
+9-1module/zfs/dbuf.c
+9-11 files

LLVM/project cc8a48a — llvm/unittests/CAS ProgramTest.cpp

address review feedback

Created using spr 1.3.7
DeltaFile
+1-1llvm/unittests/CAS/ProgramTest.cpp
+1-11 files

LLVM/project 372d1ee — utils/bazel/llvm-project-overlay/mlir/unittests BUILD.bazel

[Bazel] Add Support dependency to amdgpu_tests (#229597)

Fixes amdgpu_tests bazel layering failure introduced in commit
45ebdb6a55db, where AMDGPUUtilsTest.cpp includes
llvm/Support/Compiler.h.
DeltaFile
+1-0utils/bazel/llvm-project-overlay/mlir/unittests/BUILD.bazel
+1-01 files

LLVM/project f970b5d — utils/bazel/llvm-project-overlay/libc BUILD.bazel

[Bazel][libc] Update platform_file to depend on dup3 (#229595)

Fixes bazel build failure introduced in commit 64d83dcba1cb, where
file.cpp switched from using dup2 to dup3.
DeltaFile
+1-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-11 files

LLVM/project 93632d5 — flang/include/flang/Runtime/CUDA registration.h

[flang][cuda][NFC] Fix header for registration.h
DeltaFile
+1-1flang/include/flang/Runtime/CUDA/registration.h
+1-11 files

OpenZFS/src 88da095 — module/zfs zvol.c spa_misc.c, tests/runfiles common.run

Fix a deadlock between zvol first open and pool export

After the reference check, zpool export drops the namespace lock with
spa_export_thread still set, and then removes the pool's zvols. A zvol
first open can take the namespace lock in that window. It then waits in
spa_lookup() for the export to finish while it holds zv_state_lock.
Export needs that lock to remove the zvol, so neither can make progress.

zvol_first_open() now fails with ENXIO when spa_lookup() would wait for
the pool. That is the same error the open gets a moment later, once
export marks the zvol for removal. An open in that window can never
succeed, because export removes the zvol before anything else can fail.
So only the case that hangs today behaves differently.

The check is in the shared zvol_first_open(), so it covers Linux,
FreeBSD, and opens made while the caller already holds the namespace
lock, such as a pool that uses zvols from another pool as vdevs. The
new spa_lookup_would_wait() shares its code with spa_lookup().


    [10 lines not shown]
DeltaFile
+82-0tests/zfs-tests/tests/functional/cli_root/zpool_export/zpool_export_zvol_open_pos.ksh
+26-3module/zfs/spa_misc.c
+9-0module/zfs/zvol.c
+1-1tests/runfiles/common.run
+1-0tests/zfs-tests/tests/Makefile.am
+1-0tests/zfs-tests/include/tunables.cfg
+120-41 files not shown
+121-47 files

LLVM/project c202e0f — llvm/unittests/CAS ProgramTest.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+2-2llvm/unittests/CAS/ProgramTest.cpp
+2-21 files

FreeBSD/src ab7249c — sys/cam cam_iosched.c

cam: Assert we have the periph lock when updating the iosched stats

Sponsored by:           Netflix
Differential Revision:  https://reviews.freebsd.org/D60350
DeltaFile
+2-0sys/cam/cam_iosched.c
+2-01 files

LLVM/project 8aff158 — llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-local.mir regbankselect-amdgcn.s.buffer.load.ll

AMDGPU/GlobalISel: Use integer types when narrowing loads and stores

The narrowScalar mutation for loads and stores produced untyped scalars.
For FP-typed values this resulted in an untyped G_OR in the lowerLoad
expansion for unaligned private accesses, which failed to select.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+441-448llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+268-270llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
+361-0llvm/test/CodeGen/AMDGPU/GlobalISel/load-store-private-unaligned-f64.ll
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
+12-12llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+1,114-7621 files not shown
+1,117-7657 files

OpenZFS/src fccf7b4 — include/sys zfs_file.h, lib/libzpool zfs_file_os.c

zfs_file: hide implementing struct

Nothing cares about what zfs_file_t actually is, so we can remove it
from the public header and with it the platform gates.

Sponsored-by: TrueNAS
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Signed-off-by: Rob Norris <rob.norris at truenas.com>
Closes #19231
DeltaFile
+32-17lib/libzpool/zfs_file_os.c
+29-19module/os/freebsd/zfs/zfs_file_os.c
+27-14module/os/linux/zfs/zfs_file_os.c
+1-10include/sys/zfs_file.h
+89-604 files

FreeBSD/src bd86f05 — sys/cam/scsi scsi_da.c

da: Update trim stats with the periph lock held

Separate the updating the stats for the completion from the biodone for
each one.

Sponsored by:           Netflix
Reviewed by:            ali_mashtizadeh.com
Differential Revision:  https://reviews.freebsd.org/D60156
DeltaFile
+14-14sys/cam/scsi/scsi_da.c
+14-141 files

FreeBSD/src 7845cf8 — sys/cam/ata ata_da.c

ada: Update trim stats for every bio

Separate the updating the stats for the completion from the biodone for
each one.

Sponsored by:           Netflix
Reviewed by:            ali_mashtizadeh.com
Differential Revision:  https://reviews.freebsd.org/D60157
DeltaFile
+10-13sys/cam/ata/ata_da.c
+10-131 files

OpenZFS/src 56df630 — cmd ztest.c

zfs_file: replace zfs_file_t in ztest to simulate failure

This is the only place that reaches into an existing zfs_file_t to mess
with its contents. Now that zfs_file_get() works on an existing (non-)
fd, we can just replace the zfs_file_t outright.

Sponsored-by: TrueNAS
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Signed-off-by: Rob Norris <rob.norris at truenas.com>
Closes #19231
DeltaFile
+2-2cmd/ztest.c
+2-21 files

FreeBSD/src 4a3a5de — sys/cam cam_iosched.h cam_iosched.c, sys/cam/nvme nvme_da.c

nda: Update trim stats with the periph lock held

Separate the updating the stats for the completion from the biodone for
each one.

Sponsored by:           Netflix
Reviewed by:            ali_mashtizadeh.com
Differential Revision:  https://reviews.freebsd.org/D60155
DeltaFile
+4-18sys/cam/nvme/nvme_da.c
+22-0sys/cam/cam_iosched.c
+2-0sys/cam/cam_iosched.h
+28-183 files

FreeBSD/src 0040d1f — sys/cam cam_iosched.h cam_iosched.c, sys/cam/ata ata_da.c

cam: Rename cam_iosched_bio_complete to cam_iosched_bio_update_stats

The function updates scheduler statistics but does not complete the
bio. Rename it to avoid implying ownership of bio completion.

Sponsored by:           Netflix

Reviewed by:    ali_mashtizadeh.com
Differential Revision:  https://reviews.freebsd.org/D60349
DeltaFile
+3-3sys/cam/nvme/nvme_da.c
+1-1sys/cam/scsi/scsi_da.c
+1-1sys/cam/cam_iosched.h
+1-1sys/cam/cam_iosched.c
+1-1sys/cam/ata/ata_da.c
+7-75 files

LLVM/project 33f058d — llvm/lib/Target/AMDGPU SIInstrInfo.h SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU fix-sgpr-copies-f16-true16.mir fix-sgpr-copies-vgpr16-to-spgr32.ll

[AMDGPU] Fix true16 losing 16-bit subreg operands

Folding a true16 v2s copy such as %2:sreg_32 = COPY %1.lo16 rewrites
its users to read %1.lo16 and relies on legalizeOperandsVALUt16 to
legalize the narrower operand. PHI and REG_SEQUENCE operands have no
register class, so it skipped them, leaving a 16-bit input in a VGPR_32
PHI or a 32-bit REG_SEQUENCE slot. DetectDeadLanes then marked the PHI
input undef and the defining load was deleted.

Widen such operands with a REG_SEQUENCE in legalizeOperandsVALUt16,
which runs both when the copy is folded and when the user is moved to
the VALU. This miscompiled uniform i16 loads feeding PHIs on gfx1250.

Change-Id: I9ddee5b11ff8503f4b2b1d1c4c776a12b270d968
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+101-212llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+282-0llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
+125-0llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-vgpr16-to-spgr32.ll
+68-13llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+75-0llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
+16-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+667-2256 files

OpenZFS/src 863f496 — lib/libzpool zfs_file_os.c

zfs_file: implement _get/_put for userspace

Simple enough just to wrap the existing fd, whatever it is, in a
zfs_file_t.

Sponsored-by: TrueNAS
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Signed-off-by: Rob Norris <rob.norris at truenas.com>
Closes #19231
DeltaFile
+11-8lib/libzpool/zfs_file_os.c
+11-81 files

LLVM/project 3ad4809 — flang/unittests/Evaluate uint128.cpp

Fix typo
DeltaFile
+1-1flang/unittests/Evaluate/uint128.cpp
+1-11 files

LLVM/project db34882 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV fclass-select.ll

 [RISCV] Fold (sub 0, (srl (and X, (1 << ShAmt)), ShAmt)) -> (sra (shl X, ShAmt2), bits-1) (#229509)

Improves codegen of is.fpclass+select. The AND to test bits of
is.fpclass may get turned into and+srl while the select emits a
neg. Isel will turn the and+srl into shl+srl but it's too late to
fold the neg.

Assisted-by: Claude
DeltaFile
+114-0llvm/test/CodeGen/RISCV/fclass-select.ll
+23-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+137-02 files

LLVM/project 6c7c592 — llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-amdgcn.s.buffer.load.ll atomicrmw-fmin-fmax.ll

AMDGPU/GlobalISel: Use integer types when narrowing loads and stores

The narrowScalar mutation for loads and stores produced untyped scalars.
For FP-typed values this resulted in an untyped G_OR in the lowerLoad
expansion for unaligned private accesses, which failed to select.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+441-448llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+268-270llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
+361-0llvm/test/CodeGen/AMDGPU/GlobalISel/load-store-private-unaligned-f64.ll
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
+3-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+1,105-7536 files

LLVM/project 1dc4fa3 — llvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-constant.mir legalize-load-flat.mir

GlobalISel: Use integer types when splitting loads in lowerLoad

lowerLoad built the split pieces using the destination type with the
element size changed, which preserved floating-point types. An
unaligned f64 load was decomposed into G_ZEXTLOAD, G_SHL and G_OR on
f32 and f64, which then crashed in AMDGPU RegBankLegalize. Build the
pieces as integers and bitcast to a non-integer result type, as
lowerStore already does.

The pieces are now consistently integer typed, which allows more
constants to be CSEd in the existing tests.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+3,147-2,589llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+2,662-2,708llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+2,490-2,634llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+1,880-1,952llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
+1,812-1,908llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
+13-12llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+12,004-11,8036 files

LLVM/project b82f26b — llvm/lib/Transforms/Vectorize LoopVectorize.cpp

[LV] Use frozen start values from the main plan directly (NFC). (#229571)

Only freeze possibly-poison start values of FindIV reductions in the
main plan. When preparing the epilogue plan, set the start operand of
its FindIV reduction results directly to the value frozen for the main
plan, instead of creating Freeze recipes in the epilogue plan and
replacing them later via a map. This leaves only VPExpandSCEVRecipes to
replace in the epilogue plan's entry.
DeltaFile
+34-51llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+34-511 files

LLVM/project cfd56f3 — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.768bit.ll amdgcn.bitcast.832bit.ll

address review feedback

Created using spr 1.3.7
DeltaFile
+85,305-104,728llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+23,897-29,739llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+16,898-20,565llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+15,617-19,097llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+14,370-17,720llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+12,180-15,528llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+168,267-207,37711,737 files not shown
+776,240-588,41011,743 files

LLVM/project 9184c30 — clang/lib/CIR/Dialect/IR CIRDialect.cpp, clang/test/CIR/Transforms canonicalize.cir

[CIR] Fix use-after-free in BrOp::canonicalize (#229191)

BrOp::canonicalize took the branch's destination operands as an
OperandRange, erased the branch, and then passed the range to
mergeBlocks. The range points into the branch's operand storage, which
eraseOp frees, so mergeBlocks read freed memory whenever the merged
block had arguments. Valgrind reports it on the new test:

```
  Invalid read of size 8
     at mlir::ValueRange::dereference_iterator
     by mlir::RewriterBase::inlineBlockBefore
     by cir::BrOp::canonicalize
   Address ... is 136 bytes inside a block of size 144 free'd
     by mlir::RewriterBase::eraseOp
     by cir::BrOp::canonicalize
```

It goes unnoticed with glibc malloc, which usually leaves the freed
operands intact. Copy the operands before erasing the branch.
DeltaFile
+34-0clang/test/CIR/Transforms/canonicalize.cir
+11-1clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+45-12 files

GhostBSD/networkmgr b24ff6f — NetworkMgr query.py validate.py

Fix DHCP save, dotted interfaces and entry checks from review

Switching an interface to DHCP raised UnboundLocalError partway
through the save, because the interim start_static_network call used
locals that only the manual path set. The greyed out address entries
are now checked in DHCP mode too, and the call is skipped when they
hold no valid address.

rc.subr reads the settings of em0.10 from ifconfig_em0_10, and sysrc
refuses a name with a dot, so settings for dotted interfaces were
silently not saved. Add validate.rc_conf_interface(), which maps
".-/+" to "_" like get_if_var in network.subr, and use it for every
ifconfig_* variable written or read.

An IPv6 gateway zone must now name the interface being configured.
Search domains with more than one trailing dot are refused, and so is
a zero IPv4 netmask.
DeltaFile
+30-10NetworkMgr/configuration.py
+27-4NetworkMgr/validate.py
+5-2NetworkMgr/query.py
+62-163 files

LLVM/project 44a7e32 — clang/test/CodeGen fake-use-sanitizer.cpp

[msan][test] Add MSan case to clang/test/CodeGen/fake-use-sanitizer.cpp (#229564)

Regression test for https://github.com/llvm/llvm-project/issues/225425,
showing that MSan incorrectly strictly handles fake_use.
DeltaFile
+46-0clang/test/CodeGen/fake-use-sanitizer.cpp
+46-01 files

LLVM/project 5ab70ae — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/Transforms lib-opt.cir target-lowering.cir

[CIR] Register TargetLowering, LoweringPrepare and LibOpt in cir-opt

DeltaFile
+56-0clang/test/CIR/Transforms/lowering-prepare.cir
+36-0clang/test/CIR/Transforms/lowering-prepare-global-ctor.cir
+20-0clang/test/CIR/Transforms/target-lowering.cir
+14-0clang/test/CIR/Transforms/lib-opt.cir
+12-0clang/tools/cir-opt/cir-opt.cpp
+5-2clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+143-21 files not shown
+148-27 files

LLVM/project 7628e26 — clang/unittests/CIR ControlFlowTest.cpp

[CIR] Update ControlFlowTest for the new global ctor syntax
DeltaFile
+1-1clang/unittests/CIR/ControlFlowTest.cpp
+1-11 files

NetBSD/pkgsrc-wip 2c08882 — electron43 distinfo, electron43/patches patch-third__party_lzma__sdk_C_XzDec.c patch-third__party_lzma__sdk_C_LzmaEnc.c

Start electron43 package
DeltaFile
+2,334-0electron43/distinfo
+1,269-0electron43/patches/patch-third__party_lzma__sdk_C_7zArcIn.c
+1,259-0electron43/patches/patch-third__party_lzma__sdk_C_LzFind.c
+1,210-0electron43/patches/patch-third__party_lzma__sdk_C_CpuArch.c
+1,084-0electron43/patches/patch-third__party_lzma__sdk_C_LzmaEnc.c
+936-0electron43/patches/patch-third__party_lzma__sdk_C_XzDec.c
+8,092-02,298 files not shown
+102,542-02,304 files

LLVM/project 155462f — mlir/include/mlir/Conversion Passes.td, mlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp

[mlir] Migrate AMDGPU/ROCDL to targets, not chipset versions (#223563)

**migration tl;dr:** Replace usages of `amdgpu::Chipset` with
`ROCDL::TargetInfo`, ideally move from `chipset=` to `arch=`. If you
don't use upstream pipelines, call
'TargetInfo::migrateArchFeaturesToModuleFlags` at the appropriate
location.

Further note: if you've got a build pipeline that's getting a `gfxXXX`
name from something like `rocm_agent_enumerator`, using a full triple
name like the ones you get from `rocminfo` is preferred.

`amdgpu::Chipset` was an awkward hack that was hard to keep up to date
with changes in the compiler/new architectures, and didn't properly
support generic targets (and has been strongly disfavored by the
compiler team).

This PR replaces `amdgpu::Chipset` with `ROCDL::TargetInfo`, a
structure that uses LLVM's TargetParser and the underlying LLVM

    [47 lines not shown]
DeltaFile
+316-324mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+105-0mlir/test/Dialect/LLVMIR/rocdl-attach-target-arch.mlir
+87-4mlir/lib/Dialect/GPU/Transforms/ROCDLAttachTarget.cpp
+46-40mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
+49-24mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
+46-15mlir/include/mlir/Conversion/Passes.td
+649-407103 files not shown
+1,205-727109 files