FreeNAS/freenas ea4b807src/middlewared/middlewared/service crud_service.py

Fix GenericCRUDService query overload
DeltaFile
+3-3src/middlewared/middlewared/service/crud_service.py
+3-31 files

FreeBSD/ports 94861f1audio/spiralsynthmodular Makefile, audio/spiralsynthmodular/files patch-SpiralSound_SpiralInfo.h patch-SpiralSound_SpiralInfo.C

audio/spiralsynthmodular: Fix "undefined symbol" errors at runtime

* Behavior *
- At runtime, for each synth plugin, we got:
dlerror() output:
/usr/local/lib/SpiralPlugins/AmpPlugin.so: Undefined symbol "_ZN10SpiralInfo6LOCALEE"

* Why *
- It seems this comes from the way newer compiler manage static
  properties. (SSM is 25yo).
- This error has already been reported long times ago on Linux distro.

* Fix *
- A way to fix it without rewriting the wheel is to inline static
  properties in the header.

While here improve port:
- Add LICENSE.
- Register dependiencies.

    [9 lines not shown]
DeltaFile
+70-0audio/spiralsynthmodular/files/patch-SpiralSound_SpiralInfo.h
+64-0audio/spiralsynthmodular/files/patch-SpiralSound_SpiralInfo.C
+12-12audio/spiralsynthmodular/Makefile
+146-123 files

FreeBSD/ports 8fedf8caudio/spiralsynthmodular Makefile, audio/spiralsynthmodular/files patch-SpiralSound_SpiralInfo.h patch-SpiralSound_SpiralInfo.C

audio/spiralsynthmodular: Fix "undefined symbol" errors at runtime

* Behavior *
- At runtime, for each synth plugin, we got:
dlerror() output:
/usr/local/lib/SpiralPlugins/AmpPlugin.so: Undefined symbol "_ZN10SpiralInfo6LOCALEE"

* Why *
- It seems this comes from the way newer compiler manage static
  properties. (SSM is 25yo).
- This error has already been reported long times ago on Linux distro.

* Fix *
- A way to fix it without rewriting the wheel is to inline static
  properties in the header.

While here improve port:
- Add LICENSE.
- Register dependiencies.

    [8 lines not shown]
DeltaFile
+70-0audio/spiralsynthmodular/files/patch-SpiralSound_SpiralInfo.h
+64-0audio/spiralsynthmodular/files/patch-SpiralSound_SpiralInfo.C
+12-12audio/spiralsynthmodular/Makefile
+146-123 files

LLVM/project 97cf8bfflang/lib/Optimizer/Transforms FIRToMemRef.cpp, flang/test/Transforms/FIRToMemRef array-coor-block-arg.mlir

[flang] materialize fir.box when it is from a block argument (#184898)

We have to materialize `fir.box` before adding a `fir.convert` to a
memref type. Otherwise we get:
`'fir.convert' op invalid type conversion'!fir.box<!fir.array<?xi32>>' /
'memref<?xi32, strided<[?], offset: ?>>'`
DeltaFile
+19-8flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
+18-0flang/test/Transforms/FIRToMemRef/array-coor-block-arg.mlir
+37-82 files

LLVM/project a870547llvm/lib/Target/AMDGPU SILoadStoreOptimizer.cpp, llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll promote-constOffset-to-imm-gfx12.mir

use smallest offset as anchor when negative offset is not allowed
DeltaFile
+99-171llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+61-22llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
+67-11llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+34-40llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
+5-4llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
+266-2485 files

LLVM/project 2927c97llvm/lib/Target/AMDGPU SILoadStoreOptimizer.cpp, llvm/test/CodeGen/AMDGPU promote-constOffset-to-imm-gfx12.mir promote-constOffset-to-imm-gfx12.ll

[AMDGPU] Disable negative imm offset for async load/store instructions
DeltaFile
+20-16llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.mir
+6-7llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx12.ll
+3-1llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
+29-243 files

LLVM/project c172000llvm/lib/Transforms/Instrumentation AddressSanitizer.cpp, llvm/test/Instrumentation/AddressSanitizer basic-msvc64.ll

[ASan][Windows] Fixing Windows shadow memory address for arm64 (#184902)

This is a prerequisite for full ARM64 Windows ASan support. The runtime
interception changes needed to make ASan functional end-to-end on ARM64
Windows will be opened separately.

Motivated by https://github.com/microsoft/STL/pull/6095 (more
specifically [this reference to
clang-cl](https://github.com/microsoft/STL/pull/6095#:~:text=Not%20enabling%20GH_002030_asan_annotate_string%20and%20GH_002030_asan_annotate_vector%20yet%20due%20to%20Clang%20issues.))

The latest MSVC toolset includes ARM64 AddressSanitizer support. This
change adds AArch64 to the Windows 64-bit shadow mapping condition when
compiling with `-fsanitize=address` with `clang-cl`. Without this,
consumers on Windows who target ARM64 with `clang-cl -fsanitize=address`
and then link with `link.exe` will see this at runtime:

```text
ERROR: AddressSanitizer: access-violation on unknown address
...

    [4 lines not shown]
DeltaFile
+2-2llvm/test/Instrumentation/AddressSanitizer/basic-msvc64.ll
+1-1llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+3-32 files

FreeNAS/freenas be13f62src/middlewared/middlewared/plugins/zfs object_count_impl.py

Add impl
DeltaFile
+52-0src/middlewared/middlewared/plugins/zfs/object_count_impl.py
+52-01 files

FreeBSD/ports 9e5a13dmail/thunderbird-esr distinfo Makefile

mail/thunderbird-esr: update to 140.8.1 (rc1)

Release Notes:
  https://www.thunderbird.net/en-US/thunderbird/140.8.1esr/releasenotes/

(cherry picked from commit 9b7ade6bbc93df251147316ec600719cd5e6e251)
DeltaFile
+3-3mail/thunderbird-esr/distinfo
+1-1mail/thunderbird-esr/Makefile
+4-42 files

FreeBSD/ports 9b7ade6mail/thunderbird-esr distinfo Makefile

mail/thunderbird-esr: update to 140.8.1 (rc1)

Release Notes:
  https://www.thunderbird.net/en-US/thunderbird/140.8.1esr/releasenotes/
DeltaFile
+3-3mail/thunderbird-esr/distinfo
+1-1mail/thunderbird-esr/Makefile
+4-42 files

LLVM/project b87cf50llvm/lib/Target/WebAssembly WebAssemblyTargetMachine.cpp

[WebAssembly] Remove the `wasm-disable-fix-irreducible-control-flow-pass` switch (#185072)

This removes the `wasm-disable-fix-irreducible-control-flow-pass`
switch.

It was originally added in #67715 as a way to avoid the potentially
absurd compile times the pass used to bring. However with the successful
merge of #184441, the pass itself has been fixed to avoid this issue.

Given that, it is no longer necessary nor desirable to keep this switch.
DeltaFile
+1-8llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+1-81 files

LLVM/project 0b6cd1amlir/include/mlir/Dialect/LLVMIR LLVMOps.td, mlir/lib/Dialect/LLVMIR/IR LLVMDialect.cpp

[mlir][LLVM] Add support for `ptrtoaddr`

The `ptrtoaddr` op is akin to `ptrtoint` with some important differences:
* It does not capture the provenance of the pointer, meaning a pointer does not escape and subsequent `inttoptr` don't make a legal pointer. LLVM can then assume the pointer never escaped, which helps alias analysis.
* It does not support arbitrary integer types, but only exactly the integer type that is equal in width to the pointer type as specified by the data layout.

This PR adds the op the MLIR dialect and adds the corresponding verification for the datalayout property.
DeltaFile
+18-0mlir/test/Dialect/LLVMIR/invalid.mlir
+15-0mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+9-0mlir/test/Target/LLVMIR/llvmir.mlir
+8-0mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
+2-0mlir/test/Dialect/LLVMIR/roundtrip.mlir
+2-0mlir/test/Target/LLVMIR/Import/instructions.ll
+54-06 files

LLVM/project a99d4a6mlir/lib/Tools/mlir-reduce MlirReduceMain.cpp

[mlir][reducer] Add split-input-file to mlir-reduce (#184970)

The tests for mlir-reduce are currently scattered. To centralize the
tests for mlir-reduce, I added the split-input-file feature to
mlir-reduce.It is part of
https://github.com/llvm/llvm-project/pull/184974.
DeltaFile
+43-30mlir/lib/Tools/mlir-reduce/MlirReduceMain.cpp
+43-301 files

LLVM/project ae4e712llvm/lib/Target/WebAssembly/AsmParser WebAssemblyAsmParser.cpp, llvm/lib/Target/WebAssembly/MCTargetDesc WebAssemblyTargetStreamer.cpp

[MC][WebAssembly] Allow strings for import modules and names in asm (#182896)

Current tooling for the WebAssembly component model uses import modules
and names such as `$root` and `[thread-index]`. Importing these from
assembly files requires support for non-valid identifiers in
`.import_name` and `.import_module` directives. This PR adds support for
specifying those as strings, e.g.:

```asm
        .import_module __wasm_component_model_builtin_thread_index, "$root"
        .import_name __wasm_component_model_builtin_thread_index, "[thread-index]"
```
DeltaFile
+46-1llvm/test/MC/WebAssembly/export-name.s
+44-2llvm/test/MC/WebAssembly/import-module.s
+18-3llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
+4-6llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp
+4-4llvm/test/CodeGen/WebAssembly/lower-em-ehsjlj-options.ll
+4-1llvm/test/MC/WebAssembly/export-name-invalid.s
+120-174 files not shown
+132-2310 files

LLVM/project eada0f5clang-tools-extra/clang-doc/assets head-template.mustache clang-doc-mustache.css, clang-tools-extra/test/clang-doc basic-project.mustache.test

[clang-doc] Add button toggle for light/dark theme (#181587)

The user can now manually toggle the light or dark theme instead of
waiting for the system theme to change.

Also fixes a typo that caused some overflow issues even when there was
no content to cause an overflow.
DeltaFile
+42-2clang-tools-extra/clang-doc/assets/head-template.mustache
+8-4clang-tools-extra/test/clang-doc/basic-project.mustache.test
+9-1clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
+10-0clang-tools-extra/clang-doc/assets/navbar-template.mustache
+69-74 files

LLVM/project a71adf1llvm/lib/Target/PowerPC PPCISelLowering.cpp PPCAsmPrinter.cpp, llvm/test/CodeGen/PowerPC amo-enable.ll

Address review comments
DeltaFile
+3-11llvm/test/CodeGen/PowerPC/amo-enable.ll
+4-3llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+2-2llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+9-163 files

FreeNAS/freenas eb0013fsrc/middlewared/middlewared/plugins/filesystem_ utils.py acl.py, src/middlewared/middlewared/plugins/zfs resource_crud.py

use ZFS object counts to estimate % complete

This commit switches our filesystem permissions-related API
endpoints to calcluate thep percentage compelte for the task
based on object counters that libzfs provides. This is
somewhat imperfect, but gets us in the ballpark of a reasonable
number at a very low cost (much lower than pre-scanning).
DeltaFile
+29-2src/middlewared/middlewared/plugins/filesystem_/utils.py
+10-0src/middlewared/middlewared/plugins/zfs/resource_crud.py
+4-4src/middlewared/middlewared/plugins/filesystem_/acl.py
+43-63 files

LLVM/project 4d53c42compiler-rt/lib/builtins CMakeLists.txt

builtins: Make cmake formatting self-consistent aftr #183871

No behavior change.
DeltaFile
+4-2compiler-rt/lib/builtins/CMakeLists.txt
+4-21 files

LLVM/project 38459f3llvm/test/tools/llubi loadstore_le.ll loadstore_be.ll, llvm/tools/llubi/lib Context.cpp Interpreter.cpp

Revert "[llubi] Add support for load/store/lifetime markers (#182532)"

This reverts commit 0311bb623a1e1bd101e517cfde4538039f65aa24.
DeltaFile
+32-303llvm/tools/llubi/lib/Context.cpp
+0-192llvm/test/tools/llubi/loadstore_le.ll
+0-190llvm/test/tools/llubi/loadstore_be.ll
+8-127llvm/tools/llubi/lib/Interpreter.cpp
+17-46llvm/tools/llubi/lib/Value.h
+4-42llvm/tools/llubi/lib/Context.h
+61-9009 files not shown
+65-1,04815 files

FreeNAS/freenas ae1dae9src/middlewared/middlewared/plugins/pool_ pool.py, src/middlewared/middlewared/plugins/zpool query_impl.py

add expand_info()
DeltaFile
+30-0src/middlewared/middlewared/plugins/zpool/query_impl.py
+14-5src/middlewared/middlewared/plugins/pool_/pool.py
+44-52 files

FreeNAS/freenas d9be500src/middlewared/middlewared/plugins/zpool get_zpool_properties_impl.py query_impl.py

more AI garbage
DeltaFile
+0-26src/middlewared/middlewared/plugins/zpool/get_zpool_properties_impl.py
+1-4src/middlewared/middlewared/plugins/zpool/query_impl.py
+0-2src/middlewared/middlewared/plugins/zpool/__init__.py
+1-323 files

FreeNAS/freenas 84a05fasrc/middlewared/middlewared/api/v27_0_0 zpool_query.py __init__.py

add v27 dirs
DeltaFile
+173-0src/middlewared/middlewared/api/v27_0_0/zpool_query.py
+1-0src/middlewared/middlewared/api/v27_0_0/__init__.py
+174-02 files

FreeNAS/freenas fbfbd99src/middlewared/middlewared/plugins/zpool get_zpool_status_impl.py get_zpool_topology_impl.py

badddd
DeltaFile
+0-29src/middlewared/middlewared/plugins/zpool/get_zpool_status_impl.py
+0-18src/middlewared/middlewared/plugins/zpool/get_zpool_topology_impl.py
+0-4src/middlewared/middlewared/plugins/zpool/__init__.py
+0-513 files

FreeNAS/freenas 38401f8src/middlewared/middlewared/plugins/pool_ pool.py, src/middlewared/middlewared/plugins/zpool query_impl.py get_zpool_scan_impl.py

more cleanup of AI SLOP
DeltaFile
+43-20src/middlewared/middlewared/plugins/zpool/query_impl.py
+0-23src/middlewared/middlewared/plugins/zpool/get_zpool_scan_impl.py
+7-4src/middlewared/middlewared/plugins/pool_/pool.py
+0-2src/middlewared/middlewared/plugins/zpool/__init__.py
+50-494 files

FreeNAS/freenas 5c74b22src/middlewared/middlewared/api/v26_0_0 zpool_query.py, src/middlewared/middlewared/plugins/pool_ topology.py pool.py

add zpool.query
DeltaFile
+221-0src/middlewared/middlewared/plugins/zpool/query_impl.py
+173-0src/middlewared/middlewared/api/v26_0_0/zpool_query.py
+60-3src/middlewared/middlewared/plugins/pool_/topology.py
+41-19src/middlewared/middlewared/plugins/pool_/pool.py
+39-0src/middlewared/middlewared/plugins/zpool/crud.py
+29-0src/middlewared/middlewared/plugins/zpool/get_zpool_status_impl.py
+563-2214 files not shown
+668-4320 files

FreeNAS/freenas c93d904src/middlewared/middlewared/plugins/zpool query_impl.py get_zpool_scan_impl.py

fix1
DeltaFile
+6-0src/middlewared/middlewared/plugins/zpool/query_impl.py
+3-1src/middlewared/middlewared/plugins/zpool/get_zpool_scan_impl.py
+9-12 files

FreeNAS/freenas 0a56809src/middlewared/middlewared/plugins/zpool query_impl.py crud.py

clean up
DeltaFile
+21-36src/middlewared/middlewared/plugins/zpool/query_impl.py
+2-2src/middlewared/middlewared/plugins/zpool/crud.py
+23-382 files

LLVM/project 337fed3clang/lib/CodeGen CGExprAgg.cpp, clang/test/CodeGenHIP sret-nontrivial-copyable.hip

[Clang] Fix EmitAggregateCopy assertion for non-trivially-copyable sr… (#185091)

…et types

Fix for buildbot crash on #183639
The UseTemp path in AggExprEmitter::withReturnValueSlot copies back via
EmitAggregateCopy, which asserts that the type has a trivial copy/move
constructor or assignment operator. Gate the DestASMismatch condition on
isTriviallyCopyableType so that non-trivially-copyable types (e.g.
std::exception_ptr) fall through to the addrspacecast path instead.

Fix buildbot crash:
https://lab.llvm.org/buildbot/#/builders/73/builds/19803
DeltaFile
+34-0clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
+7-6clang/lib/CodeGen/CGExprAgg.cpp
+2-2clang/test/OpenMP/amdgcn_sret_ctor.cpp
+43-83 files

LLVM/project bdec4dallvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rvp-ext-rv64.ll rvp-ext-rv32.ll

[RISCV][P-ext] Only support sshlsat for splat immediate shift amounts. (#184886)

Fixes cannot select errors for other types of shift amounts.

I've made a new RISCVISD node that only allows an immediate operand.
It's assumed that the lowering code will only allow valid immediates so
I'm not using a TImmLeaf in the match.
DeltaFile
+117-9llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+90-6llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
+15-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+5-4llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+227-204 files

LLVM/project d6f2ea4llvm/docs/TableGen ProgRef.rst, llvm/lib/TableGen TGParser.cpp TGParser.h

[TableGen] Add let append/prepend syntax for field concatenation
DeltaFile
+224-0llvm/test/TableGen/let-append.td
+91-14llvm/lib/TableGen/TGParser.cpp
+63-0llvm/test/TableGen/let-append-toplevel.td
+45-2llvm/docs/TableGen/ProgRef.rst
+22-4llvm/lib/TableGen/TGParser.h
+12-0llvm/test/TableGen/let-prepend-error.td
+457-202 files not shown
+481-208 files