LLVM/project 4f5e879clang/lib/Driver/ToolChains Linux.cpp, clang/test/Driver sanitizer-ld.c

[clang][Driver] Enable -fsanitize=type for Hexagon Linux (#191604)

Allow the TypeSanitizer to be used on Hexagon Linux targets.
DeltaFile
+10-0clang/test/Driver/sanitizer-ld.c
+1-1clang/lib/Driver/ToolChains/Linux.cpp
+11-12 files

LLVM/project 20edc84compiler-rt/lib/tysan tysan.cpp

[compiler-rt][TySan] Use pointer-width types for shadow memory ops (#191602)

The TySan runtime used uint64_t/int64_t casts for shadow memory pointer
arithmetic and interior-byte marker values. These are incorrect on
32-bit targets where pointers are 4 bytes: the shadow entries are
pointer-sized, so the offsets and marker values must also be
pointer-sized.

Replace uint64_t/int64_t with uptr/sptr (sanitizer_common's
pointer-width typedefs) throughout SetShadowType, GetNotAllBadTD,
GetNotAllUnkTD, and __tysan_instrument_mem_inst. This is a no-op on
64-bit targets (where uptr == uint64_t) and fixes shadow corruption on
32-bit targets.
DeltaFile
+14-15compiler-rt/lib/tysan/tysan.cpp
+14-151 files

LLVM/project c7903ceclang/lib/Driver ToolChain.cpp, clang/test/Driver fsanitize-cfi.c

[Hexagon] Add CFI-ICall sanitizer support (#191754)

Enable -fsanitize=cfi-icall for Hexagon targets:
- Add Hexagon to the CFI-ICall allow-list in the Clang driver.
- Add Hexagon jump table support in LowerTypeTests: 4-byte entries using
the `jump` instruction, and route Hexagon through the native function
bit-set builder.
DeltaFile
+6-1llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+6-0llvm/test/Transforms/LowerTypeTests/function.ll
+4-0clang/test/Driver/fsanitize-cfi.c
+2-1clang/lib/Driver/ToolChain.cpp
+2-0llvm/test/Transforms/LowerTypeTests/function-weak.ll
+20-25 files

LLVM/project c4a194fllvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Ensure GCSPUSHM, GCSSS1, GCSPOPM and GCSSS2 are all converted
DeltaFile
+9-41llvm/lib/Target/AArch64/AArch64InstrInfo.td
+19-4llvm/lib/Target/AArch64/AArch64InstrFormats.td
+9-6llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+11-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+2-1llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-1llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+51-566 files

LLVM/project b4582a2llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp

fixup! Improve printing code for tabs and commas
DeltaFile
+5-8llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+5-81 files

LLVM/project 865fa12llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Parse instructions in AArch64AsmParser.cpp
DeltaFile
+87-5llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+0-14llvm/lib/Target/AArch64/AArch64InstrInfo.td
+87-192 files

LLVM/project ab3cc36llvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp

fixup! SYSL only has dest register
DeltaFile
+7-22llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+9-9llvm/lib/Target/AArch64/AArch64InstrFormats.td
+7-6llvm/lib/Target/AArch64/AArch64InstrInfo.td
+23-373 files

LLVM/project 4bc3ec9llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Add negative tests, and revert 391c34289 (move to aliases in Tablegen)
DeltaFile
+5-88llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+0-25llvm/test/MC/AArch64/armv9a-sysp-pairs.s
+14-0llvm/test/MC/AArch64/arm64-aliases.s
+14-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+4-4llvm/lib/Target/AArch64/AArch64InstrFormats.td
+8-0llvm/test/MC/AArch64/armv9a-sysp.s
+45-1172 files not shown
+54-1198 files

LLVM/project 537b32cllvm/test/MC/AArch64 armv9.4a-gcs.s arm64-aliases.s

fixup! Move new tests into arm64-aliases.s
DeltaFile
+0-40llvm/test/MC/AArch64/armv9.4a-gcs.s
+32-0llvm/test/MC/AArch64/arm64-aliases.s
+25-0llvm/test/MC/AArch64/armv9a-sysp-pairs.s
+2-6llvm/test/MC/AArch64/brbe.s
+0-5llvm/test/MC/AArch64/armv8.9a-debug-pmu.s
+0-5llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
+59-566 files

LLVM/project 66157f6llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td, llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp

[AArch64][llvm] Redefine some isns as an alias of `SYS`

Some instructions are not currently defined as an alias of `SYS`
when they should be, so they don't disassemble back into the
native instruction, but instead disassemble into `SYS`.
Fix these cases and add additional testcase.

Note that I've left `GCSPUSHM` due to a `mayStore`, `GCSSS1` and
`GCSSS2` as they're used in AArch64ISelDAGToDAG.cpp, and `GCSPOPM`
has an intrinsic pattern in AArch64InstrInfo.td. They will disassemble
correctly though, as they use `InstAlias`.
DeltaFile
+116-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+24-23llvm/lib/Target/AArch64/AArch64InstrInfo.td
+40-0llvm/test/MC/AArch64/armv9.4a-gcs.s
+0-19llvm/lib/Target/AArch64/AArch64InstrFormats.td
+6-2llvm/test/MC/AArch64/brbe.s
+5-0llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
+191-441 files not shown
+196-447 files

LLVM/project aa32198clang/include/clang/CIR MissingFeatures.h, clang/include/clang/CIR/Dialect/IR CIROps.td

[CIR] Remove OpenCLKernel enum and updated the ordering to match llvm::CallingConv
DeltaFile
+8-8clang/include/clang/CIR/Dialect/IR/CIROps.td
+0-5clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+0-2clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+0-1clang/include/clang/CIR/MissingFeatures.h
+8-164 files

FreeNAS/freenas 696fb90src/middlewared/middlewared/alert/source ipmi_sel.py

NAS-140672 / 25.10.3.1 / fix CPU assertion alerts on v-series (#18740)

This was already fixed in 26 and 27 but needs to be in 25 as well.
DeltaFile
+3-2src/middlewared/middlewared/alert/source/ipmi_sel.py
+3-21 files

LLVM/project 66d78d0llvm/lib/Target/PowerPC PPCISelLowering.cpp, llvm/test/CodeGen/PowerPC bit_floor.ll

[PowerPC] fix Inefficient std::bit_floor(x)  (#183361)

Fix  Inefficient asm of std::bit_floor(x) for powerpc.
DeltaFile
+77-0llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+17-27llvm/test/CodeGen/PowerPC/bit_floor.ll
+94-272 files

LLVM/project 92d04f1clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

fix fmt
DeltaFile
+0-2clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+0-21 files

LLVM/project 56ce7edllvm/lib/Target/AArch64 AArch64RegisterInfo.cpp

[AArch64] Fix strict weak ordering violation in regalloc hints sort. (#192055)

This fixes an error with expensive checks after landing #190139.

The issue was:

Error: comparison doesn't meet irreflexive requirements, assert(!(a <
a)).

because it could have previously returned 'true' in the ordering
function if registers A and B were equal.

Also made NFC change to rename 'HandleMatchCmpPredicateHint' ->
'HandleDestructivePredicateHint' (that was missed in the review).
DeltaFile
+4-4llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+4-41 files

NetBSD/pkgsrc-wip 7d6fe41. Makefile, grim Makefile distinfo

grim: remove, imported to pkgsrc
DeltaFile
+0-24grim/Makefile
+0-5grim/distinfo
+0-3grim/PLIST
+0-2grim/DESCR
+0-1Makefile
+0-355 files

NetBSD/pkgsrc-wip 762a3da. Makefile, slurp Makefile distinfo

slurp: remove, imported to pkgsrc
DeltaFile
+0-22slurp/Makefile
+0-5slurp/distinfo
+0-3slurp/DESCR
+0-3slurp/PLIST
+0-1Makefile
+0-345 files

NetBSD/pkgsrc-wip 3faa4e9. Makefile, swaylock Makefile PLIST

swaylock: remove, imported to pkgsrc
DeltaFile
+0-56swaylock/Makefile
+0-8swaylock/PLIST
+0-5swaylock/distinfo
+0-4swaylock/DESCR
+0-2swaylock/files/swaylock
+0-1Makefile
+0-766 files

NetBSD/pkgsrc-wip cdfd143. Makefile, swayidle Makefile PLIST

swayidle: remove, imported to pkgsrc
DeltaFile
+0-19swayidle/Makefile
+0-6swayidle/PLIST
+0-5swayidle/distinfo
+0-5swayidle/DESCR
+0-1Makefile
+0-365 files

NetBSD/pkgsrc-wip 4904741gtk4-layer-shell Makefile PLIST

gtk4-layer-shell: remove, imported to pkgsrc
DeltaFile
+0-21gtk4-layer-shell/Makefile
+0-14gtk4-layer-shell/PLIST
+0-14gtk4-layer-shell/buildlink3.mk
+0-10gtk4-layer-shell/COMMIT_MSG
+0-8gtk4-layer-shell/DESCR
+0-5gtk4-layer-shell/distinfo
+0-721 files not shown
+0-737 files

NetBSD/pkgsrc-wip 0819a23sfwbar PLIST Makefile, sfwbar/patches patch-modules_network.c patch-config_memory.source

sfwbar: remove, imported to pkgsrc
DeltaFile
+0-203sfwbar/PLIST
+0-44sfwbar/Makefile
+0-39sfwbar/patches/patch-modules_network.c
+0-26sfwbar/patches/patch-config_memory.source
+0-9sfwbar/DESCR
+0-7sfwbar/distinfo
+0-3282 files not shown
+0-3308 files

NetBSD/pkgsrc-wip c6ebb2echrono-date Makefile PLIST, chrono-date/patches patch-CMakeLists.txt patch-date.pc.in

chrono-date: remove, imported to pkgsrc
DeltaFile
+0-36chrono-date/patches/patch-CMakeLists.txt
+0-29chrono-date/Makefile
+0-18chrono-date/patches/patch-date.pc.in
+0-15chrono-date/PLIST
+0-14chrono-date/buildlink3.mk
+0-7chrono-date/distinfo
+0-1193 files not shown
+0-1269 files

NetBSD/pkgsrc-wip f77be42gtk-layer-shell Makefile buildlink3.mk

gtk-layer-shell: remove, imported to pkgsrc
DeltaFile
+0-21gtk-layer-shell/Makefile
+0-14gtk-layer-shell/buildlink3.mk
+0-11gtk-layer-shell/COMMIT_MSG
+0-10gtk-layer-shell/PLIST
+0-9gtk-layer-shell/DESCR
+0-5gtk-layer-shell/distinfo
+0-701 files not shown
+0-717 files

NetBSD/pkgsrc-wip 6aa9c9a. Makefile, swaybg Makefile COMMIT_MSG

swaybg: remove, imported to pkgsrc
DeltaFile
+0-28swaybg/Makefile
+0-6swaybg/COMMIT_MSG
+0-5swaybg/distinfo
+0-4swaybg/DESCR
+0-3swaybg/PLIST
+0-1Makefile
+0-476 files

LLVM/project 03f6faallvm/test/Analysis/CostModel/AArch64 masked_ldst_vls.ll

[NFC][AArch64][TTI] Autogenerate masked_ldst_vls check lines (#192048)

Precommit before changing the cost model.
DeltaFile
+52-29llvm/test/Analysis/CostModel/AArch64/masked_ldst_vls.ll
+52-291 files

LLVM/project 16f7938lldb/source/Target StackFrameList.cpp, lldb/test/API/functionalities/scripted_frame_provider TestScriptedFrameProvider.py

[lldb] Fix synthetic frame identity loss during incremental fetches (#191903)

When `SyntheticStackFrameList::FetchFramesUpTo` is called incrementally,
PC-less synthetic frames can end up with identical `StackID` values.
This happens because `num_synthetic_frames` is reset to zero on each
call, handing out duplicate call frame addresses. Since PC-less frames
all share `LLDB_INVALID_ADDRESS` as their PC, the `StackID` equality
check cannot distinguish them, and `ExecutionContextRef` resolves the
wrong frame.

The fix counts existing synthetic frames in `m_frames` before starting
the fetch loop so new frames receive unique call frame addresses.
DeltaFile
+27-1lldb/test/API/functionalities/scripted_frame_provider/TestScriptedFrameProvider.py
+11-1lldb/source/Target/StackFrameList.cpp
+38-22 files

NetBSD/pkgsrc kptnlFVdoc CHANGES-2026

   Updated sysutils/py-kazoo, textproc/py-pugjs
VersionDeltaFile
1.2317+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc 17Leojftextproc/py-pugjs distinfo Makefile

   py-pugjs: updated to 6.0.2

   6.0.2
   Unknown changes
VersionDeltaFile
1.2+4-4textproc/py-pugjs/distinfo
1.2+2-2textproc/py-pugjs/Makefile
+6-62 files

NetBSD/pkgsrc C76QyI3doc CHANGES-2026

   doc: Added wayland/slurp version 1.5.0
VersionDeltaFile
1.2316+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 6QhYCrowayland Makefile

   Add slurp
VersionDeltaFile
1.13+2-1wayland/Makefile
+2-11 files