[Clang][Sema] Don't delay the access check when computing implicit deletion (#210254)
Sema::isMemberAccessibleForDeletion treats AR_delayed as unreachable,
but CheckAccess returns AR_delayed whenever it runs inside an enclosing
delayed-diagnostics scope. That happens when deletion checking runs
synchronously while parsing a later declaration -- e.g. while explaining
why a defaulted operator<=> is deleted for an expression in that
declaration's initializer. The caller cannot consume a delayed
diagnostic, so letting CheckAccess delay always hits
llvm_unreachable("cannot delay =delete computation") and crashes.
Force an immediate answer by wrapping the CheckAccess call in
DelayedDiagnostics.pushUndelayed()/popUndelayed() via llvm::scope_exit,
mirroring the existing Sema::CheckEnableIf pattern in SemaOverload.cpp.
Fixes https://github.com/llvm/llvm-project/issues/210692
Co-authored-by: Claude-Sonnet
[mlir][vector] Make CompressstoreOp + ExpandloadOp support scalable vectors (#210288)
Extends `vector.compressstore` + `vector.expandload` to support scalable
vectors and updates relevant tests.
An e2e test for `vector.compressstore` is added. For
`vector.expandload`, we need to wait for QEMU support:
https://github.com/llvm/llvm-project/issues/210942.
[IR] Slightly optimize getElementAsInteger() (#211550)
This regressed with the introduction of the byte type, because
getElementPointer() calls getElementByteSize() calls
getPrimitiveSizeInBits(), but the switch used getScalarTypeInBits(),
which means we need to do two separate calls for the element size. Use
getElementByteSize() in both places so these can be CSEd.
[mlir][sparse] Avoid vectorizing non-contiguous COO coordinate loads (#211004)
`SparseVectorization` assumes direct loop accesses (`a[lo:hi]`) are
contiguous and vectorizes them with `vector.maskedload/maskedstore`.
This is false for `sparse_tensor.coordinates` of a level inside a
trailing AoS COO region, whose buffer is interleaved with other levels:
a silent miscompile.
The true stride is already known from the tensor's encoding, even though
the memref type is still dynamic at this point. Use it to fall back to a
scalar loop when the stride is provably non-unit.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
[RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (#210868)
RISCVISelDAGToDAG's lowering of RISCVISD::LPAD_CALL / LPAD_CALL_INDIRECT
to PseudoCALLLpadAlign / PseudoCALLIndirectLpadAlign (introduced in
#177515) only copied the callee, lpad label, chain, and glue operands,
dropping the argument-register and register-mask operands in between.
Without the register-mask operand, the register allocator treats these
calls as clobbering nothing but ra, so values live across the call are
not spilled/reloaded even though the callee is free to clobber
caller-saved registers. This caused a miscompile where a pointer held
live across a call to getcontext() (a returns_twice function) was
corrupted after the call returned, leading to a SIGSEGV in
llvm-test-suite's siod test.
Fix the operand copy to include the argument-register and register-mask
operands, matching the pseudo-instruction operands of a regular
PseudoCALL/PseudoCALLIndirect.
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[clang] Emit diagnostic for typedef+auto missed case in C++98/C23 (#210141)
CheckTypeSpec() converted 'auto' to a storage-class specifier without
checking whether 'typedef' was already set. [dcl.stc]p1 unconditionally
forbids typedef alongside any storage-class specifier regardless of C++
version.
This change add the check for tydef in the code handling auto.
(cherry picked from commit 34436db53d3e4ad36e86019109fb5ceee9bb4d8c)
[Polly][test] Add missing REQUIRES line (#210578)
The test was added by #201859. It's test uses --debug-only which
requires an LLVM_ENABLE_ASSERTIONS-build
(cherry picked from commit 5cae63bd0d31118a15481fc7e5b063a73492d77d)
devel/at-spi2-core: Update to 2.60.5
Changelog:
What's new in at-spi2-core 2.60.5:
* Fix a possible crash in atk_bridge_adaptor_cleanup.
* Attempt to fix event listeners still being wrongly deregistered in some
cases.
[mlir][vector] Update CastAway{Extract|Insert}StridedSliceLeadingOneDim (#210902)
Update both:
* CastAwayExtractStridedSliceLeadingOneDim
* CastAwayInsertStridedSliceLeadingOneDim
to use vector.shape_cast, rather than vector.extract and
vector.broadcast, as the canonical form for stripping unit dimensions.
This change was originally implemented by @krzysz00 in #196206, but was
subsequently reverted in #199546. This PR intentionally restores only a
subset of #196206, making it easier to identify and triage any potential
regressions.
Co-authored-by: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
games/py-renpy: Update to 8.5.3
Changelog:
8.5.3
Dependency Updates
Ren'Py now supports and requires Live2D 5.3. You may need to update Live2D to
continue to use it in Ren'Py 8.5.3 or later.
Ren'Py Stores as Python Packages
Ren'Py now treats Ren'Py stores as Python packages, as was documented but not
implemented. This means imports can work from other stores. For example:
init python in store.substore1:
A = 42
init python in store.substore2:
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[WebAssembly] Port AsmPrinter
Lots of boilerplate, but this is standard and there's probably not much
we can do to improve the situation until we have deleted the LegacyPM.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210448
Simplify cloud_sync SyncRWLock internals
I noticed some changes to this code in a previous PR that has
since been merged and realized we're being inefficient when
it comes to the locking primitives. SyncRWLock kept a separate
threading.Lock and wrapped it in a Condition, but a Condition
can own its lock directly. The extra attribute is gone and
every critical section now enters the Condition itself.
Behavior is identical since the lock is never acquired reentrantly.
Also removes FsLockManager._choose_lock, dead code superseded by
_choose_sync_lock.
No public API changes. The only consumers use the manager's lock()
context managers, which are unchanged.
[SLP]Combine fma and fmuladd into a single vector fma node
fmuladd permits the fused form and fma requires it, so a mixed bundle is
vectorized as one vector fma, with fma as the representative to avoid
weakening the fma lanes; an all-fmuladd bundle still stays fmuladd.
Reviewers: bababuck, RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/211291
