13,341,775 commits found in 8 milliseconds
libclc: Fix signed 0 handling in sincospi (#211260) [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (#211194) LLVM /project 9c52b73 — llvm/lib/Target/WebAssembly WebAssemblyDebugFixup.cpp WebAssembly.h [WebAssembly] Port WebAssemblyDebugFixupPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210439 LLVM /project de0d3e3 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,021 files not shown +310,789 -193,737 4,027 files
[WebAssembly][NFC] Remove unused createWebAssemblyVecReduce
Not implemented or called anywhere. Seems left over accidentally from
b2edc0a3f8a5c711ff894dda9541a46874633511 .
Reviewers: sbc100, dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210438 LLVM /project 594f026 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,021 files not shown +310,785 -193,736 4,027 files
[Support] parallelFor: enable caller participation (#209690)
`parallelFor` dispatches its work to the thread pool and blocks the
calling thread in the `TaskGroup` destructor until the workers finish.
The caller thus stays idle instead of joining the work as modern parallel
libraries do, and `numactl -C 0-7 ld.lld --threads=8` ends up slower than
`numactl -C 0-8 ld.lld --threads=8`.
Run one worker on the calling thread instead. This requires that no
`parallelFor` body reads `getThreadIndex()`, which is unset on the
caller; the last such user is removed by #209687.
In the jobserver mode: only pool workers acquire job slots, so a
jobserver-limited process may briefly exceed its granted concurrency by
one thread. This is acceptable, better than pessimizing the common
non-jobserver case, and parallelFor is unused by jobserver users. LLVM /project d7cec4a — llvm/lib/Target/WebAssembly WebAssemblyRegNumbering.cpp WebAssembly.h [WebAssembly] Port WebAssemblyRegNumberingPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210437 LLVM /project a1f0a03 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,021 files not shown +310,785 -193,736 4,027 files
[WebAssembly] Port WebAssemblyPeepholePass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210436 LLVM /project 99ec0c0 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,021 files not shown +310,785 -193,736 4,027 files
LLVM /project 8bae4dc — llvm/lib/Target/WebAssembly WebAssemblyLowerBrUnless.cpp WebAssembly.h [WebAssembly] Port WebAssemblyLowerBrUnlessPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210257 LLVM /project e309373 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,021 files not shown +310,785 -193,736 4,027 files
LLVM /project 90bed50 — llvm/lib/Target/WebAssembly WebAssemblyExplicitLocals.cpp WebAssembly.h [WebAssembly] Port WebAssemblyExplicitLocalsPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210256 LLVM /project bdddd13 — llvm/include/llvm/DebugInfo/DWARF DWARFTypePrinter.h, llvm/test/tools/llvm-dwarfdump/X86 verify_simplified_template_names.yaml [DebugInfo] Don't assert on missing template parameter names (#211412)
The DWARF verifier reconstructs simplified template names through
DWARFTypePrinter to compare them against the original DW_AT_name. On
malformed input, a template parameter can have no recoverable name,
which tripped assert(RawName) and aborted instead of letting the
verifier report the problem.
Assisted-by: Claude
rdar://182715403 LLVM /project 0880662 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,019 files not shown +310,698 -193,734 4,025 files
LLVM /project e14b11b — llvm/lib/Target/WebAssembly WebAssemblyCFGStackify.cpp WebAssembly.h [WebAssembly] Port WebAssemblyCFGStackifyPass
Standard NewPM pass porting.
Reviewers: dschuff, sbc100, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210255 LLVM /project 69a2038 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,019 files not shown +310,698 -193,734 4,025 files
[WebAssembly] Port WebAssemblyCFGSortPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210247 LLVM /project 499aceb — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir rebase
Created using spr 1.3.7
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,018 files not shown +310,498 -193,657 4,024 files
LLVM /project ea0a8e0 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,018 files not shown +310,498 -193,657 4,024 files
LLVM /project 45b3065 — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86/apx ccmp.ll [X86][CCMP] Fix invalid CCMP emission (#211161)
This patch ports AArch64's negation-aware conjunction algorithm to fix
invalid CCMP emission when OR nested inside an AND.
Example: https://godbolt.org/z/ave7f61hK
Before the change, the above case returns 5 rather the 9 when CCMP
enabled.
Assisted-by: Claude Opus 4.8 LLVM /project c974ee9 — llvm/lib/Target/WebAssembly WebAssemblyExceptionInfo.cpp WebAssemblyExceptionInfo.h [WebAssembly] Port WebAssemblyExceptionAnalysis
Similar to the LegacyPM version, but we need to add a move constructor
to WebAssemblyExceptionInfo and set up some invalidation for the NewPM
given we don't need to invalidate if the CFG doesn't change.
Reviewers: sbc100, aheejin, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210246 [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +2,165 -2,290 clang/docs/UsersManual.md +2,559 -652 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll +1,270 -764 llvm/test/CodeGen/AMDGPU/load-constant-i1.ll +0 -1,992 llvm/test/CodeGen/X86/expand-false-deps.ll +19,062 -13,448 2,145 files not shown +95,006 -48,259 2,151 files
LLVM /project 8a7cedc — llvm/lib/Target/RISCV RISCVTargetMachine.cpp, llvm/test/CodeGen/RISCV O3-pipeline.ll Reapply "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937) (#211452)
This reverts commit acfaabebcfd10d4dbabeb54cf0c60509648fb82f .
The miscompile with LIFETIME_START/END markers should be fixed now
after #211179 LLVM /project 45ea33c — llvm/lib/Target/WebAssembly WebAssemblyExceptionInfo.h WebAssemblyExceptionInfo.cpp [WebAssembly] Refactor WebAssemblyExceptionInfo into Wrapper Pass
This is to match the standard style adopted by generic CodeGen analyses
like MachineBlockFrequencyInfo. This makes WebAssemblyExceptionInfo its
own class that we then get through the wrapper pass.
The primary aim of this patch is to add enough modularity such that we
can also provide this analysis through the NewPM in a follow up patch.
Reviewers: dschuff, sbc100, aheejin
Reviewed By: dschuff, aheejin
Pull Request: https://github.com/llvm/llvm-project/pull/210245 LLVM /project 0f2b9a1 — llvm/lib/Target/WebAssembly WebAssemblyRegColoring.cpp WebAssembly.h [WebAssembly] Port WebAssemblyRegColoringPass
Standard NewPM pass porting.
Reviewers: dschuff, aheejin, sbc100
Pull Request: https://github.com/llvm/llvm-project/pull/210225 [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +2,165 -2,290 clang/docs/UsersManual.md +2,559 -652 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll +1,270 -764 llvm/test/CodeGen/AMDGPU/load-constant-i1.ll +0 -1,992 llvm/test/CodeGen/X86/expand-false-deps.ll +19,062 -13,448 2,145 files not shown +95,006 -48,259 2,151 files
LLVM /project 244d484 — llvm/lib/Target/WebAssembly WebAssemblyRegStackify.cpp WebAssembly.h [WebAssembly] Port WebAssemblyRegStackifyPass
Standard NewPM pass porting.
Reviewers: aheejin, sbc100, dschuff
Pull Request: https://github.com/llvm/llvm-project/pull/210224 LLVM /project bc95a64 — flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,398 -9,218 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir +6,993 -6,921 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir +13,068 -0 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll +5,803 -5,808 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir +0 -7,750 flang/lib/Lower/ConvertExpr.cpp +3,842 -3,722 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir +39,104 -33,419 4,011 files not shown +310,332 -193,624 4,017 files