LLVM/project 0778292 — llvm/docs ReleaseNotes.md, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

[AArch64] Fix SDAG lowering of small ints on the stack (#230142)

This commit fixes a bug in AArch64's SelectionDAG lowering of arguments
and call operands.

Specifically, in the Darwin calling convention, integers smaller than
i32 which were members of aggregates would be incorrectly lowered to
4-byte stack slots. This contrasted with the GlobalISel lowering of this
calling convention, which correctly assigned them to 1- or 2-byte slots.

For aggregate types, we were checking against the original type which,
since it isn't a simple type, was falling back to the i32 rule. The fix
is to instead consider each individual component of an aggregate.

In and of itself, this issue could go unnoticed as it was internally
consistent. We spotted it when a function lowered by GISel called a
function which itself fell back to SDAG lowering, resulting in an ABI
mismatch.

See #218676 which looks related.
DeltaFile
+53-0llvm/test/CodeGen/AArch64/arm64-abi.ll
+2-13llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+6-0llvm/docs/ReleaseNotes.md
+61-133 files

LLVM/project f3ff384 — clang/test/CIR/Transforms/abi-lowering indirect-aliased.cir

update CI failing test
DeltaFile
+1-1clang/test/CIR/Transforms/abi-lowering/indirect-aliased.cir
+1-11 files

LLVM/project 6b694d8 — mlir/lib/Interfaces ControlFlowInterfaces.cpp, mlir/unittests/Interfaces ControlFlowInterfacesTest.cpp

[mlir] Detect hasLoop cycles with a single DFS

Calling isRegionReachable for every region the traversal popped made
hasLoop quadratic in the number of region successor edges. Use one
depth-first search from the entry regions instead. Reaching a region
that is still on the DFS stack is a loop, reaching a finished one is
not. Each region is queried at most once and the search stops at the
first loop.

Both traversals now get a region's successors from
RegionBranchOpInterface::getSuccessorRegions(Region &) instead of
asking each terminator with null operand attributes. The in-tree
terminators that override getSuccessorRegions (scf.condition and
cir.condition) return the same regions as their parent op when no
operand is constant.

Restore the dropped debug output. Rename the multi-branch test and
drive its mock op from attributes. Add tests for a diamond, a loop
through the entry region, a loop in an unreachable region and

    [3 lines not shown]
DeltaFile
+104-52mlir/unittests/Interfaces/ControlFlowInterfacesTest.cpp
+73-42mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+177-942 files

LLVM/project 26c9bbb — lldb/test/API/python_api/sbdata TestSBData.py

[lldb][test] Disable TestSBData.py on Windows on Arm (#234121)

Flaky on the buildbot -
https://github.com/llvm/llvm-project/issues/234117.
DeltaFile
+2-0lldb/test/API/python_api/sbdata/TestSBData.py
+2-01 files

LLVM/project acb162d — mlir/include/mlir/Dialect/LLVMIR LLVMTypes.td, mlir/unittests/Dialect/LLVMIR LLVMTypeTest.cpp

[mlir][LLVM] Verify LLVMStructType element types in get() (#234091)

`using Base::verifyInvariants` pulled in StorageUserBase's variadic
no-op
verifier. `StorageUserBase::get` passes a `unique_function` emitter,
which
binds to that template exactly, so `getLiteral` skipped the element type
check even in assertions builds.

Drop the `using` and add a storage-key overload. Sub-element replacement
needs it because it rebuilds literal structs with `Base::get(ctx, key)`.

Assisted-by: Claude Code (Claude Opus 5.5)
DeltaFile
+10-0mlir/unittests/Dialect/LLVMIR/LLVMTypeTest.cpp
+8-1mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
+18-12 files

LLVM/project 816cbba — clang/include/clang/Basic BuiltinsAMDGPU.td, clang/test/CodeGenHIP builtins-amdgcn-gfx1250-int64.hip

[AMDGPU] Fix builtins using long int for 64-bit operands (#231500)

'long int' is 32-bit on Windows (LLP64) and 64-bit on Linux (LP64), and
HIP device compilation inherits the host integer widths via
AMDGPUTargetInfo::setAuxTarget(). Builtins declared with 'long int' but
mapped to intrinsics taking i64 therefore produce an invalid 'bitcast
i32 to i64' on Windows hosts.
DeltaFile
+47-0clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-int64.hip
+6-6clang/include/clang/Basic/BuiltinsAMDGPU.td
+53-62 files

LLVM/project 40d61d7 — llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU insert_vector_dynelt.ll

Added insert_dyn_test where index and values are divergent.
DeltaFile
+266-0llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
+1-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+267-02 files

FreeBSD/ports 8631e0f — misc/github-copilot-cli Makefile distinfo

misc/github-copilot-cli: update 1.0.98 → 1.0.101
DeltaFile
+5-5misc/github-copilot-cli/distinfo
+1-1misc/github-copilot-cli/Makefile
+6-62 files

FreeBSD/ports b8396b5 — misc/claude-code Makefile distinfo

misc/claude-code: update 2.1.302 → 2.1.306
DeltaFile
+5-5misc/claude-code/distinfo
+1-1misc/claude-code/Makefile
+6-62 files

FreeBSD/ports bcef162 — misc/antigravity-cli Makefile distinfo

misc/antigravity-cli: update 1.4.0 → 1.4.4
DeltaFile
+5-5misc/antigravity-cli/distinfo
+2-2misc/antigravity-cli/Makefile
+7-72 files

LLVM/project fafcd65 — llvm/lib/Target/LoongArch LoongArchLSXInstrInfo.td LoongArchISelLowering.h, llvm/test/CodeGen/LoongArch fptosi-sat.ll

[LoongArch] Lower FP_TO_SINT_SAT to [X]VFTINTRZ/FTINTRZ

The ftintrz.{w,l}.{s,d} and [x]vftintrz.{w.s,l.d} instructions saturate
out-of-range inputs to the minimum/maximum integer and convert NaN to 0
(when the invalid operation exception is not trapped), which matches the
semantics of llvm.fptosi.sat when the saturation width is the native
32/64 bits. This was verified on LA664 for all scalar, LSX and LASX variants
and matches QEMU's LoongArch model. Use them instead of the generic
expansion, which emits three compares and selects per element and fully
scalarizes vectors.

Also override shouldConvertFpToSat so DAGCombiner only folds min/max
clamps and NaN-guarded selects into FP_TO_SINT_SAT when that lowers to
a single ftintrz, avoiding the generic expansion for mismatched vector
element widths and for i64 results without the D extension.

This is what Rust emits for `f32 as i32`. rustc-perf svg-render-1 on
LA664: instructions -6.4%, cycles -4.0%.
DeltaFile
+14-551llvm/test/CodeGen/LoongArch/lasx/fptosi-sat.ll
+12-305llvm/test/CodeGen/LoongArch/lsx/fptosi-sat.ll
+16-167llvm/test/CodeGen/LoongArch/fptosi-sat.ll
+58-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-0llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+2-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+105-1,0231 files not shown
+107-1,0237 files

LLVM/project afee4ad — lldb/test/Shell/SymbolFile/NativePDB stack_unwinding01.cpp

[lldb][test] Disable flaky stack_unwinding01.cpp test on Windows on Arm (#234111)

https://github.com/llvm/llvm-project/issues/234109
DeltaFile
+4-0lldb/test/Shell/SymbolFile/NativePDB/stack_unwinding01.cpp
+4-01 files

FreeBSD/ports 3c99f66 — filesystems/nbd-client-kmod Makefile

filesystems/nbd-client-kmod: enable on powerpc64*
DeltaFile
+1-1filesystems/nbd-client-kmod/Makefile
+1-11 files

FreeBSD/ports e9de22b — sysutils/nvme-cli Makefile

sysutils/nvme-cli: enable on powerpc64*
DeltaFile
+1-1sysutils/nvme-cli/Makefile
+1-11 files

FreeBSD/ports 1c7dc9d — devel/libnvme Makefile

devel/libnvme: enable on powerpc64*
DeltaFile
+1-1devel/libnvme/Makefile
+1-11 files

FreeBSD/ports 7f3d6af — archivers/lrzip Makefile

archivers/lrzip: enable on powerpc64*

Switch the 64-bit-only gate to NOT_FOR_ARCHS.
DeltaFile
+2-2archivers/lrzip/Makefile
+2-21 files

FreeBSD/ports 057fea4 — editors/openoffice-4/files patch-set_soenv.in

editors/openoffice-4: fix build on powerpc64

set_soenv.in only knows the JRE library directories for gcj on powerpc64,
so the sax and bean modules were linked with three empty -L arguments
that swallowed -L/usr/local/lib. Set them for OpenJDK like on amd64.
DeltaFile
+14-0editors/openoffice-4/files/patch-set_soenv.in
+14-01 files

FreeBSD/ports b29b2b4 — databases/clickhouse Makefile, databases/clickhouse/files extra-patch-contrib_llvm-project_libunwind_src_DwarfInstructions.hpp patch-contrib_openssl-cmake_CMakeLists.txt

databases/clickhouse: enable on powerpc64le

The bundled OpenSSL ships POWER8 assembly pre-generated with the
big-endian "linux64v2" perlasm flavour, which gives wrong AES results
on little-endian. Regenerate it with "linux64le" before configuring.

Until rtld annotates the end of the stack on powerpc64, the bundled
libunwind crashes when it collects a backtrace on the main thread.
Drop its fallback to the link register, as the base libunwind does.

Approved by:    bofh (maintainer, via email)
DeltaFile
+28-0databases/clickhouse/files/patch-contrib_openldap-cmake_CMakeLists.txt
+25-0databases/clickhouse/files/patch-contrib_rocksdb_utilities_transactions_lock_range_range__tree_lib_portability_toku__time.h
+15-2databases/clickhouse/Makefile
+14-0databases/clickhouse/files/patch-contrib_openssl-cmake_CMakeLists.txt
+13-0databases/clickhouse/files/extra-patch-contrib_llvm-project_libunwind_src_DwarfInstructions.hpp
+95-25 files

FreeBSD/ports ba8c1ea — databases/clickhouse-devel Makefile, databases/clickhouse-devel/files extra-patch-contrib_llvm-project_libunwind_src_DwarfInstructions.hpp patch-contrib_openssl-cmake_CMakeLists.txt

databases/clickhouse-devel: enable on powerpc64le

The bundled OpenSSL ships POWER8 assembly pre-generated with the
big-endian "linux64v2" perlasm flavour, which gives wrong AES results
on little-endian. Regenerate it with "linux64le" before configuring.

Until rtld annotates the end of the stack on powerpc64, the bundled
libunwind crashes when it collects a backtrace on the main thread.
Drop its fallback to the link register, as the base libunwind does.

Approved by:    bofh (maintainer, via email)
DeltaFile
+28-0databases/clickhouse-devel/files/patch-contrib_openldap-cmake_CMakeLists.txt
+25-0databases/clickhouse-devel/files/patch-contrib_rocksdb_utilities_transactions_lock_range_range__tree_lib_portability_toku__time.h
+15-2databases/clickhouse-devel/Makefile
+14-0databases/clickhouse-devel/files/patch-contrib_openssl-cmake_CMakeLists.txt
+13-0databases/clickhouse-devel/files/extra-patch-contrib_llvm-project_libunwind_src_DwarfInstructions.hpp
+95-25 files

LLVM/project c249c7b — llvm/lib/CodeGen CodeGenPrepare.cpp, llvm/test/CodeGen/X86 isel-sink2.ll

[CodeGenPrepare] Fold disjoint or into addressing modes (#233669)

The addressing-mode matcher only looks through `add`. When the address
is used in another block, the `or` is computed separately instead of
folding into the memory operand:

```
; before
leal    1(,%ecx,4), %ecx
movzbl  (%eax,%ecx), %eax
; after
movzbl  1(%ecx,%eax,4), %eax
```

Treat `or disjoint` like `add`.

InstCombine canonicalizes `add X, C` to `or disjoint X, C` when the
operands have no common set bits

LLM-aided
DeltaFile
+30-0llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
+24-0llvm/test/CodeGen/X86/isel-sink2.ll
+6-3llvm/lib/CodeGen/CodeGenPrepare.cpp
+60-33 files

LLVM/project 18b767f — mlir/lib/Interfaces ControlFlowInterfaces.cpp, mlir/unittests/Interfaces ControlFlowInterfacesTest.cpp

[mlir] Detect hasLoop cycles with a single DFS

Calling isRegionReachable for every region the traversal popped made
hasLoop quadratic in the number of region successor edges. Use one
depth-first search from the entry regions instead. Reaching a region
that is still on the DFS stack is a loop, reaching a finished one is
not. Each region is queried at most once and the search stops at the
first loop.

Both traversals now get a region's successors from
RegionBranchOpInterface::getSuccessorRegions(Region &) instead of
asking each terminator with null operand attributes. The in-tree
terminators that override getSuccessorRegions (scf.condition and
cir.condition) return the same regions as their parent op when no
operand is constant.

Restore the dropped debug output. Rename the multi-branch test and
drive its mock op from attributes. Add tests for a diamond, a loop
through the entry region, a loop in an unreachable region and

    [3 lines not shown]
DeltaFile
+99-53mlir/unittests/Interfaces/ControlFlowInterfacesTest.cpp
+57-41mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+156-942 files

FreeBSD/ports 1e06265 — misc/ollama Makefile distinfo, misc/ollama/files patch-mlx_dynamic.go

misc/ollama: update 0.40.6 → 0.40.7

ChangeLog: https://github.com/ollama/ollama/releases/tag/v0.40.7
DeltaFile
+17-17misc/ollama/distinfo
+8-8misc/ollama/files/patch-mlx_dynamic.go
+2-3misc/ollama/Makefile
+27-283 files

FreeBSD/ports cbc62c2 — www/trunk Makefile distinfo

www/trunk: update 0.21.14 → 0.22.0
DeltaFile
+971-839www/trunk/distinfo
+485-420www/trunk/Makefile
+1,456-1,2592 files

FreeBSD/ports d978bea — devel/py-arro3-core Makefile distinfo

devel/py-arro3-core: update 0.9.0 → 0.9.1
DeltaFile
+3-3devel/py-arro3-core/distinfo
+1-2devel/py-arro3-core/Makefile
+4-52 files

FreeBSD/ports b653b7a — deskutils/skim Makefile distinfo

deskutils/skim: update 5.7.4 → 5.8.0
DeltaFile
+87-87deskutils/skim/distinfo
+43-43deskutils/skim/Makefile
+130-1302 files

FreeBSD/ports c1da613 — misc/gollama Makefile distinfo

misc/gollama: update 2.0.6 → 2.0.7
DeltaFile
+5-5misc/gollama/distinfo
+1-2misc/gollama/Makefile
+6-72 files

FreeBSD/ports a8f5d1b — devel/parol-ls Makefile distinfo

devel/parol-ls: update 4.4.1 → 5.0.3
DeltaFile
+67-65devel/parol-ls/distinfo
+36-34devel/parol-ls/Makefile
+103-992 files

FreeBSD/ports 92a648c — textproc/py-python-bidi Makefile Makefile.crates

textproc/py-python-bidi: update 0.6.11 → 0.6.12
DeltaFile
+19-19textproc/py-python-bidi/distinfo
+8-8textproc/py-python-bidi/Makefile.crates
+1-2textproc/py-python-bidi/Makefile
+28-293 files

FreeBSD/ports a53575c — devel/py-arro3-io Makefile distinfo

devel/py-arro3-io: update 0.9.0 → 0.9.1
DeltaFile
+3-3devel/py-arro3-io/distinfo
+1-2devel/py-arro3-io/Makefile
+4-52 files

FreeBSD/ports 857f683 — devel/nextest Makefile distinfo

devel/nextest: update 0.9.148 → 0.9.149
DeltaFile
+9-9devel/nextest/distinfo
+4-5devel/nextest/Makefile
+13-142 files