NAS-142600 / 27.0.0-BETA.1 / Remove correctable ECC memory errors from `IPMISELAlert` (#19645)
And raise a separate error if there were more than 10 in the last 24
hours.
RuntimeLibcalls: Add LibraryRef for dispatch-with-exclusion (#218869)
Let a SystemRuntimeLibrary dispatch a shared provider library while
dropping the impls the target replaces, since a library reference cannot nest
inside (sub ...). This is a compromise from the ideal of explicitly listing all calls,
but getting to that point is prooving to be difficult.
The opt-out is emitted inside setAvailableLibFuncs_<lib>, so the single library's
logic is self contained.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Cache DeclContext-to-Decl conversions
Store the owning Decl pointer when constructing each DeclContext and route
parent traversal and generic casts through it. This avoids a lazy lookup and
does not imply support for concurrent AST traversal.
CTMark O0 (three alternating matched-build samples, CPU 6): 28.990700 s ->
28.702600 s (-0.9938%). Peak build RSS: 258016 -> 259276 KiB (+0.4883%).
All 632 normalized objects matched in each pair.
MLIR build-time medians (three alternating matched-build samples, CPU 6):
- `mlir/lib/RegisterAllDialects.cpp`: 2.8115% fewer retired instructions,
0.7353% less user CPU, 0.1972% less wall time, and 7144 KiB (+0.5257%)
peak RSS.
- `mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp`: 1.5841% fewer retired
instructions, 1.1120% less user CPU, 0.9893% less wall time, and 912 KiB
(+0.0795%) peak RSS.
All MLIR outputs matched after removing only `.comment`; each concurrency
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[MachinePipeliner] Use VirtRegOrUnit instead of Register appropriately (#177535)
Resolve the FIXMEs in MachinePipeliner added in #167730, primarily by
replacing `Register` with `VirtRegOrUnit` where necessary to remove
invalid `static_cast`s. Based on my local testing, there was no
noticeable performance impact.
---------
Co-authored-by: Harsha Jagasia <harsha.jagasia at amd.com>
[clang][bytecode] Apply pointer casts to opaque pointers (#223607)
For `((char *)&sqlite3Prepare_sParse) + 4`, the final byte offset should
be `4`, not `4 * sizeof(sqlite3Prepare_sParse)`. To handle that, we need
to actually pass the cast along to the opaque pointer.
[Flang] Avoid crash resolving restricted specific intrinsics (#217852)
Name resolution assumed that every specific intrinsic function handled
in a procedure context was unrestricted and had a numeric result. An
undeclared LLT used as a procedure pointer target therefore triggered a
CHECK because LLT is restricted and returns LOGICAL.
Rename the handler to reflect that it resolves both restricted and
unrestricted specific intrinsic functions. Preserve result types only
for unrestricted intrinsics; restricted intrinsics retain an untyped
symbol so later semantic checks can issue the appropriate diagnostic.
Fixes https://github.com/llvm/llvm-project/issues/208825
Co-authored-by: yixiao <yixiao at hygon.cn>
textproc/mandoc: Take maintainership
I am the maintainer of mandoc in base, and have developed a good
relationship with upstream. I intend to switch mandoc in base to
track the stable release when it arrives later this year, and then
track snapshots with this port.
Reviewed by: bapt
Differential Revision: https://reviews.freebsd.org/D59614
[AMDGPU][GlobalISel] Fold neg/abs modifiers when mad-mix selects the low half
selectVOP3PMadMixModsImpl re-runs the fneg/fabs match after rewriting Src
to the 32-bit register the 16-bit value is a half of, but only did so on
the isExtractHiElt path, not for isExtractLoElt.
The two halves are not symmetric. An fneg/fabs of a 32-bit float only
touches bit 31, which is the sign bit of the high half, so folding it
into a modifier on the selected high half is correct. The low half's sign
bit is bit 15, which such an fneg/fabs leaves alone, so only a modifier
that acts on each 16-bit element can be folded there. So the source must be
a 2 x 16-bit vector to fold it.
[AMDGPU][GlobalISel] Strip bitcasts in unmerge half-extraction matching (#223534)
isExtractHiElt/isExtractLoElt run their result through stripBitCast on
every path except the G_UNMERGE_VALUES ones, which returned the unmerge
source register raw. This change makes the handling uniform in all cases
NAS-143790 / 26.0.0 / Log default route failures in route.sync instead of raising (by yocalebo) (#19733)
Guard every add, change and delete of the IPv4 and IPv6 default route so
a single netlink failure is logged and the rest of the sync continues.
The IPv6 add and change paths also catch OSError because the interface
named in the gateway may no longer exist.
Originally pointed out in:
https://github.com/truenas/middleware/pull/19565 but that one is
incomplete.
Original PR: https://github.com/truenas/middleware/pull/19731
---------
Co-authored-by: caleb <yocalebo at gmail.com>
NAS-143790 / 27.0.0-BETA.1 / Log default route failures in route.sync instead of raising (#19731)
Guard every add, change and delete of the IPv4 and IPv6 default route so
a single netlink failure is logged and the rest of the sync continues.
The IPv6 add and change paths also catch OSError because the interface
named in the gateway may no longer exist.
Originally pointed out in:
https://github.com/truenas/middleware/pull/19565 but that one is
incomplete.
The first aux-val to support getexecpath(3) was AUX_execpath at 15,
which inconveniently collides with Linux behaviour so we now export
"vendor" AUX_openbsd_execpath 4001. There's a small window of time
where libc+binaries would depend upon the kernel giving both but
that's over. sysupgrade -s makes this delay pointless. This removes
AUX_execpath.
clang: Emit "exception-model" module flag (#220053)
Record the exception-handling model as an "exception-model" IR module
flag when it differs from the target triple's default, mirroring how
other target ABI properties are recorded.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Model HA as a license feature instead of a license type
This commit adds changes to follow upstream collapsing enterprise_single and enterprise_ha into a single enterprise type, with HA moving into the features dict as its own key. The HA entitlement becomes an ordinary matrix vector keyed on that feature, so LicenseTypeRule has nothing left to decide and goes away with it.
Legacy blobs predate the feature vocabulary, so the shim injects the HA key when the blob names a second controller serial. That is the same condition which used to pick the enterprise_ha type, which is what keeps every fielded legacy pair licensed for failover.
[CIR] Skip call-conv lowering on Windows x86_64 (#223583)
The x86-64 classifier implements SysV. We do not support Windows yet.
Assisted-by: Cursor / claude-opus-5
[X86] Lower bf16 round-to-integer on AVX10.2 via vrndscalebf16 (#213276)
Follow-up to #212245.
floor/ceil/trunc/rint/nearbyint/roundeven on bf16 are currently treated
as illegal causing them to be
promoted and causing scalarization of the vector cases.
AVX10.2 has packed vrndscalebf16, so mark these operations Legal for
v8bf16/v16bf16/v32bf16. The existing patterns already turns them into
X86ISD::VRNDSCALE with the matching immediate, so no new patterns are
needed.
Scalar bf16 reuses the path previously added in #212245.
llvm.round is left out since it is round-half-away-from-zero, which
vrndscale cannot encode.
For the strict version I kept the the old legalization for now since the
avx10.2 Instructions have hardcoded rounding and exception behavior.
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[Flang][OpenMP] Support declare target on interfaces local to procedures (#218877)
Declarative directives implicitly affecting the surrounding procedures
are handled differently for interface procedures in Flang due to the
fact that the corresponding evaluation during lowering is attached to
the parent program unit, rather than the interface.
However, the current implementation to handle this edge case for
`declare_target` is based on the incorrect assumption that this can be
detected by comparing the owning procedure's symbol to the symbol of the
program unit lexically containing the directive. This fails whenever an
interface is located anywhere except for the main program.
Instead, this patch queries the details of the program unit containing
the directive to check directly whether it's an interface. Anything
else, including alternative entries to a procedure, is handled in the
regular way.
X86: Stop overriding getRegClass
Making TargetInstrInfo::getRegClass virtual was an AMDGPU hack that should not
spread to other backends (X86 overrode it in #70958). The override kept GPR
operands out of the *_NOREX2 subclasses for instructions that cannot encode
r16-r31 with EGPR. Express this constraint with RegClassByHwMode instead, which
allows dropping the virtual.
This also enables the machine verifier to enforce the constraint, which was
previously ignored. Also fixes missing assembler tests enforcing the constraint.
There is custom assembler code for this case which may be deletable after this.
I don't really know about all the X86isms here, AI did most of that.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Model HA as a license feature instead of a license type
This commit adds changes to follow upstream collapsing enterprise_single and enterprise_ha into a single enterprise type, with HA moving into the features dict as its own key. The HA entitlement becomes an ordinary matrix vector keyed on that feature, so LicenseTypeRule has nothing left to decide and goes away with it.
Legacy blobs predate the feature vocabulary, so the shim injects the HA key when the blob names a second controller serial. That is the same condition which used to pick the enterprise_ha type, which is what keeps every fielded legacy pair licensed for failover.
[SimplifyCFG] Fix use-after-free in switch-on-select remap when the compared value is a PHI (#223632)
Fixes #223138
`simplifySwitchOnSelectRemap` turns `switch (select (X == C), K, X)`
into `switch X` and retargets case `C` to wherever `K` goes. It dropped
the old edge for `C` with `removePredecessor` before it installed `X` as
the switch condition. When `X` is a PHI in that old destination, which
is what happens when case `C` branches back to the switch's own block,
dropping the edge leaves the PHI with a single input, so it gets folded
and erased. The switch was then made to use the erased PHI. Everything
after that was reading freed memory, which is why the reported assertion
moves around between SimplifyCFG's dominator tree update,
ScalarEvolution's `isSCEVable` check and instcombine depending on the
run.
The fix is to set the switch condition to `X` before touching the CFG.
If the PHI fold happens, its RAUW now rewrites the switch operand along
with the compare and select, and the stale pointer is never used again.
