[AMDGPU][GlobalISel] Form min3/max3 from minimumnum and maximumnum (#225795)
Map these to FMAX3/FMIN3 as SelectionDAG does, not the NaN-propagating
FMAXIMUM3/FMINIMUM3
[AMDGPU] Track GLOBAL_INV/WB/WBINV with xcnt on gfx12.5 (#236045)
Currently, GLOBAL_INV, GLOBAL_WB and GLOBAL_WBINV take the early FLAT
return in getEventsForImpl and never get VMEM_GROUP, so with XNACK an
$exec def after them gets no s_wait_xcnt. This patch adds VMEM_GROUP to
all three when the subtarget has xcnt and XNACK is enabled.
As a result, an s_load followed by one of these ops now counts as an
SMEM-to-VMEM switch, so the s_load address wait is dropped. An earlier
global_load address wait becomes s_wait_xcnt 1 instead of s_wait_xcnt 0.
[libc++] Added FTMs from Hagenberg 2025 and earlier (#233352)
Added:
1. Missing FTMs from Hagenberg Meeting 2025
2. Missing FTMs from Wroclaw Meeting 2024
3. Added all remaining FTMs related to hardening
4. Corrected the status of FTM constexpr queue
References:
- https://wg21.link/version.syn#2
- https://wg21.link/version.syn#3
- https://github.com/orgs/llvm/projects/31/views/11
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
[CIR][AMDGPU] Support packed v2f16 and v2bf16 atomic fadd builtins (#231555)
Allow vectors of floats in cir.atomic.fetch
Bitcast v2bf16 operands from `<2 x i16>` to `<2 x bfloat>` and back,
matching classic codegen
[libc] Use a syscall wrapper for pkey_alloc (#239196)
This PR move pkey_alloc behind the centralized syscall wrappers,
following libc/docs/dev/syscall_wrapper_refactor.md.
[libc] Use a syscall wrapper for pkey_free (#239197)
This PR move pkey_free behind the centralized syscall wrappers,
following libc/docs/dev/syscall_wrapper_refactor.md.
[libc] Use a syscall wrapper for madvise (#239194)
This PR move madvise behind the centralized syscall wrappers, following
libc/docs/dev/syscall_wrapper_refactor.md.
[libc] Use a syscall wrapper for mremap (#239195)
This PR move mremap behind the centralized syscall wrappers, following
libc/docs/dev/syscall_wrapper_refactor.md.
[CodeGen][NewPM] Print MIR module after codegen (#238353)
Globals created during instruction selection were missing from the
output
Buffer the functions and print them after the module, as legacy PM does
[NFC][tests] compare-flags.ll: replace `sed -E` with Python one-liner (#239471)
Addresses CI failure on AIX where `sed -E` is unsupported. Avoids using
two POSIX BREs per flag with plain `sed`.
Assisted-by: IBM Bob
Co-authored-by: Hubert Tong <hstong at ca.ibm.com>
IR: Implement Instruction::mayReadOrWriteMemory with a single switch
Separately calling mayReadFromMemory and mayWriteToMemory performed 2
calls and was slower. This speeds up attributor-light pass up to 2.7%
(callgrind), and 0.2-5.8% faster with other pending Attributor
compile-time changes applied.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[Offload][Omp] Get device image through liboffload (#239252)
Add a new `olGetProgramInfo` API to retrieve information about a
`ol_program` and add properties to get the Device Image after loading.
Move the handling of `ImageIR` directly to libomptarget (only used for
Record Replay).
Use the new API to remove the helper calls and references to the
`DeviceImageTy` from the Plugin interface.
Assisted by Claude.
[mlir][SPIR-V] Derive Aligned memory operand for PhysicalStorageBuffer in vector.load/store coop matrix lowering (#239293)
Mirror calculateMemoryRequirements from MemRefToSPIRV.cpp, since
PhysicalStorageBuffer pointers carry no implicit alignment guarantee
Continuation of https://github.com/llvm/llvm-project/pull/214200
[GlobalISel] Support fixed vectors in constant-fold combines. (#220876)
This patch Extend the GlobalISel constant-folding combines to
element-wise fold **fixed vectors**, in addition to scalars. Previously
these rules only fired when the operands were scalar constants; a
`G_BUILD_VECTOR` of constants was left un-folded.
This covers all five families:
- Integer/pointer binops (`constant_fold_binop`)
- FP binops (`constant_fold_fp_binop`)
- FMA (`constant_fold_fma`)
- Integer casts — `G_ZEXT`/`G_SEXT`/`G_ANYEXT` (`constant_fold_cast_op`)
- FP unary ops — `G_FNEG`, `G_FABS`, `G_FSQRT`, `G_FLOG2`, `G_FPEXT`,
`G_FPTRUNC`, `G_FCEIL`, `G_FFLOOR`, `G_INTRINSIC_TRUNC/ROUND/ROUNDEVEN`,
`G_FRINT`, `G_FNEARBYINT` (`constant_fold_unary_fp_op_rule`)
This is a pre-requisite to support scalar/vector Ops constant foldings
for GISel MIR-pattern rules.
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fallback to PCI reset on x86
Attempt system reset with writes to a memory region used for PCI.
Both Intel and AMD document reset at the 0xcf9 address.
Adapted from FreeBSD by Gert-Jan Vons to fix reset on a
Fujitsu Futro S940.
ok deraadt@
[SPIR-V] Use MapVector for per function maps (#239349)
Iterating a DenseMap keyed by Function pointers made the order of
FPFastMathDefault execution modes and their constants may vary between
runs with SPV_KHR_float_controls2
Don't free the io queue memory when suspending, so it doesn't have to be
reallocated on resume. This removes a potential sleep point in the resume
path. The queue is still recreated on the controller, so its software state
has to be reset instead.
ok dlg@ deraadt@
