HardenedBSD/src dae848eshare/misc committers-ports.dot, sys/dev/acpi_support acpi_panasonic.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+36-0sys/dev/acpi_support/acpi_panasonic.c
+4-0share/misc/committers-ports.dot
+40-02 files

HardenedBSD/src 4b799aashare/misc committers-ports.dot, sys/dev/acpi_support acpi_panasonic.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+36-0sys/dev/acpi_support/acpi_panasonic.c
+4-0share/misc/committers-ports.dot
+40-02 files

FreeNAS/freenas 5467124debian/debian postinst

NAS-139917 / 26.0.0-BETA.1 / Mask ipa-epn.timer in addition to ipa-epn.service (#18281)

DeltaFile
+1-1debian/debian/postinst
+1-11 files

HardenedBSD/src f602d62sys/dev/vt vt_core.c, sys/teken teken.c teken.h

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+80-57tools/test/hwpmc/pmctest.py
+6-0sys/dev/vt/vt_core.c
+4-0sys/teken/teken.c
+2-0sys/teken/teken.h
+92-574 files

HardenedBSD/ports 502315edevel/py-ty distinfo Makefile.crates, java/apache-commons-httpclient/files patch-build.xml

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+69-31devel/py-ty/distinfo
+0-63lang/sbcl/files/patch-src_runtime_ppc-bsd-os.c
+33-14devel/py-ty/Makefile.crates
+23-23sysutils/try-rs/distinfo
+31-3java/apache-commons-httpclient/files/patch-build.xml
+15-15textproc/py-zensical/distinfo
+171-149150 files not shown
+562-528156 files

LLVM/project 334353cllvm/lib/Transforms/Utils Local.cpp, llvm/test/Transforms/InstCombine invalid-alloca-poison-size.ll

[InstCombine] Document transformation that leads to invalid IR.
DeltaFile
+30-0llvm/test/Transforms/InstCombine/invalid-alloca-poison-size.ll
+4-0llvm/lib/Transforms/Utils/Local.cpp
+34-02 files

FreeBSD/src b4305c9usr.bin/less lesspipe.sh

lesspipe: Allow zstd to operate on a symlink

By default zstd refuses to operate on symlinks, so for example
`zless /var/crash/vmcore.last.zst` failed to view the uncompressed core
file.  Add -f to the zstd command line to allow operation on symlinks.

Reviewed by:    delphij
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D55101
DeltaFile
+1-1usr.bin/less/lesspipe.sh
+1-11 files

LLVM/project b8a4bf2llvm/lib/Target/RISCV RISCVInstrInfoXAndes.td

[RISCV] Remove extra ReadSFBALU from SFBNDS_BFO. (#182900)

There are only 4 register operands so there should only be 4 Read.
DeltaFile
+1-2llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
+1-21 files

FreeNAS/freenas 6d3a494src/middlewared/middlewared/plugins/update_ utils.py

Use new update server
DeltaFile
+1-1src/middlewared/middlewared/plugins/update_/utils.py
+1-11 files

LLVM/project 546c526llvm/include/llvm/Support GenericDomTreeConstruction.h, llvm/unittests/Analysis DomTreeUpdaterTest.cpp

domtree
DeltaFile
+220-0llvm/unittests/Analysis/DomTreeUpdaterTest.cpp
+5-2llvm/include/llvm/Support/GenericDomTreeConstruction.h
+225-22 files

LLVM/project ba29460clang/lib/CodeGen CGObjCMac.cpp, clang/test/CodeGenObjC block-layout-section.m

Move the ObjC blocks layout bitmap to the cstring section (#182398)

This is a follow-up to https://github.com/llvm/llvm-project/pull/174705

There's one additional place in the ObjC code gen logic to make sure the
ObjC blocks layout is generated in the regular cstring section.
DeltaFile
+24-0clang/test/CodeGenObjC/block-layout-section.m
+1-1clang/lib/CodeGen/CGObjCMac.cpp
+25-12 files

LLVM/project e6f3033clang/docs CMakeLists.txt index.rst, clang/include/clang/Basic BuiltinsAMDGPUDocs.td BuiltinsAMDGPU.td

[Clang][AMDGPU][Docs] Add builtin documentation for AMDGPU builtins (#181574)

Use the documentation generation infrastructure to document the AMDGPU
builtins.

This PR starts with the ABI / Special Register builtins. Documentation
for the remaining builtin categories will be added incrementally in
follow-up patches.
DeltaFile
+268-0clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
+100-27clang/include/clang/Basic/BuiltinsAMDGPU.td
+1-0clang/docs/CMakeLists.txt
+1-0clang/docs/index.rst
+370-274 files

LLVM/project 77b31b9llvm/test/CodeGen/X86 combine-or.ll

[X86] Add test showing failure to fold or(buildvector(),buildvector()) pattern into a common buildvector() (#182906)

DeltaFile
+40-0llvm/test/CodeGen/X86/combine-or.ll
+40-01 files

LLVM/project 79ea498llvm/lib/Target/AVR AVRISelLowering.cpp, llvm/test/CodeGen/AVR cmp.ll

[AVR] Fix SETUGT during 128b -> 64b lowering (#182690)

Closes https://github.com/llvm/llvm-project/issues/181504.
DeltaFile
+10-8llvm/lib/Target/AVR/AVRISelLowering.cpp
+18-0llvm/test/CodeGen/AVR/cmp.ll
+28-82 files

LLVM/project 9a91c50llvm/include/llvm/CodeGen SelectionDAG.h, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[DAG] isKnownNeverZero - add DemandedElts argument (#182679)

Following changes were made for isKnownNeverZero :
- Added BUILDVECTOR and SPLATVECTOR cases.
- Added support for DemandedElts arguments for SELECT/VSELECT cases.  
- Added tests for constants and SELECT/VSELECT.

Closes #181656
DeltaFile
+84-0llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
+41-4llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+6-0llvm/include/llvm/CodeGen/SelectionDAG.h
+131-43 files

LLVM/project 6705802utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel plugin_config.bzl

[lldb][bazel] Add HighlighterDefault, rename ClangHighlighter targets (#182693)

Rename `PluginClangHighlighter` to `PluginHighlighterClang` for
consistency with the directory-based naming convention, add the new
`PluginHighlighterDefault` library, and register both `HighlighterClang`
and `HighlighterDefault` in `DEFAULT_PLUGINS`.
DeltaFile
+17-6utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+2-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
+19-62 files

LLVM/project 9926ea9llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU setcc-select-hi32mask.ll carryout-selection.ll

[AMDGPU][ISel] Reduce 64-bit `setcc` to upper 32 bits if lower 32 bits are known (#181238)

Truncate 64-bit integral `setcc`s to their upper 32-bit operands if
enough information is known about their lower 32-bit operands, subsuming
the special cases handled in #177662.

Alive2 verification for analogous IR transformations:
[xdATxK](https://alive2.llvm.org/ce/z/xdATxK)
DeltaFile
+900-0llvm/test/CodeGen/AMDGPU/setcc-select-hi32mask.ll
+213-217llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+58-59llvm/test/CodeGen/AMDGPU/wave32.ll
+87-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+32-53llvm/test/CodeGen/AMDGPU/srem.ll
+24-24llvm/test/CodeGen/AMDGPU/extract-subvector.ll
+1,314-3703 files not shown
+1,343-4119 files

LLVM/project 2503ba6clang/unittests/Analysis/Scalable EntityLinkerTest.cpp, lldb/source/Core PluginManager.cpp

Merge branch 'main' into users/shiltian/remove-unused-dump-code-feature
DeltaFile
+634-0clang/unittests/Analysis/Scalable/EntityLinkerTest.cpp
+405-7llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
+403-0llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
+164-124llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
+272-0llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
+154-84lldb/source/Core/PluginManager.cpp
+2,032-215141 files not shown
+5,463-1,090147 files

NetBSD/pkgsrc cm3AxHEtextproc/py-libxml2/files tree_8h.xml parser_8h.xml

   py-libxml2: make doxygen dependency optional and turn it off by default

   Add pregenerated API XML schemas to pkgsrc and add convenience target
   "mkdocxml" to regenerate schemas when updating the package. PR pkg/60027.
VersionDeltaFile
1.1+9,380-0textproc/py-libxml2/files/tree_8h.xml
1.1+8,489-0textproc/py-libxml2/files/parser_8h.xml
1.1+6,677-0textproc/py-libxml2/files/xmlerror_8h.xml
1.1+5,474-0textproc/py-libxml2/files/xpathInternals_8h.xml
1.1+4,604-0textproc/py-libxml2/files/xmlwriter_8h.xml
1.1+4,305-0textproc/py-libxml2/files/xmlreader_8h.xml
+38,929-036 files not shown
+87,557-1042 files

LLVM/project 36445f7llvm/lib/Target/AMDGPU AMDGPUCallLowering.cpp, llvm/test/CodeGen/AMDGPU call-args-inreg.ll cc-inreg-sgpr0-3-mismatch.ll

[AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (#182754)

On the callee side, `LowerFormalArguments` marks SGPR0-3 as allocated in
`CCState` before running the CC analysis. On the caller side,
`LowerCall` (and GlobalISel's `lowerCall`/`lowerTailCall`) added the
scratch resource to `RegsToPass` without marking it in `CCState`. This
caused `CC_AMDGPU_Func` to treat SGPR0-3 as available on the caller
side, assigning user inreg args there, while the callee skipped them
without marking it in `CCState`. This caused `CC_AMDGPU_Func` to treat
SGPR0-3 as available on the caller side, assigning user inreg args
there, while the callee skipped them.
DeltaFile
+405-7llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
+168-39llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
+84-2llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
+41-41llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
+8-8llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
+12-0llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+718-975 files not shown
+730-11311 files

FreeNAS/freenas 82f3098src/middlewared/middlewared/api/v26_0_0 system_advanced.py, src/middlewared/middlewared/plugins/docker update.py

NAS-139932 / 26.0.0-BETA.1 / Move nvidia_present endpoint to system advanced namespace (#18268)

This commit adds changes to move nvidia_present endpoint to system
advanced namespace as the nvidia logic has been moved there from docker
namespace and is no longer only relevant here.
DeltaFile
+22-0src/middlewared/middlewared/plugins/system_advanced/nvidia.py
+3-12src/middlewared/middlewared/plugins/docker/update.py
+10-0src/middlewared/middlewared/api/v26_0_0/system_advanced.py
+35-123 files

LLVM/project eaecf95clang/docs CMakeLists.txt index.rst, clang/include/clang/Basic BuiltinsAMDGPUDocs.td BuiltinsAMDGPU.td

[Clang][AMDGPU][Docs] Add builtin documentation for AMDGPU builtins

Use the documentation generation infrastructure to document the AMDGPU builtins.
This PR starts with the ABI / Special Register builtins. Documentation for the
remaining builtin categories will be added incrementally in follow-up patches.
DeltaFile
+268-0clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
+100-27clang/include/clang/Basic/BuiltinsAMDGPU.td
+1-0clang/docs/CMakeLists.txt
+1-0clang/docs/index.rst
+370-274 files

LLVM/project 606e97dllvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlan.h, llvm/test/Transforms/LoopVectorize vplan-based-stride-mv.ll

[VPlan] Start implementing VPlan-based stride multiversioning

This commit only implements the run-time guard without actually
optimizing the vector loop. That would come in a separate PR to ease
review.
DeltaFile
+249-66llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
+148-70llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
+117-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+43-0llvm/lib/Transforms/Vectorize/VPlan.h
+14-3llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-0llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+578-1394 files not shown
+596-14110 files

LLVM/project de6cadeclang/test/CIR/CodeGenHLSL matrix-element-expr-load.hlsl

[CIR] Fix HLSL test that crashes (#182894)

This was caused by #182609, which just changed the way the AST stores
these, which causes us to hit an NYI in a way that doesn't recover
nicely. In the future, we could probably represent a 'no op' instead of
an empty op in the IR for these cases, but there isn't much use for it,
   since it is always after NYI.

This patch changes the test to use float instead of float1 as suggested
in review, which avoids the problematic conversion.
DeltaFile
+1-1clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
+1-11 files

pfSense/pfsense 50bf405src/etc/inc config.console.inc

Fix the installer network import function with vlans.

Make the proper use of the interface name in comparison.

Fixes the missing settings on wan to block reserved networks on the 1100
and other systems with vlans.

Ticket: #21104
DeltaFile
+3-3src/etc/inc/config.console.inc
+3-31 files

OpenBSD/ports 9kwrR9Flang/janet distinfo Makefile, lang/janet/patches patch-src_include_janet_h patch-Makefile

   Update janet to 1.41.2
VersionDeltaFile
1.7+3-3lang/janet/patches/patch-src_include_janet_h
1.45+2-2lang/janet/patches/patch-Makefile
1.67+2-2lang/janet/distinfo
1.72+1-1lang/janet/Makefile
+8-84 files

LLVM/project 812c6f8mlir/include/mlir/Dialect/OpenACC OpenACCParMapping.h

[mlir][acc] Add parallelism mapping policy interface (#182890)

Add a header that defines the interface for mapping OpenACC parallelism
levels (gang, worker, vector) to target-specific parallel dimension
attributes. Alongside this,
DefaultACCToGPUMappingPolicy is introduced for an initial implementation
of ACC parallelism to GPU mapping.
DeltaFile
+164-0mlir/include/mlir/Dialect/OpenACC/OpenACCParMapping.h
+164-01 files

LLVM/project dd6e7b8llvm/test/Transforms/LoopVectorize hoist-predicated-loads-with-predicated-stores.ll

[LV] Add corner-case tests for licm of predicated memops (#182828)

DeltaFile
+272-0llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
+272-01 files

OpenZFS/src 0f608aaconfig kernel-fst-mount.m4, module/os/linux/zfs zpl_super.c

Linux 7.0: add shims for the fs_context-based mount API

The traditional mount API has been removed, so detect when its not
available and instead use a small adapter to allow our existing mount
functions to keep working.

Sponsored-by: TrueNAS
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Rob Norris <rob.norris at truenas.com>
Closes #18216
DeltaFile
+66-0module/os/linux/zfs/zpl_super.c
+6-1config/kernel-fst-mount.m4
+72-12 files

LLVM/project 1356a51llvm/test/CodeGen/AMDGPU call-args-inreg.ll cc-inreg-sgpr0-3-mismatch.ll, llvm/test/CodeGen/AMDGPU/GlobalISel irtranslator-call.ll

[AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args

On the callee side, `LowerFormalArguments` marks SGPR0-3 as allocated in
`CCState` before running the CC analysis. On the caller side, `LowerCall` (and
GlobalISel's `lowerCall`/`lowerTailCall`) added the scratch resource to
`RegsToPass` without marking it in `CCState`. This caused `CC_AMDGPU_Func` to
treat SGPR0-3 as available on the caller side, assigning user inreg args there,
while the callee skipped them without marking it in `CCState`. This caused
`CC_AMDGPU_Func` to treat SGPR0-3 as available on the caller side, assigning
user inreg args there, while the callee skipped them.
DeltaFile
+405-7llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
+168-39llvm/test/CodeGen/AMDGPU/cc-inreg-sgpr0-3-mismatch.ll
+84-2llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
+41-41llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
+8-8llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.error.ll
+4-8llvm/test/CodeGen/AMDGPU/tail-call-inreg-arguments.ll
+710-1055 files not shown
+730-11311 files