LLVM/project 091972cllvm/lib/Target/SPIRV SPIRVEmitIntrinsics.cpp, llvm/test/CodeGen/SPIRV/pointers sgep-array.ll sgep-vector.ll

[SPIR-V] initial support for @llvm.structured.gep (#178668)

This commit adds initial support to lower the intrinsinc
`@llvm.structured.gep` into proper SPIR-V.
For now, the backend continues to support both GEP formats. We might
want to revisit this at some point for the logical part.
DeltaFile
+141-0llvm/test/CodeGen/SPIRV/pointers/sgep-array.ll
+86-0llvm/test/CodeGen/SPIRV/pointers/sgep-vector.ll
+57-18llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+47-0llvm/test/CodeGen/SPIRV/pointers/sgep-dynamic-index.ll
+39-0llvm/test/CodeGen/SPIRV/pointers/sgep-class.ll
+36-0llvm/test/CodeGen/SPIRV/pointers/sgep-struct.ll
+406-183 files not shown
+479-189 files

FreeBSD/src 97beb0c. CONTRIBUTING.md

CONTRIBUTING.md: Clarify GitHub pull requests

Make the guidelines more prescriptive (while remaining clear that Pull
Requests are merely one, not-preferred method for submitting changes).

Reviewed by:    imp
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D55089
DeltaFile
+85-54CONTRIBUTING.md
+85-541 files

FreeBSD/doc ceeca62website/data/ru/news news.toml

website: update ru/news

(14.4-BETA1 announcement)
DeltaFile
+5-0website/data/ru/news/news.toml
+5-01 files

LLVM/project ab2e10dllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-atomicrmw-fadd.mir fp-atomics-gfx942.ll

[AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (#175257)

G_ATOMICRMW_FADD is supported on flat, global and local address spaces
for S32, S64 and V2S16 values.
DeltaFile
+259-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.mir
+147-31llvm/test/CodeGen/AMDGPU/GlobalISel/fp-atomics-gfx942.ll
+66-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-atomicrmw-fadd.v2f16.mir
+22-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+2-3llvm/test/CodeGen/AMDGPU/GlobalISel/flat-atomic-fadd.f32.ll
+2-3llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
+498-413 files not shown
+501-469 files

OPNSense/core 62806dbsrc/opnsense/mvc/app/controllers/OPNsense/Base ApiMutableModelControllerBase.php, src/opnsense/mvc/app/views/OPNsense/IDS index.volt

bootgrid: batch toggle-selection action by default, cleanup IDS front-end
DeltaFile
+3-104src/opnsense/mvc/app/views/OPNsense/IDS/index.volt
+28-23src/opnsense/mvc/app/controllers/OPNsense/Base/ApiMutableModelControllerBase.php
+21-22src/opnsense/www/js/opnsense_bootgrid.js
+52-1493 files

LLVM/project 84f4b1ellvm/lib/Analysis VectorUtils.cpp, llvm/lib/Transforms/Vectorize VPlanRecipes.cpp

Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#180526)

Enables support for marking overflow intrinsics `uadd`, `sadd`, `usub`,
`ssub`, `umul` and `smul` as trivially vectorizable.

Fixes #174617

---

This patch is a reland of #174835.

Reverts #179819
DeltaFile
+469-1llvm/test/Transforms/LoopVectorize/multiple-result-intrinsics.ll
+73-1llvm/test/Transforms/LoopVectorize/AArch64/multiple-result-intrinsics.ll
+18-15llvm/test/Transforms/LoopVectorize/struct-return.ll
+6-9llvm/lib/Analysis/VectorUtils.cpp
+6-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+572-275 files

FreeBSD/doc 79d8fb3documentation/content/en/articles/gjournal-desktop _index.adoc

update translation of articles/gjournal-desktop to Russian

Reviewed by: marck, ziaee
Approved by: marck
Differential Revision: https://reviews.freebsd.org/D54904
DeltaFile
+633-175documentation/content/en/articles/gjournal-desktop/_index.adoc
+633-1751 files

LLVM/project 94971b7llvm/include/llvm/CodeGen Register.h

[CodeGen][NFC] Update a comment. (#180531)

Since a register can represent a negative frame index, remove
"non-negative" from the comment.
DeltaFile
+1-1llvm/include/llvm/CodeGen/Register.h
+1-11 files

LLVM/project 9069164clang/test/DebugInfo/CXX ctor-homing-local-type.cpp, llvm/lib/IR DIBuilder.cpp

[llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (#180294)

Fix a regression introduced by
https://github.com/llvm/llvm-project/pull/165032, where DIBuilder could
attach local metadata nodes to the wrong subprogram during finalization.

DIBuilder records freshly created local variables, labels, and types in
`DIBuilder::SubprogramTrackedNodes`, and later attaches them to their
parent subprogram's retainedNodes in `finalizeSubprogram()`.

However, a temporary local type created via
`createReplaceableCompositeType()` may later be replaced by a type with
a different scope.
DIBuilder does not currently verify that the scopes of the original and
replacement types match.

As a result, local types can be incorrectly attached to the
retainedNodes of an unrelated subprogram. This issue is observable in
clang with limited debug info mode (see

    [5 lines not shown]
DeltaFile
+47-0llvm/unittests/IR/IRBuilderTest.cpp
+37-0clang/test/DebugInfo/CXX/ctor-homing-local-type.cpp
+17-4llvm/lib/IR/DIBuilder.cpp
+101-43 files

LLVM/project 2e21673flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Semantics/OpenMP allocate_do1.f90 allocate_do.f90

[OpenMP][flang] Enabling support for Allocate clause in DO construct (#180172)

Fixes [#179425](https://github.com/llvm/llvm-project/issues/179425).

Allocate clause is allowed inside DO and parallel DO constructs as per
[13.6.2](https://www.openmp.org/wp-content/uploads/OpenMP-API-Specification-6-0.pdf)
but flang seemed to throw diagnostic against the same. This patch
enables initial support for allocate clause in DO construct.
DeltaFile
+49-0flang/test/Semantics/OpenMP/allocate_do1.f90
+45-0flang/test/Semantics/OpenMP/allocate_do.f90
+1-2flang/lib/Lower/OpenMP/OpenMP.cpp
+2-0llvm/include/llvm/Frontend/OpenMP/OMP.td
+97-24 files

FreeBSD/ports 05efe35x11-fm/xfe distinfo Makefile

x11-fm/xfe: Update to 2.1.4
DeltaFile
+3-3x11-fm/xfe/distinfo
+1-1x11-fm/xfe/Makefile
+4-42 files

OPNSense/core e1f7cf0src/opnsense/mvc/app/controllers/OPNsense/Base ApiControllerBase.php

ApiControllerBase->exportCsv: add $separator as parameter and swtich the default to a semicolon (;), importCsv() already understands both, but semicolon seems to be more commonly used, which helps tools like Excel to open the file instantly as table.
DeltaFile
+4-3src/opnsense/mvc/app/controllers/OPNsense/Base/ApiControllerBase.php
+4-31 files

FreeBSD/ports 0ad13fasecurity/i2pd distinfo Makefile

security/i2pd: update to 2.59.0

Changes:        https://github.com/PurpleI2P/i2pd/releases/tag/2.59.0
DeltaFile
+3-3security/i2pd/distinfo
+1-2security/i2pd/Makefile
+2-0security/i2pd/pkg-plist
+6-53 files

FreeBSD/ports 3f4ae94devel/upnp distinfo pkg-plist

devel/upnp: update to 1.14.29

Changes:        https://github.com/pupnp/pupnp/releases/tag/release-1.14.29
Changes:        https://github.com/pupnp/pupnp/releases/tag/release-1.14.28
Changes:        https://github.com/pupnp/pupnp/releases/tag/release-1.14.27
Changes:        https://github.com/pupnp/pupnp/releases/tag/release-1.14.26
DeltaFile
+3-3devel/upnp/distinfo
+2-2devel/upnp/pkg-plist
+1-1devel/upnp/Makefile
+6-63 files

LLVM/project 12ec215llvm/include/llvm/IR Value.h

[IR] Update docstring for stripAndAccumulateConstantOffset (#180365)

Make it clear that the returned object in the case where a variable
offset is found is the first value to introduce a non-constant offset,
not necessarily the actual underlying object.

Found while investigating #180361.
DeltaFile
+4-3llvm/include/llvm/IR/Value.h
+4-31 files

LLVM/project 7de4eb9utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel] Port fccbdcb.
DeltaFile
+2-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+2-01 files

FreeBSD/ports 3f1cc25www/py-fastapi-sso distinfo Makefile

www/py-fastapi-sso: Update to 0.20.0

Changelog: https://github.com/tomasvotava/fastapi-sso/releases/tag/0.20.0

Reported by:    Repology
DeltaFile
+3-3www/py-fastapi-sso/distinfo
+1-1www/py-fastapi-sso/Makefile
+4-42 files

LLVM/project 3cd0bb7clang/lib/AST/ByteCode Context.cpp, clang/test/AST/ByteCode c.c

[clang][bytecode] Check evaluate{String,Strlen} for pointer type (#180524)

We can only use block pointers here.
DeltaFile
+6-0clang/test/AST/ByteCode/c.c
+6-0clang/lib/AST/ByteCode/Context.cpp
+12-02 files

LLVM/project 77ccd85llvm/lib/Analysis IVDescriptors.cpp, llvm/test/Transforms/LoopVectorize loop-legality-checks-remarks.ll

[IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (#166310)

When `-pass-remarks=loop-vectorize` is specified, the subsequent logic
is executed to display detailed debug messages even if no PreHeader
exists in the loop.

Therefore, an assert occurs when the `getLoopPreHeader()` function is
called. This commit resolves that issue.

Fixed: #165377
DeltaFile
+24-0llvm/test/Transforms/LoopVectorize/loop-legality-checks-remarks.ll
+6-2llvm/lib/Analysis/IVDescriptors.cpp
+30-22 files

OPNSense/core 94ccd3asrc/opnsense/mvc/app/models/OPNsense/Base/Menu MenuSystem.php

Firewall: Rules [new] - hide legacy option after migration (when there's at least a new rule and no legacy rules exist).
DeltaFile
+20-6src/opnsense/mvc/app/models/OPNsense/Base/Menu/MenuSystem.php
+20-61 files

FreeBSD/ports 2ffe838textproc/dyff distinfo Makefile

textproc/dyff: Update to 1.10.4
DeltaFile
+7-7textproc/dyff/distinfo
+1-2textproc/dyff/Makefile
+8-92 files

LLVM/project e0fdc33clang/test/CodeGenOpenCL builtins-amdgcn-asyncmark.cl, llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU] Introduce asyncmark/wait intrinsics

Asynchronous operations are memory transfers (usually between the global memory
and LDS) that are completed independently at an unspecified scope. A thread that
requests one or more asynchronous transfers can use async marks to track their
completion. The thread waits for each mark to be completed, which indicates that
requests initiated in program order before this mark have also completed.

For now, we implement asyncmark/wait operations on pre-GFX12 architectures that
support "LDS DMA" operations. Future work will extend support to GFX12Plus
architectures that support "true" async operations.

Co-authored-by: Ryan Mitchell ryan.mitchell at amd.com

Fixes: SWDEV-521121
DeltaFile
+268-12llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+279-0llvm/test/CodeGen/AMDGPU/asyncmark-max-pregfx12.ll
+194-75llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
+38-16llvm/test/CodeGen/AMDGPU/async-buffer-loads.ll
+19-0llvm/test/CodeGen/AMDGPU/asyncmark-err.ll
+16-0clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark.cl
+814-1037 files not shown
+874-10913 files

LLVM/project 3f6a67cllvm/lib/Target/AMDGPU SIInstrInfo.h

don't move usesLGKM_CNT()
DeltaFile
+4-4llvm/lib/Target/AMDGPU/SIInstrInfo.h
+4-41 files

FreeBSD/src bb0734c. ObsoleteFiles.inc

ObsoleteFiles: remove the shar(1) manpage as well

Fixes:  3fde39073c ("shar: remove from the tree [...]")
DeltaFile
+1-0ObsoleteFiles.inc
+1-01 files

FreeBSD/ports 6fd0f81devel/mimalloc distinfo Makefile

devel/mimalloc: Update to 3.2.8
DeltaFile
+3-3devel/mimalloc/distinfo
+1-1devel/mimalloc/Makefile
+4-42 files

FreeBSD/ports 373df59www/pacparser distinfo Makefile

www/pacparser: Update to 1.5.0
DeltaFile
+3-3www/pacparser/distinfo
+3-1www/pacparser/Makefile
+6-42 files

LLVM/project 1026944libcxx/test/benchmarks/format format_to.bench.cpp format_to_n.bench.cpp

[libc++] Reduce the number of runs on the format_to{,n} and formatted_size benchmarks (#179922)

Testing a bunch of sizes has relatively little value. This reduces the
number of benchmarks so we can run them on a regular basis. This saves
~8 minutes when running the benchmarks.
DeltaFile
+16-16libcxx/test/benchmarks/format/format_to.bench.cpp
+16-16libcxx/test/benchmarks/format/format_to_n.bench.cpp
+2-2libcxx/test/benchmarks/format/formatted_size.bench.cpp
+34-343 files

NetBSD/src C1TSSXEexternal/bsd/tmux/dist alerts.c

   tmux: revert previous, not needed

   reported by kre@
VersionDeltaFile
1.3+3-3external/bsd/tmux/dist/alerts.c
+3-31 files

LLVM/project fbcfbd9lld/ELF Relocations.cpp

[NFC][ELF] Fix overzealous find/replace affecting comments

Commit a94060ca0c87 ("[ELF] Pass Ctx & to Relocations") swapped the
InputSectionBase &c argument for an InputSectionBase *sec member, and so
"c." was replaced with "sec->". However, this must have done in such a
way that "Local-Exec." was transformed to "Local-Exesec->" and
"RISCV::relocateAlloc." to "RISCV::relocateAllosec->", i.e. without the
use of something like clangd, and without appropriate word boundaries in
a regex.
DeltaFile
+5-6lld/ELF/Relocations.cpp
+5-61 files

LLVM/project 65b4099llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU branch-relaxation-inst-size-gfx1250.mir

[AMDGPU] Fix instruction size for 64-bit literal constant operands (#180387)

`getLit64Encoding` uses a different approach to determine whether 64-bit
literal encoding is used, which caused a size mismatch between the
`MachineInstr` and the `MCInst`.

For `!isValid32BitLiteral`, it is effectively `!(isInt<32>(Val) ||
isUInt<32>(Val))`, which is `!isInt<32>(Val) && !isUInt<32>(Val)`, but
in `getLit64Encoding`, it is `!isInt<32>(Val) || !isUInt<32>(Val)`.
DeltaFile
+10-2llvm/test/CodeGen/AMDGPU/branch-relaxation-inst-size-gfx1250.mir
+8-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+18-32 files