LLVM/project ebc076ellvm/test/CodeGen/RISCV clmul.ll clmulr.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll clmul-sdnode.ll

Merge branch 'main' into users/kparzysz/resolve-declare-target
DeltaFile
+38,494-84,026llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+22,388-22,086llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+19,087-24,391llvm/test/CodeGen/RISCV/clmul.ll
+10,473-12,572llvm/test/CodeGen/RISCV/clmulr.ll
+10,281-12,374llvm/test/CodeGen/RISCV/clmulh.ll
+8,361-8,920llvm/test/CodeGen/RISCV/rvv/expandload.ll
+109,084-164,3692,373 files not shown
+376,254-310,8422,379 files

LLVM/project 28e738bcross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging then_step_out.cpp then_finish.cpp

format
DeltaFile
+15-14cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/then_step_out.cpp
+14-13cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/then_finish.cpp
+29-272 files

LLVM/project 4fb2e1ccross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging debug_aggregates.cpp, cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation eval_aggregates.cpp eval_list_aggregates.cpp

format
DeltaFile
+12-10cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_aggregates.cpp
+10-10cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/debugging/debug_aggregates.cpp
+5-4cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/eval_list_aggregates.cpp
+27-243 files

LLVM/project e00f23bllvm/lib/IR Verifier.cpp, llvm/test/Verifier/AMDGPU intrinsic-amdgpu-cs-chain.ll

[AMDGPU] Reject invalid flags immarg for amdgcn.cs.chain (#202708)

The flags operand must be 0 or 1
DeltaFile
+7-0llvm/test/Verifier/AMDGPU/intrinsic-amdgpu-cs-chain.ll
+4-0llvm/lib/IR/Verifier.cpp
+11-02 files

LLVM/project c937cfdcross-project-tests/debuginfo-tests/dexter/dex/test_script Script.py, cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels simple_labels.cpp source_root_dir.cpp

Remove unused fn, format
DeltaFile
+10-9cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/simple_labels.cpp
+10-9cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/source_root_dir.cpp
+8-8cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/offset.cpp
+0-16cross-project-tests/debuginfo-tests/dexter/dex/test_script/Script.py
+5-5cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/Inputs/header.h
+5-4cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/labels/invalid_label.cpp
+38-511 files not shown
+39-517 files

FreeBSD/ports 6dc3d2fdeskutils Makefile, deskutils/gnutrition Makefile pkg-descr

deskutils/gnutrition: Free nutrition tracker software

https://lists.gnu.org/archive/html/info-gnutrition/2026-06/msg00002.html

PR:             295960
Approved by:    osa (mentor)
DeltaFile
+23-0deskutils/gnutrition/Makefile
+12-0deskutils/gnutrition/files/patch-Makefile.in
+4-0deskutils/gnutrition/pkg-descr
+3-0deskutils/gnutrition/distinfo
+1-0deskutils/Makefile
+43-05 files

LLVM/project a6c4200cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts nested_wheres.cpp

clang-format
DeltaFile
+9-11cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/nested_wheres.cpp
+9-111 files

LLVM/project 3ffc2ccflang/lib/Lower OpenACC.cpp, flang/test/Lower/OpenACC acc-unstructured.f90 acc-cache.f90

[OpenACC][flang] Emit NYI when unstructured loops are associated with OpenACC directives

When an unstructured loop is associated with a loop or a combined
directive, we emit an unstructured CFG for the loop's logic nested
within the OpenACC op. This effectively serializes the nested loop on
the device which is not desirable. For now, emit NYI's while working on
a longer-term solution.
DeltaFile
+173-164flang/test/Lower/OpenACC/acc-unstructured.f90
+122-115flang/test/Lower/OpenACC/acc-cache.f90
+33-27flang/test/Lower/OpenACC/acc-loop-exit.f90
+48-0flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
+7-0flang/lib/Lower/OpenACC.cpp
+1-1flang/test/Lower/OpenACC/Todo/acc-goto-multi-level-exit.f90
+384-3076 files

FreeBSD/ports 608dae3graphics/maim Makefile distinfo, graphics/maim/files patch-CMakeLists.txt

graphics/maim: Update to 5.8.2

https://github.com/naelstrof/maim/releases/tag/v5.8.1
https://github.com/naelstrof/maim/releases/tag/v5.8.2

PR:             295878
Approved by:    0mp (maintainer)
Approved by:    osa (mentor)
DeltaFile
+14-23graphics/maim/files/patch-CMakeLists.txt
+2-6graphics/maim/Makefile
+3-3graphics/maim/distinfo
+19-323 files

LLVM/project 7ca6f53llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp VOP3PInstructions.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3

For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add their VOPDName and mark
them with usesCustomInserter which will be used to add pre-RA register
allocation hints to preferably assign dst and src2 to the same physical
register. When the hint is satisfied, canMapVOP3PToVOPD recognises the
instruction as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.

Original patch had a bug where it did not check if physical src
registers match register class of appropriate operand in fullVOPD
instructions, check is now done via isValidVOPDSrc.
DeltaFile
+442-520llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+166-69llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+32-1llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+8-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+662-5951 files not shown
+664-5977 files

LLVM/project 15554ddllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fmax.ll llvm.amdgcn.reduce.fmin.ll

[AMDGPU] Support Wave Reduction intrinsics for half types

Supported Ops: `fmin`, `fmax`, `fadd`, `fsub`.
DeltaFile
+941-264llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+941-264llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+902-160llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+899-160llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+15-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+15-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+3,713-8566 files

OPNSense/core d143598src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api ExportController.php

VPN: OpenVPN: Exporter: Fix that linked user do not show, skip lazy loading the model because we require the commonname volatile field (#10406)
DeltaFile
+1-1src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api/ExportController.php
+1-11 files

LLVM/project fdaf3e8llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp

AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC

Replace isVGPR checks with isValidVOPDSrc that validates physical source
registers against the actual combined VOPD/VOPD3 instruction's operand
register classes. Now we also validate operands for VOPD instructions.
DeltaFile
+40-7llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+40-71 files

LLVM/project 85b1845llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp

AMDGPU: Refactor checkVOPDRegConstraints
DeltaFile
+28-41llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+28-411 files

LLVM/project 6ec2261lld/ELF Relocations.cpp

[ARM][LLD] Fix buildbot failure due to ununsed variable [NFC] (#202925)

The variable was used in an assert, have altered the code to use in an a
non-assert context.
DeltaFile
+1-2lld/ELF/Relocations.cpp
+1-21 files

NetBSD/pkgsrc-wip 412b13dbrush-shell COMMIT_MSG, ipv6calc Makefile COMMIT_MSG

shells/brush-shell-v0.4.0 / net/ipv6calc-4.4.0 / audio/vorbis-tools: Clean-up
DeltaFile
+23-0brush-shell/COMMIT_MSG
+19-0vorbis-tools/patches/patch-configure
+14-0vorbis-tools/patches/patch-ogg123_status.c
+4-10ipv6calc/Makefile
+12-0ipv6calc/COMMIT_MSG
+8-2vorbis-tools/PLIST
+80-123 files not shown
+83-179 files

OPNSense/ports 6f029adopnsense/update distinfo Makefile

opnsense/update: base/kernel for 26.1.10 is unavoidable
DeltaFile
+3-3opnsense/update/distinfo
+2-2opnsense/update/Makefile
+5-52 files

LLVM/project 1006009llvm/lib/Transforms/Vectorize VPlanRecipes.cpp VPlan.h, llvm/test/Transforms/LoopVectorize cast-costs.ll vscale-cost.ll

Revert "[LV] Add initial costs for VPInstructionWithType::computeCost (#198291)" (#202933)

This reverts commit 690b0b0c63125aaf6b517df9d528789bb8c9c08a.

Fixes buildbot failure:
https://lab.llvm.org/buildbot/#/builders/132/builds/6656
DeltaFile
+49-24llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
+0-25llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+6-6llvm/test/Transforms/LoopVectorize/cast-costs.ll
+5-7llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-gather-scatter.ll
+4-1llvm/lib/Transforms/Vectorize/VPlan.h
+2-2llvm/test/Transforms/LoopVectorize/vscale-cost.ll
+66-651 files not shown
+68-677 files

LLVM/project c838b5dlibc/shared math_check_exceptions.h, libc/shared/math/check exp.h

[libc][math] Add shared functions to check exceptions for exp* functions. (#202503)

To be used inside LLVM and other projects.
DeltaFile
+84-0libc/src/__support/math/check/exp_exceptions.h
+62-0libc/test/shared/shared_math_check_exp_test.cpp
+25-0libc/shared/math/check/exp.h
+16-0libc/shared/math_check_exceptions.h
+12-0libc/test/shared/CMakeLists.txt
+199-05 files

FreeBSD/src 9b48646sys/kern kern_fork.c

kern_fork: guard against NULL newproc on the failure path

Reported and tested by: pho
Fixes:  85a65e393092 ("proc: add tree ref count")
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
DeltaFile
+2-1sys/kern/kern_fork.c
+2-11 files

LLVM/project 14a9660llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 pr53842.ll

[X86] combineConcatVectorOps - add 512-bit PCMPEQ/PCMPGT handling (#202928)

If we can freely concatenate both operands, then its worth replacing
with a VPCMP+VPMOVM2 pair

Managed to notice this while triaging #198162 - and the AVX512DQ SGT
test shows another vpmovq2m+vpmovm2q pair codegen issue :(
DeltaFile
+74-47llvm/test/CodeGen/X86/pr53842.ll
+13-1llvm/lib/Target/X86/X86ISelLowering.cpp
+87-482 files

LLVM/project 49affe5clang/include/clang/Basic AttrDocs.td Attr.td

Document the warn_unused attribute (#201881)

Basically, this attribute is useful for getting -Wunused-variable
diagnostics from class types with a nontrivial constructor or
destructor.
DeltaFile
+34-0clang/include/clang/Basic/AttrDocs.td
+1-1clang/include/clang/Basic/Attr.td
+35-12 files

LLVM/project 3e470fcclang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn-vi-f16.hip builtins-amdgcn.hip

[CIR][AMDGPU] Add support for AMDGCN div_fixup builtins (#197468)

Adds codegen for the following AMDGCN division fixup builtins:

- __builtin_amdgcn_div_fixup (double)
- __builtin_amdgcn_div_fixupf (float)
- __builtin_amdgcn_div_fixuph (half)

These are lowered to the corresponding `llvm.amdgcn.div.fixup` intrinsic.
DeltaFile
+65-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
+18-2clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+6-4clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+89-63 files

LLVM/project 7f5b575llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp, llvm/test/CodeGen/AMDGPU waitcnt-debug.mir

[RFC][AMDGPU] Remove DebugCounter-based WaitCnt debugging

It's 8 years old, only used by a handful of tests, and has not been updated
in a while except for maintenance as far as I can see.

I don't mind keeping it in if there are users of it, but right now it
looks like a dead feature. If we want some more elaborate waitcnt debugging,
we should have a modern, generic system that works on any waitcnt, not
something specific to 3 GFX9 counters.
DeltaFile
+1-50llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+0-44llvm/test/CodeGen/AMDGPU/waitcnt-debug.mir
+1-942 files

LLVM/project 64d4596llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp AMDGPUWaitcntUtils.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp AMDGPUBaseInfo.h

[NFC][AMDGPU][InsertWaitCnts] Move some simple functions into Utils

Move really trivial functions into helpers to declutter InsertWaitCnt a bit more.
I had to move HardwareLimits into a different header but it's only used in InsertWaitCnt so it doesn't matter.
DeltaFile
+21-86llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+75-0llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.cpp
+32-0llvm/lib/Target/AMDGPU/AMDGPUWaitcntUtils.h
+0-20llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+0-20llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+128-1265 files

OPNSense/core 62790besrc/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api ExportController.php

VPN: OpenVPN: Exporter: Fix that linked user do not show, skip lazy loading the model because we require the commonname volatile field
DeltaFile
+1-1src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api/ExportController.php
+1-11 files

FreeBSD/ports 2bce971security/openssl34 distinfo Makefile

security/openssl34: Security update to 3.4.6

Security:       259b562f-64ab-11f1-8607-8447094a420f
MFH:            2026Q2
(cherry picked from commit 45f78eeda32d1a8120ad03b4d734d0eafd4a86dc)
DeltaFile
+3-3security/openssl34/distinfo
+1-1security/openssl34/Makefile
+4-42 files

LLVM/project d58808allvm/include/llvm/ADT GenericUniformityImpl.h, llvm/lib/Analysis UniformityAnalysis.cpp

review
DeltaFile
+1-28llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+3-12llvm/include/llvm/ADT/GenericUniformityImpl.h
+10-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+2-2llvm/lib/Analysis/UniformityAnalysis.cpp
+16-434 files

FreeBSD/ports 36b98e9security/openssl36 distinfo Makefile

security/openssl36: Security update to 3.6.3

Security:       259b562f-64ab-11f1-8607-8447094a420f
MFH:            2026Q2
(cherry picked from commit 6543b68ce751a500198cc3ad8a2fd02683648a75)
DeltaFile
+3-3security/openssl36/distinfo
+1-2security/openssl36/Makefile
+4-52 files

FreeBSD/ports 86d70a1security/openssl40 distinfo Makefile

security/openssl40: Security update to 4.0.1

Security:       259b562f-64ab-11f1-8607-8447094a420f
MFH:            2026Q2
(cherry picked from commit 168ef10b8a2bc5535f2b016d38820568d88bd68d)
DeltaFile
+3-3security/openssl40/distinfo
+1-1security/openssl40/Makefile
+4-42 files