FreeBSD/src 1092abatests/sys/kern exterr_test.c

exterror tests: harden the checks

Skip the message-content check on kernels that do not advertise the
exterr_strings feature, and pin the output format by clearing
EXTERROR_VERBOSE.

Reviewed by:            kib
MFC after:              1 week
Assisted-by:            Claude Code (Fable 5)
Differential Revision:  https://reviews.freebsd.org/D58322
DeltaFile
+23-1tests/sys/kern/exterr_test.c
+23-11 files

FreeBSD/src c8db6d4share/man/man9 exterror.9, sys/kern sys_generic.c

exterror: advertise error strings via kern.features.exterr_strings

Allow userland, in particular test cases for EXTERROR conversions,
to detect at run time whether extended errors include the
descriptive message strings, which depends on the EXTERR_STRINGS
kernel option and cannot be probed in any other way.

Reviewed by:            kib
MFC after:              1 week
Assisted-by:            Claude Code (Fable 5)
Differential Revision:  https://reviews.freebsd.org/D58321
DeltaFile
+12-1share/man/man9/exterror.9
+4-0sys/kern/sys_generic.c
+16-12 files

LLVM/project db816fellvm/lib/MC MCDXContainerWriter.cpp, llvm/lib/Target/DirectX DXContainerPDB.cpp DXContainerGlobals.cpp

[DirectX][Driver] Add /Qpdb_in_private flag support (#204903)

In DXC, when `/Qpdb_in_private` flag is specified, debug info PDB is
emitted into PRIV part of the output DXContainer (as well as into
separate PDB file, if its name is specified with `/Fd`).

This patch reimplements similar behavior in llc and Clang.

MC is modified to be able to emit PRIV part.

Depends on https://github.com/llvm/llvm-project/pull/204166.
DeltaFile
+83-0llvm/unittests/MC/DXContainerWriterTest.cpp
+42-4llvm/lib/Target/DirectX/DXContainerPDB.cpp
+20-14llvm/lib/Target/DirectX/DXContainerGlobals.cpp
+33-0llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate.test
+17-5llvm/lib/MC/MCDXContainerWriter.cpp
+18-0llvm/test/CodeGen/DirectX/ContainerData/PdbInPrivate.ll
+213-238 files not shown
+267-2314 files

LLVM/project 009e841flang/include/flang/Optimizer/Transforms Passes.td, flang/lib/Optimizer/Transforms/CUDA CUFAddConstructor.cpp

[flang][cuda] Add option for allocator registration function to CUFAddConstructor (#211098)

This allows to register different allocators when needed.
DeltaFile
+7-3flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
+8-0flang/test/Fir/CUDA/cuda-constructor.f90
+4-0flang/include/flang/Optimizer/Transforms/Passes.td
+19-33 files

FreeBSD/doc 7e4fcb8website/content/ru/status/report-2026-04-2026-06 lkpi-wireless.adoc clusteradm.adoc

website: translate Status report Q2 2026 to russian

Differential Revision: https://reviews.freebsd.org/D58387
DeltaFile
+124-0website/content/ru/status/report-2026-04-2026-06/lkpi-wireless.adoc
+100-0website/content/ru/status/report-2026-04-2026-06/clusteradm.adoc
+91-0website/content/ru/status/report-2026-04-2026-06/freebsd-foundation.adoc
+80-0website/content/ru/status/report-2026-04-2026-06/bananapi-r64-r2-pro-drivers.adoc
+75-0website/content/ru/status/report-2026-04-2026-06/sylve.adoc
+74-0website/content/ru/status/report-2026-04-2026-06/bugmeister.adoc
+544-030 files not shown
+1,586-036 files

LLVM/project ded4902llvm/test/tools/dsymutil/AArch64 pseudo-probe.test, llvm/tools/dsymutil MachOUtils.cpp

Revert "[dsymutil] Add support for pseudo probes (#186877)" (#206789)

This reverts commit bc3386c1b9a5bff82ce4baaf4254fc4268f69ff4.

Let's back this out in favor of emitting pseudoprobe data in favor of
emitting in the `__LLVM` segment, and let `dsymutil` collect the debug
map objects and merge them into the final sections.
DeltaFile
+0-319llvm/test/tools/dsymutil/AArch64/pseudo-probe.test
+7-65llvm/tools/dsymutil/MachOUtils.cpp
+7-3842 files

LLVM/project 8dc94a5clang/test/CIR/CodeGenBuiltins/X86 avx512vlbw-builtins.c

[CIR] Fix avx512vlbw builtin test run lines (#211063)

The avx512vlbw-builtins.c test was using the now-nonexistant avx10.1-512
target feature in several of its run lines. Because the feature no
longer exists with that spelling it was being silently ignored.
Apparently it isn't needed for the test upstream because the test has
been passing, but I received reports from a downstream user that the
test was failing for them.

There was a recent change to more strictly enforce always-inlining if
target features didn't match. I suspect that this downstream project has
a different version of some intrinsic header files so that it requires
"avx10.1" (the correct spelling of the feature).

This change updates the test run lines to use the correct feature
spelling.
DeltaFile
+4-4clang/test/CIR/CodeGenBuiltins/X86/avx512vlbw-builtins.c
+4-41 files

LLVM/project 680989dllvm/lib/Target/PowerPC PPCMIPeephole.cpp, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

PPC: Fold 64-bit zero-extending word load feeding extsw subregister

A gprc LWZ/LWZX feeding EXTSW_32_64 is rewritten into a sign-extending
LWA/LWAX load. Extend the same fold to the 64-bit zero-extending word
loads LWZ8/LWZX8 when the EXTSW_32_64 reads their sub_32 subregister,
producing a single LWA/LWAX instead of a redundant lwz+extsw pair.

Co-authored-by: Claude (Claude Opus 4.8, claude-opus-4-8) <noreply at anthropic.com>
DeltaFile
+17-18llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+11-3llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+28-212 files

LLVM/project 73930c0llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

PPC: Add MIR examples for missed extsw+word-load fold on subregister input

A gprc LWZ/LWZX feeding EXTSW_32_64 folds into a sign-extending LWA/LWAX
load. The equivalent 64-bit zero-extending word loads (LWZ8/LWZX8) whose
sub_32 feeds EXTSW_32_64 are not folded, leaving a redundant lwz+extsw
(or lwzx+extsw) pair. Add MIR examples documenting the missed fold.

Co-authored-by: Claude (Claude Opus 4.8, claude-opus-4-8) <noreply at anthropic.com>
DeltaFile
+152-6llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+152-61 files

LLVM/project 67fd3ecllvm/lib/Target/PowerPC PPCMIPeephole.cpp

Remove NarrowSubReg check
DeltaFile
+1-2llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+1-21 files

LLVM/project add357bllvm/lib/Target/PowerPC PPCMIPeephole.cpp, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

PPC: Fix extsw elimination when the input reads a subregister

The EXTSW_32_64 sign-extend elimination previously assumed its input
was a full register value. It would then try using that value as the
source of the new (unnecessary) INSERT_SUBREG.

The new test would then hit this verifier error:

```
bb.0:
  liveins: $x3
  %0:g8rc = COPY killed $x3
  %1:g8rc = RLDICL killed %0:g8rc, 0, 33
  %3:g8rc = IMPLICIT_DEF
  %2:g8rc = INSERT_SUBREG %3:g8rc(tied-def 0), %1:g8rc, %subreg.sub_32
  $x3 = COPY killed %2:g8rc
  BLR8 implicit $lr8, implicit $rm, implicit killed $x3

*** Bad machine code: INSERT_SUBREG expected inserted value to have equal or lesser size than the subreg it was inserted into ***

    [8 lines not shown]
DeltaFile
+27-12llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+30-0llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+57-122 files

LLVM/project 2a12ed5llvm/lib/Target/PowerPC PPCInstrInfo.cpp

Add assert
DeltaFile
+9-4llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+9-41 files

LLVM/project e7ca336llvm/lib/Target/PowerPC PPCInstrInfo.cpp, llvm/test/CodeGen/PowerPC sext_elimination.mir

PPC: Fix EXTSW elimination promoting a subregister operand

promoteInstr32To64ForElimEXTSW copies operands from the 32-bit
instruction verbatim into its promoted 64-bit form. When an operand
reads the sub_32 subregister of a 64-bit register, the promoted
instruction (which takes a full register) ended up with an illegal
subregister use and failed the machine verifier.

Drop the sub_32 subregister and use the original full register, which
provides the low 32 bits the promoted instruction operates on. This
avoids  verifier error regressions in a future change.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8, claude-opus-4-8)
DeltaFile
+41-1llvm/test/CodeGen/PowerPC/sext_elimination.mir
+7-0llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+48-12 files

LLVM/project 6404386flang/lib/Semantics check-omp-variant.cpp, flang/test/Semantics/OpenMP metadirective-default-none.f90

Diagnose nested FIRSTPRIVATE under DEFAULT(NONE)

A variable listed as FIRSTPRIVATE on a nested TASK is also referenced by the
enclosing construct. If that construct has DEFAULT(NONE), the variable must be
listed in one of its data-sharing clauses.

The metadirective loop checker incorrectly treated nested FIRSTPRIVATE like
PRIVATE and skipped the diagnostic. Exempt only nested PRIVATE variables and
add a regression test.

Assisted with codex.
DeltaFile
+13-0flang/test/Semantics/OpenMP/metadirective-default-none.f90
+3-5flang/lib/Semantics/check-omp-variant.cpp
+16-52 files

LLVM/project f1685cb.github/workflows issue-release-workflow.yml

workflows/issue-release-workflow: Allow multiple URLs in /cherry-pick commands. (#211050)

f0ae26c9 allowed specifying multiple commits to /cherry-pick, but that
only works for plain commit hashes; it doesn't work for the URL form.
Adjust the regex to allow multiple URLs.
DeltaFile
+1-1.github/workflows/issue-release-workflow.yml
+1-11 files

FreeBSD/ports b21f3d6sysutils/msktutil Makefile

sysutils/msktutil: Fix build for FreeBSD >= 15

* Take maintainership
* While here, portfmt

PR:             292735
(cherry picked from commit 756ff0a53c87b6de3bd7303db91756615985e785)
DeltaFile
+12-8sysutils/msktutil/Makefile
+12-81 files

FreeBSD/ports 756ff0asysutils/msktutil Makefile

sysutils/msktutil: Fix build for FreeBSD >= 15

* Take maintainership
* While here, portfmt

PR:             292735
DeltaFile
+12-8sysutils/msktutil/Makefile
+12-81 files

FreeNAS/freenas d103e03src/middlewared/middlewared role.py

NAS-141876 / 26.0.0-BETA.3 / Fix recursive role assignment (by anodos325) (#19359)

This commit fixes a typo for the PRIVILEGE_WRITE role that if granted in
isolation to a group could cause a
recursion error to surface to API consumer.

Original PR: https://github.com/truenas/middleware/pull/19358

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+1-1src/middlewared/middlewared/role.py
+1-11 files

FreeNAS/freenas bcc1eefsrc/middlewared/middlewared role.py

NAS-141876 / 26.0.0-RC.1 / Fix recursive role assignment (by anodos325) (#19360)

This commit fixes a typo for the PRIVILEGE_WRITE role that if granted in
isolation to a group could cause a
recursion error to surface to API consumer.

Original PR: https://github.com/truenas/middleware/pull/19358

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+1-1src/middlewared/middlewared/role.py
+1-11 files

FreeBSD/src ced89d9sys/dev/watchdog watchdog.c

watchdog: Fix a couple type issues

* Force the type of the literal `1` passed to nstosbt() to ensure it's a
  64-bit type (or larger).  Otherwise it gets inconveniently typed to
  int, resulting in truncation.
* Use `flsll()` when converting sbt to power-of-2-nanoseconds to fix
  32-bit compatibility.

PR:             292616
Obtained from:  Hewlett Packard Enterprise
Fixes:  26d6617f3 ("watchdog: Convert to using sbintime_t format")

(cherry picked from commit d08cb1dc17486920c1506f175d77259e0ac3f3a3)
DeltaFile
+2-2sys/dev/watchdog/watchdog.c
+2-21 files

LLVM/project f297c09flang/lib/Semantics check-omp-variant.cpp check-omp-structure.h, flang/test/Semantics/OpenMP metadirective-default-none.f90

[flang][OpenMP] Check DEFAULT(NONE) on metadirective loop variants

Flang does not enforce `DEFAULT(NONE)` for variables referenced in a loop
associated with a standalone METADIRECTIVE. Consequently, it accepts invalid
programs when a potentially selectable loop variant specifies DEFAULT(NONE) but
omits a referenced variable from its data-sharing clauses. This change checks the
associated loop for each potentially selectable `DEFAULT(NONE)` variant and
diagnoses missing data-sharing attributes as it does for ordinary OpenMP loop
constructs.

Standalone metadirectives and their associated loops are separate parse-tree
nodes. For example:

```fortran
!$omp metadirective &
!$omp& when(implementation={vendor(llvm)}: &
!$omp& parallel do default(none) shared(n, a)) default(nothing)
do i = 1, n
  a(i) = x

    [23 lines not shown]
DeltaFile
+224-0flang/test/Semantics/OpenMP/metadirective-default-none.f90
+166-1flang/lib/Semantics/check-omp-variant.cpp
+4-0flang/lib/Semantics/check-omp-structure.h
+394-13 files

FreeBSD/ports cf8e4b1cad/kicad-doc distinfo, cad/kicad-library-footprints pkg-plist distinfo

cad/kicad: update KiCad and friends to 10.0.5

Release Notes soon on https://www.kicad.org/blog/
DeltaFile
+14-2cad/kicad-library-footprints/pkg-plist
+3-3cad/kicad-doc/distinfo
+3-3cad/kicad-library-templates/distinfo
+3-3cad/kicad-library-footprints/distinfo
+3-3cad/kicad-library-symbols/distinfo
+3-3cad/kicad-library-packages3d/distinfo
+29-179 files not shown
+43-2715 files

LLVM/project e8b684allvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 loop-invariant-gather-inst-count.ll rgb_phi.ll

[SLP]Make the instruction-count check loop-aware

Raw getNum{Scalar,Vector}Insts() counted one-time, LICM-hoisted
broadcasts/buildvectors against the loop body, rejecting profitable loop
trees (508.namd_r). Weight each entry by its loop-nest trip
count and drop nest-invariant ones; flat code is unchanged (scale 1).

Fixes #207572

Original Pull Request: https://github.com/llvm/llvm-project/pull/210074

Recommit after revert in bf42992272b66002ffe2a814c916a6b74e477ada

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/211096
DeltaFile
+64-64llvm/test/Transforms/SLPVectorizer/X86/loop-invariant-gather-inst-count.ll
+71-41llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+9-9llvm/test/Transforms/SLPVectorizer/X86/rgb_phi.ll
+8-7llvm/test/Transforms/SLPVectorizer/X86/phi-removed-on-operand-vectorization.ll
+5-5llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
+157-1265 files

FreeBSD/doc b8f9f55website/data/ru/news news.toml

website/ru: Update data/ru/news/news.toml

Update original revision info.
DeltaFile
+1-1website/data/ru/news/news.toml
+1-11 files

LLVM/project 5697319llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXAsmPrinter.cpp, llvm/test/CodeGen/NVPTX jump-table.ll switch-loop-header.mir

[NVPTX] Simplify BRX emission avoiding pseduo-instruction chain (#209952)

This is much more idiomatic and simpler as well and avoids a series of
instructions which would cause syntax errors if somehow something were
scheduled between them.
DeltaFile
+0-38llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+14-14llvm/test/CodeGen/NVPTX/jump-table.ll
+25-0llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+12-13llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-16llvm/test/CodeGen/NVPTX/switch-loop-header.mir
+9-9llvm/test/CodeGen/NVPTX/switch.ll
+62-902 files not shown
+65-918 files

LLVM/project f8d1769flang/lib/Lower/OpenMP OpenMP.cpp DataSharingProcessor.cpp, flang/test/Lower/OpenMP metadirective-loop.f90 metadirective-implementation.f90

[flang][OpenMP] Lower DO and SIMD variants in metadirectives

Lower DO, SIMD, and DO SIMD replacement directives selected by a
metadirective. Support standalone and begin/end forms with static or runtime
selection.

A standalone metadirective and its associated loop are represented as sibling
PFT evaluations. For example:

```fortran
!$omp metadirective &
!$omp& when(user={condition(flag)}: do) &
!$omp& otherwise(nothing)
do i = 1, n
  a(i) = i
end do
```

has the following evaluation shape:

    [54 lines not shown]
DeltaFile
+432-6flang/lib/Lower/OpenMP/OpenMP.cpp
+416-0flang/test/Lower/OpenMP/metadirective-loop.f90
+69-8flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
+74-0flang/test/Lower/OpenMP/Todo/metadirective-loop-unstructured.f90
+59-0flang/test/Lower/OpenMP/Todo/metadirective-loop-enclosing-data-environment.f90
+46-1flang/test/Lower/OpenMP/metadirective-implementation.f90
+1,096-1512 files not shown
+1,278-2818 files

FreeBSD/src d4ddf8esys/dev/virtio/network if_vtnetvar.h

vtnet: Accept VIRTIO_NET_F_CTRL_RX_EXTRA

Although the driver does not issue the extra receive-mode commands
accepting the feature is harmless and some devices, notably Apple's
Virtualization.framework, offer their control-queue features as a
group and refuse FEATURES_OK unless the whole set is acknowledged.

Signed-off-by:  Faraz Vahedi <kfv at kfv.io>
Reviewed by:    adrian
Pull Request:   https://github.com/freebsd/freebsd-src/pull/2322
DeltaFile
+1-0sys/dev/virtio/network/if_vtnetvar.h
+1-01 files

FreeBSD/src c5caf85sys/dev/virtio/network if_vtnet.c if_vtnetvar.h

vtnet: Implement VIRTIO_NET_F_GUEST_ANNOUNCE

When the device sets VIRTIO_NET_S_ANNOUNCE in the config status
field, for example after a VM migrates to a new host, announce
the interface's presence on the network so peers and switches
learn the new attachment point, then acknowledge the request
with the VIRTIO_NET_CTRL_ANNOUNCE_ACK control command, as per
VirtIO v1.3, 5.1.6.5.4.

The announcement raises iflladdr_event: the stack sends gratuitous
ARPs and unsolicited neighbor advertisements for the interface's
addresses, and stacked interfaces such as vlan(4) propagate the
event and announce theirs as well.  The event handlers may sleep,
so the work is deferred from the config change interrupt to a task
on taskqueue_thread; that context also allows the acknowledgement
to be skipped safely if the interface was stopped in the meantime,
in which case the device keeps the bit set and the request is
re-delivered with the next config change interrupt.


    [3 lines not shown]
DeltaFile
+88-0sys/dev/virtio/network/if_vtnet.c
+2-0sys/dev/virtio/network/if_vtnetvar.h
+90-02 files

FreeBSD/src 5481c2dsys/dev/virtio/network if_vtnet.c if_vtnetvar.h

vtnet: Retry feature negotiation without offloads

A device is permitted to reject an otherwise valid subset of its
offered features by refusing to accept FEATURES_OK (VirtIO v1.3,
2.2.2).  Apple's Virtualization.framework does this in practice;
it treats the offered CSUM/TSO offloads as all-or-nothing, while
vtnet's default request contains only part of that group because
of hw.vtnet.lro_disable that would drop the guest TSO bits, thus
negotiation fails and the device does not attach.

If FEATURES_OK is rejected, retry the negotiation once with every
offload-related feature stripped.  Changing the feature set after
a failed FEATURES_OK requires re-initialising from device reset
(VirtIO v1.3, 3.1.1), so the retry goes through virtio_reinit().

A NIC without offloads is preferable to no NIC at all.  Devices
that accept the initial feature set are unaffected, while those
that also reject the reduced set continue to fail attachment as
before.

    [4 lines not shown]
DeltaFile
+14-2sys/dev/virtio/network/if_vtnet.c
+16-0sys/dev/virtio/network/if_vtnetvar.h
+30-22 files

LLVM/project 400d236clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/Sema builtins-elementwise-math.c

Merge branch 'main' into revert-192515-revert-175677-toolchain_stack_flags
DeltaFile
+648-0flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
+94-338llvm/lib/Analysis/BranchProbabilityInfo.cpp
+160-160clang/test/Sema/builtins-elementwise-math.c
+264-0llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
+216-4flang/lib/Lower/OpenMP/OpenMP.cpp
+159-18clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+1,541-520174 files not shown
+3,395-1,281180 files