LLVM/project 754828amlir/lib/Bindings/Python IRTypes.cpp IRCore.cpp

[MLIR][Python] Remove redundant methods (#182459)

At the moment, Pylance reports errors in `ir.pyi`, saying that some
overloaded methods are invalid. After looking into it, I found that some
of these methods have duplicate signatures and are defined more than
once. This PR is mainly to clean up those methods.
DeltaFile
+0-32mlir/lib/Bindings/Python/IRTypes.cpp
+0-21mlir/lib/Bindings/Python/IRCore.cpp
+0-532 files

FreeBSD/src f1b93fcsys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Fix punctuation in 'desired_performance' knob's description

To be consistent with that of the others.

No functional change.

Sponsored by:   The FreeBSD Foundation
DeltaFile
+1-1sys/x86/cpufreq/hwpstate_amd.c
+1-11 files

FreeBSD/src 80d32a6sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): CPPC: Switch the default to maximum performance

Set controls to maximum performance to avoid regressions now that CPPC
is activated by default and to match what the P-state support does.

Relnotes:       yes
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55253
DeltaFile
+10-8sys/x86/cpufreq/hwpstate_amd.c
+10-81 files

FreeBSD/src 953b916sys/kern kern_cpu.c

cpufreq(4): cpufreq_levels_sysctl(): Remove always false NULL test

'sc->levels_buf' is initialized with malloc(M_WAITOK), so can never be
NULL.  Another sysctl handler function (cpufreq_curr_sysctl()) already
relies on that.

MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
DeltaFile
+2-6sys/kern/kern_cpu.c
+2-61 files

FreeBSD/src b69a396sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): CPPC: Allow attaching even if CAPABILITY_1 cannot be read

If that MSR cannot be read, we fallback to defaults specified by the
ACPI specification, as we are already doing when the minimum and maximum
values in there look bogus.

Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55252
DeltaFile
+28-17sys/x86/cpufreq/hwpstate_amd.c
+28-171 files

FreeBSD/src 7f36d7asys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Consistency of cached CPPC_REQUEST value

If writing to the CPPC_REQUEST MSR fails, make sure we do not set the
softc's 'cppc.request' field to the intended new value.  Both
set_cppc_request_cb() and enable_cppc_cb() were changed to this effect.

In case enable_cppc_cb() could not read CPPC_REQUEST, mark that through
a new softc flag, HWPFL_CPPC_REQUEST_NOT_READ, so that we do not keep
and use a wrong value when the content of CPPC_REQUEST is read/written
through sysctl(9) knobs, but instead retry reading the MSR (this is the
purpose of the new get_cppc_request() sub-function).

When setting CPPC_REQUEST has failed, distinguish the case where it
could not be read at all from the case where it could not be written, by
respectively returning EIO and EOPNOTSUPP in these cases.  The previous
return value of EFAULT was confusing as sysctl(3) documents it as
happening if the passed arguments are invalid.

While here, add some herald comment before sysctl_cppc_dump_handler()

    [5 lines not shown]
DeltaFile
+108-31sys/x86/cpufreq/hwpstate_amd.c
+108-311 files

LLVM/project 9a43071llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

Remove assert
DeltaFile
+0-1llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+0-11 files

LLVM/project d0979b7mlir/lib/Dialect/Tosa/IR TosaCanonicalizations.cpp, mlir/test/Dialect/Tosa constant_folding.mlir canonicalize.mlir

[mlir][tosa] Improve broadcasting behaviour in elementwise folders (#181114)

This commit aims to improve elementwise folder behaviour when
broadcasting is involved. In particular, it ensures correctness of
folders when the input operands are dynamic and it is not clear whether
broadcasting is involved.

For example, previously, the tosa.add folder could result in shape
information loss:
```
func.func @test(%arg0: tensor<?x4xi32>) -> tensor<?x4xi32> {
  %one = "tosa.const"() {values = dense<0> : tensor<2x1xi32>} : () -> tensor<2x1xi32>
  %div = tosa.add %one, %arg0 : (tensor<2x1xi32>, tensor<?x4xi32>) -> tensor<?x4xi32>
  return %div : tensor<?x4xi32>
}

$ mlir-opt --canonicalize test.mlir

func.func @test(%arg0: tensor<?x4xi32>) -> tensor<?x4xi32> {

    [15 lines not shown]
DeltaFile
+384-0mlir/test/Dialect/Tosa/constant_folding.mlir
+0-166mlir/test/Dialect/Tosa/canonicalize.mlir
+62-40mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
+446-2063 files

FreeBSD/ports eb33f15www/ungoogled-chromium distinfo, www/ungoogled-chromium/files patch-chrome_browser_about__flags.cc patch-chrome_browser_chrome__content__browser__client.cc

www/ungoogled-chromium: update to 145.0.7632.109

ecurity:        https://vuxml.freebsd.org/freebsd/a977cb1c-0d7d-11f1-85c5-a8a1599412c6.html
(cherry picked from commit 4ca73529e4e1a15fc64791d182b02d5cac456cee)
DeltaFile
+54-54www/ungoogled-chromium/files/patch-chrome_browser_about__flags.cc
+11-11www/ungoogled-chromium/files/patch-chrome_browser_chrome__content__browser__client.cc
+7-7www/ungoogled-chromium/distinfo
+7-7www/ungoogled-chromium/files/patch-components_feature__engagement_public_feature__list.h
+6-6www/ungoogled-chromium/files/patch-chrome_browser_chrome__browser__interface__binders__webui__parts__desktop.cc
+5-5www/ungoogled-chromium/files/patch-chrome_browser_background_glic_glic__status__icon.cc
+90-9016 files not shown
+133-13322 files

FreeBSD/ports 4ca7352www/ungoogled-chromium distinfo, www/ungoogled-chromium/files patch-chrome_browser_about__flags.cc patch-chrome_browser_chrome__content__browser__client.cc

www/ungoogled-chromium: update to 145.0.7632.109

ecurity:        https://vuxml.freebsd.org/freebsd/a977cb1c-0d7d-11f1-85c5-a8a1599412c6.html
DeltaFile
+54-54www/ungoogled-chromium/files/patch-chrome_browser_about__flags.cc
+11-11www/ungoogled-chromium/files/patch-chrome_browser_chrome__content__browser__client.cc
+7-7www/ungoogled-chromium/distinfo
+7-7www/ungoogled-chromium/files/patch-components_feature__engagement_public_feature__list.h
+6-6www/ungoogled-chromium/files/patch-chrome_browser_chrome__browser__interface__binders__webui__parts__desktop.cc
+5-5www/ungoogled-chromium/files/patch-chrome_browser_background_glic_glic__status__icon.cc
+90-9016 files not shown
+133-13322 files

LLVM/project 5d1b4d2llvm/lib/Target/RISCV RISCVInstrInfoZvk.td, llvm/test/MC/RISCV/rvv zvkned.s

[RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (#181887)

These instructions don't have a VM operand. If these instructions use a
V0 destination, the VMConstraint code calls getReg() on the the last
operand which is an immediate. This triggers an assertion. Not sure
what happens on a release build. It probably treats the immediate as a
value in the RISCV register info enum.

(cherry picked from commit 6eae1759f2c08fcd36b3673c6603297ba3f8d7d3)
DeltaFile
+12-0llvm/test/MC/RISCV/rvv/zvkned.s
+6-4llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
+18-42 files

LLVM/project 431a597llvm/lib/Target/ARM/MCTargetDesc ARMELFStreamer.cpp, llvm/test/MC/ARM thumb-state-on-hidden-func.s

[MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (#181156)

When assembling a source file which switches between Arm and Thumb state
using `.arm` and `.thumb`, if you defined a function in Arm state and
mark it as hidden at dynamic link time using `.hidden`, but don't
actually issue the `.hidden` directive until you have switched back to
Thumb state, then the function would be accidentally marked as Thumb as
a side effect of making it hidden.

This happened in `ARMELFStreamer::emitSymbolAttribute`, and the comment
suggests that it was semi-deliberate: it was intended to happen as a
side effect of `.type foo,%function`, because the function label might
have already been defined without a type, and shouldn't be marked as
Thumb until it's known that it's a function. But I think it was an
accident that the same behavior also applies to any other addition of a
symbol attribute, such as `.hidden`: the call to `setIsThumbFunc` was
conditioned on whether the symbol has function type after setting the
attribute, not whether function type was the attribute _actually being
set_. So if you set the symbol to function type and _then_ use

    [12 lines not shown]
DeltaFile
+23-13llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
+33-0llvm/test/MC/ARM/thumb-state-on-hidden-func.s
+56-132 files

LLVM/project e411619llvm/docs/CommandGuide llc.rst, llvm/tools/llc llc.cpp

tools: Restore PluginLoader to llc (#182455)

This half reverts commit 6fdbcf68ba214725444103ff99668d78240562ea.

This is actually tested.
DeltaFile
+6-0llvm/docs/CommandGuide/llc.rst
+1-0llvm/tools/llc/llc.cpp
+7-02 files

OpenBSD/ports RYzvl9Dgraphics/feh Makefile distinfo

   update to feh-3.11.3
VersionDeltaFile
1.119+2-3graphics/feh/Makefile
1.76+2-2graphics/feh/distinfo
+4-52 files

OpenBSD/ports jTuwPjgnet/rdapper distinfo Makefile

   update to rdapper-1.24
VersionDeltaFile
1.13+2-2net/rdapper/distinfo
1.16+1-1net/rdapper/Makefile
+3-32 files

LLVM/project 43cd061clang/test/CIR/IR global-var-linkage.cir, clang/test/CIR/Lowering global-var-linkage.cir

Add test for appending linkage
DeltaFile
+20-0clang/test/CIR/Lowering/global-var-linkage.cir
+2-0clang/test/CIR/IR/global-var-linkage.cir
+22-02 files

LLVM/project bd68129clang/include/clang/CIR/Dialect/IR CIROpsEnums.h CIROps.td, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR] Enable AppendingLinkage in GlobalLinkage enum
DeltaFile
+8-0clang/test/CIR/IR/invalid-linkage.cir
+4-0clang/include/clang/CIR/Dialect/IR/CIROpsEnums.h
+1-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+2-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+15-24 files

LLVM/project ef5a11amlir/lib/Bindings/Python IRCore.cpp

[MLIR][Python] Fix generic class signature of ir.Value (#182447)

In the type stub, `Generic` isn’t explicitly imported. This causes
Pyright/Pylance to report an error and treat `Value` as not being a
generic type. Explicitly using `typing.Generic` fixes this.
DeltaFile
+1-1mlir/lib/Bindings/Python/IRCore.cpp
+1-11 files

LLVM/project c1d25dfllvm/include/llvm/Analysis ValueTracking.h, llvm/lib/Analysis ValueTracking.cpp

[ValueTracking] Fix crash in PR175590 (#180355)

Continuation of PR #175590 
Fixes the crash.
DeltaFile
+265-0llvm/test/Transforms/AggressiveInstCombine/X86/pr175590.ll
+94-0llvm/lib/Analysis/ValueTracking.cpp
+18-0llvm/include/llvm/Analysis/ValueTracking.h
+377-03 files

LLVM/project 4cc8284llvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/Disassembler AArch64Disassembler.cpp

[AArch64][llvm] Tighten SYSP; don't disassemble invalid encodings

Tighten SYSP aliases, so that invalid encodings are disassembled
to `<unknown>`. This is because:

```
  Cn is a 4-bit unsigned immediate, in the range 8 to 9
  Cm is a 4-bit unsigned immediate, in the range 0 to 7
  op1 is a 3-bit unsigned immediate, in the range 0 to 6
  op2 is a 3-bit unsigned immediate, in the range 0 to 7
```

Ensure we check this when disassembling, and also constrain
tablegen for compile-time errors of invalid encodings.

Also adjust the testcases in `armv9-sysp-diagnostics.s` and
`llvm/test/MC/AArch64/armv9a-sysp.s` as they were invalid,
and added a few invalid (outside of range) SYSP-alikes to
test that `<unknown>` is printed
DeltaFile
+111-111llvm/test/MC/AArch64/armv9a-sysp.s
+26-1llvm/lib/Target/AArch64/AArch64InstrFormats.td
+25-0llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+20-0llvm/test/MC/AArch64/armv9-sysp-invalid.s
+7-8llvm/test/MC/AArch64/armv9-sysp-diagnostics.s
+7-3llvm/lib/Target/AArch64/AArch64InstrInfo.td
+196-1233 files not shown
+208-1279 files

NetBSD/pkgsrc reeAjfsdoc CHANGES-2026

   doc: Updated editors/focuswriter to 1.9.0
VersionDeltaFile
1.1280+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc jXiVsFmeditors/focuswriter distinfo Makefile, editors/focuswriter/patches patch-CMakeLists.txt patch-src_text__codec.cpp

   editors/focuswriter: update to 1.9.0

   * FIXED: Did not play sound effects for smart quotes.
   * Added keyboard shortcuts for headings.
   * Clears headings when pressing enter.
   * Replaced shadowed variable names.
   * Switched to KDSingleApplication.
   * Updated link to translations.
   * Translation updates: Swedish.
VersionDeltaFile
1.15+6-6editors/focuswriter/distinfo
1.10+6-6editors/focuswriter/patches/patch-CMakeLists.txt
1.4+3-3editors/focuswriter/patches/patch-src_text__codec.cpp
1.54+2-3editors/focuswriter/Makefile
1.6+1-1editors/focuswriter/PLIST
+18-195 files

NetBSD/pkgsrc EomPBIgdoc CHANGES-2026

   doc: Updated www/cobalt to 0.20.4
VersionDeltaFile
1.1279+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc tclSIS3www/cobalt distinfo Makefile

   www/cobalt: update to 0.20.4

   [0.20.4] - 2026-02-19
   Fixes

       (new) Infer the users intent when --file is meant to override the file name and not be a directory
VersionDeltaFile
1.11+4-4www/cobalt/distinfo
1.12+2-2www/cobalt/Makefile
1.11+0-0www/cobalt/cargo-depends.mk
+6-63 files

OpenBSD/ports QxnWqMgsecurity/scanssh Makefile distinfo, security/scanssh/patches patch-interface_c

   update to scanssh-2.1.4
VersionDeltaFile
1.32+4-6security/scanssh/Makefile
1.10+2-2security/scanssh/distinfo
1.5+0-0security/scanssh/patches/patch-interface_c
+6-83 files

OpenBSD/src 0Xhh5ftusr.bin/tmux grid.c

   Reuse the same extended slot when clearing non-RGB cells as well. From
   Michael K Darling in GitHub issue 4865.
VersionDeltaFile
1.143+14-10usr.bin/tmux/grid.c
+14-101 files

LLVM/project 3f8e39dllvm/lib/Target/Hexagon HexagonISelLoweringHVX.cpp, llvm/test/CodeGen/Hexagon hvx-zext-split-check.ll

[Hexagon] Fix SplitVectors crash in HVX type legalization (#181377)

When LegalizeHvxResize splits a multi-step TL_EXTEND (e.g., v128i32 from
v128i8, which is i8->i32), SplitVectorOp halves both input and output
types. This creates operand types that are half the HVX vector width
(e.g., v64i8 = 512 bits on 128-byte HVX), which are not legal HVX types.
These sub-HVX intermediate types confuse the DAG type legalizer's map
tracking, causing "Unprocessed value in a map! SplitVectors" assertions
with EXPENSIVE_CHECKS or
-enable-legalize-types-checking.

Fix by first expanding multi-step TL_EXTEND/TL_TRUNCATE operations into
a chain of single-step operations via ExpandHvxResizeIntoSteps before
splitting. Each single-step operation (e.g., i16->i32) can be safely
split because halving its operand type produces a legal HVX type (e.g.,
v64i16 = HVX single vector).

(cherry picked from commit 4d3217d68914ddac47d760b215d71441b820720e)
DeltaFile
+224-0llvm/test/CodeGen/Hexagon/hvx-zext-split-check.ll
+9-0llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+233-02 files

LLVM/project 6af865cllvm/docs/CommandGuide llc.rst, llvm/tools/llc llc.cpp

tools: Restore PluginLoader to llc

This half reverts commit 6fdbcf68ba214725444103ff99668d78240562ea.

This is actually tested.
DeltaFile
+6-0llvm/docs/CommandGuide/llc.rst
+1-0llvm/tools/llc/llc.cpp
+7-02 files

LLVM/project 635f37cclang/lib/Headers sifive_vector.h, clang/test/CodeGen/RISCV/sifive-intrinsics/non-policy/non-overloaded xsfvcp-x.c

[RISCV] Correct the LMUL operand for __riscv_sf_vc_i_se_u8mf4 and __riscv_sf_vc_i_se_u8mf2 intrinsics. (#182345)

mf2 is should 7 (-1 in 3 bits). mf4 should be 6 (-2 in 3 bits).

(cherry picked from commit d93ad10a2e9fb07132771cc5c9f356d4439c8950)
DeltaFile
+4-4clang/test/CodeGen/RISCV/sifive-intrinsics/non-policy/non-overloaded/xsfvcp-x.c
+2-2clang/lib/Headers/sifive_vector.h
+6-62 files

LLVM/project 0cb9602llvm/lib/MC MCXCOFFStreamer.cpp, llvm/test/CodeGen/PowerPC aix-debug-aranges.ll

[PowerPC] Only set QualName symbol on first section switch (#179253)

We were setting it every time when switching to the section. This caused
problems when the debug_aranges emission performed a switch at the end
of the section, resulting in symbols incorrectly pointing to the end
instead of the start of the function.

(cherry picked from commit 90c632ab48748808e95d9bb8cd4f3028888dc1b0)
DeltaFile
+28-0llvm/test/CodeGen/PowerPC/aix-debug-aranges.ll
+6-2llvm/lib/MC/MCXCOFFStreamer.cpp
+34-22 files