[CIR] Insert on-demand functions at module scope (#207260)
This showed up building GROMACS with ClangIR at -O3, where compilation
hits an MLIR assertion about an operation already being in a block.
The problem is in vtable thunk emission. When we generate a thunk the
builder's insertion point is inside the thunk's entry block, and from
there we call getAddrOfFunction for the thunk's callee. If that callee
hasn't been created yet, as happens for a virtual-base override first
referenced by a construction-vtable thunk, createCIRFunction builds the
new function right there, parented under the thunk. The final push_back
then tries to move a function that is already in a block.
When there is no CIRGenFunction active, createCIRFunction should just
set the insertion point to module scope before creating the function
instead of creating it at the ambient point and pushing it back
afterward. This is what createGlobalOp already does for globals
materialized this way.
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[RISCV] Turn certain cases of masked.load into vp.load + vp.merge (#217184)
Though RISC-V's loop vectorizer would never generate this, but I found
that other frontends like MLIR might generate "SVE-style" fixed vector
masked.load that looks like this:
```
%b = splat %base
%s = <0, 1, 2, 3, ...>
%a = add nuw %b, %s
%N = splat %n
%m = icmp ult %a, %N
%v = mask.load %p, %m, %passthru
```
By default RISC-V lowers this sequence verbatim and thus emitting masks.
To avoid masks, I think we could use vp.load + vp.merge instead with VL
equals to
```
min(%n - min(%n, %base + %offset), numElements)
```
where %offset is the start value of step vector %s and numElements is
the fixed vector size.
[X86] lowerFPToIntToFP - handle signedness for fp->int and int->fp independently (#217404)
We were assuming that both conversions were for the same integer
signedness
Fixes #217355
Use a fallback interval strategy for the task_for_pid request. (#217425)
We've seen cases on heavily loaded bots where task_for_pid requests get
denied because the authentication system is overloaded. Use an
increasing timeout to avoid piling on when this is happening.
The fallback I chose does:
0: 0.01
1: 0.02
2: 0.04
3: 0.07
4: 0.11
5: 0.16
6: 0.22
7: 0.29
8: 0.37
9: 0.46
which seems reasonable to me. At worst this will wait about a second,
which is still below our test launch timeouts.
X86/GlobalISel: Use mi_match for implicit-def and constant checks (#217444)
Also fix some broken tests using IMPLICIT_DEF without a set register
class. Ideally the verifier would check these. Real compiles should
have used G_IMPLICIT_DEF
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[VPlan] Move requiresScalarEpilogue to VPlan (NFC). (#217447)
Move requiresScalarEpilogue fully to VPlan after no issues uncovered in
the transition period mentioned in
https://github.com/llvm/llvm-project/pull/207784.
Analysis: Move LibcallLoweringInfo from CodeGen to Analysis
Middle end passes need to be able to reason about library call
availability and potentially emit them without depending on codegen.
TargetLibraryInfo already lives in Analysis, and this is a step towards
the eventual merger. For now this is a mostly mechanical move, type erasing
the reference to TargetSubtargetInfo.
The per-subtarget customization (TargetSubtargetInfo::initLibcallLoweringInfo)
is inverted into a caller-supplied function_ref, so the Analysis types carry
no CodeGen/TargetSubtargetInfo reference. The module map is keyed on an opaque
erased pointer. CodeGen continues looking up based on the subtarget.
It is not yet in a state where it is usable from middle end passes; that will come
later. In principle we should be able to write arbitrary rules based on a function's
ABI attributes for which calls can be used.
Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
[mlir][inliner] Avoid re-expanding recursive calls across SCC iterations (#211377)
The MLIR inliner tracks inline history only within one invocation of
`inlineCallsInSCC`. This correctly detects recursion while processing
the current call worklist.
However, `inlineSCC` repeatedly runs optimization and inlining. On every
iteration, the inline history was recreated. A recursive call left from
the previous iteration was therefore treated as a new root call and
expanded again.
For example:
```mlir
func.func @caller(%arg: i32) -> i32 {
%0 = call @a(%arg) : (i32) -> i32
return %0 : i32
}
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GlobalISel: Add m_GAssertZext matcher and use it in AArch64 combiner (#217443)
Generalize the G_SEXT_INREG source+immediate matcher into a shared
template and add m_GAssertZext on top of it. Use it to replace the
getVRegDef + G_ASSERT_ZEXT opcode and immediate checks. NFC.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
CodeGen: Consolidate target-abi validation (#217426)
LoongArch and RISCV both implemented an error if the
"target-abi" module flag was inconsistent with the -target-abi
option flag. Consolidate these into one place, and change
from a fatal error to a nonfatal context error.
One untested incidental behavior change is for garbage names.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
RISCV/GlobalISel: Use mi_match for all-ones check (#217441)
Introduce a new m_AllOnes matcher, like the IR version has
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[AMDGPU][GlobalISel] Fix BITOP3 selecting B16 opcode for 32-bit vector types (#217048)
Key the opcode choice off bit width instead of an exact i32 match, since
`<2 x i16>` is also 32 bits wide
security/zeek: Update to 8.0.10
https://github.com/zeek/zeek/releases/tag/v8.0.10
This release fixes the following vulnerabilities:
- HIGH: SMB: Chains of AndX messages can crash Zeek
- HIGH: DNP3: Memory exhaustion via file control (g70v1) fields
- HIGH: SIP: Memory exhaustion from long request/response paths
- HIGH: DHCP: Memory exhaustion from retained options after analyzer
violation
- HIGH: SMTP: Memory exhaustion from large numbers of rcptto/to/cc/path
entries
- HIGH: SMB: DCE/RPC memory exhaustion from fragment state
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[NewPM] Port MachineCombiner to the new pass manager (#217279)
Adds a newPM pass for MachineCombiner (machine-combiner).
- Refactors base logic into a MachineCombinerImpl class, with a run
method taking analysis pointers (RegisterClassInfo included) rather than
pulling them via getAnalysis, which only the legacy Pass subclass has
access to.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass MachineCombinerPass, using
RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
calls skipFunction, so it always runs unconditionally and should not be
skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Enables MachineCombinerPass in X86CodeGenPassBuilder.
- Updates the existing .mir test to also verify MachineCombinerPass
under the new pass manager.
Assisted-by: Claude Sonnet 5
security/vuxml: Mark security/zeek < 8.0.10 as vulnerable as per:
https://github.com/zeek/zeek/releases/tag/v8.0.10
This release fixes the following vulnerabilities:
- HIGH: SMB: Chains of AndX messages can crash Zeek
- HIGH: DNP3: Memory exhaustion via file control (g70v1) fields
- HIGH: SIP: Memory exhaustion from long request/response paths
- HIGH: DHCP: Memory exhaustion from retained options after analyzer
violation
- HIGH: SMTP: Memory exhaustion from large numbers of rcptto/to/cc/path
entries
- HIGH: SMB: DCE/RPC memory exhaustion from fragment state
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IR: Validate and document the "target-abi" module flag (#217397)
The "target-abi" module flag is already emitted by clang for RISC-V and
consumed by the RISC-V and LoongArch backends, but it was neither
validated by the IR Verifier nor documented in LangRef. Add a Verifier
check that the flag's value operand is a non-empty string.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
update some of the nginx extensions, ok robert
nginx-modules-ngx_http_hmac_secure_link_module-2.0.0
nginx-njs-1.0.0
openresty-headers-more-nginx-module-v0.40
owasp-modsecurity-ModSecurity-nginx-v1.0.4
vision5-ngx_devel_kit-v0.3.4
[ADT] Clean up FoldingSet growth (NFC) (#217424)
This patch cleans up hash table growth in FoldingSetBase:
- Remove GrowHashTable, a private 3-line wrapper around GrowBucketCount,
in favor of calling GrowBucketCount(NumBuckets * 2, Info) directly in
InsertNode.
- Refactor GrowBucketCount to use the RAII copy-and-swap pattern. Rehash
nodes into a temporary FoldingSetBase and move-assign it to *this to
avoid duplicating bucket allocation and deallocation logic.
Assisted-by: Antigravity
Merge tag 'for-linus-fwctl' of git://git.kernel.org/pub/scm/linux/kernel/git/fwctl/fwctl
Pull fwctl updates from Jason Gunthorpe:
- Support more commands in bnxt, this completes what they originally
wanted to do
- Rust bindings for fwctl. The Nova GPU is expected to use them next
cycle
* tag 'for-linus-fwctl' of git://git.kernel.org/pub/scm/linux/kernel/git/fwctl/fwctl:
rust: introduce abstractions for fwctl
fwctl/bnxt: Add DMA buffer support for HWRM commands
bnxt_en: Update bnxt firmware spec
Fix stale-SID recovery test to match stable/26's call_sync-based restart
PR #19223 (call_sync2 migration) wasn't backported here, so
_recover_ad still restarts idmap via middleware.call_sync, not
call_sync2. Update the test to match, instead of pulling in the
unrelated migration.
[mlir][acc] Add pass to convert acc declare ctors and dtors to LLVM (#217415)
Adds the `acc-declare-ctor-dtor-conversion` pass which converts
`acc.global_ctor` and `acc.global_dtor` operations into LLVM functions
and registers them in `llvm.mlir.global_ctors` and
`llvm.mlir.global_dtors`.
The pass exposes a `priority` option to control when the generated
functions run relative to other module initializers.
---------
Co-authored-by: Susan Tan <zujunt at nvidia.com>
Merge tag 'for-linus-iommufd' of git://git.kernel.org/pub/scm/linux/kernel/git/jgg/iommufd
Pull iommufd updates from Jason Gunthorpe:
"One small feature this cycle, the noiommu mode is useful in
single-purpose VMs running something like DPDK. It avoids the double
translation overhead and it seems to be commonly used with some hacks.
Summary:
- Formal API for "no iommu" mode in VFIO. iommufd now works in this
environment and provides page pinning and phyiscal address services
to userspace. This avoids nasty fragile tricks with mprotect and
pgmap
- Fix sykzaller crash racing change_process with map_pages
- Various skyzkaller/AI fixes for the selftests"
* tag 'for-linus-iommufd' of git://git.kernel.org/pub/scm/linux/kernel/git/jgg/iommufd:
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Merge tag 'iommu-updates-v7.3' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux
Pull iommu updates from Joerg Roedel:
"ARM SMMUv2:
- Device-tree binding updates for Qualcomm Eliza, Maili, Shikra and
IPQ9650 SoCs
- Add support for Qualcomm SM8450
- Numerous fixes for lifetime and ordering issues found by Sashiko in
the Qualcomm driver
ARM SMMUv3:
- Fix interrupt type in device-tree binding example for NVIDIA CMDQV
- Numerous fixes for issues identified by Sashiko in the NVIDIA CMDQV
driver
- Work around TLB erratum T264-SMMU-3 on Tegra264 by repeating the
invalidation sequence
- Add support for HAFT (hardware access flag in table entries) when
using SVA
- Probe for 52-bit addressing with a page size smaller than 64k
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AArch64: Use m_GPtrAdd in selectAddrModeRegisterOffset
Replace the getVRegDef + G_PTR_ADD opcode check and operand accesses with an
m_GPtrAdd match binding the base and offset registers. NFC.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
