LLVM/project 390d4bd — llvm/test/CodeGen/ARM fpclamptosat_vec.ll vector-llrint.ll, llvm/test/CodeGen/Thumb2 mve-vecreduce-mlapred.ll mve-clmul.ll

[ARM] Enable SlotIndexes compaction by default

Greedy measures live ranges in slot indexes, and the entries left by
instructions erased before allocation make some ranges look longer than
they are. Opt ARM into dropping those entries, as was done for AMDGPU,
so allocation reflects the code actually being allocated.

The test updates are register assignment and spill placement changes.
DeltaFile
+984-980llvm/test/CodeGen/Thumb2/mve-fptosi-sat-vector.ll
+818-816llvm/test/CodeGen/ARM/vector-lrint.ll
+712-715llvm/test/CodeGen/Thumb2/mve-clmul.ll
+655-655llvm/test/CodeGen/ARM/vector-llrint.ll
+628-629llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+587-591llvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll
+4,384-4,386143 files not shown
+14,010-14,028149 files

LLVM/project 805c651 — llvm/lib/Target/AMDGPU SIFixSGPRCopies.cpp SIFixSGPRCopies.h, llvm/test/CodeGen/AMDGPU fix-sgpr-copies-nophis.mir

Revert "[AMDGPU] Clear NoPHIs after SIFixSGPRCopies under the new pass manager" (#238514)

Reverts llvm/llvm-project#238429 because it was not reviewed and
approved.
DeltaFile
+0-31llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nophis.mir
+0-5llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
+0-1llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+0-373 files

LLVM/project a7d8046 — llvm/test/CodeGen/AMDGPU rem_i128.ll

Apply suggestion from @chinmaydd
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/rem_i128.ll
+2-21 files

LLVM/project e82b27f — llvm/test/CodeGen/AMDGPU vector-reduce-fmaximum.ll llvm.amdgcn.mfma.ll

[AMDGPU][NFC] Clean up pre-gfx125x test RUN lines

Drop flags that match defaults: -verify-machineinstrs in .ll tests,
-global-isel=0 in tests without a GlobalISel run, and redundant
-global-isel-abort. Use subarch triples instead of amdgcn plus -mcpu.
Error-only MC runs use -filetype=null.

Change-Id: Ic8e2469780e32dbe204a032fcf9d91a1e8b737d2
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+11-11llvm/test/CodeGen/AMDGPU/minimumnum.ll
+11-11llvm/test/CodeGen/AMDGPU/maximumnum.ll
+10-10llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
+10-10llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
+10-10llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+10-10llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+62-6280 files not shown
+203-20386 files

FreeNAS/freenas 9dc2cfb — src/middlewared/middlewared/plugins/nfs_ __init__.py release.py, src/middlewared/middlewared/plugins/pool_ export.py

Release NFS locks before unmounting a dataset

nfsd and lockd keep a file open for every NFSv3 lock and every NFSv4
open or delegation, and deleting a share does not release them. Once
the share is gone, an NFSv3 client cannot even release a write lock:
lockd reopens the file through nfsd for the unlock, and the file
handle is now stale. The dataset stays busy, so deleting it, locking
it or exporting its pool fails with EBUSY. Seen on a customer system
long after the shares were deleted.

Before unmounting, write each filesystem of the dataset to
/proc/fs/nfsd/unlock_filesystem, reaching it through fsmount() so a
lazily unmounted one is covered too, and snapshots automounted under
.zfs/snapshot the same way. A filesystem that a share still exports
is left alone, and so is the whole tree while NFSv4 clients hold
byte-range locks on it: nfsd releases those by revoking them, and its
laundromat can look at a revoked lock's inode after the filesystem is
gone. Should a lock be granted and revoked during the release anyway,
the operation stops with EBUSY and the filesystem stays mounted.

    [3 lines not shown]
DeltaFile
+331-0src/middlewared/middlewared/plugins/nfs_/release.py
+79-0src/middlewared/middlewared/pytest/unit/plugins/test_nfs_release.py
+29-1src/middlewared/middlewared/plugins/nfs_/__init__.py
+5-0src/middlewared/middlewared/plugins/zfs/encryption_lock.py
+4-0src/middlewared/middlewared/plugins/pool_/export.py
+3-0src/middlewared/middlewared/plugins/zfs/resource_destroy.py
+451-16 files

LLVM/project 5883ca2 — clang/lib/CIR/Dialect/Transforms CIRSimplify.cpp, clang/test/CIR/Transforms simplify-erased-load.cir

[CIR] Fuse CIRSimplify collection walks into one (#238505)

`runOnOperation` walked the module twice: once for
ternary/select/switch/ vecsplat ops, once for loads
(SimplifyConstantLoad). Collect both op lists in a single walk. The
first-phase patterns create no LoadOps (Select/Not/Constant only), so
every load phase 2 could see is collected up front.

A listener prunes loads phase 1 erases via fold plus dead-op cleanup,
which the old second walk never saw either. Application order (loads
last, for dominance) is unchanged.

-11% time spent in CIRSimplify pass for some workloads.
DeltaFile
+29-10clang/lib/CIR/Dialect/Transforms/CIRSimplify.cpp
+21-0clang/test/CIR/Transforms/simplify-erased-load.cir
+50-102 files

LLVM/project 6e73228 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

format
DeltaFile
+3-3llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+3-31 files

LLVM/project adcea94 — llvm/test/CodeGen/AMDGPU promote-constOffset-to-imm.mir promote-constOffset-to-imm.ll

[AMDGPU] Pre-commit tests for FLAT_SCRATCH const offset promotion (NFC) (#225397)

Prerequisite for https://github.com/llvm/llvm-project/pull/212507
DeltaFile
+1,140-10llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
+26-2llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
+1,166-122 files

LLVM/project 11cbbb9 — clang/lib/Format FormatToken.h, clang/unittests/Format FormatTest.cpp

[clang-format] Prevent line comment continuation across formatting-disabled boundary (#233414)

Fixes #222510

### Cause
- `OneLineFormatOffRegex` matching the trailing comment on a nested
`#else` directive allows the following enabled line comment to be
treated as continuation of that formatting-disabled comment
- With tabs and the original nested preprocessor reproducer, repeated
formatting oscillates between two tabs and one tab

### Approach
- In `clang/lib/Format/FormatToken.h`, make `continuesLineComment`
return false when `FormatTok.Finalized != Previous->Finalized` after the
existing null checks
- Prevent comment grouping across formatting-enabled and
formatting-disabled boundaries without changing same-state behavior
DeltaFile
+19-0clang/unittests/Format/FormatTest.cpp
+3-0clang/lib/Format/FormatToken.h
+22-02 files

LLVM/project 5462bd2 — llvm/lib/Target/AMDGPU SIFixSGPRCopies.cpp SIFixSGPRCopies.h, llvm/test/CodeGen/AMDGPU fix-sgpr-copies-nophis.mir

Revert "[AMDGPU] Clear NoPHIs after SIFixSGPRCopies under the new pass manage…"

This reverts commit 73fd9cd9a94de9f524125481bc24883c1f9390a0.
DeltaFile
+0-31llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nophis.mir
+0-5llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
+0-1llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+0-373 files

LLVM/project 2a55f12 — utils/bazel/llvm-project-overlay/libc BUILD.bazel

[Bazel] Fixes 5db9b2b (#238502)

This fixes 5db9b2b62eb459b73b2737788f33ffdfaab17ed2 (#238179).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5db9b2b62eb459b73b2737788f33ffdfaab17ed2

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

LLVM/project 12f4d06 — llvm/lib/Target/AMDGPU SIInstrInfo.h AMDGPUAsmPrinter.cpp, llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250.mir inline-mem-constraints.ll

Revert "[AMDGPU] Reapply "Support the RF and m inline asm constraints (#195123)"" (#238512)

Reverts llvm/llvm-project#232540
DeltaFile
+0-334llvm/test/CodeGen/AMDGPU/inline-mem-constraints.ll
+0-27llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+0-12llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+0-10llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+1-8llvm/lib/Target/AMDGPU/SIInstrInfo.h
+4-4llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
+5-3959 files not shown
+10-42015 files

LLVM/project 3645e7d — clang/lib/Format FormatToken.h Format.cpp, clang/unittests/Format BracesInserterTest.cpp

[clang-format] Fix duplicate brace insertion across preprocessor runs (#235083)

Keep the opening-brace marker after emitting it so that later
preprocessor runs don't insert the braces again.

This addresses a regression from #233758.

Fixes #235036
DeltaFile
+43-0clang/unittests/Format/BracesInserterTest.cpp
+6-1clang/lib/Format/Format.cpp
+4-0clang/lib/Format/FormatToken.h
+53-13 files

LLVM/project 0ab67a4 — llvm/lib/Target/BPF BPFISelLowering.cpp

BPF: Replace diagnosed atomics instead of no-op lowering them

After emitting the unsupported atomic diagnostic, replace the node
with undef results rather than letting it promote and reach
LowerOperation, which then needed a no-op case.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+2-8llvm/lib/Target/BPF/BPFISelLowering.cpp
+2-81 files

OpenBSD/ports A7fQO2y — sysutils/salt/3007 Makefile distinfo, sysutils/salt/3007/patches patch-salt___init___py patch-salt_client_ssh_shell_py

   update to 3007.17
VersionDeltaFile
1.1+21-0sysutils/salt/3007/patches/patch-tools_pkg_salt_build_backend_py
1.2+6-6sysutils/salt/3007/patches/patch-salt_client_ssh_shell_py
1.2+9-0sysutils/salt/3007/pkg/PLIST
1.2+1-3sysutils/salt/3007/Makefile
1.2+2-2sysutils/salt/3007/patches/patch-salt___init___py
1.2+2-2sysutils/salt/3007/distinfo
+41-133 files not shown
+43-159 files

LLVM/project 7d6ae6d — llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.h AArch64ISelLowering.cpp

SelectionDAG: Remove no-op custom atomic lowering in PowerPC and AArch64

Keying atomic actions on the memory type made the sub-word Custom
actions also trigger custom type legalization, which had to be a no-op.

PowerPC only zero-extended the sub-word cmpxchg compare operand, which
getExtendForAtomicCmpSwapArg already handles during promotion. AArch64
converted ATOMIC_LOAD_AND to ATOMIC_LOAD_CLR; make that a generic
expansion when ATOMIC_LOAD_CLR is available.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+0-43llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+2-28llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+16-0llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+0-15llvm/lib/Target/PowerPC/PPCInstrInfo.td
+4-1llvm/lib/Target/PowerPC/PPCISelLowering.h
+0-1llvm/lib/Target/AArch64/AArch64ISelLowering.h
+22-886 files

FreeBSD/ports 406cbc5 — games/eduke32 Makefile

games/eduke32: Fixes for portfmt -D Makefile
DeltaFile
+28-17games/eduke32/Makefile
+28-171 files

FreeBSD/ports 6898902 — games/eduke32 Makefile, games/eduke32/files patch-fullscreen-display

games/eduke32: Add fullscreen-display patch

In window managers such as dwm, fvwm, bvwm, etc. moving fullscreen
windows should cause resizing to the new output display.

eduke32 automatically resizes in window mode but not when asked to
run fullscreen. This patch causes resize when, for example, a user
in dwm utilizes Alt+Shift+Period (or Alt+Shift+Comma) to send the
game to another screen.
DeltaFile
+39-0games/eduke32/files/patch-fullscreen-display
+1-0games/eduke32/Makefile
+40-02 files

FreeBSD/ports bffe7af — games/eduke32 Makefile

games/eduke32: Switch to using DISTVERSION
DeltaFile
+6-7games/eduke32/Makefile
+6-71 files

FreeBSD/ports 34659be — games/eduke32 Makefile

games/eduke32: Fixes for portclippy Makefile
DeltaFile
+15-11games/eduke32/Makefile
+15-111 files

OpenBSD/ports rX9klHl — sysutils/salt/3008 distinfo Makefile, sysutils/salt/3008/patches patch-salt_scripts_py

   update to 3008.5
VersionDeltaFile
1.2+12-0sysutils/salt/3008/pkg/PLIST
1.4+3-2sysutils/salt/3008/Makefile
1.2+2-2sysutils/salt/3008/distinfo
1.2+1-1sysutils/salt/3008/patches/patch-salt_scripts_py
+18-54 files

FreeBSD/ports 6f181ad — sysutils/dekit pkg-descr Makefile, sysutils/dekit/files patch-src_Cargo.toml patch-Cargo.lock

sysutils/dekit: Remove expired port

2026-11-03 sysutils/dekit: Cannot upgrade due to linuxisms
DeltaFile
+0-631sysutils/dekit/distinfo
+0-314sysutils/dekit/Makefile.crates
+0-134sysutils/dekit/files/patch-Cargo.lock
+0-28sysutils/dekit/Makefile
+0-11sysutils/dekit/files/patch-src_Cargo.toml
+0-2sysutils/dekit/pkg-descr
+0-1,1202 files not shown
+1-1,1218 files

LLVM/project 95072ab — lld/MachO SyntheticSections.cpp, lld/MachO/Arch ARM64.cpp

Reland "[lld][MachO] Support Objective-C class selector stubs" (#238486)

Relands #219744, reverted in #238435.

Limit the class-stub test to arm64. llvm-objdump does not annotate
arm64e chained selector pointers, causing the shared FAST checks to fail.
DeltaFile
+369-0lld/test/MachO/arm64-objc-class-stubs.s
+172-0lld/test/MachO/arm64-objc-class-stubs-weak.s
+115-14lld/MachO/SyntheticSections.cpp
+85-0lld/MachO/Arch/ARM64.cpp
+82-0lld/test/MachO/arm64-objc-class-stubs-dead.s
+46-0lld/test/MachO/objc-class-stubs-unsupported.s
+869-145 files not shown
+939-2111 files

NetBSD/pkgsrc tTknreh — doc CHANGES-2026

   doc: Updated www/php-nextcloud to 33.0.10
VersionDeltaFile
1.7596+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc PtLdDXe — www/php-nextcloud Makefile distinfo

   www/php-nextcloud: Update to 33.0.10

   Tested on netbsd-10 amd64 with php84.

   Upstream NEWS content: micro release
VersionDeltaFile
1.73+909-885www/php-nextcloud/PLIST
1.76+4-4www/php-nextcloud/distinfo
1.92+3-2www/php-nextcloud/Makefile
+916-8913 files

LLVM/project b27d385 — libcxx/test/std/algorithms/alg.nonmodifying/alg.ends_with ranges.ends_with.pass.cpp

[libc++][test] Increase the constexpr step limit for ranges.ends_with.pass.cpp (#238491)

The test evaluates all the iterator and sentinel combinations in a
single constant evaluation. On some versions of Clang, this blows up the
constexpr step limit. This is what we did in the contains_subrange test
as well.
DeltaFile
+1-0libcxx/test/std/algorithms/alg.nonmodifying/alg.ends_with/ranges.ends_with.pass.cpp
+1-01 files

LLVM/project 7edab94 — llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU shufflevector.v3p3.v2p3.ll shufflevector.v3i32.v2i32.ll

[AMDGPU] Preserve shuffles that swap 32-bit pairs

Allow legal or custom 32-bit shuffles on targets with packed moves when
all fully defined pairs swap neighboring elements and at least one such
pair exists. This preserves packed moves through DAG combines while
avoiding the extra copies and waits introduced by broader masks.

Update existing float, integer, and pointer shuffle checks for gfx90a
and gfx942.
DeltaFile
+36-49llvm/test/CodeGen/AMDGPU/shufflevector.v3p3.v2p3.ll
+36-49llvm/test/CodeGen/AMDGPU/shufflevector.v3i32.v2i32.ll
+36-49llvm/test/CodeGen/AMDGPU/shufflevector.v3f32.v2f32.ll
+23-8llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+131-1554 files

NetBSD/src HvVbmlF — sys/arch/sparc64/sparc64 cpu.c

   sun4v: Improve register printout in print_winregs()
VersionDeltaFile
1.142+10-3sys/arch/sparc64/sparc64/cpu.c
+10-31 files

NetBSD/pkgsrc Y1YATXB — doc CHANGES-2026

   Updated sysutils/xenkernel420 to 20261103
   Updated sysutils/xentools420 to 20261103
   Updated sysutils/xenstoretools to 20261103
   Updated sysutils/xenkernel418 to 20261103
   Updated sysutils/xentools418 to 20261103
VersionDeltaFile
1.7595+6-1doc/CHANGES-2026
+6-11 files

NetBSD/pkgsrc XT0u26K — sysutils/xenkernel418 distinfo, sysutils/xentools418 version.mk distinfo

   Update xenkernel418 and xentools418 to 20261103.
   Changes since 20261015: Fix XSA 523
VersionDeltaFile
1.13+4-4sysutils/xentools418/version.mk
1.16+4-4sysutils/xentools418/distinfo
1.16+4-4sysutils/xenkernel418/distinfo
+12-123 files