NetBSD/pkgsrc-wip 53576aaprometheus-lts PLIST Makefile, prometheus-lts/patches patch-cmd_prometheus_main.go

prometheus-lts: Downgrade to 3.5.5

Latest stable release of the 3.5.x LTS.

See TODO on build problems that are currently happening with 3.13.2.
DeltaFile
+832-2,848prometheus-lts/distinfo
+275-947prometheus-lts/go-modules.mk
+6-6prometheus-lts/patches/patch-cmd_prometheus_main.go
+4-4prometheus-lts/PLIST
+4-4prometheus-lts/Makefile
+1,121-3,8095 files

LLVM/project a10f62eclang/include/clang/CIR/Dialect/IR CIRAttrs.td, clang/lib/CIR/CodeGen CIRGenExprCXX.cpp

[CIR] Implement aligned-array-delete. (#216789)

This ends up being a pretty trivial implementation, since we just have
to add the additional i64 argument to the call. This patch adds that,
after threading the alignment through CIR.

Also, the type-aware and destroying deletes aren't valid on a array
delete, so replace those checks with 'assert' instead.
DeltaFile
+140-0clang/test/CIR/CodeGen/delete-array-aligned.cpp
+10-4clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
+9-1clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+1-1clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+160-64 files

LLVM/project d7594bfclang/test/OpenMP reverse_codegen.cpp interchange_codegen.cpp

[Clang][CodeGen] Use ptrtoaddr for pointer diff (#210729)

We don't have to expose the provenance of pointers for pointer
subtraction, so use ptrtoaddr instead of ptrtoint if -fwrapv-pointer is
not set.
DeltaFile
+1,049-1,049clang/test/OpenMP/parallel_for_codegen.cpp
+124-118clang/test/OpenMP/tile_codegen.cpp
+124-118clang/test/OpenMP/stripe_codegen.cpp
+82-78clang/test/OpenMP/fuse_codegen.cpp
+58-57clang/test/OpenMP/interchange_codegen.cpp
+36-36clang/test/OpenMP/reverse_codegen.cpp
+1,473-1,45611 files not shown
+1,569-1,52017 files

LLVM/project aa2c1b5llvm/include/llvm/CodeGen LiveIntervals.h, llvm/lib/CodeGen MachineBasicBlock.cpp LiveIntervals.cpp

[CodeGen] Fix stale LiveIntervals regmask tables after MachineBasicBl… (#209610)

MachineBasicBlock::splitAt() moves the tail of a block -- including any
call instructions carrying register-mask operands -- into a newly
created block. When LiveIntervals is attached it calls
LIS->insertMBBInMaps() for the new block, which records the block with
zero regmask slots. That is only correct for a fresh, empty block:
because the tail (and its regmasks) was *moved* out of the original
block, the per-block RegMaskBlocks index for both blocks is left stale,
so checkRegMaskInterference() can miss a call clobber and the register
allocator can assign a live value to a clobbered physical register.

Add a LiveIntervals::splitAt(Orig, SplitBB) entry point that inserts
SplitBB into the SlotIndexes/regmask maps and then re-slices the moved
regmask slots out of Orig's RegMaskBlocks entry into SplitBB's
(RegMaskSlots is sorted, so the slots that moved are those at/after
SplitBB's start index). MachineBasicBlock::splitAt() now calls it in
place of insertMBBInMaps().


    [13 lines not shown]
DeltaFile
+39-0llvm/lib/CodeGen/LiveIntervals.cpp
+33-0llvm/unittests/MI/LiveIntervalTest.cpp
+19-4llvm/include/llvm/CodeGen/LiveIntervals.h
+1-1llvm/lib/CodeGen/MachineBasicBlock.cpp
+92-54 files

FreeBSD/ports 492bb54x11/lightdm Makefile distinfo, x11/lightdm/files patch-src_vt.c

x11/lightdm: Update to 1.33.1

- VT fix has been merged upstream
DeltaFile
+0-13x11/lightdm/files/patch-src_vt.c
+3-3x11/lightdm/distinfo
+1-1x11/lightdm/Makefile
+4-173 files

LLVM/project a7ef89alldb/test/API/functionalities/breakpoint/hardware_breakpoints/write_memory_with_hw_breakpoint TestWriteMemoryWithHWBreakpoint.py

Revert "[lldb][test] Fix skip in TestWriteMemoryWithHWBreakpoint.py" (#216806)

Reverts llvm/llvm-project#216723
DeltaFile
+3-2lldb/test/API/functionalities/breakpoint/hardware_breakpoints/write_memory_with_hw_breakpoint/TestWriteMemoryWithHWBreakpoint.py
+3-21 files

LLVM/project 992a291utils/bazel/llvm-project-overlay/clang BUILD.bazel

[bazel] Fixes #215349 (#216811)
DeltaFile
+1-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+1-01 files

LLVM/project 12da120flang/lib/Semantics resolve-directives.cpp, flang/test/Semantics/OpenACC acc-attach-unresolved.f90

[flang][OpenACC] Fix crash on ATTACH/DETACH with an unresolved name (#216801)

`AccAttributeVisitor::EnsureAllocatableOrPointer()` passes the last name of the
designator to `IsAllocatableOrObjectPointer()`, which accepts a null `Symbol`
pointer and returns `false` for it. When the argument of an `ATTACH` or `DETACH`
clause fails name resolution -- for example a component reference whose derived
type could not be resolved -- that name's symbol is null, so control reaches the
error-reporting path, which then dereferences the same null symbol and crashes
the compiler.

Because the crash happens during name resolution, it precedes the point where
semantic diagnostics are emitted, so the compiler dies with no output at all
rather than reporting the errors that caused the name to be unresolved.

Reproducer:

```fortran
subroutine test_attach_unresolved
  type :: ty

    [13 lines not shown]
DeltaFile
+17-0flang/test/Semantics/OpenACC/acc-attach-unresolved.f90
+5-0flang/lib/Semantics/resolve-directives.cpp
+22-02 files

NetBSD/pkgsrc-wip d86b86aprometheus-lts TODO

prometheus-lts: Point out the version tested

(Redundant right now, but this package will go back to 3.5.5 that seems
fine and still LTS probably!)
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+1-1prometheus-lts/TODO
+1-11 files

LLVM/project b71ce8fclang/lib/CodeGen CodeGenModule.cpp CGCUDANV.cpp, llvm/include/llvm/IR GlobalVariable.h

[llvm] Remove GlobalVariable::getAlignment (NFC) (#213300)
DeltaFile
+8-7clang/lib/CodeGen/CGCUDANV.cpp
+4-4clang/lib/CodeGen/CodeGenModule.cpp
+0-6llvm/include/llvm/IR/GlobalVariable.h
+3-2llvm/lib/Transforms/IPO/Instrumentor.cpp
+1-1llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
+1-1llvm/lib/Target/DirectX/DXILDataScalarization.cpp
+17-213 files not shown
+20-249 files

LLVM/project ae05cdellvm/lib/Target/Hexagon HexagonEarlyIfConv.cpp, llvm/test/CodeGen/Hexagon early-if-phi-undef.mir

Hexagon: Fix early if-conversion crash on an undef PHI operand

Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+42-0llvm/test/CodeGen/Hexagon/early-if-phi-undef.mir
+3-3llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
+45-32 files

LLVM/project 0132a93llvm/test/Transforms/PGOProfile/Inputs memprof_loop_unroll.memprofraw memprof_loop_unroll.exe

[NFC][MemProf] Remove unused memprofraw test file (#216778)

`llvm/test/Transforms/PGOProfile/Inputs/memprof_loop_unroll.memprofraw`
was created in https://github.com/llvm/llvm-project/pull/79433 for the
`llvm/test/Transforms/PGOProfile/memprof_loop_unroll.ll` test, but the
usage was removed in https://github.com/llvm/llvm-project/pull/165338 in
favor of an inline `.yaml` file. Remove the `.memprofraw` file and the
generator script.
DeltaFile
+0-29llvm/test/Transforms/PGOProfile/Inputs/update_memprof_inputs.sh
+0-0llvm/test/Transforms/PGOProfile/Inputs/memprof_loop_unroll.memprofraw
+0-0llvm/test/Transforms/PGOProfile/Inputs/memprof_loop_unroll.exe
+0-293 files

FreeBSD/src 2d67765sys/kern kern_malloc.c

malloc: Use ckdint.h helpers instead of WOULD_OVERFLOW

This serves to demonstrate some usage of the ckdint.h helpers.  The new
version also generates better machine code on amd64 and arm64.

Reviewed by:    kib, emaste
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
DeltaFile
+7-5sys/kern/kern_malloc.c
+7-51 files

FreeBSD/src 37bd69dinclude stdckdint.h, sys/sys ckdint.h

sys: Add sys/ckdint.h

We have a C23 stdckdint.h header for userspace, which provides checked
addition, subtraction and multiplication.  We lack similar helpers in
the kernel, where they are regularly needed.

Let's just adopt the C23 macros.  For bonus points, I added a wrapper to
ensure that ignored an return value is raised as an error by the
compiler.

Reviewed by:    kib, emaste
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D58773
DeltaFile
+47-0sys/sys/ckdint.h
+2-24include/stdckdint.h
+49-242 files

OpenBSD/ports irkOZOsdevel/p5-Log-Log4perl distinfo Makefile

   update p5-Log-Log4perl to 1.58
VersionDeltaFile
1.30+15-11devel/p5-Log-Log4perl/Makefile
1.19+2-2devel/p5-Log-Log4perl/distinfo
+17-132 files

LLVM/project ec68d09llvm/lib/Transforms/Scalar DeadStoreElimination.cpp, llvm/test/DebugInfo/Generic/assignment-tracking/dse shorten-offset.ll shorten-offset-begin.ll

[DSE] Stop double-counting the dead slice offset in shortenAssignment (#216227)

  DSE marked the wrong part of a variable dead when a shortened store started
  at an offset from its base object, leaving stale values visible in the
  debugger for bytes the shortened store no longer covered.

  shortenAssignment passed calculateFragmentIntersect both the materialized
  destination and DeadStart * 8. DeadStart is that destination's offset from the
  base object, and calculateFragmentIntersect already measures the destination
  against the dbg.assign address, so this counted the same distance twice.

  SROA and AssignmentTrackingAnalysis pass a base pointer and a separate offset
  into it. DSE already passes the materialized destination, so its slice offset
  is zero when DSE removes the beginning of the store and the size of the
  surviving store when it removes the end. Remove OldOffsetInBits from
  shortenAssignment.

  Add coverage for the three affected cases. shortenBeginWholeFragment checks
  that DSE unlinks the whole 12-byte assignment when it removes every byte the

    [8 lines not shown]
DeltaFile
+79-14llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset.ll
+93-0llvm/test/DebugInfo/Generic/assignment-tracking/dse/shorten-offset-begin.ll
+10-6llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+182-203 files

LLVM/project e7fe473llvm/lib/Target/AMDGPU AMDGPUGlobalISelUtils.cpp

AMDGPU: Capture G_PTR_ADD flags via m_MIFlags in getBaseWithConstantOffset

Read the nuw flag from the m_GPtrAdd match itself instead of a redundant
getVRegDef of the pointer register. NFC.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+4-2llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
+4-21 files

LLVM/project 8c8e285llvm/lib/Target/AMDGPU AMDGPURegBankLegalize.cpp

AMDGPU: Use mi_match for G_BITCAST check in RegBankLegalize

Replace the getVRegDef + G_BITCAST opcode check in tryEliminateReadAnyLane
with m_GBitcast. NFC.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+2-4llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+2-41 files

LLVM/project ec7d808llvm/lib/Target/AMDGPU AMDGPUCombinerHelper.cpp

AMDGPU: Use mi_match in isFPExtFromF16OrConst

Replace the getVRegDef + G_FPEXT/G_FCONSTANT opcode checks with m_GFPExt and
m_GFCst matchers. NFC.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+5-6llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
+5-61 files

LLVM/project 20c5354llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp

AMDGPU: Use mi_match for selector vector-source instruction lookups

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+11-8llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+11-81 files

LLVM/project 6df8360llvm/lib/Target/NVPTX NVPTXTargetMachine.cpp NVPTXCtorDtorLowering.cpp

[NVPTX] Move a few NewPM pass classes to Required (#216595)
DeltaFile
+0-27llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.h
+9-3llvm/lib/Target/NVPTX/NVPTX.h
+1-2llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
+0-1llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+10-334 files

LLVM/project 3c5a630mlir/include/mlir/Dialect/AMDGPU/IR AMDGPUOps.td, mlir/test/Conversion/AMDGPUToROCDL amdgpu-to-rocdl.mlir mfma.mlir

[mlir][AMDGPU] Enable useStrictPropertiesInAssemblyFormat

This is part of the migration to keeping inherent and discardable
attributes separate touched.

**Migration note:** this'll change the syntax of a bunch of `amdgpu`
dialect ops to keep inherent attributes out of the `attr-dict`.

Syntax changes:

1. Operations like the dpp operations have had their inherent operands
turned into oilists that use `name(value)` syntax, such as
`bound_ctrl(false)`, which also leads to the elision of default
values.
2. Buffer operations now use `boundsCheck(true/false)` before the main
operation (keeping the visibility from the old attr-dict) and have
moved to `sgprOffset(%offset)` and `indexOffset(constant)` as optional
syntax alements after the main specification.
3. WMMA operations also now have the same `attribute[(value)]` element

    [15 lines not shown]
DeltaFile
+59-59mlir/test/Dialect/AMDGPU/ops.mlir
+69-20mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
+39-39mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir
+32-32mlir/test/Dialect/AMDGPU/invalid.mlir
+25-25mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
+20-20mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
+244-19518 files not shown
+411-36124 files

LLVM/project 87bb646mlir/include/mlir/Dialect/LLVMIR ROCDLOps.td, mlir/test/Conversion/AMDGPUToROCDL dot-gfx9.mlir wmma-gfx12.mlir

[mlir][ROCDL] Enable useStrictPropertiesInAssemblyFormat

**Migration note:** Separate out inherent and discardable attributes
on your `rocdl.*` operations and put a `<>` around the inherent ones.

This commit adds `prop-dict` clauses to all the ROCDL-dialect
operations that have inherent attributes but don't have better syntax
for them.

I looked at creating better syntaxes here, but these are fairly
low-level operations and it was hard to put together comma-separated
lists of optional arguments in tablegen. So I've gone with the rather
straightforward and consistent fix of adding in `prop-dict`s.

AI note: Claude did the changes here, I reviewed the designs.

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+60-60mlir/test/Target/LLVMIR/rocdl.mlir
+48-48mlir/test/Dialect/LLVMIR/rocdl.mlir
+37-37mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+6-6mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
+6-6mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
+3-3mlir/test/Conversion/AMDGPUToROCDL/dot-gfx9.mlir
+160-1604 files not shown
+167-16610 files

LLVM/project b7064c0mlir/include/mlir/Dialect/XeGPU/IR XeGPUOps.td, mlir/test/Dialect/XeGPU xegpu-wg-to-sg.mlir propagate-layout.mlir

[mlir] Don't print a stray space for a fully-elided prop-dict

**Migration note**: if you have a custom `prop-dict` printer, add a
leading space into the format - it'll no longer be printed implicitly.

The `prop-dict` printer generated by mlir-tblgen would always print
a space before dispatching to printProperties(). When every property is
elided (because it is bound elsewhere in the assembly format or matches
its default value) printProperties() prints nothing, leaving a stray
space in the output. We had a test TODO about this.

This PR makes the leading space the responsibility of the properties printer, so
it's emitted only when needed. The generic
printer in OpState::genericPrintProperties() and all in-tree custom
printers have been updated accordingly.

XeGPU had worked around the stray space by writing an empty space
directive (``) after prop-dict to suppress the space before ':'. Those
workarounds are now redundant, and removing them restores the normal

    [6 lines not shown]
DeltaFile
+17-17mlir/test/Dialect/XeGPU/ops.mlir
+4-4mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
+4-4mlir/test/Dialect/XeGPU/propagate-layout.mlir
+4-4mlir/test/Dialect/XeGPU/invalid.mlir
+4-4mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
+3-4mlir/test/mlir-tblgen/op-format.mlir
+36-379 files not shown
+54-5215 files

LLVM/project e748fcelldb/test/API/functionalities/breakpoint/hardware_breakpoints/write_memory_with_hw_breakpoint TestWriteMemoryWithHWBreakpoint.py

Revert "[lldb][test] Fix skip in TestWriteMemoryWithHWBreakpoint.py (#216723)"

This reverts commit 89ad6f51f475cd6fe190cdeb51fc20f86c151fbc.
DeltaFile
+3-2lldb/test/API/functionalities/breakpoint/hardware_breakpoints/write_memory_with_hw_breakpoint/TestWriteMemoryWithHWBreakpoint.py
+3-21 files

LLVM/project a6131f8llvm/lib/Target/RISCV RISCVVLOptimizer.cpp, llvm/test/CodeGen/RISCV/rvv vl-opt-undef-vl.mir

RISCV: Fix VL optimizer crash on an undef VL operand

Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+18-0llvm/test/CodeGen/RISCV/rvv/vl-opt-undef-vl.mir
+4-1llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+22-12 files

LLVM/project 0082775offload/languages/kernel/src LanguageRuntime.cpp, offload/test/offloading/CUDA launch_tu.cu basic_launch_multi_arg.cu

add proper deviceSync
DeltaFile
+98-0offload/test/offloading/CUDA/devicesync_streams.cu
+97-0offload/test/offloading/HIP/devicesync_streams.hip
+12-6offload/languages/kernel/src/LanguageRuntime.cpp
+1-1offload/test/offloading/CUDA/launch_tu.cu
+1-1offload/test/offloading/CUDA/basic_launch_multi_arg.cu
+1-1offload/test/offloading/CUDA/basic_launch_blocks_and_threads.cu
+210-97 files not shown
+217-1213 files

FreeBSD/ports 42f6fa9net-mgmt/librenms Makefile distinfo, net-mgmt/librenms/files patch-daily.sh

net-mgmt/librenms: Update to 26.8.0

https://github.com/librenms/librenms/releases/tag/26.8.0

This release requires a database update.

Sponsored by:   yes
DeltaFile
+5-5net-mgmt/librenms/distinfo
+2-2net-mgmt/librenms/Makefile
+1-1net-mgmt/librenms/files/patch-daily.sh
+8-83 files

FreeNAS/freenas aa7f47esrc/middlewared/middlewared/plugins/apps_images update_alerts.py

NAS-142192 / 25.10.7 / Don't let one registry failure abort the image update sweep (#19507)

## Problem

`ContainerImagesService.check_update()` catches only `CallError`:

```python
for image in images:
    for tag in image['repo_tags']:
        try:
            await self.check_update_for_image(tag, image)
        except CallError as e:
            logger.error(str(e))
```

Anything else raised by the registry client escapes the per-tag handler
and aborts the whole sweep, so every image after the failing one keeps
whatever flag it already had. `check_update` is launched with
`create_task()` and nobody awaits it, so there is no user-visible

    [38 lines not shown]
DeltaFile
+4-0src/middlewared/middlewared/plugins/apps_images/update_alerts.py
+4-01 files

LLVM/project fbfff87libc/include/llvm-libc-proxy elf_proxy.yaml

[libc] Add a couple of constants to elf.h. (#216784)

* STT_GNU_IFUNC is a GNU-specific ELF symbol type used to implement
ifunc's, which is often used in parser code.
* Add EM_PPC64 denoting 64-bit PowerPC architecture (in addition to
i386/x86, ARM, and RISC types we already support).
DeltaFile
+6-0libc/include/llvm-libc-proxy/elf_proxy.yaml
+6-01 files