LLVM/project fecc0bfclang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaAMDGPU.cpp

AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic

Exactly match the s_wait_event instruction. For some reason we already
had this instruction used through llvm.amdgcn.s.wait.event.export.ready,
but that hardcodes a specific value. This should really be a bitmask that
can combine multiple wait types.

gfx11 -> gfx12 broke compatabilty in a weird way, by inverting the
interpretation  of the bit but also shifting the used bit by 1. Simplify
the selection of the old intrinsic by just using the magic number 2, which
should satisfy both cases.
DeltaFile
+42-9llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
+27-0clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
+24-0clang/lib/Sema/SemaAMDGPU.cpp
+11-0llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+7-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+2-4llvm/lib/Target/AMDGPU/SOPInstructions.td
+113-131 files not shown
+114-137 files

LLVM/project d4638adllvm/lib/Transforms/Utils SimplifyLibCalls.cpp, llvm/test/Transforms/InstCombine double-float-shrink-1.ll sqrt.ll

InstCombine: Only propagate callsite attributes in sqrt->sqrtf (#180160)

This was propagating the callee's attributes instead of just the
callsite. It's illegal to set denormal_fpenv on a callsite. This
was also losing callsite attributes which may have been more useful;
there's no point in setting the callee's attributes on the callsite.
DeltaFile
+48-22llvm/test/Transforms/InstCombine/double-float-shrink-1.ll
+5-4llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+3-3llvm/test/Transforms/InstCombine/sqrt.ll
+56-293 files

LLVM/project a815330llvm/test/CodeGen/AArch64 fp16_i16_intrinsic_scalar.ll

[AArch64][GlobalIsel] Update test checks
DeltaFile
+0-9llvm/test/CodeGen/AArch64/fp16_i16_intrinsic_scalar.ll
+0-91 files

LLVM/project dfcb0bellvm/lib/Target/AArch64 AArch64SVEInstrInfo.td AArch64ISelLowering.cpp

[AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (#179909)

This also swaps the general predicate and source operand, to match other
nodes.

Follow-up from
https://github.com/llvm/llvm-project/pull/178674#discussion_r2767753614
DeltaFile
+28-28llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+8-12llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-1llvm/lib/Target/AArch64/AArch64InstrInfo.td
+38-413 files

LLVM/project 06f35e7llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp

[AArch64][GloballISel] Put result of fp16 -> s16 convert intrinsic on fpr

Previously, RegBankSelect would place the result of an fp16 -> s16 conversion intrinsic on a gpr. This would cause Instruction Selection to fail, as there are no 16-bit gprs.
Floating point convert intrinsics affected:
fcvtnu / fcvtns
fcvtau / fcvtas
fcvtmu / fcvtms
fcvtpu / fcvtps
DeltaFile
+7-6llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+7-61 files

OpenBSD/ports Uut1pNLeditors/vim Makefile distinfo, editors/vim/patches patch-runtime_autoload_tar_vim

   update to vim-9.1.2135
VersionDeltaFile
1.26+70-4editors/vim/pkg/PLIST
1.298+11-1editors/vim/Makefile
1.152+2-2editors/vim/distinfo
1.12+1-1editors/vim/patches/patch-runtime_autoload_tar_vim
+84-84 files

LLVM/project 25ccda7clang/include/clang/Basic BuiltinsAMDGPU.td

rebase
DeltaFile
+4-4clang/include/clang/Basic/BuiltinsAMDGPU.td
+4-41 files

NetBSD/pkgsrc Hi7B8gIdoc CHANGES-2026

   Updated archivers/unrar, security/ccid
VersionDeltaFile
1.926+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc sjupwSSsecurity/ccid distinfo Makefile

   ccid: updated to 1.7.1

   1.7.1 - 4 February 2026, Ludovic Rousseau
      - Add support of
       - ACS APG8201-B2
       - BUDGET E-ID BUD001
       - CHERRY Smart Board 1150
       - CryptnoxCR CryptnoxCR
       - Diebold Nixdorf PN7362au CCID
       - FT BioPass FIDO2 Pro
       - Nitrokey Nitrokey Passkey
      - Add SCARD_CTL_CODE(3601): USB path of the reader
      - Some other minor improvements
VersionDeltaFile
1.31+4-4security/ccid/distinfo
1.52+2-2security/ccid/Makefile
+6-62 files

NetBSD/src Dgh7rLosbin/gpt main.c

   Allow scaling of the media size (-m arg)

   Note that we cannot use gpt_size_get() as that needs gpt->secsz
   to have been set already (ie: can only be used after gpt_open)
   and treats unscaled numbers as multiples of sectors, whereas the
   -m arg has always been a byte size.

   For gpt_human_get() or simply using dehumanize_number() we
   would need to handle 's' and 'b' suffixes by hand anyway, so it
   is simpler to simply to the whole thing longhand in this case.

   This also allows (with some hackery) for the media size to be
   set as some number of sectors, when we do not yet know the
   sector size - it gets corrected later once the sector size has
   been determined.
VersionDeltaFile
1.16+89-6sbin/gpt/main.c
+89-61 files

LLVM/project 6824db4llvm/test/CodeGen/AMDGPU whole-wave-functions.ll accvgpr-spill-scc-clobber.mir

[AMDGPU] Set MOThreadPrivate on memory accesses for spills (#179414)

Mark the memory operand of spill load/stores as MOThreadPrivate, so that
these loads and stores are emitted with `nv` set.

The reason is that scratch memory used by spills will never be shared by
another thread. It's purely thread local and thus a good fit for the
`nv` bit, which is controlled by the MOThreadPrivate flag.
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+1,260-1,260llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
+902-902llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
+180-180llvm/test/CodeGen/AMDGPU/sgpr-spill.mir
+166-167llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+12,350-12,35142 files not shown
+13,185-13,18448 files

NetBSD/src 0MvCFAqsbin/gpt gpt.c

   Ensure sizes are a multiple of the sector size.

   In gpt_size_get() ensure that the size returned is a multiple
   of the sector size.   This is automatic for unscaled numbers
   (treated as multiples of the sector size) but in other cases
   it is not automatic.   Note that even nK is not guartamteed to
   be a multiple of the sector size if that happens to be 4K and
   n is not a multiple of 4.
VersionDeltaFile
1.98+12-1sbin/gpt/gpt.c
+12-11 files

LLVM/project 3f4d94fllvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine/AArch64 select-shuffle.ll

[VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (#179429)

Resolves #173035
DeltaFile
+52-0llvm/test/Transforms/VectorCombine/X86/shuffle-of-binops.ll
+28-9llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll
+23-9llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+2-3llvm/test/Transforms/VectorCombine/AArch64/select-shuffle.ll
+105-214 files

LLVM/project 33a2c3ellvm/lib/Transforms/Vectorize VPlanPatternMatch.h VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize uniform-blend.ll unused-blend-mask-for-first-operand.ll

[VPlan] Ignore poison incoming values when creating blend (#180005)

We have an optimization in VPPredicator when creating blends where if
all the incoming values are the same, we just return that value.

This extends it to handle cases like "phi [%x, %x, poison, %x]" by
ignoring poison values.

This is split off from #176143 to prevent regressions when maintaining
SSA by adding PHIs with a poison incoming value.
DeltaFile
+58-16llvm/test/Transforms/LoopVectorize/uniform-blend.ll
+6-14llvm/test/Transforms/LoopVectorize/unused-blend-mask-for-first-operand.ll
+10-0llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+2-4llvm/test/Transforms/LoopVectorize/RISCV/pr87378-vpinstruction-or-drop-poison-generating-flags.ll
+3-1llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+79-355 files

NetBSD/pkgsrc yQT2sXgarchivers/unrar distinfo Makefile.common

   unrar: updated to 7.2.4

   7.2.4
   Unknown changes
VersionDeltaFile
1.116+4-4archivers/unrar/distinfo
1.68+2-2archivers/unrar/Makefile.common
+6-62 files

OPNSense/src 0c619fesys/dev/e1000 if_em.c e1000_phy.c

Revert "e1000: Try auto-negotiation for fixed 100 or 10 configuration"

We've gotten a report of this breaking a fixed no autoneg setup.

Since no link is worse than what this intends to fix (negotiating full
duplex at forced speed), revert for the undeway 15.0 release cycle
until this can be further reviewed.

PR:             288827
Differential Revision:  https://reviews.freebsd.org/D47336

This reverts commit 645c45e297c0fcbbb9d2d24cdeeb124234825019.

(cherry picked from commit 3ff0231c87f360afa4521e635b46f6c711dc4ee3)
DeltaFile
+6-38sys/dev/e1000/if_em.c
+2-3sys/dev/e1000/e1000_phy.c
+8-412 files

OpenBSD/ports hitalozdevel/ruff distinfo crates.inc, devel/ruff/patches patch-Cargo_toml

   Update to ruff 0.15.0 from maintainer

   The minor version bump comes with some breaking changes, especially
   in the formatter. Consult the release notes for details:

   https://github.com/astral-sh/ruff/releases/tag/0.15.0
   https://github.com/astral-sh/ruff/releases/tag/0.14.14
VersionDeltaFile
1.6+48-52devel/ruff/distinfo
1.6+22-24devel/ruff/crates.inc
1.6+3-3devel/ruff/patches/patch-Cargo_toml
1.6+2-2devel/ruff/Makefile
+75-814 files

LLVM/project c0b7ba4mlir/include/mlir/Rewrite PatternApplicator.h, mlir/lib/Rewrite PatternApplicator.cpp

[mlir][Rewrite] Add match failure/success diagnostics to `PatternApplicator`
DeltaFile
+55-0mlir/lib/Rewrite/PatternApplicator.cpp
+10-0mlir/test/Rewrite/test-pattern-applicator-diagnostics.mlir
+3-0mlir/include/mlir/Rewrite/PatternApplicator.h
+2-0mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
+1-0mlir/lib/Tools/mlir-opt/CMakeLists.txt
+71-05 files

NetBSD/pkgsrc XLYHrhFsecurity/munge Makefile

   munge: do not set PKG_RCD_SCRIPTS
VersionDeltaFile
1.31+1-2security/munge/Makefile
+1-21 files

OPNSense/core 9b545e2src/opnsense/scripts/captiveportal allow.py

shorten this
DeltaFile
+1-2src/opnsense/scripts/captiveportal/allow.py
+1-21 files

NetBSD/pkgsrc nRx15yvnet/icinga2 Makefile

   icinga2: do not set PKG_RCD_SCRIPTS
VersionDeltaFile
1.23+1-2net/icinga2/Makefile
+1-21 files

LLVM/project 46c25b2clang/lib/CodeGen TargetInfo.h TargetInfo.cpp, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

Use StringRef
DeltaFile
+29-42clang/lib/CodeGen/Targets/AMDGPU.cpp
+3-3clang/lib/CodeGen/TargetInfo.h
+3-3clang/lib/CodeGen/Targets/SPIR.cpp
+1-1clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+1-1clang/lib/CodeGen/TargetInfo.cpp
+37-505 files

OPNSense/ports f42cddfopnsense/hostwatch distinfo Makefile

opnsense/hostwatch: update to 1.0.12
DeltaFile
+3-3opnsense/hostwatch/distinfo
+1-1opnsense/hostwatch/Makefile
+4-42 files

LLVM/project daef4d9clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

Comment
DeltaFile
+0-2clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+0-21 files

LLVM/project c55515eclang/test/CodeGenHIP builtins-amdgcn-gfx1250-load-monitor-templated.hip builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip

fix tests
DeltaFile
+0-2clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
+0-2clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
+0-42 files

LLVM/project 399199allvm/lib/Target/AMDGPU SIISelLowering.cpp

rebase
DeltaFile
+4-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+4-11 files

LLVM/project 68747f0clang/lib/CodeGen TargetInfo.h, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

Address comments
DeltaFile
+64-22clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
+33-51clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+28-36clang/lib/CodeGen/Targets/SPIR.cpp
+34-9clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
+6-10clang/lib/CodeGen/Targets/AMDGPU.cpp
+10-5clang/lib/CodeGen/TargetInfo.h
+175-1331 files not shown
+184-1347 files

LLVM/project 96cf7d9clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp, clang/lib/Sema SemaAMDGPU.cpp

Address comments
DeltaFile
+51-0clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
+24-14clang/lib/Sema/SemaAMDGPU.cpp
+32-0clang/test/SemaHIP/builtins-amdgcn-gfx1250-cooperative-atomics-templated.hip
+12-17clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+26-0clang/test/SemaHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
+25-0clang/test/CodeGenHIP/builtins-amdgcn-gfx1250-load-monitor-templated.hip
+170-311 files not shown
+175-377 files

LLVM/project 6384a76clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp, clang/test/CodeGenOpenCL builtins-amdgcn-gfx1250-load-monitor.cl

Revert to old name
DeltaFile
+42-42llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
+24-24clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
+21-21clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-param.cl
+20-20llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+18-18clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+8-8llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+133-1339 files not shown
+173-17915 files

OpenBSD/ports UVbZUsbdevel/uv distinfo crates.inc

   Update to uv 0.10.0, from maintainer

   The bump to 0.10 indicates some breaking changes, so review the release
   notes before updating:

   https://github.com/astral-sh/uv/releases/tag/0.10.0
   https://github.com/astral-sh/uv/releases/tag/0.9.30
   https://github.com/astral-sh/uv/releases/tag/0.9.29
VersionDeltaFile
1.20+10-10devel/uv/distinfo
1.20+4-4devel/uv/crates.inc
1.22+1-1devel/uv/Makefile
+15-153 files