LLVM/project df9f345llvm/test/CodeGen/AMDGPU llvm.amdgcn.struct.buffer.load.format.ll llvm.amdgcn.intersect_ray.ll, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.struct.buffer.load.tfe.ll llvm.amdgcn.raw.buffer.load.tfe.ll

[AMDGPU][GlobalISel] Fold redundant uniform G_AMDGPU_READANYLANE in RegBankCombiner
DeltaFile
+124-264llvm/test/CodeGen/AMDGPU/packed-fp32.ll
+69-144llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
+80-97llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
+36-108llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
+36-108llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
+32-83llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
+377-80412 files not shown
+561-91418 files

LLVM/project 44bfe98clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin CMakeLists.txt

remove duplicates
DeltaFile
+0-3clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
+0-31 files

FreeBSD/ports 65e9b69databases/py-redisvl Makefile distinfo

databases/py-redisvl: Update to 0.26.0

Changelog:
- https://github.com/redis/redis-vl-python/releases/tag/v0.22.0
- https://github.com/redis/redis-vl-python/releases/tag/v0.23.0
- https://github.com/redis/redis-vl-python/releases/tag/v0.24.0
- https://github.com/redis/redis-vl-python/releases/tag/v0.25.0
- https://github.com/redis/redis-vl-python/releases/tag/v0.25.1
- https://github.com/redis/redis-vl-python/releases/tag/v0.26.0

Reported by:    Repology
DeltaFile
+3-3databases/py-redisvl/distinfo
+1-1databases/py-redisvl/Makefile
+4-42 files

LLVM/project bd439d5llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/RISCV interleaved-cost.ll

[RISCV] Don't overcost wide load in optimized segment load/store (#207146)

With the +optimized-nfX-segment-load-store tuning flag, we cost a
segmented store as a single wide load + some shuffle ops.

However for e.g. a `<vscale x 5 x i64>` Factor=5 segmented load, a wide
`<vscale x 5 x i64>` load gets costed as a full LMUL 8 load.

From what I can see on
https://camel-cdr.github.io/rvv-bench-results/spacemit_x100/index.html
and on my own measurements on the spacemit-x60, uarchs likely don't do a
full LMUL 8 load under the hood and instead dispatch the minimum number
of DLEN sized ops needed for the full segment.

This changes the wide load cost to be divideCeil(vector size, DLEN) ops
so we don't overcost it.

Whilst we're here, this also removes the LT.first legalization
multiplier. We're computing the cost in terms of the unlegalized type so
we shouldn't be scaling it by the legalization cost.
DeltaFile
+28-28llvm/test/Transforms/LoopVectorize/RISCV/interleaved-cost.ll
+9-5llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+37-332 files

LLVM/project 806e8adorc-rt/include CMakeLists.txt, orc-rt/include/orc-rt Proxy.h

[orc-rt] Add Proxy, a protocol-agnostic controller-call handle (#217792)

Introduce Proxy<RetT(ArgTs...)>, a typed handle for invoking a
controller-side operation from the executor. A Proxy abstracts over how
a call reaches the controller: it holds an opaque callee tag and a
dispatch function (supplied by a per-protocol spec) and forwards calls
through the Session.

This is a cut-down port of llvm/ExecutionEngine/Orc/Proxy.h, with two
deliberate differences:

- The callee is identified by an opaque tag (const void *, typically the
address of a controller-side global) rather than an ExecutorAddr, since
the executor->controller direction dispatches by tag.

- Only the asynchronous (OnComplete) call operator is provided. The
blocking convenience operator is omitted: the executor may be
single-threaded or freestanding and cannot rely on std::promise/future
or on blocking a dispatch thread.

    [2 lines not shown]
DeltaFile
+98-0orc-rt/include/orc-rt/Proxy.h
+94-0orc-rt/test/unit/ProxyTest.cpp
+1-0orc-rt/test/unit/CMakeLists.txt
+1-0orc-rt/include/CMakeLists.txt
+194-04 files

LLVM/project 8c78d4bclang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin TestTransformation.cpp CMakeLists.txt

[SSAF] Fix a stage2 test failure with ASan-instrumented clang - continued

The previous effort in PR#211432 that disables ASan for one static
global is not sufficient. This commit disables ASan for the whole test
plugin.

rdar://182623740
DeltaFile
+13-0clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
+0-3clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
+13-32 files

LLVM/project 155dadeutils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Select Windows GNU BLAKE3 assembly for clang-cl (#217695)

## Motivation

This PR is motivated by ongoing work of providing a fully hermetic
clang-cl bazel toolchain built for windows with the MSVC runtime.

The LLVM Bazel overlay does not select a Windows-compatible BLAKE3
assembly source set for an x86_64 Windows target compiled with the
rules_cc `clang-cl` compiler dialect.

The `windows_gnu.S` name can be misleading here. "GNU" describes the
assembly syntax accepted by GNU-style assemblers and Clang's integrated
assembler; it does **not** mean that the implementation uses the MinGW
ABI or runtime. These files implement the Microsoft x64 calling
convention and are intended to produce Windows COFF objects.

A hermetic clang-cl toolchain can therefore assemble the GNU-syntax
Windows sources directly. Selecting the MASM-syntax `windows_msvc.asm`

    [25 lines not shown]
DeltaFile
+13-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+13-01 files

FreeBSD/ports 82a328ax11-wm/lxqt-session Makefile, x11-wm/plasma6-kwin Makefile

*/*: Bump PORTREVISION for known Qt private API abusers

Qt 6.11.2 edition.

These ports are known to directly use or link to a library that uses the
Qt private API and must be rebuilt with every Qt update.

Qt *public* API/ABI compatability is excellent, so most consumers don't
need to necessarily be rebuilt between patch or even minor releases, but
use of the private API breaks this compatibility between even patch
releases and its use is highly discouraged.

This list [1] is based on histortical data. We don't have time to
revisit every port on the list with each Qt update, so if your port has
dropped Qt private headers and was bumped in error, please remove it
yourself if you have write access to the Wiki or alert someone on kde@.

[1] https://wiki.freebsd.org/KDE/Qt

MFH:            2026Q3
DeltaFile
+1-1x11/screengrab/Makefile
+1-1x11/lxqt-runner/Makefile
+1-1x11/lxqt-globalkeys/Makefile
+1-1x11/lxqt-about/Makefile
+1-1x11-wm/plasma6-kwin/Makefile
+1-1x11-wm/lxqt-session/Makefile
+6-620 files not shown
+26-2126 files

FreeBSD/ports 348ccc7misc/qt6-doc pkg-plist, misc/qt6-examples pkg-plist

Qt6: Update to 6.11.2

Aug 18, 2026 by Jani Heikkinen

Qt 6.11.2 is now available for download. As a patch release, Qt 6.11.2
doesn’t introduce new features, but it delivers around 400 bug fixes,
security improvements, and quality enhancements on top of Qt 6.11.1.
For a full overview of the most notable changes, take a look at the
Qt 6.11.2 release notes.

Announcement:
https://www.qt.io/blog/qt-6.11.2-released
Release notes:
https://code.qt.io/cgit/qt/qtreleasenotes.git/about/qt/6.11.2/release-note.md

PySide6: Update to 6.11.2

MFH:            2026Q3
Security:       a188c081-9ce8-11f1-8fc6-cb9659fdabad
DeltaFile
+1,201-4,024www/qt6-webengine/files/patch-security-rollup
+174-157misc/qt6-examples/pkg-plist
+0-100x11-toolkits/qt6-declarative/files/patch-git_8a2c82be6a
+33-16misc/qt6-doc/pkg-plist
+30-0x11-toolkits/qt6-declarative/pkg-plist
+12-12www/qt6-webengine/files/patch-src_3rdparty_chromium_build_config_compiler_BUILD.gn
+1,450-4,309146 files not shown
+1,918-4,769152 files

FreeBSD/ports 7fd3b0ddevel/qtcreator distinfo Makefile

devel/qtcreator: Update to 20.0.1

MFH:            2026Q3 (for Qt 6.11.2 compat)
DeltaFile
+68-33devel/qtcreator/pkg-plist
+4-3devel/qtcreator/Makefile
+3-3devel/qtcreator/distinfo
+75-393 files

FreeBSD/ports 22825b8security/vuxml/vuln 2026.xml

security/vuxml: Document qt6-webengine < 6.11.2
DeltaFile
+1,522-0security/vuxml/vuln/2026.xml
+1,522-01 files

LLVM/project 89920d6llvm/lib/Target/RISCV RISCVZacasABIFix.cpp RISCVTargetMachine.cpp

[RISCV][NFC] Rename create*LegacyPass functions (#217761)

This is to clarify which functions are creating legacy passes rather
than NewPM passes.
DeltaFile
+3-3llvm/lib/Target/RISCV/RISCV.h
+2-2llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-2llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+1-1llvm/lib/Target/RISCV/RISCVZacasABIFix.cpp
+8-84 files

FreeBSD/ports 00d7bf3misc/py-litellm-proxy-extras Makefile distinfo

misc/py-litellm-proxy-extras: Update to 0.4.87

Reported by:    portscout
DeltaFile
+3-3misc/py-litellm-proxy-extras/distinfo
+1-1misc/py-litellm-proxy-extras/Makefile
+4-42 files

FreeBSD/src a1aa26btests/sys/posixshm posixshm_test.c

tests/sys/posixshm/posixshm_test.c::accounting fix after st_size changes

st_blksize is defined by POSIX as the 'preferred I/O block size for this
object.' It is wrong to use st_blksize as the unit for st_blocks and
expect it to be equal to the object size regardless of the change of
st_blksize.

Fixes:  3a1bf59d195c ("shmfd: consistently return size in 512 byte blocks for fstat(2) st_blocks")
Reviewed by:    markj
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D59014
DeltaFile
+6-2tests/sys/posixshm/posixshm_test.c
+6-21 files

FreeBSD/ports be06baamisc/crush Makefile distinfo

misc/crush: Update to 0.90.0

Changelog: https://github.com/charmbracelet/crush/releases/tag/v0.90.0

Reported by:    GitHub (watch releases)
DeltaFile
+5-5misc/crush/distinfo
+1-2misc/crush/Makefile
+6-72 files

LLVM/project 7af8a5fclang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin TestTransformation.cpp CMakeLists.txt

tmp
DeltaFile
+13-0clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/CMakeLists.txt
+0-3clang/test/Analysis/Scalable/source-edit-generation/Plugins/TestTransformationPlugin/TestTransformation.cpp
+13-32 files

LLVM/project eaeafbellvm/lib/Target/AMDGPU SIRegisterInfo.cpp AMDGPUCallingConv.td

[AMDGPU] Set "preserved" bits in register bitmask for all VGPRs and SGPRs for amdgpu_cs_chain and amdgpu_cs_chain_preserve calling conventions.
DeltaFile
+4-0llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
+1-1llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+5-12 files

LLVM/project 984644fllvm/docs HowToCrossCompileLLVM.md

[docs] Fix CMAKE_CROSSCOMPILING spelling in HowToCrossCompileLLVM (#217623)

## Summary

The HowToCrossCompileLLVM option list spelled the CMake variable as
`CMAKE_CROSSCOMPIILING` (extra I). The linked CMake docs use
`CMAKE_CROSSCOMPILING`.

Assisted-by: Grok (xAI)
DeltaFile
+1-1llvm/docs/HowToCrossCompileLLVM.md
+1-11 files

LLVM/project efd61aallvm/lib/Target/RISCV RISCVTargetMachine.cpp RISCVOptWInstrs.cpp

Header to RISCV.h, rename to createRISCVOptWInstrsLegacyPass
DeltaFile
+0-35llvm/lib/Target/RISCV/RISCVOptWInstrs.h
+8-2llvm/lib/Target/RISCV/RISCV.h
+2-2llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+1-2llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+11-414 files

LLVM/project 0ab88bdllvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVOptWInstrs.h, llvm/test/CodeGen/RISCV O3-newpm-pipeline.ll O1-newpm-pipeline.ll

[RISCV] Port Opt W Instrs to NewPM

Assisted-by: AI
DeltaFile
+44-22llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+35-0llvm/lib/Target/RISCV/RISCVOptWInstrs.h
+2-3llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/prefer-w-inst.mir
+2-1llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
+2-1llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
+89-276 files not shown
+96-2812 files

LLVM/project c717856llvm/lib/Target/RISCV RISCVTargetMachine.cpp RISCVFoldMemOffset.cpp

Header to RISCV.h, rename to createRISCVFoldMemOffsetLegacyPass
DeltaFile
+0-36llvm/lib/Target/RISCV/RISCVFoldMemOffset.h
+10-0llvm/lib/Target/RISCV/RISCV.h
+2-2llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+1-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+13-394 files

LLVM/project 9394d7cllvm/lib/Target/RISCV RISCVFoldMemOffset.cpp

Preserve MachineRegisterClassAnalysis
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+1-01 files

LLVM/project e1ed7c4llvm/lib/Target/RISCV RISCVTargetMachine.cpp RISCVCodeGenPassBuilder.cpp, llvm/test/CodeGen/RISCV fold-mem-offset.mir

[RISCV] Port Fold Memory Offset Pass to NewPM

Assisted-by: AI
DeltaFile
+37-16llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+36-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.h
+0-3llvm/lib/Target/RISCV/RISCV.h
+1-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+1-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+1-0llvm/test/CodeGen/RISCV/fold-mem-offset.mir
+76-213 files not shown
+79-219 files

LLVM/project 370e618llvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVVectorPeephole.cpp

Header to RISCV.h, rename to createRISCVVectorPeepholeLegacyPass
DeltaFile
+0-39llvm/lib/Target/RISCV/RISCVVectorPeephole.h
+12-2llvm/lib/Target/RISCV/RISCV.h
+1-1llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+0-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+13-434 files

LLVM/project 8f2bd1fllvm/lib/Target/RISCV RISCVVectorPeephole.cpp

Preserve MachineRegisterClassAnalysis
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+1-01 files

LLVM/project 9c30947llvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVTargetMachine.cpp, llvm/test/CodeGen/RISCV/rvv vmv.v.v-peephole.mir rvv-peephole-vmerge-to-vmv.mir

[RISCV] Port Vector Peephole to NewPM

Assisted-by: AI
DeltaFile
+67-45llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+39-0llvm/lib/Target/RISCV/RISCVVectorPeephole.h
+2-2llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-0llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
+2-0llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
+114-486 files not shown
+120-4812 files

LLVM/project a2c7603utils/bazel/llvm-project-overlay/compiler-rt compiler-rt.bzl BUILD.bazel

Improve compiler-rt build structure and export compilation info (#190088)

This first improves the structure of the compiler-rt BUILD.bazel, fixing
bugs and exposing more carefully arranged source files.

It also exposes compilation info for builtins and CRT files for use in
compiling these source files.
DeltaFile
+228-61utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
+155-0utils/bazel/llvm-project-overlay/compiler-rt/compiler-rt.bzl
+383-612 files

LLVM/project e3a1704mlir/lib/Dialect/OpenACC/Transforms ACCCGToGPU.cpp, mlir/test/Dialect/OpenACC acc-cg-to-gpu-reduction-array.mlir

[mlir][acc] Keep worker-only launches unaligned in ACCCGToGPU (#217382)

Example:
```fortran
!$acc parallel loop worker reduction(+:s) num_workers(16) vector_length(8)
```

In this code, a ThreadY reduction forced blockDim.x to a warp, and
blockDim.y
was divided by the same factor to hold the thread count, so the launch
ran as
(32, 4, 1): 4 workers instead of 16, with the folded-away workers turned
into
ThreadX lanes redoing each other's work.

Fix: skip the alignment when only the workers ask for it and the row
width
divides the subgroup size. Worker reductions combine their partials in
the

    [6 lines not shown]
DeltaFile
+143-66mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+85-4mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
+228-702 files

FreeBSD/ports 244c6d9devel/py-ty Makefile distinfo

devel/py-ty: Update to 0.0.73

Changelog: https://github.com/astral-sh/ty/blob/0.0.73/CHANGELOG.md

Reported by:    Repology
DeltaFile
+3-3devel/py-ty/distinfo
+1-1devel/py-ty/Makefile
+4-42 files

LLVM/project 9f5034dllvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize reduction-with-invariant-store.ll

[VPlan] Fix replaceWithFinalIfReductionStore assert with multiple reductions (#217316)

A reductions final value can be simplified away to a constant, which
https://github.com/llvm/llvm-project/pull/201023 handled in
replaceWithFinalIfReductionStore.
However constant live ins can have other users, e.g. a different
reductions start value, in which case the assertion will fail because
we're comparing the backedge value of a different reduction entirely.
Relax the assertion to allow any VPIRValue instead

This an alternative to https://github.com/llvm/llvm-project/pull/217306
that fixes #215071
DeltaFile
+39-0llvm/test/Transforms/LoopVectorize/reduction-with-invariant-store.ll
+1-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+40-12 files