LLVM/project 51b2a5dllvm/lib/Target/RISCV RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV][P-ext] Fix incorrect shift mask on variable shift instructions. (#209293)

The instructions are defined to read 5 bits regardless of element size.

I think we will also need to change the C intrinsics to allow 5 bit
shift amounts, but we can do that in a separate patch.
DeltaFile
+16-18llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+25-1llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+12-0llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+53-193 files

LLVM/project 0661f66mlir/include/mlir/Dialect/OpenACC OpenACCUtilsReduction.h, mlir/lib/Dialect/OpenACC/Utils OpenACCUtilsReduction.cpp CMakeLists.txt

[mlir][acc] Add reduction utilities for acc to gpu lowering (#209316)

In preparation for the pass that converts `acc.compute_region` to GPU
dialect, this PR adds several utilities which are used in that pass
related to reductions. Doing so to simplify review and to ensure that
unit testing is added for the utilities.

---------

Co-authored-by: Scott Manley <rscottmanley at gmail.com>
DeltaFile
+221-0mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsReduction.cpp
+192-0mlir/unittests/Dialect/OpenACC/OpenACCUtilsReductionTest.cpp
+66-0mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsReduction.h
+3-0mlir/lib/Dialect/OpenACC/Utils/CMakeLists.txt
+3-0mlir/unittests/Dialect/OpenACC/CMakeLists.txt
+485-05 files

LLVM/project acbc7e5clang/lib/Basic/Targets AMDGPU.h AMDGPU.cpp, clang/test/Misc/target-invalid-cpu-note amdgcn.c

clang/AMDGPU: Validate -target-cpu in cc1 is valid for the subarch (#206481)

Restrict the reported list of valid target-cpus based on the triple's
subarch. This is more consistent with how other targets validate the
target CPU name. Currently we have split handling validating the target
name for the triple in both the driver and here. The driver based
diagnostic seems to be an amdgpu-ism in 2 different places (though there 
is one arm validation emitting the same diagnostic). In the future we could
probably drop those.
DeltaFile
+55-0clang/test/Misc/target-invalid-cpu-note/amdgcn.c
+6-5clang/lib/Basic/Targets/AMDGPU.h
+1-1clang/lib/Basic/Targets/AMDGPU.cpp
+62-63 files

LLVM/project d90f305clang/include/clang/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers TypeConstrainedPointers.h, clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers TypeConstrainedPointers.cpp

[SSAF][TypeConstrainedPointers] Add pointer parameters of 'main' as constrained pointers (#208578)

Similar to some pointer entities of operator new/delete overload
functions, pointer type parameters of the main function shall also
retain its type during clang-reforge transformation.

rdar://179151882

---------

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+45-0clang/unittests/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointersExtractorTest.cpp
+10-0clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
+8-0clang/test/Analysis/Scalable/TypeConstrainedPointers/type-constrained-pointers.cpp
+3-0clang/include/clang/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.h
+66-04 files

LLVM/project 9367769clang/docs ReleaseNotes.md, lld/docs ReleaseNotes.rst

[docs] Add ARM64X release notes (NFC) (#209249)
DeltaFile
+8-0lld/docs/ReleaseNotes.rst
+5-0clang/docs/ReleaseNotes.md
+3-0llvm/docs/ReleaseNotes.md
+16-03 files

FreeNAS/freenas 11a5350src/freenas/etc/systemd/network 10-persistent-net.link

bump ntb0 back to 64K MTU
DeltaFile
+7-2src/freenas/etc/systemd/network/10-persistent-net.link
+7-21 files

NetBSD/pkgsrc-wip 9e4b769rust197 Makefile

rust197: one more REPLACE_BASH needed, evidently.
DeltaFile
+1-0rust197/Makefile
+1-01 files

FreeBSD/ports 806f59cfilesystems/xfuse distinfo Makefile

filesystems/xfuse: 0.7.1

This version no longer needs COMPAT11 on RISCV.

https://github.com/KhaledEmaraDev/xfuse/blob/main/CHANGELOG.md

Sponsored by:   ConnectWise
DeltaFile
+5-5filesystems/xfuse/distinfo
+1-1filesystems/xfuse/Makefile
+1-1filesystems/xfuse/Makefile.crates
+7-73 files

LLVM/project 5d888c2llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

remove r600 check
DeltaFile
+1-2llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+1-21 files

LLVM/project 5b825abllvm/test/MC/AMDGPU amdgcn-target-directive-subarch-cpu-field.s

Fix test after rebases
DeltaFile
+2-2llvm/test/MC/AMDGPU/amdgcn-target-directive-subarch-cpu-field.s
+2-21 files

LLVM/project f0f77c3llvm/include/llvm/MC MCSubtargetInfo.h

Drop setCPU change
DeltaFile
+0-4llvm/include/llvm/MC/MCSubtargetInfo.h
+0-41 files

LLVM/project ecf1e24llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/test/MC/AMDGPU hsa-diag-v4.s isa-version-pal.s

Clarify .amdgcn_target processor mismatch diagnostic
DeltaFile
+25-8llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+4-4llvm/test/MC/AMDGPU/hsa-diag-v4.s
+2-2llvm/test/MC/AMDGPU/isa-version-pal.s
+1-1llvm/test/MC/AMDGPU/isa-version-unk.s
+1-1llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
+1-1llvm/test/MC/AMDGPU/isa-version-hsa.s
+34-176 files

LLVM/project 3fb0288llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

AMDGPU: Respect target assembler directives over command line

Mutate the global subtarget, using essentially the same code that ARM uses.
The main difference is we need to mutate the actual CPU name in addition
to just flipping the feature bits, so this needs a new setter in
MCSubtargetInfo. Liberalize the triple check so that after #206480,
old assembly files to not break on new assembler invocations.

For some reason we have 2 different assembler directives that indicate the
target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal. Previously,
we would take the target from the command line and then error if the directive
did not exactly match. In order to move away from depending on the xnack and
sramecc subtarget features, start treating the directives as a change of target,
similar to ARM's .cpu and .arch directives.

Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc. Ideally
we would introduce new independent directives for these.

Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+65-7llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+33-0llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+5-5llvm/test/MC/AMDGPU/hsa-diag-v4.s
+7-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+3-3llvm/test/MC/AMDGPU/isa-version-pal.s
+3-3llvm/test/MC/AMDGPU/isa-version-hsa.s
+116-1810 files not shown
+132-2916 files

FreeNAS/freenas 0bbb899src/middlewared/middlewared/api/v26_0_0 pool.py, src/middlewared/middlewared/api/v27_0_0 pool.py

NAS-141716 / 27.0.0-BETA.1 / enforce vdev topology limits and add force_topology (by anodos325) (#19285)

Enforce equal data-vdev width and cap RAIDZ/mirror width at 15/4 in
pool.create and pool.update, mirroring truenas_pylibzfs. Add
force_topology (26 API) to bypass these topology policy checks and the
special/dedup redundancy rule; structural checks still apply. Reject
force_topology on Enterprise-licensed systems.

Original PR: https://github.com/truenas/middleware/pull/19282

---------

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+196-0src/middlewared/middlewared/pytest/unit/plugins/pool/test_validate_topology.py
+76-12src/middlewared/middlewared/plugins/pool_/pool.py
+10-0src/middlewared/middlewared/api/v27_0_0/pool.py
+10-0src/middlewared/middlewared/api/v26_0_0/pool.py
+292-124 files

LLVM/project b949971flang/lib/Semantics openmp-utils.cpp check-omp-variant.cpp, flang/test/Semantics/OpenMP metadirective-loop-nest.f90 metadirective-loop-applicability.f90

[flang][OpenMP] Fix metadirective loop semantic checks

This is a follow-up to #207088.

Post-merge review feedback:

* Rename mayVariantBeSelected to MayVariantBeSelected and move it to
  the shared OpenMP semantic utilities so declare-variant checking can
  reuse it.
* Explain why a WHEN selector is recorded only when its modifier list
  contains exactly one element.
* Diagnose loop-associated variants that end a declaration-only
  program unit, such as a module with no execution part.

Additional correctness fixes:

* Handle consecutive metadirectives and modules or submodules with
  contained procedures without silently dropping an earlier
  loop-associated variant.

    [7 lines not shown]
DeltaFile
+123-0flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
+76-0flang/lib/Semantics/openmp-utils.cpp
+16-41flang/lib/Semantics/check-omp-variant.cpp
+53-0flang/lib/Semantics/check-omp-structure.cpp
+15-0flang/test/Semantics/OpenMP/metadirective-loop-applicability.f90
+11-1flang/lib/Semantics/check-omp-structure.h
+294-421 files not shown
+304-427 files

OpenBSD/src IgDUdltusr.bin/tmux window-copy.c

   Apply dragging change to scroll-down as well as scroll-up.
VersionDeltaFile
1.417+12-1usr.bin/tmux/window-copy.c
+12-11 files

LLVM/project 6c243b8llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU GCNSubtarget.h

AMDGPU: Validate processor and features in TargetID parsing

TargetID::parseTargetIDString previously only checked that the string was
structurally a 4-component triple followed by a processor field. It
accepted unrecognized processors and silently ignored malformed or
unsupported feature modifiers. Work towards improving validation so in
the future clang's copy of TargetID can be replaced.

Co-authored-by: Claude (Opus 4.8)
DeltaFile
+128-46llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+149-0llvm/unittests/TargetParser/TargetParserTest.cpp
+20-2llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+7-3llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+5-3llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+3-1llvm/lib/Target/AMDGPU/GCNSubtarget.h
+312-551 files not shown
+313-567 files

LLVM/project c09fc4blibcxx/utils/libcxx/test dsl.py

[libcxx][test] Fingerprint the compiler when memoizing results (#208311)

This fixes a cache invalidation problem with flag support checks when
rebasing & re-building the just-built clang.
DeltaFile
+21-1libcxx/utils/libcxx/test/dsl.py
+21-11 files

LLVM/project b2c3d3fllvm/test/CodeGen/AMDGPU amdgpu-codegenprepare-idiv.ll vector-reduce-fminimum.ll, llvm/test/Transforms/SLPVectorizer/X86 idiv-by-const.ll

Merge remote-tracking branch 'origin/main' into users/ziqingluo/PR-179151882

 Conflicts:
        clang/include/clang/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.h
        clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
        clang/lib/ScalableStaticAnalysis/Analyses/TypeConstrainedPointers/TypeConstrainedPointers.cpp
        clang/test/Analysis/Scalable/TypeConstrainedPointers/type-constrained-pointers.cpp
DeltaFile
+1,419-2,129llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+1,640-1,695llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
+1,482-1,543llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
+0-3,000llvm/test/tools/llvm-profgen/Inputs/cs-preinline-cost.perfscript
+3,000-0llvm/test/tools/llvm-profgen/X86/Inputs/cs-preinline-cost.perfscript
+2,262-0llvm/test/Transforms/SLPVectorizer/X86/idiv-by-const.ll
+9,803-8,3672,890 files not shown
+59,784-36,7012,896 files

LLVM/project 699de30clang/docs OpenMPSupport.md, clang/include/clang/Basic DiagnosticSemaKinds.td

Fix review comments
DeltaFile
+9-9clang/docs/OpenMPSupport.md
+4-2clang/lib/Parse/ParseOpenMP.cpp
+1-1clang/include/clang/Basic/DiagnosticSemaKinds.td
+14-123 files

LLVM/project c3e7059clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver amdgpu-mcpu.cl hip-sanitize-options.hip

clang/AMDGPU: Stop passing redundant -target-cpu to cc1

Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
DeltaFile
+62-62clang/test/Driver/amdgpu-mcpu.cl
+26-26clang/test/Driver/hip-sanitize-options.hip
+20-10clang/lib/Driver/ToolChains/CommonArgs.cpp
+12-16clang/test/Driver/hip-rdc-device-only.hip
+24-0clang/test/Preprocessor/amdgpu-subarch-cc1-target-cpu.cl
+10-10clang/test/Driver/amdgpu-xnack-sramecc-flags.c
+154-12427 files not shown
+214-21133 files

NetBSD/pkgsrc-wip b39c20ddpbox Makefile distinfo

dpbox: update to 6.1.2

Fixes two stack buffer overflows caught on Linux/glibc with FORTIFY:

- dp_vnr_sub was declared char[4] but holds a 6-character version
  suffix, overflowing at startup in init_box().
- gen_sftest() declared STR7[100] but passed 255 as the snprintf bound.
  A MYBBS command carrying a hierarchical address overran the buffer.
  On platforms whose libc does not fortify, this presented as an
  intermittent, optimization-dependent crash.

Also adds unconditional <time.h> includes (they were reachable only
inside an #ifdef __macos__ branch) and bounds two strcpy calls into
calltype.
DeltaFile
+4-4dpbox/Makefile
+4-3dpbox/distinfo
+8-72 files

FreeBSD/ports 1a96ab6java/apache-commons-httpclient Makefile

java/apache-commons-httpclient: deprecate

Superseded by www/httpclient.
No expiration date as editors/openoffice-4 and editors/openoffice-devel
depend on it.

PR:     296671
Approved-by:    Alex Dupre <ale@>
DeltaFile
+3-1java/apache-commons-httpclient/Makefile
+3-11 files

LLVM/project a61acedlibunwind/test aix_vapi_unw_resume.pass.cpp

WIP: Avoid "volatile deprecation" woes
DeltaFile
+3-1libunwind/test/aix_vapi_unw_resume.pass.cpp
+3-11 files

LLVM/project 9e3a985libunwind/test aix_vapi_unw_resume.pass.cpp

Fix order-of-evaluation issue by introducing sequence point
DeltaFile
+2-1libunwind/test/aix_vapi_unw_resume.pass.cpp
+2-11 files

LLVM/project 742c791libunwind/test aix_vapi_unw_resume.pass.cpp

WIP: clang-format
DeltaFile
+3-1libunwind/test/aix_vapi_unw_resume.pass.cpp
+3-11 files

LLVM/project 73872aflibunwind/test aix_vapi_unw_resume.pass.cpp

WIP: IBM Bob, tweaked: Add synthetic output when LLU not enabled
DeltaFile
+31-0libunwind/test/aix_vapi_unw_resume.pass.cpp
+31-01 files

LLVM/project e6549e3libunwind/test aix_vapi_unw_resume.pass.cpp

WIP: clang-format: tweaked to retain CHECK lines
DeltaFile
+7-5libunwind/test/aix_vapi_unw_resume.pass.cpp
+7-51 files

LLVM/project 79e67dblibunwind/test aix_vapi_unw_resume.pass.cpp

WIP: IBM Bob: Suppress diagnostic: pointer is not accessed
DeltaFile
+3-0libunwind/test/aix_vapi_unw_resume.pass.cpp
+3-01 files

LLVM/project 50779a3libunwind/test aix_vapi_unw_resume.pass.cpp

WIP: IBM Bob: Add positive CHECK lines for VAPI return address
DeltaFile
+2-0libunwind/test/aix_vapi_unw_resume.pass.cpp
+2-01 files