LLVM/project e99f35bflang/include/flang/Semantics openmp-utils.h, flang/lib/Semantics openmp-utils.cpp check-omp-loop.cpp

[flang][OpenMP] Implement LoopSequence class, calculate sequence length (#185296)

This is a tree-like structure that can represent nesting of loop
sequences, or, if the sequences are of length 1, a loop nest.

Issue: https://github.com/llvm/llvm-project/issues/185287
DeltaFile
+83-0flang/lib/Semantics/openmp-utils.cpp
+49-8flang/include/flang/Semantics/openmp-utils.h
+1-37flang/lib/Semantics/check-omp-loop.cpp
+1-0flang/test/Semantics/OpenMP/loop-transformation-construct01.f90
+134-454 files

LLVM/project 7f0111bbolt/include/bolt/Passes PAuthGadgetScanner.h

Update the comment
DeltaFile
+1-1bolt/include/bolt/Passes/PAuthGadgetScanner.h
+1-11 files

LLVM/project 8677f49llvm/include/llvm/Analysis DependenceAnalysis.h, llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Refactor the signature of the Weak Zero SIV tests (NFC) (#185825)

Change the signatures of the Weak Zero SIV tests, specifically by
passing an addrec directly instead of separating it into the coefficient
and constant. This form is more useful to address the several
correctness issues in those tests.
DeltaFile
+13-22llvm/lib/Analysis/DependenceAnalysis.cpp
+4-8llvm/include/llvm/Analysis/DependenceAnalysis.h
+17-302 files

FreeNAS/freenas 97468acsrc/middlewared/middlewared main.py, src/middlewared/middlewared/plugins/disk_ retaste.py disk_events.py

Wait for `disk.retaste` job to complete
DeltaFile
+15-4src/middlewared/middlewared/main.py
+2-2src/middlewared/middlewared/plugins/failover_/event.py
+1-1src/middlewared/middlewared/plugins/pool_/pool.py
+1-1src/middlewared/middlewared/plugins/pool_/export.py
+1-1src/middlewared/middlewared/plugins/disk_/retaste.py
+1-1src/middlewared/middlewared/plugins/disk_/disk_events.py
+21-106 files

LLVM/project bb72ec4offload/ci openmp-offload-amdgpu-clang-flang.py

[Offload] AMD Flang bot to use CMake cache file (#186070)

Converting the current bot config to use the CMake cache file that we
use in other bots (offload/cmake/caches/AMDGPUBot.cmake). This PR
removes all CMake settings that the cache file already sets and only
leaves those that were either not set explicitly or which differ.

Thus, first load the cache file and then adjust the settings to override
existing values.
DeltaFile
+2-17offload/ci/openmp-offload-amdgpu-clang-flang.py
+2-171 files

LLVM/project cacf225llvm/docs/PDB CodeViewSymbols.rst, llvm/include/llvm/DebugInfo/CodeView SymbolRecord.h

[LLVM][CodeView] Add `S_REGREL32_INDIR` (#183172)

This adds `RegRelativeIndirSym` (`S_REGREL32_INDIR`) as a record, so we
can emit and dump it (#34392). It encodes a variable at the location
`*($Register+ Offset) + OffsetInUdt` and is used by MSVC in C++ 20
coroutines and C++ 17 structured bindings. Clang also needs this for
coroutines (for `__promise` which has the location `DW_OP_deref,
DW_OP_plus_uconst, 16`).

For example:

```cpp
struct Foo { int a, b; };

void fn() {
  Foo f = {1, 2};
  //  ╰─ S_REGREL32{ reg = rsp, offset = 0 }
  auto &[x, y] = f;
  //     │  ╰─ S_REGREL32_INDIR{ reg = rsp, offset = 8, offset-in-udt = 4, type = int }

    [17 lines not shown]
DeltaFile
+52-0llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
+36-0llvm/docs/PDB/CodeViewSymbols.rst
+20-0llvm/include/llvm/DebugInfo/CodeView/SymbolRecord.h
+11-0llvm/lib/DebugInfo/CodeView/SymbolRecordMapping.cpp
+11-0llvm/lib/DebugInfo/CodeView/SymbolDumper.cpp
+11-0llvm/tools/llvm-pdbutil/MinimalSymbolDumper.cpp
+141-08 files not shown
+177-214 files

LLVM/project 5e88771clang/test/CodeGen arm-bf16-getset-intrinsics.c, clang/test/CodeGen/AArch64 bf16-getset-intrinsics.c

[Clang][AArch64] Remove duplicate CodeGen test for bf16 get/set intrinsics (#186084)

The following test files contain identical test bodies (aside from the
RUN lines):

  * clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
  * clang/test/CodeGen/arm-bf16-getset-intrinsics.c

The differences in the RUN lines do not appear to be relevant for the
tested functionality. This change keeps a single test file and
simplifies its RUN lines to match the generic style used in
clang/test/CodeGen/AArch64/neon.

This also moves toward unifying and reusing RUN lines across tests.
DeltaFile
+0-175clang/test/CodeGen/arm-bf16-getset-intrinsics.c
+1-2clang/test/CodeGen/AArch64/bf16-getset-intrinsics.c
+1-1772 files

LLVM/project 93b4720clang/lib/CodeGen/Targets AMDGPU.cpp

[AMDGPU] Address post-commit review of #177343 (#186064)

- OpenCL has no cluster scope so "cluster-one-as" does not exist and
cannot be emitted.
DeltaFile
+2-1clang/lib/CodeGen/Targets/AMDGPU.cpp
+2-11 files

LLVM/project 78d8a94flang/include/flang/Semantics openmp-utils.h

Fix merge error
DeltaFile
+0-8flang/include/flang/Semantics/openmp-utils.h
+0-81 files

LLVM/project ad81f7bllvm/docs AMDGPUUsage.rst

Address comments
DeltaFile
+50-54llvm/docs/AMDGPUUsage.rst
+50-541 files

LLVM/project 2f573acclang/test/CodeGen scoped-atomic-ops.c, llvm/test/CodeGen/AArch64 clmul-fixed.ll

Merge branch 'main' into users/kparzysz/e06-sequence-class
DeltaFile
+853-1,663llvm/test/CodeGen/AArch64/clmul-fixed.ll
+927-1,424llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
+706-1,470llvm/test/CodeGen/X86/funnel-shift-i512.ll
+1,769-0llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
+1,189-529llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+1,419-130clang/test/CodeGen/scoped-atomic-ops.c
+6,863-5,2162,631 files not shown
+112,605-40,6552,637 files

LLVM/project 1cd094fopenmp/tools/omptest CMakeLists.txt

Revert "[OpenMP][OMPT] Remove Threads dependency from omptest" (#186111)

Reverts llvm/llvm-project#185930

Breaks various buildbots
DeltaFile
+4-0openmp/tools/omptest/CMakeLists.txt
+4-01 files

LLVM/project e78c797llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp, llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

[AMDGPU] Allow bank conflicts on src0 for V_DUAL_MOV_B32 for gfx1170 (#186100)
DeltaFile
+147-339llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
+238-112llvm/test/CodeGen/AMDGPU/vopd-combine.mir
+8-0llvm/test/MC/AMDGPU/gfx1170_asm_features.s
+2-2llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+2-1llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+397-4545 files

LLVM/project ef7301cclang/lib/Sema SemaHLSL.cpp HLSLBuiltinTypeDeclBuilder.cpp, clang/test/CodeGenHLSL/resources Texture2D-Subscript.hlsl

[HLSL] Implement Texture2D::operator[]

Implments the Texture2D::operator[] method. It uses the same design as
Buffer::operator[]. However, this requires us to chagne the
resource_getpointer intrinsic to accept integer vectors for the index.

Assisted-by: Gemini
DeltaFile
+74-0clang/test/CodeGenHLSL/resources/Texture2D-Subscript.hlsl
+40-4clang/lib/Sema/SemaHLSL.cpp
+27-1clang/test/SemaHLSL/BuiltIns/resource_getpointer-errors.hlsl
+21-7clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+14-14llvm/test/Transforms/SimplifyCFG/DirectX/no-sink-dxgetpointer.ll
+12-12llvm/test/Transforms/GVN/no-sink-dxgetpointer.ll
+188-3818 files not shown
+312-10024 files

LLVM/project ef8db55flang/lib/Semantics openmp-utils.cpp

[flang][OpenMP] Implement checks of intervening code (#185295)

Invalid intervening code will cause the containing loop to be the final
loop in the loop nest. Transparent intervening code will not affect
perfect nesting if present. Currently compiler directives are considered
transparent to allow code mixing OpenMP and such directives to compile.

Issue: https://github.com/llvm/llvm-project/issues/185287
DeltaFile
+153-2flang/lib/Semantics/openmp-utils.cpp
+153-21 files

LLVM/project 7e39b52clang/test/CodeGen scoped-atomic-ops.c, llvm/test/CodeGen/AMDGPU llvm.amdgcn.cvt.pkrtz.ll maximumnum.ll

Merge branch 'main' into users/kasuga-fj/da-fix-signature-of-weak-zero-siv
DeltaFile
+927-1,424llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
+706-1,470llvm/test/CodeGen/X86/funnel-shift-i512.ll
+1,769-0llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
+1,189-529llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+1,419-130clang/test/CodeGen/scoped-atomic-ops.c
+1,240-0llvm/test/CodeGen/AMDGPU/maximumnum.ll
+7,250-3,5531,053 files not shown
+43,288-15,6521,059 files

LLVM/project fb0cb77llvm/lib/Transforms/Vectorize VPlanPredicator.cpp VPlanDominatorTree.h, llvm/test/Transforms/LoopVectorize if-pred-stores.ll hoist-predicated-loads-with-predicated-stores.ll

[VPlan] Simplify the computation of the block entry mask. (#173265)

When encountering a control-flow join, VPPredicator emit a disjunction
over the incoming edge masks as the entry mask of the joining block.
However, such a complex mask is not always necessary. If the block is
control-flow equivalent to the header block, we can directly use the
header block’s entry mask as the entry mask of that block.

This patch introduces a VPlan post-dominator tree to determine whether a
block is control-flow equivalent to the header block, and simplifies the
computation of block masks accordingly.

Based on #178724
DeltaFile
+18-23llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+10-10llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+17-2llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+6-10llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+6-6llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
+9-0llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
+66-511 files not shown
+69-557 files

NetBSD/pkgsrc HAtqoCydoc CHANGES-2026

   Updated security/defguard, security/defguard-gateway, security/defguard-proxy
VersionDeltaFile
1.1706+4-1doc/CHANGES-2026
+4-11 files

NetBSD/pkgsrc ok93E4Psecurity/defguard-proxy distinfo cargo-depends.mk, security/defguard-proxy/patches patch-Cargo.toml

   defguard-proxy: updated to 1.6.3

   1.6.3

   This is a patch for the major 1.6 release.
   It includes dependency updates to resolve the following CVEs:

   CVE-2026-25541
   CVE-2026-25727
   CVE-2026-25639
   CVE-2026-2391
VersionDeltaFile
1.3+608-539security/defguard-proxy/distinfo
1.3+199-177security/defguard-proxy/cargo-depends.mk
1.4+2-8security/defguard-proxy/Makefile
1.2+2-2security/defguard-proxy/patches/patch-Cargo.toml
+811-7264 files

NetBSD/pkgsrc QcoMBf1security/defguard-gateway distinfo cargo-depends.mk, security/defguard-gateway/patches patch-Cargo.toml patch-src_enterprise_firewall_packetfilter_calls.rs

   defguard-gateway: updated to 1.6.3

   1.6.3

   This is a security patch for the major 1.6 release.
   It includes dependency updates to resolve the following CVEs:

   CVE-2026-25541
   CVE-2026-25727
VersionDeltaFile
1.3+786-491security/defguard-gateway/distinfo
1.3+258-161security/defguard-gateway/cargo-depends.mk
1.3+8-8security/defguard-gateway/patches/patch-Cargo.toml
1.1+14-0security/defguard-gateway/patches/patch-src_enterprise_firewall_packetfilter_calls.rs
1.4+2-8security/defguard-gateway/Makefile
+1,068-6685 files

NetBSD/pkgsrc WcbospUsecurity/defguard distinfo cargo-depends.mk

   defguard: updated to 1.6.4

   1.6.4

   This is a security patch for the major 1.6 release.
   It includes dependency updates to resolve the following CVEs:

   CVE-2026-25537
   GHSA-7587-4wv6-m68m
   GHSA-8h58-w33p-wq3g
   GHSA-c7ph-f7jm-xv4w
   CVE-2026-25727
   CVE-2026-25639
   CVE-2026-2391
VersionDeltaFile
1.3+826-781security/defguard/distinfo
1.3+272-257security/defguard/cargo-depends.mk
1.3+8-2security/defguard/version.mk
1.4+1-7security/defguard/Makefile
+1,107-1,0474 files

LLVM/project 2c4f4efllvm/test/CodeGen/AMDGPU coalesce-copy-to-agpr-to-av-registers.mir

[AMDGPU] Fix missing "---" in MIR test. NFCI. (#186097)

The only problem this caused was confusing the update script so that it
failed to update checks in the following function.
DeltaFile
+1-0llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
+1-01 files

LLVM/project 9a81d71libc/cmake/modules prepare_libc_gpu_build.cmake

[libc] Use the proper name for the 'llvm-gpu-loader' (#186101)

Summary:
This used to be two separate executables but was merged awhile back. The
LLVM libc code was never updated to use the new tool name and a recent
refactoring unintentionally removed the symlinks. Just look for
`llvm-gpu-loader`.
DeltaFile
+3-13libc/cmake/modules/prepare_libc_gpu_build.cmake
+3-131 files

NetBSD/pkgsrc gNs0fgbdoc CHANGES-2026

   doc: Updated net/xfr to 0.9.4
VersionDeltaFile
1.1705+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc bSiCpFYnet/xfr distinfo Makefile

   net/xfr: update to 0.9.4

   Added

       --no-mdns flag (#41) — xfr serve --no-mdns disables mDNS service registration for environments where multicast is unwanted or another service already uses mDNS.
       server.no_mdns config support — also configurable via [server] no_mdns = true in ~/.config/xfr/config.toml.

   Changed

       Delta retransmits in interval reports (#36) — plain text interval lines now show per-interval retransmit deltas instead of cumulative totals, making it easier to spot when retransmits actually occur. Hidden intervals from --omit, --quiet, or larger --interval settings no longer get folded into the next visible rtx: value. Final summary still shows cumulative totals.
VersionDeltaFile
1.6+4-4net/xfr/distinfo
1.6+2-2net/xfr/Makefile
1.6+0-0net/xfr/cargo-depends.mk
+6-63 files

NetBSD/pkgsrc hjs7GYJdoc CHANGES-2026

   doc: Updated devel/serie to 0.7.0
VersionDeltaFile
1.1704+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 0aZzz5qdevel/serie distinfo cargo-depends.mk

   devel/serie: update to 0.7.0

   What's Changed

       Refresh by @lusingander in #131
       Dealing with HEAD not pointing to a commit by @lusingander in #133
       Rename some keys in keybindings by @lusingander in #136
       Add some new user command variables by @lusingander in #137
       User command reorganization by @lusingander in #138
       Improve handling of space-separated variables by @lusingander in #139
       Add suspend user command type by @lusingander in #140
VersionDeltaFile
1.21+43-43devel/serie/distinfo
1.21+13-13devel/serie/cargo-depends.mk
1.22+3-3devel/serie/Makefile
+59-593 files

LLVM/project 3a8c16fllvm/test/CodeGen/AMDGPU memset-pattern.ll

Add AS7 tests
DeltaFile
+1,066-0llvm/test/CodeGen/AMDGPU/memset-pattern.ll
+1,066-01 files

LLVM/project 90d8edfllvm/lib/Transforms/Utils LowerMemIntrinsics.cpp, llvm/test/CodeGen/AMDGPU memset-pattern.ll lower-buffer-fat-pointers-mem-transfer.ll

[LowerMemIntrinsics][AMDGPU] Optimize memset.pattern lowering

This patch changes the lowering of the [experimental.memset.pattern intrinsic](https://llvm.org/docs/LangRef.html#llvm-experimental-memset-pattern-intrinsic)
to match the optimized memset and memcpy lowering when possible. (The tl;dr of
memset.pattern is that it is like memset, except that you can use it to set
values that are wider than a single byte.)

The memset.pattern lowering now queries `TTI::getMemcpyLoopLoweringType` for a
preferred memory access type. If the size of that type is a multiple of the set
value's type, and if both types have consistent store and alloc sizes (since
memset.pattern behaves in a way that is not well suitable for access widening
if store and alloc size differ), the memset.pattern is lowered into two loops:
a main loop that stores a sufficiently wide vector splat of the SetValue with
the preferred memory access type and a residual loop that covers the remaining
set values individually.

In contrast to the memset lowering, this patch doesn't include a specialized
lowering for residual loops with known constant lengths. Loops that are
statically known to be unreachable will not be emitted.

    [7 lines not shown]
DeltaFile
+745-0llvm/test/CodeGen/AMDGPU/memset-pattern.ll
+273-0llvm/test/Transforms/PreISelIntrinsicLowering/AMDGPU/memset-pattern.ll
+105-56llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+104-30llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
+31-31llvm/test/CodeGen/RISCV/memset-pattern.ll
+14-14llvm/test/Transforms/PreISelIntrinsicLowering/RISCV/memset-pattern.ll
+1,272-1315 files not shown
+1,297-14511 files

LLVM/project 95bc1abllvm/lib/Transforms/Utils LowerMemIntrinsics.cpp, llvm/test/Transforms/PreISelIntrinsicLowering/X86 memcpy-inline-non-constant-len.ll memset-inline-non-constant-len.ll

[LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion

This patch refactors insertLoopExpansion and allows it to skip loops that are
statically known to be unreachable and make conditional branches with a
statically known condition unconditional. Those situations arise when the loop
count is a known constant.

These cases don't occur at the existing call sites in the memcpy and memset
lowering, since they have custom handling for constant loop sizes anyway. They
will however occur in a follow-up patch that uses insertLoopExpansion for
memset.pattern, where similar custom handling for constant loop sizes would
make less sense.

This is mostly NFC with the current use except for slight changes in the branch
weight computation from profiling data (which causes the included test
changes).
DeltaFile
+194-85llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+5-5llvm/test/Transforms/PreISelIntrinsicLowering/X86/memcpy-inline-non-constant-len.ll
+3-3llvm/test/Transforms/PreISelIntrinsicLowering/X86/memset-inline-non-constant-len.ll
+202-933 files