LLVM/project a1a2d57clang/docs CMakeLists.txt, clang/include/clang/Options ClangOptionDocs.td Options.td

Revert "[clang][docs] Generate command line reference as Markdown" (#221937)

Reverts llvm/llvm-project#220385

This has broken several flang pipelines:
-
https://github.com/llvm/llvm-project/actions/runs/34051600098/job/101536096902?pr=218746
- https://github.com/llvm/llvm-project/actions/runs/34200642862
DeltaFile
+26-39clang/utils/TableGen/ClangOptionDocEmitter.cpp
+32-33clang/include/clang/Options/Options.td
+13-12clang/include/clang/Options/ClangOptionDocs.td
+6-6clang/docs/CMakeLists.txt
+77-904 files

FreeBSD/ports 7b61c8bdevel/iscd-commons/files patch-CMakeLists.txt

devel/iscd-commons: fix with cmake-4.5

PR:             298294
Reported by:    arrowd
DeltaFile
+3-2devel/iscd-commons/files/patch-CMakeLists.txt
+3-21 files

LLVM/project 781848doffload/include Program.h, offload/libompaccsupport PluginManager.cpp device.cpp

[offload][omp] Load and resolve device binaries through liboffload

Migrate DeviceTy::loadBinary and global/kernel symbol resolution off
GenericPluginTy::load_binary/get_global/get_function onto liboffload's
Program/Symbol API, encapsulated in a new ProgramTy abstraction that wraps
an ol_program_handle_t. Kernel symbol resolution still needs the plugin's
opaque GenericKernelTy* handle for the legacy launch path, obtained via a
temporary __ol_tgt_GetKernelFromSymbol helper rather than new public
liboffload API surface. Removes the now-dead __tgt_device_binary type and
the corresponding GenericPluginTy methods and exports entries.
DeltaFile
+0-73offload/plugins-nextgen/common/src/PluginInterface.cpp
+69-0offload/libompaccsupport/Program.cpp
+43-22offload/libompaccsupport/device.cpp
+47-0offload/include/Program.h
+20-10offload/libompaccsupport/PluginManager.cpp
+0-12offload/plugins-nextgen/common/include/PluginInterface.h
+179-1175 files not shown
+194-12611 files

FreeBSD/ports a61f1f7devel/nexus2-oss Makefile, devel/nexus2-oss/files patch-conf_wrapper.conf pkg-message.in

devel/nexus2-oss: Bump and adapt consumer for sysutils/javaservicewrapper update
DeltaFile
+7-5devel/nexus2-oss/files/pkg-message.in
+4-4devel/nexus2-oss/Makefile
+4-3devel/nexus2-oss/files/patch-conf_wrapper.conf
+15-123 files

FreeBSD/ports 0d1c72e. UPDATING, sysutils/javaservicewrapper pkg-message Makefile

sysutils/javaservicewrapper: Update to 3.7.3
DeltaFile
+3-247sysutils/javaservicewrapper/pkg-plist
+19-31sysutils/javaservicewrapper/Makefile
+20-0sysutils/javaservicewrapper/files/patch-build.xml
+4-7sysutils/javaservicewrapper/pkg-message
+8-0UPDATING
+8-0sysutils/javaservicewrapper/files/patch-src_java_module-info.java
+62-2851 files not shown
+65-2887 files

LLVM/project 283b9b5lldb/docs/resources test.md

[lldb][docs] Remove duplicate title in test doc (#221944)
DeltaFile
+6-8lldb/docs/resources/test.md
+6-81 files

LLVM/project 1f15665llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

[AArch64] Add a fast-path for AArch64InstrInfo::getInstSizeInBytes (NFC) (#221894)

Improves CTMark geomean -0.07% on aarch64-O0-g.

https://llvm-compile-time-tracker.com/compare.php?from=97cbc1e404b980edc58bfbcabb6f1c61793b624b&to=be1403a1f2db85c9443fa8300fa8522561bea90a&stat=instructions:u

Assisted-by: codex
DeltaFile
+6-1llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+6-11 files

LLVM/project 803252allvm/include/llvm/IR DerivedTypes.h, llvm/include/llvm/Support TypeSize.h

[NFC][LLVM] Remove TypeSize::multiplyCoefficientBy(). (#221215)

TypeSize implements operator*() that performs the same operation.
DeltaFile
+9-14llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+14-8llvm/include/llvm/Support/TypeSize.h
+9-11llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+3-3llvm/include/llvm/IR/DerivedTypes.h
+2-3llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
+40-435 files not shown
+46-5311 files

LLVM/project 97ad26dllvm/lib/Transforms/Scalar LoopFlatten.cpp, llvm/test/Transforms/LoopFlatten invalidate-scev-pr203176.ll

[LoopFlatten] Invalidate SCEV on each widening (#211819)

LoopFlatten can update a loop before deciding on not to flatten it due
to profitability. SCEV has cached loop information during the checks and
the widening, where it can lead to stale data if the pass bails at
flattening. Invalidate it after each successful widening.

Fixes #203176

Co-authored-by: Steve Gustaman <stevegustaman at kaist.ac.kr>
DeltaFile
+96-0llvm/test/Transforms/LoopFlatten/invalidate-scev-pr203176.ll
+1-0llvm/lib/Transforms/Scalar/LoopFlatten.cpp
+97-02 files

LLVM/project b3071f2clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn-vi-f16.hip builtins-amdgcn.hip

[CIR][AMDGPU] Add support for AMDGCN class builtins (#213496)

Adds codegen for the following AMDGCN class builtins:

- __builtin_amdgcn_class (double)
- __builtin_amdgcn_classf (float)
- __builtin_amdgcn_classh (half)

These are lowered to the corresponding `llvm.amdgcn.class` intrinsics.
DeltaFile
+16-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+4-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-vi-f16.hip
+28-63 files

LLVM/project e66c97cllvm/lib/Transforms/IPO OpenMPOpt.cpp, llvm/test/Transforms/OpenMP callback_parallel_regions.ll spmdization_no_guarding_two_reaching_kernels.ll

[OpenMPOpt] Ask the runtime how many of a block's threads can be workers

The custom state machine gates a thread on InitCB < BlockHwSize - WarpSize,
reconstructing the number of worker threads from the block size on the
assumption that the main thread occupies a whole warp above them. The DeviceRTL
already computes that number, in mapping::getMaxTeamThreads(), and its own
generic state machine gates on it in shouldEnterStateMachine(). Export it as
__kmpc_get_max_team_threads() and call that instead, so the compiler's state
machine and the runtime's agree by construction rather than by arithmetic that
has to be kept in step with the launch geometry.

This is NFC here: getMaxTeamThreads() in generic mode is BlockSize - WarpSize,
the same three instructions folded into one call. It is not NFC for a toolchain
whose launch geometry differs. In ROCm, CGOpenMPRuntimeGPU starts a single extra
thread rather than a warp -- "Only one additional thread is started, not an
entire warp" -- so thread_limit(1024) on a 64-lane target launches 961 threads
and the runtime reports 960 workers, while the state machine's own arithmetic
says 961 - 64 = 897. The threads in between are in neither group: the state
machine returns immediately for them, and the parallel region still hands them

    [12 lines not shown]
DeltaFile
+32-64llvm/test/Transforms/OpenMP/spmdization.ll
+24-48llvm/test/Transforms/OpenMP/custom_state_machines.ll
+22-30llvm/lib/Transforms/IPO/OpenMPOpt.cpp
+8-16llvm/test/Transforms/OpenMP/spmdization_indirect.ll
+6-12llvm/test/Transforms/OpenMP/spmdization_no_guarding_two_reaching_kernels.ll
+4-8llvm/test/Transforms/OpenMP/callback_parallel_regions.ll
+96-1784 files not shown
+113-18310 files

LLVM/project cc836f7llvm/include/llvm/Frontend/OpenMP OMPKinds.def, llvm/lib/Transforms/IPO OpenMPOpt.cpp

[OpenMPOpt] Look inside the callbacks the loop runtime functions are handed

The __kmpc_{distribute_,for_,distribute_for_}static_loop_* functions receive the
loop body as a callback, so a parallel region written inside that body is
reachable from the kernel through the runtime call. AAKernelInfo could not see
that, and recorded the call as reaching an unknown parallel region. A kernel
using these functions therefore always got a worker state machine whose only
option was to indirectly call whatever work function it was handed.

Describe the callback argument of each of these functions in OMPKinds.def and
attach the corresponding !callback metadata in OpenMPOpt, then fold the
callback's AAKernelInfo state into the caller's. The state machine can now
dispatch directly to the regions the loop body actually reaches. Relax the two
"more than one callee means give up" checks for functions carrying !callback,
since the callback edge is a second edge by construction and is analyzable.

The conservative unknown-region record is kept for the case that motivated it, a
callback we only see a declaration of.


    [39 lines not shown]
DeltaFile
+239-0llvm/test/Transforms/OpenMP/callback_parallel_regions.ll
+99-10llvm/lib/Transforms/IPO/OpenMPOpt.cpp
+51-0llvm/include/llvm/Frontend/OpenMP/OMPKinds.def
+48-0offload/test/offloading/fortran/target-teams-distribute-nested-parallel-do.f90
+437-104 files

LLVM/project 3165606llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Remove (X && Y) | (X && !Y) -> X combine. NFC

We have smaller combines that can take care of this now that we process recipes in a worklist
DeltaFile
+1-8llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-81 files

LLVM/project 4376cfaclang/docs CMakeLists.txt, clang/include/clang/Options ClangOptionDocs.td Options.td

Revert "[clang][docs] Generate command line reference as Markdown (#220385)"

This reverts commit 2cbdbc9ad7ff40457023c8f353161069df8eb57f.
DeltaFile
+26-39clang/utils/TableGen/ClangOptionDocEmitter.cpp
+32-33clang/include/clang/Options/Options.td
+13-12clang/include/clang/Options/ClangOptionDocs.td
+6-6clang/docs/CMakeLists.txt
+77-904 files

NetBSD/src q6TJehjsys/arch/ofppc/conf 43P150

   a kernel config for the IBM 43P/150
VersionDeltaFile
1.1+349-0sys/arch/ofppc/conf/43P150
+349-01 files

LLVM/project 010c395llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/RISCV tail-folding-complex-mask.ll

[VPlan] Append recipes created via builder to worklist

The previous PR appended the top most created recipe to the worklist, and this PR extends it to any other nested recipes that were created, similar to InstCombine.

This removes the header mask in a good few more places on RISC-V as measured on SPEC CPU 2017, e.g. for the following loop:

```c
long f(const int *p, const int *q, long n) {
  long a = 0, b = 0;
  for (long i = 0;; i++) {
    if (p[i] && q[i]) { a += i; b += i; }
    if (i + 1 == n) break;
  }
  return a + b;
}
```

Before:


    [49 lines not shown]
DeltaFile
+26-8llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+11-4llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+5-7llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+42-193 files

LLVM/project 29d3af7llvm/docs LangRef.md, llvm/lib/CodeGen MachineBlockPlacement.cpp

IR: Add verifier checks and LangRef for llvm.loop.align

Verify the nested !{!"llvm.loop.align", i32 N} tag.
Require exactly two operands, an integer constant of type i32 or smaller,
and a positive power-of-two value

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+121-0llvm/test/Verifier/llvm.loop.align.ll
+28-0llvm/test/Assembler/llvm.loop.align.ll
+27-0llvm/lib/IR/Verifier.cpp
+15-0llvm/docs/LangRef.md
+0-3llvm/lib/CodeGen/MachineBlockPlacement.cpp
+191-35 files

LLVM/project 2224e14llvm/lib/Target/AMDGPU GCNSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU sched_mfma_rewrite_diff_types.mir gfx-callable-argument-types.ll

[AMDGPU][CodeGen] Allow remat with multiple users in multiple regions

This relaxes one of the constraints on rematerialization candidates in
the scheduler's `PreRARematStage`. The current implementation only allows
rematerializing a register if it has users in a single region. This
allows it when a register has multiple users in multiple regions.

In such cases the register is rematerialized as many times as there are
using regions, just before the first user in each using region. The cost
model for assessing rematerialization opportunities now takes into
account that mutliple new instructions may be created for each candidate.
DeltaFile
+664-537llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
+202-167llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
+102-61llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+36-25llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir
+22-24llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+17-12llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir
+1,043-8262 files not shown
+1,047-8328 files

LLVM/project b182b41llvm/include/llvm/CodeGen RegisterPressure.h, llvm/lib/CodeGen MachineScheduler.cpp RegisterPressure.cpp

[CodeGen] Correctly classify/mark dead defs when adjusting lane liveness (#215595)

Despite what the documentation of `adjustLaneLiveness` states, the
method never sets dead flags on dead def operands, even when missing
dead flags can later lead to machine verifier errors.

This makes the method identify dead definitions from definitions that
are initially thought to be alive, and makes it add a dead flag on the
last definition of a virtual register, matching the behavior expected by
the machine verifier (ref. "Instruction ending live segment on dead slot
has no dead flag").

`adjustLaneLiveness` and `detectDeadDefs` now also use the same
mechanism to identify dead definitions. It relies on comparing the
defined lanes of a definition with those that stay alive after it.
DeltaFile
+91-0llvm/unittests/CodeGen/RegisterPressureTest.cpp
+24-27llvm/lib/CodeGen/RegisterPressure.cpp
+13-8llvm/include/llvm/CodeGen/RegisterPressure.h
+2-2llvm/lib/CodeGen/MachineScheduler.cpp
+1-1llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+1-0llvm/unittests/CodeGen/CMakeLists.txt
+132-386 files

LLVM/project 7afb0e1llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp AMDGPUAttributor.cpp, llvm/test/Bitcode amdgcn-addrspacecast-nonnull.ll

AMDGPU: Remove llvm.amdgcn.addrspacecast.nonnull

The intrinsic is fully replaced by the nonnull flag on addrspacecast,
so remove it.

Old bitcode/IR is autoupgraded, though this is very conservative. This
intrinsic was only inserted by the backend, and hopefully nobody was
directly emitting it.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+0-68llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
+42-0llvm/test/Bitcode/amdgcn-addrspacecast-nonnull.ll
+5-36llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-26llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+12-12llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
+5-13llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+65-15510 files not shown
+98-19416 files

LLVM/project 44065d1llvm/lib/Target/AMDGPU AMDGPUCodeGenPrepare.cpp, llvm/test/CodeGen/AMDGPU codegen-prepare-addrspacecast-non-null.ll

AMDGPU: Set the addrspacecast nonnull flag instead of the intrinsic

AMDGPUCodeGenPrepare proved the source of certain flat<->local/private
addrspacecasts non-null and rewrote them to
llvm.amdgcn.addrspacecast.nonnull. Now that the flag is honored in
codegen, set it in place on the existing instruction instead.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+15-10llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+12-12llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
+27-222 files

LLVM/project 7bf85caclang/include/clang/Basic BuiltinsX86_64.td, clang/lib/AST ExprConstant.cpp

[X86] Remove x86 PDEP/PEXT clang intrinsics and rely on generic elementwise implementations (#204969)

The clang frontend already converted the x86 builtins to generics, this just moves to using the elementwise builtins directly.
DeltaFile
+26-25compiler-rt/lib/msan/tests/msan_test.cpp
+9-12clang/lib/AST/ByteCode/InterpBuiltin.cpp
+0-10clang/lib/CodeGen/TargetBuiltins/X86.cpp
+4-4clang/lib/Headers/bmi2intrin.h
+1-4clang/lib/AST/ExprConstant.cpp
+0-2clang/include/clang/Basic/BuiltinsX86_64.td
+40-571 files not shown
+40-597 files

LLVM/project 698dd11llvm/include/llvm/CodeGen SelectionDAGNodes.h, llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp SelectionDAG.cpp

AMDGPU: Use the addrspacecast nonnull flag in codegen (#220926)

Plumb the nonnull flag through to the backend so a flagged addrspacecast
lowers without the runtime null check, matching what
llvm.amdgcn.addrspacecast.nonnull already provides.

Add the NonNull MIFlag with MIR printer/parser support (including the
MIRPrinter path and update_mir_test_checks) so it round-trips on
G_ADDRSPACE_CAST, and preserve it through SelectionDAG vector
scalarization and splitting.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+299-0llvm/test/CodeGen/AMDGPU/addrspacecast-nonnull.ll
+23-0llvm/test/CodeGen/MIR/AMDGPU/addrspacecast-nonnull.mir
+8-6llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+9-5llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+7-6llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+9-4llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+355-2111 files not shown
+386-2617 files

LLVM/project 87c39e6llvm/include/llvm/Analysis ConstantFolding.h, llvm/lib/Analysis InstructionSimplify.cpp ScalarEvolution.cpp

[ConstantFolding] Implement canConstantFoldCallTo() using TLI (#221903)

This did some odd matching on string names. Use TLI instead, matching
the actual constant folding logic.

I've adjusted callers to pass TLI to canConstantFoldCallTo() if they
also pass TLI to the later constant folding call.
DeltaFile
+99-81llvm/lib/Analysis/ConstantFolding.cpp
+19-13llvm/lib/Analysis/ScalarEvolution.cpp
+6-2llvm/lib/Transforms/Utils/SCCPSolver.cpp
+2-1llvm/include/llvm/Analysis/ConstantFolding.h
+1-1llvm/lib/Analysis/InstructionSimplify.cpp
+127-985 files

LLVM/project c66a8b4llvm/test/CodeGen/AArch64 arm64-abi_align.ll, llvm/test/CodeGen/Hexagon/vect vect-xor.ll vect-v4i16.ll

llvm: Remove phantom relocation-model attributes from tests

"relocation-model" was never a real function attribute.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-4llvm/test/CodeGen/AArch64/arm64-abi_align.ll
+2-2llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
+1-1llvm/test/Transforms/LoopVectorize/vectorize-once.ll
+1-1llvm/test/Transforms/LoopVectorize/dbg.value.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
+10-102 files not shown
+12-128 files

LLVM/project ce58f58llvm/test/CodeGen/AArch64 arm64-abi_align.ll, llvm/test/CodeGen/Hexagon/vect vect-xor.ll vect-v4i16.ll

llvm: Remove phantom ssp-buffers-size attributes from tests

"ssp-buffers-size" was never a real function attribute. There is
"stack-protector-buffer-size". This may have existed in a downstream
fork, but it's also irrelevant for these tests.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-4llvm/test/CodeGen/AArch64/arm64-abi_align.ll
+2-2llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
+1-1llvm/test/Transforms/LoopVectorize/vectorize-once.ll
+1-1llvm/test/Transforms/LoopVectorize/dbg.value.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
+10-102 files not shown
+12-128 files

NetBSD/src glE8nwSsys/arch/ofppc/ofppc machdep.c

   - use ofprint() for debug output so we have a chance to see it
   - do not BAT-map anything beyond 0xff000000 - my 43P gets quite grouchy if we do
   - copy EDID properties from OF like macppc does, for things like mach64 where
     X can program video modes but can't (relably) do DDC
VersionDeltaFile
1.122+19-6sys/arch/ofppc/ofppc/machdep.c
+19-61 files

LLVM/project 67cf7e1llvm/test/CodeGen/AArch64 arm64-abi_align.ll, llvm/test/CodeGen/Hexagon/vect vect-xor.ll vect-v4i16.ll

llvm: Remove phantom fp-contract-model attributes from tests

This attribute has never been consumed by upstream llvm,
or emitted by upstream clang. I can only guess this existed in
at least one downstream fork.
DeltaFile
+4-4llvm/test/CodeGen/AArch64/arm64-abi_align.ll
+2-2llvm/test/Transforms/SimplifyCFG/volatile-phioper.ll
+1-1llvm/test/Transforms/LoopVectorize/vectorize-once.ll
+1-1llvm/test/Transforms/LoopVectorize/dbg.value.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-xor.ll
+1-1llvm/test/CodeGen/Hexagon/vect/vect-v4i16.ll
+10-102 files not shown
+12-128 files

OpenBSD/ports XgC8lyAmultimedia/pipewire/pipewire/files/sndio sndio.c sndio-source.c

   rm -rf
VersionDeltaFile
1.2+0-0multimedia/pipewire/pipewire/files/sndio/sndio.c
1.2+0-0multimedia/pipewire/pipewire/files/sndio/sndio-source.c
1.2+0-0multimedia/pipewire/pipewire/files/sndio/sndio-sink.c
1.2+0-0multimedia/pipewire/pipewire/files/sndio/sndio-pcm.h
1.2+0-0multimedia/pipewire/pipewire/files/sndio/plugin.c
1.2+0-0multimedia/pipewire/pipewire/files/sndio/meson.build
+0-06 files

LLVM/project fc884a4llvm/test/CodeGen/AMDGPU prevent-fmul-hoist-ir.ll fdot2.ll, llvm/test/CodeGen/AMDGPU/GlobalISel combine-fma-add-ext-fma.ll combine-fma-add-fma-mul.ll

AMDGPU: Rename stale CONTRACT check prefixes in fp-contract tests (#221709)

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+434-434llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-fma-mul.ll
+23-23llvm/test/CodeGen/AMDGPU/fdot2.ll
+1-5llvm/test/CodeGen/AMDGPU/prevent-fmul-hoist-ir.ll
+1-3llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-add-ext-fma.ll
+459-4654 files