[MLGO] Remove std includes from pre-generated test models (#230724)
c90b6414e607 (#227941) always registers the test models in
llvm/lib/Analysis/models/*.inc.
The generated InlinerModels.h and RegAllocEvictModels.h include each
model header inside a namespace.
With LLVM_ENABLE_MODULES=ON, the models' `#include <map>` and `#include
<string>` become module imports inside that namespace, which clang
rejects:
error: redundant #include of module 'std_map' appears within namespace
'llvm::regalloc_Model1_ns'
[-Wmodules-import-nested-redundant]
This patch removes the includes, since MLInlineAdvisor.cpp and
MLRegAllocEvictAdvisor.cpp already include <map> and <string> before the
model headers.
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[Mips] Remove unused -mips-fix-global-base-reg (#230733)
Unused since 3ecc5273c148 (2012). Remove its RUN
lines from tls-static.ll, whose STATIC32/STATIC64 checks cover the same
output, and delete the disabled global-pointer-reg.ll.
[BOLT] Restore -relax-plt as a deprecated no-op option
c6ee71d5e8a5 removed -relax-plt from the AArch64 relaxation pass, which
makes llvm-bolt reject existing command lines that still pass it.
Re-add the option as a hidden no-op that only prints a deprecation
warning, so scripts using it keep working.
databases/openldap2[567]-server: fix COLLECT_DESC
The collect overlay implements collective attributes (RFC 3671);
describe it as such instead of "Collect overy Services".
more minor updates:
- split out VIS-based updatefb()
- fix some tpyos in the speed test code
- add updatefb() variant for 32bit pixels and 64bit long
- run all speed tests appropriate for CPU and graphics mode
[RISCV] Declare command line options in TableGen (#230014)
Move the cl::opts of RISCVCodeGen into RISCVOptions.td, and those of
RISCVDesc and RISCVAsmParser into MCTargetDesc/RISCVMCOptions.td,
registered by LLVMInitializeRISCVTargetMC(). RISCVTargetMachine holds
`const RISCVOptions &CLOpts` and RISCVSubtarget copies it;
RISCVAsmBackend, RISCVInstPrinter, and RISCVTargetStreamer hold `const
RISCVMCOptions &CLOpts`. -riscv-rvv-regalloc (RegisterPassParser) stays
cl::opt.
`llvm-objdump -M emit-x8-as-fp` now sets a file-static flag instead of
writing the cl::opt.
-riscv-br-merging-base-cost now takes effect when given once; it
previously required getNumOccurrences() > 1.
Aided by Opus 5.5
[AMDGPU] Fold add of a variable into a zero dot accumulator
When the dot intrinsic has a zero accumulator, no clamp and a single
add user, fold the add operand into the accumulator:
```llvm
%dot = call i32 @llvm.amdgcn.sdot4(i32 %a, i32 %b, i32 0, i1 false)
%r = add i32 %dot, %x
=>
%r = call i32 @llvm.amdgcn.sdot4(i32 %a, i32 %b, i32 %x, i1 false)
```
If %x is defined after the dot in the same block, the dot is moved
down to the add. The fold is skipped across blocks to avoid sinking
the dot into a loop.
[Clang][AMDGPU] Use unsigned int for tensor builtin D# groups (#230714)
The D# tensor descriptor groups of __builtin_amdgcn_tensor_load_to_lds
and __builtin_amdgcn_tensor_store_from_lds are bit fields, not signed
values. D0 was already declared as a vector of unsigned int; D1 through
D4 are now consistent with it.
OpenCL does not allow lax vector conversions, so the tests are updated
to pass unsigned vectors. The generated IR is unchanged.
Reference: https://github.com/llvm/llvm-project/pull/193310
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
