[lldb][AArch64][Linux] Use member initialisers (#197122)
Member initialise a bunch of things in the register context instead of
setting them all in the constructor with memsets.
The only things I've left are related to hardware breakpoints, and need
changes to non-AArch64 classes so I'll try that separately.
I have not changed the validity bools because those will be removed by
#197113.
[LV] Handle FSub Partial Reductions (#197134)
Reland #191186 after fixing up test failures
Introduces a new RecurKind value 'FSub' in order to handle partial
reductions of floating point values.
This is done by following the existing method for integer partial
reductions, doing a positive accumulation followed by a final
subtraction in the middle block.
[AArch64][ISel] Use SVE for fixed width vector reductions (#195806)
Enable custom lowering for v2i64 [s|u][min|max] reductions for SVE. This
allows fixed-width SVE to use predicated reductions such as smaxv where
NEON has no native equivalent.
Remove the fixed-length vector preference to allow more SVE reduction
operations to be selected when appropriate.
[LV][NFC] Make ARM/mve-selectandorcost.ll test more robust (#197388)
The test currently has an fdiv in the loop, which leads to vector costs
that are almost identical to the scalar cost. This makes the test
fragile and future cost model work for VPDerivedIVRecipe will cause the
test to favour the scalar version. I've changed the fdiv to fmul to make
the test more robust.
[lldb][windows] remove mandatory ordering of the lldb-python.h header (#197298)
`PosixApi.h` typedef'd `pid_t` as `uint32_t`, while Python's
`pyconfig.h` on Windows typedef's it as `int`. C++ forbids redeclaring a
typedef with a different type, so the two headers cannot coexist. The
`NO_PID_T` macro in `lldb-python.h` suppressed LLDB's typedef, but only
if `lldb-python.h` got included before `PosixApi.h`.
`pid_t` on Windows was originally defined in d87fc157d2b7. At this time,
there was no Python support for LLDB on Windows and `uint32_t` matches
the `DWORD` type used by the Win32 API for process IDs.
This patch matches the Python type in `PosixApi.h`, removing the need
for the include ordering.
This is a follow up to https://github.com/llvm/llvm-project/pull/197048.
nuageinit: fix command injection and related issues
- Add shell_escape() helper to safely escape shell arguments
- Apply shell_escape to all user-controlled values in shell commands:
adduser (usershow, useradd, lock, primary_group, groups)
addgroup (groupshow, groupadd, members)
exec_change_password (usermod)
settimezone (tzsetup root and timezone)
install_package (pkg package names)
- Escape double quotes in hostname when writing rc.conf.d/hostname
- Add missing 'local' declaration for resolvconf_command in nameservers()
- Escape interface name in resolvconf -a command
- Change open_resolvconf_conf() from 'w' to 'a' mode to prevent
data loss when nameservers() is called multiple times
- Clean up stale resolvconf.conf at the start of each boot
(skip on postnet to preserve config written by first call)
MFC After: 1 day
(cherry picked from commit 8b70a203be10411c560ed303ab25713d70b316e9)
[LV] Store DataLayout on VPTypeAnalysis (NFC) (#197231)
Using `R->getParent()->getPlan()->getDataLayout()` limits
`inferScalarType` to recipes within blocks that have been attached to a
plan.
(Hit while re-basing a PR)
[lldb] Step over non-lldb breakpoints (#190622)
Note: this is a second attempt at 304c680 / #174348, hopefully fixing
the post-commit Mac testing failures. The main differences from the
previous commit are:
* Fixing the incorrect masks in ArchitectureArm.cpp
* Declining to step in StopInfoMachException if the PC and exception
exc_sub_code don't match - implies fixup already applied
* Change to reflect explicit Address constructor - I assume this is
correct, essentially explicitly making a temporary Address object of the
pc address in SkipOverTrapInstruction
* Removing the debugserver code to step over the trap instruction as it
interacts badly with this change (without the check mentioned
previously).
---
Several languages support some sort of "breakpoint" function, which adds
ISA-specific instructions to generate an interrupt at runtime. However,
[31 lines not shown]
[AggressiveInstCombine] POPCNT generation for bit-count pattern (#177109)
The proposal is to enhance LLVM by teaching it to recognize the pattern
and replace it with the hardware POPCNT instruction.
---------
Co-authored-by: Rohit Aggarwal <Rohit.Aggarwal at amd.com>
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Do not expect JSON output from TNC delete calls
This commit fixes a case where TNC's `DELETE /v1/systems/:id` endpoint returns 200 with an empty/non-JSON body, causing `unset_registration_details` to crash with `aiohttp.ContentTypeError` while attempting to decode the response as JSON. Passing `get_response=False` skips the body decode since the response payload is not used.
(cherry picked from commit 1ba1a484b5c216697e2ffb51dbf9fb585f5b0756)
[AMDGPU] Align GlobalISel with SelectionDAG for f16 to i1/i8 saturated conversions (#188019)
GlobaISel now also saturates `i1` and `i8` to `f16` conversion at `i16`
where available. As a side effect, this also causes the two uniform test
cases: `f16_i1` and `f16_i8` to use VALU instructions, instead of SALU
instructions. This is potentially sub-optimal but it makes it consistent
with ISel and has been already highlighted as future work in #187711.
