[win][x64] Windows x64 unwind v3: Update epilog inheritance per spec clarification (#202778)
The Windows x64 unwind v3 spec was clarified
(MicrosoftDocs/cpp-docs#5936) to state that an EPILOG_INFO_V3 record
with `NumberOfOps == 0` inherits its effective fields from the first
*preceding* descriptor with `NumberOfOps != 0` (the "base"), not the
immediately preceding one. Additionally, Flags bits 0 and 1 are no
longer inherited; the producer must replicate them so they match the
base descriptor.
- Encoder (MCWin64EH.cpp): compare each epilog against the tracked base
descriptor, and emit EPILOG_INFO_LARGE in inherited descriptors' own
flags byte.
- Decoder (Win64EH.cpp): track the base index and inherit from it; keep
the record's own flags byte instead of copying the previous record's.
- Dumpers (llvm-readobj, llvm-objdump): reword "previous epilog" to
"base epilog".
- Tests: update multi-epilog expectations and add a LARGE
inherited-epilog case to seh-unwindv3-inheritance.s.
CI: Have zfs-build-packages workflow build tarballs on Alma (#18662)
Previously, zfs-build-packages would only build source tarballs
on Fedora due to problems with building them on RHEL 7. That's
a relic of the past now, as we haven't supported RHEL 7 since
it went EOL in 2024. With this change, we now build the tarballs
on both Alma and Fedora.
Signed-off-by: Tony Hutter <hutter2 at llnl.gov>
Reviewed-by: Olaf Faaland <faaland1 at llnl.gov>
Reviewed-by: Chris Longros <chris.longros at gmail.com>
[CIR] Implement throw within an aggregate expression (#203404)
This implements CIR support for throwing an exception from within a
branch of a ternary expression that represents an aggregate prvalue. We
previously had support for throwing an exception within a ternary
aggregate expression, but when the expression uses a prvalue, it goes
through a different code path. The new implementation is just calling an
existing function from a different place. The bulk of what's being added
here is the testing.
net/realtek-re-kmod: update to 1.102.01 release (add support for 10G cards)
This forked version includes many fixes and performance improvements
over the previous 1.101.00 release. If you previously disabled the
checksum offloading due to crashes, you should now be able to re-add it.
[mlir][LLVM][ROCDL] Add buffer oob mode module flags, flag interfaces (#202729)
Now that the out-of-bounds mode for buffer accesses will be controlled
by a module flag and is no longer a function of the subtarget triple (as
of #160922) and since `ptr addrpace(7)` lowering will start respecting
this mode soon, add MLIR-level support for setting this flag.
After a few iterations, I think adding this module flag to
`llvm.module.flags` but adding interfaces for module flag attributes (so
that those wishing to set this flag don't need to know it has `max`
combining semantics or look up the enum values) is a
minimally-disruptive way to get a more ergonomic wrapper around this
functionality.
AI note: AI generated the code hehe, I reviewed it. The documentation
update to ModuleFlagsOp is mine.
(The LLVM PR that would want people to start explicitly setting
`relaxed` is #134329)
Co-authored-by: Codex <codex at openai.com>
rc.d/routing: Silence errors for loopback routes
_loopback entry in `static_routes` ensures a loopback route
exists in all routing tables.
However, loopback routes may already be added by the kernel.
Therefore, re-adding them triggers an `EEXIST` error on every boot.
This change suppresses those harmless errors.
PR: 259553
MFC after: 1 week
Reviewed by: glebius, jlduran, markj
Differential Revision: https://reviews.freebsd.org/D57470
[MLIR][LLVM] Preserve unknown function metadata on import
Import non-debug function metadata without a kind-specific dialect conversion into LLVMFuncOp function_metadata. Preserve repeated metadata kinds through the generic carrier so LLVM IR import and export can round-trip those attachments.
[MLIR][LLVM] Translate LLVMFuncOp function metadata
Materialize LLVMFuncOp function_metadata through ModuleTranslation metadata conversion. Attach function metadata after module-level symbols are mapped so metadata references to functions, globals, aliases, and ifuncs can be resolved.
[MLIR][LLVM] Add function metadata to LLVMFuncOp
Add a generic LLVM dialect carrier for LLVM IR function metadata on LLVMFuncOp.
Represent attachments as an ordered list so repeated metadata kinds, such as
multiple type metadata attachments, can be preserved while keeping metadata names
language-agnostic.
[MLIR][LLVM] Preserve global value metadata operands on import
Import global value references inside LLVM metadata operands as LLVM dialect metadata symbol-reference attributes. Add llvm.read_register import coverage for function, global, alias, and nameless-global metadata operands.
[NFC][VPlan] Split `makeMemOpWideningDecisions` into subpasses
The idea is to have handling of strided memory operations (either from
https://github.com/llvm/llvm-project/pull/147297 or for VPlan-based
multiversioning for unit-strided accesses) done after some mandatory
processing has been performed (e.g., some types **must** be scalarized)
but before legacy CM's decision to widen (gather/scatter) or scalarize
has been committed.
And in longer term, we can uplift all other memory widening decision to
be done here directly at VPlan level. I expect this structure would also
be beneficial for that.
[AArch64] Optimize vector slide shuffles with zeros to use shift instructions (#185170)
We currently emit `movi`+`ext` instructions when generating code for
shuffle slides of a 64-bit vector left/right and fill it with zeros.
This patch optimizes these patterns to use a single `ushr`/`shl`
instruction instead.
Example:
```llvm
define <8 x i8> @slide_left(<8 x i8> %v) {
%r = shufflevector <8 x i8> %v, <8 x i8> zeroinitializer,
<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
ret <8 x i8> %r
}
```
Before, we generate:
```
movi v1.2d, #0
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