LLVM/project f94d461llvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-unspill-regunit-interference.mir

Added test for regunit case for checkInterference.
DeltaFile
+87-0llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-unspill-regunit-interference.mir
+87-01 files

LLVM/project bc34224llvm/include/llvm/CodeGen LiveRegMatrix.h, llvm/lib/CodeGen LiveRegMatrix.cpp

Fix bugs in slot-index-based checkInterference and use for unspill.

Rather than constructing a temporary "hull" LiveInterval and calling the
LiveInterval-based checkInterference overload -- which risks a query-cache
identity hazard when that temporary interval is stack-allocated and reused
across the AllocOrder loop (see the FIXME comment in
LiveRegMatrix::checkInterference(SlotIndex, SlotIndex, MCRegister)) -- this
patch switches the unspilling code to call the slot-index-based
checkInterference(SlotIndex, SlotIndex, MCRegister) overload directly with
the hull's [beginIndex, endIndex).

Doing so exposed a real bug in that overload: LiveRegMatrix.h documents
that returning false means "PhysReg is free at [Start, End)", but the
implementation only checked the matrix of already-assigned virtual
registers. It never checked fixed register-unit interference (e.g. PhysReg
is defined directly by some instruction in [Start, End)) or regmask
interference (e.g. PhysReg is clobbered by a call in [Start, End)) -- both
of which the LiveInterval-based overload does check. This patch adds both
checks to the slot-index-based overload, in the same priority order

    [29 lines not shown]
DeltaFile
+33-1llvm/lib/CodeGen/LiveRegMatrix.cpp
+22-4llvm/include/llvm/CodeGen/LiveRegMatrix.h
+55-52 files

LLVM/project 1e5b84fllvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-unspill-regmask-interference.mir

test for regmask.
DeltaFile
+63-0llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-unspill-regmask-interference.mir
+63-01 files

LLVM/project be682f8llvm/lib/Target/AMDGPU AMDGPURewriteAGPRCopyMFMA.cpp

Revert "Fixed lit test failure"

This reverts commit 63dea4d3ed2de9f21093bbe13600e992be513ed6.
DeltaFile
+1-20llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+1-201 files

LLVM/project e59947fllvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-spill-discontiguous-interval.mir

Use new triple format, remove unnecessary attribute.
DeltaFile
+2-3llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-discontiguous-interval.mir
+2-31 files

LLVM/project 66e8146llvm/lib/Target/AMDGPU AMDGPURewriteAGPRCopyMFMA.cpp

Fixed lit test failure
inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir.
DeltaFile
+20-1llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+20-11 files

LLVM/project 29a1655llvm/lib/Target/AMDGPU AMDGPURewriteAGPRCopyMFMA.cpp

Use checkInterference directly on begin and end slot-index.
DeltaFile
+1-7llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+1-71 files

LLVM/project 02f6756llvm/lib/Target/AMDGPU AMDGPURewriteAGPRCopyMFMA.cpp, llvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-spill-discontiguous-interval.mir

[AMDGPU] Fix overlapping insert crash during rewrite-agpr-copy-mfma

Fixes https://github.com/llvm/llvm-project/issues/204224

Guard against a possibly wrong interference result for a discontiguous
stack slot interval by using the entire range.

A spilled stack slot can have a discontiguous live interval, e.g. a single
value live across several disjoint segments:

  [a, b)  [c, d)  ........gap........  [e, f)

with gaps where the slot is dead. The interference check previously only
considered the covered segments, so it could pick a PhysReg that is free
within them but busy inside a gap. Unspilling replaces the slot with a vreg
whose recomputed interval is continuous over [a, f) (it fills the gaps),
so assigning that PhysReg could overlap the value live in the gap and trip
the "Overlapping insert" assertion in LiveRegMatrix::assign. Checking
interference over the whole [a, f) hull avoids this.

    [2 lines not shown]
DeltaFile
+734-0llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-discontiguous-interval.mir
+14-1llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+748-12 files

LLVM/project 241e034clang/include/clang/Basic BuiltinsPPC.def, clang/lib/Headers altivec.h

[PowerPC] Add missing vec_msum and vec_vmsumudm builtins for POWER9 (#221199)

This patch exposes `__builtin_altivec_vmsumudm` in `BuiltinsPPC.def` and
adds the missing `vec_msum` and `vec_vmsumudm` intrinsics in
`<altivec.h>` matching GCC 11+ behavior.
DeltaFile
+25-0clang/test/SemaCXX/altivec-vec-msum-p9.cpp
+19-0clang/lib/Headers/altivec.h
+17-0clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c
+2-0clang/include/clang/Basic/BuiltinsPPC.def
+63-04 files

LLVM/project 18db3eelibc/src/__support/printf_core parser.h, libc/test/UnitTest LibcTest.cpp StringUtils.h

[libc] Template printf_core::Parser to support wchar_t. (#222988)

This is the next step in the ongoing refactor to support wide character
printf functions.

`printf_core::FormatSection` is also templated on character type as it
is required for parser_test. `FormatSection` is named in many more
places. In order to keep this PR on the smaller side, it also gets a
rename + `char` alias in the pattern of `basic_string_view` /
`string_view`.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+197-144libc/test/src/__support/printf_core/parser_test.cpp
+88-86libc/src/__support/printf_core/parser.h
+29-19libc/test/UnitTest/PrintfMatcher.cpp
+31-8libc/test/UnitTest/PrintfMatcher.h
+35-0libc/test/UnitTest/StringUtils.h
+2-31libc/test/UnitTest/LibcTest.cpp
+382-2886 files not shown
+418-29812 files

LLVM/project 83d02acllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/RISCV fadd-fmul-dagcombine.ll

[DAGCombine] Do not gate a pre-legalization FADD fold on FMUL legality (#218748)

Now follows the same check as `fold (fadd A, (fneg B)) -> (fsub A, B)`
and `fold (fadd (fneg A), B) -> (fsub B, A)` a few lines above

Co-authored-by: Claude (Claude-Opus-5) <noreply at anthropic.com>
DeltaFile
+51-0llvm/test/CodeGen/RISCV/fadd-fmul-dagcombine.ll
+2-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+53-12 files

LLVM/project 800e7f8clang-tools-extra/clangd/refactor/tweaks ExtractFunction.cpp, clang-tools-extra/clangd/unittests/tweaks ExtractFunctionTests.cpp

[clangd] Offer Extract to Function for single expression-statements (#219945)

The tweak refused to trigger whenever the extraction zone contained a
single statement that was an expression, e.g. a lone call like
`log("connection failed");` or an overloaded-operator statement like
`std::cout << "x";`. The former was blocked by an overly broad check in
validSingleChild(); the latter additionally required
getParentOfRootStmts() to recognize that such a statement can be its own
root statement even while marked Unselected, rather than being treated
as a container of root statements.

Fixes clangd/clangd#698
Fixes  clangd/clangd#1254

Assisted-by: Claude
DeltaFile
+47-21clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
+56-8clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.md
+108-293 files

LLVM/project 017933cllvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv vector-interleave-fixed.ll

fixup! Account for cases where the size exceeds MVT
DeltaFile
+11,997-4llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+3-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+12,000-52 files

LLVM/project 8ad4ac7utils/bazel/llvm-project-overlay/libc BUILD.bazel libc_build_rules.bzl, utils/bazel/llvm-project-overlay/libc/startup/linux BUILD.bazel startup_rules.bzl

[bazel][libc] Add targets for startup objects on linux (#218995)

This PR adds Bazel targets for `crt{1,i,n}.o` startup objects on Linux
x86-64.
DeltaFile
+173-0utils/bazel/llvm-project-overlay/libc/startup/linux/startup_rules.bzl
+104-0utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
+47-0utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
+41-2utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+366-25 files

LLVM/project 09fc36fllvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU coexec-sched-ds-fifo.mir llvm.amdgcn.sched.group.barrier.gfx12.ll

Address comments.
DeltaFile
+13-11llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+5-5llvm/test/CodeGen/AMDGPU/coexec-mfma-interleave-gfx950.ll
+5-5llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+2-3llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
+1-1llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
+26-255 files

OpenZFS/src bf71aafman/man4 spl.4, module/os/linux/spl spl-kmem-cache.c

spl: Honour forced Linux slab cache selection

spl_kmem_cache_slab_limit controls automatic cache selection. An
explicit KMC_SLAB request should override that cutoff, but the Linux
slab branch applies it again. With a zero cutoff, this rejects the
forced znode cache. Pool creation later dereferences the NULL cache in
spl_kmem_cache_alloc().

Automatic selection has already applied the cutoff before this branch.
Remove the redundant check so KMC_SLAB retains its documented force
semantics, and clarify the automatic cutoff's scope in spl(4).

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Matthias Goergens <matthias.goergens at gmail.com>
Closes #19095
DeltaFile
+6-5man/man4/spl.4
+0-3module/os/linux/spl/spl-kmem-cache.c
+6-82 files

FreeBSD/ports a481ad6security/cryptopp-modern Makefile distinfo, security/cryptopp-modern/files patch-pull76

security/cryptopp-modern: Update to 2026.9.1

ChangeLog:
https://github.com/cryptopp-modern/cryptopp-modern/releases/tag/2026.9.1

MFH:            2026Q3
DeltaFile
+0-162security/cryptopp-modern/files/patch-pull76
+3-3security/cryptopp-modern/distinfo
+2-3security/cryptopp-modern/Makefile
+5-1683 files

FreeBSD/ports 211be70security/gopass Makefile distinfo

security/gopass: Update to 1.17.2

ChangeLog:      https://github.com/gopasspw/gopass/releases/tag/v1.17.2
                https://github.com/gopasspw/gopass/releases/tag/v1.17.1
MFH:            2026Q3
DeltaFile
+7-7security/gopass/distinfo
+1-2security/gopass/Makefile
+8-92 files

HardenedBSD/ports 76d2d15devel/juce/files patch-modules_juce__graphics_image__formats_pnglib_powerpc_filter__vsx__intrinsics.c, devel/maki Makefile.crates distinfo

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+501-375devel/maki/distinfo
+771-0devel/juce/files/patch-modules_juce__graphics_image__formats_pnglib_powerpc_filter__vsx__intrinsics.c
+227-227sysutils/rust-coreutils/distinfo
+249-186devel/maki/Makefile.crates
+112-112sysutils/rust-coreutils/Makefile.crates
+175-0print/publisher-devel/Makefile
+2,035-900269 files not shown
+5,398-1,570275 files

HardenedBSD/ports 15ba0ealang/ldc Makefile

lang/ldc: fix build on powerpc64*

Use proper bootstrap filename.
DeltaFile
+5-2lang/ldc/Makefile
+5-21 files

FreeBSD/ports 15ba0ealang/ldc Makefile

lang/ldc: fix build on powerpc64*

Use proper bootstrap filename.
DeltaFile
+5-2lang/ldc/Makefile
+5-21 files

LLVM/project 4e3bec1llvm/lib/Target/SPIRV SPIRVLegalizeImplicitBinding.cpp

[SPIRV] Refactor implicit binding legalization (#222848)

This change rewrites the `SPIRVLegalizeImplicitBinding` pass so that
binding collection is driven by intrinsic declarations rather than a
full-module instruction walk.

Previously, the pass used an `InstVisitor` to visit every instruction in
the module and find calls to a small set of intrinsics. The new
implementation iterates over the intrinsic declarations and their users,
making the cost proportional to the number of relevant resource calls
rather than the size of the module.

There is no change to the SPIR-V emitted for existing shaders. Implicit
bindings are still assigned the same numbers.

Other improvements include:

- Order IDs are extracted once into a `SmallVector` instead of being
recomputed on each sort comparisons.

    [15 lines not shown]
DeltaFile
+154-163llvm/lib/Target/SPIRV/SPIRVLegalizeImplicitBinding.cpp
+154-1631 files

LLVM/project cb02999llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/X86 fma-reassociate-pairs.ll

[SLP]Allow min-VF vectorization of seed-level reduction groups

Small reduced-value groups of single-use seed-level reductions may
vectorize at VF=2, if the values are used by the reduction operations
only and no scalar leftovers remain. For fadd this replaces the
ordered reduction fallback; for the other kinds trunk leaves such
groups scalar.

Reviewers: RKSimon, bababuck, MrSidims

Pull Request: https://github.com/llvm/llvm-project/pull/222757
DeltaFile
+74-15llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+15-27llvm/test/Transforms/SLPVectorizer/X86/fma-operand-index.ll
+6-14llvm/test/Transforms/SLPVectorizer/X86/reassociated-fma-reduction.ll
+11-9llvm/test/Transforms/SLPVectorizer/X86/revectorized_rdx_crash.ll
+1-1llvm/test/Transforms/PhaseOrdering/X86/fma-reassociate-pairs.ll
+107-665 files

NetBSD/pkgsrc OHGI1iPdoc pkg-vulnerabilities

   pkg-vulnerabilities: Add sickgear-[0-9]*
VersionDeltaFile
1.790+2-1doc/pkg-vulnerabilities
+2-11 files

OpenZFS/src 56e8d23module/zfs vdev.c

Stop the TRIM and initialize threads when a vdev goes offline

vdev_fault() and vdev_offline() leave the vdev not writeable, but the
TRIM or initialize thread running on it only notices that at its next
vdev_trim_should_stop() check, and it is that thread which records the
final state of the operation: since bedbc13da vdev_trim_thread() sets
VDEV_TRIM_CANCELED for a faulted vdev on its way out, and
vdev_initialize_thread() does the same.  Neither ioctl waits for that,
even though spa_vdev_state_exit() already waits for the txg to sync
exactly so the command is synchronous -- "when the command completes,
you expect no further I/O from ZFS".

So the operation is still running when the command returns: a "zpool
status -t" issued right after "zpool offline -f" reports

    loop0  FAULTED  0  0  0  external device fault  (31% trimmed, ...)

on a vdev that is already FAULTED, and the TRIM thread keeps issuing IO
to the device the administrator has just faulted.

    [37 lines not shown]
DeltaFile
+82-1module/zfs/vdev.c
+82-11 files

LLVM/project 93b2629clang/lib/CodeGen CGExpr.cpp, clang/lib/Sema SemaExpr.cpp

[clang][CodeGen] Emit lifetime markers for block-scoped compound literals in C (#219045)

In C (C99/C11/C23 §6.2.4.5), block-scoped compound literals have
automatic storage duration extending to the end of the enclosing block
scope.  Previously, Clang emitted alloca storage without lifetime
markers (@llvm.lifetime.start / @llvm.lifetime.end), preventing LLVM's
StackColoring pass from merging stack slots across disjoint scopes and
inflating stack frame size.

Following John McCall's guidance in #68746:
1. In Sema, record block-scoped compound literals in ExprCleanupObjects
so
   the enclosing full-expression is wrapped in an ExprWithCleanups.
2. In CodeGen, emit @llvm.lifetime.start before evaluating initializers
and
   schedule CallLifetimeEnd as a cleanup.

Checking a build of an x86_64 Linux kernel defconfig build, this shaves
448 bytes off the stack usage for azx_probe(), one of the larger stack

    [3 lines not shown]
DeltaFile
+142-84clang/test/AST/ast-dump-expr-json.c
+93-0clang/test/CodeGen/compound-literal-lifetime.c
+15-0clang/test/Sema/scope-check.c
+7-0clang/lib/CodeGen/CGExpr.cpp
+2-2clang/lib/Sema/SemaExpr.cpp
+4-0clang/test/CodeGen/attr-counted-by-without-sanitizers.c
+263-864 files not shown
+271-8610 files

HardenedBSD/src cb82cc9lib/msun/tests fma_test.c

lib/msun: add tests for fmaf(3) subnormals

PR:     298260
Reviewed by:    kib
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D59579
DeltaFile
+27-1lib/msun/tests/fma_test.c
+27-11 files

FreeBSD/src cb82cc9lib/msun/tests fma_test.c

lib/msun: add tests for fmaf(3) subnormals

PR:     298260
Reviewed by:    kib
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D59579
DeltaFile
+27-1lib/msun/tests/fma_test.c
+27-11 files

FreeBSD/src b08e6a3lib/msun/src s_fmaf.c

lib/msun: use the same algorithm for sw fmaf(3) as for fma(3)

This fixes rounding at the last bit for subnormals.

PR:     298260
Reviewed by:    kib
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D59579
DeltaFile
+230-24lib/msun/src/s_fmaf.c
+230-241 files

HardenedBSD/src b08e6a3lib/msun/src s_fmaf.c

lib/msun: use the same algorithm for sw fmaf(3) as for fma(3)

This fixes rounding at the last bit for subnormals.

PR:     298260
Reviewed by:    kib
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D59579
DeltaFile
+230-24lib/msun/src/s_fmaf.c
+230-241 files