FreeBSD/ports 7c406bfemulators/virtualbox-ose Makefile, emulators/virtualbox-ose-70 Makefile

emulators/virtualbox-ose*: Flavorize

While here make non-functional changes related to indentation and
formatting, make simplification of CONFLICTS_INSTALL.

Sponsored by:   UNIS Labs
DeltaFile
+23-26emulators/virtualbox-ose-legacy/Makefile
+23-26emulators/virtualbox-ose-72/Makefile
+23-26emulators/virtualbox-ose-71/Makefile
+23-25emulators/virtualbox-ose/Makefile
+21-25emulators/virtualbox-ose-70/Makefile
+0-11emulators/virtualbox-ose-nox11/Makefile
+113-1396 files not shown
+118-18812 files

GhostBSD/gib 557061esrc use_zfs.py

Add spacing for clarity in ZFS mirror tips messages
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+5-4src/use_zfs.py
+5-41 files

FreeBSD/ports 6a05e8fdevel/py-pytokens Makefile

devel/py-pytokens: Unbreak

PR:     294779
DeltaFile
+3-1devel/py-pytokens/Makefile
+3-11 files

FreeBSD/ports 68dbf9cdevel/py-treelib Makefile distinfo

devel/py-treelib: update 1.7.1 → 1.8.0
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+3-12devel/py-treelib/Makefile
+3-3devel/py-treelib/distinfo
+6-152 files

FreeBSD/ports ca5d27cbiology/py-pyrodigal Makefile distinfo, biology/py-pyrodigal/files patch-pyproject.toml

biology/py-pyrodigal: update 3.6.3 → 3.7.1
DeltaFile
+0-12biology/py-pyrodigal/files/patch-pyproject.toml
+5-3biology/py-pyrodigal/Makefile
+3-3biology/py-pyrodigal/distinfo
+8-183 files

GhostBSD/gib 7ba8495src boot_manager.py

Remove commented-out dead code in boot_manager.py
DeltaFile
+0-2src/boot_manager.py
+0-21 files

GhostBSD/gib c965f41. setup.py, src use_zfs.py boot_manager.py

Rework ZFS configuration page and fix GELI encryption with swap

- Fix encpass= ordering so it immediately follows the .eli partition
  line, preventing boot failure when swap is present
- Tie swap encryption (SWAP.eli) to disk encryption instead of a
  separate checkbox
- Redesign ZFS page to two-column layout: settings grid on the left,
  disk list on the right
- Rename "Pool Type" to "Pool Layout" and simplify ComboBox entries
  to stripe, mirror, raidz1, raidz2, raidz3
- Remove "single disk" option (replaced by stripe)
- Always show Pool Name label and entry instead of a checkbox toggle
- Remove Encrypt Swap and Mirror Swap checkboxes (swap mirror is
  handled automatically by pc-sysinstall for multi-disk pools)
- Remove duplicate password strength functions, import from gbi_common
- Remove dead code: unused variables (memory, auto), tree_selection,
  on_check_poll, on_check_swap_encrypt, on_check_swap_mirror, no-op
  row increment
- Fix self.zfs_four_k initialized as string "True" instead of bool

    [4 lines not shown]
DeltaFile
+182-339src/use_zfs.py
+1-1setup.py
+2-0src/boot_manager.py
+185-3403 files

LLVM/project 857b231llvm/lib/Target/NVPTX NVPTXInstrInfo.td

Update NVPTXInstrInfo.td
DeltaFile
+2-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-11 files

LLVM/project ca71211llvm/lib/Target/NVPTX NVPTXInstrInfo.cpp NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX machine-cse-predicate-inversion-rollback.mir machine-cse-predicate-inversion-multiple-users.ll

update rollback logic and add test exercising it
DeltaFile
+66-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-rollback.mir
+17-19llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+9-7llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
+1-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+93-274 files

LLVM/project d41815cllvm/test/CodeGen/NVPTX machine-cse-predicate-inversion-bfloat16.ll machine-cse-predicate-inversion-float16.ll

[NVPTX] Add commutativity to SETP instructions to enable MachineCSE of inverted predicates

Inverted predicates can be used freely in PTX. If we can invert a
predicate and CSE the generating instruction we can save calculating
the inverse.

Teach the NVPTX commuteInstructionImpl that SETP instructions can be
inverted to allow CSEing with previous SETP that match the inverted
form. This also inverts the branch users of the predicate to maintain
correctness.

Currently only allow the SETP inversion if all users are branches.
Future work can extend this to sel and not instructions.

Made-with: Cursor
DeltaFile
+695-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
+695-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
+679-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
+663-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
+437-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
+437-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
+3,606-013 files not shown
+5,908-419 files

LLVM/project dce4c0allvm/lib/Target/NVPTX NVPTXInstrInfo.td NVPTXInstrInfo.cpp, llvm/lib/Target/NVPTX/MCTargetDesc NVPTXInstPrinter.cpp

move cmp modes into td and update users
DeltaFile
+18-102llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+60-4llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-56llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+17-17llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+15-19llvm/lib/Target/NVPTX/NVPTX.h
+1-0llvm/lib/Target/NVPTX/CMakeLists.txt
+113-1986 files

LLVM/project fa76a14llvm/test/CodeGen/NVPTX machine-cse-predicate-inversion.ll machine-cse-predicate-no-inversion.ll

Move inversion/no inversion tests to one file. Fixup issue in machine-cse-predicate-inversion-multiple-users.ll
DeltaFile
+3,997-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion.ll
+1,525-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion.ll
+0-695llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
+0-695llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
+0-679llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
+0-663llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
+5,522-2,73211 files not shown
+5,526-5,58317 files

LLVM/project e3818eautils/bazel/llvm-project-overlay/mlir tblgen.bzl

[bazel] Fix testonly declarations in mlir (#195159)
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+0-1utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
+0-11 files

LLVM/project f1ec06cclang/lib/CIR/CodeGen CIRGenBuiltinRISCV.cpp, clang/test/CIR/CodeGenBuiltins/RISCV riscv-zbc.c

[CIR][RISCV] Support zbc builitin codegen (#193685)

Include 6 builtins: __builtin_riscv_clmul_32, __builtin_riscv_clmul_64,
__builtin_riscv_clmulh_32, __builtin_riscv_clmulh_64,
__builtin_riscv_clmulr_32, __builtin_riscv_clmulr_64.
DeltaFile
+91-0clang/test/CIR/CodeGenBuiltins/RISCV/riscv-zbc.c
+13-3clang/lib/CIR/CodeGen/CIRGenBuiltinRISCV.cpp
+104-32 files

FreeBSD/ports 97427d9www/phpvirtualbox-72 pkg-plist distinfo

www/phpvirtualbox-72: Update 7.2-2 => 7.2-3

Changelog:
https://github.com/phpvirtualbox/phpvirtualbox/releases/tag/7.2-3

Sponsored by:   UNIS Labs
MFH:            2026Q2

(cherry picked from commit 4d2c4b6b6a26a408320f0536a3b81d9d0e7dff16)
DeltaFile
+5-5www/phpvirtualbox-72/pkg-plist
+3-3www/phpvirtualbox-72/distinfo
+1-1www/phpvirtualbox-72/Makefile
+9-93 files

FreeBSD/ports 4d2c4b6www/phpvirtualbox-72 pkg-plist distinfo

www/phpvirtualbox-72: Update 7.2-2 => 7.2-3

Changelog:
https://github.com/phpvirtualbox/phpvirtualbox/releases/tag/7.2-3

Sponsored by:   UNIS Labs
MFH:            2026Q2
DeltaFile
+5-5www/phpvirtualbox-72/pkg-plist
+3-3www/phpvirtualbox-72/distinfo
+1-1www/phpvirtualbox-72/Makefile
+9-93 files

FreeBSD/ports 192fb81misc/py-polars distinfo Makefile, misc/py-polars-runtime distinfo Makefile

misc/py-polars{,-runtime}: update 1.39.3 → 1.40.1
DeltaFile
+19-0misc/py-polars-runtime/files/patch-Cargo.lock.ethnum
+10-6misc/py-polars-runtime/files/patch-Cargo.lock
+5-5misc/py-polars-runtime/distinfo
+5-4misc/py-polars-runtime/Makefile
+3-3misc/py-polars/distinfo
+1-1misc/py-polars/Makefile
+43-196 files

FreeBSD/ports b12fcbbx11/rio distinfo Makefile

x11/rio: update 0.3.11 → 0.4.0
DeltaFile
+93-77x11/rio/distinfo
+46-39x11/rio/Makefile
+139-1162 files

FreeBSD/ports 0ebffe4devel/py-distlib distinfo Makefile

devel/py-distlib: update 0.3.9 → 0.4.0
DeltaFile
+3-3devel/py-distlib/distinfo
+1-2devel/py-distlib/Makefile
+4-52 files

FreeBSD/ports e5e3662sysutils/mise distinfo Makefile

sysutils/mise: update 2026.4.25 → 2026.4.27
DeltaFile
+5-5sysutils/mise/distinfo
+2-2sysutils/mise/Makefile
+7-72 files

FreeBSD/ports 55f86dfdevel/emscripten pkg-plist distinfo

devel/emscripten: update 5.0.6 → 5.0.7
DeltaFile
+6-3devel/emscripten/pkg-plist
+3-3devel/emscripten/distinfo
+1-1devel/emscripten/Makefile
+10-73 files

FreeBSD/ports 38ec51bdevel/py-camel-converter Makefile distinfo

devel/py-camel-converter: update 5.0.1 → 5.1.0
DeltaFile
+4-4devel/py-camel-converter/Makefile
+3-3devel/py-camel-converter/distinfo
+7-72 files

LLVM/project c006fceclang/include/clang/ScalableStaticAnalysisFramework SSAFBuiltinForceLinker.h, clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis SourcePassAnalysisRegistry.h SourcePassAnalysis.h

[SSAF] Add SourcePassAnalysis framework

SourcePassAnalysis is for analyses/actions to be performed in a second
pass on source code, after the SSAF whole-program analysis.

SourcePassAnalysis is defined as an ASTConsumer abstraction that
depends on a whole-program analysis result.

This commit adds:
- SourcePassAnalysis base classes
- SourcePassAnalysis registry
- unit test for registry

rdar://175802731
DeltaFile
+105-0clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis/SourcePassAnalysisRegistry.h
+82-0clang/unittests/ScalableStaticAnalysisFramework/Registries/SourcePassAnalysisRegistryTest.cpp
+63-0clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis/SourcePassAnalysis.h
+46-0clang/lib/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis/SourcePassAnalysisRegistry.cpp
+6-0clang/include/clang/ScalableStaticAnalysisFramework/SSAFBuiltinForceLinker.h
+1-0clang/unittests/ScalableStaticAnalysisFramework/CMakeLists.txt
+303-01 files not shown
+304-07 files

LLVM/project 993ef4bclang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis PointerFlowReachableAnalysisTest.cpp

Remove PointerFlowReachableAnalysisTest

It has been renamed to UnsafeBufferReachableAnalysisTest.cpp
DeltaFile
+0-434clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis/PointerFlowReachableAnalysisTest.cpp
+0-4341 files

FreeBSD/src 839d326sys/kern uipc_shm.c

uipc_shm.c: make large page allocation interruptible

in cases there is no page pressure or when the user lost patience
waiting for very large allocation.  Other case is already handled by
vm_wait_intr().

Reported by:    "Lizzie from Eden Emulator project"
Reviewed by:    adrian, markj
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D56725
DeltaFile
+8-0sys/kern/uipc_shm.c
+8-01 files

LLVM/project 268a7a7mlir/include/mlir/Dialect/LLVMIR ROCDLOps.td, mlir/test/Dialect/LLVMIR rocdl.mlir

[mlir][rocdl] Implement GlobalStoreAsyncFromLDS (gfx1250) (#190877)
DeltaFile
+38-0mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+13-0mlir/test/Target/LLVMIR/rocdl.mlir
+13-0mlir/test/Dialect/LLVMIR/rocdl.mlir
+64-03 files

LLVM/project 9e1031aclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll atomic-rmw.ll

Merge remote-tracking branch 'origin/users/ziqingluo/PR-174874942-3' into users/ziqingluo/PR-175802731-1

 Conflicts:
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.h
        clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
DeltaFile
+648-9,339clang/test/AST/ast-dump-templates.cpp
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+2,420-2,120llvm/test/CodeGen/RISCV/atomic-rmw.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+10,672-17,0741,406 files not shown
+61,250-49,6051,412 files

FreeBSD/src 8f46ba0krb5 Makefile.inc

krb5: Adjust version to 1.22.2

Fixes:          736e411a737b
DeltaFile
+1-1krb5/Makefile.inc
+1-11 files

FreeBSD/ports 3e0fa24science Makefile, science/py-morphio Makefile pkg-descr

science/py-morphio: New port

MorphIO is a library for reading and writing neuron morphology files.
It supports the following formats:

SWC
ASC (aka. neurolucida)
H5 v1
H5 v2 is not supported anymore, see H5v2
DeltaFile
+25-0science/py-morphio/Makefile
+11-0science/py-morphio/files/patch-pyproject.toml
+7-0science/py-morphio/pkg-descr
+3-0science/py-morphio/distinfo
+1-0science/Makefile
+47-05 files

FreeBSD/ports 0ad6157science/py-pydicom distinfo Makefile

science/py-pydicom: Update to 3.0.2
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+3-3science/py-pydicom/distinfo
+1-1science/py-pydicom/Makefile
+4-42 files