LLVM/project 19d72fd — clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Sema SemaARM.cpp

[AArch64] Rename memory hints to avoid clash with arm_acle.h macros (#226432)

Renames the hints in AArch64MemoryHints.h, as HINT_STSHH_KEEP and
HINT_STSHH_STRM are already defined in arm_acle.h.
DeltaFile
+8-8llvm/include/llvm/Support/AArch64MemoryHints.h
+3-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+1-1clang/lib/Sema/SemaARM.cpp
+1-1clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+13-134 files

FreeNAS/freenas b333d99 — src/middlewared/middlewared main.py, src/middlewared/middlewared/plugins/crypto_ renew_certs.py

NAS-144052 / 26.0.0-RC.1 / Only use `create_task` from main loop (by themylogin) (#19868)
DeltaFile
+7-8src/middlewared/middlewared/plugins/failover_/event.py
+6-0src/middlewared/middlewared/main.py
+1-1src/middlewared/middlewared/plugins/crypto_/renew_certs.py
+14-93 files

LLVM/project 44c8476 — llvm/lib/Target/RISCV RISCVZilsdOptimizer.cpp RISCVInsertVSETVLI.cpp

[RISCV] Replace uses of RegState::Define. NFC (#226569)

Either pass the destination register to the BuildMI call or use addDef
if there are multiple defs or other flags are set.
DeltaFile
+10-20llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+8-9llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+5-10llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
+6-6llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+6-6llvm/lib/Target/RISCV/RISCVExpandPseudoPostRA.cpp
+2-2llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
+37-531 files not shown
+38-557 files

LLVM/project 7ca0ce5 — llvm/lib/Target/DirectX DXILOpBuilder.cpp, llvm/test/CodeGen/DirectX StoreOutput.ll LoadInput.ll

[DirectX] Preserve all shader-stage bits during DXIL op lowering (#225874)

The vertex-stage bit is above bit 15 and was lost when the mask was
narrowed to uint16_t. This would cause an incorrect lowering error:
https://godbolt.org/z/rEMj8ssK9.

 Corrected by keeping it as a 32 bit value.
 
 Assisted by: ChatGPT 6 Astra
DeltaFile
+1-1llvm/lib/Target/DirectX/DXILOpBuilder.cpp
+1-0llvm/test/CodeGen/DirectX/StoreOutput.ll
+1-0llvm/test/CodeGen/DirectX/LoadInput.ll
+3-13 files

LLVM/project 34fe184 — clang/include/clang/CIR/Dialect/Builder CIRBaseBuilder.h, clang/include/clang/CIR/Dialect/IR CIREnumAttr.td CIROps.td

[CIR] Reuse the existing fast-math flags attribute

#224899 already defined cir::FastMathFlags. Drop the duplicate enum and
let FP operation builders read the active fenv and fast-math flags from
the CIR builder.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+23-56clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+57-18clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+30-25clang/include/clang/CIR/Dialect/IR/CIROps.td
+49-0clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+0-30clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
+6-17clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+165-1463 files not shown
+184-1489 files

FreeBSD/ports ace8a98 — comms/py-esptool Makefile distinfo

comms/py-esptool: Downgrade to 4.12.0 and unbreak

    https://github.com/espressif/esptool/releases/tag/v4.12.0

5.4.0 depends on esp_pylib which we don't have so it was a mistake
to upgrade to it.

PR:             298839
Reported by:    avg
DeltaFile
+3-3comms/py-esptool/distinfo
+2-1comms/py-esptool/Makefile
+5-42 files

LLVM/project 6c75084 — clang/test/CIR/Lowering fastmath-contract.cir

[CIR] Update the fastmath contract lowering test

cir-to-llvm now requires a module triple, and the LLVM dialect prints
fastmath flags as fastmath<contract> rather than an attribute dictionary.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+5-5clang/test/CIR/Lowering/fastmath-contract.cir
+5-51 files

LLVM/project e72a7a8 — clang/lib/CIR/CodeGen CIRGenFunction.cpp, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR] clang-format the fp-contract changes

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+17-20clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+2-1clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+19-212 files

LLVM/project 6cd5e77 — clang/include/clang/CIR/Dialect/Builder CIRBaseBuilder.h, clang/include/clang/CIR/Dialect/IR CIROps.td

[CIR] Record -ffp-contract=fast as a per-op contract flag

Classic CodeGen stamps contract on floating-point instructions so a later
Standard-fusion backend can still form an FMA. CIR only fused within a
statement via cir.fmuladd, which dropped FFMA on the CUDA device default.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+138-0clang/test/CIR/CodeGen/fp-contract-fast.c
+86-18clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+54-17clang/include/clang/CIR/Dialect/IR/CIROps.td
+57-0clang/test/CIR/CodeGenCUDA/fp-contract.cu
+47-0clang/test/CIR/Lowering/fastmath-contract.cir
+30-8clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+412-439 files not shown
+527-6615 files

LLVM/project 229e700 — libc/src/__support/FPUtil FEnvImpl.h

[libc] Avoid system fenv.h in FEnvImpl.h when LIBC_MATH_HAS_NO_EXCEPT is set (#224384)

The warning being added under #199009 triggers errors in subprojects
(e.g., flang) using libc headers that gate the use of `#pragma STDC
FENV_ACCESS ON` on the internal libc
`LIBC_COMPILER_HAS_STDC_FENV_ACCESS` flag, when building under
`-Wfenv-access -Werror`. As the idea is for these subprojects to not
access the libc FP environment (see
https://github.com/llvm/llvm-project/pull/199009#issuecomment-5299119396),
gating the use of system fenv.h functions on the
`LIBC_MATH_HAS_NO_EXCEPT` flag avoids having to specify the
`LIBC_COMPILER_HAS_STDC_FENV_ACCESS` flag when building them.

The three line removals are a clean-up related to
https://github.com/llvm/llvm-project/pull/200268. These uses are
redundant as the called functions already use the pragma when
appropriate.
DeltaFile
+1-4libc/src/__support/FPUtil/FEnvImpl.h
+1-41 files

LLVM/project 0a21a07 — llvm/lib/MC WasmObjectWriter.cpp, llvm/test/MC/WebAssembly reloc-pic64.s

[WebAssembly] Emit i64 GOT import globals on wasm64 (#226326)

WasmObjectWriter hardcodes the synthetic GOT import globals
(GOT.mem/GOT.func) to i32, but on wasm64 they hold 64-bit addresses, so
the object is type-invalid against the i64 global.get that consumes
them. wasm-ld already emits i64 GOT imports on wasm64, so this aligns
the object writer with the linker: the import type is gated on
is64Bit(), and the reloc-pic64 expectations are updated. The wasm32
checks are unchanged.
DeltaFile
+5-1llvm/lib/MC/WasmObjectWriter.cpp
+2-2llvm/test/MC/WebAssembly/reloc-pic64.s
+7-32 files

LLVM/project 5bc083e — llvm/utils/gn/secondary/lld/unittests/AsLibELF BUILD.gn, llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView BUILD.gn

[gn] port b3ed324d42c04 more (#226574)
DeltaFile
+16-0llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
+1-1llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn
+1-1llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView/BUILD.gn
+18-23 files

LLVM/project e872e60 — mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-iterator.mlir

Widen iterator trip-count arithmetic
DeltaFile
+48-19mlir/test/Target/LLVMIR/openmp-iterator.mlir
+10-2mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+58-212 files

LLVM/project 770a273 — flang/lib/Lower/OpenMP Utils.cpp ClauseProcessor.cpp, flang/test/Lower/OpenMP iterator-ranges.f90 declare-mapper-iterator.f90

[flang][OpenMP] Lower iterator modifiers in map and motion clauses

Add iterator lowering for `target data`, `target enter/exit data`,
`target update`, and map clauses inside `declare mapper`.

For example:

```fortran
!$omp target update to(iterator(i=1:n): a(i), b)
```

Conceptually, this becomes:

```text
entries = omp.iterator(i = 1 through n) {
  yield map_info(base = a, bounds = element i)
}
target_update(iterated_maps = entries, ordinary_maps = [b])
```

    [37 lines not shown]
DeltaFile
+951-0flang/test/Lower/OpenMP/motion-iterator.f90
+293-0flang/test/Lower/OpenMP/declare-mapper-iterator.f90
+186-34flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+187-0flang/lib/Lower/OpenMP/Utils.cpp
+160-0flang/test/Lower/OpenMP/iterator-ranges.f90
+124-17mlir/test/Target/LLVMIR/openmp-iterator.mlir
+1,901-5126 files not shown
+2,549-21632 files

LLVM/project bbd2e0f — llvm/lib/Target/Mips MipsISelLowering.cpp, llvm/test/CodeGen/Mips extins.ll

[Mips] Enable generic bitfield extract preparation (#226491)

Enable CodeGenPrepare's shift sinking when the subtarget supports
bitfield extract instructions. This exposes shift-and-mask patterns
across basic blocks to the existing MIPS extract combine.

Use hasExtractInsert() to keep this disabled for pre-r2 targets and
MIPS16. Add a minimal cross-block regression case to extins.ll.
DeltaFile
+18-0llvm/test/CodeGen/Mips/extins.ll
+3-0llvm/lib/Target/Mips/MipsISelLowering.cpp
+21-02 files

LLVM/project cc527d5 — llvm/utils/gn/secondary/lld/unittests/AsLibELF BUILD.gn

[gn] port b3ed324d42c04 (#226570)
DeltaFile
+1-0llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
+1-01 files

LLVM/project 7b42d2f — llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU BUILD.gn

[gn build] Port 07aec21c88f4 (#226571)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+1-01 files

LLVM/project d6fbdcf — llvm/lib/Transforms/Utils VNCoercion.cpp, llvm/test/Transforms/GVN byte-conversion.ll

[GVN] Don't coerce forwarded byte values through integers
DeltaFile
+26-70llvm/test/Transforms/GVN/byte-conversion.ll
+24-6llvm/lib/Transforms/Utils/VNCoercion.cpp
+50-762 files

LLVM/project db85de0 — llvm/test/CodeGen/AMDGPU promote-alloca-byte-ptr-cast.ll

[AMDGPU] Restore and regenerate `promote-alloca-byte-ptr-cast.ll`
DeltaFile
+44-0llvm/test/CodeGen/AMDGPU/promote-alloca-byte-ptr-cast.ll
+44-01 files

NetBSD/src 61aBmP7 — sys/arch/sparc64/sparc64 ofw_patch.c

   Add some i2c fixes for V445.  Tested by Ken Wellsch.
VersionDeltaFile
1.18+51-2sys/arch/sparc64/sparc64/ofw_patch.c
+51-21 files

NetBSD/src OeyeQBB — sys/dev/i2c adm1021.c

   Add support for temperature offsets using properties.
VersionDeltaFile
1.33+80-34sys/dev/i2c/adm1021.c
+80-341 files

LLVM/project 1e84455 — llvm/test/Transforms/GVN byte-conversion.ll

[GVN] Pre-commit tests for byte conversions
DeltaFile
+265-0llvm/test/Transforms/GVN/byte-conversion.ll
+265-01 files

FreeBSD/ports ba56051 — deskutils/syncthingtray pkg-plist Makefile, deskutils/syncthingtray/files patch-syncthingtray_syncthingconnector_runtimecondition.cpp patch-syncthingtray_plasmoid_lib_syncthingapplet.h

deskutils/syncthingtray: Update 2.1.5 => 2.1.6

Changelog:
https://github.com/Martchus/syncthingtray/releases/tag/v2.1.6

PR:             298823
Sponsored by:   UNIS Labs (vvd, commit patch)
DeltaFile
+0-39deskutils/syncthingtray/files/patch-syncthingtray_plasmoid_lib_syncthingapplet.h
+0-18deskutils/syncthingtray/files/patch-syncthingtray_syncthingconnector_runtimecondition.cpp
+5-5deskutils/syncthingtray/distinfo
+3-3deskutils/syncthingtray/Makefile
+1-1deskutils/syncthingtray/pkg-plist
+9-665 files

LLVM/project 8dc7b3d — clang/lib/Sema SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins WaveReadLaneFirst.hlsl

Add WaveReadLaneFirst HLSL function (#220373)

This PR adds the `WaveReadLaneFirst` HLSL function.

Fixes https://github.com/llvm/llvm-project/issues/99164
Assisted by: Github Copilot
DeltaFile
+120-0clang/test/CodeGenHLSL/builtins/WaveReadLaneFirst.hlsl
+96-0llvm/test/CodeGen/DirectX/WaveReadLaneFirst.ll
+61-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst.ll
+54-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst_mat.ll
+42-4clang/lib/Sema/SemaHLSL.cpp
+36-0llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/wave-readlane-first.ll
+409-415 files not shown
+533-621 files

LLVM/project a980911 — .github/workflows libcxx-benchmark-cron.yml libcxx-pr-benchmark.yml, libcxx/utils/ci/lnt run-benchmarks machines.json

[libc++] Add a benchmark machine for libstdc++ (#226346)

Add a machine that benchmarks the libstdc++ shipped with GCC 16 on macOS
instead of a libc++ build. To enable that, generalize the scripts and
workflows to make more aspects of machines.json optional (e.g. support
machines that don't need to build libc++).
DeltaFile
+24-10.github/workflows/libcxx-benchmark-commit.yml
+21-5libcxx/utils/ci/lnt/README.md
+22-3libcxx/utils/ci/lnt/machines.json
+11-9libcxx/utils/ci/lnt/run-benchmarks
+9-6.github/workflows/libcxx-pr-benchmark.yml
+4-1.github/workflows/libcxx-benchmark-cron.yml
+91-341 files not shown
+93-367 files

OpenBSD/ports T3o0New — mail/mlmmj distinfo Makefile, mail/mlmmj/patches patch-mk_common_mk

   mail/mlmmj: update to 2.2.0

   ok sthen@
VersionDeltaFile
1.30+5-4mail/mlmmj/Makefile
1.15+2-2mail/mlmmj/distinfo
1.14+0-1mail/mlmmj/pkg/PLIST
1.2+0-0mail/mlmmj/patches/patch-mk_common_mk
+7-74 files

LLVM/project 7267469 — llvm/test/Transforms/LoopVectorize replicate-region-branch-weights.ll, llvm/test/Transforms/LoopVectorize/VPlan execution-frequencies-match-bfi.ll

[LV] Add tests for zero branch weights and execution frequencies (NFC). (#226553)

Add missing test coverage for VPlan-based execution frequency
computation:
 * blocks entered via an edge with zero branch weight, 
 * blocks whose sibling edge has zero weight, 
 * nested branches whose skipping edges have zero weight, 
* a block executing on all paths through the loop after a switch whose
probabilities do not add up to 1,
 * frequencies below the smallest representable non-zero one
 * all-zero weights making a join's frequency unknown
 * estimated frequencies propagating through a branch with weights.

Also updates
llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
to check frequencies directly after the frequencies have been recorded.
DeltaFile
+733-228llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
+92-0llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
+54-0llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
+879-2283 files

LLVM/project 36e7743 — llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer VecUtils.h, llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.h

[SandboxVec][LoadStoreVec][NFC] Tighten bundle element types (#226348)

Use Instruction*/Constant* for LoadStoreVec APIs where that is what
callers hold, and template getCombinedVectorTypeFor so BndlRef is not
forced through a non-covariant Value* conversion.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+52-46llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
+9-7llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+3-3llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
+2-1llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
+66-574 files

LLVM/project 33de8ec — llvm/test/CodeGen/AMDGPU global_atomics_scan_fsub.ll amdgcn.bitcast.1024bit.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-masked-scatter.ll fixed-vectors-masked-gather.ll

Rebase

Created using spr 1.3.7
DeltaFile
+6,086-6,026llvm/test/CodeGen/RISCV/rvv/expandload.ll
+4,817-5,217llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+4,903-4,925llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+4,559-5,003llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+3,913-3,252llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
+3,098-2,506llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
+27,376-26,9294,917 files not shown
+266,433-133,1614,923 files

LLVM/project 48884d2 — clang/lib/Lex HeaderSearch.cpp, clang/test/ClangScanDeps modules-context-hash-module-map-path.c modules-context-hash-case-sensitive-vfs-paths.c

[clang][Modules] Respect case sensitivity when hashing implicit module map path (#226339)

Before this patch, the implicit module hash normalized the module map
path, but explicit modules always respected the case in paths. This
worked by depending on FileEntry caching and/or relocation checking to
resolve correctly. This behavior was both subtle and difficult to
understand. Instead, respect the casing in paths for hashing to match
explicitly built modules so they can never diverge.

This patch also updates `modules-context-hash-module-map-path.c` to
match a downstream version that already tested for the case where vfs
overlay entries differ by case but point to the same file.
`modules-context-hash-case-sensitive-vfs-paths.c` is the same but points
to different underlying files.
DeltaFile
+114-0clang/test/ClangScanDeps/modules-context-hash-case-sensitive-vfs-paths.c
+60-24clang/test/ClangScanDeps/modules-context-hash-module-map-path.c
+70-0clang/test/Modules/implicit-module-map-path-case-sensitive.c
+2-3clang/lib/Lex/HeaderSearch.cpp
+246-274 files