[Transforms][Utils] Preserve branch weights in LoopSplitUtils (#213626)
Carry the original latch's branch weights onto the clamped latch, and
mark the newly created partition-guard branches as having unknown
weights so profile-tracking passes are not misled.
igc: Disable PCIe L1.2 on I225
I225 devices can incorrectly enter L1 substates while CLKREQ# is
asserted, both while idle and in D3. Disable ASPM and PCI-PM L1.2 on
I225 to prevent the resulting packet loss.
Keep the I226 workaround ASPM-only because it addresses a separate
traffic exit latency observation.
PR: 265714
MFC after: 4 days
[X86] Add PSEUDO_FMIN/PSEUDO_FMAX to canCombineAsMaskOperation (#213475)
Add FP min/max opcodes to the list of operations that can be folded into
write-masked instructions. This allows commuteSelect to recognize these
operations and invert the setcc condition to enable ISel to match fused
vminps/vmaxps {%k} patterns.
py-pandas: updated to 3.0.5
3.0.5
Fixed a regression where the pandas 3.0.4 wheels could crash with a
segmentation fault on Python 3.14 (and other datetime code paths), because they
were built against an incompatible numpy version (GH 66086)
py-fastbencode: updated to 0.3.11
0.3.11
Add optional max_depth argument to cap nesting depth when encoding and decoding (defaults to unlimited)
Rust backend now encodes and decodes iteratively, avoiding native stack overflow on deeply nested input
Add an encode/decode benchmark script
Dependency updates (ruff, GitHub Actions)
py-markdown: updated to 3.10.3
3.10.3
Fixed
* Fix `SetextHeaderProcessor` regex to prevent mixed `=` and `-` chars in setext-style headers.
* Add AI Policy to Contributing Guide.
* Officially document all included extensions as being in maintenance mode.
* Link the Extension API documentation to the API Reference.
e1000: clear VFTA when last VLAN is removed
The conventional VLAN filter update skipped zero shadow words. Removing
the final VLAN represented by a VFTA word therefore left the hardware
bit programmed even though the software shadow was clear.
Pass the changed word to em_if_vlan_filter_write() and write it even
when its new value is zero. Retained nonzero words continue to be
replayed as before.
[clang][AMDGPU] Widen ballot for read_exec_lo/hi to wavefront size (#212813)
GlobalISel cannot select a ballot narrower than the wavefront width,
since it can't represent one bit per lane
Widen the ballot to the wave size and narrow the result afterwards
This is a prerequisite for relanding
https://github.com/llvm/llvm-project/pull/211493 (reverted in
https://github.com/llvm/llvm-project/pull/212628 to unblock buildbot) to
prevent device libs side failures
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
py-peewee: updated to 4.3.0
4.3.0
Backwards-incompatible:
* Specify `requires-python >= 3.8`. I've been putting off committing to
anything like this, since technically we still work on 3.7, but 3.8 is the
minimum we run on CI so it felt correct.
* Replace `docid` implicit primary key on legacy `FTSModel` (FTS4) with
`rowid`, which is equivalent. Using `docid` presents no benefit and
switching to `rowid` makes operations more consistent. Users have a couple
options when updating:
* Explicitly add `docid = DocIDField()` to your FTSModel classes.
* Update your code, replacing `docid` with `rowid`. The underlying data
does not require a migration, as docid was just an alias for rowid.
* When a RETURNING-clause insert of a single row inserts nothing, e.g. a
conflict was ignored, `execute()` returns `None` on every backend.
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Reland [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (#213584)
This relands #211715 which was reverted because of some failures
in experimental targets and one AMDGPU test `diverged-entry-basic.ll`.
Below is the original commit message.
----
This recommits #119826, which taught `MachineLICM` to use
`RegisterClassInfo` when computing register pressure limits so
reserved registers are accounted for (#118787).
The original change was reverted by eeac0ff because it increased
compile time by causing repeated `RegisterClassInfo` computations.
This PR is based on #210826, in which `MachineRegisterClassInfo`
analysis pass was added. `MachineRegisterClassInfo` is required
by `MachineLICM` now, but the intervening machine passes that do
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py-sh: updated to 2.4.0
2.4.0 - 7/25/26
- Dropped support for Python < 3.10
- Significantly improved `.pyi` typing stub with modern type aliases and annotations
- `Command` now supports generic subscript syntax (`Command[str]`) via `GenericAlias`
- Bugfix where signal names containing numbers were not matched correctly
- `stubtest` and `pyrefly coverage check` now run in CI
py-traitlets: updated to 5.16.0
5.16.0
Enhancements made
- Add `Path` trait for `pathlib.Path` values
Bugs fixed
- Remove hatch --lf fallback that could mask test failures
- Fix three correctness bugs found in code review by claude Fable
Maintenance and upkeep improvements
- Add a document of 'best practices' on designing with traitlets
- install hatch via uv to speedup ci
- Update pre-commit hooks and fix the resulting fallout
- Harden mypy/ruff tooling and improve typing
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[mlir][bufferization] Handle arith.select-based deallocs in static memory planner (#209106)
The static memory planner currently skips any allocation that doesn't
have a direct `memref.dealloc` user. This is overly conservative, after
running `ownership-based-buffer-deallocation`, it's common to see
patterns like:
`%2 = arith.select %c, %0, %1 : memref<1024xf32>`
`memref.dealloc %2 : memref<1024xf32>`
where both `%0` and `%1` get skipped with `++numSkipNoDealloc` even
though their lifetimes are well-defined.
This patch teaches `collectCandidates` to follow `arith.select` chains
when looking for potential deallocs. We traverse the use-def graph
forward from each alloc, collecting any `memref.dealloc` ops reachable
through select results.
Since a single select-based dealloc can conditionally free one of
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[TLI] Update `getWCharSize` documentation (NFC) (#213622)
`return 0` part of `getWCharSize` was added in cc603ee3d563 but then
removed in 5a88dffc40d2. Update the documentation as it no longer
returns 0 when the size is unknown (instead returns the default).
[ORC] Fix COFFAutoImportGeneratorTest on Darwin. (#213616)
Add linker-level mangling prefix for lookups on Darwin.
These should fix the build failures associated with PR203914 on Darwin,
e.g. https://lab.llvm.org/buildbot/#/builders/23/builds/21523
X86: Defend against regression from SimplifyDemandedVectorElts load support (#213611)
It doesn't appear possible to test this independently.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[mlir][SPIR-V] Restrict GroupNonUniform ops to Subgroup scope (#213087)
spirv-val now limits execution scope for GroupNonUniform* ops to
Subgroup, except OpGroupNonUniformRotateKHR which still allows Workgroup
(see https://github.com/KhronosGroup/SPIRV-Tools/pull/6811). Tighten the
ODS trait accordingly and stop lowering GPU non-uniform reductions to a
Workgroup scope op
Follow-up to #212928
