[llvm-exegesis] Fix ~27 minute stall when no LBR sample arrives (#218102)
X86LbrPerfEvent programs PERF_TYPE_RAW/0x20c4, a P-core encoding. A
hybrid CPU registers one PMU per core type and cpu_core claims
PERF_TYPE_RAW, so the kernel never schedules the event while the thread
runs on an E-core. perf_event_open succeeds all the same and no sample
is recorded.
doReadCounter polls 160 times with a 10s timeout, so reporting the
failure takes ~27 minutes, and checkLbrSupport then aborts instead of
reporting it, never having consumed the Expected error. lit.local.cfg
probes llvm-exegesis at test discovery, so with LLVM_ENABLE_LIBPFM=ON
this stalls all of check-llvm before any test runs.
The event is disabled before we poll, so a sample either is already in
the ring buffer -- wakeup_events == 1 leaves POLLIN asserted -- or it
will never arrive. Poll 3 times with a 1s timeout, use
expectedToOptional, and bound the lit probe. A probe that works at all
takes under 30ms, 0.08s with every core saturated.
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[Analysis] Fix the build (#218559)
This patch fixes:
llvm/lib/Analysis/AliasSetTracker.cpp:336:31: error: no member named
'ModAccess' in 'llvm::AliasSet'
[HLSL][NFC] Generalize and consolidate the texture tests
Many of the texture tests were parameterized specifically for Texture2D
and Texture2DArray, therefore retaining several 2D-specific literals,
including: the `hlsl::dimension` spelling, the width of the offset / ddx
/ ddy / LOD-location vectors, the operator[] index type and the
`spirv.Image` Dim operand.
Furthermore, the macro names used for parameterization was inconsistent
among test files.
This commit re-parameterizes the texture tests to generalize to more than
only 2D textures, and keeps the macro names consistent across test files.
Each test file now also has a comment describing each macro used in the
test.
This commit also moves 3 misplaced texture tests under
clang/test/SemaHLSL into clang/test/SemaHLSL/Resources.
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ixgbe: Avoid a signed shift while assembling the PHY ID
The PHY identifier word is promoted to signed int when the cast is
applied after the shift. Cast the 16-bit register value first so
identifiers with their high bit set are assembled as unsigned data.
(cherry picked from commit f4bf1da7bac80cbe3ec862f395c22a3c5d176312)
igc: Avoid a signed shift while assembling the PHY ID
The PHY identifier word is promoted to signed int when the cast is
applied after the shift. Cast the 16-bit register value first so
identifiers with their high bit set are assembled as unsigned data.
(cherry picked from commit f5fd839fe688181e57171850ce51e4dec71e62fd)
e1000: Avoid signed shifts while assembling PHY IDs
PHY identifier words are promoted to signed int when the cast is applied
after the shift. Cast each 16-bit register value first so identifiers
with their high bit set are assembled as unsigned data.
(cherry picked from commit 13a7470096567480676e24545b3c1d6404f3f2ec)
igc: Export EEE Low Power Idle counters
The driver already accumulates the clear-on-read transmit and receive
LPI event counters. Expose the 64-bit totals under the per-device eee
sysctl node.
(cherry picked from commit 13d78e4b9d0a27128319a1241f00f7ab9aa864bb)
