LLVM/project 66375aaclang/test/CodeGenOpenCL builtins-amdgcn-make-buffer-rsrc.cl, llvm/lib/Target/AMDGPU AMDGPUInstCombineIntrinsic.cpp

[AMDGPU] Canonicalize num_records to its actual width in InstCombine

llvm.amdgcn.make.buffer.rsrc is overloaded on the type of its
num_records argument, but the hardware field it ends up in has a fixed
width (32 bits, or 45 bits on gfx1250 and up). Rewrite the intrinsic to
use that width, zero-extending or truncating num_records as needed, so
that IR-level optimizations can see that the extra bits of, for example,
the i64 that Clang emits are not demanded.

Targets that aren't concrete enough for the buffer resource layout to be
known are left alone.

AI disclosure: This was my idea but Claude wrote the code (and I've
tried to tighten up the comments)
DeltaFile
+36-44clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
+27-27llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+22-12llvm/test/Transforms/InstCombine/AMDGPU/make-buffer-rsrc-num-records.ll
+21-1llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+106-844 files

LLVM/project 2005ad0llvm/test/Transforms/InstCombine/AMDGPU make-buffer-rsrc-num-records.ll

Clean up triples
DeltaFile
+3-3llvm/test/Transforms/InstCombine/AMDGPU/make-buffer-rsrc-num-records.ll
+3-31 files

LLVM/project 1a8777fllvm/test/Transforms/InstCombine/AMDGPU make-buffer-rsrc-num-records.ll

[AMDGPU] Pre-commit tests for num_records canonicalization

Add tests for having InstCombine canonicalize the num_records argument
of llvm.amdgcn.make.buffer.rsrc to the width it will ultimately have,
which lets later passes see that, for example, the high bits of the i64
that Clang emits aren't used.

AI disclosure: Claude generated these and I've looked at them
DeltaFile
+153-0llvm/test/Transforms/InstCombine/AMDGPU/make-buffer-rsrc-num-records.ll
+153-01 files

LLVM/project 31a666dllvm/include/llvm/TargetParser X86TargetParser.def, llvm/lib/Target/X86 X86.td

[X86] Remove remnants of AVX5124VNNIW/4FMAPS support (#218730)

Per discussion here: https://github.com/llvm/llvm-project/pull/218697 

We provide only assembler support for these extensions
DeltaFile
+1-6llvm/lib/TargetParser/X86TargetParser.cpp
+0-4llvm/lib/TargetParser/Host.cpp
+0-2llvm/include/llvm/TargetParser/X86TargetParser.def
+0-1llvm/lib/Target/X86/X86.td
+1-134 files

LLVM/project 949c210llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 abd-combine.ll

DAG: Fix null dereference in visitABD for poison constant elements

visitABD calls ISD::matchUnaryPredicate with AllowUndefs=true, which
passes a null ConstantSDNode to the predicate lambda for each undef or
poison element.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+17-0llvm/test/CodeGen/AArch64/abd-combine.ll
+2-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+19-02 files

LLVM/project 042f837clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/test/Sema/LifetimeSafety dangling-global.cpp

dangling-global-in-main
DeltaFile
+8-2clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+6-0clang/test/Sema/LifetimeSafety/dangling-global.cpp
+14-22 files

LLVM/project e4300b8llvm/lib/Target/PowerPC PPCInstrInfo.cpp, llvm/test/CodeGen/PowerPC mi-peephole-forwarding-undef.mir

PowerPC: Fix MI peephole crash on an undef forwarding operand (#216685)

Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+25-0llvm/test/CodeGen/PowerPC/mi-peephole-forwarding-undef.mir
+2-0llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+27-02 files

LLVM/project 5186287lldb/source/Utility ArchSpec.cpp, llvm/include/llvm/BinaryFormat ELF.h

[AMDGPU] Define gfx1250-strict target (#218543)
DeltaFile
+30-0llvm/lib/Target/AMDGPU/AMDGPU.td
+9-0llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
+7-0llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
+6-0llvm/lib/Target/AMDGPU/GCNProcessors.td
+3-2llvm/include/llvm/BinaryFormat/ELF.h
+5-0lldb/source/Utility/ArchSpec.cpp
+60-215 files not shown
+91-221 files

FreeBSD/ports aa1a594databases/rainfrog Makefile distinfo

databases/rainfrog: Update to 0.4.5

ChangeLog:

https://github.com/achristmascarl/rainfrog/releases/tag/v0.4.5

Reported by:    "github-actions[bot]" <notifications at github.com>
DeltaFile
+3-3databases/rainfrog/distinfo
+1-1databases/rainfrog/Makefile
+4-42 files

FreeNAS/freenas 9ab8470src/middlewared/middlewared/plugins/iscsi_ extents.py target_to_extent.py

Skip SCST HA-internal target bookkeeping when LIO is in use
DeltaFile
+87-71src/middlewared/middlewared/plugins/iscsi_/fs_attachment_delegate.py
+89-58src/middlewared/middlewared/plugins/iscsi_/target_to_extent.py
+59-47src/middlewared/middlewared/plugins/iscsi_/extents.py
+235-1763 files

NetBSD/src Ed4sa0Qsys/arch/sparc64/conf GENERIC

   sun4v: Add mfii(4) to sparc64 GENERIC config.

   Symbios Logic SAS3008 storage controller is present in SPARC S7-2 servers.

   Not tested yet.
VersionDeltaFile
1.252+3-2sys/arch/sparc64/conf/GENERIC
+3-21 files

NetBSD/src esgneVXsys/arch/evbmips/malta malta_bus_mem.c malta_bus_io.c, sys/arch/evbmips/malta/dev mainbus.c gt.c

   Pull up following revision(s) (requested by tls in ticket #436):

        sys/arch/evbmips/malta/pci/pcib.c: revision 1.29
        sys/arch/evbmips/malta/dev/mainbus.c: revision 1.21
        sys/arch/evbmips/malta/dev/gt.c: revision 1.20
        sys/arch/evbmips/malta/malta_intr.c: revision 1.30
        sys/arch/evbmips/malta/malta_bus_mem.c: revision 1.10
        sys/arch/evbmips/malta/machdep.c: revision 1.51
        sys/arch/evbmips/malta/malta_bus_io.c: revision 1.9
        sys/arch/evbmips/conf/MALTA: revision 1.107

   Address problems with MIPS Malta platform code found running under QEMU.

   QEMU's "malta" system emulates a MIPS Malta with the Gallileo host bridge
   and 32-bit or 64-bit CPUs of either endianness.  It is one of the only
   working QEMU system-level emulations that could run NetBSD with all
   combinations of endianness and address size.  After fixes to QEMU over the
   past several years, NetBSD has been unable to use the emulated PCI bus in
   big-endian and 64-bit configurations.

    [36 lines not shown]
VersionDeltaFile
1.27.26.1+16-14sys/arch/evbmips/malta/malta_intr.c
1.17.14.1+20-6sys/arch/evbmips/malta/dev/gt.c
1.18.4.1+18-4sys/arch/evbmips/malta/dev/mainbus.c
1.47.4.1+10-11sys/arch/evbmips/malta/machdep.c
1.7.126.1+11-2sys/arch/evbmips/malta/malta_bus_mem.c
1.6.126.1+11-2sys/arch/evbmips/malta/malta_bus_io.c
+86-392 files not shown
+99-458 files

LLVM/project ddb8ccdmlir/lib/Dialect/LLVMIR/Transforms InlinerInterfaceImpl.cpp, mlir/test/Dialect/LLVMIR inlining-alias-scopes.mlir

[mlir][LLVM] Use a disjoint scope domain when inlining noalias

This matches recent changes to the LLVM inliner.

AI disclosure: Claude wrote the code, I wrote the commit message and
have done initial review.
DeltaFile
+28-25mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
+10-18mlir/test/Dialect/LLVMIR/inlining-alias-scopes.mlir
+38-432 files

LLVM/project 429da98llvm/lib/Target/AMDGPU AMDGPULowerModuleLDSPass.cpp, llvm/test/CodeGen/AMDGPU lower-lds-struct-aa-memcpy.ll remove-no-kernel-id-attribute.ll

[AMDGPU] Use a disjoint scope domain for merged LDS structs

When lowering LDS values, all the values are mutually disjoint, so we
can use the newly-added disjoint scopes feature to simplify the IR.

AI disclosure: Claude wrote this and I reviewed it and wrote the
 commit message
DeltaFile
+15-52llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+35-10llvm/test/CodeGen/AMDGPU/lower-module-lds-precise-allocate-to-module-struct.ll
+15-18llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
+11-13llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
+8-12llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
+9-10llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
+93-1156 files not shown
+139-16112 files

LLVM/project 46a49c5mlir/include/mlir/Dialect/LLVMIR LLVMAttrDefs.td, mlir/lib/Dialect/LLVMIR/Transforms InlinerInterfaceImpl.cpp

[mlir][LLVM] Add disjointScopes to AliasScopeDomainAttr

This also updates the MLIR-side inliner to clone disjoint domains
while cloning alias scopes, matching changes to LLVM.

AI disclosure: Claude wrote the code, I wrote the commit message and
looked at the code.
DeltaFile
+34-5mlir/test/Target/LLVMIR/Import/metadata-alias-scopes.ll
+36-1mlir/test/Target/LLVMIR/Import/import-failure.ll
+23-0mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
+17-2mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
+4-2mlir/lib/Target/LLVMIR/ModuleImport.cpp
+4-1mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
+118-111 files not shown
+120-137 files

LLVM/project 1c0f70bllvm/lib/Target/AMDGPU AMDGPULowerKernelArguments.cpp, llvm/test/CodeGen/AMDGPU lower-kernargs.ll si-split-load-store-alias-info.ll

[AMDGPU] Use a disjoint scope domain for noalias kernel arguments

All noalias arguments of a kernel are disjoint with each other, so we
can use a disjoint scope to save on metadata construction.

AI disclosure: Claude wrote this, I looked at it and wrote this
message.
DeltaFile
+53-64llvm/test/CodeGen/AMDGPU/lower-noalias-kernargs.ll
+20-13llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
+11-11llvm/test/CodeGen/AMDGPU/lower-kernel-arguments-noalias-call-no-ptr-args.ll
+8-8llvm/test/CodeGen/AMDGPU/si-split-load-store-alias-info.ll
+4-4llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
+96-1005 files

LLVM/project b267314clang/test/CodeGen arm-v8.2a-neon-intrinsics-generic.c arm_neon_intrinsics.c, llvm/lib/Transforms/Utils InlineFunction.cpp

[Inliner] Use a disjoint scope domain for noalias arguments

InlineFunction creates alias.scope/noalias metadata to represent the
set of `noalias` arguments to a function. We don't need the `!noalias`
now that we have the ability to use disjoint scopes, saving us IR size
and metadata bloat.

TODO move these to a previous commit.
Also changes InstCombine to not drop the experimental.noalias.scope.decl
for disjoint scopes even if they're not mentioned in a `!noalias`, but
do still delete them if they're not used.
DeltaFile
+324-324clang/test/CodeGen/arm_neon_intrinsics.c
+72-72clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
+35-30llvm/lib/Transforms/Utils/InlineFunction.cpp
+13-14llvm/test/Transforms/Inline/noalias-calls2.ll
+12-12llvm/test/Transforms/Inline/noalias2.ll
+11-11llvm/test/Transforms/PhaseOrdering/pr39282.ll
+467-4639 files not shown
+487-48315 files

NetBSD/src gUVMxmXdoc CHANGES-11.1

   Tickets #427 - #430, #432 - #434
VersionDeltaFile
1.1.2.8+57-1doc/CHANGES-11.1
+57-11 files

LLVM/project 7beba8bclang/test/CodeGen arm_neon_intrinsics.c arm-v8.2a-neon-intrinsics-generic.c, llvm/lib/Bitcode/Reader MetadataLoader.cpp

[IR] Add alias scope domains with disjoint scopes

See RFC at
https://discourse.llvm.org/t/rfc-disjoint-scope-alias-scope-noalias-domains/91537

This commit adds support for declaring an alias scope domain disjoint.
Disjoint domains are ones where each scope is implicitly `!noalias`
with each other scope in the domain. This is represented by adding an
`i1` into the scope's domain as the second argument, with `i1 true`
representing disjoint scopes and `i1 false` representing the old
non-disjoint behavior. AutoUpgrade mechanisms have been added to add
in the missing `i1 false` to existing metadata.

This commit updates alias analysis to know about disjoint scopes and
updates the function cloner to also clone the alias domain if it's
disjoint (since, as a herd of LLMs discovered, you don't want the old
IR to be noalias with a clone of itself).

Commits to migrate passes to use disjoint scopes where that's an

    [4 lines not shown]
DeltaFile
+72-72clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
+54-54clang/test/CodeGen/arm_neon_intrinsics.c
+97-0llvm/lib/Bitcode/Reader/MetadataLoader.cpp
+95-0llvm/test/Transforms/InstCombine/noalias-scope-decl-disjoint-domain.ll
+42-42llvm/test/Transforms/LoopUnroll/peel-loop-noalias-scope-decl.ll
+39-35llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
+399-203185 files not shown
+1,332-709191 files

LLVM/project ecb2140llvm/test/tools/UpdateTestChecks/update_test_checks dot_value_in_metadata_string.test, llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs dot_value_in_metadata_string.ll dot_value_in_metadata_string.ll.expected

[utils] Don't rename %. inside quoted strings in test checkseg

Replacing `%.foo` with `%dotfoo` everywhere also caught any `%.foo`
inside metadata, which would then cause incorrect CHECK lines to be
generated (since the value in the metedata isn't going to be
modified).

This commit fixes the issue by matching quoted strings in a regex
before looking for %. to replace.

AI disclosure: Claude found and fixed this, I wrote the commit message
DeltaFile
+22-0llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll.expected
+10-1llvm/utils/UpdateTestChecks/common.py
+11-0llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll
+7-0llvm/test/tools/UpdateTestChecks/update_test_checks/dot_value_in_metadata_string.test
+50-14 files

FreeBSD/ports 54af8f6security/clamav pkg-plist

security/clamav: Fix pkg-plist
DeltaFile
+0-1security/clamav/pkg-plist
+0-11 files

FreeBSD/ports 1eed8dfsecurity/clamav distinfo pkg-plist

security/clamav: Update to 1.5.4 and fix testing
DeltaFile
+8-9security/clamav/Makefile
+6-3security/clamav/pkg-plist
+3-3security/clamav/distinfo
+17-153 files

NetBSD/src CCSzEwudistrib/sets/lists/debug ad.mips ad.mipsel

   Pull up following revision(s) (requested by tls in ticket #434):

        distrib/sets/lists/debug/md.evbarm.earmv4: revision 1.2
        distrib/sets/sets.subr: revision 1.215
        sys/conf/Makefile.kern.inc: revision 1.306
        distrib/sets/lists/debug/md.evbarm.earmv5: revision 1.2
        distrib/sets/lists/debug/md.pmax: revision 1.5
        distrib/sets/lists/debug/md.emips: revision 1.4
        distrib/sets/lists/debug/ad.mipseb: revision 1.8
        distrib/sets/lists/debug/ad.mipsel: revision 1.8
        distrib/sets/lists/debug/mi: revision 1.513
        distrib/sets/lists/debug/md.evbarm.earmv5eb: revision 1.2
        distrib/sets/lists/debug/md.evbarm.earmv5eb: revision 1.3
        distrib/sets/lists/debug/ad.mips: revision 1.88
        share/mk/bsd.own.mk: revision 1.1482
        distrib/sets/lists/debug/md.evbppc: revision 1.6
        etc/Makefile: revision 1.476

   Fix MKDEBUGKERNEL vs MKDEBUG for kernel debug file sets.

    [21 lines not shown]
VersionDeltaFile
1.1.2.1+48-48distrib/sets/lists/debug/md.evbarm.earmv5
1.1.2.1+20-20distrib/sets/lists/debug/md.evbarm.earmv4
1.3.2.1+13-13distrib/sets/lists/debug/md.evbppc
1.1.2.1+11-11distrib/sets/lists/debug/md.evbarm.earmv5eb
1.6.2.1+10-10distrib/sets/lists/debug/ad.mipsel
1.84.2.2+7-7distrib/sets/lists/debug/ad.mips
+109-1098 files not shown
+138-13114 files

LLVM/project 70d85a5flang/test/HLFIR assign-simple-routing.fir

Add -use-fortran-assign-only fallback test for both assign paths

Verify that the -use-fortran-assign-only flag forces both the
allocatable and non-allocatable array paths to use _FortranAAssign
instead of _FortranAAssignSimple, preventing regression of the
fallback logic.

Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
DeltaFile
+13-0flang/test/HLFIR/assign-simple-routing.fir
+13-01 files

LLVM/project 5569b3aflang/lib/Optimizer/HLFIR/Transforms ConvertToFIR.cpp

Factor out genAssignSimple vs genAssign selection into a lambda

The logic for choosing between genAssignSimple and genAssign was
duplicated in the allocatable and non-allocatable paths of
AssignOpConversion. Extract it into a genSimpleOrAssign lambda to
avoid code drift between the two paths.

This also fixes the allocatable path which was missing the
useFortranAssignOnly guard that the non-allocatable path had.

Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
DeltaFile
+25-39flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
+25-391 files

LLVM/project 143687eflang/include/flang/Optimizer/Builder/Runtime Assign.h, flang/lib/Optimizer/Builder/Runtime Assign.cpp

[flang] - Call _FortranAAssignSimple instead of _FortranAAssign for intrinsic-type array assignments.

This patch adds support for calling _FortranAAssignSimple, a faster-path for array assignments.
`_FortranAAssignSimple` is called when ALL the following conditions are true:
1. Intrinsic element type (not derived type)
2. Matching ranks (no scalar-to-array broadcasting)
3. Non-volatile
4. Not polymorphic
5. Not explicit-length character
6. Not temporary LHS

Otherwise, uses `_FortranAAssign` (or specialized variants like `_FortranAAssignPolymorphic`, `_FortranAAssignExplicitLengthCharacter`).

This is a (perhaps final) part of the fix for https://github.com/llvm/llvm-project/issues/203915
DeltaFile
+287-0flang/test/HLFIR/assign-simple-routing.fir
+46-4flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
+19-13flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
+13-0flang/lib/Optimizer/Builder/Runtime/Assign.cpp
+12-0flang/include/flang/Optimizer/Builder/Runtime/Assign.h
+2-2flang/test/HLFIR/assign-codegen.fir
+379-192 files not shown
+381-218 files

LLVM/project 0fcc159flang-rt/lib/runtime tools.cpp assign.cpp, flang-rt/unittests/Runtime Assign.cpp

[flang-rt] - Lightweight runtime assignment function (AssignSimple) for intrinsic-type assignments (#213704)

This PR introduces a lightweight assignment runtime path
(`_FortranAAssignSimple`) for intrinsic-type arrays with the goal of
reducing compile-time overhead seen primarily in the form of severly
increased time taken by LTO. This PR includes only the changes to the
runtime (flang-rt) and as such just with this PR compile-time
improvements will not be visible.

**Problem**

When compiling Fortran code with OpenMP GPU offload and
`firstprivate(allocatable_array)`, LLVM's Attributor creates excessive
abstract attributes analyzing complex runtime assignment machinery:

**Symptom:**
- **Test case:** 8-element allocatable integer array with `firstprivate`
clause
- **Compile time:** 24.97s (vs 0.78s for `private` - **32x slower**)

    [61 lines not shown]
DeltaFile
+393-0flang-rt/unittests/Runtime/Assign.cpp
+222-0flang-rt/lib/runtime/assign.cpp
+4-0flang/include/flang/Runtime/assign.h
+1-0flang-rt/lib/runtime/tools.cpp
+620-04 files

LLVM/project 840176futils/bazel/llvm-project-overlay/libc/test/src/stdlib BUILD.bazel

[Bazel] Fixes d40b0ca (#218747)

This fixes d40b0ca481c9e59044bdfd7b95971e39ebc8b2e8 (#218474).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=d40b0ca481c9e59044bdfd7b95971e39ebc8b2e8

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+6-14utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
+6-141 files

LLVM/project f9accccclang/lib/CIR/CodeGen CIRGenBuiltin.cpp, clang/test/CIR/CodeGenBuiltins builtin-stdc-bit-nyi.c builtin-stdc-bit.c

[CIR] Lowering __builtin_stdc_* calls (#214931)

Added CIRGen support for __builtin_stc_* , matching with the C23 stdbit
semantics.

Added CodeGen test for the same.

Fixes #214443
DeltaFile
+1,160-0clang/test/CIR/CodeGenBuiltins/builtin-stdc-bit.c
+271-0clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+88-0clang/test/CIR/CodeGenBuiltins/Inputs/stdbit.h
+13-0clang/test/CIR/CodeGenBuiltins/builtin-stdc-bit-nyi.c
+1,532-04 files

LLVM/project 3870222llvm/lib/Target/AMDGPU GCNSubtarget.h GCNSubtarget.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-regpressure-retry.mir

[AMDGPU] Configure the software pipeliner policy

Set the pipeliner policy in overridePipelinerPolicy() to opt into the generic
register-pressure detector.

Schedules exceeding the target-provided pressure-set limits are rejected and
retried at a higher II.
DeltaFile
+181-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-regpressure-retry.mir
+6-0llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+2-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+189-03 files