LLVM/project 8240cf3llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlanRecipes.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp VPlanVerifierTest.cpp

[VPlan] Always set flags for overflowing ops etc via VPIRFlags. (#179138)

Enforce that all VPInstructions set the correct OpType of the VPIRFlags.
Flag mis-matches (e.g. VPInstruction Add without `OverflowingBinOp`
being set) can cause crashes (e.g. in CSE) or potentially mis-compiles.

Add a few helpers in VPBuilder to create common instructions with
correct flags.

PR: https://github.com/llvm/llvm-project/pull/179138
DeltaFile
+43-44llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+48-19llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+59-0llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+29-9llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+27-9llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
+10-15llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+216-964 files not shown
+249-10810 files

LLVM/project 0fe2c50libcxx/include/__algorithm for_each.h generate_n.h

make func accept rval
DeltaFile
+10-4libcxx/include/__algorithm/for_each.h
+5-2libcxx/include/__algorithm/generate_n.h
+3-2libcxx/include/__algorithm/for_each_n.h
+18-83 files

OPNSense/core d048419src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterController.php, src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Turn __* into __any
DeltaFile
+3-3src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+1-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterController.php
+4-42 files

LLVM/project aff1d33llvm/test/CodeGen/AMDGPU/GlobalISel unmerge-sgpr-s16.mir

AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge
DeltaFile
+65-0llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
+65-01 files

LLVM/project 2ba1b05llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel unmerge-sgpr-s16.mir

AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize

Used to fail EXPENSIVE_CHECKS because of type mismatch.
DeltaFile
+5-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
+9-72 files

LLVM/project affcbcelibcxx/test/benchmarks/format std_format_spec_string_unicode_escape.bench.cpp std_format_spec_string_unicode.bench.cpp

[libc++][NFC] Disable std_format_spec benchmarks through lit instead of the preprocessor (#179228)

This is probably a relic from when we didn't use lit to run benchmarks.
Nowadays we should just use the lit features to disable benchmarks like
we do in any other test instead of using the preprocessor.
DeltaFile
+10-15libcxx/test/benchmarks/format/std_format_spec_string_unicode_escape.bench.cpp
+10-14libcxx/test/benchmarks/format/std_format_spec_string_unicode.bench.cpp
+20-292 files

LLVM/project da092b4llvm/lib/CodeGen CodeGenPrepare.cpp

use DT.get() for eliminateFallThrough() as we are going to use it not update it in eliminateFallThrough()
DeltaFile
+1-1llvm/lib/CodeGen/CodeGenPrepare.cpp
+1-11 files

OPNSense/ports dafb57eopnsense/ndp-proxy-go distinfo Makefile

opnsense/ndp-proxy-go: Bump version to v1.0.1 (#256)

DeltaFile
+5-5opnsense/ndp-proxy-go/distinfo
+2-2opnsense/ndp-proxy-go/Makefile
+7-72 files

LLVM/project f0b184allvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-unmerge-values.mir

AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize

Used to fail EXPENSIVE_CHECKS because of type mismatch.
DeltaFile
+5-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir
+9-72 files

OPNSense/core 0935abbsrc/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Remove some unneeded newlines
DeltaFile
+0-3src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+0-31 files

OPNSense/core 0ba302dsrc/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

That comment went missing
DeltaFile
+1-1src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+1-11 files

NetBSD/pkgsrc Kfo8z03doc pkg-vulnerabilities

   pkg-vulnerabilities: add (part of) last week CVEs

   + alsa-lib cacti, chromium,
     codeblocks (no further information / links to upstream, assume not fixed),
     expat, furnace, glib2,
     gnome-font-viewer (no further information / links to upstream, assume not fixed),
     gnupg2, go, grafana,
     icingaweb2 (no further information / links to upstream, assume not fixed),
     libsoup (fixed upstream, no stable releases with the fix),
     libxml2 (fixed upstream, no stable releases with the fix),
     mongo-c-driver,
     monit (no further information / links to upstream, assume not fixed),
     openssl, png, py-octoprint, py-pdf, py-pip, py-torch, rawtherapee,
     ruby-activestorage*, salt, tcpflow,
     xenkernel (patches available, all stable versions affected)
VersionDeltaFile
1.725+69-1doc/pkg-vulnerabilities
+69-11 files

NetBSD/pkgsrc 5g9IsQedoc CHANGES-2026

   Updated ham/hackrf, devel/blosc2
VersionDeltaFile
1.864+3-1doc/CHANGES-2026
+3-11 files

OPNSense/core 1b42262src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterController.php, src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Some more style
DeltaFile
+9-9src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+0-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterController.php
+9-102 files

NetBSD/pkgsrc yP9kgu0devel/blosc2 distinfo PLIST

   blosc2: updated to 2.23.0

   Changes from 2.22.0 to 2.23.0

   * Changes to allow use of miniexpr. This breaks the ABI as a public struct has an additional field.
   * Changes to enable blosc2-openzl plugin
VersionDeltaFile
1.34+4-4devel/blosc2/distinfo
1.11+2-2devel/blosc2/PLIST
1.35+2-2devel/blosc2/Makefile
+8-83 files

NetBSD/pkgsrc QXAd297ham/hackrf distinfo Makefile

   hackrf: updated to 2026.01.3

   HackRF 2026.01.3

   Changes in this release include:

   - Fix mixer frequency lock failures.
   - Add access to larger SPI flash on HackRF Pro.
VersionDeltaFile
1.13+4-4ham/hackrf/distinfo
1.22+2-2ham/hackrf/Makefile
1.10+2-2ham/hackrf/PLIST
+8-83 files

LLVM/project d0b552ellvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-unmerge-values.mir

AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge
DeltaFile
+66-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir
+66-31 files

LLVM/project 9411f5dllvm/test/Transforms/SLPVectorizer/X86 shl-to-add-transformation2.ll

[SLP][NFC]Add another test for shl-to-add transformation, NFC
DeltaFile
+34-0llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation2.ll
+34-01 files

NetBSD/src CqFfaGKsys/arch/evbppc/nintendo/dev rtcsram.c exi.c

   wiiu: Add support for RTC clock.
VersionDeltaFile
1.2+46-11sys/arch/evbppc/nintendo/dev/rtcsram.c
1.2+13-9sys/arch/evbppc/nintendo/dev/exi.c
+59-202 files

OPNSense/ports c1d7124opnsense/update distinfo Makefile

opnsense/update: add a patch for patch to not write .orig files
DeltaFile
+3-3opnsense/update/distinfo
+2-1opnsense/update/Makefile
+5-42 files

LLVM/project 3b6b109llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel unmerge-sgpr-s16.mir

AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize

Used to fail EXPENSIVE_CHECKS because of type mismatch.
DeltaFile
+5-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
+9-72 files

LLVM/project b2fe23ellvm/test/CodeGen/AMDGPU/GlobalISel unmerge-sgpr-s16.mir

AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge
DeltaFile
+65-0llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
+65-01 files

OPNSense/ports e2037fbopnsense/installer distinfo Makefile

opnsense/installer: make sure UFS install will remove previous partitions
DeltaFile
+3-3opnsense/installer/distinfo
+2-0opnsense/installer/Makefile
+5-32 files

NetBSD/src YDldi5psys/arch/evbppc/nintendo machdep.c

   wiiu: Explicitly enable PPC access to EXI bus.
VersionDeltaFile
1.4+5-5sys/arch/evbppc/nintendo/machdep.c
+5-51 files

LLVM/project 9ceb6a8polly/lib/CodeGen LoopGeneratorsKMP.cpp LoopGeneratorsGOMP.cpp

[Polly][NFCI] Avoid R-value modification
DeltaFile
+1-1polly/lib/CodeGen/LoopGeneratorsKMP.cpp
+1-1polly/lib/CodeGen/LoopGeneratorsGOMP.cpp
+2-22 files

LLVM/project a2c7c60llvm/lib/Transforms/Scalar SeparateConstOffsetFromGEP.cpp, llvm/test/Transforms/SeparateConstOffsetFromGEP negative-i32-offset.ll

Revert "[SeparateConstOffsetFromGEP] Decompose constant xor operand if possible" (#179339)

A miscompile was found (see #175724), and it's complicated to fix. We're
going to revert for now, and look at reimplementing a fixed version
later.
DeltaFile
+0-435llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/xor-decompose.ll
+4-81llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
+2-3llvm/test/Transforms/SeparateConstOffsetFromGEP/negative-i32-offset.ll
+6-5193 files

LLVM/project 139e2fbmlir/include/mlir/Dialect/Tosa/IR TosaShapeOps.td, mlir/lib/Dialect/Tosa/IR TosaCanonicalizations.cpp

[mlir][tosa]: Add Binary Shape Ops folders (#178877)

* SUB_SHAPE
* MUL_SHAPE
* DIV_CEIL_SHAPE
* DIV_FLOOR_SHAPE
* MOD_SHAPE


Change-Id: I12500bbc05c62730e0dc9cc8d3f20b02845d407e

Signed-off-by: Udaya Ranga <udaya.ranga at arm.com>
DeltaFile
+165-0mlir/test/Dialect/Tosa/constant_folding.mlir
+141-11mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
+10-0mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
+316-113 files

LLVM/project df0c2e4llvm/lib/Target/AMDGPU SIFoldOperands.cpp

[AMDGPU] Clear no convergence flag on onperand folding. NFCI

Clear the flag. It fails verification if set, only convergent
operations may have NoConvergent flag. NFCI as it is now because
it just does not happen.
DeltaFile
+2-0llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+2-01 files

LLVM/project 79eb804llvm/lib/Target/AArch64 MachineSMEABIPass.cpp, llvm/test/CodeGen/AArch64 sme-za-lazy-save-buffer.ll sme-agnostic-za.ll

[AArch64][SME] Limit where SME ABI optimizations apply (#179273)

These were added recently with a fairly complex propagation step,
however, these optimizations can cause regressions in some cases.
    
This patch limits the cross-block optimizations to the simple case
picking a state that matches all incoming blocks. If any block doesn't
match, we fallback to using "ACTIVE", the default state.
DeltaFile
+17-149llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
+48-93llvm/test/CodeGen/AArch64/sme-za-lazy-save-buffer.ll
+27-55llvm/test/CodeGen/AArch64/sme-agnostic-za.ll
+50-19llvm/test/CodeGen/AArch64/sme-za-exceptions.ll
+15-11llvm/test/CodeGen/AArch64/sme-za-control-flow.ll
+4-17llvm/test/CodeGen/AArch64/sme-new-za-function.ll
+161-3446 files

LLVM/project a35b594clang/lib/CIR/CodeGen CIRGenModule.cpp TargetInfo.cpp, clang/test/CIR/CodeGenCUDA filter-decl.cu nvptx-basic.cu

[CIR][CUDA][HIP] Add NVPTX target info and CUDA/HIP global emission filtering (#177827)

related: #175871 

This patch adds foundational infra for device-side CUDA/HIP compilation
by introducing NVPTX target info and implementing the global emission
filtering logic.


  NVPTX Target Info to allows us to compile against that triple:
  - Add NVPTXABIInfo and NVPTXTargetCIRGenInfo classes
  - Wire up nvptx and nvptx64 triples in getTargetCIRGenInfo()
  - Add createNVPTXTargetCIRGenInfo() factory function

CUDA/HIP Global Emission Filtering (most of this is boilerplate from the
AST) This basically narrows down to:
- Skip host-only functions (no `__device__` attribute) when
`-fcuda-is-device`
   - Skip device-only functions (device without  host) on host side

    [5 lines not shown]
DeltaFile
+58-0clang/lib/CIR/CodeGen/CIRGenModule.cpp
+55-0clang/test/CIR/CodeGenCUDA/filter-decl.cu
+30-0clang/test/CIR/CodeGenCUDA/nvptx-basic.cu
+19-0clang/lib/CIR/CodeGen/TargetInfo.cpp
+4-0clang/lib/CIR/CodeGen/CIRGenModule.h
+2-0clang/lib/CIR/CodeGen/TargetInfo.h
+168-06 files