[AMDGPU][GISel] Match constrained shifts across regbank copies (#212097)
The constrained shift PatFrags already drop an (and amt, mask) that
covers the low log2(bitwidth) bits of a shift amount, but GlobalISel
never matched them after RegBankLegalize. G_CONSTANT stays in the SGPR
bank, so a VGPR G_AND reads the mask through a COPY, and an SGPR G_AND
feeding a VGPR shift has a COPY on the amount. GIM_CheckOpcode rejected
the rule before isUnneededShiftMask ran.
Set GIIgnoreCopies on the existing csh_mask_* and cshl_/csrl_/csra_
PatFrags so the matcher looks through those copies without changing the
pattern shape. isUnneededShiftMask uses
getIConstantVRegValWithLookThrough to read the SGPR constant. GISelFlags
do not affect SelectionDAG.
Co-authored by Cursor
[AMDGPU] Correct the SDTypeProfile for AMDGPUISD::PC_ADD_REL_OFFSET. (#231369)
The operands are two i32s rather than an iPTR. See the code in
buildPCRelGlobalAddress.
Found by adding is SDTCisSameAs to SDNodeInfo::verifyNode
[Offload][OpenMP] Report source location of data transfers and synchr… (#223730)
…onization
This PR improves `LIBOMPTARGET_INFO` diagnostics so data-transfer and
synchronization messages carry a source location, and so
runtime-internal transfers show a meaningful name instead of `unknown`.
### Changes
- Thread the region's source location (`ident_t *Loc`) through the
submit/retrieve/copy-info paths and append `, at <file>:<line>:<col>` to
"Copying data…" messages (emitting nothing when no location is
available, avoiding `unknown:0:0`).
- Emit a new `Waiting for asynchronous operations to complete` message,
with source location, before the runtime synchronizes.
- Add an optional name for runtime-internal transfers so they report
`DeviceEnvironment` / `IndirectCallTable` instead of `unknown`.
### Effect
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pf: Parse the GETSTATES state id as 64 bits
The GETSTATES dump sends PF_ST_ID as a u64, but the request parser
reads it as a u32 and rejects an id taken from the dump with EINVAL.
Nothing in base sends PF_ST_ID. Parse and document it as a u64.
Reviewed by: kp
Fixes: 2cef62886dc7 ("pf: convert state retrieval to netlink")
MFC after: 1 week
Sponsored by: Rubicon Communications, LLC ("Netgate")
Differential Revision: https://reviews.freebsd.org/D60543
FunctionAttrs: Check all uses when inferring captures for argument SCCs
When merging the capture components of an SCC of arguments, only the
first use of each argument was considered, because of a misplaced break.
If an argument was passed to another argument in the SCC first and to a
capturing argument outside of it later, it was incorrectly inferred to
not be captured.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
libpfctl: Return max_win and mss of state peers
The kernel sends PF_STP_MAX_WIN and PF_STP_MSS for both peers of a
state, but struct pfctl_state_peer has no fields for them and libpfctl
dropped them. Add the fields and parse the attributes.
Reviewed by: kp
Sponsored by: Rubicon Communications, LLC ("Netgate")
Differential Revision: https://reviews.freebsd.org/D60544
[SLP]Discard non-associative loop accumulator
A two-value reduction is unordered by commutativity alone; the
accumulator reassociates it across loop iterations. The costing
also double-credited the loop-carried root.
Fixes #231212
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/231529
[AMDGPU] Fix SDWA selection combining (#218512)
Fix miscompile when the combined SDWA instruction computes a different
value than the two instructions it replaces
- Stop merging dst_sel, because two dst_sel cannot be merged into one
- Stop merging equal high src_sel, because the operand already shifted
its field down to the low bits
- Use the operand sext only when the instruction reads the whole dword,
otherwise keep the instruction sext
[KnownFPClass] Remove propagateDenormal and propagateCanonicalizingSrc (#229898)
Removes `propagateDenormal` and `propagateCanonicalizingSrc` since there
are no remaining in-tree uses for these functions, and because there are
no unit tests for these functions.
https://github.com/llvm/llvm-project/pull/225904 removes the last
remaining in-tree uses for
`propagateDenormal` and `propagateCanonicalizingSrc`, which was only
used to handle the special case of `ldexp(x, 0) --> x`.
It may be worth exploring re-adding these functions back in the future,
as they are non-trivial to implement.
Also removed references to `propagateCanonicalizingSrc` in the
documentation for `KnownFPClass::canonicalize`.
[libc] Make entrypoint object linting incremental (#231311)
The entrypoint lint rules used add_custom_target directly, forcing all
lint targets to re-run every time libc-lint was invoked.
Switch to add_custom_command with a stamp file so targets are only
re-linted when their sources or dependencies change.
Assisted-by: Automated tooling, human reviewed.
[DAGCombiner] `visitANY_EXTEND` - fold `(aext (freeze (load x)))` -> `(aext (truncate (freeze (extload x))))` (#218454)
Adds the fold `aext (freeze (load x))` (no multiple uses of `load x`
supported with `freeze`):
1. `freeze (extload x )` when one use of `freeze (load x)`
2. `freeze (extload x )` & when multiple uses of `freeze (load x)` are
there, the `freeze (load x)` is replaced with `truncate (freeze (extload
x ))`
while keeping the existing behaviour where `aext (load x)` is folded to:
1. `extload x` when one use of `load x`
2. `extload x` & when multiple uses of `load x` are there, the `load x`
is replaced with `truncate (extload x )`
[X86] combineX86ShufflesRecursively - bail on any illegal type or if the type is larger than the root (#231505)
MVT now supports various non-pow2 types, so we can't just check for
isSimple() and assert on the sizes anymore - check for legality instead.
Fixes #231453
[SimplifyLibCalls] Fold more FP libcalls to intrinsics. (#227697)
Previously SimplifyLibCalls would only replace a subset of libcalls with
intrinsics.
It looks like a number of intrinsics are currently not handled, but that
looks unintentional unless I am missing something.
This patch adds a number of missing intrinsics to be converted.
This should ensure middle-end passes only have to deal with the
intrinsic versions.
Should mostly be NFC end-to-end:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1505.
PR: https://github.com/llvm/llvm-project/pull/227697
[libc][cmake] Cache compile options from config and arch to speed up configuration. (#225438)
Caching the results of `_get_compile_options_from_config`,
`_get_compile_options_from_arch`, and `_get_common_compile_options`
reduces redundant option computation during the CMake configuration
stage across hundreds of entrypoint objects. Also adds an early return
in `_get_compile_options_from_flags` when no flags are supplied.
if_bnxt: fix powerpc build of the MPC ring code
powerpc has no 16-bit acquire/release atomics, so the
atomic_load_acq_16() and atomic_store_rel_16() calls on the MPC TX
ring indices fail to build there. Make the producer and consumer
indices 32 bits wide and use the 32-bit primitives.
Reviewed by: gallatin, chandrakanth.patil_broadcom.com
Sponsored by: Broadcom Inc
MFC after: 1 week
Fixes: 088a42c0ff76 ("if_bnxt: add MPC (Mid-Path Channel) ring infrastructure")
Differential Revision: https://reviews.freebsd.org/D60698
[SelectionDAG] Don't unfold a load in the pre-RA schedulers if the unfolded load already exists (#226652)
Fixes #204079
When the pre-RA scheduler has to duplicate a flags-producing instruction
with a folded load (a `CMP32mi` here) to break an EFLAGS interference,
it first tries to unfold it into a plain load and a register operation.
`X86InstrInfo::unfoldMemoryOperand` builds that load with
`getMachineNode`, which CSEs it with a load of the same address that is
already in the DAG, and `TryUnfoldSU` then redirects the chain uses of
the folded node to that existing load. Its chain result already had
users, so one of the redirected `TokenFactor`s became a duplicate of
another one and `ReplaceAllUsesOfValueWith` deleted it, while the
scheduler still had an SUnit pointing at it. The emitter later ran into
the freed node, hence the `<<Deleted Node!>>` in the report.
`ScheduleDAGFast` carries the same code and crashes the same way with
`-pre-RA-sched=fast`.
Both schedulers now give up on unfolding when the unfolded load already
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IR: Add wasm_emscripten_invokecc calling convention keyword
WASM_EmscriptenInvoke had no textual IR spelling and was printed as
cc99. Tests using cc99 as an arbitrary custom convention now use cc1000.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[X86][FP16] Widen v8f16/v16f16 compares to 512 bits without VLX (#231437)
With AVX512FP16 but without AVX512VL, v8f16/v16f16 compares are
scalarized: one VUCOMISH and SETcc per element, then the mask is rebuilt
with VPINSRB/VPMOVZXBQ/VPTESTMQ. This also makes the FP logic conversion
in convertIntLogicToFPLogic a loss for scalar f16 compares, which it
combines as v8f16 compares.
Mark v8f16/v16f16 SETCC as Custom whenever AVX512FP16 is available, and
select the resulting CMPM nodes without VLX by widening them to a
512-bit VCMPPH, as is already done for f32 and f64. Strict compares are
left alone, since widening them could raise exceptions for the upper
elements.
The first commit precommits tests in `avx512fp16-novl.ll` (register,
masked and broadcast forms, and a pair of scalar compares); the existing
`select` test also improves.
Split out of #226222, so that its f16 FP logic conversion no longer
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