LLVM/project 6bf8d4bllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize iv-select-cmp-decreasing.ll first-order-recurrence.ll

[VPlan] Look through BCast when folding live-ins (#202527)

This gives us some minor improvements.
DeltaFile
+20-20llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
+12-12llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+6-10llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
+4-2llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+3-3llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
+2-2llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
+47-494 files not shown
+51-5310 files

FreeBSD/ports a09da5eeditors/hexapoda distinfo Makefile

editors/hexapoda: Update to 0.2.4
DeltaFile
+7-3editors/hexapoda/distinfo
+1-2editors/hexapoda/Makefile
+2-0editors/hexapoda/Makefile.crates
+10-53 files

FreeBSD/ports 087cba3sysutils/reqlog distinfo Makefile

sysutils/reqlog: Update to 0.8.1
DeltaFile
+5-5sysutils/reqlog/distinfo
+1-1sysutils/reqlog/Makefile
+6-62 files

OPNSense/src 8d3e14esys/dev/axgbe xgbe-phy-v2.c if_axgbe_pci.c

axgbe: Implement ifdi_i2c_req for diagnostics information

Fixes https://github.com/opnsense/src/issues/178
DeltaFile
+23-29sys/dev/axgbe/xgbe-phy-v2.c
+11-0sys/dev/axgbe/if_axgbe_pci.c
+2-1sys/dev/axgbe/xgbe.h
+36-303 files

OPNSense/src 3cbd64asys/dev/axgbe xgbe-phy-v2.c xgbe-i2c.c

axgbe: gracefully handle i2c bus failures

In (unknown) situations it seems the i2c bus can have trouble,
while nothing about the current link state has changed, the driver
would react by going into a link down state, and start busylooping
on up to 4 cores. Even if there was a valid link, such spinning
on a cpu by a kernel thread would wreak havoc to existing and
new connections.

This patch does the following:
1. If such a bus failure occurs, we keep the last known link state.
2. Prevent busy looping by implementing the lockmgr() facility to
be able to sleep while the i2c code waits on the i2c ISR. We cap
this with a timeout.
3. Pin the admin queues to the last CPU in the system, to prevent
other scenarios where busy looping might occur from landing on CPU
0, which especially seems to cause a lot of issues.

Given the design constraints both in hardware and in software,

    [9 lines not shown]
DeltaFile
+62-29sys/dev/axgbe/xgbe-phy-v2.c
+37-13sys/dev/axgbe/xgbe-i2c.c
+5-0sys/dev/axgbe/xgbe.h
+4-1sys/dev/axgbe/xgbe-mdio.c
+2-1sys/dev/axgbe/if_axgbe_pci.c
+1-1sys/dev/axgbe/xgbe-phy-v1.c
+111-456 files

OPNSense/src 2de9498sys/netinet ip_output.c ip_fastfwd.c, sys/netinet6 ip6_output.c ip6_fastfwd.c

pf|ipfw|netinet6?: shared IP forwarding

This removes the if_output calls in the pf(4) code that escape further
processing by defering the forwarding execution to the network stack
using on/off style sysctls for both IPv4 and IPv6.

Also see: https://reviews.freebsd.org/D8877
DeltaFile
+136-12sys/netinet6/ip6_output.c
+108-10sys/netinet/ip_output.c
+39-48sys/netinet6/ip6_fastfwd.c
+28-46sys/netpfil/ipfw/ip_fw_pfil.c
+36-31sys/netinet6/ip6_forward.c
+28-37sys/netinet/ip_fastfwd.c
+375-1846 files not shown
+459-23712 files

OPNSense/src 0f0ca47sys/dev/axgbe xgbe-phy-v2.c if_axgbe_pci.c

axgbe: XXX leftovers to figure out

axgbe: several patches from 22.1 not yet present in FreeBSD
axgbe: remove old annotations and a bit of whitespace cleanup

This is a stub from applying f45a2d1e5a + b9eca9d898 on top of
the upstreamed changes.  The enable_rss remove is correct and
looks like an oversight in the upstreaming.  About the others
I'm not sure but since we have them on file here we can discuss
and rearrange.
DeltaFile
+4-0sys/dev/axgbe/xgbe-phy-v2.c
+0-1sys/dev/axgbe/if_axgbe_pci.c
+1-0sys/dev/axgbe/xgbe_osdep.h
+5-13 files

OPNSense/src b4c91bcsys/dev/axgbe if_axgbe_pci.c xgbe-common.h

axgbe: add support for Yellow Carp Ethernet device
DeltaFile
+4-0sys/dev/axgbe/if_axgbe_pci.c
+2-0sys/dev/axgbe/xgbe-common.h
+6-02 files

OPNSense/src 311f7dcsys/dev/axgbe xgbe-phy-v2.c xgbe-mdio.c

axgbe: LED control for A30 platform

Since the I/O expander chip does not do a reset when soft power
cycling, the driver will first turn off all LEDs when initializing,
although no specific routine seems to be called when powering down.
This means that the LEDs will stay on until the driver has booted up,
after which the driver will be in a consistent state.
DeltaFile
+86-0sys/dev/axgbe/xgbe-phy-v2.c
+11-2sys/dev/axgbe/xgbe-mdio.c
+10-0sys/dev/axgbe/xgbe.h
+107-23 files

LLVM/project bfda9f2clang/lib/CodeGen CGHLSLRuntime.cpp, clang/test/CodeGenHLSL preserve-interface-dce.hlsl preserve-interface.hlsl

Revert "[clang][SPIR-V] Implement -fspv-preserve-interface (#196404)"

This reverts commit 95c24830265cba8c4844dda3384025bac0bf96b4.
DeltaFile
+0-69llvm/test/CodeGen/SPIRV/preserve-interface.ll
+0-51llvm/test/CodeGen/SPIRV/preserve-interface-dce.ll
+5-39llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+0-25clang/test/CodeGenHLSL/preserve-interface-dce.hlsl
+0-24clang/test/CodeGenHLSL/preserve-interface.hlsl
+0-15clang/lib/CodeGen/CGHLSLRuntime.cpp
+5-2234 files not shown
+6-24510 files

LLVM/project 1d484e8clang/lib/CodeGen CGHLSLRuntime.cpp, clang/test/CodeGenHLSL preserve-interface-dce.hlsl preserve-interface.hlsl

Revert "[clang][SPIR-V] Implement -fspv-preserve-interface (#196404)"

This reverts commit 95c24830265cba8c4844dda3384025bac0bf96b4.
DeltaFile
+0-69llvm/test/CodeGen/SPIRV/preserve-interface.ll
+0-51llvm/test/CodeGen/SPIRV/preserve-interface-dce.ll
+5-39llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+0-25clang/test/CodeGenHLSL/preserve-interface-dce.hlsl
+0-24clang/test/CodeGenHLSL/preserve-interface.hlsl
+0-15clang/lib/CodeGen/CGHLSLRuntime.cpp
+5-2234 files not shown
+6-24510 files

NetBSD/pkgsrc-wip 0fe158f. Makefile, py-nvchecker PLIST Makefile

py-nvchecker: add new package
DeltaFile
+196-0py-nvchecker/PLIST
+37-0py-nvchecker/Makefile
+5-0py-nvchecker/distinfo
+2-0py-nvchecker/DESCR
+1-0Makefile
+241-05 files

NetBSD/pkgsrc TnJua5zdatabases/postgresql-postgis2 Makefile

   databases/postgresql-postgis2: Accept pgsql 18

   PostgreSQL 18 is ok, per upstream's README.postgis ("and above") (and
   if it didn't work I'd be hearing about it on postgis-devel@).

   In PR pkg/60316, Jim Spath reports that adding 18 and testing with
   qgis was successful (and also that pgsql 14 is still ok, not related
   to this commit but good to know).
VersionDeltaFile
1.195+2-2databases/postgresql-postgis2/Makefile
+2-21 files

LLVM/project 3fec9c7mlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp, mlir/test/Conversion/SPIRVToLLVM cl-ops-to-llvm.mlir cast-ops-to-llvm.mlir

[mlir][SPIR-V] Add SPIRVToLLVM direct conversions for cast, CL, GL and logical ops (#202506)

Lower the OpenCL extended instruction set math ops, GL math ops (Trunc,
Asin, Acos, Atan), logical Ordered/Unordered, and the pointer cast ops
to their LLVM dialect equivalents
DeltaFile
+101-0mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
+55-0mlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
+45-0mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+36-0mlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir
+28-0mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
+265-05 files

LLVM/project c3d13cellvm/lib/Target/AMDGPU AMDGPULowerBufferFatPointers.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll

[AMDGPU] Use alloc size for array stride in LowerBufferFatPointers (#202530)

Array elements are laid out at multiples of getTypeAllocSize, not
getTypeStoreSize

LLVM memory model lays out array element `i` at `i * allocSize`
(reflected in `DataLayout::getTypeAllocSize`), apply it for fat pointers
to prevent miscompile
DeltaFile
+28-0llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+4-4llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+32-42 files

LLVM/project 38da686llvm/unittests/Support/DynamicLibrary DynamicLibraryTest.cpp

Revert "[test][Support] Disable CFI-icall for DynamicLibrary Overload test (#…"

This reverts commit e34dc2960ce94be069ac2a973c943b61ef9b3b23.
DeltaFile
+1-1llvm/unittests/Support/DynamicLibrary/DynamicLibraryTest.cpp
+1-11 files

LLVM/project 544af82mlir/include/mlir/Interfaces ControlFlowInterfaces.td

address comments
DeltaFile
+37-7mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+37-71 files

LLVM/project ab31c28mlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/lib/Dialect/LLVMIR/IR NVVMDialect.cpp

[MLIR][NVVM] Add support for narrow-fp to bf16x2 conversions (#200157)

This change adds the following NVVM Ops to support narrow-fp to bf16x2
conversions:

- `nvvm.convert.f6x2.to.bf16x2`
- `nvvm.convert.f4x2.to.bf16x2`
- `nvvm.convert.f8x2.to.bf16x2` (updated to allow `E4M3FN` and `E5M2`
types)

Also removes unnecessary verifiers for narrow-fp to `f16x2` conversions
to instead use `TypeAttrOf` to validate the source type in the ODS
definition.
DeltaFile
+137-41mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+112-26mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+69-5mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
+42-0mlir/test/Target/LLVMIR/nvvm/convert_fp6x2.mlir
+40-0mlir/test/Target/LLVMIR/nvvm/convert_fp8x2.mlir
+22-0mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
+422-726 files

OpenBSD/ports CYRKVstdevel/py-python-discovery distinfo Makefile

   Update py-python-discovery 1.2.1 -> 1.4.0
   Changelogs: https://github.com/tox-dev/python-discovery/releases
VersionDeltaFile
1.4+2-2devel/py-python-discovery/distinfo
1.5+1-2devel/py-python-discovery/Makefile
+3-42 files

FreeBSD/ports bc25256net/samba422 distinfo Makefile, net/samba422/files 0001-Compact-and-simplify-modules-build-and-config-genera.patch

net/samba422: update to 4.22.10

PR:     295635
Approved by:    samba (kiwi)
DeltaFile
+5-4net/samba422/files/0001-Compact-and-simplify-modules-build-and-config-genera.patch
+3-3net/samba422/distinfo
+1-2net/samba422/Makefile
+9-93 files

OpenBSD/ports s6ESs4Idevel/py-typer distinfo Makefile, devel/py-typer/pkg PLIST

   Update typer 0.26.2 -> 0.26.7
   Changelogs: https://github.com/fastapi/typer/releases
VersionDeltaFile
1.18+2-2devel/py-typer/distinfo
1.7+0-3devel/py-typer/pkg/PLIST
1.22+1-1devel/py-typer/Makefile
+3-63 files

LLVM/project 8b49023compiler-rt/test/builtins/Unit lit.cfg.py

[Compiler-rt][test] Fix circular link dependency between builtins and libc (#199482)

Currently, the link order is `libclang_rt.builtins.a -lc -lm`. Builtins
are scanned first after which symbols like `abort` are unresolved
references that are resolved through libc.a. However, resolving the
references to these symbols further lead to undefined references to
`_aeabi_uldivmod` etc. that can only resolved through builtins.
Reversing the order also wont fix the issue because `libc.a` introduces
`__aeabi_uldivmod` which is resolved by builtins but it introduces
`abort` which can only be resolved libc.a.

This patch fixes this by wrapping the archives in a linker group
(--start-group/--end-group), which instructs the linker to rescan all
archives in the group until no new symbols can be resolved.

This error is exposed only when bfd like linkers are used.
DeltaFile
+3-1compiler-rt/test/builtins/Unit/lit.cfg.py
+3-11 files

LLVM/project f2d2491clang/lib/CodeGen CGHLSLRuntime.cpp, clang/test/CodeGenHLSL/resources cbuffer.hlsl cbuffer-empty-struct-array.hlsl

Revert "[HLSL] Set visibility of cbuffer global variables to internal (#200312)"

This reverts commit 7ed2f70f6c5b3849017f0eb38c521cc5d42040a2.
DeltaFile
+0-38llvm/test/CodeGen/DirectX/cbuffer_global_elim.ll
+0-36llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
+10-14clang/test/CodeGenHLSL/resources/cbuffer.hlsl
+0-17llvm/lib/Frontend/HLSL/CBuffer.cpp
+2-10clang/lib/CodeGen/CGHLSLRuntime.cpp
+4-4clang/test/CodeGenHLSL/resources/cbuffer-empty-struct-array.hlsl
+16-11911 files not shown
+30-13717 files

FreeBSD/ports 3f2785fnet/samba423 distinfo Makefile

net/samba423: update to 4.23.8

PR:     295635
Approved by:    samba (kiwi)
DeltaFile
+3-3net/samba423/distinfo
+1-2net/samba423/Makefile
+4-52 files

FreeBSD/src c0ec8ffshare/man/man7 stats.7

stats: Reference zpool-iostat(8) instead of zpool(8)

MFC after:      3 days
DeltaFile
+2-2share/man/man7/stats.7
+2-21 files

LLVM/project 95c2483clang/lib/CodeGen CGHLSLRuntime.cpp, clang/test/CodeGenHLSL preserve-interface-dce.hlsl preserve-interface.hlsl

[clang][SPIR-V] Implement -fspv-preserve-interface (#196404)

This flag, originally implemented in DXC, prevents GlobalDCE from
removing entry-point interface variables, even if they are unreferenced
after inlining.

This adds `HLSLSpvPreserveInterface` to `LangOptions.def` and
`Options.td`. In `CGHLSLRuntime::finishCodeGen()`, it adds all
`addrspace(7)` and `addrspace(8)` globals to `llvm.compiler.used`.

In `processGlobalValue()`, it extends the condition that emits
`spv_unref_global` to fire for globals whose only uses come from
`llvm.compiler.used` or `llvm.used`.

Fixes https://github.com/llvm/llvm-project/issues/136936
DeltaFile
+69-0llvm/test/CodeGen/SPIRV/preserve-interface.ll
+51-0llvm/test/CodeGen/SPIRV/preserve-interface-dce.ll
+39-5llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+25-0clang/test/CodeGenHLSL/preserve-interface-dce.hlsl
+24-0clang/test/CodeGenHLSL/preserve-interface.hlsl
+15-0clang/lib/CodeGen/CGHLSLRuntime.cpp
+223-54 files not shown
+245-610 files

LLVM/project 7f6f60fmlir/lib/Conversion/MemRefToSPIRV MemRefToSPIRV.cpp, mlir/test/Conversion/MemRefToSPIRV atomic.mlir

[mlir][SPIR-V] Support floating-point atomic_rmw addf in MemRefToSPIRV (#202330)
DeltaFile
+18-0mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
+7-8mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
+25-82 files

LLVM/project 99f6a20clang/lib/AST/ByteCode InterpBuiltin.cpp, clang/test/AST/ByteCode codegen.cpp

[clang][bytecode] Check floating-point semantics in `Memcpy` op (#202204)

We shouldn't try to do the memcpy if the semantics don't match.
DeltaFile
+11-5clang/lib/AST/ByteCode/InterpBuiltin.cpp
+3-0clang/test/AST/ByteCode/codegen.cpp
+14-52 files

NetBSD/pkgsrc mPeagE6graphics/graphite2 Makefile

   graphite2: needs python tool to build now
VersionDeltaFile
1.24+2-2graphics/graphite2/Makefile
+2-21 files

LLVM/project 20bd88dllvm/test/CodeGen/X86 atomic-load-store.ll

[X86] Add aligned atomic vector store tests wider than 128 bits (NFC)

These >128-bit stores are expanded to __atomic_store libcalls regardless
of alignment, since x86 caps atomic ops at 128 bits.
DeltaFile
+996-0llvm/test/CodeGen/X86/atomic-load-store.ll
+996-01 files