FreshBSD

LLVM/project d221c2d — llvm/test/tools/llubi store_dead_gep.ll intr_memory.ll, llvm/tools/llubi/lib Interpreter.cpp Context.h

2026-06-27 00:43:11 UTC by Zhige Chen via GitHub on ⎇

main

[llubi] Poison object contents in `llvm.lifetime.end` (#206036)

Make `@llvm.lifetime.end` poison the object content. This removes the
need of special-casing for dead objects in `ExecutorBase::load()`, etc.

See also [#204932
(comment)](https://github.com/llvm/llvm-project/pull/204932#discussion_r3465364425).

Delta		File
+22	-0	llvm/test/tools/llubi/store_dead_gep.ll
+19	-0	llvm/test/tools/llubi/intr_memory.ll
+3	-6	llvm/tools/llubi/lib/Interpreter.cpp
+4	-3	llvm/tools/llubi/lib/Context.h
+0	-4	llvm/tools/llubi/lib/ExecutorBase.cpp
+48	-13	5 files

LLVM/project ef40205 — clang/docs UndefinedBehaviorSanitizer.md LanguageExtensions.md

2026-06-27 00:30:42 UTC by Reid Kleckner on ⎇

users/rnk/markdown-docs

Merge users/rnk/clang-md-1b into markdown-docs

Delta		File
+32	-32	clang/docs/UndefinedBehaviorSanitizer.md
+18	-26	clang/docs/LanguageExtensions.md
+50	-58	2 files

LLVM/project fd76c9b — llvm/lib/Target/WebAssembly WebAssemblyCFGStackify.cpp WebAssemblyLateEHPrepare.cpp, llvm/test/CodeGen/WebAssembly cfg-stackify-eh.ll

2026-06-27 00:21:28 UTC by Derek Schuff via GitHub on ⎇

main

[WebAssembly] Fix nondeterminism by using MapVector for pointer-keyed maps [NFC] (#205184)

Several DenseMaps in the WebAssembly backend keyed by pointers were
being
iterated over, potentially leading to nondeterministic codegen
(differing
try/delegate nesting, virtual register allocation, or PHI node
insertion)
due to nondeterministsic pointer values.

This patch replaces these DenseMaps with MapVectors to guarantee
deterministic iteration order:
  - UnwindDestToTryRanges in WebAssemblyCFGStackify.cpp
  - EHPadToUnwindDest in WebAssemblyCFGStackify.cpp
  - EHPadToRethrows in WebAssemblyLateEHPrepare.cpp
  - UnwindDestToNewPreds in WebAssemblyLowerEmscriptenEHSjLj.cpp

Fixes: #204883

Co-authored-by: Ammar Askar <aaskar at google.com>
Assisted-by: Antigravity

Delta		File
+56	-1	llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
+4	-2	llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+3	-1	llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
+2	-1	llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+65	-5	4 files

LLVM/project 7ac6e52 — clang/docs UndefinedBehaviorSanitizer.md LanguageExtensions.md

2026-06-27 00:20:10 UTC by Reid Kleckner on ⎇

users/rnk/clang-md-1b

[docs] Fix follow-up MyST rendering issues

Delta		File
+32	-32	clang/docs/UndefinedBehaviorSanitizer.md
+18	-26	clang/docs/LanguageExtensions.md
+50	-58	2 files

FreeBSD/ports a1fb4af — security/p5-IO-Socket-SSL distinfo Makefile

2026-06-27 00:09:10 UTC by Sergei Vyshenski via Vladimir Druzenko (vvd) on ⎇

main

security/p5-IO-Socket-SSL: Update 2.098 => 2.099

Changelog:
https://metacpan.org/release/SULLR/IO-Socket-SSL-2.099/source/Changes

PR:             296304
Sponsored by:   UNIS Labs

Delta		File
+3	-3	security/p5-IO-Socket-SSL/distinfo
+1	-1	security/p5-IO-Socket-SSL/Makefile
+4	-4	2 files

FreeBSD/ports 9d06d0e — devel/p5-CLI-Simple distinfo pkg-plist

2026-06-27 00:02:45 UTC by Einar Bjarni Halldórsson via Vladimir Druzenko (vvd) on ⎇

main

devel/p5-CLI-Simple: Update 2.0.3 => 2.0.6

Changelog:
https://github.com/rlauer6/CLI-Simple/blob/2.0.6/ChangeLog

Release Notes:
https://github.com/rlauer6/CLI-Simple/blob/2.0.6/release-notes/release-notes-2.0.4.md
https://github.com/rlauer6/CLI-Simple/blob/2.0.6/release-notes/release-notes-2.0.6.md

PR:             296303
Sponsored by:   UNIS Labs

Delta		File
+3	-3	devel/p5-CLI-Simple/distinfo
+3	-2	devel/p5-CLI-Simple/pkg-plist
+1	-1	devel/p5-CLI-Simple/Makefile
+7	-6	3 files

LLVM/project a975bdd — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:30 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-mark-as-verifier-clean

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 2d6f80e — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:29 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-mark-as-verifier-clean

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 00733c9 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:26 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-add-test-coverage-for-newpm

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project e0bd0b9 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:26 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-add-test-coverage-for-newpm

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 5886cd3 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:22 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-brcc-should-not-set-isbarrier

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 79a0892 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:20 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-brcc-should-not-set-isbarrier

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project b4523ff — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:17 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-make-delayslotfiller-handle-implicit-call-operands

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 65f9f06 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:15 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-make-delayslotfiller-handle-implicit-call-operands

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 40833cb — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:12 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-fix-delay-slot-filler-for-ret-instructions

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project bb23f8e — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:09 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-fix-delay-slot-filler-for-ret-instructions

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project c853ce7 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:06 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-port-asmprinter-to-newpm

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 1e95960 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:56:02 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-port-asmprinter-to-newpm

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project cd45a9d — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:59 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-port-memalucombiner-to-newpm

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 9279775 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:56 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-port-memalucombiner-to-newpm

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 66c6b54 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:53 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-remove-setflagalucombinerpass-creation-function

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 377269c — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:51 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-remove-setflagalucombinerpass-creation-function

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 8acee93 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:48 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-port-delayslotfiller-to-newpm

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project c16bb14 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:47 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-port-delayslotfiller-to-newpm

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 6cae8a5 — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:44 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-add-lanaicodegenpassbuilder

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 64c03cc — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:43 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-add-lanaicodegenpassbuilder

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 658ed9c — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:40 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-port-selectiondagisel-to-newpm

rebase

Created using spr 1.3.7

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 1c68d4b — llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp, llvm/test/CodeGen/ARM vector-lrint.ll fpclamptosat_vec.ll

2026-06-26 23:55:37 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.lanai-port-selectiondagisel-to-newpm

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]

Delta		File
+1,833	-1,841	llvm/test/CodeGen/ARM/vector-lrint.ll
+1,197	-1,198	llvm/test/CodeGen/ARM/fpclamptosat_vec.ll
+0	-2,217	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2.txt
+921	-940	llvm/test/CodeGen/ARM/vector-llrint.ll
+1,849	-0	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop2-fake16.txt
+1,755	-0	llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+7,555	-6,196	619 files not shown
+41,901	-19,511	625 files

LLVM/project 7f85e36 — llvm/include/llvm/Passes CodeGenPassBuilder.h

2026-06-26 23:55:12 UTC by Aiden Grossman via GitHub on ⎇

main

[NewPM] Do not require implementation of addPreISel

This patch removes the llvm_unreachable in addPreISel so that one can
implement a CodeGenPassBuilder that works without needing to implement
this specific override, which matches the behavior in TargetPassConfig.

Reviewers: paperchalice, arsenm, aeubanks

Pull Request: https://github.com/llvm/llvm-project/pull/206170

Delta		File
+1	-3	llvm/include/llvm/Passes/CodeGenPassBuilder.h
+1	-3	1 files

LLVM/project 7df70b6 — llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs lanai_generated_funcs.ll.generated.expected lanai_generated_funcs.ll.nogenerated.expected

2026-06-26 23:54:39 UTC by Aiden Grossman on ⎇

users/boomanaiden154/lanai-mark-as-verifier-clean

rebase

Created using spr 1.3.7

Delta		File
+2	-2	llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_generated_funcs.ll.generated.expected
+2	-2	llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/lanai_generated_funcs.ll.nogenerated.expected
+4	-4	2 files