[AST][NFC] Move AST dump colors into separate namespace (#183341)
Preparatory work for Clang AST PCH, which will include ASTDumperUtils.h.
Polluting the clang namespace with colors would lead to a collision with
clang/lib/Frontend/TextDiagnostic.cpp.
NAS-139988 / 26.0.0-BETA.1 / Enable SMB3 unix extensions for multiprotocol shares (#18300)
When a share is configured for multiprotocol access, for example, SMB +
NFS, SMB + local via apps or containers, etc, then we will enable the
SMB3 unix extensions so that client operating systems that support them
(for example modern Linux kernels with SMB3 POSIX support) can use
filesystem primitives that are not normally exposed through standard SMB
semantics.
Some functionality depends on the configuration of the underlying
dataset. For example, you cannot interact with POSIX ACLs on a dataset
that is not configured to support POSIX ACLs.
Windows clients that do not support the extenions will continue to
behave normally.
[clang][ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (#182917)
These are the compiler changes that depend on the runtime changes in
https://github.com/llvm/llvm-project/pull/183154. The runtime changes
need to have landed first. The dynamic shadow global is still set to
zero, but this will change in the future.
[lld][Webassembly] Avoid a signed overflow on large sections (#183225)
wasm sections sizes are specified as u32s, and thus can be as large as
4GB. wasm-ld currently stores the offset into a section as an int32_t
which overflows on large sections and results in a crash. This change
makes it a int64_t to accommodate any valid wasm section and allow
catching even larger sections instead of wrapping around.
This PR fixes the issue by storing the offset as a int64_t, as well as
adding extra checks to handle un-encodeable sections to fail instead of
producing garbage wasm binaries, and also adds lit tests to make sure it
works. I confirmed the test fails on main but passes with this fix.
This is the same as https://github.com/llvm/llvm-project/pull/178287 but
deletes the temporary files the tests create and requires the tests run
on a 64-bit platform to avoid OOM issues due to the large binaries it
creates.
[AArch64] Extend condition optimizer to support unsigned comparisons (#144380)
We have to be extra careful to not allow unsigned wraps, however. This
also required some adjusting of the logic in adjustCmp, as well as
compare the true imm value with add or sub taken into effect.
Because SIGNED_MIN and SIGNED_MAX cannot be an immediate, we do not need
to worry about those edge cases when dealing with unsigned comparisons.
AMDGPU: Implement expansion for f64 exp
I asked AI to port the device libs reference implementation.
It mostly worked, though it got the compares wrong and also
missed a fold that happened in compiler. With that fixed I get
identical DAG output, and almost the same globalisel output (differing
by an inverted compare and select). Also adjusted some stylistic choices.
[SPIRV] Add support for emitting DebugFunction debug info instructions
This commit adds support for emitting SPIRV DebugFunction and
DebugFunctionDefinition instructions for function definitions.
[SPIRV] Refactor NonSemantic debug info placement logic.
Refactor the logic for determining which NonSemantic.Shader.DebugInfo.100
instructions should be placed in the global section from a whitelist
to a blacklist approach.
[MC] Add --reloc-section-sym option to control section symbol conversion (#182725)
When generating relocations for non-ifunc local symbols that satisfies
several conditions, the integrated assembler converts them to reference
the section symbol (STT_SECTION) instead, folding the original symbol's
offset into the addend. This allows the original local symbol to be
omitted from .symtab, but the STT_SECTION symbol itself must be present,
so the conversion saves .symtab entries only when a section has more
than one local symbol referenced by relocations.
As GAS will likely add --reloc-section-sym, add --reloc-section-sym to
control this
conversion:
- all (default): convert all eligible local symbols.
(Note: There are many ineligible conditions, see
ELFObjectWriter::useSectionSymbol)
- internal: only convert .L prefix local symbols (usually
compiler-generated)
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Enable SMB3 unix extensions for multiprotocol shares
When a share is configured for multiprotocol access, for example,
SMB + NFS, SMB + local via apps or containers, etc, then we will enable
the SMB3 unix extensions so that client operating systems that support
them (for example modern Linux kernels with SMB3 POSIX support) can use
filesystem primitives that are not normally exposed through standard
SMB semantics.
Some functionality depends on the configuration of the underlying
dataset. For example, you cannot interact with POSIX ACLs on a dataset
that is not configured to support POSIX ACLs.
Windows clients that do not support the extenions will continue to
behave normally.
[lldb] Batch breakpoint step-over for threads stopped at the same site (re-land) (#182944)
Re-land https://github.com/llvm/llvm-project/pull/180101 since it was
reverted here https://github.com/llvm/llvm-project/pull/182431 because
of a flaky test. This PR include the modified test that should pass from
https://github.com/llvm/llvm-project/pull/182415 :
When multiple threads are stopped at the same breakpoint, LLDB currently
steps each thread over the breakpoint one at a time. Each step requires
disabling the breakpoint, single-stepping one thread, and re-enabling
it, resulting in N disable/enable cycles and N individual vCont packets
for N threads. This is a common scenario for hot breakpoints in
multithreaded programs and scales poorly.
This patch batches the step-over so that all threads at the same
breakpoint site are stepped together in a single vCont packet, with the
breakpoint disabled once at the start and re-enabled once after the last
thread finishes.
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[VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (#182254)
Currently if -vplan-verify-each is enabled and a pass fails the
verifier, it will output the failure to stderr but will still finish
with a zero exit code.
This adds an assert that the verification fails so that e.g. lit will
pick up verifier failures in the in-tree tests with an EXPENSIVE_CHECKS
build.
Currently the LastActiveLane verification fails in several tests, so
this also includes a fix to handle more prefix masks. All of the prefix
masks that the verifier encounters are of the form `icmp ult/ule
monotonically-increasing-sequence, uniform`, which always generate a
prefix mask.
Tested that llvm-test-suite + SPEC CPU 2017 now pass with
-vplan-verify-each enabled for RISC-V.
[flang][openmp] Add support for ordered regions in SIMD directives (#181012)
Add support for ordered regions within SIMD directives (!$omp simd
ordered and !$omp do simd ordered). This initial implementation matches
Clang's behavior.
In SIMD directives, loop induction variables have an implicit linear
clause with deferred store semantics (storing to .linear_result). To
properly support ordered regions, the LinearClauseProcessor rewrites
variable references to use .linear_result in:
- omp.ordered.region: Code inside ordered blocks
- omp_region.finalize: Code after ordered blocks
Note: The vectorizer cannot currently vectorize loops with ordered
regions. Future enhancement would require generating lane loops or
unrolling ordered regions across SIMD lanes while maintaining ordering
semantics.
[clang] fix transformation of substituted constant template parameters of partial specializations
This fixes a helper so it implements retrieval of the argument replaced
for a template parameter for partial spcializations.
This was left out of the original patch, since it's quite hard to actually test.
This helper implements the retrieval for variable templates, but only for
completeness sake, as no current users rely on this, and I don't think a similar
test case is possible to implement with variable templates.
This fixes a regression introduced in #161029 which will be backported to llvm-22,
so there are no release notes.
Fixes #181062
Fixes #181410
[RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (#181619)
Currently we have a whitelist of pseudos which can have their VL reduced
safely.
We want to eventually replace RISCVVectorPeephole::tryToReduceVL with
RISCVVLOptimizer, but the former doesn't use a whitelist and instead
checks for the elementsDependOn TSFlag.
This moves RISCVVLOptimizer to use the same TSFlag instead of using a
whitelist since it handles more pseudos, e.g. Zvabd.
However on its own this patch is NFC since we still need to handle the
operand info. A test for vabs.v was added to show how it still doesn't
get reduced.
vmv.s.x/vfmv.s.x and stores have been excluded to match the previous
behaviour of isSupportedInstr.
Stacked on #181601, but not included in this PR.
