FreeBSD/ports 0af72ffgraphics/nvidia-drm-latest-kmod distinfo, x11/linux-nvidia-libs Makefile distinfo

x11/nvidia-driver, x11/nvidia-kmod, x11/linux-nvidia-libs, graphics/nvidia-drm*-kmod, x11/nvidia-settings, x11/nvidia-xconfig: Update to 580.142

Update to latest Production Branch of drivers 580.142:
https://www.nvidia.com/en-us/drivers/details/265444/

Linux counterparts for x11/linux-nvidia-libs:
https://www.nvidia.com/en-us/drivers/details/265443/

Add graphics/egl-wayland2 as a dependency for non-legacy branches.
This library can be installed alongside the previous egl-wayland
implementation (graphics/egl-wayland) and has a higher selection
priority by default, but doesn't support legacy branches.

PR:             293738
Differential Revision:  https://reviews.freebsd.org/D55813
DeltaFile
+10-2x11/linux-nvidia-libs/Makefile
+3-3x11/nvidia-xconfig/distinfo
+3-3x11/nvidia-settings/distinfo
+3-3x11/nvidia-driver/distinfo
+3-3x11/linux-nvidia-libs/distinfo
+3-3graphics/nvidia-drm-latest-kmod/distinfo
+25-179 files not shown
+42-3215 files

LLVM/project c56410fllvm/test/Transforms/SLPVectorizer/RISCV basic-strided-stores.ll

[SLP] Pre-commit tests for constant strided stores (#185990)

Tests for #185964
DeltaFile
+879-0llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-stores.ll
+879-01 files

FreeNAS/freenas 34f1b2bsrc/middlewared/middlewared/plugins/directoryservices_ connection.py ipa_join_mixin.py, src/middlewared/middlewared/plugins/network_ dns.py

Fix the join and leave.  Avoid nsupdate using 'localhost' for the PTR record.
Make the join and leave process safe for servers that are multi-homed.
DeltaFile
+74-30src/middlewared/middlewared/plugins/directoryservices_/connection.py
+26-0src/middlewared/middlewared/plugins/network_/dns.py
+12-1src/middlewared/middlewared/plugins/directoryservices_/ipa_join_mixin.py
+112-313 files

HardenedBSD/src f9a4771sys/cam cam_xpt.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+4-0sys/cam/cam_xpt.c
+4-01 files

FreeNAS/freenas cb0ba2asrc/middlewared/middlewared/plugins/apps/ix_apps lifecycle.py

Safeguard app config persistence against rendering edge cases

App config rendering should not fail as values are validated beforehand, but as an edge case safeguard, values are now rendered against the actual template and only persisted on success.
DeltaFile
+10-4src/middlewared/middlewared/plugins/apps/ix_apps/lifecycle.py
+10-41 files

HardenedBSD/src f335c0esys/cam cam_xpt.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+4-0sys/cam/cam_xpt.c
+4-01 files

HardenedBSD/src ce17e2alib/libmt mtlib.c, usr.bin/mt mt.1

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+8-1usr.bin/mt/mt.1
+2-0lib/libmt/mtlib.c
+10-12 files

HardenedBSD/ports 24c8adddevel/gitoxide distinfo, finance/ord distinfo Makefile

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+0-4,767graphics/blender-doc/pkg-plist
+707-595finance/ord/distinfo
+563-537lang/prql/distinfo
+467-443devel/gitoxide/distinfo
+353-298finance/ord/Makefile
+281-269lang/prql/Makefile
+2,371-6,909113 files not shown
+6,159-10,340119 files

FreeBSD/ports f362341games/veloren-weekly distinfo Makefile, games/veloren-weekly/files patch-unix

games/veloren-weekly: update to s20260311

Changes:        https://gitlab.com/veloren/veloren/-/compare/7c7606b0d4...96cd780828
(cherry picked from commit 469548a9564ce9df59175e549dc4877c8113a6b7)
DeltaFile
+0-61games/veloren-weekly/files/patch-unix
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-663 files

FreeBSD/ports 00f5991graphics/mesa-devel distinfo Makefile

graphics/mesa-devel: update to 26.0.b.2279

Changes:        https://gitlab.freedesktop.org/mesa/mesa/-/compare/651cf906e24...a4cabc1334e
DeltaFile
+3-3graphics/mesa-devel/distinfo
+2-2graphics/mesa-devel/Makefile
+5-52 files

FreeBSD/ports 469548agames/veloren-weekly distinfo Makefile, games/veloren-weekly/files patch-unix

games/veloren-weekly: update to s20260311

Changes:        https://gitlab.com/veloren/veloren/-/compare/7c7606b0d4...96cd780828
DeltaFile
+0-61games/veloren-weekly/files/patch-unix
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-663 files

OpenBSD/ports pF7349Ylang/php/8.4 distinfo Makefile, lang/php/8.4/patches patch-ext_openssl_openssl_c

   update to php-8.4.19

   an upstream commit changed php_openssl_load_all_certs_from_file() to use
   sk_new_reserve to avoid alloc failures from sk_push. libressl doesn't yet
   have this (and I want to push this to 7.8-stable anyway), so instead
   revert to sk_new_null as done in the previous version, and check sk_push
   for a failure return code instead and free/error out if hit.
VersionDeltaFile
1.4+27-1lang/php/8.4/patches/patch-ext_openssl_openssl_c
1.18+2-2lang/php/8.4/distinfo
1.34+1-2lang/php/8.4/Makefile
+30-53 files

LLVM/project 472c8f8llvm/lib/Target/Mips MipsSetMachineRegisterFlags.cpp MipsSEInstrInfo.cpp, llvm/test/CodeGen/MIR/Mips mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir

MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (#185820)

There may be some BB to COPY fgr64cc register, and the fgr64cc register
is set by the previous BB.
We add a new pass called MipsSetMachineRegisterFlags, in which we set

We introduce a new pass called MipsSetMachineRegisterFlags, in which we
set NoSWrap flag for all instructions that works with fgr64cc registers.

And in copyPhyRegister, we allow the COPY instruction with NoSignWrap
from the double float registers to gpr32.
DeltaFile
+111-0llvm/lib/Target/Mips/MipsSetMachineRegisterFlags.cpp
+16-5llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
+2-1llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+2-0llvm/lib/Target/Mips/MipsTargetMachine.cpp
+2-0llvm/lib/Target/Mips/Mips.h
+1-0llvm/lib/Target/Mips/CMakeLists.txt
+134-66 files

LLVM/project 92623c5flang/lib/Parser expr-parsers.cpp, flang/test/Parser bug2364.f90

[flang] Improve error message for missing primary expression (#185484)

Don't mention the possible expectation that the extension %LOC() could
appear when emitting the error messages for a completely missing primary
expression; it's just confusing.
DeltaFile
+7-4flang/lib/Parser/expr-parsers.cpp
+8-0flang/test/Parser/bug2364.f90
+15-42 files

LLVM/project 79026d2flang/lib/Semantics mod-file.cpp, flang/test/Semantics modfile55.cuf

[flang][cuda] Emit CUDA attributes in type declarations in mod files (#185462)

The compiler implements CUDA object entity attributes in module files by
emitting "attributes()" statements after the type declaration statement
for the object. This works fine for variables, but not at all for
derived type components -- the "attributes()" statement is not allowed
in a derived type definition, and the module file isn't readable later
when USE'd. The fix is to emit the attribute as part of the type
declaration statement or component declaration statement instead.
DeltaFile
+15-15flang/test/Semantics/modfile55.cuf
+5-4flang/lib/Semantics/mod-file.cpp
+20-192 files

LLVM/project 6c217bblldb/test/API/functionalities/process_crash_info TestProcessCrashInfo.py

[lldb] Update TestProcessCrashInfo for MTE (#185808)

With MTE, the issue is caught by hardware and libmalloc records a
different message: "BUG IN CLIENT OF LIBMALLOC: MTE tag mismatch
(probable double-free)". Update the test accordingly.
DeltaFile
+1-0lldb/test/API/functionalities/process_crash_info/TestProcessCrashInfo.py
+1-01 files

LLVM/project c30e11clldb/source/Commands CommandObjectMemory.cpp

[lldb] Use raw address in "memory history" command (#185812)

The `memory history` command was using `ToAddress` for its address
argument, which strips non-addressable bits (including MTE tag bits) via
`FixAnyAddress`. This caused us to pass a stripped address to
`__asan_get_alloc_stack`/`__asan_get_free_stack`, which is incorrect.
Switch to `ToRawAddress` to preserve the complete address, including the
MTE tag, so we can look up the correct address.
DeltaFile
+1-1lldb/source/Commands/CommandObjectMemory.cpp
+1-11 files

LLVM/project 85bdc27lldb/test/API/python_api/find_in_memory address_ranges_helper.py

[lldb] Use SBProcess.FixAddress in address_ranges_helper.py (#185802)

Use `SBProcess.FixAddress` in `address_ranges_helper.py` to support
arm64e and ARM's Memory Tagging Extension (MTE) which rely on TBI to
encode data in the top byte, which in this mode is ignored by the HW.

This fixes TestFindInMemory.py and TestFindRangesInMemory.py when
running the LLDB test suite with MTE.
DeltaFile
+6-6lldb/test/API/python_api/find_in_memory/address_ranges_helper.py
+6-61 files

FreeNAS/freenas 44c828asrc/middlewared/middlewared/plugins cache.py

Cleanup comment
DeltaFile
+1-1src/middlewared/middlewared/plugins/cache.py
+1-11 files

NetBSD/pkgsrc wxY3pZgdoc CHANGES-2026

   doc: Updated chat/matrix-synapse to 1.149.1
VersionDeltaFile
1.1694+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc diWh9TUchat/matrix-synapse distinfo cargo-depends.mk

   chat/matrix-synapse: Update to 1.149.1

   Tested on NetBSD 10 amd64 in a mostly 2025Q2 environment.

   # Synapse 1.149.1 (2026-03-11)

   # Synapse 1.149.0 (2026-03-10)

   ## Features

   - Add experimental support for [MSC4388: Secure out-of-band channel for sign in with QR](https://github.com/matrix-org/matrix-spec-proposals/pull/4388). ([\#19127](https://github.com/element-hq/synapse/issues/19127))
   - Add stable support for [MSC4380](https://github.com/matrix-org/matrix-spec-proposals/pull/4380) invite blocking. ([\#19431](https://github.com/element-hq/synapse/issues/19431))
VersionDeltaFile
1.92+37-40chat/matrix-synapse/distinfo
1.37+11-12chat/matrix-synapse/cargo-depends.mk
1.130+2-2chat/matrix-synapse/Makefile
1.69+1-0chat/matrix-synapse/PLIST
+51-544 files

GhostBSD/ghostbsd bb87befcontrib/libcbor/doc/source requirements.txt

Merge pull request #382 from ghostbsd/dependabot/pip/contrib/libcbor/doc/source/tornado-6.5.5

build(deps): bump tornado from 6.3.3 to 6.5.5 in /contrib/libcbor/doc/source
DeltaFile
+1-1contrib/libcbor/doc/source/requirements.txt
+1-11 files

LLVM/project 2b6ca07clang/lib/CodeGen CodeGenModule.cpp, clang/lib/Sema SemaPPC.cpp

diagnose non-cpu strings in target_clones in Sema
DeltaFile
+3-5clang/lib/Sema/SemaPPC.cpp
+1-1clang/lib/CodeGen/CodeGenModule.cpp
+4-62 files

GhostBSD/ghostbsd fadbfd8contrib/libcbor/doc/source requirements.txt

build(deps): bump tornado in /contrib/libcbor/doc/source

Bumps [tornado](https://github.com/tornadoweb/tornado) from 6.3.3 to 6.5.5.
- [Changelog](https://github.com/tornadoweb/tornado/blob/master/docs/releases.rst)
- [Commits](https://github.com/tornadoweb/tornado/compare/v6.3.3...v6.5.5)

---
updated-dependencies:
- dependency-name: tornado
  dependency-version: 6.5.5
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support at github.com>
DeltaFile
+1-1contrib/libcbor/doc/source/requirements.txt
+1-11 files

LLVM/project b2c5e6fclang/test/CodeGen scoped-atomic-ops.c, llvm/test/CodeGen/AArch64 clmul-fixed.ll

Merge branch 'main' into users/kparzysz/e05-intervening-code
DeltaFile
+853-1,663llvm/test/CodeGen/AArch64/clmul-fixed.ll
+927-1,424llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
+706-1,470llvm/test/CodeGen/X86/funnel-shift-i512.ll
+1,769-0llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
+1,189-529llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+1,419-130clang/test/CodeGen/scoped-atomic-ops.c
+6,863-5,2162,130 files not shown
+79,062-28,3022,136 files

LLVM/project 6c30fe3flang/lib/Semantics openmp-utils.cpp

Fix/add comments
DeltaFile
+12-4flang/lib/Semantics/openmp-utils.cpp
+12-41 files

LLVM/project f0cba9dclang/lib/CodeGen CGOpenMPRuntime.cpp, llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h

[mlir][OpenMP] Translate omp.declare_simd to LLVM IR

This mod aim to generate same vector ABI [1] for declare simd as Clang
and reuse function paramater mangling and codegen logic authored by
@alexey-bataev in [2].
Codegen for AArch64 is not included in this patch.

For each omp.declare_simd, lowering computes:

ParamAttrs: one entry per function argument, classifying it as
Vector / Uniform / Linear (+ step or var-stride) / Aligned.
Branch kind: Undefined / Inbranch / Notinbranch.
VLEN: either from simdlen(...) or derived from the CDT size.
llvm then emits x86 declare-simd variants by attaching mangled
function attributes of the form:

_ZGV _

where:

    [11 lines not shown]
DeltaFile
+205-0mlir/test/Target/LLVMIR/openmp-declare-simd-x86.mlir
+174-0mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+57-104clang/lib/CodeGen/CGOpenMPRuntime.cpp
+160-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+66-0llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+662-1045 files

LLVM/project 49a8f37clang/lib/CIR/Dialect/Transforms FlattenCFG.cpp, clang/test/CIR/CodeGen invoke-attrs.cpp try-catch.cpp

[CIR] Preserve attributes when converting call to try_call (#185782)

This adds code to preserve any attributes, including parameter and
return value attributes, that were present on a call operation that is
being replaced with a try_call operation.
DeltaFile
+129-0clang/test/CIR/Transforms/flatten-preserve-attrs.cir
+77-0clang/test/CIR/CodeGen/invoke-attrs.cpp
+22-1clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
+8-8clang/test/CIR/CodeGen/try-catch.cpp
+3-3clang/test/CIR/CodeGen/new-delete.cpp
+2-2clang/test/CIR/CodeGen/virtual-fn-calls-eh.cpp
+241-146 files

LLVM/project 6e93c4aclang/test/CodeGenHLSL ArrayAssignable.hlsl, clang/test/CodeGenHLSL/resources MatrixElement_cbuffer.hlsl CBufferMatrixSingleSubscriptSwizzle.hlsl

[DirectX] Specify element-aligned vectors (#180622)

Use the new "ve" Data Layout specifier to indicate that vectors are
element-aligned for the target.

Part of #123968
DeltaFile
+20-20llvm/test/CodeGen/DirectX/MemIntrinsics/memcpy-pointee.ll
+16-16clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
+8-8llvm/test/CodeGen/DirectX/MemIntrinsics/memcpy-struct.ll
+8-8clang/test/CodeGenHLSL/resources/CBufferMatrixSingleSubscriptSwizzle.hlsl
+5-5clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
+4-4clang/test/CodeGenHLSL/ArrayAssignable.hlsl
+61-6111 files not shown
+77-8117 files

FreeBSD/ports 7619668shells/xonsh Makefile distinfo

shells/xonsh: Update to 0.22.7

ChangeLog: https://github.com/xonsh/xonsh/releases/tag/0.22.7
DeltaFile
+5-6shells/xonsh/Makefile
+3-3shells/xonsh/distinfo
+8-92 files