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[LLVM][InstCombine] Enable simplification of SVE predicate binops. (#211016)

Enable existing SVE binop simplification code paths for predicate
vectors. I've extended tryCombineFromSVBoolBinOp to maintain an existing
tranformation for the case where AND operations are replaced by their
SELECT equivalent.

[LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (#211228)

Rebase

Created using spr 1.3.6-beta.1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]

Reword comment and override getRawRegPressureSetLimit in SIRegisterInfo

Created using spr 1.3.6-beta.1

system: configure dhcp via backend, move dns over #9352

system: move backup restore to /var/lib/php/tmp #9352

system: add dns reconfigure #9352

   mail/mozilla-thunderbird: update to 153.0.1esr

   see https://www.thunderbird.net/en-US/thunderbird/153.0.1esr/releasenotes/

system: switch timezone and hostname restarts #9352

yt-dlp: Update to 2026.6.9

system: replace kernel/powerd restart now that it works #9352

rwhich: add a global configuration and a per repo configuration

This helps fine grained control on the usage of the rwhich database

   www/librewolf: update to 153.0-3, from yaydn

yt-dlp: Update to 2026.7.4

[LV] Use SCEV to compute final value of complex induction variables (#195059)

Extend optimizeInductionLiveOutUsers to handle complex induction
variable by using SCEV analysis. When an induction variable forms an
affine AddRec {Start,+,Step}, compute the final value as Start +
(ResumeTripCount - 1) * Step using VPDerivedIVRecipe.
This patch eliminates unnecessary vector widening for induction
variables only used outside the loop.

Pre-commit test #195055

system: change approach due to MVC entanglement

Frist approach did not work.  Make it a bit more obvious.

Implement support for NSDI DebugFunction opcode.

   telephony/baresip: update to 4.10.0.

   see https://github.com/baresip/baresip/releases/tag/v4.10.0
   and https://github.com/baresip/re/releases/tag/v4.10.0

   libcreg may pick up libbfio at configure stage and break build when
   uninstalled at that time. explicitly add to LIB_DEPENDS

   pointed out by naddy@

MVC: UI: base_tabs_header fix tab activation

   graphics/lerc: update to 4.2.0.

   see https://raw.githubusercontent.com/Esri/lerc/refs/tags/v4.2.0/CHANGELOG.md

compression: respect compression_level for the file db and the metadata

[CIR][RISCV] Add new builtins (#211555)

Leave them NYI now.

Update to latest spec

Created using spr 1.3.6-beta.1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]

Update to latest spec

Created using spr 1.3.6-beta.1

[AArch64] Mark SP-only register classes as non-allocatable (#211549)

Reserved registers are not allocatable and since these are singleton
classes, they should be marked as such.

Assisted-by: codex

FIX some OMPT tests that fail on RISC-V (#156914)

There is a known issue with these tests (see
https://github.com/llvm/llvm-project/issues/35661).
It looks that the behaviour is very architecture specific and it was
somehow solved for aarch64 but no mention to riscv64.

Firewall: Rules and NAT: Group invalid rules to the end of the ruleset. These rules are skipped by PF processing because they do not have a valid interface. (#10550)


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Co-authored-by: Stephan de Wit <stephan.de.wit at deciso.com>