asm-lsp: Import asm-lsp-0.9.0 as wip/asm-lsp
asm-lsp is a language server for NASM/GAS/Go Assembly.
asm-lsp provides hovering, autocompletion, signature help, go to
definition, and view references for assembly files written in the
GAS/NASM or GO assembly flavors. It supports assembly files for the
x86, x86_64, ARM, RISCV, and z80 instruction sets.
This tool can serve as reference when reading the assembly output of a
program. This way you can query what each command exactly does and
deliberate about whether the compiler is producing the desired output
or whether you have to tweak your code for optimisation.
[LLVM][MC][AArch64] Assembler support for Armv9.6-A memory systems extensions (#112341)
Add support for the following Armv9.6-A memory systems extensions:
FEAT_LSUI - Unprivileged Load Store
FEAT_OCCMO - Outer Cacheable Cache Maintenance Operation
FEAT_PCDPHINT - Producer-Consumer Data Placement Hints
FEAT_SRMASK - Bitwise System Register Write Masks
as documented here:
https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-6-architecture-extension
Co-authored-by: Jonathan Thackray <jonathan.thackray at arm.com>
---------
Co-authored-by: Jonathan Thackray <jonathan.thackray at arm.com>
[AMDGPU] Create local KnownBits in case DenseMap gets invalidated (#111568)
KnownBits retrieved from DenseMap may invalidate if insertion requires a
(re)growth.
Fixes https://github.com/llvm/llvm-project/issues/110930
net/bird2: Bump PORTREVISION after libssh update
Reported by: Dan Mahoney <dmahoney at isc.org>
(cherry picked from commit 8a48baa40184b7a5f9340662b3674dd1ffb8a15f)
[LLVM][AArch64] Add assembly/disassembly of SVE BFSCALE instruction (#113168)
This patch add assembly/disassembly and tests for sve bfscale
instruction according to https://developer.arm.com/documentation/ddi0602
.
Reland [CFIFixup] Factor CFI remember/restore insertion into a helper (NFC) (#113328)
The previous submission looked like it triggered build failure
https://lab.llvm.org/buildbot/#/builders/17/builds/3116, but this
appears to be a spurious failure due to a flaky test.
ACPI: Implement power button on !x86
ACPI sleep states are only implemented on x86 systems, so having the
ACPI power button attempt to enter "S5" (or other state as configured
via the hw.acpi.power_button_state sysctl) is not useful.
On non-x86 systems, implement the power button with a call to
shutdown_nice(RB_POWEROFF)
to shut down the system.
Reviewed by: Andrew
Tested on: Graviton 2
MFC after: 2 weeks
Sponsored by: Amazon
Differential Revision: https://reviews.freebsd.org/D47094
[mlir][Vector] Support 0-d vectors natively in TransferOpReduceRank (#112907)
Since
https://github.com/llvm/llvm-project/commit/ddf2d62c7dddf1e4a9012d96819ff1ed005fbb05
, 0-d vectors are supported in VectorType. This patch removes 0-d vector
handling with scalars for the TransferOpReduceRank pattern. This pattern
specifically introduces tensor.extract_slice during vectorization,
causing vectorization to not fold transfer_read/transfer_write slices
properly. The changes in vectorization test files reflect this.
There are other places where lowering patterns are still side-stepping
from handling 0-d vectors properly, by turning them into scalars, but
this patch only focuses on the vector.transfer_x patterns.
[LowerMemIntrinsics] Use i8 GEPs in memcpy/memmove lowering (#112707)
The IR lowering of memcpy/memmove intrinsics uses a target-specific type
for its load/store operations. So far, the loaded and stored addresses
are computed with GEPs based on this type. That is wrong if the
allocation size of the type differs from its store size: The width of
the accesses is determined by the store size, while the GEP stride is
determined by the allocation size. If the allocation size is greater
than the store size, some bytes are not copied/moved.
This patch changes the GEPs to use i8 addressing, with offsets based on
the type's store size. The correctness of the lowering therefore no
longer depends on the type's allocation size.
This is in support of PR #112332, which allows adjusting the memcpy loop
lowering type through a command line argument in the AMDGPU backend.
[SystemZ] Split SystemZInstPrinter to two classes based on Asm dialect (#112975)
In preparation for future work on separating the output of the GNU/HLASM
ASM dialects, we first separate the SystemZInstPrinter classes to two
versions, one for each ASM dialect.
The common code remains in a SystemZInstPrinterCommon class instead.
---------
Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
HBSD: Introduce clang C++ hardening integration
clang/llvm's libc++ provides functionality for additional sanity checks.
Enable these checks for C++ code by enabling extensive mode by default.
Signed-off-by: Shawn Webb <shawn.webb at hardenedbsd.org>
See-Also: https://www.youtube.com/watch?v=t7EJTO0-reg
MFC-to: 14-STABLE
[clang][dataflow] Cache accessors for bugprone-unchecked-optional-access (#112605)
Treat calls to zero-param const methods as having stable return values
(with a cache) to address issue #58510. The cache is invalidated when
non-const methods are called. This uses the infrastructure from PR
#111006.
For now we cache methods returning:
- ref to optional
- optional by value
- booleans
We can extend that to pointers to optional in a next change.
NAS-131902 / 24.10.1 / Ensure `--multi-thread-cutoff` is at least twice the size of `chunk_size` for B2 (by themylogin) (#14750)
* Revert "Ensure multipart B2 uploads consist of at least 2 parts (#14374)"
This reverts commit c4262a348542c48d177322b7b7f1c362b14dfb4f.
(cherry picked from commit ed2d111fe6d6318b0aaab126dca5b09e3f266598)
* Ensure `--multi-thread-cutoff` is at least twice the size of `chunk_size` for B2
(cherry picked from commit 4ffddd4ec7d51da5958664d8828cf7932478691c)
---------
Co-authored-by: themylogin <themylogin at gmail.com>
NAS-131902 / 25.04 / Ensure `--multi-thread-cutoff` is at least twice the size of `chunk_size` for B2 (#14749)
* Revert "Ensure multipart B2 uploads consist of at least 2 parts (#14374)"
This reverts commit c4262a348542c48d177322b7b7f1c362b14dfb4f.
* Ensure `--multi-thread-cutoff` is at least twice the size of `chunk_size` for B2