FreeBSD/src 087d722sys/kern subr_busdma_bounce.c

busdma_bounce: fix unused-function warning on powerpc

static inline, and powerpc's own must_bounce() never
calls it.

Reviewed by:    adrian
Differential Revision:  https://reviews.freebsd.org/D58825
DeltaFile
+1-1sys/kern/subr_busdma_bounce.c
+1-11 files

FreeBSD/src 521fdb9sys/crypto/openssl ossl_ppc.h

ossl: fix unused-function warning for AES_CBC_ENCRYPT on powerpc

static, not static inline, so TUs that don't call it warn.

Reviewed by:    adrian
Differential Revision:  https://reviews.freebsd.org/D58823
DeltaFile
+1-1sys/crypto/openssl/ossl_ppc.h
+1-11 files

LLVM/project 4e60bd7llvm/lib/Target/Hexagon HexagonPseudo.td HexagonAsmPrinter.cpp, llvm/test/CodeGen/Hexagon kcfi.ll kcfi-packetization.ll

[Hexagon] Fix KCFI check truncating type id (#211854)

The KCFI indirect-call check is lowered directly to MCInst in the
Hexagon AsmPrinter. It omitted the constant-extender, causing
mismatches.

Packet canonicalization is how we should apply constant extenders,
duplex, compounds, etc.

Assisted-by: Claude
(cherry picked from commit c88aeaf712c6694d0b29d312783d24cacc000a5a)
DeltaFile
+193-0llvm/test/CodeGen/Hexagon/kcfi-packet-context.ll
+117-0llvm/test/CodeGen/Hexagon/kcfi-obj-vs-asm.ll
+113-0llvm/test/CodeGen/Hexagon/kcfi-packetization.ll
+32-30llvm/test/CodeGen/Hexagon/kcfi.ll
+31-8llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
+3-1llvm/lib/Target/Hexagon/HexagonPseudo.td
+489-396 files

LLVM/project 0380caallvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 store-of-insert-load-isel.ll

[DAGCombine] Fix alignment of store in replaceStoreOfInsertLoad. (#215895)

For the variable index case, the alignment of the original store was
used, which is too large.

Fixes #215530

(cherry picked from commit 2dd35f8ff91fbea3d898474851f78dfad2332c18)
DeltaFile
+57-0llvm/test/CodeGen/X86/store-of-insert-load-isel.ll
+7-2llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+64-22 files

LLVM/project ee9bfe9lldb/source/Commands CommandObjectCommands.cpp, lldb/test/API/commands/command/script/add TestAddParsedCommand.py test_commands.py

[lldb] Fix crash when adding a python ParsedCommand (#215807)

The expected result of `ParsedCommand.get_args_definition` is a List of
Lists and should not crash when it is not the case.

(cherry picked from commit 58e4198eab3b7437b5ffc2e8adb21ed8fc2d8866)
DeltaFile
+13-0lldb/test/API/commands/command/script/add/test_commands.py
+5-0lldb/test/API/commands/command/script/add/TestAddParsedCommand.py
+1-0lldb/source/Commands/CommandObjectCommands.cpp
+19-03 files

OpenBSD/ports 9tq5hUPdevel/py-test-check distinfo Makefile

   devel/py-test-check: update to 2.9.1

   ok and suggestion to explicitly list sysutils/py-packaging as a runtime
   dependency (instead of indirectly depending on it through devel/pytest) by tb@
VersionDeltaFile
1.8+4-2devel/py-test-check/Makefile
1.5+2-2devel/py-test-check/distinfo
+6-42 files

LLVM/project cb42065flang/test/Lower/MIF coarray_dealloc_not_alloc.f90

[flang] To fix LIT test that AIX does not emit comdat. (#214950)

PR #213890 added this new LIT test.
However, AIX uses XCOFF and does not emit COFF COMDAT.

(cherry picked from commit 31749521e7b9f1cb93c9554133ab0a6d181fd8c7)
DeltaFile
+1-2flang/test/Lower/MIF/coarray_dealloc_not_alloc.f90
+1-21 files

LLVM/project c3bbd06llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp, llvm/test/CodeGen/RISCV prefetch.ll

[RISCV] Fix prefetch ADDI-adjustment range upper bound (#215985)

SelectAddrRegImmLsb00000 folds a large constant offset into an ADDI plus
a simm12_lsb00000 prefetch immediate. The positive range [2017, 4065]
overflowed simm12 at the top end: CVal - 2016 reaches 2048/2049,
producing an invalid ADDI. Narrow it to 4063; 4064/4065 now fall through
to selectConstantAddr instead.

(cherry picked from commit 866bc8d6a9930a75b2b10a8f9d0a31982c5479bb)
DeltaFile
+28-0llvm/test/CodeGen/RISCV/prefetch.ll
+3-2llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+31-22 files

LLVM/project 8c94eaellvm/lib/DWARFLinker/Parallel DWARFLinkerCompileUnit.h DWARFLinkerImpl.cpp, llvm/test/tools/dsymutil/Inputs/module-odr-language debug-map.map 1.ll

[DWARFLinker] Consider module units when creating the type unit (#215731)

The parallel linker creates the artificial type unit only when some
compile unit uses an ODR language, but it looks for that language in the
compile units of the object files alone. A clang module unit decides its
own ODR availability from its own DW_AT_language, so a module built as
C++ or ObjC++ imported from an object file whose units are all C, ObjC
or Swift places DIEs in the type table which does not exist, asserting
in CompileUnit::cloneDIE and dereferencing null without assertions.

Scan the languages of the module units as well, so a module which
deduplicates types always has a type unit to hold them.

rdar://182719465
(cherry picked from commit 58599fe7d593ddd4d4e9f95cfd9348a48ddf8492)
DeltaFile
+37-0llvm/test/tools/dsymutil/X86/module-odr-language.test
+35-0llvm/test/tools/dsymutil/Inputs/module-odr-language/M.ll
+33-0llvm/test/tools/dsymutil/Inputs/module-odr-language/1.ll
+13-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
+7-0llvm/test/tools/dsymutil/Inputs/module-odr-language/debug-map.map
+3-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
+128-06 files

LLVM/project 4a94b37llvm/lib/Target/RISCV RISCVZilsdOptimizer.cpp, llvm/test/CodeGen/RISCV zilsd-ldst-opt-prera.mir zilsd.ll

[RISCV] Avoid pre-RA Zilsd pairs with same src/dst registers (#215575)

The pre-RA Zilsd optimizer previously allowed a special case for stores
where both source operands were the same vreg if that vreg was defined
by COPY $x0. This assumes register allocation will preserve the value as
x0, but that is not guaranteed. The vreg can be allocated to a normal
GPR, producing an invalid pair.

(cherry picked from commit 4ef2427b4c08fd28e4244c585ae0673711e4c0d6)
DeltaFile
+45-10llvm/test/CodeGen/RISCV/zilsd.ll
+1-15llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
+2-1llvm/test/CodeGen/RISCV/zilsd-ldst-opt-prera.mir
+48-263 files

LLVM/project d433462llvm/lib/DWARFLinker/Parallel DependencyTracker.cpp, llvm/test/tools/dsymutil/X86 module-type-definition.test

[DWARFLinker] Keep module type definitions in the parallel linker (#215435)

A Clang module compile unit carries the only definitions of the types
its module owns. No definition in it is reachable from a live address.
Similar to the classic linker, we need to mark everything as kept.

rdar://184559034
(cherry picked from commit ef04927f4a8b890504d770186f6002f487a6790e)
DeltaFile
+70-0llvm/test/tools/dsymutil/X86/module-type-definition.test
+27-14llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
+97-142 files

LLVM/project 0fc9903clang/include/clang/Sema DeclSpec.h, clang/lib/Parse ParseDecl.cpp

[Clang] Revert "Reject auto combined with type specifiers in C++ (#208552)" and follow-ups commits (#215320)

The initial fix for #164273 had several follow up commits to fix the
initial implementation. This fix induces a lot of regressions and a
refactoring of the area is required in order to fix the issue in a later
release.

This reverts the following commits (from oldest to latest):
72af746a3e19627fc1d1c40bf6eabb2887850ac5
226acaf7aeeda64a6e4e55d21f586ffe97a72fc8
d592aa5a10f44164cd403257270802eb2a4b123a
34436db53d3e4ad36e86019109fb5ceee9bb4d8c
de4b1f5572f8ff5a38a17655584ae200774551c6
DeltaFile
+1-181clang/lib/Sema/DeclSpec.cpp
+48-57clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
+2-51clang/include/clang/Sema/DeclSpec.h
+7-39clang/lib/Parse/ParseDecl.cpp
+2-36clang/test/SemaCXX/auto-cxx0x.cpp
+7-9clang/test/CXX/drs/cwg3xx.cpp
+67-37311 files not shown
+82-43517 files

LLVM/project cf72348lldb/bindings/interface SBTypeSummaryExtensions.i SBTypeExtensions.i, lldb/test/API/python_api/compile_unit TestCompileUnitAPI.py

[lldb] Fix incorrect Python property bindings in SBExtensions. (#215283)

Several Python property definitions in the SB extension interface files
were incorrectly copy-pasted during the
["Don't use SWIG internals
refactor"](https://github.com/llvm/llvm-project/commit/89b658428bae3b749f174ca79f0fe390451d8f69)
causing properties to shadow earlier definitions instead of exposing new
functionalities.

Rename each duplicate to its intended property name and wire it to the
correct underlying method.
Add add new API tests to cover the issue.

- SBModule: compile_unit -> section.
- SBType: is_function -> is_reference.
- SBTypeSummary is_function_code -> is_function_name.

(cherry picked from commit 1fb48d1418cf55f398024c60af13436b806561f9)
DeltaFile
+24-2lldb/test/API/python_api/type/TestTypeList.py
+10-5lldb/test/API/python_api/formatters/TestFormattersSBAPI.py
+12-0lldb/test/API/python_api/compile_unit/TestCompileUnitAPI.py
+1-1lldb/bindings/interface/SBTypeSummaryExtensions.i
+1-1lldb/bindings/interface/SBTypeExtensions.i
+1-1lldb/bindings/interface/SBModuleExtensions.i
+49-101 files not shown
+50-107 files

LLVM/project 5aeb89cclang/lib/Driver SanitizerArgs.cpp, clang/lib/Driver/ToolChains Hexagon.cpp

[Hexagon] Fix unusable SCS reg, make it selectable (#213820)

SCS hardcoded r19 as the shadow call stack pointer and required
-ffixed-r19. That was the wrong register to pick: r19 is precisely the
one the intended consumers cannot give up, so the feature was unusable
in practice.

* The Hexagon Linux kernel already reserves r19 for its thread-info
pointer (arch/hexagon/Makefile: "TIR_NAME := r19", documented there as
not configurable because it is hard-coded in several files).

* hexagon-hypervisor reserves r20-r28 (kernel/CMakeLists.txt), with r28
bound to a register global (H2K_gp).

That leaves h2 only r16-r19, so no single hardcoded choice can serve
both consumers.

Intersecting that with the callee-saved regs leaves r1{6,7,8}. So the
new default is r18.

    [8 lines not shown]
DeltaFile
+118-55llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
+53-23llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+53-6clang/test/Driver/fsanitize-shadow-call-stack-hexagon.c
+52-5clang/lib/Driver/SanitizerArgs.cpp
+19-0llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
+17-0clang/lib/Driver/ToolChains/Hexagon.cpp
+312-896 files not shown
+364-9612 files

LLVM/project 9e445a6clang/docs ReleaseNotes.md

[Release Notes] Clang UBSan changes to aggregate copy/move operand checks

Document improvements to null, alignment, and array-bounds checks from #190739 and #203737.
DeltaFile
+4-0clang/docs/ReleaseNotes.md
+4-01 files

LLVM/project ca31b6cllvm/lib/Target/Xtensa XtensaISelLowering.cpp, llvm/test/CodeGen/Xtensa fp16.ll

[Xtensa] Add fp16 conversion support (#208206)

Close https://github.com/llvm/llvm-project/issues/207505

(cherry picked from commit db4d75e13ddc64cfb3a2f3620b622b8c4376812d)
DeltaFile
+159-0llvm/test/CodeGen/Xtensa/fp16.ll
+11-0llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
+170-02 files

LLVM/project de7b2d2llvm/lib/Transforms/Scalar LowerMatrixIntrinsics.cpp, llvm/test/Transforms/LowerMatrixIntrinsics phi.ll

[Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (#211210)

Phis can have multiple incoming entries for the same block. In that
case, all incoming values for the block must be the same.

Update visitPHI to avoid expanding the incoming matrix multiple times
for the some incoming block.

Fixes a verifier error for the newly added test case.

PR: https://github.com/llvm/llvm-project/pull/211210
(cherry picked from commit 0e780450034e4bf0c6aa6dd4b312e1e0b9a20689)
DeltaFile
+34-0llvm/test/Transforms/LowerMatrixIntrinsics/phi.ll
+7-1llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
+41-12 files

Linux/linux 3eb4077arch/arm64/boot/dts/apple t8122.dtsi, arch/arm64/boot/dts/nvidia tegra194.dtsi

Merge tag 'soc-fixes-7.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "These are three last-minute fixes for the 7.2 release, though nothing
  alarming:

   - one error handling fix for optee firmware

   - incorrect i2c data for the apple M3 that was added in 7.2

   - a boot time warning fix for nvidia tegra"

* tag 'soc-fixes-7.2-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: tegra: Add EL2 virtual timer interrupt for Tegra194
  arm64: dts: apple: t8122: Fix I2C resources
  optee: ffa: Add NULL check in optee_ffa_lend_protmem
DeltaFile
+15-15arch/arm64/boot/dts/apple/t8122.dtsi
+3-0drivers/tee/optee/ffa_abi.c
+2-0arch/arm64/boot/dts/nvidia/tegra194.dtsi
+20-153 files

LLVM/project f1c4362llvm/lib/Target/RISCV RISCVInstrInfoSFB.td RISCVInstrInfoZibi.td

[RISCV] Simplify the Zibi SFB and select patterns. NFC (#216449)

Use a PatLeaf to match the valid condition codes instead of using
separate patterns for each.
DeltaFile
+15-8llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
+5-11llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
+20-192 files

LLVM/project 3196161flang/lib/Evaluate tools.cpp, flang/lib/Semantics check-allocate.cpp expression.cpp

[flang] To issue error message for unsupported usage of vector type. (#215248)

As discussed in PR #214219, we don't plan to support any usage that
requires runtime descriptor for vector type object.
Flang has already disallowed ALLOCATABLE, POINTER, ASSUMED-SHAPE and
ASSUMED-RANK for vector types.
The test reducer posted by @eugeneepshteyn should also be flagged by the
compiler as an error.
This PR is to add semantic check for that case. It covers
1. Vector type declaration statement that has ALLOCATABLE or POINTER
attribute.
2. ALLOCATE statement where SOURCE= or MOLD= has a vector type object.
3. Auto-allocation intrinsic assignment where the RHS is a vector type
object.
4. A vector type object being used as an argument of SAME_TYPE_AS or
EXTENDs_TYPE_OF.
5. A vector type object being used as the `dtv` argument of a UDIO.
6. A vector type object being used as the argument of `CLASSOF`.
DeltaFile
+103-0flang/test/Semantics/PowerPC/ppc-vector-diagnostics.f90
+12-0flang/lib/Semantics/check-declarations.cpp
+10-0flang/lib/Semantics/expression.cpp
+6-0flang/lib/Semantics/check-allocate.cpp
+2-1flang/lib/Evaluate/tools.cpp
+133-15 files

FreeBSD/ports 97d4c7dmisc/py-onnxruntime Makefile.DISTFILES Makefile

misc/py-onnxruntime: Fix dist site name

A typo in a dist site name caused a dist file fail to download.
DeltaFile
+1-1misc/py-onnxruntime/Makefile.DISTFILES
+1-1misc/py-onnxruntime/Makefile
+2-22 files

LLVM/project 85bd507llvm/lib/Transforms/Scalar Reassociate.cpp

Rebase, small improvements

Created using spr 1.3.7
DeltaFile
+2-3llvm/lib/Transforms/Scalar/Reassociate.cpp
+2-31 files

Linux/linux 5e060ffarch/openrisc/include/asm processor.h, arch/openrisc/kernel signal.c

Merge tag 'for-linus' of https://github.com/openrisc/linux

Pull OpenRISC fix from Stafford Horne:
 "A bug fix found by researchers:

   - mask all privileged bits when restoring the supervisor register
     from sigreturn"

* tag 'for-linus' of https://github.com/openrisc/linux:
  openrisc: signal: do not restore privileged SR bits on sigreturn
DeltaFile
+3-2arch/openrisc/kernel/signal.c
+2-0arch/openrisc/include/asm/processor.h
+5-22 files

LLVM/project de81742clang/docs AutomaticReferenceCounting.md AutomaticReferenceCounting.rst, clang/include/clang/Basic AttrDocs.td

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+4,294-4,283clang/include/clang/Basic/AttrDocs.td
+375-4,097lldb/source/Plugins/Process/Utility/RegisterInfos_riscv32.h
+21-3,157llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
+0-2,674clang/docs/AutomaticReferenceCounting.rst
+2,591-0clang/docs/AutomaticReferenceCounting.md
+5-2,046llvm/test/CodeGen/X86/fp128-libcalls.ll
+7,286-16,2572,187 files not shown
+78,524-48,5262,193 files

OpenBSD/ports mTYVSmtdevel/cli11 Makefile distinfo

   devel/cli11: update to 2.7.2

   ok tb@
VersionDeltaFile
1.6+2-2devel/cli11/distinfo
1.7+1-1devel/cli11/Makefile
+3-32 files

FreeBSD/ports 62f5a3fcad Makefile

cad/Makefile: add the missing entry for cad/pythonocc-core

PR:             290214
DeltaFile
+1-0cad/Makefile
+1-01 files

OpenBSD/ports 67vp612mail/aerc Makefile

   mail/aerc: Add Andrew Kloet as MAINTAINER

   ok tb@
VersionDeltaFile
1.25+3-0mail/aerc/Makefile
+3-01 files

OpenBSD/ports uFXzjhbdevel/sbt Makefile distinfo, devel/sbt/patches patch-bin_sbt

   devel/sbt: update to 2.0.6
VersionDeltaFile
1.33+2-2devel/sbt/distinfo
1.23+1-1devel/sbt/patches/patch-bin_sbt
1.33+1-1devel/sbt/Makefile
+4-43 files

LLVM/project 1cb114allvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 ordered-reduction-root-phi-reorder.ll

[SLP]Fix root PHI reordering when the root order must be preserved

Do not move the operand order onto the tree-root PHI in
reorderBottomToTop() when IgnoreReorder is false (e.g. ordered
reductions): the root has no user to take over the order and it cannot
be dropped.

Fixes #216453

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/216493
DeltaFile
+88-0llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-root-phi-reorder.ll
+9-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+97-02 files

LLVM/project 3228989llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 ordered-reduction-root-phi-reorder.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+88-0llvm/test/Transforms/SLPVectorizer/X86/ordered-reduction-root-phi-reorder.ll
+9-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+97-02 files