[C++20] [Modules] Correct the redecl chain (#219926)
Close https://github.com/llvm/llvm-project/issues/219639
The root cause of the problem is the incorrect redecl chain.
A valid redecl chain should be a circle where each decl refers to the
previous one and the first decl refers to the most recent decl (latest
one). However, in the example, the redecl chain became to:
D2 -> D1 -> D1 ....
so that the range of `for (... : D->redecls())` never ends.
The real cause of the issue is we didn't merge correctly in the
ASTReader. Previous code assumes about the most recent decl while the
new code makes the behavior more clearly.
[Clang] Fix double revert of a keyword token that was cached before the first fallback (#219799)
Fixes #214128
When an undeclared name is followed by `<`, the parser tentatively looks
for a template-argument list and, on invalid input, can skip all the way
to the end of the file. Every token after that point is lexed and cached
while the type-trait keywords still have their keyword kind. The first
`struct __make_unsigned` then reverts the keyword to an identifier, but
the second `struct __make_unsigned` is replayed from the cache with the
stale keyword kind, so `TryKeywordIdentFallback` tries to revert the
same `IdentifierInfo` again and trips the assertion in
`revertTokenIDToIdentifier`. The same thing can happen with any keyword
this hack covers (`__is_pod`, `__is_signed`, the transform traits) and
with any cached token, since a `Token` is just a snapshot of the
classification at lex time.
`TryKeywordIdentFallback` now asks the `IdentifierInfo`, which is the
source of truth, before doing anything: if the keyword has already been
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webkit-gtk*: force gettext-lib from pkgsrc
pkgsrc libintl is installed during the build, and the pkgsrc
version is preferred when linking, leading to missing library
errors when pkg_add(1)ing.
Force gettext-lib from pkgsrc to avoid this.
Bump PKGREVISION.
18340 want generic memlist for use with kmem or explicit pools
18354 pci_boot returns truncated address to avail list if reprogramming bar fails
18355 pci_boot leaks 4GiB of prefetchable space per bridge
18356 pci_boot leaks non-PF region above 4GiB
18357 pci_boot bus 0 I/O resources fallback overruns by 0xff
Reviewed by: Toomas Soome <tsoome at me.com>
Reviewed by: Gordon Ross <gordon.w.ross at gmail.com>
Approved by: Hans Rosenfeld <rosenfeld at grumpf.hope-2000.org>
py-poetry: updated to 2.4.2
2.4.2
Fixed
Fix an issue where Poetry installs an artifact that is not listed in the lockfile when the package source does not provide a hash for this artifact
Fix a path traversal vulnerability when downloading files from a compromised URL and/or package source
Fix a path traversal vulnerability in sdist extraction on Python 3.10.0-3.10.12 and 3.11.0-3.11.4 that could allow malicious tarball files to write files outside the target directory
py-utils: updated to 4.0.1
4.0.1
Allow uv_build 0.12.x, contributed
Keep the python_utils.types export list unique.
Delay newly published dependencies and development tools by 14 days before resolution.
py-rapidfuzz: updated to 3.14.6
3.14.6
Fixed
* fix some divergences in the pure Python fallback
* fix compatibility with new Cython versions
* fixed potential out of bound access inside Editops.remove_subsequence
* fixed handling python fallback implementation of Editops.remove_subsequence
[MLIR][OpenMP] Replace target-data assert with error (#219228)
If a user incorrectly puts a `target data`, `target enter data`, `target
exit data` or `target update` directive inside of target device code,
this will get lowered to MLIR and trigger an assert while translating
the corresponding operations to LLVM IR.
Part of the issue is that there are no semantics checks to prevent this
but, even if they were added, they wouldn't be able to incorporate
implicit `declare target` information, as that is added later. This
patch replaces the assert with a more informative compile error during
MLIR to LLVM IR translation to catch any of these cases that make it
past semantics.
[mlir][gpu][math] Fix assertion in OpToFuncCallLowering on vector results (#215317)
`OpToFuncCallLowering` asserts that operand and result types match, with
an escape hatch for scalar `i1` results. Math vector FP classification ops
return `vector<...xi1>`, which the escape hatch does not cover, so they trigger
the assertion.
Reject non-scalar results before the assertion, allowing
`ScalarizeVectorOpLowering` to lower them element-wise. This preserves
the existing behavior in non-assert builds, where `OpToFuncCallLowering`
already failed to match vector types. Add regression coverage for vector and
scalar FP classification ops.
Fixes #210855
Assisted-by: Claude (Anthropic)
[AMDGPU][GlobalIsel] Replace wip_match_opcode with MIR patterns with basic match and apply clauses. (#219185)
This patch replaces wip_match_opcode mechanism with MIR-pattern matching
for opcodes with no or partial possibility for declarative pattern
match/apply clause for the AMDGPU-specifc GICombines.
The following opcodes are covered : `G_TRUNC`, `G_AMDGPU_FMED3`,
`G_FCANONICALIZE`, `G_FNEG`, `G_MUL` and `G_SEXT_INREG`.
[AMDGPU][GlobalISel] Use MIR patterns for multi-opcode combiner rules. (#219278)
Match several AMDGPU GlobalISel combiner rules with MIR patterns inplace
of wip_match_opcode mechanism:
- uchar_to_float, cvt_f32_ubyteN, int_minmax_to_med3 and
fp_minmax_to_med3 / fp_minmax_to_clamp now match via a GICombinePatFrag
that fans out over their opcodes with !foreach, keeping the existing C++
match/apply.
- rcp_sqrt_to_rsq becomes fully declarative: a group of four intrinsic
patterns folding rcp(sqrt(x)) and sqrt(rcp(x)) into rsq(x) for both
G_FSQRT and amdgcn.sqrt, removing matchRcpSqrtToRsq.
It also includes some regenerated LIT tests changes which accounts for
making uchar_to_float a MIR pattern resulting in its reorders after the
generic itof_const_zero_fold_ui pattern on the G_UITOFP root; they only
race on uitofp(0), where folding to fconstant 0.0 instead of
cvt_f32_ubyte0 is value-identical.
