LLVM/project 10644a1libclc libclc.pc.in CMakeLists.txt

[libclc] Remove unused and incorrect pkgconf file (#185654)

Summary:
All this file does is pass `-L` to an incorrect location. These files
are installed as part of the resource directory which is always included
anyway, so I think this is vestigial and can be removed.
DeltaFile
+0-6libclc/libclc.pc.in
+0-4libclc/CMakeLists.txt
+0-102 files

LLVM/project e55bb9ellvm/lib/Transforms/InstCombine InstCombineAndOrXor.cpp, llvm/test/Transforms/InstCombine and2.ll

[InstCombine][profcheck] Set unknown branch weights when folding booleans (#185769)

In cases where two logical operations are folded into one, InstCombine
first folds one of the logical operations into an binary operation,
losing the profile information. Ordinarily, we could've used that
information to compute the branch weight information of the new
instruction, but since we don't have the original weights, we say the
new instruction has unknown branch weights.

Tracking issue: #147390
DeltaFile
+18-6llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+13-5llvm/test/Transforms/InstCombine/and2.ll
+0-3llvm/utils/profcheck-xfail.txt
+31-143 files

FreeNAS/freenas 6ef27fbsrc/middlewared/middlewared/plugins/service_/services base.py

Skip stop wait for already-inactive/failed systemd units
DeltaFile
+5-0src/middlewared/middlewared/plugins/service_/services/base.py
+5-01 files

LLVM/project 7ee9583clang/lib/CodeGen CGHLSLRuntime.cpp, clang/lib/Sema SemaHLSL.cpp

[HLSL] Ignore complex types that do not contribute to cbuffer layout (#184276)

Detect arrays of empty structs and similar constructs in constant buffers. Ignore them if they do not contribute to `cbuffer` layout

Fixes #183788
DeltaFile
+82-17clang/lib/Sema/SemaHLSL.cpp
+61-0clang/test/CodeGenHLSL/resources/cbuffer-empty-struct-array.hlsl
+4-4clang/test/AST/HLSL/ast-dump-SpirvType.hlsl
+0-6clang/lib/CodeGen/CGHLSLRuntime.cpp
+1-1clang/test/AST/HLSL/pch_spirv_type.hlsl
+148-285 files

FreeNAS/freenas 98e7cacsrc/middlewared/middlewared/plugins/directoryservices_ connection.py ipa_join_mixin.py

Add ptr records when joining freeipa domain.
DeltaFile
+69-4src/middlewared/middlewared/plugins/directoryservices_/connection.py
+2-2src/middlewared/middlewared/plugins/directoryservices_/ipa_join_mixin.py
+71-62 files

FreeBSD/ports 7c549a2security/chkrootkit distinfo Makefile, security/chkrootkit/files patch-Makefile patch-chkwtmp.c

security/chkrootkit: Update 0.58b => 0.59

Changelog:
 - New checks: Process executed from memory
 - New commands: nologin
 - XZ Backdoor Bottkitty (UEFI Bootkit)
 - Bug fixes
https://www.chkrootkit.org/#new

Remove local patches with support FreeBSD 9.

PR:             293520
Approved by:    Lacey Powers <lacey.leanne at gmail.com> (maintainer)
MFH:            2026Q1

(cherry picked from commit 91316bf1e26c797b602a73872592abaed8b58a9b)
DeltaFile
+15-0security/chkrootkit/files/patch-Makefile
+0-11security/chkrootkit/files/patch-chkwtmp.c
+0-11security/chkrootkit/files/patch-chklastlog.c
+3-3security/chkrootkit/distinfo
+1-1security/chkrootkit/Makefile
+19-265 files

LLVM/project 4911812llvm/lib/Target/AMDGPU AMDGPUMCInstLower.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp AMDGPUBaseInfo.h

[AMDGPU] Add asm comments if setreg changes MSBs
DeltaFile
+45-0llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+19-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+12-5llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+7-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+2-1llvm/test/CodeGen/AMDGPU/code-size-estimate.ll
+85-65 files

FreeBSD/ports 91316bfsecurity/chkrootkit distinfo Makefile, security/chkrootkit/files patch-Makefile patch-chklastlog.c

security/chkrootkit: Update 0.58b => 0.59

Changelog:
 - New checks: Process executed from memory
 - New commands: nologin
 - XZ Backdoor Bottkitty (UEFI Bootkit)
 - Bug fixes
https://www.chkrootkit.org/#new

Remove local patches with support FreeBSD 9.

PR:             293520
Approved by:    Lacey Powers <lacey.leanne at gmail.com> (maintainer)
MFH:            2026Q1
DeltaFile
+15-0security/chkrootkit/files/patch-Makefile
+0-11security/chkrootkit/files/patch-chklastlog.c
+0-11security/chkrootkit/files/patch-chkwtmp.c
+3-3security/chkrootkit/distinfo
+1-1security/chkrootkit/Makefile
+19-265 files

FreeBSD/ports faadb58biology/salmon Makefile

biology/salmon: Unbreak: Relax libgff version requirement

Also drop unnecessary libboost dep

Reported by:    pkg-fallout
DeltaFile
+4-4biology/salmon/Makefile
+4-41 files

FreeBSD/ports c97f206textproc/elasticsearch7/files pkg-message.in

textproc/elasticsearch7: Correct product name

Rename ElasticSearch to Elasticsearch in the file pkg-message.

PR:             261591
Approved by:    elastic (maintainer, timeout 4+ years)
DeltaFile
+2-2textproc/elasticsearch7/files/pkg-message.in
+2-21 files

LLVM/project b02ef5aclang/include/clang/Analysis/Scalable/Serialization SerializationFormat.h, clang/lib/Analysis/Scalable/Serialization/JSONFormat JSONFormatImpl.cpp

[clang][ssaf] Add ssaf-format to validate and convert summaries

This PR introduces the `ssaf-format` command-line tool, which validates
and converts translation-unit (TU) and link-unit (LU) summaries between
registered serialization formats in the SSAF framework. After the
serialization format registry and the JSON format were introduced, there
was no standalone tool to inspect, validate, or convert summary files
outside of a full compilation pipeline. `ssaf-format` fills that gap: it
serves as both a format validator (read without writing) and a format
converter (read then write to a different format or path).
DeltaFile
+483-0clang/tools/ssaf-format/SSAFFormat.cpp
+14-0clang/tools/ssaf-format/CMakeLists.txt
+9-0clang/test/Analysis/Scalable/ssaf-format/list.test
+7-0clang/include/clang/Analysis/Scalable/Serialization/SerializationFormat.h
+6-0clang/unittests/Analysis/Scalable/Registries/MockSerializationFormat.cpp
+6-0clang/lib/Analysis/Scalable/Serialization/JSONFormat/JSONFormatImpl.cpp
+525-05 files not shown
+537-011 files

LLVM/project f35042aflang/lib/Optimizer/OpenACC/Support FIROpenACCOpsInterfaces.cpp RegisterOpenACCExtensions.cpp, flang/test/Transforms/OpenACC offload-target-verifier.fir

[flang][openacc] Attach IndirectGlobalAccessModel to fir.use_stmt (#185767)

In some cases, `fir.use_stmt` operation can end up in offload region
like in acc routine for example. Make sure we can validate the symbols
associated with the `fir.use_stmt` operation.
DeltaFile
+34-0flang/test/Transforms/OpenACC/offload-target-verifier.fir
+17-0flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
+2-0flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
+53-03 files

LLVM/project 8d0c686clang/lib/Headers/hlsl hlsl_alias_intrinsics.h, clang/lib/Sema SemaHLSL.cpp

[HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (#165156)

Adds the WaveActiveBitOr intrinsic from issue #99167. This intrinsic
required a bit more work than the last intrinsics that I have done.

There are some peculiarities, which I verified with dxcompiler:
- WaveActiveBitOr only works on uint and uint64_t, no other types are
allowed
- There is no 16 bit version of WaveActiveBitOr

Followed the checklist:
- [x] Implement WaveActiveBitOr clang builtin,
- [x] Link WaveActiveBitOr clang builtin with hlsl_intrinsics.h
- [x] Add sema checks for WaveActiveBitOr to
CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
- [x] Add codegen for WaveActiveBitOr to EmitHLSLBuiltinExpr in
CGBuiltin.cpp
- [x] Add codegen tests to
clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl

    [15 lines not shown]
DeltaFile
+82-0clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl
+34-0clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+32-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveBitOr.ll
+27-0clang/lib/Sema/SemaHLSL.cpp
+23-0clang/test/SemaHLSL/BuiltIns/WaveActiveBitOr-errors.hlsl
+22-0llvm/lib/Target/DirectX/DXIL.td
+220-010 files not shown
+284-216 files

FreeBSD/ports 8605c56devel/py-p4python distinfo Makefile

devel/py-p4python: Update to 2025.2.2863679

PR:             293725
Approved by:    antonfb at hesiod.org (maintainer)
DeltaFile
+3-3devel/py-p4python/distinfo
+1-1devel/py-p4python/Makefile
+4-42 files

LLVM/project 12fcde1clang/lib/CodeGen CGExpr.cpp, clang/test/CodeGenHLSL/resources CBufferMatrixSingleSubscriptSwizzle.hlsl

[Matrix] Copy Row data from padded cbuffer offsets before swizzle (#185346)

fixes https://github.com/llvm/llvm-project/issues/184849

The fix is just to copy the data before a swizzle can happen
DeltaFile
+28-0clang/test/CodeGenHLSL/resources/CBufferMatrixSingleSubscriptSwizzle.hlsl
+10-3clang/lib/CodeGen/CGExpr.cpp
+38-32 files

FreeBSD/src bfb2fd5lib/libpmc libpmc_pmu_util.c libpmc.c, lib/libpmc/pmu-events jevents.c

libpmc: Explicitly whitelist json fields

Adds all missing Intel fields and turns jevents.c into an explicit white
list mechanism so that we no longer ignore important fields that often
invalidate the counter.  The json event parser must now parse every
field on each architecture that we support.  This has been tested by
running tinderbox and manually running jevent against our current json
repository.  As a bonus I fixed spelling errors in the AMD JSON
definitions.

Sponsored by: Netflix

Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2055
DeltaFile
+100-29lib/libpmc/pmu-events/jevents.c
+19-0lib/libpmc/libpmc_pmu_util.c
+4-1lib/libpmc/libpmc.c
+1-1lib/libpmc/pmu-events/arch/x86/amdzen4/cache.json
+1-1lib/libpmc/pmu-events/arch/x86/amdzen5/load-store.json
+1-1lib/libpmc/pmu-events/arch/x86/amdzen6/load-store.json
+126-336 files

LLVM/project 9d65b65clang/lib/Headers/hlsl hlsl_intrinsics.h hlsl_alias_intrinsics.h, clang/test/CodeGenHLSL/builtins mul.hlsl

[HLSL][Matrix] Add `half` type overloads to `mul` and exercise them (#185506)

PR #184882 was missing `half` type-specific overloads for `mul`. 
This PR introduces `half` type-specific overloads for `mul` and
additional codegen tests for the half type.
Also added f16 tests for the lowering of llvm.matrix.multiply.

The offload test suite already has a `mul.fp16` test for exercising half
types at runtime, so no change is needed there.

Assisted-by: claude-opus-4.6
DeltaFile
+79-0llvm/test/CodeGen/DirectX/matrix-multiply.ll
+58-2clang/test/CodeGenHLSL/builtins/mul.hlsl
+41-2clang/lib/Headers/hlsl/hlsl_intrinsics.h
+15-0clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+1-1clang/test/SemaHLSL/BuiltIns/mul-errors.hlsl
+194-55 files

FreeNAS/freenas 7afeb20src/middlewared/middlewared/plugins/catalog __init__.py

Use GenericConfigService for catalog plugin
DeltaFile
+5-8src/middlewared/middlewared/plugins/catalog/__init__.py
+5-81 files

LLVM/project 048106bclang/lib/Headers/hlsl hlsl_alias_intrinsics.h

[HLSL] Fix intrinsics header file 16 bit attribute macro to use version 6.2 (#185757)

There have been a couple builtins declared in a header file that specify
16 bit availability for shader model 6.0.
This is incorrect, it should be 6.2.
This bug was propagated for many of the waveops, and should be
corrected.

Fixes https://github.com/llvm/llvm-project/issues/185756
DeltaFile
+32-32clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+32-321 files

LLVM/project a4244bcllvm/test/CodeGen/X86 sdiv_fix_sat.ll scmp.ll

[LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (#180888)

This avoids needing to combine the SHL/SHR/OR pattern later.
    
This improves code quality on RISC-V where our slx/srx instructions
clobber the destination register but we don't have an immediate form.
We can't recover the original direction from the SHL/SHR/OR pattern
and we can't commute it during the TwoAddressInstruction pass like X86
due to the shift amount being in a register.
DeltaFile
+198-202llvm/test/CodeGen/X86/sdiv_fix_sat.ll
+200-185llvm/test/CodeGen/X86/scmp.ll
+172-173llvm/test/CodeGen/X86/pr43820.ll
+55-53llvm/test/CodeGen/X86/fold-tied-op.ll
+54-52llvm/test/CodeGen/X86/shift-i256.ll
+44-62llvm/test/CodeGen/X86/vector-sext.ll
+723-72723 files not shown
+1,094-1,10429 files

FreeBSD/ports 3f3ee57net/dpdk pkg-plist Makefile, net/dpdk/files patch-kernel_freebsd_contigmem_contigmem.c patch-kernel_freebsd_nic__uio_nic__uio.c

net/dpdk: update to latest LTS release, 25.11.0, adopt (+)

Tested on:      aarch64, amd64
Release notes:  http://doc.dpdk.org/guides/rel_notes/release_25_11.html
Approved by:    Bruce Richardson (former maintainer)
DeltaFile
+9,264-821net/dpdk/pkg-plist
+43-21net/dpdk/Makefile
+0-20net/dpdk/files/patch-kernel_freebsd_contigmem_contigmem.c
+0-18net/dpdk/files/patch-kernel_freebsd_nic__uio_nic__uio.c
+12-0net/dpdk/files/patch-meson.build
+4-4net/dpdk/files/patch-config_meson.build
+9,323-8841 files not shown
+9,326-8877 files

FreeNAS/freenas bc1f9c4src/middlewared/debian control

Add build requirement
DeltaFile
+2-0src/middlewared/debian/control
+2-01 files

LLVM/project ffdf216clang/docs ReleaseNotes.rst, clang/include/clang/Analysis/Analyses UnsafeBufferUsage.h

Revert "[Clang][UnsafeBufferUsage] Warn about two-arg string_view constructors. (#180471)" (#185692)

This reverts commit 75b2ea57d5f4a5ae0de1b3ca1ca7eec464811b45.
Makes clang assert, see:
https://github.com/llvm/llvm-project/pull/180471#issuecomment-4033081814
DeltaFile
+0-131clang/lib/Analysis/UnsafeBufferUsage.cpp
+0-44clang/test/SemaCXX/warn-unsafe-buffer-usage-string-view.cpp
+3-33clang/lib/Sema/AnalysisBasedWarnings.cpp
+1-5clang/include/clang/Basic/DiagnosticSemaKinds.td
+0-4clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
+0-3clang/docs/ReleaseNotes.rst
+4-2202 files not shown
+4-2238 files

NetBSD/src FeT8CsZgames/banner banner.c, sbin/nvmectl logpage.c

   Fix various typos, mainly in comments.
VersionDeltaFile
1.45+4-4usr.sbin/lpr/common_source/common.c
1.12+3-3sbin/nvmectl/logpage.c
1.23+3-3games/banner/banner.c
1.24+3-3sys/arch/xen/xen/pciback.c
1.108+3-3sys/arch/xen/xen/xbdback_xenbus.c
1.127+3-3sys/nfs/nfs_node.c
+19-1910 files not shown
+40-4016 files

OpenBSD/ports H8nCubSgraphics/inkscape/patches patch-src_extension_internal_pdfinput_poppler-utils_cpp patch-src_extension_internal_pdfinput_pdf-parser_cpp

   Prepare for upcoming poppler update.

   Changes shielded by preprocessor conditionals, so this can go in
   before the poppler update.
VersionDeltaFile
1.6+13-36graphics/inkscape/patches/patch-src_extension_internal_pdfinput_poppler-utils_cpp
1.30+16-4graphics/inkscape/patches/patch-src_extension_internal_pdfinput_pdf-parser_cpp
+29-402 files

NetBSD/pkgsrc W7uOplymath/R Makefile PLIST

   (math/R) Trying to fix PLIST on Darwin
VersionDeltaFile
1.280+6-1math/R/Makefile
1.44+2-1math/R/PLIST
+8-22 files

LLVM/project a585f45lldb/test/API/functionalities/data-formatter/data-formatter-objc TestDataFormatterObjCNSDate.py

[lldb] Make date test handle host-target time difference (#185759)

It seems there may be a formatter bug when there's a time zone
difference between the target machine being debugged, and the host the
debugger is running on.
DeltaFile
+2-1lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSDate.py
+2-11 files

LLVM/project 687e66cclang/tools/libclang CMakeLists.txt, lldb/source/API CMakeLists.txt

build: adjust LLDB and clang library naming on Windows (#185084)

Ensure that use of the GNU driver does not change the library name on
Windows. We would check the build tools being MSVC rather than targeting
Windows to select the output name.
DeltaFile
+1-1clang/tools/libclang/CMakeLists.txt
+1-1lldb/source/API/CMakeLists.txt
+2-22 files

FreeNAS/freenas 4405485src/middlewared/middlewared/etc_files exports.mako shadow.mako, src/middlewared/middlewared/etc_files/local/nginx nginx.conf.mako

Fixes
DeltaFile
+9-17src/middlewared/middlewared/plugins/alert.py
+5-4src/middlewared/middlewared/etc_files/exports.mako
+2-1src/middlewared/middlewared/etc_files/local/nginx/nginx.conf.mako
+2-1src/middlewared/middlewared/etc_files/shadow.mako
+18-234 files

FreeNAS/freenas 7a58f35docs/source/middleware/plugins alert.rst, src/middlewared/middlewared/alembic/versions/25.04 2025-05-13_11-29_cloud_provider_mega.py

Address review
DeltaFile
+20-12src/middlewared/middlewared/alert/base.py
+4-2src/middlewared/middlewared/alert/schedule.py
+1-1src/middlewared/middlewared/alembic/versions/25.04/2025-05-13_11-29_cloud_provider_mega.py
+0-2docs/source/middleware/plugins/alert.rst
+25-174 files