Illumos/gate cb541f8usr/src/cmd .gitignore, usr/src/test .gitignore

17819 Update gitignore files for recently added artefacts
Reviewed by: Robert Mustacchi <rm+illumos at fingolfin.org>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+4-0usr/src/cmd/.gitignore
+3-0usr/src/test/.gitignore
+7-02 files

LLVM/project fa1d723llvm/lib/Support ThreadPool.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/Support/ThreadPool.cpp
+1-11 files

LLVM/project a80cec9llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fma.ll

InstCombine: Implement SimplifyDemandedFPClass for fma

This can't do much filtering on the sources, except for nans.
We can also attempt to introduce ninf/nnan.
DeltaFile
+65-14llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+16-31llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
+81-452 files

LLVM/project 57541fellvm/test/Transforms/InstCombine simplify-demanded-fpclass-fma.ll

InstCombine: Add baseline fma tests for SimplifyDemandedFPClass
DeltaFile
+316-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
+316-01 files

LLVM/project fe52072llvm/lib/Analysis ValueTracking.cpp

Fix regression
DeltaFile
+1-5llvm/lib/Analysis/ValueTracking.cpp
+1-51 files

LLVM/project 55017b8llvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-fma.ll

Can't prove -0 for fma
DeltaFile
+24-24llvm/test/Transforms/Attributor/nofpclass-fma.ll
+21-6llvm/lib/Support/KnownFPClass.cpp
+45-302 files

LLVM/project 4b8b922llvm/include/llvm/Support KnownFPClass.h, llvm/lib/Analysis ValueTracking.cpp

ValueTracking: Improve handling for fma/fmuladd

The handling for fma was very basic and only handled the
repeated input case. Re-use the fmul and fadd handling for more
accurate sign bit and nan handling.
DeltaFile
+44-44llvm/test/Transforms/Attributor/nofpclass-fma.ll
+34-12llvm/lib/Analysis/ValueTracking.cpp
+13-0llvm/lib/Support/KnownFPClass.cpp
+11-0llvm/include/llvm/Support/KnownFPClass.h
+102-564 files

LLVM/project b9c6a6ellvm/test/Transforms/Attributor nofpclass-fma.ll

ValueTracking: Add baseline tests for improved fma handling

Improved signbit and not-nan tracking.
DeltaFile
+392-4llvm/test/Transforms/Attributor/nofpclass-fma.ll
+392-41 files

FreeNAS/freenas 5793394src/middlewared/middlewared/plugins/iscsi_ fs_attachment_delegate.py extents.py

Improve ALUA handling with locked or disabled extents

Previously iscsi.target.active_targets did not return any targets
where any LUNs were either disabled or locked.  This prevented the
STANDBY node from offering these targets when ALUA was enabled.

Once this was rectified then improvements wrt LUN status change
were required for both disable/enable and lock/unlock.

To optimize handling of LUNs locking added an optional
do_reload parameter to iscsi.alua.removed_target_extent
DeltaFile
+117-1src/middlewared/middlewared/plugins/iscsi_/fs_attachment_delegate.py
+78-3src/middlewared/middlewared/plugins/iscsi_/extents.py
+54-19src/middlewared/middlewared/plugins/iscsi_/targets.py
+10-14src/middlewared/middlewared/plugins/iscsi_/target_to_extent.py
+5-2src/middlewared/middlewared/plugins/iscsi_/alua.py
+264-395 files

FreeNAS/freenas 57a9a67src/freenas/usr/local/libexec ctdb_ha_reclock.py, src/middlewared/middlewared/etc_files/ctdb ctdb.conf.mako nodes.mako

Add clustered SMB state

This commit adds working configuration for stateful SMB HA failover:

* reclock helper script - determines which node holds the cluster
  mutex lock based on presence of data pool system dataset.

* ctdb-related etc files. We can hard-code the nodes config based
  on our known HA nodes (this significantly eases past problems with
  gluster that we saw with dynamic nodes and ctdb stability).

* smbd will remain stopped on standby controller until it becomes
  standby.

* keepalived will continue to manage virtual IPs
DeltaFile
+107-0src/freenas/usr/local/libexec/ctdb_ha_reclock.py
+22-0src/middlewared/middlewared/etc_files/ctdb/ctdb.conf.mako
+11-0src/middlewared/middlewared/utils/ctdb.py
+11-0src/middlewared/middlewared/plugins/etc.py
+11-0src/middlewared/middlewared/etc_files/ctdb/nodes.mako
+8-0src/middlewared/middlewared/plugins/service_/services/ctdb.py
+170-06 files not shown
+192-812 files

FreeBSD/ports f8fbdedtextproc Makefile, textproc/fcitx5-mcfoxim pkg-plist Makefile

Add textproc/fcitx5-mcfoxim: OpenVanilla Formosan languages for Fcitx5
DeltaFile
+97-0textproc/fcitx5-mcfoxim/pkg-plist
+21-0textproc/fcitx5-mcfoxim/Makefile
+10-0textproc/fcitx5-mcfoxim/files/patch-src_CMakeLists.txt
+3-0textproc/fcitx5-mcfoxim/distinfo
+1-0textproc/fcitx5-mcfoxim/pkg-descr
+1-0textproc/Makefile
+133-06 files

LLVM/project 50703fallvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][Test][AIX] use tr instead of sed for line split (#175557)

Test case is using sed command `sed 's/,/,\n/g'` to split a line.
On AIX that is not working with the AIX system's `sed`

AIX external BB fails from
https://lab.llvm.org/buildbot/#/builders/64/builds/6911

Here substitute:
`sed 's/,/,\n/g'`
with:
`tr ',' '\n'`
but because `tr` does not keeps the comma, also needed to change looked
for texts i.e. to remove the comma `,` from them since it is not needed
for the correctness.

Co-authored-by: Daniel Chen <cdchen at ca.ibm.com>
DeltaFile
+418-418llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+418-4181 files

LLVM/project 6f03d38bolt/docs BinaryAnalysis.md

WIP: Rework user-facing documentation of BOLT gadget scanner
DeltaFile
+322-78bolt/docs/BinaryAnalysis.md
+322-781 files

LLVM/project bf5ee06mlir/lib/IR Remarks.cpp

[mlir] Use bind_front in RemarkEngine. NFC. (#175818)

Switch from C++11 `std::bind` to C++26 `bind_front` backported in
https://github.com/llvm/llvm-project/pull/175056.

The former is an old design that predates lambdas and uses explicit
placeholders. `bind_front` should produce a much smaller object (we only
need one pointer).
DeltaFile
+1-3mlir/lib/IR/Remarks.cpp
+1-31 files

FreeNAS/freenas d231381src/freenas/usr/local/libexec ctdb_ha_reclock.py, src/middlewared/middlewared/etc_files/ctdb ctdb.conf.mako nodes.mako

Add clustered SMB state

This commit adds working configuration for stateful SMB HA failover:

* reclock helper script - determines which node holds the cluster
  mutex lock based on presence of data pool system dataset.

* ctdb-related etc files. We can hard-code the nodes config based
  on our known HA nodes (this significantly eases past problems with
  gluster that we saw with dynamic nodes and ctdb stability).

* smbd will remain stopped on standby controller until it becomes
  standby.

* keepalived will continue to manage virtual IPs
DeltaFile
+105-0src/freenas/usr/local/libexec/ctdb_ha_reclock.py
+22-0src/middlewared/middlewared/etc_files/ctdb/ctdb.conf.mako
+11-0src/middlewared/middlewared/utils/ctdb.py
+11-0src/middlewared/middlewared/plugins/etc.py
+11-0src/middlewared/middlewared/etc_files/ctdb/nodes.mako
+5-3src/middlewared/middlewared/plugins/smb.py
+165-36 files not shown
+190-812 files

LLVM/project c620b47llvm/include/llvm/Support KnownFPClass.h, llvm/lib/Analysis ValueTracking.cpp

ValueTracking: Account for undef in adjustKnownFPClassForSelectArm (#175372)

This needs to consider undef like the KnownBits case does.
DeltaFile
+600-600llvm/test/Transforms/Attributor/nofpclass-implied-by-fcmp.ll
+25-25llvm/test/Transforms/Attributor/nofpclass-select.ll
+26-11llvm/test/Transforms/Attributor/nofpclass.ll
+19-6llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+12-2llvm/include/llvm/Support/KnownFPClass.h
+9-3llvm/lib/Analysis/ValueTracking.cpp
+691-6471 files not shown
+692-6487 files

LLVM/project 0494132llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV] Add isCommutable to more P extension instructions. (#175722)

DeltaFile
+51-51llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+51-511 files

LLVM/project 7b699ccllvm/lib/Target/AMDGPU GCNSchedStrategy.cpp GCNSchedStrategy.h, llvm/test/CodeGen/AMDGPU machine-scheduler-rematerialization-scoring.mir machine-scheduler-sink-trivial-remats-attr.mir

Revert "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)" (#175813)

This reverts 8ab79377740789f6a34fc6f04ee321a39ab73724 and
f21e3593371c049380f056a539a1601a843df558 which are causing a HIP failure
in a Blender test.
DeltaFile
+290-503llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+0-523llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir
+194-194llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
+35-242llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir
+50-208llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+5-5llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-debug.mir
+574-1,6751 files not shown
+575-1,6767 files

LLVM/project 313a382llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 bit-test.ll switch-cases-to-branch-and.ll

AArch64: Add TBZ/TBNZ matcher for x & (1 << y).

x & (1 << y) is InstCombine's canonical form of a bit test which is
currently code generated literally, missing an opportunity to use TBZ/TBNZ
on bit 0 of x >> y, which generally results in an instruction sequence
that is shorter by 2 instructions. Implement this optimization. On my
machine this results in a 0.05% reduction in clang binary size and a 0.25%
reduction in dynamic instruction count compiling AArch64ISelLowering.cpp.

Reviewers: davemgreen, fhahn

Reviewed By: davemgreen

Pull Request: https://github.com/llvm/llvm-project/pull/172962
DeltaFile
+94-0llvm/test/CodeGen/AArch64/bit-test.ll
+39-26llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+16-24llvm/test/CodeGen/AArch64/switch-cases-to-branch-and.ll
+149-503 files

LLVM/project 2f4fb38clang/lib/Driver/ToolChains Clang.cpp, lld/ELF/Arch X86_64.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+6-6llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+3-3lld/ELF/Arch/X86_64.cpp
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+2-1llvm/lib/IR/Verifier.cpp
+1-1llvm/include/llvm/MC/MCSection.h
+1-1llvm/include/llvm/MC/MCStreamer.h
+16-146 files

LLVM/project d0eb856clang/lib/Driver/ToolChains Clang.cpp, lld/ELF/Arch X86_64.cpp

Format

Created using spr 1.3.6-beta.1
DeltaFile
+6-6llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+3-3lld/ELF/Arch/X86_64.cpp
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+2-1llvm/lib/IR/Verifier.cpp
+1-1llvm/include/llvm/MC/MCSection.h
+1-1llvm/include/llvm/MC/MCStreamer.h
+16-146 files

LLVM/project 86c8002clang/lib/Driver/ToolChains Clang.cpp, lld/ELF/Arch X86_64.cpp

Format

Created using spr 1.3.6-beta.1
DeltaFile
+6-6llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+3-3lld/ELF/Arch/X86_64.cpp
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+2-1llvm/lib/IR/Verifier.cpp
+1-1llvm/include/llvm/MC/MCSection.h
+1-1llvm/include/llvm/MC/MCStreamer.h
+16-146 files

LLVM/project 2148e17clang/lib/Driver/ToolChains Clang.cpp, lld/ELF/Arch X86_64.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+3-3lld/ELF/Arch/X86_64.cpp
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCStreamer.h
+1-1llvm/include/llvm/MC/MCSection.h
+8-74 files

LLVM/project 87653f6clang/lib/Driver/ToolChains Clang.cpp, lld/ELF/Arch X86_64.cpp

Format

Created using spr 1.3.6-beta.1
DeltaFile
+3-3lld/ELF/Arch/X86_64.cpp
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCSection.h
+1-1llvm/include/llvm/MC/MCStreamer.h
+8-74 files

LLVM/project 3a3b379clang/lib/Driver/ToolChains Clang.cpp, llvm/include/llvm/MC MCStreamer.h MCSection.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCStreamer.h
+1-1llvm/include/llvm/MC/MCSection.h
+5-43 files

LLVM/project 4521776clang/lib/Driver/ToolChains Clang.cpp, llvm/include/llvm/MC MCSection.h MCStreamer.h

Format

Created using spr 1.3.6-beta.1
DeltaFile
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCSection.h
+1-1llvm/include/llvm/MC/MCStreamer.h
+5-43 files

LLVM/project f5bd814clang/lib/Driver/ToolChains Clang.cpp, llvm/include/llvm/MC MCStreamer.h MCSection.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCStreamer.h
+1-1llvm/include/llvm/MC/MCSection.h
+5-43 files

LLVM/project f3d6daeclang/lib/Driver/ToolChains Clang.cpp, llvm/include/llvm/MC MCStreamer.h MCSection.h

Format

Created using spr 1.3.6-beta.1
DeltaFile
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCStreamer.h
+1-1llvm/include/llvm/MC/MCSection.h
+5-43 files

LLVM/project be02df1clang/lib/Driver/ToolChains Clang.cpp, llvm/include/llvm/MC MCSection.h MCStreamer.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCSection.h
+1-1llvm/include/llvm/MC/MCStreamer.h
+5-43 files

LLVM/project 491a265clang/lib/Driver/ToolChains Clang.cpp, llvm/include/llvm/MC MCStreamer.h MCSection.h

Format

Created using spr 1.3.6-beta.1
DeltaFile
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+1-1llvm/include/llvm/MC/MCStreamer.h
+1-1llvm/include/llvm/MC/MCSection.h
+5-43 files