FreeNAS/freenas 9e97550 —

Empty commit to create PR on github.

You should reset it
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+0-00 files

FreeNAS/freenas 06d363e — src/middlewared/middlewared/plugins/truenas license.py

NAS-144887 / 28.0.0-BETA.1 / Show a clear message when a legacy license is uploaded (#20066)

This commit fixes an issue where uploading a legacy license surfaced the
license daemon's raw "Missing PEM BEGIN marker" parser error. We now
detect a legacy license before it is handed to the daemon and tell the
user it is unsupported and to contact TrueNAS Support, which also avoids
writing it over the installed license only to roll it back.
DeltaFile
+19-1src/middlewared/middlewared/plugins/truenas/license.py
+19-11 files

LLVM/project 31d295e — llvm/test/TableGen BitsInitListErrors.td

[TableGen] Add tests for bit list parsing errors (#235736)
DeltaFile
+28-0llvm/test/TableGen/BitsInitListErrors.td
+28-01 files

LLVM/project fddb499 — clang/include/clang/AST Expr.h, clang/lib/CodeGen CGStmt.cpp

[clang][AST] Stop creating `ConstantExpr` nodes without a result (#229761)

They don't add anything if we don't have a result.
DeltaFile
+10-120clang/test/AST/ast-dump-stmt-json.c
+10-16clang/test/AST/ast-dump-stmt.c
+8-12clang/lib/CodeGen/CGStmt.cpp
+9-7clang/lib/Sema/SemaExpr.cpp
+1-4clang/lib/Sema/SemaStmtAsm.cpp
+2-2clang/include/clang/AST/Expr.h
+40-1611 files not shown
+41-1627 files

LLVM/project 46ec0a5 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv vwadd-sdnode.ll fixed-vectors-vwaddu.ll

[RISCV] Reassociate exts in ext/add reduction tree (#230928)

With an ext-add-ext-add pattern, the second ext can be pushed to after
the final add if the first ext adds enough bits to guarantee that the
second add won't overflow even without the second ext.

Further optimize ext-add reduction in x264 sad_NxN, building on #230657.

AI Usage: Assisted by Codex
DeltaFile
+125-56llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
+49-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+22-4llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
+2-3llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
+198-634 files

LLVM/project 9b6867f — llvm/lib/Transforms/Vectorize LoopVectorize.cpp

[LV] Remove unused parameters of preparePlanForEpilogueVectorLoop (NFC). (#235991)

L and LVP are no longer used.
DeltaFile
+6-7llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+6-71 files

LLVM/project 4e53a16 — llvm/test/Transforms/LoopVectorize optimal-epilog-vectorization.ll

[LV] Add epilogue test with FP IV with same start and step (NFC) (#235987)

Add a test with an fadd and an fsub induction that share start and step
values, to make sure each resumes from its own value in the epilogue
vector loop.
DeltaFile
+136-0llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
+136-01 files

LLVM/project 21d0029 — llvm/include/llvm/Analysis ValueTracking.h, llvm/include/llvm/IR ConstantFPRange.h

Revert "[KnownFPClass] Refactor NaN sign encoding for KnownFPClass" (#235992)

Reverts llvm/llvm-project#220606

Breaks the build with GCC, since
`KnownFPClass::toFPClassMask(FPClassTest, bool)` is not a constant
expression, because the compound assignment operators (`|=`, `&=`, `^=`)
in `llvm/ADT/BitmaskEnum.h` are not `constexpr`.
DeltaFile
+78-256llvm/include/llvm/Support/KnownFPClass.h
+19-5llvm/lib/Support/KnownFPClass.cpp
+1-1llvm/include/llvm/IR/ConstantFPRange.h
+1-1llvm/include/llvm/Analysis/ValueTracking.h
+99-2634 files

FreeBSD/ports c4b047b — devel/py-ty Makefile distinfo

devel/py-ty: Update to 0.0.92

Changelog: https://github.com/astral-sh/ty/blob/0.0.92/CHANGELOG.md

Reported by:    portscout
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+3-3devel/py-ty/distinfo
+1-1devel/py-ty/Makefile
+4-42 files

OpenZFS/src 032e848 — tests/zfs-tests/include commands.cfg

ZTS: allow ctypes library discovery

Include the loader discovery tools used by Python ctypes in the
constrained Linux test path.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: ooonea <35407790+ooonea at users.noreply.github.com>
Assisted-by: OpenAI Codex
Closes #19576
DeltaFile
+2-0tests/zfs-tests/include/commands.cfg
+2-01 files

LLVM/project 2f2c570 — llvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir

[AMDGPU] Decrease sensitivity of rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir

Change-Id: I794fe17c417aaad2b15d1e12309e1c3507fe9990
DeltaFile
+1-0llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir
+1-01 files

OpenZFS/src e9069ff — tests/runfiles common.run, tests/zfs-tests/cmd Makefile.am mmap_stale_check.c

Add tests for stale mmap pages after rollback and recv -F

A file that has been mapped with mmap() keeps its pages in the Linux
page cache. If the dataset is then rolled back, or receives an
incremental stream with "zfs receive -F", and the file keeps its
object number, generation and size but has different data, reads
and new mappings kept returning the pre-rollback data until the
cache was dropped or the dataset remounted (#10931). The on-disk
data was always correct.

Add mmap_cached_rollback and mmap_cached_receive to the mmap group.
Both fault the file in through a read-only mapping, change the
dataset underneath it, and check that read() and a fresh mapping
see the new contents. The mmap_stale_check helper does the mapping
and checksumming.

Both tests fail on Linux without the zfs_rezget() page cache fix
and pass with it. They also pass on FreeBSD.


    [3 lines not shown]
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+148-0tests/zfs-tests/cmd/mmap_stale_check.c
+72-0tests/zfs-tests/tests/functional/mmap/mmap_cached_receive.ksh
+65-0tests/zfs-tests/tests/functional/mmap/mmap_cached_rollback.ksh
+2-1tests/runfiles/common.run
+1-1tests/zfs-tests/cmd/Makefile.am
+2-0tests/zfs-tests/tests/Makefile.am
+290-22 files not shown
+292-28 files

OpenBSD/src QJzEh9x — sys/dev/pci/drm/amd/amdgpu amdgpu_cs.c

   drm/amdgpu: free the userptr ranges when a CS fails after parser_bos

   From Jesse Zhang
   6ac46ae5ac561d4fc7d4246ad83d71bed0d9af9a in linux-6.18.y/6.18.59
   1b4da805a0ba354a549ce07459c871c17dd94fe0 in mainline linux
VersionDeltaFile
1.34+6-0sys/dev/pci/drm/amd/amdgpu/amdgpu_cs.c
+6-01 files

OpenBSD/src BMnfRC8 — sys/dev/pci/drm/i915/display intel_dmc.c

   drm/i915/dmc: Harden DMC firmware payload parsing

   From Dibin Moolakadan Subrahmanian
   dfcfe2874e7c16e8460dc86ac1eeb54ea0e7f8aa in linux-6.18.y/6.18.59
   8bb1858db453cd4250e3b633f5d2d09206024ca6 in mainline linux
VersionDeltaFile
1.10+16-5sys/dev/pci/drm/i915/display/intel_dmc.c
+16-51 files

OpenBSD/src nf0Sh29 — usr.sbin/tcpdump nameser.h print-domain.c

   sync DNS RRs with the current params as per iana

   from markowski1 at gmail
VersionDeltaFile
1.29+40-9usr.sbin/tcpdump/print-domain.c
1.9+40-2usr.sbin/tcpdump/nameser.h
+80-112 files

OpenBSD/src M4sMwIQ — sys/dev/pci/drm/amd/amdgpu amdgpu_gem.c

   drm/amdgpu: keep the eviction fence until the last handle is closed

   From Jesse Zhang
   dce8f7f03a47b1744dccf506268f9229b67fab47 in linux-6.18.y/6.18.59
   3c44cbcec5eb370713bbd2c315ed7c34d8ccec2b in mainline linux
VersionDeltaFile
1.23+6-3sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c
+6-31 files

LLVM/project 9d5b2a8 — llvm/test/tools/llubi intr_masked_store.ll intr_masked_store_ub.ll, llvm/tools/llubi/lib Interpreter.cpp

[llubi] Add support for llvm.masked.store. (#235876)

Re-use the logic for llvm.masked.load to also support llvm.masked.store.

The mask/pointer arithmetic logic is the same for both intrinsic.

PR: https://github.com/llvm/llvm-project/pull/235876
DeltaFile
+85-0llvm/test/tools/llubi/intr_masked_store_ub.ll
+67-0llvm/test/tools/llubi/intr_masked_store.ll
+19-10llvm/tools/llubi/lib/Interpreter.cpp
+171-103 files

OpenBSD/src Fsx8yCW — sys/dev/pci/drm/amd/amdgpu vce_v3_0.c

   drm/amdgpu: Fix VCE 3 ring align_mask

   From David Rosca
   61f376654fb9d8c35896f3d5e85b95994513f647 in linux-6.18.y/6.18.59
   2ee9836545e690c9e66ec203445d7705959fd7a8 in mainline linux
VersionDeltaFile
1.10+1-1sys/dev/pci/drm/amd/amdgpu/vce_v3_0.c
+1-11 files

OpenBSD/src rCCHhNs — sys/dev/pci/drm/i915/display intel_dmc_regs.h intel_dmc.c

   drm/i915/dmc: Add sanity check for DMC load address

   From Dibin Moolakadan Subrahmanian
   ef82b4d5cb4a3fe77c7f99008d78b8c64709e258 in linux-6.18.y/6.18.59
   7dedc5bb11f95e96fe80757c924d8d9aa7327759 in mainline linux
VersionDeltaFile
1.9+55-0sys/dev/pci/drm/i915/display/intel_dmc.c
1.5+12-0sys/dev/pci/drm/i915/display/intel_dmc_regs.h
+67-02 files

OpenBSD/src DcBueTW — sys/dev/pci/drm drm_exec.c, sys/dev/pci/drm/include/drm drm_exec.h

   drm/exec: don't immediately add prelocked obj to array of locked objs

   From Christian Koenig
   96d9996e5dbcfabed052c0d9377a382c95fed607 in linux-6.18.y/6.18.59
   26401a4999f1596a515b2e704e7066ac09306488 in mainline linux
VersionDeltaFile
1.6+44-31sys/dev/pci/drm/drm_exec.c
1.4+9-6sys/dev/pci/drm/include/drm/drm_exec.h
+53-372 files

OpenBSD/src XNJa32Q — sys/dev/pci/drm/amd/amdgpu amdgpu_gem.c

   drm/amdgpu: report the BO alignment in bytes in GEM_LIST_HANDLES

   From Jesse Zhang
   07002a326c7cc03fd11be10e9cbc828aa4587908 in linux-6.18.y/6.18.59
   d65a459dbc9a6c3b051e22c96f73598e34b31bfc in mainline linux
VersionDeltaFile
1.22+1-1sys/dev/pci/drm/amd/amdgpu/amdgpu_gem.c
+1-11 files

LLVM/project 8212441 — llvm/include/llvm/Analysis ValueTracking.h, llvm/lib/Analysis ValueTracking.cpp

[InstCombine] Share common binop folds between icmp and [su]cmp (#222978)

This PR extends #216157, which adds a missed `[su]cmp` fold for matching
operands in order-preserving/reversing binops (covers `add`, `sub`,
`mul`)

- Extracted common-operand logic from `foldICmpBinOp()` into a
`matchCommonBinOpOperands()` helper function for `icmp`, `scmp`, and
`ucmp`. However, existing specialized `icmp` equality and signed
multiplication folds remain separate - see current state of
`foldICmpBinOp()`.
- The helper accepts the comparison predicate by reference so `icmp` can
canonically keep operand order (predicate flips with an order-reversing
operation), while `[su]cmp` can use the predicate to swap operand order
afterward.
- `m_AddLike` is explicitly used in the helper to support `or disjoint`
for `[su]cmp`, equivalent to non-wrapping addition.
- Moved `hasNoWrapProblem()` outside into a file-level function for both
the new helper and existing passes that rely on it.

    [14 lines not shown]
DeltaFile
+173-77llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+177-0llvm/test/Transforms/InstCombine/scmp.ll
+175-0llvm/test/Transforms/InstCombine/ucmp.ll
+11-8llvm/lib/Analysis/ValueTracking.cpp
+8-3llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+4-4llvm/include/llvm/Analysis/ValueTracking.h
+548-922 files not shown
+554-948 files

FreeBSD/ports ff94a08 — deskutils Makefile, deskutils/cosmic-screenshot pkg-descr Makefile

deskutils/cosmic-screenshot: New port: Screenshot capture tool for the COSMIC desktop environment

COSMIC Screenshot is a utility to captures images of displays,
cropped slices of those displays, or images of app windows.

WWW: https://github.com/pop-os/cosmic-screenshot

PR:             299953
Reported by:    Josh Megnauth <jo.sh at tutanota.com> (new maintainer)
DeltaFile
+427-0deskutils/cosmic-screenshot/distinfo
+212-0deskutils/cosmic-screenshot/Makefile.crates
+42-0deskutils/cosmic-screenshot/Makefile
+2-0deskutils/cosmic-screenshot/pkg-descr
+1-0deskutils/Makefile
+684-05 files

OpenBSD/src 75its6f — sys/dev/pci/drm/amd/amdgpu amdgpu_debugfs.c

   drm/amdgpu: don't drop the runtime PM reference twice in amdgpu_gpr

   From Jesse Zhang
   652b1f26125fe48aed5f4944698a85b457eef491 in linux-6.18.y/6.18.59
   de9f6bcdb44f0e410031002e2f103826ea6b6259 in mainline linux
VersionDeltaFile
1.24+3-18sys/dev/pci/drm/amd/amdgpu/amdgpu_debugfs.c
+3-181 files

OpenBSD/src W8ZdmVD — sys/dev/pci/drm/amd/amdgpu sdma_v3_0.c

   drm/amdgpu/sdma3: Work around POLL_REGMEM / FENCE hang

   From Timur Kristof
   05507b9b19f95ce1ca1f5fc5d394ae1f4c5b59e2 in linux-6.18.y/6.18.59
   752480ad62964edf0254e151110d3e53a7cb37de in mainline linux
VersionDeltaFile
1.9+21-4sys/dev/pci/drm/amd/amdgpu/sdma_v3_0.c
+21-41 files

OpenBSD/src ekCKmwd — sys/dev/pci/drm/amd/pm/swsmu/smu14 smu_v14_0_2_ppt.c

   drm/amd/pm: add zero fan stop temperature support on smu 14.0.2

   From Kenneth Feng
   6cfc4a25d4f02935977a6a45a60e7a0c966e38c6 in linux-6.18.y/6.18.59
   a2eae9f4fa1b07f8e6e61b48931228da051943f0 in mainline linux
VersionDeltaFile
1.10+54-1sys/dev/pci/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
+54-11 files

OpenBSD/src e7nvBas — sys/dev/pci/drm/ttm ttm_bo.c

   drm/ttm: fix swapped-out resources never leaving their bulk_move range

   From Vadim Nikitushkin
   b48ebe399b4e72baa323462580fdd83ebda561e1 in linux-6.18.y/6.18.59
   3db7d7d583419f7b1f2e141e36418802dbb25cf8 in mainline linux
VersionDeltaFile
1.49+1-1sys/dev/pci/drm/ttm/ttm_bo.c
+1-11 files

GhostBSD/ports 6fe39af — x11/xconfig Makefile distinfo

x11/xconfig: Update to 3.6

Remove unused packages before setting up drivers, so an early exit
during NVIDIA setup no longer leaves VM guest packages installed.
DeltaFile
+3-3x11/xconfig/distinfo
+1-1x11/xconfig/Makefile
+4-42 files

LLVM/project d45bcbb — llvm/test/Analysis/CostModel/RISCV rvv-insertelement.ll rvv-vectorinsert.ll, llvm/test/Transforms/SLPVectorizer/RISCV strided-load-in-tree-stride.ll

[RISCV] Double the cost of slides (#232827)

From what I've measured and from what I can read on
https://camel-cdr.github.io/rvv-bench-results, vslideup and vslidedown
generally aren't pipelined to the same degree as arithmetic ops. This,
combined with the fact that they require a vsetvli toggle which we don't
currently cost for, makes shufflevector sequences emitted by SLP
expensive on hardware.

Doubling the costs of the slides prevents unprofitable SLP vectorization
in 525.x264_r, and improves performance by 3.91% on the SpacemiT-K3,
-march=rva23u64 -O3 -flto. There were no other noticeable changes on
SPEC CPU 2017.
DeltaFile
+303-303llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
+168-168llvm/test/Analysis/CostModel/RISCV/splice.ll
+111-111llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
+82-49llvm/test/Transforms/SLPVectorizer/RISCV/strided-load-in-tree-stride.ll
+54-54llvm/test/Analysis/CostModel/RISCV/rvv-vectorinsert.ll
+45-45llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll
+763-73028 files not shown
+1,125-1,06434 files

LLVM/project 7b9c6d7 — llvm/lib/Target/X86 X86InstrAVX512.td, llvm/test/MC/Disassembler/X86/apx evex-format.txt

[X86][AsmParser] Fix Intel mask position for AVX512PF prefetch instructions (#233869)

AVX512PF gather/scatter prefetch instructions reject a memory operand
followed by a mask decorator in Intel syntax. LLVM also prints the mask
as a leading operand, producing Intel disassembly that cannot be
reassembled.

Move the mask after the memory operand in the Intel assembly variant of
`avx512_gather_scatter_prefetch`. Preserve the AT&T variant and the
outer dialect selection so the literal mask braces survive TableGen
processing.

Add Intel MC tests for all 16 mnemonics, using the 32 existing AT&T
encoding expectations. Cover sized/unsized memory, high VSIB registers,
YMM/ZMM indices, k1-k7, scaled addressing, compressed displacement, and
assembly output round trips. Add diagnostics for missing/zero masks,
zeroing, incorrect VSIB widths, and incorrect memory size.

Update the existing APX disassembler expectation to the corrected mask

    [13 lines not shown]
DeltaFile
+135-0llvm/test/MC/X86/avx512pf-64-intel.s
+28-0llvm/test/MC/X86/avx512pf-intel-errors.s
+3-4llvm/test/MC/X86/apx/evex-format-intel.s
+1-1llvm/test/MC/Disassembler/X86/apx/evex-format.txt
+1-1llvm/lib/Target/X86/X86InstrAVX512.td
+168-65 files