Find the dataset of a renamed volume by its object number
A volume looks its dataset up by zv_name when it is first opened, to
own it, after a rollback or a receive in zvol_resume(), to find its
objset again, and in zvol_setup_zv(), which both call, to read the
readonly property. A rename only updates zv_name later, though:
dsl_dir_rename_sync() hands the update to the zvol taskq through
zvol_rename_minors(). Until that task has run, zv_name is the old
name. A first open of the volume, or of any volume below a renamed
dataset, then fails with ENOENT. A rollback or a receive issued by the
old name in that window still finds the minor by it, and when
zvol_resume() then fails in zvol_setup_zv(), the volume stays open
without its dnode and the next read or write dereferences NULL; had the
hold in zvol_resume() failed, its VERIFY0() would have panicked.
Record the object number of the dataset when the minor is allocated and
look the dataset up by it, which a rename does not change, and read the
property from the dataset already held. The pool is still found by
zv_name, whose pool part a rename keeps. dmu_objset_own() also
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x11/xss-lock: perform some needed facelifting on the port (+)
- Modernize CMakeLists.txt to prepare for upcoming CMake 4.x
- Simplify distfile handling by employing the ?dummy=/ trick
x11/xss-lock: perform some needed facelifting on the port (+)
- Modernize CMakeLists.txt to prepare for upcoming CMake 4.x
- Simplify distfile handling by employing the ?dummy=/ trick
[AMDGPU] Hardwire SRAMECC on for gfx12.5
ECC on gfx12.5 cannot be disabled, so sramecc is not a selectable
target ID feature. Accepting sramecc- produced code relying on D16
loads preserving unused bits, which the loader then rejects.
Change-Id: I331b5d42e80cc6de8d084047f2b84fc2ef9349cb
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[ObjectYAML][NFC] Hoist BBAddrMap obj2yaml decoder into a shared helper (#231071)
Preparatory NFC refactor to let the upcoming COFF dumper reuse the
BBAddrMap payload decoder, mirroring the encoder hoisted in #205991.
[TargetLowering][X86] Prefer 'r' over 'm' for foldable "rm" inline asm operands
An "rm" (register-or-memory) inline asm operand has always resolved to
'm', because getConstraintPreferences() picks the most general
constraint present, and 'm' is more general than 'r'. That's safe, since
memory can't run out, but it forces a value that could stay in a
register through a stack slot even when there's no register pressure
(https://github.com/llvm/llvm-project/issues/20571).
Prefer 'r' instead where the register allocator can fold the register
back to a stack slot when it runs out of registers, and mark the
register operand foldable (InlineAsm::Flag::setRegMayBeFolded()) so it
does. Both allocators can: the greedy allocator folds an operand when it
spills its value, and the fast allocator folds operands up front when
the asm's register operands wouldn't fit.
ParseConstraints() sets AsmOperandInfo::MayFoldRegister for an operand
whose constraint codes include 'r' and 'm' and are otherwise only
immediate codes, above -O0, on a target that opts in through the new
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[X86] Address review: test a tied input's untied read under -regalloc=fast
Add the case from the #229630 review, one value passed to an untied "r"
input and to the "0" input tied to an "rm" output, to show that the fast
register allocator no longer folds the output when everything fits.
Drop the -O0 RUN line from inline-asm-direct-mem-output-error.ll: it only
showed that "=rm" still picks memory at -O0, which asm-constraints-rm.ll
already tests, and there make the -O0 line name the instruction selector
and say that it tests the optimization level.
Assisted-by: Claude Opus 5.5
[RegAllocFast] Fold foldable inline asm operands under register pressure
An inline asm register operand marked foldable (from an "rm" constraint)
may be replaced with a stack slot when the register allocator runs out
of registers. The greedy allocator does that when it spills the value.
The fast allocator can't: it assigns the operands of an instruction one
at a time, and folding replaces the instruction. So it reported
"inline assembly requires more registers than available" instead.
Before allocating a block, estimate from each inline asm's own operands
whether they fit in registers, and fold as many foldable registers as
needed to make them fit, so the common case without pressure still gets
a register. Values that only live across the asm don't count, since the
allocator spills them when it needs their registers. The estimate
follows allocateInstruction():
- First all defs get distinct registers, avoiding physreg defs; then all
uses, along with the defs still occupied while the uses are read
(early-clobber and tied defs, see isLiveThroughDef()), get distinct
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[RegAllocFast] Address review: don't recount a tied input's untied reads
When one value is passed to both a tied operand and an untied one, e.g.
"=rm"(r) : "r"(v), "0"(v), with an explicit -regalloc=fast above -O0 (so
TwoAddress doesn't run and the ties reach RegAllocFast), the fold estimate
counted three registers where lowerTiedUse() uses one. Tied uses are
allocated first, so the value moves into the def's register and the untied
read is rewritten to it. tiedUseNeedsOwnReg() still assumed another read of
the value could get it a register first, and the untied read was counted on
its own as well, so the asm's output was folded to the stack needlessly.
Model the tied input itself: while one of its tied defs is in a register,
it needs no register of its own unless tiedUseNeedsOwnReg() says so (only
an early-clobber def now makes another read matter), and its untied reads
share whichever register it has. Once its tied defs are folded, the untied
reads need a register again, so choose what to fold by counting again with
each candidate folded, and fold both halves when neither alone helps.
Assisted-by: Claude Opus 5.5
Report a failed open WiFi network on the status line
An open network has no dialog to reopen, so a failed attempt only put
the status line back to "not connected" with no sign that anything
went wrong. Show "Could not connect to {ssid}" instead, through a
connection_failed() helper also used when saving the network fails.
Translate the installer into every supported language
Fill every untranslated string in all language files and replace the
fuzzy guesses msgmerge made, which are ignored at runtime and were
often wrong. Existing translations are kept. The files are now UTF-8,
since their headers declared ASCII.
[AMDGPU] Fix sramecc value in subtarget cache key
The sramecc component of the subtarget cache key encoded the xnack
setting. Modules sharing a TargetMachine with equal xnack but different
sramecc module flags reused the same cached subtarget, giving the wrong
sramecc mode.
Change-Id: I727ff71298ede9846cf2ace98a88c8b0114c7e68
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
sysarch.x86.2: manual page for the sysarch(2) functions on x86
Reviewed by: ziaee
Discussed with: jhb
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D60047
sysarch.x86.2: manual page for the sysarch(2) functions on x86
Reviewed by: ziaee
Discussed with: jhb
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D60047
[mlir][LLVMIR] Precompile NVVM and ROCDL operation declarations (#232976)
The eight source shards in each dialect repeatedly parse their operation
headers after loading the shared LLVM PCH. Give each dialect a local PCH
containing LLVMIR/pch.h followed by its operation header. Disable
downstream reuse so other libraries retain their existing PCH selection.
Both pairs save CPU (32.55 s and 57.33 s). Focused serial compilation of
all 21 affected sources, including 13.65 s of new PCH creation, reduces
CPU from 103.12 to 87.48 s (-15.17%).
Assisted-by: Codex
CodeGen: Remove TargetOptions::ExceptionModel
The exception model now comes only from the "exception-model" module
flag. Remove the TargetOptions field and its copy into MCAsmInfo, so
MCAsmInfo only knows the target's default model.
The WebAssembly model checks move from the TargetMachine constructor
into the Emscripten EH/SjLj lowering pass. Clang relied on the backend
to reject non-wasm models for wasm targets, so it now rejects them
itself.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
