[LAA] Avoid std::abs(INT64_MIN) signed-overflow UB in stride scaling. (#215640)
getDependenceDistanceStrideAndSize scaled the strides via
std::abs(StridePtrInt), which is UB for INT64_MIN. Use
llvm::AbsoluteValue, which negates in the unsigned domain.
Fixes an UBSan failure for the added test case.
[RISCV] Port Gather/Scatter Lowering to NewPM
This also adds some missing pass dependencies to the legacy version of
the pass, to reflect needed analyses.
Assisted-by: AI
[flang] Add TRANSFER folding value tests for MOLD longer than SOURCE (#213573)
Constant folding of TRANSFER has value tests for same-size and
mold-shorter cases (flang/test/Evaluate/fold-transfer.f90) and shape
tests (folding10.f90), but nothing pins the result values when the
physical representation of the result is longer than SOURCE's. F2023
16.9.212 p.5 makes the leading part normative (including the
TRANSFER(TRANSFER(E,D),E) round-trip identities), and the Examples
paragraph's Case (ii) pins a partially covered trailing array element;
flang zero-fills the processor-dependent remainder (scalar, array,
derived, and CHARACTER molds, including derived-type components wholly
beyond SOURCE's representation).
All checks are byte-order independent: round trips prove leading-part
placement, and the two-endian .or. checks (the fold-transfer.f90
test_c2i_s idiom) are portable value/zero-fill pins.
These tests pass at head; their purpose is to guard these semantics
through upcoming refactoring of the Evaluate library's scalar
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[Clang] Implement CWG 2282 (#215157)
Link: https://wg21.link/cwg2282
For non-over-aligned types, overload resolution now falls back to
aligned allocation functions.
ixgbe: Avoid a signed shift while assembling the PHY ID
The PHY identifier word is promoted to signed int when the cast is
applied after the shift. Cast the 16-bit register value first so
identifiers with their high bit set are assembled as unsigned data.
MFC after: 2 weeks
e1000: Avoid signed shifts while assembling PHY IDs
PHY identifier words are promoted to signed int when the cast is applied
after the shift. Cast each 16-bit register value first so identifiers
with their high bit set are assembled as unsigned data.
MFC after: 2 weeks
ixgbe: Avoid a signed shift while assembling the PBA number
The EEPROM word is promoted to signed int before the left shift when
the cast is applied to the complete expression. Cast the word first so
all 16-bit values are shifted as unsigned data.
This is the ixgbe counterpart of the e1000 correction imported from
DPDK commit b932270c66.
MFC after: 2 weeks
igc: Check PHY control register reads
Do not modify a zero-initialized PHY control value when its preceding
read failed. Leave the PHY unchanged when the void power helpers cannot
read its current state.
This follows the defensive checks added to the corresponding e1000
helpers.
MFC after: 2 weeks
igc: Avoid a signed shift while assembling the PHY ID
The PHY identifier word is promoted to signed int when the cast is
applied after the shift. Cast the 16-bit register value first so
identifiers with their high bit set are assembled as unsigned data.
MFC after: 2 weeks
igc: Export EEE Low Power Idle counters
The driver already accumulates the clear-on-read transmit and receive
LPI event counters. Expose the 64-bit totals under the per-device eee
sysctl node.
MFC after: 2 weeks
ixgbe: Avoid signed overflow in LED register masks
LED index three shifts the blink bit into bit 31. Convert the base to
the register width before shifting so the operation is unsigned.
This is the ixgbe counterpart of the e1000 correction imported from
DPDK commit 214cb0d7f1.
MFC after: 2 weeks
ixl: Avoid a signed PHY capability shift
The PHY capability display examines all 32 bits of the firmware bitmap.
Use an unsigned value so examining bit 31 does not shift a signed
integer into its sign bit.
MFC after: 2 weeks
e1000: Avoid a signed manageability VLAN bitmap shift
A manageability VLAN can select bit 31 of its VFTA register. Use an
unsigned value when constructing the register mask.
MFC after: 2 weeks
ixgbe: Use unsigned register bitmap shifts
VLAN, VMDq, and VF reset bit indices can reach 31. Use unsigned
values when constructing their 32-bit register masks so the shifts do
not operate on signed integers.
MFC after: 2 weeks
igc: Avoid a signed multicast bitmap shift
The multicast hash bit can be 31. Use an unsigned value so setting the
bit cannot shift a signed integer into its sign bit.
MFC after: 2 weeks
e1000: Avoid a signed multicast bitmap shift
The multicast hash bit can be 31. Use an unsigned value so setting the
bit cannot shift a signed integer into its sign bit.
MFC after: 2 weeks
igbv: Accept reset NACKs when no MAC is assigned
A reset NACK from a Linux PF means that the reset completed but no
permanent MAC address was assigned. Treat that response as a
successful reset with a zero permanent address so attach can generate
a local address instead of retrying a live mailbox.
FreeBSD PFs also use a one-dword reset NACK while retained queues are
being sanitized. Seed the otherwise unused request payload and accept
only the three-dword, zero-filled NACK used by Linux, preserving the
FreeBSD retry contract.
MFC after: 2 weeks
igc: fix MAC address hash bit shift
DPDK commit message
net/e1000/base: fix MAC address hash bit shift
In e1000_hash_mc_addr_generic() the expression:
"mc_addr[4] >> 8 - bit_shift", right shifting "mc_addr[4]"
shift by more than 7 bits always yields zero, so hash becomes not so
different. Add initialization with bit_shift = 1, and add a loop
condition to ensure bit_shift will be always in [1..8] range.
Fixes: af75078fece3 ("first public release")
Cc: stable at dpdk.org
Signed-off-by: Aleksandr Loktionov <aleksandr.loktionov at intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov at intel.com>
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igc: fix iterator type
DPDK commit message
net/e1000/base: fix iterator type
Fix static analysis warning about comparison between types of
incompatible width, which might lead to an infinite loop due to
overflow.
Fixes: af75078fece3 ("first public release")
Cc: stable at dpdk.org
Signed-off-by: Amir Avivi <amir.avivi at intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov at intel.com>
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
Obtained from: DPDK (3d36053991)
MFC after: 2 weeks
e1000: fix data type in MAC hash
DPDK commit message
net/e1000/base: fix data type in MAC hash
One of the bit shifts in MAC hash calculation triggers a static analysis
warning about a potential overflow. Fix the data type to avoid this.
Fixes: af75078fece3 ("first public release")
Cc: stable at dpdk.org
Signed-off-by: Barbara Skobiej <barbara.skobiej at intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov at intel.com>
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
Obtained from: DPDK (458734aaac)
MFC after: 2 weeks
ixgbe: Avoid a signed multicast bitmap shift
The multicast vector bit can be 31. Use an unsigned value so setting
the bit cannot shift a signed integer into its sign bit.
MFC after: 2 weeks
