LLVM/project ab76ccellvm/test/CodeGen/AMDGPU mad-mix-fptrunc-rounding-bf16.ll mad-mix-fptrunc-rounding.ll

[NFC][AMDGPU] Add tests for fptrunc folded into V_MAD/FMA_MIX (#219723)

V_MAD/FMA_MIX{LO,HI} compute the multiply or multiply-add in f32, round
that to f32, and then convert the f32 result to the 16-bit destination.
That is the same pair of roundings the IR performs, so the instructions
are a bit-exact match for an fptrunc of an f32 multiply or multiply-add
and need no contract flag.

The tests pin that across gfx803, gfx900, gfx906, gfx90a and gfx1100
with +real-true16 for f16, and gfx1250 in both true16 modes for bf16.
Where a shape appears both unflagged and with contract, the two must
select the same instructions.

Assisted-By: Claude Code Opus 5
DeltaFile
+840-0llvm/test/CodeGen/AMDGPU/mad-mix-fptrunc-rounding.ll
+252-0llvm/test/CodeGen/AMDGPU/mad-mix-fptrunc-rounding-bf16.ll
+1,092-02 files

Dreckly/dreckly 6b365bfwww/palemoon Makefile.common PLIST, www/palemoon/patches patch-platform_js_src_jsprf.cpp

palemoon: Update to 35.0.0
DeltaFile
+21-0www/palemoon/patches/patch-platform_js_src_jsprf.cpp
+10-9www/palemoon/distinfo
+14-2www/palemoon/PLIST
+2-2www/palemoon/Makefile.common
+47-134 files

LLVM/project ca8993bllvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU memory-legalizer-global-lastuse.ll global-saddr-narrow-offset.ll

[AMDGPU] Narrow provably-I32 address offsets

Add a `tryNarrowToI32()` function that uses KnowsBits to detect 64-bit
offests that could be in a 32-bit register, allowing us to match
base + offset cases that don't involve literal base + (ext offset)
nodes.

Apply this to global_* instructions and the scalar memory instructions
that take a scalar offset.

This does leave a few dead copies when we have to bail out of the SMEM
handling for creatining a negative offset, but those don't have
end-to-end effect and it looks like you could already get dead MOVs
from that codepath.

AI disclosure: Claude wrote the code, I looked at it.
DeltaFile
+212-356llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
+124-226llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
+39-111llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
+34-59llvm/test/CodeGen/AMDGPU/global-saddr-narrow-offset.ll
+24-42llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
+30-18llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+463-81210 files not shown
+551-93416 files

LLVM/project 64dd6acllvm/lib/Target/AMDGPU AMDGPU.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

[AMDGPU] Add getLDSAllocGranule to TargetParser

Model LDS allocation granularity with subtarget features derived from
AMDGPUGenericAnyFeature. Generic targets can select a granularity present
on any covered GPU, independently of their addressable LDS size.

Expose the byte-valued query for GPUKind and subarch and consolidate
backend users on it. gfx9-4-generic uses gfx950's 1280-byte granule while
retaining its 64 KiB addressable LDS capacity.

Test feature membership, granularity assignments, query overloads and
fallbacks, and generic-target LDS block rounding.

Change-Id: Ic0c9345e7657ec3c6978a646628598cb7608b390
DeltaFile
+66-0llvm/unittests/TargetParser/TargetParserTest.cpp
+42-0llvm/test/TableGen/AMDGPUTargetDefLDSAllocGranularity.td
+34-1llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+33-0llvm/test/CodeGen/AMDGPU/lds-size-gfx9-4-generic.ll
+23-3llvm/lib/Target/AMDGPU/AMDGPU.td
+0-14llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+198-186 files not shown
+226-3012 files

LLVM/project 1680496llvm/lib/Target/AMDGPU AMDGPUFeatures.td AMDGPU.td, llvm/test/TableGen AMDGPUTargetDefGenericClassification.td

[AMDGPU] Classify generic-target features (#223179)

Classify features used by generic targets but absent from some covered
GPUs as AMDGPUGenericAnyFeature. This covers the gfx11 workarounds,
gfx12.5 register fixup and WMMA timing, and LDS size and bank count.

Derive the classified features directly from the SubtargetFeature
subclass and preserve their existing predicates. Keep RequiresCOV6 
outside this policy because it is specific to generic targets and 
absent from their covered GPUs.

Test the real target definitions, missing support for classified
features, and the existing all-member requirement for instruction
capabilities.
DeltaFile
+71-0llvm/test/TableGen/AMDGPUTargetDefGenericClassification.td
+37-9llvm/lib/Target/AMDGPU/AMDGPU.td
+3-3llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
+0-2llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+111-144 files

FreeBSD/ports ce62c97net-mgmt/unifi10 Makefile distinfo

net-mgmt/unifi10: Update to 10.6.106

Release notes: https://community.ui.com/releases/r/network/10.6.106
DeltaFile
+5-5net-mgmt/unifi10/distinfo
+1-1net-mgmt/unifi10/Makefile
+6-62 files

FreeBSD/ports 2330345textproc/py-regex Makefile distinfo

textproc/py-regex: Update to 2026.9.10

PR:             298652
Approved by:    fax at nohik.ee (maintainer)
DeltaFile
+3-3textproc/py-regex/distinfo
+1-1textproc/py-regex/Makefile
+4-42 files

LLVM/project 2e820f3.ci all_requirements.txt, clang/test/CodeGen builtin-clear-padding-codegen.c

Rebase, minor improvements/fixes

Created using spr 1.3.7
DeltaFile
+4,402-1,088clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
+2,801-612clang/test/CodeGen/builtin-clear-padding-codegen.c
+602-459.ci/all_requirements.txt
+505-536llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
+478-308llvm/utils/git/requirements_linting.txt
+383-393llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+9,171-3,3962,263 files not shown
+59,531-19,5182,269 files

Linux/linux 17e7b8efs/smb/client misc.c smb2pdu.c

Merge tag 'cifs-fixes-7.3-rc4' of https://git.manguebit.org/linux

Pull smb client fixes from Paulo Alcantara:
 "A batch of bug fixes for the smb client:

   - Fix multiple out-of-bounds reads and use-after-frees in the SMB2/3
     receive path that are reachable from a malicious or compromised
     server: a stale next_buffer pointer and an integer overflow in
     compound encrypted frame handling, missing minimum-PDU-size and
     per-sub-PDU length validation before parsing command-specific
     response fields, missing bounds checks in DFS referral, server
     interface list, EA list, POSIX SID, snapshot enumeration and SMB1
     reparse point parsing

   - Fix use-after-frees and races in multichannel and connection
     teardown, including an interface freed while still in use when
     adding channels, a server used after its channel reference was
     dropped, a reconnect work item left queued after the server is
     freed and an uninitialized reconnect list node

    [38 lines not shown]
DeltaFile
+63-41fs/smb/client/sess.c
+41-28fs/smb/client/smb2misc.c
+36-22fs/smb/client/reparse.c
+38-13fs/smb/client/smb2ops.c
+7-6fs/smb/client/smb2pdu.c
+10-2fs/smb/client/misc.c
+195-1126 files not shown
+223-11812 files

LLVM/project 17d5404llvm/test/CodeGen/AMDGPU smrd-narrow-soffset.ll global-saddr-narrow-offset.ll

[AMDGPU] Pre-commit tests for narrowing offsets in address matching

When trying to match either SADDR+VADDR global_* or the s_load_* that
takes a 32-bit offset, we don't check for cases where a 64-bit value
is trivially truncatable to 32 bits. Add tests for these cases.

AI disclosure: Claude wrote these tests
DeltaFile
+564-0llvm/test/CodeGen/AMDGPU/global-saddr-narrow-offset.ll
+411-0llvm/test/CodeGen/AMDGPU/smrd-narrow-soffset.ll
+975-02 files

LLVM/project c620f1cclang/include/clang/CIR/Dialect/IR CIRAttrs.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

[CIR] Restore the CIR memory effects attribute, without the printer

Assisted-by: Cursor / claude-opus-5
DeltaFile
+77-0clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+33-19clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+48-0clang/test/CIR/IR/invalid-effect-attrs.cir
+36-7clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+0-21clang/test/CIR/IR/invalid-func-effect-attrs.cir
+10-10clang/test/CIR/IR/call.cir
+204-5716 files not shown
+250-11422 files

OPNSense/tools d07e130. README.md

README: update
DeltaFile
+6-5README.md
+6-51 files

LLVM/project 7ca2e7blibcxx/include cmath, libcxx/include/__math exponential_functions.h

[libc++] Make std::exp constexpr for float and double since C++23

Now that __builtin_exp and __builtin_expf are constant-evaluable in
clang (#199808), mark libc++'s float, double, and integral-promoting
overloads of __math::exp as _LIBCPP_CONSTEXPR_SINCE_CXX23. The long
double overload stays non-constexpr because __builtin_expl is not
constant-evaluable yet.

Add constexpr coverage for std::exp and std::expf to the clang-specific
constexpr <cmath> test.

Co-Authored-By: Claude Fable 5.1 <noreply at anthropic.com>
DeltaFile
+38-0libcxx/test/libcxx/numerics/c.math/constexpr-cxx26-clang.pass.cpp
+30-0libcxx/test/libcxx/numerics/c.math/constexpr-cxx26-gcc.pass.cpp
+12-3libcxx/include/__math/exponential_functions.h
+4-2libcxx/include/cmath
+84-54 files

FreeBSD/ports 0a3ec18math/suitesparse bsd.suitesparse.mk Makefile, math/suitesparse-graphblas Makefile

math/suitesparse: upgrade GraphBLAS to 10.5.1

This bumps SuiteSparse to v7.14.1.
Release notes at
        https://github.com/DrTimothyAldenDavis/SuiteSparse/releases/tag/v7.14.1
DeltaFile
+3-3math/suitesparse/distinfo
+1-1math/suitesparse/bsd.suitesparse.mk
+1-1math/suitesparse/Makefile
+1-1math/suitesparse-graphblas/Makefile
+6-64 files

FreeBSD/ports 6f92774lang/lfortran Makefile distinfo

lang/lfortran: upgrade to v0.66.0

Release notes at
        https://github.com/lfortran/lfortran/releases/tag/v0.66.0
DeltaFile
+3-3lang/lfortran/distinfo
+2-2lang/lfortran/Makefile
+5-52 files

FreeBSD/ports 26ccb54math/planarity pkg-plist Makefile

math/planarity: upgrade to 5.1.0.0

Release notes at
        https://github.com/graph-algorithms/edge-addition-planarity-suite/releases/tag/Version_5.1.0.0
DeltaFile
+3-3math/planarity/distinfo
+1-1math/planarity/pkg-plist
+1-1math/planarity/Makefile
+5-53 files

LLVM/project 660dbc9llvm/lib/Target/AVR AVRISelLowering.h AVRFrameLowering.cpp, llvm/test/CodeGen/AVR frameaddress.ll returnaddress.ll

[AVR] Implement selection of 'ISD::RETURNADDR' and 'ISD::FRAMEADDR' (#222909)
DeltaFile
+131-0llvm/test/CodeGen/AVR/returnaddress.ll
+89-0llvm/lib/Target/AVR/AVRISelLowering.cpp
+74-0llvm/test/CodeGen/AVR/frameaddress.ll
+9-2llvm/lib/Target/AVR/AVRFrameLowering.cpp
+2-0llvm/lib/Target/AVR/AVRISelLowering.h
+305-25 files

OpenBSD/ports A8M5wH2devel/p5-Params-Coerce Makefile

   Fix extract permissions.  Update dependencies.
VersionDeltaFile
1.13+13-8devel/p5-Params-Coerce/Makefile
+13-81 files

Linux/linux 925724cdrivers/scsi scsi.c, drivers/scsi/fnic fnic.h fnic_isr.c

Merge tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull SCSI fixes from James Bottomley:
 "Four driver fixes, three of which are minor and one of which (fnic)
  tries to add some logic to try to avoid MSI-X being ineffective if
  hyperthreading is disabled.

  The core fix adds validation to mode sense buffer sizes because it is
  used by ATA and could, theoretically, be exploited by a specially
  crafted USB device that can simply be plugged in to any laptop or
  server"

* tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi:
  scsi: core: Validate MODE SENSE lengths in scsi_cdl_enable()
  scsi: fnic: Fix missed link-up when critical IRQ targets offline CPU
  scsi: ibmvfc: Add Kconfig dependency to fix link failure when NVME_FC=m
  scsi: qla2xxx: Fix the ql2xfc2target parameter description
  scsi: pm80xx: Fix the use_msix, use_tasklet and read_wwn parameter descriptions
DeltaFile
+40-1drivers/scsi/fnic/fnic_main.c
+19-5drivers/scsi/scsi.c
+10-3drivers/scsi/fnic/fnic_isr.c
+3-3drivers/scsi/pm8001/pm8001_init.c
+1-1drivers/scsi/qla2xxx/qla_os.c
+1-1drivers/scsi/fnic/fnic.h
+74-141 files not shown
+75-147 files

LLVM/project 7f8fa53clang/test/OpenMP declare_variant_scoring.c, flang/test/Lower/OpenMP variant-scoring-any-sections.f90 declare-variant-construct.f90

[clang][flang][OpenMP] Fix context selector matching and scoring

Incorrect context selector matching and scoring can select the wrong
variant function or metadirective replacement.

Compute device-selector weights from the enclosing construct-context
depth. For example, inside a `parallel` region:

| Selector                 | Before | After |
| ------------------------ | ------ | ----- |
| `device={kind(cpu)}`     | 2      | 3     |
| `construct={parallel}`   | 2      | 2     |

Previously, the incorrect tie allowed candidate order to determine the
winner. The device selector now receives the higher score.

Track enclosing constructs even when they have no corresponding selector
property. Stop at and include the innermost `target`, or retain the full
enclosing context when there is no `target`. Exclude `section` separators:

    [43 lines not shown]
DeltaFile
+492-1llvm/unittests/Frontend/OpenMPContextTest.cpp
+172-136llvm/lib/Frontend/OpenMP/OMPContext.cpp
+155-78flang/test/Lower/OpenMP/metadirective-user.f90
+206-0clang/test/OpenMP/declare_variant_scoring.c
+167-2flang/test/Lower/OpenMP/declare-variant-construct.f90
+81-0flang/test/Lower/OpenMP/variant-scoring-any-sections.f90
+1,273-21712 files not shown
+1,682-28718 files

LLVM/project a6d5d3fllvm/lib/Transforms/Vectorize VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize/AArch64 sve-gather-scatter.ll force-target-instruction-cost.ll

[VPlan] Remove dead per-lane loop from VPScalarIVStepsRecipe::execute. (#224399)

replicateByVF already materializes every lane of a VPScalarIVStepsRecipe
as its own single-scalar clone, folding the lane offset into the clone's
start index (addLaneToStartIndex).

During execute, each VPScalarIVStepsRecipe has exactly its single lane
used.

Replace it with the lane-0 body and an assert. Note that this removes a
few redundant add start, 0.

PR: https://github.com/llvm/llvm-project/pull/224399
DeltaFile
+9-24llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+9-18llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
+6-12llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
+5-10llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+1-2llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
+1-2llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+31-683 files not shown
+34-749 files

LLVM/project 9d0677bllvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU memory-legalizer-global-lastuse.ll global-saddr-narrow-offset.ll

[AMDGPU] Narrow provably-I32 address offsets

Add a `tryNarrowToI32()` function that uses KnowsBits to detect 64-bit
offests that could be in a 32-bit register, allowing us to match
base + offset cases that don't involve literal base + (ext offset)
nodes.

Apply this to global_* instructions and the scalar memory instructions
that take a scalar offset.

This does leave a few dead copies when we have to bail out of the SMEM
handling for creatining a negative offset, but those don't have
end-to-end effect and it looks like you could already get dead MOVs
from that codepath.

AI disclosure: Claude wrote the code, I looked at it.
DeltaFile
+212-356llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
+124-226llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
+39-111llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll
+34-59llvm/test/CodeGen/AMDGPU/global-saddr-narrow-offset.ll
+24-42llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
+30-18llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+463-81210 files not shown
+551-93416 files

LLVM/project 4079d96llvm/test/CodeGen/AMDGPU smrd-narrow-soffset.ll global-saddr-narrow-offset.ll

[AMDGPU] Pre-commit tests for narrowing offsets in address matching

When trying to match either SADDR+VADDR global_* or the s_load_* that
takes a 32-bit offset, we don't check for cases where a 64-bit value
is trivially truncatable to 32 bits. Add tests for these cases.

AI disclosure: Claude wrote these tests
DeltaFile
+564-0llvm/test/CodeGen/AMDGPU/global-saddr-narrow-offset.ll
+411-0llvm/test/CodeGen/AMDGPU/smrd-narrow-soffset.ll
+975-02 files

NetBSD/pkgsrc Nu5GHHAdoc CHANGES-2026

   doc: Updated www/resterm to 1.8.2
VersionDeltaFile
1.6144+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc rw6nrrOwww/resterm go-modules.mk Makefile

   resterm: Update to 1.8.2

   You can now choose which requests get recorded, exported requests and mocks are
   named after their method and path instead of a number,, and the recorder
   is visible in the header and status bar.

   Skip and only filters
   Exports named from the request
   Recorder in the header and status bar
VersionDeltaFile
1.46+3-3www/resterm/distinfo
1.52+1-1www/resterm/Makefile
1.37+0-0www/resterm/go-modules.mk
+4-43 files

LLVM/project 25e00ffclang/include/clang/AST DeclBase.h, clang/lib/AST DeclBase.cpp

[Clang] Move DeclContext::getEnclosingFunction/castEnclosingFunction out of line (#224711)

In DeclBase.h, clang::FunctionDecl is only forward-declared. Commit
c9074cfd0d95 defined getEnclosingFunction() and castEnclosingFunction()
inline in DeclBase.h, which instantiates dyn_cast<FunctionDecl> and
cast<FunctionDecl> on an incomplete type when DeclBase.h is compiled
standalone (e.g. with -fmodules / header units).

Move the non-const definitions to DeclBase.cpp where FunctionDecl is
complete, and delegate the const overloads via const_cast, matching
getOuterLexicalRecordContext() and
getEnclosingNonExpansionStatementContext().

Change prepared by Jetski and reviewed by me.
DeltaFile
+4-10clang/include/clang/AST/DeclBase.h
+8-0clang/lib/AST/DeclBase.cpp
+12-102 files

NetBSD/src rWVckttusr.sbin/npf/npfctl npfctl.8

   PR kern/60738

   Man for npfctl stats reset
VersionDeltaFile
1.26+6-4usr.sbin/npf/npfctl/npfctl.8
+6-41 files

LLVM/project ec0f535.ci all_requirements.txt, clang/test/CodeGen builtin-clear-padding-codegen.c

Rebase, minor improvements

Created using spr 1.3.7
DeltaFile
+4,402-1,088clang/test/CodeGenCXX/builtin-clear-padding-codegen.cpp
+2,801-612clang/test/CodeGen/builtin-clear-padding-codegen.c
+602-459.ci/all_requirements.txt
+505-536llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
+848-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+815-0llvm/test/Transforms/PhaseOrdering/ARM/arm_mat_mult_q31.ll
+9,973-2,6952,616 files not shown
+72,019-22,8982,622 files

LLVM/project 551af79libcxx/include/__memory pstl.h, libcxx/include/__pstl/cpu_algos uninitialized_algorithms.h

[libc++][pstl] Implementation of parallel std::uninitialized_(copy|move)(_n) based on parallel __for_each (#223229)

This PR adds an implementation of parallel versions of
`std::uninitialized_copy`, `std::uninitialized_copy_n`,
`std::uninitialized_move` and `std::uninitialized_move_n`.

Implementations are mostly one-liners under the hood, but require
dealing with iterator ranges, hence `std::uninitialized_copy` and
`std::uninitialized_move` are implemented in `cpu_algos`.
`std::uninitialized_copy_n` and `std::uninitialized_move_n` are
implemented in the `default` backend.

Fixes #103640
Fixes #134592
Fixes #134593
Part of #99938
DeltaFile
+152-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/pstl.uninitialized_move_n.pass.cpp
+149-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/pstl.uninitialized_move.pass.cpp
+145-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/pstl.uninitialized_copy_n.pass.cpp
+144-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.copy/pstl.uninitialized_copy.pass.cpp
+97-0libcxx/include/__pstl/cpu_algos/uninitialized_algorithms.h
+61-0libcxx/include/__memory/pstl.h
+748-012 files not shown
+932-218 files

FreeBSD/ports 514d2b2textproc/harper Makefile Makefile.crates

textproc/harper: Update to 2.11.0
DeltaFile
+675-723textproc/harper/distinfo
+336-360textproc/harper/Makefile.crates
+1-2textproc/harper/Makefile
+1,012-1,0853 files