LLVM/project b1c24eallvm/lib/Target/Mips MipsSEISelLowering.cpp, llvm/test/CodeGen/Mips/msa buildvector-undef-loop.ll

[Mips] Legalize vector UNDEF instead of expanding to zero BUILD_VECTOR (#211503)

Currently, MIPS MSA expands ISD::UNDEF into a BUILD_VECTOR of all zeros
during legalization. This creates an infinite loop in DAGCombiner when
the following occurs:
1.Mips lower BUILD_VECTOR expands non-splat vectors into
INSERT_VECTOR_ELT with creating undef node
2.Then legalization expands UNDEF back to BUILD_VECTOR zero 
3.Mips lower BUILD_VECTOR converts zero vector to BITCAST 
4.DAGCombiner optimizes BITCAST(zero) to UNDEF
5.Back to step 2, infinite loop

Fix #210229.
DeltaFile
+37-0llvm/test/CodeGen/Mips/msa/buildvector-undef-loop.ll
+1-0llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+38-02 files

LLVM/project fe2500cllvm/unittests/CodeGen/GlobalISel CMakeLists.txt, llvm/utils/gn/secondary/llvm/unittests/CodeGen/GlobalISel BUILD.gn

[GISel] Fix link error when dylib is enabled

This is to fix link error caused by e21cfc08414e.
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/unittests/CodeGen/GlobalISel/BUILD.gn
+1-0llvm/unittests/CodeGen/GlobalISel/CMakeLists.txt
+2-02 files

LLVM/project a97f512llvm/lib/Target/Mips MipsInstrInfo.cpp

[Mips] Fix getInstSizeInBytes for instructions with delay slots (#216665)

MIPS branch/jump instructions (B, BEQ, JALR64Pseudo, PseudoReturn64,
etc.) have a delay slot. The actual encoded size is 8 bytes (instr +
NOP). This fixes "out of range PC16 fixup" errors on large functions.

This issue was exposed in llvm 23 by commit pr #191460 which changed
MipsBranchExpansion to use MBB::iterator instead of instr_iterator,
making the MBB size calculation more accurate and revealing the
pre-existing bug.

Thanks for the pr #187703 `AllowOverEstimate` to help find instr which
actual size mismatch expected size .

Fix #112010.
DeltaFile
+4-0llvm/lib/Target/Mips/MipsInstrInfo.cpp
+4-01 files

LLVM/project 85651c2bolt/lib/Core BinaryEmitter.cpp, bolt/test/runtime/X86 lsda-absolute-udata4.test

[BOLT] Fix overflow issue when using absolute addressing in LSDA (#216654)

Currently, in the emitLSDA() flow, signed data is used when using
absolute addresses to update the LSDA for non PIE/DSO. But when the PC
is higher than 0x7fffffff(2GB), this will be sign-extended into an
invalid 64-bit address. Especially when the output binary is large,
silent errors can easily occur (we have met this problem in real
scenarios).

So this patch changes the signed data to unsigned data, thereby fixing
the incorrect address extension like this:
```
.gcc_except_table
  LSDA:
    LPStartEncoding: DW_EH_PE_omit   // No LPStart
    CallSiteEncoding: DW_EH_PE_sdata4 -> udata4   // Changed from sdata4 to udata4
    call-site table:
      call-site 1:
        start = ...

    [4 lines not shown]
DeltaFile
+18-0bolt/test/runtime/X86/lsda-absolute-udata4.test
+1-1bolt/lib/Core/BinaryEmitter.cpp
+19-12 files

LLVM/project 8d59b0bclang/include/clang/Basic BuiltinsAMDGPUDocs.td BuiltinsAMDGPU.td, clang/test/CodeGenCXX dynamic-cast-address-space.cpp

[NFC][AMDGPU] Introduce a new target feature for N=16 WMMAs
DeltaFile
+30-28llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+28-28clang/include/clang/Basic/BuiltinsAMDGPU.td
+20-0clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
+10-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+7-1llvm/lib/Target/AMDGPU/AMDGPU.td
+2-2clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
+97-642 files not shown
+99-668 files

LLVM/project 2e81e9fclang/include/clang/Basic BuiltinsAMDGPUDocs.td BuiltinsAMDGPU.td, clang/test/CodeGenCXX dynamic-cast-address-space.cpp

[NFC][AMDGPU] Introduce a new target feature for N=16 WMMAs
DeltaFile
+30-28llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+28-28clang/include/clang/Basic/BuiltinsAMDGPU.td
+20-0clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
+10-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+7-1llvm/lib/Target/AMDGPU/AMDGPU.td
+2-2clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
+97-642 files not shown
+99-668 files

NetBSD/pkgsrc Ea8IP8Idoc CHANGES-pkgsrc-2026Q2

   doc: Include more pullups
VersionDeltaFile
1.1.2.13+67-1doc/CHANGES-pkgsrc-2026Q2
+67-11 files

LLVM/project 72988dellvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-amdgcn.ptr.s.buffer.load.ll regbankselect-mui-salu-float.mir

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+17-17llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ptr.s.buffer.load.ll
+36-36375 files not shown
+495-495381 files

LLVM/project 2b1f2eallvm/include/llvm/CodeGen MachineBasicBlock.h, llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+17-17llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+10-6llvm/include/llvm/CodeGen/MachineBasicBlock.h
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+43-39376 files not shown
+505-501382 files

NetBSD/pkgsrc sk6b292doc CHANGES-pkgsrc-2026Q2

   doc: process some pullups
VersionDeltaFile
1.1.2.12+37-1doc/CHANGES-pkgsrc-2026Q2
+37-11 files

NetBSD/pkgsrc fW0s2nWwww/php-ja-wordpress Makefile distinfo

   Pullup ticket #7236 - requested by taca
   www/php-ja-wordpress: Security fix

   Revisions pulled up:
   - www/php-ja-wordpress/Makefile                                 1.34-1.36
   - www/php-ja-wordpress/PLIST                                    1.20
   - www/php-ja-wordpress/distinfo                                 1.31-1.33

   ---
      Module Name:      pkgsrc
      Committed By:     taca
      Date:             Wed Aug 12 15:18:27 UTC 2026

      Modified Files:
        pkgsrc/www/php-ja-wordpress: Makefile PLIST distinfo

      Log Message:
      www/php-ja-wordpress: update to 7.0.3


    [89 lines not shown]
VersionDeltaFile
1.19.4.1+659-55www/php-ja-wordpress/PLIST
1.29.4.2+3-3www/php-ja-wordpress/distinfo
1.32.4.2+3-2www/php-ja-wordpress/Makefile
+665-603 files

NetBSD/pkgsrc rMyk7Bcmail/roundcube Makefile.common PLIST, mail/roundcube-plugin-password distinfo

   Pullup ticket #7229 - requested by taca
   mail/roundcube: Security fix
   mail/roundcube-plugin-password: Security fix

   Revisions pulled up:
   - mail/roundcube-plugin-password/Makefile                       1.29
   - mail/roundcube-plugin-password/distinfo                       1.48
   - mail/roundcube/Makefile                                       1.105
   - mail/roundcube/Makefile.common                                1.46
   - mail/roundcube/PLIST                                          1.62
   - mail/roundcube/distinfo                                       1.103

   ---
      Module Name:      pkgsrc
      Committed By:     taca
      Date:             Tue Aug 11 15:21:53 UTC 2026

      Modified Files:
        pkgsrc/mail/roundcube: Makefile Makefile.common PLIST distinfo

    [28 lines not shown]
VersionDeltaFile
1.101.2.2+4-4mail/roundcube/distinfo
1.46.2.2+4-4mail/roundcube-plugin-password/distinfo
1.104.2.1+4-2mail/roundcube/Makefile
1.60.2.2+3-2mail/roundcube/PLIST
1.44.2.2+2-2mail/roundcube/Makefile.common
+17-145 files

LLVM/project 1c794fbllvm/test/Analysis/CostModel/RISCV arith-fp.ll int-bit-manip.ll, llvm/test/Transforms/VectorCombine/RISCV vpintrin-scalarization.ll

[IR] Autoupgrade trivial VP intrinsics to their non-VP counterparts (#212490)

As a first step towards removing trivial VP intrinsics, autoupgrade them
to their non-VP counterparts for backwards compatibility. Subsequent PRs
can then remove the intrinsics themselves.

Since trivial VP intrinsics only set lanes to poison, it's safe to
replace them with non predicated versions.

RFC: https://discourse.llvm.org/t/rfc-remove-trivial-vp-intrinsics/90972
DeltaFile
+0-1,763llvm/test/Analysis/CostModel/RISCV/cast.ll
+250-545llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
+370-416llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
+308-308llvm/test/Analysis/CostModel/RISCV/fround.ll
+310-167llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
+0-470llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
+1,238-3,66946 files not shown
+2,127-4,67752 files

NetBSD/pkgsrc RM15oNVlang/php compat.mk compat.mk

   Pullup ticket #7239 - requested by taca
   lang/php: New mk file to ease pull-ups to PHP packages

   Revisions pulled up:
   - lang/php/compat.mk                                            1.1-1.3

   ---
      Module Name:      pkgsrc
      Committed By:     taca
      Date:             Thu Jul 30 16:15:31 UTC 2026

      Added Files:
        pkgsrc/lang/php: compat.mk

      Log Message:
      lang/php: introduce compat.mk

      php/compat.mk is more generic version of php/json.mk.


    [32 lines not shown]
VersionDeltaFile
1.5.2.1+0-56lang/php/compat.mk
1.5.2.2+54-0lang/php/compat.mk
+54-562 files

LLVM/project 1c66392llvm/utils/gn/secondary/llvm/lib/Analysis BUILD.gn

[gn build] Port e21cfc08414e (#217503)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
+1-01 files

LLVM/project c68e793clang/lib/CIR/CodeGen CIRGenCXX.cpp CIRGenFunction.h, clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

[CIR] Destroy a static local's extended temporary in its cir.local_init (#216210)

A temporary lifetime-extended by a function-local static had its
destructor hung off the cir.global, which the verifier rejects: a static
local is initialized and destroyed in-function under its guard, via
cir.local_init. Thread the region emitCXXSpecialVarDeclInit already
picks down to pushTemporaryCleanup, which registers into it in reverse
construction order.

Fixes SPEC2026: yaml-cpp's IsValidPlainScalar (736.ocio_r,
772/872.marian).
DeltaFile
+106-0clang/test/CIR/CodeGen/static-local-guard-abort.cpp
+84-0clang/test/CIR/CodeGen/local-static-temp-dtor.cpp
+44-8clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+16-15clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+8-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+5-0clang/lib/CIR/CodeGen/CIRGenCXX.cpp
+263-231 files not shown
+263-247 files

NetBSD/pkgsrc HtP1kQDlang/php compat.mk

   php/compat.mk: wording and style fixes in comments
VersionDeltaFile
1.5+3-3lang/php/compat.mk
+3-31 files

OpenZFS/src 03b02ebconfig zfs-meta.m4 deb.am

build: Fix debian package version omitting git commit for git builds

When building debian packages the git commit tag gets stripped off.
The immediate cause is from commit 1a33036df ("Add --bump=0 to alien").
According to the commit message, this was done to preserve the release
field, which "--bump=0" does not do. It correctly notes that '_' is an
invalid character for debian version strings.

Instead use '.' as a separator in the release instead of '_'. This is
valid for both DEB and RPM packages.

Replace "--bump=0" with "-k" to keep the release string from the RPM
unmodified when using it to form the DEB version.

Fixes: 1a33036df ("Add --bump=0 to alien")
Fixes: f6fb7651a ("Use 'git describe' for working builds")

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Glenn Washburn <development at efficientek.com>
Closes #18938
DeltaFile
+3-3config/deb.am
+2-2config/zfs-meta.m4
+5-52 files

FreeBSD/ports bfb155fcomms Makefile, comms/mbpoll distinfo pkg-descr

comms/mbpoll: New port

mbpoll is a command line utility to communicate with ModBus slave
(RTU or TCP).

mbpoll can:

    read discrete inputs
    read and write binary outputs (coil)
    read input registers
    read and write output registers (holding register)

The reading and writing registers may be in decimal, hexadecimal or
floating single precision.
DeltaFile
+24-0comms/mbpoll/Makefile
+11-0comms/mbpoll/pkg-descr
+3-0comms/mbpoll/distinfo
+1-0comms/Makefile
+39-04 files

LLVM/project 002905dllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 split-node-reused-in-later-vector.ll copyable-extractelement-in-stores.ll

[SLP]Add extractelement as a main opcode for copyables

Model a bundle of extractelements from a common vector plus a foreign scalar
as a copyable node: matching lanes reuse the source vector and copyable lanes
are inserted into it. Limited to the identity extract order without a reuse
shuffle, other cases fall back to gather.

Fixes #192849

Reviewers: RKSimon, bababuck

Pull Request: https://github.com/llvm/llvm-project/pull/216503
DeltaFile
+94-21llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+22-15llvm/test/Transforms/SLPVectorizer/X86/same-values-sub-node-with-poisons.ll
+11-9llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-and-reordered-operand.ll
+2-16llvm/test/Transforms/SLPVectorizer/X86/copyable-extractelement-in-stores.ll
+9-9llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
+6-8llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-in-later-vector.ll
+144-786 files not shown
+162-10012 files

LLVM/project 9033be2llvm/include/llvm/Analysis LibcallLoweringInfo.h, llvm/include/llvm/CodeGen LibcallLoweringInfo.h

Revert "Analysis: Move LibcallLoweringInfo from CodeGen to Analysis (#210322)"

This reverts commit e21cfc08414e861e45ac9cd3383a30a39d26d869.
DeltaFile
+0-160llvm/include/llvm/Analysis/LibcallLoweringInfo.h
+114-13llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
+35-23llvm/lib/CodeGen/LibcallLoweringInfo.cpp
+0-49llvm/lib/Analysis/LibcallLoweringInfo.cpp
+5-5llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
+5-5llvm/lib/Target/WebAssembly/WebAssemblyMemIntrinsicResults.cpp
+159-25515 files not shown
+173-27621 files

HardenedBSD/src ddaa875usr.bin/login motd.template

Merge remote-tracking branch 'rad/patches/465c44b6b392ef58cdce8f22af67b155750267c0' into hardened/current/master
DeltaFile
+2-2usr.bin/login/motd.template
+2-21 files

HardenedBSD/ports 9b34923archivers/unrar Makefile

HBSD: Resolve merge conflict

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
DeltaFile
+0-5archivers/unrar/Makefile
+0-51 files

HardenedBSD/ports bd91bb9databases/datafusion-cli Makefile.crates distinfo, net-im/deltachat-desktop/files/packagejsons pnpm-lock.yaml

Merge remote-tracking branch 'rad/freebsd/main' into hardenedbsd/main

Conflicts:
        archivers/unrar/Makefile (unresolved)
DeltaFile
+439-427net-im/deltachat-desktop/files/packagejsons/pnpm-lock.yaml
+349-341databases/datafusion-cli/distinfo
+237-231security/voa/distinfo
+202-202net/keycloak/pkg-plist
+174-170databases/datafusion-cli/Makefile.crates
+117-114security/voa/Makefile.crates
+1,518-1,4851,500 files not shown
+5,996-4,7361,506 files

FreeBSD/ports 4a25d73sysutils/rshim-user-space distinfo pkg-plist, sysutils/rshim-user-space/files patch-configure.ac patch-src_rshim__pcie.c

sysutils/rshim-user-space: Update 2.0.9 => 2.8.5

Changelogs (~100 new versions):
https://github.com/Mellanox/rshim-user-space/releases/tag/rshim-2.8.5

Commit log:
https://github.com/Mellanox/rshim-user-space/compare/rshim-2.0.9...rshim-2.8.5

- Switch to prepared by upstream tarball.
- Fix warnings from portclippy.
- Remove unnecessary GNU_CONFIGURE_MANPREFIX - it have deafult value.
- Refresh patch.

PR:             297658
Sponsored by:   UNIS Labs
Co-authored-by: rottlog <rottlogg at proton.me>
DeltaFile
+15-12sysutils/rshim-user-space/Makefile
+15-0sysutils/rshim-user-space/files/patch-src_rshim__pcie.c
+10-1sysutils/rshim-user-space/pkg-plist
+3-3sysutils/rshim-user-space/distinfo
+2-2sysutils/rshim-user-space/files/patch-configure.ac
+45-185 files

LLVM/project 4b88cd2llvm/lib/Target/AMDGPU SIFoldOperands.cpp, llvm/test/CodeGen/AMDGPU packed-u64.ll fold-imm-pk64.mir

[AMDGPU] Optimize SGPR splat reg sequences for packed 64-bit instructions (#217182)

This work optimizes SGPR register sequences for packed 64-bit instructions by eliminating
redundant register copies when a scalar value is splatted across multiple lanes.

The optimization is implemented in SIFoldOperands::tryFoldSGPRSplatRegSequence, which:
1. Detects SGPR register sequences where all elements are identical
2. Verifies all uses are packed 64-bit instructions supporting single
SGPR read
3. Replaces redundant elements with undef to allow copy elimination

This reduces SGPR register pressure and eliminates unnecessary copies in
kernels using packed operations with splat scalars.
DeltaFile
+94-0llvm/test/CodeGen/AMDGPU/fold-sgpr-splat-pk64.mir
+82-0llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+8-14llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+2-5llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
+1-1llvm/test/CodeGen/AMDGPU/fold-imm-pk64.mir
+0-1llvm/test/CodeGen/AMDGPU/packed-u64.ll
+187-216 files

FreeNAS/freenas 8073896

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files

LLVM/project f5e4be4llvm/include/llvm/CodeGen Passes.h, llvm/lib/CodeGen CFIInstrInserter.cpp

Add Legacy suffix go pass creation function.
DeltaFile
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+1-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+1-1llvm/lib/CodeGen/CFIInstrInserter.cpp
+1-1llvm/include/llvm/CodeGen/Passes.h
+4-44 files

FreeNAS/freenas 7c371b7src/middlewared/middlewared/plugins/container migrate.py, src/middlewared/middlewared/plugins/vm vm_lifecycle.py

NAS-142151 / 26.0.0-RC.1 / Resolve migrated USB devices by their vendor and product ids (#19494)

## Problem

A USB passthrough device is named after the port it is plugged into,
which is what 25.10 stored. The 26.0 pre-releases built the same shape
of name out of the bus and device number instead — an enumeration
counter the kernel reissues on every replug — so those stored values
name a port nobody chose.

The incus migration has the same preference the same way round: it
resolves a device by the bus and device number the manifest carries and
only falls back to the vendor and product ids when those are missing. It
picks the counter that gets reused over the identity that survives a
replug, and because it runs exactly once per machine and is never run
again, a wrong row it writes stays wrong. There is no second run, no
manifest retained afterwards, and no repair path.

This matters for a population that has not been hit yet:

    [33 lines not shown]
DeltaFile
+401-0src/middlewared/middlewared/pytest/unit/plugins/container/test_migrate_usb.py
+151-20src/middlewared/middlewared/plugins/container/migrate.py
+57-0src/middlewared/middlewared/pytest/unit/plugins/container/test_migrate_nic_mac.py
+0-40src/middlewared/middlewared/utils/usb.py
+28-4src/middlewared/middlewared/utils/libvirt/nic.py
+5-3src/middlewared/middlewared/plugins/vm/vm_lifecycle.py
+642-671 files not shown
+647-697 files

OpenZFS/src a5d6788cmd/zdb zdb.c, module/zfs spa.c

Allow pool import with corrupted spare/l2arc configs

That information should not be critical for read-only imports, and
imports with zfs_recover.  Let the import proceed by just dropping
those devices and trying to recover it with small space leak.

While there, allow zdb to report errors when dumping those objects.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Alexander Motin <alexander.motin at TrueNAS.com>
Closes #18937
DeltaFile
+36-16module/zfs/spa.c
+13-2cmd/zdb/zdb.c
+49-182 files