FreeBSD/ports dce595amail/missey Makefile

mail/missey: Deprecate and schedule for removal on March 31th.

I do not use it personally and the author can not be reached to.

PR:             ports/292561
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LLVM/project 0458162llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Disable Machine verifier at the end of default pipelines
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+4-8llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+3-6llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+0-3llvm/include/llvm/Passes/CodeGenPassBuilder.h
+7-173 files

LLVM/project 72b9ae5llvm/lib/Target/RISCV RISCVFoldMemOffset.cpp, llvm/test/CodeGen/RISCV fold-mem-offset-zilsd.ll

[RISCV] Add Zilsd to RISCVFoldMemOffset (#176544)

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+151-0llvm/test/CodeGen/RISCV/fold-mem-offset-zilsd.ll
+2-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+153-02 files

OpenBSD/ports NOd7W4gdatabases/mongodb/44 Makefile, databases/mongodb/44/patches patch-src_mongo_util_net_ssl_manager_openssl_cpp

   mongodb/44: add patch to deal with ASN1_STRING_data() removal

   Also add a mechanical conversion to prepare for opaque ASN1_STRING
VersionDeltaFile
1.1+62-0databases/mongodb/44/patches/patch-src_mongo_util_net_ssl_manager_openssl_cpp
1.31+1-1databases/mongodb/44/Makefile
+63-12 files

LLVM/project ff783aallvm/lib/Transforms/Scalar LoopStrengthReduce.cpp

[CodeGen][LSR][NPM] Make LoopStrengthReduce pass preserve LCSSA
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+4-0llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+4-01 files

LLVM/project 5572170llvm/lib/Target/AMDGPU SILowerControlFlow.cpp, llvm/test/CodeGen/AMDGPU si-lower-control-flow-preserve-dom-tree.mir

[AMDGPU] Fix DomTree preservation in SILowerControlFlow when nodes are deleted
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+59-0llvm/test/CodeGen/AMDGPU/si-lower-control-flow-preserve-dom-tree.mir
+5-0llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+64-02 files

LLVM/project 0e8e428llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Isolate CanonicalizeFreezeInLoopsPass into a different adaptor
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+4-4llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+4-4llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+6-1llvm/include/llvm/Passes/CodeGenPassBuilder.h
+14-93 files

LLVM/project 6efff59clang/lib/CodeGen CGClass.cpp CGExprCXX.cpp

[UBSAN] [NFC] resolve clang-format errors (#175716)

PR to resolve clang-format errors in the files:

- `clang/lib/CodeGen/CGExprAgg.cpp`
- `clang/lib/CodeGen/CGExprCXX.cpp`
- `clang/lib/CodeGen/CGClass.cpp`

Co-authored-by: vasu-ibm <Vasu.Sharma2 at ibm.com>
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+818-852clang/lib/CodeGen/CGClass.cpp
+235-258clang/lib/CodeGen/CGExprCXX.cpp
+82-97clang/lib/CodeGen/CGExprAgg.cpp
+1,135-1,2073 files

OpenBSD/ports i25wwIainfrastructure/bin update-cabal-port

   Add cabal port update tool

   Add update-cabal-port to help maintain cabal ports. The Perl script
   uses cabal database to fetch versions and generates cabal.inc files
   with dependency manifests.

   OK kn@
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1.1+170-0infrastructure/bin/update-cabal-port
+170-01 files

LLVM/project 10ceffbllvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Complete fast regalloc pipeline
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+38-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+10-1llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+48-12 files

LLVM/project a312567llvm/lib/CodeGen LiveIntervals.cpp

[CodeGen][NPM] dump slot index info with -debug while running LiveIntervals
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+4-2llvm/lib/CodeGen/LiveIntervals.cpp
+4-21 files

LLVM/project 97b4714llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Add "PhysicalRegisterUsageAnalysis" once
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+6-9llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+1-4llvm/include/llvm/Passes/CodeGenPassBuilder.h
+7-132 files

LLVM/project f2e1affllvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp

[AMDGPU][NPM] Obey "enable-amdgpu-aa" option
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+2-1llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+2-11 files

LLVM/project 01fe1c4llvm/lib/CodeGen BranchFolding.cpp BranchRelaxation.cpp, llvm/lib/Target/AMDGPU SIPreEmitPeephole.cpp

[CodeGen][NPM] Update dominator tree and post dominator tree consistently
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+11-2llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
+11-1llvm/lib/CodeGen/BranchFolding.cpp
+10-1llvm/lib/CodeGen/BranchRelaxation.cpp
+7-4llvm/lib/CodeGen/MachineBlockPlacement.cpp
+39-84 files

LLVM/project bfcbf5dllvm/lib/CodeGen BranchFolding.cpp MachineBlockPlacement.cpp, llvm/lib/Target/AMDGPU SIPreEmitPeephole.cpp

review comment
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+8-9llvm/lib/CodeGen/BranchFolding.cpp
+9-8llvm/lib/CodeGen/MachineBlockPlacement.cpp
+8-8llvm/lib/CodeGen/BranchRelaxation.cpp
+7-8llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
+32-334 files

LLVM/project 1ccfb97llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Enable "AMDGPURewriteAGPRCopyMFMAPass"
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+420-418llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+422-4182 files

FreeBSD/ports bbf5463textproc/television distinfo Makefile.crates

textproc/television: Update to 0.14.5

Changelogs:
https://github.com/alexpasmantier/television/releases/tag/0.14.4
https://github.com/alexpasmantier/television/releases/tag/0.14.5
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+157-71textproc/television/distinfo
+77-34textproc/television/Makefile.crates
+1-1textproc/television/Makefile
+235-1063 files

NetBSD/src r8CQ61jsys/dtb/arm/allwinner Makefile, sys/dtb/arm/amlogic Makefile

   Fix double vision.
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1.2+1-26sys/dtb/arm/allwinner/Makefile
1.2+1-18sys/dtb/arm/nxp/imx/Makefile
1.2+1-14sys/dtb/arm/broadcom/Makefile
1.2+2-12sys/dtb/arm/amlogic/Makefile
1.2+1-13sys/dtb/arm/ti/omap/Makefile
1.2+1-11sys/dtb/arm/xilinx/Makefile
+7-9412 files not shown
+19-19218 files

OPNSense/core 8755225src/opnsense/scripts/interfaces dhcp6c_script.sh

interfaces: show the prefix shift in the log message

Move the other force message to the respective if which is more or
less what we had before.  This is important for making clear what
the impact of #9521 to renewals actually is.
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+2-4src/opnsense/scripts/interfaces/dhcp6c_script.sh
+2-41 files

OPNSense/core d460c17. plist, src/etc/inc interfaces.inc

interfaces: generalise the rtsold_script as well

The bulk of this started in 732e4b3388b but Martin was involved
here too over the years.
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+78-0src/opnsense/scripts/interfaces/rtsold_script.sh
+2-53src/etc/inc/interfaces.inc
+1-0plist
+81-533 files

OPNSense/core d0ea5d9src/etc/inc interfaces.inc

interfaces: missed script path via @cm-rudolph
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+1-1src/etc/inc/interfaces.inc
+1-11 files

LLVM/project 1887fcallvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-ext-rv32.ll

[RISCV][llvm] Handle sub-register vector shifts for P-extension (#176109)

For sub-register width vectors (v2i16, v4i8) on RV64 with P-extension,
the type legalizer widens them to legal types, i.e. v4i16, v8i8, before
they're getting unrolled, so they'll be redundant computation for higher
part of register.
The correct way to handle is similar to widening div/rem where there's
undef padded for high part.

stack on: https://github.com/llvm/llvm-project/pull/176093
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+39-119llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
+27-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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OPNSense/core 31d08f9src/etc/inc interfaces.inc, src/www interfaces.php

interface: multi-dhcp6c support and custom PD association #7647

This splits off rtsold and dhcp6c into separate processes
which frees us from the restrictions of faked iterative IDs
for PD associations.  For NA we simply default to 0 now.

I'm not entirely sure why we settled for a single deamon of
dhcp6c back in the day, but there are certianly downsides to
it and I don't see something that wasn't fixed in the meantime
that makes this not work.

Add two debugging files which still need to be steered via the
debug setting.
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+27-60src/etc/inc/interfaces.inc
+58-4src/www/interfaces.php
+85-642 files

OPNSense/core a100584src/etc/inc interfaces.inc

interfaces: embed dhcp6c options into config file

So we can read them from a soon-to-be generalised rtsold script.
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+13-17src/etc/inc/interfaces.inc
+13-171 files

OPNSense/core e8f35e9. plist, src/etc/inc interfaces.inc

interfaces: generalise the dhcp6c_script using the new IFNAME variable

The file was conceptually created in d36f0f4f62557 and before was a single
command line script... so add appropriate copyrights from that time onward.

Many thanks to Martin for pinoeering this back in the day!
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+86-0src/opnsense/scripts/interfaces/dhcp6c_script.sh
+2-67src/etc/inc/interfaces.inc
+1-0plist
+89-673 files

OPNSense/core ade7e9esrc/etc rc

Replace camcontrol with diskinfo for TRIM check in rc script
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+2-2src/etc/rc
+2-21 files

OPNSense/core 7222e70src/etc/inc interfaces.inc

interfaces: add extra options to respective dhcp6c config
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+9-0src/etc/inc/interfaces.inc
+9-01 files

OPNSense/core b6d4f8a. plist, src/etc/inc interfaces.inc

interfaces: generalise the rtsold_script as well

The bulk of this started in 732e4b3388b but Martin was involved
here too over the years.
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+77-0src/opnsense/scripts/interfaces/rtsold_script.sh
+2-53src/etc/inc/interfaces.inc
+1-0plist
+80-533 files

OPNSense/core b080128src/etc/inc interfaces.inc

interfaces: embed dhcp6c options into config file

So we can read them from a soon-to-be generalised rtsold script.
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+22-17src/etc/inc/interfaces.inc
+22-171 files

OPNSense/core c5ad815. plist, src/etc/inc interfaces.inc

interfaces: generalise the dhcp6c_script using the new IFNAME variable

The file was conceptually created in d36f0f4f62557 and before was a single
command line script... so add appropriate copyrights from that time onward.

Many thanks to Martin for pinoeering this back in the day!
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+86-0src/opnsense/scripts/interfaces/dhcp6c_script.sh
+2-67src/etc/inc/interfaces.inc
+1-0plist
+89-673 files