[CI] Remove unused env var from commit-access-greeter (#199024)
LABEL_NAME has been there since the workflow's introduction in
f8ef2699d860aea97750953f1b79db8ef7574e82, but has never been used.
[OpenMP][OMPIRBuilder] Refactor removeUnusedBlocksFromParent (#198938)
This is essentially post-commit review for #198690 which was landed
quickly to fix nondeterminism in tests introduced in #197637
Change-Id: Ib3603ef3c70dde5bb22d0fc04d9249e62ecccf0c
Co-authored-by: @Meinersbur
Co-authored-by: @chichunchen
[RISCV] Ensure AVL dominates True in vmerge peephole (#199008)
When folding vmerge into its true operand, if vmerge has an AVL defined
by a register and true has VLMAX, then the minimum AVL will be the
register. In this case it's not guaranteed to dominate true, so we need
to potentially sink true so it does.
This teaches ensureDominates to check multiple definitions at the same
time, since we want the sinking to be atomic.
Fixes #198733
[Flang][OpenMP][NFC] Remove Fortran Evaluate Depedancy from Support (#198742)
Following #197442, FortranEvaluate was implicitly included in
OpenMP-utils.h which should be avoided to ensure front-end data
structures in the Optimizers can stop and restart pure MLIR source
without any side-data structures.
To ensure this is done, EntryBlockArgs has been stripped back to only
track vars, objects are now tracked within ObjectEntryBlockArgs in
Lowering as this is a more appropriate place for this information, and
the existing symbol tracking in EntryBlockArgsEntry was only used here.
This ensures FortranEvaluate is not needed within the Optimizers, and
objects can still be maintained when lowering. This enables better
referencing in Reduction Clauses, where previously context was being
lost for expressions such as ArrayElements.
See more: #197442
Assisted-by: Codex
[LoopInterchange] Disable LoopCacheAnalysis-based heuristic by default (#193478)
LoopInterchange has three types of heuristics for profitability
decisions: `cache`, `instorder`, and `vectorize`. Currently, the
profitability check invokes these heuristics in this order. The
heuristic corresponding to `cache` is based on LoopCacheAnalysis.
However, LoopCacheAnalysis applies several aggressive heuristics, which
can sometimes lead to undesirable decisions. In contrast, the heuristic
corresponding to `instorder` is relatively simpler than `cache`, but its
behavior is clear and it is likely sufficient for practical cases.
In light of the default enablement, I believe it is better to use a
simpler, easier‑to‑reason‑about, and more stable heuristic rather than
an aggressive but complex one. Therefore, this patch disables the
LoopCacheAnalysis‑based profitability check by default.
[InstCombine] Fold `X s<= Y ? 0 : X -nsw Y -> X - smin(X, Y)` (#187898)
This is part of #146131 and #182597
`func3` and `func4` are
[equivalent](https://alive2.llvm.org/ce/z/NNMTDa) but `func3` produces a
`sext` instead of `zext` when `b - a` is known non-negative.
[Proof of correctness](https://alive2.llvm.org/ce/z/ZthC9m)
```c++
#include <stdint.h>
uint64_t func3(int32_t a, int32_t b) {
return (b < a ? 0 : (int32_t)(b - a));
}
uint64_t func4(int32_t a, int32_t b) {
return (b < a ? 0 : (uint32_t)(b - a));
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net/frr: OSPF/OSPF6 More visibility and safety for ModelRelationField references (#5459)
* Allow multiple prefix list selections in a route map in OSPF6 as well
* Improve visibility for route-maps and prefix-lists in OSPF/OSPF6 and enable internalModelUseSafeDelete
[AArch64] C1-Nano scheduling model refactor [NFC] (#198469)
Creates explicit definitions for each latency/throughput/resource
combination and use the definitions in the instruction rule definitions.
Alhough this change touches most lines in the model, there is no
functional change - all test cases are not affected by this change.
This makes the style of the C1-Nano scheduling model be similar to that
used in the C1-Ultra / C1-Premium and is being done in preparation to
including the work to support SME instructions that is currently being
implemented on the C1-Ultra scheduling model
