OPNSense/ports 74e6b54opnsense/update distinfo Makefile

opnsense/update: update latest code now

New base/kernel coming soon too but makes sense to pull
this in even if this _2 will not be user-facing.
DeltaFile
+3-3opnsense/update/distinfo
+2-2opnsense/update/Makefile
+5-52 files

FreeNAS/freenas c8b631dsrc/middlewared/middlewared/plugins/pool_ dataset_encryption_lock.py

NAS-139807 / 26.0.0-BETA.1 / Handle EROFS when setting immutable flag on lock of readonly dataset (#18292)

## Problem

Locking an encrypted dataset on a replication target (where the parent
has readonly=on) fails with EROFS. After lock unmounts the child
dataset, the mountpoint directory lives on the parent's read-only
filesystem, so setting the immutable flag via chattr +i fails.

## Solution

Catch OSError with errno.EROFS in the lock path, matching the existing
pattern in the unlock code (ffafdaf2c0). The immutable flag is
unnecessary here anyway since the parent's read-only mount already
prevents writes to the mountpoint directory.
DeltaFile
+9-4src/middlewared/middlewared/plugins/pool_/dataset_encryption_lock.py
+9-41 files

LLVM/project ab360b1llvm/lib/Analysis TargetTransformInfo.cpp, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[LLVM][TTI] Remove the isVScaleKnownToBeAPowerOfTwo hook. (#183292)

After https://github.com/llvm/llvm-project/pull/183080 this is no longer
a configurable property.

NOTE: No test changes expected beyond
llvm/test/Transforms/LoopVectorize/scalable-predication.ll which has
been removed because it only existed to verfiy the now unsupported
functionality.
DeltaFile
+0-114llvm/test/Transforms/LoopVectorize/scalable-predication.ll
+3-24llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+0-12llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+3-5llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+0-4llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+0-4llvm/lib/Analysis/TargetTransformInfo.cpp
+6-1637 files not shown
+6-17713 files

LLVM/project b7c056aclang-tools-extra/clang-tidy/modernize UseEqualsDeleteCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix erroneous warning to make deleted function public (#182577)

This PR fixes #54276 and fixes #135249 by only matching private deleted
functions with a public overload or special member functions.
DeltaFile
+66-21clang-tools-extra/test/clang-tidy/checkers/modernize/use-equals-delete.cpp
+20-1clang-tools-extra/clang-tidy/modernize/UseEqualsDeleteCheck.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+91-223 files

LLVM/project 4b25264clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CIR/CodeGenBuiltins/AArch64 acle_sve_dup.c

[CIR][AArch64] Add lowering + tests for predicated SVE svdup_lane builtins

This PR adds CIR lowering + tests for SVE `svdup_lane` builtins on
AArch64. The corresponding ACLE intrinsics are documented at:
https://developer.arm.com/architectures/instruction-sets/intrinsics
DeltaFile
+157-0clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
+20-3clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+177-32 files

LLVM/project 4c8ad96llvm/include/llvm/IR IntrinsicsSPIRV.td, llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp SPIRVModuleAnalysis.cpp

[SPIRV] Implement Gather and GatherCmp intrinsics (#182578)

This commit implements the intrinsics needed to represent the texture
Gather* instructions in HLSL.

Assisted-by: Gemini
DeltaFile
+118-0llvm/test/CodeGen/SPIRV/hlsl-resources/Gather.ll
+92-0llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+18-0llvm/test/CodeGen/SPIRV/hlsl-resources/Gather-errors-1.ll
+18-0llvm/test/CodeGen/SPIRV/hlsl-resources/Gather-errors-2.ll
+12-0llvm/include/llvm/IR/IntrinsicsSPIRV.td
+7-1llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+265-16 files

LLVM/project 6a28a66clang/lib/CIR/CodeGen CIRGenAtomic.cpp, clang/test/CIR/CodeGen atomic.c

[CIR] Implement compare exchange with dynamic failure ordering (#183110)

In #156253, we implemented the rest of this feature, with compile time
constant failure ordering. This patch follows the incubators direction
(with a little cleanup based on other cleanup that we do) to replace
this situation with a 'switch'.
DeltaFile
+260-4clang/test/CIR/CodeGen/atomic.c
+47-3clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
+307-72 files

LLVM/project bfff4f6clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Sema SemaARM.cpp

fixup! Move code to `AArch64ExpandPseudoInsts` and `getTgtMemIntrinsic`

Move code to `AArch64ExpandPseudoInsts` and `getTgtMemIntrinsic`
and use tablegen pattern for intrinsic, plus other small review changes.
DeltaFile
+47-75llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+69-32llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+42-47clang/lib/Sema/SemaARM.cpp
+21-12llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+10-12llvm/lib/Target/AArch64/AArch64InstrInfo.td
+17-5clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+206-1835 files not shown
+220-19211 files

LLVM/project 3f66484mlir/include/mlir-c ExtensibleDialect.h, mlir/lib/Bindings/Python IRAttributes.cpp IRTypes.cpp

[MLIR][Python] Fix typeid support for DynamicType and DynamicAttr (#183076)

Previously, we were using the static `typeid` of `DynamicType` for
checks, which is incorrect. We should instead check against the `typeid`
of `DynamicTypeDefinition` (which is a subclass of `SelfOwningTypeID`),
and register it via `register_type_caster` so that Python-defined types
can use `maybe_downcast`. (The attribute part is same.)
DeltaFile
+42-26mlir/lib/Bindings/Python/IRAttributes.cpp
+40-23mlir/lib/Bindings/Python/IRTypes.cpp
+32-0mlir/test/python/dialects/irdl.py
+8-6mlir/include/mlir-c/ExtensibleDialect.h
+10-0mlir/lib/CAPI/IR/ExtensibleDialect.cpp
+4-0mlir/python/mlir/dialects/ext.py
+136-553 files not shown
+139-599 files

FreeNAS/freenas ae9b0d4tests/api2 test_006_pool_and_sysds.py

NAS-139980 / 26.0.0-BETA.1 / Fix test__check_root_level_dataset_properties xattr/checksum assertions (#18295)

Commit 144edb2a88 correctly changed xattr from 'ON' to 'SA' to match
upstream ZFS commit
[073b34b3](https://github.com/openzfs/zfs/commit/073b34b3) (which
reordered xattr_table so 'sa' displays instead of 'on' for
ZFS_XATTR_SA), but also incorrectly changed checksum from 'ON' to 'SA'.
Follow-up ef786c525b reverted xattr back to 'ON' instead of reverting
checksum, leaving both values swapped.

Restore the correct assertions:
- xattr: 'SA'
- checksum: 'ON'
DeltaFile
+2-2tests/api2/test_006_pool_and_sysds.py
+2-21 files

LLVM/project c7d2031llvm/lib/Transforms/InstCombine InstCombineLoadStoreAlloca.cpp, llvm/lib/Transforms/Utils Local.cpp

[InstCombine] Replace alloca with poison size using poison instead of null

When an alloca instruction has an undef (poison) array size, InstCombine
was previously replacing all uses of the alloca with a null pointer. This
caused invalid IR when the alloca was used by @llvm.lifetime intrinsics.

According to the @llvm.lifetime intrinsic specification, the pointer
argument must be either:
  - A pointer to an alloca instruction, or
  - A poison value

Since null is neither an alloca pointer nor poison, the previous
transformation violated the intrinsic's requirements and produced
invalid IR.

Fix by replacing the alloca with a poison value instead of null, which
satisfies the @llvm.lifetime requirements and produces valid IR.
DeltaFile
+34-0llvm/test/Transforms/InstCombine/alloca-poison-size.ll
+0-30llvm/test/Transforms/InstCombine/invalid-alloca-poison-size.ll
+0-4llvm/lib/Transforms/Utils/Local.cpp
+1-1llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+35-354 files

FreeBSD/ports 1648e9edeskutils/joplin-desktop Makefile, editors/vscode Makefile

*/*: Bump port revision after electron39 update (7d22b072e1b5)
DeltaFile
+1-1net-im/deltachat-desktop/Makefile
+1-1textproc/obsidian/Makefile
+1-0deskutils/joplin-desktop/Makefile
+1-0net-im/signal-desktop/Makefile
+1-0net-im/teams/Makefile
+1-0editors/vscode/Makefile
+6-26 files

LLVM/project 3e1545bllvm/include/llvm/Support ModRef.h, llvm/lib/Analysis AliasAnalysis.cpp

[LLVM] Refine MemoryEffect handling for target-specific intrinsics (#155590)

This patch improves memory alias analysis between calls if they change
inaccessible or target memory locations. The  results is
computed by comparing each location ModRefInfo between the calls.
DeltaFile
+119-0llvm/test/Transforms/EarlyCSE/target-memory.ll
+29-0llvm/lib/Analysis/AliasAnalysis.cpp
+14-2llvm/include/llvm/Support/ModRef.h
+162-23 files

FreeBSD/ports 7d22b07devel/electron39 distinfo Makefile.version, devel/electron39/files patch-electron_spec_api-browser-window-spec.ts patch-electron_spec_chromium-spec.ts

devel/electron39: Update to 39.7.0

Changelog: https://github.com/electron/electron/releases/tag/v39.7.0

Reported by:    GitHub (watch releases)
DeltaFile
+11-2devel/electron39/files/patch-electron_spec_api-browser-window-spec.ts
+5-5devel/electron39/distinfo
+3-3devel/electron39/files/patch-electron_spec_chromium-spec.ts
+1-1devel/electron39/Makefile.version
+20-114 files

LLVM/project c1b2477llvm/lib/Analysis LoopAccessAnalysis.cpp

[LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (#183096)

The function returns nullptr when the multiplication WOULD overflow,
matching the semantics of its sibling addSCEVNoOverflow. The old name
reads as if the function multiplies with overflow, which is the opposite
of what it does.
DeltaFile
+4-4llvm/lib/Analysis/LoopAccessAnalysis.cpp
+4-41 files

LLVM/project 87d9dadllvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 arm64-vcvt.ll

[NFC] Address unresolved comments on #172837 (#183284)

DeltaFile
+5-5llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+0-1llvm/lib/Target/AArch64/AArch64InstrInfo.td
+0-1llvm/test/CodeGen/AArch64/arm64-vcvt.ll
+5-73 files

LLVM/project 1675efellvm/lib/Transforms/InstCombine InstCombineLoadStoreAlloca.cpp, llvm/lib/Transforms/Utils Local.cpp

[InstCombine] Replace alloca with poison size using poison instead of null

When an alloca instruction has an undef (poison) array size, InstCombine
was previously replacing all uses of the alloca with a null pointer. This
caused invalid IR when the alloca was used by @llvm.lifetime intrinsics.

According to the @llvm.lifetime intrinsic specification, the pointer
argument must be either:
  - A pointer to an alloca instruction, or
  - A poison value

Since null is neither an alloca pointer nor poison, the previous
transformation violated the intrinsic's requirements and produced
invalid IR.

Fix by replacing the alloca with a poison value instead of null, which
satisfies the @llvm.lifetime requirements and produces valid IR.
DeltaFile
+33-0llvm/test/Transforms/InstCombine/alloca-poision-size.ll
+33-0llvm/test/Transforms/InstCombine/alloca-poison-size.ll
+0-30llvm/test/Transforms/InstCombine/invalid-alloca-poison-size.ll
+0-4llvm/lib/Transforms/Utils/Local.cpp
+1-1llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+67-355 files

LLVM/project cf4b75fllvm/include/llvm/MC MCAsmBaseStreamer.h

Fix formatting
DeltaFile
+1-0llvm/include/llvm/MC/MCAsmBaseStreamer.h
+1-01 files

LLVM/project 76be8aellvm/include/llvm/MC MCAsmBaseStreamer.h, llvm/lib/Target/SystemZ/MCTargetDesc SystemZHLASMAsmStreamer.cpp SystemZHLASMAsmStreamer.h

Update based on review
DeltaFile
+0-6llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
+1-1llvm/include/llvm/MC/MCAsmBaseStreamer.h
+0-2llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.h
+1-93 files

FreeBSD/ports b010241security/softhsm2 Makefile pkg-plist

security/softhsm2: Updae 2.6.1 => 2.7.0

Changelog:
https://github.com/softhsm/SoftHSMv2/releases/tag/2.7.0

- Upstream changed site.
- Cleanup the port.

PR:             292670
Approved by:    Jaap Akkerhuis <jaap at NLnetLabs.nl> (maintainer)
MFH:            2026Q1
Co-authored-by: Jaap Akkerhuis <jaap at NLnetLabs.nl>

(cherry picked from commit 89238746ace5e99f89b2bc57b3c2fc27e3f35bd3)
DeltaFile
+12-17security/softhsm2/Makefile
+3-3security/softhsm2/pkg-plist
+3-3security/softhsm2/distinfo
+18-233 files

LLVM/project ee34eb6mlir/test/Dialect/LLVMIR nvvm-mma-sp-ordered.mlir, mlir/test/Target/LLVMIR/nvvm mma-sparse-blockscale.mlir mma-blockscale.mlir

[MLIR][NVVM] Fix kFactor for fp8/fp6/fp4 types in MmaSpOp verifier. Improve mma tests. (#183133)

Fix an incorrect kFactor value for e4m3/e5m2, e3m2/e2m3, e2m1 types in
MmaSpOp::verify(). The kFactor for these types was set to 32 but should
be 16.

kFactor is used to compute the expected number of operand A/B register
fragments. With kFactor=32 (wrong) and the only allowed shape m16n8k64,
the fragment count was incorrect. With kFactor=16 (correct), it matches
the PTX ISA definition for mma.sp with fp8/fp6/fp4 A/B operands.

PTX ISA reference:
[https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-sparse-mma](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-instructions-sparse-mma)

Also improve existing MLIR dialect tests for nvvm.mma.sp.sync and add
new mlir-translate tests covering mma, mma.sp, and blockscale variants.
DeltaFile
+842-0mlir/test/Target/LLVMIR/nvvm/mma-sparse-blockscale.mlir
+697-0mlir/test/Target/LLVMIR/nvvm/mma-blockscale.mlir
+380-0mlir/test/Target/LLVMIR/nvvm/mma-sp-ordered.mlir
+325-0mlir/test/Target/LLVMIR/nvvm/mma-sp.mlir
+191-0mlir/test/Target/LLVMIR/nvvm/mma-sp-kind.mlir
+65-81mlir/test/Dialect/LLVMIR/nvvm-mma-sp-ordered.mlir
+2,500-813 files not shown
+2,636-2229 files

FreeBSD/ports 8923874security/softhsm2 Makefile distinfo

security/softhsm2: Updae 2.6.1 => 2.7.0

Changelog:
https://github.com/softhsm/SoftHSMv2/releases/tag/2.7.0

- Upstream changed site.
- Cleanup the port.

PR:             292670
Approved by:    Jaap Akkerhuis <jaap at NLnetLabs.nl> (maintainer)
MFH:            2026Q1
Co-authored-by: Jaap Akkerhuis <jaap at NLnetLabs.nl>
DeltaFile
+12-17security/softhsm2/Makefile
+3-3security/softhsm2/distinfo
+3-3security/softhsm2/pkg-plist
+18-233 files

LLVM/project 9e84bd4llvm/include/llvm/ADT GenericUniformityImpl.h, llvm/lib/Analysis UniformityAnalysis.cpp

use CallbackVH for deletion/RAUW
DeltaFile
+45-0llvm/lib/Analysis/UniformityAnalysis.cpp
+12-1llvm/include/llvm/ADT/GenericUniformityImpl.h
+57-12 files

FreeBSD/ports b2907f3databases/mongosh Makefile, sysutils/intel-pcm Makefile

*/*: bump PORTREVISION following libsimdjson.so soname change

Reported by:    meta
Fixes:          f9dd1c82078f6f1df3bb396459f915b51532d331
DeltaFile
+1-1sysutils/intel-pcm/Makefile
+1-1databases/mongosh/Makefile
+1-1www/node22/Makefile
+1-0www/node20/Makefile
+1-0www/node25/Makefile
+1-0www/node24/Makefile
+6-31 files not shown
+7-37 files

LLVM/project 717a9abllvm/lib/Analysis InstructionSimplify.cpp, llvm/test/Transforms/InstSimplify structured-gep.ll

[InstSimplify] Add support for llvm.structured.gep (#182874)

Similar to GEP, the SGEP instruction with no indices can be simplified
by directly using the base pointer.
DeltaFile
+91-0llvm/test/Transforms/InstSimplify/structured-gep.ll
+2-0llvm/lib/Analysis/InstructionSimplify.cpp
+93-02 files

FreeBSD/src f3364d3sys/netinet tcp_timewait.c

tcp: improve handling of segments in TIME WAIT

The check for excluding duplicate ACKs needs to consider only TH_SYN
and TH_FIN. We know that TH_ACK is set and TH_RST is cleared. All
other flags, in particular TH_ECE, TH_CWR, and TH_AE needs to be
ignored for the check.

PR:                     292293
Reviewed by:            rrs
MFC after:              3 days
Sponsored by:           Netflix, Inc.
Differential Revision:  https://reviews.freebsd.org/D55489
DeltaFile
+1-1sys/netinet/tcp_timewait.c
+1-11 files

HardenedBSD/src 198d6d7lib/libc/db/mpool mpool.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+4-0lib/libc/db/mpool/mpool.c
+4-01 files

LLVM/project 90144c2llvm/lib/Target/WebAssembly WebAssemblyInstrSIMD.td, llvm/test/CodeGen/WebAssembly simd-extadd.ll

[WebAssembly] optimize ext + shuffle + add into addext (#182849)

cc https://github.com/llvm/llvm-project/issues/179143

This adds a second pattern: we already recognize "shuffle + extend +
add" as `addext`, this adds another pattern for "extend + shuffle +
add", which can come up when programs are optimized.
DeltaFile
+52-3llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+32-0llvm/test/CodeGen/WebAssembly/simd-extadd.ll
+84-32 files

FreeBSD/src 8d2f910sys/netinet tcp_timewait.c

tcp: BBLog incoming packets in TCPS_TIME_WAIT

PR:                     292293
Reviewed by:            rrs, rscheff, pouria, Nick Banks, Peter Lei
MFC after:              3 days
Sponsored by:           Netflix, Inc.
Differential Revision:  https://reviews.freebsd.org/D5546
DeltaFile
+3-0sys/netinet/tcp_timewait.c
+3-01 files

HardenedBSD/src d5b4709lib/libc/db/mpool mpool.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+4-0lib/libc/db/mpool/mpool.c
+4-01 files