NetBSD/pkgsrc-wip 97bf4fcpy-netsnmp-cffi PLIST distinfo, py-netsnmp-cffi/patches patch-src_netsnmpy_netsnmp__ffi.py

py-netsnmp-cffi: add dummy member to 'struct enum_list', so this works again.

Bump PKGREVISION.
DeltaFile
+6-9py-netsnmp-cffi/PLIST
+14-0py-netsnmp-cffi/patches/patch-src_netsnmpy_netsnmp__ffi.py
+1-0py-netsnmp-cffi/distinfo
+1-0py-netsnmp-cffi/Makefile
+22-94 files

OpenBSD/ports SraqUo4www/sogo/patches patch-UI_MailerUI_UIxMailFolderActions_m patch-SoObjects_SOGo_SOGoGCSFolder_m

   www/sogo: fix build with llvm 22

   disclaimer: i know nothing to objective-C, it's mostly fixing
   incompatible pointer types by changing var types or sprinkling casts
   here and there. should be pushed upstream for a proper review by ppl
   knowledgeable in obj-C..
VersionDeltaFile
1.1+66-0www/sogo/patches/patch-UI_MailerUI_UIxMailFolderActions_m
1.3+10-52www/sogo/patches/patch-SoObjects_SOGo_SOGoGCSFolder_m
1.1+30-0www/sogo/patches/patch-UI_PreferencesUI_UIxPreferences_m
1.1+28-0www/sogo/patches/patch-API_SOGoAPIDispatcher_m
1.1+22-0www/sogo/patches/patch-UI_Contacts_UIxContactEditor_m
1.1+21-0www/sogo/patches/patch-UI_AdministrationUI_UIxAdministrationAclEditor_m
+177-5228 files not shown
+551-5234 files

LLVM/project 9bb17a0clang-tools-extra/clangd/unittests CMakeLists.txt

[clangd] Disable PCH reuse for ClangdTests (#201232)

Fixes https://github.com/llvm/llvm-project/issues/200999
DeltaFile
+3-0clang-tools-extra/clangd/unittests/CMakeLists.txt
+3-01 files

LLVM/project c264e07llvm/include/llvm/DTLTO DTLTO.h, llvm/include/llvm/LTO LTO.h

[DTLTO] Refactor the DTLTO code. (#192629)

DTLTO implementation code has been moved from `llvm/lib/LTO/` to
`llvm/lib/DTLTO/`. This refactor does not change any externally visible
behavior, so existing DTLTO tests and documentation remain valid. The
move was done to reduce code duplication, improve maintainability, and
make it easier to adopt future performance improvements.
DeltaFile
+63-496llvm/lib/LTO/LTO.cpp
+273-231llvm/lib/DTLTO/DTLTO.cpp
+364-45llvm/include/llvm/DTLTO/DTLTO.h
+221-0llvm/lib/DTLTO/DTLTOInputFiles.cpp
+143-0llvm/lib/DTLTO/DTLTODistributionDriver.cpp
+10-41llvm/include/llvm/LTO/LTO.h
+1,074-81310 files not shown
+1,138-85316 files

LLVM/project 4a74b44orc-rt/include/orc-rt NativeDylibManager.h, orc-rt/lib/executor NativeDylibManager.cpp

[orc-rt] Add required/weak-ref attribute to NativeDylibManager lookup. (#201272)

Replace the std::vector<std::string> argument to lookup() with a
SymbolLookupSet (a vector of (name, LookupFlags) pairs, where
LookupFlags is RequiredSymbol or WeaklyReferencedSymbol).

This brings NativeDylibManager more closely into alignment with the
SimpleExecutorDylibManager implementation in the LLVM OrcTargetProcess
library.
DeltaFile
+73-7orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
+46-8orc-rt/unittests/NativeDylibManagerTest.cpp
+34-2orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
+26-2orc-rt/lib/executor/NativeDylibManager.cpp
+9-3orc-rt/include/orc-rt/NativeDylibManager.h
+188-225 files

LLVM/project 1834a71clang/include/clang/Basic BuiltinsAMDGPU.td, clang/test/SemaOpenCL builtins-amdgcn-global-load-store-target-error.cl

add ArgNames; use target feature "flat-global-insts"
DeltaFile
+5-3clang/include/clang/Basic/BuiltinsAMDGPU.td
+8-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+2-2clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
+15-53 files

LLVM/project 7bebe28llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-extract-subvector-loop.ll

[SelectionDAG] Fold extracts of subvector inserts

Fold extract_subvector(insert_subvector(...)) when the extraction is
outside the inserted subvector or the inserted subvector only amends
the extracted

In particular,
1. vA extract_subvector (vB insert_subvector(vB X, vC Y, C1), C2) =>
vA extract_subvector(X, C2) when [C2, C2 + A) intersect [C1, C1 + C)
is the empty set
2. ... => extract_subvector(Y, C2 - C1) if [C2, C2 + Y) is a subset of
[C1, C1 + C) - an existing simplification
3. ... => vA insert_subvector(vA extract_subvector(vB X, C2), vC Y, C1 - C2)
if [C1, C1 + C) is a subset of [C2, C2 + A) - that is, if you're only
updating the extracted sub-part.

Adds a regresssion tests for an infinite SelectionDAG cycle that is
fixed by a stack of commits that ends with this one.


    [3 lines not shown]
DeltaFile
+72-56llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+44-48llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+25-22llvm/test/CodeGen/X86/dagcombine-extract-insert.ll
+45-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-extract-subvector-loop.ll
+28-7llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+15-17llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+229-1502 files not shown
+237-1668 files

LLVM/project 1bc6af8llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 dagcombine-insert-concat.ll

[SelectionDAG] Fold subvector inserts into concat operands

Push insert_subvector into the containing CONCAT_VECTORS operand when the insertion is wholly contained there.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+34-10llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-18llvm/test/CodeGen/X86/dagcombine-insert-concat.ll
+38-282 files

LLVM/project 9e7a44fllvm/test/CodeGen/AArch64 sve-fixed-vector-llrint.ll sve-fixed-vector-lrint.ll, llvm/test/CodeGen/AMDGPU bf16.ll

[SelectionDAG] Fold extracts spanning concat operands

Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+992-904llvm/test/CodeGen/AMDGPU/bf16.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+196-176llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+142-140llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+120-120llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+1,824-1,79812 files not shown
+2,204-2,27918 files

LLVM/project 6395570llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[SelectionDAG] Fold nonzero extract-of-extract indices

Generalize the extract_subvector-of-extract_subvector fold to compose
nonzero indices instead of only handling an outer index of zero.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+8-8llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-81 files

LLVM/project d7eb426llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-bitcast-demanded-elts.ll

[SelectionDAG] Track bitcast demanded elements in noundef tests

Bitcasts preserve undef/poison status, but vector bitcasts can change
which source lanes cover a demanded result lane. Map the demanded
element mask through fixed-length vector bitcasts before checking the
source where possible.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+41-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+3-12llvm/test/CodeGen/X86/dagcombine-freeze-bitcast-demanded-elts.ll
+44-122 files

LLVM/project 9fbcc6cllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

[SelectionDAG] Track demanded select elements in noundef checks

Propagate demanded elements through to the two arms of a select, and
check the condition with or without demanded elements depending on if
it's a vector or not.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+17-2llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+0-10llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+17-122 files

LLVM/project 808bf28llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll dagcombine-freeze-bitcast-demanded-elts.ll

[SelectionDAG] Pre-commit tests for dagcombine improvements

I've got a stack of dagcombine improvements that together make an
infinite cycle relating to freeze insertion in vector-manipulation IR.
Here we have

- Handling freeze(undef) in demanded-elts for shufflevector
- Improvements to noundef checks for bitcast, concat, and select
- Improvements to extract(concat), extract(extract), and
- extract(insert) nadling
DeltaFile
+84-0llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+56-0llvm/test/CodeGen/X86/dagcombine-freeze-bitcast-demanded-elts.ll
+51-0llvm/test/CodeGen/X86/dagcombine-extract-insert.ll
+38-0llvm/test/CodeGen/X86/dagcombine-insert-concat.ll
+36-0llvm/test/CodeGen/X86/dagcombine-freeze-undef-demanded-elts.ll
+25-0llvm/test/CodeGen/X86/dagcombine-extract-concat.ll
+290-01 files not shown
+310-07 files

LLVM/project 59be8e3llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-undef-demanded-elts.ll pr91005.ll

[SelectionDAG] Look through freeze in undef demanded checks

There were cycles where the freeze combiner and thet
demanded-elements simplification code would get into fights about
whethere the operands to a shuffle or a concat should be
`freeze undef` or `undef` once the simplifier had concluded zero
elements were demanded from some operation. This PR prevents such
cases.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+11-7llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+2-1llvm/test/CodeGen/X86/dagcombine-freeze-undef-demanded-elts.ll
+2-1llvm/test/CodeGen/X86/pr91005.ll
+15-93 files

LLVM/project f203fd2llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-concat-demanded-elts.ll

[SelectionDAG] Track demanded concat elements in noundef checks

Teach isGuaranteedNotToBeUndefOrPoison to distribute fixed-length
demanded element masks across CONCAT_VECTORS operands. This is part of
the series of fixes needed to resolve a SelectionDAG hang by making it
possible to prove certain values don't need to be frozen.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+23-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+1-4llvm/test/CodeGen/X86/dagcombine-freeze-concat-demanded-elts.ll
+24-42 files

NetBSD/pkgsrc mINJIzGmath/py-torch distinfo, math/py-torch/patches patch-torch_csrc_jit_python_init.cpp patch-torch_csrc_utils_python__arg__parser.cpp

   py-torch: apply fixes for py-pybind11 pkgsrc version

   from YAMAMOTO Takashi in PR 60306
VersionDeltaFile
1.1+37-0math/py-torch/patches/patch-torch_csrc_jit_python_init.cpp
1.1+35-0math/py-torch/patches/patch-torch_csrc_utils_python__arg__parser.cpp
1.1+28-0math/py-torch/patches/patch-torch_csrc_distributed_c10d_init.cpp
1.6+5-2math/py-torch/distinfo
1.2+3-1math/py-torch/patches/patch-third__party_fbgemm_external_cpuinfo_src_init.c
+108-35 files

LLVM/project baa8da3mlir/include/mlir/Dialect/SPIRV/IR SPIRVTosaTypes.td, mlir/test/Dialect/SPIRV/IR tosa-ops-dynamic.mlir

[mlir][spirv] Allow dynamic rescale parameter lengths (#200155)

The SPIR-V TOSA rescale verifier checked multiplier and shift lengths
with a direct equality against the input channel dimension. That rejects
otherwise valid operations when either side of the shape comparison is
dynamic.

Express the check with reusable dimension predicates so unranked or
dynamic dimensions pass, while static dimensions still enforce the
per-channel and scalar length requirements. Add dedicated dynamic-shape
op coverage for dynamic input channel dimensions and dynamic
multiplier/shift lengths.

Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
DeltaFile
+25-0mlir/test/Dialect/SPIRV/IR/tosa-ops-dynamic.mlir
+18-3mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
+43-32 files

FreeBSD/src 309fc9fsys/dev/cxgbe/crypto t7_kern_tls.c

cxgbe(4): Use correct FID in KTLS tx work requests

MFC after:      1 week
Sponsored by:   Chelsio Communications
DeltaFile
+2-2sys/dev/cxgbe/crypto/t7_kern_tls.c
+2-21 files

FreeBSD/src 4b6887esys/dev/cxgbe/common t4_hw.c

cxgbe(4): Do not read indirect INT_CAUSE registers directly

Some of the registers added in a172f9e5b3cf are not directly accessible
and should be avoided.

Fixes:          a172f9e5b3cf cxgbe(4): Improvements to the slow interrupt handler
MFC after:      1 week
Sponsored by:   Chelsio Communications
DeltaFile
+8-0sys/dev/cxgbe/common/t4_hw.c
+8-01 files

OpenBSD/ports n9v1cvAsysutils/libvirt/patches patch-src_qemu_qemu_nbdkit_c

   Oops, I forgot to cvs rm.
VersionDeltaFile
1.3+0-0sysutils/libvirt/patches/patch-src_qemu_qemu_nbdkit_c
+0-01 files

OPNSense/core 74e76cbsrc/opnsense/scripts/firmware hostnames.sh

firmware: retain ordering in update servers

This only pertains to the connectivity audit changes from
26.1.8.  Treat the server from opnsense-update -M as the
primary one by not sorting the result.

PR: https://forum.opnsense.org/index.php?topic=52025.0
DeltaFile
+1-1src/opnsense/scripts/firmware/hostnames.sh
+1-11 files

FreeBSD/src c029d04sys/dev/cxgbe t4_main.c

cxgbe(4): Use backdoor access to read SGE context on T7

This avoids a firmware bug where it crashes when accessing SGE context
on a secondary core.

MFC after:      1 week
Sponsored by:   Chelsio Communications
DeltaFile
+1-1sys/dev/cxgbe/t4_main.c
+1-11 files

LLVM/project 0629650llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-extract-subvector-loop.ll

[SelectionDAG] Fold extracts of subvector inserts

Fold extract_subvector(insert_subvector(...)) when the extraction is
outside the inserted subvector or the inserted subvector only amends
the extracted

In particular,
1. vA extract_subvector (vB insert_subvector(vB X, vC Y, C1), C2) =>
vA extract_subvector(X, C2) when [C2, C2 + A) intersect [C1, C1 + C)
is the empty set
2. ... => extract_subvector(Y, C2 - C1) if [C2, C2 + Y) is a subset of
[C1, C1 + C) - an existing simplification
3. ... => vA insert_subvector(vA extract_subvector(vB X, C2), vC Y, C1 - C2)
if [C1, C1 + C) is a subset of [C2, C2 + A) - that is, if you're only
updating the extracted sub-part.

Adds a regresssion tests for an infinite SelectionDAG cycle that is
fixed by a stack of commits that ends with this one.


    [3 lines not shown]
DeltaFile
+72-56llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+44-48llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+25-22llvm/test/CodeGen/X86/dagcombine-extract-insert.ll
+45-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-extract-subvector-loop.ll
+28-7llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+15-17llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+229-1502 files not shown
+237-1668 files

LLVM/project c1857e2llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-extract-subvector-loop.ll

[SelectionDAG] Fold extracts of subvector inserts

Fold extract_subvector(insert_subvector(...)) when the extraction is
outside the inserted subvector or the inserted subvector only amends
the extracted

In particular,
1. vA extract_subvector (vB insert_subvector(vB X, vC Y, C1), C2) =>
vA extract_subvector(X, C2) when [C2, C2 + A) intersect [C1, C1 + C)
is the empty set
2. ... => extract_subvector(Y, C2 - C1) if [C2, C2 + Y) is a subset of
[C1, C1 + C) - an existing simplification
3. ... => vA insert_subvector(vA extract_subvector(vB X, C2), vC Y, C1 - C2)
if [C1, C1 + C) is a subset of [C2, C2 + A) - that is, if you're only
updating the extracted sub-part.

Adds a regresssion tests for an infinite SelectionDAG cycle that is
fixed by a stack of commits that ends with this one.


    [3 lines not shown]
DeltaFile
+72-56llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+44-48llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+25-22llvm/test/CodeGen/X86/dagcombine-extract-insert.ll
+45-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-extract-subvector-loop.ll
+32-7llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+15-17llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+233-1502 files not shown
+241-1668 files

LLVM/project bfdfeffllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 dagcombine-insert-concat.ll

[SelectionDAG] Fold subvector inserts into concat operands

Push insert_subvector into the containing CONCAT_VECTORS operand when the insertion is wholly contained there.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+34-10llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-18llvm/test/CodeGen/X86/dagcombine-insert-concat.ll
+38-282 files

LLVM/project 8cbb390llvm/test/CodeGen/AArch64 sve-fixed-vector-llrint.ll sve-fixed-vector-lrint.ll, llvm/test/CodeGen/AMDGPU bf16.ll

[SelectionDAG] Fold extracts spanning concat operands

Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+992-904llvm/test/CodeGen/AMDGPU/bf16.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+196-176llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+142-140llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+120-120llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+1,824-1,79812 files not shown
+2,204-2,27918 files

LLVM/project fe68411llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

[SelectionDAG] Track demanded select elements in noundef checks

Propagate demanded elements through to the two arms of a select, and
check the condition with or without demanded elements depending on if
it's a vector or not.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+17-2llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+0-10llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+17-122 files

LLVM/project a739b77llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[SelectionDAG] Fold nonzero extract-of-extract indices

Generalize the extract_subvector-of-extract_subvector fold to compose
nonzero indices instead of only handling an outer index of zero.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+8-8llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-81 files

LLVM/project fa98608llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-concat-demanded-elts.ll

[SelectionDAG] Track demanded concat elements in noundef checks

Teach isGuaranteedNotToBeUndefOrPoison to distribute fixed-length
demanded element masks across CONCAT_VECTORS operands. This is part of
the series of fixes needed to resolve a SelectionDAG hang by making it
possible to prove certain values don't need to be frozen.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+23-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+1-4llvm/test/CodeGen/X86/dagcombine-freeze-concat-demanded-elts.ll
+24-42 files

LLVM/project 8c5f91fllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-bitcast-demanded-elts.ll

[SelectionDAG] Track bitcast demanded elements in noundef tests

Bitcasts preserve undef/poison status, but vector bitcasts can change
which source lanes cover a demanded result lane. Map the demanded
element mask through fixed-length vector bitcasts before checking the
source where possible.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+41-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+1-4llvm/test/CodeGen/X86/dagcombine-freeze-bitcast-demanded-elts.ll
+42-42 files