OPNSense/core 4516d41src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Firewall: Rules [new]: Escape selector in rule_protocol (#9642)

(cherry picked from commit b3fa25ee01d7b3050cb1a0149236901fbb20ea82)
DeltaFile
+5-3src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+5-31 files

OPNSense/core 4f784d0src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Firewall: Rules [new]: Escape selector in rule_protocol (#9642)

(cherry picked from commit b3fa25ee01d7b3050cb1a0149236901fbb20ea82)
DeltaFile
+5-3src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+5-31 files

OPNSense/core d398482src/etc/inc/plugins.inc.d hostwatch.inc

Interfaces: Neighbors: Automatic Discovery - add xmlrpc registration, closes https://github.com/opnsense/core/issues/9628

(cherry picked from commit 63c3fe33f6b734373fa6a20a6843456843721bdf)
DeltaFile
+12-0src/etc/inc/plugins.inc.d/hostwatch.inc
+12-01 files

OPNSense/core bfd819fsrc/opnsense/scripts/openvpn ovpn_service_control.php

openvpn: account for CARP status in start and restart cases as well (#9634)

(cherry picked from commit 0b7c06f3a6d86c362ab9c9d81b6220d0c5a29814)
DeltaFile
+11-7src/opnsense/scripts/openvpn/ovpn_service_control.php
+11-71 files

LLVM/project 074485cllvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Disable Machine verifier at the end of default pipelines
DeltaFile
+4-8llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+3-6llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+0-3llvm/include/llvm/Passes/CodeGenPassBuilder.h
+7-173 files

LLVM/project 1b3fa6fllvm/lib/Transforms/Scalar LoopStrengthReduce.cpp

[CodeGen][LSR][NPM] Make LoopStrengthReduce pass preserve LCSSA
DeltaFile
+4-0llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+4-01 files

LLVM/project 65f16e0llvm/lib/Target/AMDGPU SILowerControlFlow.cpp, llvm/test/CodeGen/AMDGPU si-lower-control-flow-preserve-dom-tree.mir

[AMDGPU] Fix DomTree preservation in SILowerControlFlow when nodes are deleted
DeltaFile
+59-0llvm/test/CodeGen/AMDGPU/si-lower-control-flow-preserve-dom-tree.mir
+5-0llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+64-02 files

LLVM/project d765e1ellvm/test/CodeGen/AMDGPU si-lower-control-flow-preserve-dom-tree.mir

review comments
DeltaFile
+37-31llvm/test/CodeGen/AMDGPU/si-lower-control-flow-preserve-dom-tree.mir
+37-311 files

LLVM/project 4ea3fccllvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Specify Loop pass adaptor to not use MSSA
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-2llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+2-1llvm/include/llvm/Passes/CodeGenPassBuilder.h
+6-53 files

LLVM/project f5f8a49llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Complete fast regalloc pipeline
DeltaFile
+38-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+10-1llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+48-12 files

LLVM/project 1253a30llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Add "PhysicalRegisterUsageAnalysis" once
DeltaFile
+417-420llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+1-4llvm/include/llvm/Passes/CodeGenPassBuilder.h
+418-4242 files

FreeBSD/ports 98d61a3sysutils Makefile, sysutils/mdfried distinfo Makefile.crates

sysutils/mdfried: Add new port

Mdfried is a markdown viewer for the terminal that renders headers
as Bigger Text than the rest.

https://crates.io/crates/mdfried
DeltaFile
+983-0sysutils/mdfried/distinfo
+490-0sysutils/mdfried/Makefile.crates
+39-0sysutils/mdfried/Makefile
+2-0sysutils/mdfried/pkg-descr
+1-0sysutils/Makefile
+1,515-05 files

FreeBSD/ports 3042fe8devel/jiic/files build.xml

devel/jiic: support building with any jdk

Builds fine with jdk21.

PR:     292661
Approved-by:    ale@ (maintainer)
DeltaFile
+1-1devel/jiic/files/build.xml
+1-11 files

LLVM/project 854d088llvm/lib/CodeGen/SelectionDAG LegalizeFloatTypes.cpp LegalizeTypes.h

Delete the implementation functions
DeltaFile
+0-655llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+0-37llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+0-6922 files

LLVM/project 4148355llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen TargetLoweringBase.cpp

DAG: Remove softPromoteHalfType

Remove the now unimplemented target hook and associated DAG machinery
for the old half legalization path.

Really fixes #97975
DeltaFile
+7-22llvm/include/llvm/CodeGen/TargetLowering.h
+0-20llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+0-11llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+2-7llvm/lib/CodeGen/TargetLoweringBase.cpp
+0-8llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+0-2llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+9-701 files not shown
+9-717 files

LLVM/project febe138llvm/lib/Target/AMDGPU R600ISelLowering.cpp R600ISelLowering.h, llvm/test/CodeGen/AMDGPU kernel-args.ll

R600: Remove softPromoteHalfType

Also includes a kind of hacky, minimal change to avoid assertions
when softPromoteHalfType is removed to fix kernel arguments
lowered as f16. Half support was never really implemented
for r600, and there just happened to be a few incidental tests
which included a half argument (which were also not even meaningful,
since the function body just folded to nothing due to no callable
function support).
DeltaFile
+164-0llvm/test/CodeGen/AMDGPU/kernel-args.ll
+3-0llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+0-2llvm/lib/Target/AMDGPU/R600ISelLowering.h
+167-23 files

LLVM/project 2fa99dcllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll

AMDGPU: Move softPromoteHalfType override to R600 only

As expected the code is much worse, but more correct.
We could do a better job with source modifier management around
fp16_to_fp/fp_to_fp16.
DeltaFile
+19,051-23,588llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+7,381-11,318llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+6,645-10,108llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+6,103-9,009llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+7,004-7,821llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,419-8,032llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+51,603-69,876116 files not shown
+97,949-126,397122 files

LLVM/project 6fc8028llvm/lib/Analysis LazyValueInfo.cpp

[LVI] Fix the type when inferring nonnull from a dereferenceable attribute bundle (#177562)

DeltaFile
+1-1llvm/lib/Analysis/LazyValueInfo.cpp
+1-11 files

OPNSense/plugins 14a1301net/isc-dhcp/src/etc/inc/plugins.inc.d dhcpd.inc, net/isc-dhcp/src/www services_dhcpv6.php services_dhcp.php

isc-dhcpdv6: add static mapping export (#5164)

DeltaFile
+33-1net/isc-dhcp/src/www/services_dhcpv6.php
+1-2net/isc-dhcp/src/etc/inc/plugins.inc.d/dhcpd.inc
+1-1net/isc-dhcp/src/www/services_dhcp.php
+35-43 files

LLVM/project 7b72ab8llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel fpext.ll unmerge-sgpr-s16.ll

AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES

Move G_UNMERGE_VALUES handling to AMDGPURegBankLegalizeRules.cpp.
Fix sgpr S16 unmerge by lowering using shift and using S32.
Previously sgpr S16 unmerge was selected using _lo16 and _hi16 subreg
indexes which are exclusive to vgpr register classes.
For remaing cases we do trivial mapping, assigns same reg bank
to all operands, vgpr or sgpr.
DeltaFile
+47-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+13-27llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
+36-0llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
+26-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+14-9llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
+14-9llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
+150-452 files not shown
+158-498 files

FreeBSD/ports 3573372x11/walker distinfo Makefile.crates

x11/walker: Update to 2.14.1

Changelog:
- https://github.com/abenz1267/walker/releases/tag/v2.14.0
- https://github.com/abenz1267/walker/releases/tag/v2.14.1

Reported by:    GitHub (watch releases)
DeltaFile
+3-23x11/walker/distinfo
+0-10x11/walker/Makefile.crates
+1-1x11/walker/Makefile
+4-343 files

LLVM/project 39a9e65mlir/include/mlir/Dialect/Bufferization/IR BufferizableOpInterface.h, mlir/lib/Dialect/Bufferization/IR BufferizableOpInterface.cpp

[mlir][bufferization] Cache SymbolTableCollection for CallOp types (#176909)

Use the BufferizationState symbol table cache when resolving CallOp
callee types in getBufferType(), avoiding repeated SymbolTableCollection
creation. Add a const accessor (backed by a mutable cache) so const
state can reuse the same tables. Completes a marked TODO.
DeltaFile
+2-4mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
+3-1mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
+4-0mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
+9-53 files

OPNSense/core 32178f6src/opnsense/mvc/app/views/OPNsense/Firewall firewall_migration.volt

Firewall: Rules: Migration assistant: Fix typos and improve clarity in migration instructions
DeltaFile
+5-5src/opnsense/mvc/app/views/OPNsense/Firewall/firewall_migration.volt
+5-51 files

LLVM/project b791501clang/test/CodeGenObjC arc-foreach.m arc-unsafeclaim.m, clang/test/CodeGenObjCXX auto-release-result-assert.mm

Revert "Reapply "[CGObjC] Allow clang.arc.attachedcall on -O0 (#164875)" (#177285)" (#177533)

This reverts commit 4b939beb79e3390046b760bef71b7d891ba9b4df.

This commit seems to be causing these test failures:

- ThreadSanitizer-x86_64-iossim.Darwin.norace-objcxx-run-time.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/norace_objcxx_run_time_mm/
- ThreadSanitizer-x86_64-iossim.Darwin.objc-synchronize-cycle-tagged.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/objc_synchronize_cycle_tagged_mm/
- ThreadSanitizer-x86_64-iossim.Darwin.objc-synchronize-tagged.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/objc_synchronize_tagged_mm/
- ThreadSanitizer-x86_64-iossim.Darwin.objc-synchronize.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/objc_synchronize_mm/


With the error message:

```
fatal error: error in backend: Cannot select: intrinsic %llvm.objc.clang.arc.noop.use
```
DeltaFile
+1-232llvm/test/CodeGen/AArch64/call-rv-marker.ll
+89-89clang/test/CodeGenObjC/arc-foreach.m
+5-45clang/test/CodeGenObjC/arc-unsafeclaim.m
+16-16clang/test/CodeGenObjC/os_log.m
+1-22clang/test/CodeGenObjC/arc-arm.m
+6-12clang/test/CodeGenObjCXX/auto-release-result-assert.mm
+118-41610 files not shown
+155-46416 files

OPNSense/plugins 7ad1ea6net/isc-dhcp/src/etc/inc/plugins.inc.d dhcpd.inc, net/isc-dhcp/src/www services_dhcpv6.php services_dhcp.php

isc-dhcpdv6: add static mapping export
DeltaFile
+33-1net/isc-dhcp/src/www/services_dhcpv6.php
+1-2net/isc-dhcp/src/etc/inc/plugins.inc.d/dhcpd.inc
+1-1net/isc-dhcp/src/www/services_dhcp.php
+35-43 files

LLVM/project 2142388llvm/test/CodeGen/X86 clmul-vector-256.ll clmul-vector-512.ll

[X86] Add 256-bit and 512-bit CLMULR and CLMULH test coverage (#177561)

DeltaFile
+1,844-0llvm/test/CodeGen/X86/clmul-vector-256.ll
+1,595-3llvm/test/CodeGen/X86/clmul-vector-512.ll
+3,439-32 files

LLVM/project e619523mlir/lib/Dialect/XeGPU/Transforms XeGPUPropagateLayout.cpp, mlir/test/Dialect/XeGPU propagate-layout-subgroup.mlir

[MLIR][XeGPU] Add simple rank-based sg layout creation (#172867)

DeltaFile
+197-24mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+74-0mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+271-242 files

NetBSD/src LbSRX8udoc CHANGES-9.5

   Ticket #1997
VersionDeltaFile
1.1.2.93+16-1doc/CHANGES-9.5
+16-11 files

NetBSD/src ORLHjRVexternal/bsd/unbound/dist/doc unbound.conf.5.in, external/bsd/unbound/dist/iterator iter_scrub.c

   Apply patch, requested by gutteridge in ticket #1997:

        external/bsd/unbound/dist/doc/example.conf.in           (apply patch)
        external/bsd/unbound/dist/doc/unbound.conf.5.in         (apply patch)
        external/bsd/unbound/dist/iterator/iter_scrub.c         (apply patch)
        external/bsd/unbound/dist/util/config_file.c            (apply patch)
        external/bsd/unbound/dist/util/config_file.h            (apply patch)
        external/bsd/unbound/dist/util/configlexer.c            (apply patch)
        external/bsd/unbound/dist/util/configlexer.lex          (apply patch)
        external/bsd/unbound/dist/util/configparser.c           (apply patch)
        external/bsd/unbound/dist/util/configparser.h           (apply patch)
        external/bsd/unbound/dist/util/configparser.y           (apply patch)
        external/bsd/unbound/include/config.h                   (apply patch)

   unbound: apply upstream patch to fix CVE-2025-11411.
VersionDeltaFile
1.1.1.4.2.3+3,011-3,745external/bsd/unbound/dist/util/configlexer.c
1.1.1.4.2.3+1,876-1,860external/bsd/unbound/dist/util/configparser.c
1.1.1.4.2.3+51-4external/bsd/unbound/dist/iterator/iter_scrub.c
1.1.1.4.2.3+13-1external/bsd/unbound/dist/util/configparser.y
1.1.1.4.2.3+4-2external/bsd/unbound/dist/util/configparser.h
1.1.1.4.2.3+6-0external/bsd/unbound/dist/doc/unbound.conf.5.in
+4,961-5,6125 files not shown
+4,974-5,61411 files

FreeBSD/src e17d7ablib/libc/xdr xdr.c, sys/xdr xdr.c

xdr_string: don't leak strings with xdr_free

Historically (and in a small amount of older software such as OpenAFS),
developers would attempt to free XDR strings with

        xdr_free((xdrproc_t)xdr_string, &string)

This resulted in xdr_free calling xdr_string with only two intentional
arguments and whatever was left in the third argument register.  If the
register held a sufficently small number, xdr_string would return FALSE
and not free the string (no one checks the return values).

Software should instead free strings with:

        xdr_free((xdrproc_t)xdr_wrapstring, &string)

Because buggy software exists in the wild, act as though xdr_wrapstring
was used in the XDR_FREE case and plug these leaks.


    [5 lines not shown]
DeltaFile
+7-0sys/xdr/xdr.c
+7-0lib/libc/xdr/xdr.c
+14-02 files