LLVM/project 3bb6687clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/CodeGen/PowerPC aix-vec-extabi-module-flag.c

PPC: Replace EnableAIXExtendedAltivecABI with "target-abi" module flag (#221670)

Continue purging ABI-influencing TargetOptions fields. Eliminate this
case by migrating to a module flag, reusing the generic target-abi module
flag with a new value.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+22-21llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+10-16llvm/include/llvm/Target/TargetOptions.h
+12-12llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
+18-0clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
+13-0flang/test/Integration/PowerPC/aix-vec-extabi.f90
+0-11clang/lib/Driver/ToolChains/CommonArgs.cpp
+75-6076 files not shown
+199-19782 files

LLVM/project 32cc084clang/test/SemaHLSL/Resources Textures-declaration-order.hlsl Textures-Subscript.hlsl

Drop spirv Sema RUN lines
DeltaFile
+0-25clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
+0-2clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
+0-272 files

LLVM/project 9268498clang/lib/CodeGen CGHLSLBuiltins.cpp

Derive the coordinate width from the resource attribute for better readability
DeltaFile
+14-9clang/lib/CodeGen/CGHLSLBuiltins.cpp
+14-91 files

LLVM/project 2f7419cclang/lib/Sema HLSLBuiltinTypeDeclBuilder.cpp

Assert that result ty vec and the Elts size are the same
DeltaFile
+2-0clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+2-01 files

LLVM/project 1356b3fclang/test/AST/HLSL Textures-AST.hlsl Textures-vector-AST.hlsl, clang/test/CodeGenHLSL/resources Textures-SampleGrad.hlsl Textures-Subscript.hlsl

[HLSL] Implement Texture1D and its variants
DeltaFile
+297-159clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+213-175clang/test/AST/HLSL/Textures-vector-AST.hlsl
+213-175clang/test/AST/HLSL/Textures-scalar-AST.hlsl
+245-106clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
+205-115clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+162-115clang/test/AST/HLSL/Textures-AST.hlsl
+1,335-84524 files not shown
+2,670-1,42230 files

LLVM/project 9329c41clang/test/CodeGenHLSL/resources Textures-Mips.hlsl Textures-CalculateLevelOfDetail.hlsl, clang/test/SemaHLSL/Resources Textures-Subscript.hlsl

Fold Texture3D into the texture tests after the rebase
DeltaFile
+42-45clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
+43-37clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+25-35clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
+25-23clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+14-18clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
+19-5clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
+168-16316 files not shown
+217-18722 files

LLVM/project c770c98clang/test/CodeGenHLSL/resources Textures-SampleLevel.hlsl Textures-SampleCmpLevelZero.hlsl, clang/test/SemaHLSL/Resources Textures-declaration-order.hlsl

Add missing macro descriptions to tests
DeltaFile
+5-0clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+4-0clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
+25-06 files not shown
+40-012 files

LLVM/project 059804dclang/test/CodeGenHLSL/resources Textures-SampleCmp.hlsl Textures-SampleGrad.hlsl

Reorganize RUN lines in tests. Remove unused macros
DeltaFile
+100-158clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
+106-132clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
+106-132clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
+105-131clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
+93-109clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+82-107clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
+592-76921 files not shown
+1,214-1,34527 files

LLVM/project 8f887e3clang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Sema SemaHLSL.cpp

[HLSL] Add CustomTypeChecking and improve sema for texture builtins (#221060)

This PR makes the texture builtins (for load, sample, gather) use
CustomTypeChecking, and adds additional semantic checks for them to make
them more strict and conform with the way sema checks are done for other
builtins.

The main benefit of CustomTypeChecking is preventing
DefaultArgumentPromotion from occurring due to the builtins being
declared `void(...)`; primarily, the promotion of float/half to double
is undesirable.
Floating-point scalar operands in codegen (`CGHLSLBuiltins.cpp`) for
these builtins always had a check and cast of the form `if
(Op->getType() != FloatTy) Op = CreateFPCast(Op, FloatTy);` to
compensate for that, which looked like a code smell to me.
The DefaultArgumentPromotion also affected diagnostics, which would
report the promoted type (double) instead of the type the user provided
(float) (e.g., https://hlsl.godbolt.org/z/Yec3dKh14). These diagnostics
were not exercised before, and this PR adds tests to exercise them.

    [14 lines not shown]
DeltaFile
+42-83clang/lib/Sema/SemaHLSL.cpp
+117-0clang/test/SemaHLSL/BuiltIns/resource_sample-errors.hlsl
+52-0clang/test/SemaHLSL/BuiltIns/resource_load-errors.hlsl
+42-0clang/test/SemaHLSL/BuiltIns/resource_gather-errors.hlsl
+4-34clang/lib/CodeGen/CGHLSLBuiltins.cpp
+10-14clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
+267-1317 files not shown
+311-18313 files

LLVM/project 4010148llvm/test/CodeGen/AMDGPU memory-legalizer-private-system.ll memory-legalizer-private-cluster.ll

AMDGPU: Remove volatile from atomic tests

This is testing basic operation lowering, not volatileness.
Avoids a lot of test churn in a future change. Currently the codegen
is not actually seeing the volatile.
DeltaFile
+107-107llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
+75-75llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
+75-75llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+71-71llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+480-4806 files

LLVM/project 2e5fa3aclang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip builtins-amdgcn-gfx9.hip

[CIR][AMDGPU] Add support for AMDGCN fmed3 builtins (#223101)

Adds codegen for the following AMDGCN fmed3 builtins:

- __builtin_amdgcn_fmed3f (float)
- __builtin_amdgcn_fmed3h (half)

These are lowered to the corresponding `llvm.amdgcn.fmed3` intrinsic.
DeltaFile
+38-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx9.hip
+2-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+48-63 files

FreeBSD/src fa848d4libexec/rtld-elf rtld.c

rtld: more caution when parsing in digest_notes()

Incorrect ELF might have PT_NOTE slightly larger than the needed to
contain all notes, and the PT_NOTE size could be larger than one page.
Then rtld mmaps just the notes bytes to parse.  After the last note,
we iterate past the mapped region trying to read the Elf_Note header.
This was found in wild.

Require full elf note to fit into the [start_note, end_note) region to
continue the parsing.  Check it in stages, first verifying the Elf_Note
header structure fits, to be able to read the name and data length.
After that, check the whole note against limit.

Reported and tested by: makc
Reviewed by:    emaste
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D59635
DeltaFile
+10-5libexec/rtld-elf/rtld.c
+10-51 files

FreeBSD/src 2ef9731libexec/rtld-elf rtld.c

rtld.c: fix indent

Sponsored by:   The FreeBSD Foundation
MFC after:      3 days
DeltaFile
+1-1libexec/rtld-elf/rtld.c
+1-11 files

LLVM/project 4698a51llvm/include/llvm/BinaryFormat Dwarf.h Dwarf.def, llvm/lib/BinaryFormat Dwarf.cpp

[DWARF] Add DW_MSPACE_LLVM_* memory space encodings (#220766)

DW_AT_LLVM_memory_space is already defined in Dwarf.def, and the memory
space encodings it takes are already specified in
docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst, but the values
had no names in the source, so llvm-dwarfdump printed the attribute as a
bare integer.

Add the encodings via a HANDLE_DW_MSPACE macro alongside the existing
HANDLE_DW_ASPACE, define the MemorySpace enum, and add MemorySpaceString
and getMemorySpace. AttributeValueString then resolves the attribute, so
no changes are needed in the DWARF consumers themselves.

Unlike address spaces, memory space encodings are target-independent, so
MemorySpaceString takes no triple.
DeltaFile
+69-0llvm/test/tools/llvm-dwarfdump/AMDGPU/DW_AT_LLVM_memory_space.yaml
+25-0llvm/lib/BinaryFormat/Dwarf.cpp
+13-0llvm/include/llvm/BinaryFormat/Dwarf.def
+9-0llvm/include/llvm/BinaryFormat/Dwarf.h
+116-04 files

FreeNAS/freenas 1d38a74src/middlewared/middlewared/api/v26_0_0 s3.py, src/middlewared/middlewared/plugins/audit/schema s3.py

Harden truenas_s3 validation and rendering

Mirror the daemon's refusals in the API and the render: region
grammar, dotted-quad bucket names with leading zeros, duplicate audit
actions, colliding grant-heading labels. Enforce the one-way fields
(object lock, versioning) plus explicit object_ownership when leaving
MULTIPROTOCOL, unwind failed bucket creates fully, take naive access
key expiries as UTC, and keep each port's TLS posture across a
listener reset.

Derive base_hosts and truenas_version at render time, re-rendering on
network changes, for virtual-hosted addressing and the SOSAPI
ModelName. Extend the audit mask vocabulary to the daemon's 21
actions and the audit event schema to every operation it emits.
DeltaFile
+97-8src/middlewared/middlewared/plugins/truenas_s3/config.py
+76-13src/middlewared/middlewared/plugins/truenas_s3/bucket_crud.py
+64-3src/middlewared/middlewared/plugins/audit/schema/s3.py
+65-2tests/api2/test_s3_bucket.py
+38-7tests/api2/test_s3_config.py
+33-8src/middlewared/middlewared/api/v26_0_0/s3.py
+373-415 files not shown
+481-5511 files

NetBSD/pkgsrc n4hLzemnet/tigervnc distinfo Makefile, net/tigervnc/patches patch-unix_xserver_os_xsha1.c

   tigervnc: fix build on Linux
VersionDeltaFile
1.1+24-0net/tigervnc/patches/patch-unix_xserver_os_xsha1.c
1.35+2-1net/tigervnc/distinfo
1.92+2-1net/tigervnc/Makefile
+28-23 files

FreeNAS/freenas f3d5fe1src/middlewared/middlewared/api/v27_0_0 s3.py, src/middlewared/middlewared/plugins/audit/schema s3.py

Harden truenas_s3 validation and rendering

Mirror the daemon's refusals in the API and the render: region
grammar, dotted-quad bucket names with leading zeros, duplicate audit
actions, colliding grant-heading labels. Enforce the one-way fields
(object lock, versioning) plus explicit object_ownership when leaving
MULTIPROTOCOL, unwind failed bucket creates fully, take naive access
key expiries as UTC, and keep each port's TLS posture across a
listener reset.

Derive base_hosts and truenas_version at render time, re-rendering on
network changes, for virtual-hosted addressing and the SOSAPI
ModelName. Extend the audit mask vocabulary to the daemon's 21
actions and the audit event schema to every operation it emits.
DeltaFile
+97-8src/middlewared/middlewared/plugins/truenas_s3/config.py
+76-13src/middlewared/middlewared/plugins/truenas_s3/bucket_crud.py
+64-3src/middlewared/middlewared/plugins/audit/schema/s3.py
+65-2tests/api2/test_s3_bucket.py
+38-7tests/api2/test_s3_config.py
+34-9src/middlewared/middlewared/api/v27_0_0/s3.py
+374-425 files not shown
+483-5711 files

LLVM/project 3377fbdllvm/lib/CodeGen MachineBasicBlock.cpp, llvm/test/CodeGen/WebAssembly splitcriticaledge-physreg-liveness.mir

CodeGen: Clear physreg ranges after SplitCriticalEdge (#223172)

After critical edge spliting replaces a terminator, clear referenced
physreg ranges. The block's terminators may be replaced, and may
reference physical registers (e.g. WebAssebly's ARGUMENTS. When
LiveIntervals is available, repairIntervalsInRange only repairs virtual
registers, so the tracked physreg units were stale.

It feels like a bug that repairIntervalsInRange doesn't touch physregs,
but I've left that for a future change.

Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
DeltaFile
+61-0llvm/test/CodeGen/WebAssembly/splitcriticaledge-physreg-liveness.mir
+7-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+68-02 files

FreeBSD/ports 0eabba8x11/bosd distinfo Makefile

x11/bosd: Update to 10.3

Harden the warm-daemon IPC path. Switch the TESTS option to
TESTS_MAKE_ARGS helpers so the port no longer includes
bsd.port.options.mk.

Changelog:      https://github.com/FrauBSD/bosd/compare/10.2...10.3

Approved by:    fuz (mentor)
Reviewed by:    fuz (mentor)
Differential Revision:  https://reviews.freebsd.org/D59671
DeltaFile
+3-8x11/bosd/Makefile
+3-3x11/bosd/distinfo
+6-112 files

FreeBSD/ports 60c4ec8mail/thunderbird-esr Makefile distinfo

mail/thunderbird-esr: update to 153.3.0 (rc1)

Release Notes:
  https://www.thunderbird.net/en-US/thunderbird/153.3.0esr/releasenotes/

(cherry picked from commit b3ecd66fdfaf12ad21079105cd97b0a722550fef)
DeltaFile
+3-3mail/thunderbird-esr/distinfo
+1-1mail/thunderbird-esr/Makefile
+4-42 files

FreeBSD/ports b3ecd66mail/thunderbird-esr Makefile distinfo

mail/thunderbird-esr: update to 153.3.0 (rc1)

Release Notes:
  https://www.thunderbird.net/en-US/thunderbird/153.3.0esr/releasenotes/
DeltaFile
+3-3mail/thunderbird-esr/distinfo
+1-2mail/thunderbird-esr/Makefile
+4-52 files

LLVM/project 5bfc176clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-empty.cpp

[CIR] Accept a union whose empty member is [[no_unique_address]]

The record-wide reject for a member CIRGen marks empty is there for the
struct arm of mapCIRType, which reads such a member as an unnamed
bit-field standing for the bytes it occupies.  This does not apply to a
union, so the reject moves into the struct branch.

Which variants the classifier sees then falls to the union arm, and it
now reads that from each variant's own storage rather than from its
mark.  A zero-sized variant and one that is empty for the ABI are
skipped.  One whose mark says empty over storage that holds data is not.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+242-0clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
+166-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
+44-34clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+26-3clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
+478-374 files

LLVM/project 3f83cc8llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer InstrMaps.h VecUtils.h, llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes BundleVec.h

Reapply "[SandboxVec][VecUtils][NFC] BndlRef helper class" (#223483) (#223487)

This reverts commit 1d073217b664263f62ff01db623ed7542fde6fda.
DeltaFile
+43-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
+37-0llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
+14-15llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
+5-5llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.h
+9-0llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
+2-2llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrMaps.h
+110-226 files

NetBSD/pkgsrc XsUIbOdgeography/R-s2 Makefile

   R-s2: force C++17

   something sets this to build with C++20, but the code is not ready for this
   it uses features that were deprecated in C++17 and removed in C++20

   Force C++17 to fix the build.
VersionDeltaFile
1.13+7-8geography/R-s2/Makefile
+7-81 files

LLVM/project 68eab32llvm/test/CodeGen/AMDGPU mad-mix-lo.ll int_to_fp_narrow_i64.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fpow.ll

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+3,957-0llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
+72-373llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+221-220llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
+0-435llvm/test/Transforms/RelLookupTableConverter/relative_lookup_table.ll
+434-0llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
+286-146llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
+4,970-1,174125 files not shown
+9,025-2,732131 files

FreeBSD/ports 4b703c5multimedia/ffmpeg4 distinfo Makefile

multimedia/ffmpeg4: Update 4.4.7 => 4.4.8

Changelog:
https://git.ffmpeg.org/gitweb/ffmpeg.git/blob_plain/n4.4.8:/Changelog
https://github.com/FFmpeg/FFmpeg/blob/n4.4.8/Changelog

While here replace spaces with tabs.

PR:             298492
Sponsored by:   UNIS Labs (vvd, commit patch)
MFH:            2026Q3

(cherry picked from commit 41af21de2d1b8205cee5f38d6b410e9964e3e4cd)
DeltaFile
+63-63multimedia/ffmpeg4/Makefile
+3-3multimedia/ffmpeg4/distinfo
+66-662 files

LLVM/project 86edf90llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU mad-mix.ll

[AMDGPU][GlobalISel] Fold neg/abs modifiers when mad-mix selects the low half

selectVOP3PMadMixModsImpl re-runs the fneg/fabs match after rewriting Src
to the 32-bit register the 16-bit value is a half of, but only did so on
the isExtractHiElt path, not for isExtractLoElt.

The two halves are not symmetric. An fneg/fabs of a 32-bit float only
touches bit 31, which is the sign bit of the high half, so folding it
into a modifier on the selected high half is correct. The low half's sign
bit is bit 15, which such an fneg/fabs leaves alone, so only a modifier
that acts on each 16-bit element can be folded there. So the source must be
a 2 x 16-bit vector to fold it.
DeltaFile
+972-0llvm/test/CodeGen/AMDGPU/mad-mix.ll
+261-257llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
+26-32llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
+10-16llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
+9-6llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+1,278-3115 files

FreeBSD/ports c6ba817net/ucx/files patch-src_ucm_util_replace.c patch-src_ucs_type_float8.h

net/ucx: Update 1.20.1 => 1.22.0

Changelog:
https://github.com/openucx/ucx/releases/tag/v1.21.0
https://github.com/openucx/ucx/releases/tag/v1.22.0

PR:             298500
Sponsored by:   UNIS Labs (vvd, commit patch)
DeltaFile
+132-13net/ucx/files/patch-test_gtest_common_test__helpers.cc
+112-24net/ucx/files/patch-src_ucs_sys_sys.c
+118-0net/ucx/files/patch-src_uct_sm_mm_posix_mm__posix.c
+19-83net/ucx/files/patch-configure.ac
+41-26net/ucx/files/patch-src_ucs_type_float8.h
+3-55net/ucx/files/patch-src_ucm_util_replace.c
+425-20135 files not shown
+597-48041 files

LLVM/project 84ee9b5llvm/lib/Transforms/Vectorize VPlanConstruction.cpp, llvm/test/Transforms/LoopVectorize fmin-without-fast-math-flags.ll fmax-without-fast-math-flags.ll

[VPlan] Bail out on chained reductions in handleMaxMinNumReductions. (#223521)

handleMaxMinNumReductions does not support reduction chains, as the NaN
check directly checks the operand of the single min/max reduction.

Bail out for now to fix a crash.

Fixes https://github.com/llvm/llvm-project/issues/223430.
DeltaFile
+38-0llvm/test/Transforms/LoopVectorize/fmin-without-fast-math-flags.ll
+38-0llvm/test/Transforms/LoopVectorize/fmax-without-fast-math-flags.ll
+7-4llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+83-43 files

LLVM/project 2b680eellvm/include/llvm/Analysis RegionInfo.h DominanceFrontier.h, llvm/lib/Analysis DominanceFrontier.cpp RegionInfo.cpp

[Analysis] Fix GCC warnings on ABI annotations (#222286)

The GCC build is cluttered by type attribute warnings on some header
files:

```
llvm/include/llvm/Analysis/RegionInfo.h:898:41: warning: type attributes ignored after type is already defined [-Wattributes]
  898 | extern template class LLVM_TEMPLATE_ABI RegionBase<RegionTraits<Function>>;
      |                                         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```

The type attributes originate from PR #199019. The warnings occur
because the
specific template instantiation is triggered implicitly earlier, without
the
type attribute. This can be fixed by placing the extern template
declaration
before the implicit use.


    [5 lines not shown]
DeltaFile
+4-4llvm/include/llvm/Analysis/DominanceFrontier.h
+3-3llvm/lib/Analysis/RegionInfo.cpp
+4-2llvm/include/llvm/Analysis/RegionInfo.h
+2-2llvm/lib/Analysis/DominanceFrontier.cpp
+13-114 files