LLVM/project a8cd1aclldb/cmake/modules LLDBConfig.cmake, lldb/source/Plugins/Process CMakeLists.txt

[lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (#181283)

Due to libfbsdvmcore, adding new features requires modifying both
`ProcessFreeBSDKernelFVC` and `ProcessFreeBSDKernelKVM` which also
requires testing on both. This is highly inefficient while the user base
of fvc is currently invisible since most package manager don't ship
libfbsdvmcore with LLDB.

There is still demand for cross-platform kernel dump debugging. This
will be implemented in future either by cloning and embedding kvm
interface into LLDB or unifying dump formats to ELF core with
minidump-to-elf conversion tool on FreeBSD side.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+12-109lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.cpp
+1-14lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt
+13-1lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.h
+3-0llvm/docs/ReleaseNotes.md
+1-1lldb/source/Plugins/Process/CMakeLists.txt
+0-1lldb/cmake/modules/LLDBConfig.cmake
+30-1266 files

LLVM/project 025e11emlir/test/Dialect/Tosa tosa-narrow-f64-to-f32.mlir tosa-narrow-f64-to-f32-aggressive.mlir

[mlir][tosa] Use 0 values for the dense resource in tosa-narrow-* tests (#182321)

For the test portability between little-endian and big-endian, just use
zeros as the dense resource values. It doesn't test the actual narrowing
but tests that the other conversions went well.
DeltaFile
+2-2mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
+2-2mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
+2-2mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
+2-2mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
+8-84 files

FreeNAS/freenas 345ef1csrc/middlewared/middlewared/plugins/apps crud.py

Add validation to prevent multiple instances of flagged app

This commit adds changes to prevent installation of an app which has already been installed and is marked as an app which cannot have multiple instances installed.
DeltaFile
+16-1src/middlewared/middlewared/plugins/apps/crud.py
+16-11 files

LLVM/project b0bf771clang/test/CodeGenHIP builtins-amdgcn-vi-f16.hip

[AMDGPU] Removed _hip suffix from test names
DeltaFile
+22-22clang/test/CodeGenHIP/builtins-amdgcn-vi-f16.hip
+22-221 files

FreeNAS/freenas 17487dfsrc/middlewared/middlewared/api/v26_0_0 auth.py, src/middlewared/middlewared/plugins auth.py

NAS-139877 / 26.0.0-BETA.1 / Only issue single-use reconnect tokens (#18247)

This commit modifies the behavior login_ex requests for reauthentication
tokens to ensure that they are only always single-use. This removes a
difference between when we're in STIG mode and not, and corresponds with
current UI design where they basically will do token chaining on
reconnects.
DeltaFile
+19-0tests/api2/test_auth_token.py
+2-2src/middlewared/middlewared/api/v26_0_0/auth.py
+1-1src/middlewared/middlewared/plugins/auth.py
+22-33 files

OpenZFS/src c8a72a2module/icp/asm-x86_64/modes ghash-x86_64.S aesni-gcm-avx2-vaes.S, module/icp/include/modes gcm_asm_rename_funcs.h

ICP: AES-GCM assembly: remove unused Gmul functions

In the AES-GCM assembly files we are defining Gmul functions we
don't use anywhere.

Just remove the dead code.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Attila Fülöp <attila at fueloep.org>
Closes #18226
DeltaFile
+0-64module/icp/asm-x86_64/modes/ghash-x86_64.S
+0-36module/icp/asm-x86_64/modes/aesni-gcm-avx2-vaes.S
+0-1module/icp/include/modes/gcm_asm_rename_funcs.h
+0-1013 files

LLVM/project 793bb3fclang/include/clang/Basic BuiltinsAMDGPU.td, clang/test/CodeGenHIP builtins-amdgcn-vi-f16.hip

[AMDGPU] Update f16 builtin definitions to use _Float16 instead of __fp16
DeltaFile
+235-0clang/test/CodeGenHIP/builtins-amdgcn-vi-f16.hip
+11-11clang/include/clang/Basic/BuiltinsAMDGPU.td
+246-112 files

LLVM/project 663398dllvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

[NFC][SPIRV] Replace removeFromParent by eraseFromParent

`removeFromParent` doesn't deallocate the resources associated with the
`MachineInstruction`.

I was not able to remove all the uses of `removeFromParent` in the file.
DeltaFile
+3-3llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+3-31 files

LLVM/project 4ce9587llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)"

This reverts commit aab9412a69a07787e9ec98b25709d709b7b537a6.
DeltaFile
+4-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-41 files

LLVM/project 10a594dllvm/tools/bugpoint CrashDebugger.cpp Miscompilation.cpp

llvm: Delete bugpoint

For crash reduction, I don't think it does anything that llvm-reduce
can't. Pass pipeline reduction also has a separate reduction script.
The main thing there isn't a replacement tool is the miscompilation
reducer, but I'm not sure that's actually functioned for years.

There are still some references to bugpoint in various comments
and pieces of documentation that don't all necessarily make sense
to replace or remove. In particular there are a few passes documented
as "only for bugpoint", but I've left those alone in case they are
useful for manual reductions.
DeltaFile
+0-1,412llvm/tools/bugpoint/CrashDebugger.cpp
+0-1,080llvm/tools/bugpoint/Miscompilation.cpp
+0-849llvm/tools/bugpoint/ToolRunner.cpp
+0-451llvm/tools/bugpoint/ExecutionDriver.cpp
+0-410llvm/tools/bugpoint/ExtractFunction.cpp
+0-290llvm/tools/bugpoint/BugDriver.h
+0-4,49238 files not shown
+17-6,70644 files

LLVM/project 2a62585clang/lib/CIR/CodeGen CIRGenCUDANV.cpp, clang/test/CIR/CodeGenCUDA kernel-call.cu

[CIR][HIP] Add Stub body emission test coverage and Fix kernelHandle storage
DeltaFile
+12-3clang/test/CIR/CodeGenCUDA/kernel-call.cu
+5-8clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
+17-112 files

LLVM/project 6e9a736clang/lib/Analysis/LifetimeSafety Origins.cpp FactsGenerator.cpp, clang/test/Sema warn-lifetime-safety-suggestions.cpp

[LifetimeSafety] Fix 'this' origin handling in lambdas (#182300)

Fixes https://github.com/llvm/llvm-project/issues/182291
DeltaFile
+10-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+10-0clang/test/Sema/warn-lifetime-safety-suggestions.cpp
+4-4clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+24-103 files

LLVM/project f437315llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeHelper.h, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-waterfall-call.mir regbankselect-call.ll

[AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (#165747)

DeltaFile
+215-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
+158-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
+55-19llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+12-5llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
+12-5llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+5-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+457-296 files

LLVM/project 015ea59llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions (#179435)

A recent specification update has removed `FEAT_XS` gating for `tlbip *nxs`
instructions. It remains gated on `FEAT_XS` for `tlbi *nxs` instructions.
DeltaFile
+6-18llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+8-9llvm/test/MC/AArch64/armv9a-tlbip.s
+0-8llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+1-1llvm/lib/Target/AArch64/AArch64SystemOperands.td
+15-364 files

LLVM/project 010ac16llvm/utils/emacs tablegen-mode.el

[emacs] Rework tablegen mode

This commit reworks tablegen-mode to be derived from prog-mode and
removes a lot of the manual work that define-derived-mode does for you
these days, along with fixing other lints (such as an over-long
summary).

This is a major version bump because td-decorators-face has been
renamed to tablegen-decorators-face in order to not pollute other
namespaces.
DeltaFile
+43-62llvm/utils/emacs/tablegen-mode.el
+43-621 files

LLVM/project bcfff58llvm/include/llvm/Transforms/InstCombine InstCombiner.h, llvm/lib/Target/AMDGPU AMDGPUInstCombineIntrinsic.cpp

AMDGPU: Strip sign bit operations on llvm.amdgcn.trig.preop uses (#179712)

The instruction ignores the sign bit, so we can find the magnitude
source. The real library use has a fabs input which this avoids.

stripSignOnlyFPOps should probably go directly into PatternMatch in some
form.
DeltaFile
+64-0llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+11-0llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
+0-9llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+5-0llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+80-94 files

LLVM/project 680b56allvm/utils/emacs llvm-mir-mode.el llvm-mode.el, mlir/utils/emacs mlir-mode.el

[NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (#182074)

This mainly involved explicitly declaring minimum emacs versions for
setq-local and adding a lexical-binding annotaton.

The commit also removes some workarounds from the MLIR mode for Emacs 23
(!).
DeltaFile
+5-9mlir/utils/emacs/mlir-mode.el
+3-1llvm/utils/emacs/llvm-mir-mode.el
+3-1llvm/utils/emacs/llvm-mode.el
+11-113 files

LLVM/project fab8cb4clang/lib/CIR/CodeGen CIRGenBuiltin.cpp, clang/test/CIR/CodeGen builtins-x86.c

[CIR]Upstream support for IITDescriptor::Pointer and Vector types (#182112)

DeltaFile
+27-0clang/test/CIR/CodeGen/builtins-x86.c
+11-0clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+38-02 files

LLVM/project f446cbbllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.bitop3.ll

AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (#181877)

DeltaFile
+6-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+3-3llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
+9-32 files

LLVM/project 38d8047llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 inversed-icmp-to-gather.ll

[SLP]Do not mark for transforming to buildvector inversed compares

Inversed compares must remain vector nodes, they should be converted to
gathers to generate correct code.

Fixes issue reported in https://github.com/llvm/llvm-project/pull/181580#issuecomment-3926951332
DeltaFile
+36-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-1llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll
+37-22 files

FreeBSD/doc 3bb78f6website/content/en/releases/15.0R/ec2-ami-ids latest.adoc release.adoc

Add AMI IDs for 15.0-RELEASE

In addition to the original AMIs, a separate page lists the IDs of
the latest "patched" AMIs (aka 15.0-RELEASE-pN for the largest
relevant N).

Reviewed by:    carlavilla
Sponsored by:   Amazon
Differential Revision:  https://reviews.freebsd.org/D55292
DeltaFile
+613-0website/content/en/releases/15.0R/ec2-ami-ids/latest.adoc
+611-0website/content/en/releases/15.0R/ec2-ami-ids/release.adoc
+1,224-02 files

FreeNAS/freenas 2d1b38csrc/middlewared/middlewared/api/v25_10_0 vm.py, src/middlewared/middlewared/api/v25_10_1 vm.py

NAS-139876 / 26.0.0-BETA.1 / Correct memory units in VM API docs (#18246)

DeltaFile
+6-6src/middlewared/middlewared/api/v25_10_1/vm.py
+6-6src/middlewared/middlewared/api/v25_10_2/vm.py
+6-6src/middlewared/middlewared/api/v26_0_0/vm.py
+6-6src/middlewared/middlewared/api/v25_10_0/vm.py
+1-1src/middlewared/middlewared/plugins/vm/vm_memory_info.py
+25-255 files

FreeBSD/ports 4802819math/vampire Makefile, math/z3 distinfo Makefile

math/z3: Update 4.15.8.0 => 4.16.0.0

Approved by:            arrowd@ (maintainer)
Approved by:            db@, yuri@ (Mentors, implicit)
Differential Revision:  https://reviews.freebsd.org/D55374
DeltaFile
+3-3math/z3/distinfo
+1-1math/vampire/Makefile
+1-1math/z3/Makefile
+1-1math/z3/pkg-plist
+1-1security/py-angr/Makefile
+1-1sysutils/triton/Makefile
+8-83 files not shown
+11-109 files

FreeNAS/freenas 428effesrc/middlewared/middlewared/api/v25_10_0 vm.py, src/middlewared/middlewared/api/v25_10_1 vm.py

docs correction
DeltaFile
+6-6src/middlewared/middlewared/api/v25_10_0/vm.py
+6-6src/middlewared/middlewared/api/v25_10_1/vm.py
+6-6src/middlewared/middlewared/api/v25_10_2/vm.py
+6-6src/middlewared/middlewared/api/v26_0_0/vm.py
+1-1src/middlewared/middlewared/plugins/vm/vm_memory_info.py
+25-255 files

FreeNAS/freenas 648a716src/middlewared/middlewared/utils/libvirt adapter.py, tests/api2 test_container.py

NAS-139812 / 26.0.0-BETA.1 / Replace broken runtime assert with type annotation in DeviceAdapter (#18245)

## Problem

`DeviceAdapter.__init__` uses `assert isinstance(device.device_delegate,
DeviceDelegate)` but `DeviceDelegate` is only imported under
`TYPE_CHECKING`, causing a `NameError` at runtime (we regressed from
utils type annotations refactoring in
b7ca7319bb13fe829d14a25e84cf5f82ac99a125)

## Solution

Replace the runtime assert with a type annotation which is safe at
runtime but we still have clarity on what the delegate actually is and
also added an integration test so we can test this code path properly.
DeltaFile
+12-0tests/api2/test_container.py
+1-2src/middlewared/middlewared/utils/libvirt/adapter.py
+13-22 files

LLVM/project ac16ce3llvm/test/CodeGen/ARM machine-sink-multidef.mir

[ARM] Regenerate checks in machine-sink-multidef.mir (#182314)

DeltaFile
+23-18llvm/test/CodeGen/ARM/machine-sink-multidef.mir
+23-181 files

LLVM/project c3745fellvm/docs HowToSubmitABug.rst

docs: Delete incorrect code generation section of HowToSubmitABug (#182315)

I've never used this. Based on the description here, I'm assuming
it relied on the C backend, which was removed in 2012.
DeltaFile
+0-68llvm/docs/HowToSubmitABug.rst
+0-681 files

FreeNAS/freenas 46903f3src/middlewared/middlewared/plugins/ups config.py __init__.py

NAS-139871 / 26.0.0-BETA.1 / Fix UPS plugin (#18243)

## Problem

During plugin refactoring for type changes, updates were recently
introduced in the **part service workflow** under `NAS-139724`.

These changes caused a regression that broke the **UPS plugin
functionality**, as it was not aligned with the updated workflow.

---

##  Solution

Update and synchronize the UPS plugin implementation to be compatible
with the changes introduced in `NAS-139724`.

This restores proper UPS plugin behavior and ensures compatibility with
the refactored part service workflow.

    [7 lines not shown]
DeltaFile
+9-4src/middlewared/middlewared/plugins/ups/config.py
+0-8src/middlewared/middlewared/plugins/ups/__init__.py
+9-122 files

LLVM/project 6fdbcf6llvm/docs/CommandGuide llc.rst lli.rst, llvm/tools/llc llc.cpp

tools: Remove untested PluginLoader includes (#117644)

As far as I can tell there are 2 parallel plugin mechanisms.
opt -load=plugin does not work, and is ignored. opt -load-pass-plugin
does work. PluginLoader.h forces a static definition of the "load"
cl::opt into included TUs. Delete the cases with no tests.
DeltaFile
+0-6llvm/docs/CommandGuide/llc.rst
+0-5llvm/docs/CommandGuide/lli.rst
+0-1llvm/tools/llc/llc.cpp
+0-1llvm/tools/lli/lli.cpp
+0-134 files

FreeBSD/src 3a0c63ashare/man/man4 vmm.4

vmm.4: Fix width

Reported by:    ziaee
Fixes:          d26c8ae527bb ("vmm.4: Add information on VM access control")
DeltaFile
+1-1share/man/man4/vmm.4
+1-11 files