[SPIRV] Fix disabling of default extensions (#183325)
If you pass `-ExtName` to the `--spirv-ext` command line option. that
should disable the extension. However some vendors have some extensions
enabled by default when using a triple with that vendor, and disabling
an extension with the option did not effect the default extensions.
This PR makes it so disabling an extension with the `--spirv-ext` option
actually disables the extension.
The problem was we only considered the disabled extension when parsing
the arguments for `--spirv-ext`, but the default extensions are added
separately, so we need to store the disabled extensions and factor them
in when computing the final extension set to use.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
ValueTracking: Special case fmul by llvm.amdgcn.trig.preop
This is another instance of the logic from #183159. If we know
one source is not-infinity, and the other source is less than or
equal to 1, this cannot overflow. Special case llvm.amdgcn.trig.preop,
as a substitute for proper range tracking. This almost enables pruning
edge case handling in trig function implementations, if not for the
recursion depth limit (but that's a problem for another day).
ValueTracking: Teach computeKnownFPClass that multiply by <=1 cannot overflow
If one operand is known not-inf, that can be propagated if the other operand is
known to have a magnitude <= 1.
This enables elimination of some inf checks inside the implementation of trig
functions when the input is known not-inf.
fixup! Move code to `AArch64ExpandPseudoInsts` and `getTgtMemIntrinsic`
Move code to `AArch64ExpandPseudoInsts` and `getTgtMemIntrinsic`
and use tablegen pattern for intrinsic, plus other small review changes.
[AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin
Add `__arm_atomic_store_with_stshh` implementation as defined
in the ACLE. Validate that the arguments passed are correct, and
lower it to the stshh intrinsic plus an atomic store with the
allowed orderings.
Gate this on FEAT_PCDPHINT so that availability matches
hardware support for the `STSHH` instruction. Use an i64
immediate and side-effect modeling to satisfy tablegen and decoding.
[Hexagon] Add missing early architecture features to V81 processor (#183499)
V81 was missing ArchV5, ArchV55, ArchV60, and ArchV62 in its feature
list, causing instructions requiring these architecture versions to fail
during compilation.
[libc++] Introduce a escape hatch for the changed behavior of map and set search operations (#183190)
In #155245, we implemented an optimization to std::map and std::set
search operations. That optimization took advantage of something that is
guaranteed by the Standard, namely that the comparator provided to the
associative container is a valid strict weak ordering.
Sadly, some code in the wild did not satisfy this requirement, such as
Boost.ICL: boostorg/icl#51
Since this can have extremely tricky runtime consequences, this patch
introduces a temporary escape hatch for the LLVM 22 release that allows
reverting to the previous behavior. It also explicitly calls out the
change in the release notes, adds some regression tests and adds debug
mode support for catching some of these invalid predicates.
Fixes #183189
www/caddy: Remove add handler shortcut command (#5260)
The add handler shortcut button needed multiple workarounds and still broke regularly due to subtle race conditions.
[AMDGPU][True16] change vdst_in regclass and remove opsel for cvt_pk_f8_fp32 pattern (#179995)
Two changes:
1. int_amdgcn_cvt_pk_fp/bf8_f32 takes a i32 as a tied input, and this
tied input is passed to cvt_pk_f8_fp32 as a tied vdst_in. In true16 mode
the vdst_in is in vgpr16. Since this i32 could be in sreg32, need to
copy it to vgpr32 first before extract_subreg.
2. remove SRCMODS.DST_OP_SEL from cvt_pk_f8_fp32 pattern in true16 mode.
The opsel is not needed since the hi/lo16 will be clobbered by the
following register rewrite/allocation pass and this const opsel causes
conflictions
[flang] Silence build warning (#183393)
Add a [[maybe_unused]] to a parameter of a function with several
constexpr ifs, some of whose branches don't use the parameter.
[flang] Fix crash on error case (#183338)
A named constant implicit-shape array with a non-constant lower bound is
an error case. Emit an error message rather than crashing.
