ixgbe: Leave run-state publication to iflib during FDIR recovery
Rebuilding the Flow Director tables does not initialize the interface
or restore its queues. Do not set IFF_DRV_RUNNING from that operation:
iflib owns the flag, and may have cleared it while a watchdog reset is
pending. Restoring it here could admit traffic before the deferred
stop and initialization have run.
Keep the table rebuild and Flow Director interrupt re-enable unchanged.
This path is conditional on IXGBE_FDIR.
MFC after: 2 weeks
Sponsored by: BBOX.io
[CIR] Accept `_BitInt` wider than 128 bits in x86_64 callconv lowering
With byval in place, a `_BitInt` wider than 128 bits can classify
Indirect and flow through the same byval/sret path as an oversized
aggregate.
That turned up a latent bug, fixed here since it was not reachable or
testable before: the byval/sret pointee type was using the raw declared
width instead of the padded storage width (e.g. `i200` instead of
`i256`), understating the copy size.
Widths whose padded storage integer is not a whole number of 16 bytes,
such as `_BitInt(129)` at `i192`, still have no in-memory layout in CIR
and now reach that gap through the byval and sret pointee instead of
through the classifier. They stay NYI.
Drop the opt-out from the three CIR lit tests gated on this.
Assisted-by: Cursor / claude-opus-5
zdb: Allow filtering on zvol objects
Allow "v" flag for object ID range filters for filtering on zvol
objects. Also, fixup tests so that "v" is now considered a valid
flag.
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Glenn Washburn <development at efficientek.com>
Closes #19069
[docs] Repair stale LLVM documentation links
Use the Sphinx ref role for the IR2Vec section label so clean Sphinx
builds resolve it correctly. Remove the dangling BuildingAJIT Chapter 5
navigation text because that chapter no longer exists.
Fixes follow-up issues in #222506.
Reland "[llvm][AArch64] Ensure stack alignment in non-sibcall tail calls with FPDiff" (#220406)
When a caller has a non-multiple of the minimum stack alignment more
argument stack space than the callee it is tail calling, we need to ensure that
the resulting FPDiff's magnitude has been rounded up to a multiple of the
platform's minimum stack alignment.
In this re-land there is a fixup to 234ce03692ede13ffd2fcb35570d801c1e332814,
which, because of the wrong order, wasn't actually moving NumBytes after
FPDiff had been re-aligned.
rdar://184474075
ARM: Track CPSR liveness in Thumb2SizeReduction without kill flags
Thumb2SizeReduction narrows a 32-bit instruction to its flag-setting
16-bit form only when CPSR is dead afterwards. It determined this from
kill flags on CPSR operands. Kill flags have been semi-deprecated
for over a decade, so avoid relying on them. Liveness should be evaluated
as a reverse walk over a block.
The existing forward walk over the block is still necessary as a separate
step for the different A9 avoidCPSRPartialUpdate optimization.
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
(NFC)[Clang][Driver] Add ToolChain::GetFilePathIfExists and use it (#221063)
Replaces patterns like `if (TC.GetFilePath("file") != "file")` to avoid
repeating `"file"`.
IR: Add verifier checks and LangRef for llvm.loop.align
Verify the nested !{!"llvm.loop.align", i32 N} tag.
Require exactly two operands, an integer constant of type i32 or smaller,
and a positive power-of-two value
Co-authored-by: Claude (Claude-Opus-4.8)
ice: Use the mirror interface softc in PF callbacks
PF iflib callbacks receive struct ice_softc, not struct ice_mirr_if.
Resolve the mirror interface through sc->mirr_if before checking or
resetting subinterface state.
Use the same mirror softc when rebuilding its VSI. This records the
required subinterface reset in the state consumed by the PF callback,
rather than overlaying the PF softc and leaving rebuilt queues stopped.
MFC after: 2 weeks
Sponsored by: BBOX.io
ixl: Set critical-error state bits independently
ixl_set_state() takes a bit index, not a bit mask. ORing the
reset request and critical error indices produced the global reset
index, so a critical interrupt could mask its cause without scheduling
the intended PF reset.
Set both state bits explicitly.
MFC after: 2 weeks
Sponsored by: BBOX.io
[SystemZ][z/OS] Handle constants with initializers with relocations
When the initializer of a constant needs relocations, the constant
cannot be placed into the code section, because the loader needs
a writable section to fixup the relocation.
This change
- sets the relocation model for z/OS to `DynamicNoPIC`, which better
fits the relocation handling than `Static`, and
- treats section kind `ReadOnlyWithRel` like a variable.
vmxnet3: Propagate device-enable failure to iflib
Do not let iflib publish a running interface when the virtual device
rejected its enable command. Mark initialization failed and leave the
interface stopped.
MFC after: 2 weeks
Sponsored by: BBOX.io
[BOLT][AArch64][Android] Only the dumping thread can longjmp (#222719)
`__bolt_instr_recovery_active` is a process global flag and the reader
in `boltHandleFatalAndRecover()` runs on any thread. When a dump is in
flight, another thread that fails `assert()` or exhausts `GlobalAlloc`
in `instrumentIndirectCall()` could see the flag set, longjmp with the
dumping thread's buffer and restore the dump thread's sp/fp/lr. This
is wrong since the thread would then run on the dumping thread's stack
and later release a mutex that it does not own or hold.
`GlobalWriteProfileMutex` already serializes the writers, so one buffer
would be sufficient; only the reader side needs to know who owns the
buffer. Replace the flag with `__bolt_instr_recovery_tid` holding the
owner's thread ID, and longjmp only when it matches `__gettid()`. Other
threads will fall through to just record the failure and return.
Added a `__gettid()` syscall wrapper, for aarch64 only.
Assited-by: opus
[RISCV] Change RISCVABI::computeTargetABI() to return Expected<ABI>
Return Expected<ABI> instead of printing to errs()/reportFatalUsageError
internally, so callers decide whether to fall back to the default ABI
or treat the failure as fatal, and so it's unit-testable. Also fold the
duplicated Hard-float 'f'/'d' ABI checks from RISCVAsmParser.cpp and
RISCVISelLowering.cpp into computeTargetABI(), and add RISCVBaseInfoTest
coverage for the error paths.
This change was created with the help of AI tools
Reviewed By: lenary
Pull Request: https://github.com/llvm/llvm-project/pull/213410
