LLVM/project a89ab72clang-tools-extra/clang-doc Representation.h

Fix comment
DeltaFile
+1-1clang-tools-extra/clang-doc/Representation.h
+1-11 files

LLVM/project 0b9dc1blldb/include/lldb/ValueObject DILAST.h, lldb/source/ValueObject ValueObject.cpp DILEval.cpp

[LLDB] Add assignment to DIL. (#190223)

Add the ability for DIL to recognize and process assignment, updating
program variables. Recognizes '=', '+=' and '-=' operators. Increment
and decrement ('++' and '--') will be added in a separate (future) PR.
"*=" and "/=" need to wait until DIL handles multiply and divide
operators.
DeltaFile
+185-0lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
+44-48lldb/source/ValueObject/ValueObject.cpp
+83-0lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILCompositeAssign.py
+70-0lldb/source/ValueObject/DILEval.cpp
+31-2lldb/source/ValueObject/DILParser.cpp
+14-11lldb/include/lldb/ValueObject/DILAST.h
+427-619 files not shown
+498-7315 files

LLVM/project 5c4e85allvm/docs/AMDGPU AMDGPUAsmGFX12.rst, llvm/lib/Target/AArch64 AArch64SystemOperands.td

Merge branch 'main' into users/kasuga-fj/loop-interchange-fix-non-phi-lcssa-use
DeltaFile
+6,598-111llvm/test/CodeGen/X86/clmul-vector.ll
+3,092-2,392llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+1,087-1,602llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
+1,547-723llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+1,521-697llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+1,044-1,044llvm/lib/Target/AArch64/AArch64SystemOperands.td
+14,889-6,5691,731 files not shown
+60,651-34,9761,737 files

FreeBSD/ports fc2af49converters/dos2unix distinfo Makefile

converters/dos2unix: update to 7.5.6

Changes:        https://waterlander.net/dos2unix/doc/NEWS.txt
MFH:            2026Q2
(cherry picked from commit edd93c216d8d186b25333892411ff1d4004d62b0)
DeltaFile
+3-3converters/dos2unix/distinfo
+1-1converters/dos2unix/Makefile
+4-42 files

FreeBSD/ports edd93c2converters/dos2unix distinfo Makefile

converters/dos2unix: update to 7.5.6

Changes:        https://waterlander.net/dos2unix/doc/NEWS.txt
MFH:            2026Q2
(cherry picked from commit 4039edf8448f6b4a537bf208abe4ae6e8d4176ec)
DeltaFile
+3-3converters/dos2unix/distinfo
+1-1converters/dos2unix/Makefile
+4-42 files

LLVM/project 8d93c0ellvm/test/Transforms/LoopInterchange non-phi-uses-lcssa-phi.ll

address review
DeltaFile
+4-1llvm/test/Transforms/LoopInterchange/non-phi-uses-lcssa-phi.ll
+4-11 files

LLVM/project 4169b17clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR][NFC] Remove unused DataLayout in array lowering (#201408)

The per-element loop in CIRAttrToValue::visitCirAttr(ConstArrayAttr) constructed an mlir::DataLayout for every element of an ArrayAttr-backed constant array and never used it.  Constructing a DataLayout walks the parent ops to gather the layout spec, so for an N-element array this was N redundant constructions on the lowering path.  Removing the dead local is NFC -- the generated IR is unchanged.

Split out of #198427, where it was flagged as an unrelated drive-by.
DeltaFile
+0-1clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+0-11 files

FreeBSD/ports a20df63sysutils/rpi-usbboot Makefile pkg-plist, sysutils/rpi-usbboot/files patch-Makefile patch-main.c

sysutils/rpi-usbboot: Raspberry Pi USB device provisioning tool

Reviewed by:    emaste
Tested by:      emaste
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D57317
DeltaFile
+22-0sysutils/rpi-usbboot/Makefile
+18-0sysutils/rpi-usbboot/files/patch-Makefile
+11-0sysutils/rpi-usbboot/files/patch-main.c
+7-0sysutils/rpi-usbboot/pkg-plist
+5-0sysutils/rpi-usbboot/pkg-descr
+3-0sysutils/rpi-usbboot/distinfo
+66-01 files not shown
+67-07 files

LLVM/project f928d8fllvm/docs/AMDGPU AMDGPUAsmGFX12.rst, llvm/test/CodeGen/AMDGPU/GlobalISel frem.ll

rebase now that dependencies have landed

Created using spr 1.3.8-beta.1
DeltaFile
+6,598-111llvm/test/CodeGen/X86/clmul-vector.ll
+3,092-2,392llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+2,237-668llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,211-642llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+1,087-1,602llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
+0-2,624llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+15,225-8,0392,898 files not shown
+114,381-61,8652,904 files

LLVM/project 1941866llvm/docs/AMDGPU AMDGPUAsmGFX12.rst, llvm/test/CodeGen/AMDGPU/GlobalISel frem.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+6,598-111llvm/test/CodeGen/X86/clmul-vector.ll
+3,092-2,392llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+2,237-668llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,211-642llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+1,087-1,602llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
+0-2,624llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+15,225-8,0392,898 files not shown
+114,381-61,8652,904 files

LLVM/project 420b8b3llvm/tools/llvm-exegesis/lib MCInstrDescView.cpp MCInstrDescView.h, llvm/unittests/tools/llvm-exegesis/Mips SnippetGeneratorTest.cpp

[llvm-exegesis] Support LookupRegClassByHwMode in exegesis Instruction::create

This resolves the TODO for LookupRegClassByHwMode support in llvm-exegesis by
passing the MCSubtargetInfo to Instruction::create and calling
getOpRegClassID with the active HwMode.

This also updates MemoryUse test expectations for Mips, as the target now
correctly resolve HwMode-dependent memory register operands (MSA128F16 in
Mips and post-#177073 BasePtrRegClass for RISC-V).

Pull Request: https://github.com/llvm/llvm-project/pull/200525
DeltaFile
+14-10llvm/tools/llvm-exegesis/lib/MCInstrDescView.cpp
+6-2llvm/tools/llvm-exegesis/lib/MCInstrDescView.h
+1-2llvm/unittests/tools/llvm-exegesis/Mips/SnippetGeneratorTest.cpp
+2-1llvm/tools/llvm-exegesis/lib/LlvmState.cpp
+23-154 files

LLVM/project 91b0052llvm/lib/IR Verifier.cpp, llvm/lib/Transforms/Utils InlineFunction.cpp

Remove the optional bitcast between a musttail call and its ret (#201280)

Under opaque pointers the only bitcast the verifier could accept in this
position is a no-op ptr->ptr cast

Drop it and reduce isTypeCongruent to a plain type equality check
DeltaFile
+9-34llvm/lib/IR/Verifier.cpp
+32-0llvm/test/Bitcode/musttail-bitcast-upgrade.ll
+0-24llvm/test/Transforms/CallSiteSplitting/musttail.ll
+2-21llvm/lib/Transforms/Utils/InlineFunction.cpp
+0-19llvm/test/Transforms/SafeStack/X86/musttail.ll
+0-14llvm/test/Instrumentation/AddressSanitizer/musttail.ll
+43-1125 files not shown
+57-13411 files

LLVM/project 4720932mlir/include/mlir/Dialect/OpenACC OpenACCOps.td, mlir/lib/Dialect/OpenACC/IR OpenACC.cpp

[mlir][acc] ACCComputeLowering needs to account for device_type par (#201267)

When assigning parallelism for compute constructs or loops, device_type
parallelism must be first considered as a group for all available (gang,
worker, vector) - if any of these have device_type setting, then those
are the only ones that should be considered. Only if the loop has no
device_type specific parallelism then default parallelism should be
assigned.
DeltaFile
+41-3mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+23-6mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
+25-0mlir/test/Dialect/OpenACC/acc-compute-lowering-compute-device-type.mlir
+23-0mlir/test/Dialect/OpenACC/acc-compute-lowering-loop-device-type.mlir
+12-0mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+124-95 files

LLVM/project e43adaelldb/docs/resources contributing.rst contributing.md, lldb/docs/use ondemand.rst ondemand.md

[lldb][docs] Convert simple RST pages to Markdown (NFC) (#201256)

Convert nine short, low-risk RST docs to MyST Markdown as the first
batch of an incremental RST -> Markdown migration. Subsequent batches
will cover the rest.

Verified by building the docs on origin/main and on this branch with
identical sphinx flags and diffing the rendered HTML. Seven of nine
pages are byte-identical.

contributing.html differs in 42 lines, all attributable to `{doc}` xrefs
replacing RST hyperlinks to sibling pages (`reference external` ->
`reference internal`) and CommonMark collapsing two-spaces-after- period
to one.

ondemand.html differs in 26 lines because two bulleted lists that
followed a paragraph with no blank-line separator originally rendered as
literal `- ...` text in both RST and Markdown. The conversion tool
preserved that by emitting `\-`; this patch instead inserts a blank line

    [5 lines not shown]
DeltaFile
+0-164lldb/docs/resources/contributing.rst
+0-155lldb/docs/use/ondemand.rst
+150-0lldb/docs/use/ondemand.md
+0-149lldb/docs/use/repeat-commands.rst
+147-0lldb/docs/resources/contributing.md
+142-0lldb/docs/use/repeat-commands.md
+439-46812 files not shown
+723-76818 files

LLVM/project f4718f8llvm/docs/AMDGPU AMDGPUAsmGFX12.rst, llvm/test/CodeGen/AMDGPU/GlobalISel frem.ll

clang-format

Created using spr 1.3.8-beta.1
DeltaFile
+6,598-111llvm/test/CodeGen/X86/clmul-vector.ll
+3,092-2,392llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+2,237-668llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,211-642llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+1,087-1,602llvm/docs/AMDGPU/AMDGPUAsmGFX12.rst
+0-2,624llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+15,225-8,0392,870 files not shown
+113,480-60,9602,876 files

LLVM/project 09020f9llvm/test/CodeGen/AMDGPU fsqrt.f32.ll llvm.amdgcn.frexp.exp.ll, llvm/test/CodeGen/AMDGPU/GlobalISel frem.ll fdiv.f32.ll

AMDGPU/GlobalISel: RegBankLegalize rules for llvm.amdgcn.frexp.exp (#201178)
DeltaFile
+3,092-2,392llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
+578-409llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
+360-16llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.ll
+126-14llvm/test/CodeGen/AMDGPU/llvm.amdgcn.frexp.exp.f16.ll
+12-12llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll
+7-7llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
+4,175-2,8502 files not shown
+4,187-2,8548 files

LLVM/project 6cfa1a0clang/lib/CodeGen CGCUDANV.cpp, clang/test/CodeGenHIP offload-pgo-sections.hip

Revert "[PGO][AMDGPU] Add basic HIP offload PGO support (#177665)" (#201416)

This broke profiling builds on Windows by switching the profile library
to link against the dynamic CRT; see discussion on the PR.

There were already a number of issues reported and fixed after this PR.
Rather than piling on the fixes (and this one may need some work),
revert back to green for now to let the project recover.

This reverts commit 5db13643f4b7038db0ca304d9f8900122502935c.

Additionally, this reverts the followup PRs in
635e120fb87304924508a7a204574727e3c37363,
2766733764f4bdf8399d48c0225e9c64bdfa95f7,
4c33844b4b560f24b2a3a0cc689d73510cb01ad5, and
5eca8b67ff3c5f371141d54b6e4544a0ebe77fdb:

"[PGO][HIP] Stop pulling ROCm.o into every PGO host link (#200101)"
"[compiler-rt][profile] Add COMPILER_RT_BUILD_PROFILE_ROCM option

    [4 lines not shown]
DeltaFile
+0-897compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
+0-152clang/lib/CodeGen/CGCUDANV.cpp
+26-83llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+3-56compiler-rt/lib/profile/CMakeLists.txt
+0-50clang/test/CodeGenHIP/offload-pgo-sections.hip
+0-36llvm/test/Instrumentation/InstrProfiling/gpu-weak.ll
+29-1,2748 files not shown
+32-1,40714 files

FreeBSD/ports 281839email/roundcube-tls_icon distinfo Makefile

mail/roundcube-tls_icon: update to 2.0.0

This adds roundcube 1.7 compatibility.
DeltaFile
+3-3mail/roundcube-tls_icon/distinfo
+1-1mail/roundcube-tls_icon/Makefile
+4-42 files

FreeBSD/ports 87fb3c9mail/roundcube-gravatar distinfo Makefile

mail/roundcube-gravatar: update to 1.7

This adds roundcube 1.7 compatibility.
PR:             295818
DeltaFile
+3-3mail/roundcube-gravatar/distinfo
+1-1mail/roundcube-gravatar/Makefile
+4-42 files

FreeBSD/ports 3d69120audio/blucli Makefile, audio/go-librespot Makefile

various: Bump go ports for go-1.25.11 / go-1.26.4
DeltaFile
+1-1audio/blucli/Makefile
+1-1audio/go-librespot/Makefile
+1-1audio/gonic/Makefile
+1-1audio/murmur-cli/Makefile
+1-1audio/pms-devel/Makefile
+1-1audio/sonicradio/Makefile
+6-6757 files not shown
+763-748763 files

FreeBSD/ports af1da5flang/go126 distinfo Makefile

lang/go126: Update to 1.26.4

Changes:
  go1.26.4 (released 2026-06-02) includes security fixes to the
  crypto/x509, mime, and net/textproto packages, as well as bug fixes to
  the compiler, the runtime, the go fix command, and the crypto/fips140
  package.

MFH:            2026Q2
Reviewed by:    adamw
Differential Revision:  https://reviews.freebsd.org/D57407

(cherry picked from commit afbda080c88aab06c89a536eb723dae5559d05e1)
DeltaFile
+13-13lang/go126/distinfo
+2-2lang/go126/Makefile
+15-152 files

FreeBSD/ports 52af21alang/go125 distinfo Makefile

lang/go125: Update to 1.25.11

Changes:
  go1.25.11 (released 2026-06-02) includes security fixes to the
  crypto/x509, mime, and net/textproto packages, as well as bug fixes to
  the compiler and the runtime.

MFH:    2026Q2
Reviewed by:    adamw
Differential Revision:  https://reviews.freebsd.org/D57406

(cherry picked from commit 329713ce942821d5fd5130fb37560765711aee17)
DeltaFile
+3-3lang/go125/distinfo
+1-1lang/go125/Makefile
+4-42 files

LLVM/project 6139ab9llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-extract-subvector-loop.ll

[SelectionDAG] Fold extracts of subvector inserts

Fold extract_subvector(insert_subvector(...)) when the extraction is
outside the inserted subvector or the inserted subvector only amends
the extracted

In particular,
1. vA extract_subvector (vB insert_subvector(vB X, vC Y, C1), C2) =>
vA extract_subvector(X, C2) when [C2, C2 + A) intersect [C1, C1 + C)
is the empty set
2. ... => extract_subvector(Y, C2 - C1) if [C2, C2 + Y) is a subset of
[C1, C1 + C) - an existing simplification
3. ... => vA insert_subvector(vA extract_subvector(vB X, C2), vC Y, C1 - C2)
if [C1, C1 + C) is a subset of [C2, C2 + A) - that is, if you're only
updating the extracted sub-part.

Adds a regresssion tests for an infinite SelectionDAG cycle that is
fixed by a stack of commits that ends with this one.


    [3 lines not shown]
DeltaFile
+72-56llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+44-48llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+45-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-extract-subvector-loop.ll
+28-7llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+15-17llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+4-8llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
+208-1361 files not shown
+212-1447 files

FreeBSD/ports dd8dc2aarchivers/nfpm Makefile, archivers/plakar Makefile

various: Bump go ports for go-1.25.11 / go-1.26.4
DeltaFile
+1-1sysutils/nginx-ui/Makefile
+1-1archivers/nfpm/Makefile
+1-1archivers/plakar/Makefile
+1-1archivers/unpackerr/Makefile
+1-1audio/blucli/Makefile
+1-1sysutils/mackerel-agent/Makefile
+6-6790 files not shown
+796-634796 files

FreeBSD/ports afbda08lang/go126 distinfo Makefile

lang/go126: Update to 1.26.4

Changes:
  go1.26.4 (released 2026-06-02) includes security fixes to the
  crypto/x509, mime, and net/textproto packages, as well as bug fixes to
  the compiler, the runtime, the go fix command, and the crypto/fips140
  package.

MFH:            2026Q2
Reviewed by:    adamw
Differential Revision:  https://reviews.freebsd.org/D57407
DeltaFile
+13-13lang/go126/distinfo
+2-2lang/go126/Makefile
+15-152 files

FreeBSD/ports 329713clang/go125 distinfo Makefile

lang/go125: Update to 1.25.11

Changes:
  go1.25.11 (released 2026-06-02) includes security fixes to the
  crypto/x509, mime, and net/textproto packages, as well as bug fixes to
  the compiler and the runtime.

MFH:    2026Q2
Reviewed by:    adamw
Differential Revision:  https://reviews.freebsd.org/D57406
DeltaFile
+3-3lang/go125/distinfo
+1-1lang/go125/Makefile
+4-42 files

LLVM/project 5fc695cllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 vector-shuffle-combining-avx512bwvl.ll

[SelectionDAG] Fold subvector inserts into concat operands

Push insert_subvector into the containing CONCAT_VECTORS operand when the insertion is wholly contained there.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+34-10llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-36llvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
+42-462 files

LLVM/project 1c88bd7lldb/include/lldb/Host MainLoopBase.h, lldb/source/Host/common MainLoopBase.cpp

[lldb] Preserve FIFO order for equal time MainLoop callbacks (#199056)

Co-authored-by: Adrian Prantl <adrian.prantl at gmail.com>
DeltaFile
+24-5lldb/include/lldb/Host/MainLoopBase.h
+6-5lldb/source/Host/common/MainLoopBase.cpp
+30-102 files

LLVM/project 3f67f16llvm/lib/Target/RISCV RISCVRegisterInfo.cpp RISCVFrameLowering.cpp, llvm/test/CodeGen/RISCV stack-offset-large.ll

[RISCV] Allow 64-bit fixed frame-offsets on RV64 (#201338)

Some HPC code requires a _very_ large stack. GCC also allows 64-bit
frame-offsets on 64-bit systems.

Since RISCVInstrInfo::movImm() supports materializing 64-bit immediates
the existing framework already handles the lowering correctly.

This patch only enables support for 64-bit _fixed_ frame offsets.
Scalable offsets call RISCVInstrInfo::mulImm() which doesn't seem to
support 64-bit calculations yet. This should be fine since there'd have
to be more than 2^31 RVV spills for this case to happen.
DeltaFile
+192-0llvm/test/CodeGen/RISCV/stack-offset-large.ll
+10-5llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+3-3llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+205-83 files

LLVM/project 2cfc6ebllvm/test/CodeGen/AArch64 sve-fixed-vector-llrint.ll sve-fixed-vector-lrint.ll, llvm/test/CodeGen/AMDGPU bf16.ll

[SelectionDAG] Fold extracts spanning concat operands

Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+992-904llvm/test/CodeGen/AMDGPU/bf16.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+196-176llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+142-140llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+120-120llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+1,824-1,79811 files not shown
+2,204-2,27917 files