[lldb][test] Fix Makefile for TestInlineSourceFiles.py (#194078)
The test did not build hidden.o with a custom target triple when
specified. Use CFLAGS from Makefile.rules to fix.
NAS-140745 / 27.0.0-BETA.1 / remove USB boot logic in truenas-initrd.py (#18771)
## Summary
Remove the USB boot-pool detection and
`ZFS_INITRD_POST_MODPROBE_SLEEP=15` workaround from `truenas-initrd.py`.
The code was added five years ago during SCALE alpha to address a single
user's boot failure and has sat untouched since, despite USB boot no
longer being a supported configuration on TrueNAS.
## History
The workaround was introduced in commit
[ead10f29e5](https://github.com/truenas/middleware/commit/ead10f29e58fc185062c1abb2418a53cecf4a216)
(2021-01-20) to address
[NAS-108931](https://ixsystems.atlassian.net/browse/NAS-108931) —
*"TrueNAS SCALE fails to boot from USB"* — reported against
SCALE-20.12-ALPHA. The reporter's USB boot disk was not enumerated by
the kernel in time for `zpool import boot-pool`, so the import failed
[43 lines not shown]
[Offload] Make kernel dynamic memory handling more generic (#194403)
Make sure we do not get unexpected NumThreads and NumBlocks values when
launching non-bare kernels, and generalize the computation of the
dynamic block memory allocation to handle multi-dimensional blocks.
The DynBlockMem fallback is never used in a non-bare context where
`NumBlocks[1]` and `NumBlocks[2]` are not 1 so the code was correct, but
this patch makes sure that assumption is made explicit, and also
future-proofs the code in case we decide to allow multi-dimensional
blocks for fallback dyn block mem in some path.
[Clang] Avoid an extra `FunctionPrototypeScope` for lambda trailing requires-clauses (#194068)
`ParseTrailingRequiresClause` currently always creates a synthetic
`FunctionPrototypeScope`. This is needed for ordinary function
declarators
whose prototype scope has already ended, but it is wrong for lambda
trailing
requires-clauses because they are parsed while the lambda prototype
scope is
still active.
The extra counted scope gives parameters in nested requires-expressions
an
incorrect function scope depth. Split the synthetic prototype-scope
setup from
the trailing requires-clause parser so the lambda path can parse the
clause in
the existing prototype scope.
Fixes: #123854
Fixes: #100774
[CIR] Fix eraseOp assertion in TryOp flattening with unreachable handlers (#193615)
When a try block has catch handlers but no throwing calls, the handler
regions are unreachable and the TryOp is erased. However, ops inside the
handler regions may reference values that were inlined from the try body
into the parent block, causing an assertion in `eraseOp` ("expected that
op has no uses").
This drops all defined value uses from handler regions before erasing
the TryOp.
Made with [Cursor](https://cursor.com)
[CIR] Emit frexp, modf, and powi builtins as library calls (#193795)
`__builtin_frexpf`, `__builtin_modf`, `__builtin_powi`, and related
builtins were incorrectly falling through to the `__builtin_isnan`
handler in `emitBuiltinExpr`, which calls `createBoolToInt` /
`createIsFPClass`. This produced a `cir.cast` with an integer result
type when the actual return type is floating-point, failing CIR
verification.
Break out of the switch so these builtins fall through to the
`isLibFunction()` path, which emits them as regular library calls.
Made with [Cursor](https://cursor.com)
[mlir][spirv] Add missing capabilities for CoopMatrix in TypeExtensionVisitor (#193803)
This adds missing capabilities when CoopMatrix is used with bf16 and
fp8.
Assisted-by: Codex
Don't pass RecipeBuilder
Legacy calls `setRecipe` on all processed recipes but really queries `getRecipe`
for memory operations only, that we don't touch in the scalarization as that
happens after all memory recipes has been processed.
[VPlan] Scalarize to first-lane-only directly on VPlan
This is needed to enable subsequent https://github.com/llvm/llvm-project/pull/182595.
I don't think we can fully port all scalarization logic from the legacy
path to VPlan-based right now because that would require us to introduce
interleave groups much earlier in VPlan pipeline, and without that we
can't really `assert` this new decision matches the previous CM-based
one. And without those `assert`s it's really hard to ensure we properly
port all the previous logic.
As such, I decided just to implement something much simpler that would
be enough for #182595. However, we perform this transformation before
delegating to the old CM-based decision, so it **is** effective
immediately and taking precedence even for consecutive loads/stores
right away.
Depends on https://github.com/llvm/llvm-project/pull/182592 but is stacked on
top of https://github.com/llvm/llvm-project/pull/182594 to enable linear
stacking for https://github.com/llvm/llvm-project/pull/182595.
[WebAssembly] Support f16x8.demote_f32x4_zero (#193564)
Add support for the f16x8.demote_f32x4_zero instruction. This
instruction converts a v4f32 vector to a v4f16 and pads the result with
zeros to fill the 128-bit register.
This enables efficient lowering of fptrunc operations from v4f32 to
v4f16 when the result is zero-extended or when only the low lanes are
needed. A DAG combine is included to recognize these patterns and fold
them into the new instruction.
mixer(8): Deprecate some unintuitive control values
This is a follow-up to cc7479d7dc9b ("mixer(8): Improve mute and recsrc
controls"). These deprecated values will be completely removed on
2026-06-15.
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Reviewed by: 0mp
Pull Request: https://ron-dev.freebsd.org/FreeBSD/src/pulls/21
[PowerPC] Simplify implementation of atomis loads (#191044)
The code for atomic loads is verbose. There are 10 different operations
and 4 memory sizes to support, which means 40 pseudo instructions are
used, with all the details repeated. This PR changes the following:
- Use a loop over the operations and the sizes to create the pseudo
instruction
- Adds the memory size as last operand to the pseudo instruction
- Updates the C++ code to take advantage of the memory size in the
pseudo instruction