LLVM/project 3ff82c7llvm/include/llvm/Support CHERICapabilityFormat.h, llvm/lib/Support CHERICapabilityFormat.cpp

[Support][CHERI] Refactor CHERICapabilityFormatBase to embrace CRTP (#205623)

Currently CHERICapabilityFormatBase does not provide a definition for
getAlignmentMask, but does provide a declaration, which leads to
warnings when building with MSVC. We want to have an abstract base here
without any dynamic dispatch, which is what CRTP is for, so use it for
getAlignmentMask such that the base can provide a definition that uses
each derived type's implementation, just as the two base wrappers were
already doing when calling getAlignmentMask. Whilst doing this we might
as well move the wrappers to the header so they can be inlined (and now
that getAlignmentMask is defined we can use it in the helpers rather
than needing each of them to explicitly use the derived type).

Fixes: 7dc09d0d3cf1 ("[CHERI] Add a Support utility for determining
alignment requirements of CHERI capabilities. (#197402)")
DeltaFile
+19-5llvm/include/llvm/Support/CHERICapabilityFormat.h
+3-17llvm/lib/Support/CHERICapabilityFormat.cpp
+22-222 files

LLVM/project 850462ellvm/test/CodeGen/AMDGPU/GlobalISel udiv.i64.ll urem.i64.ll

AMDGPU: Avoid default subtarget in codegen tests (4/9)

Continue migrating targets away from codegenning the dummy target
by script.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+1,410-1,359llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
+1,351-1,351llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
+442-429llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
+408-393llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
+174-174llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
+167-167llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
+3,952-3,87389 files not shown
+4,226-4,16495 files

LLVM/project 7e2a762llvm/test/CodeGen/AMDGPU wave_dispatch_regs.ll zext-lid.ll

AMDGPU: Avoid default subtarget in hand-written codegen tests (8/9)

Introduce the missing -mcpu argument to some tests which are not
autogenerated.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
+2-2llvm/test/CodeGen/AMDGPU/zext-lid.ll
+1-1llvm/test/CodeGen/AMDGPU/zext-i64-bit-operand.ll
+1-1llvm/test/CodeGen/AMDGPU/vop-shrink.ll
+1-1llvm/test/CodeGen/AMDGPU/waitcnt-no-redundant.mir
+1-1llvm/test/CodeGen/AMDGPU/waitcnt-trailing.mir
+8-86 files

LLVM/project e5e3c81llvm/test/CodeGen/AMDGPU llvm.amdgcn.unreachable.ll indirect-private-64.ll

AMDGPU: Avoid default subtarget in hand-written codegen tests (6/9)

Introduce -mcpu arguments in tests which didn't require check line
updates.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
+3-3llvm/test/CodeGen/AMDGPU/indirect-private-64.ll
+3-3llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dispatch.id.ll
+2-2llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
+2-2llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
+16-1694 files not shown
+116-116100 files

LLVM/project 250a0fellvm/test/CodeGen/AMDGPU use-sgpr-multiple-times.ll gep-address-space.ll

AMDGPU: Avoid default subtarget in hand-written codegen tests (9/9)

Fix some manual test checks using amdgcn triples without -mcpu. These require the
most careful consideration. The highest impact changes are the optimizations
removing execz branch now that there's a sched model.
DeltaFile
+6-14llvm/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
+6-10llvm/test/CodeGen/AMDGPU/gep-address-space.ll
+7-7llvm/test/CodeGen/AMDGPU/setcc.ll
+4-6llvm/test/CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
+4-4llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
+3-3llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll
+30-441 files not shown
+32-467 files

LLVM/project 5176131llvm/test/CodeGen/AMDGPU trap.ll ran-out-of-registers-errors.ll

AMDGPU: Avoid default subtarget in hand-written codegen tests (7/9)

Introduce an -mcpu argument to tests missing it to avoid codegening
the default dummy target. These are cases that didn't require adjusting
the check lines.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/trap.ll
+5-5llvm/test/CodeGen/AMDGPU/ran-out-of-registers-errors.ll
+4-4llvm/test/CodeGen/AMDGPU/set-wave-priority.ll
+2-2llvm/test/CodeGen/AMDGPU/subreg-intervals.mir
+2-2llvm/test/CodeGen/AMDGPU/stack-size-overflow.ll
+2-2llvm/test/CodeGen/AMDGPU/rename-independent-subregs-mac-operands.mir
+33-3394 files not shown
+142-142100 files

LLVM/project e64c5f7llvm/test/CodeGen/AMDGPU call-graph-register-usage.ll debug_frame.ll

AMDGPU: Avoid default subtarget in hand-written codegen tests (5/9)

Introduce -mcpu arguments in tests that did not need check line updates.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+6-6llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
+4-4llvm/test/CodeGen/AMDGPU/debug_frame.ll
+3-3llvm/test/CodeGen/AMDGPU/elf.ll
+3-3llvm/test/CodeGen/AMDGPU/eh_frame.ll
+3-3llvm/test/CodeGen/AMDGPU/amdgpu-function-calls-option.ll
+3-3llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
+22-2294 files not shown
+137-137100 files

LLVM/project 01f78e6llvm/test/CodeGen/AMDGPU vselect.ll valu-i1.ll

AMDGPU: Avoid default subtarget in generated codegen tests (3/9)

Another batch of tests updated by script.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+51-45llvm/test/CodeGen/AMDGPU/vselect.ll
+26-27llvm/test/CodeGen/AMDGPU/valu-i1.ll
+26-26llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
+1-1llvm/test/CodeGen/AMDGPU/vgpr_constant64_to_sgpr.mir
+1-1llvm/test/CodeGen/AMDGPU/virtregrewrite-undef-identity-copy.mir
+1-1llvm/test/CodeGen/AMDGPU/vector-legalizer-divergence.ll
+106-1012 files not shown
+108-1038 files

LLVM/project c3a51b7llvm/test/CodeGen/AMDGPU div_v2i128.ll bf16.ll

AMDGPU: Avoid using default subtarget in generated codegen tests (1/9)

Fix codegen tests using amdgcn triples without a target-cpu. The dummy
default subtarget has always been an irritating edge case to deal with.
For unknown/mesa3d/amdpal triples, this has been a gfx600-like result
and gfx700-like result for amdhsa. Convert tests to use the explicit
target. This was performed by vibe-coded script, and covers tests
using update_{llc|mir}_test_checks. There are some minor codegen differences
to be expected, mostly due to now having a scheduling model.

In the future we should forbid trying to codegen the default target.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+2,592-2,587llvm/test/CodeGen/AMDGPU/div_v2i128.ll
+1,940-1,931llvm/test/CodeGen/AMDGPU/bf16.ll
+639-643llvm/test/CodeGen/AMDGPU/fceil64.ll
+538-538llvm/test/CodeGen/AMDGPU/calling-conventions.ll
+238-746llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+238-746llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+6,185-7,19191 files not shown
+11,628-12,66197 files

LLVM/project 1c5aea0llvm/test/CodeGen/AMDGPU load-constant-i8.ll indirect-addressing-si.ll

AMDGPU: Avoid default subtarget in generated codegen tests (2/9)

Continue migrating away from testing the dummy target, and use
real targets approximating the old behavior. Performed by script.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+899-888llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+523-1,180llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
+710-768llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+693-685llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+664-639llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
+626-635llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+4,115-4,79590 files not shown
+6,994-7,67896 files

LLVM/project 8bf29eaclang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

[LifetimeSafety] Fix loop liveness leakage for conditional operator

Generate flow facts for conditional operators in their respective
predecessor blocks (branches) instead of the merge block, path-isolating
the flows and preventing liveness from leaking across loop backedges.

Also includes tests, formatting cleanups, and refactoring of the flow propagation.

TAG=agy
CONV=b4614911-a1e1-489f-a395-2f895c423788
DeltaFile
+49-55clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+17-0clang/test/Sema/LifetimeSafety/safety.cpp
+4-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+2-1clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+72-564 files

LLVM/project 2c1d884llvm/include/llvm/IR InstrTypes.h, llvm/lib/Transforms/InstCombine InstCombineCalls.cpp InstructionCombining.cpp

Reapply "[InstCombine] Merge consecutive assumes", round 2 (#205773)

This patch was reverted due to triggering another bug. That bug has been
fixed by https://github.com/llvm/llvm-project/pull/205275, so this
should be ready to land now.

Original commit message:

This should make assumes a bit more efficient, since it removes a few
instructions. This should also help with optimizations that are limited
in how many instructions they step through.

This reverts commit 053d75c1d580e0c394f4cfb0688bafd05c187b0f.
DeltaFile
+22-14llvm/test/Transforms/InstCombine/assume.ll
+19-3llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+6-0llvm/include/llvm/IR/InstrTypes.h
+1-2llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
+1-2llvm/test/Transforms/InstCombine/assume-loop-align.ll
+1-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+50-226 files

LLVM/project 47caa5dmlir/lib/Conversion/MathToSPIRV MathToSPIRV.cpp, mlir/test/Conversion/MathToSPIRV math-to-gl-spirv.mlir

[mlir][SPIR-V] Convert math.atan2 to GL atan2 (#201928)
DeltaFile
+14-0mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
+1-0mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
+15-02 files

LLVM/project 4b85f3cllvm/lib/Target/X86 X86InstrMisc.td, llvm/test/CodeGen/X86 bmi.ll

[X86] Select BLSMSK for i8 operands (#205093)

Adds a tablegen pattern to select BLSMSK i8 for 
```
  %neg = sub i8 %x, 1
  %and = xor i8 %neg, %x
```

I've used Claude to generate the comment line before the tablegen entry and the ll file decoding which I confirmed after llc

Fixes #204984
DeltaFile
+49-0llvm/test/CodeGen/X86/bmi.ll
+14-0llvm/lib/Target/X86/X86InstrMisc.td
+63-02 files

LLVM/project 2efe4d4clang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

[LifetimeSafety] Fix loop liveness leakage for conditional operator

Generate flow facts for conditional operators in their respective
predecessor blocks (branches) instead of the merge block, path-isolating
the flows and preventing liveness from leaking across loop backedges.

Also includes tests, formatting cleanups, and refactoring of the flow propagation.

TAG=agy
CONV=b4614911-a1e1-489f-a395-2f895c423788
DeltaFile
+49-55clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+17-0clang/test/Sema/LifetimeSafety/safety.cpp
+5-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+2-1clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+73-564 files

LLVM/project 236a0d1libsycl/include/sycl/__impl queue.hpp, libsycl/unittests/mock helpers.cpp mock.cpp

[libsycl] add UT for kernel submission (#203931)

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+98-0libsycl/unittests/queue/sycl_kernel_launch.cpp
+25-1libsycl/unittests/mock/helpers.cpp
+14-2libsycl/unittests/mock/mock.cpp
+8-1libsycl/unittests/mock/helpers.hpp
+2-0libsycl/include/sycl/__impl/queue.hpp
+1-0libsycl/unittests/queue/CMakeLists.txt
+148-46 files

LLVM/project fdb2f1bllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 gfni-xor-fold.ll gfni-xor-fold-avx512.ll

[X86] Fold splat XOR on VGF2P8AFFINEQB source (#204508)

Given that XORs are associative, a XOR on `vgf2p8affineqb`'s source can
be reassociated to occur after by first permuting by the matrix. If the
XOR operand is a 8-bit splat, it can be applied for free by combining it
with the immediate. This patch:

- Folds XOR by splat on `vgf2p8affineqb`'s source into its immediate.
- Only occurs when the matrix is both constant and splat across each
64-bit lane.
- Can occur when the XOR is multi-use, as it can still reduce the
dependency chain.
- Includes test coverage for a variety of matrices and negative cases
for when the fold isn't possible.

Fixes #179606
DeltaFile
+151-0llvm/test/CodeGen/X86/gfni-xor-fold.ll
+99-0llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
+36-0llvm/lib/Target/X86/X86ISelLowering.cpp
+286-03 files

LLVM/project e8cca37flang/lib/Lower/OpenMP OpenMP.cpp, flang/lib/Optimizer/OpenMP DoConcurrentConversion.cpp

[Flang][OpenMP] Add combined construct information (#198783)

This patch adds the `omp.combined` attribute to OpenMP dialect
operations following changes to the `ComposableOpInterface`.

This attribute is added to operations representing non-innermost leaf
constructs of a combined construct and to standalone block-associated
constructs that can be combined with their parent construct.

Changes are made to the OpenMP lowering logic, as well as the
do-concurrent, workshare and workdistribute transformation passes.
DeltaFile
+1,094-0flang/test/Lower/OpenMP/compound.f90
+58-20flang/lib/Lower/OpenMP/OpenMP.cpp
+6-6flang/test/Transforms/DoConcurrent/use_loop_bounds_in_body.f90
+5-5flang/test/Transforms/DoConcurrent/local_device.mlir
+4-4flang/test/Transforms/DoConcurrent/reduce_device.mlir
+6-2flang/lib/Optimizer/OpenMP/DoConcurrentConversion.cpp
+1,173-3727 files not shown
+1,227-7133 files

LLVM/project a1396edflang/lib/Lower/OpenMP OpenMP.cpp, llvm/test/Transforms/LoopVectorize uniform_across_vf_induction2.ll uniform_across_vf_induction1_lshr.ll

Merge branch 'main' into users/usx95/06-25-suggesionsopt-in-suggestions
DeltaFile
+464-464llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
+418-197flang/lib/Lower/OpenMP/OpenMP.cpp
+220-220llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
+206-228mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+155-155llvm/test/Transforms/LoopVectorize/X86/replicating-load-store-costs.ll
+239-0mlir/test/Dialect/Linalg/linalg-morph-elementwise-to-named.mlir
+1,702-1,264327 files not shown
+5,395-3,557333 files

LLVM/project 3e4c108mlir/include/mlir/Dialect/OpenMP OpenMPOps.td, mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

[MLIR][OpenMP] Explicit tagging of combined constructs (#198782)

Combined OpenMP constructs, such as `parallel do`, which represent nests
of constructs where each one contains a single other construct without
any other directives or statements in between, are currently not marked
in any way in the MLIR representation.

This works because they don't usually require any specific handling
other than what would be done for the included operations. However, the
handling of `target` regions needs to know whether it was part of a
combined construct in order to properly optimize for the SPMD case and
detect when certain clauses must be inconditionally evaluated in the
host.

So far, this has been achieved by having some MLIR pattern-matching
logic to infer whether a nest of operations could have potentially been
produced for a combined construct. This approach is error prone,
computationally expensive and it can't really work in the general case.
On the other hand, a compiler frontend can easily tell the difference

    [10 lines not shown]
DeltaFile
+137-134mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+123-76mlir/test/Dialect/OpenMP/invalid.mlir
+106-0mlir/test/Dialect/OpenMP/invalid-interface.mlir
+33-33mlir/test/Dialect/OpenMP/ops.mlir
+29-33mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+24-24mlir/test/Target/LLVMIR/openmp-teams-clauses-trunc-ext.mlir
+452-30036 files not shown
+574-37942 files

LLVM/project 8cd49c6flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Transforms/OpenMP function-filtering-host-ops.mlir

[Flang][MLIR][OpenMP] Explicitly represent omp.target kernel types (#186166)

Currently, the kernel type (i.e. `generic`, `spmd`, `spmd-no-loop` and
`bare`) of an `omp.target` operation is not an explicit attribute of the
operation. Rather, this is inferred based on the contents of its region
and clauses.

The problems with this approach are that it can be a potentially
resource intensive check for large kernels, and misidentifications are
prone to happen based on the presence of arbitrary operations from other
dialects.

Since the AST already contains the information needed to identify the
kernel type in a more reliable manner, this patch moves that
responsiblity to the Flang frontend. Other MLIR passes that create
`omp.target` operations are updated as well.

One known limitation of this approach is that the MLIR op verifier for
`omp.target` can't completely check that the contents of its region are

    [4 lines not shown]
DeltaFile
+418-197flang/lib/Lower/OpenMP/OpenMP.cpp
+110-135mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+96-50mlir/test/Dialect/OpenMP/ops.mlir
+116-28mlir/test/Dialect/OpenMP/invalid.mlir
+37-36flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
+29-28mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+806-474159 files not shown
+1,227-916165 files

FreeBSD/ports 064ccd0lang/rizin pkg-plist Makefile, lang/rizin/files patch-librz_debug_p_native_reg.c

lang/rizin: Update to 0.9.0

Reported by:    portscout!
DeltaFile
+53-31lang/rizin/pkg-plist
+16-11lang/rizin/Makefile
+11-9lang/rizin/distinfo
+0-11lang/rizin/files/patch-librz_debug_p_native_reg.c
+80-624 files

FreeBSD/ports d782380misc/codex Makefile distinfo

misc/codex: Update to 0.142.1

Changelog:
- https://github.com/openai/codex/releases/tag/rust-v0.142.0
- https://github.com/openai/codex/releases/tag/rust-v0.142.1

Reported by:    GitHub (watch releases)
DeltaFile
+13-6misc/codex/Makefile
+9-9misc/codex/distinfo
+3-3misc/codex/Makefile.crates
+25-183 files

LLVM/project 4b42e25clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

no fallback
DeltaFile
+21-21clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+21-211 files

FreeBSD/ports 3585531www/iridium/files patch-chrome_browser_about__flags.cc patch-third__party_webrtc_modules_desktop__capture_linux_x11_x__server__pixel__buffer.cc

www/iridium: update to 2026.06.149.4

(cherry picked from commit 1a3e5bd222d071699e22aac43b96c7d41b67bf59)
(cherry picked from commit 70c3e1856b339c9191a36eae531f7172061a1029)
(cherry picked from commit f29b1ad70fc7b9093955b68b43fc1e59d627f948)
(cherry picked from commit 0bf825b184ebedb798a100b47a364a1fff7324e7)
DeltaFile
+79-106www/iridium/files/patch-chrome_browser_about__flags.cc
+106-13www/iridium/files/patch-third__party_webrtc_modules_desktop__capture_linux_x11_x__server__pixel__buffer.cc
+99-0www/iridium/files/patch-third__party_libc++_src_include_____locale__dir_support_bsd__like.h
+98-0www/iridium/files/patch-third__party_libvpx_source_config_linux_arm64-highbd_vpx__dsp__rtcd.h
+49-35www/iridium/files/patch-build_config_compiler_BUILD.gn
+40-31www/iridium/files/patch-chrome_browser_policy_configuration__policy__handler__list__factory.cc
+471-185448 files not shown
+2,710-2,216454 files

NetBSD/pkgsrc Swdzw8Pdoc CHANGES-2026

   Note update of net/nsd to 4.14.3.
VersionDeltaFile
1.4005+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc kL0adtinet/nsd distinfo Makefile

   Update nsd to version 4.14.3.

   Pkgsrc changes:
    * Checksum changes.

   Upstream changes:

   4.14.3
   ================
   FEATURES:
   BUG FIXES:
           - Fix for CVE-2026-12244: A specially crafted SVCB RR can cause a heap
             overflow of up to 65509 attacker controlled bytes.
             Thanks to Qifan Zhang, Palo Alto Networks for the report
             https://www.nlnetlabs.nl/downloads/nsd/CVE-2026-12244.txt
           - Fix for CVE-2026-12245: If NSD is configured with DNS over TLS, a
             client that performs a TLS action, closing the connection early,
             causes a crash and restart of the server process. An attacker can
             keep all children in a crash-restart loop denying DoT service.

    [12 lines not shown]
VersionDeltaFile
1.94+4-4net/nsd/distinfo
1.137+2-2net/nsd/Makefile
+6-62 files

FreeBSD/ports c9378f1www/ungoogled-chromium/files patch-chrome_browser_about__flags.cc patch-third__party_webrtc_modules_desktop__capture_linux_x11_x__server__pixel__buffer.cc

www/ungoogled-chromium: update to 149.0.7827.196

Security:       https://vuxml.freebsd.org/freebsd/cffe1232-e4b3-4c72-8b4c-6a8298c9b289.html
Security:       https://vuxml.freebsd.org/freebsd/efa1873c-64a0-11f1-b189-a8a1599412c6.html
Security:       https://vuxml.freebsd.org/freebsd/1466c84c-68b1-11f1-8de5-a8a1599412c6.html
(cherry picked from commit 83bdf5e847157e679a52bdee258494c615dbcfe2)
(cherry picked from commit b9e350eee15ce60a52a26068256ae0a16e31b78f)
(cherry picked from commit c98a01afcfab62b544b3d0f2bcc8f6582761c3f8)
(cherry picked from commit f2322a192461ce287d954e1eaf42dbad21c39d97)
(cherry picked from commit 5364b17343af3bb49f2a4e80afcd6e45eeb362e2)
DeltaFile
+79-106www/ungoogled-chromium/files/patch-chrome_browser_about__flags.cc
+106-13www/ungoogled-chromium/files/patch-third__party_webrtc_modules_desktop__capture_linux_x11_x__server__pixel__buffer.cc
+99-0www/ungoogled-chromium/files/patch-third__party_libc++_src_include_____locale__dir_support_bsd__like.h
+98-0www/ungoogled-chromium/files/patch-third__party_libvpx_source_config_linux_arm64-highbd_vpx__dsp__rtcd.h
+49-35www/ungoogled-chromium/files/patch-build_config_compiler_BUILD.gn
+44-26www/ungoogled-chromium/files/patch-chrome_browser_profiles_chrome__browser__main__extra__parts__profiles.cc
+475-180449 files not shown
+2,708-2,214455 files

FreeBSD/ports 4de7eb3sysutils/witr distinfo Makefile

sysutils/witr: Update 0.2.2 => 0.3.3

Changelogs:
https://github.com/pranshuparmar/witr/releases/tag/v0.2.3
https://github.com/pranshuparmar/witr/releases/tag/v0.2.4
https://github.com/pranshuparmar/witr/releases/tag/v0.2.5
https://github.com/pranshuparmar/witr/releases/tag/v0.2.6
https://github.com/pranshuparmar/witr/releases/tag/v0.2.7
https://github.com/pranshuparmar/witr/releases/tag/v0.3.0
https://github.com/pranshuparmar/witr/releases/tag/v0.3.1
https://github.com/pranshuparmar/witr/releases/tag/v0.3.2
https://github.com/pranshuparmar/witr/releases/tag/v0.3.3

While here replace PORTVERSION with DISTVERSION.

PR:             296266
Sponsored by:   UNIS Labs
DeltaFile
+57-3sysutils/witr/distinfo
+40-8sysutils/witr/Makefile
+97-112 files

OPNSense/core a309101src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterBaseController.php AliasController.php

firewall: skip alias on rules GUI reload

Also align the alias load path in the controller with
how !skip_alias serializes the sequence after rules
reload inside filter_configure_sync().
DeltaFile
+1-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterBaseController.php
+1-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/AliasController.php
+2-22 files