LLVM/project 211ae9ellvm/lib/TableGen TGParser.cpp TGParser.h, llvm/test/TableGen sort.td

rebase

Created using spr 1.3.7
DeltaFile
+48-18llvm/lib/TableGen/TGParser.cpp
+9-22llvm/test/TableGen/sort.td
+2-2llvm/lib/TableGen/TGParser.h
+59-423 files

LLVM/project 1df0309llvm/lib/TableGen TGParser.cpp TGParser.h, llvm/test/TableGen sort.td

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+48-18llvm/lib/TableGen/TGParser.cpp
+9-22llvm/test/TableGen/sort.td
+2-2llvm/lib/TableGen/TGParser.h
+59-423 files

LLVM/project a00c949llvm/lib/TableGen TGParser.cpp TGParser.h, llvm/test/TableGen sort.td

switches, reformat test

Created using spr 1.3.7
DeltaFile
+48-18llvm/lib/TableGen/TGParser.cpp
+9-22llvm/test/TableGen/sort.td
+2-2llvm/lib/TableGen/TGParser.h
+59-423 files

LLVM/project 1565f09llvm CMakeLists.txt, llvm/include/llvm/ADT APFloat.h

Revert "[APFloat] Add exp functions for single and double using exp/expf implementations from LLVM libc." (#197440)

Reverts llvm/llvm-project#190667

Bots with older GCC versions are broken.
DeltaFile
+0-58llvm/unittests/ADT/APFloatTest.cpp
+0-31llvm/lib/Support/APFloat.cpp
+0-5llvm/lib/Support/CMakeLists.txt
+0-4llvm/include/llvm/ADT/APFloat.h
+0-4llvm/CMakeLists.txt
+1-1llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
+1-1036 files

LLVM/project 29a06f7llvm/lib/CodeGen SplitKit.cpp, mlir/lib/Dialect/MemRef/Transforms FoldMemRefAliasOps.cpp

Merge branch 'main' into users/jakos-sec/spr/safestack-add-sigaction-interceptor
DeltaFile
+164-24mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
+117-15mlir/lib/Dialect/Vector/Transforms/IndexedAccessOpInterfaceImpl.cpp
+40-36offload/plugins-nextgen/common/src/PluginInterface.cpp
+26-29llvm/lib/CodeGen/SplitKit.cpp
+18-9mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
+18-2mlir/test/Dialect/Vector/invalid.mlir
+383-11511 files not shown
+441-16517 files

FreeBSD/src 04987aasys/arm64/vmm vmm_hyp.c

arm64/vmm: Enforce a data barrier before tlbi for non-VHE

Exception entry does not include an implicit, architectural data
barrier.

Reported by:    Ben Simner <ben.simner at cl.cam.ac.uk>
Reviewed by:    andrew
Fixes:          5577bb2f67ff ("arm64/vmm: Support tlbi from VHE")
Differential Revision:  https://reviews.freebsd.org/D56855
DeltaFile
+0-4sys/arm64/vmm/vmm_hyp.c
+0-41 files

FreeBSD/src 8766e21contrib/mandoc lib.in

mandoc: Updating FreeBSD thead library descriptions

Remove libkse as it has been obsolete for many years and drop 1:1 from
description of libthr.

Reviewed by:    brooks
Sponsored by:   AFRL, DARPA
Differential Revision:  https://reviews.freebsd.org/D56850
DeltaFile
+1-2contrib/mandoc/lib.in
+1-21 files

FreeBSD/src 538f056contrib/mandoc lib.in

mandoc: Add an entry for libsys to lib.in

Reviewed by:    brooks, emaste
Obtained from:  CheriBSD
Sponsored by:   AFRL, DARPA
Differential Revision:  https://reviews.freebsd.org/D56849
DeltaFile
+1-0contrib/mandoc/lib.in
+1-01 files

LLVM/project 6fd619elibc/src/__support big_int.h, libc/src/__support/FPUtil bfloat16.h NormalFloat.h

Revert "Reapply "[libc][NFC] Propagate LIBC_CONSTEXPR qualifier for those dep…"

This reverts commit ffad84af3e71d4ad330bcb363aa99c7171e33fbb.
DeltaFile
+122-128libc/src/__support/big_int.h
+16-16libc/src/__support/math/atan2f128.h
+15-15libc/src/__support/FPUtil/bfloat16.h
+10-13libc/src/__support/math/sqrtf128.h
+10-12libc/src/__support/FPUtil/NormalFloat.h
+7-10libc/src/__support/macros/attributes.h
+180-194379 files not shown
+637-710385 files

LLVM/project 83dca92llvm/lib/CodeGen SplitKit.cpp

[CodeGen][SplitKit] Fix a crash in addDeadDef (#197014)

This commit fixes https://github.com/llvm/llvm-project/issues/178867.

The problem was that we were trying to materialize a lanemask that does
not existing in the parent live-interval and were crashing.

This happened because we were using the original live-interval to
materialize the live subranges (original is the ancestor of the parent
and may cover some lanes in the lanemasks that are not covered by the
parent live-interval).

The crash was reported by a downstream user and they were not able to
capture the issue with an upstream target. The issue appears because of
the refining of the subranges. We are creating values out of thin air
but they may cover more lanes than the parent because we infer them from
the original live-range.

The fix consists in taking the lanes covered by the parent, not the
original value, when creating the live-interval for the children.
DeltaFile
+26-29llvm/lib/CodeGen/SplitKit.cpp
+26-291 files

FreeBSD/ports e06dd91misc/gemini-cli pkg-plist distinfo, misc/gemini-cli/files package-lock.json

misc/gemini-cli: update 0.41.2 → 0.42.0
DeltaFile
+55-60misc/gemini-cli/pkg-plist
+4-4misc/gemini-cli/files/package-lock.json
+3-3misc/gemini-cli/distinfo
+1-1misc/gemini-cli/Makefile
+63-684 files

LLVM/project ffad84alibc/src/__support big_int.h, libc/src/__support/FPUtil bfloat16.h NormalFloat.h

Reapply "[libc][NFC] Propagate LIBC_CONSTEXPR qualifier for those depending on bitt_cast." (#197462) (#197498)

This reverts commit b20e0bc71db6d74b5a7abe68df577f3ed8fbcdbb.
DeltaFile
+128-122libc/src/__support/big_int.h
+16-16libc/src/__support/math/atan2f128.h
+15-15libc/src/__support/FPUtil/bfloat16.h
+13-10libc/src/__support/math/sqrtf128.h
+12-10libc/src/__support/FPUtil/NormalFloat.h
+10-7libc/src/__support/macros/attributes.h
+194-180379 files not shown
+710-637385 files

NetBSD/pkgsrc-wip 23e1681unifi10 distinfo Makefile

unfi: Adjust NetBSD keywords to pkgsrc - no other change
DeltaFile
+1-1unifi10/distinfo
+1-1unifi10/Makefile
+1-1unifi10/PLIST
+3-33 files

FreeBSD/ports b76c598misc/lean-ctx distinfo Makefile

misc/lean-ctx: update 3.5.21 → 3.5.23
DeltaFile
+13-3misc/lean-ctx/distinfo
+9-1misc/lean-ctx/Makefile
+22-42 files

LLVM/project 1bcc8dallvm/test/CodeGen/X86 vector-reduce-ctpop.ll, llvm/test/MC/AMDGPU gfx13_asm_vop3.s gfx13_asm_vop3-fake16.s

Rebase

Created using spr 1.3.7
DeltaFile
+8,195-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+8,182-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+5,587-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+5,574-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16-fake16.s
+39,086-9182,190 files not shown
+160,090-56,1472,196 files

LLVM/project 6b617d4mlir/lib/Dialect/MemRef/Transforms FoldMemRefAliasOps.cpp, mlir/lib/Dialect/Vector/IR VectorOps.cpp

[mlir][vector] Drop leading unit dims in memref op folding (#197278)

Make the IndexedAccessOpInterface implementations for vector dialect
operations a bit smarter by letting them drop redundant unit dimensions
and shape_cast operations back. This allows folding in, for example, an
expand_shape of a 1-D memref to a load of a `vector<1x1x8xf32>` by
turning it into a load of a `vector<8xf32>` instead. This functionality
is somewhat reduntant with dropleadunitdims, but is included for
completeness and to better match the interface contract of
IndexedAccessOpInterface.

While we're here, fix a bug in the verifier of
vector.expandshape/collapsestore - as near as I can tell, they were
meant to check for the mask being the
same shape is the input vector, but they just checked the first
dimension.

AI: Co-authored by Codex 5.5 (which also caught a bunch of my old typos)
DeltaFile
+164-24mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
+117-15mlir/lib/Dialect/Vector/Transforms/IndexedAccessOpInterfaceImpl.cpp
+18-9mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
+18-2mlir/test/Dialect/Vector/invalid.mlir
+4-4mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+321-545 files

LLVM/project db58e26libc/src/__support big_int.h, libc/src/__support/FPUtil bfloat16.h NormalFloat.h

Revert "Reland "[libc][NFC] Propagate LIBC_CONSTEXPR qualifier for those depending on bit_cast."" (#197492)

Reverts llvm/llvm-project#197479
(c966c50a7eb9246e0ec794c784743528e93d5142)

The reland includes some other changes that cause CI to fail with
various `-Winvalid-constexpr` failures
DeltaFile
+122-128libc/src/__support/big_int.h
+16-16libc/src/__support/math/atan2f128.h
+15-15libc/src/__support/FPUtil/bfloat16.h
+10-13libc/src/__support/math/sqrtf128.h
+10-12libc/src/__support/FPUtil/NormalFloat.h
+7-11libc/src/__support/macros/attributes.h
+180-195379 files not shown
+637-711385 files

LLVM/project f11a7a2lldb/test/API/api/command-return-object TestSBCommandReturnObject.py, lldb/test/API/api/multiple-targets TestMultipleTargets.py

Revert "[lldb][windows] enable TestMultipleTargets.py and TestSBCommandReturnObject.py (#197251) (#197483)

This reverts commit 2273935d40a336f065bc3628e6077ca53bdbfae6.
DeltaFile
+3-0lldb/test/API/api/command-return-object/TestSBCommandReturnObject.py
+3-0lldb/test/API/api/multiple-targets/TestMultipleTargets.py
+6-02 files

LLVM/project 0336550llvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

hopefully fix rebase

Created using spr 1.3.7
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

LLVM/project 8e60208llvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

LLVM/project 9e1fa66llvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

hopefully fix rebase

Created using spr 1.3.7
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

LLVM/project 4f2ab64llvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

FreeNAS/freenas 2cbd668src/middlewared/middlewared/plugins/enclosure_ enclosure_class.py, src/middlewared/middlewared/plugins/failover_ detect_utils.py

use new truenas_pydmi layout
DeltaFile
+0-25src/middlewared/middlewared/utils/chassis.py
+12-11src/middlewared/middlewared/plugins/system/dmi.py
+7-7src/middlewared/middlewared/plugins/failover_/detect_utils.py
+3-3src/middlewared/middlewared/plugins/truenas/__init__.py
+4-2src/middlewared/middlewared/plugins/truenas/tn.py
+2-2src/middlewared/middlewared/plugins/enclosure_/enclosure_class.py
+28-502 files not shown
+31-538 files

LLVM/project 0c59aaallvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

hopefully fix rebase

Created using spr 1.3.7
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

FreeBSD/ports 05eb528science/dftbplus pkg-plist Makefile, science/py-dftbplus Makefile distinfo

science/{,py-}dftbplus: update 24.1 → 25.1
DeltaFile
+21-5science/dftbplus/pkg-plist
+7-3science/py-dftbplus/Makefile
+4-5science/dftbplus/Makefile
+3-3science/py-dftbplus/distinfo
+3-3science/dftbplus/distinfo
+38-195 files

LLVM/project 0d0e697llvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

LLVM/project 7dc7ecellvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll

hopefully fix rebase

Created using spr 1.3.7
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+2,982-975llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+19,769-7,7961,515 files not shown
+77,978-31,1431,521 files

FreeBSD/ports c788aebnet/mpifx Makefile distinfo, net/mpifx/files patch-test_test__comm__split.f90

net/mpifx: update 1.5 → 1.6
DeltaFile
+16-0net/mpifx/files/patch-test_test__comm__split.f90
+2-5net/mpifx/Makefile
+3-3net/mpifx/distinfo
+21-83 files

LLVM/project 9e003f7offload/liboffload/src OffloadImpl.cpp, offload/libomptarget interface.cpp omptarget.cpp

[NFCI][offload] Clarify naming for block and thread numbers (#197419)

As discussed in
https://github.com/llvm/llvm-project/pull/195102#discussion_r3205402105
and on Slack.
DeltaFile
+40-36offload/plugins-nextgen/common/src/PluginInterface.cpp
+9-9offload/libomptarget/interface.cpp
+10-7offload/plugins-nextgen/common/include/PluginInterface.h
+8-8offload/libomptarget/omptarget.cpp
+6-6offload/libomptarget/KernelLanguage/API.cpp
+6-6offload/liboffload/src/OffloadImpl.cpp
+79-722 files not shown
+87-808 files

LLVM/project 778d62f

minor fix

Created using spr 1.3.7
DeltaFile
+0-00 files