[libc] Moves __cxa_thread_atexit_impl into proper entrypoint (#229347)
This PR resolves (#224664).
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Co-authored-by: Pavel Labath <pavel at labath.sk>
[AMDGPU] Handle gfx950 v_pk_{add,mul,fma}_f32 invalid op_sel (#231506)
gfx950 v_pk_add/mul/fma_f32 for certain op_sel combinations:
- Case 1 (v_pk_add/mul_f32): src0/src1 both VGPR with op_sel[1:0] ==
2'b10. Adjusted in GCNHazardRecognizer::fixPkF32InvalidOpSel by
commuting src0/src1 in place.
- Case 2/3 (v_pk_fma_f32): op_sel[2:1] == 2'b01, 2'b10, or 2'b11. Fixed
via SIInstrInfo::decomposePkFMAF32, which splits the packed FMA into two
independent scalar v_fma_f32s; wired in from both
SIInstrInfo::legalizeOperandsVOP3 (SelectionDAG) and
AMDGPUInstructionSelector::select's G_FMA case (GlobalISel), both gated
on SIInstrInfo::isLegalPkFMAF32OpSel. A safety net that crashes the
compiler is added in GCNHazardRecognizer::fixPkF32InvalidOpSel.
Also reject the invalid op_sel encodings directly in the assembler
(AMDGPUAsmParser::validateOpSel) so hand-written/inline asm can't encode
them.
[flang][OpenMP] Match variant selectors in the source construct context
The construct context for METADIRECTIVE and DECLARE VARIANT came from
enclosing MLIR operations. It recognized only a few operations, followed
operation nesting instead of source nesting, kept constructs outside an
enclosing TARGET, and used the body context for clause expressions and
loop bounds.
Build the context from the evaluation's source ancestors and from frames
for construct regions entered during lowering:
- A selected METADIRECTIVE replacement stands in for its source construct.
- TARGET discards the outer context.
- Constructs without a selector property still add a nesting level.
- Clause expressions see only enclosing constructs.
- Loop bounds see the leaves that precede the first loop-associated leaf.
- Specification expressions see no construct.
Composite DISTRIBUTE PARALLEL DO [SIMD] now evaluates DISTRIBUTE clauses
before PARALLEL, as in source nesting, and destroys their temporaries
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[flang][OpenMP] Destroy composite num_threads temporaries once
DISTRIBUTE PARALLEL DO and DISTRIBUTE PARALLEL DO SIMD evaluate the
PARALLEL clause operands before creating omp.parallel, using the
statement context of the dispatch. That context is finalized after the
returned omp.distribute, which is inside the parallel region, so every
thread destroyed the same num_threads temporary, for example for
num_threads(size(f())) where f returns an allocatable.
Evaluate these operands in a separate statement context and finalize it
after omp.parallel.
Fixes #230661
Assisted with Copilot and Claude Opus 5.5
VE: Use i32 registers for 32-bit loads in the SjLj dispatch block
Fix verifier errors in exception test. The call site index and the
PIC jump table offset were loaded with ldl.zx, which defines an i32
register, into vregs with the i64 register class.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
VE: Default to SjLj exception handling
The clang driver selects SjLj exceptions for VE (96d4ccf00c8f), but the
triple defaulted to no exception model. Make SjLj the default for the
triple and MCAsmInfo so llc agrees with the driver.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
AMDGPU: Add vgpr32_lo16/vgpr32_hi16 OutPatFrags
Add OutPatFrags for extracting a 16-bit half of a value after copying
it to a VGPR_32, and use them for the existing open-coded instances.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
AMDGPU: Use lo16_to_vgpr32/hi16_to_vgpr32 OutPatFrags (NFC) (#231650)
Replace open-coded REG_SEQUENCE widenings of 16-bit values into a
VGPR_32 with the existing OutPatFrags.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[SelectionDAG] Implement SDTCisVTSmallerThanOp/SDTCisOpSmallerThanOp in SDNodeInfo::verifyNode. (#230679)
I've tried to capture the rules based on what tablegen does:
-Both should be FP or int.
-Both should be vector or scalar.
-If the scalar size is smaller then they contraint is satisified.
-If the scalar size is equal, the total size must be smaller.
We throw an error for comparing the total size of a fixed and
scalable vector. I don't know if we have good examples of what the rules
should be for mixing.
Assisted-by: Claude
devel/llvm18: drop GOLD_PLIST_FILES again
f848297955e2 removed it from llvm16 to llvm22 because LLVMgold.so is
shipped by the -libs port, but merge b7c138dca937 brought it back in
llvm18. Both llvm18 and llvm18-libs then packaged the same file, and
llvm18 depends on llvm18-libs, so installing it would conflict.
