LLVM/project e6d6433flang/include/flang/Optimizer/Analysis AliasAnalysis.h, flang/lib/Optimizer/Analysis AliasAnalysis.cpp

[fir][aa] Add opt-in cache for use by fir AliasAnalysis clients

Adds AliasAnalysisRecursiveEffectsCache, an opt-in cache that memoizes
per-operation read/write summaries so that getModRef on an operation with
HasRecursiveMemoryEffects does not re-walk its nested regions on every
query.

This is independent of the getSource() memoization added separately: that
one is keyed on (value, flags) and answers "what memory does this value
refer to", while this one is keyed on the operation and answers "what does
this operation and everything nested in it read and write". LICM enables
both, since it only hoists pure-read ops and so invalidates neither.
DeltaFile
+241-0flang/unittests/Optimizer/AliasAnalysisRecursiveEffectsCacheTest.cpp
+228-0flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
+89-0flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
+27-7flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
+1-0flang/unittests/Optimizer/CMakeLists.txt
+586-75 files

LLVM/project 22b9cdbllvm/lib/Target/AMDGPU SILowerSGPRSpills.cpp SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU eliminate-frame-index-select.ll bug-undef-spilled-agpr.mir

[AMDGPU] Use the reserved EXEC copy register for emergency SGPR spills
DeltaFile
+92-0llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
+71-2llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-8llvm/test/CodeGen/AMDGPU/bug-undef-spilled-agpr.mir
+14-4llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+7-3llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
+4-2llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
+198-192 files not shown
+206-218 files

FreeBSD/ports f2b15b5mail/roundcube Makefile distinfo

mail/roundcube: Security update to 1.7.4

PR:             298237
Approved by:    ale (maintainer)
Security:       e7726f5e-a9d0-11f1-93c7-8447094a420f
MFH:            2026Q3

(cherry picked from commit 6c73a7b2786b4799a00169f65e8b6f366a45ba77)
DeltaFile
+3-3mail/roundcube/distinfo
+1-1mail/roundcube/Makefile
+4-42 files

FreeBSD/ports e859401mail/roundcube Makefile distinfo

mail/roundcube: update to 1.7.3 release

PR:             297392
Submitted by:   brnrd

(cherry picked from commit 146ce8aebd5c562184c0fb917336932b079ca801)
DeltaFile
+3-3mail/roundcube/distinfo
+1-1mail/roundcube/Makefile
+4-42 files

HardenedBSD/src 252d9e5usr.bin/sort sort.1.in

Merge remote-tracking branch 'rad/hardened/current/master' into hardened/current/pledge
DeltaFile
+1-1usr.bin/sort/sort.1.in
+1-11 files

HardenedBSD/src 59c57d1usr.bin/sort sort.1.in

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+1-1usr.bin/sort/sort.1.in
+1-11 files

FreeBSD/ports 6c73a7bmail/roundcube Makefile distinfo

mail/roundcube: Security update to 1.7.4

PR:             298237
Approved by:    ale (maintainer)
Security:       e7726f5e-a9d0-11f1-93c7-8447094a420f
MFH:            2026Q3
DeltaFile
+3-3mail/roundcube/distinfo
+1-1mail/roundcube/Makefile
+4-42 files

OPNSense/core 20832ffsrc/opnsense/mvc/app/models/OPNsense/Base/FieldTypes JsonAuditField.php, src/opnsense/www/js opnsense.js

firewall: render readable timestamp in audit metadata; closes #10852

(cherry picked from commit 650291905a567f40763bc0f3ba49776b594059c9)
DeltaFile
+7-4src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/JsonAuditField.php
+2-0src/opnsense/www/js/opnsense.js
+9-42 files

LLVM/project 1888423lldb/source/Plugins/ABI/X86 ABIWindows_x86_64.cpp

[lldb][Windows] Mark unwind plan as valid at all instructions (#215514)

This is a follow up to https://github.com/llvm/llvm-project/pull/210076.

The unwind plan is now valid at every location.
DeltaFile
+1-1lldb/source/Plugins/ABI/X86/ABIWindows_x86_64.cpp
+1-11 files

OPNSense/core 4370c00src/opnsense/mvc/app/controllers/OPNsense/IDS/Api SettingsController.php, src/opnsense/mvc/app/controllers/OPNsense/IDS/forms dialogRuleset.xml

suricata: rulesets: description fix (#10848)

(cherry picked from commit d6cab822c6215d9d456777b6659107fc6da95280)
DeltaFile
+13-2src/opnsense/www/js/opnsense.js
+0-7src/opnsense/mvc/app/controllers/OPNsense/IDS/Api/SettingsController.php
+3-2src/opnsense/mvc/app/views/layout_partials/form_input_tr.volt
+2-2src/opnsense/mvc/app/controllers/OPNsense/IDS/forms/dialogRuleset.xml
+18-134 files

OPNSense/core 406b7b5src/opnsense/mvc/app/views/OPNsense/Unbound dot.volt

unbound: fix advanced disable in DoT

(cherry picked from commit f43c21adf717b036bf3d42f9215dd02ba397926b)
DeltaFile
+1-1src/opnsense/mvc/app/views/OPNsense/Unbound/dot.volt
+1-11 files

LLVM/project e280c50cmake/Modules LLVMVersion.cmake, libcxx/include __config

Bump version to 23.1.2
DeltaFile
+1-1llvm/utils/mlgo-utils/mlgo/__init__.py
+1-1llvm/utils/lit/lit/__init__.py
+1-1llvm/utils/gn/secondary/llvm/version.gni
+1-1libcxx/include/__config
+1-1cmake/Modules/LLVMVersion.cmake
+5-55 files

OPNSense/core 6502919src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes JsonAuditField.php, src/opnsense/www/js opnsense.js

firewall: render readable timestamp in audit metadata; closes #10852
DeltaFile
+7-4src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/JsonAuditField.php
+2-0src/opnsense/www/js/opnsense.js
+9-42 files

FreeBSD/src 4fb4be7usr.bin/sort sort.1.in

sort.1: Fix default memory buffer size

PR:             261496
Fixes:          554442439dd0 ("Change the memory heuristics")
MFC after:      3 days
Reported by:    wosch
DeltaFile
+1-1usr.bin/sort/sort.1.in
+1-11 files

HardenedBSD/src 4fb4be7usr.bin/sort sort.1.in

sort.1: Fix default memory buffer size

PR:             261496
Fixes:          554442439dd0 ("Change the memory heuristics")
MFC after:      3 days
Reported by:    wosch
DeltaFile
+1-1usr.bin/sort/sort.1.in
+1-11 files

LLVM/project 0bab336clang/include/clang/CIR/Dialect/IR CIRCUDAAttrs.td CIRTypes.td

[CIR] Use the modern enum case classes

The `I32EnumAttrCase` family carries an `Attr` half, and an `IntegerAttr`
predicate with it, that a CIR enum has no use for now that the enums derive
from `EnumInfo`. Upstream says of those forms that they "are not needed when
using the newer `EnumCase` form".

Rename all 198 of them to `I32EnumCase`, `I32BitEnumCaseNone`,
`I32BitEnumCaseBit` and `BitEnumCaseGroup`. The group class drops its width
prefix because the modern spelling takes the width from its cases.

NFC, mechanical.
DeltaFile
+140-140clang/include/clang/CIR/Dialect/IR/CIROps.td
+43-43clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+8-8clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
+4-4clang/include/clang/CIR/Dialect/IR/CIRTypes.td
+3-3clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
+198-1985 files

LLVM/project 8137c1dllvm/test/TableGen RuntimeLibcallEmitter-variant-beats-exclusion.td, llvm/utils/TableGen/Basic RuntimeLibcallsEmitter.cpp

RuntimeLibcallsEmitter: Let a consumer's own library variant beat its exclusion

A target can pull a shared library via LibraryRef<Lib, [impls]> to drop some
impls, then re-add its own versions through a same-name library variant guarded
on that target. Previously the exclusion's setUnavailable calls were emitted at
the end of setAvailableLibFuncs_<name>, after every variant, so they clobbered
the target's own re-adds.

Defer emitting a variant until after the exclusions when it re-adds an impl its
own consumer excludes (same predicates), so the target's re-add wins while
the exclusion still suppresses every other variant's contribution.

This is yet unused infrastructure for future changes.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+70-26llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+55-0llvm/test/TableGen/RuntimeLibcallEmitter-variant-beats-exclusion.td
+125-262 files

LLVM/project b752892llvm/test/TableGen RuntimeLibcallEmitter.td, llvm/utils/TableGen/Basic RuntimeLibcalls.h RuntimeLibcalls.cpp

RuntimeLibcalls: Remove the dead IsDefault emitter machinery

The IsDefault bit on RuntimeLibcallImpl fed a LibCallToDefaultImpl map in the
TableGen backend that was populated but never read.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-7llvm/test/TableGen/RuntimeLibcallEmitter.td
+0-8llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
+0-5llvm/utils/TableGen/Basic/RuntimeLibcalls.h
+4-203 files

LLVM/project b59c419llvm/include/llvm/IR RuntimeLibcalls.h RuntimeLibcallsImpl.td, llvm/test/TableGen RuntimeLibcallEmitter-library-ref.td

RuntimeLibcalls: Add LibraryRef for dispatch-with-exclusion

Let a SystemRuntimeLibrary dispatch a shared provider library while dropping the
impls the target replaces, since a library reference cannot nest inside (sub ...).
This is a compromise from the ideal of explicitly listing all calls, but getting
to that point is prooving to be difficult.

The opt-out is emitted inside setAvailableLibFuncs_<lib>, so the single library's
logic is self contained.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+89-19llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+53-0llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
+8-0llvm/include/llvm/IR/RuntimeLibcallsImpl.td
+4-0llvm/include/llvm/IR/RuntimeLibcalls.h
+154-194 files

NetBSD/pkgsrc NCWPCrgfinance/py-eth-rlp distinfo Makefile, finance/py-eth-rlp/patches patch-pyproject.toml

   py-eth-rlp: updated to 3.0.0

   eth-rlp v3.0.0-beta.1 (2025-12-17)

   Breaking Changes
   - Drop support for Python 3.8 and 3.9

   Features
   - Add support for pyrlp v5 and Python 3.14
VersionDeltaFile
1.1+15-0finance/py-eth-rlp/patches/patch-pyproject.toml
1.15+6-4finance/py-eth-rlp/Makefile
1.12+5-4finance/py-eth-rlp/distinfo
+26-83 files

LLVM/project 2dfc014llvm/include/llvm/IR RuntimeLibcalls.h, llvm/test/TableGen RuntimeLibcallEmitter-library-grouping.td RuntimeLibcallEmitter-library-name-merge.td

RuntimeLibcalls: Dispatch to library functions from SystemRuntimeLibrary (#217593)

When a SystemRuntimeLibrary names LibcallLibrary defs,
setTargetRuntimeLibcallSets now dispatches each under an isLibraryAvailable 
guard, so an impl can be homed into a library without dropping it from the target. 
Non-library members keep the inline path. No target names a library yet, so output 
is unchanged.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+83-26llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+52-0llvm/test/TableGen/RuntimeLibcallEmitter-library-dispatch.td
+8-8llvm/test/TableGen/RuntimeLibcallEmitter-library-name-merge.td
+6-6llvm/test/TableGen/RuntimeLibcallEmitter-library-grouping.td
+5-0llvm/include/llvm/IR/RuntimeLibcalls.h
+154-405 files

NetBSD/src 7fKw1rDsys/arch/prep/prep machdep.c

   apply the same cascaded interrupt patch as on ofppc
   should fix PR60675
VersionDeltaFile
1.82+3-3sys/arch/prep/prep/machdep.c
+3-31 files

LLVM/project 4418362llvm/test/CodeGen/AMDGPU float-to-arbitrary-fp-widen.ll amdgcn.bitcast.512bit.ll

[AMDGPU] Select trunc(srl x, 16) as hi16 subregister on true16
DeltaFile
+6,170-6,593llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+4,692-4,496llvm/test/CodeGen/AMDGPU/bf16.ll
+2,809-3,010llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
+2,809-3,010llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
+2,754-2,970llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+1,545-1,574llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
+20,779-21,653127 files not shown
+30,875-47,450133 files

NetBSD/pkgsrc 4ZfhcZkdoc CHANGES-2026

   Updated devel/py-hexbytes, devel/py-rlp
VersionDeltaFile
1.5933+3-1doc/CHANGES-2026
+3-11 files

LLVM/project b90c062llvm/lib/ExecutionEngine/Orc CMakeLists.txt Mangler.cpp, llvm/lib/ExecutionEngine/Orc/Shared CMakeLists.txt Mangler.cpp

[ORC] Move Mangler implementation from OrcShared to OrcJIT (#221942)

Many OrcJIT clients don't directly depend on OrcSupport, and so broke
when e91092685eab moved mangling from OrcJIT to OrcSupport.

We want to reorganize these libraries in the not too distant future.
Rather than forcing clients to update dependencies that may change again
soon, move the code (but not the header) back into the OrcJIT library.
We can address the mismatch between the header's and implementation's
home during the library reorganization.
DeltaFile
+0-53llvm/lib/ExecutionEngine/Orc/Shared/Mangler.cpp
+53-0llvm/lib/ExecutionEngine/Orc/Mangler.cpp
+0-1llvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
+1-0llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
+54-544 files

NetBSD/pkgsrc TY7IaORdevel/py-rlp distinfo Makefile

   py-rlp: updated to 5.0.0

   pyrlp v5.0.0-beta.1 (2025-12-12)

   Breaking Changes
   - Drop support for Python 3.8 and 3.9

   Features
   - Add support for Python 3.14. Note the Rust backend only works for Python 3.10-3.12
VersionDeltaFile
1.24+5-5devel/py-rlp/Makefile
1.10+4-4devel/py-rlp/distinfo
+9-92 files

HardenedBSD/ports 29229acaudio/drumgizmo Makefile

audio/drumgizmo: Mark BROKEN instead on aarch64 for < FreeBSD 16

PR:             297353
Reported by:    fuz
Fixes:          0d645caea55b ("Disable ARM build ...")
Approved by:    osa, vvd (Mentors, implicit)
DeltaFile
+3-1audio/drumgizmo/Makefile
+3-11 files

FreeBSD/ports 29229acaudio/drumgizmo Makefile

audio/drumgizmo: Mark BROKEN instead on aarch64 for < FreeBSD 16

PR:             297353
Reported by:    fuz
Fixes:          0d645caea55b ("Disable ARM build ...")
Approved by:    osa, vvd (Mentors, implicit)
DeltaFile
+3-1audio/drumgizmo/Makefile
+3-11 files

LLVM/project 7d98df8llvm/lib/Target/AMDGPU SIFixSGPRCopies.cpp, llvm/test/CodeGen/AMDGPU ds_read2.ll merge-m0.mir

[AMDGPU] Don't merge M0 initializations across calls that clobber M0
DeltaFile
+133-0llvm/test/CodeGen/AMDGPU/merge-m0.mir
+18-5llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+1-0llvm/test/CodeGen/AMDGPU/ds_read2.ll
+152-53 files

LLVM/project 3af5fa9llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp AMDGPUAttributor.cpp, llvm/test/Bitcode amdgcn-addrspacecast-nonnull.ll

AMDGPU: Remove llvm.amdgcn.addrspacecast.nonnull

The intrinsic is fully replaced by the nonnull flag on addrspacecast,
so remove it.

Old bitcode/IR is autoupgraded, though this is very conservative. This
intrinsic was only inserted by the backend, and hopefully nobody was
directly emitting it.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+0-68llvm/test/CodeGen/AMDGPU/llvm.amdgcn.addrspacecast.nonnull.ll
+42-0llvm/test/Bitcode/amdgcn-addrspacecast-nonnull.ll
+5-36llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-26llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+12-12llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-undefined-behavior.ll
+5-13llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+65-15510 files not shown
+98-19416 files