devel/R-cran-vdiffr: New port
An extension to the 'testthat' package that makes it easy to add graphical unit
tests. It provides a Shiny application to manage the test cases.
[llubi] Check UB before handling ret attributes (#230842)
Some code paths return AnyValue() on UB (e.g., calling function
declarations not recognized as libfunc). Check this before handling ret
attributes to avoid operating on incompatible values.
The test is generated by DeepSeek-V4.1-Flash.
[AMDGPU] Insert wmma coexec aware anti-hints rules (#226397)
This patch ports the downstream coexec anti-hint insertion to upstream
as rule-based insertion in the AMDGPU pre-ra anti-hints framework. It
adds gfx1250x anti-hint rules for wmma coexec hazards such as A/B source
war, swmmac index war, dest waw), trans source war, memory-address war
etc. Each rule builds anti-hints relationship for the register allocator
to keep hazardous registers in different physical registers so the
hazard recognizer and waitcnt inserter need less nop and waits.
Co-authored-by: Jeffrey Byrnes <jrbyrnes1989 at gmail.com>
Depends on #218075
AMDGPU: Don't use PressureDiffs with implicit allocatable physregs
canUsePressureDiffs skipped all implicit operands, so instructions
reading an allocatable physreg implicitly (e.g., vcc on v_cndmask_b32)
used the cached PressureDiff. PressureDiffs assume a single use for
physregs (see the FIXME in ScheduleDAGMILive::updatePressureDiffs), so
the pressure was added for each user. With several users in a region, the
SGPR pressure was overestimated and failed the expensive checks pressure
validation.
Fall back to the RegPressureTracker for implicit operands of
allocatable physregs, which are the ones it tracks.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[ARM] Implement CRC32 const folding (#230751)
This implements constant folding for __crc32 intrinsics in 32-bit ARM
targets when both the arguments are compile time known constants.
This is a follow up of https://github.com/llvm/llvm-project/pull/228985
which does the same for AArch64.