[LiveDebugVariables] Repair stale SlotIndexes
The analysis keeps its indexes from before the first register allocator
until DBG_VALUEs are emitted, by which point passes in between have
erased some of the instructions they point at. Resolve them at the
start of each allocator run and before emitting.
SlotIndexes can then reclaim the entries of erased instructions without
sparing the ones held here, which would have made generated code depend
on -g. Emitted locations are unchanged, except that intervals resolving
to one position now emit a single DBG_VALUE rather than identical
consecutive ones.
[SlotIndexes] Add queries for stale indexes
An erased instruction leaves its index list entry in place, making the
index indistinguishable from a block boundary entry. Add
isBlockBoundaryIndex() and isStaleIndex() to tell the two apart, and
canonicalizeIndex() to resolve a stale index to the closest preceding
instruction's register slot, or the block start if none survives.
NFC. No caller yet. LiveDebugVariables is next.
Fix variant context for lastprivate bounds
Use the owning directive's evaluation when collecting construct ancestors
for loop-control expressions. Lastprivate can re-evaluate bounds after
loop-body lowering leaves a body evaluation current, which otherwise adds
the loop construct before the loop-control context filter runs.
X86: Remove redundant SJLJ landing pad alignment in X86LFIRewritePass (#227295)
X86LFIRewritePass separately scanned for blocks holding a call site's landing pad label.
With SJLJ exception handling the dispatch block reaches those blocks through an indirect
jump, and they are no longer marked as EH pads by the time this pass runs, so they would
otherwise be missed.
EmitSjLjDispatchBlock puts those blocks in a jump table, so they are already aligned as jump
table targets. Dropping it removes the use of the TargetOptions exception model field from
this in preparation for its removal.
The new test checks the landing pad alignment, which was previously untested.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
[Polly] Allocate packed arrays of matrix multiplication on heap (#226163)
Problem: The matrix multiplication optimization copies blocks of its
operands into the arrays Packed_A and Packed_B. Their sizes are derived
from the cache parameters rather than from the operands; with the
default parameters, Packed_B takes 4 MiB even for a 100x100 product.
They are allocated with alloca in the entry block of the function, so
two optimized multiplications in one function exceed the default 8 MiB
stack: two products of 100x100 int32 matrices declared as VLAs and
inlined into main crash with a segmentation fault.
Solution: Allocate a packed array on the heap, with malloc at the start
of the SCoP and free at its exit, only if it is larger than
-polly-pattern-matching-max-stack-array-size (1 MiB by default), and
keep smaller ones on the stack. -1 keeps all of them on the stack, 0
puts all of them on the heap. With the default parameters, Packed_B goes
to the heap and Packed_A (192 KiB) stays on the stack.
Default size depends only on the cache parameters. The default
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cleanup: Remove expired barnyard ports:
2026-09-30 security/barnyard2: Upstream has been abandoned, and the project is no longer maintained
2026-09-30 security/barnyard2-sguil: Upstream has been abandoned, and the project is no longer maintained
[NVPTX] Add range attributes for cluster rank intrinsics to preserve signed non-negativity (#224727)
Adds `range` properties in `IntrinsicsNVVM.td` for:
* `llvm.nvvm.read.ptx.sreg.cluster.ctarank`
* `llvm.nvvm.read.ptx.sreg.cluster.nctarank`
The CTA rank is encoded in a single byte within a shared pointer, so the
max value of ctarank is 255 and the number of CTAs is one greater. This
enables InstCombine to apply signed-division optimizations (e.g. sdiv X,
16 -\> shift-based form) that require X \>= 0.
---------
Co-authored-by: Alex MacLean <amaclean at nvidia.com>
[Analysis] Delete SyntheticCountsUtils (#227741)
This isn't used anywhere, presumably getting dropped after we deleted
much of the rest of the synthetic profile infrastructure.
