FreeBSD/doc c757664documentation/content/ru/books/accessibility/colors _index.po _index.adoc

new translation of books/accessibility/colors to Russian

Differential Revision: https://reviews.freebsd.org/D55759
DeltaFile
+1,490-0documentation/content/ru/books/accessibility/colors/_index.po
+625-0documentation/content/ru/books/accessibility/colors/_index.adoc
+2,115-02 files

LLVM/project 9560abbclang/test/Analysis/ctu invalid-ast.cpp missing-ast.cpp, clang/test/Analysis/ctu/diag load-threshold.cpp invlist-empty.cpp

[clang][analyzer] Test cases for CTU import failures

Add tests for all kinds of CTU import failures expressed in the
`cross_tu::index_error_code` enumeration. Many of the test cases have no
diagnostics, because the respective errors are silently ignored in
`CrossTranslationUnitContext::emitCrossTUDiagnostics`.

I expect to improve this part, and these tests should demonstrate how
the improvements manifest to the user.

--
CPP-7804
DeltaFile
+33-0clang/test/Analysis/ctu/diag/load-threshold.cpp
+26-0clang/test/Analysis/ctu/invalid-ast.cpp
+24-0clang/test/Analysis/ctu/missing-ast.cpp
+23-0clang/test/Analysis/ctu/diag/invlist-empty.cpp
+23-0clang/test/Analysis/ctu/diag/lang-mismatch.c
+21-0clang/test/Analysis/ctu/diag/invlist-wrong-format.cpp
+150-010 files not shown
+271-016 files

LLVM/project 0ebef5ellvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/AArch64 rem-by-const.ll

[DAGCombine] Enable div by constant optimization for odd sized vectors before type legalization. (#188313)

If we we are going to legalize to a vector with the same element type
and mulh or mul_lohi are supported, allow the optimization before type
legalization.

RISC-V will widen vectors using vp.udiv/sdiv that doesn't support
division by constant optimization. In addition, type legalization will create
a build_vector with undef elements making it hard to match after type
legalization.

Other targets may need to widen by a combination of vector and scalar
divisions to avoid traps if we widen a vector with garbage.

I had to enable the MULHU->SRL DAG combine before type legalization to
prevent regressions. After type legalization, the multiply constant
build_vector will have undef elements and the combine won't trigger.
DeltaFile
+290-378llvm/test/CodeGen/X86/srem-vector-lkk.ll
+138-248llvm/test/CodeGen/X86/urem-vector-lkk.ll
+166-101llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
+29-57llvm/test/CodeGen/AArch64/rem-by-const.ll
+31-11llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+27-5llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
+681-8004 files not shown
+702-81510 files

FreeBSD/doc 930e519documentation/content/ru/books/accessibility/virtual-terminal _index.po _index.adoc

new translation of books/accessibility/virtual-terminal to Russian

Differential Revision: https://reviews.freebsd.org/D55758
DeltaFile
+879-0documentation/content/ru/books/accessibility/virtual-terminal/_index.po
+326-0documentation/content/ru/books/accessibility/virtual-terminal/_index.adoc
+1,205-02 files

LLVM/project 8700d19cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind direction.cpp

[cross-project-tests] Mark expect_step_kind/direction.cpp as UNSUPPORTED

The test was failing on one Linux bot but XPASSing on another.

To unblock PR CI I'm going to skip it for now until we figure out what's going on.
DeltaFile
+1-1cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp
+1-11 files

FreeNAS/freenas 0b160f9src/middlewared/middlewared/alert/source enclosure_status.py

target specifically ES60G1 and ES60G2 models
DeltaFile
+14-59src/middlewared/middlewared/alert/source/enclosure_status.py
+14-591 files

FreeBSD/doc 1b32601documentation/content/ru/books/accessibility/preface _index.po _index.adoc

new translation of books/accessibility/preface to Russian

Differential Revision: https://reviews.freebsd.org/D55757
DeltaFile
+203-0documentation/content/ru/books/accessibility/preface/_index.po
+85-0documentation/content/ru/books/accessibility/preface/_index.adoc
+288-02 files

FreeBSD/doc c6f7301documentation/content/ru/books/accessibility/development _index.po _index.adoc

new translation of books/accessibility/development to Russian

Differential Revision: https://reviews.freebsd.org/D55756
DeltaFile
+412-0documentation/content/ru/books/accessibility/development/_index.po
+166-0documentation/content/ru/books/accessibility/development/_index.adoc
+578-02 files

FreeBSD/doc 50be0dedocumentation/content/ru/books/accessibility book.adoc partii.po, documentation/content/ru/books/accessibility/help _index.po _index.adoc

new translation of books/accessibility/help to Russian

Differential Revision: https://reviews.freebsd.org/D56093
DeltaFile
+154-0documentation/content/ru/books/accessibility/help/_index.po
+85-0documentation/content/ru/books/accessibility/book.adoc
+84-0documentation/content/ru/books/accessibility/partii.po
+82-0documentation/content/ru/books/accessibility/help/_index.adoc
+76-0documentation/content/ru/books/accessibility/book.po
+76-0documentation/content/ru/books/accessibility/_index.po
+557-04 files not shown
+691-010 files

LLVM/project 0b6ba34cross-project-tests/debuginfo-tests/dexter-tests/memvars const-branch.c, cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind direction.cpp

[cross-project-tests] un-XFAIL/XFAIL dexter tests on Linux (#188777)

See https://github.com/llvm/llvm-project/issues/188775 for the XFAILed
test.

The other was failing as XPASS on AArch64.

This is part of enabling the tests on PR CI
(https://github.com/llvm/llvm-project/pull/188522)
DeltaFile
+3-0cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp
+1-1cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c
+4-12 files

LLVM/project 038ddb2llvm/test/CodeGen/SPIRV pstruct.ll linked-list.ll, llvm/test/CodeGen/SPIRV/transcoding extract_insert_value.ll

[SPIR-V] Update tests for opaque pointer migration (#187674)

Enable tests `linked-list.ll`, `pstruct.ll`, and
`extract_insert_value.ll` where additional code changes are not required

related to #60133
DeltaFile
+77-83llvm/test/CodeGen/SPIRV/pstruct.ll
+14-15llvm/test/CodeGen/SPIRV/transcoding/extract_insert_value.ll
+11-4llvm/test/CodeGen/SPIRV/linked-list.ll
+102-1023 files

LLVM/project 1503293mlir/include/mlir-c ExtensibleDialect.h, mlir/lib/Bindings/Python IRCore.cpp

[MLIR][Python] Support `has_trait` for operations (#188492)

This PR adds a `has_trait(trait_cls)` API to `_OperationBase`, that can
be used for:
- C++-defined operations and C++-defined traits (e.g.
`func_return_op.has_trait(IsTerminatorTrait)`)
- Python-defined operations and C++-defined traits (e.g.
`my_python_op.has_trait(IsTerminatorTrait)`)
- Python-defined operations and Python-defined traits (e.g.
`my_python_op.has_trait(MyPythonTrait)`)

---------

Co-authored-by: Maksim Levental <maksim.levental at gmail.com>
DeltaFile
+27-2mlir/lib/Bindings/Python/IRCore.cpp
+20-1mlir/test/python/dialects/ext.py
+16-0mlir/test/python/dialects/builtin.py
+15-0mlir/test/python/dialects/func.py
+8-0mlir/include/mlir-c/ExtensibleDialect.h
+8-0mlir/lib/CAPI/IR/ExtensibleDialect.cpp
+94-34 files not shown
+109-410 files

FreeNAS/freenas d245ca4src/middlewared/middlewared/alert/source enclosure_status.py

target specifically ES60G1 and ES60G2 models
DeltaFile
+14-59src/middlewared/middlewared/alert/source/enclosure_status.py
+14-591 files

LLVM/project dfefc03llvm/utils/lit/lit TestRunner.py

[lit] Explicitly unset timer to free thread stack (#188717)

Currently the virtual address space usage of lit fluctuates wildly, with
peak usage exceeding 4GB, which results in subsequent thread spawning
errors on 32-bit systems.

The cause of this is a circular reference in TimeoutHelper._timer (via the
callback), which causes the 8MB thread stack to not be immediately
reclaimed when the timer is cancelled.

We can avoid this by explicitly unsetting the timer.
DeltaFile
+2-0llvm/utils/lit/lit/TestRunner.py
+2-01 files

OPNSense/plugins fd6d2denet-mgmt/telegraf pkg-descr, security/clamav pkg-descr

plugins: use Konstantinos' real name in historic mentions (#5352)
DeltaFile
+1-1net-mgmt/telegraf/pkg-descr
+1-1security/clamav/pkg-descr
+2-22 files

OPNSense/plugins 3ec12a4.github pull_request_template.md

Contributing: typo (#5351)
DeltaFile
+1-1.github/pull_request_template.md
+1-11 files

FreeBSD/src 557f502sys/amd64/conf NOTES, sys/i386/conf MINIMAL

sys: vt_efifb: EFI not supported on i386; move it back to amd64/NOTES

We do not support EFI boot on i386.  Thus:
1. Move (back) 'device vt_efifb' from x86/NOTES to amd64/NOTES.
2. Remove 'device vt_efifb' from i386/MINIMAL.

Reported by:    jhb
Fixes:          f224591746bd ("Add ASMC_DEBUG make option")
Fixes:          67599eef01f5 ("sys/x86/NOTES: Add vt_efifb")
Sponsored by:   The FreeBSD Foundation
(cherry picked from commit 9c25620e57f01d8227f0d53c6b2134ab37a49fdf)
DeltaFile
+3-0sys/amd64/conf/NOTES
+0-1sys/i386/conf/MINIMAL
+3-12 files

LLVM/project c9c1520llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Fix -Wunused-variable

A couple of these variables are only used within LLVM_DEBUG statements
which get removed by the preprocessor in non-assertions builds which
will cause the variable to become unused. Mark them maybe_unused given
the names make the code more readable.
DeltaFile
+4-4llvm/lib/Analysis/DependenceAnalysis.cpp
+4-41 files

LLVM/project e80604aflang/lib/Lower/OpenMP OpenMP.cpp, flang/lib/Lower/Support ReductionProcessor.cpp PrivateReductionUtils.cpp

[flang][OpenMP] Support user-defined declare reduction with derived types (#184897)

Fix lowering of `!$omp declare reduction` for intrinsic operators
applied
to user-defined derived types (e.g., `+` on `type(t)`). Previously, this
hit a TODO in `ReductionProcessor::getReductionInitValue` because the
code
tried to compute an init value for a non-predefined type, when it should
instead use the initializer region from the `DeclareReductionOp`.

This fixes the issue #176278: [Flang][OpenMP] Compilation error when
type-list in declare reduction directive is derived type name.

The root cause was a naming mismatch: `genOMP` for
`OpenMPDeclareReductionConstruct` used a raw operator string (e.g.,
"Add")
as the reduction name, while `processReductionArguments` at the use site
computed a canonical name via `getReductionName` (e.g.,
"add_reduction_byref_rec__QFTt"). The `lookupSymbol` in

    [83 lines not shown]
DeltaFile
+151-30flang/lib/Lower/OpenMP/OpenMP.cpp
+86-0flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
+18-22flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
+25-10flang/lib/Lower/Support/ReductionProcessor.cpp
+25-2flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
+26-0flang/lib/Lower/Support/PrivateReductionUtils.cpp
+331-643 files not shown
+362-809 files

FreeNAS/freenas b2cdeadsrc/middlewared/middlewared/pytest/unit/utils test_disk_sysfs_properties.py

Add unit tests for disk class utils
DeltaFile
+391-0src/middlewared/middlewared/pytest/unit/utils/test_disk_sysfs_properties.py
+391-01 files

FreeBSD/ports 3286e7egraphics/converseen distinfo Makefile

graphics/converseen: Update to 0.15.2.2

ChangeLog: https://converseen.fasterland.net/

 * Fixed a potential bug with the settings directory
 * Updated Chinese translation
 * Various Bugfixes
DeltaFile
+3-3graphics/converseen/distinfo
+1-1graphics/converseen/Makefile
+4-42 files

LLVM/project 841d96dllvm/test/Transforms/LoopVectorize/AArch64 maxbandwidth-regpressure.ll

Fix maxbandwidth-regpressure.ll after rebase
DeltaFile
+2-2llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
+2-21 files

OpenBSD/src yedR3wssys/dev/pci if_iwx.c

   Fix a fatal firmware error during association on non-MIMO iwx(4) devices.

   If MIMO is disabled we must not try to configure Tx rates in firmware
   which require MIMO. Otherwise we trigger sysassert 0x20101A0D.

   Problem reported and fix tested by Kirill Kaplin.
   Meaning of sysassert hex code provided by Johannes Berg, thanks!
VersionDeltaFile
1.225+19-11sys/dev/pci/if_iwx.c
+19-111 files

LLVM/project b87084eclang/lib/CodeGen CGDebugInfo.cpp, clang/test/CodeGenHLSL/debug source-language.hlsl

Revert "[HLSL][SPIRV] Add support for -g to generate NonSemantic Debug Info (…"

This reverts commit 85049fc357ac3917350b97f4812209d9d00fe808.
DeltaFile
+0-34clang/test/CodeGenHLSL/debug/source-language.hlsl
+0-32llvm/test/CodeGen/SPIRV/debug-info/hlsl-debug-info-auto-activation.ll
+5-6llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+3-5llvm/docs/SPIRVUsage.rst
+2-6clang/lib/CodeGen/CGDebugInfo.cpp
+2-2llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
+12-854 files not shown
+15-9010 files

LLVM/project 4e383ecclang/test/Analysis ctu-main.cpp ctu-on-demand-parsing.cpp, clang/test/Analysis/Inputs ctu-other.cpp

[NFC][clang][analyzer] Move CTU tests and inputs into a dedicated subfolder

Move CTU related LIT tests to a dedicated directory.

-- 

CPP-7804
DeltaFile
+249-0clang/test/Analysis/ctu/main.cpp
+0-249clang/test/Analysis/ctu-main.cpp
+0-183clang/test/Analysis/Inputs/ctu-other.cpp
+183-0clang/test/Analysis/ctu/Inputs/other.cpp
+0-116clang/test/Analysis/ctu-on-demand-parsing.cpp
+116-0clang/test/Analysis/ctu/on-demand-parsing.cpp
+548-54874 files not shown
+1,522-1,52080 files

LLVM/project 5524fa4clang/lib/Basic/Targets AMDGPU.cpp, clang/test/Driver amdgpu-macros.cl

clang: Define FP_FAST_FMA_HALF macro for AMDGPU (#188243)
DeltaFile
+4-0clang/lib/Basic/Targets/AMDGPU.cpp
+1-0clang/test/Driver/amdgpu-macros.cl
+1-0clang/test/Preprocessor/predefined-arch-macros.c
+6-03 files

LLVM/project 233faf1llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-no-dotprod.ll partial-reduce-fdot-product.ll

Improvements to cost-model

The chosen costs are more precise as it tries to better use the target-features to determine if something can be expanded.
The costs in sdot-i16-i32 are now more accurate and the loops that didn't vectorise before result in equivalent or better codegen.
DeltaFile
+62-42llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+9-9llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
+8-8llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
+3-3llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
+2-2llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-sdot.ll
+84-645 files

LLVM/project e448bd5llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-fdot-product.ll partial-reduce-add-sdot-i16-i32.ll

Various changes to the cost-model.

This has a number of changes to the partial reduction cost-model:

* Implement the fact that *MLALB/T instructions can be used for
  16-bit -> 32-bit partial reductions (or *MLAL/MLAL2 for NEON).

* Fixes the cost of reductions that don't have specific lowering,
  rather than returning a random number, we now return the cost of
  expanding the partial reduction in ISel.

  For sub-reductions we scale the cost to make them slightly cheaper,
  so that they're still candidates for forming cdot operations.

* Reduce the cost of FP reductions, which are currently prohibitively
  expensive.
DeltaFile
+39-26llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+22-22llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
+26-2llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
+2-2llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-sdot.ll
+89-524 files

LLVM/project 187dc3allvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-sub-sdot.ll partial-reduce-add-sdot-i16-i32.ll

Address comments
DeltaFile
+22-24llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+2-2llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-sub-sdot.ll
+1-1llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-add-sdot-i16-i32.ll
+25-273 files

LLVM/project 26f6c2fllvm/include/llvm/Analysis TargetTransformInfo.h, llvm/lib/Analysis TargetTransformInfo.cpp

Distinguish between extends
DeltaFile
+13-11llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+16-0llvm/lib/Analysis/TargetTransformInfo.cpp
+3-0llvm/include/llvm/Analysis/TargetTransformInfo.h
+32-113 files