LLVM/project 395422eclang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete OperatorNewDeletePointers.h

Update clang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.h

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+1-0clang/include/clang/ScalableStaticAnalysis/Analyses/OperatorNewDelete/OperatorNewDeletePointers.h
+1-01 files

LLVM/project 2878d9cclang/include/clang/Basic LangOptions.def, clang/include/clang/Options Options.td

Make type discrimination of 128-bit types optional
DeltaFile
+18-10clang/test/CodeGen/ptrauth-function-type-discriminator.c
+15-6clang/lib/AST/ASTContext.cpp
+4-0clang/lib/Frontend/CompilerInvocation.cpp
+2-0clang/lib/Driver/ToolChains/Clang.cpp
+2-0clang/include/clang/Basic/LangOptions.def
+2-0clang/include/clang/Options/Options.td
+43-161 files not shown
+44-167 files

FreeNAS/freenas c306952tests/directory_services test_ipa_join_no_dns_updates.py

Ruff fix
DeltaFile
+4-4tests/directory_services/test_ipa_join_no_dns_updates.py
+4-41 files

LLVM/project 09f2062clang/lib/CodeGen CodeGenTypes.cpp

clang: Use getFloatingPointType instead of reinventing it (#207213)
DeltaFile
+6-25clang/lib/CodeGen/CodeGenTypes.cpp
+6-251 files

LLVM/project b8d89feclang/test/CodeGen attr-counted-by.c attr-counted-by-with-sanitizers.c, llvm/test/CodeGen/RISCV determine-callee-saves-gpr.mir

Rebase, cleanup, improvements

Created using spr 1.3.7
DeltaFile
+0-2,755clang/test/CodeGen/attr-counted-by.c
+1,736-0clang/test/CodeGen/attr-counted-by-with-sanitizers.c
+0-1,645llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+694-806llvm/test/CodeGen/X86/vector-reduce-mul.ll
+1,387-0clang/test/CodeGen/attr-counted-by-without-sanitizers.c
+1,283-0llvm/test/CodeGen/RISCV/determine-callee-saves-gpr.mir
+5,100-5,2061,504 files not shown
+52,823-27,2951,510 files

LLVM/project 5a74b39lldb/source/Core Section.cpp, lldb/source/Plugins/DynamicLoader/MacOSX-DYLD DynamicLoaderDarwin.cpp DynamicLoaderMacOSXDYLD.cpp

[lldb] Remove ConstString from SectionList::FindSectionByName (#207296)

By having ConstString in this interface, we are forcing callers to
create a ConstString in order to perform a lookup. In many cases,
`FindSectionByName` is a best-effort interface, meaning we're creating
ConstStrings speculatively. In other cases, we were creating a
ConstString at the call-site instead of computing it once and re-using
it.

I audited all the callsites and changed all the callsites that created a
ConstString for the purpose of calling `FindSectionByName`. Other
callsites will take more time to change.
DeltaFile
+3-5lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+4-4lldb/source/Core/Section.cpp
+3-3lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
+3-3lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
+2-3lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp
+2-2lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
+17-2011 files not shown
+28-3917 files

LLVM/project 2e1f347libcxx/include/__ranges zip_transform_view.h, libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform nodiscard.verify.cpp

[libc++][ranges] Applied `[[nodiscard]]` to `views::zip_transform` (#207120)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/range.zip.transform

Towards #172124

---------

Co-authored-by: Hristo Hristov <zingam at outlook.com>
DeltaFile
+129-0libcxx/test/libcxx/ranges/range.adaptors/range.zip.transform/nodiscard.verify.cpp
+17-16libcxx/include/__ranges/zip_transform_view.h
+30-1libcxx/test/support/test_iterators.h
+0-30libcxx/test/std/ranges/range.adaptors/range_adaptor_types.h
+176-474 files

FreeBSD/ports e3c08besysutils/cpdup-FreeBSD distinfo Makefile

sysutils/cpdup-FreeBSD: update to 1.1.0

Approved by:    Gianmarco Giovannelli <gmarco at giovannelli.it> (maintainer, via email)
DeltaFile
+3-3sysutils/cpdup-FreeBSD/distinfo
+1-1sysutils/cpdup-FreeBSD/Makefile
+4-42 files

LLVM/project b261f64flang/include/flang/Semantics openmp-dsa.h, flang/lib/Semantics openmp-dsa.cpp resolve-directives.cpp

[flang][OpenMP][NFC] Share SetSymbolDSA between semantics and lowering

Move the DSA helper from the private OmpAttributeVisitor::SetSymbolDSA into the
public openmp-dsa header next to GetSymbolDSA, and share the DSA flag set
through a single GetDataSharingAttributeFlags().

This lets an upcoming metadirective lowering change reuse the helper to set the
predetermined DSA of the loop induction variables of a selected variant. A
loop-associated variant is resolved during lowering, so the usual semantic DSA
resolution never runs on its loop nest and lowering must set those flags itself.

Assisted with Copilot.
DeltaFile
+17-5flang/lib/Semantics/openmp-dsa.cpp
+1-14flang/lib/Semantics/resolve-directives.cpp
+4-0flang/include/flang/Semantics/openmp-dsa.h
+22-193 files

LLVM/project 5e68149llvm/lib/Target/AMDGPU SIPromoteGlobalLoadToSAddr.cpp AMDGPU.h, llvm/test/CodeGen/AMDGPU si-promote-global-load-saddr.ll

[AMDGPU] Add SIPromoteGlobalLoadSAddr: promote loop-carried ptr phi to SADDR

Adds a pre-RA peephole pass that promotes global loads whose address is a
loop-carried vreg_64 phi of the form (sgpr_base + divergent_tid_offset) to the
SADDR addressing mode, replacing the VGPR address advance with scalar
S_ADD_U32/S_ADDC_U32 instructions.

Problem
-------
When a uniform global pointer is advanced by a uniform stride inside a loop
and indexed by threadIdx.x, the compiler fails to select the
`global_load ... SADDR+VADDR` form. Instead it keeps the full 64-bit address
as a per-lane VGPR induction variable and emits a pure-VGPR
`global_load ... off`, advancing the address with two V_ADD_CO_U32 per
iteration. This is the textbook SADDR+VADDR shape, but the compiler's
SelectionDAG divergence analysis conservatively treats the loop-carried phi
as divergent even though all incoming values are uniform.

Root cause

    [46 lines not shown]
DeltaFile
+491-0llvm/lib/Target/AMDGPU/SIPromoteGlobalLoadToSAddr.cpp
+63-0llvm/test/CodeGen/AMDGPU/si-promote-global-load-saddr.ll
+3-0llvm/lib/Target/AMDGPU/AMDGPU.h
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+1-0llvm/lib/Target/AMDGPU/CMakeLists.txt
+560-05 files

FreeNAS/freenas d229315src/middlewared/middlewared/plugins/smb_ util_smbconf.py, tests/unit test_smb_share.py

Update vfs module reference in middleware

In order to simplify maintenance of truenas-specific ZFS-specific
recycle bin code, we've forked the module to truenas_recycle. This
commit updates the name assigned to it in middleware code that
generates the smb.conf file.
DeltaFile
+7-0tests/unit/test_smb_share.py
+3-1src/middlewared/middlewared/plugins/smb_/util_smbconf.py
+10-12 files

LLVM/project 7268755clang/lib/Sema SemaTemplateInstantiateDecl.cpp SemaDecl.cpp, clang/test/CXX/drs cwg18xx.cpp

fixups
DeltaFile
+18-2clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+19-1clang/test/SemaCXX/member-class-11.cpp
+1-14clang/lib/Sema/SemaDecl.cpp
+6-2clang/test/CXX/drs/cwg18xx.cpp
+7-0clang/test/SemaCXX/constant-expression-cxx14.cpp
+2-2clang/test/SemaCXX/deduced-return-type-cxx14.cpp
+53-213 files not shown
+56-249 files

LLVM/project c897141clang/include/clang/AST DeclTemplate.h, clang/lib/AST DeclTemplate.cpp

[clang] fix getTemplateInstantiationArgs

This implements a new strategy for collecting the template arguments, by
relying on the qualifiers and template parameter lists to navigate the template
context of out-of-line definitions.

This greatly simplifies the signature of that function, by removing a bunch
of workarounds, and simpliffying a couple that weren't removed yet.

Since this now relies on qualifiers and template parameter lists,
this patch expends most of its effort making sure these are placed,
transformed and propagated to template instantiations.

Also makes the explicit specialization AST nodes stop abusing the template
parameter lists by storing it's own template parameter list, creating a
dedicated field for them, similar to partial specializations.
DeltaFile
+194-429clang/lib/Sema/SemaTemplateInstantiate.cpp
+275-165clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+151-147clang/lib/Sema/SemaTemplate.cpp
+96-95clang/include/clang/AST/DeclTemplate.h
+59-129clang/lib/Sema/SemaConcept.cpp
+60-92clang/lib/AST/DeclTemplate.cpp
+835-1,05757 files not shown
+1,508-1,71363 files

LLVM/project 39e61e9llvm/test/CodeGen/DirectX embed-ildb.ll, llvm/test/CodeGen/DirectX/ContainerData ContainerFlags.ll DebugName-user-directory.test

Rename llc option dx-Fd to dx-pdb-path
DeltaFile
+3-3llvm/test/CodeGen/DirectX/ContainerData/ContainerFlags.ll
+1-1llvm/test/CodeGen/DirectX/ContainerData/DebugName-user-directory.test
+1-1llvm/test/CodeGen/DirectX/ContainerData/DebugName-user-specified.test
+1-1llvm/test/CodeGen/DirectX/embed-ildb.ll
+1-1llvm/test/CodeGen/DirectX/ContainerData/DebugName.test
+1-1llvm/test/CodeGen/DirectX/ContainerData/PDBParts.test
+8-84 files not shown
+12-1210 files

FreeBSD/src 5f4c87etools/tools/git git-mfc

git-mfc: Allow merging merge commits

In order to merge merge commits (such as vendor imports), we need to
tell git cherry-pick which of the two branches referenced in the commit
is the mainline.  In our case, it is always the first.

Approved by:    markj
DeltaFile
+1-1tools/tools/git/git-mfc
+1-11 files

FreeNAS/freenas c963f4bsrc/middlewared/middlewared/api/v27_0_0 vm_device.py, src/middlewared/middlewared/plugins/vm vm_device_crud.py

Add ISCSI_DISK device type to VM API and PCI slot conflict detection

Adds VMISCSIDiskDevice and VMISCSIDiskTarget to the v27 API model,
wires the ISCSI_DISK dtype through factory_utils, and calls
check_pci_slot_conflicts() from _validate_device() so PCI slot
collisions are caught at vm.device.create/update time rather than
failing silently at VM start.
DeltaFile
+38-1src/middlewared/middlewared/api/v27_0_0/vm_device.py
+28-0src/middlewared/middlewared/plugins/vm/vm_device_crud.py
+16-0src/middlewared/middlewared/utils/libvirt/factory_utils.py
+82-13 files

LLVM/project f348d96clang/docs ReleaseNotes.md, clang/include/clang/Basic DiagnosticGroups.td

[Clang] Enable -Wunused-template under -Wall (#206123)

Uncomment `UnusedTemplate` in the `Unused` diagnostic group so
`-Wunused-template` becomes part of `-Wall`.

`-Wunused-template` flags unused function and variable templates with
internal linkage. In a header, such a template gives every translation
unit its own internal-linkage copy, which is a latent ODR violation
(ill-formed, no diagnostic required), so enabling this surfaces a real
class of bugs and keeps the pattern from reappearing.

### Depends on

The in-tree occurrences were cleaned up first in a series of NFC PRs
tracked by #202945. This change only builds clean once those land, so CI
will be red on any area whose cleanup is not yet merged. Remaining
prerequisites:

Approved

    [13 lines not shown]
DeltaFile
+5-0clang/docs/ReleaseNotes.md
+1-1clang/include/clang/Basic/DiagnosticGroups.td
+1-1clang/test/SemaCXX/warn-func-not-needed.cpp
+1-1clang/test/SemaCXX/warn-variable-not-needed.cpp
+2-0clang/test/Misc/warning-wall.c
+10-35 files

FreeNAS/freenas 1d6ea3csrc/middlewared/middlewared/plugins/directoryservices_ ipa_join_mixin.py datastore.py, tests/directory_services test_ipa_join_no_dns_updates.py

Require DNS updates for the IPA directory service

Creating the SMB and NFS Kerberos service principals during an IPA
join uses FreeIPA's service-add, which refuses to add a service to a
host that has no DNS A/AAAA record. register_dns() creates that
record, so it is a prerequisite for service-principal setup rather
than an optional step.

With DNS updates disabled the join aborted at register_dns() before
the service principals were created, leaving smbd unable to start:

    krb5_kt_start_seq_get on FILE:/etc/ipa/smb.keytab failed
    (No such file or directory)

Reject enable_dns_updates=False for IPA at validation time with a
clear message, since DNS updates are currently required to properly
support kerberized services.

Also roll back the local configuration written during a failed join

    [7 lines not shown]
DeltaFile
+34-15src/middlewared/middlewared/plugins/directoryservices_/ipa_join_mixin.py
+14-0tests/directory_services/test_ipa_join_no_dns_updates.py
+9-0src/middlewared/middlewared/plugins/directoryservices_/datastore.py
+57-153 files

LLVM/project 233a3acllvm/test/CodeGen/AMDGPU directive-amdgcn-target.ll directive-amdgcn-target-legacy-triples.ll

AMDGPU: Migrate target id tests to use new subarch triples
DeltaFile
+0-239llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
+239-0llvm/test/CodeGen/AMDGPU/directive-amdgcn-target-legacy-triples.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-not-supported.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-off.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-one-func-xnack-on.ll
+12-10llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
+284-2829 files not shown
+380-37815 files

LLVM/project 803d84aclang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver amdgpu-mcpu.cl hip-sanitize-options.hip

clang/AMDGPU: Stop passing redundant -target-cpu to cc1

Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
DeltaFile
+62-62clang/test/Driver/amdgpu-mcpu.cl
+26-26clang/test/Driver/hip-sanitize-options.hip
+20-10clang/lib/Driver/ToolChains/CommonArgs.cpp
+12-16clang/test/Driver/hip-rdc-device-only.hip
+24-0clang/test/Preprocessor/amdgpu-subarch-cc1-target-cpu.cl
+10-10clang/test/Driver/amdgpu-xnack-sramecc-flags.c
+154-12427 files not shown
+214-21133 files

LLVM/project 21cb333clang/lib/Basic/Targets AMDGPU.h AMDGPU.cpp, clang/test/Misc/target-invalid-cpu-note amdgcn.c

clang/AMDGPU: Validate -target-cpu in cc1 is valid for the subarch

Restrict the reported list of valid target-cpus based on the triple's
subarch. This is more consistent with how other targets validate the
target CPU name. Currently we have split handling validating the target
name for the triple in both the driver and here. The driver based diagnostic
seems to be an amdgpu-ism in 2 different places (though there is one arm
validation emitting the same diagnostic). In the future we could probably
drop those.
DeltaFile
+55-0clang/test/Misc/target-invalid-cpu-note/amdgcn.c
+6-5clang/lib/Basic/Targets/AMDGPU.h
+1-1clang/lib/Basic/Targets/AMDGPU.cpp
+62-63 files

LLVM/project e88747cllvm/unittests/CodeGen AMDGPUMetadataTest.cpp, llvm/unittests/MC/AMDGPU DwarfRegMappings.cpp Disassembler.cpp

AMDGPU: Migrate unittests to subarch triples

Replace specifying a processor name with the triple
subarch.

The register-limit helpers in AMDGPUUnitTests.cpp that enumerate every
valid CPU via fillValidArchListAMDGCN still pass the CPU explicitly, as
does the MC Disassembler smoke test (its C disassembler API derives the
subtarget from the CPU, not the triple subarch).

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+6-6llvm/unittests/MC/AMDGPU/DwarfRegMappings.cpp
+6-6llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
+3-3llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
+2-2llvm/unittests/MC/AMDGPU/Disassembler.cpp
+2-2llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
+2-2llvm/unittests/MI/LiveIntervalTest.cpp
+21-2110 files not shown
+33-3316 files

LLVM/project 7bc2828clang/lib/Basic OffloadArch.cpp, clang/lib/Driver Driver.cpp

clang: Start using new amdgpu subarch triples

Fixup invocations using --target=amdgcn + -mcpu to introduce
the subarch in the triple.

For offload toolchains, a single toolchain is constructed for the
top level amdgpu architecture, and the effective triple is used for
target specific tool invocations.

The specifics of the resource directory layout are tbd. This does
try to find resources in the subarch named directory. The paths
are searched at toolchain creation time, so that does not work
when there are multiple subarches.

Fixes #154925
DeltaFile
+234-2clang/lib/Basic/OffloadArch.cpp
+59-59clang/test/Driver/offload-arch-translation-amdgpu.cu
+43-43clang/test/Driver/hip-phases.hip
+33-33clang/test/Driver/hip-binding.hip
+49-15clang/lib/Driver/ToolChains/CommonArgs.cpp
+43-12clang/lib/Driver/Driver.cpp
+461-164103 files not shown
+1,251-491109 files

LLVM/project d7a1642llvm/test/CodeGen/AMDGPU target-cpu.ll

AMDGPU: Rewrite target-cpu test for new subarches

The function subtargets should now be a valid subtarget for
the top-level subarch.
DeltaFile
+52-74llvm/test/CodeGen/AMDGPU/target-cpu.ll
+52-741 files

LLVM/project 646feb2llvm/docs AMDGPUUsage.rst, llvm/lib/TargetParser AMDGPUTargetParser.cpp Triple.cpp

AMDGPU: Introduce amdgpu triple arch

Move towards using the triple for representing incompatible
ISA changes. Use the subarch field to represent the various
incompatible cases. Previously we pretended a single triple arch
was universally compatible, and only distinguished by function
level subtargets. Move towards using distinct triples to enable
more sophisticated toolchain handling in the future, like proper
runtime library linking.

Introduce a new subarch per unique ISA, but also introduce
"major subarches" which are compatible by a set of covered
minor ISA versions. These map to the existing generic targets.
There are a few placeholder subarch entries, which currently
have missing backing generic arches for codegen.

This should be the preferred triple arch name going forward,
but is treated as an alias of amdgcn. This does not yet change
clang to emit the new triples.

    [2 lines not shown]
DeltaFile
+553-439llvm/docs/AMDGPUUsage.rst
+427-0llvm/unittests/TargetParser/TargetParserTest.cpp
+241-11llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+200-12llvm/unittests/TargetParser/TripleTest.cpp
+177-0llvm/test/CodeGen/AMDGPU/target-id-from-triple.ll
+147-15llvm/lib/TargetParser/Triple.cpp
+1,745-47772 files not shown
+2,578-68378 files

LLVM/project 2ba3ac7clang/lib/CodeGen CodeGenTypes.cpp

clang: Use getFloatingPointType instead of reinventing it

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+6-25clang/lib/CodeGen/CodeGenTypes.cpp
+6-251 files

LLVM/project ddebfb9llvm/test/Transforms/LoopVectorize/VPlan constant-fold.ll

[VPlan] Add intrinsic constant folding test for replicate recipes. (NFC) (#207792)
DeltaFile
+56-0llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
+56-01 files

OpenBSD/ports zDgXrcrshells/fish/main/patches patch-fish_Cargo_toml patch-fluent-ftl-tools_Cargo_toml

   shells/fish: Forgot to cvs-add the patches
VersionDeltaFile
1.1+32-0shells/fish/main/patches/patch-fish_Cargo_toml
1.1+14-0shells/fish/main/patches/patch-fluent-ftl-tools_Cargo_toml
1.8+0-0shells/fish/main/patches/patch-Cargo_toml
+46-03 files

LLVM/project 642c9f6utils/docs/llvm_sphinx __init__.py

[docs][NFC] Some small cleanup in llvm_sphinx (#207818)

Format the doc-comment suggested import to match what `black` prefers,
and isolate the `import` as the only statement in the `try` for
`myst_parser`.
DeltaFile
+2-3utils/docs/llvm_sphinx/__init__.py
+2-31 files

LLVM/project 2ef9c9dutils/bazel/llvm-project-overlay/libc BUILD.bazel, utils/bazel/llvm-project-overlay/libc/test/src/stdio BUILD.bazel

[bazel][libc] Port 03c62ca40d (#207820)
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/test/src/stdio/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+2-02 files