LLVM/project c5be83f — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+204-23llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+711-1,7666 files not shown
+772-1,79212 files

LLVM/project b35be9d — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Defer single-lane atomics to type legalization
DeltaFile
+2,376-2,410llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+2,252-2,190llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+882-958llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+57-44llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+38-45llvm/lib/CodeGen/AtomicExpandPass.cpp
+1-81llvm/test/CodeGen/NVPTX/atomicrmw-v1-type-legalization.ll
+5,606-5,7285 files not shown
+5,659-5,85911 files

LLVM/project e75d14a — llvm/test/CodeGen/NVPTX atomicrmw-v1-type-legalization.ll, llvm/test/Transforms/AtomicExpand elementwise-single-lane.ll

[AtomicExpand][NVPTX] Add single-lane atomic RMW coverage

Record current expansion and code generation before changing single-lane RMW legalization. Check the full pipeline separately from direct instruction selection while their output differs.
DeltaFile
+194-0llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-vector.ll
+123-0llvm/test/Transforms/AtomicExpand/elementwise-single-lane.ll
+81-3llvm/test/CodeGen/NVPTX/atomicrmw-v1-type-legalization.ll
+398-33 files

LLVM/project bd00b7e — llvm/test/CodeGen/NVPTX load-sm60.ll store-sm90.ll

Merge branch 'main' into users/aokblast/clang/itanium_mangle_fix_alias
DeltaFile
+31,848-0llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+31,310-0llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+22,584-0llvm/test/CodeGen/NVPTX/load-sm90.ll
+22,541-0llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+21,644-0llvm/test/CodeGen/NVPTX/store-sm90.ll
+20,068-0llvm/test/CodeGen/NVPTX/load-sm60.ll
+149,995-07,941 files not shown
+647,172-209,1567,947 files

NetBSD/xsrc czEIHYH — external/mit/xf86-video-intel/dist/src intel_module.c, external/mit/xf86-video-intel/dist/src/sna sna.h sna_accel.c

   Merge xf86-video-intel 2.99.917.20210115
VersionDeltaFile
1.8+263-66external/mit/xf86-video-intel/dist/src/sna/sna_display.c
1.3+101-4external/mit/xf86-video-intel/dist/src/intel_module.c
1.9+54-33external/mit/xf86-video-intel/dist/src/sna/kgem.c
1.4+29-17external/mit/xf86-video-intel/dist/src/sna/sna_dri2.c
1.8+37-8external/mit/xf86-video-intel/dist/src/sna/sna_accel.c
1.5+19-0external/mit/xf86-video-intel/dist/src/sna/sna.h
+503-1288 files not shown
+530-13514 files

LLVM/project 1204f6b — clang/lib/Driver/ToolChains OpenBSD.h OpenBSD.cpp, clang/test/Driver openbsd.cpp

[clang][Driver] Fix libc++ include path on OpenBSD (#212979)

`clang++` defaults to `-stdlib=libc++` on OpenBSD. When building with both
`clang` and `libcxx` included, the freshly built `clang++` uses the system
version of the `libc++` headers. However, this is from the bundled `libc++`
22.1.8, thus inconsistent with the `libc++` being built.

OpenBSD has its own version of addLibCxxIncludePaths which just includes
`/usr/include/c++/v1`.

This patch removes OpenBSD::addLibCxxIncludePaths in favour of the generic
version in `Gnu.cpp`.
DeltaFile
+12-2clang/test/Driver/openbsd.cpp
+0-6clang/lib/Driver/ToolChains/OpenBSD.cpp
+0-3clang/lib/Driver/ToolChains/OpenBSD.h
+12-113 files

LLVM/project 643f151 — utils/bazel/llvm-project-overlay/clang BUILD.bazel

[Bazel] Fixes ea4c43d (#234451)

This fixes ea4c43d796c4e3fc0b51bda6234a7f2feb127c3d (#228096).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ea4c43d796c4e3fc0b51bda6234a7f2feb127c3d

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+1-01 files

NetBSD/xsrc N9WCnED — external/mit/xf86-video-intel/dist/src intel_module.c i915_pciids.h, external/mit/xf86-video-intel/dist/src/sna gen8_render.c sna_blt.c

   xf86-video-intel 2.99.917.20210115 commitid 31486f40f8e8f8923ca0799aea84b58799754564
VersionDeltaFile
1.1.1.5+263-66external/mit/xf86-video-intel/dist/src/sna/sna_display.c
1.1.1.5+204-61external/mit/xf86-video-intel/dist/src/i915_pciids.h
1.1.1.5+101-4external/mit/xf86-video-intel/dist/src/intel_module.c
1.1.1.5+54-33external/mit/xf86-video-intel/dist/src/sna/kgem.c
1.1.1.5+12-44external/mit/xf86-video-intel/dist/src/sna/sna_blt.c
1.1.1.4+29-20external/mit/xf86-video-intel/dist/src/sna/gen8_render.c
+663-22846 files not shown
+980-44852 files

LLVM/project b01fc4b — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 mask-beforefirst.ll

[X86] Combine mask_beforefirst to (x - 1) & ~x in GPR

EVEX and libc use this pattern in strcpy etc. to set the bits before the lowest set bit. It works correctly for x=0 too, returning an all ones mask.

Because SSE/AVX/AVX2 promote vNi1 types, do this as a DAG combine before type legalization.

We need to restrict it to power of 2 types otherwise we hit a latent crash in combineToExtendBoolVectorInReg.
DeltaFile
+126-212llvm/test/CodeGen/X86/mask-beforefirst.ll
+23-0llvm/lib/Target/X86/X86ISelLowering.cpp
+149-2122 files

LLVM/project e4d92b6 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize early_exit_combined_exits.ll early_exit_with_stores.ll

[VPlan] Use llvm.mask.beforefirst for computing early exit mask

This makes the cost more accurate and improves codegen for RISC-V. The codegen for an early exit loop with side effects then goes from:

    .LBB0_3:                                # %vector.body
                                            # =>This Inner Loop Header: Depth=1
        vl1r.v  v16, (a3)
        vsetvli zero, zero, e8, m1, ta, ma
        vmseq.vi        v16, v16, 0
        vfirst.m        a7, v16
        srli    t0, a7, 63
        czero.nez       a7, a7, t0
        czero.eqz       t0, a1, t0
        or      a7, t0, a7
        vsetvli zero, zero, e64, m8, ta, ma
        vmsltu.vx       v0, v8, a7
        vle8.v  v17, (a5), v0.t
        vcpop.m t1, v16
        vsetvli zero, zero, e8, m1, ta, ma

    [20 lines not shown]
DeltaFile
+55-50llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
+36-36llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+24-16llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
+15-10llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
+7-8llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-6llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
+146-1265 files not shown
+161-13611 files

LLVM/project d0253b9 — llvm/include/llvm/CodeGen BasicTTIImpl.h, llvm/test/Analysis/CostModel/AArch64 mask-beforefirst.ll

[TTI] Add cost for llvm.mask.beforefirst
DeltaFile
+16-16llvm/test/Analysis/CostModel/RISCV/mask-beforefirst.ll
+15-15llvm/test/Analysis/CostModel/AArch64/mask-beforefirst.ll
+23-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+54-313 files

LLVM/project 5dee9b8 — llvm/include/llvm/CodeGen BasicTTIImpl.h, llvm/test/Analysis/CostModel/AArch64 mask-beforefirst.ll

Handle scalarization
DeltaFile
+13-10llvm/test/Analysis/CostModel/AArch64/mask-beforefirst.ll
+6-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+19-102 files

LLVM/project 40226f4 — llvm/test/Analysis/CostModel/AArch64 mask-beforefirst.ll, llvm/test/Analysis/CostModel/RISCV mask-beforefirst.ll

Precommit tests
DeltaFile
+44-0llvm/test/Analysis/CostModel/AArch64/mask-beforefirst.ll
+42-0llvm/test/Analysis/CostModel/RISCV/mask-beforefirst.ll
+86-02 files

LLVM/project f754b7c — llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/InstCombine mask-beforefirst.ll

[ValueTracking] Mark mask.beforefirst as propagating poison

This allows us to combine some logical ands/ors to regular ands/ors.
DeltaFile
+2-2llvm/test/Transforms/InstCombine/mask-beforefirst.ll
+1-0llvm/lib/Analysis/ValueTracking.cpp
+3-22 files

LLVM/project 9ba9843 — llvm/test/Transforms/InstCombine mask-beforefirst.ll

Precommit tests
DeltaFile
+26-0llvm/test/Transforms/InstCombine/mask-beforefirst.ll
+26-01 files

LLVM/project 914c018 — llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify/ConstProp mask-beforefirst.ll

[ConstantFolding] Add constant folding for mask.beforefirst

Poison lanes poison the entire result, and undef elements are ignored

Assisted-by: Opus 5.5
DeltaFile
+8-16llvm/test/Transforms/InstSimplify/ConstProp/mask-beforefirst.ll
+23-0llvm/lib/Analysis/ConstantFolding.cpp
+31-162 files

LLVM/project cda66d3 — llvm/test/Transforms/InstSimplify/ConstProp mask-beforefirst.ll

Precommit tests
DeltaFile
+74-0llvm/test/Transforms/InstSimplify/ConstProp/mask-beforefirst.ll
+74-01 files

LLVM/project 4080662 — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+204-23llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+711-1,7666 files not shown
+772-1,79212 files

LLVM/project caa2840 — llvm/lib/Target/NVPTX NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX atomicrmw-elementwise-sm90.ll atomicrmw-elementwise-sm60.ll

[AtomicExpand][NVPTX] Defer single-lane atomics to type legalization
DeltaFile
+2,376-2,410llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+2,252-2,190llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+882-958llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+162-0llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-vector.ll
+103-0llvm/test/Transforms/AtomicExpand/elementwise-single-lane.ll
+57-44llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+5,832-5,6025 files not shown
+5,892-5,69711 files

FreeBSD/src 9c67d6e — sys/netinet6 in6_pcb.c

inpcb: inp_next() never returns a freed inpcb
DeltaFile
+0-2sys/netinet6/in6_pcb.c
+0-21 files

FreeBSD/src 49548ea — sys/netinet udp_usrreq.c

udp: in_pcblookup() never returns a freed inpcb
DeltaFile
+1-2sys/netinet/udp_usrreq.c
+1-21 files

FreeBSD/src abb8b02 — sys/netinet6 icmp6.c

icmp6: make icmp6_notify_error() more readable

Remove a level of indentation, improve line breaks, remove single use
variables.  No functional change.
DeltaFile
+146-159sys/netinet6/icmp6.c
+146-1591 files

FreeBSD/src 331333b — sys/netpfil/ipfw ip_fw_dynamic.c

ipfw: hold sleepable "upper half lock" for periodic state expiry

The state expiration may lead to freeing rules, which requires this lock.
Since the lock is sleepable, move the expiry routine from callout context
to a taskqueue.  This also should have a positive effect of not running
expensive function as a callout.

Fixes:  e3caa360d5d0a73af0de1d293d5b8ff6e900ceb4

Reviewed by:            pouria
Differential Revision:  https://reviews.freebsd.org/D60869
DeltaFile
+12-9sys/netpfil/ipfw/ip_fw_dynamic.c
+12-91 files

FreeBSD/src 7146ad0 — sys/netinet in_kdtrace.h in_kdtrace.c, sys/netinet/tcp_stacks bbr.c rack.c

tcp: refactor tcp_autosndbuf() and associated sysctls

Rename tcp_sndbuf_autoscale() to tcp_autosndbuf().  This matches
complementary tcp_autorcvbuf() that was factored out as a separate
function a few months before tcp_sndbuf_autoscale() was.  Move the large
comment to the header of the function.  Use unsigned types for all sizing
sysctls and variables and use bool for the switching sysctl.  Add a
comment above net.inet.tcp.sendbuf_auto_lowat (default to off) providing a
reference to its origins.  Add DTrace probe tcp::send-autoresize,
complementary to the existing tcp::receive-autoresize.

Rack has its own function, just enable the DTrace probe there.

Reviewed by:            tuexen
Differential Revision:  https://reviews.freebsd.org/D60732
DeltaFile
+69-71sys/netinet/tcp_output.c
+5-5sys/netinet/tcp_var.h
+4-1sys/netinet/tcp_stacks/rack.c
+4-0sys/netinet/in_kdtrace.c
+1-1sys/netinet/tcp_stacks/bbr.c
+1-0sys/netinet/in_kdtrace.h
+84-786 files

FreeBSD/src 04cd9bc — sys/netinet tcp_usrreq.c in_kdtrace.c, sys/netinet/tcp_stacks bbr.c rack.c

tcp: refactor tcp_autorcvbuf() and associated sysctls

Run the entire function under the socket buffer lock.  Make it responsible
to set the new limit or clear SB_AUTOSIZE in case of a failure.  Use
unsigned type for newsize, that matches both the sb_hiwat type and min()
argument types.  Make byte counter in the tcpcb unsigned, too.  Make the
sizing tunables unsigned, and make the switching tunable a boolean.  Don't
execute Dtrace probe in case of a failure.  Simplify the Dtrace probe to
report only relevant information, the previous probe looked more like a
leftover from a debugging session.

Reviewed by:            tuexen
Differential Revision:  https://reviews.freebsd.org/D60731
DeltaFile
+23-27sys/netinet/tcp_input.c
+3-17sys/netinet/tcp_stacks/rack.c
+1-10sys/netinet/tcp_stacks/bbr.c
+5-6sys/netinet/tcp_var.h
+2-6sys/netinet/in_kdtrace.c
+1-1sys/netinet/tcp_usrreq.c
+35-676 files

LLVM/project 49bc45c — llvm/lib/Transforms/IPO FunctionImport.cpp, llvm/test/ThinLTO/X86 import_callee_declaration.ll

[ThinLTO] Create IR declarations for functions imported as declarations (#233959)

Previously, function and function-alias summaries marked with the
`Declaration` import type (e.g. via `-import-declaration`) were emitted
into the summary index for analysis/attribute propagation, but
`FunctionImporter::importFunctions` did not materialize corresponding IR
declarations in the destination module.

Update `FunctionImporter::importFunctions` to create `ExternalLinkage`
function declarations in the importing module for functions and function
aliases whose import type is `Declaration` (when not already present in
the destination module). Copy the source function's calling convention,
attributes, and visibility, and attach `!guid` metadata with the
pre-promotion GUID so that the declaration can be located by GUID in the
backend (e.g. via the module symbol table during indirect call
promotion).

This will be used by a follow-up MemProf ThinLTO change to import
declarations of cross-module indirect call targets assigned to cloned

    [7 lines not shown]
DeltaFile
+76-0llvm/lib/Transforms/IPO/FunctionImport.cpp
+46-14llvm/test/ThinLTO/X86/import_callee_declaration.ll
+122-142 files

FreeBSD/ports 8c3527e — devel/sentry-cli Makefile Makefile.crates, devel/sentry-cli/files patch-Cargo.toml

devel/sentry-cli: Update to 3.8.1

Changelog: https://github.com/getsentry/sentry-cli/blob/3.8.1/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+9-9devel/sentry-cli/distinfo
+3-3devel/sentry-cli/Makefile.crates
+2-2devel/sentry-cli/files/patch-Cargo.toml
+1-2devel/sentry-cli/Makefile
+15-164 files

LLVM/project 5eae832 — llvm/lib/Target/MSP430 MSP430BranchSelector.cpp MSP430ISelLowering.cpp, utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[MSP430] Declare command line options in TableGen (#234455)

Move the cl::opts into MSP430Options.td. MSP430TargetMachine holds
`const MSP430Options &CLOpts`, and MSP430Subtarget and
MSP430TargetLowering copy it.

MSP430Subtarget::HWMultEnum becomes `enum class MSP430::HWMult`.

-mhwmult is renamed to -msp430-hwmult, with the old spelling kept as an
alias.
LLM-aided
DeltaFile
+11-18llvm/lib/Target/MSP430/MSP430Subtarget.cpp
+16-11llvm/lib/Target/MSP430/MSP430Subtarget.h
+27-0llvm/lib/Target/MSP430/MSP430Options.td
+12-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+2-8llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
+1-5llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
+69-428 files not shown
+89-4814 files

LLVM/project 78a00fb — clang/test/CodeGenHLSL/resources StructuredBuffers-methods-lib.hlsl, llvm/include/llvm/IR IntrinsicsSPIRV.td IntrinsicsDirectX.td

[DirectX][SPIRV] Add ImmArg to constant intrinsics arguments (#232470)

Adds `ImmArg` annotations to intrinsic arguments that should always be
constant.

For DirectX this applies to:
- `dx_thread_id`, `dx_group_id`, `dx_thread_id_in_group` - the index
argument
- `int_dx_resource_atomic_binop` - the binary op code argument
- `dx_resource_updatecounter` - the increment/decrement value argument
- `dx_resource_gather`, `dx_resource_gather_cmp` - the component
argument
- `dx_barrier_by_memory_type`, `int_dx_barrier_by_memory_handle` - flags
arguments
- `dx_load_input`, `dx_store_input` - signature element ID and row/col
indices

For SPIRV this applies to:
- `spv_resource_updatecounter` - the increment/decrement value argument

    [9 lines not shown]
DeltaFile
+32-16llvm/include/llvm/IR/IntrinsicsDirectX.td
+12-12llvm/test/CodeGen/DirectX/comput_ids.ll
+0-10llvm/test/CodeGen/DirectX/Metadata/semantic-signatures-errors.ll
+3-3clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
+4-2llvm/include/llvm/IR/IntrinsicsSPIRV.td
+1-4llvm/lib/Target/DirectX/DXILSignatureAnalysis.cpp
+52-476 files not shown
+61-5712 files

FreeBSD/ports 05c18de — emulators/virtualbox-ose-72 Makefile distinfo, emulators/virtualbox-ose-72/files patch-src_VBox_Runtime_Makefile.kmk

emulators/virtualbox-ose{,-additions,-kmod}-72: Update 7.2.20 => 7.2.22

Changelog:
https://www.virtualbox.org/wiki/Changelog-7.2

Security:       CVE-2026-87322
Security:       CVE-2026-87301
Security:       CVE-2026-101598
Security:       CVE-2026-101599
Security:       CVE-2026-87303
Security:       CVE-2026-87311
Sponsored by:   UNIS Labs
MFH:            2026Q4

(cherry picked from commit bcea1e6e26a1ec0ab27e0c450bb82501bd386a33)
DeltaFile
+7-7emulators/virtualbox-ose-72/distinfo
+5-5emulators/virtualbox-ose-72/files/patch-src_VBox_Runtime_Makefile.kmk
+3-3emulators/virtualbox-ose-kmod-72/distinfo
+3-3emulators/virtualbox-ose-additions-72/distinfo
+1-2emulators/virtualbox-ose-72/Makefile
+1-1emulators/virtualbox-ose-kmod-72/Makefile
+20-211 files not shown
+21-227 files