graphics/cloudcompare: Use icons from ${_DISTDIR} not the ${FILESDIR}
Get icons downloaded during `make fetch` is a better approach than
committing PNG images into the repo.
Reported by: arrowd@, vvd@
Approved by: db@, yuri@ (Mentors, implicit)
Differential Revision: https://reviews.freebsd.org/D55434
[MLIR][Python] Add Python and C API of `mlir::DynamicType` (#182751)
This PR adds C and Python API support for `mlir::DynamicType`. It
primarily enables types in dialects that are dynamically generated via
IRDL to be constructed in Python, and allows retrieving the parameters
contained in a dynamic type from Python.
---------
Co-authored-by: Rolf Morel <rolfmorel at gmail.com>
[VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (#181789)
Currently createExtractsForLiveOuts only handles creating extracts when
the middle block has one predecessor, but if an early exit exits to the
same block as the latch then it might have multiple predecessors.
This handles the latter case to avoid the need to handle it in
VPlanTransforms::handleUncountableEarlyExits. Addresses the comment in
https://github.com/llvm/llvm-project/pull/174864#discussion_r2794153217
[TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (#182389)
Scalar multiply is not part of the most basic RISC-V ISA. Use a
and+setcc+select for these targets.
The and+setcc+select is also beneficial for targets with bit test
instructions. RISC-V may not get the full benefit here due to
not having a cmove-like instruction without Zicond.
Co-authored-by: fbrv <Fabio.Baravalle at gmail.com>
[CodeGen][NewPM] Name parameters in buildCodeGenPipeline
This is consistent with the coding style, and makes things consistent
between the various header files/improves readability slightly.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/182774
[RISCV] Update Andes45 vector floating-point arithmetic scheduling info (#181289)
This PR adds latency/throughput for all RVV floating-point arithmetic to
the andes45 series scheduling model.