LLVM/project 0fe9454llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 vector-shuffle-combining-avx512f.ll legalize-vec-assertzext.ll

[X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (#179630)

If a EXPAND node mask is just the lowest bits, then we can replace it
with a more general SELECT node, which can be cheaper and potentially
allow predication.

Fixes #179008
DeltaFile
+9-0llvm/lib/Target/X86/X86ISelLowering.cpp
+4-4llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
+2-2llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
+1-1llvm/test/CodeGen/X86/avx512bwvl-arith.ll
+16-74 files

LLVM/project a8af090clang/lib/AST/ByteCode Interp.h, clang/test/AST/ByteCode c.c

[clang][bytecode] Don't call getOffset on non-block pointers (#179628)

Fixes https://github.com/llvm/llvm-project/issues/177587
DeltaFile
+8-0clang/test/AST/ByteCode/c.c
+2-2clang/lib/AST/ByteCode/Interp.h
+10-22 files

LLVM/project 7171d6cmlir/include/mlir/Dialect/SPIRV/IR SPIRVCastOps.td SPIRVNonUniformOps.td

[mlir][spirv] Update op examples that diverged from assemblyFormat. NFC. (#179594)

DeltaFile
+11-11mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td
+6-6mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
+4-4mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td
+2-2mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
+2-2mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
+1-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
+26-261 files not shown
+27-277 files

FreeBSD/ports 334f3f0math/R-cran-psych distinfo Makefile

math/R-cran-psych: Update to 2.6.1

Changelog: https://cran.r-project.org/web/packages/psych/news.html
DeltaFile
+3-3math/R-cran-psych/distinfo
+1-1math/R-cran-psych/Makefile
+4-42 files

LLVM/project ea7f8c8llvm/lib/Target/AArch64 MachineSMEABIPass.cpp

[AArch64] Fix a couple of typos (NFC) (#179639)

Fixes some comments I forgot to correct/update.
DeltaFile
+7-7llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
+7-71 files

LLVM/project 8a2b41bclang/lib/Driver/ToolChains/Arch X86.cpp

[X86][NFC] Split mapxf options from mapx_features (#179638)

So that we don't need to check `Name == "apxf"` again.
DeltaFile
+19-20clang/lib/Driver/ToolChains/Arch/X86.cpp
+19-201 files

LLVM/project 49bf907llvm/lib/Target/Mips MipsLegalizerInfo.cpp MipsInstructionSelector.cpp, llvm/lib/Target/PowerPC/GISel PPCInstructionSelector.cpp

[NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (#179632)

This function always returns `true`; so we can transform it to return
`void` and simplify the code.

Follow up of https://github.com/llvm/llvm-project/pull/179501 .
DeltaFile
+487-482llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+91-94llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
+11-22llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+8-9llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
+6-7llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+3-6llvm/lib/Target/Mips/MipsInstructionSelector.cpp
+606-6202 files not shown
+613-6258 files

OPNSense/core 2528b45src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms dialogFilterRule.xml, src/opnsense/mvc/app/library/OPNsense/Firewall FilterRule.php

Firewall: Rules [new]: Add tcpflags_any for parity with legacy rules
DeltaFile
+10-0src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogFilterRule.xml
+8-1src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.php
+1-1src/opnsense/mvc/app/library/OPNsense/Firewall/FilterRule.php
+1-0src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.xml
+20-24 files

LLVM/project 071bb46llvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU pei-build-spill-offset-overflow-gfx950.mir

[AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (#179182)

This PR addresses Maxoffset calculation bug in SIRegisterInfo. When
RemSize is non-zero, maxoffset, that needs to be encoded in the offset
field, will be equal to "Offset + Size".

---------

Co-authored-by: Abhinav Garg <abhigarg at amd.com>
DeltaFile
+32-0llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
+4-1llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+36-12 files

LLVM/project 05db0c4llvm/lib/Target/AMDGPU AMDGPULaneMaskUtils.h

[AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (#179493)

Add CmpLG and OrN2 operators to be able to use the LaneMaskConstants in
PhiLoweringHelper from SILowerI1Copies
DeltaFile
+4-0llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
+4-01 files

LLVM/project 2808332llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 combine-bzhi.ll

[X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (#179444)

Fixes #177364
DeltaFile
+41-0llvm/test/CodeGen/X86/combine-bzhi.ll
+21-1llvm/lib/Target/X86/X86ISelLowering.cpp
+62-12 files

NetBSD/pkgsrc-wip 9463c7fvalgrind-netbsd-git TODO Makefile

valgrind-netbsd-git: update status

tests build now, test status not looking too great
DeltaFile
+2-13valgrind-netbsd-git/TODO
+5-4valgrind-netbsd-git/Makefile
+3-3valgrind-netbsd-git/distinfo
+10-203 files

NetBSD/pkgsrc SNymKYhshells/rssh Makefile

   rssh: switch to sourceforge, other site is dead
VersionDeltaFile
1.21+2-2shells/rssh/Makefile
+2-21 files

NetBSD/pkgsrc FwycfWEnet/rp-pppoe Makefile

   rp-pppoe: comment out dead site
VersionDeltaFile
1.44+3-3net/rp-pppoe/Makefile
+3-31 files

NetBSD/pkgsrc 8ZGwn5Jgames/robotfindskitten Makefile

   robotfindskitten: switch to https
VersionDeltaFile
1.7+3-4games/robotfindskitten/Makefile
+3-41 files

NetBSD/pkgsrc 6vl3Ni2devel/librlog Makefile

   librlog: comment out dead site
VersionDeltaFile
1.8+3-4devel/librlog/Makefile
+3-41 files

NetBSD/pkgsrc feJqQaslang/forth-retro Makefile

   forth-retro: comment out dead site
VersionDeltaFile
1.4+3-3lang/forth-retro/Makefile
+3-31 files

NetBSD/pkgsrc 6auMUO1devel/Renaissance Makefile

   Renaissance: comment out dead site

   XXX: project has no updates since 2008, remove?
VersionDeltaFile
1.53+3-3devel/Renaissance/Makefile
+3-31 files

OPNSense/core 3e438a8src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterController.php, src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Firewall - Rules [new]: Add all rules option to interface selectpicker and make it default selection (#9713)

* Firewall - Rules [new]: Add all rules option to interface selectpicker and select it by default
* Interface select default only on null or no match, not on empty string
* To fix URL hash weirdness, it's best to special case __floating and __any in the frontend
* Lower diff in controller by folding null case into is_if
* firewall: tweak the interface selector

Show group name and description.  Could be inconvenient when
the description is long, but better for the auto-groups.
That also removes the hint at the end.  See note below.

Use fixed width logos for the interface groupings.

Remove muted from the any selection.

TODO/Remarks:

The groupings being shown as muted is a bit inconvenient also

    [16 lines not shown]
DeltaFile
+40-19src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterController.php
+13-6src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+53-252 files

LLVM/project 046413fllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel unmerge-sgpr-s16.mir

AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (#179441)

Used to fail EXPENSIVE_CHECKS because of type mismatch.
DeltaFile
+5-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.mir
+9-72 files

LLVM/project 3462c2bclang/test/CodeGenCXX exceptions-seh.cpp

[NFC] Add redirect the output (#179623)

DeltaFile
+3-3clang/test/CodeGenCXX/exceptions-seh.cpp
+3-31 files

FreeBSD/ports 62cddfewww/py-google-api-python-client distinfo Makefile

www/py-google-api-python-client: Update to 2.189.0

ChangeLog:      https://github.com/googleapis/google-api-python-client/releases/tag/v2.189.0
Reported by:    "release-please[bot]" <notifications at github.com>
DeltaFile
+3-3www/py-google-api-python-client/distinfo
+2-2www/py-google-api-python-client/Makefile
+5-52 files

LLVM/project 111bef2llvm/include/llvm/ADT Uniformity.h, llvm/lib/Analysis UniformityAnalysis.cpp

update uniformity per val instead inst
DeltaFile
+110-4llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/per-output-uniformity.mir
+34-33llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+13-13llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+6-7llvm/lib/Analysis/UniformityAnalysis.cpp
+6-6llvm/include/llvm/ADT/Uniformity.h
+4-5llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+173-689 files not shown
+197-9315 files

LLVM/project a631f3ellvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 gfni-xor-fold.ll gfni-xor-fold-avx512.ll

[X86] Fold vgf2p8affineqb XOR with splat constant into immediate (#179103)

The vgf2p8affineqb instruction performs an affine transformation on each
byte and then XORs the result with an 8-bit immediate operand. When this
instruction is followed by a standalone XOR with a splatted constant,
LLVM currently generates extra instructions instead of folding the
constant into the instruction's immediate.
This PR adds a DAG combine optimization that detects the pattern
vgf2p8affineqb(x, m, imm8) ^ C where C is a splatted 8-bit constant and
transforms it to vgf2p8affineqb(x, m, imm8 ^ C), eliminating the
unnecessary XOR instruction.
- The optimization runs during the combine phase after type legalization
- Handles XOR with the constant on either side (commutative)
- Only applies when the GFNI instruction has a single use to avoid
de-optimization
- Validates that the XOR operand is a splatted 8-bit constant before
folding
- Includes test coverage for positive cases and negative cases
(multi-use, non-splat constant, variable XOR)
DeltaFile
+144-0llvm/test/CodeGen/X86/gfni-xor-fold.ll
+63-0llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
+28-0llvm/lib/Target/X86/X86ISelLowering.cpp
+235-03 files

LLVM/project 7b600e6llvm/lib/Target/Mips MipsLegalizerInfo.cpp MipsInstructionSelector.cpp, llvm/lib/Target/PowerPC/GISel PPCInstructionSelector.cpp

[NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void`

This function always returns `true`; so we can transform it to return
`void` and simplify the code.

Follow up of https://github.com/llvm/llvm-project/pull/179501 .
DeltaFile
+487-482llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+91-94llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
+11-22llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+8-9llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
+6-7llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+3-6llvm/lib/Target/Mips/MipsInstructionSelector.cpp
+606-6202 files not shown
+613-6258 files

OPNSense/core 6dce1desrc/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterController.php, src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Firewall - Rules [new]: Add all rules option to interface selectpicker and make it default selection (#9713)

* Firewall - Rules [new]: Add all rules option to interface selectpicker and select it by default
* Interface select default only on null or no match, not on empty string
* To fix URL hash weirdness, it's best to special case __floating and __any in the frontend
* Lower diff in controller by folding null case into is_if
* firewall: tweak the interface selector

Show group name and description.  Could be inconvenient when
the description is long, but better for the auto-groups.
That also removes the hint at the end.  See note below.

Use fixed width logos for the interface groupings.

Remove muted from the any selection.

TODO/Remarks:

The groupings being shown as muted is a bit inconvenient also

    [14 lines not shown]
DeltaFile
+40-19src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterController.php
+13-6src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+53-252 files

LLVM/project 275eea2llvm/lib/Target/Hexagon HexagonISelLowering.cpp, llvm/test/CodeGen/Hexagon no-invalid-node-v4i16.ll

[HEXAGON] Extend/Truncate the shift amount into i32 (#179499)

Fixes a Backend error
DeltaFile
+24-0llvm/test/CodeGen/Hexagon/no-invalid-node-v4i16.ll
+11-2llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+35-22 files

LLVM/project 319dcc1llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/LoongArch/lsx issue177155.ll

[SelectionDAG] Use promoted types when creating nodes after type legalization (#178617)

When creating new nodes with illegal types after type legalization, we
should try to use promoted type to avoid creating nodes with illegal
types.

Fixes: https://github.com/llvm/llvm-project/issues/177155
(cherry picked from commit 38e280d8a405bb442d176b8dab18da63d3fc2810)
DeltaFile
+26-0llvm/test/CodeGen/LoongArch/lsx/issue177155.ll
+7-0llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+33-02 files

NetBSD/pkgsrc YJBUUzPdoc CHANGES-2026 TODO

   doc: Updated security/gnupg2 to 2.5.17
VersionDeltaFile
1.892+2-1doc/CHANGES-2026
1.26759+1-2doc/TODO
+3-32 files

NetBSD/pkgsrc a3CJUTRsecurity/gnupg2 Makefile PLIST

   gnupg2: update to 2.5.17 again.

   The problem on NetBSD has been fixed in libgpg-error.
   Depend on the fixed version.
VersionDeltaFile
1.172+8-6security/gnupg2/Makefile
1.21+7-2security/gnupg2/PLIST
1.94+4-4security/gnupg2/distinfo
+19-123 files