[CodeGen] Drop dead SlotIndexes before allocation
SlotIndexes keeps the index list entry of an erased instruction and only
clears its instruction pointer. Live range sizes are measured in slot
indexes and greedy ranks ranges by size, so the leftovers inflate some
ranges more than others and reorder allocation, spilling heavily on
register-starved functions.
Add SlotIndexes::compactIndexes() to erase them. Erased entries are
unlinked, so holding an index to one is now a bug; linkedEntry() asserts
on it. The one analysis that did was LiveIntervals, so add
removeUnreferencedIntervals() to retire the intervals responsible.
Off by default behind -greedy-compact-slot-indexes, since it changes
allocation across much of the test suite.
[Modules] Don't treat piped input as file input (#233371)
Close https://github.com/llvm/llvm-project/issues/229431
The root cause of the problem is, clang treat the filename from stdin as
<stdin>. Then when there are multiple input files from stdin, the cache
status is polluted.
This patch fixes this as not treating piped input as file input.
This may show another concern as if we have different file contents with
the same name, it may be problematic.
[scudo] Only lock active TSDs in TSDRegistrySharedT::disable() (#233617)
TSDRegistrySharedT::disable() and enable() run around fork() via
pthread_atfork and lock and unlock all TSDsArraySize TSDs. Only the
first NumberOfTSDs TSDs can ever be handed to a thread, so touching the
rest only dirties their pages.
On Android (TSDsArraySize 8, NumberOfTSDs 2 by default), unlocking the
six inactive TSDs in the child writes to their mutex words and causes
copy-on-write faults on five otherwise untouched .bss pages in every
forked process. On an idle device this is 20 KiB of private dirty
memory per Zygote-forked process, or about 2.3 MiB across the ~120 such
processes.
Bound both loops by NumberOfTSDs, matching drainCaches() and getStats().
setNumberOfTSDs() only grows the count and only while holding Mutex,
which disable() holds until enable(), so both loops see the same value.
Also call disable()/enable() in TSDRegistryTSDsCount before and after
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[clang] Add aarch64-unknown-uefi target
Add the aarch64-unknown-uefi target to clang, building on the backend
support added in the preceding patches. Like x86_64-unknown-uefi it
follows the Microsoft ABI conventions, matching the Windows ARM64 target
which is the only way EFI applications for AArch64 can be built with
Clang/LLVM today:
* add UEFIAArch64TargetInfo: LLP64 types, Microsoft C++ ABI, char*
based va_list and the Win64 calling convention kind,
* use the Windows AArch64 ABI info in CodeGen for UEFI,
* accept aarch64 for *-uefi triples in the driver.
The UEFI toolchain already handles the linker invocation (lld-link with
/subsystem:efi_application), so no further driver changes are needed.
Assisted-by: Claude
[AArch64] Apply the Windows SEH and CRT codegen constraints to UEFI
aarch64-unknown-uefi uses SEH unwind information and has no C runtime
library, so the remaining Windows specific codegen decisions that follow
from this apply to it too:
* do not align loops or basic blocks, since SEH unwind info generation
needs the exact function layout before alignment padding is inserted,
* sign return addresses with the B key by default and reject A key
signing, matching the pac_sign_lr unwind code used by the unwinder;
the branch protection parser defaults to the B key for UEFI as well,
so that -mbranch-protection=pac-ret keeps working,
* do not lower wide shifts to libcalls at -Oz, as those helpers are not
available.
The corresponding Windows tests gain aarch64-unknown-uefi run lines and
the LLVM release notes announce the new target, which completes the
backend side of aarch64-unknown-uefi support.
Assisted-by: Claude
[clang][Driver] Use the Windows ARM64 defaults for aarch64-unknown-uefi
Match the Windows ARM64 driver defaults for aarch64-unknown-uefi, which
follows the same ABI:
* char is signed, so do not pass -fno-signed-char,
* the frame chain must stay valid even when frame pointers are omitted,
so -fomit-frame-pointer yields -mframe-pointer=reserved rather than
none, as the backend reserves the frame pointer for UEFI as well,
* -msign-return-address selects the B key, the only one the backend
accepts for Windows and UEFI.
Assisted-by: Claude
[AArch64] Classify global references on UEFI like Windows COFF
Apply the Windows COFF rules for global references to
aarch64-unknown-uefi, which produces the same PE/COFF images:
* classify dllimport and non-dso-local globals with MO_DLLIMPORT /
MO_COFFSTUB, so extern_weak symbols are referenced through a stub that
can be resolved to zero by the linker,
* keep the existing SelectionDAG, FastISel and GlobalISel handling of
calls and tail calls to extern_weak functions in sync with that,
* default to the PIC relocation model, so jump tables and other
references stay position independent in relocatable PE images,
* lower ifuncs on UEFI as COFF has no support for them.
The extern weak and jump table tests gain aarch64-unknown-uefi run lines,
and a new test checks that the default pipelines lower ifuncs for both
Windows and UEFI.
Assisted-by: Claude
[AArch64] Probe large stack frames with __chkstk on UEFI
Like Windows, aarch64-unknown-uefi has no guard page handling of its
own, so frames larger than the probe size are probed with __chkstk
instead of inline probing, and "no-stack-arg-probe" disables it.
Tests: chkstk.ll, no-stack-arg-probe.ll and win-alloca-no-stack-probe.ll.
Assisted-by: Claude
[AArch64] Use __chkstk for dynamic stack allocation on UEFI
Register the Windows __chkstk stack probe helper for aarch64-unknown-uefi
and lower dynamic stack allocations through it, including the SME ZA
buffer allocation in LowerFormalArguments. GlobalISel falls back to
SelectionDAG for dynamic allocas on UEFI as it does on Windows.
Tests: win-alloca.ll, the vla in win64_vararg.ll (which now runs in full
on UEFI) and sme-lazy-save-windows.ll.
Assisted-by: Claude
lang/gcc/16: build stage1 compiler with -O2
By default it builds stage1 compilers as -g only which leads to large binaries
like ~350Mb on amd64, and replacing it by -O2 reduces size of them to ~50Mb.
What reduces build time at fast amd64 with NVME from ~28 to ~15 minutes.
[AArch64] Reserve x18 as the platform register on UEFI
Both the Windows ARM64 ABI, which UEFI follows, and the firmware
ecosystem (EDK2 builds AArch64 with -ffixed-x18) treat x18 as a reserved
platform register. Reserve it by default for aarch64-unknown-uefi, as is
already done for Windows, Darwin, Android, Fuchsia and OHOS.
Assisted-by: Claude
[AArch64] Treat the Win64 calling convention as native on UEFI
Functions using the Win64 calling convention on a non-Windows target
back up x18 and are excluded from tail call optimization, because x18
is the platform register there. On UEFI the Win64 convention is the
native one, so apply the Windows behaviour.
Tests: win64cc-backup-x18.ll gains Windows and UEFI run lines showing
that neither backs up x18 and both tail call.
Assisted-by: Claude
[AArch64] Use the Win64 calling convention and va_list on UEFI
UEFI follows the Windows ARM64 procedure call standard, as
x86_64-unknown-uefi already follows the Win64 one. Use it for C, Fast
and Swift calls on aarch64-unknown-uefi: the Win64 variadic convention
(all remaining argument registers are homed and floating point variadic
arguments travel in GPRs), the char* va_list for va_copy, and the
preserve_none variant that follows the Win64 rules.
Tests: win64_vararg_float.ll (SelectionDAG, FastISel and GlobalISel),
win64_vacopy.ll (SelectionDAG and GlobalISel va_copy),
preserve_nonecc_varargs_win64.ll and preserve_nonecc_call.ll.
isArgumentRegister follows for consistency; it only feeds
-fzero-call-used-regs, which is a no-op on Windows ARM64 today.
Assisted-by: Claude
[CMake] Avoid reconfiguring runtimes on every incremental build (#233347)
Because llvm_ExternalProject_Add uses BUILD_ALWAYS, building builtins
triggers runtimes-configure to re-run CMake on every incremental build
(such as `ninja compiler-rt`) even when nothing changed.
Assisted-by: Gemini
[AArch64] Use the Windows callee saved registers and frame chain on UEFI
aarch64-unknown-uefi already emits Windows (SEH) unwind info, but CodeGen
still used the AAPCS callee saved register order, which produces
non-consecutive save_regp pairs and trips the "Non-consecutive registers
not allowed for save_regp" assertion for any function with a frame
record. Introduce AArch64Subtarget::isTargetUEFI() and
isTargetWindowsOrUEFI() and use the latter for the Windows callee saved
register list, the matching frame record pairing rules, and the
requirement that the frame chain stays valid in every function.
Tests: uefi-frame-record-pairing.ll (prologue pairing and the object
file) and regress-w29-reserved-with-fp.ll (x29 reserved by default).
Assisted-by: Claude
[lldb] Replace ConstString in GetIndexOfChildWithName (#233577)
Most of these are just doing things like comparisons and don't actually
benefit from interning.
[mlir][memref] Reject memref.reshape with static shape and unranked result (#223496)
The memref.reshape docs list two forms: a shape operand of static length
with a ranked result, or a shape operand of dynamic length with an
unranked result. The verifier only checks this pairing when the result
is
ranked, so the third combination (static length, unranked result) is
accepted:
```mlir
%0 = memref.reshape %src(%shape) : (memref<*xf32>, memref<2xindex>) -> memref<*xf32>
```
Both consumers of the op pick the ranked code path from the shape
operand alone and then cast the result type to MemRefType, which asserts
on the unranked result: MemRefReshapeOpLowering in MemRefToLLVM (the
reporter's -convert-openmp-to-llvm crash, also reachable through
-finalize-memref-to-llvm) and MemRefReshapeOpConverter in
-memref-expand.
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[Clang][counted_by] Keep the align_value assumption on the bounds-checked load
With -fsanitize=array-bounds, a subscript of a 'counted_by' pointer field
loads the pointer directly from the field's l-value, so that the bounds
check can reuse the field's address instead of re-evaluating the base.
That load bypassed ScalarExprEmitter, which is where the 'align_value'
assumption for a loaded l-value is emitted. Enabling array-bounds
therefore silently dropped the llvm.assume alignment bundle and, with
-fsanitize=alignment, the alignment-assumption check as well.
Move EmitLValueAlignmentAssumption from ScalarExprEmitter into
CodeGenFunction, so that the direct-load path can share it, and call it
on the loaded pointer.
Assisted-by: Claude Opus 5.5
[mlir][arith] Drop invalid overflow flags when narrowing (#233324)
Preserve `nsw` only when narrowing preserves signed operand and result
values, and `nuw` only when it preserves unsigned values. Flags proven
at the original width may otherwise introduce poison after narrowing.
Add concrete regression cases for `addi`, `subi`, `muli`, and `shli`,
covering both overflow flags and retention of valid flags.
Assisted-by: Codex
[mlir][arith] Fix integer-to-float comparison canonicalization
Reject conversions that can produce NaN or saturate, and formats
that cannot represent zero or signed inputs. Preserve safe rewrites
when the integer range fits the floating-point exponent range.
Handle unconditional cmpf predicates without reaching an unreachable
case. Add regression coverage for exotic formats and rounding limits.
Validation used existing binaries; no rebuild was performed.
[llvm] Absolutize the remarks filename using LLVMContext's VFS (#233483)
This builds on top of https://github.com/llvm/llvm-project/pull/232879
to replace two calls to `sys::fs::make_absolute()` (that trigger IO
sandbox violations) with a centralized call to
`vfs::FileSystem::makeAbsolute()`.
rdar://184781402
[LLVM][docs] Finish MyST migration for AMDGPU docs
Clean up the rst2myst output for the AMDGPU docs: repair MyST syntax,
convert tables and cross-references to native MyST where practical, and keep
generated heading IDs and labels stable. Keep eval-rst only for the large grid
and simple tables that have no practical native MyST equivalent.
LLM-aided
[CIR] Implement 'flattening' for loop hints (#233567)
The loop hints need to be propagated to the branches that jump back to
the 'beginning' of an iteration. This patch adds the loop-hints to the
br/brcond operations, and makes sure they are propagated during
flattening.
Additionally, EHABI Lowering work needed to happen to make sure the
original branch's loop_hints are rebuilt with the cir.br. There wasn't a
good way to test this that I could find, so it is purely for
completeness.
This is the 2nd in a set of 3 patches, the previous made sure the
frontend lowered to CIR, the next will make sure we lower properly to
LLVM-IR.
[lldb][docs] Share formatting links between Doxygen and Sphinx
Define a documentation alias that expands to an absolute URL in Doxygen
and a Sphinx doc reference in generated Python docstrings. This keeps
links clickable in both outputs without absolute self-link warnings.
LLM-aided
librep: note upstream version of some build fixes
(There actually is an upstream still, it just hasn't released anything
since 2017, and its main archive site is no longer functioning. Their
patching here is basically the same as what was already committed.)
