[CodeGen][DWARF][NFC] Add casts to a few asserts to avoid msvc warning. (#218386)
Fix some comparisons to correct the msvc warning: C4805: '==': unsafe
mix of type 'IntType' and type 'bool' in operation
Assisted-by: LLM.
[ORC-RT] Rename the executor library to bedrock (#218881)
The "executor" name was a placeholder, and clashed with "executor" as a
description of the process. "bedrock" names the role: the bootstrap
floor that JIT'd code is built on. A future companion library, SPIRE,
will hold the JIT-loaded portion of the ORC runtime.
This is a pure rename with no functional change:
lib/executor/ -> lib/bedrock/
orc-rt-executor -> orc-rt-bedrock
orc-rt-executor-impl-headers -> orc-rt-bedrock-impl-headers
The library's public headers are also nested under an
include/orc-rt/bedrock/ subdirectory, so include paths name the library
the header belongs to:
#include "orc-rt/Session.h" -> #include "orc-rt/bedrock/Session.h"
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[mlir][LLVM] Verify that constant attribute and result types match
`llvm.mlir.constant` only checked that the kind of the value attribute suits
the kind of the result type, never that the types themselves agree. All of the
following verified:
%0 = llvm.mlir.constant(1 : index) : i64
%1 = llvm.mlir.constant(1 : i8) : i16
%2 = llvm.mlir.constant(dense<1> : vector<4xi32>) : vector<4xi64>
Translation ignores the attribute type and uses the result type, so the
attribute type was effectively decorative for integers, and passes that read it
back could observe a type that has nothing to do with the value.
Require exact type equality for integer attributes and exact element type
equality for integer elements attributes, mirroring the `AllTypesMatch`
constraint `arith.constant` gets from ODS. The op cannot use that trait itself
because `value` is an `AnyAttr` that also holds `StringAttr` and `ArrayAttr`.
The element type check is also run on the scalable vector path, which
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[LLVM] Add `llvm.vector.reduce.{min, max}imumnum` (#218295)
fixes https://github.com/llvm/llvm-project/issues/185827
Really this is just a mechanical addition, using the fallback mechanism
for reductions (i.e. no custom lowerings yet).
[mlir][CAPI] Use explicit inherent/discardable attribute split APIs (#218884)
Use explicit discardable attribute iteration in the core C API and scope
the remaining compatibility accessors under deprecation suppression.
Assisted-by: Codex
[AMDGPU] Do not coerce values defined by terminators in LiveRegOptimizer (#218868)
Inserting the coercion after a value-producing terminator (invoke,
callbr) lands past the end of its block, leaving the IR without a
terminator
[AMDGPU] Fix PromoteAlloca miscompile of invariant marker intrinsics (#217029)
GEP'd pointers were silently replaced with the alloca base address,
because the rewrite passed the LDS slice base pointer instead of the
intrinsic actual pointer operand
[mlir][Analysis] Use explicit attribute APIs to distinguish between inherent/discardable attrs (#218878)
Migrate analysis implementations and test utilities to explicit
discardable or inherent operation attribute access.
Assisted-by: Codex
[mlir][Bytecode] Use explicit attribute APIs to split inherent/discardable attr access (#218880)
Use explicit discardable and inherent attribute access when numbering
and writing bytecode, and update the focused unit coverage.
Assisted-by: Codex
ggml: update to 0.22.0.
This release adds tensor-split support to the multi-backend (meta)
backend with improved split-state propagation, reworks the Metal
kernels into per-op sources with parallel compilation, and fixes
ggml_clamp to be a proper non-in-place op. It also brings new ops
(POOL_1D, PAD_REFLECT_1D), Q2_K SYCL kernels, MoE bias fusion on
OpenCL, and assorted fixes across the CUDA, Metal, SYCL, Vulkan,
OpenCL and WebGPU backends.
[SelectionDAG] Avoid irregular INSERT_SUBVECTOR when widening CTTZ_ELTS (#218019)
Fixes #217985
Non-poison `CTTZ_ELTS` pads widened operands with active lanes using
`INSERT_SUBVECTOR`. For irregular fixed-length vectors whose
widened type subsequently requires splitting, this can reach the
`SplitVecRes_INSERT_SUBVECTOR` stack-spill fallback.
That fallback calls `getVectorSubVecPointer`, which requires
byte-addressable elements.
Use `VECTOR_SHUFFLE` for this specific widening case. Original lanes are
selected from the normally widened source, while padding lanes are
selected from an all-ones vector. This avoids the irregular
`INSERT_SUBVECTOR` and prevents poison/undef widened padding from being
observed.
Other widening cases retain their existing behavior.
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Do not hardcode /usr/src/ in one of the files containing desired output.
This is expected to fix a test failure that anton@ reported with BSDSRCDIR set.
[AArch64] Use SDValue to pass to vectorToScalarBitmask. (#218717)
Passing a SDNode loses whether the value is result 1 from a
uadd_with_overflow. Pass the SDValue instead.
Fixes #218668
[clang] Add visibility to AST dump (#218113)
Similarly to https://github.com/llvm/llvm-project/pull/194600, this PR
adds visibility information (default/hidden/protected) to AST dump in
exactly the same places where linkage is printed. As with no linkage,
default visibility is assumed and not printed, as it's so common that I
didn't have to update any of the existing tests.
