LLVM/project 4832c33llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.exp10.f64.ll llvm.exp.f64.ll

AMDGPU: Implement expansion for f64 exp (#182539)

I asked AI to port the device libs reference implementation.
It mostly worked, though it got the compares wrong and also
missed a fold that happened in compiler. With that fixed I get
identical DAG output, and almost the same globalisel output (differing
by an inverted compare and select). Also adjusted some stylistic
choices.
DeltaFile
+11,178-0llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
+10,242-0llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
+9,987-0llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
+119-9llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+116-1llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+31-7llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+31,673-176 files not shown
+31,731-6512 files

LLVM/project 9ffa586llvm/test/CodeGen/AMDGPU local-stack-alloc-add-references.gfx8.mir coalesce-copy-to-agpr-to-av-registers.mir, llvm/test/TableGen ArtificialRegs.td

[TableGen] Complete the support for artificial registers

Artificial registers were added in eb0c510ecde667cd911682cc1e855f73f341d134
as a means of giving super-registers heavier weights than that
of their subregisters, even when they only contain a single
physical subregister.

Artifical registers thus do exist in code and participate in
register unit weight calculations, but are not supposed to be
available for register allocation.

This patch completes the support for artificial registers to:

- Ignore artificial registers when joining register unit uber
  sets. Artificial registers may be members of classes that
  together include registers and their sub-registers, making it
  impossible to compute normalised weights for uber sets they
  belong to.


    [26 lines not shown]
DeltaFile
+180-180llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
+120-120llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
+90-90llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
+56-7llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+56-0llvm/test/TableGen/ArtificialRegs.td
+18-18llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
+520-41525 files not shown
+671-56231 files

LLVM/project b1325cbclang/docs ReleaseNotes.rst, clang/lib/Analysis CFG.cpp

Revert [Clang] eliminate -Winvalid-noreturn false positive after throw + unreachable try/catch blocks (#183365)

Reverts https://github.com/llvm/llvm-project/pull/175443

---

Reverting for now because the CFG `try` connectivity change caused
additional analysis regressions (`-Wthread-safety-analysis` etc.) beyond
the original fix.
DeltaFile
+20-1clang/lib/Sema/AnalysisBasedWarnings.cpp
+6-14clang/test/Analysis/auto-obj-dtors-cfg-output.cpp
+2-10clang/lib/Analysis/CFG.cpp
+0-7clang/test/SemaCXX/return-noreturn.cpp
+4-2clang/test/Analysis/misc-ps-region-store.cpp
+0-1clang/docs/ReleaseNotes.rst
+32-356 files

LLVM/project 9ab13eellvm/lib/Transforms/Scalar LoopFuse.cpp

[LoopFusion] clear FusionCandidates more often (#183353)

A LoopVector contains all the loops with the same parent loop (or all
loops with no parent). Once loop fusion is done with the transformation
for candidates extracted from one LoopVector we can safely clear
FusionCandidates. This avoids unnecssary work and results in more
meaningful statistics.
DeltaFile
+1-1llvm/lib/Transforms/Scalar/LoopFuse.cpp
+1-11 files

LLVM/project 0c53a89llvm/lib/Target/Hexagon HexagonISelLoweringHVX.cpp HexagonPatternsHVX.td, llvm/test/CodeGen/Hexagon/isel trunc-vNi1-HVX.ll

[Hexagon] Fix truncation to boolean vector that need widening (#182528)

When truncating a sub-HVX-width vector to a boolean vector (e.g., v64i8
-> v64i1 in 128-byte HVX mode), the operation would crash with
"Unhandled HVX operation" UNREACHABLE. This happened because the
condition in LowerHvxOperationWrapper/ReplaceHvxNodeResults did not
handle the case where the input vector needs widening and the result is
a boolean vector.

The fix adds WidenHvxTruncateToBool which widens the input to HVX
register width (e.g., v64i8 -> v128i8), performs the truncate to widened
bool type (v128i8 -> v128i1), extracts the result subvector (v128i1 ->
v64i1).

This allows the widened truncate to match the existing V6_vandvrt
pattern in HexagonPatternsHVX.td.
DeltaFile
+135-13llvm/test/CodeGen/Hexagon/isel/trunc-vNi1-HVX.ll
+66-2llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+3-0llvm/lib/Target/Hexagon/HexagonPatternsHVX.td
+1-0llvm/lib/Target/Hexagon/HexagonISelLowering.h
+205-154 files

LLVM/project bd93af1llvm/test/CodeGen/AMDGPU local-stack-alloc-add-references.gfx8.mir coalesce-copy-to-agpr-to-av-registers.mir, llvm/test/TableGen ArtificialRegs.td

[TableGen] Complete the support for artificial registers

Artificial registers were added in eb0c510ecde667cd911682cc1e855f73f341d134
as a means of giving super-registers heavier weights than that
of their subregisters, even when they only contain a single
physical subregister.

Artifical registers thus do exist in code and participate in
register unit weight calculations, but are not supposed to be
available for register allocation.

This patch completes the support for artificial registers to:

- Ignore artificial registers when joining register unit uber
  sets. Artificial registers may be members of classes that
  together include registers and their sub-registers, making it
  impossible to compute normalised weights for uber sets they
  belong to.


    [26 lines not shown]
DeltaFile
+180-180llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
+120-120llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
+90-90llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
+56-7llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+56-0llvm/test/TableGen/ArtificialRegs.td
+18-18llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
+520-41525 files not shown
+671-56231 files

LLVM/project e4aece1llvm/test/CodeGen/PowerPC clmul-vector.ll, llvm/test/CodeGen/RISCV clmul.ll clmulr.ll

Merge branch 'main' into users/kparzysz/l02-inline-checkblock
DeltaFile
+25,051-14,920llvm/test/CodeGen/RISCV/clmul.ll
+16,004-0llvm/test/MC/AMDGPU/gfx13_asm_vopd3.s
+13,198-0llvm/test/CodeGen/RISCV/clmulr.ll
+12,863-0llvm/test/CodeGen/RISCV/clmulh.ll
+8,874-0llvm/test/CodeGen/PowerPC/clmul-vector.ll
+3,298-3,437llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
+79,288-18,3574,500 files not shown
+318,427-116,2794,506 files

LLVM/project 76a15e6flang/lib/Semantics check-omp-loop.cpp

Update check-omp-loop.cpp
DeltaFile
+1-1flang/lib/Semantics/check-omp-loop.cpp
+1-11 files

LLVM/project 7743c87llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-trig-preop.ll

ValueTracking: Special case fmul by llvm.amdgcn.trig.preop

This is another instance of the logic from #183159. If we know
one source is not-infinity, and the other source is less than or
equal to 1, this cannot overflow. Special case llvm.amdgcn.trig.preop,
as a substitute for proper range tracking. This almost enables pruning
edge case handling in trig function implementations, if not for the
recursion depth limit (but that's a problem for another day).
DeltaFile
+113-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
+25-12llvm/lib/Analysis/ValueTracking.cpp
+138-122 files

LLVM/project 8d62562lldb/source/Plugins/ScriptInterpreter/Lua CMakeLists.txt, lldb/source/Plugins/ScriptInterpreter/Python CMakeLists.txt

[lldb] Fix spurious indentation in CMakeLists.txt (NFC) (#183368)

Fix spurious indentation in ScriptInterpreter/*/CMakeLists.txt.
DeltaFile
+2-2lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
+2-2lldb/source/Plugins/ScriptInterpreter/Lua/CMakeLists.txt
+4-42 files

FreeBSD/doc 0beb991website/content/ru/releases/15.0R errata.adoc

website/ru: Update releases/15.0R/errata.adoc

Sync to EN 005bf1c59c120936048675bffc89c5f649cc7c99
DeltaFile
+2-1website/content/ru/releases/15.0R/errata.adoc
+2-11 files

FreeBSD/ports 887c629sysutils/py-salt Makefile distinfo, sysutils/py-salt/files patch-requirements_base.txt patch-salt_utils_process.py

sysutils/py-salt: Update to 3006.23

PR:             287582
Reported by:    Nick Hilliard <nick__at__foobar__dot__org>, T.S. <net__at__arrishq__dot__net>, James TD Smith <ahktenzero+freebsd__at__mohorovi__dot__cc>
DeltaFile
+29-6sysutils/py-salt/files/patch-requirements_base.txt
+15-13sysutils/py-salt/files/patch-salt_utils_process.py
+13-8sysutils/py-salt/Makefile
+0-10sysutils/py-salt/files/patch-salt_ext_tornado_iostream.py
+3-3sysutils/py-salt/distinfo
+3-3sysutils/py-salt/files/patch-salt_loader_lazy.py
+63-433 files not shown
+65-479 files

LLVM/project 4919be7clang/lib/StaticAnalyzer/Checkers/WebKit PtrTypesSemantics.cpp, clang/test/Analysis/Checkers/WebKit uncounted-obj-arg.cpp

[WebKit Checkers] Handle CXXRewrittenBinaryOperator in trivial analysis. (#183278)

Visit the semantic form when encountering CXXRewrittenBinaryOperator in
the trivial function analysis / no-delete analysis.
DeltaFile
+14-1clang/test/Analysis/Checkers/WebKit/uncounted-obj-arg.cpp
+5-0clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
+19-12 files

LLVM/project 85a1fe6lldb/source/Plugins/Process/FreeBSD-Kernel-Core ProcessFreeBSDKernelCore.cpp CMakeLists.txt, llvm/docs ReleaseNotes.md

[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183237)

Implement `ProcessFreeBSDKernelCore::DoWriteMemory()` to write data on
kernel dump or `/dev/mem`. Due to security concerns (e.g. writing wrong
value on `/dev/mem` can trigger kernel panic), this feature is only
enabled when `plugin.process.freebsd-kernel-core.read-only` is set to
false (true by default).

---------

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+69-2lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
+12-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
+8-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCoreProperties.td
+6-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
+2-0llvm/docs/ReleaseNotes.md
+97-25 files

LLVM/project b73bfecllvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-fmul.ll

Fix cases greater than 1 with 0 ilogb
DeltaFile
+22-0llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+6-2llvm/lib/Support/KnownFPClass.cpp
+28-22 files

LLVM/project a477280llvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-fmul.ll

ValueTracking: Teach computeKnownFPClass that multiply by <=1 cannot overflow

If one operand is known not-inf, that can be propagated if the other operand is
known to have a magnitude <= 1.

This enables elimination of some inf checks inside the implementation of trig
functions when the input is known not-inf.
DeltaFile
+4-0llvm/lib/Support/KnownFPClass.cpp
+2-2llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+6-22 files

LLVM/project 62cb1b7llvm/test/Transforms/Attributor nofpclass-fmul.ll

baseline tests
DeltaFile
+52-0llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+52-01 files

LLVM/project efe0b2fflang/lib/Lower/OpenMP ClauseProcessor.cpp, flang/test/Lower/OpenMP ordered-simd.f90

Revert "[flang][openmp] Add support for ordered regions in SIMD directives (#181012)"

This reverts commit 31dacdc1f5d486da6ef6d8b2f7e3b6126d92c9ff.

See the PR for test failure details.
DeltaFile
+0-90mlir/test/Target/LLVMIR/openmp-wsloop-simd-ordered.mlir
+0-87mlir/test/Target/LLVMIR/openmp-simd-ordered.mlir
+0-57flang/test/Lower/OpenMP/ordered-simd.f90
+6-18mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+11-0mlir/test/Target/LLVMIR/openmp-todo.mlir
+0-5flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+17-2572 files not shown
+18-2598 files

OpenZFS/src 6495dafmodule/zfs range_tree.c

range_tree: use zfs_panic_recover() for partial-overlap remove

zfs_range_tree_remove_impl() used a bare panic() when a segment to be
removed was not completely overlapped by an existing tree entry.  Every
other consistency check in range_tree.c uses zfs_panic_recover(), which
respects the zfs_recover tunable and allows pools with on-disk
corruption to be imported and recovered.  This one call was
inconsistent, making the partial-overlap case unrecoverable regardless
of zfs_recover.

Replace panic() with zfs_panic_recover() so that operators can set
zfs_recover=1 to import a corrupted pool and reclaim data, consistent
with all other range tree error paths.

Related-to: https://github.com/openzfs/zfs/issues/13483
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Clemens Fruhwirth <clemens at endorphin.org>
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
Closes #18255
DeltaFile
+1-1module/zfs/range_tree.c
+1-11 files

FreeBSD/ports 0ce0b7bdevel/indi/files patch-drivers_auxiliary_gemini__flatpanel__adapters.cpp

devel/indi: fix build with libc++ 21

With libc++ 21 devel/indi fails to build, with errors similar to:

    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:242:14: error: use of undeclared identifier 'atoi'
      242 |     int id = atoi(id_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:341:14: error: use of undeclared identifier 'atoi'
      341 |     *value = atoi(value_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:658:14: error: use of undeclared identifier 'atoi'
      658 |     int id = atoi(id_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:793:14: error: use of undeclared identifier 'atoi'
      793 |     *value = atoi(value_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:1154:14: error: use of undeclared identifier 'atoi'
     1154 |     *value = atoi(value_str);
          |              ^~~~

    [11 lines not shown]
DeltaFile
+10-0devel/indi/files/patch-drivers_auxiliary_gemini__flatpanel__adapters.cpp
+10-01 files

FreeBSD/ports 300d678devel/indi/files patch-drivers_auxiliary_gemini__flatpanel__adapters.cpp

devel/indi: fix build with libc++ 21

With libc++ 21 devel/indi fails to build, with errors similar to:

    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:242:14: error: use of undeclared identifier 'atoi'
      242 |     int id = atoi(id_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:341:14: error: use of undeclared identifier 'atoi'
      341 |     *value = atoi(value_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:658:14: error: use of undeclared identifier 'atoi'
      658 |     int id = atoi(id_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:793:14: error: use of undeclared identifier 'atoi'
      793 |     *value = atoi(value_str);
          |              ^~~~
    /wrkdirs/usr/ports/devel/indi/work/indi-2.1.7/drivers/auxiliary/gemini_flatpanel_adapters.cpp:1154:14: error: use of undeclared identifier 'atoi'
     1154 |     *value = atoi(value_str);
          |              ^~~~

    [9 lines not shown]
DeltaFile
+10-0devel/indi/files/patch-drivers_auxiliary_gemini__flatpanel__adapters.cpp
+10-01 files

OPNSense/core 4010090src/etc/inc auth.inc, src/opnsense/mvc/app/controllers/OPNsense/Auth/Api UserController.php

auth: unify pwd_changed_at usage, remove requirement to configure password_policy_length and update the timestamp via console and admin pages as well. closes https://github.com/opnsense/core/issues/9857
DeltaFile
+0-7src/www/system_usermanager_passwordmg.php
+1-0src/etc/inc/auth.inc
+1-0src/opnsense/mvc/app/controllers/OPNsense/Auth/Api/UserController.php
+2-73 files

OpenZFS/src 4da3f05.github/workflows zfs-qemu-packages.yml zfs-qemu.yml, .github/workflows/scripts qemu-2-start.sh

CI: Remove deprecated Fedora 41

Fedora 41 was deprecated on Dec 15 2025.  Remove it from CI tests.

Reviewed-by: Rob Norris <robn at despairlabs.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: George Melikov <mail at gmelikov.ru>
Signed-off-by: Tony Hutter <hutter2 at llnl.gov>
Closes #18261
DeltaFile
+0-5.github/workflows/scripts/qemu-2-start.sh
+1-1.github/workflows/zfs-qemu-packages.yml
+1-1.github/workflows/zfs-qemu.yml
+2-73 files

LLVM/project f94ad56lld/test/wasm tls-export.s, llvm/lib/Object WasmObjectFile.cpp

[WebAssembly] Take symbol flags for exports from the dylink section for shared objects (#183079)

Currently, WASM symbols taken from the export section of shared objects
lose their flags. This can result in link failures. For example, if a
TLS symbol is exported from a shared object, relocation fails because
`wasm-ld` thinks that the symbol is not flagged as a TLS symbol.

This PR populates symbol flags for symbols in the export section from
the flags stored in the dylink0 section.

The export info section was also not serialized by the WASM emitter for
YAML, which this PR fixes
DeltaFile
+38-0llvm/test/ObjectYAML/wasm/dylink_tls_exports.yaml
+34-3lld/test/wasm/tls-export.s
+21-0llvm/lib/ObjectYAML/WasmEmitter.cpp
+17-0llvm/lib/Object/WasmObjectFile.cpp
+13-0llvm/test/tools/llvm-nm/wasm/dylink.yaml
+13-0llvm/test/tools/llvm-objdump/wasm/dylink-symbol-table.yaml
+136-36 files

LLVM/project 5734d97llvm/lib/Target/AArch64 AArch64ISelLowering.cpp aarch64-tensorflow-isel-regression.ll, llvm/test/CodeGen/AArch64 neon-lowhalf128-optimisation.ll aarch64-addv.ll

[AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (#178227)

Revised #166962.

This patch aims to fix the original compile time regression by
restricting the optimisation to run only on non-constant splats. Without
the guard, an infinite loop is caused because the
`CONCAT(SCALAR_TO_VECTOR, zero)` folds back into the same `BUILD_VECTOR`
and immediately re-enters `LowerBUILD_VECTOR`.

This patch was tested with the original TensorFlow reproduction provided
on the PR and shows a (very) slight improvement on compile-time.
DeltaFile
+92-0llvm/test/CodeGen/AArch64/neon-lowhalf128-optimisation.ll
+32-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+18-0llvm/lib/Target/AArch64/aarch64-tensorflow-isel-regression.ll
+6-9llvm/test/CodeGen/AArch64/aarch64-addv.ll
+4-4llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+2-3llvm/test/CodeGen/AArch64/bitcast-extend.ll
+154-163 files not shown
+157-259 files

HardenedBSD/src f2a6282sys/dev/mlx5/mlx5_accel mlx5_ipsec.c, sys/fs/nullfs null_vfsops.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+32-20sys/dev/mlx5/mlx5_accel/mlx5_ipsec.c
+28-6sys/netipsec/ipsec_offload.c
+4-10sys/fs/nullfs/null_vfsops.c
+5-2sys/netinet/tcp_input.c
+4-1sys/netinet/tcp_stacks/rack.c
+4-1sys/netinet/tcp_timewait.c
+77-406 files not shown
+91-4512 files

HardenedBSD/src 492bc06sys/dev/mlx5/mlx5_accel mlx5_ipsec.c, sys/fs/nullfs null_vfsops.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+32-20sys/dev/mlx5/mlx5_accel/mlx5_ipsec.c
+28-6sys/netipsec/ipsec_offload.c
+4-10sys/fs/nullfs/null_vfsops.c
+5-2sys/netinet/tcp_input.c
+4-1sys/netinet/tcp_stacks/rack.c
+4-1sys/netinet/tcp_timewait.c
+77-406 files not shown
+91-4512 files

HardenedBSD/src f90a1e4sys/netpfil/pf pf.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+3-1sys/netpfil/pf/pf.c
+3-11 files

HardenedBSD/ports 3b1389ddevel/libwasmtime distinfo Makefile.cargo, mail/mailpit/files patch-package-lock.json

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+501-325textproc/feluda/distinfo
+249-161textproc/feluda/Makefile.crates
+67-63devel/libwasmtime/distinfo
+52-64mail/mailpit/files/patch-package-lock.json
+30-28devel/libwasmtime/Makefile.cargo
+34-0security/vuxml/vuln/2026.xml
+933-64172 files not shown
+1,178-82578 files

LLVM/project 6d5e051clang-tools-extra/clang-doc JSONGenerator.cpp, clang-tools-extra/clang-doc/assets clang-doc-mustache.css

[clang-doc]: Enable horizontal wrapping on longer function definitions (#181417)

This patch enables wrapping for longer function and template definitions
in the generated HTML. Currently uses the no. of parameters to 
determine the need to wrap the function. If a function or template has
more than 2 parameters, they are printed one per line. Also fixes a styling
bug where a trailing comma was left after the last parameter.
DeltaFile
+160-12clang-tools-extra/test/clang-doc/templates.cpp
+41-30clang-tools-extra/clang-doc/JSONGenerator.cpp
+10-6clang-tools-extra/test/clang-doc/json/function-requires.cpp
+9-0clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
+5-3clang-tools-extra/test/clang-doc/json/class.cpp
+4-2clang-tools-extra/test/clang-doc/json/class-template.cpp
+229-537 files not shown
+246-6313 files