LLVM/project 45abb30llvm/lib/Target/PowerPC PPCAsmPrinter.cpp PPCInstrInfo.cpp

[PowerPC] Fix instruction sizes / branch relaxation (#175556)

For PowerPC, having accurate (or at least not too small) instruction
sizes is critical, because the PPCBranchSelector pass relies on them.
Underestimating the size of an instruction can result in the wrong
branch kind being chosen, which will result in an MC error.

This patch introduces validation that the instruction size reported by
TII matches the actually emitted instruction size, and fixes various
cases where this was not the case.

Fixes https://github.com/llvm/llvm-project/issues/175190.
DeltaFile
+26-0llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+18-4llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+12-4llvm/lib/Target/PowerPC/PPCInstrInfo.td
+2-2llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+58-104 files

LLVM/project 3a1288cmlir/include/mlir/Dialect/Utils VerificationUtils.h, mlir/lib/Dialect/MemRef/IR MemRefOps.cpp

[mlir][Utils] Add verifyElementTypesMatch helper (NFC) (#176668)

This change builds on #174336 and #175880, which introduced shared
VerificationUtils with verifyDynamicDimensionCount() and
verifyRanksMatch() methods.

This patch adds a new verifyElementTypesMatch() verification utility
that checks if two shaped types have matching element types and emits
consistent error messages. The utility is applied to several ops across
the MemRef and Vector dialects.
DeltaFile
+22-14mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+7-7mlir/test/Dialect/Vector/invalid.mlir
+13-0mlir/lib/Dialect/Utils/VerificationUtils.cpp
+6-7mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+6-0mlir/include/mlir/Dialect/Utils/VerificationUtils.h
+2-2mlir/test/Dialect/MemRef/invalid.mlir
+56-306 files

LLVM/project 168ccaelldb/include/lldb/Host/windows PseudoConsole.h ProcessLauncherWindows.h, lldb/source/Host/windows PseudoConsole.cpp ProcessLauncherWindows.cpp

Revert "[lldb][windows] add STDIN and STDOUT forwarding support (#175812)" (#177610)

DeltaFile
+32-92lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
+0-66lldb/source/Host/windows/PseudoConsole.cpp
+8-16lldb/source/Host/windows/ProcessLauncherWindows.cpp
+0-10lldb/include/lldb/Host/windows/PseudoConsole.h
+1-8lldb/include/lldb/Host/windows/ProcessLauncherWindows.h
+1-1lldb/test/Shell/Settings/TestFrameFormatColor.test
+42-1931 files not shown
+43-1947 files

LLVM/project 48aae6eflang/test/Integration/OpenMP target-use-device-nested.f90, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

Make omp.target[_{enter,exit}]_data and omp.target_update host-only ops
DeltaFile
+46-0flang/test/Integration/OpenMP/target-use-device-nested.f90
+0-46mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
+10-24mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+0-21llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+0-11llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+56-1025 files

LLVM/project cb66265flang/test/Integration/OpenMP target-nesting-in-host-ops.f90, mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

[MLIR][OpenMP] Simplify OpenMP device codegen

After removing host operations from the device MLIR module, it is no longer
necessary to provide special codegen logic to prevent these operations from
causing compiler crashes or miscompilations.

This patch removes these now unnecessary code paths to simplify codegen logic.
Some MLIR tests are now replaced with Flang tests, since the responsibility of
dealing with host operations has been moved earlier in the compilation flow.

MLIR tests holding target device modules are updated to no longer include now
unsupported host operations.
DeltaFile
+159-267mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+0-160mlir/test/Target/LLVMIR/openmp-target-nesting-in-host-ops.mlir
+87-0flang/test/Integration/OpenMP/target-nesting-in-host-ops.f90
+24-37mlir/test/Target/LLVMIR/omptarget-memcpy-align-metadata.mlir
+45-0mlir/test/Target/LLVMIR/openmp-llvm-invalid.mlir
+0-43mlir/test/Target/LLVMIR/omptarget-target-inside-task.mlir
+315-5077 files not shown
+424-61213 files

LLVM/project afc94b5mlir/test/Target/LLVMIR omptarget-declare-target-to-device.mlir

Update target device test
DeltaFile
+7-11mlir/test/Target/LLVMIR/omptarget-declare-target-to-device.mlir
+7-111 files

LLVM/project 54131bfmlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

Remove unused function
DeltaFile
+0-14mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+0-141 files

LLVM/project b758879flang/lib/Optimizer/OpenMP FunctionFiltering.cpp, flang/test/Transforms/OpenMP function-filtering-host-ops.mlir

Cover missing corner case and add tests
DeltaFile
+37-0flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
+12-9flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
+49-92 files

LLVM/project daa98acllvm/lib/Transforms/Utils PredicateInfo.cpp

inline assert-only variable from 17a17fa (#177602)

DeltaFile
+1-2llvm/lib/Transforms/Utils/PredicateInfo.cpp
+1-21 files

FreeNAS/freenas db8b232src/middlewared/middlewared/plugins failover.py pwenc.py

NAS-139432 / 26.04 / Fix serialization error with sending pwenc sencret (#18092)

This commit fixes a missing decode() call on the base64-encoded pwenc
secret.
DeltaFile
+3-1src/middlewared/middlewared/plugins/failover.py
+0-3src/middlewared/middlewared/plugins/pwenc.py
+3-42 files

LLVM/project 60a108bmlir/include/mlir/Interfaces ControlFlowInterfaces.td, mlir/lib/Analysis/DataFlow SparseAnalysis.cpp

[mlir][interface] Add getNonSuccessorInputs API to RegionBranchOpInterface (#175212)

Add getNonSuccessorInputs API to RegionBranchOpInterface.It is used to
return the non-forwarded arguments or results.
DeltaFile
+8-14mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
+18-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+7-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+33-143 files

FreeBSD/src e6bafbeshare/man/man4 capsicum.4

capsicum.4: Replace 'fi' ligature and smart quotation mark

While here, wrap the line to 80 characters.

Reviewed by:    jlduran
Fixes:          c54534e60263 ("capsicum.4: Add some more detail from the Capsicum paper")
MFC after:      3 days
Differential Revision:  https://reviews.freebsd.org/D54761
DeltaFile
+5-5share/man/man4/capsicum.4
+5-51 files

LLVM/project 2357408mlir/lib/Dialect/XeGPU/Transforms XeGPUPropagateLayout.cpp, mlir/test/Dialect/XeGPU propagate-layout.mlir propagate-layout-inst-data.mlir

[MLIR][XeGPU] Add layout propagation for `xegpu.store_matrix` (#174952)

DeltaFile
+48-16mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+17-4mlir/test/Dialect/XeGPU/propagate-layout.mlir
+12-0mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
+77-203 files

LLVM/project 48fb51bllvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine/AArch64 fold-signbit-reduction-cmp.ll

[VectorCombine] Fold vector sign-bit checks (#175194)

Fold patterns that extract sign bits, reduce them, and compare against
boundary values into direct sign checks on the reduced vector.

```
icmp pred (reduce.{add,or,and,umax,umin}(lshr X, BitWidth-1)), C
    ->  icmp slt/sgt (reduce.{or,umax,and,umin}(X)), 0/-1
```

When the comparison is against 0 or MAX (1 for boolean reductions,
NumElts for add), the pattern reduces to one of four quantified
predicates:
- ∀x: x < 0 (AllNeg)
- ∀x: x ≥ 0 (AllNonNeg)
- ∃x: x < 0 (AnyNeg)
- ∃x: x ≥ 0 (AnyNonNeg)

The transform eliminates the shift and selects between

    [59 lines not shown]
DeltaFile
+426-0llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
+419-0llvm/test/Transforms/VectorCombine/AArch64/fold-signbit-reduction-cmp.ll
+200-0llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+1,045-03 files

LLVM/project 70ee6e4llvm/lib/Support/Windows Process.inc Threading.inc

[Support] Move loadSystemModuleSecure into Process.inc. NFC. (#177598)

Move Windows-specific function
`llvm::sys::windows::loadSystemModuleSecure` from
`lib/Support/Windows/Threading.inc` into
`lib/Support/Windows/Process.inc`.

This is to fix link problems on Windows, see
https://github.com/llvm/llvm-project/pull/169224#issuecomment-3790350128
DeltaFile
+29-0llvm/lib/Support/Windows/Process.inc
+0-29llvm/lib/Support/Windows/Threading.inc
+29-292 files

FreeNAS/freenas 8c43331src/middlewared/middlewared/plugins failover.py pwenc.py

Fix serialization error with sending pwenc sencret

This commit fixes a missing decode() call on the base64-encoded
pwenc secret. The check for failover status is also removed
since during initial HA setup our node will be SINGLE on
the soon-to-be-standby.
DeltaFile
+3-1src/middlewared/middlewared/plugins/failover.py
+0-3src/middlewared/middlewared/plugins/pwenc.py
+3-42 files

LLVM/project ec57bd2llvm/include/llvm/CodeGen TargetLoweringObjectFileImpl.h

Revert ids check change.
DeltaFile
+6-7llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+6-71 files

LLVM/project b74e1bcllvm/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/test/Transforms/InstCombine assume.ll assume-loop-align.ll

[InstCombine] Always fold alignment assumptions into operand bundles (#177597)

DeltaFile
+16-48llvm/test/Transforms/InstCombine/assume.ll
+2-8llvm/test/Transforms/InstCombine/assume-loop-align.ll
+1-4llvm/test/Transforms/InstCombine/assume_inevitable.ll
+1-2llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+20-624 files

FreeBSD/ports 9651651sysutils/helm distinfo Makefile

sysutils/helm: Update to 3.20.0

- Bump Go version to 1.25+

Changelogs:
https://github.com/helm/helm/releases/tag/v3.19.5
https://github.com/helm/helm/releases/tag/v3.20.0
DeltaFile
+5-5sysutils/helm/distinfo
+3-4sysutils/helm/Makefile
+8-92 files

FreeBSD/ports ddeff03devel/freebsd-gcc12 distinfo Makefile, devel/freebsd-gcc12/files patch-gcc_system.h patch-gcc_configure

devel/freebsd_gcc12: Update to 12.4.0
DeltaFile
+0-42devel/freebsd-gcc12/files/patch-gcc_system.h
+22-0devel/freebsd-gcc12/files/patch-gcc_configure
+3-3devel/freebsd-gcc12/distinfo
+1-2devel/freebsd-gcc12/Makefile
+26-474 files

FreeBSD/ports 28b7c40devel/freebsd-gcc14 distinfo Makefile

devel/freebsd_gcc14: Update to 14.2.0
DeltaFile
+3-3devel/freebsd-gcc14/distinfo
+1-1devel/freebsd-gcc14/Makefile
+4-42 files

FreeBSD/ports 4be82b1devel/freebsd-gcc13 distinfo Makefile, devel/freebsd-gcc13/files patch-gcc_system.h patch-gcc_configure

devel/freebsd_gcc13: Update to 13.3.0
DeltaFile
+0-42devel/freebsd-gcc13/files/patch-gcc_system.h
+22-0devel/freebsd-gcc13/files/patch-gcc_configure
+3-3devel/freebsd-gcc13/distinfo
+1-2devel/freebsd-gcc13/Makefile
+26-474 files

FreeBSD/ports a5496b3textproc Makefile, textproc/caps-log Makefile pkg-message

textproc/caps-log: NEW PORT Small TUI journaling tool

Sponsored by:   SkunkWerks, GmbH
DeltaFile
+24-0textproc/caps-log/Makefile
+16-0textproc/caps-log/pkg-message
+3-0textproc/caps-log/distinfo
+1-0textproc/caps-log/pkg-descr
+1-0textproc/Makefile
+45-05 files

FreeBSD/doc 21e2609website/content/en/projects summerofcode.adoc

GSoC: Add policy on LLM usage

Add policy for contributor use of Large Language Models with Google
Summer of Code projects.

Reviewed by:    imp, fuz (prior iterations)
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D54789
DeltaFile
+33-0website/content/en/projects/summerofcode.adoc
+33-01 files

FreeNAS/freenas f88b717src/middlewared/middlewared/common/attachment __init__.py, src/middlewared/middlewared/plugins filesystem.py

progress
DeltaFile
+63-51src/middlewared/middlewared/common/attachment/__init__.py
+83-21src/middlewared/middlewared/plugins/pool_/dataset_attachments.py
+28-14src/middlewared/middlewared/service/sharing_service.py
+8-1src/middlewared/middlewared/plugins/filesystem.py
+4-3src/middlewared/middlewared/plugins/pool_/info.py
+3-3src/middlewared/middlewared/plugins/pool_/dataset.py
+189-934 files not shown
+195-9510 files

LLVM/project 52f0215llvm/lib/Target/AMDGPU GCNSubtarget.h AMDGPUSubtarget.h

[NFCI][AMDGPU] Use `GET_SUBTARGETINFO_MACRO` in `GCNSubtarget.h`
DeltaFile
+9-291llvm/lib/Target/AMDGPU/GCNSubtarget.h
+21-62llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+8-15llvm/lib/Target/AMDGPU/R600Subtarget.h
+7-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+0-10llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+3-3llvm/lib/Target/AMDGPU/R600Processors.td
+48-3864 files not shown
+53-39110 files

LLVM/project a10062dllvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp, llvm/test/CodeGen/AArch64 sve-load-store-legalisation.ll

DAG: Use poison in more vector legalization contexts (#177580)

DeltaFile
+2-83llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
+31-30llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+33-1132 files

LLVM/project 0145a64llvm/lib/Transforms/Scalar DeadStoreElimination.cpp, llvm/test/Transforms/DeadStoreElimination simple.ll

[DSE] Make DSE eliminate stores to objects with a sized dead_on_return

dead_on_return is made optionally sized in #171712. This patch adds
handling in DSE so that we can actually eliminate stores to pointer
parameters marked with a sized dead_on_return attribute. We do not
eliminate stores where the store may overlap with bytes that are not
known to be dead after return.

Reviewers: nikic, antoniofrighetto, alinas, aeubanks

Pull Request: https://github.com/llvm/llvm-project/pull/173694
DeltaFile
+69-0llvm/test/Transforms/DeadStoreElimination/simple.ll
+36-8llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+105-82 files

NetBSD/pkgsrc-wip b0df31elibvips PLIST distinfo

Bump libvips to 8.18.0
DeltaFile
+7-8libvips/PLIST
+3-3libvips/distinfo
+1-2libvips/Makefile
+11-133 files

NetBSD/pkgsrc-wip ad33885libvips PLIST Makefile

Copy libvips 8.17.2nb1 from Pkgsrc main
DeltaFile
+69-0libvips/PLIST
+55-0libvips/Makefile
+29-0libvips/options.mk
+18-0libvips/buildlink3.mk
+12-0libvips/DESCR
+5-0libvips/distinfo
+188-06 files