LLVM/project fa29419libc/src/__support/FPUtil bfloat16.h, libc/test/src/__support/FPUtil bfloat16_test.cpp

[libc][math] Bfloat16 `*= (Multiply assign)` operator support (#182882)

This PR intends to add *= operator support for Bfloat16 and tests for
it.
DeltaFile
+19-0libc/test/src/__support/FPUtil/bfloat16_test.cpp
+5-0libc/src/__support/FPUtil/bfloat16.h
+24-02 files

LLVM/project 1b42a66llvm/test/CodeGen/X86 shift-i512.ll

[X86] shift-i512.ll - add test coverage for shift+extract patterns as suggested on #132601 (#183111)

DeltaFile
+681-0llvm/test/CodeGen/X86/shift-i512.ll
+681-01 files

LLVM/project bfd2f30llvm/lib/Target/SPIRV SPIRVEmitNonSemanticDI.cpp

[NFC][SPIRV] Refactor emitGlobalDI to use helpers and store CompileUnitRegMap

This commit refactors emitGlobalDI() to use the extracted helper
functions and adds CompileUnitRegMap to store DebugCompilationUnit
registers for later lookup by function-level debug info emission.

This prepares for function-level debug info emission which needs
to look up compile units.
DeltaFile
+33-80llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
+33-801 files

LLVM/project 4b6b2f6llvm/lib/Target/SPIRV SPIRVEmitNonSemanticDI.cpp

[NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI

This commit extracts reusable helper functions to improve code
organization and reduce duplication. This is a pure refactoring
that does not change behavior.

These helpers will be used in subsequent commits to refactor
emitGlobalDI and add function-level debug info emission.
DeltaFile
+91-15llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
+91-151 files

LLVM/project f27c824llvm/lib/Target/SPIRV SPIRVEmitNonSemanticDI.cpp

[NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI

This commit extracts reusable helper functions to improve code
organization and reduce duplication. This is a pure refactoring
that does not change behavior.

These helpers will be used in subsequent commits to refactor
emitGlobalDI and add function-level debug info emission.
DeltaFile
+91-15llvm/lib/Target/SPIRV/SPIRVEmitNonSemanticDI.cpp
+91-151 files

LLVM/project f1fb4a5clang/lib/Analysis/FlowSensitive DataflowEnvironment.cpp, clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

[FlowSensitive] ignore co_await / co_yield for PropagateResultObject (#182624)

This fixes a crash when encountering co_await
DeltaFile
+6-1clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
+1-3clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+7-42 files

LLVM/project 3b5a05dllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (#183014)

This PR did not solve the TODO as intended. Reverting so the TODO is not
lost.

This reverts commit aab9412a69a07787e9ec98b25709d709b7b537a6.
DeltaFile
+4-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-41 files

LLVM/project 67c1dd1llvm/utils/gn/secondary/lldb/source/Host BUILD.gn

[gn] port 796a1ea79f41
DeltaFile
+1-0llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
+1-01 files

LLVM/project 8ed290clibc/shared/math asinpif16.h, libc/src/__support/math asinpif16.h CMakeLists.txt

[libc][math] Refactor asinpif16 to Header Only (#179021)

Resolves https://github.com/llvm/llvm-project/issues/178103

Part of #147386

in preparation for:
https://discourse.llvm.org/t/rfc-make-clang-builtin-math-functions-constexpr-with-llvm-libc-to-support-c-23-constexpr-math-functions/86450
DeltaFile
+140-0libc/src/__support/math/asinpif16.h
+2-111libc/src/math/generic/asinpif16.cpp
+29-0libc/shared/math/asinpif16.h
+25-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+16-0libc/src/__support/math/CMakeLists.txt
+2-10libc/src/math/generic/CMakeLists.txt
+214-1213 files not shown
+217-1219 files

LLVM/project 4237193utils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel][libc][math] Fix fmul->mul for bf16mul family (#182018)  (#183112)

#182018 made these header only but added the build targets as fmul
instead of mul
DeltaFile
+4-4utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+4-41 files

LLVM/project 1b9fea0llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 vector-shuffle-512-v64.ll

[X86] lowerV64I8Shuffle - avoid lowerShuffleAsRepeatedMaskAndLanePermute call on VBMI targets (#183109)

Shuffle combining fails to fold the inner shuffles first, but luckily the LanePermuteAnd* methods are enough if we have VPERMB as a fallback

Fixes #137422
DeltaFile
+8-4llvm/lib/Target/X86/X86ISelLowering.cpp
+3-3llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
+11-72 files

LLVM/project 03388aflibc/shared/math setpayloadf16.h setpayloadf128.h, libc/src/__support/math CMakeLists.txt setpayloadf128.h

[libc][math] Refactor setpayload family to header-only (#182922)

part of #181823
DeltaFile
+87-5utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+57-0libc/src/__support/math/CMakeLists.txt
+32-0libc/src/__support/math/setpayloadf128.h
+32-0libc/src/__support/math/setpayloadf16.h
+28-0libc/shared/math/setpayloadf16.h
+28-0libc/shared/math/setpayloadf128.h
+264-518 files not shown
+508-4124 files

LLVM/project a637cdeclang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenBuiltinX86.cpp CIRGenBuiltin.cpp

[CIR][NFC] Update the constructor sites of `CIRGenFPOptionsRAII`  (#182187)

As support for RAII FP options has been upstreamed (#179121), this patch
removes `CIRGenFPOptionsRAII` from the `MissingFeatures` list and
updates its expected constructor sites.
DeltaFile
+10-9clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+9-9clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+8-8clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+7-7clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
+1-1clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+0-1clang/include/clang/CIR/MissingFeatures.h
+35-356 files

LLVM/project d7e9b7dllvm/test/Transforms/ThinLTOBitcodeWriter split-internal2.ll

[NFC][ThinLTO] Check that refs between split modules have the same GUID
DeltaFile
+5-0llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
+5-01 files

FreeNAS/freenas 976c679src/middlewared/middlewared/plugins ntp.py, src/middlewared/middlewared/plugins/ntp peers.py __init__.py

Move ntp namespace to be typesafe
DeltaFile
+0-246src/middlewared/middlewared/plugins/ntp.py
+138-0src/middlewared/middlewared/plugins/ntp/peers.py
+86-0src/middlewared/middlewared/plugins/ntp/__init__.py
+61-0src/middlewared/middlewared/plugins/ntp/enums.py
+0-59src/middlewared/middlewared/plugins/ntp_/enums.py
+58-0src/middlewared/middlewared/plugins/ntp/crud.py
+343-3058 files not shown
+414-36314 files

LLVM/project 59661a2llvm/docs LangRef.rst, mlir/docs/Dialects Vector.md

[LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (#183080)

There is no known requirement to support non-power-of-two
values of vscale and yet said support is leading to unnecessary
complexity within LLVM.
DeltaFile
+5-5llvm/docs/LangRef.rst
+5-4mlir/docs/Dialects/Vector.md
+10-92 files

FreeBSD/ports a02b3fdlang/gforth Makefile distinfo, lang/gforth/files patch-fflib.fs patch-engine_getopt.h

lang/gforth: try to unbreak the port's build against GCC 15

... by pulling two upstream patches.  While here, spell out
ANS Forth (1994) in the COMMENT and port description, fix a
typo, and provide a more meaningful MAKE_JOBS_UNSAFE reason.

PR:     293330
DeltaFile
+0-11lang/gforth/files/patch-fflib.fs
+11-0lang/gforth/files/patch-engine_getopt.h
+0-11lang/gforth/files/patch-engine_forth.h
+6-2lang/gforth/Makefile
+5-0lang/gforth/distinfo
+2-2lang/gforth/pkg-descr
+24-266 files

LLVM/project ff929a2clang/lib/Sema SemaTemplateInstantiate.cpp, clang/test/Sema unroll-template-value-crash.cpp

[Sema] Guard transformed loop-hint expression before use (#182752)

`TransformLoopHintAttr` called `TransformExpr(...).get()` without
checking that the transformed expression was usable.

For `#pragma GCC unroll v()` instantiated with `v = int`, expression
transformation fails and Clang can assert while validating the loop
hint.

Check `ExprResult::isUsable()` before calling `get()` and keep the
original attribute on failure.

Fixes https://github.com/llvm/llvm-project/issues/49502
DeltaFile
+37-1clang/test/Sema/unroll-template-value-crash.cpp
+4-3clang/lib/Sema/SemaTemplateInstantiate.cpp
+41-42 files

LLVM/project a04eb62clang/include/clang/Analysis/Scalable/Serialization JSONFormat.h, clang/lib/Analysis/Scalable/Serialization JSONFormat.cpp

[clang][ssaf] Add JSON serialization support for `TUSummary::LinkageTable`

This change adds full read/write support for the
`TUSummary::LinkageTable` field that maps each entity to its linkage
kind. The deserialization step validates that the set of entity ids in
`LinkageTable` exactly matches the set in `IdTable` in a single `O(N log
N)` pass. Existing tests have been updated and new tests have been added
to ensure 100% coverage of the new code.
DeltaFile
+594-1clang/unittests/Analysis/Scalable/Serialization/JSONFormatTest/TUSummaryTest.cpp
+241-1clang/lib/Analysis/Scalable/Serialization/JSONFormat.cpp
+17-0clang/include/clang/Analysis/Scalable/Serialization/JSONFormat.h
+852-23 files

LLVM/project 9c13a38clang/lib/Analysis/FlowSensitive DataflowEnvironment.cpp

typo

Created using spr 1.3.7
DeltaFile
+1-1clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
+1-11 files

LLVM/project 16d0090clang/lib/Sema SemaExpr.cpp, clang/test/CodeGenCUDA device-const-var-linkage.cu

[CUDA/HIP] Externalize __device__ const variables accessed by host code (#177292)

In standard C++, const variables at namespace scope have internal
linkage. For __device__ const variables, this makes them invisible to
runtime symbol lookup APIs (cudaGetSymbolAddress/hipGetSymbolAddress).

Reading a __device__ const variable from host code is a valid usage
pattern — the host may need to know the value at runtime. This is
also needed by libcudacxx's cuda::get_device_address.

This patch extends the existing CUDADeviceVarODRUsedByHost tracking
to cover __device__ const variables. When host code references such a
variable, it gets externalized (same mechanism used for static device
vars). Variables only used in device code keep internal linkage and
can still be constant-folded.

The fix is in SemaExpr: __device__ const variables are classified as
CVT_Both (due to an implicit CUDAConstantAttr), so the ODR-use
tracking is extended to include CVT_Both variables with an explicit
CUDADeviceAttr, distinguishing them from plain const variables.
DeltaFile
+86-0clang/test/CodeGenCUDA/device-const-var-linkage.cu
+9-1clang/lib/Sema/SemaExpr.cpp
+95-12 files

LLVM/project ea524fbclang/lib/Sema SemaCoroutine.cpp, clang/test/SemaCXX coroutine-inherited-allocator.cpp

[Clang] Fix coroutine promise with inherited allocation functions (#179141)

The compiler frontend crashed when the promise class overloads operator
new/delete without a regular function declaration. This happens when the
promise class derives from a base class and takes the allocation
functions from the base class with:
    using Base::operator new;
    using Base::operator delete;

This was initially introduced by
1cd59264aa2fb4b0ba70ff03c1298b1b5c21271e.

This should also fix #164088
DeltaFile
+41-0clang/test/SemaCXX/coroutine-inherited-allocator.cpp
+3-1clang/lib/Sema/SemaCoroutine.cpp
+44-12 files

LLVM/project 3557e10llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Tweak comment
DeltaFile
+3-3llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+3-31 files

LLVM/project f0289f0llvm/lib/Target/Hexagon HexagonISelLoweringHVX.cpp HexagonISelLowering.h, llvm/test/CodeGen/Hexagon/autohvx isel-hvx-rescale-predicate.ll

[Hexagon] Avoid contracting predicates in createHvxPrefixPred (#183081)

The function createHvxPrefixPred should only need to expand a predicate
to match the result's bytes-per-bit. Otherwise, contracting of the
predicate may lead to an input that is shorter than 4 bytes, making it
unsuitable for VINSERTW0.

When calling createHvxPrefixPred for vector concatention, re-group the
inputs to the concat to make sure that the resulting inputs to
createHvxPrefixPred would not need contraction.

Fixes https://github.com/llvm/llvm-project/issues/181362
DeltaFile
+59-30llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+14-0llvm/test/CodeGen/Hexagon/autohvx/isel-hvx-rescale-predicate.ll
+4-0llvm/lib/Target/Hexagon/HexagonISelLowering.h
+77-303 files

FreeNAS/freenas 7e05293src/middlewared/middlewared/plugins/container migrate.py

NAS-139962 / 26.0.0-BETA.1 / Fix MatchNotFound when virt.global table is empty during container migration (#18290)

## Problem

On fresh installs of HM, we will not have a row in `virt.global` table
where `datastore.config` will raise an exception rather then creating a
row.

## Solution

Make sure we gracefully handle this case and do not error out when
migration is triggered automatically on system boot.
DeltaFile
+7-6src/middlewared/middlewared/plugins/container/migrate.py
+7-61 files

FreeBSD/doc 47bb869website/content/en/releases/15.0R/ec2-ami-ids latest.adoc

15.0: Update "latest" AMIs

We now have 15.0-RELEASE-p4 AMIs.

Approved by:    re (implicit)
Sponsored by:   Amazon
DeltaFile
+480-480website/content/en/releases/15.0R/ec2-ami-ids/latest.adoc
+480-4801 files

LLVM/project d129ccallvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Don't use ExtraRequires. Instead, set a boolean in TLBITableBase
DeltaFile
+27-22llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+26-12llvm/lib/Target/AArch64/AArch64SystemOperands.td
+7-7llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+60-413 files

LLVM/project 15fa8b0clang/include/clang/Driver RocmInstallationDetector.h, clang/lib/Driver/ToolChains AMDGPU.cpp

clang/AMDGPU: Stop checking for finite only and unsafe math control libraries (#182865)

These will be imminently deleted. Just ignore them if they are not
present.
DeltaFile
+3-4clang/include/clang/Driver/RocmInstallationDetector.h
+4-2clang/lib/Driver/ToolChains/AMDGPU.cpp
+6-0clang/test/Driver/rocm-device-libs.cl
+0-0clang/test/Driver/Inputs/rocm-no-math-opt-libs/amdgcn/bitcode/asanrtl.bc
+0-0clang/test/Driver/Inputs/rocm-no-math-opt-libs/amdgcn/bitcode/ockl.bc
+0-0clang/test/Driver/Inputs/rocm-no-math-opt-libs/amdgcn/bitcode/oclc_abi_version_600.bc
+13-66 files not shown
+13-612 files

LLVM/project 61d40e2llvm/include/llvm/CodeGen SDPatternMatch.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (#182615)

Adds overloads
```cpp
auto m_ConstInt(uint64_t &);
auto m_ConstInt(int64_t &);
```
which behave analogously to `m_ConstInt(APInt &)`, but only match if the
captured integer fits within 64 bits.
DeltaFile
+46-0llvm/include/llvm/CodeGen/SDPatternMatch.h
+8-1llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
+3-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+57-43 files

LLVM/project f3c5ab0llvm/test/CodeGen/AMDGPU memcpy_const_compare.ll

[AMDGPU][NFC] Pre-commit memcpy test with complex constant length (#182170)

Test memcpy lowering with complex constant length.  Length is given by:

`i64 add (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr
addrspace(4) null to ptr) to i64)), i64 13)`

Thus, loop guard should not be needed.

---------

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+90-0llvm/test/CodeGen/AMDGPU/memcpy_const_compare.ll
+90-01 files