LLVM/project c862266llvm/docs MergeFunctions.md, llvm/lib/Transforms/Utils FunctionComparator.cpp

[MergeFunctions] Fix merging functions with different KCFI type identifiers (#217665)

MergeFunctions currently merges functions with identical bodies even
when
their function-level !kcfi_type metadata contains different type
identifiers.

This can redirect calls or function pointers to a function with a
mismatched
KCFI type identifier, potentially causing KCFI checks to fail at
runtime.

Compare function-level !kcfi_type metadata in FunctionComparator so that
functions with different KCFI type identifiers are not merged.

Add a minimal regression test covering two identical functions with
different
KCFI type identifiers.

Fixes #217629
DeltaFile
+112-0llvm/test/Transforms/MergeFunc/kcfi-function-merging.ll
+4-0llvm/lib/Transforms/Utils/FunctionComparator.cpp
+2-0llvm/docs/MergeFunctions.md
+118-03 files

FreeBSD/ports 4e3cb07x11-toolkits Makefile, x11-toolkits/kirigami-app-components pkg-descr distinfo

x11-toolkits/kirigami-app-components: Add new port

Kirigami addons and modules.

WWW: https://invent.kde.org/libraries/kirigami-app-components
DeltaFile
+20-0x11-toolkits/kirigami-app-components/pkg-plist
+18-0x11-toolkits/kirigami-app-components/Makefile
+3-0x11-toolkits/kirigami-app-components/pkg-descr
+3-0x11-toolkits/kirigami-app-components/distinfo
+1-0x11-toolkits/Makefile
+45-05 files

LLVM/project b3a1838llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 pr72777.ll u128-square.ll

[AArch64] Suboptimal assembly for u128 x * x (#214796)

This PR optimizes the AArch64 backend for 128-bit integer squaring
(`u128 x * x`).

It updates the instruction selection logic to combine `(A + B) + B` into
`A + (B << 1)`. This allows the compiler to emit a single, optimal `add
... lsl #1` instruction instead of multiple separate `add` instructions.

A baseline test was added in the first commit, and the optimization is
provided in the second commit to clearly highlight the codegen
improvements.

Fixes #213775
DeltaFile
+30-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+13-6llvm/test/CodeGen/AArch64/reassocmls.ll
+15-0llvm/test/CodeGen/AArch64/u128-square.ll
+2-3llvm/test/CodeGen/AArch64/pr72777.ll
+60-94 files

OPNSense/core 1fbbedesrc/opnsense/www/js opnsense_ui.js

ui: maximize modal shortcut should also evaluate first visible when there are multiple tabs

(cherry picked from commit 4a584f95b3833543bb0a3cb0ae71cedccae36ac5)
DeltaFile
+1-1src/opnsense/www/js/opnsense_ui.js
+1-11 files

LLVM/project 6160b5amlir/lib/Dialect/X86/Utils X86Utils.cpp, mlir/test/Dialect/X86 vector-contract-to-packed-type-dotproduct.mlir vector-contract-bf16-to-fma.mlir

[MLIR][X86] Track shuffled write operand updates (#218936)

Notify pattern rewrite listeners while replacing the operands of both
write-like users after accumulator shuffling.

Add focused coverage that does not depend on the separate accumulator
rewrite.

Assisted-by: Codex
DeltaFile
+148-0mlir/test/Dialect/X86/shuffle-before-write.mlir
+6-3mlir/lib/Dialect/X86/Utils/X86Utils.cpp
+0-2mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
+0-2mlir/test/Dialect/X86/vector-contract-bf16-to-fma.mlir
+154-74 files

LLVM/project 55dd65fllvm/lib/Target/SPIRV SPIRVBuiltins.cpp, llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_integer_dot_product SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll

[SPIR-V] Diagnose integer dot builtins without SPV_KHR_integer_dot_product (#218599)
DeltaFile
+7-3llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+3-0llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_integer_dot_product/SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll
+10-32 files

LLVM/project a82267cclang/test/CodeGen/AArch64/neon load.c, llvm/lib/Target/SystemZ SystemZAsmPrinter.cpp

Merge branch 'main' into users/adams381/cir-callconv-union-empty-member
DeltaFile
+1,217-1,125llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+2,240-0clang/test/CodeGen/AArch64/neon/load.c
+853-1,375llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
+815-788llvm/test/CodeGen/AMDGPU/bypass-div.ll
+753-757llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
+17-1,275llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+5,895-5,3201,182 files not shown
+50,808-30,5931,188 files

LLVM/project 169e016clang/test/CodeGen arm-neon-vld.c, clang/test/CodeGen/AArch64 neon-intrinsics.c

Merge branch 'main' into users/adams381/cir-callconv-optout-regen-15
DeltaFile
+2,240-0clang/test/CodeGen/AArch64/neon/load.c
+365-576clang/test/CodeGen/arm-neon-vld.c
+898-0llvm/test/Transforms/ExpandMemCmp/BPF/memcmp.ll
+0-826orc-rt/include/orc-rt/SimplePackedSerialization.h
+826-0orc-rt/include/orc-rt/bedrock/SimplePackedSerialization.h
+0-772clang/test/CodeGen/AArch64/neon-intrinsics.c
+4,329-2,174895 files not shown
+34,369-17,323901 files

OPNSense/core 4a584f9src/opnsense/www/js opnsense_ui.js

ui: maximize modal shortcut should also evaluate first visible when there are multiple tabs
DeltaFile
+1-1src/opnsense/www/js/opnsense_ui.js
+1-11 files

LLVM/project d19c232clang/test/CIR/CodeGenOpenACC declare-copyout.cpp declare-copy.cpp

[CIR] Fix tests post 3e3927f (Commit) / #217589 (PR) (#218925)
DeltaFile
+39-40clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
+39-39clang/test/CIR/CodeGenOpenACC/declare-create.cpp
+32-32clang/test/CIR/CodeGenOpenACC/compute-copyin-copyout-create.c
+32-32clang/test/CIR/CodeGenOpenACC/combined-copyin-copyout-create.c
+30-31clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
+30-31clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
+202-2055 files not shown
+280-28311 files

LLVM/project 5d3a3b5flang/test/Analysis/AliasAnalysis alias-analysis-acc.mlir, mlir/include/mlir/Dialect/OpenMP OpenMPOpsInterfaces.td

[mlir][OpenACC][OpenMP] Migrate to use explicit discardable/inherent attribute APIs (#218901)

Use discardable attribute APIs and typed operation accessors throughout
the OpenACC and OpenMP dialects, conversions, translation, utilities,
and tests.

Keep ComputeRegionOp inherent properties in the property dictionary and
discardable attributes in the attribute dictionary.

Assisted-by: Codex
DeltaFile
+47-18mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
+41-20mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
+42-11mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
+18-18mlir/test/Dialect/OpenACC/ops-cg.mlir
+16-16mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
+14-14flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
+178-9764 files not shown
+417-28470 files

LLVM/project ae4bae2llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp, llvm/test/CodeGen/AArch64 sve-load-store-legalisation.ll

[SelectionDAG] Legalize non-divisible scalable vector widening (#218777)

Enable DAGTypeLegalizer::ModifyToType to widen scalable vectors whose
element counts are not integer multiples. Split the source and
destination into their largest common scalable subvector type, extract
the source parts, append poison or zero fill parts, and concatenate
them.
DeltaFile
+132-0llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
+24-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+156-02 files

NetBSD/pkgsrc YkIyppwinputmethod/mozc-elisp226 Makefile, inputmethod/skk Makefile

   *: guess supported emacs versions, remove removed ones
VersionDeltaFile
1.112+3-5mail/mew/Makefile
1.46+3-5inputmethod/skk/Makefile
1.358+3-4mk/defaults/mk.conf
1.7+3-4misc/bbdb3/Makefile
1.33+4-3mail/mailcrypt/Makefile
1.25+2-4inputmethod/mozc-elisp226/Makefile
+18-2510 files not shown
+38-5016 files

OPNSense/core b356e75src/opnsense/mvc/app/models/OPNsense/IPsec Swanctl.php, src/opnsense/mvc/app/models/OPNsense/IPsec/FieldTypes IPsecProposalField.php

ipsec: restrict PQ to IKEv2 only, exclude all but common options as well
DeltaFile
+78-60src/opnsense/mvc/app/models/OPNsense/IPsec/FieldTypes/IPsecProposalField.php
+33-0src/opnsense/mvc/app/models/OPNsense/IPsec/Swanctl.php
+111-602 files

LLVM/project 3297d6eclang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/test/CodeGen/AArch64/sme2-intrinsics acle_sme2_reinterpret_svcount_svbool.c

[LLVM][SVE] Add dedicated intrinsics to cast between svcount_t and svbool_t. (#218667)

This makes the casting behaviour more explicit:
> to/from_svbool  : lane-count changing casts
> to/from_svcount : reinterpretation casts
DeltaFile
+2-21llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
+22-0llvm/lib/IR/AutoUpgrade.cpp
+18-0llvm/test/Bitcode/upgrade-aarch64-sve-intrinsics.ll
+10-6llvm/include/llvm/IR/IntrinsicsAArch64.td
+2-6clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+4-4clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_reinterpret_svcount_svbool.c
+58-371 files not shown
+61-417 files

OPNSense/core 88c1c03src/opnsense/mvc/app/controllers/OPNsense/Firewall FilterController.php, src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms dialogFilterRule.xml

Firewall: Rules: promote statetype from advanced to normal for received-on usage

(cherry picked from commit b90ea7d93c96816eff3810c52277fb1a626f788d)
DeltaFile
+1-2src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogFilterRule.xml
+1-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/FilterController.php
+2-32 files

OPNSense/core a05388dsrc/opnsense/mvc/app/controllers/OPNsense/Firewall/forms dialogFilterRule.xml, src/opnsense/mvc/app/library/OPNsense/Firewall FilterRule.php Rule.php

Firewall: Rules: Add received-on interface keyword (as interface origin) (#10797)

Allow outbound rules to match the interface where traffic originally entered,
making address-independent security zone policies possible.

Multiple rule and origin interfaces are supported. Origin matching is limited
to outbound rules, while inversion requires exactly one origin interface.
Leaving the origin empty preserves the existing rule behavior.

(cherry picked from commit 79bb2720338f3157fec494071a06d7e9c6dec4b8)
DeltaFile
+26-17src/opnsense/mvc/app/library/OPNsense/Firewall/Rule.php
+26-3src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogFilterRule.xml
+12-9src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes/FilterRuleField.php
+18-0src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.php
+18-0src/opnsense/mvc/app/library/OPNsense/Firewall/FilterRule.php
+12-1src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.xml
+112-302 files not shown
+121-338 files

OPNSense/core ff08407src/opnsense/mvc/app/library/OPNsense/Firewall FilterRule.php

Firewall: Rules: emit gateway debug message in block rules only when gateway was not empty (#10799)

(cherry picked from commit 852228013f7ee83da4db4fcf452fa4c2f54786f7)
DeltaFile
+3-1src/opnsense/mvc/app/library/OPNsense/Firewall/FilterRule.php
+3-11 files

LLVM/project 78a4e95llvm/lib/Transforms/Utils Local.cpp PromoteMemoryToRegister.cpp, llvm/test/Transforms/PhaseOrdering always-inline-alloca-promotion.ll

Revert "Revert "[PromoteMemToReg] Insert store undef when removing lifetime m…"

This reverts commit a4c562fc2bf99462d06f8714eb2a8dd8b1824313.
DeltaFile
+190-0llvm/test/Transforms/SROA/lifetime-aware-phi.ll
+32-3llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+7-7llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
+2-4llvm/test/Transforms/PhaseOrdering/always-inline-alloca-promotion.ll
+3-0llvm/lib/Transforms/Utils/Local.cpp
+1-1llvm/test/Transforms/PhaseOrdering/ARM/arm_mean_q7.ll
+235-156 files

FreeBSD/src f01b594sys/dev/sound/usb uaudio.c

snd_uaudio: recognize hardware sidetone as a monitor

The Logitech H390, for instance, has the following interface layout:

~~
7 INPUT              34 INPUT            10 INPUT
  Mic (0x201)          Mic (0x201)         USB Stream (0x101)
   |                    |                     |
   v                    v                     |
 19 FEATURE           35 FEATURE              |
   |                    |                     |
   v                    v                     |
 25 EXTENSION           +------> 36 MIXER <---+
   |                              |
   v                              v
 13 OUTPUT                     22 FEATURE
 USB Stream (0x101)               |
                                  v
                               16 OUTPUT

    [29 lines not shown]
DeltaFile
+20-2sys/dev/sound/usb/uaudio.c
+20-21 files

LLVM/project 5ec690clibc/config/baremetal config.json, libc/test/UnitTest CMakeLists.txt ArmBaremetalTestUtils.cpp

[libc] Enable bare-metal hermetic tests on Arm (#207361)

This provides missing components required to run LLVM libc hermetic
tests, for example, with QEMU:
- Redirect of output, time and exit to semihosting.
- Linker script.
- Extra LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY setting for
LIBC_CONF_MATH_OPTIMIZATIONS to make hardfp tests pass.
DeltaFile
+120-0libc/test/UnitTest/llvm-libc-baremetal.ld
+119-0libc/test/UnitTest/ArmBaremetalTestUtils.cpp
+9-1libc/test/UnitTest/CMakeLists.txt
+1-1libc/config/baremetal/config.json
+249-24 files

LLVM/project 5ae09b3clang/test/CIR/CodeGen record-type-metadata.cpp vtable-linkage-explicit-instantiation.cpp, clang/test/CIR/CodeGenCXX typeid-most-derived.cpp

[CIR] Drop the callconv opt-out from 4 more CIR tests (#218785)

These four CIR tests now compile and check clean with x86_64
calling-convention lowering on, unblocked by the packed-record (#218505)
and vptr-record (#218457) work. Stripping the flag moved zero CHECK
lines: the output the pass produces for these four is exactly what was
already pinned.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+2-4clang/test/CIR/CodeGenCXX/typeid-most-derived.cpp
+2-4clang/test/CIR/CodeGen/vtable-linkage-explicit-instantiation.cpp
+2-4clang/test/CIR/CodeGen/trivial-abi.cpp
+1-4clang/test/CIR/CodeGen/record-type-metadata.cpp
+7-164 files

LLVM/project 9b160a2llvm/include module.modulemap

[modulemap] Add OMPDescriptors.h.inc to modulemap of the OpenMP module
DeltaFile
+3-0llvm/include/module.modulemap
+3-01 files

LLVM/project c7fb9a1llvm/lib/CodeGen MachinePipeliner.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-max-mii.ll

[MachinePipeliner] Increase the default maximum MII to 256

The pipeliner rejects a loop whose minimum initiation interval exceeds
-pipeliner-max-mii. Its default of 27 suits targets with short instruction
latencies, but is too small for others: on AMDGPU a couple of MFMA
instructions already push the MII past it, so the loop never pipelines.

Increase the default limit from 27 to 256. An explicit -pipeliner-max-mii
still overrides the default.
DeltaFile
+5-5llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-max-mii.ll
+2-2llvm/lib/CodeGen/MachinePipeliner.cpp
+7-72 files

LLVM/project 538411cllvm/lib/Target/AMDGPU GCNSubtarget.h GCNSubtarget.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-regpressure-retry.mir

[AMDGPU] Configure the software pipeliner policy (#212539)

```
    [AMDGPU] Configure the software pipeliner policy
    
    Set the pipeliner policy in overridePipelinerPolicy() to opt into the generic
    register-pressure detector.
    
    Schedules exceeding the target-provided pressure-set limits are rejected and
    retried at a higher II.
```
DeltaFile
+181-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-regpressure-retry.mir
+6-0llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+2-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+189-03 files

OPNSense/core b90ea7dsrc/opnsense/mvc/app/controllers/OPNsense/Firewall FilterController.php, src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms dialogFilterRule.xml

Firewall: Rules: promote statetype from advanced to normal for received-on usage
DeltaFile
+1-2src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogFilterRule.xml
+1-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/FilterController.php
+2-32 files

LLVM/project fee7e4elibcxx/src/support new.ipp

[libc++][NFC] Refactor new.ipp so the _impl functions take a failure mode argument (#218648)

This avoids duplicating the failure path everywhere we use these
functions. It also makes it more explicit what the intended failure path
is.
DeltaFile
+17-12libcxx/src/support/new.ipp
+17-121 files

OPNSense/core f1fc5b5src/opnsense/mvc/app/models/OPNsense/Interfaces Wlan.xml Wlan.php, src/opnsense/scripts/interfaces list_regdomain.py

interfaces: style sweep
DeltaFile
+4-2src/opnsense/mvc/app/models/OPNsense/Interfaces/Wlan.php
+1-1src/opnsense/scripts/interfaces/list_regdomain.py
+1-1src/opnsense/mvc/app/models/OPNsense/Interfaces/Wlan.xml
+6-43 files

LLVM/project daed480clang/test/CIR/CodeGen partial-array-cleanup.cpp array-ctor.cpp, clang/test/CIR/CodeGenOpenACC atomic-write.cpp

[CIR] Regenerate CHECK lines for 8 more callconv opt-out tests

These 8 CIR tests compile clean with x86_64 calling-convention lowering
on, but their CHECK lines still pinned the pre-coercion CIR: raw record
types in signatures, plain by-value loads for temporaries with a
non-trivial destructor, and matching store/load pairs for empty
records.  The pass now emits the ABI-correct shape instead: sret return
parameters, a dropped or byref-marked argument for records that carry
no data or that need pass-by-reference, and a `#cir.poison` placeholder
where a value the pass ignores used to be stored.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+14-28clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
+14-28clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
+7-13clang/test/CIR/CodeGen/array-ctor.cpp
+8-12clang/test/CIR/CodeGen/paren-list-agg-init.cpp
+5-9clang/test/CIR/CodeGen/partial-array-cleanup.cpp
+5-6clang/test/CIR/CodeGenOpenACC/atomic-write.cpp
+53-962 files not shown
+61-1068 files

LLVM/project 9087b13llvm/test/CodeGen/AMDGPU sdwa-peephole-movrels.mir

[AMDGPU] Regenerate CHECK lines for sdwa-peephole-movrels.mir (NFC) (#218888)

Address post-merge comment from
https://github.com/llvm/llvm-project/pull/218592
DeltaFile
+14-3llvm/test/CodeGen/AMDGPU/sdwa-peephole-movrels.mir
+14-31 files