[mlir] Propagate `checkCommutativeEquivalent` into `isRegionEquivalentTo` (#192670)
The `checkCommutativeEquivalent` callback was not forwarded when
recursing into nested regions via `isRegionEquivalentTo`, causing silent
fallback to strict operand-order comparison for ops inside regions. Fix
by propagating the callback through the call site, and add a lit test
covering this case.
[ci][llvm] Run cross-project-tests on llvm/ changes (#188522)
This patch ensures we run the `cross-project-tests` on `llvm/` PRs. At
the very least those tests depend on debug-info and
`llvm/ADT/`/`llvm/Support` (and the data-formatters that also live in
`llvm/`).
This would've helped catch
https://github.com/llvm/llvm-project/pull/188483 at pre-merge time.
[lldb][Windows] Read/Write PC after suspending thread (#191371)
Currently, we access the PC before suspending the thread in case of a
software breakpoint exception. However, we can't reliably read or write
the thread context while the thread is running. So, suspend the thread
first and then read or write the PC when handling a software breakpoint
exception.
Co-authored-by: Ayush Sahay <asahay at qti.qualcomm.com>
[CodeGen] Fix profiled triangular CFG threshold in MachineBlockPlacement (#188752)
Fix an assertion failure in MachineBlockPlacement for profiled
triangular CFGs with large -profile-likely-prob values.
The existing triangular-CFG threshold scaling can produce a
BranchProbability greater than 1. Capping to `BranchProbability(100,
100)` added.
[flang][OpenMP] Clean up check-omp-structure.h, NFC
Group declarations to make it clear in which of the check-omp-*.cpp
files a given function is defined.
Delete declarations that don't have corresponding definitions.
Rename private member variable to follow naming convention.
[AArch64][llvm] Some instructions should be `HINT` aliases (NFC)
Implement the following instructions as a `HINT` alias instead of a
dedicated instruction in separate classes:
* `stshh`
* `stcph`
* `shuh`
* `tsb`
Updated all their helper methods too, and updated the `stshh` pseudo
expansion for the intrinsic to emit `HINT #0x30 | policy`.
Code in AArch64AsmPrinter::emitInstruction identified an initial BTI using a
broad bitmask on the HINT immediate, which also matched shuh/stcph (50..52)
This could move the patchable entry label after a non-BTI instruction.
Replaced it with an exact BTI check using the BTI HINT range (32..63) and
AArch64BTIHint::lookupBTIByEncoding(Imm ^ 32).
A following change will remove duplicated code and simplify.
[2 lines not shown]
[AArch64][llvm] Tighten SYSP; don't disassemble invalid encodings
Tighten SYSP aliases, so that invalid encodings are disassembled
to `<unknown>`. This is because:
```
Cn is a 4-bit unsigned immediate, in the range 8 to 9
Cm is a 4-bit unsigned immediate, in the range 0 to 7
op1 is a 3-bit unsigned immediate, in the range 0 to 6
op2 is a 3-bit unsigned immediate, in the range 0 to 7
```
Ensure we check this when disassembling, and also constrain
tablegen for compile-time errors of invalid encodings.
Also adjust the testcases in `armv9-sysp-diagnostics.s` and
`llvm/test/MC/AArch64/armv9a-sysp.s` as they were invalid,
and added a few invalid (outside of range) SYSP-alikes to
test that `<unknown>` is printed
[CIR][docs] Migrate existing Markdown documents to reStructuredText format (#192066)
This patch migrates the existing ClangIR documents that are written in
Markdown format to reStructuredText format to align CIR's documents with
clang's documentation policy.
Closes #191850 .
[clang][rtsan] Disallow type and realtime sanitizer combo (#192681)
Both of these sanitizer runtimes define similar interceptors, so they
may not be used together
[libc] Reorganize iswctype to avoid GPU/libc++ error (#192659)
After #191178 there were build errors when building the libc++
hand-in-hand pieces due to header layering.
Written with the assistance of Gemini
[AArch64] Fix codegen for FEAT_F16F32DOT with SVE2/SME. (#192668)
When compiling with +sve2/+sme, don't override to use Custom lowering
for PARTIAL_REDUCE_FMLA when it previously determined the operation was
legal due to +f16f32dot/+fp16fml.