LLVM/project 79c281acompiler-rt/lib/asan asan_allocator.cpp, compiler-rt/test/asan/TestCases/Windows rtlsizeheap_zero.cpp

[compiler-rt][ASan][Windows] Fix false positive for zero sized rtl allocations
DeltaFile
+107-0compiler-rt/test/asan/TestCases/Windows/rtlsizeheap_zero.cpp
+44-0compiler-rt/lib/asan/asan_allocator.cpp
+151-02 files

FreeNAS/freenas 74d08dfsrc/middlewared/middlewared/alert/source license_status.py, src/middlewared/middlewared/plugins alert.py support.py

NAS-139600 / 25.10.2 / Update text to replace 'ixsystems' and 'iX' with 'TrueNAS (by mgrimesix) (#18185)

DeltaFile
+30-30src/middlewared/middlewared/alert/source/license_status.py
+4-4src/middlewared/middlewared/plugins/alert.py
+1-1src/middlewared/middlewared/plugins/support.py
+1-1src/middlewared/middlewared/plugins/truenas.py
+1-1src/middlewared/middlewared/plugins/update_/utils.py
+1-1src/middlewared_docs/debian/control
+38-386 files

LLVM/project 08f131dcompiler-rt/lib/asan asan_allocator.cpp, compiler-rt/test/asan/TestCases/Windows rtlsizeheap_zero.cpp

[compiler-rt][ASan][Windows] Fix false positive for zero sized rtl allocations
DeltaFile
+107-0compiler-rt/test/asan/TestCases/Windows/rtlsizeheap_zero.cpp
+44-0compiler-rt/lib/asan/asan_allocator.cpp
+151-02 files

FreeNAS/freenas 725e46bsrc/freenas/usr/local/bin truenas-grub.py, src/middlewared/middlewared/pytest/unit/utils test_write_if_changed.py

NAS-139725 / 25.10.2 / Add protections against partially-written truenas-grub.cfg (by anodos325) (#18179)

This commit ensures that we are always atomically replacing the truenas
grub configuration.

Original PR: https://github.com/truenas/middleware/pull/18173

---------

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+0-210src/middlewared/middlewared/pytest/unit/utils/test_write_if_changed.py
+210-0tests/unit/test_write_if_changed.py
+80-2src/middlewared/middlewared/utils/io.py
+8-1src/freenas/usr/local/bin/truenas-grub.py
+298-2134 files

FreeNAS/freenas b52b799src/middlewared/middlewared/utils/directoryservices krb5_conf.py

Address review
DeltaFile
+1-1src/middlewared/middlewared/utils/directoryservices/krb5_conf.py
+1-11 files

FreeBSD/ports 972ecf2multimedia/uxplay distinfo Makefile

multimedia/uxplay: Update to 1.73.2
DeltaFile
+3-3multimedia/uxplay/distinfo
+1-1multimedia/uxplay/Makefile
+4-42 files

LLVM/project d3afa17llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/X86 cost-model.ll

[LV] Don't scalarize loads that need predication in legacy CM.

The legacy cost model tries to scalarize loads that are used as
pointers. Skip if the load would need predicating when scalarized,
because that would incur very high costs, see useEmulatedMaskMemRefHack.

Fixes https://github.com/llvm/llvm-project/issues/180780.
DeltaFile
+83-0llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+3-3llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+86-32 files

LLVM/project 0215f6bllvm/include/llvm/Analysis DominanceFrontier.h DominanceFrontierImpl.h, llvm/include/llvm/CodeGen MachineDominanceFrontier.h

[DominanceFrontier] Support post-dominators on graphs with single root (#179336)

I plan to use that to optimize mask creation in VPlan predicator by
`or`ing edge masks from the post-dominance frontier instead of all
predecessors in a subsequent patch. Note that it would require to use
the same unmodified post-dom tree for *all* the basic blocks in a VPlan
that is already limited to a particular loopnest so the algorithmic
complexity concerns behind the "deprecation" notice in the beggining of
`DominanceFrontier.h` (and also discussion in the
https://discourse.llvm.org/t/dominance-frontiers/21755 thread) don't
apply for my use case (at least to the best of my understanding).

The change here is to properly use graph-traits for children traversal
plus inline `ForwardDominanceFrontierBase` into `DominanceFrontierBase` now 
that it's used for post-dom-frontier.

Since the only planned use-case is in the vectorizer, I'm adding a
VPlan-base unittest along with this change.


    [2 lines not shown]
DeltaFile
+94-0llvm/unittests/Transforms/Vectorize/VPPostDomFrontierTest.cpp
+18-26llvm/include/llvm/Analysis/DominanceFrontier.h
+6-6llvm/include/llvm/Analysis/DominanceFrontierImpl.h
+4-5llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
+0-2llvm/lib/CodeGen/MachineDominanceFrontier.cpp
+0-1llvm/lib/Analysis/DominanceFrontier.cpp
+122-401 files not shown
+123-407 files

LLVM/project c6329a3llvm/include/llvm/Transforms/Utils MemoryTaggingSupport.h, llvm/lib/Target/AArch64 AArch64StackTagging.cpp

[NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (#180311)

DeltaFile
+7-8llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+2-4llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
+1-2llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+1-2llvm/lib/Target/AArch64/AArch64StackTagging.cpp
+11-164 files

FreeNAS/freenas 4ac91c9src/freenas/usr/local/bin truenas-grub.py

NAS-139743 / 26.0.0-BETA.1 / Fix typo in truenas-grub (#18186)

This commit fixes a typo in keyword arguments in truenas-grub.py. During
refactoring of in-progress code, a keyword argument had its name changed
unexpectedly resulting in mismatch between call-site and function
signature.
DeltaFile
+1-1src/freenas/usr/local/bin/truenas-grub.py
+1-11 files

FreeBSD/src 2b728d3sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Move 'struct get_cppc_regs_data' & co. closer to use

No functional change (intended).

Sponsored by:   The FreeBSD Foundation
DeltaFile
+22-22sys/x86/cpufreq/hwpstate_amd.c
+22-221 files

FreeBSD/src c6a0eb7sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Rename '*set_autonomous_hwp*()' => 'enable_cppc*()'

This is to better reflect that we are really enabling CPPC in these
functions and because we are likely to stop activating CPPC autonomous
mode by default in the near future.

No functional change (intended).

Sponsored by:   The FreeBSD Foundation
DeltaFile
+4-4sys/x86/cpufreq/hwpstate_amd.c
+4-41 files

FreeBSD/src a78e7c2sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Update copyright

Sponsored by:   The FreeBSD Foundation
DeltaFile
+5-0sys/x86/cpufreq/hwpstate_amd.c
+5-01 files

FreeBSD/src 4285340sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Style: Align 'machdep.hwpstate_amd_cppc_enable'

Align it like the rest.

No functional change (intended).

Sponsored by:   The FreeBSD Foundation
DeltaFile
+1-1sys/x86/cpufreq/hwpstate_amd.c
+1-11 files

FreeBSD/src ebcd80fsys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Rename PSTATE_CPPC internal flag

While here, also rename check_cppc_enabled() => check_cppc_in_use().

No functional change (intended).

Sponsored by:   The FreeBSD Foundation
DeltaFile
+16-18sys/x86/cpufreq/hwpstate_amd.c
+16-181 files

FreeBSD/src 951788esys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): 'epp' sysctl leaf to operate on real EPP hardware values

We were using percents, for compatibility with hwpstate_intel(4), but
this looses granularity that might be important in some scenarios or
with specific CPU models.

For consistency, hwpstate_intel(4) should be changed accordingly, at the
expense of breaking compatibility.

For release notes: Introduction of hwpstate_amd(4) deserves a release
note, even if the original commit was not tagged.  Functionality
introduced by recent commits tagged with "Relnotes" should be mentioned
along that one.

PR:             292615
Reviewed by:    aokblast
Relnotes:       yes
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55009
DeltaFile
+8-13sys/x86/cpufreq/hwpstate_amd.c
+8-131 files

FreeBSD/src cec0ab0sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Style: Sort headers

And separate includes from the rest with an additional newline.

Sponsored by:   The FreeBSD Foundation
DeltaFile
+5-4sys/x86/cpufreq/hwpstate_amd.c
+5-41 files

FreeBSD/src 7689e68sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Add knobs to get/set all fields of CPPC_REQUEST

This will allow experimentations and finer-grained tuning to the full
extent allowed by the hardware, which is especially important given that
the spec leaves to hardware implementors an important leeway in
interpreting CPPC's numeric parameters, causing the same settings to
have different effects on different CPU models.

PR:             292615
Reviewed by:    aokblast (older version)
Relnotes:       yes
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55010
DeltaFile
+42-12sys/x86/cpufreq/hwpstate_amd.c
+42-121 files

FreeBSD/src df7b4dcsys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Sane defaults for min/max perf on insane capabilities

If the CPPC_CAPABILITY_1 register stays at its reset value (0) even
after enabling CPPC, as observed in the field (see the referenced PR
below), use sane min/max performance limits as hinted by the ACPI spec,
i.e., all 0s for the minimum value and all 1s for the maximum one.

While here, let's cope upfront with some more insane situations, where
the minimum value would be greater than the maximum one, but also if
they would be equal which does not seem to make sense at all in the CPPC
frame (and, anyway, in this case, the actual minimum and maximum values
we program should have no effect at all).  That last case actually also
covers the one exposed in the previous paragraph.

PR:             292615
Reviewed by:    aokblast
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55007
DeltaFile
+24-5sys/x86/cpufreq/hwpstate_amd.c
+24-51 files

FreeBSD/src 6db204dsys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Factor out setting the CPPC_REQUEST register

In preparation for creating other knobs to tweak values in this register
beyond just the EPP (Efficiency/Performance Preference).

While here, add a herald comment before the softc structure indicating
how we achieve atomicity when modifying the softc.

Reviewed by:    aokblast
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55008
DeltaFile
+71-27sys/x86/cpufreq/hwpstate_amd.c
+71-271 files

FreeBSD/src bd58239sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): attach(): More diagnostic on CPPC enable

When the 'debug.hwpstate_verbose' tunable/sysctl knob is set, dump the
initial content of the CPPC_CAPABILITY_1 and CPPC_REQUEST registers.

If, after enabling CPPC, reading/writing some MSR fails during the attach
sequence, print a diagnostic.  However, once CPPC is enabled, we cannot
go back (disabling it is impossible), so we'll attach even if fiddling
with other MSRs failed.

While here, move diagnostic printing on attach out of the callback that
is executed on (potentially) another CPU and with interrupts disabled,
putting it into the attach routine itself.

While here, fix format for printing the CPU ID.

PR:             292615
Reviewed by:    aokblast (older version)
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55006
DeltaFile
+85-50sys/x86/cpufreq/hwpstate_amd.c
+85-501 files

FreeBSD/src 8aac1e9sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Register dump: Fine-grained error reporting

If some of the registers cannot be read, report that but continue trying
reading the others.  This also has the side benefit of simplifying code.

While here, use sbuf_new_for_sysctl(), and rename 'res' and 'ret', which
are to contain error values, to 'error'.

While here, remove the test on getting the per-cpu structure, as if it
is not present we would have already crashed on device attach.

While here, fix format for printing the CPU ID.

PR:             292615
Reviewed by:    aokblast (older version)
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55005
DeltaFile
+71-39sys/x86/cpufreq/hwpstate_amd.c
+71-391 files

LLVM/project d518d49lldb/source/Target Process.cpp

[LLDB]Move clean up to dtor (#181010)

I attempted to cleanup the raw ptr in pr/180996. But the cleanup should
have been done in the dtor, not `StopPrivateStateThread` so moving it
there.
DeltaFile
+2-2lldb/source/Target/Process.cpp
+2-21 files

FreeNAS/freenas 2f622desrc/middlewared/middlewared/alert/source license_status.py, src/middlewared/middlewared/plugins alert.py support.py

Update customer facing text to replace 'ixsystems' and 'iX' with 'TrueNAS'.

(cherry picked from commit f80a83b2c241c7a628f4b31259b913d950397724)
DeltaFile
+30-30src/middlewared/middlewared/alert/source/license_status.py
+4-4src/middlewared/middlewared/plugins/alert.py
+1-1src/middlewared/middlewared/plugins/update_/utils.py
+1-1src/middlewared/middlewared/plugins/support.py
+1-1src/middlewared/middlewared/plugins/truenas.py
+1-1src/middlewared_docs/debian/control
+38-386 files

LLVM/project 26add8allvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU setcc-select.ll saddo.ll

[AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (#177662)

This optimisation is motivated by [this minimal
example](https://godbolt.org/z/9o83GvGsM).

Particularly, if `mask` is a 64-bit integer, a select
```cpp
auto out = ((mask >> 32) != 0) ? a : b;
```
converts the null-check on the higher 32-bits of `mask` into a
`v_cmp_lt_u64` with the integer `1 << 32` stored in a pair of VGPRs
(effectively wasting two VGPRs).

More generally, if a 64-bit integer (whose lower 32 bits are known to be
irrelevant) is compared with a 64-bit constant, two VGPRs are wasted to
construct this constant.

This patch modifies ISel to take advantage of how 64-bit values are
stored in pairs of VGPRs (or SGPRs), and truncates the 64-bit constant

    [3 lines not shown]
DeltaFile
+202-0llvm/test/CodeGen/AMDGPU/setcc-select.ll
+61-51llvm/test/CodeGen/AMDGPU/saddo.ll
+54-54llvm/test/CodeGen/AMDGPU/div_v2i128.ll
+14-14llvm/test/CodeGen/AMDGPU/extract-subvector.ll
+14-10llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
+20-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+365-1299 files not shown
+414-18315 files

FreeNAS/freenas f08ec5asrc/middlewared/middlewared/alert/source license_status.py, src/middlewared/middlewared/plugins alert.py truenas.py

NAS-139600 / 26.0.0-BETA.1 / Update text to replace 'ixsystems' and 'iX' with 'TrueNAS (#18184)

Update customer facing text to replace 'ixsystems' and 'iX' with
'TrueNAS'.
The license nag messages were also cleaned and tightened.
DeltaFile
+30-30src/middlewared/middlewared/alert/source/license_status.py
+4-4src/middlewared/middlewared/plugins/alert.py
+1-1src/middlewared_docs/debian/control
+1-1src/middlewared/middlewared/plugins/truenas.py
+1-1src/middlewared/middlewared/plugins/support.py
+1-1src/middlewared/middlewared/plugins/update_/utils.py
+38-386 files

FreeNAS/freenas 0c30b2bsrc/freenas/usr/local/bin truenas-grub.py, src/middlewared/middlewared/utils io.py

Fix issues
DeltaFile
+2-2src/middlewared/middlewared/utils/io.py
+1-1src/freenas/usr/local/bin/truenas-grub.py
+3-32 files

FreeBSD/ports ba2db92audio/ft2-clone distinfo Makefile

audio/ft2-clone: Update to 2.04
DeltaFile
+3-3audio/ft2-clone/distinfo
+1-1audio/ft2-clone/Makefile
+4-42 files

LLVM/project 8066cc9clang/lib/Headers module.modulemap

[clang][builtins][modules] Add arm_bf16.h to the builtin module map (#180845)

DeltaFile
+10-1clang/lib/Headers/module.modulemap
+10-11 files

FreeNAS/freenas e612a1bsrc/middlewared/middlewared/etc_files generate_ssl_certs.py systemd.py, src/middlewared/middlewared/plugins account.py

Expand use of atomic_write() helper

This commit expands use of atomic_write() to places where there
is risk that a partial file write can impact stability or
predictable server behavior.
DeltaFile
+5-5src/middlewared/middlewared/etc_files/generate_ssl_certs.py
+2-3src/middlewared/middlewared/plugins/failover_/event.py
+3-2src/middlewared/middlewared/plugins/docker/backup.py
+2-3src/middlewared/middlewared/plugins/account.py
+2-2src/middlewared/middlewared/etc_files/systemd.py
+2-1src/middlewared/middlewared/etc_files/hostname.py
+16-161 files not shown
+18-177 files