[ArgPromotion] Pass context instruction to dereferenceability check (#202305)
This is necessary for argument promotion to work under deref-at-point
semantics. For the primary case, specify the context instruction as the
first instruction in the function, which should effectively disable the
check for frees.
[InstCombine] Ignore frees when inferring inbounds (#202304)
From LangRef:
> Note that the object does not have to be live anymore; being
> in-bounds of a deallocated object is sufficient.
[DirectX] Add more CodeGen tests (#201714)
These tests were left out of the initial PRs that added the covered
functionality because the llc printed output was not yet in the right
form. It is now, so add the tests.
AMDGPU/UniformityAnalysis: MIR Uniformity analysis for INLINEASM (#201874)
If any of the defs are divergent, need to report instruction as
NeverUniform so that isUniformReg can calculate uniformity for each def.
[AArch64] Add -global-isel runlines to ZCZ tests(NFC) (#200797)
ZCZ lowering relies on ISel (for FPR - pseudo instruction pattern
matching, for GPR - canonical form pattern matching). This patch adds a
representative -global-isel runlines to catch possible regressions,
though these are not very likely because both selectors should share the
patterns.
[LLDB][NFC] Move logging from GDBRemoteCommunication::CheckForPacket into a helper function (#201526)
This was a lot of the code in the middle of core logic.
[AMDGPU] Cache results in a bitvector for VOPDPairingMutation (#201837)
With this change the code no longer checks `(I, J)` pair when it is
known that `(_, J)` is not a valid VOPD instruction. The saving is
achieved by precomputing `(_, Y)` into a bitvector, that is also used by
`(_, I)` check, so the `(_, J)` check is "free".
---------
Co-authored-by: Antonio Carpio <antonio.carpio at amd.com>
[flang][hlfir] Extend InlineHLFIRCopy to inline copy_out with copy-back
Rename `InlineHLFIRCopyIn` to `InlineHLFIRCopy` and extend it to inline
the paired `hlfir.copy_out` operation. The copy_out is inlined at its
original location, after the call, ensuring proper ordering of copy-back
and deallocation.
Only inlines when no copy-back is required (intent(in)); intent(inout/out)
pairs are left untransformed.
Based on https://github.com/llvm/llvm-project/pull/179096.
Co-Authored-By: Kazuaki Matsumura <kmatsumura at nvidia.com>
Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
ssl_kex: ensure the public key uses uncompressed encoding
EC_POINT_oct2point() does most of the validation we need it to do, but it
has to accept the point at infinity, compressed and hybrid encodings for
historic reasons. So exclude these cases: the point at infinity makes no
sense here and will be caught later in ECDH_compute_key(), the compressed
and hybrid encodings MUST NOT be supported per RFC 8422 section 5.1.2.
This is implemented using the strategy already used in ec_convert.c since
the point_conversion_form_t is completely unfit for anything.
Set decode_error to ensure we send that alert. We may make some effort to
use illegal_parameter later.
Issue about the missing alert and the point at infinity raised by Lucca
Hirschi et al.
ok jsing kenjiro
[NFC][lldb] move m_stop_info and m_stop_description up a class (#201858)
Now that Windows also clears stale thread info on resume
(https://github.com/llvm/llvm-project/pull/201595), `m_stop_description`
and `m_stop_info` can be moved into `NativeThreadProtocol`.
rdar://178725507
[Hexagon] Fix arch attribute mapping in ELFObjectFile (#201531)
hexagonAttrToFeatureString in ELFObjectFile.cpp used a hardcoded switch
listing each supported Hexagon arch version. The switch was not kept in
sync, so .hexagon.attributes entries for newer versions returned
std::nullopt and were silently dropped. The disassembler then ran
without v68 enabled and valid instructions were rendered as <unknown> in
llvm-objdump output.
Replace the switch with `"v" + utostr(Attr)` so any current or future
arch version recorded in build attributes is translated to a subtarget
feature string automatically.
Fixes #201594
Signed-off-by: Rishabh Bali <rbali at qti.qualcomm.com>
Co-authored-by: Rishabh Bali <rbali at hu-rbali-hyd.qualcomm.com>
AMDGPU/UniformityAnalysis: MIR Uniformity analysis for INLINEASM
If any of the defs are divergent, need to report instruction as
NeverUniform so that isUniformReg can calculate uniformity for each def.
