[clang-format] Fix annotation of alternative operator and (#199112)
I now annotate`and` as TT_BinaryOperator before the pointer/reference
heuristic. I left `bitand` alone since, like `&`, it can still be a
reference.
Fixes #199027.
virtual_oss(8): Make sndstat FD global
There is no reason to have per-profile copies, plus this way we open
/dev/sndstat multiple times if more than 1 profile is created.
Also close the FD on exit to avoid leaking.
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Reviewed by: jrm
Pull-Request: https://ron-dev.freebsd.org/FreeBSD/src/pulls/41
(cherry picked from commit 93a234a694f37d373acf303a247d129dda28044e)
virtual_oss(8): Properly cleanup cuse(3)virtual_oss(8) does not currently keep track of the cuse(3) it creates,
nor does it destroy any of them on exit, except for the control device.
This is harmless if virtual_oss(8) is killed after all audio streams
have been shut down, but if it's killed during I/O, the process hangs
and/or goes into uninterruptible sleep state.
To fix this, have pointers to all cuse(3) devices, and explicitly
destroy them on exit. Also make sure we don't leak memory in
dup_profile().
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Reviewed by: jrm
Pull-Request: https://ron-dev.freebsd.org/FreeBSD/src/pulls/41
(cherry picked from commit 0bd5ef6b43633a3cf77495a087a9376b2b3b11c9)
[mlir][OpenMP] Translate reductions on taskloop (#199670)
This patch adds LLVM IR translation for `reduction` and `in_reduction`
clauses on `omp.taskloop.context`.
For `taskloop reduction`, the lowering emits the implicit taskgroup
reduction setup, builds the task-reduction descriptor array, and maps
each generated task to runtime-provided private reduction storage
through `__kmpc_task_reduction_get_th_data`.
For `taskloop in_reduction`, the lowering uses the same runtime lookup
path with a null descriptor, allowing the runtime to find the enclosing
task-reduction context.
Unsupported byref, cleanup-region, and two-argument initializer forms
remain diagnosed.
### Stack / review order
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various: Fix links to PGP keyring
Let the link text match the actual file name.
PR: 295908
Fixes: adda9a606635 ("Link to the new pgpkeys.txt file in articles and books")
pgpkeys: Fix dinoex's key
A missing blank line was causing a checksum error, preventing anyone
from importing the keyring.
PR: 295908
Fixes: c16a3df222e3 ("documentation/static/pgpkeys/dinoex.key: update gnupg key")
handbook/desktop: Note chrome requires locale
Chromium has available search engines region locked for compliance
reasons. Note that in order to have available search engines, like
duckduckgo, chrome requires a specific locale to be set.
Differential Revision: https://reviews.freebsd.org/D57142
Add unit tests for aarch64 VM validation rules
15 parametrized cases covering the three x86-only flag rejections
(UEFI_CSM, hyperv_enlightenments, hide_from_msr) on aarch64 guests,
their acceptance on x86 guests, and the cross-arch HOST-PASSTHROUGH /
HOST-MODEL cpu_mode guard including the i686-on-x86_64 family exception.
Make VM secboot block arch-aware and tighten arch-compat validation
The secure boot path in do_create() previously assumed an x86 guest and
rejected aarch64 + secure_boot configurations with confusing errors. It
now picks arch-appropriate machine and firmware defaults and accepts
AAVMF secure-boot variants.
Also reject combinations that can never produce a working VM: x86-only
features (UEFI_CSM, Hyper-V enlightenments, hide_from_msr) on aarch64,
and KVM-only CPU modes (HOST-PASSTHROUGH, HOST-MODEL) when the guest
architecture doesn't match the host. These previously slipped through
schema validation and failed later at libvirt define-time; catching them
up front yields a useful error message.
Includes a unit test for the secboot firmware-name detection helper.
Add aarch64 and AAVMF surface to VM plugin
Probe qemu-system-aarch64 for its machine types, expose AAVMF firmware
choices via a new vm.bootloader_aavmf_choices API method, and add an
arch parameter to vm.cpu_model_choices. The bootloader_ovmf validator
now selects the right choices function by arch_type, fixing a latent
arch-blind validate-pass bug. Default firmware fallback is arch-aware
(AAVMF_CODE.fd on aarch64, OVMF_CODE_4M.fd otherwise).
Depends on the parallel truenas_pylibvirt change.
Install qemu and UEFI firmware on every host arch
The qemu emulator and UEFI firmware packages were arch-gated so that an
x86_64 build pulled only x86 binaries + OVMF, and an arm64 build pulled
only ARM binaries + AAVMF. Drop the arch qualifiers so all four packages
install on every TrueNAS host.
[AMDGPU] Fix 64->32 bit division corner case (#204469)
Do not implement 64-bit signed division with 32-bit division if operands
are only constrained to a 32-bit signed range.
-2147483648/-1 != -2147483648/1, but their lower 32-bits are identical.
32-bit division cannot generate the correct result for both sets of
operands. Only use 32-bit division if operands are constrained to a
31-bit signed range.
Bug appears in both AMDGPUCodeGenPrepare.cpp and AMDGPUISelLowering.cpp.
Tested in https://github.com/llvm/llvm-test-suite/pull/428.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
[DWARFLinker] Fix data race on the global parallel strategy (#204642)
DWARFLinkerImpl::link() assigned the process-global
llvm::parallel::strategy on entry. dsymutil runs link() concurrently,
one call per architecture of a universal binary, so those assignments
race. An inconsistent strategy can route per-compile-unit cloning onto a
thread that is not an llvm::parallel ThreadPoolExecutor worker, where
the per-thread allocators call getThreadIndex().
This manifested itself as an assert, but otherwise returns in a
out-of-bounds.
```
Assertion failed: ((threadIndex != UINT_MAX) && "getThreadIndex() must be called from a thread created by " "ThreadPoolExecutor"), function getThreadIndex, file Parallel.h, line 51.
```
The assert is non-deterministic and needs more than one architecture to
reproduce.
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security/ipv6-toolkit: Update to v2.2
SI6 Networks IPv6 Toolkit 2.2
* All: Ensure consistency in version numbers across tools and documentation.
* path6: Fix bug that prevented setting TCP flags
* blackhole6: Fixed bug that lead to errors for paths >= 10 hops
* blackhole6: Polished the code
Removed unnecessary comments, and prevented some internal errors to make it
to the tool output.
* blackhole6: Set different default destination port numbers for TCP and UDP
The default UDP destination port has been changed to port 53.
SI6 Networks IPv6 Toolkit v2.1 (Jan)
* addr6: Add support for accepting only one address per prefix
Option '--block-dup-preflen' was added
* scan6: Fix bug in smart scan
There was a bug in the generation of low-byte and pattern-byte addresses.
* scan6: Improve VMWare scans
We have now added vSphere and ESX server entries
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[GlobalISel] Add `or_and_xor_to_or` pattern from SelectionDAG (#204614)
PR #201108 was merged and then reverted due to a failing test. This PR
fixes the tests that failed.
[lldb] Don't enable Objective-C in expressions on unsupported formats (#204639)
Evaluating any expression against a WebAssembly target aborted LLDB:
```
(lldb) expr (int)sizeof(Point)
LLVM ERROR: Objective-C support is unimplemented for object file format
```
WebAssembly can't JIT expressions (RuntimeDyld doesn't support the Wasm
object format, so ProcessWasm sets CanJIT to false), but it can handle
simple expressions that can be IR interpreted.
When setting up the expression's language options, LLDB speculatively
enables Objective-C, which trips up the fatal error as Objective-C code
generation only supports Mach-O, ELF, and COFF.
Add ObjCLanguageRuntime::IsSupportedForArchitecture and disable
Objective-C in the expression's language options when the target's
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[AArch64][TTI] Surface per-CPU branch misprediction penalty to SimplifyCFG (#201484)
AArch64 scheduling models already define `MispredictPenalty` per CPU
(e.g.,
Neoverse V2 = 11, Cortex-A55 = 8, Cyclone = 16), but this value was
never surfaced through TargetTransformInfo. The base class default of 0
effectively disabled profile-guided speculation of unpredictable
branches
in SimplifyCFG's foldTwoEntryPHINode.
Override `getBranchMispredictPenalty` in AArch64TTIImpl to read from the
scheduling model, enabling SimplifyCFG to speculate instructions into
conditional selects when the speculation cost is justified by the
misprediction penalty, matching the behavior X86 already has (hardcoded
at 14 cycles).
Godbolt: https://godbolt.org/z/68czz556j
(note: I am not sure why godbolt is not showing the compiler I saved,
but essentially the example shows the comparison of aarch64 clang vs.
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[InstCombine] Drop assumption-cache update in freezeOtherUses (#204599)
Redundant now that freezeOtherUses re-queues the rewritten users
(#202306), which re-processes them in the same iteration. Added in
#192935 to avoid a fixpoint-verifier failure.