LLVM/project df8b74ellvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU vgpr-spill.mir

[AMDGPU] Multi dword spilling for unaligned tuples

While spilling unaligned tuples, rather than breaking the
spill into 32-bit accesses, spill the first register as a
single 32-bit spill, and spill the remainder of the tuple
as an aligned tuple.
Some additional bookkeeping is required in the spilling
loop to manage the state.
DeltaFile
+44-7llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+8-26llvm/test/CodeGen/AMDGPU/vgpr-spill.mir
+52-332 files

NetBSD/pkgsrc-wip 6225065jabref distinfo Makefile

jabref: Update to 2.11.1
DeltaFile
+3-2jabref/distinfo
+2-2jabref/Makefile
+5-42 files

LLVM/project c690414clang/lib/AST/ByteCode Compiler.cpp

[clang][bytecode][NFC] Refactor visitDeclRef() (#183690)

Move the `!VD` case up so we can assume `VD` to be non-null earlier and
use a local variable instead of calling `D->getType()` several times.
DeltaFile
+15-17clang/lib/AST/ByteCode/Compiler.cpp
+15-171 files

OPNSense/core 1ecef4csrc/etc/inc auth.inc, src/opnsense/mvc/app/controllers/OPNsense/Auth/Api UserController.php

system: unify pwd_changed_at usage

Remove requirement to configure password_policy_length and update the
timestamp via console and admin pages as well.

PR: https://github.com/opnsense/core/issues/9857

(cherry picked from commit 4010090656779774532b54f7430049279f44cb37)
DeltaFile
+1-8src/www/system_usermanager_passwordmg.php
+2-1src/etc/inc/auth.inc
+1-0src/opnsense/mvc/app/controllers/OPNsense/Auth/Api/UserController.php
+4-93 files

LLVM/project a1f83ballvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[LV] NFCI: Move extend optimization to transformToPartialReduction. (#182860)

The reason for doing this in `transformToPartialReduction` is so that we
can create the VPExpressions directly when transforming reductions into
partial reductions (to be done in a follow-up PR).

I also intent to see if we can merge the in-loop reductions with partial
reductions, so that there will be no need for the separate
`convertToAbstractRecipes` VPlan Transform pass.
DeltaFile
+65-8llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+65-81 files

OpenBSD/ports FNnrqKsx11/kde-plasma/aurorae Makefile

   Add missing dependency on ksvg

   spotted by naddy
VersionDeltaFile
1.7+3-1x11/kde-plasma/aurorae/Makefile
+3-11 files

OpenBSD/src A33Vk70usr.bin/sndiod dev.c

   sndiod: Fix ctl_match() when arg0 == NULL

   No behavior change as sndiod doesn't call ctl_match() with
   arg0 == NULL (yet).
VersionDeltaFile
1.128+2-2usr.bin/sndiod/dev.c
+2-21 files

NetBSD/pkgsrc-wip c530a03jabref Makefile

jabref: Fix MASTER_SITES
DeltaFile
+1-1jabref/Makefile
+1-11 files

OpenBSD/src yT3OP8gusr.bin/sndiod sock.c

   sndiod: Log unknown network messages to ease debugging the protocol
VersionDeltaFile
1.57+2-2usr.bin/sndiod/sock.c
+2-21 files

FreeBSD/ports 82e73cbmisc/py-hf-xet distinfo Makefile

misc/py-hf-xet: Update to 1.3.1

Changelog: https://github.com/huggingface/xet-core/releases/tag/v1.3.1

Reported by:    Repology
DeltaFile
+3-3misc/py-hf-xet/distinfo
+1-1misc/py-hf-xet/Makefile
+4-42 files

OpenBSD/src N0mwYIMlib/libsndio aucat.c, usr.bin/sndioctl sndioctl.c

   Minor spacing tweak
VersionDeltaFile
1.23+2-2usr.bin/sndioctl/sndioctl.c
1.80+1-2lib/libsndio/aucat.c
+3-42 files

OpenBSD/src Q6RbpC6usr.bin/tmux cmd-list-panes.c cmd-choose-tree.c

   Validate -O flags, from Dane Jensen in GitHub issue 4889.
VersionDeltaFile
1.39+8-1usr.bin/tmux/cmd-list-panes.c
1.53+8-1usr.bin/tmux/cmd-choose-tree.c
1.50+5-1usr.bin/tmux/cmd-list-windows.c
1.41+5-1usr.bin/tmux/cmd-list-buffers.c
1.42+5-1usr.bin/tmux/cmd-list-clients.c
1.72+5-1usr.bin/tmux/cmd-list-keys.c
+36-62 files not shown
+46-88 files

OpenBSD/src gxyhINyusr.bin/tmux file.c

   Fix memory leak, from Chris Lewis, reported by Huihui Huang.
VersionDeltaFile
1.18+2-1usr.bin/tmux/file.c
+2-11 files

OPNSense/core 7326b42src/etc/inc config.inc

system: create a backup on factory reset

This way we can see all the migrations taking place instead of hiding
them by squashing them into the first backup.  This is very important
for image testing as 26.1 taught us.

(cherry picked from commit da4fbf7ee942d6ce0e7b0a475b4d20577dd37183)
DeltaFile
+1-1src/etc/inc/config.inc
+1-11 files

OPNSense/core da4fbf7src/etc/inc config.inc

system: create a backup on factory reset

This way we can see all the migrations taking place instead of hiding
them by squashing them into the first backup.  This is very important
for image testing as 26.1 taught us.
DeltaFile
+1-1src/etc/inc/config.inc
+1-11 files

LLVM/project 5af5bd4llvm/lib/Target/X86 X86ISelLowering.cpp X86ExpandPseudo.cpp

[AMX][NFC] Match pseudo name with isa  (#182235)

Adds missing suffix to clear intent for isa.
we switch from `TILEMOVROWrre` to `TILEMOVROWrte` in
https://github.com/llvm/llvm-project/pull/168193 , however pseudo was
same, updating pseudo to intent right isa version, This patch makes
changes `PTILEMOVROWrre` to `PTILEMOVROWrte`, even though pseudo does
not actually have any tile register.

---------

Co-authored-by: mattarde <mattarde at intel.com>
DeltaFile
+24-24llvm/lib/Target/X86/X86ISelLowering.cpp
+24-24llvm/lib/Target/X86/X86ExpandPseudo.cpp
+18-18llvm/lib/Target/X86/X86InstrAMX.td
+12-12llvm/lib/Target/X86/X86PreTileConfig.cpp
+78-784 files

LLVM/project 058705bclang/include/clang/StaticAnalyzer/Core/PathSensitive ProgramState.h, clang/lib/StaticAnalyzer/Core ProgramState.cpp

[Clang][NFCI] Make program state GDM key const pointer (#183477)

This commit makes the GDM key in ProgramState a constant pointer. This
is done to better reflect the intention of the key as a unique
identifier for the data stored in the GDM, and to prevent the use of the
storage pointed to by the key as global state.

Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
DeltaFile
+9-8clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
+8-7clang/lib/StaticAnalyzer/Core/ProgramState.cpp
+17-152 files

FreeBSD/src c3577fcsys/dev/dpaa2 dpaa2_buf.c

dpaa2: improve error messages and log requested cluster size

If m_getjcl() fails we want to know the size we requested in order to
have a chance to evaluate the problem better.

MFC after:      3 days
Reviewed by:    tuexen
Differential Revision: https://reviews.freebsd.org/D55555
DeltaFile
+2-1sys/dev/dpaa2/dpaa2_buf.c
+2-11 files

LLVM/project 9145bf6llvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/ARM fp-intrinsics-vector-v8.ll

Lower strictfp vector rounding operations similar to default mode

Previously the strictfp rounding nodes were lowered using unrolling to
scalar operations, which has negative impact on performance. Partially
this issue was fixed in #180480, this change continues that work and
implements optimized lowering for v4f16 and v8f16.
DeltaFile
+10-220llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
+7-12llvm/lib/Target/ARM/ARMISelLowering.cpp
+17-2322 files

LLVM/project db56f21llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Skip last corrections and scaling for afn llvm.sqrt.f64

Device libs has a fast sqrt macro implemented this way.
DeltaFile
+240-652llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+140-602llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+23-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+22-17llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+425-1,2884 files

LLVM/project a4b65abllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Improve fsqrt f64 expansion with ninf

Address todo to reduce the is_fpclass check to an fcmp with 0.
DeltaFile
+52-92llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+60-80llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+10-6llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+7-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+3-2llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
+132-1835 files

FreeBSD/src 6bd97e9sys/netinet sctp_syscalls.c

sctp: fix NOINET build

Reported by:            ngie
Fixes:                  454212b9718b ("sctp: fix so_proto when peeling off a socket")
MFC after:              3 days
DeltaFile
+20-1sys/netinet/sctp_syscalls.c
+20-11 files

LLVM/project 9270406llvm/lib/Target/X86 X86TargetTransformInfo.cpp, llvm/lib/Transforms/Vectorize VectorCombine.cpp

[VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (#183575)

Unless we're working with AVX512 mask predicate types, sign extending a
vXi1 comparison result back to the width of the comparison source types
is free.

VectorCombine::foldShuffleOfCastops - pass the original CastInst in the
getCastInstrCost calls to track the source comparison instruction.

Fixes #165813
DeltaFile
+12-54llvm/test/Transforms/VectorCombine/X86/shuffle-of-casts.ll
+14-0llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+2-2llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+28-563 files

FreeBSD/ports 86c4c07databases/pgloader3 Makefile

databases/pgloader3: Unbreak with SBCL >= 2.5.11

PR:             293478
Reported by:    bob at vesterman.com
DeltaFile
+4-0databases/pgloader3/Makefile
+4-01 files

LLVM/project 4708508llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Skip last corrections and scaling for afn llvm.sqrt.f64

Device libs has a fast sqrt macro implemented this way.
DeltaFile
+180-660llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+143-625llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+23-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+22-17llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+368-1,3194 files

LLVM/project a5bbedfllvm/test/Transforms/LoopVectorize/AArch64 scalable-reductions-tf.ll

[LV] Convert test to UTC. NFC
DeltaFile
+40-16llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions-tf.ll
+40-161 files

FreeBSD/src db16856sys/conf files, sys/dev/acpica acpivar.h

xen/acpi: implement hook to notify Xen about entering sleep state

This is required so that ACPI power-off (entering S5) works as expected, as
the ACPI PM1a and PM1b blocks might not be accessible by dom0 directly.
Additionally, Xen also needs to do cleanup before entering a sleep state,
so it needs to be notified about it.

With this patch FreeBSD dom0 now powers off the host correctly:

acpi0: Powering system off...
(XEN) [   85.686598] arch/x86/hvm/emulate.c:415:d0v0 fixup p2m mapping for page fedc6 added
(XEN) [   85.687606] arch/x86/hvm/emulate.c:415:d0v0 fixup p2m mapping for page fbc10 added
(XEN) [   85.692357] Preparing system for ACPI S5 state.
(XEN) [   85.692702] Disabling non-boot CPUs ...
(XEN) [   85.694471] Broke affinity for IRQ9, new: {0-7}
[...]
(XEN) [   85.903118] Entering ACPI S5 state.

Should be a non-functional change when not running as a Xen dom0.

    [5 lines not shown]
DeltaFile
+75-0sys/dev/xen/acpi/xen-acpi.c
+13-0sys/dev/acpica/Osd/OsdHardware.c
+13-0sys/dev/acpica/acpivar.h
+1-0sys/conf/files
+102-04 files

NetBSD/pkgsrc ctr2LpSdevel/premake5 distinfo, devel/premake5/patches patch-binmodules_luasocket_gem_myps2pdf

   premake5: fix unportable test(1) operator
VersionDeltaFile
1.1+47-0devel/premake5/patches/patch-binmodules_luasocket_gem_myps2pdf
1.5+2-1devel/premake5/distinfo
+49-12 files

LLVM/project 96a65cfllvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU rsq.f64.ll fdiv.f64.ll

AMDGPU: Skip last corrections in afn f64 reciprocal

Device libs has a fast reciprocal macro that is close
to the fast division expansion, but skips the last terms
compared to the full division.

The basic reciprocal handling has identical output to this
macro. The negative reciprocal case has different fneg placement
and smaller code size, but I believe should be the same.
DeltaFile
+32-116llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+37-7llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
+16-0llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+15-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-2llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
+0-4llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
+112-1291 files not shown
+112-1317 files

LLVM/project becbc33llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll

AMDGPU: Improve fsqrt f64 expansion with ninf

Address todo to reduce the is_fpclass check to an fcmp with 0.
DeltaFile
+52-92llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+10-6llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+7-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+3-2llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
+72-1034 files