LLVM/project 6b1cc22llvm/lib/Target/AArch64 AArch64MacroFusion.cpp AArch64Processors.td, llvm/test/CodeGen/AArch64 misched-fusion-fcsel.ll

Revert "[AArch64] Adding FeatureFuseFCmpFCSel  (#184881)"

This reverts commit 081cd56503bcdccde43a187053d7d5e32c50085e.
DeltaFile
+0-31llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+0-27llvm/test/CodeGen/AArch64/misched-fusion-fcsel.ll
+0-4llvm/lib/Target/AArch64/AArch64Processors.td
+0-4llvm/lib/Target/AArch64/AArch64Features.td
+1-2llvm/lib/Target/AArch64/AArch64Subtarget.h
+1-685 files

LLVM/project 081cd56llvm/lib/Target/AArch64 AArch64MacroFusion.cpp AArch64Features.td, llvm/test/CodeGen/AArch64 misched-fusion-fcsel.ll

[AArch64] Adding FeatureFuseFCmpFCSel  (#184881)

This adds a new AArch64 feature, FeatureFuseFCmpFCSel - for FP compare
and FP Select instruction, and adds it to recent Apple CPUs.
Instruction scheduling makes such pairs adjacent.
DeltaFile
+31-0llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+27-0llvm/test/CodeGen/AArch64/misched-fusion-fcsel.ll
+4-0llvm/lib/Target/AArch64/AArch64Features.td
+4-0llvm/lib/Target/AArch64/AArch64Processors.td
+2-1llvm/lib/Target/AArch64/AArch64Subtarget.h
+68-15 files

LLVM/project 18e447blldb/source/Plugins/Platform/MacOSX PlatformDarwin.cpp

[lldb][PlatformDarwin][NFC] Factor sanitization of Python module names into helper function (#185627)

I'm planning on re-using this logic for another API. This patch creates
a `SanitizedScriptingModuleName` that encapsulates the logic that checks
whether a file name would fail to be loaded by a `ScriptInterpreter`. I
called it something more generic despite it being `Python` specific at
the moment, in case the FIXME is eventually going to be addressed.

We have existing unit-tests that check this logic, so I'm relying on
that test coverage to give us confidence that this still works as
expected.
DeltaFile
+60-25lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+60-251 files

LLVM/project 032b2ffclang/lib/CIR/CodeGen TargetInfo.cpp CIRGenModule.cpp, clang/test/CIR/CodeGenHIP simple.cpp

[CIR][AMDGPU] Add AMDGPU target support to CIR CodeGen
DeltaFile
+89-0clang/test/CIR/CodeGenHIP/simple.cpp
+20-0clang/lib/CIR/CodeGen/TargetInfo.cpp
+4-0clang/lib/CIR/CodeGen/CIRGenModule.cpp
+3-0clang/lib/CIR/CodeGen/TargetInfo.h
+116-04 files

FreeBSD/ports 328447fmisc/ollama distinfo Makefile, misc/ollama/files freebsd-compatibility.patch

misc/ollama: update 0.15.1 → 0.17.7

PR:             293686
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+18-16misc/ollama/files/freebsd-compatibility.patch
+5-5misc/ollama/distinfo
+1-2misc/ollama/Makefile
+24-233 files

FreeBSD/ports e0cb3dedatabases/duckdb pkg-plist distinfo, databases/py-duckdb distinfo Makefile

databases/{,py-}duckdb: update 1.4.4 → 1.5.0
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+76-21databases/duckdb/pkg-plist
+19-19databases/duckdb/distinfo
+14-10databases/duckdb/Makefile
+3-3databases/py-duckdb/distinfo
+1-1databases/py-duckdb/Makefile
+113-545 files

pkgng/pkgng a376adelibpkg pkgdb.c

pkgdb_close: remove sqlite3_shutdown

pkgdb_close already clean enough, sqlite3_shutdown is not threadsafe
and supposed to be called only once while pkgdb_close can be called
multiple times
DeltaFile
+0-1libpkg/pkgdb.c
+0-11 files

pkgng/pkgng f93cfeflibpkg pkg_audit.c

audit: plug memory leak
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+2-0libpkg/pkg_audit.c
+2-01 files

LLVM/project f7c79f4llvm/lib/Target/AArch64 AArch64InstrGISel.td, llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp AArch64LegalizerInfo.cpp

[AArch64][GlobalISel] Add G_SQDMULL node

Previously, GISel was failing to lower the sqdmulls.scalar intrinsic. This is just a variation of sqdmull, but on two 32-bit S registers.
To fix this, create a G_SQDMULL node, and lower sqdmulls.scalar to that. This node is linked to the SD patterns for sqdmull, which allow this version of the intrinsic to lower.
DeltaFile
+99-62llvm/test/CodeGen/AArch64/arm64-vmul.ll
+1-7llvm/test/CodeGen/AArch64/arm64-int-neon.ll
+7-0llvm/lib/Target/AArch64/AArch64InstrGISel.td
+2-0llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+2-0llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+111-695 files

pkgng/pkgng 329d205docs pkg-delete.8 pkg-install.8, src utils.c

autoremove: install, delete and upgrade are now autoremove aware

Add --autoremove to those commands, also add an autoremove option
in pkg.conf

After any successful call to those commands, they will execute an
autoremove.

Fixes: #725
DeltaFile
+88-1tests/frontend/install.sh
+87-0tests/frontend/upgrade.sh
+72-1tests/frontend/delete.sh
+42-0src/utils.c
+12-2docs/pkg-delete.8
+11-1docs/pkg-install.8
+312-57 files not shown
+365-1013 files

LLVM/project d4d9b5allvm/test/CodeGen/AMDGPU dynamic_stackalloc.ll llvm.amdgcn.reduce.sub.ll

[AMDGPU] DPP implementations for Wave Reduction

Adding DPP reduction support for i32 types.
Supported Ops: `umin`, `min`, `umax`, `max`,
`add`, `sub`, `and`, `or`, `xor`.
DeltaFile
+2,113-1,374llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
+1,096-146llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+1,047-142llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+986-132llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+894-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+894-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+7,030-2,0108 files not shown
+11,325-2,87814 files

OpenBSD/src TLm0GmZusr.bin/ssh ssh-sk-client.c

   Fix potential 1-byte array overrun in the case where read() returns
   exactly 100 bytes.  Flagged by Coverity CID 901296, ok djm@
VersionDeltaFile
1.17+2-2usr.bin/ssh/ssh-sk-client.c
+2-21 files

OPNSense/core 1ffaff8src/www firewall_nat_out.php

firewall: use safe config iteration in outbound NAT page
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+3-4src/www/firewall_nat_out.php
+3-41 files

LLVM/project bf21500llvm/test/CodeGen/SystemZ misched-prera-cmp-elim.mir misched-prera-latencies.mir

[SystemZ] Add missing REQUIRES: asserts
DeltaFile
+1-0llvm/test/CodeGen/SystemZ/misched-prera-cmp-elim.mir
+1-0llvm/test/CodeGen/SystemZ/misched-prera-latencies.mir
+2-02 files

OPNSense/core 378b291src/www system_advanced_admin.php

system: use safe config iteration in admin settings page
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+2-2src/www/system_advanced_admin.php
+2-21 files

OpenBSD/src FvQXb3Hsys/dev/pci if_iwx.c

   Only enable MIMO on MLD iwx(4) devices if our AP supports MIMO.

   Same approach as we are using for the pre-MLD device generation.

   OK phessler@ kevlo@ jan@
VersionDeltaFile
1.209+11-3sys/dev/pci/if_iwx.c
+11-31 files

LLVM/project 5adbf03clang/lib/Basic/Targets AMDGPU.cpp, clang/test/Driver amdgpu-macros.cl

clang/AMDGPU: Ensure more macros are defined for dummy target

FP_FAST_FMA should be unconditionally true.
DeltaFile
+15-15clang/lib/Basic/Targets/AMDGPU.cpp
+8-8clang/test/Preprocessor/predefined-arch-macros.c
+10-0clang/test/Driver/amdgpu-macros.cl
+33-233 files

NetBSD/pkgsrc AnKImItdoc CHANGES-2026

   Updated www/nginx-devel, security/py-acme, security/py-certbot*
VersionDeltaFile
1.1678+19-1doc/CHANGES-2026
+19-11 files

OpenBSD/src Qn8Thpvsys/dev/pci if_iwx.c if_iwxreg.h

   Only add iwx(4) firmware PHY context once our channel is known.

   The Linux iwlwifi driver no longer adds unused firmware PHY contexts
   because newer firmware runs calibration when a PHY context is added.

   See linux.git commit f3276ff0d498a364dfdff74cc1825b5f6e27f472

   ok phessler@ kevlo@

   Tested:
   AX200: stsp
   AX210: kevlo
   AX211: phessler
   AX211 (BZ): stsp
VersionDeltaFile
1.208+45-37sys/dev/pci/if_iwx.c
1.65+2-2sys/dev/pci/if_iwxreg.h
1.47+2-1sys/dev/pci/if_iwxvar.h
+49-403 files

NetBSD/pkgsrc 8dldv3Isecurity/py-certbot-dns-dnsmadeeasy distinfo, security/py-certbot-dns-gehirn distinfo

   py-acme py-certbot*: updated to 5.4.0

   5.4.0 - 2026-03-10

   Added
   - The webroot plugin now supports IP address issuance.

   Changed
   - certbot-nginx now requires pyparsing>=3.0.0.
VersionDeltaFile
1.70+4-4security/py-certbot-dns-dnsmadeeasy/distinfo
1.70+4-4security/py-certbot-dns-gehirn/distinfo
1.70+4-4security/py-certbot-dns-google/distinfo
1.70+4-4security/py-certbot-dns-linode/distinfo
1.75+4-4security/py-certbot-dns-luadns/distinfo
1.75+4-4security/py-certbot-dns-ovh/distinfo
+24-2413 files not shown
+72-7219 files

LLVM/project d780072libclc/clc/include/clc/math clc_div_fast.h clc_recip_fast.h, libclc/clc/lib/generic/math clc_sqrt_fast.cl clc_recip_fast.cl

libclc: Add fast version utility functions for div, sqrt and reciprocal (#185823)
DeltaFile
+19-0libclc/clc/include/clc/math/clc_div_fast.h
+19-0libclc/clc/include/clc/math/clc_recip_fast.h
+19-0libclc/clc/include/clc/math/clc_sqrt_fast.h
+15-0libclc/clc/lib/generic/math/clc_sqrt_fast.cl
+14-0libclc/clc/lib/generic/math/clc_recip_fast.cl
+13-0libclc/clc/lib/generic/math/clc_div_fast.cl
+99-03 files not shown
+128-19 files

OPNSense/core 00af539src/etc/inc util.inc interfaces.inc

backend: mwexecfb(): "spidfile" is weird so switch "pidfile" according to "reset"
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+5-8src/etc/inc/util.inc
+1-1src/etc/inc/interfaces.inc
+6-92 files

LLVM/project cf38704llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Fix debug log format (#185804)

The current debug log:
```
SrcSubscripts: {4611686018427387904,+,-1}<nsw><%loop.header>
DstSubscripts: {4611686018427387904,+,-1}<nsw><%loop.header>    delinearized
    common nesting levels = 1
    maximum nesting levels = 1
    SameSD nesting levels = 0
```
Missing a newline before "delinearized".

Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
DeltaFile
+1-0llvm/lib/Analysis/DependenceAnalysis.cpp
+1-01 files

OPNSense/core fc4e27dsrc/etc/inc/plugins.inc.d ipsec.inc

ipsec: use safe config iteration for VIP lookup
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+1-1src/etc/inc/plugins.inc.d/ipsec.inc
+1-11 files

OPNSense/core c920501Mk git.mk

make: improve rebase to auto-abort much like mfc target

(cherry picked from commit 45dc8a3c1fa2e8ca112c2b557e0a35b5027a0925)
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+1-1Mk/git.mk
+1-11 files

pkgng/pkgng 4ca226dlibpkg pkg_jobs.c

jobs: hide jails and secure level restrictions behind HAVE_CHFLAGSAT
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+2-0libpkg/pkg_jobs.c
+2-01 files

OPNSense/core a341678src/www interfaces_ppps_edit.php

interfaces: use safe config iteration in PPP edit page
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+5-11src/www/interfaces_ppps_edit.php
+5-111 files

LLVM/project 9a69fdcllvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vxi1-masks.ll

[LoongArch] Try to avoid casts around logical vector ops on lasx (#163523)

On LASX the type v4i1/v8i1/v16i1 may be legalized to v4i32/v8i16/v16i8,
which is LSX-sized register. In most cases we actually compare or select
LASX-sized registers and mixing the two types creates horrible code.
DeltaFile
+81-522llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
+127-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+208-5222 files

OPNSense/core 412f86csrc/www firewall_rules.php

firewall: use safe iteration in old rule page for schedule lookup
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+5-10src/www/firewall_rules.php
+5-101 files

NetBSD/pkgsrc 99YuWm0www/nginx-devel distinfo Makefile

   nginx-devel: updated to 1.29.6

   Changes with nginx 1.29.6                                        10 Mar 2026

   *) Feature: session affinity support; the "sticky" directive in the
      "upstream" block of the "http" module; the "server" directive
      supports the "route" and "drain" parameters.

   *) Change: now nginx limits the size and rate of QUIC stateless reset
      packets.

   *) Bugfix: receiving a QUIC packet by a wrong worker process could cause
      the connection to terminate.

   *) Bugfix: "[crit] cache file ... contains invalid header" messages
      might appear in logs when sending a cached HTTP/2 response.

   *) Bugfix: proxying to scgi backends might not work when using chunked
      transfer encoding and the "scgi_request_buffering" directive.

    [9 lines not shown]
VersionDeltaFile
1.132+4-4www/nginx-devel/distinfo
1.167+2-2www/nginx-devel/Makefile
+6-62 files