[lldb] Modify test binaries that link against LLDB to use LLVM dylib (#207290)
When LLVM_LINK_LLVM_DYLIB is enabled and we build LLDB.framework, tests
that link against LLDB.framework will fail to load the LLVM dylib
because of a missing rpath.
clang: Remove useFP16ConversionIntrinsics target option (#207212)
Follow up to #174494. Remove the remnants of the control to
use llvm.convert.to.fp16/llvm.convert.from.fp16. Prefer
directly using the IR half type.
I did the first 80% of this a long time ago, and AI finished
the last bit and handled the recent rebases and test updates.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[libc++] Install missing dependencies for running benchmarks on macOS (#207810)
The macOS self-hosted runners don't come with Ninja and CMake installed
out of the box, so we need to install them with Homebrew.
mvc: add file type to forms, including required javascript initialisation code.
File type input serializes offered payload in base64 and returns both the field and the filename of the offered file.
This easy to use wrapper can be used to upload files of reasonable size (a couple of megabytes max) via either a select file or drag and drop option.
Collected output exists of the offered <id> combined with a field named <id>__name which contains the offered filename
AMDGPU: Respect target assembler directives over command line
Mutate the global subtarget, using essentially the same code that ARM uses.
The main difference is we need to mutate the actual CPU name in addition
to just flipping the feature bits, so this needs a new setter in
MCSubtargetInfo. Liberalize the triple check so that after #206480,
old assembly files to not break on new assembler invocations.
For some reason we have 2 different assembler directives that indicate the
target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal. Previously,
we would take the target from the command line and then error if the directive
did not exactly match. In order to move away from depending on the xnack and
sramecc subtarget features, start treating the directives as a change of target,
similar to ARM's .cpu and .arch directives.
Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc. Ideally
we would introduce new independent directives for these.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
[lldb] Fix TestFrameProviderCircularDependency.py on Arm (#207804)
After #206987 this test started passing on Windows and 32-bit Linux on
Arm. Remove the expected failure annotation to fix lldb-arm-ubuntu
buildbot.
[AMDGPU] Precommit for pulling NUW large buffer offsets into SOFFSET
This commit adds tests with larger constant offsets [being added to
VGPRs] in raw.buffer.* instructions to show the movement of such
offsets to SOFFSET after rounding in a future commit if this won't
cause errors because of overflow.
This also necessitated adding gfx1250 tests (to show the different
offset sizes) and moving tests that ctalled "export" into a new file
so that the gfx1250 (which doesn't support that instruction) doesn't
trip ot those tests.
This also adds a few global-isel specific tests for handling
`or disjoint` like an add we can't just stick -global-isel in the
normal buffer intrinsic tests.
AI usage disclosure: AI wrote these, I skimmed them.
Co-Authored-By: Codex <codex at openai.com>
[AMDGPU][test] Use mir test for regalloc issue (#197363)
Use the newly introduced split-from flag to produce a more robust test
case for the hoistSpillInsideBB live-range update issue.
NFC
[X86] combineToHorizontalAddSub - use PostShuffleMask to determine undemanded subvectors (#207789)
For cases where the middle-end has created a 256-bit HADD/SUB pattern
with unused upper 128-bit subvectors, use the PostShuffleMask undefined
ranges to remove any unused 128-bit HADD/SUB ops.
[flang][cuda] Recognize on_device() by its Fortran leaf name in CUFFunctionRewrite (#207298)
CUFFunctionRewrite folds on_device() to a compile-time constant: true
inside a gpu.module (device), false on the host. Match on the callee's
Fortran leaf name, recovered independently of the external name-mangling
convention and of where the pass runs in the pipeline.
[LowerBufferFatPointers] Correctly handle alignment modes (#134329)
Previously, AMDGPULowerBufferFatPointers would emit unaligned buffer
loads/stores, even when such unaligned accesses were disabled (that is,
on non-HSA platforms).
In addition, the lowering did not respect the newly-added
amdgpu.buffer.oob.mode module flag, which now must be enabled in order
to vectorize unaligned loads from buffers.
This commit fixes both issues and adds tests.
ValueTracking: Improve frexp known range from dominating conditions (#206927)
Try to restrict the known range of the exponent result of llvm.frexp
based on dominating conditions. Identify comparisons that imply the
incoming value cannot introduce an overflow in a downstream ldexp
use. This pattern appears in the implementation of some complex math
functions and allows finite only math to prune out more edge case
paths.
One attributor test for ldexp regresses due to the switch from
computeKnownBits to computeConstantRange. computeConstantRange
does not try to handle non-splat vector constants for the binary
operators.
As a side effect, this also improves knowing that ldexp can't
introduce overflow for the 0 case.
[docs][AMDGPU] Document amdgpu.buffer.oob.mode more, especially on fat pointers (#134734)
This commit expands the documentation of the amdgpu.buffer.oob.mode so
that fat buffer pointer users are more aware of its effects.
