OPNSense/core e9877b8src/opnsense/mvc/app/models/OPNsense/Kea KeaDhcpv6.php KeaDhcpv4.php

Use isSet() since 0 is allowed
DeltaFile
+2-2src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv6.php
+2-2src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.php
+4-42 files

LLVM/project c2d51a2llvm/lib/Transforms/Vectorize VPlanAnalysis.cpp VPlan.h

[VPlan] Add Type* and getType() to VPSymbolicValue (NFC) (#195183)

Add a Type* field to VPSymbolicValue, along with a getType() methods to
query the stored scalar type.

This makes it easier to retrieve the type of various symbolic values,
and also simplifies VPTypeAnalysis construction.

PR: https://github.com/llvm/llvm-project/pull/195183
DeltaFile
+3-23llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+16-8llvm/lib/Transforms/Vectorize/VPlan.h
+7-4llvm/lib/Transforms/Vectorize/VPlan.cpp
+7-1llvm/lib/Transforms/Vectorize/VPlanValue.h
+2-6llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
+4-3llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+39-455 files not shown
+45-5011 files

LLVM/project 0b53aa8llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

save some knownbits computations

Co-authored-by: Copilot <copilot at github.com>
DeltaFile
+9-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+9-51 files

LLVM/project 9bb1933clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Add lowering for amdgcn readlane readfirstlane builtins
DeltaFile
+16-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+13-2clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+29-22 files

LLVM/project 215bd25clang/lib/StaticAnalyzer/Core ExprEngine.cpp

[analyzer] Clean up evalBind, fix bad logic (#196313)

This commit refactors `ExprEngine::evalBind` to eliminate the use of a
`NodeBuilder` and fix incorrect logic that was apparently introduced
because the `NodeBuilder` had obfuscated the underlying set operations.

In the special case when the engine is binding to an `Unknown` or
`Undefined` memory location, with the old code on each execution path
_either_ only the `check::Bind` checkers _or_ only the pointer escape
checkers were invoked. This commit ensures that on each execution path
_both_ the `check::Bind` checkers _and then_ the pointer escape checkers
get a chance to activate.

I'm pretty sure that the bad logic did not cause incorrect behavior of
the analyzer, because there are no `checkBind` checkers that generate
non-sink transitions when the location is `Unknown` or `Undefined`.

I also added an assertion that the location argument of `evalBind`
cannot be a `NonLoc`, because this is a common sense precondition, seems
to be actually true and makes it easier to reason about the behavior of
this function.
DeltaFile
+19-33clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
+19-331 files

LLVM/project 26cae62lldb/source/Host/common NativeProcessProtocol.cpp, lldb/source/Plugins/Process/FreeBSD NativeProcessFreeBSD.cpp

 Reapply "[lldb] Do not refcount breakpoints in lldb-server" (#195858)  (#196891)

This reapplies #195858 with a fix for 32-bit arm (and generally, any
architecture that uses software single-stepping). The problem was that
the temporary breakpoints used for single-stepping were interfering with
the breakpoints set by the client.

The fix is to check for existing breakpoints before setting the
temporary ones. To achieve this, I've separated the notion of "next PC
candidates for a thread" from "step breakpoints we've actually set".

The freebsd code had some software single stepping code, but:
- this was [introduced](https://reviews.llvm.org/D95802) for mips64
support, which was
[removed](https://github.com/llvm/llvm-project/pull/179582) earlier this
year
- AFAICT, this never worked since the original patch only checked
`m_threads_stepping_with_breakpoint`, but never set it to anything.


    [18 lines not shown]
DeltaFile
+19-21lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.cpp
+1-16lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
+4-10lldb/source/Host/common/NativeProcessProtocol.cpp
+11-2lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
+6-7lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+5-2lldb/source/Plugins/Process/Utility/NativeProcessSoftwareSingleStep.h
+46-582 files not shown
+51-618 files

LLVM/project b1fe10dllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

1
DeltaFile
+0-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+0-11 files

LLVM/project 53b4b27llvm/test/CodeGen/X86 fold-int-pow2-with-fmul-or-fdiv.ll

update test
DeltaFile
+16-53llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+16-531 files

LLVM/project 6526bb7llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 fold-int-pow2-with-fmul-or-fdiv.ll

[DAGCombiner] Use KnownBits in `combineFMulOrFDivWithIntPow2`
DeltaFile
+191-0llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+2-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+193-32 files

LLVM/project f7f911flibc/include CMakeLists.txt, libc/include/llvm-libc-types in_port_t.h CMakeLists.txt

[libc] Add some types to netinet/in.h (#196932)

Not including more types because I need to fix in_addr definition first.

This exposes stdint macros and types through the header, but POSIX
permits that behavior (and explicitly requires that we define uint8_t
and uint32_t).

No test as this is just adding a typedef, and I don't *think* we have
tests for that, but I can add a "check that type is defined" test if
that is desirable.
DeltaFile
+16-0libc/include/llvm-libc-types/in_port_t.h
+4-1libc/include/CMakeLists.txt
+4-1libc/include/netinet/in.yaml
+1-0libc/include/llvm-libc-types/CMakeLists.txt
+25-24 files

LLVM/project 694fc0ellvm/test/CodeGen/AArch64/GlobalISel select-intrinsic-aarch64-sdiv.mir preselect-process-phis.mir

Fix tests
DeltaFile
+4-22llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-sdiv.mir
+2-4llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
+6-262 files

OPNSense/ports ccf3023opnsense/dnsmasq Makefile

opnsense/dnsmasq: fix downgrade issue
DeltaFile
+2-0opnsense/dnsmasq/Makefile
+2-01 files

NetBSD/pkgsrc YrYRP8olang/py-ast-serialize distinfo cargo-depends.mk, lang/py-ast-serialize/patches patch-Cargo.toml

   py-ast-serialize: added version 0.3.0

   This is a fast Python extension for parsing Python files and serializing the
   AST using the native binary format used by mypy. This will eventually replace
   the current mypy parser, which uses the Python stdlib ast module for parsing.
VersionDeltaFile
1.1+258-0lang/py-ast-serialize/distinfo
1.1+85-0lang/py-ast-serialize/cargo-depends.mk
1.1+22-0lang/py-ast-serialize/Makefile
1.1+21-0lang/py-ast-serialize/patches/patch-Cargo.toml
1.1+11-0lang/py-ast-serialize/PLIST
1.1+3-0lang/py-ast-serialize/DESCR
+400-01 files not shown
+402-17 files

LLVM/project 65a206fllvm/test/CodeGen/X86 fold-int-pow2-with-fmul-or-fdiv.ll

[X86] fold-int-pow2-with-fmul-or-fdiv.ll - regenerate with (V)PADD asm comments (#197137)

Reduce diff in #197097
DeltaFile
+11-11llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+11-111 files

OpenBSD/ports ExtkB2tlang/php/8.3 Makefile

   missed bump
VersionDeltaFile
1.58+1-0lang/php/8.3/Makefile
+1-01 files

LLVM/project 8393227mlir/lib/Transforms Mem2Reg.cpp, mlir/test/Transforms mem2reg.mlir

fix handling of region
DeltaFile
+23-0mlir/test/Transforms/mem2reg.mlir
+3-3mlir/lib/Transforms/Mem2Reg.cpp
+26-32 files

OpenBSD/ports vhwMMbFgames/vcmi/patches patch-src_CMakeLists_txt

   vcmi: fix previous: this patch doesn't belong to this port
VersionDeltaFile
1.2+0-0games/vcmi/patches/patch-src_CMakeLists_txt
+0-01 files

LLVM/project e08e48dllvm/test/CodeGen/AArch64/GlobalISel select-intrinsic-aarch64-sdiv.mir, llvm/test/TableGen/GlobalISelEmitter MatchTableOptimizerRecursion.td

[GlobalISel] Recursively Optimise MatchTable Matchers

The core of this change is the additional call to `Matcher::optimize()` in the `optimizeRules` function,
which enables the match table optimization logic to recurse on the children of every GroupMatcher, forming
additional groups (which hoist more common predicates into a shared group).

To enable that, I had to update the `getFirstConditionAsRootType` implementation to support `GroupMatcher`.
I also included a small refactoring of the match table optimization pipeline that was identical between the
GlobalISel and GlobalISelCombiner emitters.

The results of this change are up to a 25% size reduction for GlobalISel match tables.
There is a tiny increase (a few bytes) in a combiner table because we now create new groups
(which need up to 3 additional opcodes because of the new `Try` and `Reject` required) to hoist one predicate for only 2 rules, which
result in a small net negative change (one or two more ops).

I used a small bash script to compare all relevant files, this is the before/after:
```
FILE                                          OLD      NEW    DIFF%    SAME?
----                                      -------  -------    -----    -----

    [8 lines not shown]
DeltaFile
+204-0llvm/test/TableGen/GlobalISelEmitter/MatchTableOptimizerRecursion.td
+67-19llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
+5-34llvm/utils/TableGen/GlobalISelEmitter.cpp
+1-34llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
+12-7llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+18-0llvm/test/CodeGen/AArch64/GlobalISel/select-intrinsic-aarch64-sdiv.mir
+307-941 files not shown
+310-947 files

OpenBSD/src EVVkeGeusr.bin/tmux server-client.c

   Turn off the "is this a paste" guessing if the terminal supports bracket
   pasting instead, GitHub issue 5031.
VersionDeltaFile
1.455+3-1usr.bin/tmux/server-client.c
+3-11 files

NetBSD/pkgsrc-wip 10308e1minio TODO

minio: Add reference to CVE-2026-42600
DeltaFile
+1-1minio/TODO
+1-11 files

LLVM/project d176a1ellvm/lib/CodeGen/GlobalISel InstructionSelect.cpp, llvm/lib/Target/AArch64/GISel AArch64InstructionSelector.cpp

[GlobalISel][AMDGPU][AArch64] Fix GlobalISel copy propagation (#188781)

Disallow propagation of sub-registers after GlobalISel, as the current
code is blindly dropping any sub-register information. This also fixes
bugs in AArch64 and AMDGPU back-end that rely on the incorrect behavior
and would fail with the fix:

* Update `selectG_UNMERGE_VALUES` in AMDGPU so instead of generating
`hi16` for SGPR it shifts higher bits into the destination register
using `lshr`.
* Prevent AArch64 back-end from generating spurious `sub_32:gpr32all`
when selecting copy.
* Test changes: `fpto[s/u]i-sat-vector.ll`: The correct number of
conversions is now generated as higher 16-bits are handled correctly;
however, it introduces `lshr` instructions. This should be resolved in
#188287 by enabling `s_cvt_hi_*`.
DeltaFile
+144-55llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+128-51llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
+9-7llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+10-2llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+7-0llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+298-1155 files

OpenBSD/ports oAicRaBgeo/py-geojson Makefile, geo/py-geojson/patches patch-setup_py

   recognise python 3.14
VersionDeltaFile
1.1+14-0geo/py-geojson/patches/patch-setup_py
1.5+1-1geo/py-geojson/Makefile
+15-12 files

OpenBSD/ports yMaeQhZsysutils/opentofu distinfo Makefile

   Update to opentofu-1.11.7.
VersionDeltaFile
1.40+2-2sysutils/opentofu/distinfo
1.40+1-1sysutils/opentofu/Makefile
+3-32 files

OpenBSD/ports dCIPkEneditors/libreoffice Makefile

   don't hardcode python3.13, use MODPY_WANTLIB
VersionDeltaFile
1.343+1-1editors/libreoffice/Makefile
+1-11 files

OpenBSD/ports ptG0bcSinputmethods/ibus-typing-booster distinfo Makefile, inputmethods/ibus-typing-booster/pkg PLIST

   Update to ibus-typing-booster-2.30.8.
VersionDeltaFile
1.95+2-2inputmethods/ibus-typing-booster/distinfo
1.104+1-1inputmethods/ibus-typing-booster/Makefile
1.32+1-0inputmethods/ibus-typing-booster/pkg/PLIST
+4-33 files

FreeBSD/src bcecad2sys/riscv/iommu iommu.c iommu_pmap.c

riscv: IOMMU support

Support for RISC-V IOMMU spec v1.0.1 (ratified)
  https://github.com/riscv-non-isa/riscv-iommu

Supports translation for PCI devices only.
Supports 1 or 2-level device-directory-table (DDT).
Supports SV39 and SV48 virtual memory system (on per-device basis).
Supports both "standard" and "extended" device-context (DC) structure.
Supports "bypass" mode to disable translation for a particular device.
Supports WSI (Wire-Signalled Interrupts) only.

This includes both PCI-bus and FDT attachment drivers.

Note in case of PCI-bus attachment, interrupts are not available. In this
case no error report is provided in case of translation fault. Otherwise
interrupts are not needed.

Differential Revision:  https://reviews.freebsd.org/D55922
DeltaFile
+1,351-0sys/riscv/iommu/iommu.c
+629-0sys/riscv/iommu/iommu_pmap.c
+505-0sys/riscv/iommu/iommu_frontend.c
+359-0sys/riscv/iommu/iommu.h
+172-0sys/riscv/iommu/iommu_pci.c
+147-0sys/riscv/iommu/iommu_if.m
+3,163-07 files not shown
+3,418-013 files

OpenBSD/ports Qynh3ixx11/gnome/characters distinfo Makefile, x11/gnome/characters/pkg PLIST

   Update to gnome-characters-50.0.
VersionDeltaFile
1.25+2-2x11/gnome/characters/distinfo
1.25+2-1x11/gnome/characters/pkg/PLIST
1.45+1-1x11/gnome/characters/Makefile
+5-43 files

LLVM/project 9346acdllvm/lib/TableGen TGParser.cpp, llvm/test/TableGen submulticlass-leteq.td submulticlass-typecheck.td

[TableGen] Add submulticlass typechecking to template arg values (#197128)

Some typechecking was missing when parsing a submulticlass reference.
Add the CheckTemplateArgValues call in ParseSubMultiClassReference.

Resolves https://github.com/llvm/llvm-project/issues/84910.
DeltaFile
+21-0llvm/test/TableGen/submulticlass-leteq.td
+12-0llvm/test/TableGen/submulticlass-typecheck.td
+5-0llvm/lib/TableGen/TGParser.cpp
+38-03 files

LLVM/project 2ec483dclang/test/CodeGenOpenCL builtins-amdgcn-gfx1250.cl, llvm/include/llvm/IR IntrinsicsAMDGPU.td

[AMDGPU] Update permlane_bcast/down/up/xor intrinsic to support more types
DeltaFile
+2,848-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.gfx1250.ll
+25-8llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-12llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+9-9clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250.cl
+16-2llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+8-6llvm/lib/Target/AMDGPU/VOP3Instructions.td
+2,918-373 files not shown
+2,938-429 files

LLVM/project bfe5d5bclang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeSafety.h, clang/include/clang/Basic DiagnosticSemaKinds.td

[LifetimeSafety] Diagnose invalidated-field (#196680)

Teach lifetime safety invalidation diagnostics to handle origins that
escape through fields before the referenced object is invalidated.
Previously they were skipped.

Partially addresses https://github.com/llvm/llvm-project/issues/195706
DeltaFile
+60-0clang/test/Sema/warn-lifetime-safety-invalidations.cpp
+32-0clang/lib/Sema/SemaLifetimeSafety.h
+20-1clang/lib/Analysis/LifetimeSafety/Checker.cpp
+6-0clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
+4-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+122-15 files