www/freenginx-acme-module: Align CPE_PRODUCT with the NVD naming scheme
Same change as in www/nginx-acme, both ports build the same upstream
module.
Sponsored by: Netzkommune GmbH
www/nginx-acme: Align CPE_PRODUCT with the NVD naming scheme
The NVD has no dictionary entry for this module yet, so the name is a
prediction. Every F5 product in the dictionary spells its name with
underscores, from nginx_open_source to nginx_modsecurity_waf, so
nginx_acme is the form the entry will most likely take.
Sponsored by: Netzkommune GmbH
www/nginx-devel: Switch CPE_PRODUCT to nginx_open_source
The NVD files current nginx vulnerabilities under f5:nginx_open_source
rather than f5:nginx.
Sponsored by: Netzkommune GmbH
www/nginx: Switch CPE_PRODUCT to nginx_open_source
The NVD changed the product name it files nginx vulnerabilities under.
All 26 advisories published since February 2024 use f5:nginx_open_source,
while f5:nginx has received a single one in that time, CVE-2025-23419.
The two sets of CVE identifiers do not overlap at all, so the old name
no longer matches current advisories.
Sponsored by: Netzkommune GmbH
gobgp: Update to 4.11.0
Changelog
53ceb78 GoBGP 4.11.0
e01141a server: prepare peer state before advertising initial routes
d234c86 test: rename the route server policy scenarios to ExportPolicy
632031d test: remove duplicated route server policy scenarios
1c501ef test: use a soft reset out in the route server policy update scenarios
10d3f16 server: send the peer description in WatchEvent peer events
07af837 table: count destinations in the Adj-RIB-In table info
4b289a8 server: compare the AS too when matching a path to its source peer
1955816 ci: do not install linux-modules-extra on kernels that do not have it
6afb03a table: use the router ID when a reflected route has no cluster ID
f22b5dd table: look at every segment for an ASN as-path pattern
30786de packet/bgp: reject AS 0 in the path and aggregator attributes
9b86c50 server: check the label chunk from zebra before using it
bb09f17 packet/bgp: reject an EVPN MAC/IP route with a MAC length other than 48
3e7e231 zebra, server: do not wait forever for zebra to answer
a6798ec security: treat zebra as trusted
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[SPARC] Accept rN register names in getRegisterByName (#237528)
Accept r0-r31 as names for the integer registers in llvm.read_register
and llvm.write_register, matching the %rN syntax of the assembler.
This completes #212838, which was reverted because reading %r31/%i7 in
a leaf procedure produced a use of an undefined physical register once
leaf remapping turned it into %o7. That is fixed by #236654, which adds
live-ins for reserved registers remapped in leaf procedures. The %
prefix
and the sp/fp aliases from #212838 have since been added by #234875.
Also run the test with -verify-machineinstrs, which catches that failure
without an expensive checks build.
Co-authored-by: Kirill A. Korinsky <kirill at korins.ky>
www/nginx-module-passenger: Add CPE information
Passenger is listed in the NVD as phusion:passenger with 456 dictionary
entries. The port name does not match the upstream product name, so
both CPE_VENDOR and CPE_PRODUCT need to be set explicitly.
Sponsored by: Netzkommune GmbH
net-mgmt/semaphore: Add CPE information
The NVD lists this software as ansible-semaphore:ansible_semaphore with
136 dictionary entries, so the port can be matched against advisories
once they appear. The cpe.mk defaults would have produced
semaphore:semaphore, which does not exist.
Sponsored by: Netzkommune GmbH
[SelectionDAG] Don't crash after an error in a callbr's asm
When a callbr's asm has an error, such as a constraint it can't satisfy,
visitInlineAsm() reports it and returns before creating the INLINEASM_BR.
But the callbr's block still got edges to the indirect targets, which
BranchFolding rejects since nothing branches there, and a landing pad in
an indirect target looked for the registers that the INLINEASM_BR would
have defined.
Don't add the edges to the indirect targets, and make a landing pad's
value poison, since nothing reaches it.
Fixes #98379 and #172657. Part of #173609, whose asm is still rejected,
since LLVM picks the "k" alternative of "+kr", which needs AVX-512.
Assisted-by: Claude Opus 5.5
[SelectionDAG] Report an error for a callbr's indirect register output
An indirect output with a register constraint, e.g. "=*r", is stored to its
pointer after the asm. But a callbr's asm can branch to an indirect target
before then, so the store was silently skipped on the indirect paths. Clang
emits such an output for a _Complex lvalue with a register constraint:
_Complex float c;
asm goto("" : "=r"(c) : : : l);
Report an error instead. A callbr without indirect targets has no such
path, so it's still allowed.
Assisted-by: Claude Opus 5.5
Replay each output's read in the indirect targets
The indirect targets re-parsed the constraints, recomputed each output's
registers and types, and paired them with the recorded registers in order,
so they were right only if both computations agreed. Record each output's
operand info and registers when lowering the callbr instead, and read them
in the indirect targets with the same code as visitInlineAsm().
This also marks a flag output's register (NZCV on AArch64, CC on SystemZ)
live into the indirect targets, as a register output's already was. And the
indirect targets no longer create virtual registers they don't use, which
renumbers some in the AArch64 test.
Assisted-by: Claude Opus 5.5
Move the asm error handling to its own PR
This PR now fixes only valid asm whose outputs crash the indirect targets.
Lowering a callbr whose asm has an error, which crashes after reporting
it, moves to its own PR stacked on this one.
Assisted-by: Claude Opus 5.5
[SelectionDAG] Read callbr outputs from the INLINEASM_BR's registers
An indirect target of a callbr found the registers holding the asm's
outputs by walking back from the callbr's exported value through COPYs to
the INLINEASM_BR, and asserted that the chain held nothing else ("start of
copy chain MUST be COPY"). An output whose type differs from its register's,
such as a float in a general-purpose register, is converted, e.g. with
MOVDI2SSrr on x86, so the assertion fired. And the target didn't convert the
output to its result type, as visitInlineAsm() does.
After an error in the asm, nothing defines the exported value, so the walk
crashed, and the callbr block kept edges to the indirect targets with no
INLINEASM_BR to branch there, which later passes reject.
Record the registers that the INLINEASM_BR defines its outputs in when
lowering the callbr, and read the outputs from them in the indirect target,
converting each to its result type as visitInlineAsm() does. After an error,
give the indirect targets undefined outputs and no edges from the callbr.
Fixes #98379, #112914, #143795, #170100, #172657, and #173609.
Remove the stale FollowCopyChain comment and unrelated comment changes
The comment that explained FollowCopyChain's walk was left above
visitCallBrLandingPad() when the walk was removed. Also put the BTI comment
in visitCallBr() back as it was, and fix a double space.
Assisted-by: Claude Opus 5.5
Test more outputs that the indirect targets convert
Add the RISC-V shape of #143795, where an i32 output is sign-extended on
each path, a float in a specific physical register on x86, a double in a
pair of registers on i686, and a flag output on AArch64, whose NZCV is now
live into the indirect target. Also check that a callbr with direct and
indirect register outputs now only reports the error.
Assisted-by: Claude Opus 5.5
[MachineCSE] Don't reuse an instruction after an INLINEASM_BR elsewhere
An INLINEASM_BR can branch to its indirect targets before the instructions
after it in its block run, but MachineCSE let those instructions replace
ones in any block that their block dominates, including the indirect
targets. E.g., when both paths out of a callbr sign-extend its output, the
indirect target reused the extension on the path to the default target and
read a register that its own path never wrote.
Reuse an instruction after an INLINEASM_BR only in its own block. MachineSink
already refuses to sink into an indirect target for the same reason.
Assisted-by: Claude Opus 5.5
[InlineAsmPrepare] Rewrite callbr result uses that indirect dests reach
updateSSA() left a use of a callbr's result alone if the callbr's default
dest dominated it. But an indirect dest can reach the default dest too,
e.g. when they're the same block or when the indirect dest branches to it,
so such a use still read the callbr's result on the indirect path.
SelectionDAG copies that result to a virtual register after the
INLINEASM_BR, on the path to the default dest only, so the indirect path
read a register that it never defined.
Leave a use alone only if the edge to the default dest dominates it, and
don't make the result the value at the end of the default dest, so that
SSAUpdater merges it with the landing pad's value there.
Assisted-by: Claude Opus 5.5
