[MLIR][GPU][NVVM] Add verify-target-arch option to nvvm-attach-target pass (#176774)
This change adds the `verify-target-arch` option to the
`nvvm-attach-target` to control the `verifyTarget` parameter in the
attached `NVVMTargetAttr` which is used to enable/disable the
verification of the target architecture with respect to the NVVM Ops.
[X86] Add BZHI zero mask / constant fold test coverage (#177136)
We need known bits support before we can start adding simplify demanded bits handling to address #176974
Pulled from the instcombine equivalent tests
InstCombine: Implement SimplifyDemandedFPClass for fma
This can't do much filtering on the sources, except for nans.
We can also attempt to introduce ninf/nnan.
ValueTracking: Improve nan tracking for fma square special case
In the square multiply case, we can infer if the add of opposite
sign infinities can occur.
ValueTracking: Improve handling for fma/fmuladd
The handling for fma was very basic and only handled the
repeated input case. Re-use the fmul and fadd handling for more
accurate sign bit and nan handling.
re-import wycheproof-testvectors as plain wycheproof, ok sthen
When we added wycheproof-testvectors the name reflected that it was a
small subdirectory of a giant Java testing contraption. There's a long
story whose short version is that Wycheproof has been maintained as
part of the C2SP for a while now, Java was replaced with some minimal
Go and the focus is on test cases, not a full testing framework.
This change simplifies the Makefile slightly by copying the entire
generated tarball with the exception of .github. This way the port
can be used as a go module in the future.
Update to latest main branch commit which adds more ML-KEM tests and
improved ECDSA tests, both via/from BoringSSL.
Reapply "[AMDGPU] Fix excessive stack usage in SIInsertWaitcnts::run (#134835)" (#174215) (#177338)
This reverts commit 0dd03598dca91c93c74b94a714c38a4ffad0ed1c.
Apparently the stack usage on Windows was still large enough to cause
problems for some DirectX games.
[AMDGPU] Add scheduling stage to rewrite MFMA from VGPR to AGPR (#170335)
This pull request is an update of [Jeff Byrne's
PR](https://github.com/llvm/llvm-project/pull/149367). Additionally, all
unresolved comments from the original PR have been addressed.
Changes to make the MachineScheduler dependent upon
MachineBlockFrequencyInfo have been pulled out into a new PR,
[176172](https://github.com/llvm/llvm-project/pull/176172), upon which
this PR now depends.
---------
Co-authored-by: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
[CIR] Add cir.libc.memcpy Op
The operation is a 1:1 mapping to libc's memcpy.
NOTE: This patch merely upstreams code from
* https://github.com/llvm/clangir.
This Op was originally implemented by Vinicius Couto Espindola. Further
modification were made by other ClangIR contributors.
co-authored-by: Vinicius Couto Espindola <vini.couto.e at gmail.com>
filter: replace with !empty isset during legacy rule dump
This is particularly relevant for fresh installs, where the default
config sets <any/> keys. This makes sure those default rules are
able to be migrated properly.
(cherry picked from commit ba8194deddf7ce79856d5c647db38171a7c56769)
filter: replace with !empty isset during legacy rule dump
This is particularly relevant for fresh installs, where the default
config sets <any/> keys. This makes sure those default rules are
able to be migrated properly.
