[RegAlloc] Notify every eviction advisor when a register is unassigned.
MLEvictAdvisor embeds a DefaultEvictionAdvisor, and the embedded advisor
was replacing the matrix's only unassign listener. The outer cache could
then reuse a failed canReassign after a register became free.
Co-authored-by: Cursor <cursoragent at cursor.com>
[SimplifyCFG] Fix profiles in sinkLastInstruction (#234840)
We need to mark branch weights on sunk select instructions explicitly
unknown given we cannot infer them in the general case and pulling out
specific cases will be difficult.
Found while doing a bootstrapping build of LLVM with -mllvm
-enable-profcheck-in-pipeline.
LoongArch: Stop adding kill flags in LoongArchPreRAExpandPseudo (#235081)
Continue purging kill flags on virtual registers.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[libc][math] Implement double precision sinh correctly rounded for all rounding modes.
- Extend even/odd polynomial evalutions of exp(x) +- exp(-x) from single precision to
double-double and 128-bit fixed point.
- Optimize range reduction using the trict from previous exp implementation, combining
with the new fp-bitwise operations, and reapply it to exp and exp2.
Assisted-by: Gemini for analysis and refactoring.
zio_crypt_os: add Linux kernel crypto API backend
Implement the zio_crypt_os platform interface using the Linux kernel
crypto API. This provides hardware-accelerated encryption on platforms
where the ICP has none, most notably ARM.
The kernel exports these symbols GPL-only by default, so configure
selects this backend only when the kernel exports them with a license
compatible with the module's and the AEAD and hash cores (CRYPTO_AEAD2
and CRYPTO_HASH2) are enabled. A builtin build is not subject to export
licensing, but then needs those cores to be builtin as well. Otherwise
the ICP backend is used. Only the selected backend is compiled.
The backend looks up its algorithms by name at key load time, so it
declares a soft dependency on the modules providing them for initrd
builders to include.
Finally, since crypto accelerators may DMA write to keydata and
hmac_keydata, dsl_crypto_key_sync() will now put these on the heap
[6 lines not shown]
[CIR] Replace coroutine unit attrs on FuncOp with a CoroutineKind enum attr (#234817)
Follow-up to #203802. `cir.func` used two independent unit attributes,
`coroutine` and`flattened_coroutine`, to track whether a function is a
coroutine and whether its body has been flattened. Nothing prevented
both from being set at once, and `FlattenCFG` had to clear one and set
the other by hand. Replace them with a single optional `coroutine_kind`
attribute backed by a new `CoroutineKind` enum (`coroutine`,
`flattened_coroutine`).
[SelectionDAG] Don't always use abs(sub) when expanding abdu (#235043)
`TargetLowering::expandABD` expands `abd(a, b)` to `abs(sub(a, b))` when
`willNotOverflowSub` says the sub can't overflow. For `abdu` without
known
non-negative operands, this checks for unsigned overflow, which only
proves
`a >= b (unsigned)`, so `abdu(a, b) == sub(a, b)`. adding abs around it
is wrong, when the
difference is greater than INT_MAX, e.g. `abdu(lshr(x, 1), or(y,
INT_MIN))`.
Keep abs(sub) for the signed check (abds, or abdu with non-negative
operands) and use just sub when abdu and `a >= b`.
Fixes #233087.
PowerPC: Stop adding kill flags when promoting instructions to 64-bit (#235082)
Continue purging kill flags from virtual register cases
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[Propeller] Support basic block path cloning with PropellerMatchBBID (#235080)
Previously, BasicBlockPathCloning was disabled when
basic-block-section-match-infer was enabled. When matching by BBID
(-propeller-match-bbid), run BasicBlockPathCloning before
BasicBlockMatchingAndInference and match blocks using their full
UniqueBBID (including CloneID). If a cloned block in the profile does
not exist in the MachineFunction (e.g., when its cloning path is
rejected), fall back to the original block ({BaseID, 0}) so its block
and edge weights are aggregated onto the original block and edges.
net-p2p/jigdo: Attempt to fix functionality issues
* jigdo-file (in configfile.cc) crashes because there is no check
whether text is empty.
* the iso file is not generated (scan.cc) - the port is built with
--without-libdb. In that configuration, JigdoCache leaves its
checkFiles flag uninitialized.
While here, fix LICENSE and pet port{clippy,fmt,lint}.
PR: 298765
Approved by: osa, vvd (Mentors, implicit)
MFH: 2026Q4
(cherry picked from commit c29ecfc1d192dd9c7504a13f52c8196d762769e2)
net-p2p/jigdo: Attempt to fix functionality issues
* jigdo-file (in configfile.cc) crashes because there is no check
whether text is empty.
* the iso file is not generated (scan.cc) - the port is built with
--without-libdb. In that configuration, JigdoCache leaves its
checkFiles flag uninitialized.
While here, fix LICENSE and pet port{clippy,fmt,lint}.
PR: 298765
Approved by: osa, vvd (Mentors, implicit)
MFH: 2026Q4
[Mips] Add JUMP_TARGET operand types for MIPS and microMIPS (#233566)
evaluateBranch() treated any instruction whose last operand was OPERAND_UNKNOWN or OPERAND_IMMEDIATE as a jump within the current 256 MB-aligned region. This had two problems:
* Instructions with ordinary immediate operands got bogus
symbol/address annotations in the disassembly.
* microMIPS jumps operate within a 128 MB-aligned region, not 256 MB,
so their computed targets were wrong.
Introduce OPERAND_JUMP_TARGET and OPERAND_JUMP_TARGET_MM, set them on
the MIPS and microMIPS jump/call target operands, and compute the target
using the correct region size for each. Only jump instructions now get a
jump-target annotation.
Co-authored-by: Faraz Shahbazker <faraz.shahbazker at mediatek.com>
RuntimeLibcalls: Split __atomic_* into a separate libatomic library (#233571)
The __atomic_* functions are not part of libgcc or the default
compiler-rt builtins. GCC ships them in libatomic, and compiler-rt in
the optional clang_rt.atomic. Every system that uses compiler-rt also lists
libatomic, so the available functions are unchanged.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[RegAlloc] Cache failed canReassign searches
The eviction advisor can ask canReassign repeatedly for the same live
interval. For register classes with long allocation orders, rescanning every
candidate is expensive when the answer remains false.
Cache failed searches that examine more than the configured order-size
threshold. A failure remains valid while registers are assigned because an
assignment cannot make another physical register available. LiveRegMatrix now
notifies the advisor when an interval is unassigned so cached failures whose
slot ranges overlap the freed interval can record the affected physical
register.
On a later query, return the cached failure immediately when no relevant
unassign occurred. Otherwise, check only the freed register and its aliases
that belong to the interval's allocation order. If none are now free, retain
the failure without rescanning the full order.
Index cached intervals in slot-range buckets to limit unassign bookkeeping,
[6 lines not shown]
[RegAlloc] Notify every eviction advisor when a register is unassigned.
MLEvictAdvisor embeds a DefaultEvictionAdvisor, and the embedded advisor
was replacing the matrix's only unassign listener. The outer cache could
then reuse a failed canReassign after a register became free.
Co-authored-by: Cursor <cursoragent at cursor.com>
[RegAlloc] Drop the failed-reassign cache when slot indexes are renumbered.
Bucket keys are distances, and renumberIndexes/packIndexes rewrite those
numbers without changing SlotIndex equality. A later unassign can miss the
entry and leave a stale failure, so drop the cache instead.
Co-authored-by: Cursor <cursoragent at cursor.com>
[RegAlloc] Do not reuse hint-only canReassign failures.
The hint set can grow without an overlapping unassign, so an empty
FreedRegs list is not proof the failure still holds.
Co-authored-by: Cursor <cursoragent at cursor.com>
[CodeGen] Drop dead SlotIndexes before allocation
SlotIndexes keeps the index list entry of an erased instruction and only
clears its instruction pointer. Live range sizes are measured in slot
indexes and greedy ranks ranges by size, so the leftovers inflate some
ranges more than others and reorder allocation, spilling heavily on
register-starved functions.
Add SlotIndexes::compactIndexes() to erase them. Erased entries are
unlinked, so holding an index to one is now a bug; linkedEntry() asserts
on it. The one analysis that did was LiveIntervals, so add
removeUnreferencedIntervals() to retire the intervals responsible.
Off by default behind -greedy-compact-slot-indexes, since it changes
allocation across much of the test suite.
AMDGPU: Reject 16-bit physical register inline asm constraints without true16 (#235063)
Constraints naming 16-bit physical registers such as {v1.l}, {v1.h},
{s1.l} or {a1.l} were accepted on subtargets without true16, which
then hit an assertion in copyPhysReg. Report the constraint as
unallocatable instead.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
WebAssembly: Use reportFatalUsageError for eh option errors (#233031)
Avoid using the deprecated report_fatal_error, and add missing
error test coverage.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[SimplifyCFG] Fix profiles in hoistCommonCodeFromSuccessors (#234833)
We cannot keep branch weights here given the select condition/control
flow condition we're hoisting across might be dependent.
Found in a bootstrapping build of LLVM with -mllvm
-enable-profcheck-in-pipeline.
[SimplifyCFG] Propagate unknown profiles in performValueComparisonIntoPredecessorFolding (#234827)
Otherwise we get profcheck verification failures as the verifier assumes
we just did not handle this case.
This came up in a bootstrapping build of LLVM with -mllvm
-enable-profcheck-in-pipeline.
[IndVars] Synthesize profile information for urem->select folding (#231990)
In these cases we can derive the profile information from the loop trip
count assuming a couple of assumptions are met.
