NetBSD/pkgsrc lwAy0eL — doc TODO

   doc/TODO: box2d 3.2.0 in wip
VersionDeltaFile
1.28252+2-2doc/TODO
+2-21 files

FreeNAS/freenas fce9df3 — src/middlewared/middlewared/api/v27_0_0 filesystem.py, src/middlewared/middlewared/plugins/filesystem_ acl.py

NAS-144928 / 27.0.0 / Read the ACL type of a path from statx (by yocalebo) (#20074)

The TrueNAS kernel reports the ACL type of a file system in
stx_attributes, STATX_ATTR_POSIXACL or STATX_ATTR_NFSV4ACL, from the
flags of the superblock that ZFS keeps current as acltype changes with
no remount. path_get_acltype probed system.posix_acl_access and then
system.nfs4_acl_xdr, two reads that each allocate in the kernel, and
took EOPNOTSUPP for a type. It is now one statx.

StatxAttr gains POSIXACL and NFSV4ACL, so filesystem.stat and
filesystem.listdir list them in attributes, and the v28_0_0 API names
them. A unit test makes a dataset of each acltype, checks the bits,
path_get_acltype and the attributes listed, changes the acltype with no
remount, and checks /proc, which keeps no ACL. It needs a kernel with
the change.

Original PR: https://github.com/truenas/middleware/pull/20073

Co-authored-by: Caleb St. John <30729806+yocalebo at users.noreply.github.com>
DeltaFile
+82-0tests/unit/test_zfs_statx_acltype.py
+12-22src/middlewared/middlewared/utils/filesystem/acl.py
+2-2src/middlewared/middlewared/plugins/filesystem_/acl.py
+3-1src/middlewared/middlewared/api/v27_0_0/filesystem.py
+4-0src/middlewared/middlewared/utils/filesystem/stat_x.py
+103-255 files

LLVM/project 32ed21c — libc/shared/math copysignf80.h, libc/src/__support/math fabsf80.h copysignf80.h

[libc] Make sign functions use the emulated float80 type  (#235073)

adds following functions
- `fabsf80`
- `copysignf80`
DeltaFile
+39-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+33-0libc/src/__support/math/copysignf80.h
+31-0libc/src/__support/math/fabsf80.h
+29-0libc/test/src/math/smoke/CMakeLists.txt
+29-0libc/src/math/generic/copysignf80.cpp
+28-0libc/shared/math/copysignf80.h
+189-027 files not shown
+447-033 files

LLVM/project 85a2e8e — clang/include/clang/AST HLSLResource.h DeclTemplate.h, clang/lib/AST/ByteCode Compiler.h

[clang] Remove forward and friend declarations of non-existent types (NFC) (#236009)

This patch removes forward and friend declarations of classes that are
not defined anywhere in the codebase.

Assisted-by: Antigravity
DeltaFile
+0-6clang/lib/AST/ByteCode/Compiler.h
+0-3clang/include/clang/AST/OpenACCClause.h
+1-2clang/include/clang/AST/Stmt.h
+0-1clang/include/clang/AST/HLSLResource.h
+0-1clang/include/clang/AST/DeclTemplate.h
+0-1clang/include/clang/AST/DeclBase.h
+1-142 files not shown
+1-168 files

LLVM/project 1c4f765 — clang/lib/APINotes APINotesManager.cpp, clang/test/APINotes search-order.m

[clang] Replace PointerUnion::dyn_cast with llvm::dyn_cast_if_present (NFC) (#236007)

PointerUnion::dyn_cast has been soft-deprecated in favor of
llvm::dyn_cast and llvm::dyn_cast_if_present.  This patch replaces
PointerUnion::dyn_cast with llvm::dyn_cast_if_present in
APINotesManager::findAPINotes.

Note that Readers[*Dir] is set to nullptr for the framework directory
when public or private API notes are found.  If a private header is
included from a framework that only provides public API notes, Dir is
not redirected to PrivateDir, and Readers[*Dir] remains null.

This patch also adds a test case to cover that code path.

Assisted-by: Antigravity
DeltaFile
+8-0clang/test/APINotes/Inputs/Frameworks/SomeOtherKit.framework/PrivateHeaders/SomeOtherKit_Private.h
+6-0clang/test/APINotes/search-order.m
+1-1clang/lib/APINotes/APINotesManager.cpp
+15-13 files

LLVM/project 19347b4 — lld/MachO InputFiles.cpp, lld/test/MachO arm64e-input-abi.s

[lld-macho] Reject incompatible arm64e object ABI markers

The CPU subtype of an arm64e object carries a pointer authentication ABI
marker. In a dynamic link, ld64 accepts only objects marked userland ABI
version 0, even on macOS and Mac Catalyst, whose executables are marked
version 1. It names any other marker as another architecture
(arm64e.old, arm64e.v1, arm64e.kernel, arm64e.kernel.v1 or unknown) and,
as with an arm64 object, ignores the file with a warning, or reports an
error with -arch_errors_fatal. This applies to archive members too.

lld linked these objects. Check the marker in the same way. ld64 accepts
unversioned and kernel-ABI objects in static links, so those links are
not checked.

Assisted-by: Claude Code



DeltaFile
+134-0lld/test/MachO/arm64e-input-abi.s
+31-11lld/MachO/InputFiles.cpp
+165-112 files

LLVM/project cbaed61 — lld/MachO InputSection.h Writer.cpp, lld/test/MachO arm64e-tlv-bootstrap.s

[lld-macho] Sign the arm64e TLV bootstrap pointer as ld64 does

The first word of a thread-local variable descriptor is bound to
__tlv_bootstrap, which dyld replaces with a pointer to tlv_get_addr that
TLV accesses call with blraaz. On arm64e, ld64 writes that bind as an
authenticated bind with the IA key and no diversity, although the object
asks for a plain pointer. Do the same.

Assisted-by: Claude Code



DeltaFile
+30-0lld/test/MachO/arm64e-tlv-bootstrap.s
+16-1lld/MachO/InputSection.cpp
+2-1lld/MachO/Writer.cpp
+2-0lld/MachO/InputSection.h
+50-24 files

LLVM/project a410045 — lld/MachO InputSection.h OutputSegment.cpp, lld/MachO/Arch ARM64.cpp

[lld-macho] Call through authenticated stubs on arm64e

ld64 calls dylib functions from arm64e code through __auth_stubs rather
than __stubs. Each stub is four instructions instead of three:

  adrp x17, slot at page
  add  x17, x17, slot at pageoff
  ldr  x16, [x17]
  braa x16, x17

where the slot is in __auth_got and holds a pointer that dyld signs with
the IA key, blended with the slot's address. The raw target is only ever
held in x16 and x17, so a stub never branches through an unauthenticated
pointer loaded from writable memory. Do the same: on arm64e, name the stubs
section __auth_stubs, make stubs 16 bytes, and put stub targets in
__auth_got. Fast ObjC stubs load _objc_msgSend from __auth_got and braa to
it in the same way, as ld64's do; small ones already branch to its stub.

__auth_stubs gets __stubs' place directly after __text. That is not just

    [11 lines not shown]
DeltaFile
+56-14lld/test/MachO/arm64e-stubs.s
+52-0lld/MachO/Arch/ARM64.cpp
+35-0lld/test/MachO/arm64e-auth-stubs-section-order.s
+21-8lld/MachO/SyntheticSections.cpp
+2-0lld/MachO/OutputSegment.cpp
+1-0lld/MachO/InputSection.h
+167-226 files

LLVM/project 27662ed — lld/MachO MapFile.cpp, lld/test/MachO arm64e-map.s

[lld-macho] List arm64e __auth_got entries in the map file

The map file printed the entries of __got but not those of arm64e's
__auth_got, which held the targets of the stubs and the personalities.
Print them in the same way.

Assisted-by: Claude Code



DeltaFile
+36-0lld/test/MachO/arm64e-map.s
+11-6lld/MachO/MapFile.cpp
+47-62 files

LLVM/project 363fcb9 — lld/MachO Writer.cpp InputSection.cpp, lld/test/MachO arm64e-auth-got.s

[lld-macho] Sign arm64e personality pointers through __auth_got

The arm64e unwinder authenticates the personality pointers that it loads
through the GOT, from the personality array in __unwind_info and from a
CIE, against the address of their slot with the IA key. An image with an
unsigned slot crashes on its first throw. Like ld64, put these GOT entries
in __auth_got, whose pointers dyld signs that way. Other GOT references to
the same symbol keep their unsigned __got slot.

Assisted-by: Claude Code


DeltaFile
+140-0lld/test/MachO/arm64e-auth-got.s
+36-1lld/MachO/SyntheticSections.cpp
+21-5lld/MachO/UnwindInfoSection.cpp
+24-0lld/MachO/SyntheticSections.h
+8-2lld/MachO/Writer.cpp
+9-1lld/MachO/InputSection.cpp
+238-92 files not shown
+240-98 files

LLVM/project 1483692 — lld/MachO ICF.cpp, lld/test/MachO arm64e-icf.s

[lld-macho] Keep differently signed arm64e data apart in ICF

Sections that differ only in the signing schema of an authenticated pointer
are not identical. Compare the schemas in ICF. This matters even without
--icf, because __cfstring sections, whose isa pointers arm64e compilers
sign, are always deduplicated.

Assisted-by: Claude Code


DeltaFile
+60-0lld/test/MachO/arm64e-icf.s
+4-0lld/MachO/ICF.cpp
+64-02 files

LLVM/project b02fd28 — lld/MachO Driver.cpp SyntheticSections.cpp, lld/test/MachO arm64e-stubs.s arm64e-chained-fixups-imports.s

[lld-macho] Use ld64's chained fixups for arm64e

Authenticated pointers can only be encoded as chained fixups, so like
ld64, use them for every arm64e output: also below the deployment targets
at which lld switches other architectures to chained fixups, and when
-no_fixup_chains is given, which ld64 ignores with a warning while keeping
__mod_init_func and DYLD_CHAINED_PTR_ARM64E.

Write rebases and binds in ld64's pointer formats, with an 8-byte stride:
DYLD_CHAINED_PTR_ARM64E_USERLAND24 from the deployment targets at which
ld64 switches to it, and DYLD_CHAINED_PTR_ARM64E below them. As ld64 does,
and with its messages, reject rebase targets that the format cannot hold,
including targets below the image base, and images with more than 65535
imports in DYLD_CHAINED_PTR_ARM64E, whose binds have 16-bit ordinals.

Assisted-by: Claude Code


DeltaFile
+146-0lld/test/MachO/arm64e-chained-fixups.s
+70-1lld/MachO/SyntheticSections.cpp
+68-0lld/test/MachO/arm64e-chained-fixups-high8.s
+58-0lld/test/MachO/arm64e-chained-fixups-imports.s
+42-0lld/test/MachO/arm64e-stubs.s
+36-5lld/MachO/Driver.cpp
+420-62 files not shown
+439-128 files

LLVM/project 1ec5938 — llvm/include/llvm/BinaryFormat MachO.h, llvm/include/llvm/Object MachO.h

[llvm-objdump] Decode arm64e chained fixups

llvm-objdump --dyld-info and llvm-otool -dyld_info decoded only the
DYLD_CHAINED_PTR_64 and DYLD_CHAINED_PTR_64_OFFSET formats, and stopped
with "unsupported chained fixup pointer_format" on arm64e images.

Add the dyld_chained_ptr_arm64e_* structs of <mach-o/fixup-chains.h> to
BinaryFormat, and decode DYLD_CHAINED_PTR_ARM64E and
DYLD_CHAINED_PTR_ARM64E_USERLAND24 fixups in MachOChainedFixupEntry: an
8-byte stride, 16- or 24-bit import ordinals, 19-bit signed inline
addends, and rebase targets that are addresses in DYLD_CHAINED_PTR_ARM64E
and offsets from the image in DYLD_CHAINED_PTR_ARM64E_USERLAND24 and in
every authenticated rebase. Authenticated rebases and binds expose their
key, diversity and address diversity, which --dyld-info prints in the
div, addr and key columns that cctools' otool uses for arm64e.

The test builds its images with yaml2obj from the obj2yaml output of
images that ld64 linked from the sources in the test.


    [2 lines not shown]
DeltaFile
+338-0llvm/test/tools/llvm-objdump/MachO/chained-fixups-arm64e.test
+63-19llvm/lib/Object/MachOObjectFile.cpp
+62-0llvm/include/llvm/BinaryFormat/MachO.h
+20-6llvm/tools/llvm-objdump/MachODump.cpp
+17-0llvm/include/llvm/Object/MachO.h
+500-255 files

LLVM/project 2629790 — lld/MachO InputFiles.cpp, lld/test/MachO arm64e-reject-mixed.s

[lld-macho] Don't mix arm64 and arm64e objects

arm64 and arm64e share a CPU type, but as in ld64, an arm64e link ignores
arm64 objects and an arm64 link ignores arm64e objects with a warning, and
-arch_errors_fatal makes both an error. Like ld64, both also ignore
arm64e.x1 objects, which have the arm64e ABI but need a newer CPU than
arm64e. The inputs of an -arch arm64e.x1 link are not checked.

Assisted-by: Claude Code

DeltaFile
+62-0lld/test/MachO/arm64e-reject-mixed.s
+8-1lld/MachO/InputFiles.cpp
+70-12 files

LLVM/project 8f33e11 — lld/MachO Driver.cpp, lld/test/MachO arm64e-objc-category-merging.s

[lld-macho] Don't merge ObjC categories for arm64e

Category merging rewrites category data without regard to the signing
schemas of the authenticated pointers in it, which produces a binary that
crashes when the runtime authenticates them. Until merging preserves the
schemas, warn about -objc_category_merging on arm64e and leave the
categories as they are.

Assisted-by: Claude Code



DeltaFile
+104-0lld/test/MachO/arm64e-objc-category-merging.s
+7-2lld/MachO/Driver.cpp
+111-22 files

LLVM/project 0ff15ac — lld/MachO Target.h Driver.cpp, lld/MachO/Arch ARM64.cpp

[lld-macho] Add an arm64e target

lld accepts -arch arm64e but links it with the arm64 target, so the output
claims to be arm64. Add an ARM64e target derived from ARM64, select it for
-arch arm64e, and mark the CPU subtype as ld64 does: CPU_SUBTYPE_ARM64E
with ptrauth ABI version 1 for macOS and Mac Catalyst executables, and
version 0 for everything else.

Assisted-by: Claude Code


DeltaFile
+37-0lld/test/MachO/arm64e-cpu-subtype.s
+10-0lld/MachO/SyntheticSections.cpp
+10-0lld/MachO/Arch/ARM64.cpp
+2-0lld/MachO/Driver.cpp
+1-0lld/MachO/Target.h
+60-05 files

LLVM/project 1989baf — lld/MachO Relocations.h SyntheticSections.cpp, lld/test/MachO arm64e-tlv-auth.s arm64e-auth-pointer.s

[lld-macho] Link arm64e authenticated pointers

Parse ARM64_RELOC_AUTHENTICATED_POINTER, which keeps the pointer's signing
schema (key, diversity and address diversity) in its upper half, and write
it as an authenticated chained rebase or bind. Relocation stores the schema
next to a 32-bit addend, so its size stays 24 bytes.

As in ld64, accept only the extern form of the relocation and only a payload
with the authentication bit set and the reserved bits clear, store the
target of an authenticated rebase as an offset of at most 4 GiB from the
image base, put the addends of authenticated binds, which have no addend
field, in the imports table, and keep authenticated pointers in
__thread_vars signed pointers rather than offsets into the thread-local
data.

Assisted-by: Claude Code


DeltaFile
+153-0lld/test/MachO/arm64e-auth-pointer-invalid.yaml
+117-0lld/test/MachO/arm64e-auth-reloc-local.s
+104-0lld/test/MachO/arm64e-auth-pointer.s
+62-15lld/MachO/SyntheticSections.cpp
+52-4lld/MachO/Relocations.h
+42-0lld/test/MachO/arm64e-tlv-auth.s
+530-198 files not shown
+612-4714 files

LLVM/project 8563ddc — lld/MachO ObjC.cpp InputSection.cpp

[lld-macho][NFC] Access relocation addends through accessors (#234000)

This PR makes `Relocation` a class to make `Relocation::addend` private,
routing uses through `getAddend()` and `setAddend()`.

This was split out of #188378, as suggested in its review, and is the
first PR of the stack that replaces it. In the stack above, auth'd
pointer relocations store a signing schema alongside the addend.

No functional change intended.

Assisted-by: Codex, Claude
DeltaFile
+9-8lld/MachO/InputFiles.cpp
+11-5lld/MachO/Relocations.h
+6-6lld/MachO/ICF.cpp
+6-6lld/MachO/ConcatOutputSection.cpp
+5-5lld/MachO/ObjC.cpp
+5-5lld/MachO/InputSection.cpp
+42-358 files not shown
+56-4914 files

LLVM/project 6f9969a — llvm/lib/Target/RISCV RISCV.h RISCVCodeGenPassBuilder.cpp, llvm/lib/Target/RISCV/GISel RISCVO0PreLegalizerCombiner.cpp RISCVPostLegalizerCombiner.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+148-27llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+68-29llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
+67-26llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
+35-35llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+43-19llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
+27-6llvm/lib/Target/RISCV/RISCV.h
+388-1424 files not shown
+433-14910 files

LLVM/project 682286c — llvm/lib/Target/RISCV RISCV.h RISCVCodeGenPassBuilder.cpp, llvm/lib/Target/RISCV/GISel RISCVO0PreLegalizerCombiner.cpp RISCVPostLegalizerCombiner.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+102-27llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+68-29llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp
+67-26llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp
+35-35llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+43-19llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp
+27-6llvm/lib/Target/RISCV/RISCV.h
+342-1424 files not shown
+387-14910 files

LLVM/project 7b48841 — mlir/include/mlir/Dialect/SparseTensor/Transforms Passes.h Passes.td, mlir/lib/Dialect/SparseTensor/Transforms/Utils IterationGraphSorter.h IterationGraphSorter.cpp

[MLIR][SparseTensor] Implemented LoopUseOuter and LoopUseInner heuristics for loop ordering (#232591)

This builds upon the chain of PRs ending here: #172198.

This PR introduces two new heuristics: loop-use-outer and
loop-use-inner, which prefer loops used across more distinct accesses to
be outwards or inwards, respectively.

The motivation to push such loops inwards is considering locality; more
tensors are being accessed, so theoretically multiple inputs can be
traversed in the innermost loop.

The motivation to push such loops outwards is mostly for sparse tensors.
If there are multiple sparse tensors being accessed by the same affine
index, the overhead of finding "matching indices" can be avoided across
the tighter inner loops. For dense tensors there could also be better
reuse of loaded data across the tighter inner loops as well.

I wasn't sure if I should document this reasoning somewhere else as

    [3 lines not shown]
DeltaFile
+89-0mlir/test/Dialect/SparseTensor/sparse_loop_ordering_inputs.mlir
+57-2mlir/lib/Dialect/SparseTensor/Transforms/Utils/IterationGraphSorter.cpp
+5-1mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
+4-0mlir/lib/Dialect/SparseTensor/Transforms/Utils/IterationGraphSorter.h
+2-1mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.h
+157-45 files

LLVM/project 282a41a — llvm/lib/CodeGen MachineInstr.cpp, llvm/test/CodeGen/AArch64/GlobalISel irtranslator-sincos.ll

[MIR] Always print types on generic register definitions (#234846)

`getTypeToPrint` omits repeated generic types even on register
definitions. For instructions with multiple definitions sharing a type
index, such as `G_SDIVREM` and `G_FSINCOS`, this produces MIR that the
parser rejects with "generic virtual registers must have a type".

Assisted-by: GPT-6
DeltaFile
+15-15llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-divrem.mir
+22-0llvm/test/CodeGen/MIR/X86/generic-instr-type.mir
+8-8llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
+2-1llvm/lib/CodeGen/MachineInstr.cpp
+47-244 files

FreeBSD/ports 85c4df9 — devel/perfetto Makefile distinfo, devel/perfetto/files patch-protos_perfetto_config_data__source__config.proto patch-gn_standalone_android.gni

devel/perfetto: update 58.2 -> 59.1
DeltaFile
+0-25devel/perfetto/files/patch-gn_standalone_android.gni
+12-12devel/perfetto/files/patch-protos_perfetto_config_data__source__config.proto
+3-3devel/perfetto/distinfo
+1-1devel/perfetto/Makefile
+16-414 files

FreeNAS/freenas d14ea9f — src/middlewared/middlewared/api/v28_0_0 filesystem.py, src/middlewared/middlewared/plugins/filesystem_ acl.py

NAS-144928 / 28.0.0-BETA.1 / Read the ACL type of a path from statx (#20073)

The TrueNAS kernel reports the ACL type of a file system in
stx_attributes, STATX_ATTR_POSIXACL or STATX_ATTR_NFSV4ACL, from the
flags of the superblock that ZFS keeps current as acltype changes with
no remount. path_get_acltype probed system.posix_acl_access and then
system.nfs4_acl_xdr, two reads that each allocate in the kernel, and
took EOPNOTSUPP for a type. It is now one statx.

StatxAttr gains POSIXACL and NFSV4ACL, so filesystem.stat and
filesystem.listdir list them in attributes, and the v28_0_0 API names
them. A unit test makes a dataset of each acltype, checks the bits,
path_get_acltype and the attributes listed, changes the acltype with no
remount, and checks /proc, which keeps no ACL. It needs a kernel with
the change.
DeltaFile
+82-0tests/unit/test_zfs_statx_acltype.py
+12-22src/middlewared/middlewared/utils/filesystem/acl.py
+5-1src/middlewared/middlewared/utils/filesystem/stat_x.py
+2-2src/middlewared/middlewared/plugins/filesystem_/acl.py
+3-1src/middlewared/middlewared/api/v28_0_0/filesystem.py
+1-1src/middlewared/middlewared/utils/filesystem/directory.py
+105-276 files

LLVM/project f1b5db0 — mlir/test/mlir-tblgen trait-declared-in-attrdef-decls.td trait-declared-in-invalid.td, mlir/tools/mlir-tblgen CppGenUtilities.cpp AttrOrTypeDefGen.cpp

[mlir][ODS] Include headers declaring used traits in generated declarations

While teaching at the [MLIR summer school](https://mlir-school.github.io/summer-2026/), a common confusion by students was the need to add includes for C++ constructs generated by TableGen, i.e., code they didn't even write!

This PR adds a `declaredIn` list to `Trait` that names the C++ headers declaring the trait or interface. Generated declarations now emit an `#include` for the headers of all traits and interfaces they use (including base interfaces, side
effects, `DeclareOpInterfaceMethods` and trait lists), plus the core MLIR headers every declaration needs.
This should heavily reduce the boilerplate required for new dialects.

The PR only introduces the mechanism, but does not yet override the field in any TableGen fields beyond the tests. Future work will also port this to more constructs (type and attr constraints e.g.). Another motivation is that this mechanism is more-or-less a UX prerequisite to have automatic dialect sharding and self-contained TableGen generated headers in the future.
DeltaFile
+95-62mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+93-0mlir/test/mlir-tblgen/trait-declared-in-op-decls.td
+74-0mlir/test/mlir-tblgen/trait-declared-in-invalid.td
+36-11mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
+39-0mlir/tools/mlir-tblgen/CppGenUtilities.cpp
+31-0mlir/test/mlir-tblgen/trait-declared-in-attrdef-decls.td
+368-7316 files not shown
+515-7422 files

LLVM/project 13f2dc5 — llvm/lib/Target/X86 X86InstrAVX512.td, llvm/test/CodeGen/X86 avx512fp16-combine-fmsubadd-fadd.ll avx512fp16-intrinsics.ll

[X86][FP16] Widen v8f16/v16f16 fadd/fsub/fmul/fdiv/fma to 512 bits without VLX (#234948)

Fixes #234131
DeltaFile
+332-0llvm/test/CodeGen/X86/avx512fp16-novl.ll
+133-41llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd.ll
+11-118llvm/test/CodeGen/X86/fmaddsub-combine-fp16.ll
+12-116llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
+91-21llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd-fadd.ll
+61-0llvm/lib/Target/X86/X86InstrAVX512.td
+640-2962 files not shown
+660-3478 files

LLVM/project cf9b6c7 — llvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/ARM vector-interleave-store.ll

[ARM] Add combine for vector_interleave operation (#225818)

When result's of vector_interleave operation feed to store operation it
can be combined to form structured store.
Wider type will be splitted by type legalizer and then each can
form structured store.
DeltaFile
+324-0llvm/test/CodeGen/ARM/vector-interleave-store.ll
+298-0llvm/test/CodeGen/Thumb2/mve-vector-interleave-store.ll
+203-0llvm/lib/Target/ARM/ARMISelLowering.cpp
+825-03 files

LLVM/project 3fb0b2d — .github/workflows libcxx-lnt-refine-commits.yml libcxx-lnt-anchor-commits.yml

Update [Github] Update GHA Dependencies (#235539)

This PR contains the following updates:

| Package | Type | Update | Change | Pending |
|---|---|---|---|---|
|
[EnricoMi/publish-unit-test-result-action](https://redirect.github.com/EnricoMi/publish-unit-test-result-action)
| action | minor | `v2.24.0` → `v2.25.0` | |
|
[actions/create-github-app-token](https://redirect.github.com/actions/create-github-app-token)
| action | minor | `v3.2.0` → `v3.3.0` | |
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | minor | `v7.0.0` → `v7.1.0` | |
|
[actions/upload-artifact](https://redirect.github.com/actions/upload-artifact)
| action | patch | `v7.0.1` → `v7.0.2` | |
| [docker/login-action](https://redirect.github.com/docker/login-action)

    [16 lines not shown]
DeltaFile
+2-2.github/workflows/libcxx-lnt-refine-commits.yml
+2-2.github/workflows/libcxx-lnt-anchor-commits.yml
+2-2.github/workflows/libcxx-benchmark-cron.yml
+2-2.github/workflows/gha-codeql.yml
+2-2.github/workflows/docs.yml
+2-2.github/workflows/check-ci.yml
+12-1216 files not shown
+33-3322 files

LLVM/project 33cae96 — llvm/lib/Transforms/Scalar Sink.cpp, llvm/test/Transforms/Sink avoid-postdominators.ll

[Sink] Model stores when predicting the final sink target

When predicting where an instruction ends up after repeated sinking,
stop at a block containing a write that may clobber it.
DeltaFile
+30-0llvm/test/Transforms/Sink/avoid-postdominators.ll
+10-1llvm/lib/Transforms/Scalar/Sink.cpp
+40-12 files

LLVM/project 0c5fd95 — llvm/lib/Target/AMDGPU AMDGPUMCResourceInfo.cpp, llvm/test/CodeGen/AMDGPU amdpal-chain-metadata.ll

Test with assumed ext stack size
DeltaFile
+25-7llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
+26-82 files