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[Support] Remove duplicate comments in FoldingSet.cpp (NFC) (#216833)

This patch removes duplicate comments in FoldingSet.cpp.
Corresponding declarations are already documented in FoldingSet.h.

Note that LLVM Coding Standards state:

  Don't duplicate the documentation comment in the header file and in
  the implementation file. Put the documentation comments for public
  APIs into the header file.

[ADT] Remove CRTP from FoldingSet and ContextualFoldingSet (NFC) (#216830)

This patch simplifies FoldingSet by removing CRTP from FoldingSet and
ContextualFoldingSet.

Without this patch, FoldingSetImpl uses CRTP to get FoldingSetInfo, a
custom "vtable", from FoldingSet and ContextualFoldingSet.

With this patch, we put ContextStorage as the base class of
FoldingSetImpl.  FoldingSetImpl directly takes FoldingSetTrait as a
template parameter.  This allows us to:

- populate FoldingSetInfo for both FoldingSet and
  ContextualFoldingSet as a static constexpr variable.

- rely on the empty base optimization (EBO) on ContextStorage so that
  FoldingSet incurs no memory overhead.

- turn FoldingSet and ContextualFoldingSet into simple type aliases of

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Fix text color in dark mode

[docs] Restore project-specific Furo CSS

[flang][cuda] Add support for custom descriptor allocator in codegen (#216881)

Simlar to https://github.com/llvm/llvm-project/pull/216841 but for
CodeGen pass usage.

graphics/opencv: fix WWW

`www` subdomain results in error

(cherry picked from commit 8247829dff7e3fa3f941eb33bb977954388c5930)

[flang][cuda] Add option to emit different function name for alloc/free of descriptors (#216841)

This allow to call specialized functions instead of the upstream ones.

graphics/opencv: use multimedia/v4l_compat on non-CURRENT

Since video(4) et al landed in -CURRENT, the multimedia/v4l_compat
headers conflict with <sys/videoio.h> when both are present. Support
for <sys/videoio.h> is already included for NetBSD so ensure that
this path is taken during configure on -CURRENT. Also ensure that
the Linux-style unsigned int shorthand is defined for us in addition
to OpenBSD.

PR: 297454

(www/p5-Selenium-Remote-Driver) correction to +DEPENDS+= p5-File-Which

[BFI] Solve irreducible SCCs instead of splitting their headers (#215170)

c5a3139ebd0d (2014) approximates irreducible control flow by modelling
an SCC as a loop with multiple headers, and
http://reviews.llvm.org/D10348 re-distributes the loop mass across those
headers in proportion to the backedge mass each one received -- one step
of a power iteration, from an assumed split.

Package the SCC with a single representative and solve it instead.
`solveIrreducibleMass` iterates the SCC's internal chain towards its
dominant eigenvector and reads the member masses, the exits and the
circulating mass off that, so the entries' relative frequencies come out
of the solve.  Power iteration rather than a relaxation of `f = e +
f*P`: the mass `e` entering the SCC is unknown here, so there is no
fixed point to relax towards, only a direction.  NumHeaders, the
per-header BackedgeMass, getHeaderIndex, the isHeader binary search and
adjustLoopHeaderMass go away with the split.

Relative error against an exact rational solve has improved.

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sysutils/leaf: Update to 1.28.0

Changelog: https://github.com/RivoLink/leaf/blob/1.28.0/CHANGELOG.md

Reported by:    GitHub (watch releases)

MFV: less v704.

(cherry picked from commit fa0dc4f0f96a1b77d4be7bcdbf965897cda14521)

MFV less v691

Relnotes:       yes

(cherry picked from commit dafba19e42e78cd3d7c9264ece49ddd3d7d70da5)

MFV: less v692.

(cherry picked from commit e2abec625bf07c054f7ac2df2402d6c454113df8)

MFV: less v704.

(cherry picked from commit fa0dc4f0f96a1b77d4be7bcdbf965897cda14521)

[lldb] Adopt ProcessAddress in the read memory APIs (NFC) (#214088)

Relevant RFC:
https://discourse.llvm.org/t/rfc-address-spaces-support-in-lldb/91222/

Previous PR  #206370  adding the AddressSpace definitions. 


- switches the read memory virtuals from lldb::addr_t to const
ProcessAddress & and updates every override. No behavior change
expected.
 

**Test Plan**
- Depending on the buildbots for all other platforms.

[WebAssembly] Add v8f16 select instruction patterns (#213280)

I see the following 

```
 anutosh491 at Anutoshs-MacBook-Air llvm-project % cat /private/tmp/wasm-f16-select.ll
define <8 x half> @select_v8f16(i1 %cond, <8 x half> %a, <8 x half> %b) {
  %result = select i1 %cond, <8 x half> %a, <8 x half> %b
  ret <8 x half> %result
}
```
```

 anutosh491 at Anutoshs-MacBook-Air llvm-project % build-assert/bin/llc \             
  -mtriple=wasm32-unknown-unknown \
  -mattr=+simd128,+fp16 \
  -o /dev/null \
  /private/tmp/wasm-f16-select.ll
LLVM ERROR: Cannot select: t8: v8f16 = select t12, t4, t6

    [33 lines not shown]

misc/py-litellm-proxy-extras: Update to 0.4.86

Reported by:    portscout

misc/py-litellm: Update to 1.97.0

While here, add USE_PYTHON=pytest.

Changelog: https://github.com/BerriAI/litellm/releases/tag/v1.97.0

Reported by:    portscout

graphics/opencv: fix WWW

`www` subdomain results in error

   Ensure numbering is repainted after completion redraw.

   Fixes screen corruption when using completion if line numbering is
   enabled.  Otherwise, the completion area is redrawn without line
   numbers.  From Jeffrey Johnson

[orc-rt] Add missing `#include <optional>` (#216894)

[SDAG] Fix invalid sign bit condition for abs(sub) -> abdu fold (#215548)

The fold here for (abs (sub x y)) -> (abdu x y) was proven in Alive,
assuming that both operands had a sign bit of zero. However, the code
was checking if x had a sign bit of zero and y had a sign bit of 1

Fixes https://github.com/llvm/llvm-project/issues/214942

Original Alive proof from
https://github.com/llvm/llvm-project/pull/186659 :
https://alive2.llvm.org/ce/z/HfPF5q
A variant that's explicitly (abs (sub x y)):
https://alive2.llvm.org/ce/z/QEgDaa
And changing the range to 32770 or higher there will break the
transformation

[lldb] Keep DW_OP_fbreg results address-sized (#216641)

DW_OP_fbreg adds its signed displacement as an int64_t, which can widen
a 32-bit frame-base Scalar to 64 bits. Canonicalize the pushed result
using the evaluator's existing generic conversion so subsequent
arithmetic uses the target address width.

Add an i386 regression test that checks 32-bit wrapping and the
resulting APSInt width.

Fixes #211007

(www/p5-Selenium-Remote-Driver) +DEPENDS+=  p5-p5-File-Which

[NVPTX] Fix link error when building LLVM with dylib

don't test on windows

e1000: Disable autonomous PCH power gating after reset

Panther Point changed the reset value of CTRL_EXT.DPG_EN to enable
autonomous power gating. Clear it after hardware reset on Panther Point
and Nova Point controllers to prevent unexpected Tx/Rx hangs, packet
loss, or corruption.

(cherry picked from commit 0979b0430c2d728e595841ecba30b63972794fe9)

ice(4): Add support for E835 CNSA 2.0 adapters

Added support for E835 adapters with post-quantum cryptographic (PQC)
algorithms in firmware/software signage and in SPDM attestation.

Signed-off-by: Pawel Sobczyk <pawel.sobczyk at intel.com>

Reviewed by:    Miłosz Linkiewicz <milosz.linkiewicz at intel.com>
Differential Revision:  https://reviews.freebsd.org/D57868

(cherry picked from commit 8194c32827e9c3867d4b295edca9842b71608526)

e1000: Disable autonomous PCH power gating after reset

Panther Point changed the reset value of CTRL_EXT.DPG_EN to enable
autonomous power gating. Clear it after hardware reset on Panther Point
and Nova Point controllers to prevent unexpected Tx/Rx hangs, packet
loss, or corruption.

(cherry picked from commit 0979b0430c2d728e595841ecba30b63972794fe9)

ice(4): Add support for E835 CNSA 2.0 adapters

Added support for E835 adapters with post-quantum cryptographic (PQC)
algorithms in firmware/software signage and in SPDM attestation.

Signed-off-by: Pawel Sobczyk <pawel.sobczyk at intel.com>

Reviewed by:    Miłosz Linkiewicz <milosz.linkiewicz at intel.com>
Differential Revision:  https://reviews.freebsd.org/D57868

(cherry picked from commit 8194c32827e9c3867d4b295edca9842b71608526)