FreeBSD/src 1932bd2sys/kern imgact_elf.c

ptrace: Propagate errors from set_fpregs()

Otherwise ptrace(PT_SETREGSET) will not return errors to userspace.

Fixes:          cef05c5a62ba ("amd64: do not allow to set reserved bits in MXCSR for ptrace(PT_SETFPREGS)")
Reviewed by:    kib
Differential Revision:  https://reviews.freebsd.org/D58577
DeltaFile
+4-4sys/kern/imgact_elf.c
+4-41 files

FreeBSD/src ea7d355sys/vm uma_core.c

uma: Fix KMSAN integration with malloc zones

In commit 459aa032e872 I dropped kmsan_mark() calls from malloc() on the
basis that UMA and kmem_malloc() would handle updates of the KMSAN
shadow map.  However, I missed that UMA explicitly does not handle this.

Modify UMA to only omit origin map updates for malloc zones.

Fixes:          459aa032e872 ("malloc: Refactor redzone and sanitizer handling")
Reviewed by:    rlibby
Differential Revision:  https://reviews.freebsd.org/D58574
DeltaFile
+4-6sys/vm/uma_core.c
+4-61 files

LLVM/project b53cccfllvm/lib/Target/AMDGPU AMDGPUImageIntrinsicOptimizer.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.image.load.2dmsaa.ll

[AMDGPU] Fix ImageIntrinsicOptimizer DMask check starting at wrong arg index (#213264)
DeltaFile
+27-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
+28-12 files

LLVM/project 55f3ddfllvm/lib/Target/AMDGPU MIMGInstructions.td AMDGPU.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.intersect_ray.ll

AMDGPU: Separate image_msaa_load from bvh-ray-tracing-insts (#213270)

Add a separate msaa-load-insts feature so image_msaa_load is available
on gfx13, which has it but not the BVH intersect-ray instructions. These
were assumed to be the same feature previously, but gfx13 does not have the
bvh instructions, but does have image_msaa_load.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+14-3llvm/lib/Target/AMDGPU/AMDGPU.td
+13-0llvm/test/MC/AMDGPU/gfx13_asm_vimage_err.s
+5-3llvm/lib/Target/AMDGPU/MIMGInstructions.td
+2-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
+1-0llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
+35-65 files

LLVM/project 14ec3c4offload/liboffload/API Symbol.td, offload/liboffload/src OffloadImpl.cpp

[Offload] add 'olIterateSymbols' runtime function (#213036)

Summary:
This provides users with a way to check all symbols present in a given
program. This is useful for many cases where a power user wants to do
something dynamic with the objects present.
DeltaFile
+118-0offload/unittests/OffloadAPI/symbol/olIterateSymbols.cpp
+59-16offload/liboffload/src/OffloadImpl.cpp
+49-0offload/plugins-nextgen/common/src/GlobalHandler.cpp
+31-2offload/plugins-nextgen/amdgpu/src/rtl.cpp
+32-0offload/liboffload/API/Symbol.td
+21-1offload/plugins-nextgen/common/include/GlobalHandler.h
+310-1910 files not shown
+350-2916 files

LLVM/project 7ef0ca2clang/lib/Driver/ToolChains HIPSPV.h HIPSPV.cpp, clang/test/Driver hipspv-pass-plugin.hip hipspv-no-spirv-backend.hip

Reland "[HIPSPV] Add in-tree SPIR-V backend support for chipStar" (#213052)

Relands #206910 (reverted in #213088) with the fix for the breakage.

IsIntegratedBackendDefault() was tied to whether the SPIR-V backend is
registered, but it also controls whether clang collapses the compile and
backend
jobs, so builds without the SPIR-V target split every HIPSPV RDC device
compile
and failed hipspv-toolchain-rdc.hip. The default is back to the base
class value
and the translator fallback is decided in
constructLinkAndEmitSpirvCommand.
Third commit adds a test not guarded by spirv-registered-target.

Validated in X86;SPIRV and X86 only builds: driver tests pass in both,
and
non-RDC plus RDC (new driver) flows run for real emit spirv-val clean
modules
via the backend and via llvm-spirv respectively.
DeltaFile
+126-35clang/lib/Driver/ToolChains/HIPSPV.cpp
+39-27clang/test/Driver/hipspv-toolchain.hip
+41-0clang/test/Driver/hipspv-no-spirv-backend.hip
+13-9clang/test/Driver/hipspv-pass-plugin.hip
+10-2clang/lib/Driver/ToolChains/HIPSPV.h
+2-1llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
+231-741 files not shown
+233-757 files

FreeNAS/freenas 6baf861src/middlewared/middlewared/plugins zettarepl.py, src/middlewared/middlewared/plugins/replication methods.py

NAS-141823 / 27.0.0-BETA.1 / Allow running disabled replication tasks (#19419)

Previously, disabled replication tasks were excluded from zettarepl
configuration. Now we include them, but we don't let them run
automatically.
DeltaFile
+8-4tests/api2/test_replication.py
+4-4src/middlewared/middlewared/plugins/zettarepl.py
+0-3src/middlewared/middlewared/plugins/replication/methods.py
+12-113 files

LLVM/project 54fedf4llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 runtime-alias-checks.ll

[SLP]Fix miscompile from poison base in alias-check versioning

Emit the runtime alias check while the block is still fully connected.
LCSSA-preserving SCEV expansion rewrites out-of-loop uses of
loop-defined bases to poison in predecessor-less blocks, corrupting
both the moved body and the scalar fallback clone.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213338
DeltaFile
+17-17llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
+12-15llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+29-322 files

LLVM/project c3fe695llvm/lib/Target/CSKY CSKYAsmPrinter.cpp CSKYTargetMachine.cpp, llvm/lib/Target/CSKY/MCTargetDesc CSKYELFStreamer.cpp

CSKY: Consume "float-abi" module flag (#212975)

Start respecting float-abi, and fall back on the TargetOptions
field if not present.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+45-0llvm/test/CodeGen/CSKY/float-abi-module-flag.ll
+41-0llvm/test/CodeGen/CSKY/fpu-abi-attribute.ll
+4-11llvm/lib/Target/CSKY/CSKYSubtarget.cpp
+7-3llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.cpp
+8-1llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+5-3llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
+110-186 files not shown
+121-2712 files

LLVM/project 93a1495llvm/test/Transforms/SLPVectorizer/X86 runtime-alias-checks.ll

[SLP][NFC]Add a test with the runtime checks miscompilation, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213336
DeltaFile
+259-0llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
+259-01 files

LLVM/project 1e089f1llvm/utils/gn/secondary/lldb/source/Core BUILD.gn

[gn build] Port d9278ad4e640 (#213335)
DeltaFile
+1-0llvm/utils/gn/secondary/lldb/source/Core/BUILD.gn
+1-01 files

LLVM/project ae14df3llvm/utils/gn/secondary/clang/unittests/Analysis BUILD.gn

[gn build] Port 0a1f0aafed6d (#213334)
DeltaFile
+1-0llvm/utils/gn/secondary/clang/unittests/Analysis/BUILD.gn
+1-01 files

LLVM/project 00e7c35clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn-gfx1250.hip

[CIR][AMDGPU] Add support for AMDGCN tanh builtins (#197852)

Adds codegen for the following AMDGCN tanh builtins:

- __builtin_amdgcn_tanhf (float)
- __builtin_amdgcn_tanhh (half)
- __builtin_amdgcn_tanh_bf16 (bfloat16)

These are lowered to the corresponding `llvm.amdgcn.tanh` intrinsic.
DeltaFile
+24-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250.hip
+1-4clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+25-42 files

LLVM/project 3ece94dclang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Add support for AMDGCN trig_preop builtins (#197399)

Adds codegen for the following AMDGCN trigonometric pre-operation
builtins:

- __builtin_amdgcn_trig_preop (double)
- __builtin_amdgcn_trig_preopf (float)

These are lowered to the corresponding `llvm.amdgcn.trig.preop`
intrinsic.
DeltaFile
+16-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+3-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+19-62 files

LLVM/project 460c1d3llvm/test/CodeGen/PowerPC nofpclass.ll fneg.ll

[NFC][PowerPC] add `ppcf128` tests for fneg and nofpclass (#213307)
DeltaFile
+189-30llvm/test/CodeGen/PowerPC/fneg.ll
+53-11llvm/test/CodeGen/PowerPC/nofpclass.ll
+242-412 files

LLVM/project 22308c4.github/workflows release-sources.yml

workflows/release-sources: Pass release-version to upload-release-artifacts (#212660)

This was omitted from a8ccd42ab23af6848929a638cd6b099953c7e491.
DeltaFile
+1-0.github/workflows/release-sources.yml
+1-01 files

GhostBSD/ports cdd484ddevel/RStudio distinfo.desktop

devel/RStudio: add distinfo file with required checksums and sizes
DeltaFile
+21-0devel/RStudio/distinfo.desktop
+21-01 files

HardenedBSD/src 9f80b4esys/kern kern_malloc.c

HBSD: Resolve merge conflict

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
DeltaFile
+0-30sys/kern/kern_malloc.c
+0-301 files

HardenedBSD/src 3775f1dlib/libc/tests/secure fortify_uio_test.c, sbin/ifconfig ifgif.c

Merge remote-tracking branch 'rad/freebsd/current/main' into hardened/current/master

Conflicts:
        sys/kern/kern_malloc.c (unresolved)
DeltaFile
+270-34sys/net/if_gif.c
+194-0sbin/ifconfig/ifgif.c
+160-0tests/sys/netlink/test_rtnl_gif.c
+60-62sys/kern/kern_malloc.c
+80-20lib/libc/tests/secure/fortify_uio_test.c
+38-24sys/vm/uma_core.c
+802-14017 files not shown
+933-18523 files

LLVM/project 55b693cllvm/test/CodeGen/AMDGPU amdgcn.bitcast.96bit.ll, llvm/test/CodeGen/X86 build-vector-known-bits-poison.ll kmov.ll

DAG: Skip poison elements in BUILD_VECTOR computeKnownBits

This defends against regressions in future patches. Copies the logic
from the IR version of computeKnownBits's handling of ConstantVector.
I'm not sure why the IR version doesn't directly return a value for poison,
but this follows suit.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+67-64llvm/test/CodeGen/X86/ifma-combine-vpmadd52.ll
+40-41llvm/test/CodeGen/X86/srem-vector-lkk.ll
+29-21llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
+8-18llvm/test/CodeGen/X86/pr120906.ll
+9-9llvm/test/CodeGen/X86/kmov.ll
+3-11llvm/test/CodeGen/X86/build-vector-known-bits-poison.ll
+156-1647 files not shown
+183-18613 files

LLVM/project 4a31762llvm/test/CodeGen/X86 build-vector-known-bits-poison.ll

X86: Add baseline test for computeKnownBits poison+vector handling

Currently computeKnownBits is too conservative with poison inputs.
DeltaFile
+44-0llvm/test/CodeGen/X86/build-vector-known-bits-poison.ll
+44-01 files

Linux/linux 6269cc6drivers/spi spi-qcom-qspi.c spi-spacemit-k1.c

Merge tag 'spi-fix-v7.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
 "The drip of driver specific fixes, mostly from the device vendors
  themselves, keeps on coming in. There's more than I'd like right now
  but equally nothing hugely alarming"

* tag 'spi-fix-v7.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
  spi: spi-nxp-fspi: propagate clock reconfig failures in nxp_fspi_select_mem()
  spi: spi-nxp-fspi: enter stop mode before reconfiguring MCR0 and DLL
  spi: spi-nxp-fspi: add per-SoC SDR/DTR clock rate limits for all supported SoCs
  spi: spi-qpic-snand: write the feature value before executing SET_FEATURE
  spi: spi-cadence: Move TX FIFO full busy-wait into FIFO
  spi: qcom-qspi: Correct max DMA length to avoid 64K boundary failure
  spi: spacemit: prepare both DMA descriptors before submitting
DeltaFile
+119-10drivers/spi/spi-nxp-fspi.c
+16-10drivers/spi/spi-cadence.c
+11-11drivers/spi/spi-spacemit-k1.c
+18-4drivers/spi/spi-qpic-snand.c
+2-1drivers/spi/spi-qcom-qspi.c
+166-365 files

LLVM/project 6d7c951llvm/test/Transforms/SLPVectorizer/RISCV folded-broadcast-cost.ll

[SLP] Add tests for overcosted scalar splats for RISCV (#213142)

Tests for #213104.
DeltaFile
+95-0llvm/test/Transforms/SLPVectorizer/RISCV/folded-broadcast-cost.ll
+95-01 files

LLVM/project eea8ef2libc/src/__support/math ceilf128.h

nit
DeltaFile
+2-0libc/src/__support/math/ceilf128.h
+2-01 files

LLVM/project ae22616llvm/lib/CodeGen/AsmPrinter WinException.cpp, llvm/test/CodeGen/X86 win-null-personality.ll

[X86] Don't emit personality info when the personality is not a function (#212803)

Follow-up to #212417, another one in the same corner.

`llc -mtriple=x86_64-pc-windows-msvc` crashes on a function whose
personality isn't a function:

```llvm
define void @a() personality ptr null {
  ret void
}
```

`dyn_cast<Function>` gives null, and `beginFunclet` hands that straight
to `getSymbol`, which dereferences it.

`DwarfCFIException` already guards against this, applying the null check
to both branches:


    [14 lines not shown]
DeltaFile
+37-0llvm/test/CodeGen/X86/win-null-personality.ll
+6-2llvm/lib/CodeGen/AsmPrinter/WinException.cpp
+43-22 files

LLVM/project 32e5b7dllvm/include/llvm-c/CAS PluginAPI_types.h PluginAPI_functions.h, llvm/lib/CAS PluginAPI.h PluginCAS.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+779-0llvm/tools/libCASPluginTest/libCASPluginTest.cpp
+514-0llvm/lib/CAS/PluginCAS.cpp
+416-0llvm/include/llvm-c/CAS/PluginAPI_functions.h
+129-0llvm/lib/CAS/PluginAPI.h
+119-0llvm/include/llvm-c/CAS/PluginAPI_types.h
+91-0llvm/unittests/CAS/PluginCASTest.cpp
+2,048-010 files not shown
+2,233-2016 files

LLVM/project f3827c2libc/src/__support/math ceilf128.h, libc/src/math/generic ceilf128.cpp

structured and applied suggestions
DeltaFile
+1-12libc/src/__support/math/ceilf128.h
+3-9libc/src/math/generic/ceilf128.cpp
+4-2libc/test/shared/shared_math_constexpr_test.cpp
+0-3libc/test/src/math/smoke/ceilf128_test.cpp
+0-3libc/test/src/math/ceilf128_test.cpp
+1-1libc/utils/MPFRWrapper/CMakeLists.txt
+9-305 files not shown
+10-3611 files

FreeBSD/ports 8ed6c9bnet/fort Makefile distinfo

net/fort: Update to 1.7.0.experimental

- Update to 1.7.0.experimental
- Changelog:
  https://github.com/NICMx/FORT-validator/releases/tag/1.7.0.experimental

Please note that max-rtr-version defaults to zero. This is because
Fort's validation currently yields no router keys (defeating the purpose
of RTRv1), and the RTRv2 specification is still receiving updates.

The latter is all the ".experimental" suffix refers to. If you raise
max-rtr-version to 2, you'll be trying a feature that hasn't been RFC'd
yet.

(cherry picked from commit 4839e2b8d1026ae7f359c5b96ae8c8fff589064e)
DeltaFile
+3-3net/fort/distinfo
+2-1net/fort/Makefile
+5-42 files

LLVM/project f8d6aafflang/include/flang/Optimizer/Passes Pipelines.h, flang/lib/Optimizer/Passes Pipelines.cpp

[flang][NFC] move addPass* template utilities to header (#213288)

Move the addPass* template utilities to the header so external pipelines
can use them.
DeltaFile
+0-21flang/lib/Optimizer/Passes/Pipelines.cpp
+18-2flang/include/flang/Optimizer/Passes/Pipelines.h
+18-232 files

LLVM/project eef072dllvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/TargetParser AMDGPUTargetParser.cpp

AMDGPU: Export the TargetParser feature bitset

Previously this bitset was only used to populate the feature
name string map used by clang. Eventually this will replace
the current bitmask integer. AArch64 already has a similar
interface.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+17-14llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+29-0llvm/unittests/TargetParser/TargetParserTest.cpp
+16-0llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+62-143 files