[clang][Driver] Fix driver tests for in-process cc1 (#240520)
After #222531, multi-job `-###` driver invocations emit `(in-process)`
before each `-cc1` and `-cc1as` job when built with
`LLVM_TOOL_LLVM_DRIVER_BUILD=ON`.
Relax `*-NEXT` checks across consecutive cc1 jobs in the remaining
driver tests so they pass with and without in-process cc1.
Assisted by Gemini
[RISCV][P-ext] Regenerate scalar widening zip checks. NFC (#240255)
Regenerate the scalar widening zip checks added in #238758 with
`update_cc_test_checks.py`, preserving the script output for RV32 and
RV64.
[LoopSimplify] Only keep shared llvm.loop metadata on the merged latch (#238256)
When `insertUniqueBackedgeBlock` merges multiple backedges, it moves the
first non-null `!llvm.loop` it finds to the new latch, even if other
backedges have no metadata or different metadata. A loop property such
as `llvm.loop.mustprogress` that only held for one of the backedges then
applies to the whole loop.
Use `L->getLoopID()` instead, which returns the metadata only if all
latches share it.
Split out from #235627.
tools/git/ghpr: retire
The project under the .../ghpr subdirectory is an earlier version of the
tool. A newer/supported iteration of the tool can be found on
[GitHub][ghpr-repo].
`ghpr` can be installed via `pkg`, e.g., `pkg install py312-ghpr-5`.
Please see the [README.md][readme] for further details.
MFC after: 1 month
[ghpr-repo]: https://github.com/bsdimp/ghpr/
[readme]: https://github.com/bsdimp/ghpr/blob/main/README.md
Reviewed by: dteske
Differential Revision: https://reviews.freebsd.org/D61086
capsicum-test: Disable `HAVE_SEND_RECV_MMSG` again
04c4b2084eb9 accidentally added some changes from another WIP commit into that
diff. Instead of wholesale reverting the change, just revert the part that's
currently broken (`HAVE_SEND_RECV_MMSG`). While some of the related tests pass,
one of the testcases (`capmode.cc:AllowedMmsgSendRecv`) doesn't currently pass.
Revert the change to make the CI run more green again.
MFC after: 1 week
Fixes: 04c4b2084eb9 ("capsicum-test: make the code WARNS=6 clean")
SafeStack: Take libcall declarations from RuntimeLibcallsInfo
Stop declaring __stack_chk_fail and __safestack_pointer_address
manually and construct them with the correct type automatically.
A function with the variable's name is now reported as not being a
global variable, rather than a renamed copy of the variable being
inserted. -safestack-use-pointer-address now requires
__safestack_pointer_address to be available for the target, instead of
unconditionally emitting a call to it. The tests using it on
non-Android triples move to Android.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
RuntimeLibcalls: Add helper methods to insert declarations (#240444)
Add methods to get or insert the declaration of a libcall
implementation in a module with the appropriate type and
annotations. A (potentially incorrectly declared) global that already
has the name is returned unmodified
Use them in DeclareRuntimeLibcalls, which no longer merges attributes
into or replaces the calling convention of existing functions, and no
longer crashes on a global variable with the name of a libcall
function.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[SelectionDAG] Don't assume a value from another block is frozen
A virtual register from another block can hold an undefined
value. We can only treat CopyFromReg of a physical register or of a
live-in virtual register as not undef or poison so that a freeze of
a value from another block is kept and selected as FREEZE.
[AMDGPU] Lower FREEZE of i1 in SILowerI1Copies
A FREEZE of a vreg_1 was left as is, which fails the verifier. Freeze
the lane mask, and lower the rest like a copy.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[SelectionDAG] Select the FREEZE target opcode
Selecting freeze as a COPY is wrong if the value may be undefined.
Now we can select ISD::FREEZE as FREEZE instead. Targets that don't
have physical registers can keep selecting COPY since there is no
regalloc to observe the difference.
Fixes #58321, #60429, #144780.
Assisted-By: Claude Opus 5.5 <noreply at anthropic.com>
[AMDGPU] Handle FREEZE like COPY in SIFixSGPRCopies
An SGPR FREEZE of a VGPR value cannot be lowered after register
allocation. We should treat FREEZE like the other single-input pseudos
(WQM and friends) when fixing SGPR copies and when moving instructions to
the VALU, so that its result is moved to a VGPR along with its users.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[CodeGen] Hint to register allocator that FREEZE will become a copy
A FREEZE is lowered to a COPY after register allocation, so we should give
its operands the same allocation hint as a COPY. When both get the same
register, the FREEZE can be removed.
[SelectionDAG] Don't CSE freeze of undef
Each freeze of undef may have its own arbitrary value.
This also folds a bitcast of a one-use frozen undef into a frozen undef.
Assisted-By: Claude Opus 5.5 <noreply at anthropic.com>
[CodeGen] Lower FREEZE of a defined value to COPY
A FREEZE is only needed when its operand may be undefined. FinalizeISel
now turns every other FREEZE into a COPY, right after instruction
selection.
Assisted-By: Claude Opus 5.5 <noreply at anthropic.com>
[X86] Don't let BUILD_VECTOR pick a value for multi-use freeze(undef)
LowerBUILD_VECTOR treats freeze(undef) operands as free to choose. It
folds them to zero, blends in a new freeze, or zeroes them in the upper
half. If the freeze has other users, they may see a different value
than the BUILD_VECTOR does. Only treat a freeze(undef) as free when the
BUILD_VECTOR is its only user, and only zero the upper half when each
one has a single use, so that a freeze used by several lanes keeps one
value.
Assisted-By: Claude Opus 5.5 <noreply at anthropic.com>
[CodeGen] Add FREEZE target opcode
Machine IR equivalent of `freeze` instruction. Unlike COPY,
ProcessImplicitDefs does not turn a `FREEZE` of an `IMPLICIT_DEF` into an
`IMPLICIT_DEF` and the register coalescer does not join it.
After register allocation, a `FREEZE` of a defined value is lowered to a
COPY. A `FREEZE` of an undefined value is kept until code emission, so
that no later pass sees the register as undefined. It emits a comment in
verbose asm (like `IMPLICIT_DEF`).
This PR doesn't select `freeze` -> `FREEZE` yet because there's some work to
do to avoid regressions.
Assisted-By: Claude Opus 5.5 <noreply at anthropic.com>
