[ORC] Start decoupling MangleAndInterner from DataLayout. (#214398)
Previously MangleAndInterner held a DataLayout reference and mangled
names via Mangler::getNameWithPrefix. Replace the stored DataLayout with
an internal ManglingMode enum and mangle from that directly, so the
class no longer needs to hold a DataLayout.
Add two DataLayout-free constructors: one taking an ExecutionSession and
an optional ABI name (deriving the mode from the session's target
triple), and one taking an explicit ManglingMode. The existing
DataLayout constructor is retained, now deriving the mode from the
DataLayout.
This lets MangleAndInterner be used where no DataLayout is available
(e.g. from a bare ExecutionSession).
Adds MangleAndInternerTest covering the triple- and mode-based
construction paths.
[VPlan][NFC] Speed up getVectorLoopRegion() with a last-successor walk (#199437)
Resolves the TODO in VPlan::getVectorLoopRegion() with a mutable cache
on VPlan, shared by both overloads.
Measured on an O3 build of the LLVM test suite (~12k TUs): 3,556,267
hits / 126,196 misses (96.57% hit rate).
[NVVM][NVPTX] Change TMA Tensor reduction ops to use flag for reduction ops (#213638)
Currently, TMA S2G reduction intrinsics use reduction operation in the
name. Now that we have pretty-printing and a range-based verifier (for
ImmArgs) available, this PR migrates the reduction operation to an
immediate flag argument. This simplifies adding Rubin architecture
extensions to this family, while also reducing the number of intrinsics
from 64 to 8.
