LLVM/project be31cffflang/test/Lower/Intrinsics mvbits.f90 move_alloc.f90

[flang][NFC] Converted five tests from old lowering to new lowering (part 37) (#188009)

Tests converted from test/Lower/Intrinsics: minval.f90, modulo.f90,
move_alloc.f90, mvbits.f90, not.f90
DeltaFile
+54-60flang/test/Lower/Intrinsics/mvbits.f90
+29-37flang/test/Lower/Intrinsics/move_alloc.f90
+23-32flang/test/Lower/Intrinsics/minval.f90
+22-16flang/test/Lower/Intrinsics/modulo.f90
+6-4flang/test/Lower/Intrinsics/not.f90
+134-1495 files

OPNSense/core f753abcsrc/opnsense/scripts/kea get_kea_leases.py

Simplify diff
DeltaFile
+0-2src/opnsense/scripts/kea/get_kea_leases.py
+0-21 files

LLVM/project 7152266clang/docs ThreadSafetyAnalysis.rst, clang/lib/Analysis ThreadSafety.cpp

Thread Safety Analysis: Support guarded_by/pt_guarded_by with multiple capabilities (#186838)

Previously, `guarded_by` and `pt_guarded_by` only accepted a single
capability argument. Introduce support for declaring that a variable is
guarded by multiple capabilities, which exploits the following property:
any writer must hold all capabilities, so holding any one of them
(exclusive or shared) guarantees at least shared (read) access.
Therefore, writing requires all listed capabilities to be held
exclusively, while reading only requires at least one to be held.

This synchronization pattern is frequently used where the underlying
lock implementation does not support real reader locking, and instead
several lock "shards" are used to reduce contention for readers. For
example, the Linux kernel makes frequent use of this pattern [1].

Backwards compatibility is not affected by this change: for the time
being we deliberately do not change the semantics of multiple stacked
attributes (this retains existing semantics precisely, while giving a
way to choose the "stricter" semantics if needed).

    [2 lines not shown]
DeltaFile
+63-5clang/lib/Analysis/ThreadSafety.cpp
+54-0clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+30-7clang/docs/ThreadSafetyAnalysis.rst
+34-0clang/lib/Sema/AnalysisBasedWarnings.cpp
+12-15clang/lib/Sema/SemaDeclAttr.cpp
+10-12clang/test/SemaCXX/warn-thread-safety-parsing.cpp
+203-399 files not shown
+244-5315 files

LLVM/project b16efa6mlir/include/mlir/Bindings/Python IRCore.h

[mlir][python] Fix PyObjectRef copy/move assignment for MSVC (#186758)

PyObjectRef has a user-declared move constructor but no explicit
copy/move assignment operators. On at least some version of MSVC,
instantiation of operator= is forced, causing a compile error:

```
In file included from mlir/lib/Bindings/Python/Globals.cpp:9:
In file included from mlir/include/mlir/Bindings/Python/IRCore.h:16:
<MSVC>/include/vector(1461,27): error: object of type 'value_type' (aka 'mlir::python::mlir::PyDiagnostic::DiagnosticInfo') cannot be assigned because its copy assignment operator is implicitly deleted
 1461 |                     *_Mid = *_First;
      |                           ^
<MSVC>/include/vector(1539,9): note: in instantiation of function template specialization 'std::vector<mlir::python::mlir::PyDiagnostic::DiagnosticInfo>::_Assign_counted_range<mlir::python::mlir::PyDiagnostic::DiagnosticInfo *>' requested here
 1539 |         _Assign_counted_range(_Right_data._Myfirst, static_cast<size_type>(_Right_data._Mylast - _Right_data._Myfirst));
      |         ^
mlir/include/mlir/Bindings/Python/IRCore.h(1317,33): note: in instantiation of member function 'std::vector<mlir::python::mlir::PyDiagnostic::DiagnosticInfo>::operator=' requested here
 1317 | struct MLIR_PYTHON_API_EXPORTED MLIRError {
      |                                 ^
mlir/include/mlir/Bindings/Python/IRCore.h(369,16): note: copy assignment operator of 'DiagnosticInfo' is implicitly deleted because field 'location' has a deleted copy assignment operator

    [20 lines not shown]
DeltaFile
+12-0mlir/include/mlir/Bindings/Python/IRCore.h
+12-01 files

LLVM/project 7bda811clang/lib/AST/ByteCode Interp.cpp

[clang][bytecode] Disable tailcalls on aarch64 (#188042)

Apparently it causes problems there, too.
See https://lab.llvm.org/buildbot/#/builders/24/builds/18781
DeltaFile
+3-1clang/lib/AST/ByteCode/Interp.cpp
+3-11 files

LLVM/project a977522llvm/include/llvm/Support NVVMAttributes.h, llvm/lib/IR AutoUpgrade.cpp

[NVPTX] Canonicalize NVVM attribute strings and refactor property queries (NFC) (#187752)
DeltaFile
+53-36llvm/lib/Target/NVPTX/NVVMProperties.cpp
+10-57llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
+33-0llvm/include/llvm/Support/NVVMAttributes.h
+17-11llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+13-8mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
+8-7llvm/lib/IR/AutoUpgrade.cpp
+134-1196 files not shown
+161-14012 files

LLVM/project 293e022clang/test/CodeGenHLSL/resources Texture2D-Subscript.hlsl

Fix tests after merge. Remove checks for alignment. Not important for the test.
DeltaFile
+38-38clang/test/CodeGenHLSL/resources/Texture2D-Subscript.hlsl
+38-381 files

OPNSense/core 2c9b906src/opnsense/mvc/app/views/OPNsense/Kea leases4.volt leases6.volt

Forgot to declare button correctly after renaming it
DeltaFile
+1-1src/opnsense/mvc/app/views/OPNsense/Kea/leases4.volt
+1-1src/opnsense/mvc/app/views/OPNsense/Kea/leases6.volt
+2-22 files

OPNSense/core 3f01ab8src/opnsense/scripts/kea get_kea_leases.py

Improve lease collection via socket, detect automatically if socket is unavailable and fall back to cvs parsing
DeltaFile
+77-37src/opnsense/scripts/kea/get_kea_leases.py
+77-371 files

FreeNAS/freenas ca87d33src/freenas/usr/local/share/truenas eula.html

new EULA
DeltaFile
+582-252src/freenas/usr/local/share/truenas/eula.html
+582-2521 files

LLVM/project 65d9780llvm/lib/Target/AMDGPU VOP3PInstructions.td SIFoldOperands.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3

Codegen for v_dual_dot2acc_f32_f16/bf16 for targets that only have VOP3
version of the instruction.
Since there is no VOP2 version, instroduce temporary mir DOT2ACC pseudo
that is selected when there are no src_modifiers. This DOT2ACC pseudo
has src2 tied to dst (like the VOP2 version), PostRA pseudo expansion will
restore pseudo to VOP3 version of the instruction.
CreateVOPD will recoginize such VOP3 pseudo and generate v_dual_dot2acc.
DeltaFile
+170-312llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+96-95llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+31-4llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+21-8llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+27-0llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+19-1llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+364-4204 files not shown
+383-42210 files

LLVM/project 9443404llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp VOP2Instructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.fdot2.ll llvm.amdgcn.fdot2.f32.bf16.ll

AMDGPU: Improve codegen for VOP2 v_dot2c_f32_f16/bf16

Select VOP2 version when there are no src_modifers, otherwise VOP3
DeltaFile
+64-212llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+12-60llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
+20-48llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+32-2llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+14-12llvm/lib/Target/AMDGPU/VOP2Instructions.td
+22-0llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+164-3344 files not shown
+181-33410 files

OPNSense/core 42f04c3src/opnsense/mvc/app/controllers/OPNsense/Kea/Api LeasesController.php

Improve detection if kea control agent socket is not running correctly
DeltaFile
+4-3src/opnsense/mvc/app/controllers/OPNsense/Kea/Api/LeasesController.php
+4-31 files

HardenedBSD/src f74d583sys/x86/cpufreq hwpstate_amd.c, tools/test/stress2/misc syzkaller95.sh syzkaller98.sh

Merge remote-tracking branch 'origin/freebsd/current/main' into hardened/current/master
DeltaFile
+453-0tools/test/stress2/misc/syzkaller95.sh
+268-0tools/test/stress2/misc/syzkaller98.sh
+265-0tools/test/stress2/misc/syzkaller92.sh
+228-0tools/test/stress2/misc/syzkaller90.sh
+149-78sys/x86/cpufreq/hwpstate_amd.c
+217-0tools/test/stress2/misc/syzkaller91.sh
+1,580-7827 files not shown
+2,550-10133 files

LLVM/project 5b7ad38llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 trunc-insertion.ll icmp-wrong-bitwidth.ll

[SLP]Fix codegen of compares with consts, being trunced

If the const values have more active bits, than requested by the another
operand of the compare, such constants should not be trunced to avoid
miscompilation
DeltaFile
+13-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+2-1llvm/test/Transforms/SLPVectorizer/AArch64/trunc-insertion.ll
+1-1llvm/test/Transforms/SLPVectorizer/AArch64/icmp-wrong-bitwidth.ll
+16-43 files

LLVM/project bbf6c89clang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp teams_distribute_parallel_for_simd_schedule_codegen.cpp, libc/AOR_v20.02/math/test/traces sincosf.txt exp.txt

Merge branch 'main' into users/s-perron/texture2d-subscript-operator
DeltaFile
+0-31,999libc/AOR_v20.02/math/test/traces/sincosf.txt
+0-16,000libc/AOR_v20.02/math/test/traces/exp.txt
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+5,208-5,214llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+5,294-4,814clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+5,238-4,758clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+22,575-69,5836,106 files not shown
+423,742-312,1726,112 files

LLVM/project 9f23e67clang/lib/Sema HLSLExternalSemaSource.cpp HLSLBuiltinTypeDeclBuilder.h

Changes based on the code review.
DeltaFile
+6-6clang/lib/Sema/HLSLExternalSemaSource.cpp
+2-1clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
+1-2clang/lib/Sema/SemaHLSL.cpp
+9-93 files

FreeBSD/src fce6921tests/sys/capsicum linux.cc

Revert "capsicum-test: remove stale file"

This was unintended, sorry.

This reverts commit 20b99e3a147963c6ef715112bd38e349c7a5a459.
DeltaFile
+1,500-0tests/sys/capsicum/linux.cc
+1,500-01 files

LLVM/project 0340544llvm/lib/Target/AMDGPU VOP3PInstructions.td AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.fdot2.ll llvm.amdgcn.fdot2.f32.bf16.ll

AMDGPU: Fix src2_modifiers for v_dot2_f32_f16/bf16 (#179224)
DeltaFile
+114-49llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll
+14-21llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+23-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+6-9llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+13-0llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+9-0llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+179-845 files not shown
+192-8611 files

LLVM/project a90f583.github/workflows zizmor.yml

[Workflows] Add Zizmor check (#187905)

The recent Trivy breach[^1] made me consider re-opening #117787.

Trivy was breached using an impostor commit[^2], which Zizmor can flag.

It's also much more widely used since my last PR.[^3]

The new workflow was taken from the example workflow in their
documentation.[^4]

[^1]: https://github.com/aquasecurity/trivy/discussions/10425
[^2]: https://docs.zizmor.sh/audits/#impostor-commit
[^3]: https://docs.zizmor.sh/trophy-case/
[^4]: https://docs.zizmor.sh/integrations/#via-zizmorcorezizmor-action
DeltaFile
+29-0.github/workflows/zizmor.yml
+29-01 files

LLVM/project 5cb1c60llvm/include/llvm/ADT StringSwitch.h, llvm/unittests/ADT StringSwitchTest.cpp

[ADT] Add predicate based match support to StringSwitch

This introduces `Predicate` and `IfNotPredicate` case selection to
StringSwitch to allow use cases like

```
StringSwitch<...>(..)
  .Case("foo", FooTok)
  .Predicate(isAlpha, IdentifierTok)
...
```

This is mostly useful for improving conciseness and clarity when
processing generated strings, diagnostics, and similar.
DeltaFile
+69-0llvm/unittests/ADT/StringSwitchTest.cpp
+32-0llvm/include/llvm/ADT/StringSwitch.h
+101-02 files

LLVM/project bd46a7d.github/workflows libcxx-build-and-test.yaml bazel-checks.yml

[Workflows] Set `persist-credentials` (#187951)

This is needed for #187905. Unless we disable the check, Zizmor will
flag uses of `actions/checkout` without an explicit
`persist-credentials` setting.

Of course, some workflows could rely on the credentials persisted by
`actions/checkout`. I asked Claude to check each affected job, and it
flagged only `prune-branches.yml`. The script `prune-unused-branches.py`
relies on the persisted credentials, so I've left that as
`persist-credentials: true` for now.
DeltaFile
+10-0.github/workflows/libcxx-build-and-test.yaml
+4-0.github/workflows/bazel-checks.yml
+4-0.github/workflows/release-tasks.yml
+4-0.github/workflows/release-binaries.yml
+3-1.github/workflows/libc-fullbuild-tests.yml
+4-0.github/workflows/hlsl-test-all.yaml
+29-139 files not shown
+88-145 files

FreeBSD/ports 8c69c21ftp/R-cran-RCurl distinfo Makefile

ftp/R-cran-RCurl: Update to 1.98-1.18

Reported by:    portscout
DeltaFile
+3-3ftp/R-cran-RCurl/distinfo
+1-2ftp/R-cran-RCurl/Makefile
+4-52 files

FreeNAS/freenas cc81413

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files

FreeNAS/freenas 054225csrc/middlewared/middlewared/plugins/update_ trains.py, src/middlewared/middlewared/pytest/unit/plugins/update test_trains.py

NAS-140367 / 25.10.2.2 / Allow the trains to be marked as unstable to make "the system can be upgraded only to the next train" constraint feasible (#18530)

The update design says that "the system can be upgraded only to the next
train". This constraint turned out to be too strict.

Currently, the trains are as follows
```
  "TrueNAS-SCALE-Goldeye": {
   "description": "TrueNAS SCALE Goldeye 25.10"
  },
  "TrueNAS-SCALE-Halfmoon-Nightlies": {
   "description": "TrueNAS SCALE Halfmoon 26.04 Nightlies [developer only]"
  },
  "TrueNAS-26-Nightlies": {
   "description": "TrueNAS 26 Nightlies [developer only]"
  },
  "TrueNAS-26-BETA": {
   "description": "TrueNAS 26 BETA"
  }

    [51 lines not shown]
DeltaFile
+63-1src/middlewared/middlewared/pytest/unit/plugins/update/test_trains.py
+26-7src/middlewared/middlewared/plugins/update_/trains.py
+89-82 files

LLVM/project a7efdebflang/include/flang/Parser tools.h openmp-utils.h, flang/lib/Parser tools.cpp openmp-utils.cpp

[flang] Accept label DO loop after !$ACC LOOP (#187581)

Extend Semantics/canonicalize-do.cpp to rewrite a label DO loop into a
DO construct in the parse tree even when its terminal statement is an
OpenACC block construct or atomic construct. Some tools were relocated
from Parser/openmp-utils.{h,cpp} to /tools.{h,cpp}.
DeltaFile
+80-0flang/lib/Parser/tools.cpp
+0-57flang/lib/Parser/openmp-utils.cpp
+20-0flang/test/Semantics/bug2436.f
+14-0flang/include/flang/Parser/tools.h
+11-2flang/lib/Semantics/resolve-labels.cpp
+0-11flang/include/flang/Parser/openmp-utils.h
+125-702 files not shown
+135-718 files

FreeBSD/src 09c5bb3sys/dev/nvmf/controller nvmft_controller.c

nvmf: Fix null ptr reference

Reported by:    Nikolay Denev <ndenev at gmail.com>
Reviewed by:    imp, jhb
Differential Revision:  https://reviews.freebsd.org/D55863
DeltaFile
+1-1sys/dev/nvmf/controller/nvmft_controller.c
+1-11 files

OPNSense/core 8738c55src/opnsense/mvc/app/views/OPNsense/Kea leases4.volt leases6.volt

Adjust deleteBtn event binding
DeltaFile
+27-28src/opnsense/mvc/app/views/OPNsense/Kea/leases4.volt
+27-28src/opnsense/mvc/app/views/OPNsense/Kea/leases6.volt
+54-562 files

FreeBSD/src 20b99e3tests/sys/capsicum linux.cc

capsicum-test: remove stale file
DeltaFile
+0-1,500tests/sys/capsicum/linux.cc
+0-1,5001 files

LLVM/project 75ac07dlibc/src/__support/math asinf.h inv_trigf_utils.h

[libc][math] Use Estrin's scheme to improve asinf and acosf performance. (#187885)
DeltaFile
+11-47libc/src/__support/math/asinf.h
+20-11libc/src/__support/math/inv_trigf_utils.h
+3-3libc/src/__support/math/acosf.h
+34-613 files