LLVM/project cdd674allvm/test/CodeGen/AMDGPU dynamic_stackalloc.ll, llvm/test/CodeGen/X86 i128-udiv.ll

Merge branch 'main' into users/kasuga-fj/da-extract-reverse-logic
DeltaFile
+4,523-0llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/arithmetic.test
+3,703-0llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/fp.test
+2,113-1,374llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
+3,123-0llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/vlseg-vsseg.test
+2,875-0llvm/test/tools/llvm-mca/RISCV/SiFiveX100/rvv/bitwise.test
+2,859-7llvm/test/CodeGen/X86/i128-udiv.ll
+19,196-1,3812,268 files not shown
+135,991-43,9512,274 files

FreeBSD/src 8d99314etc/mtree BSD.debug.dist BSD.tests.dist

mtree: Add missing entries

Add missing mtree directory entries.  Without them, the resulting
worldstage METALOG file would produce an invalid (incomplete) mtree
specification file.

Reviewed by:    ivy
Differential Revision:  https://reviews.freebsd.org/D56013
DeltaFile
+8-0etc/mtree/BSD.debug.dist
+4-0etc/mtree/BSD.tests.dist
+12-02 files

FreeBSD/ports 6593aefgraphics/graphviz pkg-plist Makefile

graphics/graphviz: update to 14.1.4

new option ASCII
DeltaFile
+16-12graphics/graphviz/pkg-plist
+12-5graphics/graphviz/Makefile
+3-3graphics/graphviz/distinfo
+31-203 files

LLVM/project f1e2b70llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

Handle non-simple EVT in isSupportedReciprocalEstimateType

Created using spr 1.3.7
DeltaFile
+4-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+4-01 files

OpenBSD/ports zh6PaBminputmethods/fcitx-chinese-addons Makefile, inputmethods/fcitx-hangul Makefile

   Remove maintainer per diff on ports (+ revision bumps)
VersionDeltaFile
1.22+4-6textproc/libmarisa/Makefile
1.13+1-3inputmethods/libime/Makefile
1.7+1-3inputmethods/xcb-imdkit/Makefile
1.12+1-3inputmethods/fcitx-chinese-addons/Makefile
1.7+1-3inputmethods/fcitx-hangul/Makefile
1.10+1-3inputmethods/fcitx-qt/Makefile
+9-2112 files not shown
+21-4718 files

FreeBSD/ports b0d83b7sysutils/appjail-devel distinfo Makefile

sysutils/appjail-devel: Update to 4.10.1.20260323

ChangeLog:
https://github.com/DtxdF/AppJail/commits/8322f842fa9bdec3645a38c714444fe2adf6efbb/

MFH:    2026Q1
(cherry picked from commit ea35660acba7b3c97f071c73202667882ac14c1d)
DeltaFile
+3-3sysutils/appjail-devel/distinfo
+2-2sysutils/appjail-devel/Makefile
+5-52 files

FreeBSD/ports 88685a0sysutils/appjail distinfo Makefile

sysutils/appjail: Update to 4.10.1

ChangeLog: https://github.com/DtxdF/AppJail/releases/tag/v4.10.1

MFH:    2026Q1
(cherry picked from commit e2b6ec2133ed98b52adaaecaae5814bb4cf63d3c)
DeltaFile
+3-3sysutils/appjail/distinfo
+1-1sysutils/appjail/Makefile
+4-42 files

FreeBSD/ports ea35660sysutils/appjail-devel distinfo Makefile

sysutils/appjail-devel: Update to 4.10.1.20260323

ChangeLog:
https://github.com/DtxdF/AppJail/commits/8322f842fa9bdec3645a38c714444fe2adf6efbb/

MFH:    2026Q1
DeltaFile
+3-3sysutils/appjail-devel/distinfo
+2-2sysutils/appjail-devel/Makefile
+5-52 files

FreeBSD/ports e2b6ec2sysutils/appjail distinfo Makefile

sysutils/appjail: Update to 4.10.1

ChangeLog: https://github.com/DtxdF/AppJail/releases/tag/v4.10.1

MFH:    2026Q1
DeltaFile
+3-3sysutils/appjail/distinfo
+1-1sysutils/appjail/Makefile
+4-42 files

LLVM/project 5efb3ddllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fmin.ll llvm.amdgcn.reduce.fmax.ll

[AMDGPU] DPP implementations for Wave Reduction (#187214)

Add support for DPP wave reduction for floating
point numbers.
Supported Ops: `fmin`, `fmax`, `fadd`, `fsub`.
DeltaFile
+693-234llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+693-234llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+600-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+589-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+49-25llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,624-7535 files

HardenedBSD/ports 5d922aemisc/R-cran-xfun distinfo Makefile, sysutils/appjail distinfo Makefile

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+3-3misc/R-cran-xfun/distinfo
+3-3sysutils/appjail/distinfo
+3-3sysutils/appjail-devel/distinfo
+2-2sysutils/appjail-devel/Makefile
+1-1misc/R-cran-xfun/Makefile
+1-1sysutils/appjail/Makefile
+13-136 files

LLVM/project 054e11dclang/lib/AST/ByteCode Program.cpp, clang/test/AST/ByteCode lambda.cpp

[clang][bytecode] Create descriptor for invalid record fields (#187311)

We otherwise refuse to register the Record for the RecordDecl entirely.
DeltaFile
+16-1clang/test/AST/ByteCode/lambda.cpp
+1-1clang/lib/AST/ByteCode/Program.cpp
+17-22 files

OpenBSD/ports C21oyWbmail/sylpheed Makefile, mail/sylpheed/patches patch-libsylph_ssl_hostname_validation_c

   sylpheed: avoid direct ASN1_STRING accesses

   ok sthen (Jan 28), maintainer timeout
VersionDeltaFile
1.1+33-0mail/sylpheed/patches/patch-libsylph_ssl_hostname_validation_c
1.132+1-1mail/sylpheed/Makefile
+34-12 files

HardenedBSD/src e23f0deshare/man/man7 security.7, usr.bin/mdo mdo.1

mdo.1: Cross-reference with security.7

MFC after:      3 days
Reviewed by:    olce
Differential Revision:  https://reviews.freebsd.org/D56024
DeltaFile
+3-2usr.bin/mdo/mdo.1
+2-1share/man/man7/security.7
+5-32 files

FreeBSD/src e23f0deshare/man/man7 security.7, usr.bin/mdo mdo.1

mdo.1: Cross-reference with security.7

MFC after:      3 days
Reviewed by:    olce
Differential Revision:  https://reviews.freebsd.org/D56024
DeltaFile
+3-2usr.bin/mdo/mdo.1
+2-1share/man/man7/security.7
+5-32 files

LLVM/project 036b755lld/ELF Writer.cpp

[ELF] Parallelize demoteAndCopyLocalSymbols. NFC (#187970)

Use parallelFor to process files in parallel, collecting Symbol*
pointers per-file, then merge into the symbol table serially.

Linking clang-14 (208K .symtab entries) is 1.04x as fast.
DeltaFile
+9-4lld/ELF/Writer.cpp
+9-41 files

OpenBSD/ports pShjhOSgames/classicube Makefile

   Fix outdated comment.

   From izzy Meyer (MAINTAINER)
VersionDeltaFile
1.7+1-1games/classicube/Makefile
+1-11 files

OpenBSD/ports BqhSDcUgames/stone-soup Makefile

   Respect CFLAGS and enable debug packages.

   ok Stefan Moran (MAINTAINER)
VersionDeltaFile
1.54+12-2games/stone-soup/Makefile
+12-21 files

OpenBSD/ports sDIljm1sysutils/exfetch Makefile, sysutils/exfetch/patches patch-Makefile

   Enable exfetch debug package.

   ok izzy Meyer (MAINTAINER)
VersionDeltaFile
1.3+6-6sysutils/exfetch/patches/patch-Makefile
1.7+3-0sysutils/exfetch/Makefile
+9-62 files

HardenedBSD/ports 4ef34ccmisc/R-cran-xfun distinfo Makefile

misc/R-cran-xfun: Update to 0.57

Changelog: https://github.com/yihui/xfun/releases/tag/v0.57
DeltaFile
+3-3misc/R-cran-xfun/distinfo
+1-1misc/R-cran-xfun/Makefile
+4-42 files

FreeBSD/ports 4ef34ccmisc/R-cran-xfun distinfo Makefile

misc/R-cran-xfun: Update to 0.57

Changelog: https://github.com/yihui/xfun/releases/tag/v0.57
DeltaFile
+3-3misc/R-cran-xfun/distinfo
+1-1misc/R-cran-xfun/Makefile
+4-42 files

LLVM/project c911b84clang-tools-extra/docs/clang-tidy/checks/misc multiple-inheritance.rst

[clang-tidy][NFC] Remove guidelines in documentation of misc-multiple-inheritance (#186657)

Closes https://github.com/llvm/llvm-project/issues/186058
DeltaFile
+0-5clang-tools-extra/docs/clang-tidy/checks/misc/multiple-inheritance.rst
+0-51 files

SmartOS/live a250fc1src/vm/node_modules proptable.js VM.js

Lose virtio09 and put a stake where new-VMs-get-virtio1 may happen
DeltaFile
+0-10src/vm/node_modules/proptable.js
+1-0src/vm/node_modules/VM.js
+1-102 files

LLVM/project 95c906aclang-tools-extra/clangd ModulesBuilder.cpp, clang-tools-extra/clangd/unittests PrerequisiteModulesTest.cpp

[clangd] [C++ Modules] Fix handling of relative paths in prebuilt mod… (#187654)

…ule files

When compile_commands.json contains relative paths in -fmodule-file=
arguments (as generated by CMake), clangd failed to find the BMI files
because it was looking for them relative to the wrong working directory.

This patch fixes the issue by converting relative paths to absolute
paths based on the compilation directory (CompileCommand.Directory)
before checking if the module file exists and is up to date.

Added a unit test that verifies the fix works correctly.

AI Assisted
DeltaFile
+85-0clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
+11-3clang-tools-extra/clangd/ModulesBuilder.cpp
+96-32 files

LLVM/project 98fe2fbllvm/lib/Target/Mips MipsInstrFPU.td MipsSEISelLowering.cpp, llvm/test/CodeGen/Mips r5900-fpu-compare.ll r5900-fpu-softfloat.ll

[Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (#178942)

This PR adds basic FPU support for the MIPS R5900 processor used in the
PlayStation 2 Emotion Engine. The R5900 has a non-standard
single-precision-only FPU with limited functionality compared to
standard MIPS FPUs. Just like the previous r5900 PR, only existing
instructions are used to implement basic support first.

## Changes

### Infrastructure for single-precision-only FPU (ce13ddea7bc7)
- Add `isSingleFloat()` method to MipsAsmParser
- Add `SINGLE` FpABIKind to MipsABIFlagsSection
- Properly set CPR1Size and FpABI for single-float mode
- Exclude double-precision PseudoCVT instructions when using
single-float

### R5900 FPU support (13032c4d55b2)
- Switch R5900 from soft-float to single-float mode

    [29 lines not shown]
DeltaFile
+291-0llvm/test/CodeGen/Mips/r5900-fpu-compare.ll
+150-0llvm/test/MC/Mips/r5900-fpu.s
+81-42llvm/lib/Target/Mips/MipsInstrFPU.td
+118-0llvm/test/MC/Mips/r5900-invalid.s
+79-0llvm/test/CodeGen/Mips/r5900-fpu-softfloat.ll
+58-0llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+777-428 files not shown
+851-4614 files

LLVM/project 5ef593bclang-tools-extra/clangd ModulesBuilder.cpp, clang-tools-extra/clangd/unittests PrerequisiteModulesTest.cpp

[clangd] [C++ Modules] Enable content validation for module input files (#187653)

The IsModuleFileUpToDate function was not properly validating input
files for C++20 modules. By default, ASTReader skips input file
validation for StandardCXXModule files unless
ForceCheckCXX20ModulesInputFiles and ValidateASTInputFilesContent are
both set.

This change:
- Passes ValidateASTInputFilesContent=true to ASTReader constructor
- Uses ARR_OutOfDate flag for cleaner error handling
- Simplifies the validation logic (ReadAST already validates internally)
- Adds a test to verify header changes in module units are detected

Assised with AI.
DeltaFile
+72-0clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
+18-18clang-tools-extra/clangd/ModulesBuilder.cpp
+90-182 files

LLVM/project dc4df5dlld/ELF SyntheticSections.cpp SyntheticSections.h, lld/test/ELF combreloc.s

[ELF] Always separate relative relocations regardless of -z combreloc (#187964)

Remove the combreloc guard from addReloc and mergeRels so that
relative relocations are always routed to relativeRelocs, even with -z
nocombreloc or --pack-dyn-relocs=android.

Update AndroidPackedRelocationSection::updateAllocSize to iterate
both relativeRelocs and relocs.
DeltaFile
+16-15lld/ELF/SyntheticSections.cpp
+1-1lld/test/ELF/combreloc.s
+1-1lld/ELF/SyntheticSections.h
+18-173 files

LLVM/project 8f8b53alld/ELF Driver.cpp, lld/test/ELF aarch64-feature-gcs.s

[LLD] [ELF] Make -z gcs=always implicitly warn on missing GCS, like force-bti (#186203)

This matches GNU ld, where gcs=always makes it implicitly warn about
missing GCS flags, by matching the existing code pattern used for BTI
and IBT.

Also test that warnings can be printed for both missing BTI and GCS for
the same object file.

This fixes #186173.

(cherry picked from commit 887d2d4bf7380113b27f199f323eeee883f17191)
DeltaFile
+11-2lld/test/ELF/aarch64-feature-gcs.s
+7-0lld/ELF/Driver.cpp
+18-22 files

LLVM/project 8efb87allvm/lib/Target/RISCV RISCVInstrInfo.td RISCVInstrInfoXqci.td, llvm/lib/Target/RISCV/MCTargetDesc RISCVMCCodeEmitter.cpp RISCVAsmBackend.cpp

[RISCV] Relax out of range Zibi conditional branches (#186965)

If `.Label` is not within +-4KiB range, we convert

```
beqi/bnei reg, imm, .Label
```

to

```
bnei/beqi reg, imm, 8
j .Label
```

This is similar to what is done for the RISCV conditional branches
and `Xqcibi` conditional branches.

---------

    [2 lines not shown]
DeltaFile
+110-0llvm/test/MC/RISCV/zibi-long-conditional-jump.s
+14-0llvm/lib/Target/RISCV/RISCVInstrInfo.td
+0-13llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+10-3llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+6-0llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
+5-0llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
+145-166 files

LLVM/project 94411c9llvm/lib/Target/SystemZ SystemZISelLowering.cpp, llvm/test/CodeGen/SystemZ is_fpclass.ll

[SystemZ] Remove custom lowering of f16 IS_FPCLASS (#187532)

As pointed out in #187518 , currently, `__builtin_isnormal` returns
`true` for subnormal half precision floating point numbers on `s390x.

This is because there is a custom lowering defined which lowers an `f16`
`IS_FPCLASS` ISD node by extending the `f16` value to `f32`, and then
using SystemZ's "test data class" instruction to determine whether the
number is subnormal. However, a number that is subnormal in 16 bits of
precision will no longer be subnormal in 32 bits of precision, and so
the test always returns true, i.e. all subnormal numbers are classified
as normal.

This PR addresses this by removing the custom lowering and instead
relying on the generic expansion of `IS_FPCLASS`, which does not have
this error.

Fixes #187518 .

(cherry picked from commit 6eb5ac52ca56fd31c41a619a14093430b27132c3)
DeltaFile
+84-10llvm/test/CodeGen/SystemZ/is_fpclass.ll
+1-3llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+85-132 files