OpenZFS/src 242105fmodule/zfs dnode_sync.c

dnode_sync: Relax constraint on indirect freeing

One of the roles of the dnode sync thread is freeing.  There are two
modes of this operation: freeing a portion of an object, and freeing
the object itself.

Freeing is handled by `free_children()`.  This function verifies that
if the dnode has children there must be at least one marked as dirty
before proceeding to recursively free the tree of block pointers.

As described in a comment, this VERIFY is overly strict.  In practice,
children may not be marked as dirty when the dnode itself is being
freed.  Relax the VERIFY slightly by avoiding the VERIFY when indirect
blocks are to be immediately freed, to more closely match the comment
motivating the VERIFY.

While here, clarify the logic of the test by using VERIFY_IMPLY instead
of chaining multiple tests.


    [5 lines not shown]
DeltaFile
+6-3module/zfs/dnode_sync.c
+6-31 files

OpenZFS/src f559998lib/libspl/include assert.h

libspl: Implement VERIFY_IMPLY and VERIFY_EQUIV

The libspl debug header is missing VERIFY_IMPLY and VERIFY_EQUIV macros
and instead directly implements IMPLY and EQUIV.  Break out the VERIFY
definitions to match the kernel macros and facilitate code sharing
between kernel and userland.

Sponsored-by: Cybersecure Pty Ltd
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Ryan Moeller <ryan.moeller at klarasystems.com>
Closes #18822
DeltaFile
+9-5lib/libspl/include/assert.h
+9-51 files

LLVM/project 64bc006mlir/lib/CAPI/IR IR.cpp

braces

The 1:N conversion callback returned MlirLogicalResult, which the binding
could only map to success or nullopt (try-another), leaving the C++
failure() state (fail without trying another conversion) unreachable.

Return a MlirTypeConverterConversionStatus enum instead, with Success,
Failure, and Declined states mapped to success(), failure(), and
std::nullopt respectively. Add a test covering the hard-failure path.
DeltaFile
+2-1mlir/lib/CAPI/IR/IR.cpp
+2-11 files

LLVM/project 6e70cfbmlir/test/CAPI ir.c

[mlir-c] Strengthen testGetParentWithName coverage

Address review feedback: the previous IR chain
(arith.constant -> func.func -> builtin.module) had each queried name
appear exactly once, so an implementation returning the outermost match
instead of the nearest would still pass. Use nested modules so
builtin.module appears twice in the ancestor chain, assert the walk
returns the inner (nearest) module, and add a boundary case for a
top-level op whose parent is null.
DeltaFile
+33-8mlir/test/CAPI/ir.c
+33-81 files

LLVM/project 516a328llvm/lib/Target/NVPTX NVPTXFrameLowering.cpp NVPTXAsmPrinter.cpp, llvm/test/CodeGen/NVPTX peephole-cvta-local-short-ptr.mir short-ptr.ll

[NVPTX] Respect local pointer width for %SPL (#211656)
DeltaFile
+22-13llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
+26-0llvm/test/CodeGen/NVPTX/peephole-cvta-local-short-ptr.mir
+17-0llvm/test/CodeGen/NVPTX/short-ptr.ll
+6-7llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+3-3llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp
+5-0llvm/lib/Target/NVPTX/NVPTXPeephole.cpp
+79-231 files not shown
+81-257 files

LLVM/project 936e081mlir/include/mlir-c IR.h, mlir/lib/CAPI/IR IR.cpp

[mlir-c] Add mlirOperationGetParentWithName
DeltaFile
+50-0mlir/test/CAPI/ir.c
+10-0mlir/lib/CAPI/IR/IR.cpp
+6-0mlir/include/mlir-c/IR.h
+66-03 files

OpenBSD/ports 8qCLCUzgraphics/dia-gtk2 Makefile

   dia-gtk2 uses C++ so must have ports-gcc to build on sparc64
VersionDeltaFile
1.3+3-0graphics/dia-gtk2/Makefile
+3-01 files

OpenBSD/ports 3aWXfOyx11/gnome/localsearch Makefile

   base-gcc errors out with
   wrong number of arguments specified for 'deprecated' attribute

   Move to ports-gcc to fix build on sparc64
VersionDeltaFile
1.15+4-0x11/gnome/localsearch/Makefile
+4-01 files

OpenBSD/ports M3fR5gWgeo/libchamplain Makefile

   base-gcc errors with "No option -Wincompatible-pointer-types"

   Switch to ports-gcc to fix build on sparc64
VersionDeltaFile
1.50+4-0geo/libchamplain/Makefile
+4-01 files

LLVM/project 2e32c6cclang-tools-extra/clang-tidy/performance ExpensiveValueOrCheck.cpp ExpensiveValueOrCheck.h, clang-tools-extra/docs/clang-tidy/checks/performance expensive-value-or.md

[clang-tidy] Add performance-expensive-value-or check (#200166)

Finds calls to `value_or` (and alternative spellings `valueOr`,
`ValueOr`) on optional types where the return type is expensive to copy.
Objects not trivially copyable, or larger than a configurable size threshold
are treated as expensive.
Rationale: While `value` and `operator*` return references, `value_or` for
these types always returns by value.
DeltaFile
+246-0clang-tools-extra/test/clang-tidy/checkers/performance/expensive-value-or.cpp
+182-0clang-tools-extra/clang-tidy/performance/ExpensiveValueOrCheck.cpp
+71-0clang-tools-extra/docs/clang-tidy/checks/performance/expensive-value-or.md
+42-0clang-tools-extra/clang-tidy/performance/ExpensiveValueOrCheck.h
+41-0clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/optional
+24-0clang-tools-extra/test/clang-tidy/checkers/performance/expensive-value-or-size-threshold.cpp
+606-07 files not shown
+627-013 files

LLVM/project 68d7f7bmlir/include/mlir/Dialect/EmitC/Transforms Passes.td Transforms.h, mlir/lib/Dialect/EmitC/Transforms WrapFuncInClass.cpp

[mlir][EmitC] Add `class-name-format` option to `wrap-emitc-func-in-class` pass (#211147)

Added the `class-name-format` option that takes a format string used to
generate the wrapper class name.

This provides greater control over the generated `ClassOp` name. When
multiple identically structured IR files need to be programmatically
lowered with this pass and linked, there will be naming conflicts which
this patch provides a method of resolution for.
DeltaFile
+14-6mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
+17-0mlir/test/Dialect/EmitC/wrap-func-in-class.mlir
+5-1mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
+1-1mlir/include/mlir/Dialect/EmitC/Transforms/Transforms.h
+37-84 files

LLVM/project 525aa54llvm/test/CodeGen/AMDGPU maximumnum.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

Merge branch 'main' into users/ziqingluo/PR-171209196
DeltaFile
+23,904-12llvm/test/CodeGen/RISCV/clmul.ll
+9,414-9,234llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+7,009-6,937llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+13,068-0llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
+5,819-5,824llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+5,588-5,406llvm/test/CodeGen/AMDGPU/maximumnum.ll
+64,802-27,41314,592 files not shown
+565,466-358,54514,598 files

LLVM/project fee5637clang/lib/Analysis ThreadSafety.cpp

address comments
DeltaFile
+7-5clang/lib/Analysis/ThreadSafety.cpp
+7-51 files

NetBSD/pkgsrc K9tEQXPdoc CHANGES-2026

   doc: Updated www/py-postorius to 1.3.13nb3
VersionDeltaFile
1.4714+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc oce8l5uwww/py-postorius Makefile

   py-postorius: update to 1.3.13nb3.

   Depend on py-readme_renderer with markdown support.
   Remove obsolete dependency (used by py-readme_renderer
   before cormak).

   Bump PKGREVISION.
VersionDeltaFile
1.8+3-6www/py-postorius/Makefile
+3-61 files

LLVM/project c231e00mlir/lib/Dialect/OpenACC/Utils OpenACCUtilsLoop.cpp, mlir/test/Dialect/OpenACC acc-compute-lowering-loop.mlir

[OpenACC] set CollapseCountAttr for scf.parallel (#211676)

During compute lowering, also set the collapse count attribute when
creating scf.parallel ops from acc.loop ops. While this collapse count
is implied by the number of IVs, later canonicalizations may use this
information to decide whether or not to collapse the loop nest further
DeltaFile
+28-0mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
+1-0mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
+29-02 files

LLVM/project df08f50llvm/lib/Target/AMDGPU AMDGPURegBankCombiner.cpp AMDGPUCombine.td, llvm/test/CodeGen/AMDGPU packed-fp64.ll

[AMDGPU][GlobalISel] Fold redundant uniform G_AMDGPU_READANYLANE in RegBankCombiner
DeltaFile
+45-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-redundant-readanylane.mir
+33-0llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+10-1llvm/lib/Target/AMDGPU/AMDGPUCombine.td
+4-4llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+92-54 files

LLVM/project 9669c3allvm/lib/Target/AArch64 AArch64PointerAuth.cpp, llvm/test/CodeGen/AArch64 pauth-lr-tail-call-fpdiff.ll sign-return-address-pauth-lr.ll

[llvm][AArch64] Enable .cfi_set_ra_state by default for PAuth_LR: (#209944)
DeltaFile
+48-24llvm/test/CodeGen/AArch64/pauth-lr-tail-call-fpdiff.ll
+35-35llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+34-34llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr-mir.ll
+18-9llvm/test/CodeGen/AArch64/swifttail-ptrauth.ll
+4-4llvm/test/CodeGen/AArch64/sign-return-address-pauthlr-slh.ll
+1-1llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+140-1076 files

NetBSD/pkgsrc jxJqpBUdoc CHANGES-2026

   doc: Updated textproc/py-readme_renderer to 45.0nb1
VersionDeltaFile
1.4713+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 69Dp0z4textproc/py-readme_renderer Makefile

   py-readme_renderer: depend on py-comrak

   Needed for markdown.

   Bump PKGREVISION.
VersionDeltaFile
1.21+3-1textproc/py-readme_renderer/Makefile
+3-11 files

LLVM/project 2748955clang/test/SemaCXX warn-thread-safety-analysis.cpp

address comments
DeltaFile
+48-2clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+48-21 files

LLVM/project bf461e2llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp, llvm/test/CodeGen/AMDGPU expert_scheduling_gfx12.mir soft-waitcnt-deletion.mir

[AMDGPU] Check all incoming edges before deleting soft waits

Change-Id: I92ca9784405e53f46aa4c8701e417d32f00bbff7
DeltaFile
+724-1llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
+431-0llvm/test/CodeGen/AMDGPU/soft-waitcnt-deletion.mir
+128-38llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+118-0llvm/test/CodeGen/AMDGPU/soft-waitcnt-loop-deletion.ll
+46-0llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+36-0llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
+1,483-3910 files not shown
+1,607-6116 files

LLVM/project 0cd2bd1llvm/lib/Target/SPIRV SPIRVLegalizerInfo.cpp, llvm/test/CodeGen/SPIRV/legalization matrix-wide-vector-shader.ll vector-legalization-shader.ll

Revert "[SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor" (#211660)

Reverts llvm/llvm-project#207768
DeltaFile
+4-218llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+0-166llvm/test/CodeGen/SPIRV/legalization/matrix-wide-vector-shader.ll
+0-113llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose-bool.ll
+12-10llvm/test/CodeGen/SPIRV/legalization/vector-legalization-shader.ll
+9-11llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-multiply.ll
+9-7llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose.ll
+34-5251 files not shown
+35-5317 files

LLVM/project 57bdce1clang/lib/Sema SemaExprCXX.cpp

sigh, missed this
DeltaFile
+1-1clang/lib/Sema/SemaExprCXX.cpp
+1-11 files

LLVM/project 727c182clang/include/clang/Sema DynamicAllocationArgumentsCXX.h Sema.h, clang/lib/Sema SemaExprCXX.cpp SemaOverload.cpp

Update for reviewer feedback
DeltaFile
+72-0clang/include/clang/Sema/DynamicAllocationArgumentsCXX.h
+3-49clang/include/clang/Sema/Sema.h
+3-6clang/lib/Sema/SemaExprCXX.cpp
+1-1clang/lib/Sema/SemaOverload.cpp
+1-0clang/lib/Sema/SemaCoroutine.cpp
+80-565 files

LLVM/project 1ca413aclang/lib/CodeGen CGHLSLBuiltins.cpp, clang/test/CodeGenHLSL/builtins RWByteAddressBuffer-InterlockedOr.hlsl RasterizerOrderedByteAddressBuffer-InterlockedOr.hlsl

Add InterlockedOr resource methods (#211639)

This PR builds upon the work merged in
https://github.com/llvm/llvm-project/pull/180804, and completes the
implementation of the InterlockedOr functions in HLSL, by adding these
methods to the existing resource types.
This PR also reflects the same implementation strategy used in
https://github.com/llvm/llvm-project/pull/208128
Fixes: https://github.com/llvm/llvm-project/issues/99126
Assisted by: Github Copilot
DeltaFile
+62-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedOr.hlsl
+0-52llvm/test/CodeGen/DirectX/InterlockedOr.ll
+45-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedOr.hlsl
+4-33clang/lib/CodeGen/CGHLSLBuiltins.cpp
+0-37llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedOr_spv_i64.ll
+0-36llvm/test/CodeGen/SPIRV/hlsl-intrinsics/InterlockedOr.ll
+111-1589 files not shown
+165-23415 files

NetBSD/src bfz3tKxsys/dev/hdaudio hdaudio.c

   hdaudio(4): Apply access checks to ioctl routines.

   This way the permissions on /dev/hdaudioN actually do something.

   Sort includes while here.

   PR kern/60492: hdaudio(4): setconfig is allowed unprivileged
VersionDeltaFile
1.19+24-6sys/dev/hdaudio/hdaudio.c
+24-61 files

LLVM/project cdfa687clang/include/clang/Options Options.td, clang/lib/Driver Driver.cpp ToolChain.cpp

[Driver] Print C++ standard library info (#207798)

Users and tools sometimes need to know which C++ standard library Clang
selected, and which include directories the driver added for it. Today
they have to inspect verbose or `-###` output.

Add options to print this information directly:

`--print-cxx-stdlib`
`--print-cxx-stdlib-include-dirs`

For MSVC targets, the default printed library is `msvcstl`. Explicit
`-stdlib=` values are still reported as requested. The include-dir query
reuses toolchain logic, including the MSVC STL include path for the
default MSVC case.
DeltaFile
+56-0clang/test/Driver/print-cxx-stdlib.cpp
+44-12clang/lib/Driver/ToolChains/MSVC.cpp
+30-0clang/lib/Driver/Driver.cpp
+10-0clang/lib/Driver/ToolChain.cpp
+8-0clang/include/clang/Options/Options.td
+8-0clang/lib/Driver/ToolChains/MSVC.h
+156-122 files not shown
+164-128 files

LLVM/project f4b5fb1mlir/lib/Dialect/OpenACC/Transforms ACCCGToGPU.cpp, mlir/test/Dialect/OpenACC acc-cg-to-gpu-reduction-array.mlir

[mlir][OpenACC] Support partial ThreadX reduction launches (#211665)

Example:
```fortran
!$acc parallel loop collapse(2) num_gangs(10) reduction(+:a)
do i = 1, n
  do j = 1, n
    do k = 1, m
      a(k) = a(k) + x(k,i) * y(k,j)
    end do
  end do
end do
```

In this code, ACCCG pads ThreadX to the subgroup size because
`gpu.all_reduce` uses subgroup shuffles. This unnecessarily increases
private reduction storage when only one Y/Z row is active.

Fix: preserve partial ThreadX launches for a single row, while retaining
alignment when Y/Z rows could share a subgroup.
DeltaFile
+92-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
+39-17mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+131-172 files

NetBSD/src YxXK9fzsys/netinet if_arp.c

   arp: Validate op on input, before creating any state.

   PR kern/60491: arp creates state for invalid messages
VersionDeltaFile
1.321+13-4sys/netinet/if_arp.c
+13-41 files