LLVM/project c1c0fb3bolt/include/bolt/Core MCPlusBuilder.h, bolt/lib/Passes LongJmp.cpp BinaryPasses.cpp

Revert "[BOLT][AArch64] Transform cmpbr ~> cmp + br when inversion not possible (#185731)" (#202309)

This reverts commit 6b13656fd8386f979e061cc97e32b607ee3fcdf4.

We have identified various bugs hence reverting:

* relaxLocalBranches() should account for BB growth and adjust subsequent BB offsets in fragment
* multiple parallel workers are sharing the same allocator in DataflowInfoManager
* liveness is run lazily, potentially after the CFG has been modified
DeltaFile
+10-130bolt/unittests/Core/MCPlusBuilder.cpp
+38-84bolt/test/AArch64/compare-and-branch-inversion.S
+15-75bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+5-22bolt/lib/Passes/LongJmp.cpp
+2-14bolt/lib/Passes/BinaryPasses.cpp
+3-8bolt/include/bolt/Core/MCPlusBuilder.h
+73-3339 files not shown
+83-36715 files

LLVM/project dab2bdbmlir/include/mlir/Dialect/AMDGPU/IR CMakeLists.txt

[MLIR] Fix doc build by adding missing `-dialect=` (#202313)
DeltaFile
+1-1mlir/include/mlir/Dialect/AMDGPU/IR/CMakeLists.txt
+1-11 files

LLVM/project 2bd098bclang/include/clang/Analysis ProgramPoint.h CFG.h, clang/lib/StaticAnalyzer/Core CheckerManager.cpp CoreEngine.cpp

[analyzer] Trigger checkLifetimeEnd callback from CFGLifetimeEnds element

This patch adds handling of the `CFGLifetimeEnd` element to the CSA, and
produces a newly created callback `checkLifetimeEnd` for each occurrence
of it.

It is useful to implement detection of dangling pointers as in:

```
void su_use_after_block ()  { int* p=0; { int x=1; p=&x; } *p = 2; }
//                                                       ^ p dangles
```

This patch does not implement the check itself. it is motivated by the
discussion in

https://discourse.llvm.org/t/what-is-the-status-of-scopeend-and-scopebegin/90861

--

    [4 lines not shown]
DeltaFile
+209-0clang/unittests/StaticAnalyzer/CheckLifetimeEndTest.cpp
+182-0clang/test/Analysis/lifetime-end-simple-cfg-output.cpp
+53-27clang/include/clang/Analysis/ProgramPoint.h
+46-33clang/include/clang/Analysis/CFG.h
+48-6clang/lib/StaticAnalyzer/Core/CheckerManager.cpp
+10-8clang/lib/StaticAnalyzer/Core/CoreEngine.cpp
+548-749 files not shown
+615-7415 files

FreeBSD/ports 60dfe40misc/ossp-uuid Makefile, misc/ossp-uuid/files patch-uuid-config.in

misc/ossp-uuid: fix library name in pkgconfig output

PR:     295701
Submitted by:   Nikolaj Thygesen <mailinglist at diamondbox.dk>
DeltaFile
+11-0misc/ossp-uuid/files/patch-uuid-config.in
+1-1misc/ossp-uuid/Makefile
+12-12 files

XigmaNAS/svn 10608trunk/build functions.inc create-all.sh

apply patches from ken
DeltaFile
+337-1trunk/build/functions.inc
+7-7trunk/build/create-all.sh
+1-1trunk/build/pkg-copy-Makefile
+345-93 files

LLVM/project cf4f334flang-rt/lib/runtime iso_c_binding.f90, flang/docs Extensions.md

[flang][flang-rt] Treat REAL(2)/COMPLEX(2) as C-interoperable types (#201888)

IEEE-754 binary16 ("half") maps cleanly to the C `_Float16` type
(ISO/IEC TS 18661-3), but flang previously rejected `REAL(KIND=2)` and
`COMPLEX(KIND=2)` in C-interoperable contexts. Make `REAL(KIND=2)` and
`COMPLEX(KIND=2)` into actual interoperable types.

`ISO_C_BINDING` now exports the gfortran-compatible named constants
`c_float16` and `c_float16_complex` (both value 2), the kind parameter
for the half-precision C interoperable types.

Assisted-by: AI
DeltaFile
+31-0flang/test/Semantics/bind-c-real2.f90
+5-3flang/test/Semantics/bind-c06.f90
+6-0flang/docs/Extensions.md
+4-1flang/lib/Evaluate/type.cpp
+3-0flang-rt/lib/runtime/iso_c_binding.f90
+49-45 files

FreeBSD/ports b1bbbacx11/mate-menus Makefile distinfo

x11/mate-menus: update to 1.28.1

PR:             295821

Reported by:    Ale
DeltaFile
+6-5x11/mate-menus/Makefile
+3-3x11/mate-menus/distinfo
+9-82 files

NetBSD/pkgsrc XGpy7R0doc CHANGES-2026

   Updated www/py-aiohttp, www/py-test-aiohttp
VersionDeltaFile
1.3618+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc f7OG4dZwww/py-test-aiohttp distinfo Makefile

   py-test-aiohttp: updated to 1.1.1

   1.1.1 (2026-06-08)

   - Drop Python 3.9
   - Typing improvements
VersionDeltaFile
1.3+4-4www/py-test-aiohttp/distinfo
1.7+2-3www/py-test-aiohttp/Makefile
+6-72 files

NetBSD/pkgsrc DUJMbDnwww/py-aiohttp distinfo Makefile

   py-aiohttp: updated to 3.14.1

   3.14.1 (2026-06-07)

   Bug fixes

   - Fixed a race condition in :py:class:`~aiohttp.TCPConnector` where closing the connector while a DNS resolution was in-flight could raise :py:exc:`AttributeError` instead of :py:exc:`~aiohttp.ClientConnectionError` -- by :user:`goingforstudying-ctrl`.

   - Fixed ``CancelledError`` not closing a connection -- by :user:`aiolibsbot`.

   - Tightened up some websocket parser checks -- by :user:`Dreamsorcerer`.

   - Fixed :class:`~aiohttp.CookieJar` dropping the host-only flag of cookies when persisted with :meth:`~aiohttp.CookieJar.save` and reloaded with :meth:`~aiohttp.CookieJar.load`, so a cookie set without a ``Domain`` attribute is again scoped to the exact host that set it after a reload; the absolute expiration deadline is now persisted as well, so a reloaded cookie keeps its original lifetime instead of being rescheduled from the load time. :meth:`~aiohttp.CookieJar.load` now replaces the jar contents rather than merging onto prior state, and loaded cookies pass through the same acceptance rules as :meth:`~aiohttp.CookieJar.update_cookies`, so a cookie for an IP-address host is dropped when loaded into a jar created without ``unsafe=True`` -- by :user:`bdraco`.

   - Scoped :class:`~aiohttp.DigestAuthMiddleware` credentials to the origin of the first request it handles, so a redirect to a different origin no longer triggers a digest response computed from the configured credentials; a challenge from another origin is only answered when that origin falls within a protection space advertised by the anchor origin through the RFC 7616 ``domain`` directive -- by :user:`bdraco`.

   - Fixed the C HTTP parser not enforcing ``max_line_size`` on a request target or response reason phrase that is split across multiple reads; each fragment was checked on its own, so an accumulated line could exceed the limit without raising ``LineTooLong``. The accumulated length is now checked, matching the pure-Python parser -- by :user:`bdraco`.

   - Changed :class:`~aiohttp.TCPConnector` to reject legacy non-canonical numeric IPv4 host forms such as ``2130706433``, ``017700000001`` and ``127.1`` with :exc:`~aiohttp.InvalidUrlClientError`; only canonical dotted-quad IPv4 literals are now treated as IP address literals, while every other host is sent through the configured resolver -- by :user:`bdraco`.

    [10 lines not shown]
VersionDeltaFile
1.99+4-4www/py-aiohttp/distinfo
1.107+2-2www/py-aiohttp/Makefile
+6-62 files

OpenBSD/src sSSAcy6usr.bin/newsyslog newsyslog.8

   sort SEE ALSO
VersionDeltaFile
1.58+3-3usr.bin/newsyslog/newsyslog.8
+3-31 files

OPNSense/core 6e57f19src/opnsense/mvc/app/models/OPNsense/Core Firmware.php, src/opnsense/mvc/app/models/OPNsense/Core/repositories opnsense.xml

firmware: allow "local" business mirror subscription

While here remove the allow_custom softcoding which was always
enabled anyday.
DeltaFile
+33-39src/opnsense/mvc/app/models/OPNsense/Core/Firmware.php
+13-16src/opnsense/mvc/app/views/OPNsense/Core/firmware.volt
+5-3src/opnsense/scripts/firmware/repos/OPNsense.php
+2-2src/opnsense/mvc/app/models/OPNsense/Core/repositories/opnsense.xml
+53-604 files

OPNSense/core 80e0209src/opnsense/mvc/app/library/OPNsense/Interface Idassoc.php

Update src/opnsense/mvc/app/library/OPNsense/Interface/Idassoc.php

Co-authored-by: Franco Fichtner <franco at opnsense.org>
DeltaFile
+1-1src/opnsense/mvc/app/library/OPNsense/Interface/Idassoc.php
+1-11 files

OPNSense/core 7b1001esrc/opnsense/mvc/app/library/OPNsense/Interface Idassoc.php

Update src/opnsense/mvc/app/library/OPNsense/Interface/Idassoc.php

Co-authored-by: Franco Fichtner <franco at opnsense.org>
DeltaFile
+1-2src/opnsense/mvc/app/library/OPNsense/Interface/Idassoc.php
+1-21 files

FreeBSD/ports 03b7270sysutils/mate-polkit Makefile distinfo

sysutils/mate-polkit: switch to GitHub release asset

Minor versions of 1.28.x are no longer published to the MATE mirror
and are only available on GitHub. Use USE_GITHUB=nodefault with a
release tarball instead of the auto-generated one, as recommended
by the porter's handbook.
DeltaFile
+7-6sysutils/mate-polkit/Makefile
+3-3sysutils/mate-polkit/distinfo
+10-92 files

OpenBSD/ports JyvrCDanet/rsync distinfo Makefile

   update to rsync-3.4.4
VersionDeltaFile
1.38.6.2+2-2net/rsync/distinfo
1.111.6.2+1-1net/rsync/Makefile
+3-32 files

LLVM/project 47dec95clang/test/Sema wave-reduce-builtins-validate-amdgpu.cl

Missing SEMA tests
DeltaFile
+26-0clang/test/Sema/wave-reduce-builtins-validate-amdgpu.cl
+26-01 files

LLVM/project 82bfbb4clang/include/clang/Basic BuiltinsAMDGPU.td, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

[AMDGPU] Add builtins for wave reduction intrinsics

Assisted by - Claude-sonnet:4.6
DeltaFile
+189-0clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+18-0clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+9-0clang/include/clang/Basic/BuiltinsAMDGPU.td
+216-03 files

LLVM/project e805e69llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.xor.ll llvm.amdgcn.reduce.and.ll

Modify test run lines
DeltaFile
+154-74llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+134-64llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+134-64llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+422-2023 files

LLVM/project 8d89085llvm/lib/Target/AMDGPU SIInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.umax.ll llvm.amdgcn.reduce.umin.ll

[AMDGPU] Support Wave Reduction for true-16 types - 1

Supporting true-16 versions of the reduction intrinsics
Supported Ops: `min`, `umin`, `max`, `umax`.
Supports only the iterative stratergy, DPP is yet
to be supported.
DeltaFile
+162-53llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+134-64llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
+63-29llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+63-28llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+2-1llvm/lib/Target/AMDGPU/SIInstructions.td
+0-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+424-1766 files

LLVM/project b73c52dllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.xor.ll llvm.amdgcn.reduce.or.ll

Promote at legalization
DeltaFile
+32-25llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+25-18llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+25-18llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+4-4llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+4-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+90-665 files

LLVM/project 12752a5llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.and.ll llvm.amdgcn.reduce.or.ll

Drop unsed test prefixes
DeltaFile
+16-21llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+16-21llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+16-21llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+48-633 files

LLVM/project b785676llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Support Wave Reduction for i16 types - 2

Supported Ops: `add`, `sub`.
Supports only the iterative stratergy, DPP is yet
to be supported.
Supports only Fake-16 versions of the lowering.
True-16 support is yet to be added.
DeltaFile
+642-177llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+621-173llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+2-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1,265-3503 files

LLVM/project 8489f0ellvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.xor.ll llvm.amdgcn.reduce.or.ll

[AMDGPU] Support Wave Reduction for i16 types - 3

Supported Ops: `and`, `or`, `xor`.
Supports only the iterative stratergy, DPP is yet
to be supported.
Supports only Fake-16 versions of the lowering.
True-16 support is yet to be added.
DeltaFile
+591-160llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+491-136llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+491-136llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+8-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1,581-4334 files

LLVM/project fad9d9fllvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Support Wave Reduction for true-16 types - 2

Supporting true-16 versions of the reduction intrinsics
Supported Ops: `add`, `sub`.
Supports only the iterative stratergy, DPP is yet
to be supported.
DeltaFile
+87-39llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+79-35llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+166-742 files

LLVM/project bb10e7dllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

Promote at legalization
DeltaFile
+24-16llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+24-15llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+6-4llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+6-2llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+60-374 files

LLVM/project 591e6bfllvm/lib/Target/AMDGPU SIInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.min.ll

Use `REG_SEQUENCE` instead of `COPY`
Use SALU opcodes for all reductions
DeltaFile
+1-2llvm/lib/Target/AMDGPU/SIInstructions.td
+1-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+2-22 files

LLVM/project 9922f55llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.or.ll llvm.amdgcn.reduce.and.ll

Use only SALU opcodes
DeltaFile
+13-13llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+13-13llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+13-13llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+1-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+40-444 files

OpenBSD/ports VIKue3Onet/rsync distinfo Makefile

   update to rsync-3.4.4
VersionDeltaFile
1.41+2-2net/rsync/distinfo
1.114+1-1net/rsync/Makefile
+3-32 files

LLVM/project d1006c4llvm/lib/Target/AMDGPU SIISelLowering.cpp

Move variable decl to inner if-statement.
DeltaFile
+2-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-21 files