FreeBSD/doc 8bf2be0website/static/security/advisories FreeBSD-EN-23:12.freebsd-update.asc

website: Fix incorrect URL in EN-23:12.

PR:             293498
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+15-14website/static/security/advisories/FreeBSD-EN-23:12.freebsd-update.asc
+15-141 files

LLVM/project ee87266llvm/lib/Transforms/Utils ScalarEvolutionExpander.cpp, llvm/lib/Transforms/Vectorize VPlanUtils.cpp VPlanTransforms.cpp

[VPlan] Expand VPExpandSCEVRecipes to VPInstructions before CSE. (#197643)

Add expandSCEVExpressions transform that converts VPExpandSCEVRecipes
to VPInstructions where possible, running before CSE so duplicates with
other SCEV expansions (e.g., from addMinimumIterationCheck) are
eliminated. This also reuses existing loop-invariant IR values via
ScalarEvolution::getSCEVValues to avoid redundant computation.

Currently limited to SCEVMulExpr (along with constants, unknowns, and
vscale). Support for SCEVAddExpr and SCEVUDivExpr will follow in
subsequent patches.

Depends on https://github.com/llvm/llvm-project/pull/189455

PR: https://github.com/llvm/llvm-project/pull/197643
DeltaFile
+60-0llvm/test/Transforms/LoopVectorize/induction-step.ll
+24-18llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
+35-2llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+28-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-23llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+21-0llvm/lib/Transforms/Vectorize/VPlanUtils.h
+169-4912 files not shown
+207-7818 files

FreeNAS/freenas fb76afesrc/middlewared/middlewared/plugins support.py

return an error when the debug is too large
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+14-1src/middlewared/middlewared/plugins/support.py
+14-11 files

LLVM/project 5d6ed53flang/docs Extensions.md

[flang][docs] Documented IS_CONTIGUOUS() extension for constant arrays (#200451)

Flang considers constant objects or subobjects of constant objects as
contiguous even in cases, where the other compilers may consider them
non-contiguous. Documented the extension.

Fixes #199878
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+13-0flang/docs/Extensions.md
+13-01 files

LLVM/project 59eb19dllvm/include/llvm/Analysis InstructionSimplify.h, llvm/lib/Analysis InstructionSimplify.cpp

[InstSimplify] Expose simplifyUnaryIntrinsic (NFC) (#200444)

With the eventual goal of supporting unary intrinsics in the
constant-folder.
DeltaFile
+14-19llvm/lib/Analysis/InstructionSimplify.cpp
+6-2llvm/include/llvm/Analysis/InstructionSimplify.h
+20-212 files

LLVM/project 9b66119llvm/test/tools/obj2yaml/DXContainer ShaderFlagsSM68.yaml

Add yamlobj roundtrip tests for SM 6.8 features (#198403)

This PR adds DXContainer tests for Shader Model 6.8 features;
SampleCmpGradientOrBias and ExtendedCommandInfo.

Assisted by: Github Copilot
Fixes https://github.com/llvm/llvm-project/issues/83177
DeltaFile
+92-0llvm/test/tools/obj2yaml/DXContainer/ShaderFlagsSM68.yaml
+92-01 files

FreeBSD/ports 404f0danet/py-magic-wormhole distinfo Makefile

net/py-magic-wormhole: Update to 0.24.0

ChangeLog: https://github.com/magic-wormhole/magic-wormhole/compare/0.18.0...0.24.0

PR:             295588
Approved by:    bofh@ (maintainer)
DeltaFile
+3-3net/py-magic-wormhole/distinfo
+2-2net/py-magic-wormhole/Makefile
+5-52 files

FreeNAS/freenas 7d7d11csrc/middlewared/middlewared/plugins/device_ vrrp_events.py, src/middlewared/middlewared/plugins/failover_ event.py

Process BACKUP in vrrp rapid-succession branch

When VrrpEventThread saw a second rapid event after waiting
rapid_event_settle_time, it dropped the latest queued event and
logged a warning. On boot-time keepalived flaps where the
MASTER->BACKUP gap floors below max_wait, that drop swallowed
the only BACKUP signal middleware was going to see, so
vrrp_backup never ran.

Fire the hook for BACKUP (skipping if vrrp_backup already ran
this process lifetime, tracked via a new LAST_EVENT_TYPE
attribute on FailoverEventsService); keep the drop+warn for
MASTER, since acting on an unsettled MASTER would kick off
fenced + zpool import.
DeltaFile
+31-1src/middlewared/middlewared/plugins/device_/vrrp_events.py
+16-0src/middlewared/middlewared/plugins/failover_/event.py
+47-12 files

OpenBSD/src eoqDKnignu/llvm/compiler-rt/lib/builtins clzdi2.c

   Update clzdi2.c to pull in the following commit neede because of a change
   in clang brought in with the llvm 22 update:

   commit 5d0e26e571c08dc4c0b2a25ed6c9f845f054fa76
   Author: Koakuma <koachan at protonmail.com>
   Date:   Tue Apr 29 07:36:32 2025 +0700

       [compiler-rt] Make sure __clzdi2 doesn't call itself recursively on sparc64 (#136737)

       On 64-bit platforms, libgcc doesn't ship with __clzsi2, so __builtin_clz
       gets lowered to __clzdi2. A check already exists for GCC, but as of
       commit 8210ca019839fc5430b3a95d7caf5c829df3232a clang also lowers
       __builtin_clz to __clzdi2 on sparc64.

       Update the check so that building __clzdi2 with clang/sparc64 also
       works.

   ok tb@, deraadt@
VersionDeltaFile
1.2+7-7gnu/llvm/compiler-rt/lib/builtins/clzdi2.c
+7-71 files

OpenBSD/ports jszU00ucomms/liquid-dsp Makefile distinfo, comms/liquid-dsp/patches patch-src_nco_src_nco_proto_c patch-src_nco_src_nco_crcf_c

   import liquid-dsp

   liquid-dsp is a free and open-source digital signal processing (DSP)
   library designed specifically for software-defined radios on embedded
   platforms. The aim is to provide a lightweight DSP library that does not
   rely on a myriad of external dependencies or proprietary and otherwise
   cumbersome frameworks. All signal processing elements are designed to be
   flexible, scalable, and dynamic, including filters, filter design,
   oscillators, modems, synchronizers, complex mathematical operations, and
   much more.

   ok benoit@

VersionDeltaFile
1.1+37-0comms/liquid-dsp/Makefile
1.1+15-0comms/liquid-dsp/patches/patch-src_nco_src_nco_proto_c
1.1+15-0comms/liquid-dsp/patches/patch-src_nco_src_nco_crcf_c
1.1+8-0comms/liquid-dsp/pkg/DESCR
1.1+3-0comms/liquid-dsp/pkg/PLIST
1.1+2-0comms/liquid-dsp/distinfo
+80-06 files not shown
+80-012 files

LLVM/project 4e8c14dllvm/lib/CodeGen ExpandIRInsts.cpp, llvm/test/CodeGen/AArch64 fcvt-i256.ll

[ExpandIRInsts] Fix e.g. fptoui.sat.f32.i256's handling of inf (#200261)

When expanding fptoui.sat/fptosi.sat, we saturate when the biased
exponent is at least ExponentBias + BitWidth - IsSigned, the point where
the value no longer fits in the target integer.

We should *also* always saturate when the floating-point value is
+/-inf.  Usually this doesn't require any special handling; for example
for a float32 -> int32 conversion, inf has a biased exponent of 255 >
ExponentBias + BitWidth - IsSigned = 127 + 32 - 1.

But for integer types which are large enough to contain all source
floating-point values, this doesn't work. For example, if you're
converting float32 to int256, you'd compute a threshold of 383, which is
greater than 255.  Therefore float32(inf) would not correctly saturate
to INT256_MAX.

Fix this by clamping the threshold to the all-ones biased exponent.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
DeltaFile
+25-16llvm/test/CodeGen/AArch64/fcvt-i256.ll
+9-3llvm/lib/CodeGen/ExpandIRInsts.cpp
+4-4llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fpto-sat-vector.ll
+38-233 files

LLVM/project f8545beclang/lib/CIR/CodeGen CIRGenExprAggregate.cpp, clang/test/CIR/CodeGen paren-list-agg-init.cpp

[CIR] Implement cleanups of base classes for aggregates. (#200473)

This is a very simple implementation, we just make sure we add the base
class destructor to the cleanup scope.
DeltaFile
+44-2clang/test/CIR/CodeGen/paren-list-agg-init.cpp
+4-5clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
+48-72 files

OpenBSD/src sgSCHOignu/llvm/llvm/lib/Target/PowerPC PPCAsmPrinter.cpp

   Unbreak and update powerpc retguard for llvm 22

   For RETGUARD_LOAD_COOKIE when -fno-pie (as in macppc kernels), change
   a relocation in -fno-pie (as in macppc kernels) from unusual S_HIGHA
   "__retguard_3671 at higha" to usual S_HA "__retguard_3671 at ha".  This
   prevents an error from lld 22,

   ld: error: rasops15.o:(function rasops15_init: .text+0x2): unknown \
   relocation (111) against symbol __retguard_3671

   For RETGUARD_LOAD_PC in PIC code, change an instruction from 'bl .+4'
   to 'bcl 20,31,.+4' to fix branch prediction.  This follows the same
   change in upstream llvm,
   https://github.com/llvm/llvm-project/issues/128644

   ok jca@ naddy@
VersionDeltaFile
1.8+2-2gnu/llvm/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+2-21 files

LLVM/project 9b4e2dcflang/lib/Lower/OpenMP Atomic.cpp, flang/lib/Semantics check-omp-atomic.cpp

[Flang][OpenMP]Handling restrictions of using Memory-Order-Clause with Atomic-Clause (#199636)

Adhering to the restrictions of using Memory-Order-Clause with
Atomic-Clause.
Added warnings to indicate the transformations that will done internally
in flang.

In the process of handling all the restrictions of using
memory-order-clause This also Fixes
[#199490](https://github.com/llvm/llvm-project/issues/199490)

---------

Co-authored-by: Sunil Kuravinakop <kuravina at pe31.hpc.amslabs.hpecorp.net>
DeltaFile
+95-0flang/test/Semantics/OpenMP/atomic-mem-order.f90
+63-0flang/lib/Semantics/check-omp-atomic.cpp
+59-0flang/test/Lower/OpenMP/atomic-mem-order-transform.f90
+34-16flang/lib/Lower/OpenMP/Atomic.cpp
+44-0flang/test/Integration/OpenMP/atomic-capture-release.f90
+33-10mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+328-267 files not shown
+371-3813 files

LLVM/project c9cdbc4compiler-rt/lib/scudo/standalone primary64.h, compiler-rt/lib/scudo/standalone/tests primary_test.cpp

[scudo] Improve performance of pushBlocks sort. (#200297)

Ran this on an Android device using both algorithms, the new algorithm
is on average 10% faster, but gets to be 15% faster in some cases. This
is an example of the speed-ups.

Average Operation Time    Maximum Operation Time   Name
        326.9(ns)                 80770(ns)        PushBlocks New
        365.9(ns)                108032(ns)        PushBlocks Old
DeltaFile
+65-0compiler-rt/lib/scudo/standalone/tests/primary_test.cpp
+14-11compiler-rt/lib/scudo/standalone/primary64.h
+79-112 files

FreeBSD/src d11ff01contrib/capsicum-test capmode.cc, sys/kern kern_sig.c

sigqueue: In capability mode, only allow signalling self

This is copied from the check in kern_kill.

Reviewed by:    markj, oshogbo
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57244

(cherry picked from commit b9d16b7fd2fa6bc4b3e8364804cbdc1b76ebe8a5)
(cherry picked from commit defd9b86ef995ce70363eae9b323d616bda865be)
DeltaFile
+9-3contrib/capsicum-test/capmode.cc
+10-0sys/kern/kern_sig.c
+19-32 files

FreeBSD/src defd9b8sys/kern kern_sig.c, tests/sys/capsicum capmode.cc

sigqueue: In capability mode, only allow signalling self

This is copied from the check in kern_kill.

Reviewed by:    markj, oshogbo
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57244

(cherry picked from commit b9d16b7fd2fa6bc4b3e8364804cbdc1b76ebe8a5)
DeltaFile
+9-3tests/sys/capsicum/capmode.cc
+10-0sys/kern/kern_sig.c
+19-32 files

LLVM/project d337e68llvm/test/CodeGen/DirectX/Metadata cbuffer-layouttype.ll

[DirectX] Remove obsolete cbuffer layout test (#200307)

This test uses outdated `cbuffer` layout design. It has been replaced by
`cbuffer-metadata.ll` when we updated the frontend to use explicit
padding for `cbuffer` data types.
DeltaFile
+0-82llvm/test/CodeGen/DirectX/Metadata/cbuffer-layouttype.ll
+0-821 files

OpenBSD/ports 3OHXanCprint/fontforge Makefile

   Add missing bdep on textproc/py-sphinx.

   Breakage noticed by naddy@.
VersionDeltaFile
1.55+2-1print/fontforge/Makefile
+2-11 files

OpenBSD/ports vqKUgtmemulators/fuse Makefile distinfo, emulators/fuse/patches patch-configure_ac

   Update fuse to 1.8.0.
VersionDeltaFile
1.1+191-0emulators/fuse/patches/patch-configure_ac
1.54+11-6emulators/fuse/Makefile
1.26+2-2emulators/fuse/distinfo
1.13+0-1emulators/fuse/pkg/PLIST
1.3+0-0emulators/fuse/pkg/PFRAG.gtk
+204-95 files

LLVM/project 02997d7llvm/include/llvm/IR Instruction.h, llvm/lib/Analysis ValueTracking.cpp

[IR] Introduce Instruction::getFastMathFlagsOrNone (NFC) (#200457)
DeltaFile
+3-4llvm/lib/Analysis/ValueTracking.cpp
+6-0llvm/lib/IR/Instruction.cpp
+1-4llvm/lib/CodeGen/ExpandVectorPredication.cpp
+4-0llvm/include/llvm/IR/Instruction.h
+1-2llvm/lib/CodeGen/ExpandReductions.cpp
+1-2llvm/tools/llubi/lib/Interpreter.cpp
+16-126 files

LLVM/project e04dbbfutils/bazel/llvm-project-overlay/libc BUILD.bazel

[libc][bazel] Add arm and riscv FEnvImpl.h to textual_hdrs. (#200479)
DeltaFile
+2-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+2-01 files

LLVM/project 0fc5d0allvm/docs LangRef.rst, llvm/lib/IR Verifier.cpp

[IR] Introduce `mem.cache_hint` metadata for composable memory cache control hints (#181612)

Add target-agnostic infrastructure for the !mem.cache_hint metadata
kind,
https://discourse.llvm.org/t/rfc-composable-and-extensible-memory-cache-control-hints-in-llvm-ir/89443

This patch includes:
- Registration of mem.cache_hint in FixedMetadataKinds
- IR Verifier validation of structural constraints
- Metadata helper support in combineMetadata(), copyMetadataForLoad(),
and dropUBImplyingAttrsAndMetadata()
- LangRef documentation for the metadata format and semantics
- Verifier and transform pass test coverage (GVN, InstCombine,
SimplifyCFG)

Co-authored-by: Yonah Goldberg <ygoldberg at nvidia.com>
Assisted-by: Claude Code

---------

Co-authored-by: Yonah Goldberg <ygoldberg at nvidia.com>
DeltaFile
+100-0llvm/test/Verifier/mem-cache-hint.ll
+78-0llvm/lib/IR/Verifier.cpp
+75-0llvm/docs/LangRef.rst
+67-0llvm/test/Transforms/GVN/metadata.ll
+61-1llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
+29-21llvm/test/Bitcode/compatibility.ll
+410-224 files not shown
+441-2810 files

LLVM/project 6a96948libc/src/__support/FPUtil/x86_64 sqrt.h

[libc] Fix SSE2 check for x86_64/sqrt.h. (#200468)
DeltaFile
+1-1libc/src/__support/FPUtil/x86_64/sqrt.h
+1-11 files

FreeNAS/freenas 9c8597asrc/middlewared/middlewared/plugins support.py

log messages
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+25-1src/middlewared/middlewared/plugins/support.py
+25-11 files

LLVM/project a20c21bclang/include/clang/Basic Attr.td AttrDocs.td, clang/test/SemaCXX init-priority-attr.cpp

[clang] Enable GNU __attribute__((init_priority(...))) on z/OS. (#199573)

Enable `init_priority` on z/OS

Motivation
The recent addition of `clang/test/Sema/type-dependent-attrs.cpp` in
https://github.com/llvm/llvm-project/pull/182208 started failing on
z/OS. That test uses `[[gnu::init_priority(2000)]]`, and the failure
exposed that init_priority support was still disabled for z/OS in
`Attr.td`.

What changed

- Enabled init_priority for z/OS in `clang/include/clang/Basic/Attr.td`
- Updated `clang/test/SemaCXX/init-priority-attr.cpp` so z/OS now
expects normal semantic handling for init_priority

This reverts commit 2c7e24c4b6893a93ddb2b2cca91eaf5bf7956965 and
preserve any changes done after this commit.
DeltaFile
+3-16clang/test/SemaCXX/init-priority-attr.cpp
+1-5clang/include/clang/Basic/Attr.td
+1-1clang/include/clang/Basic/AttrDocs.td
+5-223 files

LLVM/project 352fd0blldb/packages/Python/lldbsuite/test/make Makefile.rules

[lldb][test] Link test binaries with -random_uuid (#199385)

Link using `-random_uuid` on macOS to avoid accidental UUID matching in tests.
DeltaFile
+4-0lldb/packages/Python/lldbsuite/test/make/Makefile.rules
+4-01 files

LLVM/project 43511b5clang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp, clang/test/CIR/Transforms/abi-lowering extend-after-ignore.cir extend-signed-arg.cir

[CIR] Add Extend (signext/zeroext) handling to CallConvLowering (#195745)

Third PR in the series splitting
[#192119](https://github.com/llvm/llvm-project/pull/192119) /
[#192124](https://github.com/llvm/llvm-project/pull/192124).
[#195725](https://github.com/llvm/llvm-project/pull/195725) and
[#195737](https://github.com/llvm/llvm-project/pull/195737) have merged;
this PR is now a standalone diff on main.

Adds Extend (signext / zeroext) to `cir-call-conv-lowering`. The CIR
signature keeps the original narrow integer type; the rewriter attaches
`llvm.signext` / `llvm.zeroext` to `arg_attrs` and `res_attrs`. That
matches classic Clang's LLVM IR convention — `define void @f(i8 signext
%x)`, not `define void @f(i32 signext %x)` with an entry-block
truncation. The `coercedType` field on an Extend `ArgClassification` is
informational only; the rewriter doesn't use it to change the CIR
signature.

Three `.cir` tests cover narrow-signed-arg, narrow-unsigned-arg, and

    [3 lines not shown]
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+119-48clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+44-0clang/test/CIR/Transforms/abi-lowering/extend-after-ignore.cir
+41-0clang/test/CIR/Transforms/abi-lowering/extend-signed-arg.cir
+38-0clang/test/CIR/Transforms/abi-lowering/extend-return.cir
+34-0clang/test/CIR/Transforms/abi-lowering/extend-unsigned-arg.cir
+276-485 files

LLVM/project 550f61fllvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG merge-cond-stores.ll

[SimplifyCFG] Preserve atomicity when merging atomic conditional stores (#200327)

mergeConditionalStoreToAddress() merges two stores into one.  It does
this for non-atomic and atomic-unordered stores, but when merging
unordered stores, it would downgrade them to non-atomic!

This bug isn't accessible from C because C doesn't expose unordered
atomics. But you can access it from e.g. Objective-C with something like

```
// repro.m — clang -fno-objc-arc -O2
__attribute__((objc_root_class))
@interface C { int _value; }
@property(atomic, direct) int value;
@end
@implementation C
@end

void f(C *obj, _Bool c1, _Bool c2, int v1, int v2) {

    [11 lines not shown]
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+36-0llvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll
+5-0llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+41-02 files

LLVM/project d6c5260llvm/lib/IR Use.cpp

clang-format

Created using spr 1.3.8-wip
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+1-1llvm/lib/IR/Use.cpp
+1-11 files