FreeBSD/ports 0d0ac82net/nfstrace Makefile, net/nfstrace/files patch-CMakeLists.txt

net/nfstrace: Fix build with CMake 4

CMake 4 no longer supports policy compatibility with versions older
than 3.5. Raise the minimum required CMake version accordingly.

PR:             298743
DeltaFile
+8-0net/nfstrace/files/patch-CMakeLists.txt
+1-1net/nfstrace/Makefile
+9-12 files

LLVM/project 66bc926clang/test/CIR/CodeGen bitfields.cpp, clang/test/CIR/CodeGenCXX uncopyable-args.cpp

[CIR] Drop the stale callconv opt-out from two CIR tests

`bitfields.cpp` was waiting on padded, packed and over-aligned record
shapes.  `uncopyable-args.cpp` was waiting on parameters of an empty or
tag class.  Both files now compile and check clean with the pass
running, so the `-fno-clangir-call-conv-lowering` opt-out and its TODO
header are removed and the tests exercise the pass as written.  Neither
file changes a CHECK directive.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+2-4clang/test/CIR/CodeGenCXX/uncopyable-args.cpp
+2-4clang/test/CIR/CodeGen/bitfields.cpp
+4-82 files

LLVM/project 22d549ellvm/lib/Target/AMDGPU SILowerControlFlow.cpp, llvm/test/CodeGen/AMDGPU lower-control-flow-live-variables-update.xfail.mir lower-control-flow-live-variables-update.mir

AMDGPU: Remove update-only LiveVariables maintenance from SILowerControlFlow

This was only maintained, never relied on. Part of staged LiveVariables
removal.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+87-0llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
+5-67llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+0-42llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
+92-1093 files

LLVM/project 364f1c3clang/lib/CodeGen/Targets Sparc.cpp, clang/test/CodeGen/Sparc sparcv8-abi.c sparc-vaarg.c

[Sparc][clang] Match GCC's SPARC V8 vector argument passing (#222254)

Pass floating-point vectors and vectors larger than 64 bits indirectly.

Assisted-by: Codex
DeltaFile
+149-0clang/test/CodeGen/Sparc/sparc-vaarg.c
+20-0clang/test/CodeGen/Sparc/sparcv8-abi.c
+7-0clang/lib/CodeGen/Targets/Sparc.cpp
+176-03 files

FreeBSD/ports 970da3bdevel/nsync Makefile distinfo

devel/nsync: Update to 1.30.0
DeltaFile
+6-2devel/nsync/pkg-plist
+3-3devel/nsync/distinfo
+1-1devel/nsync/Makefile
+10-63 files

LLVM/project 88c276cllvm/include/llvm/Analysis Loads.h, llvm/lib/Analysis Loads.cpp

[InstCombine] Preserve elementwise atomic access sizes (#223897)

There are two cases where instcombine currently will change the atomic
access size of an unordered elementwise atomic. Note that, for example,
`load atomic elementwise <4 x i32>` and `load atomic elementwise <2 x
i64>` do not have equivalent semantics. The former has 4 atomic accesses
and the latter has 2. Rewriting the former to the latter can introduce
mixed-size, concurrent, atomic accesses, which race in LLVM. Without
`elementwise`, rewriting _is_ legal.

The two cases are:

1. `mergeStoreIntoSuccessor`:

```
/// Try to transform:
///   if () { *P = v1; } else { *P = v2 }
/// or:
///   *P = v1; if () { *P = v2; }

    [10 lines not shown]
DeltaFile
+119-0llvm/test/Transforms/InstCombine/atomic.ll
+37-10llvm/lib/Analysis/Loads.cpp
+8-7llvm/include/llvm/Analysis/Loads.h
+10-2llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+2-2llvm/lib/Transforms/Scalar/JumpThreading.cpp
+176-215 files

FreeBSD/ports e238deabenchmarks/nosqlbench Makefile

benchmarks/nosqlbench: Mark deprecated

(cherry picked from commit 8c07eeca04594b59cebba1bfc0bbda12a3905616)
DeltaFile
+4-1benchmarks/nosqlbench/Makefile
+4-11 files

FreeBSD/ports 8c07eecbenchmarks/nosqlbench Makefile

benchmarks/nosqlbench: Mark deprecated
DeltaFile
+4-1benchmarks/nosqlbench/Makefile
+4-11 files

NextBSD/src 72dc7a7. build.sh, tests iso-boot-test.sh img-boot-test.sh

E15 Stage A: noatime and #467 boot gates, build.sh fstab comments (#494)

* img-test: gate on noatime for / and match the whole mount line

Adds ROOT-NOATIME to the verdict: the serial transcript must show
' on / (ufs, local, noatime'. noatime moves from the fstab root line into
launchd's own remount (nextbsd-userland#185, E15 A2), and the overlay
stops shipping fstab (nextbsd-overlays#5, A1). This gate catches a
build where A1 ships before A2.

The ROOT-IS-UFS step matched "ufs" in the echoed device name
(/dev/ufs/...), so it said nothing about mount flags, and it sent
halt -p before the line finished. It now waits for the whole
'on / (ufs...)' line. The verdict checks login first, so a boot that
never reaches login still reports as a boot failure.

Refs nextbsd/nextbsd-userland#185

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>

    [30 lines not shown]
DeltaFile
+24-6tests/img-boot-test.sh
+13-5tests/iso-boot-test.sh
+9-7build.sh
+46-183 files

FreeBSD/ports 4cc0077games/qstat distinfo Makefile

games/qstat: update the port to version 2.18

- Chase redirection to the new GitHub account
- Garbage-collect CONFLICTS_INSTALL, the offending
 `sysutils/torque' port was removed more than two
  years ago

Reported by:    portscout
DeltaFile
+3-5games/qstat/Makefile
+3-3games/qstat/distinfo
+6-82 files

LLVM/project 4bab123llvm/include/llvm/CodeGen FunctionLoweringInfo.h, llvm/lib/CodeGen/SelectionDAG StatepointLowering.cpp

DAG: Fix latent verifier error in statepoint lowering

Fixes "Register not marked live out of predecessor" in existing statepoint tests
when LiveIntervals is run earlier in the pass pipeline. This is observable today
when using -verify-coalescing in statepoint tests. The verifier check only runs
with LiveIntervals, which is first computed as a dependency for the
RegisterCoalescer, but the coalescer happens to hide the problem before the
first verifier run with computed LiveIntervals in the existing testcases.

Build a leaf value at the gc.relocate use instead of after the statepoint
instruction. An integer constant or frame index was defined in the statepoint
block after the call, but for an invoke the unwind edge into the landing pad
leaves at the call, before that def. The gc.relocate in the landing pad reads a
value with no reaching definition along that edge. Defining the leaf at the
gc.relocate keeps it in the landing pad.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+89-0llvm/test/CodeGen/X86/statepoint-relocate-eh.ll
+43-8llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+25-0llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
+157-83 files

LLVM/project c26545bllvm/test/CodeGen/AMDGPU amdgcn.bitcast.960bit.ll load-constant-i8.ll

CodeGen: Compute LiveIntervals before TwoAddressInstructions

TwoAddressInstructions is the traditional primary use of LiveVariables,
but it has gained a LiveIntervals path. By moving LiveIntervals earlier,
the default flips to rely on it instead of LiveVariables. The overall
test churn is mostly neutral, with more net wins than losses.

This should move before phi elimination. This is a staging move to
incrementally remove the LiveVariables support from TwoAddressInstructions,
and because the move to running LiveIntervals on SSA is a bigger leap.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+42,023-42,020llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+7,206-7,302llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+2,603-2,582llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+1,833-1,839llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+1,790-1,779llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+1,685-1,735llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+57,140-57,257305 files not shown
+97,644-98,125311 files

LLVM/project 011decfllvm/lib/CodeGen TwoAddressInstructionPass.cpp, llvm/test/CodeGen/Hexagon two-addr-tied-subregs.mir

CodeGen: Remove LiveVariables use from TwoAddressInstructionPass

Now that LiveIntervals is computed unconditionally before TwoAddressInstructions
in the pipeline, the pass no longer needs LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+38-131llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+18-18llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
+9-16llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
+8-8llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
+7-7llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
+4-4llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
+84-1841 files not shown
+87-1877 files

LLVM/project 5306fceclang/lib/CIR/CodeGen CIRGenModule.cpp CIRGenCXXABI.h, clang/lib/CIR/Dialect/Transforms/TargetLowering CIRCXXABI.h LowerMicrosoftCXXABI.cpp

[CIR] Add initial Microsoft C++ ABI support in ClangIR (#221038)

Stub out Microsoft C++ ABI support for ClangIR CodeGen and dialect
lowering:
- Stub out CIRGenMicrosoftCXXABI.
- Stub out LowerMicrosoftCXXABI to integrate into the TargetLowering
pass in CIR dialect transforms.
- Add error.NYI extensively.
- Add a minimal test file, mainly so that it is in tree.

Assisted-by: Gemini:gemini-3.8-flash-high
DeltaFile
+324-0clang/lib/CIR/CodeGen/CIRGenMicrosoftCXXABI.cpp
+158-0clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerMicrosoftCXXABI.cpp
+6-0clang/test/CIR/CodeGen/cxx-msvc-abi.cpp
+2-1clang/lib/CIR/CodeGen/CIRGenModule.cpp
+3-0clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
+3-0clang/lib/CIR/CodeGen/CIRGenCXXABI.h
+496-13 files not shown
+499-29 files

LLVM/project e5cc0aaflang/include/flang/Optimizer/Builder CUFCommon.h, flang/lib/Optimizer/Builder CUFCommon.cpp

fix windows attempt 2

Created using spr 1.3.7
DeltaFile
+176-0flang/test/Fir/CUDA/cuda-duplicate-device-func.mlir
+46-86flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
+121-0flang/lib/Optimizer/Builder/CUFCommon.cpp
+107-0flang/lib/Optimizer/Transforms/CUDA/CUFDuplicateDeviceFunc.cpp
+81-0flang/test/Fir/CUDA/cuda-device-func-transform-copies.mlir
+44-0flang/include/flang/Optimizer/Builder/CUFCommon.h
+575-8611 files not shown
+661-10917 files

LLVM/project 16dcf47llvm/lib/Target/RISCV/MCTargetDesc RISCVMachObjectWriter.cpp, llvm/test/MC/RISCV riscv-relocs-macho.s riscv-relocs-macho-data.s

[RISC-V][Mach-O] Fix bogus 12-bit range check on subtraction expressions. (#222205)

Assembling a subtraction expression whose offset does not fit in a
signed 12-bit integer, such as

    .word _a - _b + 5000

failed with a misleading diagnostic:

    error: AUIPC out of range of corresponding %pcrel_lo instruction

The check was copied from the %pcrel_lo path, where 12 bits is a real
constraint because the offset is inlined in the immediate field of an
addi or an lw. For data, the addend is stored inline in the bytes
being relocated, and a .word has all 32 bits available to hold it.

Drop the check. No extra relocation record is needed; the
offset is simply written in the data, as otool reports in the tests:

    .long 5000 @ KIND_DATA
DeltaFile
+19-3llvm/test/MC/RISCV/riscv-relocs-macho-data.s
+14-1llvm/test/MC/RISCV/riscv-relocs-macho.s
+3-7llvm/lib/Target/RISCV/MCTargetDesc/RISCVMachObjectWriter.cpp
+36-113 files

FreeBSD/ports 414d337sysutils/py-puremagic distinfo Makefile, sysutils/py-puremagic/files patch-pyproject.toml

sysutils/py-puremagic: Update to 2.2.0

Co-authored-by: Michael Osipov <michaelo at FreeBSD.org>
PR:             298690
Approved by:    james at french.id.au (maintainer)
DeltaFile
+16-0sysutils/py-puremagic/files/patch-pyproject.toml
+5-7sysutils/py-puremagic/Makefile
+3-3sysutils/py-puremagic/distinfo
+24-103 files

LLVM/project 51d810dllvm/lib/CodeGen TwoAddressInstructionPass.cpp, llvm/test/CodeGen/Hexagon two-addr-tied-subregs.mir

CodeGen: Remove LiveVariables use from TwoAddressInstructionPass

Now that LiveIntervals is computed unconditionally before TwoAddressInstructions
in the pipeline, the pass no longer needs LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+38-131llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+18-18llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
+9-16llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
+8-8llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
+7-7llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
+4-4llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
+84-1841 files not shown
+87-1877 files

LLVM/project c26c03cllvm/include/llvm/CodeGen FunctionLoweringInfo.h, llvm/lib/CodeGen/SelectionDAG StatepointLowering.cpp

DAG: Fix latent verifier error in statepoint lowering

Fixes "Register not marked live out of predecessor" in existing statepoint tests
when LiveIntervals is run earlier in the pass pipeline. This is observable today
when using -verify-coalescing in statepoint tests. The verifier check only runs
with LiveIntervals, which is first computed as a dependency for the
RegisterCoalescer, but the coalescer happens to hide the problem before the
first verifier run with computed LiveIntervals in the existing testcases.

Build a leaf value at the gc.relocate use instead of after the statepoint
instruction. An integer constant or frame index was defined in the statepoint
block after the call, but for an invoke the unwind edge into the landing pad
leaves at the call, before that def. The gc.relocate in the landing pad reads a
value with no reaching definition along that edge. Defining the leaf at the
gc.relocate keeps it in the landing pad.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+89-0llvm/test/CodeGen/X86/statepoint-relocate-eh.ll
+43-7llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
+25-0llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
+157-73 files

LLVM/project 8364433llvm/test/CodeGen/AMDGPU amdgcn.bitcast.960bit.ll load-constant-i8.ll

CodeGen: Compute LiveIntervals before TwoAddressInstructions

TwoAddressInstructions is the traditional primary use of LiveVariables,
but it has gained a LiveIntervals path. By moving LiveIntervals earlier,
the default flips to rely on it instead of LiveVariables. The overall
test churn is mostly neutral, with more net wins than losses.

This should move before phi elimination. This is a staging move to
incrementally remove the LiveVariables support from TwoAddressInstructions,
and because the move to running LiveIntervals on SSA is a bigger leap.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+42,023-42,020llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+7,206-7,302llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+2,603-2,582llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+1,833-1,839llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+1,790-1,779llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+1,685-1,735llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+57,140-57,257305 files not shown
+97,644-98,125311 files

LLVM/project 1aec3f7llvm/lib/Transforms/IPO LowerTypeTests.cpp ThinLTOBitcodeWriter.cpp, llvm/test/ThinLTO/X86 cfi-import-internal-coroutine.ll

Reapply "[CFI] Create an external linkage alias instead of promoting i… (#220339)
DeltaFile
+58-0llvm/test/ThinLTO/X86/cfi-import-internal-coroutine.ll
+17-29llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
+35-0llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+33-0llvm/test/Transforms/ThinLTOBitcodeWriter/cfi_dso_local_equivalent.ll
+29-0llvm/test/Transforms/LowerTypeTests/promoted-internal.ll
+10-7llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
+182-364 files not shown
+193-4410 files

FreeBSD/ports 2aae816multimedia/olive Makefile

multimedia/olive: broken on i386 and powerpc

Reported by: fallout
DeltaFile
+2-2multimedia/olive/Makefile
+2-21 files

LLVM/project 5dfe860clang CMakeLists.txt, clang/include/clang/Config config.h.cmake

[clang-repl] Add CLANG_ENABLE_EMUTLS_GET_ADDRESS cmake option (#217700)

Guard the extern "C" declaration and reference to __emutls_get_address
in IncrementalExecutor.cpp behind a new CMake option
CLANG_ENABLE_EMUTLS_GET_ADDRESS, which is OFF by default.

This prevents link errors in environments/runtimes where
__emutls_get_address is not available.

Replace all other guards with the new cmake option.
DeltaFile
+5-7clang/lib/Interpreter/IncrementalExecutor.cpp
+10-0clang/CMakeLists.txt
+3-0utils/bazel/llvm-project-overlay/clang/include/clang/Config/config.h
+3-0clang/include/clang/Config/config.h.cmake
+1-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+1-0llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
+23-76 files

NextBSD/src 36cfae1. build.sh

build.sh: stop describing the overlay fstab as the source of the root entry

Root comes from the kernel's baked-in ROOTDEVNAME (#188), not from an
fstab line or loader.conf.d, and nextbsd-overlays#5 (E15 A1) stops
shipping /etc/fstab. Rewrite the three comments that said otherwise and
drop the doubled "the the".

Refs #472

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+9-7build.sh
+9-71 files

NextBSD/src 9632810tests img-boot-test.sh iso-boot-test.sh

iso/img-test: fail on the #467 strings (FSTAB-ROOT-REMOUNT)

Once nextbsd-overlays#5 stops shipping /etc/fstab, launchctl's boot-time
mount -vat nonfs is skipped, so neither 'Cannot union mount root
filesystem' nor launchctl's 'fwexec(mount_tool' assert should appear.
Gate both harnesses on it so the root remount can't come back unnoticed.

The ISO verdict now checks pivot+login first, then the gate, so a boot
that never completes still reports as a boot failure.

Red until nextbsd-overlays#5 is in the image: merge together with it.

Refs #472, #467

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+13-5tests/iso-boot-test.sh
+8-0tests/img-boot-test.sh
+21-52 files

NextBSD/src 5f3a636tests img-boot-test.sh

img-test: gate on noatime for / and match the whole mount line

Adds ROOT-NOATIME to the verdict: the serial transcript must show
' on / (ufs, local, noatime'. noatime moves from the fstab root line into
launchd's own remount (nextbsd-userland#185, E15 A2), and the overlay
stops shipping fstab (nextbsd-overlays#5, A1). This gate catches a
build where A1 ships before A2.

The ROOT-IS-UFS step matched "ufs" in the echoed device name
(/dev/ufs/...), so it said nothing about mount flags, and it sent
halt -p before the line finished. It now waits for the whole
'on / (ufs...)' line. The verdict checks login first, so a boot that
never reaches login still reports as a boot failure.

Refs nextbsd/nextbsd-userland#185

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+16-6tests/img-boot-test.sh
+16-61 files

NetBSD/src Dylxzzrlib/libc/stdio vfwprintf.c

   PR lib/60708 - include 'F' format when fetching %n$ args.

   XXX pullup -10 -11 (to be done along with PR bin/60496 pullups).
VersionDeltaFile
1.42+3-2lib/libc/stdio/vfwprintf.c
+3-21 files

FreeBSD/ports 2679040multimedia/smelter Makefile

multimedia/smelter: Broken on i386

Reported by:    fallout

(cherry picked from commit fdbaf7b7ee264c3a6fa3e78a1847c020b593a7ac)
DeltaFile
+2-0multimedia/smelter/Makefile
+2-01 files

FreeBSD/ports fdbaf7bmultimedia/smelter Makefile

multimedia/smelter: Broken on i386

Reported by:    fallout
DeltaFile
+2-0multimedia/smelter/Makefile
+2-01 files

LLVM/project be62e52llvm/lib/Target/ARM ARMExpandPseudoInsts.cpp, llvm/test/CodeGen/ARM cmse-vlldm-no-reorder.mir

ARM: Don't duplicate the LR def when expanding call pseudos

Several pseudo expansions in ARMExpandPseudoInsts built a real call and
then copied the pseudo's operands onto the new instruction. Each of these
call opcodes declares LR as an implicit-def, but the original instruction
already had that. The original def may have been marked as dead, so the result
would be a redundant operand with an inconsistent dead flag. This avoids
a failure in a future verifier check.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+34-18llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
+1-1llvm/test/CodeGen/ARM/cmse-vlldm-no-reorder.mir
+35-192 files