Centralize the definition of VM_MIN_ADDRESS, VM_MAX_ADDRESS/VM_MAXUSER_ADDRESS,
and USRSTACK. While here, get rid of the "must be compatible with HP-UX
debuggers" affordance which, really, has outlived its usefulness (and not
all platforms adopted this in any case). Also, since we haven't had "u."
in about a million years, there's also no need to have UPAGES worth of
virtual space above the user stack, so just tuck it right up against
the ceiling everywhere.
Odd-ball is Amiga because it previously had a USRSTACK totally unlike
the others, so I left it that way for now.
[mlir][python] expose remaining Location inspection API (#192630)
Addresses #53169. Mirrors the Python bindings pattern used for Attribute
subclasses so that Location discrimination uses `isinstance`, and fills
two small gaps at the same time.
### Approach
Previously `Location` was a single nanobind class with `is_a_file`,
`is_a_name`, etc. predicates, plus field accessors for every kind
defined on the base class. This PR introduces a `PyConcreteLocation<T>`
CRTP template (parallel to `PyConcreteAttribute<T>`) and registers one
subclass per `LocationAttr` kind: `UnknownLoc`, `FileLineColLoc`,
`NameLoc`, `CallSiteLoc`, `FusedLoc`.
TypeID-based downcasting is implemented in `PyLocation::maybeDownCast`
(using `mlirAttributeGetTypeID(mlirLocationGetAttribute(...))`) and
called at the boundaries that return Location objects: `op.location`,
`value.location`, `Location.from_attr`, and the subclass getters
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[LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (#193727)
This patch introduces LASX only legalization and instruction patterns
for vector sign and zero extension operations, which is basically copy
from the https://github.com/llvm/llvm-project/pull/160810 with some
minor change (e.g. deleted unused tablegen pattern).
sgimips: early initialisation of mach_subtype for SGI Indy / Indigo2
The mach_subtype field is needed early in boot for dev/int.c (the 8254
in the IO block) and other bits and pieces like GIO bus config.
So set it up super early here.
This allows my Indigo 2 R4400PC-150 to boot - slowly until the int driver
enumerates, but that's separate problem I'll dig into.
I also verified my R5000PC-180 Indy boots with this.
This addresses PR port-sgimips/60205 .
sgimips: delete dead code for IP32 console keyboard
The IP32 console keyboard controller is not a PC/AT style 8042
controller. It is a PS/2 controller though. Let it attach
normally, not through here.
security/vuxml: correct a typo in SA-26:12.dhclient entry
A trailing space crept into the <topic/> before m previous commit.
Fixes: 0821906582e8 security/vuxml: add FreeBSD SAs issued on 2026-04-29
Pointy hat to: philip
security/vuxml: add FreeBSD SAs issued on 2026-04-29
FreeBSD-SA-26:12.dhclient affects all supported releases
FreeBSD-SA-26:13.exec affects all supported releases
FreeBSD-SA-26:14.pf affects all supported releases
FreeBSD-SA-26:15.dhclient affects all supported releases
FreeBSD-SA-26:16.libnv affects all supported releases
FreeBSD-SA-26:17.libnv affects all supported releases
asmc: replace hardcoded model table with universal probing
Probe SMC keys at attach time to detect hardware capabilities,
supporting all Intel Apple machines without per-model entries.
Sensors are discovered by scanning sorted SMC key ranges for
known prefixes and types. Capabilities such as SMS, fan safe
speed, and ambient light are detected by key presence.
A global key description table provides human-readable names
for well-known temperature sensors.
Tested on:
- MacBook Pro (Early 2007, Mid 2014, Mid 2015)
- MacBook Air (Early 2015, Mid 2017)
- iMac (Mid 2011, Late 2013)
- Mac mini (Mid 2011)
Reviewed by: adrian
Differential Revision: https://reviews.freebsd.org/D56405
[orc-rt] Add NativeDylibManager. (#194792)
NativeDylibManager is an orc_rt::Service that supports loading,
unloading, and lookup of symbols via the system dynamic loader's native
APIs.
The current implementation only supports the POSIX dlfcn.h APIs (dlopen,
dlclose, dlsym), but it should be straightforward to extend to Windows.
powerpc/pic: Add a PIC_AP_INIT() to set up AP PIC info
pc_cpuid may not match the PIC's idea of a given CPU. Since openpic
has a WHOAMI register, we can use that to get the PIC's idea of the CPU.
This needs to be done on each AP, so add a PIC_AP_INIT device method so
the PIC can perform any AP-specific initialization at AP bootstrap time.
This fixes SMP on e6500, which is still lacking SMT support.
Differential Revision: https://reviews.freebsd.org/D56421
powerpc/openpic: Increase the maximum number of IRQs allowed
The Freescale MPIC supports up to 2048 IRQs, but since we only build an
array of 768 interrupts in intr_machdep, clamp the max at 512. The most
any Freescale PowerPC chip actually supports is 452 on the T4240, so 512
is sufficient.
As part of this, increase the vector mask to the full openpic vector
mask, and use this limit as the terminator for the dispatch loop,
instead of a hard-coded 255.
Differential Revision: https://reviews.freebsd.org/D56422
[WebAssembly] Remove WasmEHFuncInfo (NFC) (#194972)
This removes `WasmEHFuncInfo` class.
This class was created to maintain the information of, "If an exception
is not caught by EHPad A, what is its next unwind destination?". Turns
out this information is already in the CFG.
After #130374, we use the common `findUnwindDestination`:
https://github.com/llvm/llvm-project/blob/113479d119a997e4c4c3eae63e087588c9662121/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L2107-L2164
Note that in case of `catchswitch`, we follow its unwind destination
chain and add all of them to the invoke BB's successors until it meets a
`cleanuppad`, which always catches an exception. And the order of the
successor is the order of the unwind destination chain. So an invoke
BB's successor list would be like: [normal destination, unwind EHPad 1,
unwind EHPad 2, unwind EHPad 3, ...] where EHPad 2 is the next unwind
destination if EHPad 1 does not catch an exception and so on. So if we
want to know what the current EHPad's next unwind destination is, we can
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