13,214,302 commits found in 18 milliseconds
[AArch64] Addition tests for add_like Or of smlal/umlal. NFC (#194138) LLVM /project 3ad521e — llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir Rebase
Created using spr 1.3.7
Delta File +275,101 -0 llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir +144,679 -0 llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir +57,682 -0 llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir +41,844 -0 llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir +40,613 -0 llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir +37,209 -0 llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir +597,128 -0 9,624 files not shown +1,444,005 -273,959 9,630 files
LLVM /project 78d94b2 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll Rebase
Created using spr 1.3.7
Delta File +26,606 -0 llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll +4,811 -4,818 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +326 -4,626 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll +4,078 -0 llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll +1,872 -1,883 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +565 -2,727 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll +38,258 -14,054 4,949 files not shown +239,959 -113,969 4,955 files
games/solarus-quest-editor: Update to 2.0.4
LLVM /project cfbd321 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll Rebase
Created using spr 1.3.7
Delta File +26,606 -0 llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll +4,811 -4,818 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +326 -4,626 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll +4,078 -0 llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll +1,872 -1,883 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +565 -2,727 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll +38,258 -14,054 4,948 files not shown +239,722 -113,966 4,954 files
games/solarus: Update to 2.0.4
Changelog:
https://gitlab.com/solarus-games/solarus/-/blob/release-2.0.4/changelog.md
Update current testing status.
Switch next68k to the new pmap by default.
LLVM /project 6f0b55e — clang/lib/CIR/CodeGen CIRGenTypes.cpp CIRGenExprScalar.cpp, clang/test/CIR/CodeGen fixed-point-literal.c [CIR] Upstream missing support for fixed point literal (#193445)
- Upstream CIR CodeGen for fixed point builtin types `_Fract`, `_Accum`
and `_Sat`.
- Upstream CIR CodeGen for fixed point literal
- Part of task https://github.com/llvm/llvm-project/issues/192316 editors/nano: Update to 9.0
Changelog:
https://www.nano-editor.org/news.php
sysutils/eksctl: Update to 0.255.0
Changelog:
https://github.com/eksctl-io/eksctl/releases/tag/v0.225.0
security/aws-iam-authenticator: Update to 0.7.13
Changelog:
https://github.com/kubernetes-sigs/aws-iam-authenticator/releases/tag/v0.7.13
sysutils/helm: Update to 3.20.2
Changelog:
https://github.com/helm/helm/releases/tag/v3.20.2
sysutils/kubectl: Update to 1.36.0
Changelog:
https://github.com/kubernetes/kubernetes/blob/master/CHANGELOG/CHANGELOG-1.36.md#changelog-since-v1350
NetBSD /src zOcHMaB — sys/arch/m68k/include pmap_68k.h pmap_motorola.h, sys/arch/m68k/m68k pmap_68k.c Add a new pmap_bootmap flag, "CWT", which says to create a static mapping
with write-through caching.
Fix inverted "cacheable" logic in the __HAVE_NEW_PMAP_68K case.
With this fix, my 68040 NeXTstation boots diskless multi-user with
the new pmap.
LLVM /project cbc2c22 — llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll Rebase
Created using spr 1.3.7
Delta File +26,606 -0 llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll +4,811 -4,818 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +326 -4,626 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll +4,078 -0 llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll +1,872 -1,883 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +565 -2,727 llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll +38,258 -14,054 4,288 files not shown +210,973 -103,524 4,294 files
If the PCIe link is down, provide access to config space for bus 0, but
return 0xffffffff (and ignore writes) for other busses. This gets rid of
the "can't initialize hardware" messages that confuse some users and
better matches what happens on other platforms with PCIe when a slot is
empty.
ok jca@
math/R-cran-igraph: Update to 2.3.0
Reported by: portscout
LLVM /project 1348766 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer revec-shufflevector.ll shuffle-mask-resized.ll [SLP]Initial support for non-power-of-2 vectorization
Enables non-power-of-2 vectorization within the SLP tree. The root nodes
are still required to be power-of-2, will be addressed in a follow-up
patches.
Reviewers: bababuck, RKSimon, preames, hiraditya, HanKuanChen
Pull Request: https://github.com/llvm/llvm-project/pull/151530 [libc++] Remove full header path from assertion messages (#190060)
This creates additional bloat in programs or debug info, without much
additional value beyond just the file name.
Fixes #190058 pkcs7: drop silly use of i in PKCS7_dataVerify()
ok jsing kenjiro
FreeNAS /freenas c6b65b1 — src/middlewared/debian middlewared.service, src/middlewared/middlewared/plugins/failover_ remote.py NAS-140793 / 26.0.0-BETA.2 / Start licensed before middleware (by themylogin) (#18807) FreeNAS /freenas 21bcbb2 — src/middlewared/debian middlewared.service, src/middlewared/middlewared/plugins/failover_ remote.py NAS-140793 / 27.0.0-BETA.1 / Start licensed before middleware (#18806) pkcs7: don't use i, j for NIDs in PKCS7_dataFinal()
Use nid for NIDs and use i only for for loops.
ok jsing kenjiro
LLVM /project 2f28e1d — libcxx/include/__ranges stride_view.h, libcxx/test/std/ranges/range.adaptors/range.stride.view types.h end.pass.cpp [libc++] Implement P1899 `ranges::stride_view` (#65200)
Implement `ranges::stride_view` in libc++. This PR was migrated from
Phabricator (https://reviews.llvm.org/D156924 ).
Closes #105198
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn> pkcs7: don't use i and j for NIDs in PKCS7_dataDecode()
There's no need to assign to i before the switch and j is a terrible
name for a NID. Inline the latter and switch directly over the return
value of OBJ_obj2nid().
ok jsing kenjiro
pkcs7: avoid assignment to i in PKCS7_dataInit()
We can switch over the return value of OBJ_obj2nid() rather than using i
for an indirection.
ok jsing kenjiro
libgudev: add missing include
LLVM /project 3e10b2f — clang/lib/Basic/Targets AVR.h, clang/test/CodeGen/avr issue-176830.c [clang] Fix incorrect register information for AVR (#193940) 