CodeGen: Move SupportsDebugEntryValues from TargetOptions to TargetMachine
This is a capability reported by the target rather than an option to the
target. It has no command line flag or frontend plumbing to write it.
I'm not sure if we really need this; Triple::supportsDebugEntryValues() exists
although these don't entirely agree today.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
CodeGen: Move SupportsDefaultOutlining from TargetOptions to TargetMachine (#227691)
This flag is not an option passed down to a target, it is a capability reported by
one. It is only written by backend TargetMachine constructors. Move it into
TargetMachine, next to the vaguely similar O0WantsFastISel.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
[AMDGPU][NFC] Extract the MFMA read-window calculation
Move the wait states a consumer needs before reading an MFMA result out
of checkMAIHazards90A into getMFMAReadWaitStates, taking the producer as
an argument, so a caller can ask about a specific producer. The caller
passes the producer the walk recorded, so nothing changes.
AI-assisted.
pcib: Only apply ARI translation to a bridge's own secondary bus
ARI changes RID interpretation only for the device on a downstream
port's secondary bus. pcib_xlate_ari() applied that translation to
every config access through an ARI-enabled bridge, including cycles
forwarded to a subordinate bus.
A non-zero slot on a subordinate bus then panics an INVARIANTS kernel
and is misrouted otherwise. Translate only when the access targets
this bridge's secondary bus.
Reviewed by: kib, jhb
Fixes: 55d3ea1731d1 ("Add support for PCIe ARI")
Sponsored by: AMD
Differential Revision: https://reviews.freebsd.org/D60033
inotify: Move 'td' to the first argument of kern_inotify_*
This is consistent with other system call helpers.
Reviewed by: markj
Sponsored by: AFRL, DARPA
Differential Revision: https://reviews.freebsd.org/D60173
[AMDGPU] Fold sudot intrinsics with a zero multiplicand (#226479)
Replace sudot4 and sudot8 with their accumulator when either
multiplicand is zero.
For example:
```
sudot4(sign0, x, sign1, 0, acc, clamp)
->
acc
```
[ConstantTime] Drop the combine barrier from CT_SELECT expansion
ARITH_FENCE is only specified for FP types, and the earlier vreg copy
had the legalizer picking register classes. No in-tree combine folds
the XOR/AND/XOR sequence back into a select, so emit it without a
barrier. A dedicated barrier op will come in a follow-up.
