[CIR][CodeGen] Implement unnamed_addr attribute in CIR, propagate (#239798)
This also adds the classic-codegen tests that this now makes functional
based on my previous rules. Unnamed_addr means that the address of a
function isn't taken, so we can pass it down to LLVM-IR. This wires that
through CIR to LLVMIR-MLIR.
[CIR][CodeGen] Add conditional 'run' lines to more passing tests (#239679)
Follow-up to #238886, which only scanned the CodeGen-style test
directories. This scans the rest of clang/test with the same rules and
adds a conditional -fclangir run line to 39 more tests that pass without
any change to their check lines.
This follows the same rules as before, just in different directories.
Diagnostic tests are skipped as well.
[lldb-dap][ext] Add isOptimized extension to the StackFrame type (#239333)
Add the `$__lldb_isOptimized` field to stack frames instead of suffixing
the frame name with ' [opt]'.
The VS Code extension still adds the ' [opt]' suffix but now reads it
from the `$__lldb_isOptimized` field.
[mlir][OpenMP] Model memory effects of omp.taskgroup (#239582)
Model task scheduling-point and task-reduction effects.
Test the effects reported for a task reduction.
AI-Assisted-By: Codex (OpenAI)
[AArch64] Support FP atomic stores with memory hints
This patch extends the atomic-store-hint pseudos to accept preserved
floating-point atomic stores. It adds an FPR16 pseudo family and direct
half, bfloat, float, and double patterns for the supported addressing
modes.
The pseudos expand relaxed stores to STR and RCPC3 release and
sequentially consistent stores to STLUR, retaining memory hints without
cross-register-bank copies.
The existing AArch64::ATOMIC_STORE_HINT_H is renamed to
AArch64::ATOMIC_STORE_HINT_HH and AArch64::ATOMIC_STORE_HINT_H now means
FP16 instead of it's old association with integer half-word.
[AArch64] Support direct RCPC3 FP atomic loads and stores
Preserve half, bfloat, float, and double atomic loads and stores
through AtomicExpand for acquire and release orderings, and preserve
sequentially consistent stores, when RCPC3 and NEON are available.
Add SelectionDAG patterns for the RCPC3 LDAPUR and STLUR operations,
including unscaled offsets, and update the existing FP lane patterns to
match the preserved floating-point atomic nodes. Targets without the
required features continue to use integer lowering.
[AArch64] Support direct relaxed FP atomic loads and stores (#231490)
This patch updates the atomic-expand pass to preserve the atomic FP
load/stores as is instead of bitcasting them to integer load/stores when
the atomicity level is "relaxed". Necessary patterns are added for
SelectionDAG to match the atomic FP load/stores directly.
A follow-up commit will take care of extending this support for the
release and seq_cst stores and acquire loads under +rcpc3.
[GlobalISel] Simplify demanded bits through TRUNC, XOR and SELECT
## What it is
Extend GlobalISel demanded-bits simplification through `G_TRUNC`, `G_XOR`, and `G_SELECT`, following SelectionDAG's demand propagation and known-bits handling. Enable these operations as combiner roots in AArch64 and AMDGPU.
- Propagate truncation demand to the wider source and narrow constant logical right shifts (`trunc (lshr X, C)` to `lshr (trunc X), C`) when no shifted-in bits are demanded and legality allows it.
- Simplify XOR using known bits: drop an operand, narrow to a type with free trunc/zext, or turn it into `G_OR` (`disjoint` only when that holds for all bits), `G_AND`, or a NOT, and commute XOR with logical shifts when the target allows it. Unlike SelectionDAG, keep the XOR constant unshrunk: without a `targetShrinkDemandedConstant` equivalent, shrinking can make an encodable AArch64 logical immediate unencodable.
- Propagate demand through both SELECT value arms and intersect their known bits. Leave the condition unchanged and preserve full demand for shared producers unless an individual use can safely bypass them. Fold to a constant when all demanded bits are known.
- Use known bits, not only constant operands, to bypass multi-use `G_AND`/`G_OR`/`G_XOR` in `simplifyMultipleUseDemandedBits`, and route a root's operand use around such a def when it cannot be simplified in place.
- Keep `ashr (sext_inreg X, W), C` arithmetic unless none of its `C + BW - W` sign-fill bits are demanded, so AArch64 keeps selecting SBFX.
- Look through `G_UBFX` when folding into TB(N)Z on AArch64, so the narrowed shifts still select a single `tbz`/`tbnz`.
- Share XOR/shift profitability between selectors: `isDesirableToCommuteXorWithShift` takes the shift direction, XOR mask, shift amount, and vector-ness instead of an `SDNode` (NFC for SelectionDAG).
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[llvm-strings] Add --encoding={s,S,utf8} option (#221794)
The --encoding option comes from GNU strings.
The --encoding option allows specifying the following encodings:
s (ASCII)
S (default character set)
utf8 (UTF-8)
--encoding=s matches GNU strings and interprets 7-bit characters as
ASCII, rejecting any bytes with the high bit set.
--encoding=S interprets characters according to the current locale's
character set. In GNU strings, its meaning depends on --unicode and
either means all characters with the high bit set are considered
printable, or means characters are interpreted as UTF-8.
--encoding=utf8 is an extension to GNU strings, which implicitly uses
UTF-8 when --unicode options are used, but does not have a dedicated
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net-mgmt/rubygem-oxidized-web: Change RUN_DEPENDS from rubygem-json to rubygem-json2
- While I'm here, fix version requirement of RUN_DEPENDS
- Bump PORTREVISION for dependency change
PR: 300594
Reported by: Nick Hilliard <nick at foobar.org> (maintainer)
devel/py-tree-sitter-languages: Mark BROKEN, DEPRECATED and set EXPIRATION_DATE to 2026-11-30
PR: 298958
Reported by: kib, Patrick Crandol <patrick at crandol.com>
