FreshBSD

LLVM/project 667819e — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/X86 avg.ll

2026-03-24 15:47:51 UTC by Alexey Bataev on ⎇

users/alexey-bataev/spr/slp-prefer-to-trim-equal-cost-alternate-shuffle-subtrees

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

Delta		File
+24	-6	llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+10	-12	llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
+7	-7	llvm/test/Transforms/PhaseOrdering/X86/avg.ll
+41	-25	3 files

LLVM/project b1c9ce7 — openmp/runtime/src kmp_invoke_microtask.cpp z_Linux_util.cpp

2026-03-24 15:39:09 UTC by David Truby on ⎇

users/DavidTruby/omp-arm64ec

Use C implementation of kmp_invoke_microtask

Delta		File
+140	-0	openmp/runtime/src/kmp_invoke_microtask.cpp
+0	-139	openmp/runtime/src/z_Linux_util.cpp
+2	-1	openmp/runtime/src/CMakeLists.txt
+1	-1	openmp/runtime/src/z_Linux_asm.S
+143	-141	4 files

LLVM/project d0f5df1 — lldb/source/Plugins/Process/FreeBSD-Kernel-Core ProcessFreeBSDKernelCore.cpp

2026-03-24 15:35:57 UTC by Minsoo Choo via GitHub on ⎇

main

[lldb][Process/FreeBSDKernelCore] Remove interactive mode check (#187981)

`debugger.GetCommandInterpreter().IsInteractive()` doesn't necessarily
mean that the debugger is running without `-b` or `--batch` flag. This
caused an issue where the message isn't printed in any case. Remove the
check so the message is always printed for now.

Fixes: 9d9c7fc00bdddd72e78b19e9fbb6af9d07c2218b (#178027)

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>

Delta		File
+0	-3	lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
+0	-3	1 files

LLVM/project 26fcbd5 — llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

2026-03-24 15:33:32 UTC by vporpo via GitHub on ⎇

main

[AMDGPU][SIInsertWaitcnts] Fix counterOutOfOrder() check for LOAD_CNT (#187758)

This is a follow-up to @piotrAMD's comment in #178511 .  
`hasPendingEvent()` used to return an unsigned mask but this changed in
#178511 when this function started to return bool. This changed the
functionality of `counterOutOfOrder()` which was still using an unsigned
mask that was erroneously being assigned a boolean instead of the
expected mask.

Delta		File
+3	-3	llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+3	-3	1 files

FreeBSD/ports 14bfd9c — security Makefile, security/keepsecret pkg-plist Makefile

2026-03-24 15:29:53 UTC by Max Brazhnikov (makc) on ⎇

main

security/keepsecret: Add new port

KeepSecret is a Password manager for a Secret Service compatible provider.

WWW: https://invent.kde.org/utilities/keepsecret/

Delta		File
+27	-0	security/keepsecret/pkg-plist
+20	-0	security/keepsecret/Makefile
+3	-0	security/keepsecret/distinfo
+3	-0	security/keepsecret/pkg-descr
+1	-0	security/Makefile
+54	-0	5 files

LLVM/project 8443dfa — clang/docs OpenMPSupport.rst

2026-03-24 15:29:40 UTC by Kevin Sala Penades via GitHub on ⎇

main

[OpenMP] Mark dyn_groupprivate support as partial for C/C++ (#186706)

Delta		File
+1	-3	clang/docs/OpenMPSupport.rst
+1	-3	1 files

LLVM/project e626f19 — clang/docs ReleaseNotes.rst, clang/include/clang/Basic DiagnosticCommonKinds.td

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-11-final-touches-and-ast-tests

[Clang] [C++26] Expansion Statements (Part 11)

Delta		File
+104	-0	clang/test/AST/ast-print-expansion-stmts.cpp
+49	-0	clang/test/AST/ast-dump-expansion-stmt.cpp
+0	-4	clang/include/clang/Basic/DiagnosticCommonKinds.td
+1	-1	clang/www/cxx_status.html
+1	-0	clang/docs/ReleaseNotes.rst
+155	-5	5 files

LLVM/project cc3c4ef — clang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Options Options.td

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-10-limits

[Clang] [C++26] Expansion Statements (Part 10)

Delta		File
+69	-0	clang/test/SemaCXX/cxx2c-expansion-stmts-limit.cpp
+18	-0	clang/lib/Sema/SemaExpand.cpp
+9	-0	clang/test/SemaCXX/cxx2c-fexpansion-statements.cpp
+4	-0	clang/include/clang/Options/Options.td
+4	-0	clang/include/clang/Basic/DiagnosticSemaKinds.td
+1	-0	clang/lib/Driver/ToolChains/Clang.cpp
+105	-0	1 files not shown
+106	-0	7 files

LLVM/project c60a4b5 — clang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema Sema.h

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-5-iterating

[Clang] [C++26] Expansion Statements (Part 5)

Delta		File
+499	-14	clang/lib/Sema/SemaExpand.cpp
+71	-0	clang/lib/Sema/TreeTransform.h
+21	-15	clang/lib/Sema/SemaStmt.cpp
+12	-0	clang/include/clang/Basic/DiagnosticSemaKinds.td
+12	-0	clang/include/clang/Sema/Sema.h
+615	-29	5 files

LLVM/project c33d4df — clang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema ScopeInfo.h

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-9-control-flow

[Clang] [C++26] Expansion Statements (Part 9)

Delta		File
+117	-0	clang/test/SemaCXX/cxx2c-expansion-stmts-control-flow.cpp
+38	-9	clang/lib/Sema/SemaLookup.cpp
+28	-2	clang/lib/Sema/SemaStmt.cpp
+9	-2	clang/lib/Parse/ParseStmt.cpp
+6	-0	clang/include/clang/Basic/DiagnosticSemaKinds.td
+5	-1	clang/include/clang/Sema/ScopeInfo.h
+203	-14	1 files not shown
+205	-15	7 files

LLVM/project e4abcd3 — clang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaExpand.cpp TreeTransform.h

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-6-destructuring

[Clang] [C++26] Expansion Statements (Part 6)

Delta		File
+105	-6	clang/lib/Sema/SemaExpand.cpp
+23	-3	clang/lib/Sema/TreeTransform.h
+2	-0	clang/include/clang/Basic/DiagnosticSemaKinds.td
+130	-9	3 files

LLVM/project be79edd — clang/lib/Sema SemaExpand.cpp TreeTransform.h, clang/test/Parser cxx2c-expansion-statements.cpp

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-3-enumerating

[Clang] [C++26] Expansion Statements (Part 3)

Delta		File
+164	-0	clang/lib/Sema/SemaExpand.cpp
+86	-4	clang/lib/Sema/TreeTransform.h
+40	-40	clang/test/Parser/cxx2c-expansion-statements.cpp
+37	-1	clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+26	-3	clang/lib/Sema/SemaTemplateInstantiate.cpp
+5	-15	clang/test/SemaTemplate/GH176155.cpp
+358	-63	4 files not shown
+388	-65	10 files

LLVM/project 2f67489 — clang/lib/CodeGen CGStmt.cpp, clang/test/CodeGenCXX cxx2c-enumerating-expansion-statements.cpp cxx2c-iterating-expansion-stmt.cpp

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-8-codegen

[Clang] [C++26] Expansion Statements (Part 8)

Delta		File
+1,518	-0	clang/test/CodeGenCXX/cxx2c-enumerating-expansion-statements.cpp
+548	-0	clang/test/CodeGenCXX/cxx2c-iterating-expansion-stmt.cpp
+493	-0	clang/test/CodeGenCXX/cxx2c-destructuring-expansion-stmt.cpp
+429	-0	clang/test/CodeGenCXX/cxx2c-expansion-stmts-control-flow.cpp
+208	-0	clang/test/CodeGenCXX/cxx2c-expansion-stmts-templates.cpp
+40	-1	clang/lib/CodeGen/CGStmt.cpp
+3,236	-1	2 files not shown
+3,245	-3	8 files

LLVM/project 8f5fc6a — clang/include/clang/Parse Parser.h, clang/include/clang/Sema Sema.h Scope.h

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-4-nfc-for-range-refactor

[Clang] [C++26] Expansion Statements (Part 4)

Delta		File
+266	-221	clang/lib/Sema/SemaStmt.cpp
+2	-83	clang/include/clang/Parse/Parser.h
+11	-44	clang/lib/Parse/Parser.cpp
+48	-3	clang/include/clang/Sema/Sema.h
+40	-1	clang/include/clang/Sema/Scope.h
+20	-17	clang/lib/Parse/ParseStmt.cpp
+387	-369	15 files not shown
+538	-450	21 files

LLVM/project f364692 — clang/lib/AST ExprConstant.cpp, clang/lib/AST/ByteCode Compiler.cpp Compiler.h

2026-03-24 15:29:12 UTC by Sirraide on ⎇

users/Sirraide/expansion-stmts-7-constexpr-and-tests

[Clang] [C++26] Expansion Statements (Part 7)

Delta		File
+1,472	-0	clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
+42	-0	clang/lib/AST/ByteCode/Compiler.cpp
+40	-0	clang/lib/AST/ExprConstant.cpp
+3	-0	clang/lib/Sema/SemaDeclCXX.cpp
+2	-1	clang/lib/AST/ByteCode/Compiler.h
+1,559	-1	5 files

FreeBSD/ports 2eab26b — x11/kitty distinfo Makefile

2026-03-24 15:26:08 UTC by Nicola Vitale (nivit) on ⎇

main

x11/kitty: Update to 0.46.2

ChangeLog:      https://sw.kovidgoyal.net/kitty/changelog/#detailed-list-of-changes
Reported by:    Kovid Goyal <notifications at github.com>

Delta		File
+5	-5	x11/kitty/distinfo
+1	-1	x11/kitty/Makefile
+6	-6	2 files

LLVM/project 9391ce9 — flang/test/Lower/Intrinsics poppar.f90 popcnt.f90

2026-03-24 15:25:28 UTC by Eugene Epshteyn via GitHub on ⎇

main

[flang][NFC] Converted five tests from old lowering to new lowering (part 38) (#188151)

Tests converted from test/Lower/Intrinsics: pack.f90, parity.f90,
popcnt.f90, poppar.f90, present.f90

Delta		File
+50	-41	flang/test/Lower/Intrinsics/poppar.f90
+40	-31	flang/test/Lower/Intrinsics/popcnt.f90
+16	-15	flang/test/Lower/Intrinsics/pack.f90
+15	-16	flang/test/Lower/Intrinsics/parity.f90
+4	-3	flang/test/Lower/Intrinsics/present.f90
+125	-106	5 files

LLVM/project 7f25c92 — llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp GCNPreRAOptimizations.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

2026-03-24 15:22:06 UTC by Petar Avramovic on ⎇

users/petar-avramovic/dualdot2acc

AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3

For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add pre-RA register allocation
hints to preferably assign dst and src2 to the same physical register.
When the hint is satisfied, canMapVOP3PToVOPD recognises the instruction
as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.

Delta		File
+258	-592	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+75	-93	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+32	-1	llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+24	-0	llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
+8	-5	llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+6	-0	llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+403	-691	1 files not shown
+405	-693	7 files

LLVM/project c1ea10a — clang-tools-extra/clangd CMakeLists.txt, clang-tools-extra/clangd/remap RemapMain.cpp CMakeLists.txt

2026-03-24 15:21:06 UTC by Justin Cady via GitHub on ⎇

main

[clangd] Add background index path remapping tool (#185482)

Introduce a standalone tool to remap paths inside clangd background
index files. This allows users to pay the cost of generating a full
background index once, then reuse the background index across multiple
clients. Each client rewrites the background index in place after
copying the original, specifying the path(s) to be remapped.

This is an alternative approach to the dynamic path remapping proposed
in #180285.

Fixes clangd/clangd#847

Assisted-by: claude

Delta		File
+345	-0	clang-tools-extra/clangd/remap/RemapMain.cpp
+18	-0	clang-tools-extra/clangd/test/remap.test
+17	-0	clang-tools-extra/clangd/remap/CMakeLists.txt
+1	-0	clang-tools-extra/clangd/CMakeLists.txt
+1	-0	clang-tools-extra/clangd/test/CMakeLists.txt
+382	-0	5 files

LLVM/project b9ab9d9 — llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstrInfo.h, llvm/test/CodeGen/AMDGPU si-lower-sgpr-spills-vgpr-lanes-usage.mir

2026-03-24 15:13:49 UTC by Matt Arsenault on ⎇

users/arsenm/amdgpu/implement-memsize-form-isLoadFromStackSlot-isStoreToStackSlot

AMDGPU: Implememt memsize forms of isLoadFromStackSlot/isStoreToStackSlot

Requested in #182673, though I'm not sure why this needs to be pushed
into targets. The size can be taken from the machine mem operand generically.

Delta		File
+22	-12	llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+19	-4	llvm/lib/Target/AMDGPU/SIInstrInfo.h
+0	-3	llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-vgpr-lanes-usage.mir
+41	-19	3 files

LLVM/project 4a2b384 — llvm/lib/Target/NVPTX NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX i1-int-to-fp.ll

2026-03-24 15:09:42 UTC by Jasmine Tang via GitHub on ⎇

main

[NVPTX] Fix sign issue in sint -> bf16 (#188118)

Fixes #187000

Delta		File
+11	-2	llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
+1	-1	llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+12	-3	2 files

LLVM/project 9708da6 — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.fmad.ftz.ll llvm.amdgcn.fmad.ftz.f16.ll

2026-03-24 15:08:23 UTC by vangthao95 via GitHub on ⎇

main

AMDGPU/GlobalISel: RegBankLegalize rules for fmad_ftz (#188132)

Delta		File
+252	-23	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
+200	-20	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
+1	-1	llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+453	-44	3 files

OpenBSD/ports TW0Xo0a — devel/spidermonkey140 distinfo Makefile

2026-03-24 15:07:17 UTC by ajacoutot on ⎇

HEAD

   Update to spidermonkey140-140.9.0.

Version	Delta		File
1.7	+2	-2	devel/spidermonkey140/distinfo
1.7	+1	-1	devel/spidermonkey140/Makefile
	+3	-3	2 files

LLVM/project 1034c70 — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.cvt.pknorm.i16.ll llvm.amdgcn.cvt.pknorm.u16.ll

2026-03-24 15:06:51 UTC by vangthao95 via GitHub on ⎇

main

AMDGPU/GlobalISel: RegBankLegalize rules for cvt_pknorm (#187834)

Delta		File
+4	-3	llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+3	-1	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
+3	-1	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
+10	-5	3 files

LLVM/project 9ab1e2b — llvm/lib/Target/AArch64 AArch64InstrInfo.td

2026-03-24 15:06:50 UTC by Josh Rodriguez on ⎇

users/JoshdRod/add-sqdmlal-patterns

[AArch64][GlobalISel] Move new SQDMULLi32 pattern to join the others

Delta		File
+4	-4	llvm/lib/Target/AArch64/AArch64InstrInfo.td
+4	-4	1 files

OpenBSD/ports tzGXhqw — devel/py-test-check distinfo Makefile, devel/py-test-check/pkg PLIST

2026-03-24 15:05:50 UTC by jtt on ⎇

HEAD

   devel/py-test-check: update to 2.8.0

   ok tb@

Version	Delta		File
1.4	+2	-2	devel/py-test-check/distinfo
1.7	+1	-1	devel/py-test-check/Makefile
1.5	+1	-0	devel/py-test-check/pkg/PLIST
	+4	-3	3 files

LLVM/project 20e59c8 — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU cube.ll llvm.amdgcn.cubema.ll

2026-03-24 15:05:36 UTC by vangthao95 via GitHub on ⎇

main

AMDGPU/GlobalISel: RegBankLegalize rules for cube intrinsics (#187762)

Add RegBankLegalize rules for cube* intrinsics. Also update manual tests
to use autogenerated checks.

Delta		File
+39	-11	llvm/test/CodeGen/AMDGPU/cube.ll
+22	-7	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
+22	-7	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
+22	-7	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
+22	-7	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
+3	-1	llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+130	-40	6 files

FreeBSD/ports 12e59b2 — games/libretro-shaders-slang pkg-plist distinfo

2026-03-24 15:05:00 UTC by Stefan Schlosser via Vladimir Druzenko (vvd) on ⎇

main

games/libretro-shaders-slang: Update g20260220 => g20260322

Commitlog:
https://github.com/libretro/slang-shaders/compare/ff3bd23...b256008

PR:     294016

Delta		File
+208	-14	games/libretro-shaders-slang/pkg-plist
+3	-3	games/libretro-shaders-slang/distinfo
+2	-2	games/libretro-shaders-slang/Makefile
+213	-19	3 files

LLVM/project d50d263 — mlir/include/mlir/Dialect/Arith/IR ArithOps.td, mlir/lib/Dialect/Arith/IR ArithOps.cpp

2026-03-24 15:00:38 UTC by Matthias Springer on ⎇

users/matthias-springer/remsi_not_pure

[mlir][arith] Mark `arith.remsi` and `arith.remui` as conditionally speculatable

Delta		File
+16	-2	mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+8	-0	mlir/lib/Dialect/Arith/IR/ArithOps.cpp
+24	-2	2 files

LLVM/project 2c2706d — llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-store-i64-stride-6.ll

2026-03-24 14:58:57 UTC by Simon Pilgrim via GitHub on ⎇

main

[X86] getFauxShuffleMask - decode insert_subvector(undef, x, c) as shuffle if c != 0 (#188258)

Move existing combineX86ShufflesRecursively handling into
getFauxShuffleMask to allow other shuffle folds to make use of it

Delta		File
+4,978	-4,984	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590	-4,623	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+3,850	-4,310	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,562	-3,632	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+2,430	-2,474	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
+1,815	-1,852	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+21,225	-21,875	13 files not shown
+27,816	-28,941	19 files