RISCV: Pass instruction and operand index to getMinimumVLForUser
getMinimumVLForUser and getMinimumVLForVSLIDEDOWN_VX recovered the instruction
and operand index from the operand's parent. Take the instruction and operand
index directly so they no longer depend on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
VirtRegMap: Pass instruction and operand to readsUndefSubreg (#219485)
The helper recovered the instruction from the operand's parent to look
up its slot index. Pass the containing instruction and the operand directly so
it no longer depends on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
netbsd32_ptrace: Fix locking around ptrace register access.
PR kern/60658: netbsd32_process_read_dbregs() needs the same fix as
native amd64 process_read_dbregs()
nullfs: Allow VSOCK to be mounted on top of another VSOCK
In the world of containers, mounting a unix(4) socket is a common
practice to allow communication between processes within containers.
For example, both Podman and Docker can expose a unix(4) socket,
and that same unix(4) socket can be mounted as a file accessible
to a process inside a container, allowing that application to control
Podman or Docker. Another example is PHP-FPM with NGINX, where,
instead of using TCP/IP for communication between containers, a
unix(4) socket is sufficient.
However, nullfs(4) and all related components do not allow mounting
a VSOCK on top of another. The current workaround involves creating
the socket in a directory and mounting that directory. This is an
option, though it does not provide a good user experience compared
to directly mounting a VSOCK on top of another, since the application
that creates the socket may create other sockets in that directory,
and the user may not wish to share them, or, worse yet, applications
that create unix(4) sockets may not provide any authentication at
[9 lines not shown]
AArch64: Pass instruction and operand to load/store rename helpers (#219471)
isRewritableImplicitDef and canRenameMOP only used the operand to
recover its parent instruction. Pass the containing instruction and the operand
directly so they no longer depend on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
WebAssembly: Take GlobalValue and DebugLoc in GetGlobalAddressSymbol (#219461)
GetGlobalAddressSymbol only needed the IR GlobalValue from the operand
and the instruction's DebugLoc for a diagnostic. Directly pass these
instead of depending on looking at the MachineOperand's parent to find the
instruction and function.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
RISCV: Pass instruction and operand index to VL optimizer operand info
getOperandInfo, getOperandLog2EEW and getIntegerExtensionOperandEEW recovered
the instruction and operand index from the operand's parent. Take the
instruction and operand index directly so they no longer depend on
MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Add middleware support for LIO ALUA HA
Wire up the middleware side of LIO ALUA high-availability: load
lio_ha.ko with per-node addresses on service start, manage ALUA
state across failover events, clean up STANDBY configfs on pool
export, and add pre-flight validation that targets have static
initiator ACLs before ALUA can be enabled.
For each target, create a portal-less phantom TPG carrying the peer
node's controller group so that a single RTPG response from any
connected port lists both ALUA groups. Write tpgt_N/rtpi explicitly
before enable so that relative target port IDs in RTPG match the
tag formula (portal.tag on Node A, portal.tag + 32000 on Node B)
rather than being auto-assigned sequentially by the kernel.
ALUA group states are driven by role and ha_state:
MASTER + synced local=OPTIMIZED remote=NONOPTIMIZED
MASTER + connected local=OPTIMIZED remote=TRANSITIONING
[4 lines not shown]
Mk/Scripts/checksum.sh: show expected/fetched checksum and size
Print expected and fetched checksums and file size on mismatch to help
debug builder-only failures.
PR: 294170
Differential Revision: https://reviews.freebsd.org/D58891
Check API key user roles through privilege API
Directory services cache entries are not authoritative for privilege
determination. They carry no group membership, because populating it
while enumerating the domain would require a group lookup per account
and overload the domain controller, so user.query reports an empty
roles list for every directory services account. api_key.create read
that list and rejected every directory services user.
Add privilege.roles_for_user(), which goes directly through NSS and
evaluates the account's group membership the same way authentication
does, and use it in do_create().
That makes two gaps in extend() reachable. A directory services account
with no SID (plain LDAP) is stored by its synthesized user.query id,
which never matched the local-only by_id map, so the key read back as
revoked with "User does not exist" and was dropped from the PAM
configuration. Resolve those ids through user.get_user_obj() instead,
memoizing the lookup the way the SID branch already does.
[5 lines not shown]
security/libgcrypt: Remove AVX512 support for FreeBSD 14 and 15
LLVM19 as shipped with FreeBSD 14 and 15 is incompete. Disable it by
default. Users who want AVX512 on FreeBSD < 16 must install LLVM20 or
newer and select the AVX512 option.
FreeBSD 16-CURRENT has LLVM21, with complete support for AVX512. Setting
the AVX512 option on 16-CURRENT is a NOP.
PR: 297987
[CIR] Drop call-conv-lowering opt-out from OpenACC declare tests (#219057)
The six OpenACC declare tests opted out of CallConvLowering because the
pass did not handle parameters of an empty or tag class.
CallConvLowering handles them now, so they can run the pass and pin what
it produces.
Assisted-by: Cursor / claude-opus-5
[AMDGPU] Mark V_PK_MOV_B32 as not commutable (#217719)
Its result halves are positional (dst.lo from src0, dst.hi from src1),
so MachineCSE commuting the operands and CSE'ing the result silently
swaps the halves, miscompiling the code
[AMDGPU][CodeGen] Incrementally update reserved regs for SIPreAllocateWWMRegs pass in RegisterClassInfo (#212201)
Based on this TODO comment in SIPreAllocateWWMRegs.cpp:
76 // TODO: Update RCI with the additional reserved registers the pass sets.
77 AU.addRequired<MachineRegisterClassInfoWrapperPass>();
Creates function updateReservedRegs in RegisterClassInfo.cpp which takes
the BitVector containing reserved register information without requiring
any unnecessary recomputations of the entire RegisterClassInfo object.
It:
- Compares the new reserved-register set with the cached set.
- Removes newly reserved registers from cached allocation orders.
- Updates register counts, costs, subclass information, and pressure
limits.
- Invalidates entries when incremental updating is unsafe; they are
recomputed only when next requested.
- Allows `SIPreAllocateWWMRegs` to preserve `RegisterClassInfo` after
reserving WWM registers.
[8 lines not shown]
GlobalISel: Pass instruction to RegBankSelect::tryAvoidingSplit
The helper recovered the instruction from the operand's parent, and the
operand is fully determined by the instruction and RepairPt's operand index.
Pass the containing instruction and derive the operand from it, so the helper
no longer depends on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[AMDGPU] Change promote-alloca-lds-granularity-limit.ll test to use inline attributes (NFC) (#219470)
This was requested in post merge review of #219172.
[libc][math] Extend iscanonical macro to _Float16 and float128 (#204981)
iscanonical is a C23 type-generic macro, so the f16/f128 variants are
surfaced through it rather than as functions in the generated math.h.
float128 is only listed when distinct from long double (LDBL_MANT_DIG !=
113) to avoid two _Generic associations with compatible types.
Stacked below: https://github.com/llvm/llvm-project/pull/205016
Co-authored-by: lntue <lntue at google.com>
