LLVM/project ea8f3dfllvm/test/Transforms/LoopVectorize cast-costs.ll vscale-cost.ll

[LV][NFC] Add cost model tests for VPInstructionWithType (#200135)
DeltaFile
+80-0llvm/test/Transforms/LoopVectorize/cast-costs.ll
+36-0llvm/test/Transforms/LoopVectorize/vscale-cost.ll
+116-02 files

LLVM/project f2f9eaellvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 vector-shuffle-combining-avx512vbmi2.ll

[X86] matchShuffleAsVSHLD - fix incorrect shift factor (#200754)

#200604 left the non-commuted case to still scale by 8bits instead of the src scalar bit size
DeltaFile
+17-0llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi2.ll
+1-1llvm/lib/Target/X86/X86ISelLowering.cpp
+18-12 files

FreeBSD/ports bf1d77fmisc/vifm distinfo Makefile

misc/vifm: Update to 0.14.4

ChangeLog:      https://vifm.info/news/2026-05-31
Reported by:    portscout!
DeltaFile
+3-3misc/vifm/distinfo
+1-1misc/vifm/Makefile
+4-42 files

FreeBSD/ports 72c2479audio/sidplayfp distinfo Makefile

audio/sidplayfp: Update to 3.0.2
DeltaFile
+3-3audio/sidplayfp/distinfo
+1-1audio/sidplayfp/Makefile
+4-42 files

FreeBSD/ports 4f15d66mail/roundcube-carddav pkg-plist distinfo

mail/roundcube-carddav: update to 5.1.3
DeltaFile
+4-4mail/roundcube-carddav/pkg-plist
+3-3mail/roundcube-carddav/distinfo
+1-1mail/roundcube-carddav/Makefile
+8-83 files

LLVM/project 581c37autils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel] Port ae1d75e (#200758)
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

FreeBSD/ports 017dc88security/proxytunnel distinfo Makefile

security/proxytunnel: Update to 1.13.0
DeltaFile
+3-3security/proxytunnel/distinfo
+1-1security/proxytunnel/Makefile
+4-42 files

LLVM/project 63c29dfclang/lib/Serialization ASTReaderDecl.cpp, clang/test/PCH friend-template-spec-redecl.cpp

[Serialization] Fix assertion on re-deserialized friend template spec… (#200566)

…ialization in PCH (#198133)

A friend function-template specialization declared inside a class
template is serialized into a PCH. When the class template is later
instantiated while loading the PCH, the friend specialization can be
deserialized re-entrantly (VisitFriendDecl -> VisitFunctionDecl -> ...
-> VisitFunctionDecl for the same specialization) at the same time as
the canonical copy, producing two redeclarations of the same
specialization in the template's specialization set.

ASTDeclReader::VisitFunctionDecl asserted that this collision could only
happen when merging declarations from different modules. Since
38b3d87bd384, friend functions defined inside dependent class templates
are loaded eagerly, so the collision can now also occur within a single
PCH/AST file (non-modules build), tripping the assertion:

  Assertion failed: (Reader.getContext().getLangOpts().Modules &&

    [7 lines not shown]
DeltaFile
+34-0clang/test/PCH/friend-template-spec-redecl.cpp
+0-2clang/lib/Serialization/ASTReaderDecl.cpp
+34-22 files

FreeBSD/ports 64c85efdevel/py-jsonrpclib-pelix distinfo Makefile

devel/py-jsonrpclib-pelix: Update to 1.1.0
DeltaFile
+3-3devel/py-jsonrpclib-pelix/distinfo
+1-1devel/py-jsonrpclib-pelix/Makefile
+4-42 files

LLVM/project ae1d75elibc/src/__support/math hypotf16.h expxf16_utils.h

[libc][math] Guard f16 math headers to fix certain 32-bit ARM builds (#200715)

Wrap hypotf16.h and expxf16_utils.h in LIBC_TYPES_HAS_FLOAT16 macros
like other flaot16 math headers. This fixes build breaks on systems
where float16 is unsupported (like some 32-bit ARM).
DeltaFile
+6-0libc/src/__support/math/hypotf16.h
+6-0libc/src/__support/math/expxf16_utils.h
+12-02 files

LLVM/project e9556fcmlir/lib/Conversion/MathToSPIRV MathToSPIRV.cpp, mlir/test/Conversion/MathToSPIRV math-to-gl-spirv.mlir math-to-opencl-spirv.mlir

[mlir][SPIR-V] Convert math.trunc to GL Trunc and CL trunc (#200739)
DeltaFile
+4-0mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
+4-0mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
+2-0mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
+10-03 files

LLVM/project 52e2280clang/lib/CodeGen TargetInfo.h CodeGenModule.cpp, clang/lib/CodeGen/Targets AMDGPU.cpp SPIR.cpp

[NFCI][clang] Allow overriding any global variable address space

Allow the target to change the AS of a global variable at will, not just whenever Clang cannot assign one.
This enables the next patch that will specialize LDS GVs for barriers as a separate address space.
DeltaFile
+10-9clang/lib/CodeGen/Targets/AMDGPU.cpp
+12-6clang/lib/CodeGen/TargetInfo.h
+7-8clang/lib/CodeGen/Targets/SPIR.cpp
+11-2clang/lib/CodeGen/CodeGenModule.cpp
+5-6clang/lib/CodeGen/TargetInfo.cpp
+6-3clang/lib/CodeGen/Targets/AVR.cpp
+51-346 files

LLVM/project c9f6a05llvm/test/CodeGen/AMDGPU s-barrier-id-allocation.ll, mlir/include/mlir/Dialect/LLVMIR ROCDLOps.td

Fix MLIR
DeltaFile
+21-21llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
+8-6mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+4-4mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
+2-2mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+1-1mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+36-345 files

LLVM/project 005e564llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU addrspacecast-barrier.ll s-barrier.ll

[RFC][AMDGPU] Add BARRIER address space

Add a new BARRIER address space that is used for global variables that are used to represent the barrier IDs in GFX12.5.

These barrier addresses just have values corresponding 1-1 to barrier IDs. They are still implemented on top of LDS, but the offsetting happens during an addrspacecast to generic, not whenever the barrier GV is used.

The motivation for this is to make the relation between LDS and barrier GVs explicit in the compiler. It does add a bit more complexity, but that complexity was already there, just hidden by pretending barrier GVs were actual LDS.
DeltaFile
+442-0llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+62-45llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+54-31llvm/test/CodeGen/AMDGPU/s-barrier.ll
+52-14llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+35-31llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll
+32-32llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
+677-15342 files not shown
+1,108-44148 files

LLVM/project 7e5a386llvm/lib/Target/AMDGPU AMDGPULowerExecSync.cpp

clang-format
DeltaFile
+1-2llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
+1-21 files

OPNSense/core fedc3e5src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms dialogDNatRule.xml dialogSNatRule.xml, src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes SourceNatRuleField.php

Firewall: NAT: Add the same UI design to the NAT pages as the firewall page (#10359)

* Firewall: NAT: Add the same UI design to the NAT pages as the firewall page from 18533b4, but slightly adjusted as NAT rules do not have sort_order or priority groups, so all grouping happens either by category, or to a synthetic automatic category if the rules contain an is_automatic true boolean.

* Implement sort_order in DNAT controller so the same tree view logic as in firewall rules can be used, this eases maintainence

* Add sort order volatile fields to SourceNatRuleField shared by SNAT, ONAT and NPTv6 inside filter model.

* make sweep

* prio_group is static in NAT rules, so we can use it directly

* Add comment about prio_group inside filter_rule.volt
DeltaFile
+118-40src/opnsense/mvc/app/views/OPNsense/Firewall/nat_rule.volt
+15-0src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes/SourceNatRuleField.php
+11-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogDNatRule.xml
+10-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogSNatRule.xml
+10-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogOneToOneRule.xml
+10-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogNptRule.xml
+174-443 files not shown
+192-459 files

FreeBSD/src dfd2273bin/sh miscbltin.c

sh: Fix pipebuf limit

Since the factor is not 1, we need to provide a unit.

MFC after:      1 week
Fixes:          5d92f20c7d31 ("bin/sh: support RLIMIT_PIPEBUF")
Reviewed by:    kib
Differential Revision:  https://reviews.freebsd.org/D57352
DeltaFile
+1-1bin/sh/miscbltin.c
+1-11 files

FreeBSD/ports 9a777e4Mk/Uses cargo.mk, sysutils/rust-coreutils Makefile

sysutils/rust-coreutils: fix unit tests

PR:     294424, 294597
Reported by:    diizzy
DeltaFile
+7-1Mk/Uses/cargo.mk
+5-0sysutils/rust-coreutils/Makefile
+12-12 files

FreeBSD/ports 332534esysutils/rust-coreutils distinfo Makefile.crates

sysutils/rust-coreutils: update to 0.9.0

Changelog:      https://github.com/uutils/coreutils/releases/tag/0.9.0
DeltaFile
+179-187sysutils/rust-coreutils/distinfo
+88-92sysutils/rust-coreutils/Makefile.crates
+1-2sysutils/rust-coreutils/Makefile
+268-2813 files

LLVM/project 62b7cf9llvm/lib/Target/AMDGPU GCNHazardRecognizer.cpp, llvm/test/CodeGen/AMDGPU buffer-store-dwordx4-vpk-mul-war-hazard-gfx942.mir

[AMDGPU] Widen MUBUF/MTBUF source-vgpr WAR hazard on gfx940-family to SGPR soffset (#197267)

createsVALUHazard previously gated the MUBUF/MTBUF source-vgpr WAR
hazard to fire only when SOFFSET was a literal or absent. On
gfx940-family subtargets that gate is too narrow: the hazard also fires
when SOFFSET is sourced from an SGPR.

Concretely, on gfx950 a sequence of the form

```
  buffer_store_dwordx4 v[X:X+3], voff, descr, sN offen
  v_pk_mul_f32 v[X:X+1], <src>, <src>           # next VALU cycle
```

deterministically commits the post-pk_mul value of v[X+1] to memory for
the second dword of the store; the other three dwords store correctly.

The wait-state window depends on the SOFFSET shape:


    [20 lines not shown]
DeltaFile
+122-0llvm/test/CodeGen/AMDGPU/buffer-store-dwordx4-vpk-mul-war-hazard-gfx942.mir
+58-21llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+180-212 files

LLVM/project dc01d53llvm/test/CodeGen/AMDGPU s-barrier-id-allocation.ll, mlir/include/mlir/Dialect/LLVMIR ROCDLOps.td

Fix MLIR
DeltaFile
+21-21llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll
+8-6mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+4-4mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl-barriers-gfx12.mlir
+2-2mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+1-1mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+36-345 files

OpenBSD/ports aeSGCesnet/dnsdist distinfo Makefile, net/dnsdist/patches patch-dnsdist-lua_cc

   Update to dnsdist 2.0.6
VersionDeltaFile
1.35+2-2net/dnsdist/distinfo
1.66+1-1net/dnsdist/Makefile
1.4+0-0net/dnsdist/patches/patch-dnsdist-lua_cc
+3-33 files

FreeBSD/src 4ccbceesys/dev/intel spi_pci.c

spi: Remove incorrect pci id

This id is for SPI flash instead of spi bus

Fixes: 39e297bf54a5 ("ig4iic: Add PantherLake IDs")
MFC after:      2 weeks
Sponsored by:  The FreeBSD Foundation
Sponsored by:  Framework Computer Inc
DeltaFile
+0-1sys/dev/intel/spi_pci.c
+0-11 files

LLVM/project 683c367lldb/test/Shell/lldb-server TestGdbserverErrorDarwin.test TestGdbserverErrorMessages.test, lldb/tools/lldb-server lldb-server.cpp

[lldb][lldb-server][Darwin] Error when gdbserver mode is requested (#199654)

Fixes #199035

lldb-server's platform mode works on Apple platforms but the gdbserver
mode does not. Users should use debugserver instead, and platform mode
knows to spawn debugserver instead of lldb-server.

I'm adding an error to state this, because until now it would maybe
appear to work, or crash in strange ways. None of which can be fixed by
a user and are a waste of our time dealing with the bug reports.
DeltaFile
+6-0lldb/tools/lldb-server/lldb-server.cpp
+4-0lldb/test/Shell/lldb-server/TestGdbserverErrorDarwin.test
+3-0lldb/test/Shell/lldb-server/TestGdbserverErrorMessages.test
+13-03 files

OpenBSD/ports PSRsTuznet/powerdns distinfo Makefile

   Update to PowerDNS Authoritative Server 5.0.5
VersionDeltaFile
1.60+2-2net/powerdns/distinfo
1.115+1-1net/powerdns/Makefile
+3-32 files

LLVM/project 51b54ffclang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode cxx23.cpp

[clang][bytecode] Fix discarded dynamic casts (#200723)

If they are checked.
DeltaFile
+4-0clang/test/AST/ByteCode/cxx23.cpp
+2-0clang/lib/AST/ByteCode/Compiler.cpp
+6-02 files

FreeBSD/ports 8c97278www/py-dj52-django-mptt Makefile, www/py-dj52-django-multiselectfield Makefile

*/py-dj52*: Deprecate/Set to expire

* The counterparts of the py-dj52-* ports were switched to Django 5.2 in
  ce59801b72ef, so the py-dj52-* ports have no more consumers and are
  now obsolete.

* Set a relatively short EXPIRATION_DATE toward the end of June to wrap
  up things neatly before the 2026Q3 branch.

PR:             291707
With hat:       python
DeltaFile
+3-0www/py-dj52-django-mptt/Makefile
+3-0www/py-dj52-django-multiselectfield/Makefile
+3-0www/py-dj52-django-netfields/Makefile
+3-0www/py-dj52-django-otp/Makefile
+3-0www/py-dj52-django-permissionedforms/Makefile
+3-0www/py-dj52-django-prometheus/Makefile
+18-040 files not shown
+138-046 files

LLVM/project 40b722dmlir/include/mlir/Dialect/SPIRV/IR SPIRVGLOps.td SPIRVCLOps.td, mlir/test/Dialect/SPIRV/IR ocl-ops.mlir gl-ops.mlir

[mlir][SPIR-V] Add GL Trunc and CL trunc ops (#200738)
DeltaFile
+24-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLOps.td
+21-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td
+20-0mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
+18-0mlir/test/Dialect/SPIRV/IR/gl-ops.mlir
+2-0mlir/test/Target/SPIRV/gl-ops.mlir
+2-0mlir/test/Target/SPIRV/ocl-ops.mlir
+87-06 files

LLVM/project abdab06mlir/lib/Conversion/MathToSPIRV MathToSPIRV.cpp, mlir/test/Conversion/MathToSPIRV math-to-gl-spirv.mlir

[mlir][SPIR-V] Convert math.fpowi to spirv.GL.Pow (#200563)
DeltaFile
+44-1mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
+34-0mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
+78-12 files

OPNSense/plugins ce226aawww/nginx/src/opnsense/service/templates/OPNsense/Nginx http.conf

nginx: fix HTTP/3 reuseport duplicates (#5184)
DeltaFile
+9-2www/nginx/src/opnsense/service/templates/OPNsense/Nginx/http.conf
+9-21 files