LLVM/project 2ca54b4llvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Remove isLoopCarriedDep calls in computeStart (#174393)

When computing the viable cycles for scheduling an instruction,
`computeStart` used to include special-case logic to handle loop-carried
dependencies. This special handling was necessary because loop-carried
dependencies were represented by reversed forward-direction edges in the
DAG. Now that we have the DDG, which explicitly models loop-carried
dependencies, this special handling is no longer required. As a first
step towards completely removing `isLoopCarriedDep`, this patch
eliminates the special-case logic from `computeStart` and some related
functions.

Split off from https://github.com/llvm/llvm-project/pull/135148
DeltaFile
+0-60llvm/lib/CodeGen/MachinePipeliner.cpp
+0-10llvm/include/llvm/CodeGen/MachinePipeliner.h
+3-3llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
+3-733 files

OPNSense/core 4912a67src/etc/inc interfaces.inc

interfaces: fix wlanmode usage part 2 #9727
DeltaFile
+3-15src/etc/inc/interfaces.inc
+3-151 files

LLVM/project 3b9d407flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP/Todo multiple-types-declare_reduction.f90

[Flang] [OpenMP]Support for multiple types in declare_reduction (#179442)

Fixes [#178614](https://github.com/llvm/llvm-project/issues/178614)

This PR implements support for multiple types in OpenMP declare
reduction directives, as specified in OpenMP
Spec(`6.0-7.6.14declare_reduction Directive`).
When a declare reduction directive specifies several types (e.g.,` !$omp
declare reduction(name: integer, real : ...)`), separate reduction
operations are now generated for each type.

Modified `flang/lib/Lower/OpenMP/OpenMP.cpp` to:

- Loop through each type in the type list
- Generate a separate omp.declare_reduction operation for each type

---------

Co-authored-by: urvi-rav <urvi.rav at hpe.com>
DeltaFile
+51-0flang/test/Lower/OpenMP/Todo/multiple-types-declare_reduction.f90
+16-18flang/lib/Lower/OpenMP/OpenMP.cpp
+67-182 files

FreeBSD/ports 4d6becalang/python-doc-html distinfo Makefile

lang/python-doc-html: populate 3.13
DeltaFile
+5-1lang/python-doc-html/distinfo
+1-1lang/python-doc-html/Makefile
+6-22 files

FreeBSD/ports 5e61a90. MOVED, lang/python-doc-html distinfo Makefile

lang/python-doc-pdf-a4: remove

No longer provided since 3.13
DeltaFile
+0-8lang/python-doc-html/distinfo
+0-4lang/python-doc-pdf-a4/Makefile
+2-1MOVED
+1-1lang/python-doc-html/Makefile
+3-144 files

LLVM/project 6124671llvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Remove isLoopCarriedDep and use DDG
DeltaFile
+42-50llvm/lib/CodeGen/MachinePipeliner.cpp
+15-9llvm/include/llvm/CodeGen/MachinePipeliner.h
+3-0llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
+60-593 files

LLVM/project 3a4412bllvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Remove isLoopCarriedDep from computeStart
DeltaFile
+0-60llvm/lib/CodeGen/MachinePipeliner.cpp
+0-10llvm/include/llvm/CodeGen/MachinePipeliner.h
+3-3llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
+3-733 files

LLVM/project 82c0607llvm/lib/CodeGen MachinePipeliner.cpp, llvm/test/CodeGen/AArch64 sms-loop-carried-fp-exceptions1.mir

[MachinePipeliner] Add loop-carried dependences for FPExceptions (#174392)

As with loads and stores, instructions that may trigger floating‑point
exceptions must not be reordered across a barrier instruction. This
patch adds the missing loop‑carried dependencies between such
instructions and the barrier, preventing reordering that could
previously occur. Same as #174391, the implementation is based on that
of `ScheduleDAGInstrs::buildSchedGraph`.

Split off from #135148
DeltaFile
+45-32llvm/lib/CodeGen/MachinePipeliner.cpp
+2-7llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
+47-392 files

FreeBSD/src b562bbcsys/dev/e1000 if_em.c

e1000: Fix setting the promiscuous mode

The variable reg_rctl stores the value read from reg E1000_RCTL. It
may contain bits E1000_RCTL_VFE and E1000_RCTL_CFIEN which control
VLAN hardware filter feature. The promiscuous mode implies all tagged
or untagged packets should be accepted, so the VLAN hardware filter
feature should be disabled when enabling the promiscuous mode.
Calling em_if_vlan_filter_disable() did the task, but later writing
the value of reg_rctl back to the reg E1000_RCTL may restore the
feature.

Move the calling of em_if_vlan_filter_disable() after writing the reg
to fix that.

PR:             292759
Reviewed by:    kbowling
Tested by:      vova at zote.me
Fixes:          2796f7cab107 e1000: Fix up HW vlan ops
MFC after:      3 days

    [5 lines not shown]
DeltaFile
+1-1sys/dev/e1000/if_em.c
+1-11 files

LLVM/project c84913fllvm/test/Analysis/DependenceAnalysis rdiv-minor-algebra.ll

fix comment
DeltaFile
+4-3llvm/test/Analysis/DependenceAnalysis/rdiv-minor-algebra.ll
+4-31 files

FreeBSD/ports 84e04belang/python311 distinfo Makefile

lang/python311: pull in upstream commits addressing vuxml entries

Security: bfe9adc8-0224-11f1-8790-c5fb948922ad
DeltaFile
+11-1lang/python311/distinfo
+7-2lang/python311/Makefile
+18-32 files

FreeBSD/src 3cfe905sys/dev/e1000 if_em.c

e1000: Fix setting the promiscuous mode

The variable reg_rctl stores the value read from reg E1000_RCTL. It
may contain bits E1000_RCTL_VFE and E1000_RCTL_CFIEN which control
VLAN hardware filter feature. The promiscuous mode implies all tagged
or untagged packets should be accepted, so the VLAN hardware filter
feature should be disabled when enabling the promiscuous mode.
Calling em_if_vlan_filter_disable() did the task, but later writing
the value of reg_rctl back to the reg E1000_RCTL may restore the
feature.

Move the calling of em_if_vlan_filter_disable() after writing the reg
to fix that.

PR:             292759
Reviewed by:    kbowling
Tested by:      vova at zote.me
Fixes:          2796f7cab107 e1000: Fix up HW vlan ops
MFC after:      3 days

    [4 lines not shown]
DeltaFile
+1-1sys/dev/e1000/if_em.c
+1-11 files

FreeBSD/src 8880678sys/dev/e1000 if_em.c

e1000: Fix setting the promiscuous mode

The variable reg_rctl stores the value read from reg E1000_RCTL. It
may contain bits E1000_RCTL_VFE and E1000_RCTL_CFIEN which control
VLAN hardware filter feature. The promiscuous mode implies all tagged
or untagged packets should be accepted, so the VLAN hardware filter
feature should be disabled when enabling the promiscuous mode.
Calling em_if_vlan_filter_disable() did the task, but later writing
the value of reg_rctl back to the reg E1000_RCTL may restore the
feature.

Move the calling of em_if_vlan_filter_disable() after writing the reg
to fix that.

PR:             292759
Reviewed by:    kbowling
Tested by:      vova at zote.me
Fixes:          2796f7cab107 e1000: Fix up HW vlan ops
MFC after:      3 days

    [3 lines not shown]
DeltaFile
+1-1sys/dev/e1000/if_em.c
+1-11 files

LLVM/project 79a26b9llvm/test/tools/llvm-mca/RISCV/Andes45 rvv-arithmetic.s rvv-mul-div.s

[RISCV] Update Andes45 vector integer arithmetic scheduling info (#174538)

This PR adds latency/throughput for all RVV integer arithmetic to the
andes45 series scheduling model.
DeltaFile
+1,133-1,133llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
+769-769llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s
+757-757llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s
+681-681llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s
+441-441llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
+273-273llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s
+4,054-4,0543 files not shown
+4,517-4,4129 files

LLVM/project cf7d864llvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Remove isLoopCarriedDep and use DDG
DeltaFile
+42-50llvm/lib/CodeGen/MachinePipeliner.cpp
+15-9llvm/include/llvm/CodeGen/MachinePipeliner.h
+3-0llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
+60-593 files

LLVM/project a28549ellvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Remove isLoopCarriedDep from computeStart
DeltaFile
+0-60llvm/lib/CodeGen/MachinePipeliner.cpp
+0-10llvm/include/llvm/CodeGen/MachinePipeliner.h
+3-3llvm/test/CodeGen/AArch64/sms-instruction-scheduled-at-correct-cycle.mir
+3-733 files

LLVM/project 45235a9llvm/lib/CodeGen MachinePipeliner.cpp, llvm/test/CodeGen/AArch64 sms-loop-carried-fp-exceptions1.mir

[MachinePipeliner] Add loop-carried dependences for FPExceptions
DeltaFile
+45-32llvm/lib/CodeGen/MachinePipeliner.cpp
+2-7llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
+47-392 files

LLVM/project 93f440dllvm/include/llvm/Analysis DependenceAnalysis.h, llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Rewrite the formula in the Strong SIV test
DeltaFile
+47-56llvm/lib/Analysis/DependenceAnalysis.cpp
+16-9llvm/test/Analysis/DependenceAnalysis/strong-siv-large-btc.ll
+4-5llvm/include/llvm/Analysis/DependenceAnalysis.h
+67-703 files

LLVM/project 93d99e3llvm/lib/Target/AMDGPU AMDGPU.td

[NFC][AMDGPU] Reorganize gfx125x features (#179843)

DeltaFile
+16-9llvm/lib/Target/AMDGPU/AMDGPU.td
+16-91 files

LLVM/project 0950660clang/lib/Analysis/FlowSensitive Transfer.cpp, clang/unittests/Analysis/FlowSensitive TransferTest.cpp

[clang][dataflow] Fix a new crash on assigning values of unmodeled types. (#179788)

Regressed by me in #178943. Caught by @jvoung.
DeltaFile
+48-0clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
+9-1clang/lib/Analysis/FlowSensitive/Transfer.cpp
+57-12 files

LLVM/project 1c42807clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp CIRGenBuiltin.cpp

[CIR][AMDGPU][NFC] Add CIRGenBuiltinAMDGPU file to support AMDGPU builtins codegen (#179237)

Upstreaming ClangIR PR : https://github.com/llvm/clangir/pull/2030

This PR adds CIRGenBuiltinAMDGPU.cpp file for AMDGPU specific builtin
codegen support.
Lists out all the builtins that are currently supported for codegen in
`clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp`.
All builtins codegen are currently "NYI".
DeltaFile
+828-0clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+4-0clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+4-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+1-0clang/lib/CIR/CodeGen/CMakeLists.txt
+837-04 files

FreeBSD/src cc702c7sys/dev/acpica acpi.c

Unbreak the build

Add the missing comma in the `device_printf` statement.

MFC after:      1 week
MFC with:       9c666de5b
Fixes:  9c666de5b ("Make message added for Darwin OSI quirk more terse")
DeltaFile
+1-1sys/dev/acpica/acpi.c
+1-11 files

pfSense/pfsense 480a1c0. build.conf.sample build.sh, build/installer-extras README.txt

Bump up the Copyright year.
DeltaFile
+2-2src/etc/inc/copynotice.inc
+1-1build.conf.sample
+1-1build.sh
+1-1build/installer-extras/README.txt
+1-1build/scripts/build_freebsd.sh
+1-1build/scripts/common.subr
+7-7541 files not shown
+548-548547 files

LLVM/project adf7dbclld/test/ELF loongarch-branch.s conflict.s

[ELF,test] Improve error message tests

They have multiple `not ld.lld` commands or they test multiple error
messages. Add --implicit-check-not=error: to catch unexpected errors.
While updating them, use directory isolation pattern and simplify
filenames where appropriate.

Rename abs-conflict.s to conflict-abs.s to be consistent with other
conflict*.s tests.
DeltaFile
+27-35lld/test/ELF/loongarch-branch.s
+25-24lld/test/ELF/conflict.s
+20-22lld/test/ELF/undef-spell-corrector.s
+23-13lld/test/ELF/ztext.s
+21-9lld/test/ELF/relocation-nocopy.s
+11-10lld/test/ELF/ppc64-error-toc-tail-call.s
+127-11311 files not shown
+190-17217 files

LLVM/project fc56916llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv setcc-int-vp-mask.ll fixed-vectors-setcc-int-vp-mask.ll

[RISCV] Correct lowering of ISD::SETGE/SETULE/SETLE/SETUGE in lowerVPSetCCMaskOp. (#179801)

XOR should be OR to match the comment.

Found while reviewing #179622 which deletes this function. I would like
to commit this first so we have a correct baseline for reviewing that
patch.
DeltaFile
+28-28llvm/test/CodeGen/RISCV/rvv/setcc-int-vp-mask.ll
+16-16llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp-mask.ll
+2-2llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+46-463 files

LLVM/project 7c64723clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode gh176549.cpp

[clang][bytecode] Fix stack corruption in pointer arithmetic discard (#176555)

The bytecode compiler was ignoring the DiscardResult flag in 
VisitPointerArithBinOp
, causing pointer addition and subtraction results to persist on the
stack when they should have been popped (e.g., in comma expressions).
This led to stack corruption and assertion failures in subsequent
operations that encountered an unexpected pointer on the stack.

This patch refactors the unified addition/subtraction logic to ensure
the result is properly popped when DiscardResult is true.

Fixes #176549
DeltaFile
+15-12clang/lib/AST/ByteCode/Compiler.cpp
+7-0clang/test/AST/ByteCode/gh176549.cpp
+22-122 files

LLVM/project dfdc3b7llvm/lib/CodeGen MachinePipeliner.cpp, llvm/test/CodeGen/AArch64 sms-loop-carried-fp-exceptions1.mir

[MachinePipelner] Add loop-carried dependencies for global barriers (#174391)

The loads/stores must not be reordered across barrier instructions.
However, in MachinePipeliner, it potentially could happen since
loop-carried dependencies from loads/stores to a barrier instruction
were not considered. The same problem exists for barrier-to-barrier
dependencies. This patch adds the handling for those cases. The
implementation is based on that of `ScheduleDAGInstrs::buildSchedGraph`.

Split off from https://github.com/llvm/llvm-project/pull/135148
DeltaFile
+51-4llvm/lib/CodeGen/MachinePipeliner.cpp
+25-15llvm/test/CodeGen/Hexagon/swp-loop-carried-order-dep6.mir
+10-2llvm/test/CodeGen/AArch64/sms-loop-carried-fp-exceptions1.mir
+86-213 files

FreeBSD/doc 7e6b303documentation/content/en/articles/committers-guide _index.adoc

committers-guide: Tidy Fixes: trailer instructions

Reviewed by:            jlduran
Reported by:            emaste, jlduran
Differential Revision:  https://reviews.freebsd.org/D55121
DeltaFile
+1-1documentation/content/en/articles/committers-guide/_index.adoc
+1-11 files

FreeBSD/src abf911ausr.sbin/pkg pkg.c config.c

pkg: Fix mirror type parsing and service discovery

Signed-off-by: Pavel Knoblokh <info at software-advisory.com.au>
Reviewed by:    emaste, imp, kevans
Fixes:          dc4581589a3 ("pkg: clean support for repositories")
Closes:         https://github.com/freebsd/freebsd-src/pull/1989
DeltaFile
+6-0usr.sbin/pkg/pkg.c
+2-1usr.sbin/pkg/config.c
+8-12 files

FreeBSD/src 2e020c8lib/libbe be.c libbe.3, lib/libbe/tests target_prog.c be_create.sh

bectl: Add -E flag to create an empty boot environment

Signed-off-by: Pat Maddox <pat at patmaddox.com>
Reviewed by:    kevans
MFC after:      1 week
Closes:         https://github.com/freebsd/freebsd-src/pull/1975
DeltaFile
+50-14lib/libbe/be.c
+14-2sbin/bectl/bectl.c
+13-1sbin/bectl/bectl.8
+7-4lib/libbe/tests/target_prog.c
+9-0lib/libbe/tests/be_create.sh
+8-1lib/libbe/libbe.3
+101-223 files not shown
+111-239 files