FreeBSD/src 59d6422usr.sbin/makefs/tests makefs_zfs_tests.sh, usr.sbin/makefs/zfs dsl.c

makefs: Allow "legacy" as a valid ZFS mountpoint

Allow "legacy" alongside "none" as a valid value for the ZFS mountpoint
property, matching zfsprops(7).

Reviewed by:    imp, markj
MFC after:      1 week
Differential Revision:  https://reviews.freebsd.org/D58781
DeltaFile
+39-0usr.sbin/makefs/tests/makefs_zfs_tests.sh
+3-2usr.sbin/makefs/zfs/dsl.c
+42-22 files

FreeBSD/src 889d08fusr.sbin/makefs/tests makefs_zfs_tests.sh

makefs: tests: Fix a missing slash in multi_dataset_4

Fix a typo in the ZFS multi_dataset_4 test, where a path separator was
missing.

Reported by:    markj
MFC after:      1 week
DeltaFile
+1-1usr.sbin/makefs/tests/makefs_zfs_tests.sh
+1-11 files

LLVM/project e15d649clang/docs ReleaseNotes.md, clang/lib/Sema SemaTemplateInstantiate.cpp SemaExpr.cpp

[clang] Don't mark a field invalid for unparsed in-class member initializer. (#215423)

We delay parsing of in-class member initializers until the end of the
outermost class declaration. It is an error for code to try to use that
initializer before it's parsed. However, sometimes that error can be
suppressed by an SFINAE context. Since we aren't sure a user-visible
error will be emitted, don't mark the field invalid.

Fixes https://github.com/llvm/llvm-project/issues/215166 .
DeltaFile
+14-0clang/test/SemaCXX/cxx11-default-member-initializers.cpp
+5-0clang/docs/ReleaseNotes.md
+0-1clang/lib/Sema/SemaTemplateInstantiate.cpp
+0-1clang/lib/Sema/SemaExpr.cpp
+19-24 files

LLVM/project 6ab70d7llvm/lib/Target/AMDGPU VOP1Instructions.td, llvm/test/MC/AMDGPU gfx1250_asm_vop3_from_vop1-fake16.s

[AMDGPU] Allow OPSEL in bf16 trans instructions in fake16
DeltaFile
+24-0llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1-fake16.s
+8-8llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
+8-8llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
+8-8llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
+2-0llvm/lib/Target/AMDGPU/VOP1Instructions.td
+50-245 files

LLVM/project 8c43249clang/test/CodeGen openacc-invalid-stmt.cpp

[OpenACC][NFC] Make CHECK-NOT lines more specific (#215677)

These are effectively irrelevant, as the problem we are trying to check
for is that the app doesn't crash. So make them a bit more specific (add
'acc ') since we don't know what any sort of IR for these would look
like ANYWAY. Hopefully the higher specificity makes these good enough
for folks.
DeltaFile
+9-6clang/test/CodeGen/openacc-invalid-stmt.cpp
+9-61 files

LLVM/project 47e6958llvm/lib/Transforms/Vectorize LoopVectorizationLegality.cpp, llvm/test/Transforms/LoopVectorize outer_loop_inner_loop_exits.ll

[LV] Require inner loops to only exit via latch in outer loop path. (#215675)

Currently codegen only handles inner loops exiting via the latch. Loops
with uniform branches exiting the loops, like in the added tests, cause
`opt` to hang.

Reject such loops at the outset.
DeltaFile
+96-0llvm/test/Transforms/LoopVectorize/outer_loop_inner_loop_exits.ll
+18-0llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+114-02 files

LLVM/project 55843f1clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/CodeGen CIRGenBuiltin.cpp CIRGenCoroutine.cpp

[CIR] Add token.none and fix coro.end signature (#214125)

This patch adds the `cir.token.none` operation, mirroring the LLVM
dialect's `llvm.mlir.none` operation for representing the LLVM IR `none`
token. It also fixes the signature of `cir.coro.intrinsic.end` to
correctly take a token operand, matching the corresponding LLVM
coroutine intrinsic.
DeltaFile
+49-48clang/test/CIR/CodeGenCoroutines/coro-task.cpp
+16-9clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
+19-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+2-4clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+4-2clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
+6-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+96-651 files not shown
+97-677 files

LLVM/project 28f47d0llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU GCNProcessors.td

[AMDGPU] Move EU and Wave Queries into TargetParser

Change-Id: I32b24e6fd7c676d7ca99bdcaa7f9baf351ff4f7f
DeltaFile
+71-0llvm/lib/Target/AMDGPU/GCNProcessors.td
+13-37llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+37-0llvm/unittests/TargetParser/TargetParserTest.cpp
+24-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+18-0llvm/test/TableGen/AMDGPUTargetDefErrors.td
+13-0llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+176-379 files not shown
+213-6615 files

FreeNAS/freenas 22f198csrc/middlewared/middlewared/alert/source license_status.py

Only report a missing license on HA capable systems

This commit fixes an issue where an unlicensed R-series or Z-series started getting told to contact support about a license it was never sold. Those chassis are appliances so they satisfy the hardware rule, but they cannot fail over, and on 26 the product_type disjunct meant a system with no license only reached this alert when it was HA capable. HA capability is a chassis probe the applicability axes deliberately do not carry, so the test sits in check_sync rather than in applies_to.
DeltaFile
+3-0src/middlewared/middlewared/alert/source/license_status.py
+3-01 files

FreeNAS/freenas 23bfa9bsrc/middlewared/middlewared/alert/applicability __init__.py vocabulary.py, src/middlewared/middlewared/alert/source memory_errors.py

Keep uncorrected memory error alerts on Minis

This commit fixes an issue where the uncorrected memory error alert stopped running on Minis even though they carry ECC memory and populate the same EDAC counters the source reads. TRUENAS_HARDWARE excludes MINI by construction, so a licensed Mini lost a proactive support warning it used to get, and any alert it was already sitting on was purged on upgrade without a cleared notification.

TRUENAS_OR_MINI_HARDWARE is the union of the two hardware names, composed from them rather than defined as "not GENERIC" so a hardware class added later has to be added here deliberately. MemorySizeMismatch stays on TRUENAS_HARDWARE because its own check returns early without an HA licence.
DeltaFile
+9-0src/middlewared/middlewared/alert/applicability/vocabulary.py
+3-3src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+3-3src/middlewared/middlewared/alert/source/memory_errors.py
+2-0src/middlewared/middlewared/pytest/unit/alert/test_applicability_engine.py
+2-0src/middlewared/middlewared/alert/applicability/__init__.py
+19-65 files

FreeNAS/freenas e620ef5src/middlewared/middlewared/alert base.py, src/middlewared/middlewared/alert/applicability __init__.py snapshot.py

Type alert applicability against AlertSource and AlertClass

This commit adds changes to drop the Declaration protocols in favour of TYPE_CHECKING imports of AlertSource and AlertClass, which is what review asked for, and to tighten the surface while we are in there: rule_name is no longer re-exported now that declaration_rule_name is the only entry point production goes through, and the Rule docstring keeps just the part that constrains how you write one, which is to name it so the black-hole diagnostic has something to report.

Dropping the protocols makes alert.applicability depend on alert.base, and import-linter counts TYPE_CHECKING imports, so that broke the package layering contract: engine reached vocabulary and snapshot through alert.base importing the whole package. alert/base.py now takes Rule from the engine module directly, which is the only thing it ever wanted, and the contract holds without an ignore.
DeltaFile
+10-19src/middlewared/middlewared/alert/applicability/engine.py
+12-7src/middlewared/middlewared/alert/applicability/snapshot.py
+3-11src/middlewared/middlewared/alert/applicability/__init__.py
+2-2src/middlewared/middlewared/pytest/unit/alert/test_run_gates.py
+1-1src/middlewared/middlewared/pytest/unit/alert/test_applicability_engine.py
+1-1src/middlewared/middlewared/alert/base.py
+29-416 files

FreeNAS/freenas 56468e4src/middlewared/middlewared/plugins alert.py, src/middlewared/middlewared/pytest/unit/alert test_applicability_matrix.py test_run_gates.py

Say which systems the enclosure alerts newly reach

This commit adds changes to test the failover run gates and to correct what the enclosure change was described as affecting. post_failover_blackout and require_stable_peer move out of the run loop into source_run_gates_pass so both can be checked without a middleware object or a running service, and a frozen inventory test pins which sources carry them and what each one is gated on.

failover_related was gating enclosure_status on an HA licence, which is a licensing predicate in front of a hardware question. Enclosure faults are now reported on every iX appliance that lacks an ENTERPRISE_HA licence, both unlicensed appliances and single controller licensed ones (ENTERPRISE_SINGLE, FREENAS-CERTIFIED). The earlier note said only "unlicensed appliances", which undercounts the fleet by the whole licensed single controller half. EnclosureHealthy is INFO and is raised once per enclosure, expansion shelves included, so affected systems will see several new informational alerts.

The matrix legend claimed a source row meant the source is ran, which was never true: it models applies_to only, and never post_failover_blackout, require_stable_peer, the schedule or source locks. That is the only change to the golden file.
DeltaFile
+151-0src/middlewared/middlewared/pytest/unit/alert/test_run_gates.py
+20-4src/middlewared/middlewared/plugins/alert.py
+3-1src/middlewared/middlewared/pytest/unit/alert/test_applicability_matrix.py
+3-1src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+177-64 files

FreeNAS/freenas 7474fbesrc/middlewared/middlewared/alert base.py, src/middlewared/middlewared/alert/source jbof.py failover.py

Remove the product_type gate from alerts

This commit adds changes to delete `products` from every alert declaration now that the hardware and license axes carry the gating, along with the `product_types` field it fed in `alert.list_categories` and the unused `AlertService.product_type` helper. The applicability matrix loses its old-versus-new comparison and becomes a frozen inventory of what each declaration covers; the declared answers are unchanged from the previous commit, cell for cell.

The API field is removed outright rather than deprecated because nothing consumes it - it exists in no earlier API version and has no client in the WebUI, api_client or midcli, so the downgrade adapter's strip loop is already a no-op here. Forward-porting this to master will need a `to_previous` on `AlertCategoryClass`, because there v26_0_0 is frozen with the field required and the version adapter only backfills fields that are not required.
DeltaFile
+362-362src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+57-63src/middlewared/middlewared/pytest/unit/alert/test_applicability_matrix.py
+0-10src/middlewared/middlewared/alert/source/mseries_nvdimm_and_bios.py
+1-7src/middlewared/middlewared/alert/base.py
+0-7src/middlewared/middlewared/alert/source/failover.py
+0-6src/middlewared/middlewared/alert/source/jbof.py
+420-45520 files not shown
+422-52126 files

FreeNAS/freenas ae230e7src/middlewared/middlewared/alert/source security.py, src/middlewared/middlewared/pytest/unit/alert/golden applicability.txt

Run the local account expiration alert everywhere

This commit fixes an issue where the local account expiration alert stopped running on Minis even though they can still turn on password aging: max_password_age sits behind the STIG entitlement, whose vector grants on the key column of either hardware side, and that key is injected into every legacy licence. The source is also the admin lockout recovery, since it regenerates shadow a day before the last full admin password ages out, so excluding a system that can arm password aging leaves it with no way back in short of a reboot.

check() already returns early unless max_password_age is set, so that early return is the applicability test and the rule is dropped rather than widened. On a system that cannot set the option the daily cost is one config read.
DeltaFile
+1-2src/middlewared/middlewared/alert/source/security.py
+1-1src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+2-32 files

FreeNAS/freenas 854f499src/middlewared/middlewared/alert/source failover_sync.py mseries_nvdimm_and_bios.py, src/middlewared/middlewared/plugins alert.py

Move alert gating onto hardware and license axes

This commit adds changes to give every declaration under alert/source its own applicability rule on the decoupled hardware and license axes, and points the enforcement sites in plugins/alert.py at those rules instead of system.product_type. The products lines stay for now because the API field still reads them. HA classes take a hardware applies_to alongside listed_when on purpose, so on iX hardware whose HA licence is absent or lapsed they leave the settings catalogue without being silenced, and a source that no longer applies now has its stored alerts dropped rather than stranding them undismissable. The two scheduled-reboot classes are the exception: they are gated on the HA licence itself, so a system without one stops seeing them at all.

sata_dom_wear is knowingly shipped in a broken state: its source calls disk.sata_dom_lifetime_left, which was removed in March 2025, so appliances will see the check fail. That is a deliberate, signed-off decision and not an oversight.

The checked-in matrix under pytest/unit/alert/golden spells out old versus new applicability per population for every declaration, and its test regenerates and diffs it so no population change lands unread.
DeltaFile
+377-0src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+266-0src/middlewared/middlewared/pytest/unit/alert/test_applicability_matrix.py
+34-16src/middlewared/middlewared/plugins/alert.py
+16-0src/middlewared/middlewared/alert/source/failover.py
+13-0src/middlewared/middlewared/alert/source/mseries_nvdimm_and_bios.py
+11-0src/middlewared/middlewared/alert/source/failover_sync.py
+717-1619 files not shown
+836-1625 files

FreeNAS/freenas ad3904asrc/middlewared/middlewared/alert/applicability snapshot.py vocabulary.py, src/middlewared/middlewared/plugins alert.py

Express alert applicability rules as functions and cache them once

This commit adds changes to replace the applicability rule dataclasses with plain functions that take facts, and to route every applicability answer through a single Applicability object holding one reading of those facts and memoizing per declaration. Nothing in the tree ever introspected rule structure, so the isinstance dispatch and the AnyOf/AllOf combinators go away with it, and because the seven vocabulary names are unchanged no alert declaration moves and the golden matrix is byte for byte identical.

The five separate get_facts() reads in the alert plugin become one, invalidated on system.post_license_update so an upload takes effect on both nodes at once. A None license is never cached, since get_license() returns None both for "no license" and "the daemon did not answer" and we do not want a hiccup to stick until restart.
DeltaFile
+152-66src/middlewared/middlewared/pytest/unit/alert/test_applicability_engine.py
+191-0src/middlewared/middlewared/pytest/unit/alert/test_alert_plugin_applicability.py
+33-72src/middlewared/middlewared/alert/applicability/engine.py
+62-28src/middlewared/middlewared/plugins/alert.py
+43-28src/middlewared/middlewared/alert/applicability/vocabulary.py
+62-0src/middlewared/middlewared/alert/applicability/snapshot.py
+543-1945 files not shown
+615-23611 files

FreeNAS/freenas 28226b8src/middlewared/middlewared/alert/source sata_dom_wear.py, src/middlewared/middlewared/pytest/unit/alert/golden applicability.txt

Remove the broken SATA DOM wear alert

This commit adds changes to delete the SATA DOM wear alert source and its two classes. The source calls disk.sata_dom_lifetime_left, which was removed in 25.10 and has no implementation anywhere, so it raises on every run on any M or Z series chassis and produces nothing but alert source failures.

Alerts already persisted on existing systems clear on the next start through the stale source check in initialize, which runs before the policies are built, so nothing is announced as cleared. No migration is needed, matching how every previous alert source removal was handled.
DeltaFile
+0-55src/middlewared/middlewared/alert/source/sata_dom_wear.py
+0-5src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+0-602 files

FreeNAS/freenas 24b2a70src/middlewared/middlewared/alert/source fips.py, src/middlewared/middlewared/pytest/unit/alert/golden applicability.txt

Keep the FIPS misconfiguration alert on licensed Minis and whiteboxes

This commit fixes an issue where the FIPS misconfiguration alert stopped running on licensed Minis and licensed whiteboxes even though those systems can still enable FIPS: the STIG vector is key-only on both hardware sides and STIG is injected into every legacy licence, so they are entitled while TRUENAS_HARDWARE excluded them by construction.

EXPECTED_TO_BE_LICENSED is a strict superset of both the old product_type gate and the hardware gate, so nothing loses coverage, unlicensed appliances keep the check that catches FIPS being active when it was never configured, and licensed whiteboxes that could never see this alert are now covered too.
DeltaFile
+2-2src/middlewared/middlewared/alert/source/fips.py
+1-1src/middlewared/middlewared/pytest/unit/alert/golden/applicability.txt
+3-32 files

FreeNAS/freenas dc72dabsrc/middlewared/middlewared/alert/applicability __init__.py engine.py, src/middlewared/middlewared/plugins alert.py

Name alert applicability rules and detect black-holed alerts

This commit adds changes to give the alert applicability engine one name per population instead of thirty open-coded rule constructions, and to catch alerts that are created but can never be displayed.

The rules alert declarations gate on now live in a vocabulary module next to the engine, so TRUENAS_HARDWARE is defined once rather than built at eighteen sites in two competing conventions. LicenseRule collapses into EntitlementRule, which asks the entitlement policy about any feature rather than the two the old enum could spell, so STIG and everything after it is a one-line declaration. AllOf joins AnyOf in the algebra, listed_when becomes listed_only_when to say that it narrows, and AlertFacts is gone in favour of the identical EntitlementFacts that applies() was converting to anyway.

A source whose rule is satisfied where its class's rule is not creates alerts that are stored and never shown. Nothing checked for that, and since the failover declarations deliberately straddle the two axes it is no longer something a reviewer can spot by eye. A test now infers the source to class relation out of check() and asserts the implication across every population, with a runtime guard logging the cases static analysis cannot see. It found four pre-existing ones in memory_errors and sensors, which are fixed by narrowing the sources so nothing user visible moves.

One behaviour change worth a release note: failover_related was gating enclosure_status on an HA licence, which is a licensing predicate in front of a hardware question, so unlicensed appliances will now report enclosure faults they were previously silent about. The flag is renamed post_failover_blackout to name what it actually contributes.
DeltaFile
+106-40src/middlewared/middlewared/pytest/unit/alert/test_applicability_matrix.py
+68-35src/middlewared/middlewared/alert/applicability/engine.py
+63-35src/middlewared/middlewared/plugins/alert.py
+89-0src/middlewared/middlewared/pytest/unit/alert/test_alert_black_holes.py
+48-29src/middlewared/middlewared/pytest/unit/alert/test_applicability_engine.py
+48-23src/middlewared/middlewared/alert/applicability/__init__.py
+422-16230 files not shown
+605-38936 files

FreeNAS/freenas c545888src/middlewared/middlewared/alert/applicability facts.py system.py, src/middlewared/middlewared/pytest/unit/alert test_applicability_system.py test_applicability_engine.py

Add an applicability engine for alerts

This commit adds changes to give alerts a way to state which systems they are meaningful on in terms of two independent axes, hardware class and license, instead of the conflated product_type predicate they lean on today. The engine is pure and delegates the HA question to the entitlement policy so there stays one definition of it in the tree.

Nothing declares the new applies_to/listed_when slots yet and no enforcement point reads them, so this is inert on its own; the declarations and the call sites follow.
DeltaFile
+88-0src/middlewared/middlewared/pytest/unit/alert/test_applicability_engine.py
+76-0src/middlewared/middlewared/alert/applicability/engine.py
+38-0src/middlewared/middlewared/alert/applicability/__init__.py
+36-0src/middlewared/middlewared/pytest/unit/alert/test_applicability_system.py
+26-0src/middlewared/middlewared/alert/applicability/system.py
+21-0src/middlewared/middlewared/alert/applicability/facts.py
+285-02 files not shown
+299-08 files

FreeNAS/freenas a1423d7docs/source/middleware/plugins alert.rst

Document alert applicability and the frozen inventory

This commit adds changes to document the applicability axes and the frozen inventory in the alert plugin docs, since the only record of how to regenerate that file lived in the test module's own docstring and you only found it after CI had already failed. The populations are pulled in with automodule so a new one documents itself, and the page spells out what does and does not require a regeneration plus what each guard test means when it fails.
DeltaFile
+119-0docs/source/middleware/plugins/alert.rst
+119-01 files

FreeNAS/freenas 9ab59f6src/middlewared/middlewared/utils/license __init__.py

Make fallback codes stricter
DeltaFile
+2-9src/middlewared/middlewared/utils/license/__init__.py
+2-91 files

LLVM/project 973fab5llvm/lib/Target/RISCV RISCVTargetMachine.cpp RISCVCodeGenPassBuilder.cpp

[RISCV][NFC] Move ZacasABIFix Pass Declaration

This change moves them into their own header, as has been done for the
other NewPM passes.

Assisted-by: AI
DeltaFile
+40-0llvm/lib/Target/RISCV/RISCVZacasABIFix.h
+0-12llvm/lib/Target/RISCV/RISCV.h
+1-1llvm/lib/Target/RISCV/RISCVZacasABIFix.cpp
+1-0llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+1-0llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+43-135 files

LLVM/project 62571dfllvm/lib/Target/RISCV RISCVTargetMachine.cpp RISCVCodeGenPassBuilder.cpp

[RISCV][NFC] Move RISCVCodeGenPrepare Declarations

This change moves them into their own header, as has been done for the
other NewPM passes.

Assisted-by: AI
DeltaFile
+40-0llvm/lib/Target/RISCV/RISCVCodeGenPrepare.h
+0-12llvm/lib/Target/RISCV/RISCV.h
+1-1llvm/lib/Target/RISCV/RISCVCodeGenPrepare.cpp
+1-0llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+1-0llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+43-135 files

LLVM/project 06528e3llvm/lib/Target/RISCV RISCV.h RISCVTargetMachine.cpp, llvm/test/CodeGen/RISCV prefer-w-inst.mir

[RISCV] Port Opt W Instrs to NewPM

Assisted-by: AI
DeltaFile
+44-22llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+35-0llvm/lib/Target/RISCV/RISCVOptWInstrs.h
+3-3llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/prefer-w-inst.mir
+0-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+88-297 files not shown
+97-3113 files

LLVM/project 9c76dc4llvm/lib/Target/RISCV RISCVPassRegistry.def RISCV.h

[RISCV] Port Fold Memory Offset Pass to NewPM

Assisted-by: AI
DeltaFile
+37-16llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+36-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.h
+0-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+1-0llvm/lib/Target/RISCV/RISCVPassRegistry.def
+78-213 files not shown
+81-219 files

LLVM/project 64b2924llvm/lib/Target/RISCV RISCV.h RISCVTargetMachine.cpp, llvm/test/CodeGen/RISCV/rvv rvv-peephole-vmerge-to-vmv.mir

[RISCV] Port Vector Peephole to NewPM

Assisted-by: AI
DeltaFile
+66-44llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+39-0llvm/lib/Target/RISCV/RISCVVectorPeephole.h
+0-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-0llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
+111-497 files not shown
+119-4913 files

LLVM/project 783ae17llvm/lib/Target/RISCV RISCVPassRegistry.def RISCVTargetMachine.cpp

[RISCV] Port VL Optimizer to NewPM

Assisted-by: AI
DeltaFile
+56-31llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+36-0llvm/lib/Target/RISCV/RISCVVLOptimizer.h
+1-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+1-0llvm/lib/Target/RISCV/RISCVPassRegistry.def
+98-363 files not shown
+101-369 files

LLVM/project ac0dadbllvm/lib/Target/RISCV RISCVPassRegistry.def RISCV.h

[RISCV] Port Gather/Scatter Lowering to NewPM

This also adds some missing pass dependencies to the legacy version of
the pass, to reflect needed analyses.

Assisted-by: AI
DeltaFile
+77-48llvm/lib/Target/RISCV/RISCVGatherScatterLowering.cpp
+40-0llvm/lib/Target/RISCV/RISCVGatherScatterLowering.h
+0-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-0llvm/lib/Target/RISCV/RISCVPassRegistry.def
+123-535 files not shown
+129-5311 files

LLVM/project 4fabef4libc/config/darwin/x86_64 entrypoints.txt, libc/config/gpu/amdgpu entrypoints.txt

add entrypoints
DeltaFile
+1-0libc/config/windows/entrypoints.txt
+1-0libc/config/linux/riscv/entrypoints.txt
+1-0libc/config/gpu/nvptx/entrypoints.txt
+1-0libc/config/gpu/amdgpu/entrypoints.txt
+1-0libc/config/darwin/x86_64/entrypoints.txt
+5-05 files