[flang][MIF] Fix team_type usage in all MIF operations #205953 (#214207)
This PR resolves the issue #205953. Its purpose is to correct the use of
`team_type` by lowering it to Addr rather than to Box.
(cherry picked from commit 0563f0d88d8314edcde7deab465759a84696e894)
[LLD][COFF] Emit ARM64X relocations for TLS directory (#213529)
The current behavior of merging EC and native chunks to have a single
TLS directory for both views matches the MSVC linker, but it has its
shortcomings. In addition to merging, that solution requires all TLS
callbacks to use -arm64xsameaddress, leaving it to the CRT to handle. If
the appropriate EC object files are not pulled in by linked EC code and
thus never have a chance to mark the callback with -arm64xsameaddress,
this may lead to an invalid image that crashes at runtime.
This patch avoids the entire problem by using entirely separate TLS
directories for EC and native views along with the standard ARM64X
dynamic relocation mechanism. Since callback lists are now separate, a
missing -arm64xsameaddress is no longer a problem.
Also, mingw-w64-crt currently doesn't mark its TLS callbacks with
-arm64xsameaddress. That could be changed if needed, but with this
change, it is no longer necessary.
(cherry picked from commit 65e92e073539c3fe3523256c4fba35ac1dedcb92)
[compiler-rt] Disable executable stack on `aeabi_u{read,write}*.S` (#214465)
These were missing `NO_EXEC_STACK_DIRECTIVE` to add `.note.GNU-stack`;
without it, a binary including any of these files will have the stack
marked executable. Add the directive here, matching other similar files.
Symtab diff before:
$ clang compiler-rt/lib/builtins/arm/aeabi_uread4.S
--target=arm-unknown-linux-gnueabi -c
$ llvm-readelf aeabi_uread4.o -S
There are 5 section headers, starting at offset 0xe4:
Section Headers:
[Nr] Name Type Address Off Size ES Flg Lk Inf Al
[ 0] NULL 00000000 000000 000000 00 0 0 0
[ 1] .strtab STRTAB 00000000 0000a8 000039 00 0 0 1
[ 2] .text PROGBITS 00000000 000034 000020 00 AX 0 0 4
[ 3] .ARM.attributes ARM_ATTRIBUTES 00000000 000054 000022 00 0 0 1
[21 lines not shown]
[flang][MIF] Fix undef reference to a coarray_handle in mif.dealloc_coarray #193157 (#213890)
This PR fixes the behavior reported in issue #193157. The coarray_handle
was only defined if a call to mif.alloc_coarray was present.
If a call to mif.dealloc_coarray was encountered without a prior call to
mif.alloc_coarray, then the coarray_handle was missing, and therefore
llvm.address_of pointed to a non-existent address, which is not allowed.
We now define a coarray_handle that has not been allocated by PRIF for
each coarray variables.
(cherry picked from commit a9426776e78a89dec776c34efdb7725de591d878)
workflows/llvm-abi-tests: Cache the baseline abi (#211968)
This way we don't need to recompute it for every workflow.
(cherry picked from commit 09734937d37ca9c8e8c9cdaa55d00339068922c3)
py-coverage: updated to 7.15.4
7.15.4 — 2026-08-06
- Fix: in the HTML report, a source file name containing a double quote (legal
on POSIX) wasn't escaped where it's dropped into the ``href`` of the index
and prev/next links, so it could close the attribute early and inject markup.
Page URLs are now escaped. Thanks, `Rajath Mohare <pull 2227_>`_.
- Fix: the LCOV report wrote file names and other fields into its
line-oriented records without neutralizing control characters. A measured
file whose name contained a newline (legal on POSIX) could forge extra
records, inflating the coverage seen by tools that read the report. Control
characters in a field are now replaced. Thanks, `Rajath Mohare <pull
2226_>`_.
- Wheels are now provided for Python 3.15.
py-argcomplete: updated to 3.7.2
Changes for v3.7.2 (2026-08-05)
Require Python 3.10+
Changes for v3.7.1 (2026-08-04)
- Fix for kislyuk-544 => TestZshGlobalExplicit tests are failing after
upgrade to zsh 5.9.0.1
- Expand ~ in \_FilteredFilesCompleter (DirectoriesCompleter)
libiscsi: updated to 1.20.3
1.20.3
When queueing the first PDU to an idle socket, immediately try to write
it to the socket instead of waiting for the event-loop to
timeout/notice there is work to do.
Various other small bugfixes.
ixgbe: Validate SR-IOV before restarting the PF
A deterministic IOV configuration error currently reaches the driver
only after iflib has stopped the PF. The required cleanup restart then
causes an avoidable carrier flap.
Follow the igb pattern and validate the request in the PCI IOV method
before entering the restart transaction. Reject queue layouts wider
than the selected virtualization pool before they can alias unrelated
82599 registers.
MFC after: 2 weeks
[ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (#160083)
Similarly to what it is being already done in GVN
(fb632ed2377d280b581b8d4653b855e60d611f77), make sure pointers
equalities derived via PredicatedInfo may be propagated so long as
pointer constants' provenance is taken into account, which may be
non-existent. This is achieved by tracking provenance in
ValueLatticeElement and restrain replacement to uses allowed by
`canReplacePointersInUseIfEqual`.
Fixes: https://github.com/llvm/llvm-project/issues/159565.
ixgbe: restart iflib around SR-IOV reconfiguration
The IOV callback changes the PF pool, virtualization mode, and hardware
queue indices while iflib still considers the old queue layout live.
Teardown likewise leaves the software pool and mode at their SR-IOV
values.
Use iflib stop/mutate/restart transactions for both transitions.
Disable VF DMA and PCI VF Enable before queue reuse, let outstanding
transactions drain, and restore the non-IOV pool and queue indices on
teardown.
Remove the redundant driver-local pci_iov_detach() wrapper; iflib
already performs that check centrally before the driver detach
callback.
It may be possible to avoid some restart in the future on this hardware
pausing DMA and remapping rings but not pursued yet.
MFC after: 2 weeks
[BOLT][AArch64] Expand cmpbr when reversing would overflow (#202998)
AArch64 compare-and-branch instructions can usually be reversed by
changing the condition and adjusting the immediate. At boundary values,
that adjustment can underflow or overflow, leaving the branch
non-reversible.
When condition flags are dead at such a branch, split the compare branch
into an explicit compare followed by a conditional branch. The new
sequence lets branch fixup reverse the condition without relying on an
out-of-range adjusted immediate.
Teach the branch-fixing paths to use cached branch liveness information
when deciding whether this expansion is legal. The liveness snapshot is
built before branch relaxation/fixup and is safe for the current users:
they only insert trampolines/stubs between existing CFG edges or invert
branches without changing program semantics.
Since expansion can grow the source basic block, update the local
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[RISCV] Scale i64 insert/extract element cost on RV32 with LMUL (#214609)
Currently each vector instruction just has a cost of 1 but at higher
LMULs this isn't accurate.
Also it looks like the lowering might have changed since the cost was
added, but for inserts we now use vslide1down instead of vslide1up, see
the codegen in insertelt-int-rv32.ll.
---------
Co-authored-by: Ryan Buchner <buchner.ryan at gmail.com>
iflib: Permit SR-IOV configuration on a down interface
Drivers which remap PF queues need a stop/mutate/restart transaction
only when the interface has live queues. Permit their IOV
initialization callback while the interface is administratively down
and leave it down afterward.
This restores the standard boot-time iovctl.conf workflow for igb and
lets other opt-in drivers configure VFs before netif brings the PF up.
MFC after: 1 week
[AArch64][GlobalISel] Fix invalid subregister copies for truncating stores (#213935)
The custom truncating store selector always created a subregister copy
matching the memory type. When storing an i16 value to i8 both types
used GPR32, producing an invalid copy:
```
*** Bad machine code: Invalid subregister index for virtual register ***
- function: truncstores
- basic block: %bb.0 (0xb1a58e8738c0)
- instruction: %2:gpr32 = COPY %val16.sub_32:gpr32
- operand 1: %val16.sub_32:gpr32
Register class GPR32 does not support subreg index sub_32
LLVM ERROR: Found 1 machine code errors.
```
This code path should only be used for FPRs. The existing RegBankSelect
avoids this by inserting a G_ANYEXT from i16 to i32, allowing the
imported pattern to match. It was exposed by the type-based
RegBankSelect prototype in #199040.
Assisted-by: codex
