LLVM/project a071fd2 — mlir/docs/Dialects SPIR-V.md, mlir/lib/Target/SPIRV/Deserialization Deserializer.cpp

[mlir][SPIR-V] Deserialize null array and struct constants (#231626)

Deserialize OpConstantNull for arrays and literal structs by recursively
building the ArrayAttr representation used by spirv.Constant. Preserve
rejection of unsupported constituent types and report the nested type
when a null value cannot be represented.

Allow OpConstantComposite with no constituents for empty structs so that
imported null empty structs can round-trip. Diagnose OpUndef
constituents explicitly instead of reporting them as missing normal
constants.

Document the supported representations and add binary deserialization,
round-trip, and negative tests for aggregate constants.

---------

Co-authored-by: Claude Fable 5.2 <noreply at anthropic.com>
DeltaFile
+91-3mlir/unittests/Dialect/SPIRV/DeserializationTest.cpp
+35-0mlir/test/Target/SPIRV/constant.mlir
+35-0mlir/test/Target/SPIRV/constant-null.mlir
+20-9mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp
+5-0mlir/docs/Dialects/SPIR-V.md
+186-125 files

LLVM/project bdc06cd — llvm/lib/Target/AMDGPU SIOptimizeExecMaskingPreRA.cpp, llvm/test/CodeGen/AMDGPU optimize-exec-masking-pre-ra.mir

AMDGPU: Fix double interval removal in SIOptimizeExecMaskingPreRA

An exec copy folded after its use was erased from an s_endpgm block
had its interval removed twice. Fixes an assert after 6a483810f0da.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+47-0llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
+1-0llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
+48-02 files

LLVM/project 7e5ae23 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-widening-sub-acc.ll rvp-widening-add-acc.ll

[RISCV][P-ext] Use EVT in `combinePExtWidening*Acc` (#242687)

Fixes https://github.com/llvm/llvm-project/issues/242679.
The previous implementation assumes a simple value type, which is wrong
for weird-sized integers.
Assisted-by: Codex
DeltaFile
+14-0llvm/test/CodeGen/RISCV/rvp-widening-sub-acc.ll
+14-0llvm/test/CodeGen/RISCV/rvp-widening-add-acc.ll
+2-2llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+30-23 files

LLVM/project ef6087d — llvm/lib/Target/AArch64/GISel AArch64PostLegalizerCombiner.cpp AArch64InstructionSelector.cpp, llvm/test/CodeGen/AArch64/GlobalISel direct-hasoneuse-select-debug.mir direct-hasoneuse-postlegalizer-debug.mir

[AArch64][GlobalISel] Ignore debug uses in direct single-use combines (#237644)
DeltaFile
+61-0llvm/test/CodeGen/AArch64/GlobalISel/direct-hasoneuse-postlegalizer-debug.mir
+50-0llvm/test/CodeGen/AArch64/GlobalISel/direct-hasoneuse-select-debug.mir
+2-2llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
+2-2llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+115-44 files

OpenBSD/src e3hK67T — sys/net if_veb.c

   let veb_ports_insert fail if there's no memory
VersionDeltaFile
1.77+12-3sys/net/if_veb.c
+12-31 files

FreeBSD/ports 03e0697 — graphics/qgis-ltr pkg-plist

graphics/qgis-ltr: Fix once more pkg-plist

During the correction process in the previous commit, the entry for
qgis_mapserv.fcgi was accidentally updated to newer versions of QGIS.

MFH:            2026Q4
(cherry picked from commit 16fb65e819caab5ca63e82029ac232c22e512f68)
DeltaFile
+1-1graphics/qgis-ltr/pkg-plist
+1-11 files

LLVM/project 89b9876 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU int_to_fp_narrow_i64.ll

DAG: Allow narrowing sint_to_fp source to the sext source type

Same as 241c94e3919e for uint_to_fp. The narrowing fold skipped
sint_to_fp (sext x) when the narrow type matched x, so sitofp (sext i32
to i64) was expanded as a 64-bit conversion on AMDGPU.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+10-257llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
+0-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+10-2622 files

LLVM/project cf1893e — llvm/test/CodeGen/AMDGPU int_to_fp_narrow_i64.ll

AMDGPU: Add more sitofp of sext from i32 tests

These currently get the full i64 conversion expansion.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+543-0llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
+543-01 files

LLVM/project 90a9cc6 — llvm/lib/Target/M68k M68kTargetMachine.h M68kTargetMachine.cpp

M68k: Use LastSubtargetCache in getSubtargetImpl

Migrate to the new common target pattern.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+15-4llvm/lib/Target/M68k/M68kTargetMachine.cpp
+13-0llvm/lib/Target/M68k/M68kTargetMachine.h
+28-42 files

LLVM/project d8cd686 — llvm/lib/Target/CSKY CSKYTargetMachine.h CSKYTargetMachine.cpp

CSKY: Use LastSubtargetCache in getSubtargetImpl

Migrate to the new common pattern for targets to cache the last
result.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+20-10llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+15-0llvm/lib/Target/CSKY/CSKYTargetMachine.h
+35-102 files

FreeBSD/ports 16fb65e — graphics/qgis-ltr pkg-plist

graphics/qgis-ltr: Fix once more pkg-plist

During the correction process in the previous commit, the entry for
qgis_mapserv.fcgi was accidentally updated to newer versions of QGIS.

MFH:            2026Q4
DeltaFile
+1-1graphics/qgis-ltr/pkg-plist
+1-11 files

LLVM/project 4b6e6e9 — llvm/lib/Target/SystemZ SystemZTargetMachine.h SystemZTargetMachine.cpp

SystemZ: Use LastSubtargetCache in getSubtargetImpl

Migrate to the new common pattern and infrastructure.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+20-8llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+14-0llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+34-82 files

LLVM/project 457d241 — llvm/lib/Target/WebAssembly WebAssemblyTargetMachine.h WebAssemblyTargetMachine.cpp

WebAssembly: Use LastSubtargetCache in getSubtargetImpl

Cache the last subtarget and use the new common pattern for targets.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+18-5llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+15-0llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
+33-52 files

LLVM/project 98657a6 — llvm/lib/Target/Mips MipsTargetMachine.h MipsTargetMachine.cpp

Mips: Use LastSubtargetCache in getSubtargetImpl

Migrate to use the new common infrastructure and pattern which caches
based on the last used subtarget.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+27-13llvm/lib/Target/Mips/MipsTargetMachine.cpp
+17-0llvm/lib/Target/Mips/MipsTargetMachine.h
+44-132 files

LLVM/project 6dd4c2c — libc/src/__support/OSUtil/linux/syscall_wrappers personality.h pkey_mprotect.h

[libc] Simplify open/personality/pkey_mprotect/sched_getaffinity error handling
DeltaFile
+3-6libc/src/__support/OSUtil/linux/syscall_wrappers/sched_getaffinity.h
+3-6libc/src/__support/OSUtil/linux/syscall_wrappers/open.h
+2-6libc/src/__support/OSUtil/linux/syscall_wrappers/pkey_mprotect.h
+2-5libc/src/__support/OSUtil/linux/syscall_wrappers/personality.h
+10-234 files

LLVM/project 2f5b0b8 — llvm/include/llvm/Bitstream BitstreamReader.h, llvm/lib/Bitstream/Reader BitstreamReader.cpp

Bitstream: Move the slow path of Read out of line

SimpleBitstreamCursor::Read was too large to inline into its
callers. Separate out the slow error path.

CTMark instructions:u: ThinLTO -0.23% (kimwitu++ -0.72%)

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+29-0llvm/lib/Bitstream/Reader/BitstreamReader.cpp
+4-22llvm/include/llvm/Bitstream/BitstreamReader.h
+33-222 files

LLVM/project f92acef — llvm/include/llvm/Analysis AliasAnalysis.h

AliasAnalysis: Use SmallVectors in AAResults

AAResults is rebuilt for each function whenever AAManager is invalidated,
and the default pipeline adds 3 or 4 AA results to it. With std::vector
each one regrows its storage on the second and third addition.

callgrind instructions, opt -O3: kimwitu++ k.bc -0.45%, SPASS cnf.bc
-0.12%, sqlite3 -0.03%. CTMark instructions:u: O3 -0.02%, ThinLTO -0.01%.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+2-2llvm/include/llvm/Analysis/AliasAnalysis.h
+2-21 files

HardenedBSD/ports cab95d8 — devel/catppuccin-whiskers distinfo, dns/cascade distinfo

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+487-555security/cargo-audit/distinfo
+242-276security/cargo-audit/Makefile.crates
+253-245devel/catppuccin-whiskers/distinfo
+187-193dns/cascade/distinfo
+0-334lang/php80-legacy/files/patch-Zend_zend__vm__execute.h
+0-312lang/php80-legacy/pkg-plist
+1,169-1,915110 files not shown
+1,732-3,809116 files

OpenBSD/src eW1zkxB — sys/net if_trunk.c

   i missed a chunk when getting rid of the IFT_IEEE8023ADLAG fiddling

   trunk_port_ioctl was checking that IFT_IEEE8023ADLAG was set on the
   port, which isnt true anymore.
VersionDeltaFile
1.166+18-18sys/net/if_trunk.c
+18-181 files

LLVM/project 3ad0e40 — llvm/lib/Target/ARM ARMFrameLowering.cpp, llvm/test/CodeGen/ARM execute-only-frame-index-debug.ll

[ARM] Prevent debug values from causing extra Thumb1 spills (#237017)

Under Thumb1 execute-only code with an AAPCS frame chain, a debug value
for a stack-passed argument is represented with a fixed frame index.
canSpillOnFrameIndexAccess treats that debug-only operand as a real
access, so enabling debug info spills two additional callee-saved
registers.

Skip debug instructions in the scan. Keep a real stack-argument use
covered to ensure that frame-index elimination still reserves enough
registers.

Assisted-by: OpenAI Codex, co-reviewed by Claude and Yongqiang Tian.
DeltaFile
+48-0llvm/test/CodeGen/ARM/execute-only-frame-index-debug.ll
+4-1llvm/lib/Target/ARM/ARMFrameLowering.cpp
+52-12 files

LLVM/project 0f6be13 — llvm/lib/Target/PowerPC PPCFrameLowering.cpp, llvm/test/CodeGen/PowerPC mtcrf-cr-restore.ll

[PowerPC] Model the CR defs of MTCRF used to restore callee-saved CRs

The epilogue restores the non-volatile CR fields (CR2-CR4) with a single
mtcrf.  MTCRF takes only an FXM mask immediate and a GPR, and declares no
CR operands, so the post-RA scheduler sees no dependency between the
restore and instructions that read or write the restored CR bits.  It can
therefore hoist the restore above those reads, making the function use the
caller's condition bits instead of its own.

Add the restored CR fields as implicit defs when building the MTCRF in
emitEpilogue() and restoreCRs(), matching the way the prologue already
adds implicit uses to MFCR.  The scheduler now models the WAR/WAW
dependencies and keeps the restore after the last read.

This is a regression from #202339 (3fc6711ccaf6), which replaced multiple
MTOCRF instructions -- each with a CR field def -- with a single MTCRF.

Fixes #242250.
DeltaFile
+21-6llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
+2-5llvm/test/CodeGen/PowerPC/mtcrf-cr-restore.ll
+23-112 files

LLVM/project 22ce9d7 — llvm/lib/Target/LoongArch LoongArchMergeBaseOffset.cpp

[LoongArch] Avoid left shift of negative immediates in foldLargeOffset() (#242761)

`ImmOp.getImm() << 12` is undefined when the LU12I.W immediate is
negative, e.g. `lu12i.w $a1, -524288` in `load_addr_offset_268435456`
(added by #242356), which UBSan reports on
sanitizer-aarch64-linux-bootstrap-ubsan.
DeltaFile
+5-3llvm/lib/Target/LoongArch/LoongArchMergeBaseOffset.cpp
+5-31 files

OpenBSD/src VNnaTMw — sys/net if_trunk.c

   don't allow adding trunk interface as a port to itself.
VersionDeltaFile
1.165+4-1sys/net/if_trunk.c
+4-11 files

FreeBSD/ports 16241f0 — devel/catppuccin-whiskers Makefile Makefile.crates

devel/catppuccin-whiskers: Update to 2.10.0

While here, add GitHub Repository URL to WWW.

Changelog: https://github.com/catppuccin/whiskers/blob/v2.10.0/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+253-245devel/catppuccin-whiskers/distinfo
+125-121devel/catppuccin-whiskers/Makefile.crates
+3-3devel/catppuccin-whiskers/Makefile
+381-3693 files

HardenedBSD/ports 16241f0 — devel/catppuccin-whiskers Makefile Makefile.crates

devel/catppuccin-whiskers: Update to 2.10.0

While here, add GitHub Repository URL to WWW.

Changelog: https://github.com/catppuccin/whiskers/blob/v2.10.0/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+253-245devel/catppuccin-whiskers/distinfo
+125-121devel/catppuccin-whiskers/Makefile.crates
+3-3devel/catppuccin-whiskers/Makefile
+381-3693 files

OpenBSD/src oDf0Ooz — sys/net if_trunk.h if_trunk.c

   dont switch if_type to IFT_IEEE8023ADLAG on ports anymore.

   if_type should be immutable and set by the driver providing the
   interface.

   from what i can tell, the main reason to do this was to mark an
   interfaces as "in use" by trunk, but we can figure that out by using
   ac_trport now.
VersionDeltaFile
1.164+1-8sys/net/if_trunk.c
1.36+1-2sys/net/if_trunk.h
+2-102 files

FreeBSD/ports 7ca0219 — x11/ashell Makefile Makefile.crates, x11/ashell/files patch-src_xdg.rs

x11/ashell: Update to 0.12.0

While here, add GitHub Repository URL to WWW.

Changelog: https://github.com/MalpenZibo/ashell/blob/0.12.0/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+41-53x11/ashell/distinfo
+19-25x11/ashell/Makefile.crates
+11-10x11/ashell/files/patch-src_xdg.rs
+4-4x11/ashell/Makefile
+75-924 files

HardenedBSD/ports 7ca0219 — x11/ashell Makefile Makefile.crates, x11/ashell/files patch-src_xdg.rs

x11/ashell: Update to 0.12.0

While here, add GitHub Repository URL to WWW.

Changelog: https://github.com/MalpenZibo/ashell/blob/0.12.0/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+41-53x11/ashell/distinfo
+19-25x11/ashell/Makefile.crates
+11-10x11/ashell/files/patch-src_xdg.rs
+4-4x11/ashell/Makefile
+75-924 files

LLVM/project f3681f2 — llvm/lib/Target/RISCV RISCVTargetMachine.h RISCVTargetMachine.cpp

RISCV: Migrate to LastSubtargetCache in getSubtargetImpl (#242559)

These already reused the last subtarget for functions with the same
function attribute set. Use LastSubtargetCache to additionally filter
to the subtarget relevant attributes and work towards all targets
using a common pattern.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+22-16llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+14-1llvm/lib/Target/RISCV/RISCVTargetMachine.h
+36-172 files

LLVM/project 7afb127 — llvm/test/CodeGen/PowerPC mtcrf-cr-restore.ll

[PowerPC] Add a precommit test for MTCRF CR restore scheduling #242250
DeltaFile
+77-0llvm/test/CodeGen/PowerPC/mtcrf-cr-restore.ll
+77-01 files