FreeNAS/freenas 666c755src/middlewared/middlewared/api/v26_0_0 system_product.py, src/middlewared/middlewared/plugins/truenas license_utils.py license_legacy_utils.py

Properly handle VM feature flag
DeltaFile
+69-0src/middlewared/middlewared/pytest/unit/plugins/truenas/test_license_utils.py
+13-1src/middlewared/middlewared/api/v26_0_0/system_product.py
+9-1src/middlewared/middlewared/plugins/truenas/license_utils.py
+2-3src/middlewared/middlewared/plugins/truenas/license_legacy_utils.py
+1-1src/middlewared/middlewared/plugins/vm/info.py
+1-1src/middlewared/middlewared/pytest/unit/plugins/truenas/test_license_legacy_utils.py
+95-76 files

FreeNAS/freenas 3338752src/middlewared/middlewared/api/v27_0_0 system_product.py

Update v27 pydantic model
DeltaFile
+13-1src/middlewared/middlewared/api/v27_0_0/system_product.py
+13-11 files

FreeBSD/ports 542d1ecnet-im/prosody distinfo Makefile

net-im/prosody: Update 13.0.5 => 13.0.6

Changelog:
https://prosody.im/doc/release/13.0.6

PR:             295652
Sponsored by:   UNIS Labs
MFH:            2026Q2

(cherry picked from commit 24b798e3a390225c454070a196569cf98b35d0a8)
DeltaFile
+3-3net-im/prosody/distinfo
+1-1net-im/prosody/Makefile
+4-42 files

FreeBSD/ports 24b798enet-im/prosody distinfo Makefile

net-im/prosody: Update 13.0.5 => 13.0.6

Changelog:
https://prosody.im/doc/release/13.0.6

PR:             295652
Sponsored by:   UNIS Labs
MFH:            2026Q2
DeltaFile
+3-3net-im/prosody/distinfo
+1-1net-im/prosody/Makefile
+4-42 files

FreeBSD/ports a2f154edevel/libsoup3 distinfo Makefile

devel/libsoup3: update to 3.7.1

PR:             295621
DeltaFile
+3-3devel/libsoup3/distinfo
+3-2devel/libsoup3/Makefile
+1-1devel/libsoup3/pkg-plist
+7-63 files

LLVM/project ab1c644flang/lib/Lower/OpenMP OpenMP.cpp Utils.cpp, flang/test/Lower/OpenMP metadirective-user.f90

Place dynamic condition cleanups before branching

A dynamic user condition can create expression temporaries before the
selected variant is lowered. For example, a metadirective condition
such as:

  when(user={condition(getbool("hello"))}: barrier)

passes a character literal through an associated temporary. That
temporary belongs to evaluating the condition, so it must be cleaned
up before lowering enters the generated fir.if that selects between
variants.

Finalize the statement context after evaluating the condition and
before creating the branch. Keep the condition expression and source
location together as DynamicUserCondition, use that source for
generated operations, and add a regression for the temporary-producing
condition case.
DeltaFile
+23-18flang/lib/Lower/OpenMP/OpenMP.cpp
+20-17flang/lib/Lower/OpenMP/Utils.cpp
+30-0flang/test/Lower/OpenMP/metadirective-user.f90
+9-5flang/lib/Lower/OpenMP/Utils.h
+82-404 files

LLVM/project 982dd0bflang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP metadirective-user.f90

Clarify dynamic metadirective selection lowering

Explain that statically applicable variants are ranked before dynamic
user conditions. When a dynamic condition is selected, it is lowered to a
runtime branch whose else region continues selection among the remaining
candidates.

Add a begin/end variant test that includes clauses, and tighten checks
for the empty `nothing` fallback.
DeltaFile
+27-2flang/test/Lower/OpenMP/metadirective-user.f90
+12-0flang/lib/Lower/OpenMP/OpenMP.cpp
+39-22 files

FreeBSD/doc 9db21c0website/content/en/releases/15.1R hardware.adoc

15.1: Regenerate hardware notes

Approved by:    re (implicit)
Sponsored by:   OpenSats Initiative
DeltaFile
+65-59website/content/en/releases/15.1R/hardware.adoc
+65-591 files

LLVM/project ab95769llvm/lib/CodeGen MachineFunction.cpp, llvm/lib/MC MCDwarf.cpp

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
DeltaFile
+67-67llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+33-0llvm/lib/MC/MCDwarf.cpp
+15-15llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+10-0llvm/lib/CodeGen/MachineFunction.cpp
+4-4llvm/test/CodeGen/AMDGPU/debug-frame.ll
+2-2llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+131-885 files not shown
+143-9011 files

LLVM/project 825ef10llvm/lib/Target/AMDGPU SIFrameLowering.cpp SIMachineFunctionInfo.h, llvm/test/CodeGen/AMDGPU amdgpu-spill-cfi-saved-regs.ll

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
DeltaFile
+2,926-0llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
+12-0llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-0llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+9-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+2,959-05 files

LLVM/project b639988

[AMDGPU] Use register pair for PC spill

Change-Id: Ibedeef926f7ff235a06de65a83087c151f66a416
DeltaFile
+0-00 files

LLVM/project 3d76e07

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+0-00 files

LLVM/project 0d9a495

[AMDGPU] Emit entry function Dwarf CFI

Entry functions represent the end of unwinding, as they are the
outer-most frame. This implies they can only have a meaningful
definition for the CFA, which AMDGPU defines using a memory location
description with a literal private address space address. The return
address is set to undefined as a sentinel value to signal the end of
unwinding.

Change-Id: I21580f6a24f4869ba32939c9c6332506032cc654
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+0-00 files

LLVM/project e2a1872

[AMDGPU] Implement CFI for non-kernel functions

This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.

Change-Id: I5e3a9a62cf9189245011a82a129790d813d49373
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+0-00 files

LLVM/project d95df99

[Clang] Default to async unwind tables for amdgcn

To avoid codegen changes when enabling debug-info (see
https://bugs.llvm.org/show_bug.cgi?id=37240) we want to
enable unwind tables by default.

There is some pessimization in post-prologepilog scheduling, and a
general solution to the problem of CFI_INSTRUCTION-as-scheduling-barrier
should be explored.

Change-Id: I83625875966928c7c4411cd7b95174dc58bda25a
DeltaFile
+0-00 files

LLVM/project a12c323

[MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU

While these can be represented with .cfi_escape, using these pseudo-cfi
instructions makes .s/.mir files more readable, and it is necessary to
support updating registers in CFI instructions (something that the
AMDGPU backend requires).

Change-Id: I763d0cabe5990394670281d4afb5a170981e55d0
DeltaFile
+0-00 files

LLVM/project 5551ef3

[MIR] Error on signed integer in getUnsigned

Previously we effectively took the absolute value of the APSInt, instead
diagnose the unexpected negative value.

Change-Id: I4efe961e7b29fdf1d5f97df12f8139aac12c9219
DeltaFile
+0-00 files

LLVM/project 64fdeb6clang/include/clang/Serialization ASTRecordReader.h, clang/lib/AST ASTContext.cpp Type.cpp

trivial changes
DeltaFile
+20-14clang/lib/Sema/SemaOpenMP.cpp
+18-14clang/lib/AST/ASTContext.cpp
+16-15clang/lib/Sema/SemaTemplate.cpp
+14-11clang/lib/AST/Type.cpp
+14-8clang/lib/AST/ASTDiagnostic.cpp
+11-6clang/include/clang/Serialization/ASTRecordReader.h
+93-6833 files not shown
+202-15239 files

LLVM/project d005cf7clang/lib/AST ASTContext.cpp ItaniumMangle.cpp, clang/lib/Sema SemaCXXScopeSpec.cpp SemaTemplate.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.

This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+888-161clang/lib/AST/ASTContext.cpp
+328-12clang/test/SemaTemplate/instantiation-dependence.cpp
+178-96clang/lib/AST/ItaniumMangle.cpp
+100-98clang/lib/Sema/SemaCXXScopeSpec.cpp
+62-57clang/lib/AST/Type.cpp
+70-44clang/lib/Sema/SemaTemplate.cpp
+1,626-46869 files not shown
+2,391-80675 files

FreeBSD/doc d3abd04website/tools hardware-notes-processor.rb

website: improve hardware-notes-processor.rb

1. warning in hardware.adoc removed
2. release version in hardware.adoc substituted from src repo

Reviewed by: cperciva, carlavilla
Approved by: cperciva, carlavilla
Differential Revision: https://reviews.freebsd.org/D57262
DeltaFile
+27-6website/tools/hardware-notes-processor.rb
+27-61 files

LLVM/project 2f08150libc/utils/libctest format.py, llvm/utils/lit/lit TestingConfig.py main.py

Reland: [lit] Move maxIndividualTestTime from global to test suite config (#199996)

Simplify LitConfig initialization and setter to allow None values.
TestingConfig.maxIndividualTestTime is initialized to 0 (or resolved to
0 if None) strictly during initialization.

This fixes an issue where the aggressive BOLT timeout of 60s (previously
set globally on lit_config) was leaking and affecting libc++ tests. By
moving the timeout configuration from the global lit_config to the
individual test suite config, we ensure that timeouts are isolated and
respect suite-local settings without leaking.

PR Stack:
* https://github.com/llvm/llvm-project/pull/198192
* https://github.com/llvm/llvm-project/pull/199886
* ➤ https://github.com/llvm/llvm-project/pull/199996
* https://github.com/llvm/llvm-project/pull/198193

The diff from #198192 is 39b632f741012bfbff9858407765e45435ad95ff

Assisted-by: Gemini
DeltaFile
+16-0llvm/utils/lit/lit/TestingConfig.py
+1-12llvm/utils/lit/lit/main.py
+4-4llvm/utils/lit/lit/TestRunner.py
+4-1llvm/utils/lit/lit/LitConfig.py
+2-3libc/utils/libctest/format.py
+2-2llvm/utils/lit/lit/formats/googletest.py
+29-227 files not shown
+37-3013 files

FreeBSD/ports 11a165fx11/eaglemode Makefile distinfo

x11/eaglemode: update 0.96.3 → 0.96.4
DeltaFile
+3-4x11/eaglemode/Makefile
+3-3x11/eaglemode/distinfo
+6-72 files

FreeBSD/ports de67a80lang/rust Makefile, lang/rust-nightly distinfo Makefile

lang/rust-nightly: update 1.97.0.20260511 → 1.98.0.20260526

- Enable miri
- Include a patch from upstream PR to avoid network access during build

Approved by:    rust (implicit)
DeltaFile
+44-0lang/rust-nightly/files/patch-pr156982
+3-3lang/rust-nightly/distinfo
+4-2lang/rust/Makefile
+2-2lang/rust-nightly/Makefile
+53-74 files

FreeBSD/ports c5abc8edevel/R-cran-clipr Makefile distinfo

devel/R-cran-clipr: Update to 0.8.1

- Pet portfmt

Reported by:    portscout
DeltaFile
+4-5devel/R-cran-clipr/Makefile
+3-3devel/R-cran-clipr/distinfo
+7-82 files

OpenBSD/ports WJYU5FDdevel/p5-YAML-Syck distinfo Makefile

   update p5-YAML-Syck to 1.46
VersionDeltaFile
1.18+2-2devel/p5-YAML-Syck/distinfo
1.32+1-1devel/p5-YAML-Syck/Makefile
+3-32 files

FreeBSD/src 40c846dsys/dev/uart uart_dev_ns8250.c uart_dev_pl011.c

uart: Tidy the compat tables

No functional change intended.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Sponsored by:   NetApp, Inc.
Reviewed by:    royger
Differential Revision:  https://reviews.freebsd.org/D57269
DeltaFile
+22-22sys/dev/uart/uart_dev_ns8250.c
+15-15sys/dev/uart/uart_dev_pl011.c
+37-372 files

OpenBSD/ports A4mDYphdatabases/redis Makefile

   take maintainer
VersionDeltaFile
1.145+6-3databases/redis/Makefile
+6-31 files

LLVM/project f95f02cllvm/lib/Transforms/Vectorize VPlanAnalysis.cpp VPlanRecipes.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

[VPlan] Thread scalar types through VPReplicateRecipe. (NFC) (#199379)

Update VPReplicateRecipe to populate VPSingleDefValue's scalar
type. For most opcodes, the scalar type is determine from the operands,
via computeScalarTypeForInstruction (from
https://github.com/llvm/llvm-project/pull/199378).
For some opcodes, like Loads and casts, the type must be
provided explicitly.

Depends on https://github.com/llvm/llvm-project/pull/199378.

PR: https://github.com/llvm/llvm-project/pull/199379
DeltaFile
+2-58llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+12-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+9-0llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
+6-3llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+7-1llvm/lib/Transforms/Vectorize/VPlan.h
+0-2llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
+36-656 files

FreeBSD/ports ec4fe65www/py-django_statici18n Makefile, www/py-djangosaml2 Makefile

*: Drop maintainership
DeltaFile
+1-1www/seahub/Makefile
+1-1www/py-wsgidav/Makefile
+1-1www/py-seafobj/Makefile
+1-1www/py-seafdav/Makefile
+1-1www/py-djangosaml2/Makefile
+1-1www/py-django_statici18n/Makefile
+6-615 files not shown
+21-2121 files

OpenBSD/ports 8yDb7HLdevel/p5-IO-Tty distinfo Makefile

   update p5-IO-Tty to 1.31
VersionDeltaFile
1.18+2-2devel/p5-IO-Tty/distinfo
1.38+1-1devel/p5-IO-Tty/Makefile
+3-32 files