[AMDGPU][SIMemoryLegalizer] Consider scratch operations as NV=1 if GAS is disabled
- Clarify that `thread-private` MMO flag is still useful.
- If GAS is not enabled (which is the default as of last patch), consider an op as `NV=1` if it's a `scratch_` opcode, or if the MMO is in the private AS.
- Add tests for the new cases.
- Update AMDGPUUsage GFX12.5 memory model
[NFC][LLVM][AArch64] Add test coverage for scalar bfloat constrained intrinsics. (#222076)
Tests are a clone of fp-intrinsics-fp16.ll with s/half/bfloat/ applied
and failing tests (fcmp and i128 variants) removed.
[MLIR][Remark] Expose RemarkEngine filter queries (#222262)
Expose following filter APIs publicly:
```
| Query | Answers |
|----------------------------------------------|------------------------------------------------------|
| `isAnyRemarkEnabled()` | At least one category filter is active |
| `isAnyRemarkEnabled(category)` | Some kind of remark is enabled for the category |
| `isRemarkEnabled(kind, category)` | Remarks of `kind` are enabled for the category |
| `is{Passed,Missed,Analysis,Failed}OptRemarkEnabled(category)` | Per-kind query |
```
Assisted by Claude Fable 5.1
emulators/dosbox-staging: Update to 0.83.0
Switch to CMake, Meson is not supported anymore. ALSA and FLUIDSYNTH
support could be made optional again by patching build files, however
I do not want touch them more than required for building DOSBox.
Release notes: https://www.dosbox-staging.org/releases/release-notes/0.83.0/
llvm: Remove phantom ssp-buffers-size attributes from tests (#221928)
"ssp-buffers-size" was never a real function attribute. There is
"stack-protector-buffer-size". This may have existed in a downstream
fork, but it's also irrelevant for these tests.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
openldap: updated to 2.7.1
OpenLDAP 2.7.1 Release (2026/09/08)
Fixed libldap BER leak on notice of disconnection
Fixed libldap request leak on malformed BER response
Fixed libldap error stack handling with OpenSSL < 4.0
Fixed lload non-blocking BIO handling in SSL renegotiations
Fixed slapo-ppolicy handling of old passwords
Documentation
slapo-pcache added note about referral chasing
Minor Cleanup
[AMDGPU] Remove unsound idempotent atomicrmw to atomic load lowering (#218377)
An idempotent atomicrmw still holds a slot in the modification order, so
folding it to a plain load can drop synchronization the memory model
requires
[lldb] [unittests] Cover what the memory cache reads from the inferior (#221015)
`MemoryCache`'s tests checked how many bytes a read returned, never
which requests the cache made to get them, so a change to the request
shape could not fail a test. Add four tests over the request log
`DummyProcess` now keeps.
Two assert what the cache sends: `TestReadRequestShape` checks the
address and size of every request, and `TestReadRangesFromCaches` checks
that a range the cache already holds is served without reaching the
inferior.
`TestFlushAtTheTopOfTheAddressSpace` pins `Flush`'s current behavior at
the wrap, not correct behavior. When a flushed range wraps past
`UINT64_MAX`, `Flush` counts cache lines only from the start of the
range to the top of the address space, never the lines the wrapped
portion covers between address 0 and the range's end. This bug predates
this change; the following cache-partition change fixes it, and this
test's assertion that address 0 survives the flush will need to flip
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[VPlan] Record estimated branch probabilities on VPlan0 for cost modeling (#216172)
Update execution frequency/probability tracking in VPlan to also include
estimates from BFI, and use the information in VPlan for VPlan-based
cost computations, removing another remaining IR-based lookup.
We need to differentiate between estimated and concrete profile
information when annotating branches with information from BFI (using
custom !vplan.prof.estimated metadata instead of !prof) and track if a
computed frequency contains any estimates using an extra bool which is
also encoded in the metadata (so we do not synthesize !prof
for such frequencies during codegen).
The new code should only request BFI if needed, and compile-time impact
should be in the noise:
https://llvm-compile-time-tracker.com/compare.php?from=8436dd4a2bfe57d0b3fb6c9c11c69d75c1d1bccb&to=4d60694fed5e5765d4f5a2a72aac7b8674e512e2&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/216172
[AMDGPU] Add getRegisterByName support for src_flat_scratch_base (#220560)
Expose `src_flat_scratch_base`, `src_flat_scratch_base_lo`, and
`src_flat_scratch_base_hi` through `llvm.read_register` /
`llvm.write_register`.
The implementation is basically the same as the existing named-register
support for `flat_scratch`
It errors out on targets without `FeatureGloballyAddressableScratch`
(pre-gfx1250).
[AMDGPU][AsmParser]: Use dummy operand for parsing buffer LDS isAsync… (#219459)
… operand.
After the introduction of .async for LDS buffer ops variants, there a
similar mca crash addressed in
https://github.com/llvm/llvm-project/pull/165305. This parses a dummy
operand as a placeholder.
[AMDGPU] Check a wide copy dst reg against the dst operand's regclass (#221789)
The wide-copy check added in #214561 tested the destination against the
source operand's class. No test change: V_MOV_B64's source class VS_64
also accepts a VGPR destination, which is why it currently works. Adding
@robertvirany.
Co-authored-by: Claude <noreply at anthropic.com>
[libomp] Parse OMP_DEFAULT_DEVICE with new device trait parser (#176166)
... but do not yet expose the new functionalities to the user. This is a
backward compatible update that is going to be followed by the step to
the OpenMP 6.0 semantics as defined in 4.3.8.
[AsmPrinter] target-features optimization remarks
In clang we have --print-enabled-extensions which will print the
AArch64 extensions enabled for a given TU. However, sometimes it is
useful to be able to print out the actual subtarget features for each
function, for debugging/testing purposes. Add an optimization remark
for that.
[CIR][AMDGPU] Implement inverse_ballot and read_exec codegen (#221661)
This commit implements the CIR codegen for the following AMDGPU
builtins:
- __builtin_amdgcn_inverse_ballot_w32
- __builtin_amdgcn_inverse_ballot_w64
- __builtin_amdgcn_read_exec
- __builtin_amdgcn_read_exec_lo
- __builtin_amdgcn_read_exec_hi
inverse_ballot_w32/w64 map to llvm.amdgcn.inverse.ballot. read_exec,
read_exec_lo and read_exec_hi read the exec mask as a ballot over an
all-true predicate, at least as wide as the wavefront.
