[Test] Add missing dependency for llvm-ordergen
Without this dependency, `llvm-ordergen` is not build when running the
tests only, resulting in failures for the tool.
CodeGen: Pass instruction and operand index to isIgnorableUse (#219967)
Replace the MachineOperand argument to the TargetInstrInfo::isIgnorableUse hook
with the containing instruction and operand index. The AMDGPU implementation only
used the operand to recover its parent instruction, so this drops the dependence on
MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
PowerPC: Use use_instr_nodbg_begin in PPCReduceCRLogicals
Fetch the using instruction directly through the instruction iterator
instead of dereferencing an operand's parent.
Co-authored-by: Claude (Claude-Opus-4.8)
[AMDGPU] Make amdgpu.noclobber respect acquire operations
AMDGPUAnnotateUniformValues should annotate uniform global loads as
`!amdgpu.noclobber` if the memory they are reading is never clobbered (since
kernel launch) before the load is executed. That allows the backend to use
scalar `s_load_*` instructions instead of vector loads (which would otherwise
be illegal because the scalar cache is not kept coherent with the vector
cache).
So far, loads were annotated if the thread executing the load has not clobbered
the relevant memory location, but changes from concurrent threads that were
acquired via synchronization were ignored (which is unsound).
This patch defines a semantics for `!amdgpu.noclobber` metadata in the
AMDGPUUsage and changes AMDGPUAnnotateUniformValues to respect that semantics.
Now, loads are no longer annotated if they are atomic or if an acquire fence or
load can be executed before them (since they can read from stores in other
threads in these cases).
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[AMDGPU] Add and generalize noclobber tests
Some noclobber tests included barrier-and-fence constructs that are unrelated
to what the tests are supposed to check. So far, that hasn't been an issue
because barriers and fences were ignored when inferring noclobber annotations.
However, fences do need to be considered for noclobber annotations (since they
can make clobbering stores from other threads visible in the considered
thread). This PR removes those unrelated barriers and fences so that the tests
will still be meaningful once a subsequent PR fixes the noclobber inference.
For the same reason, some `seq_cst` memory orderings in the tests are relaxed
to `monotonic`: `seq_cst` includes acquire semantics which can bring in
clobbering stores from other threads.
The PR also adds tests to cover more cases in the amdgpu.noclobber inference.
Some of them highlight more problematic cases in the current implementation
that subsequent PRs should fix.
The PR further regenerates all opt check lines via `update_test_checks.py`, so
that it's easier to keep them up to date.
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CodeGen: Use use_instructions in changeDebugValuesDefReg (#219969)
The loop only inspects the using instruction, so iterate instructions
directly instead of operands and their parents.
Co-authored-by: Claude (Claude-Opus-4.8)
system: audit log injection via login username in auth_log()
* prevent syslog.filter splitting our messages
* remove newlines when flushing out local files
PR: GHSA-jjm2-jg4p-3v9q
NAS-141684 / 27.0.0-BETA.1 / Extend TNC heartbeat retry window to one week (#19567)
This commit adds changes to extend the TrueNAS Connect heartbeat retry
window from 48 hours to one week, so an outage or transient backend
problem lasting longer than two days no longer stops heartbeats
permanently. The threshold is now a named constant that the docstring
and the give-up log line derive from, and the alert text has been
corrected to match since it also stated the old figure.
[offload][sycl] add context parameter to olCreateProgram (#218387)
This patch is the 3rd patch in the context patch series. This change is
relatively simple compared to the others: we just introduce context to
the create program API and pass it down through the plugin interface to
the plugins.
AMDGPU: Add visible features for aperture regs, doorbell ID and AGPR alloc
These fields are needed to migrate AMDGPUAttributor to using TargetParser
information instead of subtarget features.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[InstCombine] Do not apply unsigned sub identities when flipping icmp strictness in `foldICmpBinOp` (#219904)
Folding `icmp ult A -nuw B, Op1 -> icmp ule A, Op1` may be unsound for
unsigned predicates with negative B, when the subtraction appears as a
`or disjoint`, previously matched as `add nuw`. nuw in `A + (-B)`
ensures that `A <u B` does not wrap unsigned, though the identity would
require proving `A >=u B` for the subtraction not to wrap. As the fold
relies on `NoOp0WrapProblem`, which proves the opposite of the latter,
simply avoid performing such an optimization.
Fixes: https://github.com/llvm/llvm-project/issues/218540.
Remove two declarations without definitions (#219511)
Commit 3dc4fd6d removed the definitions of struct_scc_modem_sz and
struct_scc_stat_sz, but left the declarations in a header. This patch
removes the leftovers.
net/openrsync: update to openrsync-0.20260730
Sync with upstream, pulling another year of commits.
Noteworthy changes:
* Many portability fixes (with specific regard to NetBSD)
* Various bug fixes.
* Several improvents merged from Apple.
Refer to the github history for more details.
[Clang] Enable UBSan for AMDGPU device offload
Summary:
This enables the device UBSan runtime for AMDGPU decides. Primarily this
required modifications to the `addSanitizerRuntime` interface so we can
query the compilation's offload status. Also need to forward it through
the linker wrapper interface. Works on all AMDGPU offload, slight hacks
around the other targets as they do not advertise sanitizer
runtimes properly.
This is linked in via a new `-u __ubsan_device_initialize` hook to pull
in the side library. This is standard behavior and keeps the core logic
mostly unchanged and re-used.
[compiler-rt] Add AMDGPU Device UndefinedBehaviorSanitizer runtime
Summary:
This adds support for full UBSan on the AMDGPU target. The GPU build of
`compiler-rt` will now build `libclang_rt.ubsan_standalone.a` and the
host build will now provide `libclang_rt.ubsan_device.a` for the
host-side formatting.
The **core** approach is to simply gather arguments from the device and
replay them on the host. The RPC interface acts as the narrow shim to
pass data between the CPU and GPU.
The changes to the core runtime are kept minimal, only exposing a few
needed hooks to re-run and symbolize reports coming from an external
caller. The device archive is a side-library which will only be present
for GPU offloading builds.
Putting this in `compiler-rt` via interceptors avoids an ABI edge
between many consumers, (OpenMP, HIP, Pytorch, etc). The runtime code is
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