LLVM/project 1786190llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vec-shuffle-byte-rotate.ll

[LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (#164213)
DeltaFile
+28-4llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-7llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
+2-4llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
+33-153 files

LLVM/project e7edfd8llvm/test/CodeGen/X86 vector-sext.ll vector-zext.ll

[X86] Regenerate vector ext tests to show VPADD constant asm comments (#193942)
DeltaFile
+8-8llvm/test/CodeGen/X86/vector-sext.ll
+6-6llvm/test/CodeGen/X86/vector-zext.ll
+14-142 files

LLVM/project c0844b7llvm/test/CodeGen/X86 known-never-zero.ll

[X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (#193943)
DeltaFile
+16-16llvm/test/CodeGen/X86/known-never-zero.ll
+16-161 files

pkgng/pkgng 7563a50libpkg/repo/binary Makefile.in, src Makefile.in

fix build on macos
DeltaFile
+1-1libpkg/repo/binary/Makefile.in
+1-1src/Makefile.in
+1-1tests/Makefile.in
+3-33 files

pkgng/pkgng 70e8ffe. configure.def

fix header detection on linux
DeltaFile
+5-0configure.def
+5-01 files

pkgng/pkgng e7b2343. Makefile.in

more bmake fixes for out of tree build
DeltaFile
+1-1Makefile.in
+1-11 files

FreeNAS/freenas 96683b8src/middlewared/middlewared/etc_files/local/avahi/services ADISK.service.py, src/middlewared/middlewared/etc_files/local/truenas-discovery truenas-discoveryd.conf.py

Use truenas-discovery service

This commit replaces avahi, wsdd, and netbios services with a
unified truenas-discovery service. This simplifies the middleware
implementation of these services.
DeltaFile
+105-130tests/api2/test_310_service_announcement.py
+13-160src/middlewared/middlewared/utils/mdns.py
+63-0src/middlewared/middlewared/etc_files/local/truenas-discovery/truenas-discoveryd.conf.py
+0-63src/middlewared/middlewared/etc_files/local/avahi/services/ADISK.service.py
+58-0src/middlewared/middlewared/etc_files/local/truenas-discovery/services.d/ADISK.conf.py
+0-55src/middlewared/middlewared/pytest/unit/utils/test_mdns.py
+239-40827 files not shown
+450-68633 files

NetBSD/src 7ds8uXUsys/arch/m68k/include mmu.h

   Add mmu_range_is_tt() helper function that consults the TT register
   configuration to determine if a physical address range is transparently-
   translated for the specified access.

   (missed "cvs add")
VersionDeltaFile
1.1+45-0sys/arch/m68k/include/mmu.h
+45-01 files

LLVM/project 717a045llvm/test/CodeGen/AArch64/Atomics aarch64-atomicrmw-rcpc3.ll aarch64-atomicrmw-rcpc.ll, llvm/test/CodeGen/AArch64/GlobalISel arm64-atomic.ll

Merge branch 'main' into users/zhaoqi5/opt-xvshuf4id
DeltaFile
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-v8a.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
+615-617llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
+836-297llvm/test/CodeGen/X86/masked-sdiv.ll
+6,451-6,134769 files not shown
+30,828-14,920775 files

LLVM/project 0844fdfclang/lib/AST/ByteCode Interp.cpp Pointer.cpp, clang/test/AST/ByteCode unions.cpp

[clang][bytecode] Start lifetime when activating pointers (#192589)

This can be used to revive union members.
DeltaFile
+29-0clang/test/AST/ByteCode/unions.cpp
+1-1clang/lib/AST/ByteCode/Interp.cpp
+1-0clang/lib/AST/ByteCode/Pointer.cpp
+31-13 files

OPNSense/core 73d8debsrc/opnsense/scripts/kea get_kea_leases.py

Services: Kea DHCPv6: Missed DUID during lease collection (#10203)
DeltaFile
+1-0src/opnsense/scripts/kea/get_kea_leases.py
+1-01 files

LLVM/project c59c19bllvm/include/llvm/CodeGen MachineIDFSSAUpdater.h, llvm/lib/CodeGen MachineIDFSSAUpdater.cpp

[MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (#145722)

This is a port of SSAUpdaterBulk to machine IR minus "bulk" part. Phi
deduplication and simplification are not yet implemented but can be
added if needed.

When used in AMDGPU to replace MachineSSAUpdater for i1 copy lowering,
it reduced compilation time from 417 to 180 seconds for the pass on a
large test case (56% improvement).
DeltaFile
+186-0llvm/lib/CodeGen/MachineIDFSSAUpdater.cpp
+81-0llvm/include/llvm/CodeGen/MachineIDFSSAUpdater.h
+24-17llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+12-12llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
+3-3llvm/test/CodeGen/AMDGPU/si-lower-i1-copies-order-of-phi-incomings.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
+309-352 files not shown
+311-368 files

NetBSD/src TWXxIlGsys/arch/m68k/conf files.m68k, sys/arch/m68k/include mmu_40.h mmu_30.h

   Add mmu_range_is_tt() helper function that consults the TT register
   configuration to determine if a physical address range is transparently-
   translated for the specified access.
VersionDeltaFile
1.1+252-0sys/arch/m68k/m68k/mmu_tt.c
1.6+4-2sys/arch/m68k/include/mmu_40.h
1.5+3-1sys/arch/m68k/include/mmu_30.h
1.74+2-1sys/arch/m68k/conf/files.m68k
+261-44 files

LLVM/project 0571ce4flang/lib/Semantics check-omp-structure.cpp resolve-directives.cpp, flang/test/Semantics/OpenMP parallel-master-goto.f90

[flang][OpenMP] Move branching verification to semantic checks (#193324)

Move the check for branching into and out of an OpenMP construct from
symbol resolution into semantic checks.
Instead of using directive contexts to check for crossing a construct
boundary, use construct pointers and source ranges.
DeltaFile
+136-11flang/lib/Semantics/check-omp-structure.cpp
+0-132flang/lib/Semantics/resolve-directives.cpp
+57-4flang/lib/Semantics/check-omp-structure.h
+5-15flang/lib/Semantics/check-omp-loop.cpp
+0-1flang/test/Semantics/OpenMP/parallel-master-goto.f90
+198-1635 files

LLVM/project 8141a43flang/include/flang/Parser parse-tree.h, flang/lib/Semantics check-omp-loop.cpp check-omp-structure.cpp

[flang][OpenMP] Make OpenMPLoopConstruct inherit from OmpBlockConstruct (#193823)

Conceptually OpenMPLoopConstruct has the exact same structure as
OmpBlockConstruct: directive specification for the begin directive,
optional one for the end directive, and a block of code. The reason why
OpenMPLoopConstruct was not originally made to be a descendant of
OmpBlockConstruct was to preserve the behavior of AST visitors, where a
separate (type-based) visitor could be defined for the begin/end
directives of a block construct, and for a loop construct. The AST nodes
representing the begin/end directives in block and loop construct had
different types: Omp{Begin|End}Directive for block constructs, and
Omp{Begin|End}LoopDirective for loop constructs.
Today this distinction is not needed anywhere, and so the loop construct
will be represented in the same way as a block construct.
DeltaFile
+15-15flang/test/Parser/OpenMP/order-clause01.f90
+0-26flang/lib/Semantics/check-omp-loop.cpp
+2-22flang/include/flang/Parser/parse-tree.h
+6-6flang/test/Parser/OpenMP/parallel-loop-unparse.f90
+11-1flang/lib/Semantics/check-omp-structure.cpp
+6-6flang/test/Parser/OpenMP/loop-transformation-construct02.f90
+40-7647 files not shown
+123-19853 files

LLVM/project 48e65b6llvm/lib/Target/AArch64 AArch64InstrFormats.td, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll

[AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (#193345)

This allows the upper extract_high to match for bf16 types, allowing us
to generate a sshl2 instruction.
DeltaFile
+14-16llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+3-0llvm/lib/Target/AArch64/AArch64InstrFormats.td
+17-162 files

LLVM/project a227dc7llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/RISCV combine-is_fpclass.ll

[DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (#193737)

This PR teaches `DAGCombiner::visitIS_FPCLASS` to fold directly to
constant `true` based on the source's `KnownFPClass`, instead of only
narrowing the test mask.

Prep work to help with https://github.com/llvm/llvm-project/pull/193672
DeltaFile
+10-0llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
+4-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+14-02 files

NetBSD/pkgsrc ODQCS9Udoc CHANGES-2026

   Updated devel/py-dulwich, devel/py-wheel
VersionDeltaFile
1.2557+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc 7M0brK4devel/py-wheel Makefile distinfo

   py-wheel: updated to 0.47.0

   0.47.0

   - Added the ``wheel info`` subcommand to display metadata about wheel files without
     unpacking them
   - Fixed ``WheelFile`` raising ``Missing RECORD file`` when the wheel filename contains
     uppercase characters (e.g. ``Django-3.2.5.whl``) but the ``.dist-info`` directory
     inside uses normalized lowercase naming
VersionDeltaFile
1.45+4-5devel/py-wheel/Makefile
1.34+4-4devel/py-wheel/distinfo
1.15+4-1devel/py-wheel/PLIST
+12-103 files

NetBSD/pkgsrc dL5JMKKdevel/py-dulwich distinfo PLIST

   py-dulwich: updated to 1.2.0

   1.2.0   2026-04-21

   * Expand ``log`` command options: add ``--oneline``, ``--abbrev-commit``,
     ``--author``, ``--committer``, ``--grep``, ``--since``/``--after``,
     ``--until``/``--before``, ``-n``/``--max-count``, ``--no-merges``,
     ``--merges``, ``--stat``, ``-p``/``--patch``, ``--name-only``,
     and ``--follow``.

   * Add ``am`` command and ``porcelain.am()`` for applying mailbox-style
     email patches (``git am``), with state persistence for
     ``--continue``, ``--skip``, ``--abort``, and ``--quit`` recovery
     operations.

   * Add support for ``extensions.relativeworktrees`` repository extension,
     allowing Git worktrees to use relative paths instead of absolute paths
     when linking worktrees.


    [70 lines not shown]
VersionDeltaFile
1.73+31-46devel/py-dulwich/distinfo
1.41+4-20devel/py-dulwich/PLIST
1.15+9-14devel/py-dulwich/cargo-depends.mk
1.78+3-7devel/py-dulwich/Makefile
+47-874 files

LLVM/project f64e8d1llvm/include/llvm/Analysis VecFuncs.def, llvm/include/llvm/IR RuntimeLibcalls.td

[AMDLIBM] Remove the mapping of the deleted vector call (#193760)

Removing the mapping of deleted vector from the
[amdlibm_vec.h](https://github.com/amd/aocl-libm-ose/blob/master/include/external/amdlibm_vec.h)
DeltaFile
+58-0llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
+0-1llvm/include/llvm/Analysis/VecFuncs.def
+0-1llvm/include/llvm/IR/RuntimeLibcalls.td
+58-23 files

LLVM/project 2155bfbllvm/include/llvm/CodeGen TargetInstrInfo.h

Update llvm/include/llvm/CodeGen/TargetInstrInfo.h

Co-authored-by: Sam Elliott <aelliott at qti.qualcomm.com>
DeltaFile
+1-1llvm/include/llvm/CodeGen/TargetInstrInfo.h
+1-11 files

LLVM/project a48159dllvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Remove support for FEAT_MPAMv2_VID (#193191)

`FEAT_MPAMv2_VID` instructions and system registers, as introduced
in change d30f18d2c, are being removed at this time, as they've been
removed from the latest Arm ARM, which doesn't preclude them returning
in some form in future.

Other system registers introduced with `FEAT_MPAMv2` are unaffected,
and these continue to be ungated, but since `+mpamv2` gating is now
empty,
I'm removing this superfluous gating code.
DeltaFile
+5-86llvm/test/MC/AArch64/armv9.7a-mpamv2.s
+0-36llvm/lib/Target/AArch64/AArch64SystemOperands.td
+5-17llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+0-18llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
+2-12llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+0-10llvm/test/CodeGen/AArch64/aarch64-sys-intrinsic.ll
+12-1797 files not shown
+13-20513 files

LLVM/project cedcf18clang/include/clang/Sema Sema.h, clang/lib/Sema SemaDecl.cpp

[Clang][Sema] Change `ExtnameUndeclaredIdentifiers` to MapVector. (#193924)

Iteration order of this map does not matter for compilation, except that
since 475f71e8fa15ee71f99e450a0e1c90d3961005f9, this data is dumped into
precompiled header files and thus affects content of those files.

To make precompiled header file contents deterministic, changing its
type to one that has deterministic iteration order, matching the nearby
`WeakUndeclaredIdentifiers`.

Fixes #193923
DeltaFile
+102-0clang/test/PCH/pragma-redefine-extname.h
+10-0clang/test/PCH/pragma-redefine-extname.c
+3-3clang/lib/Sema/SemaDecl.cpp
+2-1clang/include/clang/Sema/Sema.h
+117-44 files

LLVM/project 9002048llvm/test/CodeGen/X86 masked-srem.ll masked-urem.ll

[X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (#193933)

Noticed the incorrect "-mattr=+avx512" attribute, and replaced it with proper x86-64-v* level test coverage
DeltaFile
+836-297llvm/test/CodeGen/X86/masked-srem.ll
+828-305llvm/test/CodeGen/X86/masked-urem.ll
+836-297llvm/test/CodeGen/X86/masked-sdiv.ll
+826-302llvm/test/CodeGen/X86/masked-udiv.ll
+3,326-1,2014 files

LLVM/project 3fa0ac2lldb/include/lldb/Target MemoryRegionInfo.h, lldb/source/Target MemoryRegionInfo.cpp

Reland "[lldb][Linux] Read memory protection keys for memory regions (#193934)" (#193936)

This reverts commit 390a29ea833965f481a7011b07deed9612229d6e.

Two tests failed on the X86 buildbot but not in GitHub CI because the
buildbot has protection keys and the CI machines do not. I ran the tests
on an AArch64 host without protection keys, and only selected tests on a
simulated AArch64 machine with protection keys, so I did not find this
earlier.

The fix was to add "protection-key" to the list of possible
qMemoryRegionInfo response keys.
DeltaFile
+40-0lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
+20-0lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
+17-0lldb/test/API/linux/aarch64/permission_overlay/TestAArch64LinuxPOE.py
+8-8lldb/source/Target/MemoryRegionInfo.cpp
+10-1lldb/include/lldb/Target/MemoryRegionInfo.h
+5-0lldb/test/API/linux/aarch64/permission_overlay/main.c
+100-96 files not shown
+116-912 files

FreeBSD/ports b39c6f1devel Makefile, devel/lazymake Makefile distinfo

devel/lazymake: New port: TUI for browsing and executing Makefile targets
DeltaFile
+20-0devel/lazymake/Makefile
+5-0devel/lazymake/distinfo
+4-0devel/lazymake/pkg-descr
+1-0devel/Makefile
+30-04 files

LLVM/project cc0913eclang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode records.cpp

[clang][bytecode] Fix `MemberExpr`s with a static member (#193902)

We need logic to load from the reference pointer, similar to the one we
have for regular `DeclRefExpr`s.
DeltaFile
+19-14clang/lib/AST/ByteCode/Compiler.cpp
+31-0clang/test/AST/ByteCode/libcxx/static-reference-load.cpp
+16-1clang/test/AST/ByteCode/records.cpp
+66-153 files

LLVM/project 9df51a9mlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/lib/Dialect/LLVMIR/IR NVVMDialect.cpp

[MLIR][NVVM] Add `nvvm.sin` OP (#193775)

Implement `nvvm.sin` with ftz flag
DeltaFile
+25-0mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+15-0mlir/test/Dialect/LLVMIR/nvvm-transcendentals.mlir
+15-0mlir/test/Target/LLVMIR/nvvm/transcendentals.mlir
+10-0mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+65-04 files

LLVM/project 23ea736llvm/lib/Analysis AliasAnalysisEvaluator.cpp, llvm/test/Analysis/BasicAA atomics.ll

[AAEval] Print ModRefInfo for atomic operations (#193935)

Print ModRefInfo for fence, atomicrmw, etc. Also for atomic
load and store, as these may have additional effects beyond
what is implied by the simple alias result.
DeltaFile
+181-0llvm/test/Analysis/BasicAA/atomics.ll
+26-23llvm/lib/Analysis/AliasAnalysisEvaluator.cpp
+207-232 files