[libc] Add generic cpp::byteswap to CPP/bit.h (#196274)
Added a constexpr byteswap template using recursive half-swap
decomposition. Accepts all integral types, matching C++23 std::byteswap
semantics. Signed types delegate to the unsigned path via static_cast,
which the compiler elides entirely.
A single recursive template handles all sizes from 8 to 128 bits with no
per-width specialisations or builtin fallbacks needed. Produces optimal
bswap/rolw instructions on Clang at -O2. A static_assert rejects types
larger than 128 bits.
Refactored endian_internal.h to call cpp::byteswap directly, replacing
the explicit template specialisations and builtin dispatch.
Assisted-by: Automated tooling, human reviewed.
devel/llvm-{cheri,morello}: Remove obsolete patch
Both llvm-cheri and llvm-morello have been upgraded to LLVM 17 so we
don't need LLVM 15 patches.
Sponsored by: DARPA, AFRL
linuxkpi: Implement `module_*()` APIs as static functions
This fixes an "unused variable" warning when building DRM drivers.
Reviewed by: emaste
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D56780
(cherry picked from commit 658bb99db9c7872f92ccb86ed2674c72636436d2)
NAS-140922 / 27.0.0-BETA.1 / improve VMFlags (#18909)
`vm.flags` previously fork+exec'd `lscpu` and regex-parsed its output to
detect the CPU vendor. Replace that with a single read of
`/proc/cpuinfo`
via the existing `cpu_info()` helper, which already opens the file for
`cpu_model`.
Changes:
- `middlewared.utils.cpu.CpuInfo` gains `vendor_id: str | None` and
`cpu_flags: tuple[str, ...]`. Both are populated in the same
`/proc/cpuinfo` pass that already read `model name`.
- `vm_flags()` now reads from `cpu_info()` instead of `lscpu`. With no
subprocess to await, the function is synchronous.
- `amd_rvi` was previously set to `True` on every AMD CPU regardless of
capability. It now correctly reflects the `npt` feature flag.
- `vm.supports_virtualization` and `crud.py`'s validator call
`kvm_supported()` directly instead of going through a one-line wrapper.
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[MLIR][NVVM] Spell strict assembly properties directly
NVVM strict property assembly currently uses prop-dict for many ops. Some of those formats already bind every inherent field, and a few small groups can spell their inherent attributes more naturally in the assembly syntax.
Spell the transcendental ftz flag, redux abs/nan flags, cluster aligned flag, and the small fence attributes directly. Drop prop-dict from formats whose inherent fields are now fully covered by the declarative format.
Assisted-by: Codex
[BOLT][AArch64] Update error messages for X86-specific passes (#196200)
Update error messages with "is specific to X86" wording on passes that
are functionally X86. Update unsupported-passes.test to match the new
wording.
[clang] Integrate LLVMABI for function call ABI lowering (#194460)
This PR wires the LLVM ABI library (prototyped in
https://github.com/llvm/llvm-project/pull/140112) into Clang's function
call ABI lowering pipeline, behind a new `-fexperimental-abi-lowering`
cc1 flag.
When the flag is enabled and the active target has an LLVMABI
implementation, `CodeGenTypes::arrangeLLVMFunctionInfo` constructs an
`llvm::abi::FunctionInfo` from the call's argument and result types
(using QualTypeMapper(https://github.com/llvm/llvm-project/pull/174634)
to translate Clang QualTypes into ABI types).
Asks the target's `llvm::abi::TargetInfo` to classify it, and then
translates each `llvm::abi::ArgInfo` back into the ABIArgInfo consumed
by the rest of CodeGen. The translation is handled by a new
`convertABIArgInfo` helper covering the Direct, Extend, Indirect, and
Ignore kinds, with coerce-to types lifted back into LLVM IR via a new
IRTypeMapper.
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[MLIR][SPIRV] Enable strict property assembly format
Enable strict property assembly format mode for SPIR-V and add property
dictionaries to declarative formats that still carry inherent attributes outside
explicit operands or clauses.
Refresh ARM graph and TOSA tests so GraphConstant uses prop-dict spelling for
its inherent constant identifier.
Assisted-by: Codex
[MLIR][NVVM] Enable strict property assembly format
Enable strict property assembly format mode for the NVVM dialect and update
custom assembly formats to expose property dictionaries explicitly.
Refresh NVVM tests so inherent operation properties are printed and parsed
through the property dictionary while non-property attributes remain in the
attribute dictionary.
Assisted-by: Codex
[Flang][OpenMP] Fix Flang crash and incorrect ordering with OpenMP detached task (#194840)
Fixes - [#194563](https://github.com/llvm/llvm-project/issues/194563)
This PR fixes the runtime crash and incorrect task ordering reported in
the testcase involving:
```
!$omp task if(.false.) depend(out:x) detach(ev)
```
The testcase had two issues:
**1. Segmentation fault near omp_fulfill_event(ev)**
The detach event handle was not being initialized or preserved correctly
before the nested task used it.
**2. Incorrect execution order**
The task with depend(in:x) was running before the detach event was
fulfilled, which violates OpenMP dependency semantics.
#### Changes in this PR
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[MLIR][ControlFlow] Enable strict property assembly format
Enable the strict properties assembly format mode for the ControlFlow dialect.
The dialect formats already cover their inherent attributes, except for a test
that still used attr-dict spelling for branch weights.
Update that test to use the existing weights(...) syntax so the inherent
attribute is parsed through the declarative format.
Assisted-by: Codex
net/freerdp3: Allow build RDPECAM with CAIRO
Enabling the "RDPECAM" option requires one of the "SWSCALE" or "CAIRO"
options (not just "SWSCALE") - replace "RADIO" with "SINGLE" to force
one of them on and avoid overcomplicating the logic.
PR: 294662
Tested by: Quentin Thébault <quentin.thebault at defenso.fr>
Sponsored by: UNIS Labs
(cherry picked from commit 6edbb9f806b355a559c7b94e9a020f7b1eb13299)
[Flang][OpenMP] Preserve MapInfoOp loc on descriptor base-address maps (#196086)
This PR tries to fix another issue which was discovered after
https://github.com/llvm/llvm-project/issues/195333 was fixed. Now when
we run the same steps, we see the following output
```
omptarget device 0 info: Entering OpenMP data region with being_mapper at test.f90:18:9 with 5 arguments:
omptarget device 0 info: alloc(ptr(1:1024))[48]
omptarget device 0 info: to(ptr(1:1024))[0]
omptarget device 0 info: to(ptr(1:1024))[40]
omptarget device 0 info: to(unknown)[8]
omptarget device 0 info: to(unknown)[4096]
```
Notice "unknown" in the last 2 lines. This happens because
`MapInfoFinalization` splits box descriptor `omp.map.info` ops into a
parent map and a base-address member map (fir.box_offset + inner map
with var_ptr_ptr). The `genBaseAddrMap` used `descriptor.getLoc()` for
those new ops, which dropped the `NameLoc` that lowering attaches for
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[BOLT][AArch64] Refuse to run retpoline insertion pass (#196179)
RetpolineInsertion (`--insert-retpolines`) is specific to X86, but
currently rejects non-X86 targets with an assert. For consistency, this
should be an error message.
- Add a non-X86 guard
- Add the error message to unsupported-passes.test
[BOLT][AArch64] Refuse to run memcpy1 specialization (#196196)
SpecializeMemcpy1 (`--memcpy1-spec=main`) is implemented only for X86.
It does not crash but would be useful to inform the user that it is a
no-op.
- Guard against non-X86
- Add error to unsupported-passes.test
[flang] Remove legacy (non-HLFIR) lowering options from tests (#196137)
Update flang LIT tests to drop references to compiler options that
controlled legacy non-HLFIR lowering: `-flang-experimental-hlfir`,
`-flang-deprecated-no-hlfir`, the bbc `-hlfir`/`--hlfir` switch, and
`--use-desc-for-alloc=false`. The dropped flags were either no-ops or
selected behavior that is now the only supported lowering path.
Delete `Driver/hlfir-no-hlfir-error.f90`, which existed solely to test
mutual exclusion of `-flang-experimental-hlfir` and
`-flang-deprecated-no-hlfir`.
This commit contains only test changes; the option/code removal will be
done in separate commits.
Assisted-by: AI
