LLVM/project bc91641flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP declare-reduction-intrinsic-op.f90

[flang][OpenMP] Fix crash in declare reduction with intrinsic operators (#182978)

genOMP for OpenMPDeclareReductionConstruct unconditionally extracts
ProcedureDesignator from OmpReductionIdentifier, but when the reduction
identifier is an intrinsic operator like `+`, the parser produces a
DefinedOperator instead. This causes a std::get crash.

Visit both variants of OmpReductionIdentifier to extract the reduction
name string, handling DefinedOperator (with IntrinsicOperator and
DefinedOpName sub-variants) alongside the existing ProcedureDesignator
path.

This fixes the ICE; the underlying lack of derived-type reduction
support (TODO in ReductionProcessor::getReductionInitValue) remains
a separate issue.

Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
DeltaFile
+23-3flang/lib/Lower/OpenMP/OpenMP.cpp
+14-0flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
+37-32 files

LLVM/project ce952a2clang/docs LanguageExtensions.rst, clang/include/clang/Basic Builtins.td

[Clang] Add `__builtin_reduce_[in_order|assoc]_fadd` for floating-point reductions (#176160)

This adds `__builtin_reduce_[in_order|assoc]_fadd` to expose the
`llvm.vector.reduce.fadd.*` intrinsic directly in Clang, for the full
range of supported FP types.

Given a floating-point vector `vec` and a scalar floating-point value
`acc`:

- `__builtin_reduce_assoc_fadd(vec)` corresponds to an fast/associative
  reduction
  * i.e, the fadds can occur in any order
- `__builtin_reduce_in_order_fadd(vec, acc)` corresponds to an ordered
  redunction
  * i.e, the result is as-if an accumulator was initialized with `acc` 
    and each lane was added to it in-order, starting from lane 0
DeltaFile
+49-7clang/lib/Sema/SemaChecking.cpp
+29-25clang/docs/LanguageExtensions.rst
+33-0clang/test/CodeGen/builtins-reduction-math.c
+23-0clang/lib/CodeGen/CGBuiltin.cpp
+20-0clang/test/Sema/builtins-reduction-math.c
+12-0clang/include/clang/Basic/Builtins.td
+166-321 files not shown
+168-327 files

LLVM/project 22f9940mlir/include/mlir/Dialect/GPU/IR GPUOps.td, mlir/lib/Conversion/GPUToSPIRV WmmaOpsToSPIRV.cpp

[mlir][gpu] Support arith.truncf in subgroup MMA elementwise ops (#182499)

This commit adds support for arith.truncf in the supported list of
elementwise ops for subgroup MMA ops, and enables lowering to SPIR-V.
DeltaFile
+23-29mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
+22-0mlir/test/Conversion/VectorToGPU/vector-to-mma-ops.mlir
+7-3mlir/test/Conversion/GPUToSPIRV/wmma-ops-to-spirv-khr-coop-matrix.mlir
+3-1mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
+1-0mlir/lib/Conversion/GPUToSPIRV/WmmaOpsToSPIRV.cpp
+56-335 files

LLVM/project efcf64ellvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/LoongArch/lasx vxi1-masks.ll

[DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (#183032)

See if we can fold all elements of an OR of buildvectors: OR(-1,X) ->
-1, OR(0,X) -> X, etc.
DeltaFile
+72-141llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
+38-71llvm/test/CodeGen/PowerPC/pr25080.ll
+9-44llvm/test/CodeGen/X86/vselect.ll
+23-26llvm/test/CodeGen/X86/combine-or.ll
+34-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-8llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
+178-2906 files

LLVM/project 5e30c4aclang/lib/Basic/Targets AArch64.cpp, clang/test/Preprocessor arm64e.c

[clang] Define __PTRAUTH_INTRINSICS__ for arm64e-apple-* targets (#172944)

The macro is set by Xcode clang for the arm64e-apple-* targets, and
ifdefed in the macOS and iPhoneOS SDKs.
DeltaFile
+3-1clang/lib/Basic/Targets/AArch64.cpp
+1-0clang/test/Preprocessor/arm64e.c
+4-12 files

LLVM/project b830bcfllvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.sbfe.ll

[AMDGPU]Fix compute num sign bits unsigned underflow (#182723)

Fixes #182677

The `BFE_I32` case in `ComputeNumSignBitsForTargetNode` was not masking
the width operand with `& 0x1f`, unlike other BFE operations in the same
  file. Since the hardware instruction only uses the low 5 bits of the
  width field, values >= 32 passed via `@llvm.amdgcn.sbfe.i32` caused
  unsigned integer underflow in the calculation:

      unsigned SignBits = 32 - Width->getZExtValue() + 1;

  When width > 33, this underflows, producing incorrect SignBits values.
  When width == 33, SignBits becomes 0, violating the expected return
  range of [1, BitWidth]. This led to assertion failures and
  miscompilation where subsequent BFE narrowing operations were
  incorrectly eliminated.

  This patch:

    [2 lines not shown]
DeltaFile
+40-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sbfe.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+41-12 files

OPNSense/plugins 681894dsysutils/nextcloud-backup/src/opnsense/mvc/app/library/OPNsense/Backup Nextcloud.php, sysutils/nextcloud-backup/src/opnsense/mvc/app/models/OPNsense/Backup NextcloudSettings.xml

sysutils/nextcloud-backup: make logic the right way around and small model tweak
DeltaFile
+2-2sysutils/nextcloud-backup/src/opnsense/mvc/app/library/OPNsense/Backup/Nextcloud.php
+0-2sysutils/nextcloud-backup/src/opnsense/mvc/app/models/OPNsense/Backup/NextcloudSettings.xml
+2-42 files

FreeBSD/ports 432a562net-im/linux-discord distinfo Makefile

net-im/linux-discord: Update to 0.0.126
DeltaFile
+3-3net-im/linux-discord/distinfo
+1-1net-im/linux-discord/Makefile
+4-42 files

LLVM/project b9cc1d7llvm/include/llvm/CodeGen/GlobalISel Combiner.h, llvm/lib/CodeGen/GlobalISel Combiner.cpp

GlobalISel: Make CombinerInfo const (#183263)

DeltaFile
+2-2llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
+1-1llvm/lib/CodeGen/GlobalISel/Combiner.cpp
+3-32 files

LLVM/project 2df95efcmake/Modules LLVMVersion.cmake, libcxx/include __config

Bump version to 22.1.1
DeltaFile
+1-1cmake/Modules/LLVMVersion.cmake
+1-1libcxx/include/__config
+1-1llvm/utils/gn/secondary/llvm/version.gni
+1-1llvm/utils/lit/lit/__init__.py
+1-1llvm/utils/mlgo-utils/mlgo/__init__.py
+5-55 files

LLVM/project cec03aellvm/utils/release github-upload-release.py

[llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (#183053)

Previously we linked to .sig files, which were created by the person who
built the release.

Now these are built in GitHub so they have .jsonl signature files
instead.
DeltaFile
+4-4llvm/utils/release/github-upload-release.py
+4-41 files

LLVM/project 99d853bllvm/include/llvm/Object ELF.h

fixup! [Object][ELF] Fix section header zero check
DeltaFile
+10-10llvm/include/llvm/Object/ELF.h
+10-101 files

OpenBSD/ports hiptgebdevel/py-test-arraydiff Makefile, sysutils/virt-manager Makefile

   drop py.test -> pytest symlinks not needed with change in py3-test-9.0.2p0
VersionDeltaFile
1.9+0-3devel/py-test-arraydiff/Makefile
1.54+0-1sysutils/virt-manager/Makefile
+0-42 files

OpenBSD/ports ypuvLxTdevel/py-test Makefile, devel/py-test/pkg PLIST

   stop @comment'ing-out bin/pytest
VersionDeltaFile
1.60+2-0devel/py-test/Makefile
1.25+1-1devel/py-test/pkg/PLIST
+3-12 files

OpenBSD/ports eiGemUYmail/opensmtpd-filters/dkimsign Makefile, mail/opensmtpd-filters/dkimsign/patches patch-main_c

   Add a temporary patch to remove tmppath from pledge in favour of
   unveil(_PATH_TMP)+pledge("rpath wpath cpath").

   This patch is to bridge the time until a new release of dkimsign can be
   made.

   OK op@ kirill@
VersionDeltaFile
1.1+22-0mail/opensmtpd-filters/dkimsign/patches/patch-main_c
1.16+1-0mail/opensmtpd-filters/dkimsign/Makefile
+23-02 files

NetBSD/pkgsrc ggjehZldoc CHANGES-2026

   doc: Updated cross/arm-none-eabi-gcc to 14.3.0nb1
VersionDeltaFile
1.1386+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc ymIB7ekcross/arm-none-eabi-gcc distinfo Makefile, cross/arm-none-eabi-gcc/patches patch-zlib_zutil.h patch-libiberty_Makefile.in

   arm-none-eabi-gcc: Fix PR pkg/59701

   pkgsrc changes:
   ---------------
     * Remove fdopen #defines in zutil.h on macOS.
     * Bump revision.
VersionDeltaFile
1.1+26-0cross/arm-none-eabi-gcc/patches/patch-zlib_zutil.h
1.17+4-3cross/arm-none-eabi-gcc/distinfo
1.2+3-3cross/arm-none-eabi-gcc/patches/patch-libiberty_Makefile.in
1.37+2-2cross/arm-none-eabi-gcc/Makefile
1.2+2-2cross/arm-none-eabi-gcc/patches/patch-libcc1_configure
+37-105 files

LLVM/project 42aac86llvm/include/llvm/CodeGen/GlobalISel Combiner.h, llvm/lib/CodeGen/GlobalISel Combiner.cpp

GlobalISel: Make CombinerInfo const
DeltaFile
+2-2llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
+1-1llvm/lib/CodeGen/GlobalISel/Combiner.cpp
+3-32 files

OpenBSD/ports mC5Chnhdevel/py-mypy-extensions Makefile

   enable tests
VersionDeltaFile
1.7+1-1devel/py-mypy-extensions/Makefile
+1-11 files

LLVM/project 9088f38libc/startup/linux/riscv irelative.cpp

[libc] Fix LIBC_INLINE build error in riscv/irelative.cpp (#183249)

LIBC_INLINE is defined in attributes.h, which was not included. Since
constexpr already implies inline, simply remove the LIBC_INLINE
qualifier from the static helper, matching the x86_64 and aarch64
irelative implementations.
DeltaFile
+1-1libc/startup/linux/riscv/irelative.cpp
+1-11 files

LLVM/project 90edb20libclc CMakeLists.txt

[libclc] Compile with -fdenormal-fp-math=dynamic (#183262)

This PR is extracted from #157633.
`-fdenormal-fp-math=dynamic` is required to defer denormal handling and
should be used for libclc library compilation.

Additionally, if the default ieee value is incompatible with the user
code's denormal-fp-math setting, this mismatch prevents libclc functions
from being inlined.
DeltaFile
+1-0libclc/CMakeLists.txt
+1-01 files

OpenBSD/ports V46PEh6devel/spidermonkey140 distinfo Makefile

   Update to spidermonkey140-140.8.0.
VersionDeltaFile
1.6+2-2devel/spidermonkey140/distinfo
1.6+1-1devel/spidermonkey140/Makefile
+3-32 files

OpenBSD/ports qfbpKgUgraphics/p5-SVG Makefile distinfo

   Update to p5-SVG-2.88.
VersionDeltaFile
1.39+9-7graphics/p5-SVG/Makefile
1.28+2-2graphics/p5-SVG/distinfo
+11-92 files

FreeBSD/ports aaf059fgames/fheroes2 distinfo Makefile

games/fheroes2: update to 1.1.14

Changelog:      https://github.com/ihhub/fheroes2/releases/tag/1.1.14
DeltaFile
+3-3games/fheroes2/distinfo
+1-1games/fheroes2/Makefile
+4-42 files

LLVM/project a7cfc67clang/include/clang/Basic OpenCLExtensions.def, clang/test/SemaOpenCL extension-version.cl

[OpenCL] Set intel extensions minimum version to OpenCL 1.0 (#176854)

Motivation is similar to b12e070b9238. Following intel extensions are
changed:
cl_intel_required_subgroup_size
cl_intel_subgroups
cl_intel_subgroups_char
cl_intel_subgroups_long
cl_intel_subgroups_short
cl_intel_subgroup_buffer_prefetch
cl_intel_subgroup_local_block_io
cl_intel_device_side_avc_motion_estimation

Relates to https://github.com/KhronosGroup/OpenCL-CTS/pull/2376.
DeltaFile
+9-9clang/test/SemaOpenCL/extension-version.cl
+8-8clang/include/clang/Basic/OpenCLExtensions.def
+17-172 files

LLVM/project fb8c0e6clang/test/OpenMP target_update_strided_struct_variable_count_and_stride_messages.c target_update_variable_count_and_stride_messages.c

[Clang][OpenMP][NFC] Diagnostics/parsing tests for non-contiguous updates. (#181780)

NFC PR for validating parsing checks for variable count/stride,
pointer-based array sections, struct member array sections,
multiple/partial array updates -- for non-contiguous updates
DeltaFile
+55-0clang/test/OpenMP/target_update_strided_struct_variable_count_and_stride_messages.c
+53-0clang/test/OpenMP/target_update_variable_count_and_stride_messages.c
+46-0clang/test/OpenMP/target_update_strided_ptr_variable_count_messages.c
+42-0clang/test/OpenMP/target_update_strided_struct_ptr_multiple_messages_from.c
+42-0clang/test/OpenMP/target_update_strided_struct_ptr_multiple_messages_to.c
+41-0clang/test/OpenMP/target_update_strided_ptr_variable_stride_messages.c
+279-05 files not shown
+438-011 files

OpenBSD/ports Hixg62gdevel/py-virtualenv distinfo Makefile

   Update to py3-virtualenv-20.39.0.
VersionDeltaFile
1.57+2-2devel/py-virtualenv/distinfo
1.88+1-1devel/py-virtualenv/Makefile
+3-32 files

FreeBSD/ports 158889aeditors/fresh distinfo Makefile.crates

editors/fresh: Update to 0.2.9
DeltaFile
+307-3editors/fresh/distinfo
+154-2editors/fresh/Makefile.crates
+1-1editors/fresh/Makefile
+462-63 files

OpenBSD/src 0mjfDSjsys/dev/pci if_iwx.c if_iwxreg.h

   Add support for scan command version 17 to iwx(4).

   This will be needed to support BZ wifi-6e devices in the future.

   Tested:
   AX200: jmc, stsp
   AX210: kettenis (MA device)
   AX211: sthen (SO device), phessler
   AX211: stsp (BZ device)
VersionDeltaFile
1.200+203-3sys/dev/pci/if_iwx.c
1.59+108-1sys/dev/pci/if_iwxreg.h
+311-42 files

LLVM/project bded7e9llvm/lib/CodeGen/GlobalISel GISelValueTracking.cpp, llvm/test/CodeGen/AArch64/GlobalISel compute-known-bits-bitcast-assertion.ll

[AArch64][GISel] Fix computeKnownBits through a COPY with different fixed-width vector types (#179123)

Fix an assertion in known bits through a COPY by making computeKnownBits
length-aware for different fixed width vectors. If the lengths of the
vectors are different all lanes are demanded.

Fixes #178242
DeltaFile
+40-0llvm/test/CodeGen/AArch64/GlobalISel/compute-known-bits-bitcast-assertion.ll
+10-6llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+50-62 files