[libclc] Remove unused and incorrect pkgconf file (#185654)
Summary:
All this file does is pass `-L` to an incorrect location. These files
are installed as part of the resource directory which is always included
anyway, so I think this is vestigial and can be removed.
[InstCombine][profcheck] Set unknown branch weights when folding booleans (#185769)
In cases where two logical operations are folded into one, InstCombine
first folds one of the logical operations into an binary operation,
losing the profile information. Ordinarily, we could've used that
information to compute the branch weight information of the new
instruction, but since we don't have the original weights, we say the
new instruction has unknown branch weights.
Tracking issue: #147390
[HLSL] Ignore complex types that do not contribute to cbuffer layout (#184276)
Detect arrays of empty structs and similar constructs in constant buffers. Ignore them if they do not contribute to `cbuffer` layout
Fixes #183788
[clang][ssaf] Add ssaf-format to validate and convert summaries
This PR introduces the `ssaf-format` command-line tool, which validates
and converts translation-unit (TU) and link-unit (LU) summaries between
registered serialization formats in the SSAF framework. After the
serialization format registry and the JSON format were introduced, there
was no standalone tool to inspect, validate, or convert summary files
outside of a full compilation pipeline. `ssaf-format` fills that gap: it
serves as both a format validator (read without writing) and a format
converter (read then write to a different format or path).
[flang][openacc] Attach IndirectGlobalAccessModel to fir.use_stmt (#185767)
In some cases, `fir.use_stmt` operation can end up in offload region
like in acc routine for example. Make sure we can validate the symbols
associated with the `fir.use_stmt` operation.
[HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (#165156)
Adds the WaveActiveBitOr intrinsic from issue #99167. This intrinsic
required a bit more work than the last intrinsics that I have done.
There are some peculiarities, which I verified with dxcompiler:
- WaveActiveBitOr only works on uint and uint64_t, no other types are
allowed
- There is no 16 bit version of WaveActiveBitOr
Followed the checklist:
- [x] Implement WaveActiveBitOr clang builtin,
- [x] Link WaveActiveBitOr clang builtin with hlsl_intrinsics.h
- [x] Add sema checks for WaveActiveBitOr to
CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
- [x] Add codegen for WaveActiveBitOr to EmitHLSLBuiltinExpr in
CGBuiltin.cpp
- [x] Add codegen tests to
clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl
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libpmc: Explicitly whitelist json fields
Adds all missing Intel fields and turns jevents.c into an explicit white
list mechanism so that we no longer ignore important fields that often
invalidate the counter. The json event parser must now parse every
field on each architecture that we support. This has been tested by
running tinderbox and manually running jevent against our current json
repository. As a bonus I fixed spelling errors in the AMD JSON
definitions.
Sponsored by: Netflix
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/2055
[HLSL][Matrix] Add `half` type overloads to `mul` and exercise them (#185506)
PR #184882 was missing `half` type-specific overloads for `mul`.
This PR introduces `half` type-specific overloads for `mul` and
additional codegen tests for the half type.
Also added f16 tests for the lowering of llvm.matrix.multiply.
The offload test suite already has a `mul.fp16` test for exercising half
types at runtime, so no change is needed there.
Assisted-by: claude-opus-4.6
[HLSL] Fix intrinsics header file 16 bit attribute macro to use version 6.2 (#185757)
There have been a couple builtins declared in a header file that specify
16 bit availability for shader model 6.0.
This is incorrect, it should be 6.2.
This bug was propagated for many of the waveops, and should be
corrected.
Fixes https://github.com/llvm/llvm-project/issues/185756
[LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (#180888)
This avoids needing to combine the SHL/SHR/OR pattern later.
This improves code quality on RISC-V where our slx/srx instructions
clobber the destination register but we don't have an immediate form.
We can't recover the original direction from the SHL/SHR/OR pattern
and we can't commute it during the TwoAddressInstruction pass like X86
due to the shift amount being in a register.
[lldb] Make date test handle host-target time difference (#185759)
It seems there may be a formatter bug when there's a time zone
difference between the target machine being debugged, and the host the
debugger is running on.
build: adjust LLDB and clang library naming on Windows (#185084)
Ensure that use of the GNU driver does not change the library name on
Windows. We would check the build tools being MSVC rather than targeting
Windows to select the output name.
