[mlir][AMDGPU] Extend amdgpu.transpose_load for gfx1250 (#198354)
This commit adds support for gfx1250's ds_load_tr* instructions to
`amdgpu.transpose_load` since they're pretty close to the gfx950 ones.
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Co-authored-by: Codex <codex at openai.com>
[dsymutil] Add missing --linker {classic,parallel} in tests (#198568)
As I'm preparing to toggle the default, I found another set of tests
that don't explicitly pass the linker to dsymutil.
[IR] Explicitly note C standard library UB (#198562)
This language is to my understanding a bit outdated (if we're in a
freestanding environment, we should be handling things fine to my
knowledge, or at least I'm not aware of any outstanding issues reported
by people compiling for freestanding environments/different languages
which are somewhat prominent at this point). The language here dates
back to
68f971b1d67d51272f5c141fc9e4740e27e279f4 with some minor modifications
in 722212d1a0672ae18a23db58c4cfb7e38073abfa. Explicitly note the UB
aspect as this came up recently when working on llubi in #190147 and I
do not think hurts to explicitly note.
[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs
These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.
Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
[AMDGPU] Implement CFI for CSR spills
Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.
Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.
Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
[AMDGPU] Emit entry function Dwarf CFI
Entry functions represent the end of unwinding, as they are the
outer-most frame. This implies they can only have a meaningful
definition for the CFA, which AMDGPU defines using a memory location
description with a literal private address space address. The return
address is set to undefined as a sentinel value to signal the end of
unwinding.
Change-Id: I21580f6a24f4869ba32939c9c6332506032cc654
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
