SelectionDAG: Stop emitting kill flags in InstrEmitter (#229069)
These is no point to maintaining these before register allocation.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Transforms: Use changeToCall in LowerInvoke (#230055)
The pass predates changeToCall, which does the same rewrite and is what
other contexts already use. The only difference is the new branch takes the
invoke's DebugLoc.
[SandboxIR] Move IRBuilder from Context to Module (NFC) (#230033)
Followup to https://github.com/llvm/llvm-project/pull/229430, to remove
one of the last places constructing IRBuilder with only an LLVMContext
instead of Module.
[RISCV] Change custom promotion of riscv_clmulh/r (#228846)
Instead of using shl+shl+clmul(h/r)+srl, use and+and+clmul(h/r)+srl.
This matches type promotion of ISD::CLMUL(H/R). The ands may be
able to fold into loads or removed via known bits.
ISel will convert and+and+clmul to shl+shl+clmulh if the ands
aren't removed.
This leaves some regressions for clmulr that will be dealt with
in a follow up.
This is an alternative to #228669.
[RISCV][P-ext] Merge RISCVISD::PNCLIP(U)P and PNCLIP(U)P_W. (#228191)
These we separated because pnclip(u).w uses 2 scalar arguments and
pnclipp.h uses vector arguments.
This patch relaxes the constraint and adds manual node verification to
allow them to be shared.
[CodeGen] Add a FunctionSplittingMode target option (#226575)
Add TargetOptions::FunctionSplitting and a
-function-splitting={none,bbsections,all} flag, replacing
TargetOptions::EnableMachineFunctionSplitter and the
-split-machine-functions / -enable-split-machine-functions flags.
MachineFunctionSplitter runs when the mode is 'all'. clang and flang map
-fsplit-machine-functions to 'all', including through the LTO
plugin-opt.
This is the first step towards merging MachineFunctionSplitter into
BasicBlockSections. After that, 'none' and 'bbsections' will fully take
effect, so splitting can be turned off for some or all functions whether
a
bbsections or PGO profile is used.
[AArch64] Fold DUPLANE of 0 to zeroimm (#228415)
This folds away DUPLANE8/16/32/64 of zero into a zero vector, which
should be simpler and possibly allow other folds.
[AArch64][CostModel] Allow more nxv1 operations on integers
This rewrite the "approved" list to become an explicit "exclusion" list.
At this point, we can expect all arithmetic int operation to be valid
for nxv1 types, with the exception of div/rem and overflow ops.
FP types will be looked into later.
The patch adds codegen and costmodel tests.
[AArch64][CostModel] Consider some nxv1 casts as illegal
Codegen does not support all kinds of casts for these types.
This patch adds missing costmodel and codedgen tests.
[GISel][AArch64][Mips][RISCV] Allow G_BRINDIRECT to be selected via tablegen. (#229450)
Use ptype0 for the pointer operand so tablegen knows it is a pointer.
Move AArch64 selection to earlySelect to handle the PtrAuth case before
using the table. In SelectionDAG, the PtrAuth case is handled by
lowering.
Drop the manual isel for Mips and RISC-V.
[MLGO] Avoid NaN regalloc features for unspillable live ranges (#229751)
Unspillable ranges have infinite weight, so use_def_density became NaN
for them and 0 for all other candidates
That makes use_def_density unusable for training in every case with
unspillable candidates
Revert "workflows/precommit: Use single shared job to compute project… (#230124)
…s (#224941)"
This reverts commit 3c4320082f327842293e82fbf66097dfd98bf248.
Windows jobs after the reverted commit were not running anything in
ninja.
hwpmc: return errors from PMC_OP_PMCGETMSR
pcd_get_msr() returns a positive errno, but only a negative value was
treated as a failure, so errors were reported as success.
Signed-off-by: Osvaldo Janeri Filho <ojanerif at amd.com>
Reviewed by: mhorne
MFC after: 3 days
Sponsored by: AMD
Pull Request: https://github.com/freebsd/freebsd-src/pull/2461
libpmc: fix the family check for the AMD DF event encoding
The check compares cpu_family with decimal 19 instead of 0x19, so
Families 17h and 19h get the Family 1Ah DF encoding.
Signed-off-by: Osvaldo Janeri Filho <ojanerif at amd.com>
Reviewed by: mhorne
Fixes: 00c0a1f0bf6c ("hwpmc: Fix PMC flags for AMD Zen cores")
MFC after: 3 days
Sponsored by: AMD
Pull Request: https://github.com/freebsd/freebsd-src/pull/2461
route/fib_algo: Fix FIB_ALGO without ROUTE_MPATH option
The ROUTE_MPATH compile option has been removed from CURRENT
branch. Therefore, use the ROUTE_MPATH macro for nhgrp headers.
PR: 299210
Fixes: 891bda143f6b ("route/fib_algo: Fix nexthop index ...")
Differential Revision: https://reviews.freebsd.org/D59552
(cherry picked from commit 63343822430453f4add20bcbfa134c99132361df)
