LLVM/project 547c3adllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp AMDGPURegBankLegalize.cpp

AMDGPU/GlobalISel: RegbankLegalize rules for undef and constants (#193024)

Move RegbankLegalize handling for G_IMPLICIT_DEF, G_CONSTANT and G_FCONSTANT
from AMDGPURegBankLegalize to AMDGPURegBankLegalizeRules by implementing
rules for all supported types.
DeltaFile
+17-5llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+0-12llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+17-172 files

LLVM/project 3c88abeclang-tools-extra/clang-tidy/readability IdentifierLengthCheck.cpp IdentifierLengthCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy][readability-identifier-length] Add a line count threshold (#185319)

This PR implements the feature described in #185318

A new parameter named `LineCountThreshold` is added to the
`readability-identifier-length` check, which controls how many lines of
code must separate the the last use of a variable from its declaration
for the check to warn. For backwards-compatibility, the default value
for this parameter is set to 0.

Increasing the threshold to 1 allows for short names in one-liners (for
example: `std::transform(..., [](auto i){ return i*i; });`), and in the
general case with `LineCountThreshold = N` a variable is allowed to have
a shorter name than otherwise required if it is never used again after
`N` lines (including its declaration line).

This feature is implemented ~using a secondary `MatchFinder`~ by calling
the `utils::decl_ref_expr::allDeclRefExprs` helper function for each
variable with a short name. For performance reasons, the new piece of
code is short-circuited if `LineCountThreshold` is set to 0 (the default
value).
DeltaFile
+85-0clang-tools-extra/test/clang-tidy/checkers/readability/identifier-length-line-count-threshold.cpp
+55-1clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
+18-0clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+2-0clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.h
+165-15 files

LLVM/project 5fc897ellvm/test/Transforms/InstSimplify/ConstProp/AMDGPU wave.reduce.ll

Modify test names, and add comments
DeltaFile
+30-27llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU/wave.reduce.ll
+30-271 files

FreeBSD/ports 2410e0bmisc/ytree distinfo Makefile

misc/ytree: Update to 2.11
DeltaFile
+3-3misc/ytree/distinfo
+1-1misc/ytree/Makefile
+4-42 files

LLVM/project 163d0b1llvm/lib/Transforms/IPO ConstantMerge.cpp, llvm/test/Transforms/ConstantMerge merge-comdat.ll dont-merge.ll

[ConstantMerge] don't merge constants with COMDAT (#192477)

After merging #190995 (now reverted) the CI failed because ConstantMerge
currently merges constants with differing COMDATs. This can result in a
function referencing globals with a different COMDAT than before the
merge, producing a linking error when that global gets discarded.

It is still possible to merge same comdats, or to merge a non-key comdat
constant into a non-comdat constant.
DeltaFile
+27-0llvm/test/Transforms/ConstantMerge/merge-comdat.ll
+22-0llvm/test/Transforms/ConstantMerge/dont-merge.ll
+14-1llvm/lib/Transforms/IPO/ConstantMerge.cpp
+63-13 files

FreeBSD/ports 038c537x11/waveterm Makefile

x11/waveterm: Bump port revision after electron41 update (2604dc1239b6)
DeltaFile
+1-0x11/waveterm/Makefile
+1-01 files

FreeBSD/ports 2604dc1devel/electron41 distinfo Makefile, devel/electron41/files patch-electron_shell_browser_native__window__views.cc patch-electron_spec_api-desktop-capturer-spec.ts

devel/electron41: Update to 41.2.1

Changelog: https://github.com/electron/electron/releases/tag/v41.2.1

Reported by:    GitHub (watch releases)
DeltaFile
+17-17devel/electron41/files/patch-electron_shell_browser_native__window__views.cc
+16-7devel/electron41/files/patch-electron_spec_api-desktop-capturer-spec.ts
+13-9devel/electron41/distinfo
+16-4devel/electron41/Makefile
+9-9devel/electron41/files/patch-electron_shell_browser_api_electron__api__app.cc
+7-7devel/electron41/files/patch-electron_BUILD.gn
+78-5317 files not shown
+136-10223 files

FreeBSD/ports 2a85483lang/erlang-runtime27 distinfo Makefile

lang/erlang-runtime27: Update to 27.3.4.10
DeltaFile
+3-3lang/erlang-runtime27/distinfo
+1-3lang/erlang-runtime27/Makefile
+4-62 files

FreeBSD/ports 9e467dadevel Makefile, devel/lazyworktree Makefile distinfo

devel/lazyworktree: New port: TUI for managing Git worktrees
DeltaFile
+20-0devel/lazyworktree/Makefile
+5-0devel/lazyworktree/distinfo
+3-0devel/lazyworktree/pkg-descr
+1-0devel/Makefile
+29-04 files

OpenBSD/src RfrXUhWlibexec/tradcpp macro.c

   expand_domacro() handled a defined() with the wrong argument count via
   an error path that doesn't drain es->args

   OK jsg
VersionDeltaFile
1.5+1-0libexec/tradcpp/macro.c
+1-01 files

NetBSD/src B8gRC9msys/arch/hppa/dev gftfb.c

   some minor fixes:
   - underling anti-aliased characters properly
   - set & support RI_FULLCLEAR
VersionDeltaFile
1.40+15-6sys/arch/hppa/dev/gftfb.c
+15-61 files

LLVM/project 18b4dd3libc/src/__support/OSUtil/linux/syscall_wrappers accept4.h CMakeLists.txt, libc/src/sys/socket accept4.h

[libc] Implement accept4 on linux (#192927)

Testing funcitonality by checking the flags on the returned FD.
DeltaFile
+63-0libc/test/src/sys/socket/linux/connect_accept_test.cpp
+49-0libc/src/__support/OSUtil/linux/syscall_wrappers/accept4.h
+31-0libc/src/sys/socket/linux/accept4.cpp
+24-0libc/src/sys/socket/accept4.h
+14-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+14-0libc/src/sys/socket/linux/CMakeLists.txt
+195-07 files not shown
+220-013 files

LLVM/project 8434bdclibc/src/__support/OSUtil/linux/syscall_wrappers shutdown.h, libc/src/sys/socket shutdown.h

[libc] Implement shutdown on linux (#192933)

- added the relevant constant definitions
- enabled the entry point on x86_64, aarch64 and riscv
- testing by checking that the call causes an EOF on read (on the
appropriate end)
DeltaFile
+79-0libc/test/src/sys/socket/linux/shutdown_test.cpp
+43-0libc/src/__support/OSUtil/linux/syscall_wrappers/shutdown.h
+27-0libc/src/sys/socket/linux/shutdown.cpp
+20-0libc/src/sys/socket/shutdown.h
+19-0libc/test/src/sys/socket/linux/CMakeLists.txt
+12-0libc/src/sys/socket/linux/CMakeLists.txt
+200-06 files not shown
+221-012 files

FreeBSD/ports e1e9900sysutils/rucola distinfo Makefile.crates

sysutils/rucola: Update to 0.9.0

ChangeLog:      https://github.com/Linus-Mussmaecher/rucola/releases/tag/v0.9.0

Reported by:    "github-actions[bot]" <notifications at github.com>
DeltaFile
+563-357sysutils/rucola/distinfo
+280-177sysutils/rucola/Makefile.crates
+2-2sysutils/rucola/Makefile
+845-5363 files

FreeBSD/ports 11051fedatabases/sabiql distinfo Makefile.crates

databases/sabiql: Update to 1.11.0

ChangeLog:

  - https://github.com/riii111/sabiql/releases/tag/v1.10.0
  - https://github.com/riii111/sabiql/releases/tag/v1.11.0

Reported by:    riii111 <notifications at github.com>
DeltaFile
+55-57databases/sabiql/distinfo
+26-27databases/sabiql/Makefile.crates
+1-1databases/sabiql/Makefile
+82-853 files

FreeBSD/ports 2a7f7d9sysutils/mdfried distinfo Makefile.crates

sysutils/mdfried: Update to 0.19.4

Reported by:    Benjamin Grosse <notifications at github.com>
DeltaFile
+11-3sysutils/mdfried/distinfo
+4-0sysutils/mdfried/Makefile.crates
+1-1sysutils/mdfried/Makefile
+16-43 files

NetBSD/pkgsrc-wip c255441forgejo distinfo PLIST

forgejo: update to 15.0.0.

Forgejo v15.0 refines areas of day-to-day usability and security,
and incorporates new capabilities in advanced Forgejo Actions usage.

UI enhancements in issue filtering and the releases list make
Forgejo easier to interact with. Auto-linking containers to
repositories removes a manual step from repository administrators.
Git notes can now be modified from the single-commit view in pull
requests.

Repository specific access tokens allow for more secure API
interactions.

Forgejo Actions can now expand reusable workflows, providing a
better user experience and more powerful capabilities. OpenID
Connect support allows for secure access to third-party systems.
Forgejo Runner registration improvements allow a simpler installation
process for most users, and ephemeral runners allow secure autoscaling
capabilities for advanced integrations.
DeltaFile
+363-357forgejo/distinfo
+215-84forgejo/PLIST
+120-118forgejo/go-modules.mk
+2-1forgejo/Makefile
+700-5604 files

FreeBSD/ports 84fd787www/moodle50 distinfo Makefile

www/moodle50: Update to 5.0.7
DeltaFile
+3-3www/moodle50/distinfo
+1-1www/moodle50/Makefile
+4-42 files

FreeBSD/ports b4005e5www/moodle45 distinfo Makefile

www/moodle45: Update to 4.5.11
DeltaFile
+3-3www/moodle45/distinfo
+1-1www/moodle45/Makefile
+4-42 files

FreeBSD/ports ad21ebdwww/moodle51 distinfo Makefile

www/moodle51: Update to 5.1.4
DeltaFile
+3-3www/moodle51/distinfo
+2-2www/moodle51/Makefile
+5-52 files

FreeBSD/ports 00fb8dawww Makefile, www/moodle52 Makefile pkg-descr

www/moodle52: New port, copied from www/moodle51

Moodle is a course management system (CMS) - a free, Open Source software
package designed using sound pedagogical principles, to help educators
create effective online learning communities. You can use it on any
computer you have handy (including webhosts), yet it can scale from a
single-teacher site to a 40,000-student University.
DeltaFile
+60-0www/moodle52/Makefile
+59-0www/moodle52/files/pkg-message.in
+5-0www/moodle52/pkg-descr
+3-0www/moodle52/distinfo
+1-0www/Makefile
+128-05 files

LLVM/project 76989f2llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize iv-select-cmp-decreasing.ll first-order-recurrence.ll

[VPlan] Simplify add x, (sub 0, y) -> sub x, y (#187228)

The patch follows what InstCombine does.

Alive2 proof: https://alive2.llvm.org/ce/z/0tG6s6
DeltaFile
+23-23llvm/test/Transforms/LoopVectorize/iv-select-cmp-decreasing.ll
+13-5llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-8llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
+4-4llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+3-4llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
+3-3llvm/test/Transforms/LoopVectorize/interleave-with-i65-induction.ll
+50-478 files not shown
+64-6614 files

LLVM/project 6d0fbcamlir/lib/Conversion/VectorToSPIRV VectorToSPIRV.cpp, mlir/test/Conversion/VectorToSPIRV vector-to-spirv.mlir

[mlir][SPIR-V] Lower AND/OR/XOR vector reductions (#192293)

Lower vector.reduction <and>, <or>, and <xor> to spirv.BitwiseAnd,
spirv.BitwiseOr, and spirv.BitwiseXor respectively
DeltaFile
+99-0mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
+10-4mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
+109-42 files

LLVM/project 3599050llvm/lib/Target/Hexagon CMakeLists.txt

[Hexagon] Add missing MIRParser link dependency (#191010)

cd66d79be19b added parseMachineFunctionInfo to HexagonTargetMachine
which calls parseNamedRegisterReference from LLVMMIRParser, but did not
add the library dependency. This causes link failures for executables
like dsymutil and llvm-split when building with BUILD_SHARED_LIBS=OFF.

Add MIRParser to LINK_COMPONENTS.

(cherry picked from commit 95af7de3e9de2fadfbe7b2cbbfaecfdfbc7fd7af)
DeltaFile
+1-0llvm/lib/Target/Hexagon/CMakeLists.txt
+1-01 files

LLVM/project a1a9924llvm/lib/Target/Hexagon HexagonRegisterInfo.cpp, llvm/test/CodeGen/Hexagon aligna-prologue-expansion.mir

[Hexagon] Add AP register to liveins when used for frame index access (#188942)

This is a follow-up to commit 3ef59d80c5ce ("[Hexagon] Fix
use-before-def of AP register in prologue CSR spills").

When the AP (alignment pointer) register is used as a base register for
frame index elimination, add it to the basic block's livein set. This
ensures liveness information is accurate for the machine verifier.
The original commit fixed the use-before-def issue by moving PS_aligna
after CSR spills. However, when the prologepilog pass is run in
isolation (as in MIR tests) with expensive checks enabled, the verifier
reports an error because AP is used in blocks where it's not marked as
live-in.
In the full compilation pipeline, the Hexagon Packetizer adds AP as an
implicit operand to instruction bundles, which satisfies the verifier.
However, when running only the prologepilog pass (before packetization),
AP remains an explicit operand and must be in the livein set.
This fix adds AP to liveins when AP is used as the base register,
ensuring correct liveness tracking regardless of whether packetization

    [3 lines not shown]
DeltaFile
+10-0llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
+10-0llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
+20-02 files

LLVM/project 22ad4d6llvm/lib/Target/Hexagon HexagonTargetMachine.cpp HexagonMachineFunctionInfo.h, llvm/test/CodeGen/Hexagon aligna-prologue-expansion.mir

[Hexagon][MIR] Serialize HexagonMachineFunctionInfo::StackAlignBaseReg to MIR (#190003)

This patch adds serialization of HexagonMachineFunctionInfo::StackAlignBaseReg
into MIR. This field stores the physical register used as the aligned-stack base pointer
when a function has both variable-sized stack objects and requires stack
alignment greater than the default.

This replaces the workaround from commit 2e10b6299591 ("[Hexagon] Add AP
register to liveins when used for frame index access") which manually added
AP to liveins. That approach was incorrect because it only updated one
block without updating predecessors, breaking liveness invariants.

(cherry picked from commit cd66d79be19b6db00500ba4508b3946ef1caec88)
DeltaFile
+36-0llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+29-0llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.h
+24-0llvm/lib/Target/Hexagon/HexagonMachineFunctionInfo.cpp
+6-9llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
+0-10llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
+8-0llvm/lib/Target/Hexagon/HexagonTargetMachine.h
+103-196 files

LLVM/project 7eb1829llvm/lib/Target/Hexagon HexagonFrameLowering.cpp, llvm/test/CodeGen/Hexagon aligna-prologue-expansion.mir

[Hexagon] Fix use-before-def of AP register in prologue CSR spills (#188504)

PS_aligna initializes the AP register (eg:callee-saved R16) with an
aligned value derived from FP. It was being placed before the
CSR spills, causing the spill of R16 to save the AP value instead of the
caller's original R16, breaking the callee-saved register contract and
it must be defined before any AP-relative stack accesses. Fix by moving
PS_aligna to after all CSR spills in insertCSRSpillsInBlock().

Fixes #184531

(cherry picked from commit 3ef59d80c5ce51738a055d9e8eb98aa3c8effb2f)
DeltaFile
+92-0llvm/test/CodeGen/Hexagon/aligna-prologue-expansion.mir
+30-12llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+122-122 files

FreeBSD/ports 56ee76ddevel/py-serializable Makefile distinfo

devel/py-serializable: update 0.4.1 → 1.1.0
DeltaFile
+12-4devel/py-serializable/Makefile
+3-3devel/py-serializable/distinfo
+15-72 files

LLVM/project 15d7196lld/ELF/Arch X86_64.cpp

Rebase

Created using spr 1.3.6-beta.1
DeltaFile
+1-1lld/ELF/Arch/X86_64.cpp
+1-11 files

LLVM/project 1e4f189lld/ELF/Arch X86_64.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+1-1lld/ELF/Arch/X86_64.cpp
+1-11 files