LLVM/project c632208llvm/lib/Target/SystemZ SystemZELFAsmPrinter.h SystemZAsmPrinter.h

[SystemZ] Split SystemZAsmPrinter into 2 classes - ELF and XPLink (#214343)

This PR splits the ELF and XPLink implementations in the
SystemZAsmPrinter into 2 new classes. Each new class is derived from the
SystemZAsmPrinter class. This is to avoid adding `isOSzOS()` checks in
multiple places in SystemZAsmPrinter.

---------

Co-authored-by: Yusra Syeda <yusra.syeda at ibm.com>
DeltaFile
+17-1,275llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+859-0llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
+452-0llvm/lib/Target/SystemZ/SystemZELFAsmPrinter.cpp
+127-0llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.h
+4-99llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
+54-0llvm/lib/Target/SystemZ/SystemZELFAsmPrinter.h
+1,513-1,3741 files not shown
+1,515-1,3747 files

FreeBSD/ports c4999e5textproc Makefile, textproc/py-sphinx-markdown-builder pkg-descr distinfo

textproc/py-sphinx-markdown-builder: Add new port

Sphinx extension to add markdown generation support.

https://github.com/liran-funaro/sphinx-markdown-builder
DeltaFile
+33-0textproc/py-sphinx-markdown-builder/Makefile
+3-0textproc/py-sphinx-markdown-builder/distinfo
+1-0textproc/Makefile
+1-0textproc/py-sphinx-markdown-builder/pkg-descr
+38-04 files

LLVM/project 4d98435llvm/lib/Target/SPIRV SPIRVLegalizePointerCast.cpp, llvm/test/CodeGen/SPIRV/passes SPIRVLegalizePointerCast.ll

 [SPIRV] Legalize byte-buffer reinterpretation ptrcasts (#192523) (#212999)

Fixes #192523 by extending SPIRVLegalizePointerCast to legalize
reinterpretation spv.ptrcasts on byte-addressable buffers ([0 x i8] /
RWByteAddressBuffer). When Clang emits a typed load or store through
such a pointer (e.g. i32, <4 x i32>), the pass now lowers it to valid
logical SPIR-V instead of hitting an unreachable or producing invalid
OpAccessChain into uchar storage.

For HLSL/Vulkan byte-address buffers, codegen produced IR like:

1.     spv.resource.getpointer → pointer tagged as i8 byte storage
2. spv.ptrcast → pointer tagged as the access type (i32, vector, etc.)
3. Typed load/store through the cast

The existing legalizer only handled aggregate layout mismatches (GEP
drilling, partial vector loads). When getPointerToFirstCompatibleType()
found no compatible nested type—as with flat byte buffers—it hit
llvm_unreachable.

    [15 lines not shown]
DeltaFile
+276-0llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
+231-20llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
+23-0llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-store.ll
+23-0llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-load-float.ll
+22-0llvm/test/CodeGen/SPIRV/pointers/byte-address-buffer-load4.ll
+575-205 files

OpenZFS/src 998eca9.github/workflows/scripts qemu-3-deps-vm.sh

CI: Add tzdata, libcap-utils, and ksh93's stable branch to Alpine

Missing tzdata silently breaks history_007_pos's TZ-dependent timestamp
check (stays in UTC instead of shifting). Missing libcap-utils breaks
zoned_uid_common.kshlib's capsh-based tests ("unshare: failed to
execute"). And building ksh93 from its unpinned "dev" branch, rather
than the stable "1.0" branch, causes musl crashes in ksh93's own
environment-building code, hit by the zpool_iostat/zpool_status "-c"
custom-script tests.

Combined into one commit since all three touch the same function in
qemu-3-deps-vm.sh.

Fixes the following tests on Alpine 3.24:
- history/history_007_pos
- zoned_uid/zoned_uid_023_pos
- zoned_uid/zoned_uid_025_pos
- zoned_uid/zoned_uid_026_pos
- zoned_uid/zoned_uid_030_pos

    [10 lines not shown]
DeltaFile
+10-8.github/workflows/scripts/qemu-3-deps-vm.sh
+10-81 files

LLVM/project 7a5b505clang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c, llvm/docs/GlobalISel GenericOpcode.md GenericOpcode.rst

Merge branch 'main' into users/shiltian/amdgpu-test-case-cleanup
DeltaFile
+376-1,106llvm/test/CodeGen/AArch64/fcvt-fixed.ll
+733-733clang/test/CodeGen/LoongArch/lasx/builtin.c
+733-733clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+0-1,275llvm/docs/GlobalISel/GenericOpcode.rst
+1,130-0llvm/test/CodeGen/AMDGPU/frexp-inf-nan-combine.ll
+1,116-0llvm/docs/GlobalISel/GenericOpcode.md
+4,088-3,847735 files not shown
+29,593-17,967741 files

FreeBSD/ports aa5ab1edevel/opencircuitx distinfo pkg-descr, devel/opencircuitx/files patch-OpenCircuitX_src_ui_dialogs_settings__dialog.h opencircuitx.desktop

devel/opencircuitx: Add new port

OpenCircuitX is a free, open-source EDA (Electronic Design Automation)
platform for VHDL and Verilog: the hardware description languages (HDL)
used to design digital logic. It is developed by OpenLabX and unifies an
IDE-quality HDL editor, a visual circuit canvas, an RTL schematic
viewer, a waveform viewer, and a full FPGA toolchain in one window, for
hardware engineers, students, and FPGA hobbyists alike.

PR:             297258
DeltaFile
+38-0devel/opencircuitx/Makefile
+31-0devel/opencircuitx/files/patch-OpenCircuitX_src_core_update__check.cpp
+10-0devel/opencircuitx/files/patch-OpenCircuitX_src_ui_dialogs_settings__dialog.h
+10-0devel/opencircuitx/files/opencircuitx.desktop
+7-0devel/opencircuitx/pkg-descr
+3-0devel/opencircuitx/distinfo
+99-01 files not shown
+100-07 files

LLVM/project a7bd549llvm/lib/Target/AMDGPU AMDGPUPrivateObjectVGPRs.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-private-object-vgprs.mir

Propagate object liveness to every changed successor, not only back edges
DeltaFile
+56-0llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR/as-vgpr-private-object-vgprs.mir
+14-4llvm/lib/Target/AMDGPU/AMDGPUPrivateObjectVGPRs.cpp
+70-42 files

LLVM/project 9ca6ed7lldb/include/lldb/Host/linux Ptrace.h, lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_loongarch64.cpp NativeRegisterContextLinux_arm64dbreg.cpp

lldb: Linux: empty Ptrace.h pollyfill (#218038)

As the comment in sources alludes to:

> System includes - They have to be included after framework includes
because
> they define some macros which collide with variable names in other
modules.
  
Mixing includes of sys/ptrace.h with other headers can lead to conflicts
that cause i386 lldb-server builds to fail when build against bionic.

Prepare to remove this header outright.

Link: https://github.com/llvm/llvm-project/pull/217435
Link: https://github.com/llvm/llvm-project/issues/217413
Link:
https://lore.kernel.org/llvm/20260821-ptrace_uapi-v1-1-3de8638a29f2@google.com/
DeltaFile
+0-49lldb/include/lldb/Host/linux/Ptrace.h
+25-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp
+18-1lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+12-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+8-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_loongarch64.cpp
+8-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64dbreg.cpp
+71-503 files not shown
+85-509 files

LLVM/project 4a8c926llvm/lib/CodeGen MachinePipeliner.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-max-mii.ll

[MachinePipeliner] Increase the default maximum MII to 256

The pipeliner rejects a loop whose minimum initiation interval exceeds
-pipeliner-max-mii. Its default of 27 suits targets with short instruction
latencies, but is too small for others: on AMDGPU a couple of MFMA
instructions already push the MII past it, so the loop never pipelines.

Increase the default limit from 27 to 256. An explicit -pipeliner-max-mii
still overrides the default.
DeltaFile
+5-5llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-max-mii.ll
+2-2llvm/lib/CodeGen/MachinePipeliner.cpp
+7-72 files

LLVM/project 7f717a0llvm/lib/Target/AMDGPU GCNSubtarget.h GCNSubtarget.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-regpressure-retry.mir

[AMDGPU] Configure the software pipeliner policy

Set the pipeliner policy in overridePipelinerPolicy() to opt into the generic
register-pressure detector.

Schedules exceeding the target-provided pressure-set limits are rejected and
retried at a higher II.
DeltaFile
+181-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-regpressure-retry.mir
+6-0llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+2-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+189-03 files

LLVM/project 1364316llvm/lib/Target/SPIRV SPIRVLegalizerInfo.cpp, llvm/test/CodeGen/SPIRV/legalization matrix-wide-vector-shader.ll

[SPIRV][Matrix] Legalize ICmp and Fcmp (#218467)

fixes https://github.com/llvm/llvm-project/issues/218444

Simple fix we just need to apply the same fewerElementsIf change we have
done for other Global opcodes. This is going to feel like wack-a-mole
for a bit but the fix will be generally the same everytime.
DeltaFile
+100-0llvm/test/CodeGen/SPIRV/legalization/matrix-wide-vector-shader.ll
+9-3llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+109-32 files

FreeBSD/ports 838c429x11/wcm distinfo Makefile, x11/wcm/files patch-src_meson.build

x11/wcm: Update 0.10.0 => 0.11.0

Changelog:
https://github.com/WayfireWM/wcm/releases/tag/v0.11.0

PR:             297716
Sponsored by:   UNIS Labs
DeltaFile
+60-58x11/wcm/pkg-plist
+17-15x11/wcm/Makefile
+19-0x11/wcm/files/patch-src_meson.build
+3-3x11/wcm/distinfo
+99-764 files

FreeBSD/ports 3d05a81x11/wf-shell distinfo pkg-plist, x11/wf-shell/files patch-meson.build patch-src_locker_plugin_password.cpp

x11/wf-shell: Update 0.10.0 => 0.11.0

Changelog:
https://github.com/WayfireWM/wf-shell/releases/tag/v0.11.0

- Add flavors nopipewire and lite = nopipewire + nopulse.

PR:             297716
Sponsored by:   UNIS Labs
DeltaFile
+32-20x11/wf-shell/Makefile
+40-4x11/wf-shell/pkg-plist
+17-0x11/wf-shell/files/patch-src_locker_meson.build
+9-5x11/wf-shell/distinfo
+14-0x11/wf-shell/files/patch-src_locker_plugin_password.cpp
+12-0x11/wf-shell/files/patch-meson.build
+124-292 files not shown
+144-298 files

LLVM/project 9a4fbbclibcxx/utils requirements.txt benchmark-historical

[libc++] Remove the historical benchmarking utilities (#217978)

benchmark-historical, visualize-historical and find-rerun-candidates
were built around storing historical benchmark data int a local
directory. We now store it in LNT instead.
DeltaFile
+0-267libcxx/utils/visualize-historical
+0-242libcxx/utils/find-rerun-candidates
+0-116libcxx/utils/benchmark-historical
+1-3libcxx/utils/requirements.txt
+1-6284 files

LLVM/project f243fbfllvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 build-vector-dup-simd.ll

[AArch64ISel] Lower dup(bitcast) to duplane(insert_elt(bitcast)) (#217931)

`performDUPCombine` in AArch64 ISel has been updated to lower
`dup(bitcast)` to `duplane(insert_vector_elt(poison, bitcast, 0), 0)` to
eliminate roundtrip to GPRs.
DeltaFile
+40-0llvm/test/CodeGen/AArch64/build-vector-dup-simd.ll
+3-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+43-12 files

NetBSD/src H1a62LLsbin/mount_lfs mount_lfs.8 mount_lfs.c

   Add options -k, to invoke a kernel cleaner thread, and -u, to invoke
   lfs_cleanerd(8).  -k is now the default, matching the test suite.
VersionDeltaFile
1.41+57-25sbin/mount_lfs/mount_lfs.c
1.16+17-9sbin/mount_lfs/mount_lfs.8
+74-342 files

NetBSD/src twJxXCysys/ufs/lfs lfs_vnops.c

   Hold the segment lock across the bytes reporting in LFCNRECLAIM.
   This is a trivial modification of riastradh's patch from PR 60504.
VersionDeltaFile
1.354+12-8sys/ufs/lfs/lfs_vnops.c
+12-81 files

LLVM/project 1acd7c8lldb/include/lldb/Utility RegisterType.h, lldb/source/Plugins/Process/gdb-remote GDBRemoteCommunicationServerLLGS.cpp

[lldb] Harden register type XML serialization (#218503)

This is patch 1/5 preparing LLDB's register-type infrastructure for GDB
XML vector types.

- Deduplicate emitted type definitions by XML ID instead of object
address.
- Centralize XML attribute escaping in `RegisterType`.
- Escape enum, flags, field-reference, and register type IDs.
- Add missing `&` escaping to LLGS XML attributes.

XML references identify types by their textual ID, so separate objects
with the same ID must not produce duplicate definitions.

Co-authored-by: Bar Soloveychik <barsolo at fb.com>
DeltaFile
+37-7lldb/unittests/Utility/RegisterTypeTest.cpp
+16-5lldb/source/Utility/RegisterType.cpp
+11-4lldb/source/Utility/RegisterTypeFlags.cpp
+12-0lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationServerLLGSTest.cpp
+7-3lldb/include/lldb/Utility/RegisterType.h
+7-2lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+90-216 files

LLVM/project e817bd8clang/lib/ExtractAPI ExtractAPIConsumer.cpp, clang/test/ExtractAPI macros.c

[ExtractAPI] Deterministically emit macros (#215381)

Macros are processed by iterating over the preprocessor's stored
`DenseMap`, which is pointer-keyed with `IdentifierInfo`. This map is
not ordered, leading to the contents of the symbol graph changing across
runs with identical inputs. Sort macros lexicographically by name to
ensure consistent output.

rdar://184545768
DeltaFile
+9-2clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
+8-0clang/test/ExtractAPI/macros.c
+17-22 files

LLVM/project 84b5b4allvm/test/CodeGen/AMDGPU frexp-inf-nan-combine.ll

[AMDGPU] Precommit Tests for 'Fold redundant inf/nan checks into frexp instructions' (#214964)

Precommit tests for https://github.com/llvm/llvm-project/pull/214936.
DeltaFile
+1,130-0llvm/test/CodeGen/AMDGPU/frexp-inf-nan-combine.ll
+1,130-01 files

LLVM/project 19d2f48llvm/include/llvm/Transforms/Utils Local.h, llvm/lib/Transforms/Utils Local.cpp

[Transforms] Remove unused wouldInstructionBeTriviallyDeadOnUnusedPaths (#218609)

This function was added on Dec 1, 2021 in commit
72750f00121eb10f27ccd62270e5695d9e3322a5 without any callers and has
remained unused since.
DeltaFile
+0-12llvm/lib/Transforms/Utils/Local.cpp
+0-8llvm/include/llvm/Transforms/Utils/Local.h
+0-202 files

LLVM/project e30e5f4clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-vptr.cpp

[CIR] Lower records carrying a vptr for x86_64 (#218457)

A record carrying a vtable pointer could not be passed or returned by
value. `isSupportedType` had no case for `!cir.vptr`, so the whole
signature was reported NYI. That covers any class with a virtual
function or a virtual base.

Accept the type and map it to an `llvm::abi::PointerType`.

A record CIRGen also marks packed stays NYI, which is where a
polymorphic class with tail padding lands.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+254-0clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
+98-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-vptr.cpp
+29-15clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+0-10clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
+381-254 files

OpenZFS/src 904d432module/zfs dmu_objset.c

dmu_objset_open_impl: unregister prop callbacks on error

If dsl_prop_register() fails partway, the error path frees the objset
without removing the callbacks already registered, leaving records
that point at freed memory.  Call dsl_prop_unregister_all() first.

Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Martin Minkus <martin.minkus at gmail.com>
Closes #18903
DeltaFile
+1-0module/zfs/dmu_objset.c
+1-01 files

LLVM/project 175afd9flang-rt/lib/runtime CMakeLists.txt

[flang-rt][OpenMP] fix buildbot failures after commit 01079d2605aabd0beccecb270f51d40119422f04 (#218611)

The commit that introduced integer kind wrappers in libomp-mod caused a
regression in CUDA Flang runtime builds. This change resolves the issue
by skipping the build of libomp-mod for experimental CUDA offload
configurations, ensuring that host-side Fortran objects are not included
in the CUDA/PTX compilation path.

Fixes: https://lab.llvm.org/buildbot/#/builders/152
DeltaFile
+2-1flang-rt/lib/runtime/CMakeLists.txt
+2-11 files

FreeBSD/ports 011be70lang/elixir-mode.el pkg-plist Makefile

lang/elixir-mode.el: Update to 2.5.0

Upstream added elixir-format.el, so pick it up in pkg-plist. Switch to
DISTVERSION for the ordering expected alongside DISTVERSIONPREFIX.
DeltaFile
+3-2lang/elixir-mode.el/distinfo
+1-2lang/elixir-mode.el/Makefile
+1-0lang/elixir-mode.el/pkg-plist
+5-43 files

FreeBSD/ports 01d171ewww/yaws Makefile distinfo

www/yaws: Update to 2.3.1
DeltaFile
+3-3www/yaws/distinfo
+1-1www/yaws/Makefile
+4-42 files

FreeBSD/ports 404e43fdevel/rebar3 Makefile distinfo

devel/rebar3: Update to 3.27.0
DeltaFile
+3-3devel/rebar3/distinfo
+1-1devel/rebar3/Makefile
+4-42 files

LLVM/project d5d6301clang/unittests/AST/ByteCode Pointer.cpp

[clang][test] Use sizeof(wchar_t) instead of __WCHAR_WIDTH__ (#218707)

`__WCHAR_WIDTH__` does not exist everywhere and this broke a builder:
https://lab.llvm.org/buildbot/#/builders/2/builds/60118
DeltaFile
+4-3clang/unittests/AST/ByteCode/Pointer.cpp
+4-31 files

LLVM/project eaa52f7libcxx/docs/Status Cxx26Issues.csv, libcxx/test/support test_text_encoding.h

[libc++] Add test for LWG4043 ASCII in text_encoding (#218175)

It turns out the ASCII entry was not an extension as I had initially
thought, and was added as part of the resolution of LWG 4043. Update
the test and correct the status page.

Resolves #209899
DeltaFile
+1-1libcxx/docs/Status/Cxx26Issues.csv
+1-0libcxx/test/support/test_text_encoding.h
+2-12 files

LLVM/project 3400e0fclang/test/CodeGenOpenCL builtins-amdgcn-make-buffer-rsrc.cl, llvm/lib/Target/AMDGPU AMDGPUInstCombineIntrinsic.cpp

[AMDGPU] Canonicalize num_records to its actual width in InstCombine

llvm.amdgcn.make.buffer.rsrc is overloaded on the type of its
num_records argument, but the hardware field it ends up in has a fixed
width (32 bits, or 45 bits on gfx1250 and up). Rewrite the intrinsic to
use that width, zero-extending or truncating num_records as needed, so
that IR-level optimizations can see that the extra bits of, for example,
the i64 that Clang emits are not demanded.

Targets that aren't concrete enough for the buffer resource layout to be
known are left alone.

AI disclosure: This was my idea but Claude wrote the code (and I've
tried to tighten up the comments)
DeltaFile
+36-44clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
+27-27llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+22-12llvm/test/Transforms/InstCombine/AMDGPU/make-buffer-rsrc-num-records.ll
+21-1llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+106-844 files