[Clang] Enable UBSan for AMDGPU device offload
Summary:
This enables the device UBSan runtime for AMDGPU decides. Primarily this
required modifications to the `addSanitizerRuntime` interface so we can
query the compilation's offload status. Also need to forward it through
the linker wrapper interface. Works on all AMDGPU offload, slight hacks
around the other targets as they do not advertise sanitizer
runtimes properly.
This is linked in via a new `-u __ubsan_device_initialize` hook to pull
in the side library. This is standard behavior and keeps the core logic
mostly unchanged and re-used.
[compiler-rt] Add AMDGPU Device UndefinedBehaviorSanitizer runtime
Summary:
This adds support for full UBSan on the AMDGPU target. The GPU build of
`compiler-rt` will now build `libclang_rt.ubsan_standalone.a` and the
host build will now provide `libclang_rt.ubsan_device.a` for the
host-side formatting.
The **core** approach is to simply gather arguments from the device and
replay them on the host. The RPC interface acts as the narrow shim to
pass data between the CPU and GPU.
The changes to the core runtime are kept minimal, only exposing a few
needed hooks to re-run and symbolize reports coming from an external
caller. The device archive is a side-library which will only be present
for GPU offloading builds.
Putting this in `compiler-rt` via interceptors avoids an ABI edge
between many consumers, (OpenMP, HIP, Pytorch, etc). The runtime code is
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workflows/release-binaries: Smaller WiX installer on Windows (#219858)
Reduce WiX installer size by using LZX compression instead of MSZIP
previously. Tested on `release/23.x` at commit
fdf0409c656cc66c61b14d71c831f2b453c13e19 targetting Win64:
- MSZIP: 779 MiB
- LZX: 613 MiB
workflows/release-binaries: Ignore flaky test on Windows (#219859)
Skip a flaky test when building the Win64 LLVM package on Windows.
A popular security/antimalware solution is preventing this test from
completing correctly.
[OpenMP] Make OpenMP version have separate type
It's unsigned now. Giving it a separate type would make the code clearer,
and it would make it easier to change the effective type if it's ever
needed.
[compiler-rt] Add AMDGPU Device UndefinedBehaviorSanitizer runtime
Summary:
This adds support for full UBSan on the AMDGPU target. The GPU build of
`compiler-rt` will now build `libclang_rt.ubsan_standalone.a` and the
host build will now provide `libclang_rt.ubsan_device.a` for the
host-side formatting.
The **core** approach is to simply gather arguments from the device and
replay them on the host. The RPC interface acts as the narrow shim to
pass data between the CPU and GPU.
The changes to the core runtime are kept minimal, only exposing a few
needed hooks to re-run and symbolize reports coming from an external
caller. The device archive is a side-library which will only be present
for GPU offloading builds.
Putting this in `compiler-rt` via interceptors avoids an ABI edge
between many consumers, (OpenMP, HIP, Pytorch, etc). The runtime code is
[42 lines not shown]
[Clang] Enable UBSan for AMDGPU device offload
Summary:
This enables the device UBSan runtime for AMDGPU decides. Primarily this
required modifications to the `addSanitizerRuntime` interface so we can
query the compilation's offload status. Also need to forward it through
the linker wrapper interface. Works on all AMDGPU offload, slight hacks
around the other targets as they do not advertise sanitizer
runtimes properly.
This is linked in via a new `-u __ubsan_device_initialize` hook to pull
in the side library. This is standard behavior and keeps the core logic
mostly unchanged and re-used.
clang/AMDGPU: Accept subarch names in --offload-arch (#219963)
Accept the triple subarch names as aliases. e.g.,
--offload=arch=amdgpu9.50 is equivalent to --offload-arch=gfx950
CodeGen: Use use_instructions in changeDebugValuesDefReg
The loop only inspects the using instruction, so iterate instructions
directly instead of operands and their parents.
Co-authored-by: Claude (Claude-Opus-4.8)
e1000: Configure PCH low-power link modes for suspend
The PCH suspend path kept a wake link fully powered and did not restore
the negotiated EEE modes after its stop-time reset. Intel provides the
ULP entry and exit machinery in the shared code, but FreeBSD did not
invoke its Sx policy.
Enter ULP on LPT and newer PCH controllers when wake is armed without
directed-unicast, multicast, or broadcast filters, which ULP cannot
preserve. For a link retained by host wake or management, restore the
100BASE-TX and 1000BASE-T LPI controls selected by the local
advertisement and the cached link-partner ability.
Keep these power reductions best-effort: wake filters and PME are
already configured independently, and a ULP or EEE failure is logged
without converting an optional power optimization into a suspend
failure. The existing PCH resume workaround forcibly exits ULP and
clears automatic Sx LPI state before normal initialization.
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CodeGen: Pass instruction and operand index to isIgnorableUse
Replace the MachineOperand argument to the TargetInstrInfo::isIgnorableUse
hook with the containing instruction and operand index. The AMDGPU
implementation only used the operand to recover its parent instruction, so
this drops the dependence on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
MachinePipeliner: Pass instruction to findLoopIncrementValue
The helper recovered the loop block from the operand's parent instruction.
Pass the containing instruction directly so it no longer depends on
MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
tcp md5: improve handling of tcps_sig_err_sigopt counter
For non listening TCP endpoints, increment the tcps_sig_err_sigopt
counter when TCP MD5 is not enabled in the TCP connection, but a
segment containing a TCP MD5 option is received.
Also increment the counter when using the RACK or BBR stack.
Reported by: Hannes Elfert
Reviewed by: rrs
MFC after: 1 week
MFC to: stable/14
MFC to: stable/15
Differential Revision: https://reviews.freebsd.org/D59249
clang/AMDGPU: Stop passing redundant -target-cpu to cc1 (#206483)
Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
e1000: Rework Wake-on-LAN policy and programming
The driver used the NVM APME default as both the hardware-support
decision and the mutable filter mask. Consequently, an NVM-disabled
but capable port did not advertise wake support, disabling a wake mode
once could keep it disabled across later suspends, and directed-unicast
wake could never be selected.
Require the PCI power management capability to report D3hot PME support
before advertising or arming wake. A PM capability alone does not mean
the function can signal PME from the state used during system sleep.
Separate the board and port capability matrix from the NVM-selected
magic packet default. Read the proper per function NVM word on igb
controllers, cover the newer PCH generations, and retain the documented
legacy, multi-port, and OEM restrictions. Decode the distinct APM
Enable locations used by 82544, 82541EI/82547EI, and the later 8254x
parts. Do not advertise wake on the 82541ER, whose power-management
logic cannot assert PME for wake events. For I210/I211 internal iNVM,
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[clang] Delay dependent co_return promise calls (#218779)
Avoiding selection of return_value or return_void while building
co_return whose operand is type-dependent and keeping it unset until
template init rebuild for a type allows dependent operations like
co_return ctx.f(v) to use promise.return_void() instead of needing
promise.return_value().
Fixes #218368
[clang-format] Keep empty Java interface/record body on one line (#219910)
`AllowShortRecordOnASingleLine` (introduced for C++ records) made
`LineJoiner::tryFitMultipleLinesInOne` route Java `TT_RecordLBrace`
lines to `tryMergeRecord`, which only handles C++ class/struct/union
records. Empty Java `interface` and `record` bodies were therefore no
longer merged onto a single line, regressing the behavior that
`BraceWrapping.SplitEmptyRecord: false` previously provided.
Handle Java records separately and restore the pre-existing
`SplitEmptyRecord`-based merge.
Fixes #219711
clang/AMDGPU: Accept subarch names in --offload-arch
Accept the triple subarch names as aliases. e.g.,
--offload=arch=amdgpu9.50 is equivalent to --offload-arch=gfx950
