LLVM/project 00d7ba1clang/include/clang/AST ASTContext.h TypeBase.h, clang/lib/AST ASTContext.cpp

[clang] Unique OverflowBehaviorTypes with a UniquingSet (NFC) (#223939)

This patch migrates OverflowBehaviorTypes in ASTContext from
llvm::FoldingSet to llvm::UniquingSet.

OverflowBehaviorType keys on a pair of QualType and
OverflowBehaviorKind.  Switching to UniquingSet allows us to look up
types with a typed key, eliminating FoldingSetNodeID serialization at
lookup sites and removing OverflowBehaviorType::Profile.

Assisted-by: Antigravity
DeltaFile
+2-8clang/include/clang/AST/TypeBase.h
+3-5clang/lib/AST/ASTContext.cpp
+1-1clang/include/clang/AST/ASTContext.h
+6-143 files

LLVM/project cccc94allvm/lib/Target/AMDGPU SIInstrInfo.cpp GCNSubtarget.h

[AMDGPU] BlockingCycle feature gated with ST.hasGFX1250VALUBlockingCycles().
DeltaFile
+4-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+1-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-12 files

NetBSD/pkgsrc-wip 3964619ntfy PLIST COMMIT_MSG

ntfy: Add ntfy version 2.28.0.

ntfy is an open source, self-hostable push notification service.

It's written in Go, so the package is relatively straightforward.
The Go build command was copied from their Makefile development target to avoid using goreleaser.
Tested on Debian and FreeBSD.
DeltaFile
+800-0ntfy/distinfo
+267-0ntfy/go-modules.mk
+28-0ntfy/Makefile
+4-0ntfy/DESCR
+3-0ntfy/COMMIT_MSG
+2-0ntfy/PLIST
+1,104-01 files not shown
+1,105-07 files

FreeBSD/ports 9845f5darchivers/py-blosc2 Makefile, devel/py-tables Makefile

sysutils/py-py-cpuinfo: remove in favor of sysutils/py-py-cpuinfo2
DeltaFile
+0-25sysutils/py-py-cpuinfo/Makefile
+0-11sysutils/py-py-cpuinfo/files/patch-cpuinfo_cpuinfo.py
+0-4sysutils/py-py-cpuinfo/pkg-descr
+2-2misc/py-numcodecs/Makefile
+2-2devel/py-tables/Makefile
+2-2archivers/py-blosc2/Makefile
+6-469 files not shown
+19-5715 files

FreeBSD/ports f9a55e2finance/py-ccxt Makefile

finance/py-ccxt: Fix build by relaxing dependency version
DeltaFile
+1-1finance/py-ccxt/Makefile
+1-11 files

NetBSD/pkgsrc-wip ca85d07. Makefile, atkinson-hyperlegible distinfo COMMIT_MSG

atkinson-hyperlegible: Add the original Atkinson Hyperlegible font from 2019.
DeltaFile
+23-0atkinson-hyperlegible/Makefile
+9-0atkinson-hyperlegible/PLIST
+9-0atkinson-hyperlegible/DESCR
+7-0atkinson-hyperlegible/COMMIT_MSG
+5-0atkinson-hyperlegible/distinfo
+1-0Makefile
+54-06 files

FreeBSD/ports 65eae1fsecurity/py-argon2-cffi-bindings Makefile

security/py-argon2-cffi-bindings: unbreak by adding missing USES=cmake:indirect

Reported by:    fallout, local build failures
Approved by:    portmgr (unbreak; blanket)
DeltaFile
+1-1security/py-argon2-cffi-bindings/Makefile
+1-11 files

FreeBSD/ports 08f7bfegraphics/skia124 Makefile

graphics/skia124: Broken on 14

Reported by:    fallout
DeltaFile
+2-0graphics/skia124/Makefile
+2-01 files

FreeBSD/ports 73a7897www/librewolf Makefile distinfo, www/librewolf/files patch-build_gn__processor.py patch-third__party_angle_angle__program__version__id__gn_moz.build

www/librewolf: Update 155.0.1-1 => 156.0-1

Release Notes:
https://www.firefox.com/en-US/firefox/156.0/releasenotes/

- Add LOCAL/vvd to MASTER_SITES - can't direct download distfile.

PR:             298583
Sponsored by:   UNIS Labs (vvd, commit patch)
MFH:            2026Q3

(cherry picked from commit 96a89ac57a45b3f3b52811289bbc104e1999086a)
DeltaFile
+1,257-1,803www/librewolf/files/patch-libwebrtc-generated
+64-46www/librewolf/files/patch-third__party_libwebrtc_build_config_BUILDCONFIG.gn
+10-20www/librewolf/files/patch-third__party_angle_angle__program__version__id__gn_moz.build
+9-9www/librewolf/files/patch-build_gn__processor.py
+3-3www/librewolf/distinfo
+3-2www/librewolf/Makefile
+1,346-1,8836 files

FreeBSD/src 8d58fa9contrib/xz ChangeLog, contrib/xz/src/common my_landlock.h

MFV: xz 5.8.4.

(cherry picked from commit 7ffc4ec4860d01414b493cdf43738878a9ede538)
DeltaFile
+1,488-0contrib/xz/ChangeLog
+172-92contrib/xz/src/liblzma/common/index.c
+76-82contrib/xz/src/xz/xz.1
+49-10contrib/xz/src/liblzma/common/index_decoder.c
+29-12contrib/xz/src/common/my_landlock.h
+20-16contrib/xz/src/liblzma/check/crc32_arm64.h
+1,834-21224 files not shown
+2,016-28730 files

FreeBSD/src 6513d74contrib/xz ChangeLog, contrib/xz/src/common my_landlock.h

MFV: xz 5.8.4.

(cherry picked from commit 7ffc4ec4860d01414b493cdf43738878a9ede538)
DeltaFile
+1,488-0contrib/xz/ChangeLog
+172-92contrib/xz/src/liblzma/common/index.c
+76-82contrib/xz/src/xz/xz.1
+49-10contrib/xz/src/liblzma/common/index_decoder.c
+29-12contrib/xz/src/common/my_landlock.h
+20-16contrib/xz/src/liblzma/check/crc32_arm64.h
+1,834-21224 files not shown
+2,016-28730 files

LLVM/project d30fe31llvm/lib/Target/AMDGPU SIInstrInfo.cpp GCNSubtarget.h

BlockingCycle feature gated with ST.hasGFX1250VALUBlockingCycles().
DeltaFile
+6-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+1-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+7-12 files

LLVM/project 1b2a37allvm/lib/Target/AMDGPU VOPCInstructions.td, llvm/test/CodeGen/AMDGPU coexec-sched-flavor-classification.mir

[AMDGPU] Make VOPC_Pseudo inherit from VOP_Pseudo

GFX1250 blocking-cycle modeling misses _e32 VOPC_Pseudo because the
searchable table filters on VOP_Pseudo. Shrink can emit that encoding
before co-exec, so F64/I64/class compares were treated as 1-cycle VALU.

Side effect of this change is that _e32 VOPC_Pseudo records are also
included in the True16 and DP-MACC tables.
DeltaFile
+46-0llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
+2-14llvm/lib/Target/AMDGPU/VOPCInstructions.td
+48-142 files

LLVM/project e76e114llvm/lib/Target/AMDGPU VOP3PInstructions.td VOPInstructions.td, llvm/test/CodeGen/AMDGPU coexec-sched-flavor-classification.mir

[AMDGPU] Cover missed gfx1250 VALU blocking-cycle opcodes

Annotate gfx12+ F64 add/mul and B64 shift pseudos, F64 class compares,
pseudo-scalar TRANS, integer dots, and DPP. Fix VOPC I64/U64 end-of-block
comments that said 32 instead of 2.
DeltaFile
+92-0llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
+7-4llvm/lib/Target/AMDGPU/VOPCInstructions.td
+5-4llvm/lib/Target/AMDGPU/VOP2Instructions.td
+4-2llvm/lib/Target/AMDGPU/VOP3Instructions.td
+4-0llvm/lib/Target/AMDGPU/VOPInstructions.td
+1-1llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+113-116 files

LLVM/project b7e70bbllvm/lib/Target/AMDGPU VOPCInstructions.td VOPInstructions.td, llvm/test/CodeGen/AMDGPU coexec-sched-flavor-classification.mir

[AMDGPU] Model GFX1250 VALU blocking cycles

Some gfx1250 VALU instructions block the VALU pipe for N cycles, and
the CoExec scheduler must model that occupancy. The existing SchedModel
cannot represent this given current modelling constraints (see #202775).

Attach GFX1250BlockingCycles to the VOP instruction definitions and
emit a searchable table so SIInstrInfo::getBlockingCycles() can report
the occupancy. CoExec uses that to classify multi-cycle VALU and to
account for blocking when computing HWUI cycles.

Authored by Jeffrey Byrnes <jeffrey.byrnes at amd.com>

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+132-6llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
+56-38llvm/lib/Target/AMDGPU/VOP3Instructions.td
+23-16llvm/lib/Target/AMDGPU/VOP1Instructions.td
+19-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+15-0llvm/lib/Target/AMDGPU/VOPInstructions.td
+9-2llvm/lib/Target/AMDGPU/VOPCInstructions.td
+254-623 files not shown
+269-679 files

FreeBSD/ports 96a89acwww/librewolf Makefile distinfo, www/librewolf/files patch-build_gn__processor.py patch-third__party_angle_angle__program__version__id__gn_moz.build

www/librewolf: Update 155.0.1-1 => 156.0-1

Release Notes:
https://www.firefox.com/en-US/firefox/156.0/releasenotes/

- Add LOCAL/vvd to MASTER_SITES - can't direct download distfile.

PR:             298583
Sponsored by:   UNIS Labs (vvd, commit patch)
MFH:            2026Q3
DeltaFile
+1,257-1,803www/librewolf/files/patch-libwebrtc-generated
+64-46www/librewolf/files/patch-third__party_libwebrtc_build_config_BUILDCONFIG.gn
+10-20www/librewolf/files/patch-third__party_angle_angle__program__version__id__gn_moz.build
+9-9www/librewolf/files/patch-build_gn__processor.py
+3-3www/librewolf/distinfo
+3-2www/librewolf/Makefile
+1,346-1,8836 files

LLVM/project af86d78llvm/lib/Target/AMDGPU GCNCreateVOPD.cpp, llvm/test/CodeGen/AMDGPU vopd3-imm-fold.ll bf16.ll

[AMDGPU] Form VOPD3 pairs with pair-local literal moves (#223431)

VOPD3 cannot encode literal operands, but its src0 can read scalar
registers. In this PR, we try to allow to form a pair with one distinct
non-inline constant value by moving that value to a free SGPR. If both
components use the same value, one move serves both, but we reject pairs
that need two different values, since that doesn't buy us anything.
Ffunctions without tracked liveness, and functions optimized for size
are also rejected.

With this change, `GCNCreateVOPD` checks every adjacent pair before it
selects a greedy non-overlapping pair. This lets an infeasible pair fall
through to the overlapping next one. We use one reverse liveness walk to
find an SGPR that is free over each pair-local range. Disjoint selected
pairs can reuse the same SGPR. Each accepted pair adds at most one
`S_MOV_B32` for the one instruction removed by fusion.

The post-RA scheduler uses the same matcher policy, so it will not
cluster a two-value pair that the create pass cannot build.

    [4 lines not shown]
DeltaFile
+383-393llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+326-308llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
+433-0llvm/test/CodeGen/AMDGPU/vopd3-imm-fold.mir
+225-181llvm/test/CodeGen/AMDGPU/bf16.ll
+373-0llvm/test/CodeGen/AMDGPU/vopd3-imm-fold.ll
+201-26llvm/lib/Target/AMDGPU/GCNCreateVOPD.cpp
+1,941-90847 files not shown
+3,280-2,06253 files

LLVM/project 36f2ef2mlir/include/mlir/Dialect/Affine/Analysis AffineAnalysis.h, mlir/lib/Dialect/Affine/Analysis AffineAnalysis.cpp

[MLIR][Affine] Refactor dependence testing to work on relations, not just on operations (#223188)

This change is effectively NFC for all users of affine dependence
analysis in the tree or outside. It performs a minor refactoring of the
API to allow more general usage.

`checkMemrefAccessDependence` takes two `MemRefAccess`es, each wrapping
an operation, so it can only be asked about accesses that already exist.
A transformation deciding whether to make a change has the opposite
question: whether the accesses it is about to create would depend on
each other. Loop fusion is one -- whether the stores of a slice would
still be one-to-one in the loops it is about to be placed under settles
whether their parallelism survives it, and it has to know before it
fuses.

Nothing in the dependence analysis needs the operations. Everything from
the point where the two access relations are in hand -- inverting one,
composing, adding the ordering constraints, testing the result for
emptiness -- is already relation-only. Split that out as

    [12 lines not shown]
DeltaFile
+32-12mlir/lib/Dialect/Affine/Analysis/AffineAnalysis.cpp
+29-0mlir/include/mlir/Dialect/Affine/Analysis/AffineAnalysis.h
+61-122 files

FreeBSD/ports 653a9d0sysutils/fwup distinfo Makefile

sysutils/fwup: Update 1.16.0 => 1.17.1

Changelogs:
https://github.com/fwup-home/fwup/releases/tag/v1.17.0
https://github.com/fwup-home/fwup/releases/tag/v1.17.1

Improve port:
- Switch from USE_GITHUB to prepared by upstream tarball.
- Remove unnecessary dependencies.
- Remove unnecessary GNU_CONFIGURE_MANPREFIX.

PR:             298592
Sponsored by:   UNIS Labs
Co-authored-by: rottlog <rottlogg at proton.me>
DeltaFile
+8-19sysutils/fwup/Makefile
+3-3sysutils/fwup/distinfo
+11-222 files

LLVM/project 3626563llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVOptWInstrs.cpp, llvm/lib/Target/RISCV/GISel RISCVCallLowering.cpp

[RISCV][GISel] Record SExt32 arguments for RISCVOptWInstrs. (#224154)

RISCVOptWinstrs can do a better job if its know what arguments are
already sign extended.

Assisted-by: Claude
DeltaFile
+294-0llvm/test/CodeGen/RISCV/GlobalISel/sextw-removal.ll
+33-0llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
+4-17llvm/test/CodeGen/RISCV/GlobalISel/rv64zbb.ll
+5-7llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+2-4llvm/test/CodeGen/RISCV/GlobalISel/rv64zbkb.ll
+2-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+340-296 files

NetBSD/pkgsrc-wip 664d409. Makefile, mage PLIST DESCR

mage: Add new package for mage version 1.17.2.

This is a pretty simple Go package. Tested on Debian and FreeBSD.
DeltaFile
+14-0mage/Makefile
+5-0mage/distinfo
+5-0mage/COMMIT_MSG
+3-0mage/DESCR
+2-0mage/PLIST
+1-0Makefile
+30-06 files

FreeBSD/ports b7d3db0net/zapret2 Makefile distinfo

net/zapret2: Update 1.0.5.1 => 1.0.5.2

Approved by:            yuri@ (maintainer)
Differential Revision:  https://reviews.freebsd.org/D59750
DeltaFile
+3-3net/zapret2/distinfo
+1-1net/zapret2/Makefile
+4-42 files

FreeBSD/ports 97f922fmultimedia/smelter Makefile distinfo

multimedia/smelter: update 0.3.1 → 0.6.0

(cherry picked from commit 94e3ee3046ddd75fcaabacdf84924cedf0607f1a)
DeltaFile
+61-55multimedia/smelter/distinfo
+32-29multimedia/smelter/Makefile
+93-842 files

LLVM/project 577ab84llvm/lib/Target/AMDGPU SIRegisterInfo.cpp

Merge branch 'users/mssefat/anti-hints-pr3-amdgpu-apply' into users/mssefat/anti-hints-pr4-amdgpu-pre-ra
DeltaFile
+11-8llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+11-81 files

LLVM/project c409adellvm/lib/Target/AMDGPU SIRegisterInfo.cpp

Addressed reveiw
DeltaFile
+11-8llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+11-81 files

LLVM/project 1a87171llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp, mlir/test/Target/LLVMIR openmp-teams.mlir

[OpenMPIRBuilder] Use generic pointers for outlined teams arguments (#222176)

createFakeIntVal models the thread and bound id arguments of the
function
outlined for a teams region as allocas. When the target's alloca address
space is not zero these were passed on as-is, so the outlined function
took
addrspace(5) pointers while __kmpc_fork_teams calls it with generic
ones.

Cast the alloca to address space zero when it is passed as a pointer,
which
only affects targets with a non-zero alloca address space such as
AMDGPU.
DeltaFile
+26-0mlir/test/Target/LLVMIR/openmp-teams.mlir
+7-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+33-02 files

FreeBSD/ports 33d6bd6graphics/filament Makefile distinfo, graphics/filament/files patch-filament_backend_src_PlatformFactory.cpp

graphics/filament: update 1.74.1 → 1.77.0

ChangeLog: https://github.com/google/filament/releases/tag/v1.77.0
DeltaFile
+47-8graphics/filament/files/patch-filament_backend_src_PlatformFactory.cpp
+6-3graphics/filament/pkg-plist
+3-3graphics/filament/distinfo
+1-1graphics/filament/Makefile
+57-154 files

FreeBSD/ports 0185429. MOVED, misc Makefile

misc/py-python-pygtrie: move to misc/py-pygtrie; update 2.5.0 → 2.6.2
DeltaFile
+24-0misc/py-pygtrie/Makefile
+4-0misc/py-pygtrie/pkg-descr
+3-0misc/py-pygtrie/distinfo
+1-1misc/Makefile
+1-0MOVED
+33-15 files

FreeBSD/ports b64544bmath/gap distinfo Makefile, math/gap/files patch-pkg-simpcomp-configure

math/gap: update 4.14.0 → 4.16.1

30+ port options were added for all compiled packages.
This is in addition to non-compiled packages that come with
the base GAP.

ChangeLog: https://github.com/gap-system/gap/blob/v4.16.1/CHANGES.md
DeltaFile
+22,697-10,125math/gap/pkg-plist
+108-11math/gap/Makefile
+10-8math/gap/files/patch-pkg-simpcomp-configure
+3-3math/gap/distinfo
+22,818-10,1474 files

OpenBSD/src Js3gV38usr.sbin/rtrctl rtrctl.8

   availale -> available
VersionDeltaFile
1.2+3-3usr.sbin/rtrctl/rtrctl.8
+3-31 files