fusefs: fix a deadlock caused by daemons that never initialize
If a daemon never responds to FUSE_INIT, but some process attempts to
access the mountpoint, and a different process (possibly the daemon
itself) attempts to unmount, a deadlock would result.
Fix this bug by blocking any thread that enters fuse_vfsop_root until
the daemon responds to FUSE_INIT or it times out. That will block any
thread attempting to lookup a path in the fuse mountpoint, before it
even gets to fuse VOPs. Remove less thorough initialization checks in
fuse_ticket_fetch and fuse_vnop_access that are no longer necessary.
And add a test case.
PR: 287431
Sponsored by: ConnectWise
Reviewed by: js
Differential Revision: https://reviews.freebsd.org/D59737
(cherry picked from commit 0bd6348b52e1991fafc55128173c989dab36dfd9)
[AMDGPU] Remove redundant V_PK_FMAC_F16_e32_vi. NFCI. (#231972)
V_PK_FMAC_F16_e32_vi was added for gfx908 before there were any GFX9
specific reals for V_PK_FMAC_F16. #144782 added VOP2_Real_e32e64_gfx9 for
it, which includes V_PK_FMAC_F16_e32_gfx9 with the same encoding, making
the VI real redundant. FeaturePkFmacF16Inst is not available on any GFX8
target, so the VI real was only ever usable on GFX9, where the asm matcher
had two identical matches for the e32 form.
Codegen already uses V_PK_FMAC_F16_e32_gfx9 on GFX9, and the disassembler
now decodes the e32 form from the GFX9 table instead of the GFX8 table,
with no change to the printed text.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Add context_params to iscsi_scsi_connect()
Pass an optional context_params dict through to python-scsi's
init_device(), so a test can set pre-login iscsi.Context options such
as an explicit ISID. context_params_supported() lets callers skip when
the installed python-scsi predates it.
Also ruff.
Add middleware support for LIO ALUA HA
Wire up the middleware side of LIO ALUA high-availability: load
lio_ha.ko with per-node addresses on service start, manage ALUA
state across failover events, clean up STANDBY configfs on pool
export, and add pre-flight validation that targets have static
initiator ACLs before ALUA can be enabled.
For each target, create a portal-less phantom TPG carrying the peer
node's controller group so that a single RTPG response from any
connected port lists both ALUA groups. Write tpgt_N/rtpi explicitly
before enable so that relative target port IDs in RTPG match the
tag formula (portal.tag on Node A, portal.tag + 32000 on Node B)
rather than being auto-assigned sequentially by the kernel.
ALUA group states are driven by role and ha_state:
MASTER + synced local=OPTIMIZED remote=NONOPTIMIZED
MASTER + connected local=OPTIMIZED remote=TRANSITIONING
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[flang][OpenMP] Diagnose array element references to UDR special variables (#231559)
In OpenMP 6.0, user-defined reduction combiners and initializers are
treated as elemental, so omp_in, omp_out, omp_priv and omp_orig are
scalars, and any selectors in their designators must be component
selectors.
These special variables were declared as entities with unknown details
and a reference like omp_out(1) made them be treated as implicit
external functions.
Also, OmpInVar|OmpOutVar|OmpPrivVar|OmpOrigVar flags were never set
because the symbol lookup was done in the wrong scope.
Convert the special variables to object entities when they are declared,
set the flags on the declared symbols and treat a parenthesized
reference to a flagged scalar as an array element, so that the same
"'omp_out' is not an array" error is reported as for array sections.
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[flang][OpenMP] Rank metadirective candidates once
When a runtime guard fails, Flang reranks the remaining METADIRECTIVE
candidates. A selector that was a strict subset of the failed candidate
then gets its raw score back and can overtake a better static candidate.
With vendor(score(100): llvm) for TASKYIELD, vendor(score(1): llvm) plus
condition(score(20): flag) for BARRIER, and condition(score(10): .true.)
for TASKWAIT, a false flag selects TASKYIELD instead of TASKWAIT.
This patch ranks the candidates once against the complete set and keeps
that order on every runtime path. It also scores an implicit NOTHING like
an explicit replacement, so explicitness only breaks ties. Under
match_none, the guarded candidate now carries a false condition instead
of an unknown one, since that's the outcome it's selected on. Construct
selectors now recognize construct={simd}.
Split from #224431.
Assisted-by: GitHub Copilot (Claude Opus 5.5)
[Option] Support aliases of library options
A library option that is renamed can keep its old spelling as an alias
that sets the same member, using the existing Alias<> and AliasArgs<>
of OptParser.td, as AArch64Options.td already does for
-aarch64-stack-hazard-size. Renames that dropped the old spelling (for
example the "disable-" to positive ones) can use it to stay source
compatible.
Three things did not work and are fixed:
* A Flag alias with AliasArgs, the only form that can flip a bool
(-disable-foo as -foo=false) or supply a value, was never listed by
LibraryOptionsParser::forEachOption, so cl:: reported it as an unknown
argument and did not check its name for duplicates.
* The emitter rejected an alias of an option with a Condition. An alias
now takes its target's Condition and is built where the target is.
* An alias of a different kind than its target was accepted and read a
missing value. The emitter now requires the target's kind (or a Flag
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[CIR] Reject language address spaces in DirectToLLVM pointer conversion
Reject unlowered language address spaces in pointer types when bypassing TargetLowering. Guard pointer-producing lowerings, including generated patterns, so failed conversions report legalization failures instead of silently selecting address space zero or constructing invalid LLVM operations.
Assisted-by: Codex / GPT-6
[CIR] Propagate initializer type adjustment failures
Reject initializers whose active members have no LLVM representation, including when an enclosing union's storage type is convertible. Propagate recursive adjustment failures before querying data layout or constructing LLVM operations.
Assisted-by: Codex / GPT-6
[CIR] Propagate type conversion failures in DirectToLLVM
Propagate failed type and constant conversions through DirectToLLVM so unsupported types produce legalization failures instead of invalid LLVM operations or a void function result.
Assisted-by: Codex / GPT-6
Targets: Use none_of instead of not in AssemblerPredicate conditions
Negate features in AssemblerPredicate conditions using the new none_of
instead of not.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Pull up following revision(s) (requested by kre in ticket #531):
lib/libc/stdio/vfwprintf.c: revision 1.42,1.43
PR lib/60708 - include 'F' format when fetching %n$ args.
PR bin/60496 - fix printf(3) with non-single-byte decimal point & thousands sep
These fixes are relatively simple, and should be safe -- I have had them
in my source tree for ages now.
The fix for the decimal point case is taken more or less directly from
an old FreeBSD fix for the same issue.
The thousands separator case is different - our code and FreeBSD's have
diverged so much in this area that simply using their method would have
been more trouble than it was worth, so I reimplemented it differently
to better fit our code model.
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[MLIR][XeGPU] Rename Xe3 uArch to Xe3p and add 2D block memory restrictions (#229936)
The uArch header named after Xe3 actually describes Xe3p: plain Xe3
exposes no XeGPU-relevant differences over Xe2, while CRI (Crescent
Island) is an Xe3p part. Rename IntelGpuXe3.h to IntelGpuXe3p.h along
with the `Xe3` class and the `Xe3_First`/`Xe3_Last` uArch kinds, and
record in the file comment why there is no separate Xe3 header. The only
functional difference between the Xe2 and Xe3p instruction sets remains
the scaled DPAS (MXFP) extension.
The subgroup 2D block load/store/prefetch instructions carried no
description of the restrictions on the 2D memory region they access. Add
`BlockIOMemoryRestrictions`. The load, store and prefetch instructions
of a given architecture all share the same restrictions, so this is a
property of the uArch rather than of an individual instruction: `uArch`
exposes it through `getBlockIOMemoryRestrictions()`, next to
`getSubgroupSize()` and `getGeneralPackedFormatBitSize()`. None of these
limits are common across architectures, so uArchBase.h defines only the
layout and each uArch supplies the values. Xe2 requires a 64 byte
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[mlir][Vector] Promote buffers accessed via dynamic subviews (#217793)
**Motivation**
An op on dynamically-shaped tensors is padded to static tile sizes
before vectorization: its operands are padded up to a fixed size, and
the real region is extracted back from the result. After bufferization
those padded tensors become fixed-size buffers, and the IR around them
reaches each buffer through dynamic-shaped views — the buffer's shape is
static, but the part that really holds data is not.
The pattern looks like this: a fixed-size staging buffer holding one
tile, a dynamic subview covering the part with real data, a reshape
lifting that tile to the rank of the original tensor it came from, and a
memref.copy that stores the tile back into it or loads a tile out.
```mlir
%buf = memref.alloca() : memref<128x64xf16> // padded staging buffer
vector.transfer_write %v, %buf[%c0, %c0] {in_bounds = [true, true]}
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[DWARFLinker] Unique unnamed types by their contents (#231980)
An anonymous type is identified by its declaration file and line, but
several can be declared on one line, for example by a macro. The
parallel linker merged all of them into a single DIE. The classic linker
also considered the byte size, which got this right, but only for types
that had different sizes.
Make unnamed classes, structs, unions and enums consider their data
members, bases and enumerators, in addition to their declaration. As a
side effect, this also separates lambdas in function template
instantiations that capture different types, which the parallel linker
merged too.
rdar://189405402
HBSD: Various fixups in libthr
HardenedBSD has diverged ever so slightly in the threading library. This
caused a world build issue after recent changes by FreeBSD.
Signed-off-by: Shawn Webb <shawn.webb at hardenedbsd.org>
MFC-to: 15-STABLE
X-MFC-with: 5fb07bbcd5d5d9a865d9e7765fb93e9ba5edef1c
