HardenedBSD/ports e6e4889 — audio/piper/files patch-CMakeLists.txt patch-libpiper_CMakeLists.txt, graphics/linux-slang pkg-plist

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+245-233textproc/feluda/distinfo
+243-31x11/kitty/pkg-plist
+121-115textproc/feluda/Makefile.crates
+198-0audio/piper/files/patch-libpiper_CMakeLists.txt
+0-139audio/piper/files/patch-CMakeLists.txt
+95-0graphics/linux-slang/pkg-plist
+902-51887 files not shown
+1,473-82393 files

LLVM/project 51ccdfe — libcxx/test/benchmarks/containers string.bench.cpp

[libc++] Add benchmark for string::pop_back() (#223729)
DeltaFile
+27-0libcxx/test/benchmarks/containers/string.bench.cpp
+27-01 files

FreeNAS/freenas 0ff3a65 — src/middlewared/middlewared/plugins smb.py, src/middlewared/middlewared/plugins/security config.py

Mirror SMB local account state to HA standby

passdb.tdb, the SMB account policy stored inside it, and group_mapping.tdb are
node-local derived state. Account changes made on the active controller updated
them only there, so the standby carried a stale copy until its next boot or
takeover.

A normal failover reconciles this on its own: cifs is a dependent service, so
directoryservices.setup runs smb.configure before restarting it and no client
is ever authenticated against the stale copy. The window before that completes
is still visible to an administrator, though. Samba tools run on the new active
node as soon as it comes up report the pre-failover accounts, account policy
and group mappings, which is needlessly confusing.

Add smb.synchronize_local_accounts, a single job that reconciles all three
against the configuration database, and route the existing hand-rolled
orchestration through it:

  - smb.configure replaces apply_account_policy + synchronize_passdb +

    [16 lines not shown]
DeltaFile
+69-10src/middlewared/middlewared/plugins/smb.py
+4-1src/middlewared/middlewared/plugins/security/config.py
+2-0src/middlewared/middlewared/plugins/smb_/passdb.py
+2-0src/middlewared/middlewared/plugins/smb_/groupmap.py
+77-114 files

LLVM/project 9dcb429 — lldb/test/API/python_api/value TestValueAPI.py

[lldb][test] Skip the sp/rsp check in register sets that have no rsp (#226176)

The test asserts the ABI name `"sp"` resolves to `"rsp"` within the same
register set. However, on Windows the architectural 16-bit `"sp"` lives
in `"supplementary registers"` while `"rsp"` is in `"General Purpose
Registers"`, so there is nothing to compare against.


https://learn.microsoft.com/en-us/windows-hardware/drivers/debugger/x64-architecture

This fixes `python_api/value/TestValueAPI.py` (`test_register`) on
Windows in swiftlang.
DeltaFile
+7-0lldb/test/API/python_api/value/TestValueAPI.py
+7-01 files

LLVM/project 9214c04 — clang/lib/CodeGen CGLoopInfo.cpp, clang/test/CodeGen align-loops.c

clang: Emit llvm.loop.align metadata for -falign-loops (#223147)
DeltaFile
+31-6clang/test/CodeGen/align-loops.c
+4-0clang/lib/CodeGen/CGLoopInfo.cpp
+35-62 files

LLVM/project 92388ee — llvm/test/CodeGen/ARM bitinsert-bitextract.ll, llvm/test/CodeGen/RISCV bitinsert-bitextract-fp.ll bitinsert-bitextract.ll

Rebase

Created using spr 1.3.7
DeltaFile
+6,086-6,026llvm/test/CodeGen/RISCV/rvv/expandload.ll
+3,913-3,252llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
+3,098-2,506llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
+4,294-0llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
+3,321-0llvm/test/CodeGen/ARM/bitinsert-bitextract.ll
+1,989-0llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
+22,701-11,7842,507 files not shown
+107,075-45,4712,513 files

FreeNAS/freenas 7d77e96 — src/middlewared/middlewared main.py, src/middlewared/middlewared/plugins/crypto_ renew_certs.py

NAS-144052 / 26.0.0-RC.1 / Only use `create_task` from main loop

`loop.create_task` is not thread-safe

Original PR: https://github.com/truenas/middleware/pull/19865

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+7-8src/middlewared/middlewared/plugins/failover_/event.py
+6-0src/middlewared/middlewared/main.py
+1-1src/middlewared/middlewared/plugins/crypto_/renew_certs.py
+14-93 files

FreeNAS/freenas 1cef953 — src/middlewared/middlewared/test/integration/assets s3.py

NAS-144064 / 26.0.0-RC.1 / Backport S3 assets (#19874)
DeltaFile
+252-0src/middlewared/middlewared/test/integration/assets/s3.py
+252-01 files

LLVM/project 4cbd65a — llvm/lib/Transforms/Vectorize/SLPVectorizer SLPUtils.h

Address comments

Created using spr 1.3.7
DeltaFile
+3-1llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
+3-11 files

FreeNAS/freenas 6152139 — src/middlewared/middlewared/test/integration/assets s3.py

Backport S3 assets
DeltaFile
+252-0src/middlewared/middlewared/test/integration/assets/s3.py
+252-01 files

LLVM/project 79659c7 — clang/include/clang/Basic Builtins.td

Remove the comment on the InterlockedCompareExchangeFloatBitwise builtin
DeltaFile
+0-1clang/include/clang/Basic/Builtins.td
+0-11 files

LLVM/project 5e9f823 — clang/lib/Sema SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl InterlockedCompareStoreFloatBitwise.hlsl

First attempt implementing InterlockedCompareStoreFloatBitwise



DeltaFile
+100-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareStoreFloatBitwise-errors.hlsl
+39-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStoreFloatBitwise-sm60.hlsl
+35-0clang/test/CodeGenHLSL/builtins/InterlockedCompareStoreFloatBitwise.hlsl
+30-0llvm/test/CodeGen/DirectX/ResourceAtomicCompareStoreFloat.ll
+27-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
+16-6clang/lib/Sema/SemaHLSL.cpp
+247-66 files not shown
+311-1012 files

LLVM/project ea6d1ac — clang/include/clang/Basic Builtins.td

Remove the comment on the InterlockedCompareStoreFloatBitwise builtin
DeltaFile
+0-1clang/include/clang/Basic/Builtins.td
+0-11 files

LLVM/project 7d15b3d — clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add InterlockedCompareExchangeFloatBitwise coverage to the texture test
DeltaFile
+5-0clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+5-01 files

LLVM/project a937210 — clang/test/CodeGenHLSL/builtins RWBuffer-Interlocked.hlsl RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl, clang/test/SemaHLSL/BuiltIns ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl InterlockedCompareExchangeFloatBitwise-errors.hlsl

First attempt implementing InterlockedCompareExchangeFloatBitwise



DeltaFile
+119-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchangeFloatBitwise-errors.hlsl
+43-0clang/test/CodeGenHLSL/builtins/InterlockedCompareExchangeFloatBitwise.hlsl
+42-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl
+32-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
+25-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
+10-0clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
+271-05 files not shown
+298-311 files

LLVM/project 1a222f7 — clang/test/CodeGenHLSL/builtins RWTexture-Interlocked.hlsl

Add InterlockedCompareStoreFloatBitwise coverage to the texture test
DeltaFile
+7-0clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
+7-01 files

LLVM/project 4f764f7 — clang/test/CodeGenHLSL/builtins RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl InterlockedCompareExchange.hlsl

address joao, merge identical check lines and explain the ROV method body
DeltaFile
+4-8clang/test/CodeGenHLSL/builtins/InterlockedCompareExchange.hlsl
+5-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl
+9-82 files

LLVM/project 0ae27ad — llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AArch64 sve-ldst.ll masked_ldst.ll

Revert "[AArch64][CostModel] Consider some nxv1 operations as legal" (#226531)

Reverts llvm/llvm-project#214471

This caused a failure in
https://lab.llvm.org/buildbot/#/builders/198/builds/15417 and I want to
spend a bit more time to test the ISel for vector_reverse and
vector_splice. It's also quite surprising that the test picked a VF of
`vscale x 1`
DeltaFile
+41-22llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
+9-48llvm/test/CodeGen/AArch64/sve-int-arith.ll
+20-31llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+4-4llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
+3-3llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
+6-0llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
+83-1084 files not shown
+89-11410 files

LLVM/project d220d5e — clang/include/clang/Interpreter Interpreter.h, clang/lib/Interpreter Interpreter.cpp

[clang-repl] Initialized HIP environment for clang-repl (#217582)

This PR initializes the HIP environment for clang-repl. Since an
IncrementalHipDeviceParser does not exist yet, a message is printed
after the environment setup indicating that the HIP environment was set
up but is not yet supported.

It also adds a test file that runs clang-repl with the -hip option and
checks that this message is printed. Once the parser is built, the
current test file will be removed and replaced with tests that verify
the complete flow.

This PR has a prerequisite, #217228, which skips emitting the
`__hip_cuid_` global under incremental extensions. Without it,
clang-repl's HIP mode would emit the same symbol in every incremental
module and fail at JIT link with a duplicate-symbol error.

Assisted by Claude Opus 4.8
DeltaFile
+45-20clang/tools/clang-repl/ClangRepl.cpp
+35-22clang/lib/Interpreter/Interpreter.cpp
+53-1clang/test/lit.cfg.py
+32-7clang/include/clang/Interpreter/Interpreter.h
+11-0clang/test/Interpreter/HIP/hip-environment.hip
+2-0clang/test/Interpreter/HIP/lit.local.cfg
+178-506 files

LLVM/project 53afbe1 — llvm/lib/Transforms/Utils VNCoercion.cpp, llvm/test/Transforms/GVN byte-conversion.ll

[GVN] Don't coerce forwarded byte values through integers

When GVN forwards a store to a load of a different type, it goes through an
integer. It casts the stored value to `iN`, then shifts and truncates it. For
byte values that cast is wrong. It drops pointer provenance, and a single
poison bit makes the whole result poison.

Byte stores, and pointer stores that feed byte loads, no longer go through an
integer. GVN bitcasts the stored value to `bN`, takes the loaded bits with
`bitextract`, and bitcasts the result to the load type. Byte vector stores
take the same path.
DeltaFile
+57-112llvm/test/Transforms/GVN/byte-conversion.ll
+20-6llvm/lib/Transforms/Utils/VNCoercion.cpp
+77-1182 files

LLVM/project 8c510a5 — llvm/test/Transforms/GVN byte-conversion.ll

[GVN] Pre-commit tests for byte conversions
DeltaFile
+469-0llvm/test/Transforms/GVN/byte-conversion.ll
+469-01 files

LLVM/project 3bcbae4 — lldb/include/lldb/Target DynamicRegisterInfo.h, lldb/source/Target DynamicRegisterInfo.cpp

[lldb] Introduce DynamicRegisterInfo::RegisterSetWithStorage (#225555)

The RegisterSet struct is created in 2 different ways:
1.) Statically in headers/source files for register sets that are known
    ahead of time.
2.) Dynamically according to input from outside of LLDB. Usually this is
through the gdb-remote stub, but may also come from a python script or
    by determining an ISA variant's features (e.g. in RISCV).

This PR aims to address the lifetime of strings in RegisterSet. In
scenario (1), the lifetime of all data in a RegisterSet is static and
there is no concern about dangling pointers. However, in scenario (2),
DynamicRegisterInfo maintains a vector of RegisterSets. Until now, it
has relied on ConstString to persist the storage for the strings
indefinitely. As part of my quest to remove ConstString, I am
introducing a new struct wrapping RegisterSet that is responsible for
the storage and lifetime of the underlying RegisterSet strings.
DeltaFile
+34-1lldb/include/lldb/Target/DynamicRegisterInfo.h
+10-11lldb/source/Target/DynamicRegisterInfo.cpp
+44-122 files

LLVM/project 05f0bf0 — llvm/lib/Target/Mips MipsSubtarget.cpp MipsSubtarget.h

Mips: Remove redundant Triple copy from the subtarget (#226528)

MCSubtargetInfo already stores the target triple, so MipsSubtarget's own
copy is unnecessary.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+3-5llvm/lib/Target/Mips/MipsSubtarget.h
+1-1llvm/lib/Target/Mips/MipsSubtarget.cpp
+4-62 files

NetBSD/pkgsrc OshfPWW — graphics/shader-slang/patches patch-source_core_slang-platform.cpp

   shader-slang: fixed shared lib bug on Darwin
VersionDeltaFile
1.1+20-0graphics/shader-slang/patches/patch-source_core_slang-platform.cpp
+20-01 files

LLVM/project 363b079 — llvm/lib/Transforms/Utils SCCPSolver.cpp, llvm/test/Transforms/SCCP freeze-struct.ll

[SCCP] Support structure in freeze
DeltaFile
+125-0llvm/test/Transforms/SCCP/freeze-struct.ll
+16-15llvm/lib/Transforms/Utils/SCCPSolver.cpp
+141-152 files

pkgng/pkgng b68d62c — tests/frontend clean.sh

test: give up on macos
DeltaFile
+1-0tests/frontend/clean.sh
+1-01 files

pkgng/pkgng df4d44d — libpkg pkg_jobs_universe.c

universe: plug a leak when a dependency is up to date
DeltaFile
+4-1libpkg/pkg_jobs_universe.c
+4-11 files

LLVM/project 092ff97 — llvm/docs/GlobalISel IRTranslator.md, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

[GlobalISel] Translate byte to ptr bitcasts to `G_INTTOPTR`/`G_PTRTOINT`
DeltaFile
+137-3llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
+16-10llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+6-4llvm/docs/GlobalISel/IRTranslator.md
+159-173 files

LLVM/project d3efda8 — llvm/lib/IR IRBuilder.cpp, llvm/test/CodeGen/AMDGPU promote-alloca-byte-ptr-cast.ll

Revert "[IRBuilder] Handle byte types in CreateBitPreservingCastChain (#209557)"
DeltaFile
+0-49llvm/test/CodeGen/AMDGPU/promote-alloca-byte-ptr-cast.ll
+0-18llvm/unittests/IR/IRBuilderTest.cpp
+2-6llvm/lib/IR/IRBuilder.cpp
+2-733 files

FreeBSD/src 287d60a — sys/compat/linux linux_netlink.c

compat/linux: Fix IFLA_IFNAME translation for multi-message netlink

nlmsg_translate_ifname_nla() always used nw->ifp for the name,
which is fine for a single-message ifnet event, but an RTM_GETLINK
dump holds one RTM_NEWLINK per interface and is translated with
the ifp the writer had when the buffer was flushed.

The root of the problem is that msgs_to_linux() takes a single
ifp for a buffer that may contain messages about many interfaces.

Use ifi_index to resolve the name instead.

Reviewed by:    glebius
Differential Revision:  https://reviews.freebsd.org/D59595
DeltaFile
+8-5sys/compat/linux/linux_netlink.c
+8-51 files