LLVM/project ce328d3llvm/lib/Target/X86 X86InstrSSE.td

[X86] Remove duplicate X86ISD::VPERM2X128 v32i8 patterns. NFC. (#219498)
DeltaFile
+0-3llvm/lib/Target/X86/X86InstrSSE.td
+0-31 files

LLVM/project 6d275e9llvm/lib/Target/RISCV RISCVVLOptimizer.cpp

RISCV: Pass instruction and operand index to getMinimumVLForUser

getMinimumVLForUser and getMinimumVLForVSLIDEDOWN_VX recovered the instruction
and operand index from the operand's parent. Take the instruction and operand
index directly so they no longer depend on MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+12-11llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+12-111 files

LLVM/project 209c6d0llvm/lib/CodeGen VirtRegMap.cpp

VirtRegMap: Pass instruction and operand to readsUndefSubreg (#219485)

The helper recovered the instruction from the operand's parent to look
up its slot index. Pass the containing instruction and the operand directly so
it no longer depends on MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+7-6llvm/lib/CodeGen/VirtRegMap.cpp
+7-61 files

NetBSD/src m0lKEp1sys/compat/netbsd32 netbsd32_ptrace.c

   netbsd32_ptrace: Fix locking around ptrace register access.

   PR kern/60658: netbsd32_process_read_dbregs() needs the same fix as
   native amd64 process_read_dbregs()
VersionDeltaFile
1.10+140-70sys/compat/netbsd32/netbsd32_ptrace.c
+140-701 files

FreeBSD/src 1853976lib/libutil mntopts.c, sbin/mount_nullfs mount_nullfs.c mount_nullfs.8

nullfs: Allow VSOCK to be mounted on top of another VSOCK

In the world of containers, mounting a unix(4) socket is a common
practice to allow communication between processes within containers.
For example, both Podman and Docker can expose a unix(4) socket,
and that same unix(4) socket can be mounted as a file accessible
to a process inside a container, allowing that application to control
Podman or Docker. Another example is PHP-FPM with NGINX, where,
instead of using TCP/IP for communication between containers, a
unix(4) socket is sufficient.

However, nullfs(4) and all related components do not allow mounting
a VSOCK on top of another. The current workaround involves creating
the socket in a directory and mounting that directory. This is an
option, though it does not provide a good user experience compared
to directly mounting a VSOCK on top of another, since the application
that creates the socket may create other sockets in that directory,
and the user may not wish to share them, or, worse yet, applications
that create unix(4) sockets may not provide any authentication at

    [9 lines not shown]
DeltaFile
+3-3sys/kern/vfs_mount.c
+3-3sys/kern/vfs_cache.c
+3-3sbin/mount_nullfs/mount_nullfs.c
+4-2sbin/mount_nullfs/mount_nullfs.8
+1-1sys/fs/nullfs/null_vfsops.c
+1-1lib/libutil/mntopts.c
+15-136 files

LLVM/project 4f10a5ellvm/lib/Target/AArch64 AArch64LoadStoreOptimizer.cpp

AArch64: Pass instruction and operand to load/store rename helpers (#219471)

isRewritableImplicitDef and canRenameMOP only used the operand to
recover its parent instruction. Pass the containing instruction and the operand
directly so they no longer depend on MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+11-10llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+11-101 files

LLVM/project 90b51dfllvm/lib/Target/WebAssembly WebAssemblyMCInstLower.h WebAssemblyMCInstLower.cpp

WebAssembly: Take GlobalValue and DebugLoc in GetGlobalAddressSymbol (#219461)

GetGlobalAddressSymbol only needed the IR GlobalValue from the operand
and the instruction's DebugLoc for a diagnostic. Directly pass these
instead of depending on looking at the MachineOperand's parent to find the
instruction and function.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+12-17llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
+4-1llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.h
+16-182 files

LLVM/project a828ab6llvm/lib/Target/RISCV RISCVVLOptimizer.cpp

RISCV: Pass instruction and operand index to VL optimizer operand info

getOperandInfo, getOperandLog2EEW and getIntegerExtensionOperandEEW recovered
the instruction and operand index from the operand's parent. Take the
instruction and operand index directly so they no longer depend on
MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+27-27llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+27-271 files

FreeNAS/freenas 5da6b5dsrc/middlewared/middlewared/plugins/api_key crud.py

Clarify comment
DeltaFile
+2-2src/middlewared/middlewared/plugins/api_key/crud.py
+2-21 files

FreeNAS/freenas dc3b8fasrc/middlewared/middlewared/api/v27_0_0 iscsi_global.py

Allow iSCSI mode=2
DeltaFile
+1-1src/middlewared/middlewared/api/v27_0_0/iscsi_global.py
+1-11 files

FreeNAS/freenas c5873bfsrc/middlewared/middlewared/plugins/iscsi_ alua.py extents.py, src/middlewared/middlewared/utils/lio config.py

Add middleware support for LIO ALUA HA

Wire up the middleware side of LIO ALUA high-availability: load
lio_ha.ko with per-node addresses on service start, manage ALUA
state across failover events, clean up STANDBY configfs on pool
export, and add pre-flight validation that targets have static
initiator ACLs before ALUA can be enabled.

For each target, create a portal-less phantom TPG carrying the peer
node's controller group so that a single RTPG response from any
connected port lists both ALUA groups.  Write tpgt_N/rtpi explicitly
before enable so that relative target port IDs in RTPG match the
tag formula (portal.tag on Node A, portal.tag + 32000 on Node B)
rather than being auto-assigned sequentially by the kernel.

ALUA group states are driven by role and ha_state:

  MASTER  + synced        local=OPTIMIZED     remote=NONOPTIMIZED
  MASTER  + connected     local=OPTIMIZED     remote=TRANSITIONING

    [4 lines not shown]
DeltaFile
+518-132src/middlewared/middlewared/utils/lio/config.py
+214-2src/middlewared/middlewared/plugins/iscsi_/lio.py
+87-71src/middlewared/middlewared/plugins/iscsi_/fs_attachment_delegate.py
+89-58src/middlewared/middlewared/plugins/iscsi_/target_to_extent.py
+59-47src/middlewared/middlewared/plugins/iscsi_/extents.py
+62-9src/middlewared/middlewared/plugins/iscsi_/alua.py
+1,029-3198 files not shown
+1,213-36814 files

FreeBSD/ports 1a7777aMk/Scripts checksum.sh

Mk/Scripts/checksum.sh: show expected/fetched checksum and size

Print expected and fetched checksums and file size on mismatch to help
debug builder-only failures.

PR:             294170
Differential Revision:  https://reviews.freebsd.org/D58891
DeltaFile
+3-0Mk/Scripts/checksum.sh
+3-01 files

FreeBSD/ports 7ca58c8Keywords ldconfig32.ucl ldconfig.ucl, Mk bsd.port.mk

ldconfig: Add rootdir support and handle INSTALL_AS_USER

PR:             296409
Reviewed by:    jlduran
Exp-run by:     antoine
Differential Revision:  https://reviews.freebsd.org/D58888
DeltaFile
+14-10Keywords/ldconfig.ucl
+20-0Keywords/ldconfig32.ucl
+5-2Mk/bsd.port.mk
+39-123 files

OpenBSD/ports ysY0H0qproductivity/libphonenumber Makefile distinfo

   Update to libphonenumber-9.0.38.
VersionDeltaFile
1.95+2-2productivity/libphonenumber/distinfo
1.106+1-1productivity/libphonenumber/Makefile
+3-32 files

FreeNAS/freenas 1c50512src/middlewared/middlewared/api/v27_0_0 api_key.py, src/middlewared/middlewared/plugins/account_ privilege.py

Check API key user roles through privilege API

Directory services cache entries are not authoritative for privilege
determination. They carry no group membership, because populating it
while enumerating the domain would require a group lookup per account
and overload the domain controller, so user.query reports an empty
roles list for every directory services account. api_key.create read
that list and rejected every directory services user.

Add privilege.roles_for_user(), which goes directly through NSS and
evaluates the account's group membership the same way authentication
does, and use it in do_create().

That makes two gaps in extend() reachable. A directory services account
with no SID (plain LDAP) is stored by its synthesized user.query id,
which never matched the local-only by_id map, so the key read back as
revoked with "User does not exist" and was dropped from the PAM
configuration. Resolve those ids through user.get_user_obj() instead,
memoizing the lookup the way the SID branch already does.

    [5 lines not shown]
DeltaFile
+32-0tests/directory_services/test_directory_services_basic.py
+31-0src/middlewared/middlewared/plugins/account_/privilege.py
+24-2src/middlewared/middlewared/plugins/api_key/crud.py
+3-1src/middlewared/middlewared/api/v27_0_0/api_key.py
+90-34 files

FreeBSD/ports df49b38security/libgcrypt Makefile

security/libgcrypt: Bump PORTREVISION
DeltaFile
+1-0security/libgcrypt/Makefile
+1-01 files

FreeBSD/ports e8a73f0security/libgcrypt Makefile

security/libgcrypt: Remove AVX512 support for FreeBSD 14 and 15

LLVM19 as shipped with FreeBSD 14 and 15 is incompete. Disable it by
default. Users who want AVX512 on FreeBSD < 16 must install LLVM20 or
newer and select the AVX512 option.

FreeBSD 16-CURRENT has LLVM21, with complete support for AVX512. Setting
the AVX512 option on 16-CURRENT is a NOP.

PR:             297987
DeltaFile
+14-2security/libgcrypt/Makefile
+14-21 files

LLVM/project d32409fclang/test/CIR/CodeGenOpenACC declare-deviceresident.cpp declare-create.cpp

[CIR] Drop call-conv-lowering opt-out from OpenACC declare tests (#219057)

The six OpenACC declare tests opted out of CallConvLowering because the
pass did not handle parameters of an empty or tag class.
CallConvLowering handles them now, so they can run the pass and pin what
it produces.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+10-18clang/test/CIR/CodeGenOpenACC/declare-copyout.cpp
+10-18clang/test/CIR/CodeGenOpenACC/declare-copy.cpp
+8-16clang/test/CIR/CodeGenOpenACC/declare-present.cpp
+7-15clang/test/CIR/CodeGenOpenACC/declare-deviceresident.cpp
+7-15clang/test/CIR/CodeGenOpenACC/declare-create.cpp
+7-15clang/test/CIR/CodeGenOpenACC/declare-copyin.cpp
+49-976 files

LLVM/project c37df50llvm/lib/Target/AMDGPU VOP3PInstructions.td, llvm/test/CodeGen/AMDGPU machine-cse-commute-target-flags.mir

[AMDGPU] Mark V_PK_MOV_B32 as not commutable (#217719)

Its result halves are positional (dst.lo from src0, dst.hi from src1),
so MachineCSE commuting the operands and CSE'ing the result silently
swaps the halves, miscompiling the code
DeltaFile
+60-0llvm/test/CodeGen/AMDGPU/machine-cse-commute-target-flags.mir
+2-1llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+62-12 files

LLVM/project 2d38ed9llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp

[reviews] simplify code.
DeltaFile
+5-7llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+5-71 files

LLVM/project ad3c19allvm/include/llvm/CodeGen RegisterClassInfo.h, llvm/lib/CodeGen RegisterClassInfo.cpp

[AMDGPU][CodeGen] Incrementally update reserved regs for SIPreAllocateWWMRegs pass in RegisterClassInfo (#212201)

Based on this TODO comment in SIPreAllocateWWMRegs.cpp:

76    // TODO: Update RCI with the additional reserved registers the pass sets.
77    AU.addRequired<MachineRegisterClassInfoWrapperPass>();

Creates function updateReservedRegs in RegisterClassInfo.cpp which takes
the BitVector containing reserved register information without requiring
any unnecessary recomputations of the entire RegisterClassInfo object.
It:
- Compares the new reserved-register set with the cached set.
- Removes newly reserved registers from cached allocation orders.
- Updates register counts, costs, subclass information, and pressure
limits.
- Invalidates entries when incremental updating is unsafe; they are
recomputed only when next requested.
- Allows `SIPreAllocateWWMRegs` to preserve `RegisterClassInfo` after
reserving WWM registers.

    [8 lines not shown]
DeltaFile
+115-0llvm/unittests/Target/AMDGPU/RCIUpdateReservedRegsTest.cpp
+61-1llvm/lib/CodeGen/RegisterClassInfo.cpp
+34-0llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-preserve-rci.mir
+11-22llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
+0-32llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs-invalidate-rci.mir
+9-0llvm/include/llvm/CodeGen/RegisterClassInfo.h
+230-551 files not shown
+231-557 files

LLVM/project 5d4e2a8llvm/lib/CodeGen/GlobalISel RegBankSelect.cpp

GlobalISel: Pass instruction to RegBankSelect::tryAvoidingSplit

The helper recovered the instruction from the operand's parent, and the
operand is fully determined by the instruction and RepairPt's operand index.
Pass the containing instruction and derive the operand from it, so the helper
no longer depends on MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+8-12llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+8-121 files

LLVM/project 16bea75llvm/lib/Target/AMDGPU AMDGPULibCalls.cpp, llvm/test/CodeGen/AMDGPU amdgpu-simplify-libcall-sincos.defined.ll

[AMDGPU] Fix sincos insertion point when argument is a phi (#215958)

Fix insertion landed between phis when the argument wasn't the last one
DeltaFile
+35-0llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.defined.ll
+6-1llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
+41-12 files

LLVM/project 5c32491llvm/lib/IR Verifier.cpp

Rename variable.
DeltaFile
+8-7llvm/lib/IR/Verifier.cpp
+8-71 files

LLVM/project acb72fdllvm/test/CodeGen/AMDGPU promote-alloca-lds-granularity-limit.ll

[AMDGPU] Change promote-alloca-lds-granularity-limit.ll test to use inline attributes (NFC) (#219470)

This was requested in post merge review of #219172.
DeltaFile
+1-2llvm/test/CodeGen/AMDGPU/promote-alloca-lds-granularity-limit.ll
+1-21 files

FreeNAS/freenas 99bccf4src/middlewared/middlewared/plugins/rsync task.py

Specify rsync timeout
DeltaFile
+7-2src/middlewared/middlewared/plugins/rsync/task.py
+7-21 files

LLVM/project 5aa6515libc/include/llvm-libc-macros CMakeLists.txt math-function-macros.h, libc/test/include CMakeLists.txt iscanonical_test.c

[libc][math] Extend iscanonical macro to _Float16 and float128 (#204981)

iscanonical is a C23 type-generic macro, so the f16/f128 variants are
surfaced through it rather than as functions in the generated math.h.
float128 is only listed when distinct from long double (LDBL_MANT_DIG !=
113) to avoid two _Generic associations with compatible types.

Stacked below: https://github.com/llvm/llvm-project/pull/205016

Co-authored-by: lntue <lntue at google.com>
DeltaFile
+24-0libc/include/llvm-libc-macros/math-function-macros.h
+16-0libc/test/include/iscanonical_test.c
+2-0libc/test/include/CMakeLists.txt
+1-0libc/include/llvm-libc-macros/CMakeLists.txt
+43-04 files

LLVM/project 1b3a700llvm/lib/Target/RISCV RISCVISelDAGToDAG.h RISCVISelLowering.h, llvm/lib/Target/RISCV/GISel RISCVLegalizerInfo.h

[RISCV] Remove dead declarations (#219407)

legalizeShlAshrLshr: The corresponding function definition was
removed on October 1, 2024 in commit
1053b3ea24f2401b6c8f143b9c1bd45032bc93ba.

emitCFIForCSI: The corresponding function definition was removed on
April 16, 2025 in commit ed9bcb52954f8e6171563d2b8310b0ca6d03d655.

performCombineVMergeAndVOps: The corresponding function definition was
removed on July 4, 2025 in commit
07ae19c132e1b0adbdb3cc036b9f50624e2ed1b7.

lowerFixedLengthVectorFCOPYSIGNToRVV: The corresponding function
definition was removed on August 5, 2025 in commit
5a80274cae3c5d19cf5058550139cb857513ae02.
DeltaFile
+0-3llvm/lib/Target/RISCV/RISCVFrameLowering.h
+0-2llvm/lib/Target/RISCV/RISCVISelLowering.h
+0-2llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
+0-1llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
+0-84 files

FreeBSD/ports 02941cbmultimedia/video-trimmer Makefile distinfo

multimedia/video-trimmer: Update 26.03 => 26.03.1

Changelog:
https://gitlab.gnome.org/YaLTeR/video-trimmer/-/releases/v26.03.1

Reported by:    repology
Approved by:    osa, vvd (Mentors, implicit)
MFH:            2026Q3

(cherry picked from commit 32a2d939c08a4d5fbad03904192c5abc7d48b9a0)
DeltaFile
+3-3multimedia/video-trimmer/distinfo
+2-3multimedia/video-trimmer/Makefile
+5-62 files

FreeBSD/ports 32a2d93multimedia/video-trimmer Makefile distinfo

multimedia/video-trimmer: Update 26.03 => 26.03.1

Changelog:
https://gitlab.gnome.org/YaLTeR/video-trimmer/-/releases/v26.03.1

Reported by:    repology
Approved by:    osa, vvd (Mentors, implicit)
MFH:            2026Q3
DeltaFile
+3-3multimedia/video-trimmer/distinfo
+2-3multimedia/video-trimmer/Makefile
+5-62 files