FreeBSD/ports 5d13fb6comms/syncterm Makefile distinfo, comms/syncterm/files patch-3rdp_build_CMakeLists.txt patch-src_syncterm_CMakeLists.txt

comms/syncterm: Update to v1.8

Changelog:
https://sf.net/projects/syncterm/files/syncterm/syncterm-1.9/
DeltaFile
+0-16comms/syncterm/files/patch-src_xpdev_CMakeLists.txt
+0-13comms/syncterm/files/patch-src_syncterm_CMakeLists.txt
+0-11comms/syncterm/files/patch-3rdp_build_CMakeLists.txt
+3-3comms/syncterm/distinfo
+1-2comms/syncterm/Makefile
+4-455 files

FreeBSD/ports f22c084textproc/py-hieroglyph Makefile

textproc/py-hieroglyph: Deprecate and schedule for removal

The extension only works with textproc/py-sphinx up to 6.x.
DeltaFile
+3-0textproc/py-hieroglyph/Makefile
+3-01 files

FreeBSD/ports 9478a2ctextproc/py-hieroglyph/files patch-versioneer.py

textproc/py-hieroglyph: Unbreak build with Python 3.12

Reported by:    pkg-fallout
DeltaFile
+14-0textproc/py-hieroglyph/files/patch-versioneer.py
+14-01 files

LLVM/project 3069964clang CMakeLists.txt, llvm CMakeLists.txt

[CIR][CMake] Configure MLIR as a dependency-only project

ClangIR requires MLIR, but enabling CIR currently requires users to list MLIR
explicitly in LLVM_ENABLE_PROJECTS. That also attaches all MLIR build, install,
unit-test, and lit targets to the corresponding LLVM aggregates.

When Clang is selected and CLANG_ENABLE_CIR is enabled, append MLIR to the
effective LLVM_ENABLE_PROJECTS list. The common project setup compares that
list with the cached user selection, so an explicit MLIR selection retains its
normal behavior while an implicit selection is configured with EXCLUDE_FROM_ALL.

This makes MLIR targets available for CIR dependency resolution without adding
MLIR's aggregate targets. Keep the existing standalone ClangIR restriction and
do not configure MLIR when CIR is disabled.

Validation:
- Configured Clang with CIR and implicit MLIR test support.
- Configured Clang and MLIR explicitly with CIR and tests enabled.
- Configured Clang without CIR and verified that MLIR remains disabled.

    [4 lines not shown]
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+6-0llvm/CMakeLists.txt
+2-2clang/CMakeLists.txt
+8-22 files

LLVM/project 4ab2198clang CMakeLists.txt, llvm CMakeLists.txt

[CMake] Infer dependency-only projects from the cache

LLVM_ENABLE_PROJECTS historically treats projects enabled to satisfy another
project's dependency the same as projects selected by the user. Consequently,
implicit projects attach their complete build, install, and test suites to
LLVM's aggregate targets.

Keep the cache entry as the user-requested project roots and use the normal
LLVM_ENABLE_PROJECTS variable as the effective dependency closure. Projects in
the effective list but not the cache entry are configured with EXCLUDE_FROM_ALL.
Normalize the special all value before comparing the two sets.

This makes Flang's MLIR and Clang dependencies dependency-only without a second
project collection. It also applies the same rule to Clang when it is added for
LLDB. Forward the cached roots to cross-compilation and bootstrap configurations
so implicit projects do not become explicit in nested builds.

Let MLIR own its dependency-only test policy: configure test support libraries
for downstream consumers without creating MLIR unit tests or registering its

    [10 lines not shown]
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+19-7mlir/CMakeLists.txt
+18-4llvm/CMakeLists.txt
+12-2llvm/cmake/modules/AddLLVM.cmake
+4-1clang/CMakeLists.txt
+1-1llvm/cmake/modules/CrossCompile.cmake
+54-155 files

LLVM/project f7ce52fllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU fdot2.ll

[AMDGPU] Fix FDOT2 fold for non-constant lane indices (#217646)

The fold only checked that the two lane index nodes were not the same
SDValue, but distinct nodes can still be equal at runtime, silently
picking the wrong lanes

Require both indices to be constant and distinct
DeltaFile
+48-0llvm/test/CodeGen/AMDGPU/fdot2.ll
+4-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+52-22 files

FreeBSD/ports 00219ffwww/py-bootstrap-flask Makefile distinfo, www/py-bootstrap-flask/files patch-pyproject.toml

www/py-bootstrap-flask: Update to 2.6.0

Upstream now declares the license as an SPDX expression (PEP 639),
which devel/py-setuptools 63.1.0 does not understand yet, so patch
pyproject.toml back to the legacy table form.

Changes: https://github.com/helloflask/bootstrap-flask/blob/2.6.0/CHANGES.rst
DeltaFile
+15-0www/py-bootstrap-flask/files/patch-pyproject.toml
+3-3www/py-bootstrap-flask/distinfo
+1-1www/py-bootstrap-flask/Makefile
+19-43 files

FreeBSD/ports 3546720devel/py-pytest-cov distinfo Makefile

devel/py-pytest-cov: Update to 7.1.0

Changes: https://github.com/pytest-dev/pytest-cov/blob/v7.1.0/CHANGELOG.rst
DeltaFile
+7-7devel/py-pytest-cov/Makefile
+3-3devel/py-pytest-cov/distinfo
+10-102 files

FreeBSD/ports 920d126Mk/Uses mlt.mk

Mk/Uses/mlt.mk: Update version for multimadia/mlt7* 7.38.0 => 7.40.0

PR:             297364
Approved by:    blanket (fix build)
Fixes:          2cc7cf31f4a4 (update to 7.40.0, unbreak with FFmpeg9)
Sponsored by:   UNIS Labs
DeltaFile
+1-1Mk/Uses/mlt.mk
+1-11 files

FreeBSD/src 36256f7sys/dev/mlx5/mlx5_ib mlx5_ib_qp.c

mlx5ib: use the hardware Toeplitz id when creating an RSS TIR

create_rss_raw_qp_tir() wrote MLX5_RX_HASH_FUNC_TOEPLITZ (the
userspace ABI flag, value 1) into tirc.rx_hash_fn.  That field takes
the hardware encoding from mlx5_ifc.h, where 1 is INVERTED_XOR8 and
Toeplitz is MLX5_TIRC_RX_HASH_FN_HASH_TOEPLITZ (2).

Reviewed by: kib, slavash
Sponsored by: Nvidia Networking
MFC after: 1 week
DeltaFile
+2-1sys/dev/mlx5/mlx5_ib/mlx5_ib_qp.c
+2-11 files

LLVM/project a2ce10cllvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination induction-nowrap-from-scev-not-ir.ll monotonic-int-phis-wrapping.ll

[ConstraintElim] Use range-based NUW/NSW inferrence for Add. (#221487)

Factor out logic to strengthen NUW/NSW flags based on know no-wrap
regions and also use it for ADD.

This enables a number of additional folds in real-world workloads:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1215

Compile-time impact in the noise for geomean. Per workload there are a
few improvements and one regression `lencod` (stage1-ReleaseThinLTO)
https://llvm-compile-time-tracker.com/compare.php?from=bb577f620571ce3bb97f2e717b53500574a9cf27&to=6de758abcfa6fb6e9de359b1fb5cfb67b689afe5&stat=instructions:u

PR: https://github.com/llvm/llvm-project/pull/221487
DeltaFile
+269-0llvm/test/Transforms/ConstraintElimination/add-nsw.ll
+40-25llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+7-8llvm/test/Transforms/ConstraintElimination/wrapping-math.ll
+7-7llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-decrement.ll
+4-6llvm/test/Transforms/ConstraintElimination/monotonic-int-phis-wrapping.ll
+3-3llvm/test/Transforms/ConstraintElimination/induction-nowrap-from-scev-not-ir.ll
+330-498 files not shown
+345-6414 files

LLVM/project 249c1calldb/include/lldb/Target Target.h, lldb/source/API SBValue.cpp

[lldb] Use DIL in CreateValueFromExpression
DeltaFile
+51-0lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/TestCreateValueFromExpression.py
+42-5lldb/source/API/SBValue.cpp
+22-0lldb/source/Target/Target.cpp
+7-0lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/main.cpp
+4-0lldb/include/lldb/Target/Target.h
+3-0lldb/test/API/commands/frame/var-dil/expr/CreateValueFromExpression/Makefile
+129-51 files not shown
+132-57 files

FreeNAS/freenas 4f2f170tests/api2 test_auth_sessions.py test_auth_me.py

`auth` tests

(cherry picked from commit 1514e96e2773f4a68b3bd349d9c0cc0887e73dba)
DeltaFile
+160-0tests/api2/test_auth_login_ex.py
+94-0tests/api2/test_auth_token.py
+86-0tests/api2/test_auth_authenticate.py
+45-0tests/api2/test_auth_twofactor_internal.py
+21-8tests/api2/test_auth_me.py
+26-0tests/api2/test_auth_sessions.py
+432-82 files not shown
+457-98 files

FreeNAS/freenas 327e01dtests/api2 test_auth_sessions.py test_auth_me.py

NAS-143123 / 27.0.0-BETA.1 / `auth` tests (#19613)

File | Before | After
-- | -- | --
plugins/auth.py | 42% | 82%
plugins/auth_/2fa.py | 44% | 81%
plugins/auth_/authenticate.py | 57% | 95%
plugins/auth_/login_ex_impl.py | 29% | 75%
DeltaFile
+160-0tests/api2/test_auth_login_ex.py
+94-0tests/api2/test_auth_token.py
+86-0tests/api2/test_auth_authenticate.py
+45-0tests/api2/test_auth_twofactor_internal.py
+21-8tests/api2/test_auth_me.py
+26-0tests/api2/test_auth_sessions.py
+432-82 files not shown
+457-98 files

FreeBSD/ports c904a89mail/stalwart Makefile Makefile.crates

mail/stalwart: Update to 0.16.21

PR:             297946
Approved by:    maintainer
DeltaFile
+187-155mail/stalwart/distinfo
+92-76mail/stalwart/Makefile.crates
+1-1mail/stalwart/Makefile
+280-2323 files

LLVM/project c02ea09offload/liboffload exports, offload/liboffload/src OffloadImpl.cpp

[offload][omp] Route RPC callback registration through liboffload

Replace __tgt_register_rpc_callback's direct iteration over plugins
with olIteratePlatforms + olPlatformRegisterRPCCallback, and drop the
now-unused RPCServerTy::registerCallback export. Move the
initialized/has-devices guard that used to live in libomptarget into
olPlatformRegisterRPCCallback_impl.
DeltaFile
+7-3offload/libomptarget/interface.cpp
+4-0offload/liboffload/src/OffloadImpl.cpp
+0-1offload/liboffload/exports
+11-43 files

NetBSD/pkgsrc 2Jb1zRXmail/dbmail distinfo Makefile, mail/dbmail/patches patch-src_server.c

   dbmail: fix an I/O stall issue. Bump.

   Patch accepted by upstream.
VersionDeltaFile
1.1+33-0mail/dbmail/patches/patch-src_server.c
1.94+2-2mail/dbmail/Makefile
1.23+2-1mail/dbmail/distinfo
+37-33 files

LLVM/project 45930cemlir/lib/Tools/PDLL/CodeGen MLIRGen.cpp, mlir/lib/Tools/PDLL/Parser Parser.cpp

[mlir][PDLL] Reject overflowing unregistered result indices (#221834)

Unregistered operation result access accepts numeric member names, but
code generation emits a nonnegative I32 attribute. Reject values outside
the signed 32-bit range before building the AST and use the matching
type in codegen.

Found by Coverity.

Assisted-by: Codex
DeltaFile
+7-2mlir/lib/Tools/PDLL/Parser/Parser.cpp
+8-0mlir/test/mlir-pdll/Parser/expr-failure.pdll
+4-2mlir/lib/Tools/PDLL/CodeGen/MLIRGen.cpp
+19-43 files

LLVM/project 5b4a54amlir/lib/Dialect/LLVMIR/IR LLVMDialect.cpp

[mlir][LLVM] Remove dead constant verifier return (NFC) (#221833)

Every arm of the constant attribute-kind chain returns directly, leaving
the final success return unreachable. Remove the dead statement.

Found by Coverity.

Assisted-by: Codex
DeltaFile
+0-2mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+0-21 files

LLVM/project d80842foffload/include device.h, offload/liboffload exports

[offload][omp] Query device info directly through liboffload

Route DeviceTy::getInfo through olGetDeviceInfo instead of the
plugin's obtain_device_info, and drop the now-unused
GenericPluginTy::obtain_device_info wrapper and its liboffload
export.
DeltaFile
+4-9offload/include/device.h
+0-10offload/plugins-nextgen/common/src/PluginInterface.cpp
+0-3offload/plugins-nextgen/common/include/PluginInterface.h
+0-1offload/liboffload/exports
+4-234 files

LLVM/project 36b179dclang/docs ReleaseNotes.md, clang/lib/Sema SemaDecl.cpp

[clang][Sema] Crash due to asm labeled incomplete global register decls (#219746)

CheckAsmLabel fails to check for an incomplete type before attempting to
get the type layout. Short circuit on an incomplete type as Sema will
already reject a global with an incomplete type.
DeltaFile
+9-0clang/test/Sema/global-explicit-register-undefined-type.c
+2-0clang/lib/Sema/SemaDecl.cpp
+1-0clang/docs/ReleaseNotes.md
+12-03 files

LLVM/project 1ac82cclibcxx/docs/Status Cxx20Papers.csv Cxx26Papers.csv

[libc++][docs] Finish MyST migration
DeltaFile
+337-337libcxx/docs/Status/Cxx26Issues.csv
+307-307libcxx/docs/Status/Cxx17Issues.csv
+300-300libcxx/docs/Status/Cxx23Issues.csv
+292-292libcxx/docs/Status/Cxx20Issues.csv
+208-208libcxx/docs/Status/Cxx26Papers.csv
+193-193libcxx/docs/Status/Cxx20Papers.csv
+1,637-1,63736 files not shown
+2,472-2,45842 files

LLVM/project db63585libcxx/docs TestingLibcxx.rst TestingLibcxx.md, libcxx/docs/DesignDocs AtomicDesign.rst AtomicDesign.md

[libc++] Rename documentation files to Markdown
DeltaFile
+0-797libcxx/docs/DesignDocs/AtomicDesign.rst
+797-0libcxx/docs/DesignDocs/AtomicDesign.md
+0-676libcxx/docs/VendorDocumentation.rst
+676-0libcxx/docs/VendorDocumentation.md
+0-591libcxx/docs/TestingLibcxx.rst
+591-0libcxx/docs/TestingLibcxx.md
+2,064-2,06486 files not shown
+8,058-8,05892 files

LLVM/project 611dd15libcxx/docs Modules.md UserDocumentation.md, libcxx/docs/DesignDocs FileTimeType.md AtomicDesign.md

[libc++][docs] Convert documentation with rst2myst
DeltaFile
+608-614libcxx/docs/DesignDocs/AtomicDesign.md
+384-405libcxx/docs/VendorDocumentation.md
+271-292libcxx/docs/DesignDocs/FileTimeType.md
+255-280libcxx/docs/TestingLibcxx.md
+220-221libcxx/docs/UserDocumentation.md
+210-208libcxx/docs/Modules.md
+1,948-2,02038 files not shown
+3,831-4,11244 files

LLVM/project 2f2f4d8clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRMemorySlot.cpp

Extend PromotableRegionOpInterface for TernaryOp and add extra test coverage
DeltaFile
+116-2clang/test/CIR/Transforms/mem2reg-regions.cir
+35-3clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+25-0clang/test/CIR/Transforms/mem2reg-regions.c
+1-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+177-54 files

LLVM/project 008169dclang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRMemorySlot.cpp

[CIR] Implement PromotableRegionOpInterface for cir.scope

Same treatment as cir.if: a slot read inside a cir.scope no longer needs
the CFG flattened before mem2reg can promote it. The scope region is
entered directly from before the operation, so it sees the reaching
definition unchanged.

cir.scope yields at most one value and may already be using it for the
scope's own result, so regions that store to the slot are refused.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+57-0clang/test/CIR/Transforms/mem2reg-regions.cir
+24-0clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+1-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+82-03 files

LLVM/project df7481cclang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRMemorySlot.cpp

[CIR] Implement PromotableRegionOpInterface for cir.if

mem2reg gives up on a memory slot as soon as one of its uses lives in a
nested region whose parent op does not implement
PromotableRegionOpInterface. Since no CIR op implements it, promoting a
slot read inside a cir.if required running cir-flatten-cfg first, which
is why clang/test/CIR/Transforms/mem2reg.cir has to flatten before it can
promote anything.

Implement the interface for cir.if. Both regions are entered directly
from before the operation, so both see the same reaching definition.

A definition created inside a region has to leave the operation through
one of its results, and cir.if has none, so isRegionPromotable refuses
regions that store to the slot. Supporting those requires giving cir.if
results and is left for later.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+72-0clang/test/CIR/Transforms/mem2reg-regions.cir
+28-0clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+1-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+101-03 files

DragonFlyBSD/src b4510a6lib/libc/stdlib nmalloc.c

libc - Remove optimization that breaks malloc_usable_size() use cases

* The malloc implementation had an optimization meant to aid realloc()s
  whereby unused portions of large memory blocks could be munmap()d.

  However, lots of code uses the space returned by malloc_usable_size()
  without calling realloc() to notify libc that additional space is being
  used.  Leading to segmentation faults.

* Original proposed solution to make malloc_usable_size() aware of a
  prior munmap optimization does not completely fix the problem as excess
  space may be unmapped after such calls as well as before.

* Removing the optimization and letting the pager deal with any actually-dead
  excess space is the only option.  So that is what we do.

Reported-by: Several people
DeltaFile
+38-2lib/libc/stdlib/nmalloc.c
+38-21 files

LLVM/project a17b7e9clang/test/CIR/CodeGen ms-declspec-noalias.c

[CIR] Reject willreturn on __declspec(noalias) attribute groups

Classic codegen never adds willreturn for NoAliasAttr. Bracket the
definition and call-site groups so a wildcard cannot hide it.
DeltaFile
+23-4clang/test/CIR/CodeGen/ms-declspec-noalias.c
+23-41 files

LLVM/project 35385c7offload/liboffload exports, offload/libompaccsupport device.cpp

[offload][omp] Implement printDeviceInfo through liboffload
DeltaFile
+181-2offload/libompaccsupport/device.cpp
+0-19offload/plugins-nextgen/common/src/PluginInterface.cpp
+0-6offload/plugins-nextgen/common/include/PluginInterface.h
+0-1offload/liboffload/exports
+181-284 files