13,286,465 commits found in 7 milliseconds
update to FreeBSD 15.1-STABLE
LLVM /project 0a55578 — amd/comgr/src/hotswap code-object-utils.cpp code-object-utils.h, amd/comgr/test-unit RaiserScaffoldingTest.cpp [Comgr][hotswap] Address PR #2437 review comments
Reviewer feedback from chinmaydd and jmmartinez:
- readKernelDescriptor now returns Expected<KernelDescriptorFields> by
value instead of writing through an out-parameter (jmmartinez), folding
the byte read and field extraction into one function.
- Group the KD register fields into a KernelDescriptorFields struct stored
as std::optional<KernelDescriptorFields> on KernelMeta, replacing the
HasKernelDescriptor bool flag (jmmartinez). PrivateSegmentFixedSize now
lives only in the descriptor struct, read authoritatively from .rodata.
- extractKernelMeta propagates a KD parse failure as an error rather than
swallowing it into a partial success (ftynse/chinmaydd; martin-luecke
agreed), so a successful KernelMeta always carries the descriptor.
- raiser.cpp reuses the shared kAMDGPUTriple from mc-state.h instead of a
local duplicate constant (chinmaydd).
- Add TODOs flagging the non-thread-safe target init and the
non-exhaustive stripEncoding suffix list (chinmaydd).
Assited-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
LLVM /project 3c4ac7d — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU scalar-float-sop2.ll AMDGPU/GlobalISel: Fix regBankLegalize rules for uniform cvt_pkrtz
FreeBSD /ports 79d8b62 — security/openssl35/files patch-CVE-2026-2673, security/openssl36/files patch-CVE-2026-2673 security/openssl35: Fix missing commit in recent update
[AMDGPU][NFC] New tests for uncovered cases in SIInstrInfo.cpp (#200414)
Several cases in [the AMDGPU
backend](https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp )
are not covered by the existing tests. We are proposing a new set of
tests to cover these lines.
We demonstrate that these cases are not covered by showing that no test
fails when `abort` statements are included. These are removed for the
final PR. You can check the lines of interest in [this
commit](https://github.com/llvm/llvm-project/pull/200414/commits/84d4587b784014ace546d23beaf6ed8d703452d3 ). OPNSense /core 70853ba — src/opnsense/mvc/app/views/layout_partials base_apply_button.volt, src/opnsense/www/js opnsense_ui.js ui: simplify previous
[X86] Add test showing failure to concat X86ISD::PERMI nodes with different immediates (#203487) LLVM /project ef37a6c — flang/lib/Lower/OpenMP OpenMP.cpp, mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp [flang][OpenMP] Lower target in_reduction for host fallback
Enable host-fallback lowering for target in_reduction in Flang and MLIR OpenMP translation.
Model target in_reduction through the matching map entry, force address-preserving implicit mapping for Flang in_reduction list items, and emit the host-side task-reduction lookup with __kmpc_task_reduction_get_th_data. Unsupported device/offload-entry and richer reduction forms remain diagnosed.
Add Flang lowering, MLIR verifier/translation, and LLVM IR tests for the supported host-fallback path and the remaining unsupported cases.
LLVM /project 125242e — llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp, llvm/test/CodeGen/SPIRV FCmpFalse_Vec.ll [LLVM][CodeGen][SPIRV] Match NULL splat to OpConstantNull. (#201313) misc/py-mcp: Update to 1.27.2
ChangeLog:
- https://github.com/modelcontextprotocol/python-sdk/releases/tag/v1.27.2
Reported by: Max <notifications at github.com>
LLVM /project 29e27fd — clang/test/Sema warn-lifetime-safety.cpp warn-lifetime-analysis-nocfg.cpp, clang/test/Sema/LifetimeSafety safety.cpp nocfg.cpp [LifetimeSafety] Reorganize tests into `LifetimeSafety/` subdirectory (#203363) Fix typo in sigaltstack test
Created using spr 1.3.7
[DTLTO] Added missing timetrace "Check cache for DTLTO" message. (#203215)
After the DTLTO refactor commit, the time trace "Chack cache for DTLTO"
message was unintentionally omitted. This patch corrects this omission. LLVM /project 3922f3c — lldb/source/Plugins/Process/Windows/Common ExceptionRecord.h ExceptionRecord.cpp [lldb][Windows] Use uint64 for GetExceptionArguments (#203485)
Intended to fix the build failure mentioned in
https://github.com/llvm/llvm-project/pull/203301#issuecomment-4688315446.
Makes sure we always use a 64 bit int, as the minidump exception record
specifies the arguments to be 64 bit. `unsigned long long` is also 64
bit on Windows, but I think `uint64_t` conveys that we actually want a
64bit int.
Then updates uses of the return value to use `uint64_t` over
`ULONG_PTR`. Fix configure resilver priority
Format tests file
OPNSense /core c26e4da — src/opnsense/mvc/app/views/layout_partials base_apply_button.volt, src/opnsense/www/js opnsense_ui.js ui: simplify previous
LLVM /project a0bad85 — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU scalar-float-sop2.ll [AMDGPU][GlobalIsel] Add RegBankLegalize rules and lowering for G_AMDGPU_S_BUFFER_LOAD (#192480)
Add RegBankLegalize rules and lowering for G_AMDGPU_S_BUFFER_LOAD and
sub-dword variants (UBYTE, SBYTE, USHORT, SSHORT). The lowering covers
all four rsrc/offset divergence combinations:
- Uniform rsrc + uniform offset → scalar SMEM (stays as-is)
- Uniform rsrc + divergent offset → MUBUF (S_BUF_to_BUF, no waterfall)
- Divergent rsrc + uniform offset → SMEM in waterfall loop over rsrc
- Divergent rsrc + divergent offset → MUBUF + waterfall over rsrc
TODO:
1. Fix legalize rule for intrinsic amdgcn_cvt_pkrtz to emit scalar cvt
operation in _/AMDGPU/scalar-float-sop2.ll_
2. Fix offset for GFX1250 in
_/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll_ as done by
PR#178389 Organize imports
OPNSense /core 7a53cf1 — src/opnsense/mvc/app/views/layout_partials base_apply_button.volt, src/opnsense/www/js opnsense_ui.js ui: fix excessive padding on apply section (#10409) LLVM /project b7a3b3e — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll [AMDGPU] Pass sret pointers in SGPRs
Delta File +56,760 -55,584 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +19,496 -18,806 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +8,642 -8,161 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll +2,097 -1,748 llvm/test/CodeGen/AMDGPU/bf16.ll +866 -672 llvm/test/CodeGen/AMDGPU/function-returns.ll +124 -128 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dead.ll +87,985 -85,099 11 files not shown +88,164 -85,191 17 files
FreeNAS /freenas 238b691 — src/middlewared/middlewared/plugins/pool_ pool_operations.py, src/middlewared/middlewared/pytest/unit/plugins/pool test_resilver.py Fix the actual bug
FreeNAS /freenas a8ee6b7 — src/middlewared/middlewared/plugins/pool_ pool_operations.py, src/middlewared/middlewared/pytest/unit/plugins/pool test_resilver.py Extract `calculate_resilver_priority` method
filesystems/httpdirfs: Update 1.3.2 => 1.3.3
Approved by: db@, yuri@ (Mentors, implicit)
LLVM /project 688540a — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll Use new safestack_interface.h
Created using spr 1.3.7
Delta File +38,494 -84,026 llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll +23,873 -20,923 llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp +22,388 -22,086 llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll +19,087 -24,391 llvm/test/CodeGen/RISCV/clmul.ll +12,982 -11,930 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +10,473 -12,572 llvm/test/CodeGen/RISCV/clmulr.ll +127,297 -175,928 12,969 files not shown +1,030,291 -641,095 12,975 files
LLVM /project 86fba61 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +38,494 -84,026 llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll +23,873 -20,923 llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp +22,388 -22,086 llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll +19,087 -24,391 llvm/test/CodeGen/RISCV/clmul.ll +12,982 -11,930 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +10,473 -12,572 llvm/test/CodeGen/RISCV/clmulr.ll +127,297 -175,928 12,969 files not shown +1,030,291 -641,095 12,975 files
LLVM /project 2b10b6d — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll Use new safestack_interface.h
Created using spr 1.3.7
Delta File +38,494 -84,026 llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll +23,873 -20,923 llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp +22,388 -22,086 llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll +19,087 -24,391 llvm/test/CodeGen/RISCV/clmul.ll +12,982 -11,930 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +10,473 -12,572 llvm/test/CodeGen/RISCV/clmulr.ll +127,297 -175,928 12,969 files not shown +1,030,291 -641,095 12,975 files
LLVM /project 93e4d46 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +38,494 -84,026 llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll +23,873 -20,923 llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp +22,388 -22,086 llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll +19,087 -24,391 llvm/test/CodeGen/RISCV/clmul.ll +12,982 -11,930 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +10,473 -12,572 llvm/test/CodeGen/RISCV/clmulr.ll +127,297 -175,928 12,969 files not shown +1,030,254 -641,064 12,975 files
LLVM /project d06bdaf — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll Use new safestack_interface.h
Created using spr 1.3.7
Delta File +38,494 -84,026 llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll +23,873 -20,923 llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp +22,388 -22,086 llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll +19,087 -24,391 llvm/test/CodeGen/RISCV/clmul.ll +12,982 -11,930 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +10,473 -12,572 llvm/test/CodeGen/RISCV/clmulr.ll +127,297 -175,928 12,969 files not shown +1,030,307 -641,103 12,975 files
LLVM /project 41d3bd2 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +38,494 -84,026 llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll +23,873 -20,923 llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp +22,388 -22,086 llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll +19,087 -24,391 llvm/test/CodeGen/RISCV/clmul.ll +12,982 -11,930 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +10,473 -12,572 llvm/test/CodeGen/RISCV/clmulr.ll +127,297 -175,928 12,969 files not shown +1,030,291 -641,095 12,975 files
