LLVM/project 890c3fcclang/lib/CodeGen CGObjCMac.cpp

[CodeGen] NFC: Fix and improve comments in CGObjCMac.cpp (#193119)

Extract comment changes from #191091.
DeltaFile
+37-31clang/lib/CodeGen/CGObjCMac.cpp
+37-311 files

LLVM/project 125fa54llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

rebase

Created using spr 1.3.7
DeltaFile
+26,606-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604-1,567llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0-1,370llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662-662llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291-0llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241-3,5991,092 files not shown
+63,356-20,9921,098 files

LLVM/project d6c5a20llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+26,606-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604-1,567llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0-1,370llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662-662llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291-0llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241-3,5991,092 files not shown
+63,356-20,9921,098 files

LLVM/project 2e1d160llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

rebase

Created using spr 1.3.7
DeltaFile
+26,606-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604-1,567llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0-1,370llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662-662llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291-0llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241-3,5991,092 files not shown
+63,356-20,9921,098 files

LLVM/project 5585194llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+26,606-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604-1,567llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0-1,370llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662-662llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291-0llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241-3,5991,092 files not shown
+63,356-20,9921,098 files

LLVM/project df4dd38llvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/CodeGen/AArch64/GlobalISel select-with-no-legality-check.mir knownbits-vector.mir

rebase

Created using spr 1.3.7
DeltaFile
+26,606-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604-1,567llvm/test/CodeGen/AArch64/clmul-scalable.ll
+0-1,370llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+662-662llvm/test/CodeGen/AArch64/GlobalISel/select-with-no-legality-check.mir
+1,291-0llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+34,241-3,5991,092 files not shown
+63,356-20,9921,098 files

LLVM/project 3afda98llvm/lib/Target/RISCV RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rv64p.ll rv32p.ll

[RISCV][P-ext] Remateralize pli and plui (#193110)

Test cases were written by Claude Sonnet 4.5.
DeltaFile
+225-0llvm/test/CodeGen/RISCV/rv64p.ll
+135-0llvm/test/CodeGen/RISCV/rv32p.ll
+5-1llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+365-13 files

LLVM/project 4d2df3bllvm/utils/gn/secondary/llvm/lib/Target/AArch64 BUILD.gn

[gn] port c95a333de7108 (#193121)
DeltaFile
+4-1llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
+4-11 files

NetBSD/src JRhn0GQexternal/bsd/jemalloc/dist/include/jemalloc/internal quantum.h, external/bsd/jemalloc/include/jemalloc/internal quantum.h

   Add missing archs
VersionDeltaFile
1.2+80-73external/bsd/jemalloc/dist/include/jemalloc/internal/quantum.h
1.6+7-2external/bsd/jemalloc/include/jemalloc/internal/quantum.h
+87-752 files

LLVM/project 0a5870dllvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

Merge remote-tracking branch 'origin/main' into users/ziqingluo/PR-172429193-2-split-1

 Conflicts:
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.h
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
        clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
        clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+41,844-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
+40,613-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
+37,209-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
+597,128-03,037 files not shown
+986,155-65,8203,043 files

Linux/linux b4e0758kernel/trace .gitignore

tracing: tell git to ignore the generated 'undefsyms_base.c' file

This odd file was added to automatically figure out tool-generated
symbols.

Honestly, it *should* have been just a real honest-to-goodness regular
file in git, instead of having strange code to generate it in the
Makefile, but that is not how that silly thing works.  So now we need to
ignore it explicitly.

Fixes: 1211907ac0b5 ("tracing: Generate undef symbols allowlist for simple_ring_buffer")
Cc: Vincent Donnefort <vdonnefort at google.com>
Cc: Nathan Chancellor <nathan at kernel.org>
Cc: Steven Rostedt (Google) <rostedt at goodmis.org>
Cc: Arnd Bergmann <arnd at arndb.de>
Cc: Marc Zyngier <maz at kernel.org>
Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>
DeltaFile
+1-0kernel/trace/.gitignore
+1-01 files

LLVM/project 1290b82clang/test/SemaCUDA float128.cu

[test] Remove redundant typedef (#193116)
DeltaFile
+0-1clang/test/SemaCUDA/float128.cu
+0-11 files

Linux/linux f154634tools/testing/selftests Makefile, tools/testing/selftests/kselftest runner.sh

Merge tag 'linux_kselftest-next-7.1-next-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest

Pull kselftest fixes from Shuah Khan:
 "Fix regressions in non-bash shells and busybox support, and revert a
  commit that regressed in build and installation when one or more tests
  fail to build.

  Fix duplicated test number reporting introduced in ktap support patch"

* tag 'linux_kselftest-next-7.1-next-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest:
  selftests: Fix duplicated test number reporting
  selftests: Fix runner.sh for non-bash shells
  selftests: Fix runner.sh busybox support
  selftests: Deescalate error reporting
DeltaFile
+24-25tools/testing/selftests/kselftest/runner.sh
+4-4tools/testing/selftests/Makefile
+28-292 files

LLVM/project 66b86afclang/test/CodeGen/RISCV rvv-builtin-reduce-ops.c

[clang][riscv] Add tests for __builtin_reduce_X support [NFC] (#193082)

It turns out we already support use of the __builtin_reduce_ family of
builtins on the builtin RVV types, but we have no test coverage which
demonstrates this.

Note that __builtin_reduce_mul is a bit of a cornercase as currently the
clang part works just fine, but the lowering will crash since we don't
have a vredprod-esq instruction. (See
https://github.com/llvm/llvm-project/pull/193094 for the lowering fix.)
DeltaFile
+156-0clang/test/CodeGen/RISCV/rvv-builtin-reduce-ops.c
+156-01 files

LLVM/project 212474aclang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsageTest.cpp

address comments
DeltaFile
+59-89clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+59-891 files

LLVM/project a10aae8offload/tools/kernelreplay llvm-omp-kernel-replay.cpp

[offload] Remove unnecessary extra allocations in kernel replay tool (#193108)

The tool had two extra allocations holding the device memory and
globals. Apparently, the AMDGPU plugin failed in the past to transfer
data from the file memory mapping, and required these extra buffers.
After testing it on MI300A and MI250X, this issue is not present
anymore. Thus, we are removing them for now.
DeltaFile
+9-23offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+9-231 files

Linux/linux 13f2458arch/arm64 Kconfig, arch/arm64/include/asm tlbflush.h fpsimd.h

Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull more arm64 updates from Catalin Marinas:
 "The main 'feature' is a workaround for C1-Pro erratum 4193714
  requiring IPIs during TLB maintenance if a process is running in user
  space with SME enabled.

  The hardware acknowledges the DVMSync messages before completing
  in-flight SME accesses, with security implications. The workaround
  makes use of the mm_cpumask() to track the cores that need
  interrupting (arm64 hasn't used this mask before).

  The rest are fixes for MPAM, CCA and generated header that turned up
  during the merging window or shortly before.

  Summary:

  Core features:


    [26 lines not shown]
DeltaFile
+87-7arch/arm64/include/asm/tlbflush.h
+79-0arch/arm64/kernel/fpsimd.c
+36-0arch/arm64/kernel/process.c
+30-0arch/arm64/kernel/cpu_errata.c
+21-0arch/arm64/include/asm/fpsimd.h
+12-0arch/arm64/Kconfig
+265-710 files not shown
+297-1316 files

LLVM/project 6c35bdbllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 copyable_reorder.ll

[SLP] Normalize copyable operand order to group loads for better vectorization

When building operands for entries with copyable elements, non-copyable
lanes may have inconsistent operand order (e.g., some lanes have
load,add while others have add,load for commutative ops). This prevents
VLOperands::reorder() from grouping consecutive loads on one side,
degrading downstream vectorization.
Normalize in two steps during buildOperands:
1) Majority voting: swap lanes that are the exact inverse of the
   majority operand-type pattern.
2) Load preference: if the majority pattern has loads at OpIdx 1
   (strict majority), swap to put loads at OpIdx 0, enabling
   vector load + copyable patterns.

Reviewers: hiraditya, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/189181
DeltaFile
+12-26llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
+26-7llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+38-332 files

LLVM/project 500e913llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.cvt.sat.pk.ll

AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sat_pk4_i4_i8 / amdgcn_sat_pk4_u4_u8 (#193096)
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.sat.pk.ll
+4-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+6-22 files

Linux/linux ce9e933arch/sh/configs dreamcast_defconfig hp6xx_defconfig, arch/sh/drivers platform_early.c

Merge tag 'sh-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux

Pull sh updates from John Paul Adrian Glaubitz:
 "Two patches from Thomas Zimmermann, one by Tim Bird and one by Thomas
  Weißschuh.

  The first patch by Thomas Zimmermann adds a missing include in dac.h
  for SH-3 which became necessary after 243ce64b2b37 ("backlight: Do not
  include <linux/fb.h> in header file") which made __raw_readb() and
  __raw_writeb() inaccessible in dac.h.

  Thomas' second patch drops CONFIG_FIRMWARE_EDID for SH as it depends
  on X86 or EFI_GENERIC_STUB which are not defined on SH for obvious
  reasons.

  The patch by Tim Bird fixes just a small typo in two SPDX ID lines
  which he stumbled over by accident.

  And, least but not last, the patch by Thomas Weißschuh removes the

    [11 lines not shown]
DeltaFile
+1-5arch/sh/include/uapi/asm/auxvec.h
+2-0arch/sh/include/cpu-sh3/cpu/dac.h
+1-1arch/sh/include/asm/platform_early.h
+1-1arch/sh/drivers/platform_early.c
+0-1arch/sh/configs/dreamcast_defconfig
+0-1arch/sh/configs/hp6xx_defconfig
+5-92 files not shown
+5-118 files

LLVM/project f46da03lldb/source/Plugins/Platform/WebAssembly PlatformWasm.cpp

[lldb] Don't enable ASLR for the Wasm runtime (#193115)

We're launching the Wasm runtime (a native host binary), not the target
being debugged. Clear flags that don't apply to the runtime process.
DeltaFile
+3-1lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.cpp
+3-11 files

Linux/linux 065c4e6arch/um Kconfig, arch/um/drivers cow_user.c

Merge tag 'uml-for-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux

Pull uml updates from Johannes Berg:
 "Mostly cleanups and small things, notably:

   - musl libc compatibility

   - vDSO installation fix

   - TLB sync race fix for recent SMP support

   - build fix for 32-bit with Clang 20/21"

* tag 'uml-for-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux:
  um: Disable GCOV_PROFILE_ALL on 32-bit UML with Clang 20/21
  um: drivers: call kernel_strrchr() explicitly in cow_user.c
  um: Replace strncpy() with strnlen()+memcpy_and_pad() in strncpy_chunk_from_user()
  x86/um: fix vDSO installation
  um: Remove CONFIG_FRAME_WARN from x86_64_defconfig

    [5 lines not shown]
DeltaFile
+4-5arch/um/include/asm/pgtable.h
+7-1arch/um/drivers/cow_user.c
+6-0arch/x86/um/os-Linux/mcontext.c
+5-1include/uapi/linux/um_timetravel.h
+3-1arch/um/Kconfig
+2-2arch/um/kernel/skas/uaccess.c
+27-106 files not shown
+33-1612 files

LLVM/project 9356e1eclang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsageExtractor.cpp

Update clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+1-1clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
+1-11 files

NetBSD/src o7Utzu3external/bsd/jemalloc/dist/include/jemalloc jemalloc.h, external/bsd/jemalloc/include/jemalloc jemalloc.h

   re-instate the namespace protection from 5.3.0
VersionDeltaFile
1.3+37-5external/bsd/jemalloc/dist/include/jemalloc/jemalloc.h
1.12+37-5external/bsd/jemalloc/include/jemalloc/jemalloc.h
+74-102 files

LLVM/project 6fe6f1bllvm/include/llvm/CodeGen MachineBlockHashInfo.h, llvm/include/llvm/Passes MachinePassRegistry.def

[CodeGen] Add MachineBlockHashInfoAnalysis for the new pass manager (#193107)

This patch introduces MachineBlockHashInfoAnalysis and its corresponding
printer pass MachineBlockHashInfoPrinterPass to the new pass manager.

This allows running -passes="print<machine-block-hash>" via llc.

Can't merge before #192826, and don't want to mix test patch with
determinism fix in #192826.

This is #192911 which was accidentally merged into spr/users branch.
DeltaFile
+53-0llvm/test/CodeGen/X86/machine-block-hash.mir
+23-1llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+23-0llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+3-0llvm/include/llvm/Passes/MachinePassRegistry.def
+1-0llvm/lib/Passes/PassBuilder.cpp
+103-15 files

LLVM/project ce73ab7clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsageTest.cpp

Update clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+1-1clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+1-11 files

LLVM/project 75790bfclang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel EntityPointerLevel.h EntityPointerLevelFormat.h, clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsage.h

[SSAF][UnsafeBufferUsage] Add APIs to the EntityPointerLevel module for UnsafeBufferUsage (#191333)

- UnsafeBufferUsage serialization uses EntityPointerLevel's API to
serialize EntityPointerLevels.
- Add APIs to EntityPointerLevel for creating EPLs from Decls and
incrementing EPL's pointer level.
- Improve UnsafeBufferUsage serialization error messages with a test.

---------

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+103-33clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
+29-8clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.h
+35-0clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.h
+9-19clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.cpp
+13-5clang/test/Analysis/Scalable/UnsafeBufferUsage/tu-summary-serialization.test
+2-6clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
+191-711 files not shown
+193-737 files

LLVM/project 13e18f8llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 select-logical-or-and-i1-vector.ll

[SLP] Improve cost model for i1 select-as-or/and patterns

Model `select i1 %c, i1 true, i1 %d` as `or` and
`select i1 %c, i1 %d, i1 false` as `and` in the SLP cost model, since
these are the operations the backend will lower them to. The previous
select cost overestimated the vector cost of these patterns, preventing
profitable vectorization of i1 condition chains.

Reviewers: hiraditya, RKSimon, bababuck

Pull Request: https://github.com/llvm/llvm-project/pull/188572
DeltaFile
+84-34llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+20-24llvm/test/Transforms/SLPVectorizer/X86/select-logical-or-and-i1-vector.ll
+104-582 files

LLVM/project c758592llvm/docs/CommandGuide dsymutil.rst, llvm/test/tools/dsymutil codesign.test cmdline.test

[dsymutil] Add support for code signing dSYM bundles (#190676)

This PR adds support for code signing the dSYM bundle using the
`codesign` command line utility.
DeltaFile
+57-0llvm/tools/dsymutil/dsymutil.cpp
+15-0llvm/test/tools/dsymutil/codesign.test
+6-0llvm/tools/dsymutil/Options.td
+5-0llvm/docs/CommandGuide/dsymutil.rst
+1-0llvm/test/tools/dsymutil/cmdline.test
+84-05 files

LLVM/project 9adf869llvm/include/llvm/CodeGen MachineBlockHashInfo.h, llvm/include/llvm/Passes MachinePassRegistry.def

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+53-0llvm/test/CodeGen/X86/machine-block-hash.mir
+23-1llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+23-0llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+3-0llvm/include/llvm/Passes/MachinePassRegistry.def
+1-0llvm/lib/Passes/PassBuilder.cpp
+103-15 files