LLVM/project cc2acc3 — lldb/source/Symbol DWARFCallFrameInfo.cpp UnwindTable.cpp, lldb/source/Target RegisterContextUnwind.cpp

[lldb] Use the .pdata function start for a frame 0 that has no symbol (#227298)

When the current function has no symbol, the unwinder does not know
where the function starts.
It then uses the Windows x64 unwind info for "after the prologue", even
at the function's first instruction.

This gives a wrong frame address, so stepping over a call into static
CRT code (e.g.
[`puts`](https://learn.microsoft.com/en-us/cpp/c-runtime-library/reference/puts-putws?view=msvc-170))
stopped inside it.

This patch takes the function's start from
[`.pdata`](https://learn.microsoft.com/en-us/windows/win32/debug/pe-format#the-pdata-section)
instead. Only Windows x64 images are affected.

Adds a minidump regression test.
DeltaFile
+47-0lldb/test/Shell/Minidump/Windows/Inputs/symbolless-entry-unwind.exe.yaml
+27-0lldb/test/Shell/Minidump/Windows/Inputs/symbolless-entry-unwind.dmp.yaml
+15-4lldb/source/Target/RegisterContextUnwind.cpp
+12-0lldb/test/Shell/Minidump/Windows/symbolless-entry-unwind.test
+11-0lldb/source/Symbol/UnwindTable.cpp
+7-1lldb/source/Symbol/DWARFCallFrameInfo.cpp
+119-53 files not shown
+132-69 files

LLVM/project dfd9a0f — lldb/include/lldb/Target MemoryRegionInfoCache.h, lldb/source/Target MemoryRegionInfoCache.cpp

[lldb] Use Guarded in MemoryRegionInfoCache (#219425)

This replaces the mutex + variable pair with a `Guarded` variable
that enforces the locking.
DeltaFile
+6-11lldb/source/Target/MemoryRegionInfoCache.cpp
+2-2lldb/include/lldb/Target/MemoryRegionInfoCache.h
+8-132 files

LLVM/project ed72946 — llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/test/CodeGen/AArch64 fsh.ll overflow-vec.ll

feat(gisel): mirror trunc/xor/select demanded bits

Mirror SelectionDAG demand propagation, known-bits folding, truncation
of logical shifts, and XOR narrowing and constant simplifications.
Respect shared producers, legality and target profitability, including
AArch64 XOR/shift commuting. Preserve integer LLTs when narrowing.

Share XOR/shift profitability between selectors through ISelOpcode,
with selector-owned opcode tables and one target hook.
DeltaFile
+508-508llvm/test/CodeGen/AArch64/overflow-vec.ll
+744-0llvm/test/CodeGen/AArch64/GlobalISel/combine-simplify-demanded-bits-trunc-xor-select.mir
+365-365llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+159-172llvm/test/CodeGen/AArch64/fsh.ll
+220-5llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+83-83llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+2,079-1,13325 files not shown
+2,485-1,45731 files

FreeBSD/src a317317 — lib/libpfctl libpfctl.c, sys/netpfil/pf pf_nl.h pf_ioctl.c

pf: Keep every chunk of a table that a ruleset defines

libpfctl sends a table definition in chunks of 256 addresses, each as
its own PFNL_CMD_INA_DEFINE.  The kernel treated every chunk as a new
definition and replaced the shadow table, so only the last chunk
survived.

Mark the chunks after the first with PF_ID_APPEND and have the kernel
add them to the shadow table in progress.  A request without the
attribute still replaces the shadow; one with it and no definition in
progress fails with EINVAL.  Old kernels ignore the attribute, so both
halves are needed; the ioctl sends all addresses at once and is not
affected.  Mask the flags userland passes to PFR_FLAG_ALLMASK, as
PFR_FLAG_APPEND is kernel-internal.

Add a test that defines a table of 1,000 addresses, also in an anchor.

Reviewed by:            kp
Fixes:                  219ce3063840 ("pf: convert DIOCRINADEFINE to netlink")

    [2 lines not shown]
DeltaFile
+70-0tests/sys/netpfil/pf/table.sh
+59-0sys/netpfil/pf/pf_table.c
+8-2lib/libpfctl/libpfctl.c
+5-0sys/netpfil/pf/pf_nl.c
+2-1sys/netpfil/pf/pf_ioctl.c
+1-0sys/netpfil/pf/pf_nl.h
+145-31 files not shown
+146-37 files

pkgng/pkgng 491bf2a — libpkg pkg_elf.c

ignore LOONGARCH when using base libelf not supporting the arch
DeltaFile
+2-0libpkg/pkg_elf.c
+2-01 files

LLVM/project ebe49ed — llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU/Utils AMDGPUPALMetadata.h AMDGPUPALMetadata.cpp

AMDGPU: Include callees in backend_stack_size PAL metadata

The stack size reported in the PAL metadata of a chain function should
include the stack sizes of any callees, since the consumers don't have
access to the call graph (this is especially important for whole wave
functions, because we don't even emit any PAL metadata for them). The
consumers are generally expected to allocate scratch based on the
maximum `.backend_stack_size` emitted for the functions in a pipeline.
They will also have to deal with recursion and indirect calls.

The `.stack_frame_size_in_bytes` metadata remains unchanged, i.e. it
represents just the stack size of the current function (without its
callees).

Assisted-by: AI
DeltaFile
+57-5llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
+9-3llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
+8-2llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
+6-1llvm/docs/AMDGPUUsage.rst
+2-2llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable.ll
+2-2llvm/test/CodeGen/AMDGPU/pal-metadata-3.0-callable-dvgpr.ll
+84-152 files not shown
+88-188 files

LLVM/project cadee02 — llvm/lib/Target/AMDGPU/Utils AMDGPUPALMetadata.h, llvm/test/CodeGen/AMDGPU pal-metadata-3.6.ll pal-metadata-3.6-dvgpr.ll

AMDGPU: Emit .backend_stack_size for entry points

Currently, the `.backend_stack_size` PAL metadata is only emitted for
functions, but some of the consumers expect it to exist for the entry
points too (without it, if the entry point uses more scratch than any
other functions in the pipeline then we will allocate too little
scratch).

The meaning is the same for entry functions as it is for non-entry
functions: the stack size of the current function plus any of its
non-chain callees.

Unlike `.scratch_memory_size`, this does not get rounded up to 16.

Assisted-by: AI
DeltaFile
+7-5llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
+5-0llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h
+4-0llvm/test/CodeGen/AMDGPU/pal-metadata-3.6.ll
+4-0llvm/test/CodeGen/AMDGPU/pal-metadata-3.6-dvgpr.ll
+4-0llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
+4-0llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
+28-514 files not shown
+55-520 files

LLVM/project c5820fe — llvm/test/CodeGen/AMDGPU amdpal-chain-metadata.ll

AMDGPU: Precommit testcases for stack metadata. NFC
DeltaFile
+119-4llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
+119-41 files

LLVM/project 808897f — llvm/lib/Target/AMDGPU AMDGPUMCResourceInfo.cpp AMDGPUResourceUsageAnalysis.cpp, llvm/test/CodeGen/AMDGPU amdpal-chain-metadata.ll

AMDGPU: Don't include stack size of chain callees

Chain callees are always tail called into and overwrite the caller's
stack. Therefore, their stack size should not be added up to that of
their caller when computing the resource usage.

Assisted-by: AI
DeltaFile
+6-6llvm/test/CodeGen/AMDGPU/amdpal-chain-metadata.ll
+5-3llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+4-1llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
+15-103 files

pkgng/pkgng 4b07e03 — libpkg pkgsign.c pkg_repo.c, libpkg/private pkg.h pkgsign.h

Add support for signers to override the digest implementation.

Add the ability for a signing implementation to specify a digest
implementaiton.  If no callback is defined, use SHA256.

The cache of fingerprints is suboptimally calculated as both SHA256 and
SHA512 of the signing public key (called cert in the code) instead of
detecting which types of hashes we have. This should probably be cleaned up
for the future to allow for a dynamic selection of hash implementation
instead of statically supporting the two.
DeltaFile
+28-21libpkg/pkg_repo_create.c
+22-0libpkg/pkg_repo.c
+10-0libpkg/pkgsign.c
+7-0libpkg/private/pkgsign.h
+2-1libpkg/private/pkg.h
+69-225 files

pkgng/pkgng d9fb84d — libpkg pkg.h.in pkg_repo_create.c, libpkg/private pkg.h

signing: Phase 1 rework of external signing support.

Add variables for type, cmd, and key. Add associated setter calls.
Add pkg_repo_create_set_password_cb and add a setter call.
Remove the header for pkg_repo_create_set_sign. New impl should use the discrete calls.
Remove unneeded headers.
DeltaFile
+30-15src/repo.c
+24-0libpkg/pkg_repo_create.c
+4-1libpkg/pkg.h.in
+3-0libpkg/private/pkg.h
+61-164 files

pkgng/pkgng 3514c03 — libpkg pkg_repo.c

Convert pkghash -> hash.

Updated due to 4f843498b21b032d5fdf838a88122cf4cd5e7294
DeltaFile
+2-2libpkg/pkg_repo.c
+2-21 files

pkgng/pkgng fd93e46 — libpkg pkg_repo_create.c, libpkg/private pkg.h

signing: Phase 2 rework of external signing support.

Get rid of the argv/argc style external command handling to using the
newer struct members. Since the process spawner just string joins all of
the argv components and runs it with sh -c, just do that directly.

Convert pkg_repo_create_set_sign to use new API calls.
Convert exec_repo handling of old style calls to the new API calls.
Also add some additional checks in the getopt handling.
DeltaFile
+49-45libpkg/pkg_repo_create.c
+43-6src/repo.c
+0-2libpkg/private/pkg.h
+92-533 files

LLVM/project 9678fe7 — libc/include libintl.yaml, libc/src/libintl CMakeLists.txt gettext.h

[libc] Add gettext and gettext_l stubs (#233603)

Added stateless stubs for gettext and gettext_l behind
LLVM_LIBC_ENABLE_EXPERIMENTAL_ENTRYPOINTS. In the "C" locale, POSIX
requires the gettext family to return the input msgid pointer unchanged
without modifying errno.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+28-0libc/src/libintl/gettext_l.cpp
+26-0libc/src/libintl/gettext_l.h
+26-0libc/src/libintl/gettext.cpp
+25-0libc/src/libintl/gettext.h
+18-0libc/src/libintl/CMakeLists.txt
+13-0libc/include/libintl.yaml
+136-010 files not shown
+167-016 files

LLVM/project a6e1970 — clang/lib/StaticAnalyzer/Core SimpleSValBuilder.cpp

[NFC][analyzer] Untangle logic of tryRearrange (#233441)

Remove redundant and over-complicated parts of the `tryRearrange` logic
in `SimpleSValBuilder.cpp`. The new code is bug-for-bug equivalent to
the old one, but should be easier to understand.

This prepares the ground for follow-up changes that will address the
FIXMEs and perhaps apply other improvements in this logic.
DeltaFile
+67-98clang/lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp
+67-981 files

LLVM/project 4b8efdd — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-streaming-mode-fixed-length-fp-to-int.ll

[LLVM][CodeGen][SME] Fix vector bfloat-int lowering when in streaming mode. (#232386)

When lowering bfloat operations we typically rely on VectorLegalizer to
promote and split operations. This means custom lowering code can
sometimes see types it doesn't expect.

Fixes https://github.com/llvm/llvm-project/issues/232248
DeltaFile
+1,174-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
+4-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1,178-02 files

LLVM/project b375d9a — llvm/lib/Analysis InlineCost.cpp, llvm/test/Transforms/Inline free-binop-cost.ll

[InlineCost] Ask TTI whether unsimplified binops are free

visitBinaryOperator charged every unsimplified binary operator without
consulting TTI, unlike casts, GEPs and other instructions. Return TCC_Free
from TTI::getInstructionCost as visitCastInst does.

This is a reland of #232397 restricted to binary operators. Compares are
left out because very few compare are currently counted as free, yet
this where we started to spend the majority of the queries. Originally
this caused the compile-time regression that led to the revert (#232907).
DeltaFile
+30-0llvm/test/Transforms/Inline/free-binop-cost.ll
+2-1llvm/lib/Analysis/InlineCost.cpp
+32-12 files

LLVM/project c65e379 — openmp/device/src Reduction.cpp

[OpenMP][offload] Fix wave32 handling of xteam reductions (#233096)

Co-authored-by: Joseph Huber <huberjn at outlook.com>
DeltaFile
+4-1openmp/device/src/Reduction.cpp
+4-11 files

LLVM/project a9c9454 — clang/test/CIR/CodeGen call-conv-lowering-amdgpu-cxx-records.cpp call-conv-lowering-amdgpu-return-types.c, clang/test/CIR/CodeGenHIP cleanup-alloca-addrspace.hip lambda-reference-var.hip

[CIR] Enable CallConvLowering for AMDGPU triples
DeltaFile
+165-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-arg-types.c
+158-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-return-types.c
+137-0clang/test/CIR/CodeGenHIP/call-conv-lowering-amdgpu-kernel-args.hip
+74-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-cxx-records.cpp
+4-4clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
+6-2clang/test/CIR/CodeGenHIP/lambda-reference-var.hip
+544-63 files not shown
+558-129 files

LLVM/project b71a005 — llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/test/CodeGen/AArch64 fsh.ll overflow-vec.ll

feat(gisel): mirror trunc/xor/select demanded bits

Mirror SelectionDAG demand propagation, known-bits folding, truncation
of logical shifts, and XOR narrowing and constant simplifications.
Respect shared producers, legality and target profitability, including
AArch64 XOR/shift commuting. Preserve integer LLTs when narrowing.
DeltaFile
+508-508llvm/test/CodeGen/AArch64/overflow-vec.ll
+744-0llvm/test/CodeGen/AArch64/GlobalISel/combine-simplify-demanded-bits-trunc-xor-select.mir
+365-365llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+159-172llvm/test/CodeGen/AArch64/fsh.ll
+208-5llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+83-83llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+2,067-1,13321 files not shown
+2,396-1,41127 files

LLVM/project a1ea5ef — llvm/lib/Target/LoongArch LoongArchISelLowering.h LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch bstrins-bstrpick-known-bits.ll

[LoongArch] Compute known bits and sign bits for BSTRINS/BSTRPICK

BSTRINS and BSTRPICK are formed early by DAG combines, so the generic
known-bits and sign-bits analyses see them as opaque target nodes. When
such a value is live out of a block, its LiveOutInfo is lost and PHIs
merging it can no longer prove that the value is already sign- or
zero-extended, leaving redundant addi.w/bstrpick.d behind.

This is common in Rust code decoding UTF-8, e.g. `str::chars().rev()`,
where the multi-byte path assembles the code point with bstrins.d and is
merged with the ASCII byte loaded by ld.b before an i32 compare.

rustc-perf svg-parse-1 on LA664: instructions -2.4%, cycles -1.7%.
DeltaFile
+41-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+1-5llvm/test/CodeGen/LoongArch/bstrins-bstrpick-known-bits.ll
+4-0llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+46-53 files

LLVM/project f4f202d — llvm/test/CodeGen/LoongArch bstrins-bstrpick-known-bits.ll

[LoongArch][NFC] Pre-commit tests for BSTRINS/BSTRPICK known bits
DeltaFile
+140-0llvm/test/CodeGen/LoongArch/bstrins-bstrpick-known-bits.ll
+140-01 files

LLVM/project 6f9ccf9 — offload/plugins-nextgen/amdgpu/dynamic_hsa hsa_ext_amd.h, offload/plugins-nextgen/amdgpu/src rtl.cpp

[Offload][AMDGPU] Create a host device for each CPU agent (#233099)

Currently, the AMDGPU plugin allocates kernel arguments from the kernarg
pool of the first CPU agent, so on systems with more than one NUMA node
most GPUs read their kernel arguments from remote memory. On a 4-socket
MI300A system, this makes kernel launches on GPUs 1-3 noticeably slower
than on GPU 0.

This PR creates a host device for each CPU agent, and each GPU device
uses the host device of its nearest CPU agent, which is queried with
`HSA_AMD_AGENT_INFO_NEAREST_CPU`. If the query fails, the GPU device
falls back to the first host device as before. CPU agents without kernel
args or fine-grained memory pools are skipped.

ROCr does the same for its own kernarg allocations
([`GpuAgent::InitAllocators()`](https://github.com/ROCm/rocm-systems/blob/fc0010cf6a5a972d42b276df946510f30343d493/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp#L2490-L2491)
uses
[`GetNearestCpuAgent()`](https://github.com/ROCm/rocm-systems/blob/fc0010cf6a5a972d42b276df946510f30343d493/projects/rocr-runtime/runtime/hsa-runtime/core/runtime/amd_gpu_agent.cpp#L2536-L2548)),
and HIP also picks the nearest CPU agent for host allocations

    [18 lines not shown]
DeltaFile
+77-57offload/plugins-nextgen/amdgpu/src/rtl.cpp
+1-0offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
+78-572 files

LLVM/project ea56a88 — utils/bazel/llvm-project-overlay/lldb BUILD.bazel, utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel

[Bazel] Fixes 64bccb9, d868984 (#233802)

Fixes 64bccb9d9ac016ec576971b1591fd8e82e7be801
Fixes d868984fced31e00e7e8b10e2f2baeb944494349
DeltaFile
+16-0utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+15-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/mlir/test/Dialect/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+33-04 files

LLVM/project 12edad3 — clang/include/clang/StaticAnalyzer/Core/PathSensitive CheckerContext.h

[NFC][analyzer] Clean up CheckerContext::addTransitionImpl (#231180)

The methods of `CheckerContext` that create exploded nodes (e.g.
`addTransition`, `generateErrorNode` etc.) had a very convoluted and not
entirely correct implementation with lots of tricky corner cases. The
situation was worsened by the fact that the comments accompanying this
logic were often misleading or even factually inaccurate.

For more details, see the discourse thread
https://discourse.llvm.org/t/simplifying-failure-modes-in-explodednode-creation/91542/8

This change tries to simplify this logic as much as possible, but
rigorously preserves bug-for-bug compatibility and the public API (even
when it does not make sense).

This will serve as a foundation onto which I can build separate commits
that fix the buggy logic and streamline the public API (to remove
redundancy that has caused serious misunderstandings in the past).
DeltaFile
+114-81clang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
+114-811 files

LLVM/project c1abccc — lldb/test/API/api/multithreaded/stop_hook TestMultithreadedStopHook.py

[lldb][test] Disable TestMultithreadedStopHook.py (#233788)
DeltaFile
+1-3lldb/test/API/api/multithreaded/stop_hook/TestMultithreadedStopHook.py
+1-31 files

LLVM/project 80ca9ad — clang/test/CIR/CodeGen call-conv-lowering-amdgpu-cxx-records.cpp call-conv-lowering-amdgpu-return-types.c, clang/test/CIR/CodeGenHIP lambda-reference-var.hip cleanup-alloca-addrspace.hip

Move AMDGPU triple mapping and clang tests to a follow-up
DeltaFile
+0-165clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-arg-types.c
+0-158clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-return-types.c
+0-140clang/test/CIR/CodeGenHIP/call-conv-lowering-amdgpu-kernel-args.hip
+0-74clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-cxx-records.cpp
+2-6clang/test/CIR/CodeGenHIP/lambda-reference-var.hip
+4-4clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
+6-5473 files not shown
+12-5619 files

LLVM/project cc5a131 — clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp

Address review: abiTypeToCIR pointer case
DeltaFile
+4-3clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+4-31 files

LLVM/project eb1b8aa — clang/include/clang/Analysis ProgramPoint.h

[analyzer] Fix missing ElementRef in ProgramPoint::withTag (#231515)

The method `ProgramPoint::withTag` intended to return a `ProgramPoint`
that is the same as the original, but has a different `Tag`. However,
when commit d65379c8d4768ddae143672f5d4827acafe22553 introduced the
field `ElemRef` in 2023, it forgot to mention it in this method, so now
the `ElemRef` of the `ProgramPoint`s returned by `withTag` was always
`{nullptr, 0}` instead of the intended value.

This commit fixes this oversight and restores the intended semantics of
`withTag`.

Issue reported by Claude at
https://github.com/llvm/llvm-project/pull/231180#pullrequestreview-5504002161,
commit was created manually.
DeltaFile
+2-2clang/include/clang/Analysis/ProgramPoint.h
+2-21 files

FreeBSD/ports 9321bf8 — net/eturnal distinfo Makefile

net/eturnal: Update 1.12.2 => 1.12.3

Changelog:
https://github.com/processone/eturnal/releases/tag/1.12.3

- Optimize do-install.

PR:             299614
Sponsored by:   UNIS Labs (vvd, commit patch)
MFH:            2026Q4

(cherry picked from commit 3ad765f15b7bf91a2a11382c98ef65ba904d3373)
DeltaFile
+17-21net/eturnal/Makefile
+17-17net/eturnal/distinfo
+34-382 files