[lldb] Fix incorrect Python property bindings in SBExtensions. (#215283)
Several Python property definitions in the SB extension interface files
were incorrectly copy-pasted during the
["Don't use SWIG internals
refactor"](https://github.com/llvm/llvm-project/commit/89b658428bae3b749f174ca79f0fe390451d8f69)
causing properties to shadow earlier definitions instead of exposing new
functionalities.
Rename each duplicate to its intended property name and wire it to the
correct underlying method.
Add add new API tests to cover the issue.
- SBModule: compile_unit -> section.
- SBType: is_function -> is_reference.
- SBTypeSummary is_function_code -> is_function_name.
ixgbe: Preserve the full VF RSS domain in the shared RETA
The 82599 and X540 share the global RSS redirection table between the
PF and its VFs. Programming that table from the PF queue count
prevents a VF from using queue indices absent from the PF layout. A
one-queue PF consequently directs every flow for a two- or four-queue
VF to queue zero.
Program at least four queue indices while SR-IOV is active. Each pool
PSRTYPE.RQPL field masks the shared table to the queue subset available
to that function, so the PF can continue using fewer queues.
MFC after: 2 weeks
wip/tcl-expect-git: import tcl-expect-5.45.5
Expect is a program that performs programmed dialogue with other
interactive programs. It is briefly described by its man page, expect(1).
It uses pseudo-tty's to control the child processes, so it is not affected
by programs that refuse to read from stdin or pipes. (eg: passwd(1) etc).
[clang][Headers] Fix typo in documentation of cpuid.h (#215316)
Fix extended leaf hex value from 0x8000000 to 0x80000000 in the doxygen
comment for __get_cpuid_max, and correct the description of its return
value behavior when CPUID is unsupported.
ixgbe: Add 10GBase-BX BiDi SFP+ module support
10G-BX optics use paired wavelengths to carry 10 Gb/s Ethernet over a
single strand of single-mode fiber. Their 10G compliance byte is
empty, so identify them from the SFF-8472 nominal signaling rate and
single-mode reach fields.
When an EEPROM also advertises 1G BASE-BX10, give the complete 10G
bitrate and reach signature precedence. Otherwise retain FreeBSD's
permissive 1G-BX identification rather than requiring a nominal
1.3 GBd rate.
MFC after: 2 weeks
Relnotes: yes
[SDAG] Make FNEG and FCOPYSIGN expansions handle vectors (#214545)
PR #214341 resolved a bug where the expansion of FABS wasn't correctly
unrolling vector operands before invoking getSignAsIntValue(). This bug
was identified in the expansions for FCOPYSIGN and FNEG, but I didn't
fix it in that PR because I couldn't find a target that triggered these
expansion patterns.
Therefore, this followup PR fixes the bug in case someone someday uses
these codepaths again.
[lit] Address scaling problems with ProcessPoolExecutor (#214853)
The executor implementation failed to account for how work distributes
across high core count machines. Up to about 64 cores/threads scaling
progresses linearly. However, beyond that the polling overhead, and lack
of scheduling, caused a major regression in high core count machines.
This PR addresses those issues in two ways. First, removes IPC events by
using a SimpleQueue with callbacks, which only fire on events and
removes many polling updates. Second, it batches tests to further limit
the amount of IPC events being tracked. Empirically, even a batch_size
of 2 was enough to dramatically improve overall throughput. This is
tunable through the LIT_BATCH_SIZE environment variable.
Additionally, we change SUBMISSION_WINDOW_PER_WORKER from 4 to 8, as
this was a better balance across both low and high core count machines.
On an AMD Ryzen Threadripper PRO 3995WX 64-Cores, 128 thread, 256 GB RAM
The execution time for check-llvm went from 105.2s to 48.38s, making the
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[ADT][Reassociate] Invalidate stale UniformityInfo entries on instruction erase (#214719)
`GenericUniformityAnalysisImpl::UniformValues` never removes an entry
when its value is erased. Reassociate keeps one `UniformityInfo` for the
whole pass while creating and deleting instructions, so a new
instruction can reuse a freed one's address and inherit its stale
"uniform" verdict instead of the documented divergent default. This
makes rank-boosting depend on heap addresses
Add `forgetValue()` (following the same idea as
`ScalarEvolution::forgetValue`) and call it at Reassociate two erase
sites
As a result of this issue we have a side effect that is reproducible on
https://github.com/llvm/llvm-project/pull/214624: nondeterministic
operand ordering in Reassociate output, because a newly-created
instruction can spuriously be classified "uniform" instead of the
documented default of divergent depending on whether the allocator
happened to reuse a freed instruction address
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net: Add ifmedia support for 10GBase-BX BiDi
10GBase-BX uses paired wavelengths to carry both directions over a
single strand of single-mode fiber. The optics must be paired so that
the transmit and receive wavelengths cross over.
MFC after: 2 weeks
[MLIR][Mem2Reg] Add support for memref.alloca_scope (#214221)
This PR implements `PromotableRegionOpInterface` for
`memref.alloca_scope`. This widens the range of programs that can be
processed by Mem2Reg pass.
[flang][OpenMP] Fold canonical loop trip counts during lowering (#215238)
Canonical loop lowering currently materializes the complete trip-count
arithmetic even when the loop bounds and step are compile-time
constants.
Use FirOpBuilder::createOrFold for the comparisons, selects,
subtraction, unsigned division, and addition in the trip-count prologue.
This folds constant trip counts while preserving the existing dynamic
lowering and overflow flags.
Add bare-unroll lowering coverage for ascending, descending, zero-trip,
non-unit-step, dynamic, and i64 loops.
I'm doing this because
1) Surprisingly, no canonicalization pass between lowering and LLVM-IR
translation is doing this already. Folding here saves us building
LLVM instructions just for the middle-end to fold it.
2) This could simplify some analysis for #214115
Assisted-by: Codex
ixgbe: Validate EEPROM checksum section bounds
The generic checksum walker trusts NVM section pointers and lengths and
iterates with a 16-bit index. A corrupt section that crosses the end of
the EEPROM can wrap the index and leave the driver in an effectively
unbounded read loop during attach.
Validate each non-empty section against the discovered EEPROM word size
before reading it, and use widened arithmetic for the inclusive end and
iterator.
MFC after: 2 weeks
ixgbe: Restore missed packet accounting
missed_rx and total_missed_rx are never populated. As a result, the
GPRC erratum workaround does not remove missed packets and iqdrops
always remains zero. The rx_missed_packets sysctl and input-error total
also expose only MPC bank zero.
Read and accumulate all eight MPC banks. Use the interval total to
correct GPRC and the cumulative total for iqdrops, input errors, and the
aggregate sysctl. This matches DPDK's coverage of the hardware banks.
MFC after: 2 weeks
ixgbe: Preserve VF jumbo frame size across PF resets
sc->max_frame_size represents the largest frame requested by the PF or
an active VF. The MTU callback replaces it with the PF frame size, so
a subsequent reinitialization can program MHADD below an active VF's
jumbo-frame request.
Recompute the aggregate before hardware initialization and use it when
programming MHADD. Recompute after each VF LPE request as well, so a
reduced request can lower the hardware limit when no other function
needs the previous value.
MFC after: 2 weeks
ixgbe: Expose EEE LPI event counters
X550-family devices provide clear-on-read counters for transmit and
receive Low Power Idle events. Accumulate each register once in the
normal statistics poll and expose the monotonic totals below the eee
sysctl node. Document the counters together with the existing EEE
control.
Obtained from: Intel ix 3.4.39
MFC after: 2 weeks
ixgbe: Compare flow control against requested mode
The flow-control sysctl represents the configured policy, while
current_mode is the mode negotiated with the link partner. Comparing a
new request with current_mode can needlessly reprogram an unchanged
policy or skip a requested policy change that happens to match the
current negotiation result.
Compare with requested_mode before deciding that no update is needed.
MFC after: 2 weeks
ixv: Report multigigabit link speeds
The VF link-status path can receive 2.5 and 5 Gb/s speed bits from
X550-family PFs, but media reporting has no cases for them. The
bootverbose message also assumes every non-10-Gb/s link is 1 Gb/s.
Expose the corresponding ifmedia subtypes and derive the diagnostic
speed through the shared link-speed conversion helper.
MFC after: 2 weeks
[flang][Lower] Add complex sum reassociation (#214775)
Third part of generalisations requested in #207377.
Extend the experimental split-sum transformation to complex addition and
subtraction chains. Share the signed-term builder across explicitly
supported real and complex categories while keeping integer expressions
excluded.
There are no known effect on benchmarks as a result of this patch.
Assisted-by: Codex
[lldb] Fix MSVC warnings about missing return values (#215313)
MSVC warns with
[C4715](https://learn.microsoft.com/en-us/cpp/error-messages/compiler-warnings/compiler-warning-level-1-c4715)
about missing returns in functions where a `switch` over and enum
handles all names enumerators, because the enum could hold unnamed
values. For example, given an `enum class Foo { Bar, Baz }` a function
handles both `Bar` and `Baz` by returning a value, Clang and GCC won't
issue warnings, but MSVC will.
This handles the cases in the two locations I found.
