[ELF] Range-check the x86-64 GD-to-IE TLS optimizations
Add range-checks to relaxTlsGdToIe so that they fail when the PC-relative
displacement is larger than 32-bit (signed). The un-relaxed paths in
X86_64::relocate already do this via checkInt()
Assisted-By: Opus 5
[ConstraintElimination] Allow pointer types in tightenBoundUsingNe (#223215)
Allow pointer types in ConstraintInfo::tightenBoundUsingNe() for the
unsigned system. When A != B is known and the system already implies A
u>= B, tighten the bound to strict inequality A u> B (symmetrically, A
u<= B becomes A u< B).
Added lit tests in
llvm/test/Transforms/ConstraintElimination/pointer-tighten-ne.ll.
hwpmc/amd: replace static pmcdesc[] and pc_amdpmcs[] with dynamic allocation
AMD_NPMCS_MAX = 342 (16 core + 6 L3 + 64 DF + 256 UMC). On a Zen 4
EPYC 9654 with 6 core, 6 L3, 16 DF, and 4 UMC counters, only 32
descriptors are needed; the static arrays over-allocate by ~10x.
Replace both amd_pmcdesc[AMD_NPMCS_MAX] and per-CPU pc_amdpmcs[AMD_NPMCS_MAX]
with mallocarray() sized to the actual registered PMC count:
- amd_pmcdesc: allocated in pmc_amd_initialize()
- pc_amdpmcs: allocated per-CPU in amd_pcpu_init(), freed in fini()
Normalize amd_l3_npmcs and amd_df_npmcs against the AMDID2_PTSCEL2I
and AMDID2_PNXC feature bits before computing npmcs_total, so that
allocation, registration, and amd_get_msr() row offsets are all derived
from the same values. Previously the ternary in npmcs_total excluded
L3/DF from the allocation while the globals retained their defaults,
causing amd_get_msr() to miscompute DF row offsets when L3 is absent.
amd_umc_npmcs comes from CPUID Fn8000_0022h EBX[23:16] (NumUMCCounters)
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riscv: enable gpiopower driver
It is functional, and there are some RISC-V platforms which can benefit
from it.
Requested by: Brian Scott <bscott at bunyatech.com.au>
Sponsored by: The FreeBSD Foundation
eqos: Reduce RX error noisiness
Reduce very common console messages:
Receive error rdes3=30208000
As observed on the VisionFive v2 hardware after some large transfers.
Differentiate between overflow errors and others. Report the errors when
the length is non-zero (overflow errors).
Also, count errors for netstat purposes.
Reviewed by: mhorne
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D59479
[CodeGen][AMDGPU] Add opt-in partial SGPR spills
A wide scalar load can have just one word live after its early uses. A
buffer resource can also be split while its fields are being
constructed. Full-width spills save words that are not needed at those
points.
Add a target hook to save selected lanes at their original spill-slot
offsets while preserving the other words. Use it for AMDGPU SGPR tuples,
protect partially written slots from whole-value spill optimizations,
and remove unchanged word stores after matching reloads.
Keep this behind `-enable-partial-spills`, disabled by default.
Unsupported targets and register classes retain their existing spill
policy. Tests based on loaded tuples and buffer resources let the
allocator generate the split relationships from LLVM IR.
Partially revert "[libcxx] Move premerge jobs to k8s mode runner set (#221395)" (#224717)
This patch partially reverts commit 028cdb4b9ec09: it only reverts
changing the runner set for the libcxx-pr-test-tools.yml workflow, which
started failing for an unknown reason since the change.
This is temporary until we figure out the problem and switch the
workflow again.
[BOLT] Don't report an ignored build-id mismatch as an error
With `-ignore-build-id`, a build-id mismatch still printed
PERF2BOLT-ERROR: failed to match build-id from perf output. ...
Use -ignore-build-id option to override.
and then carried on normally. Fix the messaging to reduce noise in logs.
[CI][AMDGPU] Add clean up step for HIP test (#224177)
The bot failed because the GPU core dumps took all the disk space. Added
a step in the HIP build script to clean them up before building the
tests in each run.
[BOLT] Make .debug_names emission reproducible
Summary:
--update-debug-sections does not produce the same binary twice when the
input has a .debug_names section, or is given one with
--create-debug-names-section. Three sections vary from run to run:
.debug_str, .debug_names and .debug_str_offsets. On a two-CU
split-DWARF test binary, ten runs of the same llvm-bolt produced three
different outputs.
PR #197859 made the per-bucket work merge in partition order precisely so
the output would be reproducible, but missed this section. Two issues:
- .debug_str offsets were handed out from the workers, so main.dwo.dwo
added by the merge step lands in a different place in each
run. The string offsets stored in .debug_names follow from it, and
so does .debug_str_offsets;
- hash colliding names were ordered by insertion (worker) order, also
non-deterministic.
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[CIR] Split side_effect into memory effects, nounwind, and willreturn (#223890)
`side_effect` was carrying three facts at once. It described the memory
a callee may touch, and it was also the only thing lowering derived
`nounwind` and `willreturn` from, so any callee with a known memory
effect got both. That is wrong for one that can throw, and `willreturn`
had no other representation in CIR at all.
`const`, `pure` and `noalias` now record the three separately, and the
enum is replaced by a structured `#cir.memory_effects` carrying the same
six ModRef slots as the LLVM dialect. It has no keyword syntax of its
own, so on an operation it sits in the attribute dictionary.
The only change in emitted IR is for `__declspec(noalias)`, which the
old enum could not express, and which now gets
`inaccessibleOrArgMemOnly` and `nounwind` to match classic. Everything
else lowers exactly as it did.
Assisted-by: Cursor / claude-opus-5
x11/nvidia-driver*: Drop pkg-message
All contents of pkg-message are applicable for kmods part
(x11/nvidia-kmod*) only.
This was the remnant when kmods part were splitted out from
x11/nvidia-driver* at commit ports f4e907a49258.
PR: 298709
Differential Revision: https://reviews.freebsd.org/D59864
[SandboxIR] Implement Value::stripAndAccumulateConstantOffsets() (#224784)
This patch implements the Sandbox IR version of
Value::stripAndAccumulateConstantOffsets(), mirroring LLVM IR.
Add support for mach-o symbol stubs. (#225155)
This patch add support for making symbols from the symbol stubs in
mach-o files. Symbol stubs are found in sections that whose type is
S_SYMBOL_STUBS and using these setions along with the indirect symbol
table, we can make symbols for the PLT entries for external functions.
Some crashes occur in these stubs and previous to this fix those
addresses might be incorrecty associated with the last real symbol from
the symbol table and cause confusion and incorrect stack attributions in
symbolication workflows.
[CIR] Drop the stale callconv opt-out from two CIR tests (#225180)
`bitfields.cpp` was waiting on padded, packed and over-aligned record
shapes. `uncopyable-args.cpp` was waiting on parameters of an empty or
tag class. Both files now compile and check clean with the pass running,
so the `-fno-clangir-call-conv-lowering` opt-out and its TODO header are
removed and the tests exercise the pass as written. Neither file changes
a CHECK directive.
Assisted-by: Cursor / claude-opus-5
[flang][OpenMP] Annotate some directive and clause names
There are some directives that share the same spelling, but have
different functionality. The same is true for clauses. When getting
the upper-case name of such a directive or a clause, optionally
(and by default) add an annotation about the kind of the directive
or clause.
For example, a standalone ORDERED directive will be displayed as
"ORDERED (standalone)". This was already done, for this directive,
but not in all cases.
Add entries for third-party projects I maintain
Add myself formally as the "maintainer" for atf, kyua, and lutok, both
in the GitHub CODEOWNERS and MAINTAINERS files.
This change matches the herald rules I recently setup for these
third-party components.
[AMDGPU] Fold fpround of fadd and fsub into v_mad/fma_mixlo and mixhi
MadFmaMixFP32Pats turns (fadd x, y) into (fma x, 1.0, y) and (fsub x, y)
into (fma (-y), 1.0, x) so the mix instructions absorb the operation along
with the f16 or bf16 source modifiers. MadFmaMixFP16Pats and
MadFmaMixFP16Pats_t16 only did this for fmul, so a rounded result still
needed a separate convert for a rounding the mix instructions perform
themselves.
Unlike the f32 patterns these do not require an operand to be an fpextend
of an f16, since an fpround on the result always removes the convert. The
rewrite is exact because the mix instructions round the f32 result again
when they write the 16-bit destination, so it stays f32_to_f16(fma(x, 1.0,
y)).
Assisted-by: Claude Code Opus 5
[clang][openmp] Avoid generating geometry for Bare kernels (#225185)
Don't use the information from num_teams or thread_limit clauses to
initialize the Kernel Environment of bare kernels. They only support one
single dimension and for NVIDIA (only) we generate a "nnvm.maxntid"
attribute which is incompatible with the multi-dimensional launch that
happens at runtime.
Fixes a regression introduced by #223772
[ORC] Rename ConnectionSpec's fd transport to socket:adopt (#225075)
A ConnectionSpec's transport field says what kind of thing the
descriptor names, and "fd" named a representation rather than a kind. It
also left no room for a pipe transport, which takes two descriptors and
a different server.
The transport becomes "socket", and adopting a handed-over handle
becomes an explicit "adopt" action rather than the absence of one. So
"tcp" names an endpoint to reach while "socket" names a handle already
held, and a spec states how the process came by its channel -- worth
spelling out, since "adopt", "connect" and "listen" do not carry the
same trust.
llvm-jitlink-executor takes "socket:adopt=<fd>" in place of "fd=<fd>"
and rejects any other action for that transport. The spec is an internal
handoff from llvm-jitlink in every in-tree use, so nothing else needed
updating. The class comment is rewritten around the same split and stops
describing transports that do not exist yet.
Matches the scheme the ORC runtime uses for its connector registry.
[ORC] Mangle NativeDylibManager CI names as C (#225096)
Flip the NativeDylibManager descriptors (instance + load/lookup) from
Verbatim to C, so their names carry the target's C mangling. Served by
the in-tree SimpleExecutorDylibManager; controller and executor mangle
the same specs and nothing else defines these names.
Also give the CreateFromExecutionSession test EPC the process triple,
matching the memory-manager fix (its bootstrap symbols were keyed with
the process triple but the EPC had an empty target triple).
