[BOLT] Gate PointerAuthCFIFixup unit test on AArch64 target availability (#197464)
The test bodies reference AArch64:: namespace identifiers (ADDSXri, X0)
which fail to compile when AArch64 is not in LLVM_TARGETS_TO_BUILD. Wrap
all TEST_P bodies in #ifdef AARCH64_AVAILABLE and add
GTEST_ALLOW_UNINSTANTIATED_PARAMETERIZED_TEST to suppress GoogleTest's
uninstantiated suite error when no target instantiates the tests.
[libc] Add struct sockaddr_in (#197909)
The struct needs to be 16 bytes long for compatibility with the linux
kernel (which rejects smaller sizes, even though the reset of the bytes
are unused).
The padding field (and its name) is not specified by POSIX, but it's
traditionally called sin_zero, and there exists a fair amount of code
that references that name, so I'm matching it as well.
I'm testing the compatibility of this struct by binding to a localhost
address. This test requires that the machine has a loopback interface
with an assigned ipv4 address. If some of the environments do not have
it, we can try to detect this in the test and skip it, but this would
diminish the value of the test.
As a drive-by, I'm also adding the (non-POSIX) INADDR_LOOPBACK constant.
Assisted by Gemini.
[AtomicExpand] Add bitcasts when expanding store atomic vector
AtomicExpand fails for aligned \`store atomic <n x T>\` because it
does not find a compatible library call. This change adds appropriate
ptrtoint + bitcast so that the call can be lowered, mirroring the
load-side handling from #148900.
[X86] Cast atomic vectors in IR to support floats
Extend the X86 \`alignedstore\` PatFrag to also match \`atomic_store\`
with vector-size alignment, so existing MOVAPS/MOVAPD/MOVDQA-family
aligned-store patterns cover 128-bit aligned vector atomic stores on
SSE/AVX/AVX-512 without per-type duplicates. \`<4 x float>\`,
\`<2 x double>\`, \`<2 x i64>\`, \`<4 x i32>\`, \`<8 x half>\`, \`<8 x bfloat>\`
all codegen to a single \`movaps\`/\`movapd\` on AVX+ via this.
Adds v8f16/v8bf16 bitconvert variants to the widen-path
\`atomic_store_32\` / \`atomic_store_64\` patterns so \`<2 x half>\`,
\`<2 x bfloat>\`, \`<4 x half>\`, \`<4 x bfloat>\` atomic stores reaching
the PR4 widen path also collapse to a single instruction on AVX+
targets.
Vectors whose \`getTypeAction\` is split rather than widen still rely
on PR6's \`SplitVecOp_ATOMIC_STORE\` — that path bitcasts the vector
to a scalar integer and issues an integer \`atomic_store_N\`, picked
up by the pre-existing scalar atomic-store patterns. The two
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[SelectionDAG] Split vector types for atomic store
Vector types that aren't widened are split so that a single ATOMIC_STORE
is issued for the entire vector at once. This enables SelectionDAG to
translate vectors with type bfloat,half.
[X86] Remove extra MOV after widening atomic store
This change adds patterns to optimize out an extra MOV present after
widening the atomic store. Covers <2 x i8> (SSE4.1+), <2 x i16>,
<4 x i8>, <2 x i32>, <2 x float>, <4 x i16>, <2 x ptr addrspace(270)>.
[SelectionDAG] Widen <2 x T> vector types for atomic store
Vector types of 2 elements must be widened. This change does this
for vector types of atomic store in SelectionDAG so that it can
translate aligned vectors of >1 size.
[X86] Manage atomic store of fp -> int promotion in DAG
When lowering atomic <1 x T> vector types with floats, selection can fail since
this pattern is unsupported. To support this, floats can be casted to
an integer type of the same size.
[SelectionDAG] Scalarize <1 x T> vector types for atomic store
`store atomic <1 x T>` is not valid. This change legalizes
vector types of atomic store via scalarization in SelectionDAG
so that it can, for example, translate from `v1i32` to `i32`.
Revert "[MC/DC][Coverage] Enable profile correlation for MC/DC" (#198520)
The instrprof-mcdc-correlation.c test doesn't pass on Mac, see
discussion on the PR.
Reverts llvm/llvm-project#136437
[cmake][runtimes] Remove unused local CMake flag transform (#198506)
This was used by some code to pass flags per-architecture to runtime builds.
User code can never reach this path and the last use was removed more than a year ago.
Fixes: bd6df0fe21faeaf3fd2a8ad17074f10620c78378
py-click: updated to 8.4.0
Version 8.4.0
- :class:`ParamType` typing improvements. :pr:`3371`
- :class:`ParamType` is now a generic abstract base class,
parameterized by its converted value type.
- :meth:`~ParamType.convert` return types are narrowed on all
concrete types (``str`` for :class:`STRING`, ``int`` for
:class:`INT`, etc.).
- :meth:`~ParamType.to_info_dict` returns specific
:class:`~typing.TypedDict` subclasses instead of
``dict[str, Any]``.
- :class:`CompositeParamType` and the number-range base are now
generic with abstract methods.
- Refactor ``convert_type`` to extract type inference into a private
``_guess_type`` helper, and add :func:`typing.overload` signatures.
:pr:`3372`
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Implement bounce buffers for arm64. Almost identical to the riscv64
version, but for now this strips the BUS_DMA_64BIT flag since the DMA
constraints on arm64 also include bus constraints. This will be fixed
in a future diff.
