HardenedBSD/src f4a04ffsbin/route route_netlink.c, share/man/man9 rtentry.9 nhop.9

Merge remote-tracking branch 'rad/hardened/current/master' into hardened/current/pledge
DeltaFile
+123-0share/man/man9/nhop.9
+78-28sys/netlink/netlink_snl.h
+65-0tests/sys/netlink/test_snl.c
+31-28usr.bin/genl/genl.c
+16-40share/man/man9/rtentry.9
+11-11sbin/route/route_netlink.c
+324-10714 files not shown
+374-15120 files

HardenedBSD/src 3a20788sbin/route route_netlink.c, share/man/man9 rtentry.9 nhop.9

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+123-0share/man/man9/nhop.9
+78-28sys/netlink/netlink_snl.h
+65-0tests/sys/netlink/test_snl.c
+31-28usr.bin/genl/genl.c
+16-40share/man/man9/rtentry.9
+11-11sbin/route/route_netlink.c
+324-10714 files not shown
+374-15120 files

LLVM/project 8548eaellvm/include/llvm/CodeGen CFIInstrInserter.h, llvm/lib/CodeGen CFIInstrInserter.cpp

[NewPM] Port CFIInstrInserter to the new pass manager

Adds a newPM pass for CFIInstrInserter (cfi-instr-inserter).

- Extracts the pass's working state (MBBVector, CSRLocMap) and logic
  into a CFIInstrInserterImpl class with a run method, called by both
  the legacy pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass CFIInstrInserterPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either. run() unconditionally returns
  PreservedAnalyses::all(), matching the legacy pass's own
  AU.setPreservesAll() declaration -- the same shape CFIFixupPass (an
  already-ported sibling CFI pass) already uses.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Wires the pass into X86's and RISC-V's newPM pipelines, matching
  their existing legacy-PM gating conditions:
  - X86 replaces an existing TODO inside an already-correct

    [13 lines not shown]
DeltaFile
+48-30llvm/lib/CodeGen/CFIInstrInserter.cpp
+25-0llvm/include/llvm/CodeGen/CFIInstrInserter.h
+7-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
+2-0llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+88-3513 files not shown
+108-3819 files

FreeBSD/src 60c0a07sbin/route route_netlink.c, sys/netlink netlink_snl_route_parsers.h netlink_snl_generic.h

netlink: Parse repeated nested attributes

Modern Netlink arrays encode their elements as repeated attributes of
the same type rather than as children of an additional array container.

Add an SNL callback that parses one nested element for each occurrence
and appends it to a geometrically grown parser array.  Retain the
existing parray callback for protocols that use the legacy container
form.

Store the growth capacity in struct snl_parray, appended after its
existing public count and items fields so their offsets remain stable
on LP64 and ILP32.  Require parser targets to be real snl_parray
objects, and convert bitset, generic Netlink, and route multipath arrays
accordingly.  This avoids relying on layout aliases for private growth
state.

Add regression coverage for a nested bit array that grows beyond its
initial allocation, while preserving replacement semantics when a

    [5 lines not shown]
DeltaFile
+78-28sys/netlink/netlink_snl.h
+65-0tests/sys/netlink/test_snl.c
+31-28usr.bin/genl/genl.c
+11-11sbin/route/route_netlink.c
+8-10sys/netlink/netlink_snl_generic.h
+4-7sys/netlink/netlink_snl_route_parsers.h
+197-845 files not shown
+211-10011 files

HardenedBSD/src 60c0a07sbin/route route_netlink.c, sys/netlink netlink_snl_route_parsers.h netlink_snl_generic.h

netlink: Parse repeated nested attributes

Modern Netlink arrays encode their elements as repeated attributes of
the same type rather than as children of an additional array container.

Add an SNL callback that parses one nested element for each occurrence
and appends it to a geometrically grown parser array.  Retain the
existing parray callback for protocols that use the legacy container
form.

Store the growth capacity in struct snl_parray, appended after its
existing public count and items fields so their offsets remain stable
on LP64 and ILP32.  Require parser targets to be real snl_parray
objects, and convert bitset, generic Netlink, and route multipath arrays
accordingly.  This avoids relying on layout aliases for private growth
state.

Add regression coverage for a nested bit array that grows beyond its
initial allocation, while preserving replacement semantics when a

    [5 lines not shown]
DeltaFile
+78-28sys/netlink/netlink_snl.h
+65-0tests/sys/netlink/test_snl.c
+31-28usr.bin/genl/genl.c
+11-11sbin/route/route_netlink.c
+8-10sys/netlink/netlink_snl_generic.h
+4-7sys/netlink/netlink_snl_route_parsers.h
+197-845 files not shown
+211-10011 files

FreeBSD/ports 33b2d44security/openbao Makefile distinfo

security/openbao: Update 2.6.1 => 2.6.2

Changelog:
https://github.com/openbao/openbao/blob/v2.6.2/CHANGELOG.md

PR:             297666
Security:       GHSA-rh46-vc3j-w2w3
Security:       GHSA-g892-p242-8g86
Sponsored by:   UNIS Labs
MFH:            2026Q3

(cherry picked from commit 5bfe8bc273fc86ca1525746a8a28a24dbaf82dc9)
DeltaFile
+17-17security/openbao/distinfo
+2-3security/openbao/Makefile
+19-202 files

FreeBSD/ports 5bfe8bcsecurity/openbao Makefile distinfo

security/openbao: Update 2.6.1 => 2.6.2

Changelog:
https://github.com/openbao/openbao/blob/v2.6.2/CHANGELOG.md

PR:             297666
Security:       GHSA-rh46-vc3j-w2w3
Security:       GHSA-g892-p242-8g86
Sponsored by:   UNIS Labs
MFH:            2026Q3
DeltaFile
+17-17security/openbao/distinfo
+2-3security/openbao/Makefile
+19-202 files

HardenedBSD/ports 5bfe8bcsecurity/openbao Makefile distinfo

security/openbao: Update 2.6.1 => 2.6.2

Changelog:
https://github.com/openbao/openbao/blob/v2.6.2/CHANGELOG.md

PR:             297666
Security:       GHSA-rh46-vc3j-w2w3
Security:       GHSA-g892-p242-8g86
Sponsored by:   UNIS Labs
MFH:            2026Q3
DeltaFile
+17-17security/openbao/distinfo
+2-3security/openbao/Makefile
+19-202 files

LLVM/project d207b59llvm/include/llvm/CodeGen FuncletLayout.h, llvm/lib/CodeGen FuncletLayout.cpp

[NewPM] Port FuncletLayout to the new pass manager

Adds a newPM pass for FuncletLayout (funclet-layout).

- Extracts the pass's logic (which has no per-instance state) into a
  shared runFuncletLayout free function, called by both the legacy
  pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass FuncletLayoutPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder
  -- FuncletLayoutPass was already unconditionally invoked from
  CodeGenPassBuilder.h via a DUMMY_MACHINE_FUNCTION_PASS stub, so no
  separate enablement change was needed.
- Fixes four pipeline-dump tests (X86, RISC-V x2, Lanai) whose CHECK
  lines expected the stub's class-name fallback ("FuncletLayoutPass")
  rather than the real pass's registered pipeline name

    [6 lines not shown]
DeltaFile
+31-19llvm/lib/CodeGen/FuncletLayout.cpp
+28-0llvm/include/llvm/CodeGen/FuncletLayout.h
+4-4llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+1-1llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
+1-1llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
+1-1llvm/test/CodeGen/Lanai/llc-pipeline-npm.ll
+66-266 files not shown
+72-2912 files

LLVM/project 4ef5f0bclang/lib/CodeGen CGBuiltin.cpp

s/CAT/CountAttributedTy/
DeltaFile
+5-4clang/lib/CodeGen/CGBuiltin.cpp
+5-41 files

LLVM/project ef645f2llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen FuncletLayout.h

[NewPM] Port FuncletLayout to the new pass manager

Adds a newPM pass for FuncletLayout (funclet-layout).

- Extracts the pass's logic (which has no per-instance state) into a
  shared runFuncletLayout free function, called by both the legacy
  pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass FuncletLayoutPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder
  -- FuncletLayoutPass was already unconditionally invoked from
  CodeGenPassBuilder.h via a DUMMY_MACHINE_FUNCTION_PASS stub, so no
  separate enablement change was needed.
- Fixes four pipeline-dump tests (X86, RISC-V x2, Lanai) whose CHECK
  lines expected the stub's class-name fallback ("FuncletLayoutPass")
  rather than the real pass's registered pipeline name

    [6 lines not shown]
DeltaFile
+31-19llvm/lib/CodeGen/FuncletLayout.cpp
+28-0llvm/include/llvm/CodeGen/FuncletLayout.h
+4-4llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+1-1llvm/lib/CodeGen/CodeGen.cpp
+1-1llvm/include/llvm/Passes/MachinePassRegistry.def
+1-1llvm/include/llvm/InitializePasses.h
+66-266 files not shown
+72-2912 files

LLVM/project d28bc6bllvm/test/CodeGen/AMDGPU llvm.is.fpclass.f16.ll freeze.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fshr.ll fshl.ll

[AMDGPU] Remove more redundant ANDs (#216900)

Remove more redundant AND X, IMM instructions by allowing:

1.  s_and_b32 operations to be processed.
2. IMM can have values beside 0xffff.
3. The instruction defining X can be another AND instruction.
4. IMM can be either source operand.

---------

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+2,569-0llvm/test/CodeGen/AMDGPU/redundant-and.mir
+0-2,191llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
+209-275llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+191-257llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+67-145llvm/test/CodeGen/AMDGPU/freeze.ll
+56-121llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
+3,092-2,98918 files not shown
+3,237-3,17924 files

LLVM/project e27e417llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-freeze.mir regbankselect-fexp2.mir

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
+22-22358 files not shown
+452-452364 files

LLVM/project 6a719c0llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-amdgcn.ptr.s.buffer.load.ll regbankselect-mui-salu-float.mir

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+17-17llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ptr.s.buffer.load.ll
+36-36375 files not shown
+495-495381 files

LLVM/project 4af508dllvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-freeze.mir regbankselect-fexp2.mir

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
+22-22358 files not shown
+452-452364 files

LLVM/project 18f48d7llvm/test/CodeGen/AArch64/GlobalISel arm64-regbankselect.mir, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-whole-wave-functions.mir regbankselect-mad_64_32.mir

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
+2-2llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+20-20198 files not shown
+266-266204 files

LLVM/project 5b1a52dllvm/test/CodeGen/AArch64/GlobalISel arm64-regbankselect.mir, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-whole-wave-functions.mir regbankselect-mad_64_32.mir

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
+2-2llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+20-20198 files not shown
+266-266204 files

LLVM/project 25a7ebbllvm/unittests/ADT FoldingSet.cpp

[ADT] Improve unit test coverage for FoldingSet (#217214)

This patch adds unit tests covering the following previously uncovered
areas of FoldingSet, FoldingSetVector, and ContextualFoldingSet:

- Move semantics (move constructor and move assignment operator of
  FoldingSet).

- Iterators (begin()/end(), exact element traversal, and pre/post
  increment operators).

- FoldingSetVector (basic operations including deduplication, lookup
with
  an insertion token, deterministic iteration order, and clear()).

- ContextualFoldingSet (similar basic operations with contextual node
  profiling).

Assisted-by: Antigravity
DeltaFile
+163-0llvm/unittests/ADT/FoldingSet.cpp
+163-01 files

LLVM/project b234afblldb/include/lldb/DataFormatters TypeFormat.h, lldb/source/API SBTypeFormat.cpp

[lldb] Remove ConstString from TypeFormatImpl_EnumType (#215431)

These type names don't need to be in the ConstString pool. If they ever
need to be deduplicated in the future, we can evaluate different
approaches.
DeltaFile
+6-6lldb/source/API/SBTypeFormat.cpp
+6-4lldb/include/lldb/DataFormatters/TypeFormat.h
+5-4lldb/source/DataFormatters/TypeFormat.cpp
+1-1lldb/source/Commands/CommandObjectType.cpp
+18-154 files

LLVM/project 02f4f7cllvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize div-exact.ll uniform-blend.ll

[VPlan][Predicator] Preserve some uniform control flow

Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack. Does **NOT** improve predication/masking yet, so
applicability is artificially narrowed, only some uniform branches are
preserved. In particular, the following is left for future PRs:

* Block masks still contains now-unnecessary term for the preserved
  uniform branches.
* Mixed blends/phis aren't supported yet. Detecting where they would be
  necessary is as complex as implementing proper support (which would
  need either Luke's `reconstructSSA` or Iterated Dominance Frontier),
  so we also limit it to a trivial/structured CFG where there's only
  single block where those would need to be inserted.

I think even the current version might be enough to start implementing
an alternative to https://github.com/llvm/llvm-project/pull/141900 (see
BOSCC in the paper).
DeltaFile
+81-45llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+102-3llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+45-38llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+32-8llvm/test/Transforms/LoopVectorize/uniform-blend.ll
+18-10llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
+14-6llvm/test/Transforms/LoopVectorize/div-exact.ll
+292-11015 files not shown
+393-13421 files

HardenedBSD/src fdcb52dsys/ofed/drivers/infiniband/ulp/ipoib ipoib_ib.c

ofed/ipoib: convert to timer_setup linuxKPI

Reviewed by:    bz
Sponsored by:   NVidia networking
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D58941
DeltaFile
+6-4sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_ib.c
+6-41 files

FreeBSD/src fdcb52dsys/ofed/drivers/infiniband/ulp/ipoib ipoib_ib.c

ofed/ipoib: convert to timer_setup linuxKPI

Reviewed by:    bz
Sponsored by:   NVidia networking
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D58941
DeltaFile
+6-4sys/ofed/drivers/infiniband/ulp/ipoib/ipoib_ib.c
+6-41 files

FreeBSD/src 814cd91sys/dev/mlx5/mlx5_core mlx5_health.c, sys/dev/mlx5/mlx5_ib mlx5_ib_mr.c

mlx5(4): convert to timer_setup() linuxKPI

Reviewed by:    bz
Sponsored by:   NVidia networking
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D58941
DeltaFile
+3-3sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
+3-3sys/dev/mlx5/mlx5_core/mlx5_health.c
+6-62 files

HardenedBSD/src 814cd91sys/dev/mlx5/mlx5_core mlx5_health.c, sys/dev/mlx5/mlx5_ib mlx5_ib_mr.c

mlx5(4): convert to timer_setup() linuxKPI

Reviewed by:    bz
Sponsored by:   NVidia networking
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D58941
DeltaFile
+3-3sys/dev/mlx5/mlx5_ib/mlx5_ib_mr.c
+3-3sys/dev/mlx5/mlx5_core/mlx5_health.c
+6-62 files

LLVM/project 4d8c4b1mlir/lib/Dialect/OpenACC/Transforms ACCSpecializeForHost.cpp, mlir/test/Dialect/OpenACC acc-if-clause-lowering.mlir

[MLIR][OpenACC] Defer lowering atomic capture children (#217475)
DeltaFile
+24-2mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+13-9mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForHost.cpp
+37-112 files

LLVM/project b7cb353llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize div-exact.ll uniform-blend.ll

[VPlan][Predicator] Preserve some uniform control flow

Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack. Does **NOT** improve predication/masking yet, so
applicability is artificially narrowed, only some uniform branches are
preserved. In particular, the following is left for future PRs:

* Block masks still contains now-unnecessary term for the preserved
  uniform branches.
* Mixed blends/phis aren't supported yet. Detecting where they would be
  necessary is as complex as implementing proper support (which would
  need either Luke's `reconstructSSA` or Iterated Dominance Frontier),
  so we also limit it to a trivial/structured CFG where there's only
  single block where those would need to be inserted.

I think even the current version might be enough to start implementing
an alternative to https://github.com/llvm/llvm-project/pull/141900 (see
BOSCC in the paper).
DeltaFile
+81-45llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+107-3llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+45-38llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+32-8llvm/test/Transforms/LoopVectorize/uniform-blend.ll
+18-10llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
+14-6llvm/test/Transforms/LoopVectorize/div-exact.ll
+297-11015 files not shown
+398-13421 files

LLVM/project f660015llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll

Implement non-uniform part of partial linearization algorithm
DeltaFile
+92-92llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+106-19llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+4-4llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
+3-3llvm/test/Transforms/LoopVectorize/predicator.ll
+205-1184 files

LLVM/project 195427ellvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Add `*_no_phi` versions
DeltaFile
+623-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+623-01 files

LLVM/project 7b6a307llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Predicator tests for uniform control flow preservation
DeltaFile
+168-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+168-01 files

LLVM/project 0a05c2dllvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Create actual test functions (AI-assisted)
DeltaFile
+478-25llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+478-251 files