FreeBSD/src 7e093e5sbin/ifconfig ifconfig.c

ifconfig: Fix handling of unsupported -j option with MK_JAIL=no

The ifconfig(8) utility built with MK_JAIL=no does not support the
-j option.  When the option is specified, Perror() is called without
setting errno, which can result in errno being reported as zero and
a misleading error message being displayed.

Also remove "[-j jail]" from the usage message when built with
MK_JAIL=no.

Event:  Halifax Hackathon 202606
DeltaFile
+12-6sbin/ifconfig/ifconfig.c
+12-61 files

LLVM/project 0c6a0c4mlir/include/mlir/Dialect/Tosa/IR TosaComplianceData.h.inc, mlir/lib/Dialect/Tosa/IR TosaOps.cpp

[mlir][tosa] Add support for matmul_t (#203894)

Adds support for matmul_t added to the specification in
https://github.com/arm/tosa-specification/pull/50.

This includes:
- Operator definition
- Verification logic for the operator
- Output shape inference for the operator
- Validation checks to ensure compliance with the TOSA specification
including profile compliance and level checks.
- Support for matmul_t to matmul in the downgrade pass.

Note that MXFP support will be added in a follow-up commit.
DeltaFile
+148-40mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
+81-2mlir/lib/Dialect/Tosa/Transforms/TosaDowngrade1p1To1p0.cpp
+81-0mlir/test/Dialect/Tosa/ops.mlir
+73-3mlir/test/Dialect/Tosa/verifier.mlir
+66-0mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
+55-0mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
+504-4512 files not shown
+669-4618 files

FreeBSD/src 6a606e7sys/dev/usb/serial uchcom.c

usb: Add missing unsetup while detaching uchcom

Reviewed by:    christos
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57329

(cherry picked from commit 2934783fa80de2854d9527ae11db85c47ac65a91)
DeltaFile
+1-0sys/dev/usb/serial/uchcom.c
+1-01 files

LLVM/project cf6527allvm/utils/gn/secondary/compiler-rt/lib/profile BUILD.gn, llvm/utils/gn/secondary/llvm/lib/Target/RISCV BUILD.gn

[gn build] Port commits (#205428)

55d7f777d958
582a20269e2c
DeltaFile
+1-0llvm/utils/gn/secondary/compiler-rt/lib/profile/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+2-02 files

FreeBSD/src e01b503sys/dev/usb usb_transfer.c

usb: Add missing mtx lock and unlock in pushing dma queue

Accessing usb_xfer_queue requires bus lock, we added this missing lock
in here to prevent racing issue.

Reviewed by:    adrian
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57293

(cherry picked from commit df5e9e3da5b9b3fe63ed4aaaa19b824fd18ae0f2)
DeltaFile
+2-0sys/dev/usb/usb_transfer.c
+2-01 files

FreeBSD/src 2cf3e6bsys/dev/usb/controller xhci.c

xhci: Do not drop and add bits in xhci

Drop and Add bits reset the data toggle for high-speed devices in XHCI.
The toggle bit represents the sequence number in USB 2.0 transfers. However,
a device can only recognize that the toggle bit has been reset while in
the HALT state. As a result, the host and device toggle values may
become mismatched, causing xHCI to reject the packet. This issue was
observed while testing the EZ-USB FX2 device.

The transfer may then return to the original value after a
bi-directional TD because the toggle field is only one bit wide. This
explains the reson that we can only receive packets bi-transfer in some
case. Therefore, we do not reset the toggle bit here.

Reviewed by:    adrian
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57146

(cherry picked from commit 28d85db46b484589e2ee74cf4b270db066821de1)
DeltaFile
+9-5sys/dev/usb/controller/xhci.c
+9-51 files

FreeBSD/src 6c9fbc4sys/dev/usb/serial uchcom.c

usb: Add missing unsetup while detaching uchcom

Reviewed by:    christos
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57329

(cherry picked from commit 2934783fa80de2854d9527ae11db85c47ac65a91)
DeltaFile
+1-0sys/dev/usb/serial/uchcom.c
+1-01 files

FreeBSD/src 9f2b898lib/msun/aarch64 fenv.h, lib/msun/arm fenv.h

libc: Use slow path in fenv in C++

C++ exposes cfenv functions via using ::func. Our name-mangling
mechanism rewrites all function calls causing symbols such as
std::feclearexcept to be transformed into std::__feclearexcept_int.
Since no such function exists, compilation fails.

The using ::feclearexpect declarations themselves are unaffected because
they are not function calls, which further exposes the mismatch

As a result, enable the fast path only for C and fall back to the slow
path in C++.

Reviewed by:    kib
Fixes:          5bc64b7d417d
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57450

(cherry picked from commit 9c0489508695fde3bdd742edfd1b4b681aab4d19)
DeltaFile
+12-0lib/msun/powerpc/fenv.h
+12-0lib/msun/riscv/fenv.h
+10-0lib/msun/arm/fenv.h
+10-0lib/msun/aarch64/fenv.h
+10-0lib/msun/x86/fenv.h
+54-05 files

FreeBSD/src 27b2489sys/x86/cpufreq hwpstate_intel.c

hwpstate_intel: Disable package control on hybrid CPU

In package control mode, the performance of all cores depends on the
most recent value written to the request field. If the last write comes
from an E-core, all cores are forced to align with the E-core
performance level, resulting in significant performance degradation.
Therefore, package control is disabled on hybrid-core systems.

Reviewed by:    olce
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Sponsored by:   Framework Computer Inc
Differential Revision: https://reviews.freebsd.org/D57377

(cherry picked from commit 7b26353a59d66dc1bc611fd042a49b9e3bd13699)
DeltaFile
+21-0sys/x86/cpufreq/hwpstate_intel.c
+21-01 files

FreeBSD/src df2d578sys/dev/usb/controller xhci.c

xhci: Do not drop and add bits in xhci

Drop and Add bits reset the data toggle for high-speed devices in XHCI.
The toggle bit represents the sequence number in USB 2.0 transfers. However,
a device can only recognize that the toggle bit has been reset while in
the HALT state. As a result, the host and device toggle values may
become mismatched, causing xHCI to reject the packet. This issue was
observed while testing the EZ-USB FX2 device.

The transfer may then return to the original value after a
bi-directional TD because the toggle field is only one bit wide. This
explains the reson that we can only receive packets bi-transfer in some
case. Therefore, we do not reset the toggle bit here.

Reviewed by:    adrian
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57146

(cherry picked from commit 28d85db46b484589e2ee74cf4b270db066821de1)
DeltaFile
+9-5sys/dev/usb/controller/xhci.c
+9-51 files

FreeBSD/src 4f40c7csys/dev/usb usb_transfer.c

usb: Add missing mtx lock and unlock in pushing dma queue

Accessing usb_xfer_queue requires bus lock, we added this missing lock
in here to prevent racing issue.

Reviewed by:    adrian
MFC after:      2 weeks
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57293

(cherry picked from commit df5e9e3da5b9b3fe63ed4aaaa19b824fd18ae0f2)
DeltaFile
+2-0sys/dev/usb/usb_transfer.c
+2-01 files

FreeBSD/src 381ebe2tests/sys/fs/fusefs mockfs.cc

fusefs: proofread an error message in the tests

Reported by:    otis
Fixes:          2c1482e3053 ("fusefs: fix a race in the pre-init tests")
MFC after:      2 weeks
Sponsored by:   ConnectWise
DeltaFile
+1-1tests/sys/fs/fusefs/mockfs.cc
+1-11 files

LLVM/project 0ca87a1clang/lib/UnifiedSymbolResolution USRGeneration.cpp, clang/unittests/Index IndexTests.cpp

[clang-index][USR] GenLoc prints file entry at most once, allow repeated offsets

GenLoc previously printed the source location at most once per USR,
gated by a member flag toggled on the first call.  During the
recursive visit, if both an outer and an inner decl needed to print
the location, only the outer one was printed.  When the outer decl did
not need the offset, no offset was ever printed.  For example, the USR
of `Holder<decltype([]{})>::method` depends on the location of the
type of the lambda but the outer decl prints the file entry only,
which disables offset printing.

Change the logic so the file-entry part of the location is printed at
most once (it must be identical), while offsets of sub-decl locations
may be printed multiple times.
DeltaFile
+35-10clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
+34-0clang/unittests/Index/IndexTests.cpp
+69-102 files

FreeNAS/freenas 6246892tests/directory_services test_zzz_truenas_ha.py test_activedirectory_basic.py

Fix tests
DeltaFile
+0-36tests/directory_services/test_zzz_truenas_ha.py
+0-30tests/directory_services/test_activedirectory_basic.py
+0-662 files

LLVM/project 418c3f8llvm/docs/CommandGuide index.md, llvm/docs/GlobalISel index.rst Pipeline.rst

[docs] Enforce unambiguous toctree in llvm/docs

It seems like using a non-`hidden` `toctree` for page navigation is a
bit of a trap, in that every doc must have a single unique path through
the global toctree to the root doc, and it is very easy to end up with
multiple.

This patch tries to address the warnings (actually infos, hence why it
does not fail the build) in llvm/docs/, namely:

  $ sphinx-build -b html -jauto llvm/docs/ /tmp/sphinx-out
  checking consistency...
  llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md: document is referenced in multiple toctrees: ['UserGuides', 'AMDGPUUsage'], selecting: UserGuides <- AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack
  llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst: document is referenced in multiple toctrees: ['UserGuides', 'AMDGPUUsage'], selecting: UserGuides <- AMDGPUDwarfExtensionsForHeterogeneousDebugging
  llvm/docs/CommandGuide/llvm-reduce.rst: document is referenced in multiple toctrees: ['CommandGuide/index', 'CommandGuide/index', 'Reference'], selecting: Reference <- CommandGuide/llvm-reduce
  llvm/docs/GitHub.rst: document is referenced in multiple toctrees: ['GettingInvolved', 'UserGuides'], selecting: UserGuides <- GitHub
  llvm/docs/GlobalISel/IRTranslator.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/IRTranslator
  llvm/docs/GlobalISel/InstructionSelect.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/InstructionSelect
  llvm/docs/GlobalISel/Legalizer.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/Legalizer

    [35 lines not shown]
DeltaFile
+126-81llvm/docs/CommandGuide/index.md
+30-21llvm/docs/GlobalISel/index.rst
+50-0utils/docs/llvm_sphinx/ext/checks.py
+21-21llvm/tools/llvm-debuginfo-analyzer/README.md
+0-14llvm/docs/tutorial/MyFirstLanguageFrontend/index.rst
+0-8llvm/docs/GlobalISel/Pipeline.rst
+227-1455 files not shown
+229-15411 files

LLVM/project ed6f75dclang/docs ghlinks.py conf.py, lldb/docs conf.py

[docs] Create utils/docs

llvm-project is home to many sphinx documentation sites, each with
configuration quirks and bespoke extensions.

The sphinx config model makes sharing code somewhat difficult. There
are options like sphinx-multiproject, but some of our docs builds are
out of the source tree while some are done out of the binary tree, so
the multiproject configuration itself would need to be generated. It
also would impose more uniformity around extensions than required.

This change instead creates a python package at utils/docs/llvm_sphinx
and makes it available to all sphinx-build processes via PYTHONPATH.
Each conf.py does not modify its own sys.path because not all builds are
out of the source tree, so there isn't a stable relative path to use to
refer to the utils/docs/ directory.

Type checking via pyright in new package is pinned to being python 3.8
compatible.

    [29 lines not shown]
DeltaFile
+0-273clang/docs/ghlinks.py
+151-0utils/docs/llvm_sphinx/ext/ghlinks/__init__.py
+71-0utils/docs/llvm_sphinx/__init__.py
+12-44llvm/docs/conf.py
+6-39lldb/docs/conf.py
+9-30clang/docs/conf.py
+249-38623 files not shown
+423-64929 files

LLVM/project c4bd250

Bump minimum required sphinx Python to 3.8

There seems to be de-facto use of at least 3.6 in docs, namely:

* Use of pathlib (3.4) in various places
* Format f-strings (3.6) and used in clang/docs/ghlinks.py

I don't see a strong reason to maintain the divide in minimum version
between test/docs, especially considering the "FIXME" indicating
the 3.0 lower bound was just a guess to begin with.

Change-Id: I11e00295ae0a13ec0f1c5cefbb2fdd2db272b152
DeltaFile
+0-00 files

LLVM/project c290057

[docs] Add BOLTAArch64OptimizationStatus to toctree

Building docs-bolt-html fails with:

  Warning, treated as error:
  /home/slinder1/llvm-project/scratch/bolt/docs/BOLTAArch64OptimizationStatus.rst:document isn't included in any toctree

Just add the orphan document to the toctree in the index to silence
this. If there is a better parent it can be moved somewhere else in the
tree.

Change-Id: I1d26d96d5485d97d29231da89f8c8408b375c41f
DeltaFile
+0-00 files

FreeNAS/freenas eac72dddocs/source/accounts scram_authentication.rst, docs/source/middleware session.rst

NAS-141464 / 27.0.0-BETA.1 / Add SCRAM-PLUS channel binding support (#19166)

Wire up the server side of SCRAM-PLUS (RFC 5929 tls-server-end-point)
channel binding for API-key auth, using the primitives added in
truenas-scram 0.2.0.

- pam_keyring publishes the active UI cert's tls-server-end-point value
as the TRUENAS_SCRAM_PLUS_SERVER_BINDING 'user' key in the uid=0
persistent keyring for pam_truenas to verify against. Idempotent and
best-effort; rotates in place and is cleared when no UI cert is set.
- truenas-api-key.mako passes channel_binding=negotiate, so binding is
honored when offered but never required.
- Regenerate pam on UI-cert redeploy and on a UI-cert switch to keep the
published binding in sync with the served cert.
- ScramPamAuthenticator rejects a client demanding binding (gs2 'p=')
over a non-TLS transport: TLS terminates at nginx, so the binding is
only a hash of the public cert that a cleartext client could replay.
- Bump python3-truenas-scram to >= 0.2.0 and document the behavior in
the AuthSCRAM model.

    [6 lines not shown]
DeltaFile
+299-11docs/source/accounts/scram_authentication.rst
+94-9src/middlewared/middlewared/etc_files/pam_keyring.py
+79-0tests/unit/test_api_key_keyring.py
+26-23tests/unit/test_login_with_api_key.py
+15-0docs/source/middleware/session.rst
+13-0src/middlewared/middlewared/utils/account/authenticator.py
+526-436 files not shown
+561-4812 files

OpenBSD/src kh0VjeVusr.bin/tmux mode-tree.c tmux.h

   Turn off preview if no draw callback and add a function to move to top.
VersionDeltaFile
1.88+11-3usr.bin/tmux/mode-tree.c
1.1366+2-1usr.bin/tmux/tmux.h
+13-42 files

FreeBSD/doc a6a14eewebsite/content/ru where.adoc

website/ru: Update where.adoc

Update to EN 271dd1d2b598ef558236033d0292a473a44d9f0f
DeltaFile
+61-10website/content/ru/where.adoc
+61-101 files

LLVM/project 1a997e2llvm/include/llvm/DWARFLinker DWARFLinkerBase.h, llvm/lib/DWARFLinker/Parallel DWARFLinkerImpl.cpp DWARFLinkerImpl.h

[dsymutil] Reuse a single thread pool across architectures (#204691)

dsymutil links the architectures of a universal binary on a thread pool,
and the parallel linker's DWARFLinkerImpl::link() then created a second
pool to link each architecture's object files. With one such inner pool
per architecture, dsymutil spun up more worker threads than the machine
has cores.

Add DWARFLinkerBase::setThreadPool() so the caller provides the pool.
The parallel linker schedules the object files on it as a
ThreadPoolTaskGroup. dsymutil hands over the pool it already uses to
schedule the architectures, llvm-dwarfutil passes one sized by
--num-threads, and the classic linker ignores it and manages its own
threads (always 2 for the lockstep algorithm).

The per-compile-unit cloning still runs on the global llvm::parallel
executor, whose per-thread allocators are indexed by getThreadIndex(),
so it can't move onto this pool.
DeltaFile
+13-24llvm/tools/dsymutil/dsymutil.cpp
+10-1llvm/tools/llvm-dwarfutil/DebugInfoLinker.cpp
+3-4llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
+5-2llvm/tools/dsymutil/DwarfLinkerForBinary.h
+6-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.h
+3-0llvm/include/llvm/DWARFLinker/DWARFLinkerBase.h
+40-312 files not shown
+44-318 files

LLVM/project 5fb3d28llvm/docs ProgrammersManual.rst, llvm/test/CodeGen/AMDGPU sched-handleMoveUp-dead-def-join.mir

rebase

Created using spr 1.3.7
DeltaFile
+12,991-3,310llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+11,856-3,719llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
+0-8,306llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
+5,672-0llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16-fake.txt
+5,126-0llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
+0-4,257llvm/docs/ProgrammersManual.rst
+35,645-19,5923,005 files not shown
+127,989-79,3803,011 files

LLVM/project c1895bfllvm/docs ProgrammersManual.rst, llvm/test/CodeGen/AMDGPU sched-handleMoveUp-dead-def-join.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+12,991-3,310llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+11,856-3,719llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
+0-8,306llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
+5,672-0llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16-fake.txt
+5,126-0llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
+0-4,257llvm/docs/ProgrammersManual.rst
+35,645-19,5923,005 files not shown
+127,989-79,3803,011 files

LLVM/project 37a71b6llvm/include/llvm/IR Function.h, llvm/lib/Analysis InlineCost.cpp

[IR] Remove ProfileCount Abstraction

This only exists to differentiate between real and synthetic profiles.
Remove the abstraction now that we plan to fully remove synthetic
profiles.

Reviewers: mtrofin, david-xl

Reviewed By: mtrofin

Pull Request: https://github.com/llvm/llvm-project/pull/204770
DeltaFile
+14-18llvm/lib/Transforms/Utils/InlineFunction.cpp
+2-24llvm/include/llvm/IR/Function.h
+5-17llvm/lib/IR/Function.cpp
+5-7llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
+4-5llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
+4-5llvm/lib/Analysis/InlineCost.cpp
+34-7618 files not shown
+63-12524 files

LLVM/project 65a7ccfmlir/include/mlir/Dialect/OpenACC/Transforms Passes.td, mlir/lib/Dialect/OpenACC/Transforms ACCEmitRemarksLoop.cpp CMakeLists.txt

[MLIR][OpenACC] Add acc-emit-remarks-loop pass (#205203)

Add a function-level pass that emits optimization remarks for loops in
`acc.compute_region`, describing their mapping to OpenACC parallel
levels (gang, worker, vector, sequential) and GPU dimensions (blockIdx,
threadIdx).
DeltaFile
+163-0mlir/lib/Dialect/OpenACC/Transforms/ACCEmitRemarksLoop.cpp
+155-0mlir/test/Dialect/OpenACC/acc-emit-remarks-loop.mlir
+40-0mlir/test/Dialect/OpenACC/acc-emit-remarks-loop-pipeline.mlir
+17-0mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
+1-0mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
+376-05 files

FreeNAS/freenas a262d5adocs/source/accounts scram_authentication.rst, docs/source/middleware session.rst

NAS-141464 / 27.0.0-BETA.1 / Add SCRAM-PLUS channel binding support (#19166)

Wire up the server side of SCRAM-PLUS (RFC 5929 tls-server-end-point)
channel binding for API-key auth, using the primitives added in
truenas-scram 0.2.0.

- pam_keyring publishes the active UI cert's tls-server-end-point value
as the TRUENAS_SCRAM_PLUS_SERVER_BINDING 'user' key in the uid=0
persistent keyring for pam_truenas to verify against. Idempotent and
best-effort; rotates in place and is cleared when no UI cert is set.
- truenas-api-key.mako passes channel_binding=negotiate, so binding is
honored when offered but never required.
- Regenerate pam on UI-cert redeploy and on a UI-cert switch to keep the
published binding in sync with the served cert.
- ScramPamAuthenticator rejects a client demanding binding (gs2 'p=')
over a non-TLS transport: TLS terminates at nginx, so the binding is
only a hash of the public cert that a cleartext client could replay.
- Bump python3-truenas-scram to >= 0.2.0 and document the behavior in
the AuthSCRAM model.

    [3 lines not shown]
DeltaFile
+299-11docs/source/accounts/scram_authentication.rst
+92-0src/middlewared/middlewared/etc_files/pam_keyring.py
+79-0tests/unit/test_api_key_keyring.py
+26-23tests/unit/test_login_with_api_key.py
+15-0docs/source/middleware/session.rst
+13-0src/middlewared/middlewared/utils/account/authenticator.py
+524-347 files not shown
+564-4013 files

LLVM/project d6c0393lldb/cmake/modules LLDBConfig.cmake

[lldb] Disable dynamic script interpreters by default under Xcode (#205423)

When LLDB_ENABLE_DYNAMIC_SCRIPTINTERPRETERS is set, liblldb's export
list is built by merging the undefined LLDB symbols extracted from each
script interpreter plugin's objects (119e57630281). Because the plugins
link liblldb, the generated file is wired into liblldb's link via
LINK_DEPENDS, a file-level dependency with no target-level edge.

The Xcode generator only has coarse target-level dependencies, so that
generated liblldb-script-interpreter.exports ends up attached to two
targets with no common dependency, which its "new build system" rejects
at generation time:

```
  CMake Error in source/API/CMakeLists.txt:
    .../source/API/liblldb-script-interpreter.exports
    is attached to multiple targets ... but none of these is a common
    dependency of the other(s). This is not allowed by the Xcode "new
    build system".

    [6 lines not shown]
DeltaFile
+1-1lldb/cmake/modules/LLDBConfig.cmake
+1-11 files

LLVM/project 7e6d700llvm/include/llvm/Analysis ProfileSummaryInfo.h, llvm/lib/CodeGen MachineFunction.cpp

[PSI] Return raw entry count values

Now that synthetic entry counts are being removed, stop using the
ProfileCount wrapper around entrycounts given it only exists to
distinguish between synthetic and real profile counts.

Reviewers: teresajohnson, david-xl, mtrofin

Pull Request: https://github.com/llvm/llvm-project/pull/204769
DeltaFile
+11-12llvm/include/llvm/Analysis/ProfileSummaryInfo.h
+4-2llvm/lib/CodeGen/MachineFunction.cpp
+15-142 files

LLVM/project 05ce3a0llvm/docs ProgrammersManual.rst, llvm/test/CodeGen/AMDGPU sched-handleMoveUp-dead-def-join.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+12,991-3,310llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+11,856-3,719llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
+0-8,306llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
+5,672-0llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16-fake.txt
+5,126-0llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir
+0-4,257llvm/docs/ProgrammersManual.rst
+35,645-19,5922,982 files not shown
+127,381-79,3132,988 files