LLVM/project 1e44c0bclang/www cxx_status.html

[NFC][clang] Mark P3868R1 as implemented (#197181)

This feature was already implemented by
https://github.com/llvm/llvm-project/issues/153641.

---------

Signed-off-by: yronglin <yronglin777 at gmail.com>
DeltaFile
+1-1clang/www/cxx_status.html
+1-11 files

LLVM/project 5f86a37llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU fptosi-sat-vector.ll fptoui-sat-vector.ll

[AMDGPU] Handle high element extraction with G_UNMERGE_VALUES (#188287)

This allows to detect when G_UNMERGE_VALUES extracts a hi16 element and
select `s_cvt_hi_f32_f16` removing need for a shift.
DeltaFile
+102-126llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+90-114llvm/test/CodeGen/AMDGPU/fptoui-sat-vector.ll
+12-0llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+204-2403 files

OPNSense/core 318f458src/etc/inc interfaces.inc, src/etc/inc/plugins.inc.d captiveportal.inc

Merge remote-tracking branch 'origin/master' into kea-dynamic-poc
DeltaFile
+126-122src/etc/inc/interfaces.inc
+45-42src/etc/inc/plugins.inc.d/captiveportal.inc
+34-31src/opnsense/mvc/app/controllers/OPNsense/CaptivePortal/Api/AccessController.php
+14-12src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/AliasController.php
+11-7src/opnsense/service/templates/OPNsense/Captiveportal/lighttpd-zone.conf
+13-3src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv6.xml
+243-21717 files not shown
+317-25123 files

LLVM/project 3473ceaclang/test/CXX/drs cwg7xx.cpp cwg9xx.cpp, clang/www cxx_dr_status.html

[clang][NFC] Mark CWG743 and CWG950 as implemented and add tests (#197015)

[CWG743](https://wg21.link/cwg743) allows using `decltype` in a
*nested-name-specifier*, i.e.: `decltype(foo)::type`.
[CWG950](https://wg21.link/cwg950) allows using it as a
*base-specifier*, i.e.: `struct B : decltype(foo)`. Both these DRs were
resolved by [N3049](https://wg21.link/n3049).


Clang supports both of these since 3.1: https://godbolt.org/z/aohPs5zaa
DeltaFile
+13-0clang/test/CXX/drs/cwg7xx.cpp
+10-0clang/test/CXX/drs/cwg9xx.cpp
+2-2clang/www/cxx_dr_status.html
+25-23 files

LLVM/project 6d22e10clang-tools-extra/clang-tidy/bugprone UnsafeFunctionsCheck.cpp

[NFC][clang-tidy] Unify diagnostic emission in bugprone-unsafe-functions (#194709)

This patch extracts the three diagnostic forms currently duplicated
across the Custom and non-Custom branches of `check()` into a single
`emitDiag()` helper.
DeltaFile
+59-46clang-tools-extra/clang-tidy/bugprone/UnsafeFunctionsCheck.cpp
+59-461 files

LLVM/project c5fc073libc/include/llvm-libc-types in_port_t.h

[libc] Use correct include path for in_port_t.h (#197187)

llvm-libc-types/stdint-macros.h does not exist. Not sure why this was
passing the CMake build, but this causes the bazel build to fail.
DeltaFile
+1-1libc/include/llvm-libc-types/in_port_t.h
+1-11 files

FreeBSD/ports d5f189cmail/p5-Mail-DMARC pkg-plist distinfo

mail/p5-Mail-DMARC: Update to 1.20260306

PR:             294926
Approved by:    geoffroy desvernay <dgeo at centrale-med.fr> (maintainer)
                hrs (mentor, blanket)
DeltaFile
+0-56mail/p5-Mail-DMARC/pkg-plist
+2-2mail/p5-Mail-DMARC/distinfo
+2-1mail/p5-Mail-DMARC/Makefile
+4-593 files

LLVM/project b7c62f7llvm/lib/CodeGen PeepholeOptimizer.cpp

[CodeGen][NFC] Extract foldLoadInto helper in PeepholeOptimizer (#197110)

Pull the load-folding bookkeeping out of `PeepholeOptimizer::run` into a
new `PeepholeOptimizer::foldLoadInto` helper.

No functional change intended. 

This is a preliminary NFC split out from #194662 per @RKSimon's review
suggestion:

  > Still think this is worth pulling out as its own NFC PR

The follow-up patch (#194662) adds a second call site that folds a load
into an EFLAGS producer after `optimizeCmpInstr` erases the compare, and
will reuse this helper instead of duplicating the bookkeeping.
DeltaFile
+34-23llvm/lib/CodeGen/PeepholeOptimizer.cpp
+34-231 files

LLVM/project aaae11ellvm/lib/Target/AMDGPU/MCTargetDesc AMDGPUInstPrinter.cpp

Fix review comment
DeltaFile
+1-1llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+1-11 files

LLVM/project 6794cdallvm/test/CodeGen/X86 vector-reduce-ctpop.ll, llvm/test/MC/AMDGPU gfx13_asm_vop3.s gfx13_asm_vop3-fake16.s

Merge branch 'main' into users/c8ef/csvgb
DeltaFile
+8,195-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+8,182-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+4,686-918llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+5,587-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+5,574-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16-fake16.s
+39,086-918774 files not shown
+90,621-17,259780 files

LLVM/project 635314cflang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP composite_simd_linear.f90 linear_modifier.f90

[flang][OpenMP] Fix data race with LINEAR clause on PARALLEL DO SIMD (#195634)

Fixes https://github.com/llvm/llvm-project/issues/180093
LINEAR variables on composite DO SIMD were being lowered onto omp.simd, which writes back unconditionally causing a race inside PARALLEL. Move them to omp.wsloop instead, which already has correct last-iter write-back with a barrier.
DeltaFile
+23-18flang/test/Lower/OpenMP/composite_simd_linear.f90
+24-0flang/lib/Lower/OpenMP/OpenMP.cpp
+6-5flang/test/Lower/OpenMP/linear_modifier.f90
+53-233 files

FreeNAS/freenas 084c53asrc/middlewared/middlewared/plugins/container info.py, src/middlewared/middlewared/plugins/enclosure_ nvme2.py enclosure_class.py

ruff it
DeltaFile
+1-2src/middlewared/middlewared/plugins/container/info.py
+1-1src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-1src/middlewared/middlewared/plugins/failover_/detect_utils.py
+1-0src/middlewared/middlewared/plugins/enclosure_/enclosure_class.py
+3-44 files

FreeBSD/ports 7406073net-im/telegram-desktop distinfo Makefile

net-im/telegram-desktop: update: 6.8.1 -> 6.8.2

ChangeLog:      https://github.com/telegramdesktop/tdesktop/compare/v6.8.1...v6.8.2

Sponsored by:   tipi.work
DeltaFile
+3-3net-im/telegram-desktop/distinfo
+1-1net-im/telegram-desktop/Makefile
+4-42 files

LLVM/project dc713c3llvm/include/llvm/ADT GenericUniformityInfo.h GenericUniformityImpl.h, llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp AMDGPUAtomicOptimizer.cpp

[UniformityAnalysis] Rename public api's in UA (NFC) (#196251)
DeltaFile
+61-54llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+13-8llvm/include/llvm/ADT/GenericUniformityInfo.h
+4-4llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
+4-4llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+4-3llvm/include/llvm/ADT/GenericUniformityImpl.h
+2-2llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+88-7512 files not shown
+103-9018 files

LLVM/project 0dda05ellvm/utils/gn/secondary/clang-tools-extra/clang-tidy/misc BUILD.gn

[gn build] Port 9f3d3048715a (#197182)
DeltaFile
+1-0llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/misc/BUILD.gn
+1-01 files

LLVM/project 285669ellvm/docs/CommandGuide llvm-offload-binary.rst, llvm/test/tools/llvm-offload-binary llvm-offload-binary.ll

[llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (#184774)

Enhance the llvm-offload-binary tool to be able to unbudle with logic to
handle different cases related to spirv64-intel offload binary images.

It also allows to extract all images without requiring the use --image
options to simplify its use.

Assisted by Claude.
DeltaFile
+114-26llvm/test/tools/llvm-offload-binary/llvm-offload-binary.ll
+100-7llvm/docs/CommandGuide/llvm-offload-binary.rst
+53-5llvm/tools/llvm-offload-binary/llvm-offload-binary.cpp
+267-383 files

LLVM/project ccb01f8libc/src/stdio/printf_core float_dec_converter.h

[libc] Remove some global printf_core declarations in float_dec_converter.h (#196860)

fixed_converter.h and float_hex_converter.h have local declarations with
the same name shadowing these, causing -Wshadow warnings. For now, just
don't have global declarations for these.
DeltaFile
+15-6libc/src/stdio/printf_core/float_dec_converter.h
+15-61 files

LLVM/project 96f60adllvm/lib/Target/AArch64/GISel AArch64InstructionSelector.cpp

[AArch64] Clean-up constrain register check in selectCopy (NFC) (#197168)

This addresses post-commit review from #188781.
DeltaFile
+2-5llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+2-51 files

LLVM/project a37c5f0llvm/lib/Target/X86 X86FrameLowering.cpp, llvm/test/CodeGen/X86 cfi-xmm.ll

[X86][Codegen] Fix frame-destroy for win-eh case (#196904)

From Discussion on
https://github.com/llvm/llvm-project/pull/177248/changes#r3217065230
Fixing test which had missing `frame-destroy`
DeltaFile
+2-2llvm/test/CodeGen/X86/cfi-xmm.ll
+2-1llvm/lib/Target/X86/X86FrameLowering.cpp
+4-32 files

LLVM/project de696eeclang-tools-extra/clang-tidy/tool ClangTidyMain.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Run analysis even with no checks (as long as `--allow-no-checks` is passed) (#194006)

Fixes #192713.

Currently, clang-tidy exits immediately if the only enabled checks are
`clang-diagnostic-*` ones. This prevents the reasonable use case where a
user isn't interested in any "native" clang-tidy checks and just wants
to use clang-tidy as a frontend for builtin clang warnings.
DeltaFile
+1-5clang-tools-extra/clang-tidy/tool/ClangTidyMain.cpp
+6-0clang-tools-extra/test/clang-tidy/infrastructure/clang-diagnostic-checks-only.cpp
+2-3clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check-not-enable.cpp
+2-3clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
+4-0clang-tools-extra/docs/ReleaseNotes.rst
+1-3clang-tools-extra/test/clang-tidy/infrastructure/allow-no-checks.cpp
+16-1418 files not shown
+34-3224 files

FreeBSD/src 23b263dsys/dev/mlx5/mlx5_en mlx5_en_main.c

Revert "mlx5e: Ensure rx timestamps are monotonically increasing"

This reverts commit ce33f96fcf2f2d0d49c406274bcc64df72fe530e.

It turns out that doing it this way did indeed prevent backwards
movement of timestamps, however it also lead to an ever increasing
error, eventually yielding timestamps hundreds or thousands of
seconds in the future.

Back this out until we can come up with a solution that prevents
backards timestamps and also avoids accumulating error.

Sponsored by: Netflix
DeltaFile
+0-50sys/dev/mlx5/mlx5_en/mlx5_en_main.c
+0-501 files

FreeBSD/ports 0c3c108databases/mongodb80 Makefile

databases/mongodb80: build error on FreeBSD 16

src/third_party/boost/boost/mpl/aux_/integral_wrapper.hpp:62:51: error: in-class initializer for static data member is not a constant expression
   62 |     BOOST_STATIC_CONSTANT(AUX_WRAPPER_VALUE_TYPE, prior_value = BOOST_MPL_AUX_STATIC_CAST(AUX_WRAPPER_VALUE_TYPE, (N - 1)));
      |     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Upstream has newer versions. So upgrading probably fixes this.
But upgrading needs adoption of Bazel as a build system.
Help is appreciated for moving to Bazel.
DeltaFile
+2-0databases/mongodb80/Makefile
+2-01 files

FreeBSD/src 9f69446sys/net ieee8023ad_lacp.c

lacp: fix link state with multiple aggregators

When we have multiple aggregators, the link state should reflect the
state of the active aggregator.

This change was prompted by a script pruning 10GbE interfaces from an
lacp bundle with 100GbE interfaces. Mixing speeds like this creates multiple
aggregators.  When the last 10GbE interface was removed, lagg0 would loose
link because the current aggregator's port count would drop to 0, even
though the 100GbE aggregator had active ports. This left the system in a
hard to diagnose state where lagg0 reported "active", but all outgoing
IP traffic was dropped, due to the RT_LINK_IS_UP() check noticing lagg0's
if_link_state was marked as down.

Reviewed by: zlei
Sponsored by: Netflix
Differential Revision: https://reviews.freebsd.org/D56579
DeltaFile
+6-2sys/net/ieee8023ad_lacp.c
+6-21 files

LLVM/project 2362645llvm/lib/Target/AArch64 AArch64SchedC1Nano.td, llvm/test/tools/llvm-mca/AArch64/Cortex C1Nano-sve-instructions.s C1Nano-neon-instructions.s

[AArch64] Add C1-Nano scheduling model (#182316)

Instead of using the Cortex-A510 scheduling model, C1-Nano now uses
its own scheduling model, based off of the C1-Nano Software
Optimization Guide:

https://developer.arm.com/documentation/109590/0001
DeltaFile
+6,862-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+3,152-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+2,512-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
+1,860-0llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
+323-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-mops-instructions.s
+285-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-forwarding.s
+14,994-046 files not shown
+16,355-2852 files

LLVM/project 0122142clang/lib/AST/ByteCode Disasm.cpp

[clang][bytecode][NFC] Use proper format function in Program::dump() (#197160)

This was using format() instead of formatv() by accident.
DeltaFile
+3-2clang/lib/AST/ByteCode/Disasm.cpp
+3-21 files

LLVM/project d82b563llvm/docs/CommandGuide lit.rst, llvm/utils/lit/lit cl_arguments.py main.py

Add LIT_UNSUPPORTED support to lit testing (#193766)

Add LIT_UNSUPPORTED support to lit, mirroring the existing LIT_XFAIL
implementation. This allows tests to be marked as UNSUPPORTED via
command line arguments (--unsupported, --unsupported-not) or environment
variables (LIT_UNSUPPORTED, LIT_UNSUPPORTED_NOT).

This feature enables users to dynamically mark tests as unsupported
without modifying test files, useful for CI/CD pipelines and
platform-specific test filtering.

Assisted by AI.
DeltaFile
+27-0llvm/utils/lit/tests/unsupported-cl.py
+21-0llvm/docs/CommandGuide/lit.rst
+14-0llvm/utils/lit/lit/cl_arguments.py
+13-0llvm/utils/lit/lit/main.py
+6-0llvm/utils/lit/lit/Test.py
+81-05 files

LLVM/project 333a546llvm/lib/Transforms/InstCombine InstCombineAndOrXor.cpp

[NFC][InstCombine] fix duplicate `CreateNot` in ((A^C)^B) & (B^A) fold (#197163)

It obviously should use the `NotC` created 4 lines above
DeltaFile
+1-1llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+1-11 files

LLVM/project e9942d8llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 fold-int-pow2-with-fmul-or-fdiv.ll

[DAGCombiner] Use KnownBits in `combineFMulOrFDivWithIntPow2` (#197097)

Use `computeKnownBits` to tighten the high bit width bound via
`countMaxActiveBits()`, which accounts for known leading zeros.


Co-Authored-By: Simon Pilgrim <RKSimon at users.noreply.github.com>
DeltaFile
+154-0llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+7-6llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+161-62 files

FreeBSD/ports 27f6269net/sniproxy Makefile, net/sniproxy/files sniproxy.in

net/sniproxy: Fix rc.d to use daemon(8) wrapper

PR:             295110
Reported by:    sears_AT_cs.berkeley_DOT_edu
DeltaFile
+7-11net/sniproxy/Makefile
+8-9net/sniproxy/files/sniproxy.in
+15-202 files

LLVM/project a4821f7llvm/test/Transforms/InstCombine powi.ll powi-mul-overflow.ll

update tests
DeltaFile
+6-6llvm/test/Transforms/InstCombine/powi.ll
+6-2llvm/test/Transforms/InstCombine/powi-mul-overflow.ll
+12-82 files