FreshBSD

LLVM/project c2013b0 — llvm/lib/CodeGen/MIRParser MIParser.cpp, llvm/test/CodeGen/MIR/Generic inline-asm-ops-too-large.mir inline-asm-ops-missing-count.mir

2026-10-24 08:00:44 UTC by Bill Wendling on ⎇

users/void/asm-rm-5-prefer-reg

Merge branch 'users/void/asm-rm-4-regallocfast-fold' into users/void/asm-rm-5-prefer-reg

Delta		File
+29	-28	llvm/lib/CodeGen/MIRParser/MIParser.cpp
+31	-0	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-errors.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-too-large.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-count.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-colon.mir
+3	-7	llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+63	-68	6 files

LLVM/project ec468f3 — llvm/lib/CodeGen/MIRParser MIParser.cpp, llvm/test/CodeGen/MIR/Generic inline-asm-ops-too-large.mir inline-asm-ops-missing-count.mir

2026-10-24 08:00:43 UTC by Bill Wendling on ⎇

users/void/asm-rm-4-regallocfast-fold

Merge branch 'users/void/asm-rm-3-direct-mem-output-error' into users/void/asm-rm-4-regallocfast-fold

Delta		File
+29	-28	llvm/lib/CodeGen/MIRParser/MIParser.cpp
+31	-0	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-errors.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-too-large.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-count.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-colon.mir
+3	-7	llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+63	-68	6 files

LLVM/project 1863ded — llvm/lib/CodeGen/MIRParser MIParser.cpp, llvm/test/CodeGen/MIR/Generic inline-asm-ops-too-large.mir inline-asm-ops-missing-count.mir

2026-10-24 08:00:42 UTC by Bill Wendling on ⎇

users/void/asm-rm-3-direct-mem-output-error

Merge branch 'users/void/asm-rm-2-fold-tied-operands' into users/void/asm-rm-3-direct-mem-output-error

Delta		File
+29	-28	llvm/lib/CodeGen/MIRParser/MIParser.cpp
+31	-0	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-errors.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-too-large.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-count.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-colon.mir
+3	-7	llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+63	-68	6 files

LLVM/project 3111c20 — llvm/lib/CodeGen/MIRParser MIParser.cpp, llvm/test/CodeGen/MIR/Generic inline-asm-ops-too-large.mir inline-asm-ops-missing-count.mir

2026-10-24 08:00:41 UTC by Bill Wendling on ⎇

users/void/asm-rm-2-fold-tied-operands

Merge branch 'users/void/mir-inline-asm-operand-count' into users/void/asm-rm-2-fold-tied-operands

Delta		File
+29	-28	llvm/lib/CodeGen/MIRParser/MIParser.cpp
+31	-0	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-errors.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-too-large.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-count.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-colon.mir
+3	-7	llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+63	-68	6 files

LLVM/project 54cda14 — llvm/lib/CodeGen/MIRParser MIParser.cpp, llvm/test/CodeGen/MIR/Generic inline-asm-ops-too-large.mir inline-asm-ops-missing-count.mir

2026-10-24 07:58:43 UTC by Bill Wendling on ⎇

users/void/mir-inline-asm-operand-count

[MIR] Address review: merge error tests, un-lambda count parsing

Merge the three "ops:N" error tests into one with split-file, move the
operand count parsing out of a lambda into MIParser, and shorten the
round-trip test's comment.

Assisted-by: Claude Opus 5.5

Delta		File
+29	-28	llvm/lib/CodeGen/MIRParser/MIParser.cpp
+31	-0	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-errors.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-too-large.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-count.mir
+0	-11	llvm/test/CodeGen/MIR/Generic/inline-asm-ops-missing-colon.mir
+2	-6	llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+62	-67	6 files

LLVM/project 95384c3 — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir

2026-10-24 07:54:55 UTC by Bill Wendling via GitHub on ⎇

users/void/mir-inline-asm-operand-count

Remove -verify-machineinstrs command line flag

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>

Delta		File
+1	-1	llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+1	-1	1 files

LLVM/project ee8cfbf — llvm/lib/Target/AMDGPU SOPInstructions.td, llvm/test/CodeGen/AMDGPU add-max.ll uaddsat.ll

2026-10-24 07:40:04 UTC by Matt Arsenault via GitHub on ⎇

main

AMDGPU: Use S_ADD_I32 to select uniform uaddsat (#235242)

95ff1fa00ed4 selected uniform uaddsat.i32 to an S_ADD_U32 sequence.
S_ADD_U32 defines a carry out, so when the instructions have to be
moved to the VALU it is replaced with V_ADD_CO_U32_e32, which doesn't
exist on gfx10+. This would later assert when encoded. moveToVALU
should probably learn to handle that correctly, or at least assert.
The carry isn't needed, so use S_ADD_I32 like the usubsat pattern,
which is moved to V_ADD_U32_e64 where available.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>

Delta		File
+83	-4	llvm/test/CodeGen/AMDGPU/uaddsat.ll
+1	-1	llvm/test/CodeGen/AMDGPU/add-max.ll
+1	-1	llvm/lib/Target/AMDGPU/SOPInstructions.td
+85	-6	3 files

LLVM/project 29c09be — llvm/lib/Target/RISCV RISCVIndirectBranchTracking.cpp RISCVQCRelaxMarking.cpp

2026-10-24 07:38:52 UTC by Aiden Grossman on ⎇

users/boomanaiden154/riscv-port-riscvvmv0elimination-to-newpm

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

Delta		File
+61	-58	llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+74	-16	llvm/lib/Target/RISCV/RISCV.h
+38	-11	llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
+28	-18	llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
+31	-11	llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
+31	-10	llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
+263	-124	5 files not shown
+366	-163	11 files

LLVM/project 664306a — llvm/lib/Target/RISCV RISCVIndirectBranchTracking.cpp RISCVQCRelaxMarking.cpp

2026-10-24 07:38:52 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.riscv-port-riscvvmv0elimination-to-newpm

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]

Delta		File
+61	-58	llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+61	-14	llvm/lib/Target/RISCV/RISCV.h
+38	-11	llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
+28	-18	llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
+31	-11	llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
+31	-10	llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
+250	-122	4 files not shown
+326	-151	10 files

LLVM/project 32d286f — llvm/lib/Target/RISCV RISCVIndirectBranchTracking.cpp RISCVQCRelaxMarking.cpp

2026-10-24 07:32:14 UTC by Aiden Grossman on ⎇

users/boomanaiden154/riscv-port-riscvqcrelaxmarking-to-newpm

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

Delta		File
+61	-58	llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+61	-14	llvm/lib/Target/RISCV/RISCV.h
+38	-11	llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
+28	-18	llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
+31	-11	llvm/lib/Target/RISCV/RISCVQCRelaxMarking.cpp
+31	-10	llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
+250	-122	4 files not shown
+326	-151	10 files

LLVM/project 379eb89 — llvm/lib/Target/RISCV RISCVMakeCompressible.cpp RISCVIndirectBranchTracking.cpp

2026-10-24 07:32:14 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.riscv-port-riscvqcrelaxmarking-to-newpm

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]

Delta		File
+61	-58	llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+52	-12	llvm/lib/Target/RISCV/RISCV.h
+38	-11	llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
+28	-18	llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
+31	-10	llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
+32	-8	llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+242	-117	3 files not shown
+283	-136	9 files

LLVM/project c467c6b — clang/lib/AST ExprConstant.cpp

2026-10-24 07:30:28 UTC by Timm Baeder via GitHub on ⎇

main

[clang][ExprConst] Add missing `FastEvaluateAsRValue` in `EvaluateKnownConstInt{,CheckOverflow}` (#234552)

This was missing for some reason.

Delta		File
+14	-0	clang/lib/AST/ExprConstant.cpp
+14	-0	1 files

LLVM/project b968e74 — libcxx/test/benchmarks/numeric reduce.bench.cpp transform_reduce.bench.cpp

2026-10-24 07:29:01 UTC by Michael G. Kazakov via GitHub on ⎇

main

[libc++] Add benchmarks for std::reduce and std::transform_reduce (#233374)

The PR adds benchmarks for these algorithms:
- `std::reduce()`
- `std::transform_reduce()`, unary transform
- `std::transform_reduce()`, binary transform

The benchmarks run minimal reduction and transformation operators with
`int`, `float` and `double` parameters.
`std::vector` and `std::list` containers are tested, `std::deque` is not
included to reduce the number of added benchmarks.

Fixes #226211

---------

Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>

Delta		File
+127	-0	libcxx/test/benchmarks/numeric/transform_reduce.bench.cpp
+80	-0	libcxx/test/benchmarks/numeric/reduce.bench.cpp
+207	-0	2 files

LLVM/project 4531bae — llvm/lib/Target/RISCV RISCVLandingPadSetup.cpp RISCVMakeCompressible.cpp

2026-10-24 07:19:32 UTC by Aiden Grossman on ⎇

users/boomanaiden154/main.riscv-port-riscvmergebaseoffset-to-newpm

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]

Delta		File
+43	-10	llvm/lib/Target/RISCV/RISCV.h
+38	-11	llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
+28	-18	llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
+31	-10	llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
+32	-8	llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+22	-7	llvm/lib/Target/RISCV/RISCVLandingPadSetup.cpp
+194	-64	2 files not shown
+210	-74	8 files

LLVM/project bc18c48 — llvm/lib/Target/RISCV RISCVMakeCompressible.cpp RISCVIndirectBranchTracking.cpp

2026-10-24 07:19:32 UTC by Aiden Grossman on ⎇

users/boomanaiden154/riscv-port-riscvmergebaseoffset-to-newpm

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

Delta		File
+61	-58	llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
+52	-12	llvm/lib/Target/RISCV/RISCV.h
+38	-11	llvm/lib/Target/RISCV/RISCVDeadRegisterDefinitions.cpp
+28	-18	llvm/lib/Target/RISCV/RISCVLateBranchOpt.cpp
+31	-10	llvm/lib/Target/RISCV/RISCVIndirectBranchTracking.cpp
+32	-8	llvm/lib/Target/RISCV/RISCVMakeCompressible.cpp
+242	-117	3 files not shown
+283	-136	9 files

LLVM/project 9c20e5e — clang/lib/CIR/Dialect/IR CIRDialect.cpp, clang/test/CIR/Transforms canonicalize.cir

2026-10-24 06:58:24 UTC by Arseniy Obolenskiy via GitHub on ⎇

main

[CIR] Fix cir.cast fold crash on a same type integral cast (#234236)

The fold called fold() on the source defining op, which is null for
block arguments

Delta		File
+1	-7	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+7	-0	clang/test/CIR/Transforms/canonicalize.cir
+8	-7	2 files

LLVM/project 73c0f4b — clang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenModule.cpp CIRGenExprScalar.cpp

2026-10-24 06:58:08 UTC by Arseniy Obolenskiy via GitHub on ⎇

main

[CIR] Narrow blanket -fopenmp NYI guards to OGCG conditions (#233671)

Ordinary code compiled with -fopenmp hit errorNYI on every assignment,
inc/dec, member access and global reference

Delta		File
+76	-0	clang/test/CIR/CodeGenOpenMP/non-openmp-code.cpp
+4	-5	clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+2	-4	clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+2	-4	clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
+2	-2	clang/lib/CIR/CodeGen/CIRGenModule.cpp
+2	-0	clang/include/clang/CIR/MissingFeatures.h
+88	-15	6 files

LLVM/project 471de9d — llvm/lib/Target/AMDGPU SOPInstructions.td, llvm/test/CodeGen/AMDGPU add-max.ll uaddsat.ll

2026-10-24 06:49:36 UTC by Matt Arsenault on ⎇

users/arsenm/amdgpu-uaddsat-salu-add-i32

AMDGPU: Use S_ADD_I32 to select uniform uaddsat

95ff1fa00ed4 selected uniform uaddsat.i32 to an S_ADD_U32 sequence.
S_ADD_U32 defines a carry out, so when the instructions have to be
moved to the VALU it is replaced with V_ADD_CO_U32_e32, which doesn't
exist on gfx10+. This would later assert when encoded. moveToVALU
should probably learn to handle that correctly, or at least assert.
The carry isn't needed, so use S_ADD_I32 like the usubsat pattern,
which is moved to V_ADD_U32_e64 where available.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>

Delta		File
+83	-4	llvm/test/CodeGen/AMDGPU/uaddsat.ll
+1	-1	llvm/test/CodeGen/AMDGPU/add-max.ll
+1	-1	llvm/lib/Target/AMDGPU/SOPInstructions.td
+85	-6	3 files

OpenBSD/src bgYSpsv — usr.sbin/npppd/l2tp l2tp.h l2tp_ctrl.c

2026-10-24 06:46:39 UTC by yasuoka on ⎇

HEAD

   Limit the number of pending L2TP connections.  Previously, an
   unlimited number of pending connections could exhaust npppd's memory.

   From acts1631
   ok mvs

Version	Delta		File
1.28	+15	-2	usr.sbin/npppd/l2tp/l2tp_ctrl.c
1.16	+8	-3	usr.sbin/npppd/l2tp/l2tp.h
	+23	-5	2 files

FreeBSD/ports 26814d6 — net/py-pynmsg Makefile

2026-10-24 06:34:22 UTC by Don Lewis (truckman) on ⎇

main

net/py-pynmsg: Replace USE_PYTHON=distutils

Replace deprecated USE_PYTHON=distutils.

Sponsored by:   DomainTools LLC

Delta		File
+4	-2	net/py-pynmsg/Makefile
+4	-2	1 files

FreeBSD/ports f91b049 — dns/py-pywdns Makefile

2026-10-24 06:34:22 UTC by Don Lewis (truckman) on ⎇

main

dns/py-pywdns: Replace USE_PYTHON=distutils

Replace deprecated USE_PYTHON=distutils.

Sponsored by:   DomainTools LLC

Delta		File
+4	-2	dns/py-pywdns/Makefile
+4	-2	1 files

FreeBSD/ports 19c9d46 — dns/py-pydnstable distinfo Makefile, dns/py-pydnstable/files patch-dnstable.pxi

2026-10-24 06:34:21 UTC by Don Lewis (truckman) on ⎇

main

dns/py-pydnstable: Upgrade to 0.8.1

0.8.1:
 * Fix build with Cython 3.X.

 * Modernize packaging: add pyproject.toml.

Replace deprecated USE_PYTHON=distutils.

Sponsored by:   DomainTools LLC

Delta		File
+0	-10	dns/py-pydnstable/files/patch-dnstable.pxi
+4	-3	dns/py-pydnstable/Makefile
+3	-3	dns/py-pydnstable/distinfo
+7	-16	3 files

FreeBSD/ports b2dbc8f — devel/py-pymtbl distinfo Makefile, devel/py-pymtbl/files patch-mtbl.pxi

2026-10-24 06:34:21 UTC by Don Lewis (truckman) on ⎇

main

devel/py-pymtbl: Upgrade to 0.6.1

0.6.1:
 * Fix build with Cython 3.X.

 * Modernize packaging: add pyproject.toml.

Replace deprecated USE_PYTHON=distutils.

Sponsored by:   DomainTools LLC

Delta		File
+0	-10	devel/py-pymtbl/files/patch-mtbl.pxi
+4	-3	devel/py-pymtbl/Makefile
+3	-3	devel/py-pymtbl/distinfo
+7	-16	3 files

OpenBSD/ports fI1YxmA — cad/freecad Makefile, cad/freecad/patches patch-src_Gui_PythonWrapper_cpp

2026-10-24 06:22:17 UTC by rsadowski on ⎇

HEAD

   Unbreak build wirh pyside6 6.12

   From jtt@

Version	Delta		File
1.1	+16	-0	cad/freecad/patches/patch-src_Gui_PythonWrapper_cpp
1.20	+2	-1	cad/freecad/Makefile
	+18	-1	2 files

OpenBSD/ports Ve4DUJr — x11/qt6/qtbase/pkg PLIST-main, x11/qt6/qtdeclarative/pkg PLIST

2026-10-24 06:21:49 UTC by rsadowski on ⎇

HEAD

   Update Qt6 to 6.12.0

   - We droped the Fedora pyside patches, It may be that we no longer need
     it. Fedora is still on version 6.11.
   - We've managed to get QTMultimedia's VA-API support working.
   - QtWebEngine is no longer part of the release process and will soon have its
     own

   PySide tweaks from jtt@ pyside tested by jtt@ and OK jtt@

Version	Delta		File
1.18	+292	-33	x11/qt6/qtdeclarative/pkg/PLIST
1.11	+85	-85	x11/qt6/qtwebengine/pkg/PLIST
1.18	+88	-27	x11/qt6/qtmultimedia/pkg/PLIST
1.23	+47	-10	x11/qt6/qtbase/pkg/PLIST-main
1.6	+5	-47	x11/qt6/qtlottie/pkg/PLIST
1.6	+40	-0	x11/qt6/qtgraphs/pkg/PLIST
	+557	-202	102 files not shown
	+937	-467	108 files

LLVM/project a4bd6bd — llvm/test/CodeGen/AArch64 aarch64-combine-gather-lanes.mir

2026-10-24 06:12:36 UTC by Matt Arsenault via GitHub on ⎇

main

AArch64: Fix missing ... function separators in mir test (#235119)

update_mir_test_checks misbehaves when the end of function marker
is missing.

Delta		File
+138	-114	llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes.mir
+138	-114	1 files

OpenBSD/src 7Nqvn8x — usr.sbin/npppd/npppd mppe.c

2026-10-24 06:08:27 UTC by yasuoka on ⎇

HEAD

   Reject short MPPE packets in npppd.  Short MPPE frame underflowed the
   RC4 length, that caused RC4 to access across memory until it faults.

   From acts1631
   ok mvs

Version	Delta		File
1.16	+13	-4	usr.sbin/npppd/npppd/mppe.c
	+13	-4	1 files

FreeBSD/ports ec6c0db — graphics/libxisf pkg-plist Makefile

2026-10-24 06:05:10 UTC by Jason E. Hale (jhale) on ⎇

main

graphics/libxisf: Update to 0.2.14

https://gitea.nouspiro.space/nou/libXISF/releases/tag/v0.2.14

Delta		File
+3	-3	graphics/libxisf/distinfo
+3	-2	graphics/libxisf/Makefile
+2	-2	graphics/libxisf/pkg-plist
+8	-7	3 files

LLVM/project fc78f4f — lld/MachO ExportTrie.cpp, lld/test/MachO export-trie-high-bytes.s

2026-10-24 06:03:04 UTC by Jez Ng via GitHub on ⎇

main

 [lld-macho] Fix export trie for names containing 0xff bytes (#233399)

On signed-char hosts, charAt() promotes a 0xff byte to -1, aliasing the
end-of-string sentinel used by the three-way radix sort. As a result, an
export could be silently dropped or truncated. Fix is to convert the
byte to unsigned char before promoting it to int. I also verified that
ld-prime handles 0xff perfectly fine.

Assisted by Opus 5.5

---------

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>

Delta		File
+33	-0	lld/test/MachO/export-trie-high-bytes.s
+3	-1	lld/MachO/ExportTrie.cpp
+36	-1	2 files

HardenedBSD/ports b0ca1c0 — devel/py-ty distinfo, misc/crush/files extra-patch-disable-command-blocking

2026-10-24 06:00:34 UTC by HardenedBSD Sync Services on ⎇

hardenedbsd/main

Merge branch 'freebsd/main' into hardenedbsd/main

Delta		File
+22	-22	misc/crush/files/extra-patch-disable-command-blocking
+25	-17	devel/py-ty/distinfo
+0	-32	security/vuxml/vuln/2026.xml
+28	-0	net/glib-networking/files/patch-tls_openssl_gtlsserverconnection-openssl.c
+28	-0	net/glib-networking/files/patch-tls_openssl_gtlsclientconnection-openssl.c
+18	-0	net/glib-networking/files/patch-tls_openssl_gtlsconnection-openssl.c
+121	-71	38 files not shown
+212	-151	44 files