[clang][CIR] Add tests for SVE MAXV intrinsics (#230080)
adds CIR tests for svmaxv (plain SVE) intrinsics.
Moves and adapts sve-intrinsics/acle_sve_maxv.c to sve/maxv.c.
Part of #223963
Make remaining async zfs.resource methods sync
## Problem
When dataset logic moved into zfs.resource, the attachment and process-killing methods were brought over as async to keep that diff small, unlike the rest of the namespace. The attachment delegate `validate_set`/`after_set` hooks were also async even though their only caller is the sync `zfs.resource.set`, so every hook bounced from the set thread onto the event loop, and SMB's hook went back out to another thread to query attachments. On top of that, pool export, import, reimport and dataset unlock each looped over the delegates themselves, repeating the log-and-continue handling, and fetched the delegate lists through private zfs.resource methods via call2.
## Solution
- **Sync zr methods:** attachments, attachments_with_path and kill_processes are sync. Delegate coroutines run through `context.run_coroutine` and `kill_processes` drives `service.control` jobs with `call_sync2(...).wait_sync()`. `processes_using_dataset_tree` is sync as well, with `pool.processes` running it via `to_thread`.
- **Sync set hooks:** `validate_set`/`after_set` are plain methods on the delegate base and in the SMB, iSCSI, NVMe-oF and VM delegates, called inline by `zfs.resource.set`. Registering a delegate whose hooks are still coroutine functions raises, since a leftover `async def` would otherwise silently skip validation.
- **Delegate fan-out lives in `resource_attachments`:** `stop_all`/`delete_all` run a delegate method across every registered delegate and abort on the first failure; `start_all_after_reimport`, `start_all_after_unlock` and `cleanup_all_after_pool_destroy` run the post-event hooks, logging each failure and continuing; `query_all` is the async attachment query; `delegates_in_start_order`/`delegates_in_stop_order` give the ordering to callers that keep their own loop. The names keep them apart from the delegate methods of the same verb.
- **Callers:** pool export/import iterate the ordering helpers directly, `pool.attachments` awaits `query_all`, lock/unlock run the module coroutines through `run_coroutine`, and `zfs.resource.destroy` deletes attachments with one sequential `delete_all` hop instead of two per delegate. The private `zfs.resource.attachment_delegates_for_start`/`_for_stop`, `stop_attachment_delegates` and `zfs.resource.encryption.start_attachments_on_unlock` are gone, having no other users.
[clang][CIR] Add tests for SVE EORV intrinsics (#230083)
adds CIR tests for sveorv (plain SVE) intrinsics.
Moves and adapts sve-intrinsics/acle_sve_eorv.c to sve/eorv.c.
Part of #223963
ipsec: add charon retry_initiate_interval to advanced settings (#11002)
* ipsec: add charon retry_initiate_interval to advanced settings
A connection with start action "start" and a hostname as remote gateway
is initiated once when it is loaded. If the name cannot be resolved at
that time, e.g. during boot before a DHCP WAN is usable, charon aborts
the initiation and never retries it. Exposing retry_initiate_interval
lets charon retry the resolution instead.
Ref: #10997
* ipsec: default charon retry_initiate_interval to 30 seconds
---------
Co-authored-by: Claudio <claudio at guareschi.org>
TableGen: Cache resolved class instantiations
The same class instantiation is often referenced many times in one
record, and each reference was resolved again from scratch along with
everything nested in its arguments. Cache the results in MapResolver and
RecordResolver. The cache is cleared when the mappings change, and is
bypassed while a mapped variable is being resolved.
Nested instantiations are resolved through a TrackUnresolvedResolver,
which does not change the result. These share the cache of the
underlying resolver, which also records whether any references were left
unresolved so the trackers can be updated on a hit.
Gigainstructions executed by llvm-tblgen --null-backend
before after
AMDGPU.td 71.75 18.22 -74.6%
X86.td 6.10 6.15 +0.8%
AArch64.td 3.28 3.32 +1.3%
[3 lines not shown]
TableGen: Skip resolving values that cannot change
Lists, dags, bits and arguments made only of leaf values always resolve
to themselves, but resolving them still walked every element. Record
this when they are created and return early.
Gigainstructions executed by llvm-tblgen --null-backend
before after
AMDGPU.td 79.12 71.73 -9.3%
X86.td 6.25 6.12 -2.1%
AArch64.td 3.40 3.28 -3.7%
RISCV.td 8.34 8.19 -1.8%
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
TableGen: Use DenseMap for the IntInit pool
Gigainstructions executed by llvm-tblgen --null-backend
before after
AMDGPU.td 79.34 79.13 -0.3%
X86.td 6.30 6.25 -0.7%
AArch64.td 3.43 3.41 -0.6%
RISCV.td 8.40 8.34 -0.7%
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
www/remark42: update to 1.18.0
While here, bring the rc script in line with upstream's options:
- Rename remark_disable_fancy_html_formatting to
remark_disable_fancy_text_formatting; the old name exported a
variable the server does not read.
- Rename the remark_auth_enable and remark_auth_email_subject
defaults to remark_auth_email_enable and remark_auth_email_subj,
the names that are actually exported.
- Add remark_trusted_proxy, remark_auth_ttl_jwt,
remark_auth_ttl_cookie, remark_auth_send_jwt_header,
remark_auth_microsoft_tenant, remark_auth_custom_*,
remark_telegram_api_url and remark_smtp_helo_host.
- Default remark_avatar_uri and remark_ssl_acme_location to the data
directory instead of a path relative to the working directory.
[mlir][acc] Report independent loops not parallelized due to unstructured control flow (#230066)
An independent acc loop whose body has unstructured control flow (for
example a backward GOTO) cannot be represented as a structured loop, so
it is executed sequentially. This happened silently: no remark was
emitted for the loop, and the user only saw a serial kernel without a
reason.
Emit a remark for such loops stating that they are not parallelized
because their control flow could not be represented as a structured
loop. This lets users identify loops that are asserted parallel but run
sequentially.
Co-Authored-By: Claude
[clang][CUDA] Perform lvalue-to-rvalue conversion on `__cluster_dims__` attribute arguments (#227998)
A `ConstantExpr` with an lvalue subexpression should always have an
lvalue APValue result.
[libc] Fail configure if requested linting cannot run (#231001)
If linting was requested but could not run, CMake previously disabled it
with a warning and generated an empty libc-lint target.
Change these conditions to FATAL_ERROR so misconfigurations fail early:
* Compiler is not Clang
* clang-tidy is not found
* Auto-discovered clang-tidy has a mismatched major version
If LLVM_LIBC_CLANG_TIDY is set explicitly, treat version mismatches as a
warning instead of an error.
Document the configure requirements in code_style.md.
Assisted-by: Automated tooling, human reviewed.
devel/electron{41,42,43,44}: Add AVX512 option to support older CPUs
Builds on older CPUs without AVX512 instructions support fail with the
following error:
In file included from ../../third_party/skia/modules/skcms/src/skcms_TransformSkx.cc:53:
../../third_party/skia/modules/skcms/src/Transform_inl.h:152:15: error: always_inline function '_mm512_cvtph_ps' requires target feature 'avx512f', but would be inlined into function 'F_from_Half' that is compiled without support for 'avx512f'
152 | return (F)_mm512_cvtph_ps((__m256i)half);
Add AVX512 option, which is ON by default (status quo). Users can set
the option to OFF to build on older hardware.
PR: 299208
Reported by: Hiroo Ono <hiroo.ono+freebsd at gmail.com>
Tested by: Hiroo Ono <hiroo.ono+freebsd at gmail.com>
devel/electron{41,42,43,44}: Add AVX512 option to support older CPUs
Builds on older CPUs without AVX512 instructions support fail with the
following error:
In file included from ../../third_party/skia/modules/skcms/src/skcms_TransformSkx.cc:53:
../../third_party/skia/modules/skcms/src/Transform_inl.h:152:15: error: always_inline function '_mm512_cvtph_ps' requires target feature 'avx512f', but would be inlined into function 'F_from_Half' that is compiled without support for 'avx512f'
152 | return (F)_mm512_cvtph_ps((__m256i)half);
Add AVX512 option, which is ON by default (status quo). Users can set
the option to OFF to build on older hardware.
PR: 299208
Reported by: Hiroo Ono <hiroo.ono+freebsd at gmail.com>
Tested by: Hiroo Ono <hiroo.ono+freebsd at gmail.com>
