[BasicAA] Restrict cross-iteration separate_storage hints (#241381)
A `separate_storage` assumption applies to its operand values when it
executes. If the operands change across loop iterations, it does not
imply that an operand from one iteration is separate from the other
operand in another iteration. BasicAA can nevertheless use it to return
`NoAlias` in cross-iteration queries, causing GVN and loop-vectorization
miscompiles.
After finding a matching assumption that is valid in the query context,
require both underlying objects to be invariant according to
`isValueEqualInPotentialCycles()` before using it. Queries without a
usable assumption skip these checks. Same-iteration queries and
hints about loop-invariant objects remain supported.
Fixes #241378.
Assisted-by: Claude Code
Assisted-by: OpenAI Codex
[LoongArch] Cast to unsigned before LSHing in LoongArchMergeBaseOffsetOpt::detectAndFoldOffset() (#242656)
Make one step ahead of #242761 to fix a latent, similar problem in
`LoongArchMergeBaseOffsetOpt::detectAndFoldOffset`, as suggested by
@heiher.
[RISCV][P-ext] Restrict P widening shift legalization to left shifts (#242773)
The RV32 P-extension custom legalization for i64 shifts shares a path
for `SHL`, `SRL`, and `SRA`. Its known-bits checks select `WSLL` or
`WSLA` when the input fits in an unsigned or signed 32-bit value, but
both instructions perform a left shift.
This commit restricts this selection to `SHL` so right shifts use the
existing legalization paths.
Closes https://github.com/llvm/llvm-project/issues/242771
[LLD] Disable bitcode verification in release builds (#242663)
Similar to the plugin for other linkers, disable running the IR verifier
on bitcode input files. This improves ThinLTO link times by 1.5-1.8% and
stage2-clang build times by 0.57%.
pci_dw: Honor the max-link-speed property
The root port reports in LNKCAP the highest link speed the core was
synthesized for, which can be more than the PHY behind it supports. On
the RK3568 pcie2x1 the root port advertises 8GT/s while the PHY only
does 5GT/s. The link stays at 2.5GT/s after the directed speed change.
Read max-link-speed from the device tree and write it to the Max Link
Speed field of LNKCAP and to the Target Link Speed field of LNKCTL2
before requesting the speed change. Nothing changes when the property
is absent.
Tested on a Quartz64 Model A with a Samsung 970 EVO Plus NVMe drive: the
link now trains at 5GT/s and the sequential throughput goes from 200MB/s
to 400MB/s.
Differential Revision: https://reviews.freebsd.org/D61014
mcommphy: Set the 10/100 TX delay of the YT8511
The TX clock delay of the YT8511 is split in two registers. The delay
used in gigabit mode is in the clock gating page and was already set
from the RGMII mode, but the one used in the 10/100 modes is in the next
page and was left at its reset value of 2ns. With a phy-mode that does
not ask for a TX delay in the PHY, the MAC provides it and the PHY adds
another 2ns in the 10/100 modes.
Set it like the gigabit one, like Linux does.
Tested on a Quartz64 Model A, gigabit and 100Mbit links.
Reviewed by: oh
Differential Revision: https://reviews.freebsd.org/D61015
top: implement pid highlighting
Implement PID highlighting. This can be activated by pressing
'L' and entering a PID to highlight. Highlighting can be cleared
by entering '+' as a PID to highlight. This feature is inspired by
the OpenBSD top, which uses 'P' key for that. We have to use 'L'
because 'P' is already used for toggling per-CPU statistics.
Reviewed by: kib
Obtained from: OpenBSD (partially)
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D61090
Hexagon: Use LastSubtargetCache in getSubtargetImpl
Migrate to the new common target pattern
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
ip.4: Fix ip_mreqn imr_address field name
This manual used imr_interface when describing the second field of
struct ip_mreqn, but sys/netinet/in.h names that field imr_address.
Note that ip_mreq below does have imr_interface which is unchanged.
PR: 300680
MFC after: 3 days
Reviewed by: ziaee
Closes: https://github.com/freebsd/freebsd-src/pull/2553
[mlir][SPIR-V] Deserialize null array and struct constants (#231626)
Deserialize OpConstantNull for arrays and literal structs by recursively
building the ArrayAttr representation used by spirv.Constant. Preserve
rejection of unsupported constituent types and report the nested type
when a null value cannot be represented.
Allow OpConstantComposite with no constituents for empty structs so that
imported null empty structs can round-trip. Diagnose OpUndef
constituents explicitly instead of reporting them as missing normal
constants.
Document the supported representations and add binary deserialization,
round-trip, and negative tests for aggregate constants.
---------
Co-authored-by: Claude Fable 5.2 <noreply at anthropic.com>
xmag: update to 1.0.9.
Alan Coopersmith (6):
Improve man page formatting
man page: fix warnings from `mandoc -T lint` and `groff -rCHECKSTYLE=10`
gitlab CI: drop the ci-fairy check-mr job
Strip trailing whitespace from source files
meson: Add option to build with meson
xmag 1.0.9
AMDGPU: Fix double interval removal in SIOptimizeExecMaskingPreRA
An exec copy folded after its use was erased from an s_endpgm block
had its interval removed twice. Fixes an assert after 6a483810f0da.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[RISCV][P-ext] Use EVT in `combinePExtWidening*Acc` (#242687)
Fixes https://github.com/llvm/llvm-project/issues/242679.
The previous implementation assumes a simple value type, which is wrong
for weird-sized integers.
Assisted-by: Codex
devel/py-qt-builder: update to 1.21, adds support for qt 6.12.
see https://pyqt-builder.readthedocs.io/en/stable/releases.html#v1-21-0
switches RDEP from qtbase to qt6base, probably because it just has the
right magic to find our suffixed qmake..
built all the direct consumers without issues (py-qt5, py-qt6,
py-qscintilla, py-qtwebengine, py-qt6webengine, qgis...)
graphics/qgis-ltr: Fix once more pkg-plist
During the correction process in the previous commit, the entry for
qgis_mapserv.fcgi was accidentally updated to newer versions of QGIS.
MFH: 2026Q4
(cherry picked from commit 16fb65e819caab5ca63e82029ac232c22e512f68)
DAG: Allow narrowing sint_to_fp source to the sext source type
Same as 241c94e3919e for uint_to_fp. The narrowing fold skipped
sint_to_fp (sext x) when the narrow type matched x, so sitofp (sext i32
to i64) was expanded as a 64-bit conversion on AMDGPU.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
AMDGPU: Add more sitofp of sext from i32 tests
These currently get the full i64 conversion expansion.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
CSKY: Use LastSubtargetCache in getSubtargetImpl
Migrate to the new common pattern for targets to cache the last
result.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
graphics/qgis-ltr: Fix once more pkg-plist
During the correction process in the previous commit, the entry for
qgis_mapserv.fcgi was accidentally updated to newer versions of QGIS.
MFH: 2026Q4
SystemZ: Use LastSubtargetCache in getSubtargetImpl
Migrate to the new common pattern and infrastructure.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
WebAssembly: Use LastSubtargetCache in getSubtargetImpl
Cache the last subtarget and use the new common pattern for targets.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
