FreeBSD/src 1ad1e7btools/build beinstall.sh

beinstall: Avoid chrooting into new world

The new world may use system calls that are not in the currently-running
kernel, so we cannot chroot into the new environment to run `make
installworld`, `etcupdate`, etc.  Partially revert commit 16702050ac95
("beinstall: perform pre-installworld steps") and switch back to using
DESTDIR for installworld and so on.

Reported by:    olivier
Reviewed by:    olivier
Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D50682

(cherry picked from commit 7fde3e62231ac397a779e4fef729908c5ef6f53a)
DeltaFile
+3-4tools/build/beinstall.sh
+3-41 files

LLVM/project 8c835eellvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/PhaseOrdering/AArch64 hoist-load-from-vector-loop.ll

[VectorCombine] Align shrinkLoadForShuffles to register boundaries (#209775)

Round up the shrunk load element count to the next full vector register
boundary to avoid scalar remainders that prevent shuffle lowering.

For example, on X86 AVX-512 a <16 x double> load with shuffle indices
1-8 was shrunk to <9 x double>. This legalizes to v8f64 + scalar f64,
and the scalar operand in BUILD_VECTOR prevents DAGCombiner from folding
it into a VECTOR_SHUFFLE, producing ~15 instructions instead of 2
(VMOVDQA64 + VALIGNQ).
DeltaFile
+36-0llvm/test/Transforms/VectorCombine/X86/load-widening.ll
+33-1llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+4-4llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
+73-53 files

LLVM/project b8e3b49llvm/lib/Target/AMDGPU AMDGPUCallLowering.cpp, llvm/test/CodeGen/AMDGPU isel-amdgcn-cs-chain-intrinsic-w64.ll isel-amdgcn-cs-chain-intrinsic-w32.ll

AMDGPU/GlobalISel: Fix cs_chain use of constrainOperandRegClass

Make a copy before constraining to avoid setting register class on
a register that can be defined by generic opcode.
DeltaFile
+139-0llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
+131-0llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
+63-63llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
+18-18llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll
+8-6llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
+3-1llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+362-886 files

LLVM/project c18296fllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 vector-interleaved-load-i16-stride-5.ll

DAG: Canonicalize undef shuffle operands and results to poison (#212102)
DeltaFile
+16-10llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+2-2llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
+18-122 files

LLVM/project b10d447llvm/lib/Target/SPIRV SPIRVBuiltins.td, llvm/test/CodeGen/SPIRV/opencl vload_halfn.ll

[SPIR-V] Fix vloada_halfn builtin number (#212218)

vloada_halfn was incorrectly mapped to vload_half builtin number (174)
instead of its own (179), causing it to demangle to the wrong OpenCL
builtin
DeltaFile
+7-0llvm/test/CodeGen/SPIRV/opencl/vload_halfn.ll
+1-1llvm/lib/Target/SPIRV/SPIRVBuiltins.td
+8-12 files

LLVM/project e2b23dbllvm/test/Analysis/CostModel/AArch64 clmul-scalable.ll clmul-fixed.ll

[AArch64] Test all cost kinds in clmul tests. NFC (#212246)
DeltaFile
+36-36llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
+20-20llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
+14-14llvm/test/Analysis/CostModel/AArch64/clmul.ll
+70-703 files

LLVM/project 2c2a817llvm/test/CodeGen/AMDGPU/GlobalISel irtranslator-amdgcn-cs-chain.ll

AMDGPU/GlobalISel: Test for cs_chain argument from G_EXTRACT_VECTOR_ELT

This is a bug since G_EXTRACT_VECTOR_ELT will end up with a register
class on the dst operand. The combiner will crash because of it.
DeltaFile
+71-0llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
+71-01 files

FreeBSD/ports 09e28b1net/netpeek distinfo Makefile

net/netpeek: Update 0.2.9 => 0.3.0

Changelog:
https://github.com/ZingyTomato/NetPeek/releases/tag/v0.3.0

Reported by:    portscout
Approved by:    osa, vvd (Mentors, implicit)
DeltaFile
+3-3net/netpeek/distinfo
+1-1net/netpeek/Makefile
+4-42 files

FreeBSD/src b1f3726sys/contrib/dev/mediatek/mt76 zzz_fw_ports_fwget.sh

mt76: update script to to deal with 7921 and 7925 flavors

Update the mt76/zzz_fw_ports_fwget.sh script to set fwget to download
mt7921 and mt7925 rather than the these days non-existent mt792x flavor.

Sponsored by:   The FreeBSD Foundation
MFC after:      30 days
Differential Revision: https://reviews.freebsd.org/D57242
DeltaFile
+17-8sys/contrib/dev/mediatek/mt76/zzz_fw_ports_fwget.sh
+17-81 files

LLVM/project 456e73fllvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG switch-umin.ll

[SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (#212008)

In the test `switch_remove_dead_cases`, both case 4 and case 5 jump into
bb `%case_ret`. Thus, the edge will be removed twice, triggering an
assertion failure. This patch only removes the edge in DT when we remove
the last edge to `DeadCaseBB`.
DeltaFile
+2-1llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+1-1llvm/test/Transforms/SimplifyCFG/switch-umin.ll
+3-22 files

LLVM/project 98d41d2lldb/source/Plugins/Platform/Windows PlatformWindows.cpp CMakeLists.txt, lldb/test/API/windows/debug-heap TestWindowsDebugHeap.py main.c

[lldb][Windows] Disable debug heap by default (#212126)

This disables Windows' default debug heap when launching a process.

The motivation is similar to what Microsoft wrote on their [blog post
for Visual Studio
2015](https://devblogs.microsoft.com/cppblog/c-debugging-improvements-in-visual-studio-14/)
where they disabled it: The debug heap comes with a performance cost and
the [C runtime already does some heap
checking](https://learn.microsoft.com/en-us/cpp/c-runtime-library/crt-debug-heap-details?view=msvc-170).

Towards #201690. Notably, lldb-dap won't set this when launching in a
terminal. I think we'd want an option similar to `disableASLR` for
lldb-dap.
DeltaFile
+47-0lldb/test/API/windows/debug-heap/TestWindowsDebugHeap.py
+45-1lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
+16-0lldb/source/Plugins/Platform/Windows/CMakeLists.txt
+10-0lldb/test/API/windows/debug-heap/main.c
+10-0lldb/source/Plugins/Platform/Windows/PlatformWindowsProperties.td
+3-0lldb/test/API/windows/debug-heap/Makefile
+131-12 files not shown
+134-18 files

LLVM/project 6bb73fdorc-rt/include/orc-rt StringExtras.h

[orc-rt] Fix maybe_unused attribute. (#212237)
DeltaFile
+1-2orc-rt/include/orc-rt/StringExtras.h
+1-21 files

LLVM/project 0695ea8llvm/lib/TableGen TGLexer.cpp, llvm/test/TableGen eof-after-endif.td

[TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (#208961)

Part of #151476 

prepSkipRegion currently scans a line until it finds a newline before
advancing to the next line. It crashes if it finds an EOF first. This
change checks for EOF to prevent a segmentation fault.
DeltaFile
+10-0llvm/test/TableGen/eof-after-endif.td
+1-1llvm/lib/TableGen/TGLexer.cpp
+11-12 files

FreeBSD/ports 4b44fe1net/openmpi Makefile distinfo, net/openmpi/files patch-opal_mca_common_ucx_common__ucx.c patch-ompi_mca_sharedfp_sm_sharedfp__sm.h

net/openmpi: Introduce UCX option

- Introduce option to use net/ucx
- Remove upstreamed ompi/mca/sharedfp/sm/sharedfp_sm.h patch
- Fix OMPIO sharedfp/sm crash (PR 296139)
- Add missing header for __syscall
- While there, improve modulefile

PR:             293793
Reviewed by:    thierry (mentor)
Approved by:    thierry (mentor)
Reported by:    Generic Rikka <rikka.goering at outlook.de>
DeltaFile
+15-8net/openmpi/Makefile
+12-0net/openmpi/files/patch-opal_mca_common_ucx_common__ucx.c
+0-10net/openmpi/files/patch-ompi_mca_sharedfp_sm_sharedfp__sm.h
+10-0net/openmpi/files/patch-configure
+3-1net/openmpi/distinfo
+1-1net/openmpi/pkg-plist
+41-201 files not shown
+42-207 files

LLVM/project aa50eb6llvm/lib/CodeGen/AsmPrinter DwarfDebug.cpp, llvm/test/DebugInfo/Generic varargs.ll

[DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (#211536)

RFC
https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544

This patch proposes to move the emission of types and type-like entities
from `DwarfDebug::beginModule()` to `DwarfDebug::endModule()`.
Effectively, this changes nothing but the order of debug entities in the
resulting DWARF.

This is needed to simplify DWARF emission in a context of proper support
of function-local types, making all the types handled in a single place,
together with other global and local entities.

This change has already been reviewed and approved in
https://reviews.llvm.org/D144008, but I’m opening a new PR for
visibility.

Co-authored-by: Kristina Bessonova <kbessonova at accesssoftek.com>
DeltaFile
+31-30llvm/test/DebugInfo/X86/gnu-public-names.ll
+21-21llvm/test/DebugInfo/NVPTX/debug-loc-offset.ll
+15-13llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+8-16llvm/test/DebugInfo/X86/string-offsets-multiple-cus.ll
+11-13llvm/test/DebugInfo/X86/generate-odr-hash.ll
+10-10llvm/test/DebugInfo/Generic/varargs.ll
+96-10315 files not shown
+148-14221 files

FreeBSD/src 7925256usr.sbin/fwget/pci pci_network_ittim pci_network_mediatek

fwget: update MediaTek firmware listings to match ports

Update fwget(8) to download wifi-firmware-mt76-kmod-mt7921, and
wifi-firmware-mt76-kmod-mt7925 firmware packages instead of the
no longer available mt792x version.
Add another PCI vendor to recognize ITTIM IDs for mt7921-based
MediaTek cards.

(bz reduced the license in the ittim file to an SPDX tag and updated
the commit message, given this is only half the work from the review)

Sponsored by:   The FreeBSD Foundation
MFC after:      3 days
Differential Revision:  https://reviews.freebsd.org/D57242
DeltaFile
+24-0usr.sbin/fwget/pci/pci_network_ittim
+7-7usr.sbin/fwget/pci/pci_network_mediatek
+1-0usr.sbin/fwget/pci/pci
+32-73 files

FreeNAS/freenas 9e4f4a8src/middlewared/middlewared/plugins/cloud_sync lock.py

NAS-141918 / 27.0.0-BETA.1 / Simplify cloud_sync SyncRWLock internals (#19391)

I noticed some changes to this code in a previous PR that has since been
merged and realized we're being inefficient when it comes to the locking
primitives. SyncRWLock kept a separate threading.Lock and wrapped it in
a Condition, but a Condition can own its lock directly. The extra
attribute is gone and every critical section now enters the Condition
itself. Behavior is identical since the lock is never acquired
reentrantly.

Also removes FsLockManager._choose_lock, dead code superseded by
_choose_sync_lock.

No public API changes. The only consumers use the manager's lock()
context managers, which are unchanged.
DeltaFile
+17-25src/middlewared/middlewared/plugins/cloud_sync/lock.py
+17-251 files

FreeNAS/freenas 4bc858asrc/middlewared/middlewared/plugins/cloud_sync lock.py

address review
DeltaFile
+12-12src/middlewared/middlewared/plugins/cloud_sync/lock.py
+12-121 files

OpenBSD/ports adVwgQ3www/p5-WWW-Mechanize distinfo Makefile

   update p5-WWW-Mechanize to 2.22
VersionDeltaFile
1.40+2-2www/p5-WWW-Mechanize/distinfo
1.50+1-1www/p5-WWW-Mechanize/Makefile
+3-32 files

OpenBSD/ports s386ckXwww/p5-WWW-Mechanize-Shell Makefile, www/p5-WWW-Mechanize-Shell/patches patch-lib_WWW_Mechanize_Shell_pm patch-t_14-command-identity_t

   p5-WWW-Mechanize 2.22 API has changed.  Apply patches for
   p5-WWW-Mechanize-Shell 0.62 to avoid security problem and warning.
   p5-WWW-Mechanize-Shell tests pass with both versions of p5-WWW-Mechanize.
VersionDeltaFile
1.1+90-0www/p5-WWW-Mechanize-Shell/patches/patch-lib_WWW_Mechanize_Shell_pm
1.1+15-0www/p5-WWW-Mechanize-Shell/patches/patch-t_14-command-identity_t
1.11+1-0www/p5-WWW-Mechanize-Shell/Makefile
+106-03 files

LLVM/project 3ca666fllvm/lib/Target/SystemZ SystemZISelLowering.cpp SystemZSelectionDAGInfo.cpp, llvm/test/CodeGen/SystemZ memmove-01.ll

[SystemZ] Improve handling of memmoves. (#196285)

Handle memmoves of constant lengths up to 256 bytes with target
instructions instead of libcall.
DeltaFile
+386-475llvm/test/CodeGen/SystemZ/memmove-01.ll
+51-3llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+19-0llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp
+10-4llvm/lib/Target/SystemZ/SystemZInstrInfo.td
+7-0llvm/lib/Target/SystemZ/SystemZSelectionDAGInfo.h
+2-0llvm/lib/Target/SystemZ/SystemZOperators.td
+475-4821 files not shown
+477-4827 files

FreeNAS/freenas 6457321src/middlewared/middlewared/etc_files/sssd sssd.conf.mako

NAS-141936 / 26.0.0-RC.1 / Fix invalid `sssd.conf` configuration when directory service `auxiliary_parameters` are invalid (#19398)
DeltaFile
+1-1src/middlewared/middlewared/etc_files/sssd/sssd.conf.mako
+1-11 files

LLVM/project 225e988llvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU stress-regalloc-limits-sched.mir stress-regalloc-limits-regalloc.mir

[AMDGPU] Add per-class register stress options (#210907)

Add options -amdgpu-stress-vgpr=N, -amdgpu-stress-agpr=N, and
-amdgpu-stress-sgpr=N to limit each register class independently by
reserving registers beyond N.
DeltaFile
+64-0llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-sched.mir
+60-0llvm/test/CodeGen/AMDGPU/stress-regalloc-limits-regalloc.mir
+20-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+144-03 files

NetBSD/pkgsrc IwvoodSdevel/meson build.mk

   meson: pass CFLAGS, CPPFLAGS, CXXFLAGS, and LDFLAGS in the recommended way
VersionDeltaFile
1.34+14-1devel/meson/build.mk
+14-11 files

LLVM/project d7acf8cllvm/lib/CodeGen InlineSpiller.cpp, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-interference.mir

[InlineSpiller] Avoid spill hoisting interference (#211809)

When hoisting spills and the source is a PHI, the "hoisted" spill may be
inserted only after the basic block prologue. This may require extending
this segment of the source value's live interval.

Abort the hoisting if this extension of the segment would interfere with
another live interval assigned to the same physical register.

Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
DeltaFile
+45-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-interference.mir
+28-10llvm/lib/CodeGen/InlineSpiller.cpp
+73-102 files

OpenBSD/ports 9kB9IWGwww/chromium distinfo Makefile, www/chromium/patches patch-third_party_blink_common_features_cc

   update to 150.0.7871.186
VersionDeltaFile
1.162+6-6www/ungoogled-chromium/distinfo
1.485+4-4www/chromium/distinfo
1.15+2-2www/ungoogled-chromium/patches/patch-third_party_blink_common_features_cc
1.15+2-2www/chromium/patches/patch-third_party_blink_common_features_cc
1.245+1-1www/ungoogled-chromium/Makefile
1.920+1-1www/chromium/Makefile
+16-166 files

LLVM/project a48aefdllvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp, llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx RWBufferNonUniformIdxLoop.ll

[SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (#208224)

Add a visited set so an SSA cycle through a loop-carried phi does not
hang the worklist walk
DeltaFile
+40-0llvm/test/CodeGen/SPIRV/hlsl-resources/NonUniformIdx/RWBufferNonUniformIdxLoop.ll
+12-5llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+52-52 files

FreeBSD/ports 29f61eadatabases/immudb Makefile

databases/immudb: deprecate and expire

Not actively maintained (by me).
Multiple versions behind on upstream.
Please take maintainership if you use this.
DeltaFile
+4-1databases/immudb/Makefile
+4-11 files

NetBSD/pkgsrc kp732szcomms/gkermit distinfo, comms/gkermit/patches patch-makefile

   (comms/gkermit) Fix ERROR: bin/gkermit: missing RELRO
VersionDeltaFile
1.1+28-0comms/gkermit/patches/patch-makefile
1.11+2-1comms/gkermit/distinfo
+30-12 files

LLVM/project 2f60c93libsycl/src usm_functions.cpp

[SYCL] Update SYCL to use the new liboffload allocation API (#212223)

PR #209196 split host memory allocations into a dedicated API. Update
SYCL to use the new host allocation function introduced by that change.
DeltaFile
+6-3libsycl/src/usm_functions.cpp
+6-31 files