FreeBSD/ports 659821b — www/phalcon Makefile distinfo

www/phalcon: update to 5.23.0.
DeltaFile
+3-3www/phalcon/distinfo
+1-1www/phalcon/Makefile
+4-42 files

OpenBSD/ports Ewr9R9W — productivity/khal Makefile distinfo

   update to khal-0.14.1
VersionDeltaFile
1.12+2-2productivity/khal/distinfo
1.29+1-1productivity/khal/Makefile
+3-32 files

OpenBSD/ports OHPPap2 — productivity/vdirsyncer distinfo Makefile

   update to vdirsyncer-0.21.0, dropping pkg_resources use
   ok remi
VersionDeltaFile
1.37+4-5productivity/vdirsyncer/Makefile
1.10+2-2productivity/vdirsyncer/distinfo
+6-72 files

LLVM/project 8324795 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-intrinsics-and-not.ll

[AArch64][llvm] Combine SVE AND-NOT operations into BIC for _x forms

Replace NOT followed by AND with BIC for expressions such as:

  return svand_u32_x(svptrue_b32(), a, svnot_u32_x(svptrue_b32(), b));

Combine ordinary AND with NOT when the NOT predicate is all-active or
its inactive values are undefined.

Also combine matching-predicate SVE AND_x-NOT pairs before lowering
discards the AND predicate. AND_x ignores inactive results, so the NOT's
inactive values do not need preserving.

This applies to all integer element widths. Update the pre-commit LLVM
expectations, including cases where combining would change the
result.
DeltaFile
+22-101llvm/test/CodeGen/AArch64/sve-intrinsics-and-not.ll
+34-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+56-1032 files

LLVM/project 5c4cf2f — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-intrinsics-and-not.ll

[AArch64][llvm] Combine SVE AND-NOT operations into BIC for _m forms

Replace NOT followed by merging AND with BIC for expressions such as:

  return svand_u32_m(pg, a, svnot_u32_x(pg, b));

Combine when NOT is the second operand and its predicate matches the AND
predicate or is all-active.

Use predicated BIC to preserve the AND's first operand in inactive
lanes. Use unpredicated BIC when the AND predicate is all-active.

Do not commute merging AND operands, since this would change inactive
results. Leave pairs with incompatible predicates unchanged.

This applies to all integer element widths. Update the pre-commit LLVM
expectations, including cases where combining would change the
result.
DeltaFile
+12-48llvm/test/CodeGen/AArch64/sve-intrinsics-and-not.ll
+22-10llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+34-582 files

LLVM/project d9c5f3d — llvm/test/CodeGen/AArch64 sve-intrinsics-and-not.ll

[AArch64][llvm] Add pre-commit tests for SVE AND-NOT combining

Add LLVM tests for expressions where NOT followed by AND could
use BIC. Record the existing assembly so the following changes show the
missed optimisations being fixed.

Cover _x and _m AND forms using all-active and runtime predicates. Test
_m forms across all integer element widths. Include NOT with defined
inactive values and reversed AND operands.

Also test cases that must remain as NOT followed by AND because
combining would change the values in inactive lanes.
DeltaFile
+346-0llvm/test/CodeGen/AArch64/sve-intrinsics-and-not.ll
+346-01 files

FreeBSD/ports 2f70d66 — audio/wasabi Makefile

audio/wasabi: change to lang/rust from lang/rust-nightly

PR:             276448
Suggested by:   Jan Beich <jbeich at FreeBSD.org>
DeltaFile
+2-2audio/wasabi/Makefile
+2-21 files

OpenBSD/ports 3t2hpjZ — devel/py-twisted distinfo Makefile, devel/py-twisted/patches patch-src_twisted_internet_test_test_tcp_py

   update to py3-twisted-26.4.0
   disable gireactor test which kills the test runner (at least in no X +
   PORTS_PRIVSEP environment) to allow following tests to run
VersionDeltaFile
1.30+21-14devel/py-twisted/Makefile
1.16+28-3devel/py-twisted/pkg/PLIST
1.11+2-2devel/py-twisted/distinfo
1.6+1-1devel/py-twisted/patches/patch-src_twisted_internet_test_test_tcp_py
+52-204 files

LLVM/project 0a68306 — clang/test/CodeGen ms-intrinsics-other.c ms-intrinsics.c

Fix clang lit test
DeltaFile
+12-12clang/test/CodeGen/ms-intrinsics.c
+4-4clang/test/CodeGen/ms-intrinsics-other.c
+16-162 files

OPNSense/core dd9aede — src/opnsense/mvc/app/controllers/OPNsense/Diagnostics/Api SystemhealthController.php, src/opnsense/scripts/health listReports.py

health: optimize quality graphs

Separate the percentages unit to a separate right-side axis, and
format the left-side axis logarithmically. Make sure the tooltips
contain the right units as well.
DeltaFile
+108-25src/opnsense/www/js/opnsense_health.js
+22-0src/opnsense/scripts/health/definitions/gateway-quality.xml
+12-2src/opnsense/mvc/app/controllers/OPNsense/Diagnostics/Api/SystemhealthController.php
+5-2src/opnsense/scripts/health/listReports.py
+147-294 files

LLVM/project cc227eb — flang/docs InlineRuntimeChecks.md, flang/lib/Optimizer/CodeGen CodeGen.cpp

[flang] Refine fir.assert verification and target lowering

Restrict diagnostic values to i8, i16, i32, i64, and index, requiring
producers to choose how boolean values are extended. Use target global
address spaces for diagnostic strings and cast their addresses for calls.

Use runtime entry-name macros and a named fixed-value limit, remove a
redundant verifier check, and cover incompatible declarations, symbol
conflicts, explicit boolean extension, and global address spaces in tests.
DeltaFile
+79-0flang/test/Fir/assert-codegen-invalid.fir
+29-0flang/test/Fir/assert-codegen.fir
+14-7flang/lib/Optimizer/CodeGen/CodeGen.cpp
+18-2flang/test/Fir/assert-invalid.fir
+14-0flang/test/Fir/assert-array-codegen.fir
+5-3flang/docs/InlineRuntimeChecks.md
+159-122 files not shown
+164-218 files

LLVM/project 23579f4 — flang/lib/Optimizer/CodeGen CodeGen.cpp, flang/lib/Optimizer/Dialect FIROps.cpp

[flang] Add fir.assert and its LLVM lowering

Introduce a non-speculatable assertion with typed guarded results and a
write effect on a non-addressable Fortran runtime resource. Verify its
message and diagnostic operands, and erase constant-true assertions.
Keep attribute and optionality queries able to inspect guarded values
without making rewriting operations transparent to the guard.

Lower assertions to a weighted branch, a noreturn runtime call on failure,
and guarded operands on success. Pack larger diagnostic payloads into an
array on the failure path and preserve source locations and device symbol
scope. Add dialect, code generation, effect, and variable-query tests.

This introduces the operation without emitting it from source lowering.
DeltaFile
+145-1flang/lib/Optimizer/CodeGen/CodeGen.cpp
+74-3flang/lib/Optimizer/Dialect/FIROps.cpp
+75-0flang/test/Fir/assert-array-codegen.fir
+72-0flang/test/Fir/assert.fir
+71-0flang/test/Fir/assert-invalid.fir
+68-0flang/test/Fir/assert-codegen.fir
+505-46 files not shown
+703-412 files

LLVM/project b6c2805 — flang-rt/lib/runtime stop.cpp, flang-rt/unittests/Runtime Stop.cpp

[flang-rt] Add fatal diagnostics with integer values (#231241)

Add noreturn runtime entries for messages with integer diagnostic
values. Use a fixed four-value signature for small messages and a
count-and-array signature for larger payloads, keeping both callable
from device code.

The array entry accepts the restricted %lld/%% format, checks argument
counts and allocation sizes, and preserves the existing source location,
crash handler, and termination behavior. Document the runtime interfaces
in the inline-check design and cover formatting and failures in unit
tests.

Assisted-by: AI
DeltaFile
+81-0flang-rt/unittests/Runtime/Stop.cpp
+57-0flang-rt/lib/runtime/stop.cpp
+17-10flang/docs/InlineRuntimeChecks.md
+18-0flang/include/flang/Runtime/stop.h
+173-104 files

NetBSD/pkgsrc-wip 5ccf501 — . TODO

TODO: + forgejo-17.0, llama.cpp-0.7.0.
DeltaFile
+2-0TODO
+2-01 files

FreeBSD/ports f09187e — databases/mongodb90 Makefile.bazel-cache Makefile, databases/mongodb90/files patch-bazel_crates.lock bazel-distfiles.py

databases/mongodb90: build on aarch64

Use --batch just like mongodb80.
Remove huge local bazel-cache distfile by downloading the original distfiles.
DeltaFile
+1,399-3databases/mongodb90/distinfo
+671-0databases/mongodb90/Makefile.crates
+205-45databases/mongodb90/files/patch-bazel_crates.lock
+250-0databases/mongodb90/files/bazel-distfiles.py
+141-13databases/mongodb90/Makefile
+41-101databases/mongodb90/Makefile.bazel-cache
+2,707-1626 files not shown
+3,016-19712 files

OPNSense/plugins 5ac2959 — security/strongswan-legacy Makefile, security/strongswan-legacy/src/sbin ping_hosts.sh

security/strongswan-legacy: sync with master
DeltaFile
+119-0security/strongswan-legacy/src/sbin/ping_hosts.sh
+1-1security/strongswan-legacy/Makefile
+120-12 files

FreeBSD/src 38479a4 — sys/netinet sctp_indata.c

sctp: improve locking validation

Ensure that the TCB lock is hold in sctp_calc_rwnd().

Reviewed by:    tuexen
MFC after:      1 week
MFC to:         stable/14
MFC to:         stable/15
DeltaFile
+2-0sys/netinet/sctp_indata.c
+2-01 files

OpenBSD/ports oXVeEAB — www/py-hyperlink Makefile

   add homepage and TDEP
VersionDeltaFile
1.18+15-12www/py-hyperlink/Makefile
+15-121 files

LLVM/project 1201d9d — mlir/include/mlir/Dialect/X86 Transforms.h, mlir/include/mlir/Dialect/X86/TransformOps X86TransformOps.td

[mlir][x86] Add pattern to tile and unroll vector.contract for AMX nanokernel (#229076)

Introduces a new rewrite pattern to tile and unroll a `vector.contract`
inside an accumulation loop into a loop nest and smaller accumulation
chains on which the AMX nanokernel pattern can match.

The rationale is to provide an entry point for tile-based DSLs that
leave tiling decisions to the user, and compile directly to `vector` IR,
bypassing the usual infrastructure.

This PR covers the AMX BF16 and int8 targets. The pattern match is quite
rigid in this initial version, as the transformation reconstructs the
accumulation loop with smaller shapes instead of rewriting, and the
contraction's shape must be cleanly unrollable to the nanokernel-sized
contractions.

Assisted-by: Copilot
DeltaFile
+1,933-0mlir/test/Dialect/X86/vector-contract-multi-level-unroll-for-amx.mlir
+901-0mlir/lib/Dialect/X86/Transforms/VectorContractMultiLevelUnroll.cpp
+11-0mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
+5-0mlir/lib/Dialect/X86/TransformOps/X86TransformOps.cpp
+5-0mlir/include/mlir/Dialect/X86/Transforms.h
+1-0mlir/lib/Dialect/X86/Transforms/CMakeLists.txt
+2,856-06 files

LLVM/project 533c70f — flang-rt/include/flang-rt/runtime numeric-templates.h, flang-rt/unittests/Runtime Reduction.cpp Numeric.cpp

[Flang] Introduce common::numeric_limits (#228108)

On platforms that do not have a native (u)int128_t, the class
`Int128<IS_SIGNED>` is meant to provide its own implementation. The C++
specification allows programs to provide its own specializations of
`std::numeric_limits<T>` for such user-defined types
([[namespace.std]](http://www.eel.is/c++draft//namespace.std#2)).
However, the combination of clang-cl using the MSVC STL or libstdc++ in
strict mode poses a problem:
1. While Clang has a int128_t native type, MSVC's STL implementation
does not provide a `std::numeric_limits<T>` specialization for it
(because Microsoft's cl.exe doesn't have a 128 bit integer type).
2. Some versions if libstdc++ disable all uses of __int128 in strict
mode (-std=c++NN instead of -std=gnu++NN), including the specialization
of `std::numeric_limits<T>`. Moreover, `std::numeric_limits<__int128>`
being specialized does not mean that `std::make_unsigned_t<__int128>`
also is.

A previous solution in #216958 was to provide our own specialization of

    [14 lines not shown]
DeltaFile
+149-0flang/include/flang/Common/numeric-limits.h
+47-49flang-rt/unittests/Runtime/Numeric.cpp
+71-0flang/unittests/Evaluate/uint128.cpp
+45-9flang-rt/unittests/Runtime/Reduction.cpp
+47-0flang/include/flang/Common/uint128.h
+9-18flang-rt/include/flang-rt/runtime/numeric-templates.h
+368-7640 files not shown
+470-16746 files

OpenBSD/ports pKp8iq4 — devel/py-txaio Makefile distinfo

   update to py3-txaio-26.6.1
VersionDeltaFile
1.8+2-2devel/py-txaio/distinfo
1.23+1-1devel/py-txaio/Makefile
+3-32 files

OPNSense/plugins b07b14c — net/frr Makefile, net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/Migrations M1_1_5.php

net/frr: sync with master
DeltaFile
+5-1net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/Migrations/M1_1_5.php
+1-0net/frr/Makefile
+6-12 files

LLVM/project 81b9bb2 — llvm/lib/Target/LoongArch LoongArchOptWInstrs.cpp, llvm/test/CodeGen/LoongArch sextw-removal.ll sextw-hoisting.ll

[LoongArch] OptWInstrs: Sign-extend outer PHI operands to remove sext.w in loops

A sext.w inside a loop often cannot be removed only because one of the
values reaching it comes in through a PHI from outside the loop and is not
known to be sign-extended, e.g. an i32 argument that is only any-extended:

  preheader:
    ...
  loop:
    %p = PHI %x, %preheader, %next, %loop
    %s = ADDI_W %p, 0
    %next = ADD_D %p, ...

If every other value reaching the sext.w is sign-extended, sign-extend
those PHI operands in their incoming blocks instead and remove the sext.w.
This trades a sext.w executed on every iteration for one executed once per
entry into the loop.

Only incoming blocks with a smaller loop depth than the sext.w are

    [8 lines not shown]
DeltaFile
+171-17llvm/test/CodeGen/LoongArch/sextw-hoisting.ll
+86-9llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
+6-6llvm/test/CodeGen/LoongArch/sextw-removal.ll
+263-323 files

LLVM/project 9ca75e9 — llvm/test/CodeGen/LoongArch sextw-hoisting.ll

[LoongArch][NFC] Pre-commit tests for sext.w removal through outer PHI operands
DeltaFile
+266-0llvm/test/CodeGen/LoongArch/sextw-hoisting.ll
+266-01 files

OPNSense/plugins 506d12e — net/frr Makefile

net/frr: bump after fix
DeltaFile
+1-0net/frr/Makefile
+1-01 files

OPNSense/core 9d0a3d4 — src/opnsense/mvc/app/models/OPNsense/Diagnostics Lvtemplate.xml

firewall: appease linter for live log template model

(cherry picked from commit 660c2bc028a20e0190f89a87781453d0ebd370e2)
DeltaFile
+3-1src/opnsense/mvc/app/models/OPNsense/Diagnostics/Lvtemplate.xml
+3-11 files

OPNSense/core 775c735 — src/opnsense/mvc/app/controllers/OPNsense/Kea/forms dialogSubnet4.xml, src/opnsense/mvc/app/models/OPNsense/Kea KeaDhcpv4.xml KeaDhcpv4.php

Services: Kea DHCPv4: Add a simple shared_networks option to subnets

Subnets can now select an interface, subnets with the same interface will be put into a shared network.

This means its not decided by the interface IP of the receiving interface anymore, but by a mandatory client-classes membership
which is decided by matching a single DHCP option of the users choice as the gatekeeper to the subnet.

This way, multiple subnets can be served from the same interface.
DeltaFile
+56-1src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.php
+56-0src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.xml
+50-0src/opnsense/mvc/app/controllers/OPNsense/Kea/forms/dialogSubnet4.xml
+8-2src/opnsense/scripts/kea/get_kea_leases.py
+6-1src/opnsense/mvc/app/views/OPNsense/Kea/dhcpv4.volt
+176-45 files

LLVM/project 991ad12 — llvm/include/llvm/Analysis InlineCost.h, llvm/lib/Analysis InlineAdvisor.cpp InlineCost.cpp

[Inliner] Change CalleeTTI -> CallerTTI

It makes more sense to use the caller's TTI, as this way we can query
whether the instruction can be inlined into the parent function, using
state described by the caller's TTI.

For example, for AArch64 SME where a function can be in a different mode
(streaming/non-streaming), the cost-model gives different answers based
on the TTI used.

For now, we don't expect to see any changes in behaviour as there are
currently no targets where it makes different cost/inlining-decisions
based on which TTI is used.
DeltaFile
+11-11llvm/lib/Analysis/InlineCost.cpp
+8-8llvm/lib/Analysis/InlineAdvisor.cpp
+5-5llvm/lib/Transforms/IPO/SampleProfile.cpp
+5-5llvm/include/llvm/Analysis/InlineCost.h
+4-4llvm/lib/Transforms/IPO/AlwaysInliner.cpp
+3-3llvm/lib/Transforms/IPO/PartialInlining.cpp
+36-364 files not shown
+43-4310 files

LLVM/project 6e73ce6 — clang/test/CIR/CodeGen fast-math-pragmas.c no-builtin-call.c, llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp

Merge branch 'main' into users/void/asm-rm-2-fold-tied-operands
DeltaFile
+3-437llvm/test/Transforms/SLPVectorizer/AArch64/or-reduction-byte-pack.ll
+226-0clang/test/CIR/CodeGen/fast-math-flags.c
+126-2clang/test/CIR/CodeGen/fp-contract.c
+43-62llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+98-0clang/test/CIR/CodeGen/no-builtin-call.c
+90-0clang/test/CIR/CodeGen/fast-math-pragmas.c
+586-50187 files not shown
+1,688-74793 files

OPNSense/core 33f4a27 — src/opnsense/mvc/app/controllers/OPNsense/Kea/forms dialogSubnet4.xml, src/opnsense/mvc/app/models/OPNsense/Kea KeaDhcpv4.xml KeaDhcpv4.php

Services: Kea DHCPv4: Add a simple shared_networks option to subnets

Subnets can now select an interface, subnets with the same interface will be put into a shared network.

This means its not decided by the interface IP of the receiving interface anymore, but by a mandatory client-classes membership
which is decided by matching a single DHCP option of the users choice as the gatekeeper to the subnet.

This way, multiple subnets can be served from the same interface.
DeltaFile
+56-1src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.php
+56-0src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.xml
+50-0src/opnsense/mvc/app/controllers/OPNsense/Kea/forms/dialogSubnet4.xml
+8-5src/opnsense/mvc/app/views/OPNsense/Kea/dhcpv4.volt
+8-2src/opnsense/scripts/kea/get_kea_leases.py
+178-85 files