[CIR][ABI] Honor abi::ArgInfo::CanBeFlattened in the call-conv lowering (#220579)
**Summary:**
- CanBeFlattened landed on abi::ArgInfo in main
(llvm/llvm-project#220558).
- Consume the abi::ArgInfo::CanBeFlattened flag in the CIR
call-convention lowering bridge.
Assisted by: Claude Opus 4.8
[MLGO] Diagnose unavailable ML advisors under the new pass manager (#224585)
Without an ML model there is no release or development advisor
The legacy pass manager says so and uses the default advisor, but the
new one just crashed
www/linux-brave: DRM out of the box, GPU auto-detection
Add a WIDEVINE option (default on) so DRM playback works with no
browser-side setup once the CDM is present. The option links
${PREFIX}/lib/WidevineCdm into the Brave install directory, where the
component updater discovers it as a preinstalled component, and runs a
pre-launch seed script that sets brave.widevine_opted_in and maintains
the Widevine component hint file: Chromium registers the CDM at
startup from the hint and never repairs it itself, so the script
plants the hint before the first launch and repoints it when its
target no longer holds a CDM (e.g. after the CDM port is reinstalled),
while leaving intact hints -- including one naming a newer
component-updated CDM -- alone.
The option adds no dependency: Google's license permits fetching the
CDM but not redistributing it (www/linux-widevine-cdm is
no-pkg-mirror), so a RUN_DEPENDS would keep linux-brave itself off the
package mirrors. Everything the option installs is inert until the
user builds www/linux-widevine-cdm from ports -- the symlink dangles
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atari: Fix 68030 SRP setup across kernel relocation
protorp[1] is currently updated after the kernel has been copied to
TT-RAM in RELOC_KERNEL case. The following PMOVE reads the ST-RAM
copy while the MMU is disabled, so this happens to work when enabling
the MMU. After the MMU is enabled, however, protorp refers to the
relocated copy, where protorp[1] still contains its old value.
Fortunately, this is not currently fatal because later uses of
protorp overwrite protorp[1] with the root table address before
loading the root pointer. However, any writes to global variables
after relocation leave the reloacated kernel state inconsistent.
Set protorp[1] before copying the kernel so that the relocated copy
also contains the root table address. This matches the ordering used
by amiga.
The PMOVE inline asm also specifies only the address of protorp as an
input, even though it reads both words of the SRP prototype from memory.
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[compiler-rt] Use integers for __gnu_h2f_ieee and __gnu_f2h_ieee (#220167)
In libgcc, these conversion routines use integers in the signature. In
practice compiler-rt's definition has worked because the AAPCS calling
convention passes and returns floats the same as the same-sized integer,
but this may not be the case on all platforms. Thus, update the
signatures to match GCC.
This new version calls the inlined functions directly., changing the
generated code from:
00000000 <__extendhfsf2>:
0: ee100a10 vmov r0, s0
4: e1a01000 mov r1, r0
<snip>
60: e1800001 orr r0, r0, r1
64: ee000a10 vmov s0, r0
68: e12fff1e bx lr
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[C++20] [Modules] Profiling non dependent noexcept expression by pointer (#224528)
Another approach to solve
https://github.com/llvm/llvm-project/issues/191361 and
https://github.com/llvm/llvm-project/issues/224180 than
https://github.com/llvm/llvm-project/pull/222148
I want to avoid competing PR but I do feel the original one's approach
seems too workaround. And I want to emphasize that, in my experience,
finding the root cause is much more harder than find the solution to me.
Many thanks to @ispeters
For the approach itself, I described them in the comments of the PR.
Note that the real problem is we were profiling something is not
completely deserialized, so that even if it is not crash, the logic is
not correct.
[AMDGPU] Fold 24 bit multiply with zero low bits
Fold `MUL_I24` and `MUL_U24` to zero when either operand has known zero
low 24 bits.
For example:
```
llvm.amdgcn.mul.i24(x, 0x01000000) -> 0
```
[SelectionDAG][AMDGPU] Fold mul24 with an AND operand whose low bits are zero
Use SimplifyMultipleUseDemandedBits to simplify AND operands based on the
low 24 bits consumed by mul24.
Fold the multiply to zero when the simplified operand is zero.
This folds cases such as:
mul24(x & 0xff000000, y) -> 0
[SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits
Replace a non-zero constant with zero when none of its set bits are
demanded.
This allows users of `SimplifyMultipleUseDemandedBits` to eliminate
irrelevant constant bits while preserving the convention that a null
SDValue indicates no simplification.
[AMDGPU] Return zero LDS encoding granularity for dummy targets
Remove the redundant early return and assertion from getLDSEncodingGranule. Return zero when the target has no encoding granularity feature, and document and test the result for unknown and legacy generic targets.
Keep the existing 256-byte default in the assembly printer so compiling without a GPU still produces valid LDS sizes. Test default-target Mesa and PAL encodings and HSA metadata.
Change-Id: Ia0c69a0d7ce2858b31ee64100d37ae34bba6c42c
[AMDGPU] Add LDS encoding granularity to TargetParser
Model LDS encoding granularity with dedicated features and expose the
byte-valued getLDSEncodingGranule query for GPUKind and subarch. Keep
encoding independent of the hardware allocation granularity used for
occupancy; GFX10.3, GFX11 and GFX12.0 encode in 512-byte units while
allocating 1024-byte blocks.
Migrate program resource register and PAL metadata encoding to the new
query and remove getLdsDwGranularity from AMDGPUBaseInfo. gfx9-4-generic
uses gfx950's 1280-byte encoding granule independently of LDS capacity.
Test encoding queries, feature membership, generic-target validation and
encoded LDS sizes, including the GFX10.3 allocation/encoding distinction.
Change-Id: I9d3c2c041605e9a45fa8fbda09fc3460a74953ea
nfsuserd.c: Fix handling where pw_name/gr_name differ from lookup name
When an NSS backend returns a canonical pw_name or gr_name that differs from
the lookup name supplied by the NFSv4 upcall, nfsuserd stores the successful
mapping in the kernel cache under the canonical name instead of the requested
name.
This causes the retry lookup performed by nfsv4_strtouid() or
nfsv4_strtogid() to miss the newly inserted cache entry, resulting in the
default UID/GID being returned although the NSS lookup itself succeeded.
PR: 296753
(cherry picked from commit 1771ab245c2341033f0cee3bd098c76888cf3515)
nfsuserd.c: Fix handling where pw_name/gr_name differ from lookup name
When an NSS backend returns a canonical pw_name or gr_name that differs from
the lookup name supplied by the NFSv4 upcall, nfsuserd stores the successful
mapping in the kernel cache under the canonical name instead of the requested
name.
This causes the retry lookup performed by nfsv4_strtouid() or
nfsv4_strtogid() to miss the newly inserted cache entry, resulting in the
default UID/GID being returned although the NSS lookup itself succeeded.
PR: 296753
(cherry picked from commit 1771ab245c2341033f0cee3bd098c76888cf3515)
[SelectionDAG] Fix FP8 conversions to half for subnormals and overflow
Preserve subnormal values when the source format and destination have the
same exponent bias. Normalizing these inputs previously produced a
nonpositive destination exponent and an invalid floating-point encoding.
Convert finite values beyond the destination exponent range to infinity,
while preserving the existing NaN handling. This fixes Float8E5M3FNU to
half conversions that previously produced NaNs on overflow.
Add scalar and vector coverage for subnormals, signed zeros, normal
boundaries, all seven overflowing E5M3FNU encodings, and NaNs.