[clang][CUDA] Add new new CUDA and PTX versions (#197992)
PTX 9.1 and 9.2 already exists in LLVM, so this change just plumbs these
versions into clang to allow using newer instructions when we're
compiling with cuda-13.x
filter: DHCPv6 server rules for track mode should be excluded in "Identity association" mode, which uses the same field [track6-interface] to determine which interface to bind to. closes https://github.com/opnsense/core/issues/10316
[flang-rt][NFC] Split up expensive .cpp files into multiple files (#198111)
Summary:
This PR simply takes the existing `.cpp` files for the heaviest
implementations and separates them logically, typically between real,
integer, and complex types. The existing `.cpp` file is turned into a
`.h` file and we create new `.cpp` files that *only* contain the old
portion that used `RTDEF`. This allows for far more build system
parallelism, and it also means that static library linking semantics
mean that if the user only uses integer routines the linker will not
include the unused complex / real routines in the final executable.
All around this is a good practice for runtime libraries. Verified that
all `_Fortran` entrypoint routines are still present, port was strictly
mechanical.
The result of all of this is that I can now build `flang-rt` in ~10s
with all threads instead of ~50s due to the most expensive files being
split into parallelizable chunks.
[llvm-dwarfdump] Decode the virtual register names from the dwarf register numbers (#192353)
Backends like `NVPTX` encode virtual register names as the DWARF
register number- the ASCII bytes of the name are concatenated into a
uint64_t.
This change adds fallback logic to decode these dwarf register numbers
into strings.
This improves the readability of Dwarfdump output.
e.g.
Before the change-
` DW_AT_location (DW_OP_regx 0x25726431)`
After the change-
` DW_AT_location (DW_OP_regx %rd1)`
[SLP] Generate StoreChainContext for all chains for a given base pointer first (#193616)
Rather than generating the chains for a `RelatedStoreInsts` worth of
stores at a time and then vectorizing that group, create the
StoreChainContext for all chains in all `RelatedStoreInsts`, and then
vectorize at the end.
Will allow easier integration with runtime strided stores since those
will exist across `RelatedStoreInsts`.
Bigger VF chains are now attempted before smaller VF chains across all
`RelatedStoreInsts` groups for a base value type, so some behavioral
changes in the vectorization of overlapping chains as the relative order
in which we attempt to vectorize them may have changed (longer before
shorter).
sys: Use is_pci_device instead of direct comparisons to devclasses
Reviewed by: bz
Sponsored by: Chelsio Communications
Differential Revision: https://reviews.freebsd.org/D56997
pci: Add is_pci_device helper function
This returns true if a given device is a PCI device (child of a PCI
bus).
Reviewed by: bz, kib
Sponsored by: Chelsio Communications
Differential Revision: https://reviews.freebsd.org/D56996
[clang][AArch64][NFC] Remove redundant bitcasts in builtin codegen (#196988)
Update CodeGen for the ACLE AdvSIMD “extract one element from vector”
builtins to avoid emitting unnecessary bitcasts:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#extract-one-element-from-vector
The existing tests continue to cover the generated IR and require no
updates, confirming that this is an NFC cleanup.
This is similar to #195825.
NAS-141091 / 27.0.0-BETA.1 / Remove duplicate grub render at boot (#18970)
This commit fixes an issue where on boot two listeners on the
`system.ready` event both rendered grub:
`etc.generate_checkpoint(POST_INIT)` (via `etc.py`) and
`grub_config._reconcile`. Both invoked `write_grub_config` and
`grub-mkconfig` concurrently, racing on `/boot/grub/grub.cfg.tmp(.new)`
and occasionally producing the "grub-mkconfig error: Generating grub
configuration file ..." failure with no diagnostic stderr.
The grub entry is now registered with `checkpoint=None`, so it is
skipped during checkpoint-driven boot generation. `_reconcile` becomes
the sole boot-time path and only invokes `grub-mkconfig` when
`truenas.cfg` content actually changes. Runtime triggers in
`system_advanced/serial.py` and `system_vendor/vendor.py` (which call
`etc.generate('grub')` directly, without a checkpoint) are unaffected,
as is HA propagation via `failover.call_remote('etc.generate',
['grub'])`.
LinuxKPI: Check the devclass of the parent device in dev_is_pci
Reviewed by: bz
Fixes: c41d83548b6c ("LinuxKPI: pci.h add more defines and functions")
Sponsored by: Chelsio Communications
Differential Revision: https://reviews.freebsd.org/D57066
[MLIR][test] Add lit coverage for cf.br/cond_br/switch under narrow-type emulation (#198053)
Wires `cf::populateCFStructuralTypeConversionsAndLegality` into the
in-tree `TestEmulateNarrowType` pass and adds lit coverage that
exercises `cf.br` / `cf.cond_br` / `cf.switch` operand and successor
block-argument rewriting when emulating sub-byte element types:
* `memref<NxiW>` carried across `cf.br` / `cf.cond_br` / `cf.switch`.
* Sub-byte integer scalars across `cf.br`.
* Sub-byte integer vectors across `cf.br`.
This PR initially added thin wrapper functions
(`memref::populateMemRefNarrowTypeEmulationCFPatterns`,
`vector::populateVectorNarrowTypeEmulationCFPatterns`) over
`cf::populateCFStructuralTypeConversionsAndLegality`. Per review
feedback those wrappers were redundant, so callers (including the
in-tree test pass) now call
`cf::populateCFStructuralTypeConversionsAndLegality`
directly. Net contribution is the test-pass plumbing and the new lit
tests demonstrating that the existing cf structural type conversion
correctly handles narrow-type-emulated values.
Introduce a maximum size for a single flowspec NLRI of 4000 bytes.
Enforce this in both in the parser but also in the RDE.
In the RDE flowspec_valid() will error out if the lenght is too long
but also pt_get_flow() and pt_add_flow() will error out.
The fixed buffer in pt_get_flow() is now sized appropriately instead
of using a arbitrary size.
OK tb@
[Instrumentor] Provide source location to runtime calls
To allow runtime calls to inspect the source location of the
instrumentation opportunity, we encode it in the module. This allows the
use in all environments, e.g., on GPUs, which might lack runtime dwarf
reading or libunwind. The stub printer is extended to make handling with
the encoded location information easy.
www/firefox-esr: enable configure with llvm 22
from clang 22.1 the target formerly known as wasm32-wasi is now
named wasm32-wasip1
Upstream: https://bugzilla.mozilla.org/show_bug.cgi?id=2023597
PR: 295332
Reported by: Chad Jacob Milios
mail/thunderbird-esr: enable configure with llvm 22
from clang 22.1 the target formerly known as wasm32-wasi is now
named wasm32-wasip1
Upstream: https://bugzilla.mozilla.org/show_bug.cgi?id=2023597
PR: 295332
Reported by: Chad Jacob Milios
CI: remove FreeBSD 13.5 (EOL April 30, 2026)
FreeBSD 13.5 and stable/13 reached End-of-Life on April 30, 2026 and no
longer receive security support, so they fall outside README.md's stated
support policy.
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Christos Longros <chris.longros at gmail.com>
Closes #18553
[AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (#192866)
This patch adds GlobalISel pre-legalizer combines to pattern-match and
optimize average operations, bringing GlobalISel on par with
SelectionDAG.
Specifically, it matches:
- `(a + b) >> 1` into `G_UAVGFLOOR` / `G_SAVGFLOOR`
- `(a + b + 1) >> 1` into `G_UAVGCEIL` / `G_SAVGCEIL`
Support is included for both scalar and vector types, correctly handling
constants and splat vectors via `isOneOrOneSplat()`. This builds upon
the generic opcodes introduced for AArch64 intrinsics lowering and
enables optimal emission of Neon instructions (e.g., `urhadd`, `shadd`)
directly from generic IR.
Fixes #118083
[Instrumentor] Improve stub printer (for C/C++ and value packs)
The stub printer now emits a helper header to deal with value packs (in
C and C++). We also make the files C/C++ compatible and use the proper
format strings for int32_t and int64_t.
Make sure optional components are excluded (#187824)
Extends a fix from
https://github.com/llvm/llvm-project/commit/b1e92f8def98c5e34fdb3b4c18ac16d65fb613a2
to examples and docs, both of which may be missing but are
unconditionally included if missing
This fixes an issue where the Chapel team vendors LLVM (and subsequently
deletes directories like docs and examples for smaller file sizes), but
if those directories are missing the build will fail
Signed-off-by: Jade Abraham <jademabraham17 at gmail.com>
