[M68k] Declare command line options in TableGen (#240195)
Move -m68k-use-base-pointer into M68kOptions.td and
-m68k-register-prefix-optional into MCTargetDesc/M68kMCOptions.td.
M68kTargetMachine holds `const M68kOptions &CLOpts`, and M68kSubtarget
copies it; M68kAsmParser holds `const M68kMCOptions &CLOpts`.
Delete the unused -m68k-ssection-threshold.
TargetLowering: Take libcall info from analysis (#240181)
Pass in LibcallLoweringInfo to getDefaultSafeStackPointerLocation
instead of relying on TargetLoweriing's static copy which will
eventually be removed.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
syslog.conf: Don't spam console with each failed login or ftp/http xfer.
This just changes the default for new installations; users who want
their console to fill up with the constant spew of ssh attacks, or
ftp/http xfers, can just put it back the way it was before.
PR bin/60506: default syslog.conf spams console with ssh/http attacks
[AMDGPU] Price misaligned flat and LDS accesses with the LDS misaligned bug
In WGP mode on subtargets with the LDS misaligned bug, a flat access is
split into pieces no wider than its alignment and no narrower than 4
bytes, and an LDS access aligned below 4 bytes uses 8-byte pieces as one
aligned to 4 does.
[AMDGPU] Price buffer fat pointer memory operations
Price buffer fat pointer accesses as global accesses, except that an
aligned load is not widened and a vector of odd width elements is not
split element by element. Without relaxed buffer bounds checking, a
vector of elements that are a multiple of 32 bits wide is accessed in
pieces no wider than its alignment and no narrower than 4 bytes, and a
vector of other byte-sized or power of 2 wide elements in pieces of the
largest power of 2 bytes that divides the element size. The width comes
from buffer fat pointer lowering, which now exposes it. When the pointer
is a buffer resource plus a constant offset, the offset and a constant
number of records give the same bounds facts lowering uses to access it
in wider pieces.
[AMDGPU] Price constant address space memory operations
Price constant address space accesses as global accesses, except for
loads selected to scalar loads of up to 64 bytes. These are loads from
the 32-bit constant address space, and loads from the constant address
space whose pointer is an argument passed in SGPRs or a constant, plus
constant offsets, both aligned to 4 bytes or to their size. A scalar
load is widened as its lowering does. An integer whose size is not a
multiple of 4 bytes is loaded as whole dwords, plus a byte load when its
size is 7 modulo 8, since the last byte of such a remainder is left out
of the scalar load. A type with no legal dword vector equivalent is
split into the largest power of 2 pieces that fit, and once the
remainder fits in the alignment it is widened to a power of 2 piece of
up to the alignment, at most 8 bytes for byte vectors. A 3-dword
remainder of a legal dword vector takes a fourth dword when aligned to 8
on a subtarget without scalar dwordx3 loads.
[Support] Make dontNeedIfMmap actually release pages on Linux (#240071)
https://reviews.llvm.org/D116366 added `dontNeedIfMmap` for lld/ELF LTO
memory saving (used on read-only maps) https://reviews.llvm.org/D116367.
D119856 (b66b3247f598) switched to posix_madvise to fix the Illumos
build, which made `dontNeedIfMmap` a no-op on Linux, both glibc and
musl.
(glibc and musl return 0 for POSIX_MADV_DONTNEED without calling
`madvise`, because POSIX requires posix_madvise not to change the
semantics of memory access, while Linux's MADV_DONTNEED discards data
(which is acceptable for the read-only map use case).
Other systems treat MADV_DONTNEED as a hint. On macOS 26, a 512 MiB
read-only file mapping stays resident after madvise or posix_madvise;
only the next access is slower.
Call madvise on Linux only, restoring the RSS reduction. Make
dontNeedIfMmap a no-op elsewhere.
