LLVM/project fd86339clang/test/OffloadTools/clang-linker-wrapper linker-wrapper.c, clang/tools/clang-linker-wrapper ClangLinkerWrapper.cpp

[LinkerWrapper] Fix AMDGPU Target-IDs linking in improper order (#207853)

Summary:
These target IDs are supposed to be ordered from most to least specific,
but we had no such ordering. The changes basically sort the input from
least to most specific using the target-id presence, then ensures that
their entries are listed first.

Fixes: https://github.com/llvm/llvm-project/issues/207835
DeltaFile
+15-2clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
+16-0clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
+31-22 files

FreeBSD/ports 968c81bwww/tomcat-devel distinfo pkg-plist

www/tomcat-devel: Update 11.0.22 => 11.0.24

Changelog:
https://tomcat.apache.org/tomcat-11.0-doc/changelog.html#Tomcat_11.0.24_(markt)

Sponsored by:   UNIS Labs
MFH:            2026Q2

(cherry picked from commit afd6b5f85cef0bbcf954af874e564431eac0e959)
DeltaFile
+3-3www/tomcat-devel/distinfo
+2-2www/tomcat-devel/pkg-plist
+1-1www/tomcat-devel/Makefile
+6-63 files

FreeBSD/ports 578e8f2www/tomcat110 distinfo pkg-plist

www/tomcat110: Update 11.0.22 => 11.0.24

Changelog:
https://tomcat.apache.org/tomcat-11.0-doc/changelog.html#Tomcat_11.0.24_(markt)

Sponsored by:   UNIS Labs
MFH:            2026Q2

(cherry picked from commit e336702eb2d8f2fafc97d5fc859295c835ebbc05)
DeltaFile
+3-3www/tomcat110/distinfo
+2-2www/tomcat110/pkg-plist
+1-1www/tomcat110/Makefile
+6-63 files

FreeBSD/ports afd6b5fwww/tomcat-devel distinfo pkg-plist

www/tomcat-devel: Update 11.0.22 => 11.0.24

Changelog:
https://tomcat.apache.org/tomcat-11.0-doc/changelog.html#Tomcat_11.0.24_(markt)

Sponsored by:   UNIS Labs
MFH:            2026Q2
DeltaFile
+3-3www/tomcat-devel/distinfo
+2-2www/tomcat-devel/pkg-plist
+1-2www/tomcat-devel/Makefile
+6-73 files

FreeBSD/ports e336702www/tomcat110 distinfo pkg-plist

www/tomcat110: Update 11.0.22 => 11.0.24

Changelog:
https://tomcat.apache.org/tomcat-11.0-doc/changelog.html#Tomcat_11.0.24_(markt)

Sponsored by:   UNIS Labs
MFH:            2026Q2
DeltaFile
+3-3www/tomcat110/distinfo
+2-2www/tomcat110/pkg-plist
+1-2www/tomcat110/Makefile
+6-73 files

NetBSD/pkgsrc-wip 71aaecaaudacity Makefile, audacity/patches patch-locale_CMakeLists.txt patch-src_CMakeLists.txt

audacity: updated to 3.7.8
DeltaFile
+42-0audacity/patches/patch-locale_CMakeLists.txt
+16-7audacity/Makefile
+16-5audacity/patches/patch-src_CMakeLists.txt
+18-0audacity/patches/patch-images_CMakeLists.txt
+17-0audacity/patches/patch-help_CMakeLists.txt
+15-0audacity/patches/patch-nyquist_CMakeLists.txt
+124-125 files not shown
+152-1911 files

LLVM/project b5fa9eelibcxx/docs/Status Cxx26Issues.csv, libcxx/include/__memory uninitialized_algorithms.h

[libc++] Implement LWG3918: copy elision in `std::uninitialized_move/_n` (#207692)

This implements [LWG3918](https://wg21.link/LWG3918), which guarantees
copy elision for rvalues in `std::uninitialized_move/_n`. It also
implements [LWG4452](https://wg21.link/LWG4452), a minor correction that
makes the helper added by LWG3918 constexpr.

This additionally fixes a bug in `std::uninitialized_move/_n` where they
could create and then access dangling references. The previous
implementation used the following lambda as an implementation detail:
```c++
[](auto&& __iter) -> decltype(auto) { return std::move(*__iter); }
```
When `__iter` is a prvalue, this creates a temporary object within the
lambda's body and `std::move` then returns a reference to that object.
The reference dangles as soon as control leaves the lambda. This
behavior was not permitted by the standard even before LWG3918.

The new implementation fixes the bug by using a helper,

    [4 lines not shown]
DeltaFile
+63-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move_n.pass.cpp
+60-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move.pass.cpp
+11-2libcxx/include/__memory/uninitialized_algorithms.h
+2-2libcxx/docs/Status/Cxx26Issues.csv
+136-44 files

OPNSense/core 7540fe2src/opnsense/scripts/firmware read.sh config.sh

firmware: cleansing using output_cmd is futile

Move the code back to where it was in early 26.1.  A number of
regressions could have been avoided.  The last straw was buffering
of "." characters for fetching.

The read-guard is still effective.  As it reads the file it does
not need to run unbuffered.  GUI reads are still properly filtered.

(cherry picked from commit 1eaefb6bc81052c5454d20333cbc32d1c1392ee1)
DeltaFile
+1-5src/opnsense/scripts/firmware/read.sh
+2-3src/opnsense/scripts/firmware/config.sh
+3-82 files

LLVM/project adfb3bellvm/test/CodeGen/X86 srem-vector-lkk.ll vector-idiv-udiv-512.ll

[X86] Add vXi64 MULHU/MULHS lowering, keeping full-width products scalar (#206983)

Based on the discussion in the PR #169819. 
This lands the unsigned (`MULHU`) and signed (`MULHS`)
`vXi64` high-multiply lowering, plus a guard so full 128-bit products
stay scalar.

### What this does

1. **Lower `ISD::MULHU` for `v4i64`/`v8i64`** via `forceExpandMultiply`
(a `vpmuludq` schoolbook), as in #169819.
2. **Lower `ISD::MULHS` for `v4i64`/`v8i64`, gated on AVX512DQ.** The
signed low multiply is `vpmullq`, so `MULHS` is only marked `Custom`
when DQ (and VL for `v4i64`) is available.
3. **Guard the full-width-product case.** When the *low* half of the
product is also used (a `wyhash`-style `lo ^ hi`), vectorizing just the
high half is redundant with the low half's wide multiply. So, this guard
let a single scalar multiply per lane yield both halves, likewise the
unpatched target already did.

    [31 lines not shown]
DeltaFile
+159-85llvm/test/CodeGen/X86/srem-vector-lkk.ll
+40-174llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+104-88llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
+30-117llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
+70-75llvm/test/CodeGen/X86/urem-vector-lkk.ll
+128-0llvm/test/CodeGen/X86/mulhu-v4i64-umul-lohi-guard.ll
+531-5393 files not shown
+600-6279 files

NetBSD/pkgsrc-wip ad13126prusaslicer distinfo, prusaslicer/patches patch-tests_sla__print_sla__test__utils.hpp

prusaslicer: Fix build with new catch2 3.15 from pkgsrc-2026Q2.
DeltaFile
+12-0prusaslicer/patches/patch-tests_sla__print_sla__test__utils.hpp
+1-0prusaslicer/distinfo
+13-02 files

OPNSense/core 99ef568src/opnsense/mvc/app/library/OPNsense/Auth Radius.php, src/opnsense/scripts/captiveportal process_accounting_messages.php set_session_restrictions.py

captive portal: adjust accounting interval to Acct-Interim-Interval (#10474)

This changes the default interval to 600, which is the recommended
value according to RFC 2869.

(cherry picked from commit 1a50a7150f4ca570697d2c111e6658713181781b)
DeltaFile
+49-11src/opnsense/scripts/captiveportal/lib/db.py
+22-7src/opnsense/scripts/captiveportal/process_accounting_messages.php
+6-1src/opnsense/mvc/app/library/OPNsense/Auth/Radius.php
+2-1src/opnsense/scripts/captiveportal/set_session_restrictions.py
+2-0src/opnsense/scripts/captiveportal/sql/init.sql
+1-1src/opnsense/service/conf/actions.d/actions_captiveportal.conf
+82-211 files not shown
+83-217 files

OPNSense/core 9a911e5src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api SourceNatController.php, src/opnsense/mvc/app/views/OPNsense/Firewall nat_rule.volt

Firewall: NAT: Source NAT - constraint getAction to only general page and align setAction to do the same, closes https://github.com/opnsense/core/issues/10502

(cherry picked from commit 0b008892a6e4d8dd42528ede66a8c71126a90fc4)
DeltaFile
+14-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/SourceNatController.php
+1-1src/opnsense/mvc/app/views/OPNsense/Firewall/nat_rule.volt
+15-22 files

OPNSense/core 81bc8d1src/opnsense/mvc/app/views/layout_partials form_input_tr.volt, src/opnsense/www/js opnsense_ui.js

mvc: add file type to forms, including required javascript initialisation code.

File type input serializes offered payload in base64 and returns both the field and the filename of the offered file.
This easy to use wrapper can be used to upload files of reasonable size (a couple of megabytes max) via either a select file or drag and drop option.

Collected output exists of the offered <id> combined with a field named <id>__name which contains the offered filename

(cherry picked from commit 991e0c7164009a7dd05b1e04f8e3adf0eef335ba)
DeltaFile
+72-0src/opnsense/www/js/opnsense_ui.js
+16-2src/opnsense/mvc/app/views/layout_partials/form_input_tr.volt
+88-22 files

LLVM/project ac1af12llvm/lib/Target/X86 X86ISelLowering.cpp X86ISelLowering.h, llvm/test/CodeGen/X86/apx ccmp.ll

[X86][CCMP] Lower select(and/or(setcc,...), T, F) as a CCMP chain (#207929)

Fixes: #207886

Assisted-by: Claude Sonnet 4.6
DeltaFile
+118-1llvm/lib/Target/X86/X86ISelLowering.cpp
+112-0llvm/test/CodeGen/X86/apx/ccmp.ll
+3-0llvm/lib/Target/X86/X86ISelLowering.h
+233-13 files

LLVM/project 852286dllvm/lib/Target/Hexagon HexagonISelLowering.cpp

Fix unused variable build failure in Release build (#208195)

Fixes build failure introduced by commit [736771b]
(https://github.com/llvm/llvm-project/commit/736771b6a017b5a18c03819a3348ff793c473261)
into llvm:main

Ref : https://github.com/llvm/llvm-project/pull/207148
Failure : https://lab.llvm.org/buildbot/#/builders/228/builds/4056
DeltaFile
+2-4llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+2-41 files

NetBSD/pkgsrc LfptfKwdoc CHANGES-2026

   doc: Updated news/canlock-hp to 3.3.3
VersionDeltaFile
1.4348+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc o0b54LFnews/canlock-hp distinfo Makefile

   news/canlock-hp: Update to 3.3.3

   - Replace CC0 license with NLPL license for documentation files because
     Fedora project does not accept CC0 for documentation (reported by
     Dominik 'Rathann' Mierzejewski)
VersionDeltaFile
1.13+4-4news/canlock-hp/distinfo
1.14+2-2news/canlock-hp/Makefile
+6-62 files

NetBSD/pkgsrc UMH7jtydoc CHANGES-2026

   doc: Updated news/libcanlock to 3.3.3
VersionDeltaFile
1.4347+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc cU8KvBGnews/libcanlock distinfo Makefile

   news/libcanlock: Update to 3.3.3

   - Replace CC0 license with NLPL license for documentation files because
     Fedora project does not accept CC0 for documentation (reported by
     Dominik 'Rathann' Mierzejewski)
VersionDeltaFile
1.14+4-4news/libcanlock/distinfo
1.15+2-2news/libcanlock/Makefile
+6-62 files

OpenBSD/src hSfS28Pusr.sbin/rpki-client main.c

   Rework the special case for CRL files when it comes to the entity_queue.

   CRL are not accounted in the entity_queue, they are loaded together with
   MFT files and passed back together as well. Instead of increasing
   entity_queue skip the entity_queue decrease at the end of the function
   for CRL files. This way goto done cases will account CRLs correctly as well.

   OK tb@
VersionDeltaFile
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+4-31 files

FreeNAS/freenas 27731aasrc/middlewared/middlewared/plugins replication.py, src/middlewared/middlewared/plugins/replication crud.py __init__.py

Replication mypy
DeltaFile
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+650-0src/middlewared/middlewared/plugins/replication/crud.py
+246-0src/middlewared/middlewared/plugins/replication/__init__.py
+193-0src/middlewared/middlewared/plugins/replication/methods.py
+63-0src/middlewared/middlewared/plugins/replication/attachment.py
+62-0src/middlewared/middlewared/plugins/replication/config.py
+1,214-83516 files not shown
+1,277-97322 files

LLVM/project 7205d7cclang/docs ReleaseNotes.md, clang/include/clang/Basic ABIVersions.def

[clang][ItaniumMangle] Fix mangling of lambdas in default member initializers of local classes (#206740)

Lambdas appearing in default member initializers of members of local
classes were previously mangled as if they belonged only to the class
scope, ignoring the enclosing function-local context.

This caused different (but same-named) local classes to produce
identical closure type mangling and corresponding RTTI/IR collisions.

Consider the following example:
```
  void foo() {
    {
      struct T {
        std::function<void()> a = [](){ std::cout << "a"; };
      } t;
      t.a();
    }
    {

    [12 lines not shown]
DeltaFile
+79-0clang/test/CodeGenCXX/mangle-lambdas-in-dmi-local-class.cpp
+13-7clang/lib/AST/ItaniumMangle.cpp
+6-6clang/test/CodeGenCXX/mangle-lambdas-gh88906.cpp
+3-3clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
+5-0clang/include/clang/Basic/ABIVersions.def
+3-0clang/docs/ReleaseNotes.md
+109-166 files

LLVM/project 6008f67llvm/test/CodeGen/AArch64/GlobalISel knownbits-vector.mir knownbits-fshl-fshr.mir

[AArch64][GlobalISel] Update scalar types in knownbits tests. NFC (#208199)
DeltaFile
+447-447llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+95-95llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
+87-87llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
+87-87llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
+80-80llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
+79-79llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
+875-87527 files not shown
+1,622-1,62233 files

LLVM/project 2abc195libc/fuzzing/arpa/inet inet_ntop_differential_fuzz.cpp CMakeLists.txt

[libc] Add a differential fuzzer for inet_ntop (#207977)

The first byte of the input is used to select the address class and the
size of the output buffer. The rest is used as the input.

We compare the results and also check that our implementation does not
overflow the buffer.

Assisted by Gemini.
DeltaFile
+106-0libc/fuzzing/arpa/inet/inet_ntop_differential_fuzz.cpp
+9-0libc/fuzzing/arpa/inet/CMakeLists.txt
+115-02 files

LLVM/project 0470117llvm/lib/Target/AArch64 SVEInstrFormats.td AArch64SVEInstrInfo.td, llvm/test/CodeGen/AArch64 sve-pred-ldst.ll sve-calling-convention-byref.ll

[LLVM][CodeGen][SVE] Make use of predicate load/store "mul vl" addressing mode. (#206997)
DeltaFile
+193-0llvm/test/CodeGen/AArch64/sve-pred-ldst.ll
+17-47llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
+28-13llvm/lib/Target/AArch64/SVEInstrFormats.td
+0-20llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+0-18llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+0-2llvm/lib/Target/AArch64/AArch64InstrFormats.td
+238-1006 files

LLVM/project 179badcflang/docs FAQ.md

[flang][docs] Add a mention about -fsafe-trampoline to FAQ.md (#207656)

Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
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+4-0flang/docs/FAQ.md
+4-01 files

LLVM/project 95eef8cllvm/include/llvm/IR Instructions.h IRBuilder.h, llvm/lib/CodeGen AtomicExpandPass.cpp

[IR][NFC] Add LoadStoreProperties to copy load/store attrs (#206470)

Introduce a small `LoadStoreProperties` struct plus get/setAttributes on
`LoadInst` and `StoreInst` so volatile/align/ordering/syncscope can be
copied together instead of one field at a time. Switch the obvious load->load
and store->store clone sites over to it.
DeltaFile
+40-0llvm/include/llvm/IR/Instructions.h
+11-20llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+12-0llvm/lib/IR/Instructions.cpp
+11-0llvm/include/llvm/IR/IRBuilder.h
+4-6llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+2-8llvm/lib/CodeGen/AtomicExpandPass.cpp
+80-346 files

NetBSD/pkgsrc-wip ada3511clic distinfo Makefile

clic: update to 1.1.5
DeltaFile
+3-3clic/distinfo
+1-1clic/Makefile
+4-42 files

OpenBSD/src OMy3tPcusr.bin/tmux regsub.c

   Fix regsub with anchor at start of pattern, GitHub issue 5341.
VersionDeltaFile
1.10+10-7usr.bin/tmux/regsub.c
+10-71 files

FreeBSD/ports 7199cc3math/octave-forge-pkg-octave-doc distinfo Makefile

math/octave-forge-pkg-octave-doc: Update to 0.7.0.
DeltaFile
+3-3math/octave-forge-pkg-octave-doc/distinfo
+1-2math/octave-forge-pkg-octave-doc/Makefile
+4-52 files