LLVM/project 654f8bdllvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU eliminate-frame-index-select.ll promote-alloca-homogeneous-struct.ll

Reland "[AMDGPU] PromoteAlloca: flatten homogeneous structs to vectors" (#221058)

This relands #217055

The original commit revealed a latent issue in eliminateFrameIndex in
SIRegisterInfo where SCC can be clobbered before reading it on
gfx900/gfx90a. This change itself has no known issues.
DeltaFile
+152-0llvm/test/CodeGen/AMDGPU/promote-alloca-homogeneous-struct.ll
+23-6llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+6-1llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
+181-73 files

LLVM/project c94d85cllvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir

[AMDGPU] Use the scavenger to test whether SCC is live after MI

The register scavenger is stepped backwards to the liveness state
immediately after MI, so RS->isRegUsed(SCC) already answers "is SCC live
after MI" directly. Replace the hand-rolled test with that query.
DeltaFile
+5-6llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
+3-3llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+8-92 files

LLVM/project 00e83e3llvm/lib/Target/AMDGPU SIRegisterInfo.cpp

[AMDGPU] Update based on review feedback

Replace the lambda with the check inlined at both sites, and report a fatal
error when neither a free SGPR nor FrameReg is available, rather than
silently falling back to the spilling scavenge.
DeltaFile
+24-19llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+24-191 files

LLVM/project 501e943llvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir

[AMDGPU] Don't spill an SGPR while SCC is live in frame index lowering

When SCC is live into a scalar frame index user, the scaling path avoids
SALU ops that write SCC by computing the address in a VGPR and reading it
back with V_READFIRSTLANE_B32. If the destination of that readfirstlane is
scavenged with spilling allowed, an AMDGPU SGPR spill writes inactive
lanes, so it flips EXEC with S_NOT_B64 and clobbers SCC. Instead, scavenge
that register with AllowSpill=false.
DeltaFile
+81-45llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
+29-10llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+110-552 files

LLVM/project a550262llvm/test/CodeGen/AMDGPU sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir

[NFC][AMDGPU] Add tests for SCC live into a frame index user

Pre-commit tests for the case where SCC is live into a frame index user and
no SGPR is free to hold the V_READFIRSTLANE_B32 result. Scavenging one
emergency-spills an SGPR, and an SGPR spill flips EXEC with S_NOT_B64, so the
EXEC flips land between the S_CMP_EQ_U32 that defines SCC and the read of SCC
that follows, clobbering it in between.
DeltaFile
+153-0llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
+153-01 files

LLVM/project d74c1b7llvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU eliminate-frame-index-scalar-scc-clobber.mir

[AMDGPU] Unify liveness guard to prevent SCC clobber in frame index lowering in scaling path (#223789)

eliminateFrameIndex has two lowering strategies, but only one has the
proper handling for checking SCC-liveness to prevent clobbering. Unify
them with a helper function to ensure both paths handle the same
DeltaFile
+343-4llvm/test/CodeGen/AMDGPU/eliminate-frame-index-scalar-scc-clobber.mir
+9-5llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+352-92 files

LLVM/project 144bdf8llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

DAG: Use poison for some vector element folds
DeltaFile
+7-4llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+7-41 files

FreeNAS/freenas 9ea0699src/middlewared/middlewared/api/v25_04_0 filesystem.py, src/middlewared/middlewared/api/v25_04_1 filesystem.py app.py

remove old version api models
DeltaFile
+0-434src/middlewared/middlewared/api/v25_04_2/vm.py
+0-393src/middlewared/middlewared/api/v25_04_2/filesystem.py
+0-393src/middlewared/middlewared/api/v25_04_2/app.py
+0-393src/middlewared/middlewared/api/v25_04_1/filesystem.py
+0-393src/middlewared/middlewared/api/v25_04_1/app.py
+0-393src/middlewared/middlewared/api/v25_04_0/filesystem.py
+0-2,399219 files not shown
+10-20,773225 files

LLVM/project 83723f9llvm/include/llvm/AsmParser LLToken.h, llvm/include/llvm/IR CallingConv.h

Add kernel calling convention and IR syntax

  Define PISA_KERNEL as calling convention 128 and classify kernels as
  non-callable. Add parsing and printing support for pisa_kernel.

  Test assembler round trips, the bitcode mapping from cc128, and rejection
  of calls using the kernel calling convention.
DeltaFile
+10-0llvm/test/Assembler/pisa-kernel-calling-conv.ll
+10-0llvm/test/Verifier/pisa-kernel-calling-conv.ll
+4-0llvm/test/Bitcode/compatibility.ll
+4-0llvm/include/llvm/IR/CallingConv.h
+1-0llvm/lib/AsmParser/LLLexer.cpp
+1-0llvm/include/llvm/AsmParser/LLToken.h
+30-02 files not shown
+32-08 files

FreeBSD/ports d5e8fdesysutils/pv Makefile pkg-plist

sysutils/pv: Update to 1.12.0
DeltaFile
+3-3sysutils/pv/distinfo
+3-0sysutils/pv/pkg-plist
+1-1sysutils/pv/Makefile
+7-43 files

LLVM/project cbab695llvm/test CMakeLists.txt, llvm/test/Feature codegen-plugin-legacy.ll

[llvm][test] Small fixes around CGTestPlugin (NFC) (#225362)

We use `LLVM_ENABLE_PLUGINS` as condition to run the unit-tests in
CGPluginTest, but we used to built the required plugin under `NOT WIN32
AND NOT CYGWIN`. These only happened to be equivalent. This patch guards
the entire folder under `LLVM_ENABLE_PLUGINS`. It also moves the related
LIT test to Feature/codegen-plugin-legacy.ll and adds REQUIRES plugin.
DeltaFile
+10-12llvm/unittests/CodeGen/CGPluginTest/Plugin/CMakeLists.txt
+0-10llvm/unittests/CodeGen/CGPluginTest/PluginTest.cpp
+0-7llvm/test/Other/codegen-plugin-loading.ll
+7-0llvm/test/Feature/codegen-plugin-legacy.ll
+4-1llvm/unittests/CodeGen/CMakeLists.txt
+4-0llvm/test/CMakeLists.txt
+25-306 files

LLVM/project c76fd47llvm/lib/Transforms/Vectorize VectorCombine.cpp

[VectorCombine] foldShuffleOfIntrinsics - don't use I variable name for Index iteration. NFC. (#225394)

Shadows the Instruction &I argument.

Noticed in #182768
DeltaFile
+18-16llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+18-161 files

LLVM/project 44509a1llvm/test/Analysis/UniformityAnalysis/AMDGPU control-flow-intrinsics.ll branch-after-join.ll

AMDGPU: Use subarch triples in uniformity analysis tests (#225386)
DeltaFile
+2-2llvm/test/Analysis/UniformityAnalysis/AMDGPU/inline-asm.ll
+1-1llvm/test/Analysis/UniformityAnalysis/AMDGPU/control-flow-intrinsics.ll
+1-1llvm/test/Analysis/UniformityAnalysis/AMDGPU/branch-after-join.ll
+1-1llvm/test/Analysis/UniformityAnalysis/AMDGPU/b42473-r1-crash.ll
+1-1llvm/test/Analysis/UniformityAnalysis/AMDGPU/atomics.ll
+1-1llvm/test/Analysis/UniformityAnalysis/AMDGPU/always_uniform.ll
+7-728 files not shown
+35-3534 files

LLVM/project d61398dclang/test/CodeGen/AMDGPU amdgcn-av-none-attr.cpp amdgcn-av-none-amdgpu-atomic.cpp, clang/test/CodeGenOpenCL amdgpu-debug-info-pointer-address-space.cl spir_version.cl

clang/AMDGPU: Use subarch triples in more cc1 tests (#225391)
DeltaFile
+3-3clang/test/OpenMP/amdgcn_save_temps.c
+3-3clang/test/CodeGenOpenCL/spir_version.cl
+2-2clang/test/CodeGenOpenCL/amdgpu-debug-info-pointer-address-space.cl
+1-2clang/test/CodeGen/AMDGPU/amdgcn-av-none-attr.cpp
+1-2clang/test/CodeGen/AMDGPU/amdgcn-av-none-amdgpu-atomic.cpp
+1-2clang/test/CodeGen/AMDGPU/amdgcn-av-non-atomic.cpp
+11-144 files not shown
+15-1810 files

LLVM/project ee7f51amlir/lib/Target/LLVMIR DebugTranslation.cpp, mlir/test/Target/LLVMIR llvmir-debug.mlir

Fix recursive DI variant part (#225373)

`mlir::translateModuleToLLVMIR` could leave recursive `DICompositeType`
metadata unresolved when the composite used `DW_TAG_variant_part`.

`DW_TAG_variant_part` was not emitted as a distinct `DICompositeType`,
unlike other recursive composite type tags. This change adds it to the
distinct path and adds a regression test covering the recursive
variant-part case.

Testing:

* `mlir/test/Target/LLVMIR/llvmir-debug.mlir`
* `ninja -C build check-mlir`

Fixes: #225151

Co-authored-by: Purnima Shrivastava <purnimashrivastava05@.com>
DeltaFile
+22-0mlir/test/Target/LLVMIR/llvmir-debug.mlir
+1-0mlir/lib/Target/LLVMIR/DebugTranslation.cpp
+23-02 files

FreeBSD/src 6d9f435sys/dev/hwpmc hwpmc_amd.c hwpmc_ibs.c

hwpmc: fix leak of IBS per-CPU array on unload

pmc_ibs_initialize() allocates the ibs_pcpu[] pointer array, and
pmc_ibs_finalize() exists to free it, but pmc_ibs_finalize() is
never called.  Every hwpmc unload on a CPU with IBS therefore leaks
one pmc_cpu_max()-sized pointer array.

Call pmc_ibs_finalize() from pmc_amd_finalize(), alongside the RAPL,
TSC and perf classes.  IBS is only initialized on CPUs that support
it, so make pmc_ibs_finalize() return early when ibs_pcpu is NULL,
making it safe to call when the class was skipped at initialize
time, as pmc_rapl_finalize() already is.

Tested on an AMD Ryzen 5 5600X (Zen 3, 12 threads) with INVARIANTS.
Before the change, each kldload/kldunload cycle leaked one 96-byte
M_PMC allocation, and DTrace showed the ibs_pcpu[] allocation from
pmc_ibs_initialize() as the only one never freed.  After the change,
50 load/unload cycles leave M_PMC InUse and MemUse unchanged, and
every allocation made at load is freed at unload.

    [5 lines not shown]
DeltaFile
+4-0sys/dev/hwpmc/hwpmc_ibs.c
+2-0sys/dev/hwpmc/hwpmc_amd.c
+6-02 files

FreeBSD/src 34c4012tests/sys/fs/tarfs tarfs_test.sh

tarfs_test: split large file test into independent cases

This avoids globally set timeouts for the group of
tarfs_large tests on slower emulated architectures.

While here, lower each testcase's timeout to reflect
the reduction of work. On QEMU aarch64, the largest case
runs in ~500s on a modern desktop, so double that for a
conservative estimate.

Discussed with:         des
MFC after:              3 days
Sponsored by:           The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D59033
DeltaFile
+78-19tests/sys/fs/tarfs/tarfs_test.sh
+78-191 files

LLVM/project 2d7dff0llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

DAG: Preserve poison in some cast folds
DeltaFile
+24-14llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+24-141 files

NetBSD/pkgsrc-wip 871415b. Makefile, moviebox-tui PLIST DESCR

moviebox-tui: remove pkg

Now updated locally to 0.1.23 and on the way to pkgsrc main.
DeltaFile
+0-1,094moviebox-tui/distinfo
+0-365moviebox-tui/cargo-depends.mk
+0-23moviebox-tui/Makefile
+0-20moviebox-tui/DESCR
+0-2moviebox-tui/PLIST
+0-1Makefile
+0-1,5056 files

LLVM/project db9bb88llvm/lib/Target/AMDGPU AMDGPUInstCombineIntrinsic.cpp

Update again
DeltaFile
+1-2llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+1-21 files

LLVM/project 355b371libsycl/unittests/usm alloc.cpp, offload/liboffload/src OffloadImpl.cpp

[offload] add context to olMemAlloc* (#224930)

This is the last part of the context refactor. This patch:
  - Adds context param to all memory allocation functions.
  - Routes ptr info through the plugins instead of a global map.
  - Removes allocation tracking from liboffload.
- olGetMemInfo(OL_MEM_INFO_DEVICE) now returns INVALID_ARGUMENT for host
   allocations, which have no per-device affinity.
   
Re-land of #222677 + #224622, which were reverted together in #224703.

Assisted-by: Claude Opus 4.7
DeltaFile
+118-151offload/liboffload/src/OffloadImpl.cpp
+138-68offload/plugins-nextgen/common/src/PluginInterface.cpp
+55-50libsycl/unittests/usm/alloc.cpp
+80-25offload/plugins-nextgen/common/include/PluginInterface.h
+100-2offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
+39-35offload/unittests/OffloadAPI/kernel/olLaunchKernel.cpp
+530-33137 files not shown
+1,147-58343 files

LLVM/project db17738clang-tools-extra/clang-tidy/misc MultipleInheritanceCheck.cpp, clang-tools-extra/docs ReleaseNotes.md

[clang-tidy] Fix infinite loop in misc-multiple-inheritance (#220223)

This PR contains the fix for the infinite loop in
`misc-multiple-inheritance`. The checker was getting stuck in an
infinite cycle when it encountered circular inheritance. I fixed this by
adding a visited map (`InterfaceMap.try_emplace(Node, false)`) to break
the cycle during the DFS traversal.

Part of #213948.
DeltaFile
+4-4clang-tools-extra/clang-tidy/misc/MultipleInheritanceCheck.cpp
+6-0clang-tools-extra/test/clang-tidy/checkers/misc/multiple-inheritance.cpp
+4-0clang-tools-extra/docs/ReleaseNotes.md
+14-43 files

FreeBSD/src fa28edesys/dev/clk/starfive jh7110_clk_sys.c, sys/riscv/starfive files.starfive jh7110_temp.c

jh7110_temp: CPU temperature sensor for JH7110

This patch adds a driver for the CPU temperature sensor on the jh7110
SoC.

The calibration numbers come from the OpenBSD driver but are reworked to
produce a result in K rather than C.

The temperature is exposed as a sysctl, dev.jh7110_temp.0.temperature
but I have also exposed it as dev.cpu.0.temperature because that's where
you find it on a RaspberryPi and amdtemp(4), so it's a lot more obvious.

(mhorne: Added 'starfive,jh7100-temp' compatible.)

Reviewed by:    mhorne, bnovkov
MFC after:      1 week
Differential Revision:  https://reviews.freebsd.org/D59478
DeltaFile
+269-0sys/riscv/starfive/jh7110_temp.c
+16-0sys/dev/clk/starfive/jh7110_clk_sys.c
+1-0sys/riscv/starfive/files.starfive
+286-03 files

FreeNAS/freenas f6ab7c1src/middlewared/middlewared/api/v26_0_0 s3.py, src/middlewared/middlewared/api/v27_0_0 s3.py

Add tier field to sharing.s3 entries

Information about the current S3 share's tier was accidentally
omitted during intial round of S3 development. This commit adds
the standard tier info.
DeltaFile
+89-4tests/api2/zfs_tier/test_shares.py
+11-0src/middlewared/middlewared/api/v27_0_0/s3.py
+11-0src/middlewared/middlewared/api/v26_0_0/s3.py
+10-0tests/unit/test_zfs_tier_api_models.py
+2-1src/middlewared/middlewared/plugins/truenas_s3/bucket_crud.py
+1-0tests/api2/test_s3_bucket.py
+124-56 files

OpenBSD/ports TXNG28nsysutils/rdiff-backup Makefile

   rdiff-backup: remove obsolete dep on importlib-metadata
VersionDeltaFile
1.32+2-2sysutils/rdiff-backup/Makefile
+2-21 files

OpenBSD/ports i7uE1Elmath/visidata distinfo Makefile, math/visidata/pkg PLIST

   visidata: adapt to re-rolled upstream tarball, drop obsolete dep on importlib-metadata
VersionDeltaFile
1.24+0-6math/visidata/pkg/PLIST
1.37+3-2math/visidata/Makefile
1.25+2-2math/visidata/distinfo
+5-103 files

LLVM/project 58dd2belldb/tools/lldb-dap Variables.cpp JSONUtils.cpp, lldb/tools/lldb-dap/Handler SetVariableRequestHandler.cpp

[lldb-dap][NFC] Simplify using var_ref_t directly. (#225187)

Make var_ref_t printable, update functions that requires var_ref_t to
use var_ref_t instead of integers.
DeltaFile
+15-3lldb/tools/lldb-dap/Protocol/DAPTypes.h
+0-8lldb/tools/lldb-dap/JSONUtils.cpp
+6-2lldb/tools/lldb-dap/JSONUtils.h
+3-4lldb/tools/lldb-dap/Variables.cpp
+2-4lldb/tools/lldb-dap/Handler/SetVariableRequestHandler.cpp
+2-3lldb/unittests/DAP/DAPTypesTest.cpp
+28-246 files not shown
+35-3412 files

LLVM/project 2dbb7d6mlir/lib/Conversion/ArithToSPIRV ArithToSPIRV.cpp, mlir/test/Conversion/ArithToSPIRV arith-to-spirv.mlir

[mlir][SPIR-V] Lower arith.convertf operation (#212817)

Lower arith.convertf (same-bitwidth casts like f16<->bf16) to
spirv.FConvert
DeltaFile
+37-0mlir/test/Conversion/ArithToSPIRV/arith-to-spirv.mlir
+1-0mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
+38-02 files

NetBSD/pkgsrc nxB6Zzgmk compiler.mk

   mk/compiler.mk: Add gnu++14 to the list of values for FORCE

   This is a comment-only change, simply aligning comments to code.
VersionDeltaFile
1.117+2-2mk/compiler.mk
+2-21 files

NetBSD/pkgsrc-wip d2bcde3chromium Makefile

chromium: update typescript include
DeltaFile
+1-2chromium/Makefile
+1-21 files