ZTS: fix zstream_raw_001_pos cleanup unmount check
zstream_raw_001_pos mounts file systems on $TESTDIR and used
"ismounted $TESTDIR ext4" in cleanup to decide whether to unmount it.
For ext* file systems ismounted() only runs "df -t ext4 $TESTDIR",
which succeeds whenever the file system containing $TESTDIR is ext4,
not only when something is mounted there. Earlier tests in the
directory destroy the pool's datasets, leaving $TESTDIR as a bare
directory on the root file system, so on an ext4 root the cleanup
always tries to unmount it and fails:
ERROR: umount /var/tmp/testdir exited 32
Track whether the test mounted $TESTDIR itself instead, and unmount it
before detaching the image device rather than after, since a mounted
device cannot be detached.
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Will Rouesnel <wrouesnel at wrouesnel.com>
Closes #19283
mbuf: simplify m_free
The check for (M_PKTHDR|M_NOFREE) was added by np@ in
"91d1b03d3617 Merge r254736 from user/np/cxl_tuning."
in order to support a clever rx mode optimization used
by cxgbe at the time. That optimization was removed in
46e1e307edb6 several years ago. This check is otherwise
unneeded and adds an extraneous test to every mbuf free,
so let's remove it.
Reviewed by: glebius, np
Differential Revision: https://reviews.freebsd.org/D60686
Sponsored by: Netflix
[InstCombine] Fold ctpop((X >> C1) & M1) + ctpop((X >> C2) & M2)
Following up from #231225, automotive-bitcount in llvm-test-suite and GCC use a "per-nibble" ctpop table lookup, where they split the operation up into smaller ctpop table lookups over chunks of the input:
```c
unsigned table_u32(unsigned x) {
static const unsigned char ctpop[16] = {0, 1, 1, 2, 1, 2, 2, 3, 1, 2, 2, 3, 2, 3, 3, 4};
return ctpop[x & 15] + ctpop[(x >> 4) & 15];
}
```
PR #231225 now converts the individual table lookups to ctpop intrinsics, so now we're left with `ctpop(X & 0xf) + ctpop((X >> 4) & 0xf) + ctpop((X >> 8) & 0xf) + ...`. We can combine these into `ctpop(X & 0xfff)` provided the extracted bits from X don't overlap.
[AMDGPU] Limit the fmul fusion discount to a matching context type (#229845)
The fmul is free when its context instruction feeds a fusable fadd or
fsub. A vector fmul priced with a scalar lane as the context inherits
that fusion only when it is emitted lane by lane. On a packed type the
scalar user does not show that the vector fmul feeds a vector fadd, and
products extracted into a scalar fadd chain keep the packed fmul while
the fma is lost.
ZTS: fix the dRAID case of import_rewind_device_replaced
The dRAID case creates a draid vdev with no distributed spares, the
default, but expects the pool to end up with 'spares draid1-0-0'. No
such spare can exist, so wait_for_pool_config always times out and the
test has failed on every run since the case was added. The test was
already on the known-failure list for unreliable rewinds, which hid
this.
The dRAID case of import_cachefile_device_replaced, added in the same
commit, creates its pool with 'draid:1s' and expects the same final
configuration, so create this one with a distributed spare too, from
five disks, and replace a child with the sixth. Since the configuration
zpool status then shows differs from the zpool create arguments, let
test_replace_vdev take the expected configuration of the rewound pool
as an optional argument.
The test now passes, so move it from the known failures to the tests
that may fail: a rewind can still be unreliable, but a pass is no longer
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[compiler-rt][ARM] Mark optimized FP add/sub asm as superseding aeabi_[df]rsub.c (#230739)
#179921 (`arm/adddf3.S`) and #179929 (`arm/addsf3.S` and
`arm/thumb1/addsf3fast.S`) introduced optimized assembly implementations
for floating-point addition, subtraction, and reversed subtraction
(`__aeabi_drsub` and `__aeabi_frsub`), but omitted `arm/aeabi_drsub.c`
and `arm/aeabi_frsub.c` from `SUPERSEDES` (and `PROVIDES`), causing
duplicate symbol errors during lld linking in Android.
Assisted-by: Gemini
[VPlan] Simplify extracts of the last lane of live-ins (#231312)
Live-ins are single scalars, so simplify their extracts like other
single-scalar live-in values.
This allows reusing a single resume phi for multiple reductions whose
results fold to the same live-in.
[MLIR][ROCDL] Note the deprecation of the <4 x i32> buffer ops
While we don't have a way to flag a MLIR op as deprecated yet, go
ahead and add a note to the old `<4 x i32>` intriinsic ops that
they're actively deprecated.
AI disclosure: Claude made this edit, though I checked the wording and
wrote up this message.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AMDGPU][docs] Document the <4 x i32> buffer intrinsic deprecation
Flag the deprecation of <4 x i32> buffer intrinsics in the release
notes, flagging the migration path and the s.buffer.load subtleties.
AI disclosure: Claude did draft some of this, but I deleted basically
all of it and the words are mine
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AI fixup] Test nits
Address review nits from PR #231308 on the deprecation warning tests:
- Use `< %s` instead of passing the file as an argument.
- Keep the RUN lines contiguous and the CHECK lines in one block
instead of splitting them up with blank lines.
- Fix subject/verb agreement in the header comment.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AMDGPU] Warn for using <4 x i32> buffer intrinsics
The buffer intrinsics that take their resource as a <4 x i32> have been
documented as deprecated in IntrinsicsAMDGPU.td for some time, but only
in a TableGen comment, so nothing told users about it. They've all got
`ptr addrspace(8)` counterparts now that #209243 landed, so we can be
slightly more official about asking people to move.
The warning lives in AMDGPUAsmPrinter::doInitialization next to the
no-subarch deprecation warning.
We warn once per intrinsic used, not once per call (it'd cause
unbounded warning spam) and not once per declaration (it'd catch the
same intrinsic but with different types repeatedly). We try to be
clever to point at a specific call if we can find one with a debug
location.
Users can pass -amdgpu-warn-deprecated-buffer-intrinsics=0 to suppress
this.
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[AI fixup] Test nits
Address review nits from PR #231308 and clean up stray comment lines:
- Use `< %s` instead of `-o - %s`.
- Spell `-global-isel=0` on the SDAG run lines and `-global-isel=1` on
the GlobalISel ones, rather than leaving the SDAG lines implicit.
- Drop the runs of bare `;` lines that had accumulated in front of the
first check of each function. Re-running
utils/update_llc_test_checks.py does not reintroduce them, and the
regenerated file is byte-identical to this one.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AMDGPU][NFC] Add d16 integer coverage for raw.ptr.buffer.load.format
raw.ptr.buffer.load.format didn't have test coverage for the d16
paths, while other related intrinsics (like the non-`.ptr` versions)
did. This commit fixes the issue.
AI disclosure: Claude wrote these tests
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AI fixup] Test nits
Address review nits from PR #231308:
- Use `< %s` instead of `-o - %s`.
- Spell `-global-isel=0` on the SDAG run line and `-global-isel=1` on
the GlobalISel one, rather than leaving the SDAG line implicit.
Re-running utils/update_llc_test_checks.py produces no check changes,
so this is a run-line-only cleanup.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AMDGPU] Let llvm.amdgcn.raw.ptr.buffer.load.format also return any type
While llvm.amdgcn.raw.buffer.load.format can handle any type, and so
can llvm.amdgcn.struct.ptr.buffer.load.format,
llvm.amdgcn.raw.ptr.buffer.format is restricted to floats for some
reason, probably somebody forgetting to loosen it.
This commit fixes the issue so integer-format typed loads can migrate
off of the non-pointer intrinsic.
AI disclosure: Claude noticed it when I asked it draft up a stronger
deprecation for the non-ptr intrinsics, and I wrote the commit message.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AI fixup] Test nits
Address review nits from PR #231308 on the precommit test:
- Use `< %s` instead of passing the file as an argument.
- Spell the SDAG run line's `-global-isel=0` explicitly and pair it
with `-global-isel=1` instead of bare `-global-isel`.
- Use the same `amdgpu9.00-amd-mesa3d` triple the follow-up commit
uses, so the diff there is confined to the behavior change.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AMDGPU][NFC] Pre-commit test for integer raw.ptr.buffer.load.format
llvm.amdgcn.raw.ptr.buffer.load.format is restricted to floats for
some reason, even though it doesn't need to be (per its non-`.ptr`
counterpart). Pre-commit tests for the integer form.
AI disclosure: Claude wrote these tests, I wrote the message, the big
comment is temporary.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AMDGPU][NFC] Use ptr ops in ptr.buffer.atomic.fadd_rtn_errors.ll
llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll had tests that were
using the deprecated `<4 x i32>` intrinsics. This commit fixes the
issue.
AI disclosure: Claude found this and made the change, I wrote this
message and reviewed.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
CI: Add Alpine Linux to the default runners
Alpine is the only musl-based system in the test matrix, so it catches
portability problems that glibc builds do not. It can be selected by
name, but it is not in the default list, so no PR is tested on it.
Add alpine3-24 to the default OS list.
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Alexander Moch <mail at alexmoch.com>
Closes #19349
[llvm][test] Add -filetype=null to llc disable-mir-output-verify test (#231305)
The -passes=no-op-machine-function RUN lines did not specify
-filetype=null, causing llc to attempt to write to the source directory
(which fails when the test input directory is read-only). Follow-up to
663669080864 (#228248 ).
[LAA] Include the load types of written pointers in runtime check bounds. (#231039)
canCheckPtrAtRT creates the runtime check pointers of a pointer that is
both loaded and stored only via its write access, with the types in
Accesses[{Ptr, true}]. Those are the stored types only.
Also include the types the pointer is used in loads. Create runtime
checks for the largest fixed and scalable types, if any.
This fixes a miscompile where the pointer is used to load a wider type
than it stores to.
[LV] Allow stride-scaled canonical IV users when preparing the epilogue (#231307)
convertToStridedAccesses computes the base pointer of a strided access
from the canonical IV, as a mul by the stride (simplified to a shl for a
power-of-2 stride). preparePlanForEpilogueVectorLoop asserted that the
canonical IV is only used by its increment, casts, ScalarIVSteps or
DerivedIV, so forcing epilogue vectorization of a loop with a strided
access hit the assertion.
Offsetting the canonical IV by the main loop's resume value is correct
for those users too, as they are linear in the canonical IV. Allow them
in the assertion.
[LV] Add test for FindIV reduction with wrapping truncated IV (NFC). (#231297)
Add a test where the truncated IV's signed range excludes the sentinel
value, but the IV wraps. The min reduction currently returns the wrong
value.
