[ORC] Add a bootstrap symbols JITDylib to ExecutionSession. (#188172)
The ExecutionSession constructor now creates a "<bootstrap>" JITDylib
and populates it with the bootstrap symbols from the
ExecutorProcessControl object. This allows bootstrap symbols to be
looked up via ExecutionSession::lookup, providing greater consistency
with other JIT symbol lookups.
[DA] Add a test where the Weak Crossing SIV test misses dependency (NFC) (#188183)
The root cause is that the Weak Crossing SIV test assumes the
coefficients are non‑zero without verifying it.
libclc: Use nextup and nextdown in place of nextafter (#188141)
Unfortunately it seems the optimizer isn't able to clean this
up, so this is a code quality improvement.
Add XCOFF object file support in sanitizer coverage tool (#179884)
The sancov tool fails to find coverage symbols in XCOFF object files
because XCOFF uses a "." prefix for function entry point symbols. For
example, `__sanitizer_cov_trace_pc_guard appears` as
`.__sanitizer_cov_trace_pc_guard` in the symbol table.
Before this change, sancov reports:
`ERROR: __sanitizer_cov* functions not found`
This change strips the prefix "." when checking symbol names in XCOFF
files, allowing sancov to correctly identify coverage symbols.
---------
Co-authored-by: Honey Goyal <honey.goyal3 at ibm.com>
[LV][NFC] Remove some unused attributes from tests (#188091)
The local_unnamed_addr and dso_local attributes add no value to any of
the tests and simply increase file size, so I've removed all instances.
Revert "AMDGPU: Delay value replacement in PromoteAlloca (#186944)" (#188180)
This reverts commit 5624cce586c74ec7cfcbd0243f65cb1870677af7.
This is causing libclc failure. revert to fix it properly.
hid/hgame: Fix desync in hgame_dpad_cb()
hgame_dpad_cb() previously exited early whenever conflicting directions
were input (e.g., UP + DOWN) without saving said input to the
hgame_softc state. This led to a desync between the driver and the
gamepad.
This patch instead handles conflicting inputs by cancelling them out
with each other.
Remove early return. Calculate axis value by subtraction.
Reviewed by: obiwac
Approved by: obiwac
Differential Revision: https://reviews.freebsd.org/D55849
[clangd] Add ArcsinX as a maintainer (#187886)
To address clangd maintance problem, I'm nominating myself as a clangd
maintainer.
I'm currently actively reviewing PRs. I also participated in
clangd-related discourse discussions, subscribed to clangd issues and
PRs. For a while I plan to spend some time for PRs review in clangd.
[Hexagon] Optimize load/store instruction during widening (#186962)
This change enhances the Hexagon Load-Store Widening pass to recognize
and optimize a specific pattern involving the S2_addasl_rrri
instruction. When widening loads/stores, the pass now detects cases
where the base register is defined by an S2_addasl_rrri instruction and
combines the operations into a single load double/store double
instruction with register shift op, eliminating the intermediate address
calculation.
Eg, for load,
If the definition of the base register came from a addasl instruction,
we generate a
memd(Rs + Rt << #imm) instead of memd(Rs + #imm) instruction.
Transform:
%18 = S2_addasl_rrri %8, %17, 3
[9 lines not shown]
Extract this m68k cpu.h commit:
revision 1.26
date: 2025-12-05 05:27:03 -0800; author: thorpej; state: Exp; lines: +21 -4;
commitid: jviu62VSzYhPRdlG;
Define the fields in the 68060 Processor Configuration Register.
...into a new file, pcr.h, and adjust things that need the stuff.
