[CIR] Implement missing __sync_* atomic builtins (#214606)
Add CIR codegen support for five legacy __sync_* builtins that
previously emitted "Not Yet Implemented" errors:
__sync_val_compare_and_swap -> cir.atomic.cmpxchg (seq_cst)
__sync_bool_compare_and_swap -> cir.atomic.cmpxchg + cmp (seq_cst)
__sync_swap -> cir.atomic.xchg (seq_cst)
__sync_lock_test_and_set -> cir.atomic.xchg (seq_cst)
__sync_lock_release -> cir.store 0 (release)
Size-suffixed forms (_1, _2, _4, _8) are handled, covering 20 builtin
variants in total; the unsuffixed forms are rewritten by Sema and the
_16 variants fall back to errorBuiltinNYI.
The existing emitBinaryAtomic / emitBinaryAtomicPost infrastructure
already handled the arithmetic __sync_* family (fetch_and_add, etc.).
This patch adds the remaining compare-and-swap, exchange, and
lock-release helpers: emitAtomicCmpXchgValue, emitAtomicCmpXchgBool,
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Interfaces: Assignments - next round of attributes, closes https://github.com/opnsense/core/issues/10568 (#10802)
o add media type and options
o most common ipv6 dhcp advanced options
o support "raw", but validated, send and receive options for both dhcp and dhcp6
This should complete the interfaces configuration section.
Interfaces: Assignments - next round of attributes, closes https://github.com/opnsense/core/issues/10568
o add media type and options
o most common ipv6 dhcp advanced options
o support "raw", but validated, send and receive options for both dhcp and dhcp6
This should complete the interfaces configuration section.
Restrict intrinsic to fixed->scalable with same min EC
This simplifies a lot of the legalisation code. The codegen regressions
for 64b -> scalable 128b can be addressed with a DAG combiner in a
follow-up.
[analyzer] Move the lifetime checkers from alpha.cplusplus to alpha.core (#216739)
This PR moves the lifetime checkers from `alpha.cplusplus` to
`alpha.core`. This PR is the beginning of future PRs that will bring the
lifetime checkers from `alpha` to `core`. To meet the requirements of a
`core` checker there are still missing works for these checkers that is
the reason this PR only moves them from `alpha.cplusplus` to
`alpha.core`.
security/xray-core: Mark conflict with textproc/xray
Both ports install bin/xray. textproc/xray already declares the
conflict; declare it here as well so it is recorded on both sides.
[mlir][LLVM] Use a disjoint scope domain when inlining noalias
This matches recent changes to the LLVM inliner.
AI disclosure: Claude wrote the code, I wrote the commit message and
have done initial review.
[mlir][LLVM] Add disjointScopes to AliasScopeDomainAttr
This also updates the MLIR-side inliner to clone disjoint domains
while cloning alias scopes, matching changes to LLVM.
AI disclosure: Claude wrote the code, I wrote the commit message and
looked at the code.
[AMDGPU] Use a disjoint scope domain for noalias kernel arguments
All noalias arguments of a kernel are disjoint with each other, so we
can use a disjoint scope to save on metadata construction.
AI disclosure: Claude wrote this, I looked at it and wrote this
message.
