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Event: Oslo Hackathon 2026
[AMDGPU] Reserve ENABLE_WAVEFRONT_SIZE32 on gfx125
Wave32-only targets (gfx1250, gfx1250-strict, gfx1251, gfx12-5-generic)
reserve the kernel descriptor's ENABLE_WAVEFRONT_SIZE32; it must be 0.
The compiler set it to 1.
The wave size is selectable only on targets with both supports-wave32
and supports-wave64. Elsewhere, clear the bit, stop printing
.amdhsa_wavefront_size32, and reject the directive in the assembler.
The disassembler now rejects a set bit on every target without a
selectable wave size. This replaces the gfx9-only check and also covers
GFX6-GFX8, matching the documentation.
Document which targets select the wave size through this bit.
[AMDGPU][GlobalISel] Require asserts for new test (#236510)
d6e883a7ea89 (#230636) added this test, which selects a combine rule by
name (-amdgpupostlegalizercombiner-only-enable-rule=
simplify_demanded_bits). Rule-name lookup is only compiled in under
!NDEBUG (GlobalISelCombinerEmitter emits the StringMatcher inside
#ifndef NDEBUG), so release builds fail with "LLVM ERROR: Invalid rule
identifier". Other similar tests require assertions, so follow suit (cf.
#233602).
Fixes d6e883a7ea89.
Assisted-by: Gemini
Add PreLegalizer pattern matching for degrees GL extension (#216506)
Pattern matching done using SPIRVCombine.td and SPIRVCombinerHelper.cpp
matchDegrees and applyDegrees added
1) matchDegrees checks if the fmul x , constant or fmul constant, x has
the constant as 180/pi and returns true if it passes the condition
2) applyDegrees is run after the above check passes and it creates the
intrinsic and passes x and result register to it
3) added a positive test case to test the above
Locally tested using
degrees.ll
```
float test(float x)
{
return degrees(x);
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