devel/libuv: backport uv_cpu_info() fix for powerpc64*
hw.clockrate doesn't exist on powerpc, so uv_cpu_info() fails and node's
os.cpus() is empty. rollup's terser plugin then starts zero workers and
hangs, which broke www/py-yt-dlp-ejs. The fix is in libuv 1.53.0.
www/firefox mail/thunderbird: fix build on powerpc64le
The wasm2c bundled with 158 forces SIMD loads with an asm "f" constraint on
anything that isn't x86_64, aarch64, riscv or s390x. On PowerPC that's a scalar
FP register, so clang can't put a v128 there. Take the upstream wabt fix
(d77389b8e748) that uses "v".
www/node2{2,4}: fix safepoints after calls on powerpc64*
Backport V8 f331137d5968 and 3d0a73103b97. The assembler can put its
trampoline pool right after a call, and the safepoint and exception
handler for that call are then recorded at the wrong address, so the
GC can scan the wrong stack slots and exceptions can skip their catch
block.
editors/openoffice-*: enable on powerpc64le
OpenJDK keeps its libraries in jre/lib/ppc64le on little-endian, and
source_soenv.sh in -devel only knew the big-endian triple.
www/node26: fix safepoints after calls on powerpc64*
Backport V8 f331137d5968. The assembler can put its trampoline pool
right after a call, and the safepoint and exception handler for that
call are then recorded at the wrong address, so the GC can scan the
wrong stack slots and exceptions can skip their catch block.
editors/openoffice-*: don't require libjawt.so
openjdk8 keeps libjawt.so under jre/lib, where pkg doesn't register it
as provided, so pkg add of the package fails with "Missing shlib
libjawt.so". openjdk8 is already a run dependency.
www/immich: enable on powerpc64le
Same as immich-cli: use the Wasm builds of rolldown, oxide, lightningcss
and esbuild there, and the TypeScript 6 compiler.
While here, stop hardcoding x64 in the sharp entries of pkg-plist.
www/immich-cli: enable on powerpc64le
rolldown and the TypeScript 7 compiler have no FreeBSD/powerpc64le
binaries, so use the Wasm build of rolldown there and the TypeScript 6
compiler instead.
www/node26: fix Maglev on powerpc64
Maglev's PowerPC code loads a whole word where it should test one byte
of the map, so it checks the wrong byte on big endian. Once a function
gets optimized, "x == null" and "typeof x" give wrong results.
www/node24: drop -mpower8-vector
simdutf enables its POWER code whenever AltiVec is available, but that
code needs POWER8. Backport simdutf 573d42d7, which also checks for
POWER8, and drop the flag. There are no official powerpc64 packages,
so anyone who wants the POWER8 code can set CPUTYPE.
www/node2{2,4,6}: detect the CPU on powerpc64*
V8 only detects the CPU on Linux and AIX. On FreeBSD it assumes the
oldest CPU it supports, so node 22 and 24 never use POWER9 code and
reject every Wasm module that uses SIMD. Read the ISA level from
AT_HWCAP and AT_HWCAP2 instead.
www/node22: don't require POWER8 on powerpc64
simdutf enables its POWER code whenever AltiVec is available, but that
code needs POWER8, so the port had to build with -mpower8-vector.
Backport simdutf 573d42d7, which also checks for POWER8, and drop the
flag.
www/node22: fix i8x16.bitmask on powerpc64*
Backport V8 2abc61361dd4. The PowerPC code passes r0 to mtvsrdd, which
reads it as zero, so lanes 8-15 of the mask come out wrong. Node 24 and
26 already have the fix.
[CodeGen] Move BasicBlockMatchingAndInference options to CodeGenOptions.td (#235180)
Move -propeller-match-bbid and -propeller-infer-threshold from cl::opt
in BasicBlockMatchingAndInference.cpp to CodeGenOptions.td. This avoids
exposing PropellerMatchBBID in BasicBlockMatchingAndInference.h and
including that header in TargetPassConfig.cpp.
CodeGen: Consolidate MachinePipeliner controls (#235311)
This pass followed the anti-pattern of having a cl::opt in the pass
which early returned instead of not adding the pass to the pipeline in
the first place. Additionally several targets had their own cl::opts
used from the subtarget enablement hook.
Consolidate this into one generic control with a subtarget hook to
enable the pipeliner, following the example of enable-misched /
enableMachineScheduler.
Adding the nop pass still had the side effect of running the required
analyses which exposed issues. In particular this hides failures in
PPC with the defaults. The LiveIntervals dependency would assert if
there were unreachable blocks which was possible with the point PPC
inserted the pass.
Hexagon's hardware loop passes move to the end of
addMachineSSAOptimization so they still run before the pipeliner.
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