LLVM/project 7cf62f9libc/include memory.yaml CMakeLists.txt, libc/include/sys fcntl.yaml poll.yaml

[libc] Add POSIX redirection header specifications in YAML (#211859)

Add header YAML specifications for memory.h, sys/poll.h, sys/unistd.h,
sys/fcntl.h, and sys/signal.h using public_includes.

POSIX.1-2017 and historical X/Open System Interfaces (XSI) standards
define these headers as alternate or legacy header locations that
forward to string.h, poll.h, unistd.h, fcntl.h, and signal.h
respectively. The YAML header specs allow hdrgen to generate the public
headers automatically with proper license headers and guards.

Updated Linux target headers.txt configuration files to register the new
public header targets for installation.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+40-0libc/include/CMakeLists.txt
+5-0libc/include/sys/fcntl.yaml
+5-0libc/include/sys/poll.yaml
+5-0libc/include/sys/unistd.yaml
+5-0libc/include/sys/signal.yaml
+5-0libc/include/memory.yaml
+65-03 files not shown
+80-09 files

LLVM/project ae7479cllvm/docs AMDGPUUsage.rst

Update docs
DeltaFile
+20-13llvm/docs/AMDGPUUsage.rst
+20-131 files

LLVM/project 81421bcllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPUMemoryUtils.h, llvm/test/CodeGen/AMDGPU addrspacecast-barrier.ll

Comments
DeltaFile
+4-3llvm/lib/Target/AMDGPU/SIDefines.h
+1-3llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
+1-1llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+9-106 files

LLVM/project 95fcd61llvm/lib/Target/AMDGPU AMDGPUMachineFunctionInfo.cpp, llvm/lib/TargetParser TargetDataLayout.cpp

Rebase + comments
DeltaFile
+7-7llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+4-4llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+1-4llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
+2-1llvm/lib/TargetParser/TargetDataLayout.cpp
+14-164 files

LLVM/project 11f6bcbllvm/docs AMDGPUUsage.rst

Comments
DeltaFile
+1-1llvm/docs/AMDGPUUsage.rst
+1-11 files

LLVM/project 3f01cfcllvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPUMemoryUtils.cpp SIDefines.h

[AMDGPU] Add synthetic apertures and use them for barriers

Define what a synthetic aperture is, and adjust the barrier AS
to use this new system. This makes the barrier AS even safer to
use as now we can use all 32 bits of it without ever risking
hitting a valid address of any kind (LDS or outside LDS).
DeltaFile
+72-87llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+44-5llvm/docs/AMDGPUUsage.rst
+21-23llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+18-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-0llvm/lib/Target/AMDGPU/SIDefines.h
+9-0llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
+176-1324 files not shown
+186-13710 files

LLVM/project 3b851f3llvm/lib/IR AutoUpgrade.cpp, llvm/unittests/Bitcode DataLayoutUpgradeTest.cpp

Add reserved AS to autoupgrade
DeltaFile
+31-19llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+4-2llvm/lib/IR/AutoUpgrade.cpp
+35-212 files

LLVM/project bdec06cllvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU amdgpu-lower-exec-sync.ll s-barrier.ll

[RFC][AMDGPU] Add BARRIER address space

Add a new BARRIER address space that is used for global variables that are used to represent the barrier IDs in GFX12.5.

These barrier addresses just have values corresponding 1-1 to barrier IDs. They are still implemented on top of LDS, but the offsetting happens during an addrspacecast to generic, not whenever the barrier GV is used.

The motivation for this is to make the relation between LDS and barrier GVs explicit in the compiler. It does add a bit more complexity, but that complexity was already there, just hidden by pretending barrier GVs were actual LDS.
DeltaFile
+474-0llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+81-74llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+72-61llvm/test/CodeGen/AMDGPU/s-barrier.ll
+59-43llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+52-14llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+32-32llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
+770-22448 files not shown
+1,234-57454 files

LLVM/project 316e94fllvm/lib/IR AutoUpgrade.cpp, llvm/unittests/Bitcode DataLayoutUpgradeTest.cpp

Fix Autoupgrade
DeltaFile
+7-5llvm/lib/IR/AutoUpgrade.cpp
+4-2llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+11-72 files

LLVM/project c1975dcllvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPUMemoryUtils.h AMDGPUMemoryUtils.cpp

Comments
DeltaFile
+7-12llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+8-10llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+8-0llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
+6-0llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
+4-1llvm/docs/AMDGPUUsage.rst
+1-1llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
+34-243 files not shown
+38-269 files

LLVM/project 62ce82alld/test/ELF/lto amdgpu.ll, llvm/lib/IR AutoUpgrade.cpp

Add DL auto-upgrade
DeltaFile
+19-11llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+4-0llvm/lib/IR/AutoUpgrade.cpp
+1-1lld/test/ELF/lto/amdgpu.ll
+24-123 files

LLVM/project 896fc9ellvm/lib/Target/AMDGPU AMDGPUMachineFunctionInfo.cpp, llvm/test/CodeGen/AMDGPU s-barrier-lowering-bad-absolute-symbol.ll null-named-barrier-gv.ll

comments
DeltaFile
+18-18llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
+8-4llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
+1-1llvm/test/CodeGen/AMDGPU/s-barrier-lowering-bad-absolute-symbol.ll
+1-1llvm/test/CodeGen/AMDGPU/null-named-barrier-gv.ll
+28-244 files

LLVM/project cbaa3a2clang/docs AMDGPUSupport.md

comments
DeltaFile
+16-8clang/docs/AMDGPUSupport.md
+16-81 files

LLVM/project 17a12afclang/lib/Sema SemaDecl.cpp, clang/test/SemaHIP amdgpu-barrier-spirv.hip

Check field decls too
DeltaFile
+6-2clang/test/SemaHIP/amdgpu-barrier-spirv.hip
+5-0clang/lib/Sema/SemaDecl.cpp
+11-22 files

LLVM/project e032163clang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema SemaAMDGPU.h

Diagnose type on SPIRV
DeltaFile
+18-0clang/lib/Sema/SemaAMDGPU.cpp
+16-0clang/test/SemaHIP/amdgpu-barrier-spirv.hip
+7-0clang/lib/Sema/SemaDecl.cpp
+4-0clang/include/clang/Sema/SemaAMDGPU.h
+3-0clang/lib/Sema/Sema.cpp
+3-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+51-06 files

LLVM/project b1a0516clang/docs AMDGPUSupport.md

docs
DeltaFile
+16-8clang/docs/AMDGPUSupport.md
+16-81 files

LLVM/project 0c36096clang/docs AMDGPUSupport.md

Add docs
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+27-0clang/docs/AMDGPUSupport.md
+27-01 files

LLVM/project b83966bclang/include/clang/Basic DiagnosticSemaKinds.td, clang/test/SemaCXX amdgpu-barrier.cpp

Comment
DeltaFile
+2-2clang/test/SemaHIP/amdgpu-barrier.hip
+2-2clang/test/SemaCXX/amdgpu-barrier.cpp
+1-1clang/test/SemaOpenCL/amdgpu-barrier.cl
+1-1clang/include/clang/Basic/DiagnosticSemaKinds.td
+6-64 files

LLVM/project fd1b1eeclang/lib/AST Type.cpp, clang/lib/Sema SemaAMDGPU.cpp

[clang][AMDGPU] Clean-up handling of named barrier type

- Allow the type in struct/classes in very limited circumstances. The goal is to enable creating trivial wrappers around the named barrier variable, but ensure we can't get into situations where things would get awkward. Currently this means we only allow the named barrier in RecordDecls with exactly 1 field, that have no base class, and are not inherited.
- Use a `amdgpu_barrier` LangAS for this type that currently maps to the local AS. This allows easy switching to the barrier AS in a future patch.
DeltaFile
+85-0clang/lib/Sema/SemaAMDGPU.cpp
+72-0clang/test/SemaHIP/amdgpu-barrier.hip
+71-0clang/test/SemaCXX/amdgpu-barrier.cpp
+28-16clang/test/CodeGenHIP/amdgpu-barrier-type.hip
+26-1clang/lib/AST/Type.cpp
+24-0clang/test/SemaOpenCL/amdgpu-barrier.cl
+306-1715 files not shown
+366-3421 files

LLVM/project e362f3clibc/src/stdlib putenv.h environ_internal.cpp, libc/src/stdlib/linux CMakeLists.txt putenv.cpp

[libc][stdlib] Add putenv (#208339)

Added the POSIX putenv() function and its internal support.

Implemented EnvironmentManager::put() to insert caller-provided
"name=value" strings directly into the environment array, managing
ownership correctly (caller retains ownership).

Registered for x86_64, aarch64, and riscv. Integration tests cover basic
operations, ownership semantics, validation, and edge cases.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+135-0libc/test/integration/src/stdlib/putenv_test.cpp
+36-0libc/src/stdlib/environ_internal.cpp
+33-0libc/src/stdlib/linux/putenv.cpp
+25-0libc/src/stdlib/putenv.h
+14-0libc/test/integration/src/stdlib/CMakeLists.txt
+14-0libc/src/stdlib/linux/CMakeLists.txt
+257-06 files not shown
+279-012 files

LLVM/project 5a65030clang/lib/Driver/ToolChains SYCL.cpp, clang/test/Driver sycl-windows.cpp sycl-device-lib-spirv64.cpp

[Driver][SYCL] Add compile-time device library linking for SPIR-V targets (#196656)

This PR implements compile-time device library linking for SYCL
offloading to SPIR-V targets, using `libclang_rt.builtins.bc` - an
in-tree compiler-rt artifact produced alongside the existing
`libclang_rt.builtins.a` for `SPIRV64`.

## Motivation

SYCL device compilations targeting SPIR-V need access to compiler
builtins (integer arithmetic, floating-point helpers, etc.) at compile
time so the compiler can optimize across user code and builtins, inline
aggressively, and eliminate dead code. This PR lays the foundation by
wiring up the first in-tree device library : `libclang_rt.builtins.bc` -
using the same `-mlink-builtin-bitcode` mechanism already used by
`libclc` and `HIP`.

## Changes


    [54 lines not shown]
DeltaFile
+32-0compiler-rt/lib/builtins/CMakeLists.txt
+15-15clang/test/Driver/sycl.cpp
+18-12clang/test/Driver/sycl-offload-jit.cpp
+30-0clang/lib/Driver/ToolChains/SYCL.cpp
+14-14clang/test/Driver/sycl-windows.cpp
+28-0clang/test/Driver/sycl-device-lib-spirv64.cpp
+137-418 files not shown
+166-5414 files

FreeBSD/src d6dcd8dlib/libsysdecode mktables

libsysdecode: fix nlm_flag regex in mktables

Some NLM_F_ definitions contain multiple underscores in their name; this
should pick them up.

Reviewed by:    kp, Ishan Agrawal <iagrawal9990 at gmail.com>
Fixes:  4c932a4d45fb ("netlink: decode netlink message flags symbolically")
Sponsored by:   The FreeBSD Foundation
Pull Request:   https://github.com/freebsd/freebsd-src/pull/2340
DeltaFile
+1-1lib/libsysdecode/mktables
+1-11 files

LLVM/project 371b78allvm/test/MC/AMDGPU hsa-v4.s hsa-gfx13-v4.s

AMDGPU: Migrate assembler tests with content changes to subarch triples (#212495)

Convert tests which failed after converting the arguments due to content
changes from checking the emitted target id string.
DeltaFile
+10-10llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
+6-6llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
+5-5llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
+5-5llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
+4-4llvm/test/MC/AMDGPU/hsa-v4.s
+4-4llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
+34-344 files not shown
+48-4810 files

LLVM/project 455ef36libcxx/include fstream, libcxx/src ios.instantiations.cpp

[libc++] Fix ungetc failing after xsgetn (#210951)

After #206453 we don't correctly handle `unget()` anymore. This fixes
the issue by updating the internal buffer to contain the tail of the
read data.

Fixes #210203
DeltaFile
+159-0libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/xsgetn.buffer.pass.cpp
+50-23libcxx/include/fstream
+21-0libcxx/src/ios.instantiations.cpp
+14-0libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/xsgetn.pass.cpp
+1-0libcxx/test/extensions/libcxx/input.output/file.streams/fstreams/filebuf.members/test.dat
+245-235 files

LLVM/project 55076d3llvm/test/Instrumentation/AddressSanitizer/AMDGPU asan_instrument_generic_address_space.ll asan_instrument_constant_address_space.ll

AMDGPU: Migrate asan tests to subarch triples (#212496)
DeltaFile
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_scratch.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_do_not_instrument_lds.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_global_redzones.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/adaptive_constant_global_redzones.ll
+6-64 files not shown
+10-1010 files

LLVM/project 56fd824llvm/test/Verifier/AMDGPU alloca.ll reqd-work-group-size.ll

AMDGPU: Migrate verifier tests to subarch triples (#212494)
DeltaFile
+5-5llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
+1-1llvm/test/Verifier/AMDGPU/alloca.ll
+6-62 files

LLVM/project b976ce0offload/test CMakeLists.txt

Revert "[offload][lit] Run check-offload as part of check-all" (#212506)

Reverts llvm/llvm-project#212500
DeltaFile
+1-0offload/test/CMakeLists.txt
+1-01 files

LLVM/project 2983555clang/lib/Driver Driver.cpp, clang/lib/Driver/ToolChains Clang.cpp

[HIP] Support device-only linking of bitcode offload binaries (#212342)

The new offload driver packages multi-architecture bitcode in LLVM
offload binaries. A later `--hip-link --offload-device-only`
invocation treated these `.bc` inputs as host LLVM IR and dropped
them before linking.

Pass these inputs directly to clang-linker-wrapper when producing a
device fat binary. The wrapper can then extract and link each
requested GPU architecture.
DeltaFile
+59-0clang/test/Driver/hip-link-offload-binary.c
+17-1clang/lib/Driver/Driver.cpp
+8-8clang/lib/Driver/ToolChains/Clang.cpp
+84-93 files

LLVM/project 7d4160ellvm/lib/Target/AMDGPU AMDGPUAsmPrinter.cpp, llvm/test/CodeGen/AMDGPU pal-metadata-3.0.gfx950.ll lds-size-hsa-gfx950.ll

[AMDGPU] Stop rounding up LDS block size for gfx950 (#208046)

The AMDGPUAsmPrinter::getSIProgramInfo function calculates the number of
LDS blocks in a somewhat indirect way: It obtains the LDS granularity
from another function, determines an "LDSAlignShift" based on this and
then uses shifts to determine the alignment and for division. The use of
shifts forces the alignment to be a power of two which works for all LDS
granularity values except for the value of 1280 bytes used for gfx950.
For this, the function uses LDSAlignShift = 11 which means that the
block size gets rounded up to 2048. This implies that the computed
number of LDS blocks is too small.

Remove the use of LDSAlignShift from getSIProgramInfo and use the LDS
granularity directly for alignment and division.
DeltaFile
+3-18llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+2-2llvm/test/CodeGen/AMDGPU/lds-size-hsa-gfx950.ll
+2-2llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
+1-1llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.gfx950.ll
+8-234 files

LLVM/project 3d32526offload/test CMakeLists.txt

[offload][lit] Run check-offload as part of check-all (#212500)

It's unclear why these were excluded from `check-all`, but we made all
tests pass on Level Zero and our local testing shows they pass on AMD
and NVIDIA too, so enable it by default.

Context: https://github.com/llvm/llvm-project/pull/211633

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
DeltaFile
+0-1offload/test/CMakeLists.txt
+0-11 files