FreeBSD/ports d48bf8csysutils/try-rs distinfo Makefile

sysutils/try-rs: Update to 1.7.1
DeltaFile
+3-3sysutils/try-rs/distinfo
+1-1sysutils/try-rs/Makefile
+4-42 files

Illumos/gate 95084a9usr/src/boot/libsa sbrk.c stand.h

17989 libsa: fix sbrk() signature
Reviewed by: Bill Sommerfeld <sommerfeld at hamachi.org>
Reviewed by: Jason King <jason.brian.king+illumos at gmail.com>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+4-4usr/src/boot/libsa/sbrk.c
+1-1usr/src/boot/libsa/stand.h
+5-52 files

NetBSD/pkgsrc 73qh3EGmultimedia/libvpx Makefile

   libvpx: yasm dependency is x86-specific
VersionDeltaFile
1.111+2-3multimedia/libvpx/Makefile
+2-31 files

LLVM/project 563d3f6offload/test/mapping data_member_ref.cpp, offload/test/offloading strided_update_count_expression.c target_update_ptr_count_expression.c

[OFFLOAD] Disable tests that may cause hangs in CI (#189116)
DeltaFile
+3-0offload/test/mapping/data_member_ref.cpp
+2-1offload/test/offloading/strided_update_count_expression.c
+3-0offload/test/offloading/target_update_ptr_count_expression.c
+2-0offload/test/offloading/info.c
+2-0offload/test/offloading/strided_partial_update_to.c
+2-0offload/test/offloading/target_depend_nowait.cpp
+14-16 files not shown
+25-212 files

LLVM/project 01768d3lldb/source/Target BorrowedStackFrame.cpp

[lldb] Fix the order of arguments in the StackFrame constructor call (#189108)

`pc` and `cfa` arguments were swapped.
DeltaFile
+1-1lldb/source/Target/BorrowedStackFrame.cpp
+1-11 files

NetBSD/pkgsrc ZufG8PHsysutils/extipl Makefile

   extipl: set LICENSE & ONLY_FOR_PLATFORM
VersionDeltaFile
1.17+5-2sysutils/extipl/Makefile
+5-21 files

NetBSD/src dQElHUyshare/man/man4/man4.i386 rdcpcib.4

   fix isa0 synopsys: isa0 at rdcide? -> isa0 at rdcpcib? .
   capitalize Vortex86.
   bump date.
VersionDeltaFile
1.2+4-4share/man/man4/man4.i386/rdcpcib.4
+4-41 files

LLVM/project e825f42llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Improve fsqrt f64 expansion with ninf (#183695)
DeltaFile
+52-92llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+60-80llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+10-6llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+7-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+3-2llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir
+132-1835 files

FreeBSD/ports 5435de1cad/gmsh distinfo Makefile

cad/gmsh: upgrade to 4.15.2

        Fixed issue in 3D structured CGNS output.
DeltaFile
+3-3cad/gmsh/distinfo
+1-1cad/gmsh/Makefile
+4-42 files

FreeBSD/ports 474d9cemath/libsemigroups distinfo Makefile

math/libsemigroups: upgrade to v3.5.4

Release notes at
        https://github.com/libsemigroups/libsemigroups/releases/tag/v3.5.4
DeltaFile
+3-3math/libsemigroups/distinfo
+1-1math/libsemigroups/Makefile
+1-0math/libsemigroups/pkg-plist
+5-43 files

FreeBSD/ports 0de2340math/hpcombi pkg-plist distinfo

math/hpcombi: upgrade to v1.1.2

Release notes at https://github.com/libsemigroups/HPCombi/releases/tag/v1.1.2
DeltaFile
+4-4math/hpcombi/pkg-plist
+3-3math/hpcombi/distinfo
+2-3math/hpcombi/Makefile
+9-103 files

FreeBSD/ports 94e3f14math/openblas64 distinfo Makefile

math/openblas64: upgrade to v0.3.32
DeltaFile
+3-3math/openblas64/distinfo
+1-1math/openblas64/Makefile
+4-42 files

FreeBSD/ports 4b07913graphics/cimg distinfo Makefile

graphics/cimg: upgrade to v.3.7.4
DeltaFile
+3-3graphics/cimg/distinfo
+1-1graphics/cimg/Makefile
+4-42 files

NetBSD/pkgsrc DDU69iTmultimedia/x264 Makefile

   x264: nasm dependency is x86-specific
VersionDeltaFile
1.6+2-3multimedia/x264/Makefile
+2-31 files

LLVM/project c467f4dllvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/test/Bitcode amdgpu-wmma-drop-ab-mods-upgrade.ll

[AMDGPU] Remove neg support from 4 more gfx1250 WMMA

These are previously covered by AMDGPUWmmaIntrinsicModsAllReuse.
DeltaFile
+16-192llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
+40-40llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
+52-0llvm/test/Bitcode/amdgpu-wmma-drop-ab-mods-upgrade.ll
+16-16llvm/test/CodeGen/AMDGPU/waitcnt-loop-opt.mir
+16-16llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
+4-21llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+144-28512 files not shown
+216-32918 files

NetBSD/pkgsrc PtR3CLwmultimedia/svt-av1 Makefile

   svt-av1: nasm dependency is x86-specific
VersionDeltaFile
1.12+7-3multimedia/svt-av1/Makefile
+7-31 files

LLVM/project 0f81923clang/lib/CIR/CodeGen CIRGenBuilder.h CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-intrinsics.c

[CIR][AArch64] Upstream vmull_*/vmull_high_* and vmul_p8/vmul_high_p8 Neon builtins (#188371)

Add CIR generation for AArch64 NEON builtins `vmull_*` and
`vmull_high_*`

The accompanying tests from
[AArch64/neon-instrinsics](https://github.com/llvm/llvm-project/blob/main/clang/test/CodeGen/AArch64/neon-intrinsics.c)
were integrated with new checks for CIR codegen.

Part of #185382
DeltaFile
+243-0clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-206clang/test/CodeGen/AArch64/neon-intrinsics.c
+37-0clang/lib/CIR/CodeGen/CIRGenBuilder.h
+16-1clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+296-2074 files

LLVM/project eea4af4lldb/include/lldb/Core Address.h, lldb/source/API SBAddress.cpp

[lldb] Use Address(section, offset) constructor in more places (NFC) (#189101)

After this change, Address::SetSection() had only one use left (in a
unit test) and was removed. Address::ClearSection() had no uses, now
also removed. (It is unlikely that someone needs to change the section
without simultaneously changing the section offset, and for that we have
a constructor.)
DeltaFile
+9-14lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+0-12lldb/include/lldb/Core/Address.h
+1-2lldb/source/API/SBAddress.cpp
+1-2lldb/source/Core/Section.cpp
+1-1lldb/unittests/Symbol/SymbolTest.cpp
+12-315 files

LLVM/project d54ec51llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[AMDGPU][DAGCombiner][GlobalISel] Extend allMulUsesCanBeContracted with FMA/FMAD pattern

Add conservative FMA/FMAD recognition to allMulUsesCanBeContracted:
a multiply used by an existing FMA/FMAD is assumed to be contractable
(it's already being contracted elsewhere). This avoids unnecessary
contraction blocking for multiplies that feed into FMA chains.

Also adds FMA/FMAD to the FPEXT user set (fpext(fmul) --> fma is
recognized as contractable when isFPExtFoldable).

Guards all remaining FMA-chain reassociation fold sites in both
SDAG (visitFADDForFMACombine/visitFSUBForFMACombine, 8 sites) and
GISel (matchCombineFAddFpExtFMulToFMadOrFMAAggressive, 4 sites).

This re-enables contractions that were conservatively blocked in
earlier patches where the multiply had an FMA use that wasn't yet
recognized: dagcombine-fma-crash.ll and dagcombine-fma-fmad.ll
CHECK lines revert to upstream behavior.


    [2 lines not shown]
DeltaFile
+172-181llvm/test/CodeGen/AMDGPU/fma-multiple-uses-contraction.ll
+82-91llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
+57-1llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+55-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+10-12llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
+376-2865 files

LLVM/project 8e8dc4bllvm/include/llvm/CodeGen/GlobalISel CombinerHelper.h, llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp

[AMDGPU][DAGCombiner][GlobalISel] Extend allMulUsesCanBeContracted with FPEXT pattern

Extend the allMulUsesCanBeContracted analysis to recognize FPEXT patterns
where the multiply result flows through fpext before being used in
contractable operations (fadd, fsub). This covers:
  - fmul --> fpext --> {fadd, fsub}: FPEXT folds if isFPExtFoldable
  - fmul --> fpext --> fneg --> fsub: FPEXT then FNEG to FSUB
  - fmul --> fneg --> fpext --> fsub: FNEG then FPEXT folds if foldable

Also adds allMulUsesCanBeContracted guards to all FPEXT fold sites in
both SDAG (visitFADDForFMACombine, visitFSUBForFMACombine) and GISel
(matchCombineFAddFpExtFMulToFMadOrFMA, matchCombineFSubFpExtFMulToFMadOrFMA,
matchCombineFSubFpExtFNegFMulToFMadOrFMA).

Fixes a missing isFPExtFoldable check in GISel's
matchCombineFSubFpExtFMulToFMadOrFMA which could fold without verifying
the extension is actually foldable.

Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Made-with: Cursor
DeltaFile
+222-452llvm/test/CodeGen/AMDGPU/fma-multiple-uses-contraction.ll
+88-14llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+78-13llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-1llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+390-4804 files

LLVM/project 0dce11dllvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[AMDGPU][DAGCombiner][GlobalISel] Extend allMulUsesCanBeContracted with FNEG pattern

Extend allMulUsesCanBeContracted() to recognize fmul -> fneg -> fsub
chains as contractable uses. This allows FMA contraction when a multiply
feeds an fneg that is only used by fsub operations.

Changes:
- DAGCombiner.cpp: Add ISD::FNEG case to allMulUsesCanBeContracted()
  checking that all FNEG users are ISD::FSUB. Update 1 fold site guard
  in visitFSUBForFMACombine (fsub(fneg(fmul))).
- CombinerHelper.cpp: Add G_FNEG case to allMulUsesCanBeContracted()
  checking that all FNEG users are G_FSUB. Update 2 fold site guards
  in matchCombineFSubFNegFMulToFMadOrFMA. Fix guard ordering to check
  isContractableFMul before allMulUsesCanBeContracted (cheap first).
- Add 7 new test functions to fma-multiple-uses-contraction.ll covering
  fneg single-use, multi-use, mixed contractable/non-contractable, and
  cross-pattern (P1 direct + P2 fneg) interactions.
- Update mad-combine.ll CHECK lines affected by the guard changes.


    [6 lines not shown]
DeltaFile
+20-28llvm/test/CodeGen/AMDGPU/fma-multiple-uses-contraction.ll
+33-7llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+22-2llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-5llvm/test/CodeGen/AMDGPU/mad-combine.ll
+79-424 files

LLVM/project baad5e3llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[DAGCombiner][GlobalISel] Prevent FMA contraction when fmul cannot be eliminated (FADD/FSUB pattern)

Made-with: Cursor
DeltaFile
+295-481llvm/test/CodeGen/AMDGPU/fma-multiple-uses-contraction.ll
+115-148llvm/test/CodeGen/AMDGPU/fma.f16.ll
+95-94llvm/test/CodeGen/AMDGPU/dagcombine-fma-fmad.ll
+25-25llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
+43-5llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+40-4llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+613-7577 files not shown
+656-79413 files

LLVM/project 8051f30llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[DAGCombiner][GlobalISel] Extract isFusedOp lambda, add FMA contraction test, fix missing isFPExtFoldable check

Extract the duplicated isFusedOp lambda in visitFADDForFMACombine and
visitFSUBForFMACombine into a shared static template function.

Add fma-multiple-uses-contraction.ll test file with baseline CHECK lines
for testing FMA contraction behavior when fmul has multiple uses.
This test will be updated in subsequent patches as contraction prevention
logic is added.

Fix a missing isFPExtFoldable check in GISel's
matchCombineFSubFpExtFMulToFMadOrFMA which could incorrectly fold
fsub(fpext(fmul)) into fma on targets where the fpext is not actually
foldable (e.g., gfx9-generic). This makes GISel consistent with SDAG,
which already checks isFPExtFoldable at all fpext fold sites.

Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
Made-with: Cursor
DeltaFile
+3,755-0llvm/test/CodeGen/AMDGPU/fma-multiple-uses-contraction.ll
+21-22llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+7-2llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+3,783-243 files

LLVM/project 26af10flldb/source/API SBAddress.cpp, lldb/source/Breakpoint BreakpointResolverName.cpp

[lldb] Use Address::Slide() to simplify code (NFC) (#189097)
DeltaFile
+2-7lldb/source/API/SBAddress.cpp
+3-4lldb/source/Core/Address.cpp
+2-2lldb/source/Breakpoint/BreakpointResolverName.cpp
+1-1lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
+1-1lldb/source/Plugins/Architecture/PPC64/ArchitecturePPC64.cpp
+1-1lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
+10-162 files not shown
+12-188 files

LLVM/project f9ad232clang/lib/CodeGen CodeGenAction.cpp, clang/test/Frontend backend-attribute-inlining.c backend-attribute-inlining-debug-vs-heuristic.cpp

[Clang] Show inlining hints for __attribute__((warning/error)) (#174892)

When functions marked with `[[gnu::warning/error]]` are called through inlined functions, we now show the inlining chain that led to the call when ``-fdiagnostics-show-inlining-chain`` is enabled.

With this flag, two modes are possible:

- **heuristic** mode: Uses `srcloc` and `inlined.from` metadata to reconstruct the inlining chain. Functions that are `inline`, `static`, `always_inline`, or in anonymous namespaces get `srcloc` metadata attached. This mode emits a note suggesting `-gline-directives-only` for more accurate locations.

- **debug** mode: Automatically used instead of heuristic when building with at least `-gline-directives-only` (implied by `-g1` or higher). Leverages `DILocation` debug info for reliable source locations.

Fixes: https://github.com/ClangBuiltLinux/linux/issues/1571
DeltaFile
+112-0clang/test/Frontend/backend-attribute-inlining.c
+92-0clang/test/Frontend/backend-attribute-inlining-debug-vs-heuristic.cpp
+67-0clang/test/Frontend/backend-attribute-inlining-cross-tu.c
+44-0llvm/lib/Transforms/Utils/InlineFunction.cpp
+42-0clang/test/Frontend/backend-attribute-inlining-modes.c
+41-0clang/lib/CodeGen/CodeGenAction.cpp
+398-09 files not shown
+521-1015 files

LLVM/project 8b395a7clang/lib/CodeGen CGExprScalar.cpp, clang/test/CodeGen overflow-behavior-types.c

[Clang] Ensure pattern exclusion priority over OBT (#188390)

Make sure pattern exclusions have priority over the overflow behavior types when deciding whether or not to emit truncation checks.

Accomplish this by carrying an extra field through `ScalarConversionOpts` which we later check before emitting instrumentation.
DeltaFile
+7-3clang/lib/CodeGen/CGExprScalar.cpp
+7-0clang/test/CodeGen/overflow-behavior-types.c
+14-32 files

LLVM/project 1c3018bllvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp AMDGPUCoExecSchedStrategy.h, llvm/test/CodeGen/AMDGPU coexec-scheduler.ll coexec-sched-effective-stall.mir

Revert "[AMDGPU] Add HWUI pressure heuristics to coexec strategy" (#189107)

Seems to be triggering some issues with the buildbots

https://lab.llvm.org/buildbot/#/builders/159/builds/44122

Unused variable + bad debug build.
DeltaFile
+0-606llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
+23-412llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+2-285llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+5-5llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
+30-1,3084 files

LLVM/project ce1b12elldb/source/Core SearchFilter.cpp, lldb/test/Shell/Breakpoint source-regex-missing-source.test

[lldb] Iterate over a copy of the ModuleList in SearchFilter (#189009)

Avoid a potential deadlock caused by the search filter callback
acquiring the target's module lock by iterating over a copy of the list.

Fixes #188766
DeltaFile
+14-13lldb/source/Core/SearchFilter.cpp
+11-0lldb/test/Shell/Breakpoint/source-regex-missing-source.test
+1-0lldb/test/Shell/Breakpoint/Inputs/main.c
+26-133 files

OpenBSD/ports SWLH7Pndevel/binutils Makefile

   Drop maintainership.
VersionDeltaFile
1.27+1-3devel/binutils/Makefile
+1-31 files

LLVM/project eb2ff71llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Mark variable only used in assert as maybe_unused (#189100)

Fix 00aebbff71ff4e348538708064ba2e033ccd6b2a.
DeltaFile
+1-1llvm/lib/Analysis/DependenceAnalysis.cpp
+1-11 files