[lldb][test] Avoid namespace name colliding with dyld symbols in TestAbiTagLookup (#203984)
TestAbiTagLookup.py used `v1` as the inline namespace name. On macOS the
dyld shared cache contains two unrelated internal data symbols named
`v1` (one in dyld, one in libdyld.dylib). When evaluating
`v1::withImplicitTag(...)`, `ClangExpressionDeclMap` resolves `v1` as a
namespace correctly, but then still falls through to
`SymbolContext::FindBestGlobalDataSymbol`, which finds the two dyld
symbols and raises "Multiple internal symbols found for 'v1'", failing
the test.
Rename the inline namespace to `lldb_test_abi_tag_lookup_inline_ns` so
the test no longer collides with anything in dyld.
Add a new XFAIL test, namespace_data_symbol_collision, that reproduces
the underlying bug deterministically (without depending on `dyld`) by
linking two non-debug-info objects that each define a static data
symbol whose name matches a real namespace in main.cpp.
[Clang][C] Fix init statement nullptr dereference in condition of while statement (#219056)
In conditions with an empty init statement with attributes such as
'([[]];)', the InitStmt pointer argument in the ParseCondition method
will be dereferenced. However, InitStmt is set to nullptr when parsing a
'while' statement condition, causing a crash.
This change fixes the issue by added a check that InitStmt is not
nullptr before entering the associated logic, which is consistent with
how other parts of this function handle a nullptr InitStmt. This makes
sense because a nullptr InitStmt is associated with conditions that
cannot have an init statement (the only case being 'while') and this
block operates exclusively on init statements.
Fix #218879
devel/llvm23: 23.1.0 Release
See the announcement for changes since RC3:
https://discourse.llvm.org/t/llvm-23-1-0-released/91654
Drop support for the GOLD option as gold linker is going away soon.
Sponsored by: Innovate UK
devel/llvm23: 23.1.0 Release
See the announcement for changes since RC3:
https://discourse.llvm.org/t/llvm-23-1-0-released/91654
Drop support for the GOLD option as gold linker is going away soon.
Sponsored by: Innovate UK
net/nsd: update to version 4.15.1.
Pkgsrc changes:
* Version & checksum changes.
Upstream changes:
4.15.1
================
FEATURES:
BUG FIXES:
- Fix for CVE-2026-18664: IP range access control restrictions are
bypassed for some unintended IP.
Thanks to Qifan Zhang, Palo Alto Networks for the report
Thanks to Claude and Ada Logics for the report
https://www.nlnetlabs.nl/downloads/nsd/CVE-2026-18664.txt
- Fix for CVE-2026-18916: Any remote client can denial TCP service by
throttling the TCP receive window (down to 1).
Thanks to Akhil Koul (https://github.com/akoul) for the report
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[mlir][ODS] Populate properties in legacy aggregate builders
Partition mixed aggregate attributes before operation creation and deprecate
the generated compatibility overloads for operations with non-empty
properties.
Assisted-by: Codex
netpfil tests: Make divapp packet loop handling opt-in
This generalizes the divapp logic and makes it usable for other test
scenarios such as diverted TCP connections.
Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D59067
netpfil tests: Make divapp packet loop handling opt-in
This generalizes the divapp logic and makes it usable for other test
scenarios such as diverted TCP connections.
Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D59067
[LV] Add eligibility checks for epilogue tail-folding. (#217364)
For now, epilogue tail-folding is restricted to innermost loops with
explicitly forced main and epilogue VFs, where mainVF > epilogueVF.
Reject cases requiring a scalar epilogue, cases where the main vector
loop is already tail-folded, and early-exit loops.
Interfaces: Assignments - next round of attributes, closes https://github.com/opnsense/core/issues/10568
o add media type and options
o most common ipv6 dhcp advanced options
o support "raw", but validated, send and receive options for both dhcp and dhcp6
This should complete the interfaces configuration section.
Forcefully disable RVV intrinsics usage in llama.cpp/libggml.
The code assumes that if __riscv_v_intrinsic is defined the various RVV
intrinsics are available and usable.
With clang the intrinsics may be available even though actual usage of
said intrinsics has to be allowed with clang -march=... or function
annotations.
Also the code assumes that if it can use said intrinsics at compile
time then they ought to be used at runtime. This is false on
OpenBSD which doesn't require the cpu to support the V extension.
Example error at compile time:
.../firefox-154.0/third_party/llama.cpp/ggml/src/ggml-cpu/vec.cpp:407:22: error: RISC-V type 'vfloat32m2_t' (aka '__rvv_float32m2_t') requires the 'zve32f' extension
407 vfloat32m2_t vx = __riscv_vle32_v_f32m2(&x[i], vl);
With & ok landry@ (maintainer)
Update to 0.15
Upstream changes:
0.15 Fri Aug 07 16:15:00 EDT 2026
- Release 0.14_9901 without changes.
0.14_9901 Sun Jun 14 20:27:47 EDT 2026
- Fix $c->change_session_id causing "row not found" error (RT#112679).
Thanks to Cees Hek for the original report, violapiratejunky for the
patch, and MYSOCIETY for additional information in RT#178695.
- Fix typo in source. RT#87248
[VPlan] Process simplifyRecipes in a worklist
This brings simplifyRecipes further in line with InstCombine, and asides from unlocking more simplifications it also helps avoid spurious test churn whenever passes are moved around simplifyRecipes.
For now just push the new recipe onto the worklist, not its users.
This uses a post order traversal so we maintain the same simplification order as before.
I've gone through and checked every simplification we do is a canonicalisation that converges, and I checked on llvm-test-suite + SPEC CPU 2017 in various configurations that we don't hit any cycles.
[VPlan] Append recipes created via builder to worklist
The previous PR appended the top most created recipe to the worklist, and this PR extends it to any other nested recipes that were created, similar to InstCombine.
This removes the header mask in a good few more places on RISC-V as measured on SPEC CPU 2017, e.g. for the following loop:
```c
long f(const int *p, const int *q, long n) {
long a = 0, b = 0;
for (long i = 0;; i++) {
if (p[i] && q[i]) { a += i; b += i; }
if (i + 1 == n) break;
}
return a + b;
}
```
Before:
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