[SelectionDAG] Remove dead functions and declarations (NFC) (#223318)
DAGTypeLegalizer::WidenVecOp_ExpOp: Added on April 26, 2023 in commit
eece6ba283bd763e6d7109ae9e155e81cfee0651 without a definition or any
callers.
ScheduleDAGRRList::AddPred: The last uses were removed on April 17, 2019
in commit 258a425c69f0f611ae237ad507252ad18048d2ab when callers were
switched to AddPredQueued.
RegsForValue::append: The last use was removed on January 18, 2019 in
commit 0a45bf0e558e93205a514c856d543fd667099496 when inline asm output
handling was refactored.
Assisted-by: Antigravity
[lldb] Fix batched breakpoint step-over mock (#223000)
This PR fixes the test that printed an `UnexpectedPacketException`
because its mock GDB server did not handle LLDB’s final continue packet.
It adds a normal exit response for that packet and verifies that the
process exits successfully with status zero.
Before:
```
An exception happened when receiving the response from the gdb server. Closing the client...
Traceback (most recent call last):
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
694, in run
self._receive(data)
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
714, in _receive
self._handlePacket(packet)
File "/home/barsolo/llvm-sand/external/llvm-project/lldb/packages/Python/lldbsuite/test/gdbclientutils.py", line
807, in _handlePacket
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[mlir][LLVM] Use a disjoint scope domain when inlining noalias
This matches recent changes to the LLVM inliner.
AI disclosure: Claude wrote the code, I wrote the commit message and
have done initial review.
[mlir][LLVM] Add disjointScopes to AliasScopeDomainAttr
This also updates the MLIR-side inliner to clone disjoint domains
while cloning alias scopes, matching changes to LLVM.
AI disclosure: Claude wrote the code, I wrote the commit message and
looked at the code.
[AMDGPU] Use a disjoint scope domain for merged LDS structs
When lowering LDS values, all the values are mutually disjoint, so we
can use the newly-added disjoint scopes feature to simplify the IR.
AI disclosure: Claude wrote this and I reviewed it and wrote the
commit message
[AMDGPU] Use a disjoint scope domain for noalias kernel arguments
All noalias arguments of a kernel are disjoint with each other, so we
can use a disjoint scope to save on metadata construction.
AI disclosure: Claude wrote this, I looked at it and wrote this
message.
[Inliner] Use a disjoint scope domain for noalias arguments
InlineFunction creates alias.scope/noalias metadata to represent the
set of `noalias` arguments to a function. We don't need the `!noalias`
now that we have the ability to use disjoint scopes, saving us IR size
and metadata bloat.
TODO move these to a previous commit.
Also changes InstCombine to not drop the experimental.noalias.scope.decl
for disjoint scopes even if they're not mentioned in a `!noalias`, but
do still delete them if they're not used.
[IR] Add alias scope domains with disjoint scopes
See RFC at
https://discourse.llvm.org/t/rfc-disjoint-scope-alias-scope-noalias-domains/91537
This commit adds support for declaring an alias scope domain disjoint.
Disjoint domains are ones where each scope is implicitly `!noalias`
with each other scope in the domain. This is represented by adding an
`i1` into the scope's domain as the second argument, with `i1 true`
representing disjoint scopes and `i1 false` representing the old
non-disjoint behavior. AutoUpgrade mechanisms have been added to add
in the missing `i1 false` to existing metadata.
This commit updates alias analysis to know about disjoint scopes and
updates the function cloner to also clone the alias domain if it's
disjoint (since, as a herd of LLMs discovered, you don't want the old
IR to be noalias with a clone of itself).
Commits to migrate passes to use disjoint scopes where that's an
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[SPIR-V] Emit extra DebugExpression ops under NonSemantic.Shader.DebugInfo.200
Map DWARF ops beyond Fragment only when -spirv-nonsemantic-debug-info-version=200.
[libc][bazel] Expose public inline memory headers and generic/builtin.h in string_memory_utils (#223439)
Following commit 041300fa05151b3819478f33daa4384922b4b74e (#192079),
`libc/src/__support/FPUtil/aarch64/fenv_darwin_impl.h` includes
`src/string/memory_utils/inline_memcpy.h`.
In the Bazel overlay, `string_memory_utils` declared inline memory
dispatcher headers under `textual_hdrs` rather than `hdrs`, preventing
transitive consumers from accessing them. Additionally,
`src/string/memory_utils/generic/builtin.h` was missing from
`string_memory_utils`.
This patch:
- Moves public inline memory headers from `textual_hdrs` to `hdrs` in
`string_memory_utils`:
- `src/string/memory_utils/inline_bcmp.h`
- `src/string/memory_utils/inline_bzero.h`
- `src/string/memory_utils/inline_memcmp.h`
- `src/string/memory_utils/inline_memcpy.h`
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[SPIR-V] Add -spirv-nonsemantic-debug-info-version to select the NSDI set
The backend hardcoded NonSemantic.Shader.DebugInfo.100 as its debug-info
ext-inst set. Add a flag selecting .100 (the default) or .200.
[AMDGPU] Optimize i64 uitofp for unsigned byte values
Use v_cvt_f32_ubyte0 when the i64 source is known to fit in an unsigned
byte.
For example:
uitofp (and i64 %x, 255) to float
This avoids the generic i64 to f32 expansion.
[AMDGPU] Add gfx1310 coverage to the bf16 transcendental tests (#223054)
57a9c4f939e5 made codegen emit the VOP3 encoding with op_sel[0] set when
a bf16 inline constant reaches one of the single-source VOP1 bf16
opcodes, because the hardware generates the constant in the high half of
the corresponding fp32 inline constant.
GFX1310 has the same FeatureBF16InlineConstFromUpperFP32 behaviour.
Mirror the enabled gfx1250 SelectionDAG RUN lines with gfx1310 ones so
the workaround is covered there too. Test-only change, no functional
change.
Assisted-by: Claude Code:claude-opus-5[1m]
[flang] Promote scalar slots reached through fir.convert and fir.declare (#219314)
Neither `fir.declare` nor `fir.convert` implements
`PromotableAliaserInterface`, so mem2reg does not see accesses made
through them as touching the slot behind. A cast anywhere in the chain
blocks promotion outright, even when it only changes the flavor of a
reference to the same scalar. So a scalar slot reached as `memref.alloca
-> fir.convert -> fir.declare -> fir.convert -> store/load` stays in
memory today.
This patch implements `PromotableAliaserInterface` for both operations.
mem2reg collects defining blocks from the alias map, so writes through a
`fir.declare` are now seen and the single-block restriction from
https://github.com/llvm/llvm-project/pull/182933 is no longer needed. An
operation reports an alias only when it carries the pointee through
unchanged, so that the default value projections of the interface apply;
for a `fir.convert` that limits it to a reference or a rank-0 memref of
a simple scalar with an identity layout and no memory space, and never
when either side is volatile.
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