[MLIR] Fix -Wunused-template (#221480)
This warning was enabled by default for clang 23 (although reverted in
23.1.1). Given someone might enable it in the future and the cleanup
seemed nice, we should just do it.
This was done primarily by removing static from templates in headers and
then deleting any unused templates in translation units.
mailmap: update entry for Jens Axboe
I recently changed jobs, let's update the .mailmap entry so that patches
are attributed to the right (current) company.
Signed-off-by: Jens Axboe <axboe at kernel.dk>
Signed-off-by: Linus Torvalds <torvalds at linux-foundation.org>
[MLIR][CMake] Remove aggregate generated-header ordering
Remove the broad mlir-headers prerequisites now that direct links and
HEADER_LIBS relationships provide generated-header ordering.
Keep own generators and intentional source-generation dependencies explicit.
Document migration options for downstream projects that relied on aggregate
ordering.
Assisted-by: Codex
Assisted-by: Claude Code
Co-Authored-By: Claude Fable 5.1 <noreply at anthropic.com>
[CMake] Propagate generated-header prerequisites through link dependencies
The goal is to simplify and make more robust the handling of generated-header
(TableGen) dependencies. Today these dependencies are managed manually, which
is fragile: missing edges often surface only in parallel builds, and sometimes
in incremental builds.
Record each llvm_add_library DEPENDS list independently from the cumulative
LLVM_COMMON_DEPENDS value, and mark public TableGen targets as generated-header
prerequisites. A deferred traversal follows every direct non-INTERFACE link and
transitive link interface, resolves aliases, and conservatively extracts target
candidates from generator expressions.
Represent generated-header prerequisites with internal INTERFACE libraries.
Let CMake propagate their utility dependencies through the header graph, and
reuse each provider's interface to handle cycles without computing closures.
Disabled generator-expression arms may generate extra headers, but cannot
introduce a provider library or object cycle.
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[MLIR][CMake] Add HEADER_LIBS and document CMake infrastructure
Add HEADER_LIBS as a flat list of literal library targets for generated headers
included without a link relationship. Resolve aliases and forward references,
accept imported libraries as already generated, follow nested HEADER_LIBS and
link interfaces, and reject missing, executable, utility, or generator-
expression entries with configure-time diagnostics. Represent header-only
edges in the common internal INTERFACE graph, including cyclic relationships.
Record links added by mlir_target_link_libraries for the same deferred ordering.
Add explicit, commented HEADER_LIBS edges for every audited header-only include
that is not covered by mlir-generic-headers, and keep this facility a rare
layering escape hatch.
Document dialects, interfaces, passes, PDLL, generated documentation, library
visibility, C API aggregation, tools, exports, standalone consumers, and the
generated-file model. Add a CMake fixture covering cycles, aliases, conditions,
LINK_ONLY, imported and ignored items, post-hoc links, and invalid providers.
Build each consumer independently from a clean state to verify transitive
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[AArch64] Form CCMP for CBB and CBH
AArch64ConditionalCompares forms CMP/CCMP chains to transform patterns
such as
Head Head
/ | CmpBB
/ | / |
| CmpBB => / |
| / | Tail |
| / | | |
Tail | | |
| | | |
... ... ... ...
where Head is terminated by a conditional branch and CmpBB contains
a cmp + conditional branch.
We usually try to split any fused conditional branches to be able to
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[mlir][OpenACC] Restrict implicit data to compute constructs (#222759)
acc.kernel_environment contains host-side preparation around an outlined
compute region; it is not itself an OpenACC compute construct. Treating
all of its live-ins as implicit device mappings can map
compiler-generated host operations and assign them kernels-style copy
semantics.
Limit ACCImplicitData to parallel, kernels, and serial. In particular,
do not process kernel_environment or the lowered compute_region form.
Assisted-by: Cursor
[mlir][OpenACC] Preserve reduction mappings during materialization. (#222189)
Create or reuse structured reduction mappings before compute-construct
reduction recipes are consumed. Materialize initialization and
combination against the mapped value while leaving nested loop
reductions unchanged.
Assisted-by: Cursor
[flang][OpenACC] Allocate bufferized recipe descriptors in device memory (#223028)
ACCRecipeBufferization places the descriptor of a bufferized recipe
clause next to the variable it holds. When the clause sits inside a
compute construct and the variable is already produced by a data entry
operation, that memory is host memory no data clause maps, so device
code reading the descriptor through it gets a host address.
Place the descriptor in the construct region in that case. The region is
device memory and needs no data clause of its own, and the mapped
variable is a legal live-in since a data entry operation produces it.
The region entry block is used rather than the clause operation so that
a clause on a nested loop does not allocate on every iteration.
Assisted-by: Cursor
[orc-rt] Refactor RTTI for cross-library support, add C API (#222946)
Identify types by name rather than by the address of a per-type ID
object, so that a type's identity survives crossing a library boundary:
an object may be constructed by one library and have its type queried by
another, each with its own copy of orc-rt, where per-type addresses
would not agree. Participating classes now declare an RTTIName, which
must be unique across the process.
RTTIRoot records which library produced each value, so same-library
queries still resolve by pointer comparison, and only cross-library ones
fall back to strcmp.
Adds orc-rt-c/support/RTTI.h to expose this to C.
ORC_RT_RTTI_PARTICIPANT and ORC_RT_C_RTTI_IMPL declare and define a
per-type cast entry point, reached via ORC_RT_DYNCAST, alongside
orc_rt_RTTIRoot_getTypeName for logging. This replaces the
orc_rt_Error_TypeId API (orc_rt_Error_getTypeId,
orc_rt_StringError_getTypeId), which exposed ID addresses and so could
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[mlir][PDLInterp] Stop using Operation::getAttrs (NFC) (#223088)
Print the discardable dictionary after the inherent fields handled by
the custom assembly format.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Backout: 18149 ld(1) should support -zsysroot
Reviewed by: Andy Fiddaman <illumos at fiddaman.net>
Approved by: Robert Mustacchi <rm+illumos at fingolfin.org>
[flang][OpenACC] Do not emit declare ctor/dtor for module PARAMETER variables (#222993)
A module PARAMETER in !$acc declare is already emitted as an initialized
device global. A host ctor/dtor would still register that same symbol
with the runtime. Skip the registration pair and keep acc.declare so the
constant is
still emitted as an initialized global in the GPU module.
[mlir][SMT] Stop using Operation::getAttrs (NFC) (#223086)
Print only discardable attributes after inherent fields are handled by
the custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
[Clang] Prototype explicit ASTContext threading through hot queries
Pass the owning AST context through selected declaration, constructor,
override, inheritance, template lookup, and CodeGen query chains.
Retain fallback APIs for callers without an available context, and reuse
the context locally within addedMember without adding AST storage.
This is an experimental alternative to the inline ASTContext lookup
change, based on its relationship-cache parent. Some overloads duplicate
implementation bodies and need consolidation before a production proposal.
Five paired runs on each MLIR source file reduced retired instructions by
1.59% on RegisterAllDialects.cpp and 0.86% on NVVMDialect.cpp. Median wall
time improved by 0.88% and 0.45%, respectively. This recovers about 72% and
58% of the inline variant instruction reduction, not its full performance.
Validation: Clang and AllClangUnitTests rebuilt; 46 focused unit tests and
3,076 Sema regression tests passed. Representative objects match the parent
and inline variants after removing only the compiler identification section.
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[flang] Delete a trailing CYCLE that is the last statement of its DO
A CycleStmt at the end of the body of its own DoConstruct is a no-op:
branching to the EndDoStmt and falling through to it are the same thing.
Branch analysis nonetheless marks the DoConstruct unstructured, which
costs the structured form of the loop and the induction variable
semantics that later passes rely on.
Delete such a CycleStmt in the PFT. The statement
must be unlabeled, so that it is not itself a branch target, and it must
name either no construct or this one.
[mlir] Stop using Operation::getAttrs in dialect utilities (NFC) (#223081)
Copy operation properties and discardable attributes separately.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Merge tag 'regulator-fix-v7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator fixes from Mark Brown:
"One fix for pf1550 which checked for errors on multiple regulators
but always notified via one of them regardless of which one had the
problem, plus one device ID addition in the fan53555 DT bindings"
* tag 'regulator-fix-v7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: pf1550: fix which regulator is notified
regulator: dt-bindings: fan53555: add tcs,tcs4526
[mlir][Toy] Stop using Operation::getAttrs (NFC) (#223082)
Print only discardable attributes in Toy custom operation printers.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
[mlir][Shape] Stop using Operation::getAttrs in printers (NFC) (#223083)
Print only discardable attributes after inherent fields are handled by
the custom assembly formats.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
[flang] Do not hoist fir.field_index out of loops (#222891)
Lowering a consumer of a !fir.field value inspects its defining
operation: for a record whose layout is known at compile time the field
becomes an LLVM GEP struct index, which must be a constant, and
otherwise the `field` attribute is read off the defining op. A field
value therefore may not be a block argument.
LICM broke that. fir.field_index is Pure and takes no operands, so it is
trivially loop-invariant and was hoisted out of the loop. Lowering emits
one inside each arm of a construct -- for example the CASEs of a SELECT
CASE that each pass a different component of the same derived type as an
actual argument -- so hoisting them left those arms as
otherwise-identical blocks differing only in that operand. Block merging
then merged them and threaded the field through a new block argument,
and codegen aborted with "must be a constant".
Leave producers of a !fir.field where they are. The arms then differ by
an operation rather than by an operand, so they are no longer merge
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[mlir][Cpp] Stop using Operation::getAttrs (NFC) (#223080)
Only discardable attributes on multi-result func.return operations are
C++ tuple arguments; the operation has no inherent attributes relevant
to the translation.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
[AArch64] Form CCMP for CBB and CBH
AArch64ConditionalCompares forms CMP/CCMP chains to transform patterns
such as
Head Head
/ | CmpBB
/ | / |
| CmpBB => / |
| / | Tail |
| / | | |
Tail | | |
| | | |
... ... ... ...
where Head is terminated by a conditional branch and CmpBB contains
a cmp + conditional branch.
We usually try to split any fused conditional branches to be able to
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[flang][cuda] Back ALLOCATABLE components with managed memory under -gpu=mem:managed
Under -gpu=mem:managed, select the managed allocator index at the ALLOCATE site for ALLOCATABLE/POINTER components, reusing the branch #210149 added for -gpu=unified; the existing kDefaultAllocator test filters out the already-attributed entities.
Merge tag 'spi-fix-v7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fix from Mark Brown:
"New device ID for v7.3: update the DesignWare DT binding to say how to
describe the UltraRISC DP1000 instance of the controller"
* tag 'spi-fix-v7.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: dt-bindings: snps,dw-apb-ssi: Add compatible for UltraRISC DP1000 SoC
[BOLT] Fix -Wunused-template (#222439)
This was enabled by default in LLVM 23.1.0. It was disabled in LLVM
23.1.1, but it makes sense to fix the outstanding issues given they are
real.