[AMDGPU] Add custom lowering for E5M3 path for packed convert instructions through `convert.{to|from}.arbitrary.fp` (#218056)
Some packed convert instructions support producing FP8 floating output
in the E5M3 format by control through the CLAMP bit. Currently, we have
builtins and intrinsics that support that lowering.
This PR adds lowering through the newly added
`convert.{to|from}.arbitrary.fp` intrinsics.
[lldb] Canonicalize DW_OP_GNU_const_index to the generic type (#217262)
`DW_OP_GNU_const_index` reads a machine-address-sized constant from the
address table and pushes it as a generic value. The generic type has the
size of an address on the target, so on a 32-bit compilation unit the
pushed value should be a 32-bit scalar.
`DWARFUnit::ReadAddressFromDebugAddrSection` reads the correct number of
bytes, but the evaluator case pushed the result as `Scalar(value)`,
where
`value` is a 64-bit `lldb::addr_t`, leaving a 64-bit scalar on the stack
instead of canonicalizing to `8 * address_size` like the other
constant-pushing opcodes.
Use `to_generic`, as `DW_OP_addrx` / `DW_OP_GNU_addr_index` already do,
so the pushed value has the generic type's width.
Adds a `DW_OP_GNU_const_index_address_size` unit test asserting both the
wraparound of generic arithmetic at the 32-bit address size and the
[3 lines not shown]
pci: Expose a VF's owning PF to bus subclasses
ofw_pcibus now uses pci_iov_get_pf() to inherit PF locality for
VFs, but the accessor was inadvertently left in an uncommited ACPI
change. This breaks powerpc builds.
Expose the accessor from the PCI core and provide a stub when PCI_IOV
is omitted. Record VF ownership before pci_add_child() so child added
callbacks can safely query it, and remove the later redundant
assignment.
Fixes: f003e86335c9 ofw_pcibus: Inherit PF locality for SR-IOV VFs
MFC after: 2 weeks
Sponsored by: BBOX.io
[DirectX] Add support for heap resources to `DXILResourceMap` (#216454)
`DXILResourceMap` now handles a new `llvm.dx.resource.handlefromheap`
intrisics and adds the heap resources to the resource map.
A new member `HeapResourceID` has been added to `ResourceInfo` to
distinguish between heap resource instances created from different
indices. The `HeapResourceID` is unique for each heap index `Value*`, so
multiple handle creation calls using the same index `Value*` resolve to
the same resource.
Heap resources do not have register bindings, so the `Binding` member on
`ResourceInfo` is now optional.
All places that were expecting binding to exist are updated to handle
bindless heap resources. In most cases that means skipping them, such as
when generating DXIL resource metadata, creating PSV resource entries or
pretty-printing the resource table comment for the module disassembly
output.
[5 lines not shown]
[DAG] Remove trivial VP SDNodes. NFC
This removes the codegen parts of the trivial VP intrinsics. It's quite far reaching, but the general categories of code removed are:
- Removing definitions from VPIntrinsics.def
- Legalization and expansion code
- MatchContext used to match over both VP and non-VP nodes
- Some dead DAGCombines and folds in SelectionDAGBuilder
There are still more things to be cleaned up after this, e.g. removing more of the VPIntrinsic class hierarchy, removing ExpandVectorPredication/moving expansion into other places, removing MatchContext from SDPatternMatch
