FreeBSD/ports 2b9d76esecurity/vuxml/vuln 2026.xml

security/vuxml: Document xwayland vulnerabilities
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+29-0security/vuxml/vuln/2026.xml
+29-01 files

LLVM/project bdaeb7cclang/test/Sema attr-target.c

[NFC] Add precommit test for PR 208059 (#208259)

Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
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+2-0clang/test/Sema/attr-target.c
+2-01 files

LLVM/project f25f63dflang/test/Driver real-sum-reassociation.f90

Share real sum option checks

Assisted-by: Codex
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+11-13flang/test/Driver/real-sum-reassociation.f90
+11-131 files

LLVM/project a47be19llvm/test/Transforms/LoopVectorize simplify-reverse-reverse.ll

[VPlan] Add more tests for reverse simplification. NFC (#208255)
DeltaFile
+196-0llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll
+196-01 files

FreeBSD/ports cb5a0fcscience/siesta Makefile distinfo, science/siesta/files patch-cmake_SiestaFindPackage.cmake patch-External_Lua-Engine_CMakeLists.txt

science/siesta: update 4.1.5 → 5.4.2
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+41-18science/siesta/Makefile
+55-0science/siesta/files/patch-cmake_SiestaFindPackage.cmake
+23-3science/siesta/distinfo
+24-0science/siesta/files/patch-External_Lua-Engine_CMakeLists.txt
+22-0science/siesta/files/patch-External_Lua-Engine_flook_Makefile
+165-215 files

FreeBSD/ports d937e88science/plumed distinfo Makefile

science/plumed: update 2.10.0 → 2.10.1
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+3-3science/plumed/distinfo
+1-1science/plumed/Makefile
+2-0science/plumed/pkg-plist
+6-43 files

LLVM/project 0a015ccllvm/test/CodeGen/AMDGPU global-atomicrmw-fadd.ll atomicrmw_usub_sat.ll

[AMDGPU] Replace zext pattern from reg_sequence to cvt_u32_u16 (#208045)

Isel pattern putting imm inside reg_sequence create side effects when
register coalescer join these `copy` from imm
```
%1 = v_mov_b16_t16_e64 ...
%2.hi16 = copy %1
%2.lo16 = ....
...
%3.hi16 = copy %1
%3.lo16 = ....
....
%4.hi16 = copy %1
%4.lo16 = ....
```
to
```
%1 = v_mov_b16_t16_e64 ...
%2.hi16 = copy %1

    [9 lines not shown]
DeltaFile
+155-150llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
+124-106llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
+88-78llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+88-78llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+88-78llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+88-78llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+631-56846 files not shown
+1,512-1,37652 files

FreeNAS/freenas 233026esrc/middlewared/middlewared/api/v27_0_0 vm_device.py

Tighten VMNICPciAddress constraints
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+11-6src/middlewared/middlewared/api/v27_0_0/vm_device.py
+11-61 files

FreeBSD/ports ef5bcf1x11/xkbutils distinfo Makefile

x11/xkbutils: update: 1.0.6 -> 1.0.7

PR:             296587
Approved by:    x11 (arrowd, maintainer)

Sponsored by:   tipi.work
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+3-3x11/xkbutils/distinfo
+1-3x11/xkbutils/Makefile
+4-62 files

NetBSD/pkgsrc-wip 05ef5e3pam-pwdfile Makefile distinfo, pam-pwdfile/files _pam_macros.h

pam-pwdfile: update to 2.0
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+0-187pam-pwdfile/files/_pam_macros.h
+123-0pam-pwdfile/patches/patch-pam__pwdfile.c
+4-20pam-pwdfile/Makefile
+0-16pam-pwdfile/patches/patch-ab
+0-14pam-pwdfile/patches/patch-aa
+4-5pam-pwdfile/distinfo
+131-2422 files not shown
+132-2438 files

LLVM/project 940824dllvm/test/Assembler callbr.ll, llvm/test/CodeGen/AMDGPU callbr-intrinsics.ll

move tests
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+41-0llvm/test/Assembler/callbr.ll
+41-602 files

LLVM/project 0019a7cllvm/include/llvm/Analysis BranchProbabilityInfo.h, llvm/include/llvm/Support BranchProbability.h

[spr] initial version

Created using spr 1.3.8-wip
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+74-90llvm/lib/Analysis/BranchProbabilityInfo.cpp
+21-7llvm/include/llvm/Support/BranchProbability.h
+0-12llvm/lib/Support/BranchProbability.cpp
+2-3llvm/include/llvm/Analysis/BranchProbabilityInfo.h
+97-1124 files

LLVM/project e2d6498flang/include/flang/Optimizer/Transforms Passes.td, flang/lib/Optimizer/Transforms/CUDA CUFFunctionRewrite.cpp

[flang][cuda] Defer on_device() folding in host copies of OpenACC routines (#208125)

Add a `defer-acc-routines` option to `cuf-function-rewrite`. When set,
`on_device()` is not folded in the host copy of an OpenACC routine (has
`acc.routine_info`, not in a `gpu.module`), because that body is later
cloned into the device routine and would otherwise bake in the host
value (`.false.`). A later run folds each copy in its own context. Calls
already in a `gpu.module` are still folded.
DeltaFile
+63-0flang/test/Fir/CUDA/cuda-function-rewrite.mlir
+22-3flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
+7-0flang/include/flang/Optimizer/Transforms/Passes.td
+92-33 files

LLVM/project 02a7cd5llvm/lib/Target/BPF BPFMIPeephole.cpp

BPF: Remove unnecessary isReg check on phi operand (#208243)

These must be a register. This pass has quite a lot of
defensive code against invalid MIR that should be deleted.
DeltaFile
+0-3llvm/lib/Target/BPF/BPFMIPeephole.cpp
+0-31 files

LLVM/project 9065f7dllvm/include/llvm/ADT FunctionExtras.h

[spr] initial version

Created using spr 1.3.8-wip
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+70-179llvm/include/llvm/ADT/FunctionExtras.h
+70-1791 files

LLVM/project 33ef532mlir/lib/Dialect/Linalg/Transforms Vectorization.cpp, mlir/test/Dialect/Linalg/vectorization extract.mlir

[mlir][linalg] Fix mask rank for masked contiguous `tensor.extract` (#206207)

### Summary

Note: This fix was made mostly by Claude based on a failure case in
IREE. It addresses issue
https://github.com/llvm/llvm-project/issues/206209

When `vectorizeTensorExtract` lowers a `tensor.extract` recognized as a
*contiguous load*, it builds a `vector.transfer_read` whose permutation
map broadcasts the leading iteration dims and only reads the trailing
`min(dstRank, srcRank)` dims of the source. Until now this read was
returned unmasked and masked later by the generic path, which applies a
**full iteration-space identity mask**. When the source rank is smaller
than the loop nest, that mask is over-ranked relative to the
(rank-reduced) read — e.g. a `vector<1x4xi1>` mask on a read whose
inferred mask type is `vector<4xi1>` — and the op fails verification:

```

    [65 lines not shown]
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+49-0mlir/test/Dialect/Linalg/vectorization/extract.mlir
+14-2mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+63-22 files

OpenBSD/ports U7z86zpmisc/open62541 distinfo Makefile

   update open62541 to 1.3.18
VersionDeltaFile
1.16+2-2misc/open62541/distinfo
1.38+1-2misc/open62541/Makefile
+3-42 files

LLVM/project df6b80dclang/lib/CodeGen CGOpenMPRuntimeGPU.cpp, offload/plugins-nextgen/common/include PluginInterface.h

[offload][OpenMP] Improve cross-team reduction grid selection

The default cross-team reduction algorithm benefits from larger and
fewer teams. Implement that by using 2 x the default number of threads
and 1/2 x the default number of teams for reduction kernels.  This
doesn't change the default total number of threads, it just
redistributes them.

This is a first, rather simple heuristic, derived from (a subset of)
what AOMP does.
The performance benefits I observed for the reduction tests in
https://github.com/ro-i/xteam-test on a gfx942
(c71339705091500f731e2a39f247d2660bacbdce) are up to a few percent, with
no regressions.

Claude assisted with this patch.
DeltaFile
+22-4offload/plugins-nextgen/common/src/PluginInterface.cpp
+22-0clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+5-0offload/plugins-nextgen/common/include/PluginInterface.h
+49-43 files

LLVM/project 9df4aedflang/lib/Optimizer/Transforms StackArrays.cpp, flang/test/Transforms stack-arrays.fir

[flang] add some missing stackrestore with -fstack-arrays (#208161)

In the StackArray pass that moves array temporaries from the heap to the
stack under -fstack-arrays, when visiting FreeMemOp to insert
stackrestore, the code was not unwrapping converts as done in other
parts of the code leading to the allocation conversion and stacksave
insertion to happen without the emission of the stackrestore.

Reuse the same utility as in the rest of the pass to get consistent
behavior and fix the memory leak.
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+30-0flang/test/Transforms/stack-arrays.fir
+5-11flang/lib/Optimizer/Transforms/StackArrays.cpp
+35-112 files

FreeNAS/freenas 6ccea12src/middlewared/middlewared/plugins replication.py, src/middlewared/middlewared/plugins/replication crud.py __init__.py

Replication mypy
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+0-835src/middlewared/middlewared/plugins/replication.py
+650-0src/middlewared/middlewared/plugins/replication/crud.py
+246-0src/middlewared/middlewared/plugins/replication/__init__.py
+193-0src/middlewared/middlewared/plugins/replication/methods.py
+63-0src/middlewared/middlewared/plugins/replication/attachment.py
+62-0src/middlewared/middlewared/plugins/replication/config.py
+1,214-83517 files not shown
+1,286-98123 files

FreeBSD/src ed7e0ebusr.sbin/bhyve snapshot.c bhyve_config.5, usr.sbin/bhyve/amd64 bhyverun_machdep.c

bhyve: allow overriding snapshot socket directory

By default bhyve(8) creates a snapshot socket in
"/var/run/bhyve/" (BHYVE_RUN_DIR).
As this is a system directory not writable by users,
this does not work when bhyve(8) is being started
as a non-root user.

Address that by allowing to override this directory.
In bhyve(8) it is done by setting 'rundir' option
with '-o rundir=<path>'.

In bhyvectl(8) it is done with '--rundir=<path>'.

MFC after:              1 month
Reviewed by:            bcr (manpages), bnovkov
Sponsored by:           The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D57494
DeltaFile
+25-7usr.sbin/bhyvectl/bhyvectl.c
+10-4usr.sbin/bhyve/snapshot.c
+8-1usr.sbin/bhyve/bhyve_config.5
+7-1usr.sbin/bhyvectl/bhyvectl.8
+6-0usr.sbin/bhyve/amd64/bhyverun_machdep.c
+1-1usr.sbin/bhyve/snapshot.h
+57-141 files not shown
+58-157 files

NetBSD/pkgsrc-wip 59a6804carburetta TODO distinfo, carburetta/patches patch-Makefile

carburetta: Update to 0.8.28

0.8.28 - 2026-01-11

 - Will now emit #line so C/C++ compilation errors on generated code
   will be located at the corresponding snippet code in the .cbrt input
   file, where appropatiate. Use --nolinedir to disable.

 - Can now emit a symbol_names[] table for all ordinal constants, this
   can be useful when writing code that uses Carburetta's internal
   structures more dynamically and you wish to emit debug information.
   Only generated when --sym-names is specified.

 - Instead of specifying a filename, you can now pass - (a dash) for
   the filename and the grammar input will be read from stdin.

0.8.25 - 2025-04-14

 - New 'visit' feature. When specifying either %visit or %visit_params

    [87 lines not shown]
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+0-66carburetta/patches/patch-Makefile
+7-1carburetta/TODO
+3-4carburetta/distinfo
+1-1carburetta/Makefile
+11-724 files

FreeNAS/freenas 1ef66eesrc/middlewared/middlewared/api/v27_0_0 vm_device.py

Tighten VMNICPciAddress constraints
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+5-6src/middlewared/middlewared/api/v27_0_0/vm_device.py
+5-61 files

FreeNAS/freenas 163b8bbsrc/middlewared/middlewared/plugins/vm factory.py

Add NIC pci_address slot validation

Override VMNICDelegate.validate_middleware() to enforce machine-topology slot
rules using pci_slot_error_for_machine(): PCIe machines (q35 / aarch64 virt)
require slot == 0 on point-to-point ports; i440fx PCI bridges reserve slot 0
for the SHPC controller so usable slots start at 1. Machine type is read from
the VM instance, which is already in hand at create/update time.
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+19-0src/middlewared/middlewared/plugins/vm/factory.py
+19-01 files

FreeNAS/freenas 87fa47asrc/middlewared/middlewared/api/v27_0_0 vm_device.py, src/middlewared/middlewared/plugins/vm vm_device_crud.py factory.py

Add ISCSI_DISK device type to VM API and PCI slot conflict detection

Adds VMISCSIDiskDevice and VMISCSIDiskTarget to the v27 API model,
wires the ISCSI_DISK dtype through factory_utils, and calls
check_pci_slot_conflicts() from _validate_device() so PCI slot
collisions are caught at vm.device.create/update time rather than
failing silently at VM start.
DeltaFile
+38-1src/middlewared/middlewared/api/v27_0_0/vm_device.py
+28-0src/middlewared/middlewared/plugins/vm/vm_device_crud.py
+16-0src/middlewared/middlewared/utils/libvirt/factory_utils.py
+11-0src/middlewared/middlewared/plugins/vm/factory.py
+93-14 files

LLVM/project b634fffllvm/lib/Target/AMDGPU AMDGPUCombinerHelper.cpp AMDGPUCombine.td, llvm/test/CodeGen/AMDGPU fptrunc.ll

[AMDGPU] SDAG and GISel support for folding fabs into fp_round source modifiers (#204861)
DeltaFile
+248-544llvm/test/CodeGen/AMDGPU/fptrunc.ll
+23-0llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
+12-2llvm/lib/Target/AMDGPU/AMDGPUCombine.td
+10-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+3-0llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.h
+296-5465 files

LLVM/project b4503acllvm/lib/Transforms/Scalar StructurizeCFG.cpp, llvm/test/CodeGen/AMDGPU infinite-loop.ll si-unify-exit-multiple-unreachables.ll

fix tests after rebase; improve unreachable testing
DeltaFile
+124-40llvm/test/CodeGen/AMDGPU/infinite-loop.ll
+110-38llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
+62-31llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
+9-5llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
+305-1144 files

LLVM/project c9e2c30clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 v8.2a-fp16-intrinsics.c

[CIR][AArc64] Add lowering for fp16 intrinsics (step + rounding) (#207511)

This PR adds lowering for the following intrinsic groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-reciprocal-step

It also adds FP16 tests for these intrinsics (implemented in #195021
without tests):
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-rounding-1

It also moves the corresponding tests from:

* clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c

to:
* clang/test/CodeGen/AArch64/neon/fullfp16.c

The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
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+86-0clang/test/CodeGen/AArch64/neon/fullfp16.c
+0-56clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
+10-3clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+96-593 files

NetBSD/pkgsrc rQiRUaxdoc CHANGES-2026

   doc: Updated games/ajbsp to 1.05
VersionDeltaFile
1.4352+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 5kLHll6games/ajbsp Makefile distinfo, games/ajbsp/patches patch-Makefile

   games/ajbsp: Update to 1.05

   * support UDMF maps, creating XGL3 nodes
   * better ability to embed as a library
   * lots of code improvements, require C++11 now
   * a facility for source ports: XWA files
VersionDeltaFile
1.3+12-35games/ajbsp/patches/patch-Makefile
1.4+7-5games/ajbsp/Makefile
1.5+5-5games/ajbsp/distinfo
+24-453 files