[asan] Fix asan_new_delete.cpp C++ header resolution under -nostdinc++ (#202816)
The COMPILER_RT_ASAN_ENABLE_EXCEPTIONS gate in asan/CMakeLists.txt
enables -fexceptions on the C++ slice (RTAsan_cxx /
RTAsan_dynamic_cxx — asan_new_delete.cpp) and tries to expose C++
standard headers to that TU (for forthcoming std::bad_alloc support)
by stripping -nostdinc++ from its cflags. The strip works for native
standalone builds but is wrong for cross builds: the host C++ headers
aren't valid for the target.
Split the C++-slice flag handling into two paths inside the existing
EXCEPTIONS gate:
* In-tree libc++ available (TARGET cxx-headers OR HAVE_LIBCXX):
keep -nostdinc++, append ${COMPILER_RT_CXX_CFLAGS} (a generator
expression that expands to "-isystem <prepared cxx-headers dir>"),
and add cxx-headers to DEPS so the header tree is staged before
the compile. Mirrors the pattern in orc / fuzzer / memprof /
tsan / xray.
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[CIR] Fix inline asm operand-attr indexing (#202790)
Inline asm with a register operand ordered before a memory operand, e.g. `asm("" :: "r"(i), "m"(g))`, crashes CIRGen at the `"pointer type expected"` / `"element type differs from pointee type"` assertions in `emitAsmStmt`.
The element-type-attribute loop walks `argElemTypes` with a counter that only advances on entries that have an element type, but uses that counter to index the parallel `args` array. The two arrays are the same length (every operand pushes to both, and `assert(args.size() == operandAttrs.size())` enforces it), so the matching value for `argElemTypes[k]` is `args[k]`. As soon as a register operand (null element type) precedes a memory operand (non-null), the counter desyncs and reads the wrong operand — a non-pointer, or a pointer with the wrong pointee.
The fix indexes `args` positionally with `llvm::enumerate`, matching classic CodeGen in `CGStmt.cpp`, which iterates `llvm::enumerate(ArgElemTypes)` and attaches the element-type attribute at `Pair.index()`. New `t35` in `inline-asm.c` covers the register-before-memory ordering and checks the lowered IR against classic codegen.
[flang][OpenMP] Remove CheckSymbolName{,s}, NFC (#202811)
These functions checked if each OmpObject had a symbol, and emitted a
diagnostic if not. Name not having a symbol is an internal compiler
error (which will be detected separately), and not something actionable
for the user.
Remove these functions since they don't serve any purpose anymore.
[X86] combineTargetShuffle - fold vpermv3(widen(x),mask,widen(y)) -> vpermv(widen(concat(x,y)),mask') (#203031)
We already handle the case where the src vectors were half size, but we
can generalize this to widening from xmm to zmm as well - mainly to help
non-VLX builds
A couple of codesize increases in non-VLX builds - mostly from
additional asm / kill comments, but also due to a couple of poor folds
in combineConcatVectorOps that need further yak shaving.
[AMDGPU][GISel] Handle G_AMDGPU_COPY_VCC_SCC in isLaneMaskFromSameBlock (#202923)
This avoids generating some redundant ANDs with exec.
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Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
lang/gnat1?: gettext is always required
Ignore the portlint warning and always depends on gettext.
(See PR 277508)
PR: 295966
Reported by: Robert William Vesterman
clang/AMDGPU: Pass BoundArch through device libs handling
Pre-work to consolidate target identification for future target
option bug fixes. Also requires updating flang to match recent
clang changes.
Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
