membar_ops(3): Clarify language about membar_datadep_consumer.
I must have deleted a sentence about the temptation to pair it with
membar_producer in some earlier revision; let's write a new such
sentence.
[libc] clean up wchar file deps and includes (#198648)
There were a couple comments left on the wchar file series after I'd
already merged some. This PR should apply those changes to the rest of
the wchar file functions.
Assisted-by: Automated tooling, human reviewed.
(converters/R-base64enc) Updated 0.1.3 to 0.1.6, make test not passed yet
0.1-6 2026-02-02
o updated URL in dataURI documentation
0.1-5 2026-02-01
o remove SETLENGTH in R 4.5.0+ to be API-compliant
o add strict decoding mode, enabled with strict=TRUE (#5)
0.1-4 2022-03-16
o add support for long vectors. Note that R does not
support strings longer than 2^31-1 bytes, so when
encoding long vectors a line limit has to be specified.
o add compatibility for R versions without XLENGTH()
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[LLVM][ARM] Add native ct.select support for ARM32 and Thumb
This patch implements architecture-specific lowering for ct.select on ARM
(both ARM32 and Thumb modes) using conditional move instructions and
bitwise operations for constant-time selection.
Implementation details:
- Uses pseudo-instructions that are expanded Post-RA to bitwise operations
- Post-RA expansion in ARMBaseInstrInfo for BUNDLE pseudo-instructions
- Handles scalar integer types, floating-point, and half-precision types
- Handles vector types with NEON when available
- Support for both ARM and Thumb instruction sets (Thumb1 and Thumb2)
- Special handling for Thumb1 which lacks conditional execution
- Comprehensive test coverage including half-precision and vectors
The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- ISelDAGToDAG: Selection of appropriate pseudo-instructions
- BaseInstrInfo: Post-RA expansion of BUNDLE to bitwise instruction sequences
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[X86] Manage atomic store of fp -> int promotion in DAG (#197166)
When lowering `atomic store <1 x T>` vector types with floats (i.e.
during scalarization in the selection DAG), selection can fail since
this pattern is unsupported. To support this, floats can be casted to
an integer type of the same size.
Store-side counterpart to #148895. Stacked on top of #197165; and below
of #197618.
Reland [VectorCombine] foldShuffleChainsToReduce - add support for partial vector reductions (#197659)
Reland of #195119, which was reverted in 2b26355 due to:
1. An assertion failure on AArch64 where
`getShuffleCost(SK_ExtractSubvector)` was called without the `SubTp`
parameter.
2. A miscompilation on non-power-of-2 vector sizes where parity-based
shuffle masks cause lane duplication in the reduction tree.
Fixes:
- Pass `ReduceVecTy` as `SubTp` to `getShuffleCost`.
- Restrict partial reductions to power-of-2 vector sizes.
---
Extend foldShuffleChainsToReduce to recognize partial reduction patterns
where
only a subvector of the full vector is being reduced.
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csh(1): Fix further warnings and bump WARNS from 1 to 6.
* Remove unneeded malloc_usable_size() prototype (there is one
in <stdlib.h>).
* ut_host is a member of struct utmpx, too, so expand the #ifdef for
the prototypes for utmphost() and utmphostsize() accordingly.
