[libc] Add Kushal Pal(quic-k) as the maintainer for Hexagon (#232009)
@michaelrj-google @androm3da
Hexagon port for libc merged
https://github.com/llvm/llvm-project/pull/217528
Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
Co-authored-by: Brian Cain <brian.cain at oss.qualcomm.com>
[ProfileSummaryInfo] Honor the hot function attribute in hotness queries (#232085)
LangRef documents the `hot` function attribute as taking precedence over
profile information and acting as a manual alternative to PGO hotness
data when training inputs lack coverage for hot functions. However,
ProfileSummaryInfo only checked `Attribute::Cold` (in
isFunctionEntryCold) and never consulted `Attribute::Hot`. As a result,
functions marked `hot` that had zero entry counts in PGO profiles (for
example, newly introduced functions not executed during profile
collection) were still treated as cold by PSI queries, causing passes
such as TailCallElim and PGOForceFunctionAttrs to apply cold-function
heuristics.
Check `Attribute::Hot` in `isFunctionEntryHot`,
`isFunctionHotInCallGraph`, `isFunctionColdInCallGraph`, and
`isFunctionEntryCold` before checking `hasProfileSummary()` or
`Attribute::Cold`. This matches the precedence in CodeGenPrepare and
ensures the attribute is honored both with and without profile data.
Assisted-by: Gemini
[X86] Expand FCANONICALIZE for v8f16/v16f16 without AVX512F (#232129)
Without AVX512F, `llvm.canonicalize` on `<8 x half>` or `<16 x half>`
made llc abort with "Cannot select: v8f16 = fcanonicalize". That covers
default x86-64, `-mattr=+sse4.1` and haswell. v8f16 is legal from SSE2
and v16f16 from AVX, but the FCANONICALIZE Expand for these two types
was only set in the AVX512F block. Below AVX512F the node stayed Legal
and had no isel pattern.
The first commit is the patch I offered in the issue. It moves the two
Expand actions to where the types become legal: the SSE2 block for v8f16
and the AVX block for v16f16. Without F16C they then use the generic
expansion, which multiplies each element by 1.0 in f32, as v32f16
already does.
The second commit, from review here, adds FCANONICALIZE to the F16C
promote-to-f32 list next to FADD, FSUB, FMUL and FDIV. With F16C and
without AVX512FP16, v8f16 and v16f16 are then canonicalized as f32
vectors (vcvtph2ps, vmulps, vcvtps2ph) instead of element by element.
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[RISCV][GlobalISel] Use Zfhmin for G_FPTRUNC to f16 (#231370)
Zfhmin includes `FCVT.H.S` and (with D) `FCVT.H.D`, so `G_FPTRUNC` from
f32/f64 to f16 only requires Zfhmin.
Use libcalls when the required extensions are unavailable. This also
completes legalization of half-precision `G_FREM`.
re-import emulators/wine
ok brynet@
DESCR:
Wine is a compatibility layer for running Windows applications on Unix.
It translates Windows API calls into native system calls.
This port includes experimental OpenBSD amd64 from
https://github.com/NethIafin/wine/tree/openbsd-master.
Only 64-bit Windows applications are supported.
[RISCV][P-ext] Restructure scalar tests to increase testing and reduce duplicaton. NFC (#232613)
Rename rv32p.ll to rvp-scalar.ll and add RV64 RUN line. This improves
coverage of some operations like i8/i16 saturating adds/subs that don't
have direct P extension instructions but might use some P instructions
in their lowering like sati. Or it may show cases where we should insert
a scalar into a packed instruction to reduce the code.
Rename rv64p.ll to rvp-scalar-rv64.ll and remove anything thats in
rvp-scalar.ll.
Revert "[SimplifyCFG] Mark branch weights unknown in masked switch to lookup" (#233325)
Reverts llvm/llvm-project#233321
Breaks the profcheck bot and needs more investigation.
Fix overflow in hardware accelerated AES-GMAC crypto.
On amd64 using AES-NI or on octeon with crypto coprocessor, an
unauthenticated ESP packet that matches a configured AES-GMAC
security association could copy almost 64 KB of attacker-controlled
data into a 4096-byte kernel heap buffer.
from Acts1631; from bluhm@; OK visa@ hshoexer@
this is errata/8.0/003_aesgmac.patch.sig
Fix overflow in hardware accelerated AES-GMAC crypto.
On amd64 using AES-NI or on octeon with crypto coprocessor, an
unauthenticated ESP packet that matches a configured AES-GMAC
security association could copy almost 64 KB of attacker-controlled
data into a 4096-byte kernel heap buffer.
from Acts1631; from bluhm@; OK visa@ hshoexer@
this is errata/7.9/038_aesgmac.patch.sig
Fix overflow in hardware accelerated AES-GMAC crypto.
On amd64 using AES-NI or on octeon with crypto coprocessor, an
unauthenticated ESP packet that matches a configured AES-GMAC
security association could copy almost 64 KB of attacker-controlled
data into a 4096-byte kernel heap buffer.
from Acts1631; from bluhm@; OK visa@ hshoexer@
this is errata/7.8/074_aesgmac.patch.sig
Backport security fixes from upstream nsd(8) version 4.15.3.
* CVE-2026-101341: Stack overwrite from specially formatted TXT-DATA
RDATA field
* CVE-2026-101339: Stack overwrite from a specially crafted and
formatted HIP RR
* CVE-2026-101338: Stack overwrite from a specially crafted and
formatted SVCB or HTTPS RR
* CVE-2026-101337: Stack overwrite from specially formatted base64
RDATA field
from bluhm@; OK sthen@ renaud@ deraadt@
this is errata/8.0/002_nsd.patch.sig
Backport security fixes from upstream nsd(8) version 4.15.3.
* CVE-2026-101341: Stack overwrite from specially formatted TXT-DATA
RDATA field
* CVE-2026-101339: Stack overwrite from a specially crafted and
formatted HIP RR
* CVE-2026-101338: Stack overwrite from a specially crafted and
formatted SVCB or HTTPS RR
* CVE-2026-101337: Stack overwrite from specially formatted base64
RDATA field
from bluhm@; OK sthen@ renaud@ deraadt@
this is errata/7.9/037_nsd.patch.sig
Backport security fixes from upstream nsd(8) version 4.15.3.
* CVE-2026-101341: Stack overwrite from specially formatted TXT-DATA
RDATA field
* CVE-2026-101339: Stack overwrite from a specially crafted and
formatted HIP RR
* CVE-2026-101338: Stack overwrite from a specially crafted and
formatted SVCB or HTTPS RR
* CVE-2026-101337: Stack overwrite from specially formatted base64
RDATA field
from bluhm@; OK sthen@ renaud@ deraadt@
this is errata/7.8/073_nsd.patch.sig
[SimplifyCFG] Mark branch weights unknown in masked switch to lookup (#233321)
We cannot infer the branch weights because this transformation splits
the default case into two (values fully out of range, and holes inside
the range), which we cannot infer without additional value profiling.
