[CIR] Implement __builtin_cpu_supports, _init, and _is (#212900)
These are pretty trivial checks to a builtin variable, so this
implements it for x86, as this shows up in self-build. The tests are
pulled from classic-codegen and shows that we do the reasonable thing
for each of them.
[AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (#210892)
POPS hardware is graphics-pipe-only and absent on compute-only CDNA
targets (gfx908, gfx90a, gfx940, gfx942, gfx950), which incorrectly
matched the isGFX9GFX10 predicate and selected a nonexistent register
[AMDGPU] Fix S_ADD_I32 frame index folding emitting COPY with immediate (#212440)
When eliminating a frame index in `S_ADD_I32 %fi, imm`,
`SIRegisterInfo::eliminateFrameIndex` can simplify `0 + offset` into a
COPY or S_MOV_B32. The pass used a `MachineOperand` reference captured
before `removeOperand()`, which becomes stale after operands are removed
and shifted. That caused the wrong opcode to be selected (`COPY` instead
of `S_MOV_B32`), producing invalid machine IR such as `copy s4, 4`.
The invalid COPY is later hit by Machine Copy Propagation, which asserts
when calling `getReg()` on the immediate source operand.
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
[AArch64][SLP][NFC] Precommit scalar fmul extract cost test (#212837)
Precommit a baseline SLP test for the AArch64 scalar fmul extract cost.
The current cost model overestimates the cost of the lane-1 use, so only
one of the two fadd pairs is vectorized at the selected SLP threshold.
A follow-up patch will correct this #212739 should correct this.
Move check of public key type against allowed algorithms to before
parsing of the key sent by the peer.
This removes at least some key parsing and verification paths from
the pre-auth attack surface.
Suggested by Christopher Paul Rohlf of Anthropic, ok deraadt@
Update to samba-4.24.5
Security release addressing CTDB protocol bounds checking issues
(CVE-2026-58224). AD and DNS/KDC vulnerabilities do not affect standard
OpenBSD builds. Details:
https://www.samba.org/samba/history/samba-4.24.5.html
Tested by Ian McWilliam (maintainer).
Update to samba-4.24.5
Security release addressing CTDB protocol bounds checking issues
(CVE-2026-58224). AD and DNS/KDC vulnerabilities do not affect standard
OpenBSD builds. Details:
https://www.samba.org/samba/history/samba-4.24.5.html
Tested by Ian McWilliam (maintainer).
[Flang][OpenMP] Remove present modifier application on descriptor (#211856)
This was a minor change upstreamed in the original PR:
https://github.com/llvm/llvm-project/pull/208133
However, it is a modification that needs a little more thought from a
specification perspective before it is rolled out, there's a number of
code bases that depend on the presence modifier being applied only to
the underlying data. However, this leads to inconsistencies when a user
makes use of any reference semantic modifiers when mapping as they
SHOULD be allowed to specify present applying to the descriptor. So, we
need to work out what the correct defualt behaviour is, and regardless
of the default support a user intentionally specifying presence
application on a descriptor via reference semantics.
For now, we will revert to previous state.
[SLP][modularisation][NFC] Extract InstructionsState (2/3) (#211461)
Move the InstructionsState class out of SLPVectorizer.cpp into the
existing private module SLPVectorizer/SLPCompatibilityAnalysis.{h,cpp}.
The class declaration (with trivial accessors) lives in the header; the
non-trivial method bodies are defined out-of-line in the .cpp:
isSameOperation
getMatchingMainOpOrAltOp
isMulDivLikeOp
isAddSubLikeOp
isCopyableElement
isExpandedBinOp
isExpandedOperand
isNonSchedulable
Part of the effort to modularize SLPVectorizer.cpp. See the RFC:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
[libc++] Granularize `<optional>` (#206644)
Certain headers require `optional<T&>`, so it may be beneficial to split
out `optional<T>` and `optional<T&>`. This can allow consumers to only
bring in the `optional` flavour it needs..
- Parcel out the respective pieces into their own header.
- Certain sources rely on transitive includes brought in by
`<optional>`, so they're kept there for now, and only tests have been
fixed.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
igb: Add SR-IOV PF support for 82576 and I350
Add the PCI IOV schema and PF control plane for up to seven VFs with
one hardware queue per pool. Implement VF mailbox handling, MAC and
VLAN assignment, multicast filtering, promiscuity policy,
anti-spoofing, malicious-driver recovery, reset replay, and queue
lifecycle management.
The basic SR-IOV and VMDq PF implementation follows DPDK Intel e1000
code, including PF pool selection, one queue per pool, mailbox
dispatch, and VF enablement. Intel FreeBSD igb-2.5.31 supplies the
older driver baseline. Linux igb and the Intel SDMs clear up lifecycle,
isolation, reset, and family-specific details absent from DPDK.
Enabling IOV requires the PF to attach with one TX and RX queue.
Systems whose defaults select RSS queues must set the documented iflib
queue override tunables before attach.
Only 82576 and I350 support SR-IOV in silicon. The series has been
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igb: Guard register dump during queue setup
The register-dump sysctl is installed before iflib allocates the queue
arrays and remains visible while they are freed. Return ENXIO outside
the queue lifetime instead of dereferencing a NULL or stale array.
Sponsored by: BBOX.io
igbv: Correct I350 loopback VLAN byte order
I350 loopback receive descriptors report VLAN tags byte-swapped for
both PFs and VFs. The receive path handled the PF device types but
omitted e1000_vfadapt_i350, causing an admitted VF VLAN packet to be
delivered untagged to the VF parent.
Include the I350 VF type in the existing correction. This matches the
dedicated IGB_RXQ_FLAG_LB_BSWAP_VLAN handling in DPDK igbvf.
MFC after: 1 week
Sponsored by: BBOX.io
[X86] Apply the data32 mode switch in the Intel matcher (#212417)
In .code16, `data32 push 8` in Intel syntax assembled as `pushw $8` with
the 66 prefix dropped, and `data32 push 0x1234` truncated the immediate
to 16 bits. AT&T syntax gets both right.
`ForcedDataPrefix` is set while parsing either syntax, but only
`matchAndEmitATTInstruction` switched mode on it, so the Intel path took
the operand size from the mode and never saw the prefix.
Do the same switch in `matchAndEmitIntelInstruction`. The mode has to go
back to 16-bit before the instruction is emitted, otherwise the 32-bit
form is emitted without its 66 prefix. That function has several error
returns partway through matching, so a scope guard covers those.
Encodings after the change match both AT&T syntax and GNU as:
```
data32 push 8 [0x6a,0x08] -> [0x66,0x6a,0x08]
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stand: Cleanup use of cached DHCP response packet
- When cached response is available, actually use xid from one
instead of using its byte-swapped value for BIOS and 1 for UEFI.
- If cached response is not available, generate pseudo-random xid,
since use of a constant may cause conflicts if two systems are
booting same time, and server sends responses as broadcast.
- When cached response is available, skip DHCP DISCOVER/OFFER
and just send REQUEST to the DHCP server from the cached response.
We could skip this phase too and just use the cached response, but
we don't know whether firmware requested all of DHCP options we'd
like to get.
Tested on amd64 Supermicro X11DPI-NT for both BIOS and EFI, with
and without cached response packet.
net/fort: Update to 1.7.0.experimental
- Update to 1.7.0.experimental
- Changelog:
https://github.com/NICMx/FORT-validator/releases/tag/1.7.0.experimental
Please note that max-rtr-version defaults to zero. This is because
Fort's validation currently yields no router keys (defeating the purpose
of RTRv1), and the RTRv2 specification is still receiving updates.
The latter is all the ".experimental" suffix refers to. If you raise
max-rtr-version to 2, you'll be trying a feature that hasn't been RFC'd
yet.
MFH: 2026Q3
