[Clang] Fix padding clearing logic for packed boolean vectors in big endian (#224033)
The memory layout of packed boolean vectors in big endian mode is quite
involved. This patch adds support for determining the occupied bits of
this type in big endian mode, so that the correct bits are cleared as
padding.
textproc/uim: Update to 1.9.7
- Remove textproc/uim-gtk2 because the upstream dropped gtk2 support
- Add textproc/uim-gtk4
- Bump PORTREVISION of textproc/uim consumers
Float2Int: Replace -float2int-max-integer-bw cl::opt with pass parameter
Migrate the pass-specific command-line option to a new pass manager
pass parameter, exposed as float2int<max-integer-bw=N>.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Services: KEA DHCPv4/6: Move opnsense owned metadata into separate namespace in user-context
The user-context was described as being user owned metadata, but that is not always true.
Some hooks like the ping-check configure in an own namespace in the user-context, muddying the concept of ownership.
We move our own metadata into an user-context.opnsense namespace so future hooks do not misinterpret keys like uuid or description.
WebAssembly: Respect target-abi module flag
Previously this relied on the TargetABI MCOptions field and ignored
the IR flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[lldb] [NFC] Fix unused variable warning in MemoryCache::InsertPartialLine (#224973)
A Release build (assertions disabled) warns:
```
lldb/source/Target/Memory.cpp:144:18: warning: unused variable 'line_size' [-Wunused-variable]
144 | const uint32_t line_size = m_L2_cache.GetLineByteSize();
| ^~~~~~~~~
```
`line_size` was read only inside the `assert` that checks a partial-line
insert does not cross a cache line boundary. `assert` expands to nothing
when `NDEBUG` is defined, so the variable becomes unused in that
configuration.
`llvm/docs/CodingStandards.md` covers this shape directly:
```
In the first case, the call to `V.size()` is only useful for the assert,
and we don't want it executed when assertions are disabled. Code like
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[X86] Fix cmov-unpredictable MIR tests under expensive checks (#225011)
The machine functions have no body, so the MIR parser sets NoVRegs and
leaves TracksLiveness unset, and the verifier rejects the vregs created
by instruction selection. Declare tracksRegLiveness: true and noVRegs:
false, and add -verify-machineinstrs to the RUN lines.
Fixes https://lab.llvm.org/buildbot/#/builders/187/builds/23887 after
#223469 (commit a3d0da5c2c3cbfc1fc2d569700fd1a6b30c751dc).
Assisted-by: Claude Code:claude-fable-5-1
WebAssembly: Remove -wasm-enable-eh cl::opt in favor of -exception-model=wasm (#224313)
The -wasm-enable-eh backend flag was redundant with
-exception-model=wasm: every caller paired the two, and the model already
carries the intent.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[VPlan] Move getConstantStride to vputils (NFC). (#224972)
Move the helper from VPlanTransforms.cpp to vputils, so it can also be
used from other VPlan files.
[orc-rt] msvc portability (#224512)
1. designated initializers are not supported under c++17 in msvc. Clang
seems to support them.
2. Fixed constexpr issues requiring everything to be constexpr in msvc.
Mostly the bit changes.
3. Add stubs for all the platform specific code, they will land in
separate patches.
4. Enabling RTTI/Exceptions for lib and tests.
5. Disable and fix up tests so they can compile and pass, future PRs
will enable and make work properly.
6. Fixed some protection issues in simpleCA.
7. Removed posix only files and darwin only files.
Various other small fixes as necessary to get compiling.
LoongArch: Simplify handling of call pseudo operands when expanding. (#224824)
copyImplicitOperands isn't really intended for the call instruction case
where there are also variadic operands. This avoids duplicating the R1
implicit-def operand when expanding calls. This avoids having mixed dead
and not dead flags on the same register, which will fail a future
verifier check.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
powerpc/radix: acquire the pmap lock in mmu_radix_extract()
mmu_radix_extract() walks the page tables without holding the pmap lock,
unlike its hash MMU counterpart moea64_extract(). A concurrent unmap can
free and recycle the page table page being walked, so the read returns
whatever now occupies that memory and the caller gets a physical address
that never existed.
That is how mmu_radix_sync_icache() came to hand a bogus address to
__syncicache() and panic the machine. Commit 1574ca1955f5 worked around
it by taking the pmap lock in mmu_radix_sync_icache(), but the machine
independent callers of pmap_extract() - vm_sync_icache(), proc_rwmem()
and the vslock() paths - remain exposed to the same failure.
Rename the existing body to mmu_radix_extract_locked(), which asserts the
lock, and make mmu_radix_extract() a thin wrapper that acquires it.
mmu_radix_sync_icache() already holds the pmap lock, so it calls the
locked variant directly and neither recurses nor reacquires the lock once
per page.
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powerpc/radix: take the pmap lock in mmu_radix_sync_icache()
mmu_radix_sync_icache() walked the page tables with an unlocked
pmap_extract() and passed the result straight to PHYS_TO_DMAP(),
checking only that it was non-zero. Nothing keeps the mapping - or the
page table page holding it - alive across that window: if another thread
of the same process tears a mapping down concurrently, the page table
page can be freed and reused, so pmap_extract() reads arbitrary memory
and returns a bogus physical address. __syncicache() then dereferences
an unmapped direct map address and the kernel takes a data storage
interrupt:
fatal kernel trap:
exception = 0x300 (data storage interrupt)
virtual address = 0xc003317ca6022a00
dsisr = 0x40000000
srr0 = 0xc000000000f59460 (__syncicache)
lr = 0xc000000000f23588 (mmu_radix_sync_icache)
pid = 23878, comm = skyframe-evaluator-
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