[clang][bytecode] Diagnose copying empty mutable unions (#195529)
We had a special case for copy/move ctors of empty unions. Remove that.
Everything else is just so we don't regress diagnostics.
[X86] vector-reduce-* - add 32-bit test coverage to the minmax tests (#195617)
The horizontal-reduce-* tests already have 32-bit coverage but they will be retired soon.
Make prefix pool validation stricter, if only a /64 prefix exists there is nothing we can do if we offer both IA_NA and IA_PD, at least /63 would be required for one IA_NA and one IA_PD pool.
[IR] Add require-logical-module module flag (#193502)
This module flag is optional and can be set to require the use of
logical alloca/gep instructions.
This flag will have 2 usages:
- tell optimization which flavor of GEP/alloca to emit
- fail loudly if a GEP/alloca is emitted in a module targeting logical.
sysutils/cpu-microcode: revoke tier 2
A number of cheapish hardware has issues with microcode updates now
and then preventing them to boot. Since this isn't good enough for
our standards revoke tier 2 so that this goes back to community scope.
PR: https://forum.opnsense.org/index.php?topic=51786.msg266329#msg266329
www/nginx-devel: Update to 1.29.8
Changes with nginx 1.29.8 07 Apr
2026
*) Feature: the "max_headers" directive.
Thanks to Maxim Dounin.
*) Feature: OpenSSL 4.0 compatibility.
*) Feature: now the "include" directive inside the "geo" block
supports
wildcards.
*) Bugfix: in processing of HTTP 103 (Early Hints) responses from a
proxied backend.
*) Bugfix: the $request_port and $is_request_port variables were not
available in subrequests.
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Add a mvp for the dynamic pd_pool, the pool is auto generated from the largets possible prefix that does not include the IA_NA generated address pool. Validation ensures the user can only change the delegated prefix length, but not anything about the pool itself. KEA is very strict about validations, auto generation is required here to ensure the model stays sane.
[CIR] Replace nsw/nuw unit attrs with OverflowFlags BitEnum
Combine the separate `no_signed_wrap` and `no_unsigned_wrap` unit
properties on arithmetic ops into a single `OverflowFlags` BitEnum
(`nsw`, `nuw`). This allows combined flags to be written as
`nsw|nuw` in assembly, replaces the per-flag verification traits
with a single `OverflowFlagsRequireIntType` predicate, and folds
the two `HasAtMostOneOfAttrs` checks into one
`SatExclusiveWithOverflowFlags` predicate.
The bit layout matches `mlir::LLVM::IntegerOverflowFlags`, so
lowering casts the value directly and asserts the layout via
static_assert.
Updates IncOp/DecOp/MinusOp builders, CIRGenExprScalar, and
LowerItaniumCXXABI to the new API. Adds round-trip and
verification tests in clang/test/CIR/IR/.
glib2 glib2-tools gdbus-codegen: updated to 2.88.1
Overview of changes in GLib 2.88.1, 2026-05-02
* Fix miscompilation with GCC 16 due to GLib’s use of the wrong function
attribute (!5145, work by Sam James)
* Fix flag confusion security issue when using `GRegex` with `G_REGEX_RAW` which
can result in unbounded out-of-bounds heap reads off the start of a regex
input string
* Fix various minor (low severity) security issues, typically one-to-five-byte
out-of-bounds reads or ones relying on
very specific (and unlikely) API calls or ones relying on
discouraged P2P D-Bus configurations (work by linhlhq)
* Bugs fixed:
- Buffer Over-read on GLib through glib/gvariant-
serialiser.c:1253 via gvs_tuple_is_normal() (Philip Withnall)
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[AMDGPU] Support Wave Reduction for true-16 types - 3
Supporting true-16 versions of the reduction intrinsics
Supported Ops: `and`, `or`, `xor`.
Supports only the iterative stratergy, DPP is yet
to be supported.
[flang] avoid introducing iteration dependencies in WHERE and FORALL temporaries (#195053)
This patch improves the addressing of temporaries created when needed for simple FORALL or WHERE as below to not introduce iteration dependencies.
```
subroutine foo(p1, p2, mask)
real, pointer :: p1(:), p2(:)
logical :: mask(:)
where (mask) p1 = p2
end subroutine
```
Instead of using a stack like temporary that uses a counter to push and fetch elements, the loop IVs are directly used to address the temporaries. This makes it easier to later vectorize or parallelize those loops.
This is only done when:
- This is not a FORALL with array expressions
- The dynamic type is the same at each iterations
- The WHERE and FORALL do not create loops of depth more than 15.
- If there are FORALLs, their strides are constants 1 or -1.
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[clang][SYCL] Handle cdecl variadic functions for SYCL device (#194922)
SYCL doesn't allow variadic functions to be called from device code.
Since SYCL device compilation mostly uses targets that don't natively
support variadic fucntions, we now issue an error even if the variadic
function is never called from the device if it has cdecl calling
convention attribute. We also now don't issue an error if a variadic
function is called from the device code. This patch defers the error
caused by cdecl attribute to the actual call point and adds diagnosing
of variadic function calls on device side using deferred diagnostics.
[AMDGPU] Support Wave Reduction for i16 types - 3
Supported Ops: `and`, `or`, `xor`.
Supports only the iterative stratergy, DPP is yet
to be supported.
Supports only Fake-16 versions of the lowering.
True-16 support is yet to be added.
[AMDGPU] Support Wave Reduction for true-16 types - 2
Supporting true-16 versions of the reduction intrinsics
Supported Ops: `add`, `sub`.
Supports only the iterative stratergy, DPP is yet
to be supported.
