LLVM/project 07b4876llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/test/MC/AMDGPU hsa-diag-v4.s isa-version-pal.s

Clarify .amdgcn_target processor mismatch diagnostic
DeltaFile
+25-8llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+4-4llvm/test/MC/AMDGPU/hsa-diag-v4.s
+2-2llvm/test/MC/AMDGPU/isa-version-pal.s
+1-1llvm/test/MC/AMDGPU/isa-version-hsa.s
+1-1llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
+1-1llvm/test/MC/AMDGPU/isa-version-unk.s
+34-176 files

LLVM/project c7f5b5ellvm/include/llvm/MC MCSubtargetInfo.h

Drop setCPU change
DeltaFile
+0-4llvm/include/llvm/MC/MCSubtargetInfo.h
+0-41 files

LLVM/project ccef92ellvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

remove r600 check
DeltaFile
+1-2llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+1-21 files

LLVM/project 47e79b5llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

AMDGPU: Respect target assembler directives over command line

Mutate the global subtarget, using essentially the same code that ARM uses.
The main difference is we need to mutate the actual CPU name in addition
to just flipping the feature bits, so this needs a new setter in
MCSubtargetInfo. Liberalize the triple check so that after #206480,
old assembly files to not break on new assembler invocations.

For some reason we have 2 different assembler directives that indicate the
target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal. Previously,
we would take the target from the command line and then error if the directive
did not exactly match. In order to move away from depending on the xnack and
sramecc subtarget features, start treating the directives as a change of target,
similar to ARM's .cpu and .arch directives.

Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc. Ideally
we would introduce new independent directives for these.

Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+65-7llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+33-0llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+5-5llvm/test/MC/AMDGPU/hsa-diag-v4.s
+7-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+3-3llvm/test/MC/AMDGPU/isa-version-unk.s
+3-3llvm/test/MC/AMDGPU/isa-version-hsa.s
+116-1810 files not shown
+132-2916 files

LLVM/project eee29edllvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll

rebase

Created using spr 1.3.7
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+31,001-87,165llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+48,431-47,321llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+24,087-21,000llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+580,981-155,48635,022 files not shown
+3,826,660-1,582,45835,028 files

FreeBSD/ports bda4c5fjava/eclipse-ecj Makefile

java/eclipse-ecj: deprecate and expire in 4 months

No maintainer, last update was 2015, does not build with Java 11, only usage in the ports tree (math/scilab) was just deprecated.

Approved-by:    no maintainer
DeltaFile
+4-1java/eclipse-ecj/Makefile
+4-11 files

LLVM/project 720066allvm/lib/Target/BPF BPFMIPeephole.cpp, llvm/test/CodeGen/BPF mov32-64-subreg-source.mir

BPF: Fix misfolding subregisters (#208244)

This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.

The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
DeltaFile
+44-0llvm/test/CodeGen/BPF/mov32-64-subreg-source.mir
+5-1llvm/lib/Target/BPF/BPFMIPeephole.cpp
+49-12 files

FreeBSD/ports f7dd45adns/aardvark-dns distinfo Makefile.crates, dns/aardvark-dns/files patch-cargo-crates_inotify-0.11.2_src_fd__guard.rs patch-Cargo.lock

dns/aardvark-dns: fix build by updating crates to their new versions

Bump PORTREVISION.

Sponsored by:   tipi.work
DeltaFile
+0-65dns/aardvark-dns/files/patch-cargo-crates_inotify-0.11.2_src_fd__guard.rs
+26-0dns/aardvark-dns/files/patch-Cargo.lock
+11-0dns/aardvark-dns/files/patch-Cargo.toml
+5-5dns/aardvark-dns/distinfo
+2-2dns/aardvark-dns/Makefile.crates
+1-0dns/aardvark-dns/Makefile
+45-726 files

LLVM/project 34b57bfclang/include/clang/AST OpenMPClause.h, clang/lib/AST OpenMPClause.cpp

[Clang][OpenMP] Add parsing/sema for dims modifier in num_threads
DeltaFile
+150-41clang/include/clang/AST/OpenMPClause.h
+80-34clang/lib/Parse/ParseOpenMP.cpp
+61-36clang/lib/Sema/SemaOpenMP.cpp
+62-0clang/test/OpenMP/dims_modifier_ast_print.cpp
+52-7clang/lib/AST/OpenMPClause.cpp
+53-1clang/test/OpenMP/dims_modifier_messages.cpp
+458-11927 files not shown
+589-20733 files

FreeBSD/ports 8a96ba6math/scilab Makefile, math/scilab-toolbox-swt Makefile

math/scilab*: deprecate and expire in 4 months

No maintainer, old version, did not keep up with upstream, does not build with Java 11 or at all.
Please mail the maintainer if you use this.

Reported-by:    https://portsfallout.com/fallout?port=math%2Fscilab
Approved-by:    no maintainer
DeltaFile
+5-1math/scilab-toolbox-swt/Makefile
+4-1math/scilab/Makefile
+9-22 files

LLVM/project 766161ccompiler-rt/lib/scudo/standalone tsd_shared.h

[scudo] Small refactor of getTSDXXX functions. (#208127)

Small modification in getTSDAndLock() to have a single shared TSD avoid
the tryLock call. Also, remove some unnecessary comments.

Add a DCHECK in getTSDSlow and only check for == 1 since a 0 number of
shared TSDs is not supported.
DeltaFile
+6-7compiler-rt/lib/scudo/standalone/tsd_shared.h
+6-71 files

NetBSD/pkgsrc j6YRHlCwww/firefox distinfo, www/firefox/patches patch-js_src_jit_arm64_vixl_Registers-vixl.h

   PR pkg/59775

   Installed suggested patch to fix compiling on NetBSD/aarch64.
   https://gnats.netbsd.org/59775
VersionDeltaFile
1.1+20-0www/firefox/patches/patch-js_src_jit_arm64_vixl_Registers-vixl.h
1.583+2-1www/firefox/distinfo
+22-12 files

LLVM/project daa9129llvm/test/CodeGen/AMDGPU llvm.exp10.f64.ll llvm.exp.f64.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-llvm.amdgcn.image.sample.a16.ll legalize-store-global.mir

AMDGPU/GlobalISel: Switch to extended LLTs

IRtranslator now translates bfloat. Switch tablegen to use extendedLLTs.
Around 300 regression tests fail to inst-select because GIM_SwitchType
does not accept LLT::scalar. Around 100 mir inst select tests had input
updated to i32/f32 and select successfully. Then there are 24 various
crashes, mostly combiner or machine-verifier, those tests are disabled.

Most problems come from mixing s32 with i32/f32 and the way operator==
works with extendedLLTs compared to GIM_SwitchType.
In general, for inst-select fixes, I think it would be best to avoid
explicit use of LLT::scalar in lowering to avoid mixing it with
LLT::integer/LLT::float See inst-select-extendedLLTs.mir and
inst-select-extendedLLTs-err.mir.

Change-Id: I045125c53ee9bb572fa048be739b56e1169600d2
DeltaFile
+5,524-11,062llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
+5,056-10,126llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
+4,877-9,819llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
+5,052-5,052llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
+4,710-4,710llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
+3,093-5,580llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+28,312-46,349685 files not shown
+170,777-238,706691 files

OpenBSD/src 5E9YEXclibexec/ld.so/sparc64 rtld_machine.c

   ld.so/sparc64: preserve unaligned relocation byte order

   The unaligned relocation path reconstructs the relocation target in
   SPARC byte order, but writes the adjusted value back least significant
   byte first; this reverses R_SPARC_UA64 results on a big endian target.
   Write the value back in target byte order, so relocated function
   pointers retain their canonical representation.

   Tested by tb@, OK: kettenis@
VersionDeltaFile
1.74+2-2libexec/ld.so/sparc64/rtld_machine.c
+2-21 files

LLVM/project dcc5148llvm/lib/Target/SystemZ SystemZAsmPrinter.cpp SystemZAsmPrinter.h, llvm/lib/Target/SystemZ/MCTargetDesc SystemZTargetStreamer.cpp SystemZTargetStreamer.h

Fix formatting
DeltaFile
+3-4llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+3-3llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
+2-1llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
+1-1llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
+9-94 files

OpenBSD/src p7w4x6klibexec/ld.so/sparc64 rtld_machine.c

   ld.so/sparc64: fix UA64 relocation mask selection

   The relocation mask table is indexed by relocation number; the missing
   separator after the R_SPARC_6 entry shifts subsequent initializers, so
   R_SPARC_UA64 receives the R_SPARC_UA16 mask. Restore the table layout,
   otherwise only the low 16 bits of relocated 64 bit pointers survive.

   Tested by tb@, OK: kettenis@
VersionDeltaFile
1.73+2-2libexec/ld.so/sparc64/rtld_machine.c
+2-21 files

LLVM/project 1b5d760clang/docs ReleaseNotes.md, clang/include/clang/Basic DiagnosticSemaKinds.td

[Clang] Fix crash involving `__attribute__((cleanup))` attributes and improve handling of multiple `cleanup` attributes (#207785)

Clang would previously crash on this code:
```c
#define C(x) __attribute__((cleanup(x)))
void foo(double *x) {}
void bar() { C(foo) C(foo) baz8; }
```
Here, we were trying to query properties of `VD->getType()`, which would
crash because type of the variable declaration is null here (because the
user didn’t write a type); avoid this by bailing out early if the
declaration is invalid.

Additionally, this patch fixes a GCC compatibility issue: in code such
as
```c
#define C(x) __attribute__((cleanup(x)))
void f1(double *x);
void f2(double *x);

    [7 lines not shown]
DeltaFile
+53-0clang/test/CodeGen/attr-cleanup-duplicate.c
+43-0clang/test/Sema/attr-cleanup-duplicate.c
+8-1clang/lib/Sema/SemaDeclAttr.cpp
+4-0clang/docs/ReleaseNotes.md
+3-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+111-15 files

LLVM/project fedcedellvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv vector-deinterleave-fixed.ll

[RISCV] Fix incorrect fixed vector lowering for VECTOR_DEINTERLEAVE (#207254)

Partially address #207136

Previously this part of the logic simply converts each operand into
scalable vector and pass on. This will run into problem when the
scalable vector container is larger than the actual fixed vector.
This patch fixes this issue by storing individual fixed vector operands
directly onto the stack, before loading them back with segmented load
just like its scalable vector counterpart
DeltaFile
+653-417llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll
+69-41llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+722-4582 files

LLVM/project 8c13e84llvm/lib/MC MCAsmInfoGOFF.cpp

Fix formatting.
DeltaFile
+4-4llvm/lib/MC/MCAsmInfoGOFF.cpp
+4-41 files

LLVM/project 5a1b669clang/docs ReleaseNotes.md, clang/lib/Parse ParseDecl.cpp

[clang] Fix crash in DiagnoseMissingSemiAfterTagDefinition for annot_template_id (#208119)

DiagnoseMissingSemiAfterTagDefinition checks whether the token after a
tag definition could be a scope specifier before calling
TryAnnotateCXXScopeToken. It accepted annot_template_id unconditionally,
but TryAnnotateCXXScopeToken asserts that MightBeCXXScopeToken() holds,
which only accepts annot_template_id when followed by ::.

When the token is annot_template_id not followed by :: (e.g. union { }
::foo<int>; where ::foo<int> is annotated as a template-id after a
missing semicolon), the check passes but MightBeCXXScopeToken() returns
false, firing the assertion.

This patch adds the same NextToken().is(tok::coloncolon) guard that
MightBeCXXScopeToken uses for annot_template_id.

Fixes #207992

---------

Co-authored-by: Corentin Jabot <corentinjabot at gmail.com>
DeltaFile
+14-0clang/test/Parser/cxx-missing-semi-crash.cpp
+2-2clang/lib/Parse/ParseDecl.cpp
+1-0clang/docs/ReleaseNotes.md
+17-23 files

LLVM/project 3e4f56bllvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlan.h

[VPlan] Introduce VPlan-based hasTailFolded helper. (NFC) (#208329)

After having dedicated support for modeling the header mask of a region
created for tail-folding, add a new helper to query if a plan has it's
tail folded, i.e. it has a header mask (materialized or not).

Similarly to https://github.com/llvm/llvm-project/pull/207784, it also
adds a wrapper to LoopVectorizationPlanner that asserts that cost model
and VPlan decision agree. The wrapper should be removed after no
divergence are found.

PR: https://github.com/llvm/llvm-project/pull/208329
DeltaFile
+18-12llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+6-0llvm/lib/Transforms/Vectorize/VPlan.h
+4-0llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+2-2llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-2llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+31-165 files

LLVM/project ed60974llvm/test/Analysis/ScalarEvolution minmax-decomposition-guards.ll, llvm/test/Transforms/LoopVectorize early-exit-minmax-trip-count.ll early-exit-umin-trip-count.ll

[SCEV] Add more tests for reasoning about min/max expressions (NFC) (#208535)
DeltaFile
+627-0llvm/test/Analysis/ScalarEvolution/minmax-decomposition-guards.ll
+330-0llvm/test/Transforms/LoopVectorize/early-exit-minmax-trip-count.ll
+0-103llvm/test/Transforms/LoopVectorize/early-exit-umin-trip-count.ll
+957-1033 files

LLVM/project f2c6536llvm/lib/Target/SystemZ SystemZAsmPrinter.cpp SystemZAsmPrinter.h, llvm/lib/Target/SystemZ/MCTargetDesc SystemZTargetStreamer.cpp SystemZTargetStreamer.h

[SystemZ][z/OS] Move emission of PPA1

There is an interesting restriction during emission: emitting debug information closes the text section. As result, emitting the delayed PPA1 data does not work in the current place together with emitting debug information.
Since the PPA1 information is constant data, the solution is to emit the data in the target strreamer, in `emitConstantPools()`.
DeltaFile
+20-251llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+257-0llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.cpp
+48-16llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
+1-31llvm/lib/Target/SystemZ/SystemZAsmPrinter.h
+2-2llvm/test/CodeGen/SystemZ/zos-landingpad.ll
+328-3005 files

LLVM/project 5815dfellvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 float-to-arbitrary-fp.ll llvm.frexp.ll

[X86] promote f16 `frexp` (#208530)

follow-up to https://github.com/llvm/llvm-project/pull/208462

Using the libcall reduces code size, gives identical output for the full
f16 range, and is apparently quite a bit faster

```
direct f16: 2.067486000 s for 1000 full-range iterations
via f32:    0.714443000 s for 1000 full-range iterations
```
DeltaFile
+247-296llvm/test/CodeGen/X86/float-to-arbitrary-fp.ll
+14-68llvm/test/CodeGen/X86/llvm.frexp.ll
+1-0llvm/lib/Target/X86/X86ISelLowering.cpp
+262-3643 files

FreeBSD/ports e3bdea4graphics/mesa-dri distinfo Makefile.common, graphics/mesa-dri/files patch-userptr patch-meson.build

graphics/mesa-{dri,libs}: update: 26.1.3 -> 26.1.4

PR:             296590
Approrved by:   x11 (maintainer, arrowd)

Sponsored by:   tipi.work
DeltaFile
+7-7graphics/mesa-dri/files/patch-userptr
+3-3graphics/mesa-dri/distinfo
+2-2graphics/mesa-dri/files/patch-meson.build
+2-2graphics/mesa-dri/files/patch-include_renderdoc__app.h
+1-1graphics/mesa-dri/Makefile.common
+15-155 files

NetBSD/pkgsrc-wip baa7a7ebup-git Makefile PLIST, bup-snapshot Makefile PLIST

bup: Rename -git to -snapshot

My opinion is that the point is not that bup is developed in git but
that the package is a snapshot of development rather than a release.

That's my story and I'm sticking with it at least all day today!  But
seriously, it seems like a good plan in general.
DeltaFile
+163-0bup-snapshot/Makefile
+0-163bup-git/Makefile
+128-0bup-snapshot/PLIST
+0-128bup-git/PLIST
+24-0bup-snapshot/patches/patch-lib_bup___helpers.c
+24-0bup-snapshot/DESCR
+339-2919 files not shown
+369-36915 files

LLVM/project 6b7b8d3llvm/include/llvm/ProfileData SampleProf.h

[SampleProfile] Replace std::set with SmallVector in SortedCallTargetSet (NFC) (#208509)

This patch replaces std::set with SmallVector and llvm::sort in
SortedCallTargetSet and sortCallTargets.

Since the keys in CallTargetMap are already guaranteed to be unique,
using std::set for sorting allocates unnecessary tree nodes on the
heap.

This patch also removes unnecessary const from return-by-value types
to enable move semantics.

Assisted-by: Antigravity
DeltaFile
+5-9llvm/include/llvm/ProfileData/SampleProf.h
+5-91 files

NetBSD/pkgsrc-wip 296cf9abup-git distinfo Makefile

bup-git: Advance along upstream main
DeltaFile
+3-3bup-git/distinfo
+2-2bup-git/Makefile
+5-52 files

LLVM/project 70787a4cmake/Modules GetTripleCMakeSystemName.cmake

runtimes: Don't set CMAKE_SYSTEM_NAME=Android

Cmake requires an NDK for android. Prior to 00b2f814182,
the default system name would be the host system. Take the
normal linux path, which is a more realistic approximation of
the old behavior.
DeltaFile
+9-7cmake/Modules/GetTripleCMakeSystemName.cmake
+9-71 files

LLVM/project bba373cflang/include/flang/Optimizer/Dialect FIRAttr.td, flang/lib/Lower CallInterface.cpp

[flang][Lower] Track whether a call to a function is to an intrinsic (#208000)

Add an attribute which indicates that a call is to an intrinsic
function. Intrinsic here means that the function declaration was found
in a module found in the intrinsic path.

This allows us to, when optimizing, make sure that we correctly identify
calls to intrinsic functions whose behaviours we know, and not
user-defined functions whose names happen to match.
DeltaFile
+65-65flang/test/Lower/CUDA/cuda-libdevice.cuf
+38-38flang/test/Lower/CUDA/cuda-device-proc.cuf
+7-2flang/include/flang/Optimizer/Dialect/FIRAttr.td
+4-0flang/lib/Lower/CallInterface.cpp
+2-2flang/test/Lower/OpenMP/threadprivate-default-clause.f90
+116-1075 files