LLVM/project 70e3c12llvm/test/CodeGen/SPIRV/transcoding OpGroupAsyncCopy-strided-64.ll OpGroupAsyncCopy-strided.ll

[review] Use default CHECK.
DeltaFile
+1-1llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy-strided-64.ll
+1-1llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy-strided.ll
+1-1llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null-64.ll
+1-1llvm/test/CodeGen/SPIRV/transcoding/spirv-event-null.ll
+4-44 files

LLVM/project 29a55f7clang/lib/Driver/ToolChains HIPSPV.cpp, clang/test/Driver hipspv-toolchain-rdc.hip hipspv-toolchain.hip

[Clang][retry] Lift HIPSPV onto the new offload driver (#178664)

Update HIPSPV toolchain to support --offload-new-driver. Additionally,
tailor llvm-spirv invocation for
[chipStar](https://github.com/CHIP-SPV/chipStar) via
`spirv64-*-chipstar` offload triple.

The previous PR (#168043) had CI failures that were not caught early.
This one attempts to address them.
DeltaFile
+98-42clang/test/Driver/hipspv-toolchain-rdc.hip
+78-16clang/test/Driver/hipspv-toolchain.hip
+59-11clang/lib/Driver/ToolChains/HIPSPV.cpp
+66-0clang/test/Driver/hipspv-toolchain-rdc-separate.hip
+38-8clang/test/Driver/hipspv-pass-plugin.hip
+28-10clang/test/Driver/hipspv-link-static-library.hip
+367-879 files not shown
+425-11215 files

LLVM/project 3d4f6b3llvm/include/llvm/CodeGen CalcSpillWeights.h, llvm/lib/CodeGen CalcSpillWeights.cpp

[RegAlloc] Remove redundant parameters for weightCalcHelper (NFC). (#170151)

Since futureWeight was removed by
145cc9db2b442fc0533e275b92943a9894e33337, there is no more calls to
weightCalcHelper(LI, start, end)
DeltaFile
+3-35llvm/lib/CodeGen/CalcSpillWeights.cpp
+1-8llvm/include/llvm/CodeGen/CalcSpillWeights.h
+4-432 files

LLVM/project a994198llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 sve-streaming-mode-fixed-length-int-mulh.ll sve-streaming-mode-fixed-length-fp-rounding.ll

[DAG] Reland: Enable bitcast STLF for Constant/Undef (#178890)

This is a reland of #172523.

The original patch caused an assertion failure on RISC-V because it
attempted to create a bitcast from an illegal type (i32 on RV64) during
the post-type-legalization DAGCombine stage.

Added a `TLI.isTypeLegal(Val.getValueType())` check to ensure we only
proceed with the bitcast STLF optimization when the source value's type
is legal for the target.
DeltaFile
+71-0llvm/test/CodeGen/X86/dag-stlf-mismatch.ll
+67-0llvm/test/CodeGen/RISCV/rvv/stlf.ll
+8-22llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-int-mulh.ll
+26-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+0-14llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-rounding.ll
+4-8llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
+176-4736 files not shown
+242-17242 files

LLVM/project 4ea1791llvm/lib/Target/X86 X86FixupInstTuning.cpp

[X86] Truncate unused bit for blendw mask (#178883)

While tuning ProcessBLENDWToBLENDD 

https://github.com/mahesh-attarde/llvm-project/blob/07ec2fa1443ccd3cbb55612937f1dddebfe51c15/llvm/lib/Target/X86/X86FixupInstTuning.cpp#L262
we creating mask from `getImm()` which returns 64bit int and APInt
accept 64 bit int.
```
    APInt MaskW =
        APInt(8, MI.getOperand(NumOperands - 1).getImm(), /*IsSigned=*/false);
```
It fails with MIR for BLENDW instruction that requires8 bit mask 0xAA
from 64 bit Imm.
```
  renamable $xmm2 = VPBLENDWrri renamable $xmm1, killed renamable $xmm2, -86
```
APInt construction complains since higher bits of are also set for
transformations where mask bits are set (results in negative values).


    [11 lines not shown]
DeltaFile
+2-1llvm/lib/Target/X86/X86FixupInstTuning.cpp
+2-11 files

FreeBSD/ports 6d1520cwww/tomcat-native2 distinfo Makefile, www/tomcat-native2/files patch-src_ssl.c patch-src_sslutils.c

www/tomcat-native2: Upgrade port to 2.0.12

This release finally drops backported OpenSSL 1.1.1 support, thus FreeBSD 13
support because the patches fail to apply due to upstream changes to those files.

MFH:            2026Q1
Changelog:      https://tomcat.apache.org/native-doc/miscellaneous/changelog.html#Changes_in_2.0.12
(cherry picked from commit 99c91e99baae1f10136796a261d183566dc1c8b1)
DeltaFile
+0-63www/tomcat-native2/files/patch-src_ssl.c
+0-14www/tomcat-native2/files/patch-src_sslutils.c
+0-12www/tomcat-native2/files/patch-include_ssl__private.h
+3-3www/tomcat-native2/distinfo
+3-2www/tomcat-native2/Makefile
+6-945 files

FreeBSD/ports 99c91e9www/tomcat-native2 distinfo Makefile, www/tomcat-native2/files patch-src_ssl.c patch-src_sslutils.c

www/tomcat-native2: Upgrade port to 2.0.12

This release finally drops backported OpenSSL 1.1.1 support, thus FreeBSD 13
support because the patches fail to apply due to upstream changes to those files.

MFH:            2026Q1
Changelog:      https://tomcat.apache.org/native-doc/miscellaneous/changelog.html#Changes_in_2.0.12
DeltaFile
+0-63www/tomcat-native2/files/patch-src_ssl.c
+0-14www/tomcat-native2/files/patch-src_sslutils.c
+0-12www/tomcat-native2/files/patch-include_ssl__private.h
+3-3www/tomcat-native2/distinfo
+3-2www/tomcat-native2/Makefile
+6-945 files

LLVM/project e438a90lldb/source/Target TargetProperties.td, lldb/test/Shell/Settings TestChildDepthTruncation.test

[lldb] Increment max-children-depth to 5 (#178717)

`max-children-depth` was [originally 6][1], which produced too large of
output. It was then [reduced to 4][2], which for some people is too low.
This change is to try 5 as the default.

Originally upstreamed in
https://github.com/llvm/llvm-project/pull/149282

[1]:
https://github.com/swiftlang/llvm-project/pull/4280/changes/ee0782bf6b2e9705e261c5a82147ce0e45a8d753
[2]: https://github.com/swiftlang/llvm-project/pull/10683
DeltaFile
+8-5lldb/test/Shell/Settings/TestChildDepthTruncation.test
+1-1lldb/source/Target/TargetProperties.td
+9-62 files

FreeBSD/src 93d3ac1sys/arm64/arm64 vfp.c

arm64: Fix kernel panic in get_arm64_sve during core dump

The coredump logic calls get_arm64_sve twice: once to get the note size,
and once to get the data. The note size calculation depended on the
volatile `PCB_FP_SVEVALID` flag. If this flag was cleared between the
two calls (e.g., due to a context switch clearing the flag to comply
with the ABI), the second call would expect a smaller buffer size than
the first, triggering a KASSERT panic ("invalid size").

Fix this by ensuring the SVE state is saved to the PCB before we decide
whether to use SVE or VFP.

PR: 292195
Reviewed by: andrew
Differential Revision: https://reviews.freebsd.org/D54532
DeltaFile
+3-3sys/arm64/arm64/vfp.c
+3-31 files

OpenBSD/src j6yqOiEdistrib/sets/lists/comp mi

   sync
VersionDeltaFile
1.1761+1-0distrib/sets/lists/comp/mi
+1-01 files

LLVM/project de931a2llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine load-shufflevector.ll

Revert "[VectorCombine] Trim low end of loads used in shufflevector rebroadca…"

This reverts commit 6c8d9d0c4da51c7f9e7671902be3ad9b65d56c84.
DeltaFile
+23-32llvm/test/Transforms/VectorCombine/load-shufflevector.ll
+8-18llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+31-502 files

LLVM/project c686002llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.s.sleep.ll

[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_s_sleep (#178838)

DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll
+2-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+4-22 files

FreeNAS/freenas 072d301debian/debian postinst

NAS-139257 / 26.0.0-BETA.1 / Fix failing sssd sockets after joining to an IPA Directory Service (#18104)

On Debian/Ubuntu-based systems, SSSD uses systemd socket activation for
NSS and PAM responders by default. Socket-activated services start
on-demand automatically and should NOT be listed in the `services =`
line. The validation script `sssd_check_socket_activated_responders`
checks for this conflict and fails with exit code 17 if services are
listed in both places. Removing the `services` line allows SSSD to rely
entirely on socket activation, which is the recommended configuration.
This aligns with the upstream [SSSD
documentation](https://docs.pagure.org/sssd.sssd/design_pages/systemd_activatable_responders.html#:~:text=the%20services%20line%20in%20sssd.conf%20will%20become%20optional)
and matches the fix that was applied to Ubuntu's realmd package for the
[same
issue](https://bugs.launchpad.net/ubuntu/+source/realmd/+bug/1880157).
DeltaFile
+3-0debian/debian/postinst
+3-01 files

FreeBSD/src 78274fd. Makefile.inc1

native-xtools: use static LLVM libraries

Set the MK_LLVM_LINK_STATIC_LIBRARIES knob to "yes" when building the
native-xtools target. This reverts to the behaviour prior to
2e47f35be5dc.

This avoids a build failure that occurs otherwise, where compilation
fails looking for a libllvmprivate.so that was not built.

It is unclear if this addresses the issue in all instances---some
replies in the PRs indicate otherwise. Still, some report success, and
in my own testing this fixed creation of a cross-compiled poudriere
jail. Commit this while we continue to investigate...

PR:             286710, 291409
Tested by:      marck, rdunkle at smallcatbrain.com
Reviewed by:    emaste
MFC after:      3 days
Fixes:  2e47f35be5dc ("Convert libllvm, libclang and liblldb into private shared libraries").

    [4 lines not shown]
DeltaFile
+1-0Makefile.inc1
+1-01 files

FreeBSD/ports 914fdd0www/gohugo distinfo Makefile

www/gohugo: Update to 0.155.1

ChangeLog: https://github.com/gohugoio/hugo/releases/tag/v0.155.1

 * Fix image DecodeConfig regression of WebP images from file cache
 * resources/images: Fix WebP useSharpYuv being ignored
 * tpl/tplimpl: Remove failing Twitter tests
DeltaFile
+5-5www/gohugo/distinfo
+1-1www/gohugo/Makefile
+6-62 files

LLVM/project c586271llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU][SIInsertWaitcnts][NFC] Introduce WaitEventSet container for events (#178511)

Before this patch WaitEventType events used to be collected in unsigned
integers that were used as small bit vectors.

This patch introduces a WaitEventSet container class to replace the
integer bit vectors with a class that hides the implementation of common
operations like insertion, removal, union, intersection etc. from the
user.

The WaitEventSet API matches that of a set and not a vector because we
don't care about the order of its contents. Internally though it is
still a bit vector that uses an unsigned integer as its storage, just
like the original implementation.

This patch should not change the functionality.
DeltaFile
+149-65llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+149-651 files

LLVM/project 494079allvm/lib/Target/AMDGPU GCNSchedStrategy.cpp

Cast to wider type
DeltaFile
+3-3llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+3-31 files

LLVM/project baf1d46llvm/lib/Target/AMDGPU GCNSchedStrategy.cpp GCNSchedStrategy.h, llvm/test/CodeGen/AMDGPU debug-value-scheduler.mir sema-v-unsched-bundle.ll

Squashed changes
DeltaFile
+43-50llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+6-2llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+2-2llvm/test/CodeGen/AMDGPU/debug-value-scheduler.mir
+1-1llvm/test/CodeGen/AMDGPU/sema-v-unsched-bundle.ll
+52-554 files

LLVM/project bf8f6d8llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.fma.legacy.ll

[AMDGPU][GlobalISel] Add RegBankLegalize rules for fma_legacy (#178759)

DeltaFile
+27-3llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
+4-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+31-32 files

LLVM/project b73122dllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 minbw-bitcast-to-fp.ll

[SLP]Cast incoming value to a propr type for int nodes, bitcasted to fp

Before casting the value to FP type, need to check, if the type for
reduced during minbitwidth analysis and need to restore the original
source type to generate correct bitcast operation.

Fixes #178884
DeltaFile
+52-0llvm/test/Transforms/SLPVectorizer/X86/minbw-bitcast-to-fp.ll
+7-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+59-02 files

LLVM/project 5d01a0aclang/lib/DependencyScanning DependencyScannerImpl.cpp, clang/lib/Tooling DependencyScanningTool.cpp

[clang][Modules] Fixing Incorrect Diagnostics Issued during By-name Dependency Scanning (#178542)

The by-name lookup API uses the same diagnostics engine and consumer for
multiple lookups. When multiple lookups fail, the diagnostics could be
incorrect for all but the first failing lookup. All the subsequent
failing lookups inherit the diagnostics from the first failing lookup.

This PR resets the diagnostics consumer's buffer and the
CompilerInstance's diagnostics engine for each by-name lookup, so each
lookup can produce the correct diagnostics.

Part of work for rdar://136303612.
DeltaFile
+52-0clang/test/ClangScanDeps/modules-full-by-mult-mod-names-diagnostics.c
+5-0clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+3-0clang/lib/Tooling/DependencyScanningTool.cpp
+0-1clang/tools/clang-scan-deps/ClangScanDeps.cpp
+60-14 files

FreeBSD/ports 972cee2security/netbird distinfo Makefile

security/netbird: Update to 0.64.3

PR:             292826
DeltaFile
+5-5security/netbird/distinfo
+1-1security/netbird/Makefile
+6-62 files

LLVM/project 8fa695allvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.prng.ll

[AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_prng_b32 (#178741)

DeltaFile
+4-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+2-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.prng.ll
+6-22 files

LLVM/project c329074llvm/lib/MC/MCParser MasmParser.cpp

[perf] Replace copy-assign by move-assign in llvm/lib/MC/* (#178176)

DeltaFile
+1-1llvm/lib/MC/MCParser/MasmParser.cpp
+1-11 files

LLVM/project 8029699llvm/lib/Target/AMDGPU GCNSchedStrategy.cpp GCNSchedStrategy.h

[AMDGPU][Scheduler] Make `finalizeGCNRegion` an overridable hook (NFC) (#177199)

This allows individual stages to make decisions after re-scheduling
individual regions.
DeltaFile
+2-4llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+3-3llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+5-72 files

pfSense/pfsense da0ab2bsrc/usr/local/www/widgets/widgets system_information.widget.php

Log errors when checking for system updates
DeltaFile
+2-0src/usr/local/www/widgets/widgets/system_information.widget.php
+2-01 files

LLVM/project bc73157llvm/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/test/Transforms/InstCombine assume.ll assume-loop-align.ll

Revert "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)"

This reverts commit b74e1bca6d77b3de5c05822d1631006ce2a30cc6.
Makes clang assert:
https://github.com/llvm/llvm-project/pull/177597#issuecomment-3824553291
DeltaFile
+48-16llvm/test/Transforms/InstCombine/assume.ll
+8-2llvm/test/Transforms/InstCombine/assume-loop-align.ll
+4-1llvm/test/Transforms/InstCombine/assume_inevitable.ll
+2-1llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+62-204 files

FreeBSD/src 3eac385share/man/man5 src.conf.5

src.conf.5: Regen after addition of MK_SOUND

A description for WITHOUT_SOUND is still missing though.

(cherry picked from commit 3f2f3c52e6f192df435bdb5861018402ec1167d0)
DeltaFile
+6-0share/man/man5/src.conf.5
+6-01 files

OpenBSD/ports mX3v3xtdevel/jdk/17 Makefile, devel/jdk/17/patches patch-src_jdk_jdwp_agent_unix_native_libjdwp_exec_md_c

   * Use closefrom(2) in libjdwp/exec_md.c
   * Update URLS to use https
VersionDeltaFile
1.1+29-0devel/jdk/21/patches/patch-src_jdk_jdwp_agent_unix_native_libjdwp_exec_md_c
1.1+29-0devel/jdk/17/patches/patch-src_jdk_jdwp_agent_unix_native_libjdwp_exec_md_c
1.1+15-0devel/jdk/25/patches/patch-src_jdk_jdwp_agent_unix_native_libjdwp_exec_md_c
1.14+3-2devel/jdk/21/Makefile
1.40+3-2devel/jdk/17/Makefile
1.7+3-2devel/jdk/25/Makefile
+82-61 files not shown
+83-77 files

FreeBSD/src 33c49c3libexec/rc rc.conf

Set virtual_oss_enable="NO" in /etc/defaults/rc.conf

This prevents 'service -e' from emitting (/var/log/messages):

/usr/sbin/service: WARNING: $virtual_oss_enable is not set properly - see rc.conf(5)

Pull Request:   https://github.com/freebsd/freebsd-src/pull/1987
Reviewed by:    christos
Signed-off-by:  eborisch at gmail.com
MFC after:      1 week

(cherry picked from commit 1b2d495a24c36d81b14178a2f898025946bff2d8)
DeltaFile
+1-0libexec/rc/rc.conf
+1-01 files