Illumos/gate d9ace91usr/src/cmd/zdb zdb.c

18253 zdb: output refcounts from verify_spacemap_refcounts()
Reviewed by: Gordon Ross <Gordon.W.Ross at gmail.com>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+36-21usr/src/cmd/zdb/zdb.c
+36-211 files

LLVM/project 54bfea0llvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG switch-simplify-default.ll

Revert "[SimplifyCFG] Simplify switch default branch when branch proves opera…"

This reverts commit abe757bd5dfd91718858402375d99152592ab73a.
DeltaFile
+0-297llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll
+0-41llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+0-3382 files

LLVM/project 7d39826.github/workflows release-documentation.yml

workflows/release-documentation: Fix indentation (#211319)

Introduced by 8ad500f6f7d7347ca097d9c442fbf4a0f604dc26.
DeltaFile
+6-6.github/workflows/release-documentation.yml
+6-61 files

LLVM/project 54a0f73llvm/lib/Target/AArch64 AArch64Processors.td, llvm/test/tools/llvm-mca/AArch64/Cortex A78-basic-instructions.s A76-basic-instructions.s

[AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (#211209)

We do not have native scheduling models for some of the Cortex-A
generations of CPUs, so they were still using the old Cortex-A57 model.
Whilst not perfectly accurate, the NeoverseN1 and NoeverseN2 scheduling
models should be a better fit for these CPUs. I mostly just tried to
make sure the number of pipelines matches between the neoverse core and
the cortex core. If we need something more accurate then we can start
adding new models for the CPUs.
DeltaFile
+46-0llvm/test/tools/llvm-mca/AArch64/Cortex/A78-basic-instructions.s
+38-0llvm/test/tools/llvm-mca/AArch64/Cortex/A76-basic-instructions.s
+13-6llvm/lib/Target/AArch64/AArch64Processors.td
+97-63 files

LLVM/project 55d008cllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU uaddsat.ll

[AMDGPU] Lower uniform uaddsat.i16 to SALU instructions

Promote uniform i16 uadd.sat to i32 in promoteUniformOpToI32 so it
lowers to SALU (s_add_i32 + s_min_u32) instead of VALU + readfirstlane.
The saturating add on zero-extended operands reduces to
umin(add(lhs, rhs), 0xffff).

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+64-60llvm/test/CodeGen/AMDGPU/uaddsat.ll
+10-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+75-623 files

LLVM/project 5961fe3llvm/test/CodeGen/AMDGPU uaddsat.ll

[AMDGPU] Add tests for uniform uaddsat.i16 (NFC)

Precommit tests covering uniform (SALU) uadd.sat for i16 and vector
i16 (v2i16, v3i16, v4i16) using the amdgpu_ps calling convention so
results are returned in SGPRs. These currently lower to VALU
(v_add_u16 clamp / v_pk_add_u16 clamp + v_readfirstlane).

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+239-0llvm/test/CodeGen/AMDGPU/uaddsat.ll
+239-01 files

LLVM/project 9b0e63aclang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp, clang/test/CIR/Transforms/abi-lowering indirect-byval.cir

[CIR] Rewire byref args to the incoming pointer (#210836)

The CallConvLowering body rewrite for Indirect arguments treats byval
and
byref the same way: it inserts a cir.load at function entry and reroutes
body
uses to the loaded value. For byref — a non-trivially-copyable type
passed by
pointer — that entry load is a byte-copy, so the callee works on a local
copy
instead of the caller's storage. That breaks types whose representation
embeds
self-referential pointers: libstdc++'s SSO std::string keeps _M_p
pointing at
its own _M_local_buf, and a byte-copy leaves the copy's _M_p aliasing
the
source's buffer.

This mirrors the sret return fix in insertSRetStores. For byref only,

    [15 lines not shown]
DeltaFile
+59-16clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+61-5clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
+120-212 files

LLVM/project 30878c1utils/bazel/llvm-project-overlay/lldb BUILD.bazel

[bazel] Add os select for plugin process on Initialization target to add windows (#211276)

Another small piece of windows build support for LLDB in bazel.
Internally at Meta, our buck2 rule for this has a split for mac/linux
with PluginProcessPOSIX and windows with PluginProcessWindowsCommon. So
this should be a no-op for existing linux & mac builds while setting up
a bit more for windows.

I have no bazel build set up locally, so will wait on CI to confirm no
regression.
bazel rule creation assisted with claude
DeltaFile
+8-2utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+8-21 files

LLVM/project 9659d3amlir/lib/Dialect/OpenACC/Transforms ACCCGToGPU.cpp, mlir/test/Dialect/OpenACC acc-cg-to-gpu-privatize-threadprivate.mlir

[mlir][OpenACC] Forward dynamic boxed reduction extents (#211318)

Example:
```fortran
subroutine reduce(a, x, n)
  integer :: n, i
  real :: a(:), x(:)

  !$acc parallel loop reduction(+:a)
  do i = 1, n
    a(:) = a(:) + x(i)
  end do
end subroutine
```

`ACCCGToGPU` represents each gang/thread-private array as a dynamically
offset `memref.subview`. Converting this subview directly to a FIR
pointer-like type loses the memref offset, causing different private
copies to alias the same storage.

    [34 lines not shown]
DeltaFile
+31-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-privatize-threadprivate.mlir
+11-4mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+42-42 files

NetBSD/src xdQYkMzsys/dev/raidframe rf_disks.c

   PR kern/60477

   Use the right assertions to ensure that all IOs are suspended.
   zero indicates that IOs resume.
VersionDeltaFile
1.96+3-3sys/dev/raidframe/rf_disks.c
+3-31 files

LLVM/project 36684a1clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp

address comments
DeltaFile
+9-9clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+9-91 files

LLVM/project 7f1aca5llvm/lib/Bitcode/Reader MetadataLoader.cpp, llvm/test/Bitcode DIGlobalVariableExpression.ll DIGlobalVariableExpression2.ll

[DebugInfo] Avoid duplicate DIGlobalVariableExpression during upgrade (#190616)

During bitcode upgrades, if an old DIGlobalVariable is encountered that
contained a DIExpression, a DIGlobalVariableExpression is created for
it. This could happen multiple times. As described in
https://reviews.llvm.org/D26769, it is valid for a DIGlobalVariable to
have multiple DIGlobalVariableExpressions, but the use case for this is
a location that cannot be represented in a single DIExpression, not a
redundant restatement of the same DIExpression.
DeltaFile
+21-8llvm/lib/Bitcode/Reader/MetadataLoader.cpp
+9-9llvm/test/Bitcode/DIGlobalVariableExpression.ll
+1-2llvm/test/Bitcode/DIGlobalVariableExpression2.ll
+31-193 files

NetBSD/pkgsrc 2OdZCpzdoc CHANGES-2026

   doc: Updated multimedia/dav1d to 1.5.4
VersionDeltaFile
1.4677+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc XOqPU22multimedia/dav1d distinfo Makefile

   multimedia/dav1d: Update to 1.5.4

   Changelog:
   dav1d 1.5.4 'Sonic'

   1.5.4 is a minor release of dav1d, focused on optimizations and maintenance:

       Support for OS/2, including API exports and assembly
       Switch to external checkasm
       Add Armv9.3-A GCS (Guarded Control Stack) support
       AArch64: optimize ipred_v, ipred_h and ipred_smooth_* 8bpc functions, and reduce .text size
       ARM32: optimize prep_neon
       RISC-V: ipred_(dc, h, v, pal) optimizations for 8 and 16bpc, generate_grain_y for 8bpc, and optimizations (prep/put_8tap, 6-tap and copy paths)
       Portability improvements for non-POSIX systems (signal() fallback)
       Schedule tile tasks for all passes at once, improving threading
       Precompute the quantization matrix tables at build time
       Move loop-invariant computations out of hot loops
VersionDeltaFile
1.19+4-4multimedia/dav1d/distinfo
1.19+2-2multimedia/dav1d/Makefile
+6-62 files

FreeNAS/freenas 7dd30f8src/middlewared/middlewared/apps webshell_app.py

webshell: fix silent reader/writer thread death and fd lifecycle

login(1) hangs up and reopens its tty at session start: pty_close()
of the vhangup'd slave sets TTY_OTHER_CLOSED on the master and wakes
its readers, so os.read() returned EIO until pty_open() cleared the
flag on reopen. The reader treated any read error as fatal and
exited; the shell kept running with no output forwarded. Treat
read/write EIO as fatal only when the child is gone; retry with 50ms
backoff.

abort() closed master_fd while the reader/writer threads still used
the fd number, so a recycled number (e.g. the next session's
forkpty) could receive their I/O. abort() now only signals and kills
the child; run() reaps it, joins both threads, then closes
master_fd. A post-fork check covers abort() racing the fork.

Catch BaseException in both threads: Future.result() raises
asyncio.CancelledError, which except Exception missed, killing the
thread with no log.
DeltaFile
+59-34src/middlewared/middlewared/apps/webshell_app.py
+59-341 files

LLVM/project e19eb38llvm/include/llvm/IR RuntimeLibcalls.td, llvm/lib/CodeGen TargetLoweringBase.cpp

RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (#211251)

Avoid defining synthetic LibcallImpls just to match the use
case of the legalizer. __aeabi_?cmpeq returns a boolean for
ordered-equal and  was defined twice with __oeq/__une enum
suffixes so the one symbol could serve both OEQ and UNE.
Replace each pair with a single unsuffixed impl providing only
OEQ. The legalizer can directly invert it without the dummy entry.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+5-9llvm/include/llvm/IR/RuntimeLibcalls.td
+2-8llvm/lib/CodeGen/TargetLoweringBase.cpp
+9-0llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+4-2llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+20-194 files

LLVM/project 58d2ec6mlir/include/mlir-c Rewrite.h, mlir/lib/Bindings/Python Rewrite.cpp

[mlir-c] Add TypeConverter materialization; use a status enum for the type conversion callback (#208934)

Continues the buildout of the dialect-conversion C bindings (follows
#206146 and #206161).

- Exposes `TypeConverter::addSourceMaterialization` and
`addTargetMaterialization` through the MLIR C API.
- Introduces `MlirTypeConverterConversionStatus`
(`Success`/`Failure`/`Declined`) and switches
`MlirTypeConverterConversionCallback` to return it, replacing the old
`MlirLogicalResult` + `MlirType{NULL}` dual sentinel. The old convention
could not distinguish the C++ decline (`std::nullopt`, try the next
conversion) and hard-failure (`failure()`, stop) states; the enum maps
cleanly to all three. The Python binding and C API test are updated
accordingly.

Assisted by: Claude
DeltaFile
+288-3mlir/test/CAPI/rewrite.c
+57-7mlir/lib/CAPI/Transforms/Rewrite.cpp
+46-6mlir/include/mlir-c/Rewrite.h
+3-3mlir/lib/Bindings/Python/Rewrite.cpp
+394-194 files

LLVM/project 045c898libcxx/test/std/ranges/range.adaptors/range.transform/iterator sentinel.pass.cpp, libcxx/test/std/ranges/range.adaptors/range.transform/sentinel sentinel.pass.cpp

[libc++][NFC] Format and move `transform_view`'s `sentinel.pass.cpp` (#211252)

As a pre-requisite to: https://github.com/llvm/llvm-project/pull/193891
DeltaFile
+64-0libcxx/test/std/ranges/range.adaptors/range.transform/sentinel/sentinel.pass.cpp
+0-64libcxx/test/std/ranges/range.adaptors/range.transform/iterator/sentinel.pass.cpp
+64-642 files

LLVM/project 03e15b9llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp, llvm/test/CodeGen/AMDGPU vsrc-simplify-asynccnt.mir

[AMDGPU] Track async events for vm_vrsc simplifications

Change-Id: Ib8f6c7f73b440b90c80da191ba52980c1f216122
DeltaFile
+2-2llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+1-0llvm/test/CodeGen/AMDGPU/vsrc-simplify-asynccnt.mir
+3-22 files

NetBSD/pkgsrc KFDDcordoc CHANGES-2026

   doc: Updated print/LaTeXML to 0.8.8
VersionDeltaFile
1.4676+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc vfNil45print/LaTeXML distinfo Makefile

   print/LaTeXML: Update to 0.8.8

   Changelog:
   0.8.8 2024-02-29
         - This release addresses a large variety of usability, fidelity, robustness,
           portability and output-quality issues.
         - Improved CSS, html, accessibility affecting
           * framing, position & rotation, color
           * figure/subfigure grouping
         -  MathML (closer to MathML Core)
            * avoid gratuitous math mode (simple sub/superscripts); mathvariant
            * option to avoid InvisibleTimes, when not certain (--noinvisibletimes)
         - Improved emulation of TeX internals affecting
           registers, \chardef, accents, intarray, tracing
         - More TeX-like "scanning" of tokens affecting
           * expansion, input,
           * alignments (\halign,tabular)
         - improved block mode processing
           * affecting \parbox, {minipage}, \centering, \raggedright/left

    [186 lines not shown]
VersionDeltaFile
1.4+4-4print/LaTeXML/distinfo
1.16+4-3print/LaTeXML/Makefile
+8-72 files

LLVM/project 82db62bllvm/test/CodeGen/AMDGPU vsrc-simplify-asynccnt.mir

Precommit test to show impact

Change-Id: Ia835c90c2087d3e7453917a1f62c0d2d7f27d531
DeltaFile
+30-0llvm/test/CodeGen/AMDGPU/vsrc-simplify-asynccnt.mir
+30-01 files

LLVM/project dbaabbclibunwind/test aix_vapi_signal_unwind.pass.cpp

[libunwind][test][AIX] Add C API test for unwinding from AIX VAPI (as signal handler) (#209662)

Further to https://github.com/llvm/llvm-project/pull/209306, test a case
where a signal handler is a Virtual API function triggered synchronously
while the VAPI is not active. Resuming an ancestor context of the signal
frame should call the VAPI return glue.

---------

Assisted-by: IBM Bob
DeltaFile
+115-0libunwind/test/aix_vapi_signal_unwind.pass.cpp
+115-01 files

LLVM/project 5546408flang/lib/Semantics check-omp-structure.cpp check-omp-structure.h, llvm/include/llvm/Frontend/OpenMP OMP.td

[flang][OpenMP] Switch TableGen generation to use llvm::EnumSet

Replace the remaining uses of the common::EnumSet-based OmpClauseSet to
llvm::omp::ClauseSet.
DeltaFile
+21-24flang/lib/Semantics/check-omp-structure.cpp
+3-8flang/lib/Semantics/check-omp-structure.h
+1-1llvm/include/llvm/Frontend/OpenMP/OMP.td
+25-333 files

LLVM/project 7c761d4flang/lib/Semantics check-directive-structure.h check-omp-structure.cpp

[flang] Provide "clause set" type as parameter to DirectiveStructureChecker

This will remove the hardcoded dependence of DirectiveStructureChecker on
the common::EnumSet class. Both consumers of it will be able to use their
own type for the clause set.

The only complication was the ClauseSetToString member function, whose
implementation depended on the specifics of common::EnumSet, namely the
IterateOverMembers member function. It was moved out of the class, and
turned into a function template to make it possible to provide different
specializations for common::EnumSet and llvm::EnumSet.
DeltaFile
+59-75flang/lib/Semantics/check-directive-structure.h
+14-1flang/lib/Semantics/check-omp-structure.cpp
+12-0flang/lib/Semantics/check-acc-structure.cpp
+5-1flang/lib/Semantics/check-acc-structure.h
+5-1flang/lib/Semantics/check-omp-structure.h
+95-785 files

LLVM/project c221cedflang/include/flang/Semantics openmp-directive-sets.h, flang/lib/Lower/OpenMP OpenMP.cpp

[flang][OpenMP] Use llvm::omp::DirectiveSet instead of common::EnumSet

Replace uses of OmpDirectiveSet (defined in terms of common::EnumSet)
with the common llvm::omp::DirectiveSet (defined via llvm::EnumSet).

The llvm::omp::DirectiveSet class will also be used in openmp-parsers,
where OmpDirectiveSet was an instance of llvm::Bitset.
DeltaFile
+58-60flang/include/flang/Semantics/openmp-directive-sets.h
+23-24flang/lib/Lower/OpenMP/OpenMP.cpp
+21-23flang/lib/Parser/openmp-parsers.cpp
+10-9flang/lib/Semantics/check-omp-structure.cpp
+2-2flang/lib/Semantics/check-omp-structure.h
+1-1flang/lib/Semantics/check-omp-loop.cpp
+115-1191 files not shown
+117-1197 files

LLVM/project 1b63b6eflang/include/flang/Semantics symbol.h, flang/lib/Semantics resolve-directives.cpp check-omp-structure.h

[flang][OpenMP] Use llvm::omp::ClauseSet instead of common::EnumSet

Replace uses of OmpClauseSet (defined in terms of common::EnumSet)
with the common llvm::omp::ClauseSet (defined via llvm::EnumSet).
DeltaFile
+18-19flang/lib/Semantics/resolve-directives.cpp
+17-14flang/include/flang/Semantics/symbol.h
+10-9flang/lib/Semantics/check-omp-structure.h
+8-9flang/lib/Semantics/symbol.cpp
+5-5flang/lib/Semantics/mod-file.cpp
+3-3flang/lib/Semantics/check-omp-structure.cpp
+61-593 files not shown
+66-619 files

NetBSD/pkgsrc x74fPGrinputmethod/ibus Makefile

   ibus: add kludge to fix bulk build on NetBSD/amd64 10.0

   See PR pkg/60476 for details.
   XXX: still fails on builds on hosts with xserver set using official gtk3
        binary package
VersionDeltaFile
1.124+5-2inputmethod/ibus/Makefile
+5-21 files

LLVM/project f266ca1llvm/docs DirectXUsage.rst, llvm/docs/DirectX SemanticSignatures.md

[HLSL][Docs] Add metadata description of semantic signatures (#206804)

Adds docs of semantic signatures from the proposal.

Resolves https://github.com/llvm/llvm-project/issues/204877
DeltaFile
+127-0llvm/docs/DirectX/SemanticSignatures.md
+1-0llvm/docs/DirectXUsage.rst
+128-02 files

LLVM/project 95ffe16llvm/lib/Target/AMDGPU BUFInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll

[AMDGPU] Support i16 element types for tbuffer D16 load/store (#201420)

Detect D16 by element bit width rather than matching f16 specifically,
so integer i16 elements take the same packed/unpacked path
DeltaFile
+247-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
+118-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
+56-26llvm/lib/Target/AMDGPU/BUFInstructions.td
+4-4llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+425-304 files