[CodeGen] Pass the correct VT into hasMultipleConditionRegisters (#204375)
hasMultipleConditionRegisters expects the type of the condition value.
Fix shouldNormalizeToSelectSequence to pass this in instead of the type
of the result of a select.
In practice this makes no observable difference yet. AArch64 is the only
target that uses the VT passed into hasMultipleConditionRegisters and it
only checks whether or not it is a scalable vector type.
[lldb] Support weakly imported symbols with arm64e (#202728)
The use of weakly imported symbols may introduce inline CPAs into
functions in the form of instruction operands. For example, from
TestWeakSymbols.py, we may see IR that looks like this:
```
%cmp = icmp ne ptr ptrauth (ptr @_Z20absent_weak_functionv, i32 0), null
```
which corresponds to this C line:
```
if (&absent_weak_function != null) {
```
Similar to walking global initializers, LLDB must also walk all
instructions looking for CPAs in instruction operands and handle them
accordingly.
I've renamed functions and structs to distinguish between these two
scenarios.
Merge tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull arm SoC code updates from Arnd Bergmann:
"The largest addition here is the revived support for the ZTE ZX SoC
platform, though this mostly documentation.
The other changes are code cleanups that deal with continued
conversion of the GPIO library away from GPIO numbers to descriptors
and a few minor bugfixes"
* tag 'soc-arm-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: Add Axiado reviewer and Maintainers
ARM: remove the last few uses of do_bad_IRQ()
ARM: imx31: Fix IIM mapping leak in revision check
ARM: imx3: Fix CCM node reference leak
ARM: orion5x: update board check in mss2_pci_init() to use the DT
arm: mvebu_v5_defconfig: remove stale MACH_LINKSTATION_LSCHL reference
ARM: mvebu: simplify of_node_put calls
ARM: mvebu: drop unnecessary NULL check
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Merge tag 'soc-defconfig-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC defconfig updates from Arnd Bergmann:
"The main change this time is a cleanup series from Krzysztof Kozlowski
that updates the defconfig files to be more in sync with changes to
the Kconfig files that moved options around or removed the completely.
In addition, a number of drivers get enabled, in order to support more
hardware out of the box, as usual"
* tag 'soc-defconfig-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: defconfig: enable BST SDHCI controller
arm64: configs: Update defconfig for AST2700 platform support
ARM: multi_v7_defconfig: Enable dma-buf heaps
ARM: configs: Drop duplicated CONFIG_EXT4_FS
arm64: defconfig: Enable DP83822 PHY driver
ARM: configs: at91: sama7: add sama7d65 i3c-hci
arm64: defconfig: Enable PCI M.2 power sequencing driver
arm64: defconfig: Enable CIX Sky1 pinctrl, PCIe host, and Cadence GPIO
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mlx5en: guard against empty eth_proto_oper mask
eth_proto_oper is used to derive the active media mode, but an empty
mask leaves no valid bit for ilog2() to consume. Treat this as an
invalid carrier update, reset the active media state, and report the
unexpected PTYS value.
Reviewed by: kib
Tested by: Wafa Hamzah <wafah at nvidia.com>
MFC after: 1 week
Sponsored by: NVIDIA Networking
libmlx5: sync PCI device allowlist with mlx5_core_pci_table
Userspace mlx5_driver_init() only attached when vendor/device matched
hca_table, while the kernel already probed additional Mellanox PCI IDs
That mismatch prevented libibverbs from loading the mlx5 provider on
those HCAs.
Extend hca_table to mirror mlx5_core_pci_table and add cross-references
so future kernel ID additions are paired with a userspace update.
Reviewed by: kib
Tested by: Wafa Hamzah <wafah at nvidia.com>
Sponsored by: Nvidia networking
MFC after: 1 week
RDMA: Fix link active_speed size
According to the IB spec active_speed size should be u16 and not u8 as
before. Changing it to allow further extensions in offered speeds.
Linux commit:
376ceb31ff87 RDMA: Fix link active_speed size
Reviewed by: kib
Tested by: Wafa Hamzah <wafah at nvidia.com>
MFC after: 1 week
Sponsored by: NVIDIA Networking
Differential revision: https://reviews.freebsd.org/D57084
Merge tag 'soc-drivers-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"There are a few added drivers, but mostly the normal maintenance to
drivers for firmware, memory controller and other soc specific
hardware:
- The NXP QuickEngine gets modern MSI support, which allows some
cleanups to the GICv3 irqchip chip driver
- A new SoC specific driver for the Renesas R-Car MFIS unit is added,
encapsulating support for the on-chip mailbox and hwspinlock
implementations that are not easily separated into individual
drivers
- The Qualcomm SoC drivers add support for additional SoC
implementations, and flexibility around power management for the
serial-engine driver as well as probing the LLCC driver using
custom hardware descriptions inside of the device itself.
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[lldb][NFC] Remove const char * from ProcessInfo interface (#204268)
My primary reason for doing this is so that I can refactor FileSpec's
interface to stop using ConstStrings. But more generally StringRef is
sufficient for ProcessInfo's needs. Any spot that actually needs an
actual `const char *` can create one from the StringRef.
[lldb] Adjust ptr_refs utility for arm64e (#204258)
The ptr_refs utility is a useful way to find where a pointer may be used
on Darwin platforms. It supports searching on the stack, the heap, and
in segments. The definitions of malloc_introspection_t and malloc_zone_t
needed to be adjusted for arm64e. This matches the malloc header shipped
in the the malloc headers shipped in Apple's SDKs.
With this, TestPtrRefs.py and TestPtrRefsObjC.py now pass.
Merge tag 'soc-dt-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are fewer devicetree updates this time that the last few ones,
with five SoC types getting added:
- Qualcomm Dragonwing IPQ9650 is a new wireless networking SoC using
four Cortex-A55 and one Cortex-A78 core, which is a significant
upgrade from older generations
- ZTE zx297520v3 is an older low-end wireless SoC using a single
Cortex-A53 core, which so far can only run 32-bit kernels. This
brings back the ZX family of chips that was removed in 2021 after
support for the original zx296702 and zx296718 chips was never
completed.
- Renesas R-Car M3Le (R8A779MD) is a variant of the R-Car M3-N
(R8A77965) automotive SoC.
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net/telemt: New port: MTProxy for Telegram on Rust + Tokio
Telemt is a fast, secure, and feature-rich server written in Rust:
it fully implements the official Telegram proxy algo and adds many
production-ready improvements such as connection pooling, replay
protection, detailed statistics, masking from "prying" eyes.
PR: 293318
Credits: Igor Pavlov <igor.arabesc.pavlov at gmail.com>
(for helping to improve daemon service)
Approved by: osa, vvd (Mentors, implicit)
