LLVM/project 6060731flang/lib/Semantics mod-file.cpp, flang/test/Semantics modfile84.f90

Revert "[flang][cuda][openacc] Emit an error when CUDA symbols are imported w…"

This reverts commit a6986f0b929d575728d564cd41bb0f9a6b6fdea4.
DeltaFile
+0-29flang/lib/Semantics/mod-file.cpp
+0-17flang/test/Semantics/modfile84.f90
+0-462 files

FreeBSD/ports 5348884databases/pg_textsearch distinfo Makefile

databases/pg_textsearch: Update to 1.3.1
DeltaFile
+3-3databases/pg_textsearch/distinfo
+1-1databases/pg_textsearch/Makefile
+1-0databases/pg_textsearch/pkg-plist
+5-43 files

LLVM/project cdfd1e0llvm/lib/Passes PassRegistry.def, llvm/lib/Transforms/Scalar SROA.cpp

Patch tryCanonicalizeStructToVector to handle split slice tails (#201434)

We choose a vector alloca over a struct alloca when all users of the
alloca are memory or lifetime intrinsics. But we only accounted for
slices that start in the corresponding partition. We have to also check
that all split slice tails overlapping the partition are memory or
lifetime intrinsics

I also updated the `PassRegistry.def` to include the new pass option
because we forgot to add that.
DeltaFile
+44-0llvm/test/Transforms/SROA/struct-to-vector-subpartition.ll
+14-7llvm/lib/Transforms/Scalar/SROA.cpp
+1-1llvm/lib/Passes/PassRegistry.def
+59-83 files

LLVM/project 53fec04mlir/lib/Dialect/Arith/Transforms IntRangeOptimizations.cpp, mlir/test/Dialect/Arith int-range-opts-crash.mlir

[mlir][arith] Fix APInt bitwidth mismatch crash in int-range-optimizations (#205110)

Fixes https://github.com/llvm/llvm-project/issues/204909

When an op's `areTypesCompatible()` hook accepts integers of different
widths across a region boundary, the range analysis can propagate a
constant range whose APInt bitwidth does not match the IR type of the
destination value.
This caused `IntegerAttr::get` to `assert` in
`maybeReplaceWithConstant`.

Fix by bailing out in `maybeReplaceWithConstant` when the bitwidths
mismatch, and adding the same check to the needsReplacing lambda in
matchAndRewrite.

The second guard is necessary to mirror the existing isIntOrIndex()
guard — without it the pattern claims success without changing the IR,
causing the greedy rewrite driver to loop.


    [14 lines not shown]
DeltaFile
+22-7mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
+14-0mlir/test/Dialect/Arith/int-range-opts-crash.mlir
+36-72 files

FreeBSD/doc 01bfc34website/content/en administration.adoc, website/content/en/releases/11.1R relnotes.adoc

website: Fix some anchor typos

These typos were revealed by passing verbose to asciidoctor.
DeltaFile
+4-4website/content/en/releases/11.1R/relnotes.adoc
+2-1website/content/en/releases/9.1R/relnotes-detailed.adoc
+1-1website/content/en/releases/15.1R/installation.adoc
+1-1website/content/en/releases/15.1R/upgrading.adoc
+1-1website/content/en/releases/9.1R/hardware.adoc
+1-1website/content/en/administration.adoc
+10-92 files not shown
+11-118 files

FreeBSD/doc a6c9e2cwebsite hugo.toml

website: Turn on verbose asciidoctor build

This shows a lot of typos in anchors. Enable it globally so
people see the typos as they are making them and can fix them.
DeltaFile
+1-0website/hugo.toml
+1-01 files

LLVM/project de1effcllvm/lib/Target/RISCV RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV][P-ext] Rename pwcvt/pncvt pseudoinstructions for RV64. (#205227)

We need to add a 'w' to the suffix to indicate it operates on a word and
not a register pair like on RV32. See https://github.com/riscv/riscv-p-spec/pull/303
DeltaFile
+28-18llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+16-16llvm/test/MC/RISCV/rv64p-aliases-valid.s
+8-9llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+4-4llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+56-474 files

LLVM/project 4150a78llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes VecPassBase.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes BottomUpVec.cpp TopDownVec.cpp

[SandboxVectorizer] Implement topdown vectorizer

This patch introduces the `top-down-vec` pass to the Sandbox Vectorizer,
adding the ability to traverse use-def chains top-down to discover and
collect vectorization opportunities.

Key changes include:
* TopDownVec Pass: Implemented `TopDownVec` which recursively processes
value bundles top-down, creates vectorization actions (widening, packing,
shuffles), and emits the final vector IR.
* Shared Infrastructure (VecPassBase): Extracted common IR emission logic
out of `BottomUpVec` and into a new shared base class, `VecPassBase`.
Functions for generating vector instructions, handling diamond reuse,
creating shuffles/packs, and collecting dead instructions are now shared
between the bottom-up and top-down vectorizers to prevent code
duplication.
* Pass Registration: Exposed `top-down-vec` in `PassRegistry.def` and
`SandboxVectorizerPassBuilder`, allowing it to be invoked within pass
pipelines via `opt`.

    [3 lines not shown]
DeltaFile
+2-281llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
+262-0llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TopDownVec.cpp
+257-0llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/VecPassBase.cpp
+121-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/VecPassBase.h
+94-0llvm/test/Transforms/SandboxVectorizer/topdown_vec.ll
+68-9llvm/test/Transforms/SandboxVectorizer/pack.ll
+804-2907 files not shown
+923-34613 files

FreeBSD/ports 9fd3388security/osv-scanner distinfo Makefile

security/osv-scanner: Update to 2.4.0

ChangeLog:
https://github.com/google/osv-scanner/releases/tag/v2.4.0
DeltaFile
+5-5security/osv-scanner/distinfo
+2-3security/osv-scanner/Makefile
+7-82 files

LLVM/project b0d6d79llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU packed-fp64.ll

[AMDGPU] Select fneg modifier for v2f64 instructions
DeltaFile
+28-17llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+12-23llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+40-402 files

NetBSD/pkgsrc-wip 2cf9fac. Makefile, py-toposort Makefile PLIST

py-toposort: import 1.10
DeltaFile
+18-0py-toposort/Makefile
+10-0py-toposort/PLIST
+5-0py-toposort/distinfo
+4-0py-toposort/DESCR
+1-1py-xsdata/Makefile
+1-0Makefile
+39-16 files

LLVM/project c91c9fcllvm/include/llvm/Support Allocator.h, llvm/unittests/Support AllocatorTest.cpp

Reland [Allocator] Keep bump pointer at a minimum alignment (#205240)

Reland #203718 (reverted in #205091) by making computation in integer
domain to avoid UB (nullptr + non-zero offset).

Add a `MinAlign` template parameter (default 8, sizeof(size_t) on 64-bit
platforms) so that the common case `Alignment <= MinAlign` can skip
realigning `CurPtr`.

This is achieved by rounding each allocation's size up to MinAlign, so
the bump pointer stays MinAlign-aligned between allocations.

SpecificBumpPtrAllocator::DestroyAll() walks objects at a fixed
sizeof(T) stride and needs tight packing, so it uses MinAlign=1.
(alignof(T) would
pack just as tightly and reuse the default instantiation, but T may be
incomplete here, e.g. `SpecificBumpPtrAllocator<MCSectionELF>`.)

Its `Allocate` still skips the realign: the slab is max_align_t-aligned

    [9 lines not shown]
DeltaFile
+41-17llvm/include/llvm/Support/Allocator.h
+19-0llvm/unittests/Support/AllocatorTest.cpp
+60-172 files

LLVM/project e2765f3llvm/lib/Transforms/IPO OpenMPOpt.cpp, llvm/test/Transforms/Attributor/reduced openmp_opt_constant_type_crash.ll

[OpenMPOpt][Attributor] Selectively seed deglobalization AAs (#198710)

This addresses a compile-time issue observed on a large generated C++
translation unit compiled with `-fopenmp`.

The source code is not OpenMP-heavy. It mainly consists of generated
function-registration wrappers, template instantiations, lambdas, and
small helper functions. However, because the TU is compiled with OpenMP
enabled, `OpenMPOptCGSCCPass` runs and drives Attributor on a module
with many functions.

`OpenMPOpt::registerAAsForFunction` currently eagerly creates the
deglobalization AAs for every function in OpenMP device modules:

* `AAHeapToShared`
* `AAHeapToStack`

Most generated wrapper/helper functions in the motivating workload do
not contain `__kmpc_alloc_shared`, removable allocations, or free-like

    [25 lines not shown]
DeltaFile
+34-13llvm/test/Transforms/Attributor/reduced/openmp_opt_constant_type_crash.ll
+34-10llvm/lib/Transforms/IPO/OpenMPOpt.cpp
+3-3llvm/test/Transforms/OpenMP/single_threaded_execution.ll
+71-263 files

OpenBSD/ports WaM58S5math/4ti2 distinfo Makefile

   update 4ti2 to 1.6.15
VersionDeltaFile
1.5+2-2math/4ti2/distinfo
1.8+1-1math/4ti2/Makefile
+3-32 files

FreeBSD/ports 282457bdatabases/heidisql distinfo Makefile

databases/heidisql: Update to 12.20

ChangeLog at:   https://github.com/HeidiSQL/HeidiSQL/releases
DeltaFile
+3-3databases/heidisql/distinfo
+1-2databases/heidisql/Makefile
+1-0databases/heidisql/pkg-plist
+5-53 files

FreeBSD/ports 811e2d7sysutils/bareos-server distinfo Makefile, sysutils/bareos-traymonitor Makefile

sysutils/bareos-*: update to 25.0.3

ChangeLog at:   https://github.com/bareos/bareos/releases/tag/Release%2F25.0.3
DeltaFile
+3-3www/bareos-webui/distinfo
+3-3sysutils/py-python-bareos/distinfo
+3-3sysutils/bareos-server/distinfo
+2-2sysutils/bareos-server/Makefile
+1-1sysutils/py-python-bareos/Makefile
+1-1sysutils/bareos-traymonitor/Makefile
+13-131 files not shown
+14-147 files

FreeBSD/ports 8e2a152sysutils/bareos24-client Makefile, sysutils/bareos24-server distinfo Makefile

sysutils/bareos24*: Update to 24.0.10

ChangeLog at:   https://github.com/bareos/bareos/releases/tag/Release%2F24.0.10
DeltaFile
+3-3www/bareos24-webui/distinfo
+3-3sysutils/bareos24-server/distinfo
+2-2sysutils/bareos24-server/Makefile
+0-2sysutils/bareos24-client/Makefile
+1-1sysutils/bareos24-traymonitor/Makefile
+1-1www/bareos24-webui/Makefile
+10-126 files

LLVM/project 77879b4llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU s-barrier-signal-var-gep.ll

[AMDGPU] Fold constant offsets into named barrier addresses

Allow isOffsetFoldingLegal to fold a constant offset into an LDS
named-barrier global, and include the node offset when materializing the
LDS address in LowerGlobalAddress. s_barrier_signal_var on a GEP'd named
barrier now selects the immediate form, matching a bare global and GlobalISel.
With object linking the offset folds into the relocation addend.

Change-Id: I639bc723eb001573585cc05d0ad19f2773054f21
Assisted-by: Cursor
DeltaFile
+11-5llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+12-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-5llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+25-113 files

LLVM/project 261d748llvm/test/CodeGen/AMDGPU s-barrier-signal-var-gep.ll

[AMDGPU] Pre-commit test for constant-offset named barrier signal_var

A GEP into a named-barrier array (&bars[1]) lowers s_barrier_signal_var to
the dynamic m0 form on SelectionDAG, unlike the bare global and GlobalISel.
With object linking it emits a runtime add of the offset instead of folding
it into the relocation addend.

Change-Id: I7cea0dd64d050eb3e2143841e7136355cbb3bc50
Assisted-by: Cursor
DeltaFile
+119-0llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+119-01 files

FreeBSD/ports 23ff2bcsysutils/bareos23-server distinfo Makefile, sysutils/bareos23-traymonitor Makefile

sysutils/bareos23*: Update to 23.1.7

ChangeLog at:   https://github.com/bareos/bareos/releases/tag/Release%2F23.1.7
DeltaFile
+3-3sysutils/bareos23-server/distinfo
+3-3www/bareos23-webui/distinfo
+1-1sysutils/bareos23-server/Makefile
+1-1sysutils/bareos23-traymonitor/Makefile
+1-1www/bareos23-webui/Makefile
+9-95 files

LLVM/project 86184abllvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU s-barrier-signal-var-gep-object-linking.ll s-barrier-signal-var-gep.ll

[AMDGPU] Fold constant offsets into named barrier addresses

Allow isOffsetFoldingLegal to fold a constant offset into an LDS
named-barrier global, and include the node offset when materializing the
LDS address in LowerGlobalAddress. s_barrier_signal_var on a GEP'd named
barrier now selects the immediate form, matching a bare global and GlobalISel.
With object linking the offset folds into the relocation addend.

Change-Id: Ie05b8c8cd127604ff174c423a74340fd2de4e405
Assisted-by: Cursor
DeltaFile
+11-5llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+12-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-2llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep-object-linking.ll
+1-2llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+26-104 files

LLVM/project b820eb7llvm/test/CodeGen/AMDGPU s-barrier-signal-var-gep.ll s-barrier-signal-var-gep-object-linking.ll

[AMDGPU] Pre-commit test for constant-offset named barrier signal_var

A GEP into a named-barrier array (&bars[1]) lowers s_barrier_signal_var to
the dynamic m0 form on SelectionDAG, unlike the bare global and GlobalISel.
With object linking it emits a runtime add of the offset instead of folding
it into the relocation addend.

Change-Id: I59f0e6fe6a72b4c96c8efb926610f7f2d3833e38
Assisted-by: Cursor
DeltaFile
+59-0llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+40-0llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep-object-linking.ll
+99-02 files

LLVM/project d853c05clang/include/clang/CIR/Dialect/Builder CIRBaseBuilder.h, clang/lib/CIR/CodeGen CIRGenBuiltin.cpp CIRGenExpr.cpp

[CIR] Add support for __builtin_nontemporal_store and __builtin_nontemporal_load (#197872)

Add nontemporal attribute to cir.load and cir.store ops.
DeltaFile
+77-0clang/test/CIR/CodeGenBuiltins/builtin-nontemporal.cpp
+12-8clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
+18-2clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+8-11clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+9-7clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+7-5clang/lib/CIR/CodeGen/CIRGenBuilder.h
+131-3310 files not shown
+161-4716 files

LLVM/project 1cbfe8bllvm/include/llvm/IR GlobalValue.h, llvm/include/llvm/Transforms/Utils AssignGUID.h

Reland #184065
DeltaFile
+61-17llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+45-30llvm/lib/LTO/LTO.cpp
+64-2llvm/lib/IR/Globals.cpp
+49-3llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+45-5llvm/include/llvm/IR/GlobalValue.h
+49-0llvm/include/llvm/Transforms/Utils/AssignGUID.h
+313-57120 files not shown
+872-416126 files

LLVM/project 9b228b5llvm/lib/Transforms/IPO ThinLTOBitcodeWriter.cpp WholeProgramDevirt.cpp, llvm/test/ThinLTO/X86 devirt_function_alias2.ll

[CFI] Create an external linkage alias instead of promoting internals
DeltaFile
+20-33llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
+20-5llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+10-7llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
+16-0llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+6-4llvm/test/ThinLTO/X86/devirt_function_alias2.ll
+4-2llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
+76-513 files not shown
+83-569 files

FreeBSD/ports 616fe5bx11-drivers/xlibre-xf86-input-joystick Makefile, x11-drivers/xlibre-xf86-input-keyboard Makefile

x11-server/xlibre-server: update to 25.1.8

- Bump PORTREVISION of xlibre-xf86-* ports

ChangeLog at:   https://github.com/X11Libre/xserver/releases/tag/xlibre-xserver-25.1.8
With hat:       xlibre
DeltaFile
+3-3x11-servers/xlibre-server/distinfo
+1-1x11-drivers/xlibre-xf86-input-joystick/Makefile
+1-1x11-drivers/xlibre-xf86-input-keyboard/Makefile
+1-1x11-drivers/xlibre-xf86-input-libinput/Makefile
+1-1x11-drivers/xlibre-xf86-input-mouse/Makefile
+1-1x11-drivers/xlibre-xf86-input-synaptics/Makefile
+8-818 files not shown
+26-2524 files

LLVM/project f519bd9llvm/lib/IR Verifier.cpp, llvm/test/Verifier memprof-metadata-bad.ll

[Verifier] Require !callsite with !memprof metadata (#205053)

Fixes: https://github.com/llvm/llvm-project/issues/181237
DeltaFile
+10-6llvm/test/Verifier/memprof-metadata-bad.ll
+3-0llvm/lib/IR/Verifier.cpp
+13-62 files

Linux/linux 502d801Documentation/filesystems erofs.rst, fs/erofs fscache.c data.c

Merge tag 'erofs-for-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/xiang/erofs

Pull erofs updates from Gao Xiang:
 "The most notable change is the removal of the fscache backend: it has
  been deprecated for almost two years, mainly because EROFS file-backed
  mounts and fanotify pre-content hooks (together with erofs-utils) now
  provide better functionality and simpler codebase. In addition,
  fscache has depended on netfslib for years, which is undesirable for
  EROFS since it is a local filesystem. More details in [1].

  In addition, sparse support has been added to the pcluster layout,
  which is helpful for large sparse AI datasets, and map requests for
  chunk-based inodes have been optimized to be more efficient as well.
  There are also the usual fixes and cleanups.

  Summary:

   - Report more consecutive chunks of the same type for
     each iomap request

    [21 lines not shown]
DeltaFile
+0-664fs/erofs/fscache.c
+72-63fs/erofs/data.c
+65-65Documentation/filesystems/erofs.rst
+20-78fs/erofs/super.c
+3-69fs/erofs/internal.h
+20-27fs/erofs/ishare.c
+180-9667 files not shown
+227-1,03013 files

OpenBSD/src xq6WM2Csys/dev/pci/drm/i915 i915_scatterlist.c

   don't increment scatterlist length twice

   this occurs as sg_dma_len() returns the length member of struct scatterlist
   where as on x86 linux it returns a dma_length member of the struct

   Problem reported by Ryan Fahy in FreeBSD drm-kmod PR 468.

   Avoids a 'Data modified on freelist' panic on boot when using discrete
   Intel cards (DG2).  DG2 has other issues, so remains disabled for now.
VersionDeltaFile
1.6+4-0sys/dev/pci/drm/i915/i915_scatterlist.c
+4-01 files

LLVM/project 8995486llvm/include/llvm/IR IntrinsicsRISCV.td, llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoP.td

[RISCV][P-ext] packed exchanged add/sub codegen (#203473)

Wire up the already-defined exchanged add/sub instructions
pas/psa/psas/pssa/paas/pasa with llvm.riscv.* intrinsics and isel
patterns.
DeltaFile
+174-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+68-2llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+54-0llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+24-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+8-0llvm/include/llvm/IR/IntrinsicsRISCV.td
+328-25 files