LLVM/project 8aaace9clang/docs ReleaseNotes.md, clang/lib/Sema SemaInit.cpp

[clang][Sema] Fix crash when checking scalar type with excess braces (#192471)

`InitListChecker::CheckScalarType()` crashed with multiple nested braces
in scalar initializers (e.g., `int v = {{}, {}, {}};`) due to
out-of-bounds access when retrieving diagnostic location from
uninitialized StructuredList.

Add bounds checking before `getInit(0)` access and add regression test

Fix #137845. Fix #69213. Fix #198767. Fix #207566. Fix #106180.
DeltaFile
+54-0clang/test/Sema/init.c
+11-7clang/lib/Sema/SemaInit.cpp
+1-0clang/docs/ReleaseNotes.md
+66-73 files

LLVM/project 5bf59e2clang/lib/AST/ByteCode ByteCodeEmitter.cpp Function.cpp

[clang][bytecode] Make `SourceMap` a proper class (#215760)

Instead of a typedef. Save offsets and infos separately to speed up the
binary search a bit.
DeltaFile
+25-1clang/lib/AST/ByteCode/Source.h
+1-5clang/lib/AST/ByteCode/Function.cpp
+2-2clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
+28-83 files

LLVM/project 6c16495clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRMemorySlot.cpp

[CIR] Implement PromotableRegionOpInterface for cir.scope

Same treatment as cir.if: a slot read inside a cir.scope no longer needs
the CFG flattened before mem2reg can promote it. The scope region is
entered directly from before the operation, so it sees the reaching
definition unchanged.

cir.scope yields at most one value and may already be using it for the
scope's own result, so regions that store to the slot are refused.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+57-0clang/test/CIR/Transforms/mem2reg-regions.cir
+24-0clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+1-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+82-03 files

LLVM/project f688341clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRMemorySlot.cpp

[CIR] Implement PromotableRegionOpInterface for cir.if

mem2reg gives up on a memory slot as soon as one of its uses lives in a
nested region whose parent op does not implement
PromotableRegionOpInterface. Since no CIR op implements it, promoting a
slot read inside a cir.if required running cir-flatten-cfg first, which
is why clang/test/CIR/Transforms/mem2reg.cir has to flatten before it can
promote anything.

Implement the interface for cir.if. Both regions are entered directly
from before the operation, so both see the same reaching definition.

A definition created inside a region has to leave the operation through
one of its results, and cir.if has none, so isRegionPromotable refuses
regions that store to the slot. Supporting those requires giving cir.if
results and is left for later.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+72-0clang/test/CIR/Transforms/mem2reg-regions.cir
+28-0clang/lib/CIR/Dialect/IR/CIRMemorySlot.cpp
+1-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+101-03 files

LLVM/project 653134fclang/lib/CodeGen/Targets SPIR.cpp, clang/test/CodeGenCUDA amdgpu-kernel-attrs.cu

clang/SPIRV: Respect __launch_bounds__ for AMDHIP case

Follow the somewhat dodgy logic for packing amdgpu_flat_work_group_size
into the X field of max_work_group_size if the value is provided
to __launch_bounds__. The explicit amdgpu_flat_work_group_size takes
precedence, like in the AMDGPU case.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+7-1clang/lib/CodeGen/Targets/SPIR.cpp
+6-0clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
+13-12 files

LLVM/project 758c24cclang/include/clang/Basic Attr.td AttrDocs.td, clang/lib/CodeGen/Targets AMDGPU.cpp

clang/AMDGPU: Respect __launch_bounds__ attribute

Currently the HIP headers manually implement this with a
macro setting amdgpu attributes, and the proper clang attribute
is silently ignored. Directly map the proper attribute into
the target IR attributes. The first argument sets
"amdgpu-flat-work-group-size" and the second  (reinterpreted by HIP
as minimum waves per EU) sets "amdgpu-waves-per-eu". An explicit
amdgpu_flat_work_group_size / amdgpu_waves_per_eu attribute takes
precedence. This matches the launch_bounds macro in the HIP headers,
which can now be dropped.

The 3rd maxclusterrank argument is only handled for NVPTX, so restrict
the sm_90 arch check to NVPTX targets and ignore the third argument on
other targets.

Fixes #91468

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+68-0clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu
+43-0clang/include/clang/Basic/AttrDocs.td
+30-1clang/lib/CodeGen/Targets/AMDGPU.cpp
+17-6clang/lib/Sema/SemaDeclAttr.cpp
+16-0clang/test/SemaCUDA/launch_bounds_amdgpu.cu
+1-4clang/include/clang/Basic/Attr.td
+175-116 files

LLVM/project b28aa50.ci generate_test_report_lib.py

[ci] Add apple emoji for Darwin build reports (#215287)

GitHub has two apples, :apple: which is red and :green_apple: which is
green. Red might be mistaken for a failure at a glance if the report has
no listed failures, so I chose green.

Also added a fallback path for unhandled systems.
DeltaFile
+7-2.ci/generate_test_report_lib.py
+7-21 files

LLVM/project 096d1cdclang/lib/CodeGen CGObjCGNU.cpp, clang/test/CodeGenObjC gnustep2-ivar-offset.m

[CodeGen][CGObjCGNU] Fix assertion failure for negative ivar offsets (#215753)

Ivars can have negative offsets, for example if an ivar from a derived
class is placed inside the super classes padding.
Currently, the offset is computed as an `uint64_t`, which results in an
integer wraparound for negative offsets.
The wrapped offset is then written to a global value to be parsed by
libobjc2. When libobjc2 reads the value as a truncated signed `int`, it
is again implicitly converted correct negative number. However, with
assertions enabled we hit an assertion failure in LLVM when creating the
global value. See https://godbolt.org/z/Yb7cvWTqP.
DeltaFile
+19-0clang/test/CodeGenObjC/gnustep2-ivar-offset.m
+6-5clang/lib/CodeGen/CGObjCGNU.cpp
+25-52 files

LLVM/project bb24f9alldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert ZA header
DeltaFile
+3-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+3-42 files

LLVM/project a3b3431lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert PAC
DeltaFile
+2-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+2-42 files

LLVM/project 3edb442lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert SVE header
DeltaFile
+4-3lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+4-52 files

LLVM/project 0d5d04flldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert TLS
DeltaFile
+8-6lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-82 files

LLVM/project a04e208lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert ZT
DeltaFile
+8-6lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-82 files

LLVM/project f3f87b8lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert SVE
DeltaFile
+12-11lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+12-132 files

LLVM/project 4f9ee9flldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert MTE
DeltaFile
+8-6lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-82 files

LLVM/project 8897d65lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert GCS
DeltaFile
+8-6lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-82 files

LLVM/project c3b73aclldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert fpmr
DeltaFile
+8-6lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-82 files

LLVM/project 3f452belldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert ZA
DeltaFile
+14-9lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+14-112 files

LLVM/project 95849bflldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert POE
DeltaFile
+8-6lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-82 files

LLVM/project e2517d5lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

[lldb][AArch64][Linux] Add function to get register buffers

Replaces Get<set>Buffer methods.
DeltaFile
+32-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+2-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+34-02 files

LLVM/project 6e0fceelldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert POE
DeltaFile
+9-9lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+9-112 files

LLVM/project b18117elldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert gcs
DeltaFile
+10-10lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+10-122 files

LLVM/project 52fc1b2lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert FPMR
DeltaFile
+9-9lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+9-112 files

LLVM/project 8779839lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert ZT
DeltaFile
+7-7lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+7-92 files

LLVM/project e3ce414lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert TLS
DeltaFile
+9-9lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+9-112 files

LLVM/project 084b1c7lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert ZA buffer
DeltaFile
+8-8lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+8-102 files

LLVM/project 48d6f40lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

convert MTE
DeltaFile
+9-9lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+9-112 files

LLVM/project 224e9e4lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

[lldb][AArch64][Linux] Add function to get size of register set

Another one to be used in a generic read/write function later.
Replaces all the Get<thing>Size() methods.
DeltaFile
+34-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+2-0lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+36-02 files

LLVM/project 94e699clldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

remove sve buffer size
DeltaFile
+15-14lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+15-162 files

LLVM/project 08265cclldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

replace sve header
DeltaFile
+5-5lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+0-2lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+5-72 files