LLVM/project b20fca8mlir/include/mlir/Bindings/Python NanobindUtils.h Globals.h, mlir/lib/Bindings/Python Globals.cpp IRCore.cpp

[MLIR][Python] Remove partial LLVM APIs in python bindings (3/n)  (#178984)

This PR continues work from #178290 
It cleans up multiple LLVM utilities in *.h files under
`mlir/Bindings/python`, along with the corresponding *.cpp files.
DeltaFile
+30-24mlir/include/mlir/Bindings/Python/NanobindUtils.h
+18-13mlir/lib/Bindings/Python/Globals.cpp
+17-13mlir/include/mlir/Bindings/Python/Globals.h
+10-13mlir/include/mlir/Bindings/Python/NanobindAdaptors.h
+10-10mlir/include/mlir/Bindings/Python/Diagnostics.h
+1-9mlir/lib/Bindings/Python/IRCore.cpp
+86-821 files not shown
+87-847 files

LLVM/project 9cbdfa2mlir/include/mlir/IR BuiltinTypeInterfaces.td, mlir/lib/Dialect/LLVMIR/IR LLVMTypes.cpp

getter / iterator via interface
DeltaFile
+204-0mlir/lib/IR/BuiltinTypes.cpp
+32-110mlir/lib/IR/BuiltinAttributes.cpp
+56-56mlir/include/mlir/IR/BuiltinTypeInterfaces.td
+20-13mlir/lib/IR/AsmPrinter.cpp
+27-0mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
+4-6mlir/lib/IR/AttributeDetail.h
+343-1853 files not shown
+355-1909 files

OpenZFS/src 21bbe7cinclude/sys dmu.h, module/zfs dmu_tx.c dbuf.c

Improve caching for dbuf prefetches

To avoid read errors with transaction open dmu_tx_check_ioerr()
is used to read everything required in advance.  But there seems
to be a chance for the buffer to evicted from dbuf cache in
between, which result in immediate eviction from ARC, which may
require additional disk read later in a place where error handling
is problematic.

To partially workaround this introduce a new flag DMU_IS_PREFETCH,
relayed to ARC as ARC_FLAG_PREFETCH | ARC_FLAG_PRESCIENT_PREFETCH,
making ARC delay eviction by at least several seconds, or till the
actual read inside the transaction, that will promote it to demand
access.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Signed-off-by: Alexander Motin <alexander.motin at TrueNAS.com>
Closes #18160
DeltaFile
+4-3module/zfs/dmu_tx.c
+3-1module/zfs/dbuf.c
+1-0include/sys/dmu.h
+8-43 files

LLVM/project 0dd21adclang/test/CodeGen scoped-atomic-ops.c builtins-extended-image.c, clang/test/Headers amdgcn_openmp_device_math.c gpuintrin.c

[clang] remove addrspace cast from CreateIRTemp (#179327)

This just added unnecessary work to the IR, since they are only used for
load and store, which just causes some IR noise. Tests updated by UTC
script to remove the extra lines.
DeltaFile
+107-163clang/test/Headers/amdgcn_openmp_device_math.c
+0-102clang/test/CodeGen/scoped-atomic-ops.c
+26-66clang/test/Headers/gpuintrin.c
+0-88clang/test/CodeGen/builtins-extended-image.c
+0-84clang/test/CodeGen/builtins-image-load.c
+0-32clang/test/Headers/amdgcn_openmp_device_math_constexpr.cpp
+133-53535 files not shown
+242-73741 files

LLVM/project 9a47c3bllvm/include/llvm/CodeGen TargetRegisterInfo.h, llvm/lib/CodeGen RegAllocGreedy.cpp RegAllocGreedy.h

[RegAlloc] Change the computation of CSRCost (#177226)

This patch fixes https://github.com/llvm/llvm-project/issues/150737.

The original computed CSRCost is too small, so the optimization of
spilling instead of using CSR is rarely triggered.
    
Also the original cost model is too difficult to be understood and too
hard to be tuned by backend developers and users.
    
So this patch changes the CSRCost to be

        CSRCost = TRI->getCSRFirstUseCost() * EntryFreq * Scale
    
TRI->getCSRFirstUseCost() is the raw cost of save/restore a CSR. Usually
we don't need to tune this number.
   EntryFreq is the BlockFrequency of the entry block.
Scale is used to scale down the CSRCost, because we usually prefer a CSR
register instead of spilling if we have similar CSRCost and spill cost,

    [8 lines not shown]
DeltaFile
+130-0llvm/test/CodeGen/AArch64/ragreedy-csr2.ll
+70-28llvm/lib/CodeGen/RegAllocGreedy.cpp
+5-1llvm/lib/Target/AArch64/AArch64RegisterInfo.h
+1-3llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+2-1llvm/lib/CodeGen/RegAllocGreedy.h
+2-0llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+210-331 files not shown
+211-347 files

LLVM/project e8b7181llvm/lib/Transforms/Utils Evaluator.cpp

[Evaluator] require invariant size to fully span the global (#179518)

Relying on the semantics of the type here is a bit potentially awkward,
since the full allocated space may be accessible to the user if desired,
since that space is defined to be a part of the type's sizeof
computation (e.g. for a `memcpy(gv, gv, sizeof(*gv))` or when making an
array of them). It also gets in the way of removing getAllocatedType
from AllocaInst entirely (they are converted to GlobalVariable
sometimes). It was originally added in
519561f418c77dcf46fd6d96d25d884fa07fd7da, though "correct size" is a
difficult thing to define.

The frontend (in clang) appears to always emit the full type size here,
so there seems like this shouldn't be visible change to clang users.

This is still a bit awkward though, since a global is defined to be any
size that is bigger than this unless it has a known initizalizer,
rendering the test still incomplete here against the IR semantics.
DeltaFile
+2-3llvm/lib/Transforms/Utils/Evaluator.cpp
+2-31 files

OpenZFS/src 00d69b0module/zfs arc.c

arc: remove unused l2df_size and l2df_type from l2arc_data_free_t

These fields became unused when ABD was introduced in a6255b7fc.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+5-13module/zfs/arc.c
+5-131 files

OpenZFS/src 6f17052tests/zfs-tests/tests/functional/cache cache_012_pos.ksh

cache_012_pos: disable compression to ensure L2ARC wrap

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+2-0tests/zfs-tests/tests/functional/cache/cache_012_pos.ksh
+2-01 files

OpenZFS/src 13552d7tests/zfs-tests/tests Makefile.am, tests/zfs-tests/tests/functional/l2arc l2arc_dwpd_reimport_pos.ksh l2arc_multidev_scaling_pos.ksh

ZTS: Add L2ARC DWPD and parallel writes tests

Add four new functional tests to validate L2ARC DWPD rate limiting and
parallel write features:

- l2arc_dwpd_ratelimit_pos: Verifies DWPD rate limiting with different
  values (0, 100, 1000, 10000) and ordering
- l2arc_dwpd_reimport_pos: Verifies DWPD rate limiting persists after
  pool export/import
- l2arc_multidev_scaling_pos: Verifies parallel write scaling ratio
  (dual devices achieve ~2× single device throughput)
- l2arc_multidev_throughput_pos: Verifies absolute parallel write
  throughput scales with device count (~32MB/s per device)

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+169-0tests/zfs-tests/tests/functional/l2arc/l2arc_dwpd_reimport_pos.ksh
+162-0tests/zfs-tests/tests/functional/l2arc/l2arc_multidev_scaling_pos.ksh
+138-0tests/zfs-tests/tests/functional/l2arc/l2arc_dwpd_ratelimit_pos.ksh
+133-0tests/zfs-tests/tests/functional/l2arc/l2arc_multidev_throughput_pos.ksh
+4-1tests/zfs-tests/tests/functional/trim/trim_l2arc.ksh
+4-0tests/zfs-tests/tests/Makefile.am
+610-14 files not shown
+618-410 files

OpenZFS/src 48d3f7fman/man4 zfs.4, man/man7 zpoolconcepts.7

man: Update L2ARC tunables for DWPD and parallel writes

Add l2arc_dwpd_limit, remove l2arc_write_boost, update related tunables.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+21-11man/man4/zfs.4
+14-0man/man7/zpoolconcepts.7
+35-112 files

OpenZFS/src d1f290finclude/os/freebsd/spl/sys mod.h, include/sys arc_impl.h

L2ARC: Implement DWPD-based rate limiting with adaptive feed intervals

Add DWPD (Drive Writes Per Day) rate limiting to control L2ARC write
speeds and protect SSD endurance. Write rate is constrained by the
minimum of l2arc_write_max and DWPD-calculated budget. Devices
accumulate unused write budget over 24-hour periods with automatic reset
and carry-over. Writes occur in controlled bursts (max 50MB) with
adaptive intervals to achieve target rates. Applies after initial device
fill.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+139-46module/zfs/arc.c
+16-0module/os/freebsd/zfs/sysctl_os.c
+16-0module/os/linux/zfs/arc_os.c
+10-0include/sys/arc_impl.h
+3-0include/os/freebsd/spl/sys/mod.h
+184-465 files

OpenZFS/src b525525include/sys arc_impl.h arc.h, module/zfs arc.c spa_misc.c

L2ARC: Implement per-device feed threads for parallel writes

Transform L2ARC from single global feed thread to per-device threads,
enabling parallel writes to multiple L2ARC devices. Each device runs
its own feed thread independently, improving multi-device throughput.
Previously, a single thread served all devices sequentially; now each
device writes concurrently. Threads are created during device addition
and torn down on removal.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+153-178module/zfs/arc.c
+19-1include/sys/arc_impl.h
+0-3module/zfs/spa_misc.c
+0-2include/sys/arc.h
+172-1844 files

OpenZFS/src 825dc41module/zfs arc.c

L2ARC: Preserve L2HDR in arc_release() for in-flight writes

When arc_release() is called on a header with a single buffer and
L2_WRITING set, the L2HDR must be preserved for ABD cleanup (similar
to the arc_hdr_destroy() case). If we destroy the L2HDR here, later
arc_write() will allocate a new ABD and call arc_hdr_free_abd(),
which needs b_l2hdr.b_dev to properly defer ABD cleanup, causing
VERIFY(HDR_HAS_L2HDR(hdr)) to fail.

Allocate a new header for the buffer in the single_buf_l2writing
case (single buffer + L2_WRITING), leaving the original header with
L2HDR intact. The original header becomes an "orphan" (no buffers, no
b_pabd) but retains device association for ABD cleanup when
l2arc_write_done() completes.

The shared buffer case (HDR_SHARED_DATA) is excluded because L2ARC
makes its own transformed copy via l2arc_apply_transforms(), so the
original ABD is not used by the L2 write. The header can be safely
reused without allocating a new one.

    [12 lines not shown]
DeltaFile
+51-37module/zfs/arc.c
+51-371 files

OpenZFS/src b8610c3module/zfs arc.c

L2ARC: Reorder header destruction for in-flight L2 writes

With multiple L2ARC devices, headers can be destroyed asynchronously
(e.g., during zpool sync) while L2_WRITING is set. The original code
destroyed L2HDR before L1HDR, causing ABDs to lose their device
association (b_l2hdr.b_dev) when arc_hdr_free_abd() is called.

This caused ABDs to be added to the global free-on-write list without
device information. When any L2ARC device completed its write and
attempted to free these orphaned ABDs, it would panic on
ASSERT(!list_link_active(&abd->abd_gang_link)) because the ABD was
still part of another device's vdev_queue I/O aggregation gang.

Fix by extending l2ad_mtx lock scope to cover L1HDR destruction and
reordering to destroy L1HDR before L2HDR when L2_WRITING is set. This
ensures arc_hdr_free_abd() can access b_l2hdr.b_dev to properly tag
ABDs with their device for deferred cleanup.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>

    [3 lines not shown]
DeltaFile
+37-18module/zfs/arc.c
+37-181 files

OpenZFS/src 2f41b9dinclude/sys arc_impl.h spa_impl.h, module/zfs arc.c

L2ARC: Implement persistent markers with consistent tail scanning

This commit introduces per-sublist persistent markers that eliminate
redundant tail scanning between L2ARC iterations, providing significant
CPU efficiency improvements. Markers are pre-allocated during device
initialization and properly cleaned up during device removal.

The implementation uses conditional behavior based on device capacity:
small devices (capacity < arc_c) retain original HEAD/TAIL scanning
based on ARC warmup state, while large devices (capacity >= arc_c)
use the persistent marker approach for optimal CPU efficiency.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+295-39module/zfs/arc.c
+10-0include/sys/arc_impl.h
+2-0include/sys/spa_impl.h
+307-393 files

LLVM/project 082a47dlldb/test/Shell/helper toolchain.py

[lldb-dap] fix executable substitution in tests (#179685)

This patch fixes the `lldb-dap` executable substitution in tests. This
was not done before.
DeltaFile
+3-1lldb/test/Shell/helper/toolchain.py
+3-11 files

OpenZFS/src 3523b5fmodule/zfs arc.c

L2ARC: Implement even-depth multi-sublist scanning

The introduction of ARC multilists made L2ARC writing quite random,
depending on whether it found something to write in a randomly selected
sublist. This created inconsistent write patterns and poor utilization
of available sublists leading to uneven cache population.

This commit replaces random selection with systematic scanning across
all sublists within each burst. Fair headroom distribution ensures
even-depth traversal across all sublists until the target write size
is reached. Round-robin processing with random starting points eliminates
sequential bias while maintaining predictable write behavior.

The systematic approach provides consistent L2ARC filling patterns
and better utilization of available ARC data across all sublists.

Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18093
DeltaFile
+241-205module/zfs/arc.c
+241-2051 files

LLVM/project 6d96ae6llvm/lib/Target/RISCV RISCVInstrInfoXSf.td

[RISCV] Add tied destination constraint to CustomSiFiveVMACC. (#179567)

As the name suggess, these are multiply-accumulate instructions and
thus they have 3 sources.
DeltaFile
+2-1llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
+2-11 files

LLVM/project 24c7a10clang/lib/AST Type.cpp, clang/lib/CodeGen/TargetBuiltins WebAssembly.cpp

[Clang][WebAssembly] Fix WASM tables to allow `__funcref` function pointers (#178720)

Allows __funcref pointers to be used as the element type for WASM tables
in Clang (static, global, zero-length arrays of a reference type).
Modifies `QualType::isWebAssemblyFuncrefType` to correctly look at the
addrspace of the pointee, rather than the pointer type.

Related: #140933
DeltaFile
+69-0clang/test/CodeGen/WebAssembly/builtins-table-funcref.c
+0-67clang/test/CodeGen/WebAssembly/builtins-table.c
+67-0clang/test/CodeGen/WebAssembly/builtins-table-externref.c
+18-0clang/test/Sema/wasm-funcref-table.c
+2-2clang/lib/CodeGen/TargetBuiltins/WebAssembly.cpp
+2-1clang/lib/AST/Type.cpp
+158-706 files

LLVM/project 7083354llvm/lib/Target/RISCV RISCVSubtarget.h

[RISCV] Remove deprecated RISCVSubtarget::hasStdExtCOrZca(). NFC (#179616)

DeltaFile
+0-2llvm/lib/Target/RISCV/RISCVSubtarget.h
+0-21 files

OpenBSD/ports Sg9xHSKcomms/conserver Makefile, comms/conserver/pkg conserver.rc

   move config test to rc_configtest, pointed out by aja
   (i didn't find it because i cribbed from rc.d/unbound)
VersionDeltaFile
1.14+3-0comms/conserver/pkg/conserver.rc
1.83+1-0comms/conserver/Makefile
+4-02 files

OpenBSD/ports pP3uPrYsysutils/gitlab-cli distinfo modules.inc, sysutils/gitlab-cli/pkg PLIST

   update to gitlab-cli 1.82.0
VersionDeltaFile
1.43+62-58sysutils/gitlab-cli/distinfo
1.32+20-18sysutils/gitlab-cli/modules.inc
1.27+2-0sysutils/gitlab-cli/pkg/PLIST
1.44+1-1sysutils/gitlab-cli/Makefile
+85-774 files

OpenBSD/ports 2RCdCoNdevel/github-cli distinfo Makefile, devel/github-cli/pkg PLIST

   update to github-cli 2.86.0
VersionDeltaFile
1.64+2-2devel/github-cli/distinfo
1.72+1-1devel/github-cli/Makefile
1.29+1-0devel/github-cli/pkg/PLIST
+4-33 files

NetBSD/pkgsrc-wip 1e9fd8cdovecot24 buildlink3.mk

dovecot24: bl file needs some dovecot->dovecot24 changes too
DeltaFile
+7-9dovecot24/buildlink3.mk
+7-91 files

LLVM/project 273ee97llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-ssube.mir regbankselect-sadde.mir

[AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (#179603)

DeltaFile
+54-111llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ssube.mir
+53-110llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sadde.mir
+1-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+108-2223 files

NetBSD/pkgsrc-wip 79fee90dovecot24 Makefile.common Makefile

dovecot24: remove some comments with /mail/
DeltaFile
+0-3dovecot24/Makefile.common
+0-1dovecot24/Makefile
+0-1dovecot24/TODO
+0-53 files

FreeNAS/freenas c7736c4src/middlewared/middlewared/plugins network.py, src/middlewared/middlewared/plugins/interface bond.py sync.py

more simplification
DeltaFile
+38-35src/middlewared/middlewared/plugins/interface/bond.py
+3-28src/middlewared/middlewared/plugins/network.py
+28-0src/middlewared/middlewared/plugins/interface/sync.py
+69-633 files

LLVM/project 26b1f61mlir/include/mlir/Dialect/MPI/IR Utils.h, mlir/lib/Conversion/MPIToLLVM MPIToLLVM.cpp

[mlir][shard,mpi] Fixing lowering allgather shard->mpi->llvm (#178870)

`shard.allgather` concatenates along a specified gather-axis. However,
`mpi.allgather` always concatenates along the first dimension and there
is no MPI operation that allows gathering along an arbitrary axis.
Hence, if gather-axis!=0, we need to create a temporary buffer where we
gather along the first dimension and then copy from that buffer to the
final output along the specified gather-axis. This is not ideal by far.

Along the way also
- fixing computation of memref size in mpitollvm
- adding a simple canonicalization pattern for comm_size for easier
debugging
- adding more tests
DeltaFile
+93-7mlir/test/Conversion/ShardToMPI/convert-shard-to-mpi.mlir
+90-6mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
+43-15mlir/test/Conversion/MPIToLLVM/mpitollvm.mlir
+54-2mlir/test/Dialect/Shard/partition.mlir
+38-15mlir/lib/Conversion/MPIToLLVM/MPIToLLVM.cpp
+43-0mlir/include/mlir/Dialect/MPI/IR/Utils.h
+361-453 files not shown
+391-679 files

LLVM/project 7ea33e6llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/PowerPC PPCInstrVSX.td

[CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)

The first input operand of SUBREG_TO_REG was an immediate that most
targets set to 0. In practice it had no effect on codegen. Remove it.
DeltaFile
+137-155llvm/lib/Target/PowerPC/PPCInstrVSX.td
+107-115llvm/lib/Target/AArch64/AArch64InstrInfo.td
+35-35llvm/test/CodeGen/AArch64/bf16_fast_math.ll
+32-32llvm/lib/Target/X86/X86InstrAVX512.td
+30-30llvm/test/CodeGen/X86/tail-dup-pred-succ-size.mir
+22-22llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes.mir
+363-389148 files not shown
+840-944154 files

NetBSD/pkgsrc-wip b79a366dovecot24 distinfo PLIST, dovecot24/patches patch-configure patch-src_lib-var-expand-crypt_Makefile.in

dovecot24: some more adjustments from Sad Clouds.
DeltaFile
+19-0dovecot24/patches/patch-configure
+2-1dovecot24/distinfo
+2-1dovecot24/patches/patch-src_lib-var-expand-crypt_Makefile.in
+1-0dovecot24/PLIST
+24-24 files