[CSKY] Emit build attributes in assembly output (#213507)
Fixes CodeGen/CSKY/fpu-abi-attribute.ll, failing since #212975.
emitTargetAttributes is implemented only by CSKYTargetELFStreamer, so
llc -filetype=asm drops every .csky_attribute directive. Move it to
CSKYTargetStreamer, as ARM and RISC-V do.
japanese/open_jtalk: fix pkg-plist
pkg-plist hardcoded a framework-managed line:
@dir share/licenses/ja-open_jtalk-1.11
share/licenses/<pkg>/ is created automatically by the LICENSE
framework and must never be in pkg-plist.
Putting that line causes a packaging failure when DISABLE_LICENSES=yes
is set:
pkg-static: Unable to access file /wrkdirs/usr/ports/japanese/open_jtalk/work/stage/usr/local/share/licenses/ja-open_jtalk-1.11/:No such file or directory
games/CWR-CE: fix build on powerpc64le
In file included from /wrkdirs/usr/ports/games/CWR-CE/work/CWR-CE-9abbdf2769f3008d76c47ac0af219388ff0323dc/engine/Poseidon/Foundation/Math/V3QuadsP3.cpp:16:
/usr/lib/clang/19/include/ppc_wrappers/x86intrin.h:18:2: error: "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error."
18 | #error "Please read comment above. Use -DNO_WARN_X86_INTRINSICS to disable this error."
| ^
misc/py-onnxruntime: fix build on powerpc64le
/wrkdirs/usr/ports/misc/py-onnxruntime/work-py312/build/Release/_deps/eigen3-src/unsupported/Eigen/CXX11/../../../Eigen/src/Core/arch/AltiVec/PacketMath.h:119:35: error: 'vec_lvsl' is deprecated: use assignment for unaligned little endian loads/stores [-Werror,-Wdeprecated-declarations]
[MLIR][Python] Drop the LLVMSupport link dependency from the python extensions (#213509)
Follow-up to #180986, which completed the series started in #178290: it switched the last python bindings off the C++ LLVM APIs and dropped `LLVMSupport` from the support library in `AddMLIRPython.cmake`. But the per extension `PRIVATE_LINK_LIBS LLVMSupport` in `mlir/python/CMakeLists.txt` was missed, so the dependency is still there for every extension module.
Assisted by: Claude
[MLIR][Python] Drop the LLVMSupport link dependency from the python extensions
#180986 switched the last python bindings off the C++ LLVM APIs and dropped
LLVMSupport from the support library in AddMLIRPython.cmake, but the
per-extension `PRIVATE_LINK_LIBS LLVMSupport` in mlir/python/CMakeLists.txt
was missed. `declare_mlir_python_extension`'s PRIVATE_LINK_LIBS becomes
`target_link_libraries(... INTERFACE ...)`, so every extension module still
links libLLVMSupport.a. None of the extension sources reference LLVM any more:
the only remaining matches for `llvm::` are two comments and a namespace that
happens to be called `llvm`.
Statically linking LLVMSupport into every extension gives each one its own copy
of the CommandLine.cpp globals. Where the loader resolves symbols across modules
rather than keeping them module-local, whichever copy initializes second aborts
the process:
CommandLine Error: Option 'print-inst-addrs' registered more than once!
That is what happens with the emscripten build of the bindings, where the
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lang/oorexx: Update to 5.2.0
Changelog:
5.2.0:
Bugs
----
https://sourceforge.net/p/oorexx/bugs/nnnn
1: # 2056 Bug in docprep.rex
(entered by Josep Maria Blasco on 2026-04-05 -> 2026-04-05 )
2: # 2052 ooTest framework typo replace "rn" by "n" in ooTest.frm
(entered by jfaucher on 2026-03-18 -> 2026-03-19 )
3: # 2050 ooTest framework: unassigned variable "LFILE"' when asking for a log file
(entered by jfaucher on 2026-03-06 -> 2026-03-06 )
4: # 2049 Missing p = p->next; in Activity::liveGeneral
(entered by jfaucher on 2026-03-01 -> 2026-03-01 )
5: # 2046 VariableReference::flatten is marking instead of flattening
(entered by jfaucher on 2026-01-23 -> 2026-01-27 )
6: # 2044 json.cls: string consisting of numbers not handled as a string
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graphics/libraw: Update to 0.22.2
Remove uselesss JASPER option after 0.22.0. This was a silent drop by
upstream, so we missed this in the last update. This was a non-default
option and will not affect most users.
https://www.libraw.org/news/libraw-0-22-2-release
graphics/libraw: Update to 0.22.2
Remove uselesss JASPER option after 0.22.0. This was a silent drop by
upstream, so we missed this in the last update. This was a non-default
option and will not affect most users.
https://www.libraw.org/news/libraw-0-22-2-release
igc(4): document adaptive interrupt moderation
Describe the disabled, adaptive, and low-latency settings and their
interrupt-rate tradeoffs.
(cherry picked from commit 297394e995e5ea1ea9bc85e609ca116255d51e97)
igc: count TSO wire segments in the AIM counters
The transmit path bills one packet of ipi_len bytes per request. For
TSO that is the whole unsegmented payload, up to 64 KiB, rather than a
packet size that appears on the wire.
Count the segments the hardware emits and the header carried by each
segment. Non-TSO accounting is unchanged.
(cherry picked from commit e389a05164ccb1dd41ee8d7f09203b475322dd72)
igc: use packet-size AIM
Use the packet-size calculation introduced for igb(4) in a69ed8dfb381
and retained there until the iflib conversion in f2d6ace4a684. It
derives interrupt holdoff from average packet size, so RSS queue count
does not change its behavior.
The calculation follows the pre-iflib igb code. Retain igc's normal and
low-latency rate caps, and keep the current setting when an interval has
no usable sample.
(cherry picked from commit 01e7acd38d411c78caba1c4078bb3683f586e1c2)
igc: synchronize interrupt moderation state
Keep the saved EITR value synchronized with hardware across
reinitialization. Correct EITR encoding, decoding, and MSI-X register
selection, and reject nonpositive fallback rates.
Apply the packet-buffer fallback without permanently disabling AIM.
(cherry picked from commit e35533457530bb9db655e6137c2eea790e18b97b)
igc: make AIM counter sampling coherent
Sample free-running counters by delta instead of clearing them from the
interrupt filter, which can race their producers. Publish byte and
packet counts together at the TX and RX doorbells so each sample is
coherent.
Aggregate every TX ring assigned to the interrupt vector so unequal RX
and TX queue counts are safe. Count RX bytes only after a frame is
accepted.
(cherry picked from commit 2290ea7f4311e899019fe77bf7c7775033af6b24)
igc: fix RX accounting for multi-descriptor packets
The receive path adds the running packet length to rx_bytes for every
descriptor. A packet spanning descriptors of length l1, l2, and l3 is
therefore counted as 3*l1 + 2*l2 + l3.
Add each descriptor length once. Single-descriptor accounting remains
unchanged.
(cherry picked from commit bbf0372feeb321a5bfeff7b1e79576ab01240441)
em(4): document adaptive interrupt moderation
Describe the disabled, adaptive, and low-latency settings and their
interrupt-rate tradeoffs.
(cherry picked from commit b6b379b94781da5d4328f6f57273fbe7bd9dc687)
e1000: count TSO wire segments in the AIM counters
The transmit paths billed one packet of ipi_len bytes per request. For
TSO that is the whole unsegmented payload, up to 64KB, so the average
size the moderation calculation sees is not a size that appears on the
wire.
Count the segments the hardware will put on the wire and the header each
of them carries.
Non-TSO accounting is unchanged.
(cherry picked from commit 072e0983d7bce80356740324973993393e77023a)
e1000: restore packet-size AIM
Restore the packet-size calculation introduced in a69ed8dfb381 and used
by igb(4) until the iflib conversion in f2d6ace4a684. It derives
interrupt holdoff from average packet size, so RSS queue count does not
change its behavior.
The calculation follows the pre-iflib code. Retain the current normal
and low-latency rate caps, and keep the current setting when an interval
has no usable sample.
Fixes: 3e501ef89667 ("e1000: Re-add AIM")
(cherry picked from commit dc4a5087b160c1a94d135ab636642defe2c71c20)
e1000: synchronize interrupt moderation state
Keep the saved EITR and PBA values synchronized with hardware across
reinitialization. Correct EITR encoding, decoding, and MSI-X register
selection, and reject nonpositive fallback rates.
Treat only sub-gigabit links as sub-gigabit and apply the packet-buffer
fallback without permanently disabling AIM.
(cherry picked from commit 6ef368a29b11ebc769e7929566809b75ae2c1e90)
e1000: make AIM counter sampling coherent
Sample free-running counters by delta instead of clearing them from the
interrupt filter, which can race their producers. Publish byte and
packet counts together at the TX and RX doorbells so each sample is
coherent.
Aggregate every TX ring assigned to the interrupt vector so unequal RX
and TX queue counts are safe. Count RX bytes only after a frame is
accepted.
(cherry picked from commit bc5e7b0cbbb555ffebc7d73b273c421f9ee24c23)
ixl: Increase tx/rx ring size to 8160
I've verified the tx queue (table 8-22) in addition.
DPDK commit message
net/i40e: increase max descriptor queue length
According to the Intel X710/XXV710/XL710 Datasheet, the maximum receive
queue descriptor length is 0x1FE0 (8160 in base 10). This is specified
as QLEN in table 8-12, page 1083.
I've tested this change with an XXV710 NIC and it has positive effect on
performance under high load scenarios. Where previously I'd get
~2000 packets/sec miss rate, now I get only ~40 packets/sec miss rate.
Signed-off-by: Igor Gutorov <igootorov at gmail.com>
Acked-by: Morten Brørup <mb at smartsharesystems.com>
Acked-by: Bruce Richardson <bruce.richardson at intel.com>
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