LLVM/project f3bed42llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/AArch64 vector-splice-compress-mmo-align.ll

[SelectionDAG] Don't over-claim alignment on vector splice/compress stack MMOs (#200622)

expandVectorSplice and expandVECTOR_COMPRESS allocate their scratch slot
on the stack with getReducedAlign, but the memory accesses they generate
touching this slot use the type's natural alignment, which may be
larger!
DeltaFile
+35-0llvm/test/CodeGen/AArch64/vector-splice-compress-mmo-align.ll
+9-7llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+44-72 files

LLVM/project 4cef4efllvm/docs/CommandGuide llvm-debuginfo-analyzer.rst, llvm/include/llvm/DebugInfo/LogicalView/Readers LVIRReader.h

[llvm-debuginfo-analyzer] Add support for LLVM IR format. (#200603)

llvm-debuginfo-analyzer is a command line tool that processes debug
info contained in a binary file and produces a debug information
format agnostic “Logical View”, which is a high-level semantic
representation of the debug info, independent of the low-level format.

Add support for the LLVM IR format and be able to generate logical
views. Both textual representation (.ll) and bitcode (.bc) formats
are supported.

This relands https://github.com/llvm/llvm-project/pull/135440, which was
reverted in https://github.com/llvm/llvm-project/pull/199890.
It includes the fixes for the buildbots problems.
DeltaFile
+2,630-0llvm/lib/DebugInfo/LogicalView/Readers/LVIRReader.cpp
+362-0llvm/unittests/DebugInfo/LogicalView/IRReaderTest.cpp
+303-0llvm/include/llvm/DebugInfo/LogicalView/Readers/LVIRReader.h
+87-134llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
+168-0llvm/test/tools/llvm-debuginfo-analyzer/IR/08-ir-multiple-compile-units.test
+151-0llvm/test/tools/llvm-debuginfo-analyzer/IR/01-ir-select-logical-elements.test
+3,701-13435 files not shown
+5,408-15241 files

LLVM/project 7bff896clang/lib/Sema SemaDeclAttr.cpp, llvm/lib/IR Verifier.cpp

[AMDGPU] Verify AMDGPU required workgroup size matches flat workgroup size
DeltaFile
+78-0llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
+78-0llvm/lib/IR/Verifier.cpp
+35-0mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
+35-0clang/lib/Sema/SemaDeclAttr.cpp
+12-12llvm/test/Transforms/InstCombine/AMDGPU/mbcnt-wave32-optimizations.ll
+19-0mlir/test/Target/LLVMIR/rocdl-invalid.mlir
+257-1220 files not shown
+357-8626 files

LLVM/project 7290d87clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Implement lowering for __builtin_amdgcn_dispatch_ptr (#199880)

Port `emitAMDGPUDispatchPtr` from OGCG. Emits the `amdgcn.dispatch.ptr`
intrinsic and inserts an address-space cast when the builtin's expected
return type differs.
DeltaFile
+29-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+37-62 files

LLVM/project fba43a5clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering call-llvm-intrinsic.cir

[CIR] Fix cir.call_llvm_intrinsic lowering for 0-result ops (#199516)

`cir.call_llvm_intrinsic` declares `Optional<CIR_AnyType>:$result`, but
the lowering indexed `op->getResultTypes()[0]` unconditionally and OOBed
on void calls.
Guard with `getNumResults()` and pick the void overload of
`LLVM::CallIntrinsicOp::create` in `createCallLLVMIntrinsicOp`.
DeltaFile
+27-0clang/test/CIR/Lowering/call-llvm-intrinsic.cir
+14-6clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+41-62 files

NetBSD/src UqxRRSPsys/net if_spppsubr.c

   Removed redundant splnet()/splx() since lmc(4) and netisdn were removed
VersionDeltaFile
1.276+12-48sys/net/if_spppsubr.c
+12-481 files

LLVM/project 5148d2dclang/lib/AST/ByteCode Descriptor.cpp Program.cpp, clang/unittests/AST/ByteCode Pointer.cpp

[clang][bytecode] Improve `getType()`  (#200342)

We previously often fell back to the type of the declaration, which is
wrong if we're pointing e.g. to a nested array.

Add a new unit test to vaildate this.
DeltaFile
+274-0clang/unittests/AST/ByteCode/Pointer.cpp
+27-26clang/lib/AST/ByteCode/Descriptor.cpp
+16-13clang/lib/AST/ByteCode/Program.cpp
+22-3clang/lib/AST/ByteCode/Pointer.h
+5-3clang/lib/AST/ByteCode/DynamicAllocator.cpp
+3-3clang/lib/AST/ByteCode/Descriptor.h
+347-481 files not shown
+348-487 files

OpenBSD/src 6qsVeHqsys/dev/pci/drm drm_linux.c, sys/dev/pci/drm/include/linux hrtimer.h

   add hrtimer_forward_now() for 6.18.34 drm
VersionDeltaFile
1.138+14-1sys/dev/pci/drm/drm_linux.c
1.4+5-2sys/dev/pci/drm/include/linux/hrtimer.h
+19-32 files

OpenBSD/src 3ne2ARGsys/dev/pci/drm/include/linux ktime.h

   add ktime_compare() for 6.18.34 drm
VersionDeltaFile
1.10+11-1sys/dev/pci/drm/include/linux/ktime.h
+11-11 files

OpenBSD/src wA9tTzDsys/dev/pci/drm/include/linux ktime.h types.h

   move ktime_t typedef to linux/types.h

   follows linux changes made around the time of linux 6.8
VersionDeltaFile
1.9+2-2sys/dev/pci/drm/include/linux/ktime.h
1.7+2-0sys/dev/pci/drm/include/linux/types.h
+4-22 files

LLVM/project a4e18dcllvm/include/llvm/ExecutionEngine/Orc ExecutorResolutionGenerator.h

[ORC] Fix header comment. NFC. (#200980)
DeltaFile
+1-1llvm/include/llvm/ExecutionEngine/Orc/ExecutorResolutionGenerator.h
+1-11 files

Linux/linux 6f3ed7fdrivers/md dm-cache-policy-smq.c

Merge tag 'for-7.1/dm-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm

Pull device mapper fix from Mikulas Patocka:

 - fix race condition in dm-cache-policy-smq

* tag 'for-7.1/dm-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm:
  dm cache policy smq: check allocation under invalidate lock
DeltaFile
+8-4drivers/md/dm-cache-policy-smq.c
+8-41 files

LLVM/project 3226701flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP/Todo metadirective-declarative.f90

Add todo guard for declarative construct

Metadirective variants are lowered through genOMPDispatch, which
only handles executable constructs. If the generated construct
queue contains a declarative directive, route it to the existing
TODO path instead of dispatching it.
DeltaFile
+10-0flang/test/Lower/OpenMP/Todo/metadirective-declarative.f90
+9-0flang/lib/Lower/OpenMP/OpenMP.cpp
+19-02 files

LLVM/project c0e4fc8

[ORC] Simplify DylibManager::lookupSymbols, remove LookupRequest. (#195954)

DylibManager::lookupSymbols used to take an array of LookupRequests,
where each request specified a handle and list of symbols to lookup
within that handle.

This commit replaces the array of lookup requests with a single handle
and list of symbols passed directly to lookupSymbols.

In practice all clients were passing a singlton array anyway, and
simplifying this signature significantly simplifies implementations.
DeltaFile
+0-00 files

LLVM/project db9d559clang/lib/Sema SemaDeclAttr.cpp, llvm/lib/IR Verifier.cpp

[AMDGPU] Verify AMDGPU required workgroup size matches flat workgroup size
DeltaFile
+78-0llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
+78-0llvm/lib/IR/Verifier.cpp
+35-0mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
+35-0clang/lib/Sema/SemaDeclAttr.cpp
+12-12llvm/test/Transforms/InstCombine/AMDGPU/mbcnt-wave32-optimizations.ll
+11-7llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
+249-1919 files not shown
+338-8625 files

Linux/linux 4b5821fdrivers/auxdisplay max6959.c Kconfig

Merge tag 'auxdisplay-v7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-auxdisplay

Pull auxdisplay updates from Andy Shevchenko:

 - Fix potential out-of-bound access in line-display library

 - Miscellaneous refactoring and cleaning up

[ Andy says this could easily be delayed until 7.2, but it's _so_ tiny
  that it's more work for me to schedule it for later than to just take
  it now, and just doesn't seem worth delaying    - Linus ]

* tag 'auxdisplay-v7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-auxdisplay:
  auxdisplay: Kconfig: drop unneeded quotes in PANEL_BOOT_MESSAGE dep
  auxdisplay: line-display: fix OOB read on zero-length message_store()
  auxdisplay: max6959: use regmap_assign_bits() in max6959_enable()
DeltaFile
+1-4drivers/auxdisplay/max6959.c
+1-1drivers/auxdisplay/Kconfig
+1-1drivers/auxdisplay/line-display.c
+3-63 files

LLVM/project b322141llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.cpp TransactionAcceptOrRevert.cpp, llvm/test/Transforms/SandboxVectorizer load_store_vec_mixed_types.ll load_store_vec.ll

[SandboxVec][LoadStoreVec][AMDGPU] Remove early reject of mixed types (#200523)

Up until now mixing floats and non-floats was disabled in the legality
checks. This patch changes this. We are now eagerly vectorizing mixed
types, but we are also checking the cost model to make sure we don't
regress on targets where this is expensive.
DeltaFile
+35-15llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+6-15llvm/test/Transforms/SandboxVectorizer/load_store_vec_mixed_types.ll
+4-10llvm/test/Transforms/SandboxVectorizer/load_store_vec.ll
+2-3llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/TransactionAcceptOrRevert.cpp
+47-434 files

LLVM/project db1ee7bclang/include/clang/Serialization ASTRecordReader.h, clang/lib/AST ASTContext.cpp Type.cpp

trivial changes
DeltaFile
+20-14clang/lib/Sema/SemaOpenMP.cpp
+18-14clang/lib/AST/ASTContext.cpp
+16-15clang/lib/Sema/SemaTemplate.cpp
+14-11clang/lib/AST/Type.cpp
+14-8clang/lib/AST/ASTDiagnostic.cpp
+11-6clang/include/clang/Serialization/ASTRecordReader.h
+93-6833 files not shown
+207-15939 files

LLVM/project 3d7c58aclang/lib/AST ASTContext.cpp ItaniumMangle.cpp, clang/lib/Sema SemaCXXScopeSpec.cpp SemaTemplate.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.

This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+888-161clang/lib/AST/ASTContext.cpp
+328-12clang/test/SemaTemplate/instantiation-dependence.cpp
+178-96clang/lib/AST/ItaniumMangle.cpp
+100-98clang/lib/Sema/SemaCXXScopeSpec.cpp
+62-57clang/lib/AST/Type.cpp
+71-44clang/lib/Sema/SemaTemplate.cpp
+1,627-46869 files not shown
+2,392-79975 files

FreeBSD/ports adc6b8alang/spidermonkey140 distinfo Makefile

lang/spidermonkey140: update to 140.11.0
DeltaFile
+3-3lang/spidermonkey140/distinfo
+2-3lang/spidermonkey140/Makefile
+1-0lang/spidermonkey140/pkg-plist
+6-63 files

LLVM/project ff2fec3clang-tools-extra/clang-tidy/bugprone MissingEndComparisonCheck.cpp, clang-tools-extra/docs/clang-tidy/checks/bugprone missing-end-comparison.rst

[clang-tidy] Add `bugprone-missing-end-comparison` check (#182543)

This PR introduces a new check `bugprone-missing-end-comparison`.

It detects instances where the result of a standard algorithm is used
directly in a boolean context without being compared against the
corresponding end iterator.

Currently the check can't handle algorithms returning `std::pair` and
`std::ranges::mismatch_result`, but it should be a good enough starting
point for future improvements.

As of AI-Usage: Assisted by Gemini CLI (for pre-commit reviewing,
documentation and some code refactor/cleanup)
Closes https://github.com/llvm/llvm-project/issues/178731

---------

Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
DeltaFile
+241-0clang-tools-extra/clang-tidy/bugprone/MissingEndComparisonCheck.cpp
+175-0clang-tools-extra/test/clang-tidy/checkers/Inputs/Headers/std/algorithm
+166-0clang-tools-extra/test/clang-tidy/checkers/bugprone/missing-end-comparison.cpp
+123-0clang-tools-extra/test/clang-tidy/checkers/bugprone/missing-end-comparison-cxx20.cpp
+91-0clang-tools-extra/docs/clang-tidy/checks/bugprone/missing-end-comparison.rst
+50-0clang-tools-extra/test/clang-tidy/checkers/bugprone/missing-end-comparison-cxx17.cpp
+846-08 files not shown
+1,018-014 files

LLVM/project 602481aclang/test/CodeGen ubsan-strict-flex-arrays-ignorelist.c

improve testr

Created using spr 1.3.7
DeltaFile
+24-23clang/test/CodeGen/ubsan-strict-flex-arrays-ignorelist.c
+24-231 files

LLVM/project 734012dllvm/lib/Target/RISCV RISCVFrameLowering.cpp, llvm/test/CodeGen/RISCV cmp-zilsd-csr.ll saverestore-zilsd-fixed-location.ll

[RISCV] Disable Zilsd CSR-pair generation when push/pop or save-restore is enabled (#200623)

We were generating duplicate/worse code due to the generation of the
`Zilsd` load/store doubles for handling `CSR's` when `Zcmp/Xqccmp` or
`Save/Restore Libcalls` were enabled.
DeltaFile
+80-0llvm/test/CodeGen/RISCV/cmp-zilsd-csr.ll
+24-0llvm/test/CodeGen/RISCV/saverestore-zilsd-fixed-location.ll
+4-2llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+108-23 files

LLVM/project c510c73clang/include/clang/Serialization ASTRecordReader.h, clang/lib/AST ASTContext.cpp Type.cpp

trivial changes
DeltaFile
+20-14clang/lib/Sema/SemaOpenMP.cpp
+18-14clang/lib/AST/ASTContext.cpp
+16-15clang/lib/Sema/SemaTemplate.cpp
+14-11clang/lib/AST/Type.cpp
+14-8clang/lib/AST/ASTDiagnostic.cpp
+11-6clang/include/clang/Serialization/ASTRecordReader.h
+93-6833 files not shown
+207-15939 files

LLVM/project a262cabclang/lib/AST ASTContext.cpp ItaniumMangle.cpp, clang/lib/Sema SemaCXXScopeSpec.cpp SemaTemplate.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.

This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+888-161clang/lib/AST/ASTContext.cpp
+328-12clang/test/SemaTemplate/instantiation-dependence.cpp
+178-96clang/lib/AST/ItaniumMangle.cpp
+100-98clang/lib/Sema/SemaCXXScopeSpec.cpp
+62-57clang/lib/AST/Type.cpp
+71-44clang/lib/Sema/SemaTemplate.cpp
+1,627-46869 files not shown
+2,391-79775 files

LLVM/project 8ce6c5fclang-tools-extra/clang-tidy/bugprone UseAfterMoveCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix false positive in bugprone-use-after-move for std::tie (#192895)

std::tie(a, b) = expr reinitializes all variables passed to std::tie
because the tuple assignment operator writes back through the stored
references. The check was not recognizing this pattern, causing a false
positive on the second std::tie assignment in loops like:

  std::tie(a, b) = foo(std::move(a), std::move(b));
  std::tie(a, b) = foo(std::move(a), std::move(b)); // false positive

Add std::tie assignment as a reinitialization case in
makeReinitMatcher().

Fixes #136105.

---

**AI Disclosure:** Claude (Anthropic) was used to assist in diagnosing
the CI test failure and identifying the off-by-one line number in the

    [5 lines not shown]
DeltaFile
+127-0clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
+9-0clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
+5-0clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+146-04 files

FreeBSD/ports b4cafcclang/spidermonkey115 distinfo Makefile

lang/spidermonkey115: update to 115.36.0

Also set EXPIRATION_DATE now that no ports consumers remain
DeltaFile
+3-3lang/spidermonkey115/distinfo
+3-3lang/spidermonkey115/Makefile
+1-0lang/spidermonkey115/pkg-plist
+7-63 files

LLVM/project dbab3f7llvm/lib/Analysis IVDescriptors.cpp, llvm/lib/Transforms/Vectorize LoopVectorizationLegality.cpp VPlanConstruction.cpp

[VPlan] Move IV predicate handling to VPlan. (#192876)
DeltaFile
+262-102llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
+8-102llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+69-0llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+32-32llvm/test/Transforms/LoopVectorize/induction.ll
+33-18llvm/lib/Analysis/IVDescriptors.cpp
+6-43llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
+410-2978 files not shown
+490-31414 files

FreeBSD/ports d22150asecurity/vuxml/vuln 2026.xml

security/vuxml: add xwayland vulnerabilities

Sponsored by:   tipi.work
DeltaFile
+35-0security/vuxml/vuln/2026.xml
+35-01 files

LLVM/project 6029be7llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.sched.group.barrier.gfx12.ll

[AMDGPU] Add IGLP mutations to CoexecSched

Change-Id: I91fe4079c8744dd41d5ddc7bd04c5b1691c13b78
DeltaFile
+116-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
+4-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+120-12 files