LLVM/project c7b4b4allvm/test/CodeGen/NVPTX lower-aggr-copies.ll

[NVPTX] Fix the build after ce465594e239. (#201268)

ce465594e239 (#201177) added sm_90 / PTX ISA 7.8 instructions to
lower-aggr-copies.ll, so we need to guard the RUN line appropriately.
DeltaFile
+1-1llvm/test/CodeGen/NVPTX/lower-aggr-copies.ll
+1-11 files

LLVM/project f91f589llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/MCTargetDesc AMDGPUMCExpr.cpp AMDGPUMCExpr.h

[AMDGPU] Added min operation for MCExprs (#199746)

The min operation is needed in MC Expressions for a future change that
caps the max number of registers used for indirect calls.

---------

Co-authored-by: JoshuaGrindstaff <jgrindst at amd.com>
DeltaFile
+106-0llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
+62-1llvm/test/MC/AMDGPU/mcexpr_amd.s
+16-1llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
+9-2llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.h
+11-0llvm/test/MC/AMDGPU/mcexpr_amd_err.s
+3-1llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+207-52 files not shown
+211-58 files

LLVM/project e0b580allvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[DAGCombiner] Remove untested visitVP_FADD and visitVP_FSUB. (#201247)

RISC-V no longer uses VP_FADD/FSUB in SelectionDAG.
DeltaFile
+116-168llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+116-1681 files

LLVM/project 866c39bllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[DAGCombiner] Remove no longer tested VP_MUL handling. (#201238)

We no longer use VP_MUL in SelectionDAG on RISC-V so this code isn't
tested.

This effectively reverts db6de1a20f75cbfe1024f41e64ad39def91fa70f
DeltaFile
+45-62llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+45-621 files

LLVM/project 70bca0fllvm/lib/Target/RISCV RISCVInsertVSETVLI.cpp, llvm/test/CodeGen/RISCV/rvv xsfmm-insert-vsetvl-TMTK.mir

[RISCV] Make VSETTM/VSETTK not affect the VSETVL emit (#197890)

VSETTM/TK will modify VTYPE, but it only affects the TM/TK bits. This
modification is safe for other RVV operations. The TM/TK value will be
maintained in insertVSETMTK.
DeltaFile
+195-0llvm/test/CodeGen/RISCV/rvv/xsfmm-insert-vsetvl-TMTK.mir
+6-0llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+201-02 files

FreeBSD/src e949ce9contrib/file/magic/Magdir archive firmware, contrib/file/src readelf.c funcs.c

MFV: file 5.47.

MFC after:      3 days
DeltaFile
+143-74contrib/file/magic/Magdir/archive
+109-96contrib/file/src/readelf.c
+140-5contrib/file/magic/Magdir/firmware
+112-0contrib/file/magic/Magdir/sf3
+77-26contrib/file/src/funcs.c
+101-1contrib/file/magic/Magdir/database
+682-20277 files not shown
+2,042-59683 files

LLVM/project a47bddcclang-tools-extra/clangd InlayHints.cpp, clang-tools-extra/clangd/unittests InlayHintTests.cpp

[clangd] Handle dependent call to function with explicit object parameter in InlayHintVisitor (#201264)

Dependent calls do not yet have the implicit object argument preprended
to the CallExpr's argument list, so the first argument should not be
expected to be present and dropped in this case.

Fixes https://github.com/llvm/llvm-project/issues/198588
DeltaFile
+15-0clang-tools-extra/clangd/unittests/InlayHintTests.cpp
+2-1clang-tools-extra/clangd/InlayHints.cpp
+17-12 files

OpenBSD/ports uLuqgr4sysutils/firmware/inteldrm distinfo Makefile

   update inteldrm firmware to 20260519
VersionDeltaFile
1.27+2-2sysutils/firmware/inteldrm/distinfo
1.31+1-1sysutils/firmware/inteldrm/Makefile
+3-32 files

OpenBSD/ports vWyVxQqsysutils/firmware/radeondrm distinfo Makefile

   update radeon firmware to 20260519
   no binary change
VersionDeltaFile
1.30+2-2sysutils/firmware/radeondrm/distinfo
1.34+1-1sysutils/firmware/radeondrm/Makefile
+3-32 files

FreeBSD/ports d5ad45fx11-wm/lxqt-wayland-session distinfo Makefile

x11-wm/lxqt-wayland-session: Update to 0.4.1

ChangeLog at:   https://lxqt-project.org/release/2026/05/29/point-release-lxqt-panel-2-4-1-wayland-session-0-4-1/
With hat:       lxqt
DeltaFile
+3-3x11-wm/lxqt-wayland-session/distinfo
+1-2x11-wm/lxqt-wayland-session/Makefile
+1-1x11-wm/lxqt-wayland-session/pkg-plist
+5-63 files

OpenBSD/ports AXSvhJZsysutils/firmware/amdgpu distinfo Makefile

   update amdgpu firmware to 20260519
VersionDeltaFile
1.34+2-2sysutils/firmware/amdgpu/distinfo
1.37+1-1sysutils/firmware/amdgpu/Makefile
+3-32 files

FreeBSD/ports 2b1230ax11-wm/lxqt-panel distinfo Makefile

x11-wm/lxqt-panel: Update to 2.4.1

ChangeLog at:   https://lxqt-project.org/release/2026/05/29/point-release-lxqt-panel-2-4-1-wayland-session-0-4-1/
DeltaFile
+3-3x11-wm/lxqt-panel/distinfo
+1-1x11-wm/lxqt-panel/Makefile
+4-42 files

FreeBSD/src 79746c4magic/Magdir archive firmware, src readelf.c funcs.c

Vendor import of file 5.47.
DeltaFile
+143-74magic/Magdir/archive
+109-96src/readelf.c
+140-5magic/Magdir/firmware
+112-0magic/Magdir/sf3
+77-26src/funcs.c
+101-1magic/Magdir/database
+682-20276 files not shown
+2,042-59582 files

LLVM/project 49bf4fallvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch pr198339.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+49-0llvm/test/CodeGen/LoongArch/pr198339.ll
+5-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+54-02 files

LLVM/project 6d7962dclang/docs ReleaseNotes.rst, clang/lib/Sema SemaOverload.cpp

[clang][CUDA] Avoid ambiguity in host/device template specializations (#201049)

This commit changes SemaOverload to resolve an otherwise diagnosed
ambiguity between addresses of template specializations of functions
that are overloaded for both device and host. Similar to how it works
for non-templated function overloads, these changes prioritizes the
specializations that corresponds to the target of the owning function,
i.e. if compiling for host, the address of the host specialization takes
precedence over the device specialization and vice versa.

Fixes https://github.com/llvm/llvm-project/issues/199299

---------

Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
DeltaFile
+28-0clang/test/SemaCUDA/addr-of-overloaded-template-fn.cu
+3-3clang/lib/Sema/SemaOverload.cpp
+4-0clang/docs/ReleaseNotes.rst
+2-0clang/test/SemaCUDA/addr-of-overloaded-fn.cu
+37-34 files

LLVM/project ee20b10bolt/include/bolt/Core BinaryContext.h DIEBuilder.h, bolt/lib/Core DIEBuilder.cpp

[BOLT] Fix data race in multi-threaded DWP type unit processing and DWP type unit duplication (#197359)

## Summary
This PR fixes a race condition in LLVM BOLT's
DIEBuilder::buildTypeUnits() that is triggered when DWARF5 split-DWARF
(.dwo/.dwp) inputs are processed with multi-threaded CU processing.
Concurrent invocations from different worker threads share the same DWP
type-unit state, which results in duplicated DIE extraction, assertion
failures, and intermittent crashes. The fix serializes buildTypeUnits()
for DWP inputs via a function-local static std::mutex, leaving the
non-DWO fast path unchanged.
## Problem Description
When BOLT processes DWARF debug info with --debug-thread-count=4
--cu-processing-batch-size=4 on testcase
dwarf5-df-types-dup-dwp-input.test, multiple threads concurrently call
DIEBuilder::buildTypeUnits() on shared DWP type units. Since type units
within a DWP file are shared across compilation units, multiple threads
may attempt to extract DIEs from the same type unit simultaneously,
violating the assertion.

    [5 lines not shown]
DeltaFile
+76-1bolt/lib/Core/DIEBuilder.cpp
+26-0bolt/test/X86/dwarf5-dwp-tsan-data-race.test
+7-0bolt/include/bolt/Core/BinaryContext.h
+4-3bolt/test/X86/dwarf5-df-types-dup-dwp-input.test
+1-5bolt/lib/Rewrite/DWARFRewriter.cpp
+3-0bolt/include/bolt/Core/DIEBuilder.h
+117-91 files not shown
+118-107 files

OpenBSD/ports IzRWomydevel/include-what-you-use Makefile distinfo, devel/include-what-you-use/patches patch-iwyu_include_picker_cc

   update to include-what-you-use 0.26 (llvm 22)
   ok tb@, who had the same diff
VersionDeltaFile
1.12+11-11devel/include-what-you-use/patches/patch-iwyu_include_picker_cc
1.9+0-7devel/include-what-you-use/pkg/PLIST
1.34+2-2devel/include-what-you-use/Makefile
1.14+2-2devel/include-what-you-use/distinfo
+15-224 files

OpenBSD/src llU5Nl4usr.bin/kdump kdump.c

   impossible __tmpfd(2) is gone
VersionDeltaFile
1.167+1-2usr.bin/kdump/kdump.c
+1-21 files

LLVM/project 45c4ebblldb/docs conf.py

[lldb] Enable MyST colon_fence and deflist extensions (NFC) (#201250)

Enable the colon_fence and deflist MyST parser extensions in the LLDB
docs configuration. This is a preparatory step for converting the
remaining reStructuredText documentation pages to Markdown, where these
two extensions are needed to translate RST admonition directives
(:::{note}) and definition lists.

Context:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/
DeltaFile
+1-1lldb/docs/conf.py
+1-11 files

OpenBSD/ports BrtJGh5math/grpn Makefile, math/grpn/patches patch-main_c

   unbreak build on llvm 22
VersionDeltaFile
1.3+13-3math/grpn/patches/patch-main_c
1.34+1-1math/grpn/Makefile
+14-42 files

LLVM/project 83318d0llvm/docs/tutorial/MyFirstLanguageFrontend LangImpl04.rst

[docs][Kaleidoscope] fix function name InitializeModuleAndManagers in Kaleidoscope (#199601)

### Description
resloves #199477 

The Kaleidoscope tutorial was not fully updated with the new Pass
Manager. This pr aligns the tutorial doc with the example code.

### Changes
- Use `InitializeModuleAndManagers` instead of
`InitializeModuleAndPassManager`.
- Remove `TheModule->setDataLayout(TheJIT->getDataLayout());` in line
141, as the `setDataLayout` was introduced later.
- Use `KaleidoscopeJIT` instead of `my cool jit` as the ModuleName, to
align with the final code.
DeltaFile
+11-13llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
+11-131 files

FreeBSD/ports bb4af12editors/diakonos pkg-plist distinfo

editors/diakonos: Update 0.9.7 => 0.10.0, take maintainership

Changelog:
https://github.com/Pistos/diakonos/blob/v0.10.0/CHANGELOG

PR:             295741
Sponsored by:   UNIS Labs
DeltaFile
+6-1editors/diakonos/pkg-plist
+3-3editors/diakonos/distinfo
+2-3editors/diakonos/Makefile
+11-73 files

LLVM/project 53938ballvm/test/CodeGen/RISCV/rvv vector-interleave.ll vector-interleave-fixed.ll

[RISCV] Remove experimental XRivosVizip support (#200761)

Remove experimental XRivosVizip support which will not be maintained by
RVIOS any more.
DeltaFile
+0-1,898llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+0-682llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+0-422llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
+0-318llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
+0-278llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
+0-146llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-zipeven-zipodd.ll
+0-3,74417 files not shown
+23-4,23823 files

OpenBSD/ports RmZA2m6databases/py-shillelagh Makefile distinfo, databases/py-shillelagh/pkg PLIST

   update py-shillelagh to 1.4.4
VersionDeltaFile
1.3+5-2databases/py-shillelagh/Makefile
1.2+2-2databases/py-shillelagh/distinfo
1.2+3-0databases/py-shillelagh/pkg/PLIST
+10-43 files

LLVM/project 8763a68llvm/lib/Target/M68k/AsmParser CMakeLists.txt

[M68k] Add to LINK_COMPONENTS to fix BUILD_SHARED_LIBS build (#201248)

Fixes: 6897c5e24ce5 ("[M68k][MC] Add MC support for PCI w/ base
displacement addressing mode (#200696)")
DeltaFile
+1-0llvm/lib/Target/M68k/AsmParser/CMakeLists.txt
+1-01 files

FreeBSD/ports f7f988fsysutils/bhyvemgr distinfo Makefile

sysutils/bhyvemgr: Update to 1.14.1

ChangeLog at:   https://github.com/alonsobsd/bhyvemgr/releases/tag/v1.14.1
DeltaFile
+3-3sysutils/bhyvemgr/distinfo
+1-1sysutils/bhyvemgr/Makefile
+4-42 files

OpenBSD/ports ceVjjq3www/jupyter-notebook Makefile, www/jupyter-notebook/pkg PLIST

   update jupyter-notebook to 7.5.6
VersionDeltaFile
1.29+64-64www/jupyter-notebook/pkg/PLIST
1.44+1-1www/jupyter-notebook/Makefile
+65-652 files

OpenBSD/ports mzy55vawww/jupyterlab distinfo Makefile, www/jupyterlab/pkg PLIST

   update jupyterlab to 4.5.7
VersionDeltaFile
1.17+77-77www/jupyterlab/pkg/PLIST
1.16+2-2www/jupyterlab/distinfo
1.16+1-1www/jupyterlab/Makefile
+80-803 files

LLVM/project f48e6b8llvm/lib/Target/NVPTX NVVMIntrRange.cpp, llvm/test/CodeGen/NVPTX intr-range.ll

[NVPTX] NVVMIntrRange: Handle maxntid > UINT32_MAX. (#201245)

Previously we computed the overall maxntid and downcast it to unsigned
int.  This is not correct; it can be larger than UINT32_MAX.

This would cause reads of tid.xyz and ntid.xyz to have incorrect range
information.  Also if maxntid was an exact multiple of 2^32, we'd get an
ICE (because we'd incorrectly think that maxntid is 0).
DeltaFile
+47-1llvm/test/CodeGen/NVPTX/intr-range.ll
+7-6llvm/lib/Target/NVPTX/NVVMIntrRange.cpp
+54-72 files

LLVM/project 19c7fdbclang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenModule.cpp, clang/test/CIR/CodeGen global-temp-dtor.cpp self-ref-temporaries.cpp

[CIR] Implement destruction of TLS and static global references (#200227)

This implements destruction of lifetime-extended reference temporaries
used to initialize TLS or static duration reference variables.

Assisted-by: Cursor / claude-opus-4.7
DeltaFile
+265-0clang/test/CIR/CodeGen/global-temp-dtor.cpp
+48-6clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+11-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+3-3clang/test/CIR/CodeGen/self-ref-temporaries.cpp
+4-2clang/lib/CIR/CodeGen/CIRGenModule.h
+2-2clang/test/CIR/CodeGenCXX/global-refs.cpp
+333-166 files