LLVM/project d0caa41llvm/include/llvm/Target/GlobalISel Combine.td, llvm/test/CodeGen/AArch64 neon-bitwise-instructions.ll neg-selects.ll

[GISel] import pattern `(A-(B-C)) to A+(C-B)` (#181676)

This PR imports the rewrite pattern `(A-(B-C)) to A+(C-B)` from
selectionDAG to GlobalISel.
The rewrite should only trigger when `B-C` is used once.
DeltaFile
+83-0llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
+10-0llvm/include/llvm/Target/GlobalISel/Combine.td
+2-2llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
+1-3llvm/test/CodeGen/AArch64/neg-selects.ll
+96-54 files

LLVM/project 9050794llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/X86 scalarization.ll scalarization-inseltpoison.ll

[SLP]Improve reductions for copyables/split nodes

The original support for copyables leads to a regression in x264 in
RISCV, this patch improves detection of the copyable candidates by more
precise checking of the profitability and adds and extra check for
splitnode reduction, if it is profitable.

Fixes #184313

Reviewers: hiraditya, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/185697
DeltaFile
+79-139llvm/test/Transforms/SLPVectorizer/RISCV/strided-loads-based-reduction.ll
+58-28llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+27-27llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
+16-20llvm/test/Transforms/SLPVectorizer/X86/PR39774.ll
+8-9llvm/test/Transforms/PhaseOrdering/X86/scalarization.ll
+8-9llvm/test/Transforms/PhaseOrdering/X86/scalarization-inseltpoison.ll
+196-2322 files not shown
+202-2398 files

LLVM/project 593683fmlir/include/mlir/Dialect/OpenACC OpenACCUtilsLoop.h, mlir/lib/Dialect/OpenACC/Utils OpenACCUtilsLoop.cpp OpenACCUtilsCG.cpp

[OpenACC][NFC] Generalize wrapMultiBlockRegionWithSCFExecuteRegion (#187359)

Simplify `wrapMultiBlockRegionWithSCFExecuteRegion` by replacing the
`bool convertFuncReturn` parameter with a generic `getNumSuccessors() ==
0` check. Terminators with no successors are by definition region exit
points, so they can be identified automatically without requiring
callers to specify types. This enables downstream dialects (e.g., CUF
with fir::FirEndOp) to reuse the utility without modifying it.

```
// Before:
wrapMultiBlockRegionWithSCFExecuteRegion(region, mapping, loc, rewriter, /*convertFuncReturn=*/true);

// After:
wrapMultiBlockRegionWithSCFExecuteRegion(region, mapping, loc, rewriter);
```
DeltaFile
+7-10mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
+4-4mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
+2-5mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
+1-1mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
+14-204 files

NetBSD/src ESGbpMFusr.sbin/pf/pflogd Makefile

   Define SIZEOF_TIME_T
VersionDeltaFile
1.7+2-2usr.sbin/pf/pflogd/Makefile
+2-21 files

LLVM/project e2c9ddellvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.s.ttracedata.ll

AMDGPU/GlobalISel: RegBankLegalize rules for s_ttracedata (#187342)
DeltaFile
+3-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+1-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.ttracedata.ll
+4-12 files

LLVM/project c9f6ad8libcxx/docs index.rst

[libc++][docs][NFC] Update Open XL supported version to 17.1.4 (#176112)

Open XL 17.1.4 based on LLVM21 was released:
https://www.ibm.com/docs/en/openxl-c-and-cpp-aix/17.1.4?topic=whats-new

Co-authored-by: Hristo Hristov <zingam at outlook.com>
DeltaFile
+1-1libcxx/docs/index.rst
+1-11 files

LLVM/project a693970llvm/test/Transforms/LICM store-hoisting.ll

[LICM] Regenerate test checks (NFC)
DeltaFile
+320-87llvm/test/Transforms/LICM/store-hoisting.ll
+320-871 files

LLVM/project b7776ccclang/lib/CIR/CodeGen CIRGenExprCXX.cpp, clang/test/CIR/CodeGen new.cpp

[CIR] Add support for array new with ctor init (#187418)

This adds support for array new initialization that requires calling
constructors.

This diverges a bit from the classic codegen implementation in a couple
of ways. First, we use the cir.array_ctor operation to represent all the
constructor calls that weren't part of an explicit initializer list.
This gets lowered to a loop during the LoweringPrepare pass. Second,
because CIR uses more explicit types, we have to insert a bitcast of the
array pointer to an explicit array type. Third, when an initializer list
is provided and we are calling constructors for the "filler" portion of
the list, we attempt to get the array size as a constant and create a
"tail array" to initialize that is sized to the number of elements
remaining.
DeltaFile
+191-1clang/test/CIR/CodeGen/new.cpp
+46-2clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+237-32 files

LLVM/project d18a784compiler-rt/lib/profile InstrProfilingPlatformGPU.c InstrProfiling.h, llvm/lib/Transforms/Instrumentation InstrProfiling.cpp

[compiler-rt] Define GPU specific handling of profiling functions (#185763)

Summary:
The changes in https://www.github.com/llvm/llvm-project/pull/185552
allowed us to
start building the standard `libclang_rt.profile.a` for GPU targets.
This PR expands this by adding an optimized GPU routine for counter
increment and removing the special-case handling of these functions in
the OpenMP runtime.

Vast majority of these functions are boilerplate, but we should be able
to do more interesting things with this in the future, like value or
memory profiling.
DeltaFile
+42-0compiler-rt/lib/profile/InstrProfilingPlatformGPU.c
+0-21openmp/device/include/Profiling.h
+0-18openmp/device/src/Profiling.cpp
+13-2llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+12-1offload/test/lit.cfg
+10-0compiler-rt/lib/profile/InstrProfiling.h
+77-424 files not shown
+78-5010 files

LLVM/project 923cc2dllvm/lib/Target/AMDGPU AMDGPUSplitModule.cpp, llvm/test/tools/llvm-split/AMDGPU kernels-dependencies.ll

[AMDGPU] Fix alias handling in module splitting functionality (#187295)

Summary:
The module splitting used for `-flto-partitions=8` support (which is
passed by default) did not correctly handle aliases. We mainly need to
do two things: keep the aliases in the they are used in and externalize
them. Internalize linkage needs to be handled conservatively.

This is needed because these aliases show up in PGO contexts.

---------

Co-authored-by: Shilei Tian <i at tianshilei.me>
DeltaFile
+17-6llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
+9-2llvm/test/tools/llvm-split/AMDGPU/kernels-dependencies.ll
+26-82 files

Linux/linux e9825d1drivers/base/power runtime.c, kernel/sched idle.c

Merge tag 'pm-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management fixes from Rafael Wysocki:
 "These fix an idle loop issue exposed by recent changes and a race
  condition related to device removal in the runtime PM core code:

   - Consolidate the handling of two special cases in the idle loop that
     occur when only one CPU idle state is present (Rafael Wysocki)

   - Fix a race condition related to device removal in the runtime PM
     core code that may cause a stale device object pointer to be
     dereferenced (Bart Van Assche)"

* tag 'pm-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm:
  PM: runtime: Fix a race condition related to device removal
  sched: idle: Consolidate the handling of two special cases
DeltaFile
+21-9kernel/sched/idle.c
+1-0drivers/base/power/runtime.c
+22-92 files

Linux/linux d107dc8drivers/acpi acpi_processor.c bus.c, drivers/acpi/acpica acpredef.h

Merge tag 'acpi-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull ACPI support fixes from Rafael Wysocki:
 "These fix an MFD child automatic modprobe issue introduced recently,
  an ACPI processor driver issue introduced by a previous fix and an
  ACPICA issue causing confusing messages regarding _DSM arguments to be
  printed:

   - Update the format of the last argument of _DSM to avoid printing
     confusing error messages in some cases (Saket Dumbre)

   - Fix MFD child automatic modprobe issue by removing a stale check
     from acpi_companion_match() (Pratap Nirujogi)

   - Prevent possible use-after-free in acpi_processor_errata_piix4()
     from occurring by rearranging the code to print debug messages
     while holding references to relevant device objects (Rafael
     Wysocki)"


    [4 lines not shown]
DeltaFile
+8-7drivers/acpi/acpi_processor.c
+0-3drivers/acpi/bus.c
+1-1drivers/acpi/acpica/acpredef.h
+9-113 files

FreeNAS/freenas 525d93esrc/middlewared/middlewared/utils shutil.py

Remove unused rmtree_on_filesystem method

This commit removes some dead code from middlewared.utils.
DeltaFile
+0-12src/middlewared/middlewared/utils/shutil.py
+0-121 files

OpenBSD/ports v83xeYutextproc/p5-XML-Parser distinfo Makefile, textproc/p5-XML-Parser/pkg PLIST

   update to p5-XML-Parser-2.48
   fixes CVE-2006-10002, CVE-2006-10003 heap corruption/overflow
VersionDeltaFile
1.14+25-22textproc/p5-XML-Parser/pkg/PLIST
1.13+2-2textproc/p5-XML-Parser/distinfo
1.37+2-1textproc/p5-XML-Parser/Makefile
+29-253 files

FreeNAS/freenas 979811dsrc/middlewared/middlewared/plugins/enclosure_ enclosure2.py, src/middlewared/middlewared/service core_service.py

retain cli_private on enclosure2
DeltaFile
+1-1src/middlewared/middlewared/plugins/enclosure_/enclosure2.py
+1-1src/middlewared/middlewared/service/core_service.py
+2-22 files

LLVM/project d8a83a1llvm/test/CodeGen/SPIRV/pointers global-ptrtoint.ll nested-struct-opaque-pointers.ll, llvm/test/CodeGen/SPIRV/transcoding ConvertPtrInGlobalInit.ll

[NFC][SPIR-V] Disable tests failed after spirv-val update (#187028)

Issues:
- https://github.com/llvm/llvm-project/issues/186344
- https://github.com/llvm/llvm-project/issues/186756
DeltaFile
+4-2llvm/test/CodeGen/SPIRV/pointers/global-ptrtoint.ll
+3-1llvm/test/CodeGen/SPIRV/pointers/nested-struct-opaque-pointers.ll
+3-1llvm/test/CodeGen/SPIRV/pointers/PtrCast-in-OpSpecConstantOp.ll
+3-1llvm/test/CodeGen/SPIRV/transcoding/ConvertPtrInGlobalInit.ll
+3-1llvm/test/CodeGen/SPIRV/pointers/struct-opaque-pointers.ll
+16-65 files

Illumos/gate 459a59fusr/src/uts/common/klm nlm_rpc_handle.c

17962 klm: refresh_nlm_rpc() handle re-init is missing CLSET_BINDSRCADDR
Reviewed by: Gordon Ross <Gordon.W.Ross at gmail.com>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+37-26usr/src/uts/common/klm/nlm_rpc_handle.c
+37-261 files

OPNSense/core 0713b67src/opnsense/mvc/app/controllers/OPNsense/Dnsmasq/Api LeasesController.php, src/opnsense/mvc/app/views/OPNsense/Dnsmasq leases.volt

Services: Dnsmasq DNS & DHCP: Since client-id is a valid IPv4 reservation type as well, ensure the lease view handles it correctly. The same is also true for MAC address as IPv6 reservation type.
DeltaFile
+15-7src/opnsense/mvc/app/controllers/OPNsense/Dnsmasq/Api/LeasesController.php
+9-2src/opnsense/mvc/app/views/OPNsense/Dnsmasq/leases.volt
+24-92 files

LLVM/project d049eefllvm/include/llvm/Target TargetSelectionDAG.td, llvm/lib/Target/X86 X86InstrCompiler.td X86InstrFragments.td

[DAG] Use value tracking to detect or_disjoint patterns and add a add_like pattern matcher (#187478)

Extend the generic or_disjoint pattern to call haveNoCommonBitsSet, this
allows us to remove the similar x86 or_is_add pattern, use or_disjoint
directly and merge some add/or_is_add matching patterns to use a
add_like wrapper pattern instead
DeltaFile
+13-18llvm/lib/Target/X86/X86InstrCompiler.td
+16-13llvm/test/CodeGen/X86/fold-masked-merge.ll
+0-10llvm/lib/Target/X86/X86InstrFragments.td
+6-1llvm/include/llvm/Target/TargetSelectionDAG.td
+35-424 files

OpenBSD/src LdntIe3usr.sbin/bgpd bgpd_imsg.c

   You can not use ibuf_add_n32 for an signed 32bit type.

   ibuf_add_nXY() and ibuf_add_hXY() pass values as uint64_t so the sign
   extension of a negative 32bit value will cause an overflow check to trigger.
   The relative metric field can be negative and so this will trigger this
   error. Use ibuf_add() instead, which is more what this should use anyway.

   Found the hard way by sthen@ who also debugged it.
   OK tb@ sthen@
VersionDeltaFile
1.4+6-5usr.sbin/bgpd/bgpd_imsg.c
+6-51 files

LLVM/project 4199bb1llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp

[AMDGPU] Simplify loop in AMDGPULowerVGPREncoding::handleCoissue. NFC. (#187511)
DeltaFile
+1-4llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+1-41 files

LLVM/project c5c0b83mlir/include/mlir/Dialect/MemRef/Transforms Passes.td Transforms.h, mlir/lib/Dialect/MemRef/Transforms ElideReinterpretCast.cpp CMakeLists.txt

[mlir][memref] Rewrite scalar `memref.copy` through reinterpret_cast into load/store (#186118)

This change adds a rewrite that simplifies `memref.copy` operations whose
destination is a scalar view produced by `memref.reinterpret_cast`.

The pattern matches cases where a reinterpret cast creates a scalar view
(`sizes = [1, ..., 1]`) into a memref that has a single non-unit dimension. In
this situation the view refers to exactly one element in the base buffer, so
the accessed address depends only on the base pointer and the offset.

The stride information of the view does not affect the accessed element,
because the only valid index into the view is `[0, ..., 0]`.

Therefore the copy can be rewritten into a direct load from the source and a
store into the base memref using the offset from the reinterpret cast.

This makes the `memref.reinterpret_cast` redundant for the copy and simplifies
the IR.


    [53 lines not shown]
DeltaFile
+225-0mlir/lib/Dialect/MemRef/Transforms/ElideReinterpretCast.cpp
+222-0mlir/test/Dialect/MemRef/elide-reinterpret-cast.mlir
+10-0mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
+4-0mlir/include/mlir/Dialect/MemRef/Transforms/Transforms.h
+1-0mlir/lib/Dialect/MemRef/Transforms/CMakeLists.txt
+462-05 files

FreeNAS/freenas aeb76acsrc/middlewared/middlewared/plugins/container container.py migrate.py

NAS-140358 / 26.0.0-BETA.1 / Improve container migration for NIC devices, MAC addresses, and CPU pinning (by Qubad786) (#18512)

## Context

Improve Incus-to-container migration with the following changes:

- NIC device validation now correctly checks interface names against
both BRIDGE and MACVLAN choices instead of top-level dict keys
- MAC address lookup uses the Incus device name (e.g. `eth0`) for
volatile config keys instead of the parent interface (e.g. `br0`)
  - Preserve CPU pinning (`limits.cpu`) during migration
- Reject underscores in cpuset values that Python's `int()` silently
accepts as numeric separators

Original PR: https://github.com/truenas/middleware/pull/18506

Co-authored-by: M. Rehan <mrehanlm93 at gmail.com>
DeltaFile
+10-7src/middlewared/middlewared/plugins/container/container.py
+4-2src/middlewared/middlewared/plugins/container/migrate.py
+14-92 files

NetBSD/src y4pJg5Csys/arch/x68k/conf files.x68k, sys/arch/x68k/include vectors.h

   Use the common m68k vec_init() routine.
VersionDeltaFile
1.1+47-0sys/arch/x68k/include/vectors.h
1.150+2-35sys/arch/x68k/x68k/locore.s
1.88+2-1sys/arch/x68k/conf/files.x68k
+51-363 files

FreeNAS/freenas df8e120src/middlewared/middlewared/plugins/container container.py migrate.py

NAS-140358 / 26.0.0-BETA.2 / Improve container migration for NIC devices, MAC addresses, and CPU pinning (#18506)

## Context

Improve Incus-to-container migration with the following changes:

- NIC device validation now correctly checks interface names against
both BRIDGE and MACVLAN choices instead of top-level dict keys
- MAC address lookup uses the Incus device name (e.g. `eth0`) for
volatile config keys instead of the parent interface (e.g. `br0`)
  - Preserve CPU pinning (`limits.cpu`) during migration
- Reject underscores in cpuset values that Python's `int()` silently
accepts as numeric separators
DeltaFile
+10-7src/middlewared/middlewared/plugins/container/container.py
+4-2src/middlewared/middlewared/plugins/container/migrate.py
+14-92 files

FreeNAS/freenas 8dcdbc6src/middlewared/middlewared/migration 0012_libvirt_uid_gid.py, src/middlewared/middlewared/plugins/zfs zvol_utils.py

NAS-140362 / 26.0.0-BETA.1 / Fix vm.device.query filters to use attributes.dtype after pydantic conversion (by Qubad786) (#18511)

## Problem

After the Pydantic model conversion for VM devices, `dtype` was moved
into the `attributes` dict. Two callers of `vm.device.query` still
filter on the top-level `dtype` field, causing the filters to match
nothing.

## Solution

Update the query filters in `0012_libvirt_uid_gid.py` and
`zvol_utils.py` to use `attributes.dtype` instead of `dtype`.

Original PR: https://github.com/truenas/middleware/pull/18510

Co-authored-by: M. Rehan <mrehanlm93 at gmail.com>
DeltaFile
+2-2src/middlewared/middlewared/migration/0012_libvirt_uid_gid.py
+1-1src/middlewared/middlewared/plugins/zfs/zvol_utils.py
+3-32 files

LLVM/project c63ce62llvm/test/CodeGen/AMDGPU si-lower-i1-copies.mir

[NFC][AMDGPU] New test for untested case in SILowerI1Copies (#186127)

[This
line](https://github.com/ambergorzynski/llvm-project/blob/main/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp#L646)
is untested by the existing LLVM test suite (checked using code coverage
and by inserting an `abort`).

We propose a new test that exercises this case. The test is demonstrated
by adding an abort to show that it is the only test that fails (the
abort is removed before merging).
DeltaFile
+112-1llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir
+112-11 files

FreeNAS/freenas d38e249src/middlewared/middlewared/migration 0012_libvirt_uid_gid.py, src/middlewared/middlewared/plugins/zfs zvol_utils.py

NAS-140362 / 26.0.0-BETA.2 / Fix vm.device.query filters to use attributes.dtype after pydantic conversion (#18510)

## Problem

After the Pydantic model conversion for VM devices, `dtype` was moved
into the `attributes` dict. Two callers of `vm.device.query` still
filter on the top-level `dtype` field, causing the filters to match
nothing.

## Solution

Update the query filters in `0012_libvirt_uid_gid.py` and
`zvol_utils.py` to use `attributes.dtype` instead of `dtype`.
DeltaFile
+2-2src/middlewared/middlewared/migration/0012_libvirt_uid_gid.py
+1-1src/middlewared/middlewared/plugins/zfs/zvol_utils.py
+3-32 files

LLVM/project 2754e35mlir/lib/Conversion/MemRefToEmitC MemRefToEmitC.cpp, mlir/test/Conversion/MemRefToEmitC memref-to-emitc-alloc-load-store.mlir

[mlir][EmitC] Support pointer-based memrefs in load/store lowering (#186828)

## Problem  
  
In the MemRef → EmitC conversion, `memref.load` and `memref.store`
assume that the converted memref operand is an `emitc.array`, as defined
by the type conversion in `populateMemRefToEmitCTypeConversion`.
  
However, `memref.alloc` is lowered to a `malloc` call returning
`emitc.ptr`. When such values are used by `memref.load` or
`memref.store`, the conversion framework inserts a bridging
`builtin.unrealized_conversion_cast` from `emitc.ptr` to `emitc.array`.
  
These casts have no EmitC representation and therefore remain in the IR
after conversion, preventing valid C/C++ emission.

## Solution  
  
Extend the `memref.load` and `memref.store` conversions to handle

    [74 lines not shown]
DeltaFile
+71-10mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
+74-0mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-alloc-load-store.mlir
+145-102 files

FreeNAS/freenas c761034src/middlewared/middlewared/api/base/server method.py, src/middlewared/middlewared/service core_service.py

consider methods under private namespaces as truly private
DeltaFile
+3-0src/middlewared/middlewared/service/core_service.py
+1-1src/middlewared/middlewared/api/base/server/method.py
+4-12 files