[Clang][Sema] Fix crash in UnresolvedMemberExpr check (#209792)
This closes https://github.com/llvm/llvm-project/issues/209427
The test currently crashes because while iterating over the candidate
members of an unresolved member expression, `decl` is a `UsingShadowDecl`
with underlying decl as `UnresolvedUsingValueDecl`.
The current `isa<UnresolvedUsingValueDecl>(decl)` guard only checks the
outer `UsingShadowDecl` and misses the unresolved-using decl hidden
inside it, so `getAsFunction()` returns nullptr and
`cast<CXXMethodDecl>(nullptr)` asserts.
This patch checks the `UnresolvedUsingValueDecl` inside by calling
`getUnderlyingDecl()` before the guard.
This used to happen before a2794f9f363361f87a3538b90b78ff13381d5ce1.
libtorrent rtorrent: updated to 0.16.18
0.16.18
Encryption settings have changed to be easier to use, and changing listen or DHT ports can be done while rtorrent is running.
nsis: updated to 3.12
3.12
Security
Don't use the Low IL temp directory when elevated
This stops a possible privilege escalation for installers running as SYSTEM.
Minor Changes
Added StartsWith[S], EndsWith[S], Contains[S], IsLowerCase and IsUpperCase LogicLib operators.
Build System
Support Python older than 3.6 again
Preliminary ARM64 support in makensis.nsi
[lldb][NativePDB] Use active bits for constant width (#196104)
Static constants with bit widths less than 16 (e.g. char/unsigned char)
in classes were not available. These constants are still encoded with 16
bits
([here](https://github.com/llvm/llvm-project/blob/dd145eb8997878143f648a7601741f6409330963/llvm/lib/DebugInfo/CodeView/CodeViewRecordIO.cpp#L341-L343))
even though they only need less bits. When we tried to create an
initializer for them, we'd check if the bit width (=16) was small enough
to fit into the target (<16). This would fail.
This was a problem in the following code:
```cpp
struct Foo {
// width(unsigned char) = 8, but 255 was encoded and read as 16 bit
static constexpr unsigned char u8_max = 255;
};
```
This PR fixes the issue by using `APSInt::getActiveBits` for unsigned
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[AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (#209517)
Warn if an entrypoint does not start with the standard workaround
sequence.
[SPIR-V] Preserve signed i1 semantics in sitofp (#209232)
selectIToF hardcoded IsSigned=false when materializing the bool-to-int
conversion, so sitofp i1 true was miscompiled as 1.0 instead of -1.0
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When importing ARM64X
image, add both native and EC views to the symbol table on EC targets.
Also getMachine() on such images returns ARM64X, treat it as ARM64
instead.
AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper
Here we also had to change comparisons to extended LLTs to avoid
matching bfloats. In the old scalar version, before the switch to extended
LLTs, s16 was treated as f16 and bf16 was combined as if it were f16.
AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering
We could get away with just the type from MMO in most cases, but MMO splitting
creates MMO with LLT::scalar and we prefer integer.
AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store
Affects f16 and bf16. Earlier, they were widened to f32 and s32 respectively.
The actual error was the artifact combiner creating a copy between f32/i32
which fails in the machine verifier. Maybe we could create a bitcast there.
However i32 is more efficient for us and matches well with how argument
lowering keeps f16 and bf16 in i32 copies to/from physical registers.
Also starting from f16 store, G_STORE %0(f16), %1(p1) :: (store (f16),
and doing widen scalar to 32 bit type, i32 makes more sense since store
will store 16 least significant bits G_STORE %0(i32), %1(p1) :: (store (f16)
compared to G_STORE %0(f32), %1(p1) :: (store (f16), which looks incorrect if
we assume input was really in f32 format.
AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT
Use LLT::integer in bit twiddling lowering for extract/insert vector element.
