LLVM/project 39d5aeamlir/include/mlir/Dialect/OpenACC OpenACCUtilsLoop.h, mlir/lib/Dialect/OpenACC/Utils OpenACCUtilsLoop.cpp

[OpenACC] Replace terminators with scf.yield in wrapMultiBlockRegionWithSCFExecuteRegion (#184458)

When wrapping a multi-block region in `scf.execute_region`, replace
`func::ReturnOp` (if flag `convertFuncReturn` is set) and `acc::YieldOp`
in all the blocks with `scf.yield` so the region has a valid SCF
terminator.
DeltaFile
+154-0mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
+20-13mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
+10-6mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
+184-193 files

LLVM/project a4207f3llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll

Merge branch 'main' into users/KseniyaTikhomirova/usm_3_alloc
DeltaFile
+84,419-78,498llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,751-24,782llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+23,663-20,281llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+21,867-18,577llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+13,685-22,906llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+19,112-16,445llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+188,497-181,4891,674 files not shown
+348,974-290,2321,680 files

LLVM/project 613a5c5mlir/include/mlir/Dialect/Vector/TransformOps VectorTransformOps.td, mlir/include/mlir/Dialect/Vector/Transforms LoweringPatterns.h

[mlir][vector] Replace OneDimMultiReductionToTwoDim with OneDimMultiReductionToReduction (#184241)

The `OneDimMultiReductionToTwoDim` pattern had some issues. For the
input program:

```mlir
func.func @rank1_multi_reduction(%arg0: vector<8xf32>, %acc: f32) -> f32 {
    %0 = vector.multi_reduction <add>, %arg0, %acc [0] : vector<8xf32> to f32
    return %0 : f32
}
```

* when lowering using the inner-parallel strategy, the compiler would
essentially produce scalar code:
```mlir
func.func @rank1_multi_reduction(%arg0: vector<8xf32>, %arg1: f32) -> f32 {
    %0 = vector.shape_cast %arg0 : vector<8xf32> to vector<1x8xf32>
    %1 = vector.broadcast %arg1 : f32 to vector<1xf32>
    %2 = vector.transpose %0, [1, 0] : vector<1x8xf32> to vector<8x1xf32>

    [38 lines not shown]
DeltaFile
+0-102mlir/test/Dialect/Vector/vector-multi-reduction-reorder-and-expand.mlir
+30-63mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
+62-0mlir/test/Dialect/Vector/vector-multi-reduction-reorder.mlir
+25-8mlir/test/Dialect/Vector/vector-multi-reduction-unrolling.mlir
+10-8mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
+4-7mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
+131-1887 files not shown
+142-19913 files

FreeNAS/freenas 0373099src/middlewared/middlewared/plugins/failover_ datastore.py

go back to 10 timeout
DeltaFile
+1-1src/middlewared/middlewared/plugins/failover_/datastore.py
+1-11 files

FreeNAS/freenas f55c944src/middlewared/middlewared/plugins/failover_ datastore.py

address review
DeltaFile
+3-4src/middlewared/middlewared/plugins/failover_/datastore.py
+3-41 files

LLVM/project 7b72b5futils/bazel/llvm-project-overlay/lldb BUILD.bazel

[bazel] Fix building lldb without libedit (#184535)

We were always trying to compile the libedit file even if it wasn't used
because we were missing this conditional from cmake:


https://github.com/llvm/llvm-project/blob/630b9570d199dca19dc85834f583bc8590a21876/lldb/source/Host/CMakeLists.txt#L57-L61
DeltaFile
+19-7utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+19-71 files

FreeBSD/ports e52cf2bwww/grafana distinfo Makefile

www/grafana: Update 12.3.3 => 12.4.0

Release Notes:
https://grafana.com/blog/grafana-12-4-release-all-the-latest-features/

What's new:
https://grafana.com/docs/grafana/latest/whatsnew/whats-new-in-v12-4/

Changelogs:
https://github.com/grafana/grafana/releases/tag/v12.3.4
https://github.com/grafana/grafana/releases/tag/v12.4.0

PR:     293564
DeltaFile
+77-63www/grafana/distinfo
+11-4www/grafana/Makefile
+88-672 files

FreeBSD/src 119bdeausr.sbin/bhyve iov.c

bhyve: Fix truncate_iov()

The implementation was simply wrong.  It would always just return the
first entry in the iovec, even if the requested length is larger than
that first entry.

Note, this function will be removed soon, see D53468.

Reported by:    Vinod p n <vinod272 at gmail.com>
Reviewed by:    des, emaste, Hans Rosenfeld <rosenfeld at grumpf.hope-2000.org>
MFC after:      3 days
Differential Revision:  https://reviews.freebsd.org/D55438

(cherry picked from commit d7d4da91de201841c57a6b8f89b450754b9b8696)
DeltaFile
+5-10usr.sbin/bhyve/iov.c
+5-101 files

LLVM/project 8486d89llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp

[SelectionDAG] Fix -Wunused-variable after #179318 (#184623)

```
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3572:26: error: unused variable 'NanEnc' [-Werror,-Wunused-variable]
 3572 |     const fltNanEncoding NanEnc = SrcSem.nanEncoding;
      |                          ^~~~~~
```

Simply inline the definition of the variable given it is not used
anywhere else and the assignment is a simple copy.
DeltaFile
+1-2llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+1-21 files

LLVM/project a40e83blibsycl/include/sycl/__impl queue.hpp property_list.hpp, libsycl/include/sycl/__impl/detail default_async_handler.hpp

[libsycl] Add sycl::queue stub (#184110)

Part 2 of changes needed for USM alloc/dealloc impl.

This is part of the SYCL support upstreaming effort. The relevant RFCs
can be found here:


https://discourse.llvm.org/t/rfc-add-full-support-for-the-sycl-programming-model/74080
https://discourse.llvm.org/t/rfc-sycl-runtime-upstreaming/74479

---------

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+151-0libsycl/include/sycl/__impl/queue.hpp
+74-0libsycl/src/detail/queue_impl.hpp
+55-0libsycl/include/sycl/__impl/detail/default_async_handler.hpp
+36-0libsycl/src/queue.cpp
+33-0libsycl/include/sycl/__impl/property_list.hpp
+33-0libsycl/include/sycl/__impl/async_handler.hpp
+382-04 files not shown
+412-010 files

LLVM/project 53aa770flang/tools/f18 CMakeLists.txt

[flang] Fix distribution build of Fortran builtin/intrinsic modules. (#184204)

Currently, `-DLLVM_DISTRIBUTION_COMPONENTS="flang-module-interfaces"`
doesn't work. It failed to build the Fortran builtin/intrinsic modules
as distribution build, `install-distribution`.
This PR is to fix that.
DeltaFile
+2-0flang/tools/f18/CMakeLists.txt
+2-01 files

FreeBSD/src bc39147sys/kern bus_if.m

bus_if: Fix typo

Reviewed by:    olce
Approved by:    olce
Fixes:  4c4392e791b7 ("Add doxygen doc comments for most of newbus and the BUS interface.")
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D48721
DeltaFile
+1-1sys/kern/bus_if.m
+1-11 files

OPNSense/core 06c79f2src/opnsense/mvc/app/controllers/OPNsense/Unbound/forms dnsbl.xml, src/opnsense/mvc/app/views/OPNsense/Interface overview.volt

bootgrid: introduce 'expand' formatter to cap lists of data
DeltaFile
+2-51src/opnsense/mvc/app/views/OPNsense/Interface/overview.volt
+47-0src/opnsense/www/js/opnsense_bootgrid.js
+9-0src/opnsense/mvc/app/controllers/OPNsense/Unbound/forms/dnsbl.xml
+2-1src/opnsense/mvc/app/views/layouts/default.volt
+60-524 files

FreeBSD/src 2c60fcesys/dev/amdsmu amdsmu.c amdsmu.h, sys/modules/amdsmu Makefile

amdsmu: Sleep entry/exit hints for PMFW

amdsmu_suspend() and amdsmu_resume() for sending hints to the AMD SMU
power management firmware (PMFW) that we are entering and exiting
s2idle. We also dump sleep metrics once we tell it we're exiting sleep,
so the relevant metrics are updated.

Register these as acpi_post_dev_suspend and acpi_post_dev_resume
eventhandlers.

Reviewed by:    olce
Approved by:    olce
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D48721
DeltaFile
+47-1sys/dev/amdsmu/amdsmu.c
+9-2sys/dev/amdsmu/amdsmu.h
+2-1sys/modules/amdsmu/Makefile
+1-0sys/dev/amdsmu/amdsmu_reg.h
+59-44 files

OpenBSD/ports BvxuI54textproc/libxml Makefile distinfo, textproc/libxml/patches patch-meson_build patch-xmllint_c

   SECURITY update to libxml-2.15.2.
VersionDeltaFile
1.245+2-3textproc/libxml/Makefile
1.91+2-2textproc/libxml/distinfo
1.3+2-2textproc/libxml/patches/patch-meson_build
1.15+1-1textproc/libxml/patches/patch-xmllint_c
+7-84 files

SmartOS/live af99d6asrc manifest, src/vm/node_modules VM.js

OS-8711 Support cloud-init NoCloud datasource for Bhyve guests

Portions contributed by: Claude Opus 4.5 & 4.6 <noreply at anthropic.com>
Reviewed by: Dan McDonald <danmcd at edgecast.io>
Reviewed by: Carlos Neira <cneira at edgecast.io>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+1,488-0src/vm/tests/test-cloudinit-nocloud.js
+344-0src/vm/node_modules/cloudinit/nocloud.js
+270-0src/vm/node_modules/cloudinit/lofs-fat16.js
+162-18src/vm/node_modules/VM.js
+30-0src/vm/node_modules/cloudinit/index.js
+4-0src/manifest
+2,298-181 files not shown
+2,300-187 files

LLVM/project e8e8d30clang/lib/Headers hvx_hexagon_protos.h, clang/test/Headers hexagon-hvx-ieee-headers.c

[Hexagon] Use __HVX_IEEE_FP__ to guard protos that need -mhvx-ieee-fp (#184422)

Hexagon clang recently started to define __HVX_IEEE_FP__ when the
-mhvx-ieee-fp option is specified. Guard the intrinsic macros for
instructions that should only be available with -mhvx-ieee-fp with
__HVX_IEEE_FP__.

Additionally, the following NFC changes are included:

- NFC: Remove guards around HVX v60 intrinsic macros
  Hexagon v60 is the oldest Hexagon version that supports HVX so these
  guards were redundant. Presence of HVX is guarded separately, once
  per the whole file.

- Remove comments from closing guards (HVX protos)
  These comments served very limited function as they only guard
  one macro. Also, they were incorrect. Instead of fixing remove them.
  This will also reduce by the factor of two the amount of changes
  when guarding conditions change.
DeltaFile
+287-891clang/lib/Headers/hvx_hexagon_protos.h
+20-0clang/test/Headers/hexagon-hvx-ieee-headers.c
+307-8912 files

LLVM/project 9402f94libsycl/include/sycl/__impl queue.hpp, libsycl/src/detail queue_impl.hpp

fix wording

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+1-1libsycl/include/sycl/__impl/queue.hpp
+1-1libsycl/src/detail/queue_impl.hpp
+2-22 files

LLVM/project f55080dflang/lib/Lower/OpenMP ClauseProcessor.cpp OpenMP.cpp, flang/test/Lower/OpenMP implicit-map-pointer-no-default-mapper.f90 target-data-skip-mapper-calls.f90

[flang][OpenMP] Avoid implicit default mapper on pointer captures (#184382)

This change fixes incorrect implicit declare mapper behavior in Flang
OpenMP lowering.

Issue:
Implicit default mappers were being attached/generated for pointer-based
implicit captures, and also on data-motion directives. That could
trigger recursive component mapping that overlaps/conflicts with
explicit user mappings, causing runtime mapping failures.

Fix:

- Skip implicit default mapper generation for implicit pointer captures
(keep support for allocatables).
- Do not auto-attach implicit mappers on target enter data, target exit
data, or target update.
- Apply the same pointer guard in the implicit target-capture lowering
path.
DeltaFile
+26-0flang/test/Lower/OpenMP/implicit-map-pointer-no-default-mapper.f90
+20-1flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+6-3flang/lib/Lower/OpenMP/OpenMP.cpp
+6-0flang/test/Lower/OpenMP/target-data-skip-mapper-calls.f90
+58-44 files

LLVM/project 247a9bfmlir/lib/Dialect/AMDGPU/Transforms FoldMemRefsOps.cpp, mlir/test/Dialect/AMDGPU amdgpu-fold-memrefs.mlir

[mlir][AMDGPU] Add folders for memref aliases to TDM base creation (#184567)

The TDM base creation (amdgpu.make_tdm_base and
amdgpu.make_gather_tdm_base) take references to a
`%memref[%i0, %i1,, ...]` for the starting point of the tiles in
global/shared memory that the TDM descriptor refers to. Memory alias ops
can be safely folded into these operations, since these two memref
operands are just pointers to a scalar starting pint and don't have
semantics that depend on the memref layout (except to the extent that it
defines a location in memory).

While I'm here, I've cleaned up a few things, like the incorrect file
header and fixed the tests to not use integer address spaces.

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+156-24mlir/test/Dialect/AMDGPU/amdgpu-fold-memrefs.mlir
+44-4mlir/lib/Dialect/AMDGPU/Transforms/FoldMemRefsOps.cpp
+200-282 files

FreeBSD/src 40e52e0lib/libc/stdlib system.c

system(3): Unwrap execve()

There is no need to call execl(), which will allocate an array and copy
our arguments into it, when we can use a static array and call execve()
directly.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Reviewed by:    kevans
Differential Revision:  https://reviews.freebsd.org/D55648
DeltaFile
+3-1lib/libc/stdlib/system.c
+3-11 files

FreeBSD/ports 697d264textproc/libxml2 distinfo Makefile, textproc/libxml2/files xmllint.1 xmlcatalog.1

textproc/libxml2: update to 2.15.2

Changelog: https://gitlab.gnome.org/GNOME/libxml2/-/blob/v2.15.2/NEWS
(cherry picked from commit 0734d7476a36a67f16580afb65b79375a3ae9fc9)
DeltaFile
+3-5textproc/libxml2/distinfo
+3-3textproc/libxml2/files/xmllint.1
+1-4textproc/libxml2/Makefile
+2-2textproc/libxml2/files/xmlcatalog.1
+1-1textproc/libxml2/pkg-plist
+10-155 files

OpenBSD/ports xH4Q5Kzsysutils/gemini-cli Makefile, sysutils/gemini-cli/patches patch-lib_node_modules_@google_gemini-cli_dist_index_js

   Unbreak runtime.
   Reported by kirill@, thanks
VersionDeltaFile
1.1+11-0sysutils/gemini-cli/patches/patch-lib_node_modules_@google_gemini-cli_dist_index_js
1.9+4-0sysutils/gemini-cli/Makefile
+15-02 files

LLVM/project a3eb13bllvm/lib/Target/X86 X86ISelDAGToDAG.cpp, llvm/test/CodeGen/X86 mulx64-no-implicit-copy.ll

[X86] remove unnecessary movs when %rdx is an input to mulx (#184462)

Closes: https://github.com/llvm/llvm-project/issues/174912

When generating a `mulx` instruction for a widening multiplication, even
if one input is placed in %rdx, LLVM won't place it in the implicit
first slot, instead it'll generate two movs before calling mulx to swap
the registers, which are unnecessary. GCC already has this optimization
(as shown in the issue) so this puts the two compilers closer to each
other on that front.

Co-authored-by: Aiden Grossman <aidengrossman at google.com>
DeltaFile
+69-0llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
+18-0llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+87-02 files

FreeBSD/ports b77bc6cnet-im/flare distinfo Makefile.crates

net-im/flare: update to 0.18.8

Changelog: https://gitlab.com/schmiddi-on-mobile/flare/-/releases/0.18.8

While here, use databases/sqlcipher instead of bundled

PR: 293450
Approved by: nxjoseph (maintainer)
DeltaFile
+313-275net-im/flare/distinfo
+155-136net-im/flare/Makefile.crates
+6-4net-im/flare/Makefile
+474-4153 files

FreeBSD/ports 0734d74textproc/libxml2 distinfo Makefile, textproc/libxml2/files xmllint.1 xmlcatalog.1

textproc/libxml2: update to 2.15.2

Changelog: https://gitlab.gnome.org/GNOME/libxml2/-/blob/v2.15.2/NEWS
DeltaFile
+3-5textproc/libxml2/distinfo
+3-3textproc/libxml2/files/xmllint.1
+1-5textproc/libxml2/Makefile
+2-2textproc/libxml2/files/xmlcatalog.1
+1-1textproc/libxml2/pkg-plist
+10-165 files

LLVM/project ded64d2llvm/include/llvm/Support GenericDomTreeConstruction.h, llvm/unittests/Analysis DomTreeUpdaterTest.cpp

[DTU] fix dominator tree update eliding reachable nodes (#177683)

The initial CFG looks like this:

![initial_graph.png](https://app.graphite.com/user-attachments/assets/1e3109c5-7c02-4c81-b9b3-fa6a25964e00.png)

After inlining, it looks like this:

![after_inlining.png](https://app.graphite.com/user-attachments/assets/10906dc6-1865-4125-8cd5-c2af69191858.png)

It should be sufficient to add and remove the edges shown in the test, i.e.:
- add: `bb3->bb1.i` and `bb3->bb2.i`
- remove: `bb3->bb4`, `bb3->bb5` and `bb5->bb8`

New nodes, like `bb5.body`, get discovered when adding bb3->bb2.i. See the "StepByStep" variant of the test). Without the fix in this patch, however, `bb5.body` gets elided when the deleted edges get taken into account, and `DT` is left invalid.
DeltaFile
+220-0llvm/unittests/Analysis/DomTreeUpdaterTest.cpp
+5-2llvm/include/llvm/Support/GenericDomTreeConstruction.h
+225-22 files

LLVM/project b28ec5amlir/include/mlir/Dialect/Func/IR FuncOps.td, mlir/lib/Dialect/Func/IR FuncOps.cpp

[mlir][Func] Fix FuncOp verifier ordering via hasRegionVerifier (#184612)

FuncOp::verify() iterated over all blocks and called
getMutableSuccessorOperands() on any RegionBranchTerminatorOpInterface
terminator to check return types. This ran during the entrance phase of
verification — before child ops had been verified — so a malformed
terminator whose getMutableSuccessorOperands() assumed invariants
established by its own verify() could crash instead of emitting a clean
diagnostic.

Fix by switching to hasRegionVerifier=1: rename verify() →
verifyRegions() so the return-type checks run in the exit phase, after
all nested ops have already been verified.

To demonstrate the bug and guard against regression, add
TestCrashingReturnOp to the test dialect. The op implements
RegionBranchTerminatorOpInterface and report_fatal_errors in
getMutableSuccessorOperands() when its 'valid' unit-attr is absent,
reproducing the class of crash described above. The accompanying lit
test confirms a clean diagnostic is emitted rather than a crash.
DeltaFile
+18-0mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+11-0mlir/test/lib/Dialect/Test/TestOps.td
+10-0mlir/test/Dialect/Func/invalid.mlir
+1-1mlir/include/mlir/Dialect/Func/IR/FuncOps.td
+1-1mlir/lib/Dialect/Func/IR/FuncOps.cpp
+41-25 files

FreeBSD/src 8e61067sys/dev/ichwd i6300esbwd.c

ichwd: address unused function warning by marking as __unused

Reported by:    markj, bz
Approved by:    markj (mentor)
Fixes:  2b74ff5fceb6 ("ichwd: introduce i6300esbwd watch dog driver")
Differential Revision: https://reviews.freebsd.org/D52476

(cherry picked from commit 3449a3abab892a0a1124ee4edbc10d6d28b87af3)
DeltaFile
+1-1sys/dev/ichwd/i6300esbwd.c
+1-11 files

LLVM/project e5a6a0fllvm/lib/Target/SPIRV SPIRVUtils.cpp SPIRVPrepareFunctions.cpp, llvm/test/CodeGen/SPIRV global-var-no-functions.ll legalize-zero-size-arrays-struct.ll

[SPIRV] Fix global emission for modules with no functions (#183833)

Right now we have a problem where if you have a LLVM module with globals
but no functions, a completely empty SPIR-V module is emitted.

This is because global emission is dependent on tracking intrinsic
functions being emitted in functions.

As a simple fix, just insert a service function, which the backend is
already set up to not actually emit, if there are no real functions.

The current use case of the service function is for function pointers. I
don't think it's possible that we need to both generate a service
function for function pointers and for globals with no functions, so I
just added an error (not an assert) just in case if we do need it for
both cases.

Probably we should rework global handling in the future to work without
these workarounds, but this is a pretty fundamental issue so let's work

    [15 lines not shown]
DeltaFile
+18-0llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+16-0llvm/test/CodeGen/SPIRV/global-var-no-functions.ll
+11-0llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+1-8llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+2-2llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-struct.ll
+2-2llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-undef.ll
+50-124 files not shown
+56-1710 files