[libc] Tweak the runtimes cross-build for GPU (#178548)
Summary:
We should likely use `-DLLVM_DEFAULT_TARGET_TRIPLE` as the general
source of truth, make the handling work with that since we use it for
the output directories. Fix the creation of startup files in this mode
and make sure it can detect the GPU properly.
Fixes: https://github.com/llvm/llvm-project/issues/179375
sh.1: Fix rendering error due to redundant .El
Due to this all the rest of the items in the Built-in Commands section
were not rendered at all.
Fixes: 2711852bd9ac ("sh.1: Provide detailed job control documentation")
MFC after: 3 days
Reviewed by: emaste, ziaee
Differential Revision: https://reviews.freebsd.org/D55080
lang/ruby40: add version 4.0.1
Add Ruby 4.0.1 as lang/ruby40.
Ruby is an interpreted object-oriented programming language often used
for web development. It also offers many scripting features to
process plain text and serialized files, or manage system tasks. It
is simple, straightforward, and extensible.
Ruby 4.0 introduces a number of new features and performance improvements,
here are some of them:
* Ruby Box
a new (experimental) feature to provide separation about definitions
* Performance: ZJIT
a new just-in-time (JIT) compiler, which is developed as the
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[OpenMPOpt] avoid OOB array write (#178686)
When analysis reaches code with UB at runtime, this write needs to be
ignored to avoid corrupting memory with UB at compile time.
Drive-by finding during review of
https://github.com/llvm/llvm-project/pull/178356.
NAS-139259 / 26.0.0-BETA.1 / Sync cloud sync/backup (#18136)
It was the requested that we rewrite cloud sync / backup plugin in a
complete synchronous manner
[mlir][vector-to-gpu]: Extend MMA Lowerings (#176785)
Add support for lowering non-minor-identity maps during
`vector.transfer_read` and `vector.transfer_write` to
`gpu.subgroup_mma_load_matrix` and `gpu.subgroup_mma_store_matrix`
lowerings. If
the permutation map is a "strided minor identity", that is it jumps some
intermediate dimensions e.g. (d0, d1, d2) -> (d0, d2) then we can
express this stride in the `leadDimension` attribute of the
`gpu.subgroup_mma_load_matrix` and stride over the missing intermediate
dimensions when we load.
Signed-off-by: Jack Frankland <jack.frankland at arm.com>
www/ruby-aws-sdk-core: udpate to 3.242.0
3.242.0 (2026-02-02)
* Feature - Include HTTP status code and body in errors whehn retrieving ECS
credentials and Instance Profile credentials.
www/ruby-aws-partitions: update to 1.1212.0
1.1212.0 (2026-02-02)
* Feature - Updated the partitions source data the determines the AWS
service regions and endpoints.
textproc/ruby-diff-lcs: update to 2.0.0
2.0.0 (2026-02-01)
This release has significant breaking changes.
* diff-lcs 2 supports Ruby 3.2 or higher. This allowed:
- readability improvements (endless methods, pattern matching);
- support for immutable Data classes (Diff::LCS::Block,
Diff::LCS::Change, and Diff::LCS::ContextChange);
- removal of compatibility shims;
- reduction in conditional tests in loops, especially for String
character extraction (compare string ? seq[i, 1] : seq[i] to
seq[i]); and
- optimizations to string and relying on standard encoding support
present since Ruby 2.1.
The primary API (methods and class methods on Diff::LCS) has not changed,
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[RISCV] Make MOP/HINT-based instruction mnemonics always available (#178609)
Per the psABI discussion in riscv-non-isa/riscv-elf-psabi-doc#474, the
conclusion was to NOT introduce a new build attribute for MOP/HINT
encoding reinterpretation. Instead, the toolchain should recognize these
mnemonics unconditionally in the assembler and disassembler.
The rationale is that these encodings occupy reserved hint/MOP space
that is architecturally guaranteed not to trap on any compliant
implementation. Requiring explicit extension flags creates unnecessary
friction for users who simply want to write or read these instructions,
while providing no real safety benefit since the encodings are always
valid.
Note: Ideally, the ISA specification would explicitly guarantee that
these MOP/HINT encodings will never be reassigned to conflicting
instructions. However, the ISA architects prefer to preserve flexibility
in this area rather than making such guarantees in the spec. Given the
practical reality that reassignment is highly unlikely, the toolchain
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