CodeGen: Merge TargetLoweringObjectFile::getModuleMetadata into Initialize (#226837)
getModuleMetadata had a single caller, which invoked it immediately
after Initialize. Pass the module to Initialize and fold it in.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
[Verifier][IR] Make sure bitcast doesn't change type size (#230914)
`CastInst::castIsValid` doesn't check whether the source type and
destination type share the same size for bitcast between pointer and
byte types. Since DL is unavailable in this function, we perform the
DL-aware size check in the verifier. `CastInst::castIsValid` also
rejects unsized and target extension types to avoid assertions in
`getTypeSize`.
The tests are generated by DeepSeek-V4.1-Flash. Without this check llubi
will assert in `fromBytes/toBytes`.
[llubi] Reset retval for noop inline asm (#230849)
When a call is followed by a call to noop inline asm, `setResult` inside
`returnFromCallee` will reuse the previous return value (moved) and
trigger assertions.
The test is generated by DeepSeek-V4.1-Flash.
[llubi] Use correct tag bitwidth to recover provenances (#230852)
Tag always uses the pointer width rather than the padded one. Previously
the tag lookup always missed due to the width mismatch.
The test is generated by DeepSeek-V4.1-Flash.
[llubi] Fix wrong assert when writing `poison` at an unaligned bit offset (#230819)
Writing `poison` that starts at a bit offset not a multiple of 8 and
spans more than one byte could trigger an assert, even though each write
stayed within a single byte.
- `Context::toBytes` marks bits as `poison` one byte at a time, from
`OffsetInBits + I`.
- The assert checked the bits from `OffsetInBits` instead, missing the
offset `I`.
[libc++][chrono][threading] Implement LWG 3504: `condition_variable::wait_for` is overspecified (#222443)
Implement the relative-to-absolute conversion mandated by LWG 3504 using
`ceil<steady_clock::duration>` to avoid precision loss with
floating-point
durations.
- Add internal `chrono::__ceil` (usable in all dialects) and make
`chrono::ceil`
forward to it.
- Introduce `__rel_to_abs` helper and update all `wait_for` overloads on
`condition_variable` / `condition_variable_any`.
- Move the previous nanosecond conversion into `__do_timed_wait` to
avoid recursion after the change.
- Add regression tests for floating-point durations.
Fixes #189807
Skip zvol snapshot extents in iscsi.extent.pool_import
## Problem
iSCSI extents can be backed by a read-only zvol snapshot. `pool_import` passed those paths to `zfs.resource.list_impl`, which rejects any path containing `@`, so the `pool.post_import` hook failed and volthreading was never turned off for any zvol extent on the imported pool (including at boot).
## Solution
Leave snapshot paths out of the query, the same way extent create/update/delete already do. Snapshots don't have a volthreading property, so there is nothing to set on them anyway.
[Analysis][ARM] Remove unused getNumBytesToPadGlobalArray (NFC) (#230912)
The last caller of TargetTransformInfo::getNumBytesToPadGlobalArray was
removed on June 30, 2025 in commit
183acdd27985afd332463e3d9fd4a2ca46d85cf1, leaving
TargetTransformInfoImplBase::getNumBytesToPadGlobalArray,
ARMTTIImpl::getNumBytesToPadGlobalArray, and the command-line option
UseWidenGlobalArrays unused as well.
Assisted-by: Antigravity
TwoAddressInstructions: Keep undef INSERT_SUBREG lanes defined
%reg = INSERT_SUBREG undef %reg, %subreg, subidx defines all of %reg, so
reading the lanes outside subidx afterwards is valid. Rewriting it to
undef %reg.subidx = COPY %subreg narrows the definition to subidx and
leaves those reads without a live subrange, failing the "No live subrange
at use"
machine verifier check.
When a subrange outside subidx is still live past the def, insert an
IMPLICIT_DEF of the full register and drop the undef flag. In the common
case, where the lanes the INSERT_SUBREG left undefined are dead, keep the
undef flag and avoid an IMPLICIT_DEF that survives to the end of codegen
when the COPY is not coalesced.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
CodeGen: Remove stale last-block case when splitting a critical edge
Before f264f9ad7df5, a new block at the end of the function began at the
old end index, so the isLastMBB case had to extend live-out intervals
over it. Now the new block always ends at the old end index, so they
already cover it. The extension became a no-op, and the case also
skipped trimming registers not live into the successor, leaving a dead
segment.
block-placement.ll needs a volatile store to keep its nested loop.
common-chain.ll gets shrink-wrapped.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[GlobalISel] [AArch64] Support ROTR shift amount masking in SelectShiftMask (#226579)
The RORV instructions already use the Shift multiclass, so they inherit
the shiftMask32/shiftMask64 ComplexPattern patterns added in the earlier
patches, giving them AND/ADD/SUB/NEG/MVN shift-amount optimization for
free.
This patch adds one additional pattern for the 32-bit rotate case, where
GlobalISel legalizes the shift amount with a zext to i64. The pattern
peeks through the zext to apply the 32-bit shift-amount masking:
(i32 (rotr GPR32, (i64 (zext (i32 shiftMask32)))))
This completes the set of shift-amount optimizations (AND mask, ADD/SUB
mod, NEG, MVN, ROTR) needed to eventually replace tryShiftAmountMod, as
tracked in #224245.
Depends on https://github.com/llvm/llvm-project/pull/226273
[AMDGPU] Limit the fmul fusion discount to a matching context type
The fmul is free when its context instruction feeds a fusable fadd or
fsub. A vector fmul priced with a scalar lane as the context inherits
that fusion only when it is emitted lane by lane. On a packed type the
scalar user does not show that the vector fmul feeds a vector fadd, and
products extracted into a scalar fadd chain keep the packed fmul while
the fma is lost.
CodeGen: Merge TargetLoweringObjectFile::getModuleMetadata into initialize
getModuleMetadata had a single caller, which invoked it immediately after
Initialize. Pass the module to Initialize and fold it in. Also lowercase the
name while touching all the uses.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
CodeGen: Initialize TargetLoweringObjectFile from MachineModuleInfo (#226836)
MachineModuleInfo passes TLOF to the MCContext but nothing initialized it until the
AsmPrinter pass ran, so every codegen pass in between saw it uninitialized. Initialize
it from MachineModuleInfo, and drop the calls llc and SPIRVTranslate used to work
around this.
SPIRVTranslate's MachineModuleInfoWrapperPass was never passed on to
addPassesToEmitFile, so it was initializing a throwaway context.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
