LLVM/project 97fa3e5llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlan.h

[NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (#177114)

This is groundwork for #151300, which aims to support first-faulting
loads in non-tail-folded early-exit loops.
Per #175900, we need a variable-length stepping transform that can
shared between EVL and non-EVL loops.
The idea is to have an EVL-independent counter and transform for
tracking the cumulative number of processed elements.

This patch renames the existing counter (VPEVLBasedIVPHIRecipe) and
transform (canonicalizeEVLLoops) to be EVL-independent:
- Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationRecipe to
  reflect its general purpose of tracking processed element count.
- Rename canonicalizeEVLLoops to convertToVariableLengthStep.

This is NFC.
DeltaFile
+44-39llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+14-14llvm/lib/Transforms/Vectorize/VPlan.h
+6-6llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+5-5llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+5-4llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
+4-3llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+78-717 files not shown
+90-8313 files

HardenedBSD/ports 39f681bfilesystems/zrepl-dsh2dsh distinfo Makefile, math/octave-forge-interval distinfo

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+63-63www/grafana/distinfo
+85-23www/redmine60/files/patch-Gemfile
+5-5filesystems/zrepl-dsh2dsh/distinfo
+3-3math/octave-forge-interval/distinfo
+3-3ports-mgmt/poudriere-dsh2dsh/distinfo
+2-3filesystems/zrepl-dsh2dsh/Makefile
+161-1008 files not shown
+176-11114 files

LLVM/project 632c5a3mlir/lib/Dialect/XeGPU/Transforms XeGPUSubgroupDistribute.cpp, mlir/test/Dialect/XeGPU subgroup-distribute-unit.mlir

[MLIR][XeGPU] Relax the slice layout check for broadcast operand in subgroup distribution (#181935)

This PR relaxes the operand layout check in broadcast op in subgroup
distribution. Instead of failing the pattern match, it issues a warning
and proceed the distribution. The layout could be non-slice layout but
still support valid subgroup distribution.
DeltaFile
+22-11mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
+2-3mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+24-142 files

pkgng/pkgng e4add1elibpkg pkg_jobs.c

pkg_autoremove/force delete: Fix order

If package A depends on package B (on a binary or script for example), when
autoremove is called currently the order is (likely) by alphabetic.
This cause problems as if package A is removed first and package B needs a script
from package A it will fails to clean up correctly the system.
Since autoremove is considered as force internally simply remove the check so we will
process the removals in the correct order.

Sponsored by:   Beckhoff Automation GmbH & Co. KG
DeltaFile
+0-3libpkg/pkg_jobs.c
+0-31 files

LLVM/project d40f7a2llvm/include/llvm/ADT ArrayRef.h, llvm/unittests/ADT ArrayRefTest.cpp

Revert "[ADT] Add const check to MutableArrayRef constructor (#181190)"

This reverts commit 1de1a76dc9042ffc8026217cf0b105f0b86c16fb.
DeltaFile
+0-4llvm/unittests/ADT/ArrayRefTest.cpp
+1-1llvm/include/llvm/ADT/ArrayRef.h
+1-52 files

LLVM/project 1daf340llvm/lib/Target/RISCV RISCVInstrInfoV.td RISCVInstrInfoZvk.td

[RISCV] Set RVVConstraint = NoConstraint in tablegen classes with vm=1. NFC (#181960)

Our RVV base classes default to RVVConstraint = VMConstraint. We
should force it to NoConstraint in classes where we've explicitly
marked vm as being a constant rather than an operand. This avoids
needing to do it at a higher level in the class hierarchy.
DeltaFile
+9-2llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+7-3llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
+6-0llvm/lib/Target/RISCV/RISCVInstrFormats.td
+22-53 files

HardenedBSD/ports 47e451bwww/redmine60 Makefile, www/redmine60/files patch-Gemfile commonmark.rb

www/redmine60: Update mini_magick to v5, set daemon title flags

- Switch RMAGIC dependency from rubygem-mini_magick4 to rubygem-mini_magick >= 5.0.1
- Update files/mini_magick.rb minimum version to 5.0.1
- Refresh patch-Gemfile: replace upstream version-pinned DB adapter logic
  with bundler.d-based loading; update mini_magick group to ~> 5.0.1
- Add -T/-t flags to daemon invocation for proper process title tagging

PR:     ports/293251
DeltaFile
+85-23www/redmine60/files/patch-Gemfile
+2-2www/redmine60/Makefile
+2-1www/redmine60/files/commonmark.rb
+1-1www/redmine60/files/mini_magick.rb
+1-1www/redmine60/files/redmine.in
+91-285 files

FreeBSD/ports 47e451bwww/redmine60 Makefile, www/redmine60/files patch-Gemfile commonmark.rb

www/redmine60: Update mini_magick to v5, set daemon title flags

- Switch RMAGIC dependency from rubygem-mini_magick4 to rubygem-mini_magick >= 5.0.1
- Update files/mini_magick.rb minimum version to 5.0.1
- Refresh patch-Gemfile: replace upstream version-pinned DB adapter logic
  with bundler.d-based loading; update mini_magick group to ~> 5.0.1
- Add -T/-t flags to daemon invocation for proper process title tagging

PR:     ports/293251
DeltaFile
+85-23www/redmine60/files/patch-Gemfile
+2-2www/redmine60/Makefile
+2-1www/redmine60/files/commonmark.rb
+1-1www/redmine60/files/redmine.in
+1-1www/redmine60/files/mini_magick.rb
+91-285 files

LLVM/project e096dc1clang/test/CIR/CodeGen builtin-floating-point.c, llvm/lib/Transforms/Scalar DeadStoreElimination.cpp

rebase

Created using spr 1.3.5-bogner
DeltaFile
+5,835-5,584llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
+1,560-1,560llvm/test/tools/llvm-mca/RISCV/SiFive7/vector-fp.s
+1,325-1,258llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+991-1,493llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
+81-2,209llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops-large-matrixes.ll
+2,212-0clang/test/CIR/CodeGen/builtin-floating-point.c
+12,004-12,1043,889 files not shown
+180,087-72,5673,895 files

LLVM/project fa66c87clang/test/CIR/CodeGen builtin-floating-point.c, llvm/lib/Transforms/Scalar DeadStoreElimination.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5-bogner

[skip ci]
DeltaFile
+5,835-5,584llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
+1,560-1,560llvm/test/tools/llvm-mca/RISCV/SiFive7/vector-fp.s
+1,325-1,258llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+991-1,493llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
+81-2,209llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops-large-matrixes.ll
+2,212-0clang/test/CIR/CodeGen/builtin-floating-point.c
+12,004-12,1043,889 files not shown
+180,087-72,5673,895 files

LLVM/project 6f0b0ecbolt/include/bolt/Core BinaryContext.h, lldb/source/Plugins/Disassembler/LLVMC DisassemblerLLVMC.cpp

[NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (#180465)

Preparatory change for storing the MCTargetOptions pointer in MCAsmInfo
(#180464)
DeltaFile
+5-2lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
+4-2llvm/unittests/MC/AMDGPU/Disassembler.cpp
+1-2lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
+3-0lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h
+1-2lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
+3-0bolt/include/bolt/Core/BinaryContext.h
+17-811 files not shown
+35-1617 files

LLVM/project 371e0e2lld/ELF Relocations.cpp AArch64ErrataFix.cpp, lld/ELF/Arch AArch64.cpp

[ELF] Add target-specific relocation scanning for AArch64 (#181099)

Implement AArch64::scanSectionImpl, following the pattern established
for x86 (#178846), PPC64 (#181496), and SystemZ (#181563). This merges
the getRelExpr and TLS handling for SHF_ALLOC sections into the
target-specific scanner, enabling devirtualization and eliminating
abstraction overhead.

- Inline relocation classification into scanSectionImpl with a switch
  on relocation type, replacing the generic rs.scan() path.
- Use processR_PC/processR_PLT_PC for common PC-relative and PLT
  relocations, and handleTlsIe/handleTlsDesc for TLS IE/TLSDESC.
- Remove some AArch64-specific RelExpr members (RE_AARCH64_AUTH_GOT,
  RE_AARCH64_AUTH_GOT_PC, RE_AARCH64_AUTH_GOT_PAGE_PC,
  RE_AARCH64_AUTH_TLSDESC_PAGE, RE_AARCH64_AUTH_TLSDESC,
  RE_AARCH64_RELAX_TLS_GD_TO_IE_PAGE_PC) by using regular RelExpr
  members with flag-based dispatch (NEEDS_GOT_AUTH, NEEDS_TLSDESC_AUTH).
AUTH GOT relocations now call `sym.setFlags(NEEDS_GOT | NEEDS_GOT_AUTH)`
  and `rs.processAux` directly.

    [3 lines not shown]
DeltaFile
+228-114lld/ELF/Arch/AArch64.cpp
+14-52lld/ELF/Relocations.cpp
+8-4lld/ELF/AArch64ErrataFix.cpp
+6-3lld/ELF/RelocScan.h
+0-6lld/ELF/InputSection.cpp
+0-6lld/ELF/Relocations.h
+256-1856 files

LLVM/project a832cb6llvm/lib/Target/AMDGPU SIRegisterInfo.cpp

Refactor: Clang-format off

Clang-formatter is splitting the ternary check in a funky manner.
Turning it off for readability.
DeltaFile
+10-9llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+10-91 files

LLVM/project c5ac41dllvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (#181095)

DeltaFile
+10-17llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+10-171 files

LLVM/project a2e14e4clang/test/Driver print-supported-extensions-riscv.c, llvm/lib/Target/RISCV RISCVFeatures.td

[RISCV] Add Xsfmm32a shorthand extension. (#181957)

This extension is shorthand for Xsfmm32a8i, Xsfmm32a16f, and
Xsfmm32a32f.

It was mistakenly left out of an earlier version of the public
specification, but is now present. See
https://www.sifive.com/document-file/xsfmm-matrix-extensions-specification
DeltaFile
+5-0llvm/lib/Target/RISCV/RISCVFeatures.td
+3-2llvm/lib/TargetParser/RISCVISAInfo.cpp
+4-0llvm/test/CodeGen/RISCV/attributes-sifive.ll
+1-0clang/test/Driver/print-supported-extensions-riscv.c
+1-0llvm/test/CodeGen/RISCV/features-info.ll
+1-0llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+15-26 files

LLVM/project 15cf81blldb/source/Plugins/ScriptInterpreter/Python ScriptInterpreterPython.cpp

[lldb] Fix wrong log formatting for script callbacks (NFC)

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+1-1lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
+1-11 files

LLVM/project bdf4eae.ci/green-dragon bisect.groovy

[green-dragon] fix test param in triggered bisection jobs (#181962)

Fix the usage of our skip_tests parm
DeltaFile
+1-1.ci/green-dragon/bisect.groovy
+1-11 files

LLVM/project ca16347llvm/include/llvm/Analysis DDGPrinter.h, llvm/lib/Analysis DDGPrinter.cpp

[DDG][NFC] Colorize DDG dot graph (#181618)

All blocks and edges are currently colored black which makes it
difficult to distinguish while looking at huge graph.

This simple patch implements the following colorization to make it
visually more distinguishable.

1. Pi-blocks - styled to rounded, filled, light-yellow fill, dark orange
border
2. Multi-instruction blocks - Light cyan fill
3. MemoryDependence edges are now colored red.
4. Register def-use edges are now colored blue.

This patch implements `getNodeAttributes()` to return the string of
attributes to apply to the node.

DeltaFile
+24-0llvm/lib/Analysis/DDGPrinter.cpp
+9-9llvm/test/Analysis/DDG/print-dot-ddg.ll
+4-0llvm/include/llvm/Analysis/DDGPrinter.h
+37-93 files

LLVM/project 6eae175llvm/lib/Target/RISCV RISCVInstrInfoZvk.td, llvm/test/MC/RISCV/rvv zvkned.s

[RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (#181887)

These instructions don't have a VM operand. If these instructions use a
V0 destination, the VMConstraint code calls getReg() on the the last
operand which is an immediate. This triggers an assertion. Not sure
what happens on a release build. It probably treats the immediate as a
value in the RISCV register info enum.
DeltaFile
+12-0llvm/test/MC/RISCV/rvv/zvkned.s
+6-4llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
+18-42 files

LLVM/project 3bbb898clang/lib/DependencyScanning DependencyScannerImpl.cpp

[clang][deps] Ensure the service outlives async module compiles (#181772)

This PR fixes a race condition discovered by thread sanitizer in the
asynchronous dependency scanner implementaion.

The implementation assumed that whenever a new thread is spawned to
compile a module, the primary scanning thread must wait for it to finish
to read the PCM it produces. This is not true - it's possible for the
implicit build on the primary thread to decide to compile the same
module too, leaving the asynchronous thread running without any kind of
synchronization. This means the TU scan may return, the service may get
destroyed, but the asynchronous thread continues running with the VFS
caches and module cache implementation destroyed, leading to crashes.

This PR fixes this by awaiting all asynchronous threads at the end of a
TU scan.
DeltaFile
+55-19clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+55-191 files

LLVM/project dd8ab2allvm/lib/Transforms/Vectorize VPlan.h

[VPlan] Remove VPDerivedIVRecipe and VPScalarIVStepsRecipe from VPHeaderPHIRecipe doc comment. NFC (#181862)

These aren't subclasses of VPHeaderPHIRecipe, I'm not sure if the class
hierarchy changed or not.
Also add the other subclasses to the list.
DeltaFile
+4-5llvm/lib/Transforms/Vectorize/VPlan.h
+4-51 files

NetBSD/pkgsrc-wip ef6ec22pam-pwdfile Makefile distinfo

pam-pwdfile: project moved to https://git.tiwe.de/libpam-pwdfile.git
DeltaFile
+5-5pam-pwdfile/Makefile
+3-3pam-pwdfile/distinfo
+8-82 files

OpenBSD/src ZrJE9O1sys/dev/ic qwz.c

   correct bounds check on number of memory segments
   found with smatch, ok patrick@
VersionDeltaFile
1.22+2-3sys/dev/ic/qwz.c
+2-31 files

NetBSD/pkgsrc-wip e049fbd. TODO, leo PLIST Makefile

leo: update to 6.8.7
DeltaFile
+5,823-996leo/PLIST
+0-59leo/patches/patch-aa
+15-40leo/Makefile
+16-0leo/TODO
+3-4leo/distinfo
+0-1TODO
+5,857-1,1006 files

OpenBSD/src 4CtKiZLusr.bin/ssh sftp-client.c

   same treatment for remote/remote copies (i.e. scp -3): adjust
   permissions on destination directory only if we created it or -p
   was requested. bz3925
VersionDeltaFile
1.184+7-4usr.bin/ssh/sftp-client.c
+7-41 files

OpenBSD/src hQ8LQ3Qusr.bin/ssh sftp-client.c

   when uploading a directory using sftp/sftp (e.g. during a recursive
   transfer), don't clobber the remote directory permissions unless
   either we created the directory during the transfer or the -p flag
   was set. bz3925 ok dtucker@
VersionDeltaFile
1.183+7-4usr.bin/ssh/sftp-client.c
+7-41 files

FreeBSD/ports ddbe074www/grafana distinfo Makefile

www/grafana: Update 12.3.0 => 12.3.3 (Fixes security vulnerabilities)

Changelogs:
https://github.com/grafana/grafana/releases/tag/v12.3.1
https://github.com/grafana/grafana/releases/tag/v12.3.2
https://github.com/grafana/grafana/releases/tag/v12.3.3

PR:             293245
Security:       CVE-2026-21722
Security:       CVE-2025-41117
MFH:            2026Q1
(cherry picked from commit 3f4049ec3983ac79e81a9fce149a74174de98109)
DeltaFile
+63-63www/grafana/distinfo
+2-3www/grafana/Makefile
+65-662 files

LLVM/project 7cbf453llvm/lib/Transforms/Scalar LowerMatrixIntrinsics.cpp, llvm/lib/Transforms/Utils MatrixUtils.cpp

[ProfCheck][Matrix] Add profile data where relevant

This patch tackles two cases:
1. Checks around aliasing/overlapping ranges. This is runtime dependent
   on the pointer values passed in, which we have no way of knowing
   without additional profiling.
2. Loop backedges. For these we also have an associated trip count, so
   we set up the branch weights to represent this.

Tests updated/profcheck-xfail.txt updated.

Reviewers: alanzhao1, fhahn, mtrofin, snehasish

Pull Request: https://github.com/llvm/llvm-project/pull/181292
DeltaFile
+24-20llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops.ll
+21-13llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-volatile.ll
+16-1llvm/lib/Transforms/Utils/MatrixUtils.cpp
+11-6llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused.ll
+7-4llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
+6-5llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-loops-large-matrixes.ll
+85-491 files not shown
+85-567 files

FreeBSD/ports 3f4049ewww/grafana distinfo Makefile

www/grafana: Update 12.3.0 => 12.3.3 (Fixes security vulnerabilities)

Changelogs:
https://github.com/grafana/grafana/releases/tag/v12.3.1
https://github.com/grafana/grafana/releases/tag/v12.3.2
https://github.com/grafana/grafana/releases/tag/v12.3.3

PR:             293245
Security:       CVE-2026-21722
Security:       CVE-2025-41117
MFH:            2026Q1
DeltaFile
+63-63www/grafana/distinfo
+2-3www/grafana/Makefile
+65-662 files

HardenedBSD/ports 3f4049ewww/grafana distinfo Makefile

www/grafana: Update 12.3.0 => 12.3.3 (Fixes security vulnerabilities)

Changelogs:
https://github.com/grafana/grafana/releases/tag/v12.3.1
https://github.com/grafana/grafana/releases/tag/v12.3.2
https://github.com/grafana/grafana/releases/tag/v12.3.3

PR:             293245
Security:       CVE-2026-21722
Security:       CVE-2025-41117
MFH:            2026Q1
DeltaFile
+63-63www/grafana/distinfo
+2-3www/grafana/Makefile
+65-662 files