[AMDGPU] Hardwire SRAMECC on for gfx12.5
ECC on gfx12.5 cannot be disabled, so sramecc is not a selectable
target ID feature. Accepting sramecc- produced code relying on D16
loads preserving unused bits, which the loader then rejects.
Change-Id: I331b5d42e80cc6de8d084047f2b84fc2ef9349cb
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[ObjectYAML][NFC] Hoist BBAddrMap obj2yaml decoder into a shared helper (#231071)
Preparatory NFC refactor to let the upcoming COFF dumper reuse the
BBAddrMap payload decoder, mirroring the encoder hoisted in #205991.
[TargetLowering][X86] Prefer 'r' over 'm' for foldable "rm" inline asm operands
An "rm" (register-or-memory) inline asm operand has always resolved to
'm', because getConstraintPreferences() picks the most general
constraint present, and 'm' is more general than 'r'. That's safe, since
memory can't run out, but it forces a value that could stay in a
register through a stack slot even when there's no register pressure
(https://github.com/llvm/llvm-project/issues/20571).
Prefer 'r' instead where the register allocator can fold the register
back to a stack slot when it runs out of registers, and mark the
register operand foldable (InlineAsm::Flag::setRegMayBeFolded()) so it
does. Both allocators can: the greedy allocator folds an operand when it
spills its value, and the fast allocator folds operands up front when
the asm's register operands wouldn't fit.
ParseConstraints() sets AsmOperandInfo::MayFoldRegister for an operand
whose constraint codes include 'r' and 'm' and are otherwise only
immediate codes, above -O0, on a target that opts in through the new
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[X86] Address review: test a tied input's untied read under -regalloc=fast
Add the case from the #229630 review, one value passed to an untied "r"
input and to the "0" input tied to an "rm" output, to show that the fast
register allocator no longer folds the output when everything fits.
Drop the -O0 RUN line from inline-asm-direct-mem-output-error.ll: it only
showed that "=rm" still picks memory at -O0, which asm-constraints-rm.ll
already tests, and there make the -O0 line name the instruction selector
and say that it tests the optimization level.
Assisted-by: Claude Opus 5.5
[RegAllocFast] Fold foldable inline asm operands under register pressure
An inline asm register operand marked foldable (from an "rm" constraint)
may be replaced with a stack slot when the register allocator runs out
of registers. The greedy allocator does that when it spills the value.
The fast allocator can't: it assigns the operands of an instruction one
at a time, and folding replaces the instruction. So it reported
"inline assembly requires more registers than available" instead.
Before allocating a block, estimate from each inline asm's own operands
whether they fit in registers, and fold as many foldable registers as
needed to make them fit, so the common case without pressure still gets
a register. Values that only live across the asm don't count, since the
allocator spills them when it needs their registers. The estimate
follows allocateInstruction():
- First all defs get distinct registers, avoiding physreg defs; then all
uses, along with the defs still occupied while the uses are read
(early-clobber and tied defs, see isLiveThroughDef()), get distinct
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[RegAllocFast] Address review: don't recount a tied input's untied reads
When one value is passed to both a tied operand and an untied one, e.g.
"=rm"(r) : "r"(v), "0"(v), with an explicit -regalloc=fast above -O0 (so
TwoAddress doesn't run and the ties reach RegAllocFast), the fold estimate
counted three registers where lowerTiedUse() uses one. Tied uses are
allocated first, so the value moves into the def's register and the untied
read is rewritten to it. tiedUseNeedsOwnReg() still assumed another read of
the value could get it a register first, and the untied read was counted on
its own as well, so the asm's output was folded to the stack needlessly.
Model the tied input itself: while one of its tied defs is in a register,
it needs no register of its own unless tiedUseNeedsOwnReg() says so (only
an early-clobber def now makes another read matter), and its untied reads
share whichever register it has. Once its tied defs are folded, the untied
reads need a register again, so choose what to fold by counting again with
each candidate folded, and fold both halves when neither alone helps.
Assisted-by: Claude Opus 5.5
[AMDGPU] Fix sramecc value in subtarget cache key
The sramecc component of the subtarget cache key encoded the xnack
setting. Modules sharing a TargetMachine with equal xnack but different
sramecc module flags reused the same cached subtarget, giving the wrong
sramecc mode.
Change-Id: I727ff71298ede9846cf2ace98a88c8b0114c7e68
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
sysarch.x86.2: manual page for the sysarch(2) functions on x86
Reviewed by: ziaee
Discussed with: jhb
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D60047
[mlir][LLVMIR] Precompile NVVM and ROCDL operation declarations (#232976)
The eight source shards in each dialect repeatedly parse their operation
headers after loading the shared LLVM PCH. Give each dialect a local PCH
containing LLVMIR/pch.h followed by its operation header. Disable
downstream reuse so other libraries retain their existing PCH selection.
Both pairs save CPU (32.55 s and 57.33 s). Focused serial compilation of
all 21 affected sources, including 13.65 s of new PCH creation, reduces
CPU from 103.12 to 87.48 s (-15.17%).
Assisted-by: Codex
CodeGen: Remove TargetOptions::ExceptionModel
The exception model now comes only from the "exception-model" module
flag. Remove the TargetOptions field and its copy into MCAsmInfo, so
MCAsmInfo only knows the target's default model.
The WebAssembly model checks move from the TargetMachine constructor
into the Emscripten EH/SjLj lowering pass. Clang relied on the backend
to reject non-wasm models for wasm targets, so it now rejects them
itself.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
CodeGen: Read the exception model from the module flag
Module::getExceptionModel() now falls back to the triple's default
model instead of falling back to the TargetMachine.
The pass pipeline is built before the module is known, so schedule each
EH preparation pass when the target supports a model, and let the pass
check the module's model. Add TargetMachine::supportsExceptionModel so
the pass config can skip definitely irrelevant passes. SjLjEHPrepare is
now scheduled on every target with exception handling, and WinEHPrepare
only on COFF and Wasm targets. WinEHPrepare and WasmEHPrepare are
scheduled for Wasm by the base pass configs, replacing the WebAssembly
override.
This is almost the last step towards removing TargetOptions::ExceptionModel.
Co-authored-by: Claude Opus <noreply at anthropic.com>
[Clang][counted_by] Don't re-evaluate the base of a counted_by pointer access for -fsanitize=array-bounds
When indexing a 'counted_by' pointer field with -fsanitize=array-bounds,
EmitCountedByBoundsChecking was handed an invalid address and re-emitted
the field's l-value to locate the count. That re-evaluated the struct
base, duplicating its side-effects:
struct p { int count; int *buf __counted_by(count); };
struct p *q;
int f(int i) { return q++->buf[i]; } // 'q' incremented twice
int g(int i) { return get()->buf[i]; } // 'get' called twice
i.e. enabling the sanitizer changed the program's behavior.
When the subscript base is exactly the field load, emit the field's
l-value once, load the pointer from it (as the default case of
EmitPointerWithAlignment does, through EmitLoadOfLValue so that a
'__ptrauth'-qualified field is still authenticated), and pass the
field's address to the bounds check. When there's an intervening cast (e.g.
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[Clang][counted_by][NFC] Add missing tests for counted_by and __builtin_counted_by_ref
Add Sema coverage for __builtin_counted_by_ref:
- a bit-field counter on a 'counted_by' pointer (not just a FAM),
- the '_or_null' and 'sized_by' variants, which return 'void *',
- qualified, enum, and typedef counter types, which determine the
returned pointee type,
- nested, anonymous, by-value, and subscripted bases.
Add CodeGen coverage for the base-expression shapes reaching a counted_by
flexible array member, for both __builtin_dynamic_object_size and
-fsanitize=array-bounds: call and side-effecting bases (which __bdos
must not re-evaluate), pointer chains, conditional bases, negative
constant indices, enum counters, and mixed index widths.
Assisted-by: Claude Opus 5.5
[llvm-readobj][docs] Update the --stack-sizes description
The description said that --stack-sizes is only implemented for GNU
style output, which hasn't been the case for a while. Describe the LLVM
and JSON output instead, including the address that each entry in a
linked file now has.
Assisted-by: Gemini
[lld][MachO] Address review: use --no-leading-headers in cstring-dedup.s
Instead of running llvm-objdump from inside %t, pass --no-leading-headers
so the output file's path isn't printed. That also suppresses the
"Contents of (__TEXT,__cstring) section" line, so drop that STR check;
--section already restricts the output to __cstring.
Assisted-by: Claude Opus 5.5
TargetParser: Clean up data layout string construction
Instead of building many small string fragments, use longer
concatenated literals. The mips case in particular was hard
to follow and had an unused enum value.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[clang][OpenMP][NFC] Anchor "bar" CHECK-LABELs on the function definition (#232628)
ordered_doacross_codegen.cpp and parallel_for_simd_codegen.cpp use a
bare "bar" as a CHECK-LABEL. That also matches the ModuleID and
source_filename lines when the source path contains "bar" (e.g. a home
directory like /home/isanbard), which splits the input at the wrong
place and makes the tests fail. Match the define of @_Z3barv instead.
Assisted-by: Claude Opus 5.5
[BoundsSafety][NFC] Add counted_by type-shape validation helper (#227774)
This is groundwork for properly supporting late parsing of counted_by as
a type attribute, following the direction set in #223267, which allows a
CountAttributedType's count to be filled in later.
Under that model, counted_by diagnostics are split into two phases:
- When the type is built, we check only what the type itself can tell
us, e.g., whether it is a pointer or array
- During late parsing, once the relevant scope is complete (e.g., the
end of a struct definition), we check the declaration the attribute is
attached to and resolve the count expression.
This PR adds the shared validation for the phase 1. It covers
counted_by, sized_by and their _or_null variants, preparing eager and
late-parsed type-attribute handling to use the same checks across
declaration contexts.
`Sema::ValidateBoundsAttrTypeShape`checks pointer or array shape and
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The TX-done interrupt should read from consumer register, not producer. I
made this mistype during conversion bse(4) output to MP-safe.
From Acts1631. OK kettenis.
