LLVM/project be335beclang/lib/CodeGen CGObjCMac.cpp, clang/test/CodeGenObjC direct-method-ret-mismatch.m

fix test
DeltaFile
+13-14clang/lib/CodeGen/CGObjCMac.cpp
+6-7clang/test/CodeGenObjC/direct-method-ret-mismatch.m
+19-212 files

FreeBSD/src 98c44ccsys/modules/brcm80211/brcmfmac Makefile

brcmfmac: deal with bus attachments to the module Makefile

As with LinuxKPI-based wireless drivers, e.g., rtw88, PCI depends
on PCI being compiled into the kernel, SDIO will depend on
MMCCAM in the kernel once supported, and USB can always be
loaded.

Sponsored by:   The FreeBSD Foundation
MFC after:      3 days
DeltaFile
+10-7sys/modules/brcm80211/brcmfmac/Makefile
+10-71 files

pfSense/pfsense 8977f0asrc/usr/local/www system_crlmanager.php

Clarify wording when a CRL does not have any certs
DeltaFile
+1-1src/usr/local/www/system_crlmanager.php
+1-11 files

LLVM/project 057ace3libc/shared/math log1pf.h, libc/src/__support/math log1pf.h CMakeLists.txt

[libc][math] Refactor log1pf to Header Only. (#176525)

closes : #176512
DeltaFile
+177-0libc/src/__support/math/log1pf.h
+2-156libc/src/math/generic/log1pf.cpp
+23-0libc/shared/math/log1pf.h
+15-6utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+14-0libc/src/__support/math/CMakeLists.txt
+2-7libc/src/math/generic/CMakeLists.txt
+233-1693 files not shown
+236-1699 files

LLVM/project 31e1bcfllvm/lib/Target/RISCV RISCVPostRAExpandPseudoInsts.cpp RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rv64p.ll rv32p.ll

[RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (#180677)

These are 3 variations of the same operation with a different operand
tied to the destination register. We need to pick the one that
minimizes the number of mvs.

To do this we take the approach used by AArch64 to select between
BIT, BIF, and BSL which the same operations. We define a pseudo
with no tied constraint and expand it after register allocation based
on where the destination register ended up. If the destination
register is none of the operands, we'll insert a mv.

I've replaced RISCVISD::MVM with RISCVISD::MERGE and updated the operand
order accordingly. I find the MERGE name easier to read so I've made it
the canonical name.

Ideally we could use commuteInstructionImpl and the
TwoAddressInstructionPass
to select the opcode before register allocation. That only works if

    [14 lines not shown]
DeltaFile
+135-0llvm/test/CodeGen/RISCV/rv64p.ll
+135-0llvm/test/CodeGen/RISCV/rv32p.ll
+70-0llvm/lib/Target/RISCV/RISCVPostRAExpandPseudoInsts.cpp
+17-7llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+1-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+358-85 files

LLVM/project 04bb0e2libc/shared/math log10f16.h, libc/src/__support/math log10f16.h CMakeLists.txt

[libc][math] Refactor log10f16 to Header Only. (#176523)

closes : #176510
DeltaFile
+185-0libc/src/__support/math/log10f16.h
+2-155libc/src/math/generic/log10f16.cpp
+29-0libc/shared/math/log10f16.h
+18-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+18-0libc/src/__support/math/CMakeLists.txt
+2-11libc/src/math/generic/CMakeLists.txt
+254-1673 files not shown
+257-1679 files

FreeBSD/src 2274153sys/contrib/dev/broadcom/brcm80211/brcmfmac usb.c bcdc.c

brcmfmac: make USB parts compile (and not panic right away)

Fix casts and consts and add one extra error check for a NULL pointer.
This will require [a future] linuxkpi_usb.

There are very few dongles I know off:
- the original Raspberry PI USB dongle [1]
- Cisco Linksys AE1200

The reason for making USB compile despite the limited 11n 150/300 Mbit/s
adapters is that it is the simplest way to work on cfg80211 while on the
road, not requiring a full PCIe slot or another SoC for SDIO.

Sponsored by:           The FreeBSD Foundation
Hardware donated by:    Martin Husemann (martin NetBSD.org) [1]
MFC after:              3 days
DeltaFile
+52-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/usb.c
+6-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/bcdc.c
+58-02 files

FreeBSD/src 902136esys/compat/linuxkpi/common/include/linux/platform_data brcmfmac.h, sys/contrib/dev/broadcom/brcm80211/brcmfmac cfg80211.c pcie.c

brcm80211: add LinuxKPI files and module Makefiles

sys/compat/linuxkpi/common/include/linux/platform_data/brcmfmac.h
is based on
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
e5f0a698b34ed76002dc5cff3804a61c80233a7a ( tag: v6.17 ).

Currently only PCIe is made to compile.
It does load firmware (if needed, e.g., on arm64 with an alignment
issue fixed), and starts to come up.

To make it work there is a cfg80211 layer and netdevice integration
to do, so do not hold your breath just yet.
DeltaFile
+190-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/cfg80211.c
+185-0sys/compat/linuxkpi/common/include/linux/platform_data/brcmfmac.h
+117-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/pcie.c
+89-0sys/modules/brcm80211/brcmfmac/Makefile
+35-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/common.c
+34-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/msgbuf.c
+650-022 files not shown
+1,007-028 files

LLVM/project 7892f84llvm/test/MC/RISCV rv64zbb-aliases-valid.s rv32zbb-aliases-valid.s

[RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (#180317)

These are real instructions and are tested in rv32zbb-only-valid.s,
rv64-zbb-valid.s, or rvzbb-valid.s

I think this is some artifact of the refactoring that happened when some
of the Bitmanip extensions/instructions were removed years ago.
DeltaFile
+0-12llvm/test/MC/RISCV/rv64zbb-aliases-valid.s
+0-12llvm/test/MC/RISCV/rv32zbb-aliases-valid.s
+0-242 files

LLVM/project 5a8144dlibc/shared/math llogbl.h, libc/src/__support/math llogbl.h CMakeLists.txt

[libc][math] Refactor llogbl to be header-only (#175376)

Fixes: #175361
DeltaFile
+28-0libc/src/__support/math/llogbl.h
+23-0libc/shared/math/llogbl.h
+18-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+10-0libc/src/__support/math/CMakeLists.txt
+2-6libc/src/math/generic/llogbl.cpp
+1-1libc/src/math/generic/CMakeLists.txt
+82-83 files not shown
+85-89 files

LLVM/project 643c235llvm/lib/Target/SPIRV SPIRVLegalizerInfo.cpp, llvm/test/CodeGen/SPIRV/legalization icmp_extended_int.ll

[SPIRV] Legalize extended integers for compare instructions. (#180254)

Currently, legalization fails for integer (lower than 8 bit) comparison
with extensions, for example, SPV_INTEL_int4. This PR extends integers
for supported extensions.

---------

Co-authored-by: Michal Paszkowski <michal at michalpaszkowski.com>
DeltaFile
+34-0llvm/test/CodeGen/SPIRV/legalization/icmp_extended_int.ll
+4-0llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+38-02 files

LLVM/project 8dde305mlir/include/mlir/Dialect/Vector/Transforms LoweringPatterns.h, mlir/lib/Dialect/Vector/TransformOps VectorTransformOps.cpp

[mlir][vector] Add finer grained populate methods for multi_reduction (NFC). (#180750)

Thiese commits add three more populate methods for
`vector.multi_reduction`'s lowering patterns:

* populateVectorMultiReductionTransformationPatterns
* populateVectorMultiReductionFlatteningPatterns
* populateVectorMultiReductionUnrollingPatterns

These methods have a
finer level of granularity and allow users to select between unrolling,
flattening, and applying transformations that would set up operations
for unrolling and flattening.

The previous populateVectorMultiReductionLoweringPatterns method
is rewritten in terms of these new methods.
DeltaFile
+39-7mlir/lib/Dialect/Vector/Transforms/LowerVectorMultiReduction.cpp
+31-7mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
+37-0mlir/test/Dialect/Vector/vector-multi-reduction-lowering.mlir
+5-1mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
+112-154 files

LLVM/project 61521a9llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Ensure countable region in narrowInterleaveGroups.

This tightens the legality checks. Currently should not have any impact,
but is needed to avoid mis-compiles in follow-up changes.
DeltaFile
+10-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+10-01 files

FreeBSD/doc 3b5ca5fwebsite/static/security advisory-template.txt

SA template: Update CVE URL
DeltaFile
+1-1website/static/security/advisory-template.txt
+1-11 files

FreeBSD/src b4c3e9bsys/contrib/dev/broadcom/brcm80211/brcmfmac cfg80211.c sdio.c, sys/contrib/dev/broadcom/brcm80211/brcmsmac main.c

brcm80211: import Broadcom wireless brcmsmac and brcmfmac drivers

This version is based on
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
e5f0a698b34ed76002dc5cff3804a61c80233a7a ( tag: v6.17 ).

We are likely only going to use the brcmfmac driver but given they
come nicely packaged in a directory structure and bwn(9) still uses
GPL-only phy files we could use some of the information from brcmsmac
and fix that (should it ever still be relevant).

git-subtree-dir: sys/contrib/dev/broadcom/brcm80211
git-subtree-mainline: 69c64e3fb575e0db0e2f0c1fc56f466624940ded
git-subtree-split: 1eabd3ed89eb4bb5c69e90eeaeda1a6dd31e8bab
DeltaFile
+28,572-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/phy/phy_n.c
+10,099-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/phy/phytbl_n.c
+8,477-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/cfg80211.c
+8,065-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/main.c
+5,151-0sys/contrib/dev/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c
+4,650-0sys/contrib/dev/broadcom/brcm80211/brcmfmac/sdio.c
+65,014-0127 files not shown
+116,023-0133 files

LLVM/project 5d2097blldb/source/Plugins/Process/MacOSX-Kernel ProcessKDPProperties.td, lldb/source/Plugins/Trace/intel-pt TraceIntelPTProperties.td

[LLDB] Fix tablegen paths for KDP and IntelPT properties (#180835)

Fixes the build errors from #179524. Initially I used `Parent` as the
name but switched to `Path` later and forgot to update these files.
DeltaFile
+1-1lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDPProperties.td
+1-1lldb/source/Plugins/Trace/intel-pt/TraceIntelPTProperties.td
+2-22 files

LLVM/project c0b11fbllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fmul.ll

InstCombine: Fix wrong insert point for various fmul->copysign simplifies
DeltaFile
+76-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fmul.ll
+18-0llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+94-02 files

LLVM/project 3772275llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fdiv.ll

InstCombine: Fix wrong insert point for fdiv->copysign simplify
DeltaFile
+24-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
+6-0llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+30-02 files

OpenZFS/src 040ba7alib/libzfs libzfs_pool.c

libzfs: improve error message for zpool create with ENXIO

When zpool create fails because a vdev cannot be opened (ENXIO),
the error falls through to zpool_standard_error() which reports
the generic 'one or more devices is currently unavailable'. This
is misleading when the real cause is a block size mismatch or
other device open failure.

Add an explicit ENXIO case in zpool_create()'s error handling to
provide a more descriptive message.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Christos Longros <chris.longros at gmail.com>
Closes #18184
Closes #11087
DeltaFile
+5-0lib/libzfs/libzfs_pool.c
+5-01 files

LLVM/project 7c23210llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-sqrt.ll

InstCombine: Fix wrong insert point for sqrt -> copysign simplify
DeltaFile
+12-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-sqrt.ll
+2-0llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+14-02 files

FreeNAS/freenas 7b82532src/freenas/usr/local/bin truenas-grub.py

Add protections against partially-written truenas-grub.cfg

This commit ensures that we are always atomically replacing the
truenas grub configuration.
DeltaFile
+28-1src/freenas/usr/local/bin/truenas-grub.py
+28-11 files

LLVM/project c7c7e8bllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-rounding-intrinsics.ll

InstCombine: Fix insert point for rounding intrinsic -> copysign

This would use the wrong insert point if reached in a recursive
call.
DeltaFile
+12-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-rounding-intrinsics.ll
+3-0llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+15-02 files

LLVM/project f9d622dllvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/test/Assembler amdgcn-intrinsic-attributes.ll

AMDGPU: Add more attributes to wait event intrinsics (#180825)

Mark as nocallback nofree.
DeltaFile
+15-2llvm/test/Assembler/amdgcn-intrinsic-attributes.ll
+5-2llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+20-42 files

LLVM/project a1fc5b4llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-incomplete-chains.ll

[VPlan] Reject partial reductions with invalid costs in getScaledReds. (#180438)

Check if costs for partial reductions are valid up-front in
getScaledReductions instead when transforming each link in the chain in
transformToPartialReduction. This ensures that we either transform all
entries in the chain together, or none via the existing invalidation
logic.

This fixes a crash when a link in the chain would have invalid cost, as
in the added test cases.

Fixes https://github.com/llvm/llvm-project/issues/180340.

PR: https://github.com/llvm/llvm-project/pull/180438
DeltaFile
+82-86llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+95-0llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-incomplete-chains.ll
+177-862 files

LLVM/project 7f9965cllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fdiv.ll

InstCombine: Fix broken insert point for fdiv replacement (#180830)

SimplifyDemandedFPClass isn't properly adjusting the IRBuilder
insert point, so this could insert at the wrong point if the
simplification happens in one of the recursive calls. There are a few
more of these to fix.
DeltaFile
+19-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
+2-0llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+21-02 files

FreeBSD/ports e5b44f1devel/lua-language-server Makefile distinfo, devel/lua-language-server/files neovim.luarc.json.in pkg-message.in

devel/lua-language-server: Update to 3.17.1

By design, LuaLS wants to create a `.luarc.json` in your project root.
This file defines important things, like module paths, global symbols,
etc.

For those of us addicted to Neovim, LuaLS is all about making the most
of our nvim configs. Operating on the assumption that everybody likes
the same thing we do, this port now supplies a (STRONGLY) recommended
luarc in $EXAMPLESDIR, and a pkg-message pointing to it.

Also, testing during build phase has been disabled. There are some flaky
tests that can lead to failures when the system is under load.

Reported by:    Dave Marker
Approved by:    maintainer (Dave Marker)
Differential Revision:  https://reviews.freebsd.org/D54657
DeltaFile
+32-21devel/lua-language-server/Makefile
+13-13devel/lua-language-server/distinfo
+20-0devel/lua-language-server/files/neovim.luarc.json.in
+12-0devel/lua-language-server/files/pkg-message.in
+4-4devel/lua-language-server/files/patch-3rd_bee.lua_compile_common.lua
+4-4devel/lua-language-server/files/patch-3rd_luamake_compile_ninja_freebsd.ninja
+85-426 files

LLVM/project 550e0d1clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/CodeGen CIRGenBuiltin.cpp

[CIR] Add math and builtin intrinsics support (#175233)

This PR adds support for various math and builtin intrinsics to CIR:

## Changes

1. **Floating-point math intrinsics** - sqrt, cos, exp, exp2, floor,
fabs, sin, log, log2, log10, ceil, nearbyint, rint, round, trunc,
copysign, fma, fmax, fmin, pow
2. **Inverse trig, atan2, and roundeven** - acos, asin, atan, atan2,
roundeven
3. **Elementwise builtins** - add_sat, sub_sat, abs, max, min,
bitreverse, popcount, canonicalize
4. **Integer abs family** - abs, labs, llabs and their __builtin_
variants
5. **Prediction builtins** - __builtin_unpredictable
6. **Tests for rotate builtins** - Added OGCG checks for
__builtin_rotateleft/right

All changes include CIR, LLVM lowering, and OGCG test checks to verify
correctness.
DeltaFile
+2,212-0clang/test/CIR/CodeGen/builtin-floating-point.c
+505-0clang/test/CIR/CodeGen/builtins-elementwise.c
+237-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+190-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+126-20clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+5-23clang/test/CIR/CodeGen/libc.c
+3,275-434 files not shown
+3,292-5710 files

pkgng/pkgng 55a58dalibpkg fetch_libcurl.c

Fix typo in error message
DeltaFile
+1-1libpkg/fetch_libcurl.c
+1-11 files

FreeNAS/freenas 6a87286src/middlewared/middlewared/api/v26_04_0 catalog.py, src/middlewared/middlewared/plugins/apps upgrade.py crud.py

Minor bug fixes
DeltaFile
+9-7src/middlewared/middlewared/plugins/catalog/__init__.py
+11-4src/middlewared/middlewared/api/v26_04_0/catalog.py
+7-7src/middlewared/middlewared/plugins/catalog/apps.py
+5-5src/middlewared/middlewared/plugins/apps/upgrade.py
+3-3src/middlewared/middlewared/plugins/apps/crud.py
+0-2src/middlewared/middlewared/plugins/catalog/apps_details.py
+35-286 files

FreeNAS/freenas 13f73besrc/middlewared/middlewared/plugins/interface control.py

NAS-139721 / 26.0.0-BETA.1 / remove unused interface/control.py (#18171)

This was superseded by changes introduced in
https://github.com/truenas/middleware/pull/18160
DeltaFile
+0-13src/middlewared/middlewared/plugins/interface/control.py
+0-131 files