[SampleProfile] Introduce stabilizeTable (NFC) (#208501)
This patch adds stabilizeTable to replace duplicate code involving
O(N) heap allocations and hash lookups. The new helper function
returns pointers to key-value pairs sorted by key.
Since the keys in MapVector are already guaranteed to be unique,
using std::set for sorting allocates unnecessary tree nodes on the
heap.
Assisted-by: Antigravity
[RISCV] Support Zdinx registers in -fzero-call-used-regs (#206323)
First, this patch makes the backend consider GPRF16 and GPRF32 registers
as GPR. These registers are aliases of normal GPR but for use with the
Zdinx extension (floating points instructions on GPR).
Second, it teaches the general -fzero-call-used-regs logic to handle
used registers that span over multiple physical registers. One example
of this is `GPRPair` in the RISC-V backend.
[z/OS][Clang] Add compare and swap builtin functions (#202362)
Implements the following compare and swap builtins:
```
int __cs(unsigned int *, unsigned int *, unsigned int), 4 byte compare & swap
int __cs1(void* OP1, void* OP2, void* OP3), 4 byte compare & swap
int __csg(void* OP1, void* OP2, void* OP3), 8 byte compare & swap
int __cds1(void* OP1, void* OP2, void* OP3), 8 byte compare & swap
int __cdsg(void* OP1, void* OP2, void* OP3), 16 byte compare & swap
```
The implementation utilizes the llvm cmpxchg intrinsic to generate the
CS instructions, then it generates a store instruction to store OP2 into
OP1, and finally invert the success flag of cmpxchg by an XOR
instruction with 1 and return the flag.
[SystemZ][z/OS] Honor alignment of global data (#208095)
The alignment of sections is set after the section are created. Thus,
the ED structure set at object construction time is updated with the
current section alignment. This only applies to ED type section. As
result, the alignment of global data is correctly set.
Assisted by: IBM Bob
multimedia/asdcplib: New port: Library and tools for working with MXF and DCP files
AS-DCP Lib implements the SMPTE and MXF Interop standards used to package
Digital Cinema (DCP) and IMF essence, providing the libkumu and libasdcp
libraries plus a set of wrap/unwrap/info command line utilities. Optional
support for AS-02 (IMF), JPEG XS and P-HDR is available via options.
This port was previously removed in 2019 and is reintroduced against the
current upstream at https://github.com/cinecert/asdcplib.
graphics/jogamp-jogl: deprecate and expire in 4 months
No maintainer, does not compile with Java 11+, did not keep up with upstream.
The only usage in ports (math/scilab) has been deprecated.
Mail the maintainer if you use this.
Approved-by: no maintainer
offload: Match amdgpu triple name in lit config
The configured offload system target is now amdgpu-amd-amdhsa (per the
plugin CMake change in d776ee4d4cae), which flows into
config.libomptarget_current_target / %target_triple. Update the lit
feature, USM/APU/large-allocation-pool, and PGO/flang-rt detection to key
off 'amdgpu' rather than the old 'amdgcn' prefix so AMDGPU offload tests
are configured correctly again.
Co-Authored-By: Claude <noreply at anthropic.com> # Claude Opus 4.8
[Github][TestingTools] Build on multiple platforms
Given we are shipping binaries, the produced packages are arch-specific
so we need to build/cross-compile on all the architectures that we care
about. Start by getting things working on latest MacOS and Windows.
Reviewers: Michael137, ldionne
Pull Request: https://github.com/llvm/llvm-project/pull/190884
AMDGPU: Respect target assembler directives over command line
Mutate the global subtarget, using essentially the same code that ARM uses.
The main difference is we need to mutate the actual CPU name in addition
to just flipping the feature bits, so this needs a new setter in
MCSubtargetInfo. Liberalize the triple check so that after #206480,
old assembly files to not break on new assembler invocations.
For some reason we have 2 different assembler directives that indicate the
target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal. Previously,
we would take the target from the command line and then error if the directive
did not exactly match. In order to move away from depending on the xnack and
sramecc subtarget features, start treating the directives as a change of target,
similar to ARM's .cpu and .arch directives.
Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc. Ideally
we would introduce new independent directives for these.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
java/eclipse-ecj: deprecate and expire in 4 months
No maintainer, last update was 2015, does not build with Java 11, only usage in the ports tree (math/scilab) was just deprecated.
Approved-by: no maintainer
BPF: Fix misfolding subregisters (#208244)
This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.
The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
