LLVM/project 984417dlldb/docs/resources build.rst

[lldb][doc] Add cross-compilation guide for FreeBSD (#186216)

This is instruction for cross-compiling LLDB on FreeBSD based on
@mgorny's [blog
post](https://web.archive.org/web/20250827001729/https://www.moritz.systems/blog/freebsd-remote-process-plugin-on-non-x86-architectures/).
Tested building arm64 binary on amd64 machine and building amd64 binary
on arm64 machine.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
Co-authored-by: Michał Górny <mgorny at quansight.com>
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LLVM/project 2954727mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-declare-simd-x86.mlir openmp-declare-simd-aarch64-01.mlir

[mlir][OpenMP] Translate omp.declare_simd to LLVM IR

Translate omp.declare_simd operations to LLVM IR by computing Vector
Function ABI (VFABI) mangled names and attaching them as function
attributes. This reuses function parameter mangling and codegen logic
in OpenMPIRBuilder which was extracted form Clang [2][3].

For each omp.declare_simd, lowering computes:

- ParamAttrs: one entry per function argument, classifying it as
  Vector / Uniform / Linear (+ step or var-stride) / Aligned.
- Branch kind: Undefined / Inbranch / Notinbranch.
- VLEN: either from simdlen() or derived from ISA-specific rules.

x86 (SSE/AVX/AVX2/AVX-512):

Emits mangled names following the x86 Vector ABI [1]:

  _ZGV<ISA><Mask><VLEN><ParamAttrs>_<name>

    [33 lines not shown]
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+314-0mlir/test/Target/LLVMIR/openmp-declare-simd-aarch64-01.mlir
+108-0mlir/test/Target/LLVMIR/openmp-declare-simd-aarch64-wds.mlir
+86-0mlir/test/Target/LLVMIR/openmp-declare-simd-aarch64-nds.mlir
+74-0mlir/test/Target/LLVMIR/openmp-declare-simd-aarch64-warnings.mlir
+1,583-07 files not shown
+1,727-913 files

FreeBSD/ports 74f55d0graphics/R-cran-ggrepel distinfo Makefile

graphics/R-cran-ggrepel: Update to 0.9.8

Changelog: https://cran.r-project.org/web/packages/ggrepel/news/news.html
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+3-3graphics/R-cran-ggrepel/distinfo
+1-1graphics/R-cran-ggrepel/Makefile
+4-42 files

FreeBSD/src 2eb0a88cddl/contrib/opensolaris/cmd/dtrace dtrace.1

dtrace.1: Reference dtrace_cam.4

Fixes:  1a7151f79664 cam: Add probes for xpt actions
Event:  AsiaBSDCon 2026
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+2-1cddl/contrib/opensolaris/cmd/dtrace/dtrace.1
+2-11 files

OpenBSD/ports h5zIj1imath/cddlib Makefile

   splitmix64.h:14: error: expected '=', ',', ';', 'asm' or '__attribute__' befor
   e 'uint64_t'

   Move to ports-gcc on base-gcc arches to fix build on sparc64
VersionDeltaFile
1.7+4-0math/cddlib/Makefile
+4-01 files

FreeBSD/ports 3242350devel/p4 distinfo Makefile.inc, devel/p4/files patch-net_nettcptransport.cc patch-Jamrules

devel/p4: Update to 2024.2 release patch 2 (2907753)

Also, found that there is support to use tcp keepalive settings
which perforce wants to set and which are configurable, but the
implementation is Linux specific.

Add code to fix this portability problem.

Problem is being reported upstream.

While we're here, freshen patch-Jamrules.

PR:             293924
Approved by:    antonfb at hesiod.org (maintainer)
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+20-74 files

LLVM/project 2bef931flang/lib/Optimizer/Dialect FIROps.cpp CMakeLists.txt, flang/test/Fir array-coor-canonicalization-acc.fir

Reland "[flang][openacc] Prevent SimplifyArrayCoorOp from folding rebox used by ACC data entry ops (#187616)" (#187626)

The SimplifyArrayCoorOp canonicalization pattern folds fir.rebox into
fir.array_coor by replacing the rebox result with its source. When the
rebox result is the variable of an acc.copyin (or other data entry op),
this folding breaks the chain that LegalizeDataValuesInRegion relies on
to replace host values with device pointers inside compute regions. With
default(none), ACCImplicitData cannot recover the mapping, leaving the
rebox source as an illegal live-in in the offload region.

This is causing illegal live-ins at higher optimization levels.

Guard the folding so it bails out when any user of the rebox is an
ACC_DATA_ENTRY_OPS.

The buildbots failure were cuased by a missing dependency
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+10-0flang/lib/Optimizer/Dialect/FIROps.cpp
+1-0flang/lib/Optimizer/Dialect/CMakeLists.txt
+59-03 files

FreeBSD/ports ff7fbc1x11/stalonetray distinfo Makefile

x11/stalonetray: Update to 1.0.2

Changelog: https://github.com/d3adb5/stalonetray/releases/tag/1.0.2
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+3-3x11/stalonetray/distinfo
+1-1x11/stalonetray/Makefile
+4-42 files

LLVM/project c3f381cmlir/include/mlir/Bindings/Python Globals.h, mlir/lib/Bindings/Python Globals.cpp IRCore.cpp

[mlir-python] Fix duplicate EnumAttr builder registration across dialects. (#187191)

When multiple dialects share td `#includes` (e.g. `affine` includes
`arith`), each dialect's `*_enum_gen.py` file registers attribute
builders under the same keys, causing "already registered" errors on the
second import; the first commit checks in such a case which currently
fails on main:

```
# | RuntimeError: Attribute builder for 'Arith_CmpFPredicateAttr' is already registered with func: <function _arith_cmpfpredicateattr at 0x78d13cbe9a80>
```

This PR implements a two-pronged fix:

1. Add `allow_existing=True` to `register_attribute_builder` (and the
underlying C++ `registerAttributeBuilder`). When set, silently skips
registration if the key already exists (first-wins semantics). This
handles `EnumInfo`-based builders which have no dialect prefix (e.g.
`AtomicRMWKindAttr`, `Arith_CmpFPredicateAttr`), which may be emitted by

    [13 lines not shown]
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+26-7mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
+22-6mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
+17-4mlir/lib/Bindings/Python/Globals.cpp
+5-5mlir/test/mlir-tblgen/enums-python-bindings.td
+6-3mlir/include/mlir/Bindings/Python/Globals.h
+4-2mlir/lib/Bindings/Python/IRCore.cpp
+80-275 files not shown
+92-3311 files

LLVM/project 0000751llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/lib/Target/LoongArch/MCTargetDesc LoongArchAsmBackend.cpp

address @heiher's comments

Created using spr 1.3.7
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+45-0llvm/test/DebugInfo/LoongArch/dwo-no-relocations.ll
+8-5llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+4-4llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-0llvm/test/CodeGen/M68k/pipeline.ll
+60-94 files

OpenBSD/ports TJe8VPFtextproc/p5-XML-Parser Makefile

   p5-XML-Parser: needs at least File::ShareDir as rdep and ...::Install as bdep
VersionDeltaFile
1.38+6-0textproc/p5-XML-Parser/Makefile
+6-01 files

LLVM/project fa2df7eflang/test/Lower/Intrinsics max.f90 log.f90

[flang][NFC] Converted five tests from old lowering to new lowering (part 35) (#187407)

Tests converted from test/Lower/Intrinsics: len.f90,
lge_lgt_lle_llt.f90, log.f90, matmul.f90, max.f90
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+46-37flang/test/Lower/Intrinsics/log.f90
+49-33flang/test/Lower/Intrinsics/len.f90
+17-54flang/test/Lower/Intrinsics/matmul.f90
+9-12flang/test/Lower/Intrinsics/lge_lgt_lle_llt.f90
+189-2015 files

LLVM/project cad4618mlir/lib/Bindings/Python Globals.cpp

emit warning
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+15-7mlir/lib/Bindings/Python/Globals.cpp
+15-71 files

LLVM/project 1cc9a05flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP declare-simd.f90

Add arg-type to declare simd op for language level type information
DeltaFile
+47-8mlir/test/Target/LLVMIR/openmp-declare-simd-aarch64-01.mlir
+35-8mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+31-1flang/lib/Lower/OpenMP/OpenMP.cpp
+25-0mlir/test/Target/LLVMIR/iterator2.f90
+11-7flang/test/Lower/OpenMP/declare-simd.f90
+16-0mlir/test/Dialect/OpenMP/ops.mlir
+165-243 files not shown
+177-259 files

LLVM/project caf079fclang/lib/Headers endian.h, clang/test/Headers endian.c

[clang][headers][endian.h] add some common extensions (#187565)

This PR adds two common extensions to `endian.h` found in some
implementations which we've encountered usages of in existing code (which
are allowable under POSIX), namely:

- double underscore versions of the byte order macros
- PDP endianness macros  

(note: we don't attempt to implement the actual conversion helpers for
PDP endianness, as LLVM doesn't support these targeting platforms with
this endianness, we just provide the macro so code checking against them
on other targets will compile)
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+18-1clang/lib/Headers/endian.h
+3-0clang/test/Headers/endian.c
+21-12 files

FreeNAS/freenas 6bf224dsrc/middlewared/middlewared/plugins/failover_ event.py, src/middlewared/middlewared/plugins/iscsi_ scst.py alua.py

NAS-140375 / 26.0.0-BETA.2 / Preserve Persistent Reservation state across HA failover (by bmeagherix) (#18522)

During HA failover, on the new ACTIVE node:
- Configure the SCST kernel driver to dump PR registrations and
reservations to /var/lib/scst/pr_dump/&lt;serial&gt; at device
unregister time.
- Restore the PR state to extents before target access is reenabled

Also add a CI test that verifies that registrants and a WRITE EXCLUSIVE
reservation survive two successive failovers.

----
Because the CI adds **two** failovers, it has been tagged as requiring
the `extended_tests` flag. Ran this test locally.
HA CI test
[here](http://jenkins.eng.ixsystems.net:8080/job/tests/job/sharing_protocols_tests/1802/)
shows no iSCSI regressions.



    [4 lines not shown]
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+8-0src/middlewared/middlewared/plugins/failover_/event.py
+255-114 files

LLVM/project 19ced5aorc-rt/include/orc-rt Session.h, orc-rt/lib/executor Session.cpp

[orc-rt] Redesign Session to provide a clearer lifecycle. (#187496)

A Session begins in the Start state. In this state no calls will be
received from the controller (since none is attached yet). This provides
clients with an opportunity to configure the Session before attaching a
ControllerAccess object with the `attach` method.

The first call to the `attach` method will register a ControllerAccess
object with the Session, and the ControllerAccess's connect method will
be called to establish a connection with the controller.

If ControllerAccess::connect fails it must call
ControllerAccess::notifyDisconnected, at which point the Session will
proceed to the Detached state.

If ControllerAccess::connect succeeds (i.e. returns without calling
notifyDisconnected) then the Session moves to the Attached state, and
calls can be made in both directions between the executor and
controller.

    [18 lines not shown]
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+309-66orc-rt/lib/executor/Session.cpp
+131-50orc-rt/include/orc-rt/Session.h
+12-9orc-rt/unittests/SessionTest.cpp
+452-1253 files

LLVM/project 2e88fe7flang/lib/Optimizer/Dialect FIROps.cpp, flang/test/Fir array-coor-canonicalization-acc.fir

Revert "[flang][openacc] Prevent SimplifyArrayCoorOp from folding rebox used by ACC data entry ops" (#187625)

Reverts llvm/llvm-project#187616
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+0-10flang/lib/Optimizer/Dialect/FIROps.cpp
+0-582 files

FreeBSD/ports d112134misc/crush distinfo Makefile

misc/crush: Update to 0.51.1

Changelog:
- https://github.com/charmbracelet/crush/releases/tag/v0.51.0
- https://github.com/charmbracelet/crush/releases/tag/v0.51.1

Reported by:    GitHub (watch releases)
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+1-1misc/crush/Makefile
+6-62 files

FreeNAS/freenas 8b3965ctests/sharing_protocols/iscsi test_261_iscsi_cmd.py

Add CI test for PR state preservation across HA failover

Two initiators register keys and one holds a WRITE EXCLUSIVE reservation.
The system is failed over twice (failback included) and after each failover
both keys and the reservation are verified on both paths.

(cherry picked from commit ab3fb208eb187eaf043fcd3eb15ff51b4b15c4a3)
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+152-11 files

FreeNAS/freenas 26a832csrc/middlewared/middlewared/plugins/failover_ event.py, src/middlewared/middlewared/plugins/iscsi_ scst.py alua.py

Preserve PR state across failover device transition

Set pr_dump_dir on the dev_disk handler before tearing down HA sessions
so the kernel dumps PR state at unregister time.  After the replacement
vdisk_blockio devices are created, restore the saved state and swap the
LUNs in without generating a device-replacement UA.

(cherry picked from commit c3ad9e03e4ed586ee01ac3cb3c5c0b26ba8cf5d5)
DeltaFile
+79-4src/middlewared/middlewared/plugins/iscsi_/scst.py
+16-6src/middlewared/middlewared/plugins/iscsi_/alua.py
+8-0src/middlewared/middlewared/plugins/failover_/event.py
+103-103 files

FreeNAS/freenas 0be455csrc/middlewared/middlewared/plugins/failover_ event.py, src/middlewared/middlewared/plugins/iscsi_ scst.py alua.py

NAS-140375 / 27.0.0-BETA.1 / Preserve Persistent Reservation state across HA failover (#18520)

- Preserve PR state across failover device transition
- Add CI test for PR state preservation across HA failover
DeltaFile
+152-1tests/sharing_protocols/iscsi/test_261_iscsi_cmd.py
+79-4src/middlewared/middlewared/plugins/iscsi_/scst.py
+16-6src/middlewared/middlewared/plugins/iscsi_/alua.py
+8-0src/middlewared/middlewared/plugins/failover_/event.py
+255-114 files

LLVM/project 4579b8cclang/lib/Serialization ASTReader.cpp, clang/test/Modules merge-target-features.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+87-0clang/test/Modules/merge-target-features.cpp
+28-9clang/lib/Serialization/ASTReader.cpp
+115-92 files

LLVM/project 616d56cclang/lib/Serialization ASTReader.cpp, clang/test/Modules merge-target-features.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
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+21-0clang/test/Modules/merge-target-features.cpp
+3-0clang/lib/Serialization/ASTReader.cpp
+24-02 files

LLVM/project bf1db77clang/lib/AST/ByteCode InterpFrame.h InterpFrame.cpp

Revert "[clang][bytecode] Allocate local variables in `InterpFrame` tail storage" (#187410)

Reverts llvm/llvm-project#185835

Looks like this broke two msan builders:
https://lab.llvm.org/buildbot/#/builders/164/builds/19819
https://lab.llvm.org/buildbot/#/builders/94/builds/16257
DeltaFile
+15-39clang/lib/AST/ByteCode/InterpFrame.h
+21-23clang/lib/AST/ByteCode/InterpFrame.cpp
+15-13clang/lib/AST/ByteCode/Function.h
+15-9clang/lib/AST/ByteCode/Compiler.cpp
+7-15clang/lib/AST/ByteCode/Context.cpp
+6-13clang/lib/AST/ByteCode/Interp.cpp
+79-11210 files not shown
+116-14416 files

NetBSD/src 2yhDEL5share/man/man4/man4.evbmips cnmac.4

   cnmac.4: add reference to atphy(4)
VersionDeltaFile
1.3+2-1share/man/man4/man4.evbmips/cnmac.4
+2-11 files

FreeBSD/ports 6a1cff6shells/carapace distinfo Makefile

shells/carapace: Update to 1.6.4

Changelog: https://github.com/carapace-sh/carapace-bin/releases/tag/v1.6.4

Reported by:    GitHub (watch releases)
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LLVM/project 92ac87cllvm/lib/Target/LoongArch LoongArchISelLowering.cpp

add assert

Created using spr 1.3.7
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+3-3llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-31 files

LLVM/project 89d8fe9llvm/lib/Target/LoongArch/MCTargetDesc LoongArchAsmBackend.cpp, llvm/test/DebugInfo/LoongArch dwo-no-relocations.ll

[LoongArch] Ensure .dwo sections do not contain relocations (#187429)

When linker relaxation is enabled, LoongArchAsmBackend may emit
relocations for same-section symbol differences, even when the fixup
is in a .dwo section. This leads to errors such as:

  error: A dwo section may not contain relocations

Split DWARF (.dwo) sections must not contain relocations. Fix this by
resolving such fixups immediately when they are emitted into .dwo
sections, even if the referenced symbols are in relaxable sections.

This avoids generating invalid relocations in .debug_*.dwo sections
when compiling with -gsplit-dwarf and -mrelax.

Fixes #187428
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+8-5llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+53-52 files

LLVM/project 828da61llvm/test/CodeGen/M68k pipeline.ll

[M68k] Fix pipeline.ll test after CodeGenPrepare analysis change (#187617)

211279d11c36 added Post-Dominator Tree Construction, Branch Probability
Analysis, and Block Frequency Analysis before CodeGen Prepare but missed
updating the M68k pipeline test.

Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
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+3-01 files