LLVM/project d62c903libcxx/test/benchmarks/containers string.bench.cpp

[libc++] Refactor the string benchmarks (#185397)

Fixes #179696
DeltaFile
+462-580libcxx/test/benchmarks/containers/string.bench.cpp
+462-5801 files

LLVM/project d097c2bllvm/lib/IR Verifier.cpp

[IR][NFC] Add parentheses around logical AND (#208512)

Fixes a `-Wparentheses` warning about unclear priority of operators.
DeltaFile
+2-2llvm/lib/IR/Verifier.cpp
+2-21 files

LLVM/project b5e94d5flang/include/flang/Optimizer/Builder MIFCommon.h, flang/lib/Optimizer/Builder MIFCommon.cpp IntrinsicCall.cpp

[flang][MIF] Fix lowering sub argument in IMAGE_INDEX #208318 (#208544)

This PR fixes issue #208318, which did not correctly prepare the SUB
argument for IMAGE_INDEX in the correct type.
DeltaFile
+23-0flang/lib/Optimizer/Builder/MIFCommon.cpp
+3-3flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+3-3flang/test/Lower/MIF/image_index.f90
+5-0flang/include/flang/Optimizer/Builder/MIFCommon.h
+3-0flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
+1-0flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
+38-66 files

LLVM/project c4ebc6bllvm/test/CodeGen/AMDGPU llvm.amdgcn.intersect_ray.ll llvm.amdgcn.fma.legacy.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+13-13llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
+10-10llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll
+10-10llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
+9-9llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll
+66-6693 files not shown
+451-45199 files

LLVM/project e8df44cllvm/test/CodeGen/AMDGPU llvm.amdgcn.cvt.f32.fp8.err.ll llvm.amdgcn.cvt.fp8.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (18)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+24-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.f32.fp8.err.ll
+13-13llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.ll
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll
+12-12llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll
+85-8594 files not shown
+409-409100 files

LLVM/project 4cd68b2llvm/test/CodeGen/AMDGPU lds-limit-diagnostics.ll isel-amdgpu-cs-chain-preserve-cc.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (17)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+16-16llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics.ll
+12-12llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
+9-9llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
+8-8llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
+7-7llvm/test/CodeGen/AMDGPU/large-alloca-compute.ll
+6-6llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
+58-5894 files not shown
+212-212100 files

LLVM/project 7666bc9llvm/test/CodeGen/AMDGPU integer-mad-patterns.ll idot4u.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (16)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+24-24llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
+8-8llvm/test/CodeGen/AMDGPU/idot4u.ll
+8-8llvm/test/CodeGen/AMDGPU/idot4s.ll
+8-8llvm/test/CodeGen/AMDGPU/idot8s.ll
+6-6llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
+6-6llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
+60-6094 files not shown
+261-261100 files

LLVM/project 9822c95llvm/test/CodeGen/AMDGPU hsa-metadata-queue-ptr-v5.ll global-saddr-load.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (15)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+9-9llvm/test/CodeGen/AMDGPU/hsa-metadata-queue-ptr-v5.ll
+8-8llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
+7-7llvm/test/CodeGen/AMDGPU/huge-private-buffer.ll
+6-6llvm/test/CodeGen/AMDGPU/hsa-metadata-dynlds-func-hidden-args-v5.ll
+6-6llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
+6-6llvm/test/CodeGen/AMDGPU/hsa-metadata-from-llvm-ir-full.ll
+42-4291 files not shown
+265-26597 files

LLVM/project 7e1975cllvm/test/CodeGen/AMDGPU fptrunc.f16.ll gfx11-user-sgpr-init16-bug.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (14)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+16-16llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
+14-14llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
+14-14llvm/test/CodeGen/AMDGPU/freeze.ll
+13-13llvm/test/CodeGen/AMDGPU/fptrunc.ll
+13-13llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
+12-12llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+82-8292 files not shown
+476-47698 files

LLVM/project c3a2020llvm/test/CodeGen/AMDGPU fmax3-maximumnum.ll fmin3-minimumnum.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+18-18llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+16-16llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
+14-14llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
+12-12llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
+11-11llvm/test/CodeGen/AMDGPU/fmin3.ll
+89-8994 files not shown
+374-374100 files

FreeBSD/src f2f50c8usr.bin/sockstat main.c

sockstat: fix SCTP support

Provide a name for SCTP sockets.

Fixes:          8b2b62b49d88 ("sockstat: consolidate unix(4) protocols in the array of protocols")
DeltaFile
+2-0usr.bin/sockstat/main.c
+2-01 files

LLVM/project b4698d8llvm/test/CodeGen/AMDGPU fcanonicalize.ll flat-scratch-reg.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12) (#208896)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+15-15llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
+14-14llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
+14-14llvm/test/CodeGen/AMDGPU/flat-scratch.ll
+12-12llvm/test/CodeGen/AMDGPU/fma.f16.ll
+10-10llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
+83-8394 files not shown
+371-371100 files

LLVM/project e3e1569llvm/test/CodeGen/AMDGPU elf-header-flags-mach.ll elf-header-osabi.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11) (#208895)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+79-79llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
+18-18llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
+14-14llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
+10-10llvm/test/CodeGen/AMDGPU/dpp_combine.ll
+10-10llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
+9-9llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
+140-14093 files not shown
+377-37799 files

NetBSD/pkgsrc 3QHhrxcdoc CHANGES-2026

   Updated devel/py-hypothesis, math/py-astropy-iers-data
VersionDeltaFile
1.4417+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc Bmrio17math/py-astropy-iers-data Makefile distinfo

   py-astropy-iers-data: updated to 0.2026.7.13.0.54.2

   0.2026.7.13.0.54.2
   Update IERS Earth rotation and leap second tables
VersionDeltaFile
1.20+4-5math/py-astropy-iers-data/Makefile
1.19+4-4math/py-astropy-iers-data/distinfo
1.4+1-4math/py-astropy-iers-data/PLIST
+9-133 files

NetBSD/pkgsrc Qjo8QDUdevel/py-hypothesis distinfo cargo-depends.mk

   py-hypothesis: updated to 6.156.6

   6.156.6 - 2026-07-10
   This patch fixes GitHubArtifactDatabase failing to download artifacts due to a colliding Authorization header.

   6.156.5 - 2026-07-10
   We now publish abi3 wheels for 32-bit linux and 32-bit windows.

   6.156.4 - 2026-07-08
   In addition to our version-specific wheels, we now also publish abi3 wheels, built against the 3.10 stable ABI.

   6.156.3 - 2026-07-08
   Fix not uploading source distributions to PyPI, as of v6.156.0.

   6.156.2 - 2026-07-07
   This patch fixes a KeyError in GitHubArtifactDatabase when reading an artifact whose zip file contains no explicit directory entries, which is the case for zips produced by actions/upload-artifact.

   6.156.1 - 2026-07-03
   This patch fixes our build pipeline from v6.156.0, so that wheels are actually published.

    [5 lines not shown]
VersionDeltaFile
1.167+46-4devel/py-hypothesis/distinfo
1.1+16-0devel/py-hypothesis/cargo-depends.mk
1.173+8-5devel/py-hypothesis/Makefile
1.53+2-5devel/py-hypothesis/PLIST
+72-144 files

LLVM/project 13dbff3flang/test/Lower/OpenMP unroll-partial01.f90, mlir/include/mlir/Dialect/OpenMP OpenMPOps.td

[Flang][Openmp] Implement support for partial in unroll construct (#206642)

As described in section 9.2.2 of openmp 5.2 spec, the patch implements
support for partial in unroll construct.
DeltaFile
+97-0mlir/test/Target/LLVMIR/openmp-unroll-partial02.mlir
+59-0mlir/test/Dialect/OpenMP/cli-unroll-partial.mlir
+57-0mlir/test/Target/LLVMIR/openmp-unroll-partial01.mlir
+54-0flang/test/Lower/OpenMP/unroll-partial01.f90
+50-0mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+35-0mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+352-05 files not shown
+424-511 files

LLVM/project 3de2e4aclang/lib/AST/ByteCode Interp.cpp Compiler.cpp, clang/test/AST/ByteCode literals.cpp

[clang][bytecode] diagnose reads from non-constant local variables... (#208990)

... if we're in the bottom frame.
DeltaFile
+16-4clang/test/AST/ByteCode/literals.cpp
+12-2clang/lib/AST/ByteCode/Interp.cpp
+5-1clang/lib/AST/ByteCode/Compiler.cpp
+33-73 files

LLVM/project abd72b0offload/test/offloading/fortran target-teams-if-runtime-init.f90, openmp/device/src Kernel.cpp

[OpenMP] Publish target-init team state with acq_rel barrier (#208701)

In __kmpc_target_init, thread 0 initializes the team state in LDS
(HasThreadState = 0, ThreadStates = nullptr) and then releases the other
threads with synchronize::threadsAligned(atomic::relaxed). Because the
relaxed ordering emits no memory fence, the initializing LDS stores are
not guaranteed to be visible to the worker threads before they proceed.
A worker thread can then read the uninitialized team state and produce
wrong results or crash. This is the flow that causes the race as I
understand it.

```
__kmpc_target_init                                    (Kernel.cpp:107)
  -> initializeRuntime                                (Kernel.cpp:38)
       -> state::init                                         (State.cpp:286)
            -> TeamState.init(IsSPMD)                 (State.cpp:295)
                 -> HasThreadState = false            (State.cpp:248)   // <-- the value later read stale
               ThreadStates = nullptr                 (State.cpp:296)
  -> synchronize::threadsAligned(atomic::relaxed)     (Kernel.cpp:115)  // <-- insufficient barrier:

    [25 lines not shown]
DeltaFile
+61-0offload/test/offloading/fortran/target-teams-if-runtime-init.f90
+1-1openmp/device/src/Kernel.cpp
+62-12 files

LLVM/project 9e8b030mlir/lib/Dialect/Linalg/TransformOps LinalgTransformOps.cpp, mlir/test/Dialect/Linalg flatten-unsupported.mlir flatten-elementwise.mlir

[MLIR][Linalg] Fix FlattenElementwiseOp on broadcasted linalgs (#207005)

Applying FlattenElementwiseLinalgOp on Broadcasted linalg would break.
This transformation is not valid for those usecase, so I added a
condition to exit gracefully instead.
DeltaFile
+48-3mlir/test/Dialect/Linalg/flatten-unsupported.mlir
+8-8mlir/test/Dialect/Linalg/flatten-elementwise.mlir
+8-0mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
+64-113 files

FreeBSD/ports c22eb50deskutils/gucharmap Makefile

deskutils/gucharmap: chase UCD modification

PR:             295480
DeltaFile
+1-1deskutils/gucharmap/Makefile
+1-11 files

LLVM/project 6e42e25llvm/test/CodeGen/AMDGPU dagcombine-fmul-sel.ll ctlz.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10) (#208894)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+10-10llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
+6-6llvm/test/CodeGen/AMDGPU/ctlz.ll
+6-6llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
+6-6llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
+6-6llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
+5-5llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
+39-3991 files not shown
+210-21097 files

LLVM/project cec7cf4llvm/test/CodeGen/AMDGPU carryout-selection.ll call-graph-register-usage.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9) (#208893)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+11-11llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+10-10llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
+8-8llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
+8-8llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
+8-8llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
+8-8llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
+53-5393 files not shown
+258-25899 files

LLVM/project 6e8a4celldb/docs/resources build.md

[lldb][docs] Make it clear that we require SWIG >= 4 (#208687)

We said this in "Preliminaries", but later had a note about SWIG < 4. So
if you hadn't read
the first part properly, it looked like we allow < 4.

We do not, so I've removed the note about < 4 and
added SWIG to the "Optional Dependencies" table
for extra emphasis.
DeltaFile
+1-7lldb/docs/resources/build.md
+1-71 files

NetBSD/src KfT7iPbsys/arch/sparc/dev cgfourteen.c cgfourteenvar.h

   support WSDISPLAYIO_GET_FBINFO and WSDISPLAYIO_SET_DEPTH
VersionDeltaFile
1.100+54-17sys/arch/sparc/dev/cgfourteen.c
1.20+4-1sys/arch/sparc/dev/cgfourteenvar.h
+58-182 files

NetBSD/pkgsrc-wip 5c237a3ed Makefile PLIST

ed: Follow the naming convention of binaries with "g" prefix
DeltaFile
+15-0ed/Makefile
+9-5ed/PLIST
+24-52 files

NetBSD/pkgsrc t2ZVFKCdoc CHANGES-2026 TODO

   Updated www/py-vcrpy, www/py-websockets
VersionDeltaFile
1.4416+3-1doc/CHANGES-2026
1.27561+1-2doc/TODO
+4-32 files

FreeBSD/src 920518csys/dev/fdt fdt_common.c fdt_common.h

FDT: implement fdt_ether_get_addr()

Introduce fdt_ether_get_addr() in fdt_common.c/h that tries standard
DT properties in the correct order and falls back to a random address
when needed. This should be used by ethernet drivers instead of open-coding
the same logic.

MFC after:      2 weeks

Reviewed by:    mhorne, adrian, bz, jrtc27
Differential Revision:  https://reviews.freebsd.org/D58104
DeltaFile
+40-0sys/dev/fdt/fdt_common.c
+4-0sys/dev/fdt/fdt_common.h
+44-02 files

LLVM/project 1651159mlir/tools/mlir-irdl-to-cpp CMakeLists.txt, mlir/tools/mlir-src-sharder CMakeLists.txt

[MLIR] Install missing standalone helper tools (#205066)

Standalone MLIR installs CMake package files that can reference helper
executables needed by downstream builds. Most helper tools already have
install paths available through existing LLVM tool and utility install
options, but `mlir-src-sharder` does not pass an install destination to
`add_tablegen` and `mlir-irdl-to-cpp` does not define an install rule.

Install those two missing helpers.

Co-authored-by: Luca Fancellu <luca.fancellu at arm.com>
DeltaFile
+11-0mlir/tools/mlir-irdl-to-cpp/CMakeLists.txt
+2-0mlir/tools/mlir-src-sharder/CMakeLists.txt
+13-02 files

LLVM/project 3a61e72llvm/lib/Target/ARM ARMFrameLowering.cpp ARMMachineFunctionInfo.h, llvm/test/CodeGen/ARM estimate-size-copy.mir

[ARM][Thumb1] Improve EstimateFunctionSizeInBytes accuracy (#203318)

The estimate of a function size now includes (what I hope are) upper
bounds on the size of the prologue and epilogue; adds size estimates for
some pseudo-instructions that were previously counted as 0; and
increases the estimates for things that were previously optimistic, such
as assuming no constant pool entry ever needs to be duplicated. The
estimation function is also passed extra information to use for
adjusting its estimates, such as the BigFrameOffsets flag which makes
some pseudos have much longer expansions.

Background:

EstimateFunctionSizeInBytes is supposed to estimate how large a Thumb1
function will end up, in advance of actually doing the full code
generation. It must overestimate rather than underestimating, because
large functions need a special precaution (namely, making sure LR is
stacked, so that BL can be used for an intra-function long branch). In
multiple cases recently it has underestimated, leading to a crash later

    [8 lines not shown]
DeltaFile
+227-17llvm/lib/Target/ARM/ARMFrameLowering.cpp
+11-0llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
+1-1llvm/test/CodeGen/ARM/estimate-size-copy.mir
+239-183 files