LLVM/project e73db4dorc-rt/test/regression check-rt-processi-info.test, orc-rt/test/regression/darwin lit.local.cfg check-rt-process-info.test

[orc-rt] Add darwin subdir for regression tests. (#220754)

All tests in the new subdirectory are implicitly gated on lit's
"system-darwin" feature flag.

Move check-rt-process-info.test into the darwin subdirectory and drop
its "system-darwin" guard, since it will now be covered by the darwin
directory's guard.
DeltaFile
+0-8orc-rt/test/regression/check-rt-processi-info.test
+6-0orc-rt/test/regression/darwin/check-rt-process-info.test
+2-0orc-rt/test/regression/darwin/lit.local.cfg
+8-83 files

LLVM/project 01145e3mlir/lib/Dialect/XeGPU/Transforms XeGPUVectorLinearize.cpp, mlir/test/Dialect/XeGPU xegpu-vector-linearize.mlir

[MLIR][XeGPU] Promote mixed-size vector.shuffle in xegpu-vector-linearize (#217141)

Linearizing an insert of a narrow chunk into a wider tile produces a
`vector.shuffle` whose operands have different lengths:

%0 = vector.insert_strided_slice %chunk, %tile {offsets = [1, 0],
strides = [1]}
     : vector<4xbf16> into vector<8x4xbf16>
  // becomes shuffle(vector<32xbf16>, vector<4xbf16>)

MLIR permits that, but LLVM and SPIR-V shuffles require both operands to
have the
same type, so `convert-vector-to-llvm` falls off its fast path and emits
one
`extractelement` plus one `insertelement` per result element. In a
workgroup-level
mxfp GEMM the linearizer emits ~1000 such shuffles, and scalarizing them
accounts
for roughly 70% of the emitted LLVM IR.

    [15 lines not shown]
DeltaFile
+64-20mlir/test/Dialect/XeGPU/xegpu-vector-linearize.mlir
+17-0mlir/lib/Dialect/XeGPU/Transforms/XeGPUVectorLinearize.cpp
+81-202 files

LLVM/project aab4e16llvm/lib/Target/AMDGPU AMDGPULowerIntrinsics.cpp, llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

[AMDGPU] Validate barrier ID in S_BARRIER_SIGNAL_ISFIRST (#220101)

Value user_cluster_barrier_id is not supported.

Fixes: SWDEV-534494
DeltaFile
+3-36llvm/test/CodeGen/AMDGPU/lower-intrinsics-cluster-barrier.ll
+23-0llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+9-0llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
+9-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.signal.isfirst.invalid_barrier.ll
+5-0llvm/test/MC/AMDGPU/gfx13_err.s
+3-0llvm/test/MC/AMDGPU/gfx12_err.s
+52-366 files

LLVM/project 7ecc2b3offload/languages/kernel CMakeLists.txt

[Offload] Build LLVMOffloadKernel with add_library (#220748)

Depending on system and cmake configuration, LLVMOffloadKernel cannot
find LLVMOffload when testing because they live in different directories
in the build.

This patch aligns LLVMOffloadKernel's library build/install directory
configuration with LLVMOffload's, which makes sure it can always be
found.

The cause is that llvm_add_library adds some implicit handling which can
throw off the directories we need (see
3383f0d6fe01374b91845e7cd3ee949594c4bfc6)
DeltaFile
+7-3offload/languages/kernel/CMakeLists.txt
+7-31 files

LLVM/project db62516clang/test/CodeGenHLSL/builtins trunc_mat.hlsl tan_mat.hlsl

[HLSL] Add matrix support for float->float pure function intrinsics (#202455)

Resolves #184486, #184492, #184495, #184496, #184497, #184499, #184500,
#184501, #184502, #184503, #184504, #184507, #184508, #184509, #184514,
#184515, #184516, #184517, #184518, #184519, #184520, #184521, #184522

Assisted-by: Claude Sonnet 4
DeltaFile
+244-0clang/test/CodeGenHLSL/builtins/saturate_mat.hlsl
+233-0clang/test/CodeGenHLSL/builtins/rcp_mat.hlsl
+184-0clang/test/CodeGenHLSL/builtins/rsqrt_mat.hlsl
+184-0clang/test/CodeGenHLSL/builtins/frac_mat.hlsl
+143-0clang/test/CodeGenHLSL/builtins/tan_mat.hlsl
+142-0clang/test/CodeGenHLSL/builtins/trunc_mat.hlsl
+1,130-018 files not shown
+3,544-2324 files

LLVM/project e775ea8llvm/lib/Target/AMDGPU AMDGPUHWEvents.def AMDGPUHWEvents.cpp, llvm/test/CodeGen/AMDGPU flat-atomicrmw-fadd.ll a-v-flat-atomicrmw.ll

[AMDGPU] Track BUFFER_INV during waitcnt insertion (#220694)

Currently SIInsertWaitcnts doesn't mark `BUFFER_INV` instructions as
incrementing `VM_CNT`, though according to gfx942/gfx950 ISA `VM_CNT`
does increment. This PR teaches SIInsertWaitcnts to handle `BUFFER_INV`,
akin to how `GLOBAL_INV` is handled for gfx12+. No changes in behavior
are made for gfx12+ codegen.

Similar to `GLOBAL_INV` the implementation elides waits when inv
instructions are the only pending load events because they do not write
VGPRs.

The motivation is to use `BUFFER_INV 0` as a nop to increment `VM_CNT`
in branches to allow relaxed `s_waitcnt vmcnt` instructions (coming in a
separate PR).
DeltaFile
+45-0llvm/test/CodeGen/AMDGPU/waitcnt-buffer-inv.mir
+20-16llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+0-18llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
+0-12llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
+6-5llvm/lib/Target/AMDGPU/AMDGPUHWEvents.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUHWEvents.def
+72-521 files not shown
+72-537 files

LLVM/project a19f611llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv convert-from-arbitrary-fp.ll fixed-vector-convert-from-arbitrary-fp.ll

[RISCV] Lower `CONVERT_FROM_ARBITRARY_FP` of Float8E5M2 with Zvfofp8min (#220132)

The new(-ish) `llvm.convert.from.arbitrary.fp` intrinsics (`ISD::
CONVERT_FROM_ARBITRARY_FP`) can be lowered into `vfwcvtbf16.f.f.v` from
Zvfofp8min if the input operand is a Float8E5M2 / Float8E4M3 vector
(represented by i8 vector in LLVM), and producing a bf16 vector result.

This patch adds such lowering for the Float8E5M2 type
(SelectionDAGBuilder hasn't supported the Float8E4M3 variant of
`CONVERT_FROM_ARBITRARY_FP`).

Note that although Zvfofp8min does not require Zvfbfmin or Zvfbfa[^1],
in reality it'll be pretty difficult to implement that (lower of
`vfwcvtbf16.f.f.v` even though there is only no bf16 vector support) in
legalization. So for this patch, I emit `vfwcvtbf16.f.f.v` only if both
Zvfofp8min _and_ bf16 vector support are present.

[^1]: Rationale:
https://github.com/riscv/riscv-isa-manual/pull/2979#issuecomment-4320773526
DeltaFile
+486-0llvm/test/CodeGen/RISCV/rvv/fixed-vector-convert-from-arbitrary-fp.ll
+54-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+24-0llvm/test/CodeGen/RISCV/rvv/convert-from-arbitrary-fp.ll
+564-03 files

FreeNAS/freenas f3c24e7src/middlewared/middlewared/alembic/versions/26.0 2026-09-03_09-00_truenas_s3_accesskey.py, src/middlewared/middlewared/api/v26_0_0 s3.py

NAS-143051 / 27.0.0-BETA.1 / add s3.accesskey CRUD namespace (by yocalebo) (#19602)

This is first part of a few PRs that will follow. Nothing uses this yet
and can stand on its own.

Original PR: https://github.com/truenas/middleware/pull/19599

Co-authored-by: caleb <yocalebo at gmail.com>
DeltaFile
+279-0src/middlewared/middlewared/plugins/truenas_s3/accesskey_crud.py
+219-0tests/api2/test_s3_accesskey.py
+128-0src/middlewared/middlewared/api/v27_0_0/s3.py
+128-0src/middlewared/middlewared/api/v26_0_0/s3.py
+36-0src/middlewared/middlewared/alembic/versions/26.0/2026-09-03_09-00_truenas_s3_accesskey.py
+22-1src/middlewared/middlewared/utils/crypto.py
+812-18 files not shown
+858-114 files

FreeNAS/freenas 13df78esrc/middlewared/middlewared main.py, src/middlewared/middlewared/alembic/versions/26.0 2026-09-03_09-00_truenas_s3_accesskey.py

NAS-143051 / 26.0.0 / add s3.accesskey CRUD namespace (by yocalebo) (#19601)

This is first part of a few PRs that will follow. Nothing uses this yet
and can stand on its own.

Original PR: https://github.com/truenas/middleware/pull/19599

---------

Co-authored-by: caleb <yocalebo at gmail.com>
DeltaFile
+288-0src/middlewared/middlewared/plugins/truenas_s3/accesskey_crud.py
+218-0tests/api2/test_s3_accesskey.py
+129-0src/middlewared/middlewared/api/v26_0_0/s3.py
+36-0src/middlewared/middlewared/alembic/versions/26.0/2026-09-03_09-00_truenas_s3_accesskey.py
+22-1src/middlewared/middlewared/utils/crypto.py
+8-0src/middlewared/middlewared/main.py
+701-15 files not shown
+716-111 files

FreeNAS/freenas 7b10cd0src/middlewared/middlewared main.py, src/middlewared/middlewared/alembic/versions/26.0 2026-09-03_09-00_truenas_s3_accesskey.py

NAS-143051 / 26.0.0-RC.1 / add s3.accesskey CRUD namespace (#19599)

This is first part of a few PRs that will follow. Nothing uses this yet
and can stand on its own.
DeltaFile
+288-0src/middlewared/middlewared/plugins/truenas_s3/accesskey_crud.py
+218-0tests/api2/test_s3_accesskey.py
+129-0src/middlewared/middlewared/api/v26_0_0/s3.py
+36-0src/middlewared/middlewared/alembic/versions/26.0/2026-09-03_09-00_truenas_s3_accesskey.py
+22-1src/middlewared/middlewared/utils/crypto.py
+8-0src/middlewared/middlewared/main.py
+701-15 files not shown
+716-111 files

OpenBSD/ports bNKzlLjnet/curl distinfo Makefile, net/curl/pkg PLIST

   net/curl: update to 8.22.0

   Changes:
   * hardening: add API guards
   * TLS: drop support for TLS-SRP

   Includes fixes for
   CVE-2026-18924: HTTP/2 server push UAF
   CVE-2026-19931: Negotiate ambient user conn reuse
   CVE-2026-80230: OpenSSL pinning bypass
   CVE-2026-80255: secure cookie attribute bypass with tab
VersionDeltaFile
1.148+2-2net/curl/distinfo
1.216+2-2net/curl/Makefile
1.91+4-0net/curl/pkg/PLIST
+8-43 files

FreeNAS/freenas f4282ddsrc/middlewared/middlewared/alembic/versions/26.0 2026-09-03_09-00_truenas_s3_accesskey.py, src/middlewared/middlewared/api/v26_0_0 s3.py

Add S3 access keys

An S3 access key is the SigV4 credential pair a client signs requests
to the TrueNAS S3 service with. It gets its own table and the new
s3.accesskey namespace rather than a place in the API key table, so
nothing in the TrueNAS API authentication path ever reads it and the
security sensitive api_key surface stays untouched.

A key belongs to a local or directory services account through the
same user_identifier linkage API keys use, resolved to a username at
query time, and needs no privilege roles because the S3 service runs
its requests as the account. The access key id and the secret are
generated unless supplied, both in the character sets the S3 service
config reader carries verbatim. The secret is stored recoverable
because SigV4 derives signing keys from it, and it stays readable to
administrators holding the new SHARING_S3_WRITE role while being
redacted for everyone else. A computed status folds the enabled flag,
expiry, a deleted account and a secret lost to a config restore
without the secret seed into one value, so the credentials file will

    [8 lines not shown]
DeltaFile
+279-0src/middlewared/middlewared/plugins/truenas_s3/accesskey_crud.py
+219-0tests/api2/test_s3_accesskey.py
+128-0src/middlewared/middlewared/api/v26_0_0/s3.py
+128-0src/middlewared/middlewared/api/v27_0_0/s3.py
+36-0src/middlewared/middlewared/alembic/versions/26.0/2026-09-03_09-00_truenas_s3_accesskey.py
+22-1src/middlewared/middlewared/utils/crypto.py
+812-18 files not shown
+858-114 files

LLVM/project fadd7e6orc-rt/include/orc-rt/support Compiler.h

[orc-rt] Remove unused ORC_RT_HAS_CPP_ATTRIBUTE (#220747)
DeltaFile
+0-10orc-rt/include/orc-rt/support/Compiler.h
+0-101 files

OpenZFS/src 57fbddfmodule/zfs arc.c

arc: harness buf_hdr's anon state invariant checks

There are several places where hdr is checked for arc_anon state
without the hash_lock, for example at arc_release() or at
arc_buf_destroy(), and it's supposed that the hdr must not be
in the hash table in this state and not having IO_IN_PROGRESS.
However, those invariants are not asserted in release builds.
But even if they would, there is one place in the current code
where they would pass without noticing the problem.

This place is at arc_write_done() where we first insert hdr
into the hash table, then clear IO_IN_PROGRESS flag, then drop
the reference and only then move its state from anon to mru:

  7048  exists = buf_hash_insert(hdr, &hash_lock); /* still anon */
        ...
  7081  arc_hdr_clear_flags(hdr, ARC_FLAG_IO_IN_PROGRESS);
  7082  VERIFY3S(remove_reference(hdr, hdr), >, 0); /* ref: 2 -> 1 */
  7084  if (exists == NULL && hdr->b_l1hdr.b_state == arc_anon)

    [34 lines not shown]
DeltaFile
+6-6module/zfs/arc.c
+6-61 files

FreeNAS/freenas a64faafsrc/middlewared/middlewared/api/v26_0_0 truenas.py, src/middlewared/middlewared/plugins/truenas license.py

Redact uploaded license from the audit trail

This commit fixes an issue where `truenas.license.upload` recorded its license argument verbatim in the audit trail, because the field was never declared `Secret[...]`. Uploading needs FULL_ADMIN but audit records come back with SYSTEM_AUDIT_READ, so a read-only admin could pull out the blob a full admin installed, and the same record went to remote syslog and into debug bundles.

Marking the field `Secret[LongNonEmptyString]` means `check_annotations` stops accepting the old `license_: str` signature, and the `str(license_)` that went with it turned out to be wrong already: it stringified the `LongStringWrapper` and wrote `LongStringWrapper(<pem>)` into the license file. The daemon's PEM scan skips the leading garbage so nothing ever failed, but the on-disk copy never matched what was uploaded, which defeats the TNC heartbeat's raw_license comparison and makes every HA send_license add another wrapper layer. Unwrapping both boxes writes the PEM back byte for byte.
DeltaFile
+8-2src/middlewared/middlewared/plugins/truenas/license.py
+2-2src/middlewared/middlewared/api/v26_0_0/truenas.py
+10-42 files

OpenZFS/src b824f31module/zstd zfs_zstd.c

zstd: declare __asan_*_memory_region() for user space builds

ZSTD_ASAN_POISON() and ZSTD_ASAN_UNPOISON() call
__asan_poison_memory_region() and __asan_unpoison_memory_region()
directly, but nothing declares them in the user space build. The kernel
block just above declares both -- and stubs them out, since KASAN does
not provide them -- while the user space block was left with only the
macros.

That builds where an implicit function declaration is a warning, since
the real symbols come from libasan at link time, but fails on compilers
that make it an error, as GCC 14 and newer do by default:

    zfs_zstd.c:278:34: error: implicit declaration of function
    '__asan_poison_memory_region' [-Wimplicit-function-declaration]

Declare both in the user space block, mirroring the kernel block.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Alexander Moch <mail at alexmoch.com>
Closes #19017
DeltaFile
+2-0module/zstd/zfs_zstd.c
+2-01 files

LLVM/project f33ef3allvm/lib/Target/AArch64 AArch64SchedC1Ultra.td AArch64SchedC1Premium.td, llvm/test/CodeGen/AArch64 misched-c1sme.ll

[AArch64] Use NoSchedPred for SME instructions in C1 scheduling models. (#220553)

We can have the scheduling model enabled without SME using -mtune, which
means that no scheduling information was present for any instructions
that execute in either SME or the core. AFAICT the predicate should be
NoSchedPred, as any instructions should be using the non-streaming
scheduling info when not in a SME function.

Fixes #220070
Fixes #220067
DeltaFile
+24-0llvm/test/CodeGen/AArch64/misched-c1sme.ll
+1-1llvm/lib/Target/AArch64/AArch64SchedC1Ultra.td
+1-1llvm/lib/Target/AArch64/AArch64SchedC1Premium.td
+26-23 files

LLVM/project 70519bcorc-rt/include/orc-rt-c/support Logging.h Compiler.h

[orc-rt] Drop the _C_ prefix from ORC_RT_C_FORMAT_PRINTF (#220592)

The macro is not C-specific. Rename it to ORC_RT_FORMAT_PRINTF and
update its two uses in Logging.h.
DeltaFile
+3-3orc-rt/include/orc-rt-c/support/Compiler.h
+2-2orc-rt/include/orc-rt-c/support/Logging.h
+5-52 files

LLVM/project aba5ec2llvm/lib/Target/NVPTX NVPTXTargetTransformInfo.cpp, llvm/test/Transforms/InstCombine/NVPTX nvvm-intrins.ll

[NVPTX] Fold abs into redux intrinsics

Fold llvm.fabs into the absolute-value variants of floating-point
redux min/max intrinsics during InstCombine.
DeltaFile
+37-1llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
+32-0llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
+69-12 files

LLVM/project 53b30bfllvm/lib/Target/AMDGPU SOPInstructions.td

[AMDGPU] Use named operands in SOP1_Real. NFC (#220705)
DeltaFile
+14-13llvm/lib/Target/AMDGPU/SOPInstructions.td
+14-131 files

FreeBSD/ports 89b89ecemulators/py-unicorn distinfo Makefile, emulators/py-unicorn/files patch-pyproject.toml patch-setup.py

emulators/py-unicorn: update to 2.1.4
DeltaFile
+11-11emulators/py-unicorn/Makefile
+0-16emulators/py-unicorn/files/patch-setup.py
+9-0emulators/py-unicorn/files/patch-pyproject.toml
+3-3emulators/py-unicorn/distinfo
+23-304 files

LLVM/project 81bf35dflang/lib/Optimizer/Transforms/CUDA CUFAllocDelay.cpp, flang/test/Transforms/CUF cuf-alloc-delay.fir

[flang][cuda] Delay descriptor alloc when addressed reused on host/device (#220534)

CSE can share one fir.coordinate_of between the host-association capture
store and a later fir.load. Treating that coordinate_of as a real use
made cuf-alloc-delay think the movable group depended on an operand at
the sink point, so the device descriptor stayed at function entry and
cudaMallocManaged ran before cudaSetDevice.

Count only users of the slot address that actually read it. Stores that
populate the tuple still sink with the allocation group.
DeltaFile
+38-1flang/test/Transforms/CUF/cuf-alloc-delay.fir
+11-11flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
+49-122 files

FreeNAS/freenas 3f1ce33

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files

FreeNAS/freenas ad0683dtests/api2 test_s3_accesskey.py

ruff format

(cherry picked from commit 5688d9531b9a3f997e9a04e84cd83e5b81239f44)
DeltaFile
+3-10tests/api2/test_s3_accesskey.py
+3-101 files

FreeNAS/freenas 64c50dfsrc/middlewared/middlewared main.py, src/middlewared/middlewared/alembic/versions/26.0 2026-09-03_09-00_truenas_s3_accesskey.py

Add S3 access keys

An S3 access key is the SigV4 credential pair a client signs requests
to the TrueNAS S3 service with. It gets its own table and the new
s3.accesskey namespace rather than a place in the API key table, so
nothing in the TrueNAS API authentication path ever reads it and the
security sensitive api_key surface stays untouched.

A key belongs to a local or directory services account through the
same user_identifier linkage API keys use, resolved to a username at
query time, and needs no privilege roles because the S3 service runs
its requests as the account. The access key id and the secret are
generated unless supplied, both in the character sets the S3 service
config reader carries verbatim. The secret is stored recoverable
because SigV4 derives signing keys from it, and it stays readable to
administrators holding the new SHARING_S3_WRITE role while being
redacted for everyone else. A computed status folds the enabled flag,
expiry, a deleted account and a secret lost to a config restore
without the secret seed into one value, so the credentials file will

    [6 lines not shown]
DeltaFile
+288-0src/middlewared/middlewared/plugins/truenas_s3/accesskey_crud.py
+225-0tests/api2/test_s3_accesskey.py
+129-0src/middlewared/middlewared/api/v26_0_0/s3.py
+36-0src/middlewared/middlewared/alembic/versions/26.0/2026-09-03_09-00_truenas_s3_accesskey.py
+22-1src/middlewared/middlewared/utils/crypto.py
+8-0src/middlewared/middlewared/main.py
+708-15 files not shown
+723-111 files

FreeBSD/ports b3bbad0emulators/unicorn pkg-plist Makefile

emulators/unicorn: update to 2.1.4
DeltaFile
+3-3emulators/unicorn/distinfo
+1-2emulators/unicorn/Makefile
+1-0emulators/unicorn/pkg-plist
+5-53 files

LLVM/project 3b28702llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Allow non-live-in IV offsets when simplifying latch cond (NFC). (#220734)

simplifyBranchConditionForVFAndUF matches the canonical IV increment
plus an offset, which epilogue vectorization adds to resume the
canonical IV at the vector trip count of the main vector loop. Require
the offset to be defined outside the vector loop region instead of
requiring it to be a live-in; that is what makes it available in the
preheader..

This is NFC today, but prepares for modeling the full epilogue skeleton
in VPlan, which requires adding phi nodes in the preheader before
execute.
DeltaFile
+8-3llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+8-31 files

FreeBSD/ports b7621b9x11/florence pkg-plist distinfo, x11/florence/files extra-patch-freebsd-orb-super

x11/florence: Update to 0.7.2 and adopt

Switch from the stalled SourceForge 0.6.3 distfile to the FrauBSD
continuation on GitHub and take maintainership from ports@.

Drop PORTREVISION, fetch via USE_GITHUB.

Default-on FREEBSD_ORB option replaces the Super key glyph with the
FreeBSD orb (ports-only branding).

Reviewed by:    jrm
Differential Revision:  https://reviews.freebsd.org/D58428
DeltaFile
+27-25x11/florence/Makefile
+23-0x11/florence/files/extra-patch-freebsd-orb-super
+8-8x11/florence/pkg-descr
+3-2x11/florence/distinfo
+1-0x11/florence/pkg-plist
+62-355 files

OpenZFS/src b1fac4btests/unit .gitignore Makefile.am

unit: add nvpair test suite

Exercises add and lookup for all types, iteration, removal, replacement,
merge & copy, pack & unpack with both encodings, formatting and
infallibile wrappers.

Sponsored-by: TrueNAS
Reviewed-by: Chris Longros <chris.longros at gmail.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Rob Norris <rob.norris at truenas.com>
Closes #19006
DeltaFile
+1,829-0tests/unit/test_nvpair.c
+20-1tests/unit/Makefile.am
+1-0tests/unit/.gitignore
+1,850-13 files

OpenZFS/src bf96cd1tests/unit unit.h

unit: add null/notnull helpers

Sponsored-by: TrueNAS
Reviewed-by: Chris Longros <chris.longros at gmail.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Rob Norris <rob.norris at truenas.com>
Closes #19006
DeltaFile
+4-0tests/unit/unit.h
+4-01 files