[ARM] Copy all flags when creating LDM (#197898)
This just adds the Operand instead of trying to handle flags
individually, similar to the AArch64LoadStoreOptimizer.
Fixes #196779
[compiler-rt][builtins] A few fixes cpu_model files (#198957)
- Fix typo in include guard with the word features
- Correct header in cpu_model.h header file and include guard after
the file has been renamed
mention that compression could potentially leak information about session
contents (cf. the CRIME attack on TLS) if a connection allows attacker-
controlled traffic over it alongside trused traffic. This might occur
in some forwarding scenarios.
with deraadt@
[LoongArch] Fix musttail with indirect arguments by forwarding incoming pointers
When a `musttail` call passes arguments indirectly (fp128 on LA32, i128
on LA32), the backend allocates a stack temporary and hands the callee a
pointer. The tail call deallocates the caller's frame, and the pointer
dangles.
Fix by forwarding the incoming indirect pointers instead. They point to
the caller's caller's frame, which stays valid after the tail call.
Forwarded formal parameters reuse the pointer directly; computed values
get stored into the incoming buffer first.
The pointers are saved in virtual registers (`CopyToReg`/`CopyFromReg`)
rather than SDValues. The SelectionDAG is cleared between basic blocks
and musttail calls can appear in non-entry blocks, so storing raw
SDValues across BBs is unsound (this was the bug that led to the revert
in 501417baa60f). The vreg save only fires when the function has
musttail calls; other functions see no codegen change.
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[RISCV] Add TuneJumpIsExpensive (#191374)
We had `setJumpIsExpensive(true)` before 18.x but it was removed
in #74647. This feature allows users to tune the ISel behavior.
We have #80124 and #178394 landed, so it should be more flexible
to tune branches and selects now.
This is an alternative of #191158.
[RISCV][P-ext] Custom-lower SELECT for v4i16/v8i8 on RV32 (#198723)
SELECT was Expand for RV32 64-bit packed types, producing 40-80 lines of
stack-based per-element scalarization. Make it Custom for v4i16/v8i8 and
extend the existing isPExtPackedType branch in lowerSELECT to bitcast to
an integer of matching width: single-GPR types select on XLenVT
directly, while RV32 double-wide types select on i64 which
type-legalizes to two scalar selects on the i32 halves.
v2i32 is left to natural type-legalization since it splits cleanly into
two scalar i32 selects without a Custom hook.
[NFC][ASan] Factor out ASan call insertion behind a single call (#198650)
The ASan pass directly injects function calls into the IR using
getOrInsertFunction() on every call site. Refactor the disparate call
sites behind an AsanFunctionInserter class. This allows us to add pre-
and post-processing logic for all inserted functions at once.
Signed-off-by: Emil Tsalapatis <emil at etsalapatis.com>
