LLVM/project d1b36c6 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/RISCV fold-epilogue-tail.ll

[LV] Don't tail-fold the epilogue with EVL-based tail-folding (#228452)

Epilogue tail-folding isn't supported yet with the `DataWithEVL`
tail-folding style. The epilogue plan is selected by duplicating an
existing VPlan, and some recipes used only by EVL-based tail-folding
don't implement clone() yet, so cloning a plan that contains them hits
llvm_unreachable. This affects targets that prefer `DataWithEVL`, such
as RISC-V.

Until those recipes implement clone(), fall back to a normal epilogue
when the preferred (or forced) tail-folding style is DataWithEVL. This
bail-out is based on the preferred style rather than the style that
would actually be chosen, so it also rejects fixed-width epilogue VFs,
where EVL isn't used. It will be refined once the epilogue's chosen
tail-folding style is known when epilogue TF gets supported.
DeltaFile
+35-0llvm/test/Transforms/LoopVectorize/RISCV/fold-epilogue-tail.ll
+14-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+49-02 files

LLVM/project 9bf16c5 — llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp

remove comment
DeltaFile
+0-2llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+0-21 files

LLVM/project 6c2e89f — llvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlanConstruction.cpp, llvm/test/Transforms/LoopVectorize tail-folding-argmin-reduction.ll

[VPlan] Support tailfolded loops in multi-use-reductions (#214455)

Previously `handleMultiUseReductions()` would bail out for
tailfolded-loops, since the backedge value is no longer the reduction
intrinsic but the predicated select based on the header-mask.

This patch adds pattern matching to handle tailfolded loops accordingly.

I compiled the LLVM testsuite (for RISCV with -march=rv64gcv) and it
only triggers in the corresponding unit-tests in
`SingleSource/UnitTests/Vectorizer/`. I guess that's because there are
still some other limitations when handling more generic multi-use
reduction cases (e.g. differing types in CanonicalIV vs. WideIV).
DeltaFile
+500-0llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
+337-0llvm/test/Transforms/LoopVectorize/tail-folding-argmin-reduction.ll
+113-0llvm/test/Transforms/LoopVectorize/VPlan/tail-folding-multiuse-reductions.ll
+50-15llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+9-5llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+1,009-205 files

LLVM/project 3b5fbbd — llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination loops-header-tested-base.ll induction-condition-in-loop-exit-latch-counted.ll

[ConstraintElim] Bound IVs by compares of the phi in header/latch. (#226297)

Extend addInfoForInductions to add bounds for IVs when the phi is
compared in the header or latch:

In that case, every iteration taking the backedge checked
PN ContinuePred B, which guarantees PN != B for NE and LT predicates.
For an increment by one, PN != B together with StartValue <= B (added
precondition) imply PN <= B.

Alive2 Proofs:
 * icmp ult in header: https://alive2.llvm.org/ce/z/x37Uvm
 * icmp slt in header: https://alive2.llvm.org/ce/z/ibnn5k
 * icmp ne in header: https://alive2.llvm.org/ce/z/wLRfZe

Triggers in a number of additional cases on
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1431.

As-is, this comes with a slight compile-time increase:

    [9 lines not shown]
DeltaFile
+901-0llvm/test/Transforms/ConstraintElimination/induction-phi-compare-header-bound.ll
+43-19llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+5-10llvm/test/Transforms/PhaseOrdering/runtime-check-removal.ll
+4-6llvm/test/Transforms/ConstraintElimination/loops-bottom-tested-base.ll
+4-5llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
+3-5llvm/test/Transforms/ConstraintElimination/loops-header-tested-base.ll
+960-453 files not shown
+963-519 files

LLVM/project 22371ae — llvm/lib/Target/Mips MipsSEISelLowering.h Mips16ISelLowering.h, llvm/test/CodeGen/Mips private.ll

[Mips] Lower calls to private functions the same way as internal functions (#229975)

As with 85b4fbfecb65cd1f5a06e707e7ec0fc2de562407, this seems to be
another case where the backend was treating private functions
differently for no apparent reason.

This was particularly problematic for building the Zig compiler with
LLVM linked statically because we'd have enough such calls that linking
failed with thousands of these errors:

relocation R_MIPS_CALL16 out of range: 76048 is not in [-32768, 32767]
DeltaFile
+11-12llvm/lib/Target/Mips/MipsISelLowering.cpp
+6-7llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+6-7llvm/lib/Target/Mips/Mips16ISelLowering.cpp
+5-6llvm/lib/Target/Mips/MipsSEISelLowering.h
+5-6llvm/lib/Target/Mips/Mips16ISelLowering.h
+2-1llvm/test/CodeGen/Mips/private.ll
+35-391 files not shown
+36-407 files

NetBSD/pkgsrc-wip 5387311 — lightcraft DESCR PLIST, lightcraft/patches patch-crates_engine_src_memory.rs

Add graphcs/lightcraft, apparently a clean room rust implementation
of Adobe Lightroom
DeltaFile
+1,461-0lightcraft/distinfo
+487-0lightcraft/cargo-depends.mk
+95-0lightcraft/Makefile
+21-0lightcraft/patches/patch-crates_engine_src_memory.rs
+19-0lightcraft/PLIST
+8-0lightcraft/DESCR
+2,091-01 files not shown
+2,092-07 files

NetBSD/pkgsrc-wip 9db944c — . Makefile

Add wip/lightcraft and wip/photocraft
DeltaFile
+2-0Makefile
+2-01 files

NetBSD/pkgsrc-wip 0d86c65 — photocraft DESCR PLIST, photocraft/patches patch-crates_ui-egui_src_gpu__canvas.rs

Add graphics/photocraft v.0.3.0, apparently a clean room rust implementation
of Adobe photoshop.
DeltaFile
+1,806-0photocraft/distinfo
+602-0photocraft/cargo-depends.mk
+95-0photocraft/Makefile
+22-0photocraft/patches/patch-crates_ui-egui_src_gpu__canvas.rs
+19-0photocraft/PLIST
+6-0photocraft/DESCR
+2,550-01 files not shown
+2,551-07 files

LLVM/project eab9127 — llvm/include/llvm/CodeGen RegisterPressure.h, llvm/lib/CodeGen RegisterPressure.cpp

RegisterPressure: Detect dead physreg defs from LiveIntervals

This reverts the remainder of #222627, which was partially reverted by
on dead flags. This is a prerequisite to deleting LiveVariables.

When constructing the PressureDiff for an instruction during scheduling
DAG construction, dead defs were only recognized from the dead flag on the
operand. This implicitly relied on preprocessing done by LiveVariables to
fixup inconsistent dead flags with overlapping registers in other operands.
Dead flags have no verifier-enforced rules and are thus unreliable.

Before LiveVariables, consider this example:

  dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
  ; $rax is never used

$rax is never used, but only the $eax def is dead-flagged and the overlapping
implicit-def $rax is not. The shared $eax register units are covered by the
non-dead $rax def and so are counted as live defs. That shared unit is then

    [26 lines not shown]
DeltaFile
+60-0llvm/test/CodeGen/X86/misched-pressure-dead-physreg-superreg.mir
+27-22llvm/lib/CodeGen/RegisterPressure.cpp
+6-6llvm/test/CodeGen/X86/xmulo.ll
+6-6llvm/include/llvm/CodeGen/RegisterPressure.h
+4-5llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.cpp
+4-4llvm/lib/Target/AMDGPU/GCNRegPressure.h
+107-435 files not shown
+120-4911 files

LLVM/project b4badb6 — clang/docs ReleaseNotes.md, clang/test/Driver aarch64-mtune.c

[AArch64] Add support for C2 CPUs (#229055)

Add initial Armv9.3-A support for Arm C2-Pro and C2-Ultra.

C2-Pro leverages the same microarchitecture as C1-Pro and uses a
processor alias. C2-Ultra has its own architectural feature list, tuning
family and host CPU part 0xd96. Its initial features and tuning follow
C1-Ultra, and it reuses the C1-Ultra scheduling model pending a
dedicated model.

For more information see:
https://developer.arm.com/Processors/C2-Ultra
https://developer.arm.com/Processors/C1-Pro

C2-Ultra Technical Reference Manual:
https://developer.arm.com/documentation/109736/latest

C1-Pro Technical Reference Manual (also applies to C2-Pro):
https://developer.arm.com/documentation/107771/latest

Signed-off-by: Alex Dobrescu <alex.dobrescu at arm.com>
DeltaFile
+70-0clang/test/Driver/print-enabled-extensions/aarch64-c2-pro.c
+70-0clang/test/Driver/print-enabled-extensions/aarch64-c2-ultra.c
+31-0llvm/lib/Target/AArch64/AArch64Processors.td
+6-0clang/test/Driver/aarch64-mtune.c
+6-0clang/docs/ReleaseNotes.md
+4-1llvm/unittests/TargetParser/TargetParserTest.cpp
+187-16 files not shown
+200-112 files

LLVM/project 195de69 — mlir/include/mlir/Dialect/Tosa/IR TosaComplianceData.h.inc, mlir/test/Dialect/Tosa tosa-validation-version-1p1-valid.mlir

[mlir][tosa] Fix extra type in GATHER compliance data (#230045)

Signed-off-by: Madeleine Dunn <madeleine.dunn at arm.com>
DeltaFile
+8-0mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
+1-2mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
+9-22 files

FreeBSD/ports d56a501 — devel/py-types-jsonschema/files patch-pyproject.toml

devel/py-types-jsonschema: Fix build

Add the updated patch file forgotten in the previous attempt to
update.

Reported-by:    pkg-fallout
DeltaFile
+3-3devel/py-types-jsonschema/files/patch-pyproject.toml
+3-31 files

FreeBSD/ports 4da8343 — net-im/py-apprise Makefile

net-im/py-apprise: Fix usage of py-cryptography for test

PR:             298656
Fixes:          08c89f90c4ed (Update 1.11.0 => 1.13.1)
Sponsored by:   UNIS Labs
DeltaFile
+1-4net-im/py-apprise/Makefile
+1-41 files

OPNSense/plugins 036b484 — benchmarks/iperf/src/opnsense/mvc/app/controllers/OPNsense/iperf/Api ServiceController.php InstanceController.php, benchmarks/iperf/src/opnsense/mvc/app/views/OPNsense/iperf instance.volt index.volt

benchmarks/iperf: modernize server mode

Replace the legacy Ruby manager and its persistent socket service with a short-lived Python helper invoked through configd. Store transient jobs and JSON results in /tmp, reject duplicate ports, and support removal of running instances.

Move the server UI to an in-memory Instance model and client-style Bootgrid view under /ui/iperf/index/instance. Drop firewall manipulation, service registration, and Ruby dependencies.
DeltaFile
+0-210benchmarks/iperf/src/opnsense/scripts/iperf/ruby_iperf.rb
+166-0benchmarks/iperf/src/opnsense/scripts/iperf/server.py
+0-146benchmarks/iperf/src/opnsense/mvc/app/views/OPNsense/iperf/index.volt
+122-0benchmarks/iperf/src/opnsense/mvc/app/views/OPNsense/iperf/instance.volt
+42-74benchmarks/iperf/src/opnsense/mvc/app/controllers/OPNsense/iperf/Api/InstanceController.php
+0-68benchmarks/iperf/src/opnsense/mvc/app/controllers/OPNsense/iperf/Api/ServiceController.php
+330-49812 files not shown
+432-67418 files

FreeNAS/freenas 49dd029 — src/middlewared/middlewared/api/v27_0_0 auth_two_factor.py user.py, src/middlewared/middlewared/api/v28_0_0 user.py auth_two_factor.py

Move 2FA force option to the current API models

## Problem
The HA synchronization change added a required `force` argument to `auth.twofactor.update`, `user.renew_2fa_secret` and `user.unset_2fa_secret`. That change was intended for 28.0, but it was written before the 27 -> 28 API version bump and its `force` field ended up in the v27 pydantic models while the v28 ones were never updated. Current API is v28, so validation never supplies the default and every call fails with `missing 1 required positional argument: 'force'`, which breaks all the 2FA integration tests.

`auth.twofactor.update` had a further problem: `ConfigService.update` only accepts and forwards `data` to `do_update`, so a second positional `force` could never work. Passing it explicitly (the HA retry with `force: true`) failed with `update() takes 4 positional arguments but 5 were given`, and v27 / v25.10 clients failed the same way because the version adapter appends the defaulted `force` to their params.

## Solution
- **User methods**: moved the `force` argument (defaulting to `False`) from the v27 argument models to the v28 ones, since v27 has already shipped. v27 clients keep working as their calls are adapted to the current models.
- **`auth.twofactor.update`**: `force` is part of the `TwoFactorAuthUpdate` payload (`{"force": true, ...}`) rather than a separate argument. `do_update` pops it before merging the payload into the stored configuration, so it is never persisted. This means the user methods take `force` as an argument while `auth.twofactor.update` takes it inside the payload.
- **Audit**: the `audit_extended` lambdas accept `force`, otherwise a caller passing it explicitly (and every adapted older-API call) would get an audit entry without the username.
DeltaFile
+2-2src/middlewared/middlewared/plugins/account_/2fa.py
+4-0src/middlewared/middlewared/api/v28_0_0/auth_two_factor.py
+2-1src/middlewared/middlewared/plugins/auth_/2fa.py
+0-2src/middlewared/middlewared/api/v27_0_0/user.py
+2-0src/middlewared/middlewared/api/v28_0_0/user.py
+0-1src/middlewared/middlewared/api/v27_0_0/auth_two_factor.py
+10-66 files

LLVM/project 9632d63 — llvm/lib/CodeGen RegisterCoalescer.cpp, llvm/test/CodeGen/X86 rematerialize-sub-super-reg-dead-flags.mir

RegisterCoalescer: Keep remat def dead if it's a copy destination superregister (#230036)

This is a refinement of #226037, which was too strict.

When rematerializing into a physical register that is not exactly the copy's
destination, the def should only stay live if it is a sub-register of the copy
destination, i.e. part of the live value. Checking register unit coverage also
kept the def live when it is a super-register with the same units as the copy
destination, such as $rax for a copy into $eax on x86_64:

  dead $rax = MOV64ri32 -11, implicit-def $eax

Only the $eax part is used, so the $rax def is dead. This matches what
LiveVariables produces for a full def with partial uses.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+5-8llvm/lib/CodeGen/RegisterCoalescer.cpp
+3-2llvm/test/CodeGen/X86/rematerialize-sub-super-reg-dead-flags.mir
+8-102 files

LLVM/project 13a8f9c — mlir/include/mlir/Dialect/Tosa/IR TosaComplianceData.h.inc, mlir/test/Dialect/Tosa profile_pro_int_unsupported.mlir tosa-validation-version-1p1-pro-fp-valid.mlir

[mlir][tosa] Adding integer data layout operation support to PRO-FP (#229777)

This pull request was made to add integer data layout operation support
to PRO-FP. This is to prevent the need to cast between int and fp to do
these operations, which had the possibility of producing errors or
unwanted behaviour. Partially implements:
https://github.com/arm/tosa-specification/pull/91

Co-authored-by: Luke Hutton <luke.hutton at arm.com>
DeltaFile
+62-0mlir/test/Dialect/Tosa/tosa-validation-version-1p1-pro-fp-valid.mlir
+28-7mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
+0-6mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
+90-133 files

FreeBSD/ports 0bc9b71 — graphics/py-kaleido Makefile distinfo

graphics/py-kaleido: Update to 1.5.0

A few minor improvements
Changes: https://github.com/plotly/kaleido/releases

Reported by:    portscout
DeltaFile
+3-3graphics/py-kaleido/distinfo
+1-1graphics/py-kaleido/Makefile
+4-42 files

LLVM/project fa6cf7a — offload/test/offloading error_directive.c, offload/test/offloading/fortran error_directive.f90

[OpenMP][DeviceRTL] Report the source location in __kmpc_error diagnostics (#224298)

Follow-up to #220702. Completes #204240.

The device runtime accepted the `ident_t` argument but ignored it, so
`error at(execution)` in a `target` region printed no source location.
This reports it, replicating the host runtime:
```
OMP: error_directive.f90:14:3: Encountered user-directed warning: warning message.
```

When the ident carries no location the result is `unknown:0:0`, same as
the host. flang populates the ident only with `-g`; clang always does.

Assisted-by: Copilot
DeltaFile
+53-3openmp/device/src/Misc.cpp
+9-3offload/test/offloading/fortran/error_directive.f90
+4-3offload/test/offloading/error_directive.c
+66-93 files

LLVM/project e794ffd — llvm/test/CodeGen/AArch64 bf16_fast_math.ll, llvm/test/CodeGen/AMDGPU legalize-amdgcn.raw.ptr.buffer.load.ll isel-amdgpu-cs-chain-preserve-cc.ll

SelectionDAG: Stop emitting kill flags in InstrEmitter

These is no point to maintaining these before register allocation.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+298-298llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
+203-203llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+174-174llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
+111-111llvm/test/CodeGen/AArch64/bf16_fast_math.ll
+88-88llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
+88-88llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-preserve-cc.ll
+962-962161 files not shown
+2,717-2,778167 files

LLVM/project aa80d64 — llvm/test/TableGen RuntimeLibcallEmitter-library-ref.td RuntimeLibcallEmitter-library-name-merge.td, llvm/utils/TableGen/Basic RuntimeLibcallsEmitter.cpp

RuntimeLibcalls: Pass the default calling convention to libraries

Previously a setAvailableLibFuncs_* function computed DefaultCC locally when a
member calling convention referenced it. To do that, the emitter worked
backwards from a library to the SystemRuntimeLibrary records that reference it,
and had to diagnose the cases where that failed, which would be if there is no
referencing system library or several different ones.

The default calling convention belongs to the target, not to a library. The
dispatcher in setTargetRuntimeLibcallSets already computes it, so pass it to
each library function as a parameter. This removes the reverse lookup and both
diagnostics. DefaultCC references are now valid in a library shared by
SystemRuntimeLibrary records with different defaults, and in a library no
SystemRuntimeLibrary references.

This fixes errors when a LibcallLibrary is unused. This will enable defining
the vector math libraries in the future, as well as decoupling the target
specific handling in #229562.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+12-81llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+36-0llvm/test/TableGen/RuntimeLibcallEmitter-library-unreferenced.td
+6-8llvm/test/TableGen/RuntimeLibcallEmitter-library-default-cc.td
+3-3llvm/test/TableGen/RuntimeLibcallEmitter-library-isolated.td
+2-2llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
+2-2llvm/test/TableGen/RuntimeLibcallEmitter-library-name-merge.td
+61-962 files not shown
+65-1008 files

FreeBSD/src f3b4732 — sys/dev/acpica/Osd OsdSchedule.c

acpi: Tasks: Document why 'acpi_task_count' is accessed unsynchronized

MFC after:      3 days
Sponsored by:   The FreeBSD Foundation

(cherry picked from commit e89c3ac5df58a9eae9d01f325ffc9b34258c4b29)
DeltaFile
+1-0sys/dev/acpica/Osd/OsdSchedule.c
+1-01 files

FreeBSD/src 17498d6 — sys/dev/acpica/Osd OsdSchedule.c

acpi: Tasks: Make OsdSchedule.c whitespace clean

MFC after:      3 days
Sponsored by:   The FreeBSD Foundation

(cherry picked from commit f0825f75bab8ae7cb8e0ba717f76110b6f1862f3)
DeltaFile
+1-1sys/dev/acpica/Osd/OsdSchedule.c
+1-11 files

FreeBSD/src 61685a3 — sys/dev/acpica/Osd OsdSchedule.c

acpi: Tasks: Remove unnecessary includes

MFC after:      3 days
Sponsored by:   The FreeBSD Foundation

(cherry picked from commit 2165accd3748c0acb6e82756d71a46509b220fd8)
DeltaFile
+0-2sys/dev/acpica/Osd/OsdSchedule.c
+0-21 files

FreeBSD/src 35801aa — sys/amd64/amd64 fpu.c pmap.c, sys/amd64/vmm vmm.c

ifuncs: Include <machine/ifunc.h> instead of <x86/ifunc.h>

All architectures have been providing an 'ifunc.h' header with
DEFINE_IFUNC() et alter working both in kernel and userland since commit
cf41d1113377 ("riscv: implement kernel ifunc resolution"), and separate
<i386/ifunc.h> and <amd64/ifunc.h> headers were introduced in commit
2b1db07bec92 ("x86: add machine/ifunc.h"), so stop including
<x86/ifunc.h> directly and use the common <machine/ifunc.h> idiom.

While here, re-order includes in the blocks featuring <x86/ifunc.h>,
which requires fixing <x86/apicvar.h> so that it can be included before
<machine/intr_machdep.h>.

Reviewed by:    kib
MFC after:      3 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60194

(cherry picked from commit a2fbd988638e94b61cc78449e893f2c02d43dec0)
DeltaFile
+6-6sys/amd64/vmm/vmm.c
+5-5sys/amd64/amd64/machdep.c
+4-4sys/amd64/amd64/pmap.c
+2-2sys/x86/x86/cpu_machdep.c
+2-2sys/i386/i386/npx.c
+2-2sys/amd64/amd64/fpu.c
+21-218 files not shown
+31-2814 files

FreeBSD/src cc2e969 — sys/dev/random rdseed.c ivy.c

random: Remove unused include of ifuncs

No functional change (intended).

Reviewed by:    markj, emaste
Fixes:          3a12982962ce ("random: add RDSEED as a provably unique entropy source")
MFC after:      3 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60193

(cherry picked from commit 18ce3f50f630f64d5e9e898a3c06e9ed6e5a63a5)
DeltaFile
+0-1sys/dev/random/rdseed.c
+0-1sys/dev/random/ivy.c
+0-22 files

FreeBSD/src b9a11a3 — sys/conf NOTES

NOTES: Multiple schedulers can be compiled in at once

Mention that ULE is the default scheduler when multiple ones are
compiled in and how the tunable 'kern.sched.name' can be used to select
another one.

While here, regroup SCHED_ULE and SCHED_4BSD, as they control if the
respective scheduler instances are compiled in, putting SCHED_STATS
aside.

Reviewed by:    mchoo
Fixes:          75a66a92c92f ("- Add an option to compile in SCHED_STATS. ...")
Fixes:          1322760fd127 ("sys: enable both SCHED_ULE and SCHED_4BSD for some configs")
MFC after:      3 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60014

(cherry picked from commit 754d2c69f3589cdd0bc4649d9e85ecd59935d9d3)
DeltaFile
+10-7sys/conf/NOTES
+10-71 files

FreeBSD/src 14be203 — sys/arm/include ifunc.h, sys/arm64/include ifunc.h

ifuncs: Have DEFINE_*IFUNC() macros expand the passed name

While here, make each <machine/ifunc.h> header include <sys/types.h> so
that it can be included standalone.

Reviewed by:    kib
MFC after:      3 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60167

(cherry picked from commit ab9fcc5a553a25804b9535190e914e3ba0e746cf)
DeltaFile
+12-7sys/riscv/include/ifunc.h
+11-7sys/x86/include/ifunc.h
+11-7sys/arm/include/ifunc.h
+10-6sys/arm64/include/ifunc.h
+8-6sys/powerpc/include/ifunc.h
+52-335 files

FreeBSD/src 892cd94 — sys/conf NOTES

NOTES: SMP: Move PREEMPTION out of the debugging options section

It has been activated by default for more than 20 years.

Reviewed by:    mchoo, srcmgr (imp)
Fixes:          444ba945136b ("Switch the default scheduler to 4BSD...")
MFC after:      3 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60012

(cherry picked from commit 61ce73643f22f6f8273701eb978faa246bbca27d)
DeltaFile
+5-4sys/conf/NOTES
+5-41 files

FreeBSD/src 65cd5ed — sys/conf NOTES, sys/x86/conf NOTES

NOTES: IPI_PREEMPTION: Fix documentation, applies to all architectures

Move its description into 'sys/conf/NOTES' and update it to match reality.

Reviewed by:    scheduler (mchoo)
MFC after:      3 days
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60013

(cherry picked from commit d972d832f580c307cdfd87d563a382f40877dd10)
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+0-7sys/x86/conf/NOTES
+6-0sys/conf/NOTES
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