LLVM/project 63e0da0clang/include/clang/Lex Preprocessor.h, clang/lib/Frontend InitPreprocessor.cpp

[C++][Modules] Don't insert `#include` before GMF when `-include` used (#212533)

Clang currently emits command-line implicit inputs such as `-imacros`,
`-include-pch`/`-include-pth`, and `-include` as part of the predefines
buffer. This causes them to be processed before the main source file.

For a C++20 module unit with a global module fragment:

```cpp
module;
export module M;
```

a force-included header containing declarations was effectively
processed as:

```cpp
#include "Header.h"
module;

    [23 lines not shown]
DeltaFile
+157-0clang/test/Modules/cxx20-force-include.cpp
+56-18clang/lib/Lex/DependencyDirectivesScanner.cpp
+51-0clang/unittests/Lex/DependencyDirectivesScannerTest.cpp
+49-0clang/lib/Lex/Preprocessor.cpp
+23-12clang/lib/Frontend/InitPreprocessor.cpp
+31-1clang/include/clang/Lex/Preprocessor.h
+367-314 files not shown
+412-4410 files

LLVM/project e1ff57eclang/test/CodeGenCXX module-initializer-elision.cpp

[NFC] Skip a test on target={{.*}}-apple-darwin for TLS using (#218824)

Close https://github.com/llvm/llvm-project/pull/218346
DeltaFile
+2-0clang/test/CodeGenCXX/module-initializer-elision.cpp
+2-01 files

LLVM/project f872635llvm/lib/Target/X86 X86InstrFragments.td X86InstrCompiler.td, llvm/test/CodeGen/X86 pr218583.ll

[X86] Limit the result of XOR8rr_NOREX unused (#218640)

In case it may be zero/sign-extended into an REX/REX2 register.

Fixes: #218583

Assisted-by: Claude Opus 4.8
DeltaFile
+77-0llvm/test/CodeGen/X86/pr218583.ll
+10-3llvm/lib/Target/X86/X86InstrCompiler.td
+5-0llvm/lib/Target/X86/X86InstrFragments.td
+92-33 files

FreeBSD/ports a021825net-im/gomuks Makefile distinfo, net-im/gomuks/files/packagejsons package.json package-lock.json

net-im/gomuks: Update 26.07 => 26.08

Changelog: https://github.com/gomuks/gomuks/releases/tag/v0.2608.0

PR:             297671
Reported by:    Derek Schrock <dereks at lifeofadishwasher.com> (maintainer)
Reviewed by:    meta
DeltaFile
+373-450net-im/gomuks/files/packagejsons/package-lock.json
+7-7net-im/gomuks/distinfo
+3-3net-im/gomuks/files/packagejsons/package.json
+1-2net-im/gomuks/Makefile
+384-4624 files

LLVM/project 6e7406cllvm/test/MC/AsmParser altmacro-arg.s macro-arg.s

[MCParser,test] Improve macro argument charset test (#218828)

'@', '#', and '?' are assembly identifier characters, but they terminate
a macro argument name.
DeltaFile
+9-0llvm/test/MC/AsmParser/macro-arg.s
+2-0llvm/test/MC/AsmParser/altmacro-arg.s
+11-02 files

NetBSD/src ojcBp4hsys/nfs nfs_var.h nfs_export.c

   nfs: New sysctl node vfs.nfsd.maxexportspermount.

   Limits the number of different ways a single mount point can be
   exported.  Default is limited to 256; can be expanded by sysctl up to
   anything that won't overflow kva.

   XXX Should prevent increasing it at securelevel>0.

   PR kern/60645: nfssvc(2): arithmetic overflow in input array sizing
VersionDeltaFile
1.167+53-2sys/nfs/nfs_syscalls.c
1.64+9-2sys/nfs/nfs_export.c
1.98+2-1sys/nfs/nfs_var.h
+64-53 files

NetBSD/src ZDkgjghsys/nfs nfs_syscalls.c

   nfs_syscalls.c: Sort includes.

   No functional change intended.

   Preparation for:

   PR kern/60645: nfssvc(2): arithmetic overflow in input array sizing
VersionDeltaFile
1.166+29-26sys/nfs/nfs_syscalls.c
+29-261 files

LLVM/project b9279f6llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h AMDGPUCoExecSchedStrategy.cpp

[AMDGPU] Correct DS FIFO buffer size semantics

There was some ambiguity in how buffersize 0 and 1 are handled. The
correct semantics are:
- `BufferSize == 0`: unlimited, no FIFO stall
- `BufferSize == 1`: unbuffered, only one instruction in flight
- `BufferSize > 1`: buffered FIFO
DeltaFile
+9-7llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+4-3llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+13-102 files

LLVM/project ec585f6llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h AMDGPUCoExecSchedStrategy.cpp

Handle DS FIFO accounting edge cases

Saturate hardware-unit pressure decrements and treat buffer sizes zero
and one as disabling buffering to avoid underflow and inconsistent stall
costs.
DeltaFile
+4-5llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+2-2llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+6-72 files

LLVM/project 7ce9975llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp AMDGPUCoExecSchedStrategy.h

Address Review comments

Change-Id: I6972e887edd5db44ee9bcaed1f79e0c9933f611e
DeltaFile
+17-3llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+6-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+23-42 files

LLVM/project 6987eb9llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU coexec-scheduler.ll coexec-hazardrec-preRA.mir

[AMDGPU] Use DS latency for FIFO scheduling

Use instruction latency for DS hardware-unit cycle accounting so the FIFO
model can identify a full buffer. Add focused MIR coverage for the resulting
stall cost and scheduling decision, and regenerate the integration checks.

Change-Id: I2f4df2e97d145af4935872dbd43108e1b55077ab
DeltaFile
+48-0llvm/test/CodeGen/AMDGPU/coexec-sched-ds-fifo.mir
+5-5llvm/test/CodeGen/AMDGPU/coexec-hazardrec-preRA.mir
+4-4llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
+4-0llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+61-94 files

LLVM/project 7e85238llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h AMDGPUCoExecSchedStrategy.cpp

Claude Code review

Change-Id: Id4983ca59270c8bb2d261d38a6e7f2483c9d237e
DeltaFile
+18-4llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+1-0llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+19-42 files

LLVM/project 7fc26bbllvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp AMDGPUCoExecSchedStrategy.h

[AMDGPU] Add stalls for DS FIFO buffer

Change-Id: I73e56da97a931349e0655e4e20b24aeb97920647
DeltaFile
+41-6llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+41-5llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+82-112 files

LLVM/project 1604393llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h

Typo

Change-Id: I8b8da8a07be84506483f474d0a5e10ad79178c15
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+1-11 files

LLVM/project 81eb9e0llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp

Merge conflicts

Change-Id: I33564a1e5d14f3b53577cb463ba2cb3a7993fd24
DeltaFile
+4-3llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+4-31 files

FreeBSD/ports 7e27f9dmultimedia/hdrprobe Makefile Makefile.crates

multimedia/hdrprobe: Update to 1.0.1

Changelog:
- https://github.com/matthane/hdrprobe/releases/tag/v1.0.0
- https://github.com/matthane/hdrprobe/releases/tag/v1.0.1

PR:             297691
Reported by:    Michiel van Baak Jansen <michiel at vanbaak.eu> (maintainer)
DeltaFile
+7-11multimedia/hdrprobe/distinfo
+2-4multimedia/hdrprobe/Makefile.crates
+1-1multimedia/hdrprobe/Makefile
+10-163 files

FreeBSD/ports 672433dnet-im/mautrix-whatsapp Makefile distinfo, net-im/mautrix-whatsapp/files config.yaml.sample

net-im/mautrix-whatsapp: Update to 0.2608.0

Changelog: https://github.com/mautrix/whatsapp/blob/v0.2608.0/CHANGELOG.md

- Switched direct chats to use LIDs instead of phone numbers.

Release post: https://mau.fi/blog/2026-08-mautrix-release/

PR:             297594
Reported by:    Julian Weigt <juw at posteo.de> (maintainer)
DeltaFile
+27-11net-im/mautrix-whatsapp/files/config.yaml.sample
+5-5net-im/mautrix-whatsapp/distinfo
+1-2net-im/mautrix-whatsapp/Makefile
+33-183 files

FreeBSD/ports 47495c4mail/py-resend Makefile distinfo

mail/py-resend: Update to 2.40.2

Changelog: https://github.com/resend/resend-python/releases/tag/v2.40.2

Reported by:    Repology
DeltaFile
+3-3mail/py-resend/distinfo
+1-1mail/py-resend/Makefile
+4-42 files

LLVM/project 5a4214aclang/docs/ScalableStaticAnalysis/user-docs SourceEditGeneration.md, clang/include/clang/Frontend SSAFOptions.h

[SSAF][SourceTransform] Add '--ssaf-link-unit-id=' for specifying link unit identifiers

The source-transformation pass takes WPA results as input, where
entities are named under link-unit and compilation-unit namespaces.
To associate ASTNodes with entities, the source-transformation pass
needs to know both link-unit and compilation-unit IDs. Such information
is provided by the caller.

rdar://185818153
DeltaFile
+8-6clang/test/Analysis/Scalable/source-edit-generation/cli-errors.cpp
+8-3clang/docs/ScalableStaticAnalysis/user-docs/SourceEditGeneration.md
+9-0clang/include/clang/Options/Options.td
+6-0clang/lib/ScalableStaticAnalysis/Frontend/SourceTransformationFrontendAction.cpp
+4-0clang/include/clang/Frontend/SSAFOptions.h
+2-1clang/test/Analysis/Scalable/source-edit-generation/downgradable-errors.cpp
+37-106 files not shown
+46-1112 files

NetBSD/pkgsrc a3p4VOzwww/firefox-l10n Makefile

   firefox-l10n: all language packs have been MPL 2.0 for a while
VersionDeltaFile
1.317+2-2www/firefox-l10n/Makefile
+2-21 files

NetBSD/src jPPpIyNdoc 3RDPARTY

   3RDPARTY: new OpenSSLs out
VersionDeltaFile
1.2240+2-2doc/3RDPARTY
+2-21 files

FreeBSD/ports 32ac18bmisc/crush Makefile distinfo

misc/crush: Update to 0.91.1

Changelog: https://github.com/charmbracelet/crush/releases/tag/v0.91.1

Reported by:    GitHub (watch releases)
DeltaFile
+5-5misc/crush/distinfo
+1-1misc/crush/Makefile
+6-62 files

FreeBSD/doc 03688f0website/content/en/releases/14.4R errata.adoc, website/content/en/releases/15.0R errata.adoc

Add errata affecting 14.4R, 15.0R and 15.1R

FreeBSD-EN-26:20.microcode affects all supported releases
FreeBSD-EN-26:21.openssl affects 14.4R
DeltaFile
+2-0website/content/en/releases/14.4R/errata.adoc
+1-0website/content/en/releases/15.1R/errata.adoc
+1-0website/content/en/releases/15.0R/errata.adoc
+4-03 files

FreeBSD/doc 3925b5cwebsite/content/en/releases/14.4R errata.adoc, website/content/en/releases/15.0R errata.adoc

Add security advisories affecting 14.4R, 15.0R and 15.1R

FreeBSD-SA-26:56.hwpmc affects all supported releases
FreeBSD-SA-26:57.unix affects 15.0R and 15.1R
FreeBSD-SA-26:58.sound affects all supported releases
FreeBSD-SA-26:59.mac_do affects 15.0R and 15.1R
FreeBSD-SA-26:60.ppp affects all supported releases
FreeBSD-SA-26:61.openssl affects all supported releases
FreeBSD-SA-26:62.tty affects all supported releases
FreeBSD-SA-26:63.posixshm affects all supported releases
DeltaFile
+8-0website/content/en/releases/15.1R/errata.adoc
+8-0website/content/en/releases/15.0R/errata.adoc
+6-0website/content/en/releases/14.4R/errata.adoc
+22-03 files

LLVM/project 03fa14allvm/include/llvm/MC MCInstrDesc.h, llvm/include/llvm/Target Target.td

[RISCV][GlobalISel] Legalize and select G_PREFETCH (#215466)

GlobalISel aborted on `llvm.prefetch` ("unable to legalize
`G_PREFETCH`") while SDAG lowers it to `prefetch.r/w/i`. Add a legalizer
rule marking `G_PREFETCH` legal for p0 addresses, and a custom selector
since the SDAG patterns use the `AddrRegImmLsb00000` complex pattern
that the GISel pattern importer does not auto-translate. The selector
picks `prefetch.r/w/i` from the rw/cache-type immediates and folds a
`simm12_lsb00000` offset when present, matching SDAG.
DeltaFile
+556-0llvm/test/CodeGen/RISCV/GlobalISel/prefetch.ll
+192-5llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+3-3llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
+4-2llvm/include/llvm/Target/Target.td
+4-2llvm/include/llvm/MC/MCInstrDesc.h
+3-0llvm/lib/Target/RISCV/RISCVInstrInfoZicbo.td
+762-123 files not shown
+766-149 files

LLVM/project 57fc5aellvm/lib/Target/RISCV/GISel RISCVLegalizerInfo.h RISCVLegalizerInfo.cpp, llvm/test/CodeGen/RISCV/GlobalISel legalizer-info-validation.mir readsteadycounter.ll

[RISCV][GlobalISel] Legalize readcyclecounter/readsteadycounter (#217535)

Add a legalizer rule for G_READCYCLECOUNTER/G_READSTEADYCOUNTER. On RV64
they are legal and select via the existing tablegen Pats
(rdcycle/rdtime). On RV32 lower them to the ReadCounterWide target
pseudo, which FinalizeISel expands into the re-read-the-high-half loop
(emitReadCounterWidePseudo) — the same expansion SelectionDAG uses.
DeltaFile
+107-0llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+24-0llvm/test/CodeGen/RISCV/GlobalISel/readsteadycounter.ll
+24-0llvm/test/CodeGen/RISCV/GlobalISel/readcyclecounter.ll
+5-4llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
+2-0llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
+162-45 files

LLVM/project 8ebb4a0clang/lib/StaticAnalyzer/Checkers/WebKit RawPtrRefLambdaCapturesChecker.cpp, clang/test/Analysis/Checkers/WebKit unchecked-lambda-captures.cpp

[alpha.webkit.UncheckedLambdaCapturesChecker] Allow protectedThis of RefPtr (#218723)

Fix a bug that lambda capture checkers were checking for the exact match
for "protectedThis" as opposed to any protective smart pointer.
DeltaFile
+8-0clang/test/Analysis/Checkers/WebKit/unchecked-lambda-captures.cpp
+2-2clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
+10-22 files

LLVM/project 77d2b37llvm/lib/Frontend/OpenMP OMPDescriptors.inc, llvm/test/CodeGen/AArch64 vector-ldst-offset.ll vector-ldst-align.ll

Rebase

Created using spr 1.3.7
DeltaFile
+9,921-0llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+8,227-0llvm/test/CodeGen/AArch64/vector-ldst-align.ll
+3,448-2llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
+2,421-285llvm/test/tools/llvm-mca/AArch64/Cortex/A57-forwarding.s
+2,386-0llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
+1,217-1,125llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+27,620-1,4121,699 files not shown
+98,366-40,9541,705 files

HardenedBSD/src a8aca62. README.md

HBSD: Document rejection of AI/LLM/etc generated works

HardenedBSD is disinterested in navigating potential copyright issues.

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
DeltaFile
+5-0README.md
+5-01 files

LLVM/project 6c81b99llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp

[RISCV][P-ext] Custom lower v8i8 mulh* on RV64. NFC (#218160)

Assisted-by: Claude
DeltaFile
+44-2llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+28-13llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+72-152 files