NAS-140484 / 27.0.0-BETA.1 / Improve RBAC docs (#18594)
Address feedback from other teams:
* Improve phrasing for the individual vs compound roles
* Add table with list of current roles
NAS-140441 / 26.0.0-BETA.2 / fix containers default network (by yocalebo) (#18598)
The auto-managed container bridge (truenasbr0) had two bugs preventing
containers from getting network access.
Bug 1: Wrong IP address assigned to bridge
_bridge_impl() in bridge.py assigned the network address (.0) to the
bridge instead of the first host address (.1):
Before (bug): assigns 172.200.0.0 to bridge
add_address(sock, ip4.ip.exploded, ...)
After (fix): assigns 172.200.0.1 to bridge
add_address(sock, ip4.network[1].exploded, ...)
The bridge got 172.200.0.0/24 but dnsmasq was told
--listen-address=172.200.0.1. Since ip_nonlocal_bind=1 is enabled
system-wide, dnsmasq could bind to the non-existent .1 address via
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NAS-140441 / 26.0.0-BETA.1 / fix containers default network (by yocalebo) (#18597)
The auto-managed container bridge (truenasbr0) had two bugs preventing
containers from getting network access.
Bug 1: Wrong IP address assigned to bridge
_bridge_impl() in bridge.py assigned the network address (.0) to the
bridge instead of the first host address (.1):
Before (bug): assigns 172.200.0.0 to bridge
add_address(sock, ip4.ip.exploded, ...)
After (fix): assigns 172.200.0.1 to bridge
add_address(sock, ip4.network[1].exploded, ...)
The bridge got 172.200.0.0/24 but dnsmasq was told
--listen-address=172.200.0.1. Since ip_nonlocal_bind=1 is enabled
system-wide, dnsmasq could bind to the non-existent .1 address via
[30 lines not shown]
NAS-140441 / 27.0.0-BETA.1 / fix containers default network (#18596)
The auto-managed container bridge (truenasbr0) had two bugs preventing
containers from getting network access.
Bug 1: Wrong IP address assigned to bridge
_bridge_impl() in bridge.py assigned the network address (.0) to the
bridge instead of the first host address (.1):
Before (bug): assigns 172.200.0.0 to bridge
add_address(sock, ip4.ip.exploded, ...)
After (fix): assigns 172.200.0.1 to bridge
add_address(sock, ip4.network[1].exploded, ...)
The bridge got 172.200.0.0/24 but dnsmasq was told
--listen-address=172.200.0.1. Since ip_nonlocal_bind=1 is enabled
system-wide, dnsmasq could bind to the non-existent .1 address via
[26 lines not shown]
[mlir][docs] dialect interfaces and mlir reduce documentation fix (#189258)
Two modifications:
1. Reflect newly added dialect interface methods in the documentation
2. Remove the bug in the `MLIR Reduce` documentation
Revert "[VPlan] Extract reverse mask from reverse accesses" (#189637)
Reverts llvm/llvm-project#155579
Assertion added triggers on some buildbots
clang:
/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/llvm/llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp:3840:
virtual InstructionCost
llvm::VPWidenMemoryRecipe::computeCost(ElementCount, VPCostContext &)
const: Assertion `!IsReverse() && "Inconsecutive memory access should
not have reverse order"' failed.
PLEASE submit a bug report to
https://github.com/llvm/llvm-project/issues/ and include the crash
backtrace, preprocessed source, and associated run script.
Stack dump:
0. Program arguments:
/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/stage1.install/bin/clang
-DNDEBUG -mcpu=neoverse-v2 -mllvm -scalable-vectorization=preferred -O3
-std=gnu17 -fcommon -Wno-error=incompatible-pointer-types -MD -MT
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[mlir][SPIR-V] Support spirv.loop_control attribute on scf.for and scf.while (#189392)
Propagate the `spirv.loop_control` attribute from `scf.for` and
`scf.while` operations to the generated `spirv.mlir.loop` during
SCFToSPIRV conversion
[CIR] Implement member-pointer members lowering/CXX ABI lowering (#187327)
Record types with a member pointer as a member require quite a bit of
work to get to function properly. First, we have to wire them through
the AST->CIR lowering to make sure we properly represent them, and
represent them when they're zero initializable. We also have to properly
initialize elements when we're NOT zero initializable.
More importantly, we have to implement the CXXABILowering of record
types. Before this patch, we just assumed that all RecordTypes were
legal, since we didn't have the above lowering. A vast majority of this
patch is around getting RecordTypes to lower properly. There isn't
really a good way to test this without the FE changes, so it wasn't
split off.
We accomplish this in 2 phases: First, we transform each individual
record type along the way, giving it a new cxx-abi specific name. We
have to ensure that recursive evaluation works correctly, so we pulled
the solution from the LLVM-IR dialect for that. Secondly, we rename all
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[AArch64][llvm] Fix encoding for `stshh` instruction (#189588)
The encoding for `stshh` was incorrect, and has been fixed. This
has been checked against the Arm ARM.
