LLVM/project cde22d7 — clang/include/clang/Basic BuiltinsAMDGPU.td, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

by Aaditya on ⎇
[AMDGPU] Add builtins for wave reduction intrinsics
DeltaFile
+84-0clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+8-0clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+4-0clang/include/clang/Basic/BuiltinsAMDGPU.td
+96-03 files

LLVM/project de56a2b — llvm/docs AMDGPUUsage.rst

by Aaditya on ⎇
[AMDGPU] Update documentation for wave reduction intrinsics
DeltaFile
+70-4llvm/docs/AMDGPUUsage.rst
+70-41 files

LLVM/project 17e7357 — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Refactor code and add some comments
DeltaFile
+8-6llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+8-61 files

LLVM/project 0d4a35d — llvm/test/CodeGen/AArch64 f16-convert.ll, llvm/test/CodeGen/Mips/msa f16-llvm-ir.ll

by Matt Arsenault via GitHub on ⎇
IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

These are long overdue for removal. These were originally a hack
to support loading half values before there was any / decent support
for the half type through the backend. There's no reason to continue
supporting these, they're equivalent to fpext/fptrunc with a bitcast.

SelectionDAG stopped translating these directly, and used the
bitcast + fp cast since f7a02c17628e825, so there's been no reason
to use these since 2014.
DeltaFile
+203-298llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
+29-319llvm/test/CodeGen/PowerPC/half.ll
+0-256llvm/test/CodeGen/AArch64/f16-convert.ll
+0-171llvm/test/CodeGen/X86/cvt16.ll
+0-171llvm/test/CodeGen/X86/cvt16-2.ll
+12-155llvm/test/CodeGen/VE/Scalar/fp_extload_truncstore.ll
+244-1,37024 files not shown
+562-2,34430 files

LLVM/project 6dcf425 — mlir/include/mlir/Dialect/Tosa/IR TosaShapeOps.td, mlir/lib/Dialect/Tosa/Transforms TosaValidation.cpp

by Iliyan Georgiev via GitHub on ⎇
[mlir][tosa] Add support for assert equal shape op (#176900)

Adds support for assert_equal_shape operation after spec change:
https://github.com/arm/tosa-specification/commit/575a50016de50d227eb517775eb4e7b137421fa1

This includes:
- Operator definition
- Tests


Change-Id: I6652bbcbd5e3716f140681b9d73ef8940564d7d3

Signed-off-by: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
DeltaFile
+19-1mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
+6-4mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
+10-0mlir/test/Dialect/Tosa/level_check.mlir
+9-0mlir/test/Dialect/Tosa/ops.mlir
+8-0mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
+8-0mlir/test/Dialect/Tosa/verifier.mlir
+60-51 files not shown
+61-57 files

LLVM/project 9c8b4de — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Use `WAVE_REDUCE_FSUB_PSEUDO_F64` in switch statements
DeltaFile
+18-14llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+18-141 files

LLVM/project 779d9e5 — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Use `e32` encoding as placeholder
DeltaFile
+10-10llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+10-101 files

LLVM/project 80a87bc — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Use enum values for source modifiers
DeltaFile
+3-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+3-31 files

LLVM/project b063f1b — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Use pseudo opcode for switch statements
DeltaFile
+10-10llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+10-101 files

LLVM/project e546090 — llvm/lib/Target/AMDGPU SIISelLowering.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fadd.ll llvm.amdgcn.reduce.fsub.ll

by Aaditya on ⎇
[AMDGPU] Add wave reduce intrinsics for double types - 2

Supported Ops: `add`, `sub`
DeltaFile
+1,115-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+1,102-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+80-19llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-0llvm/lib/Target/AMDGPU/SIInstructions.td
+2,299-194 files

LLVM/project b8ec2e0 — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Use enum values for src modifiers.
DeltaFile
+8-8llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+8-81 files

LLVM/project e78bde2 — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Aaditya on ⎇
Update generation check
DeltaFile
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-11 files

LLVM/project 9d7317f — llvm/lib/Transforms/InstCombine InstCombineLoadStoreAlloca.cpp, llvm/test/Transforms/InstCombine load-addrspacecast-select.ll

by Theodoros Theodoridis via GitHub on ⎇
[InstCombine] fold addrcast+load through selects (#176352)

Add support for:
    
    load(addrspacecast(select(Cond, &V1, &V2))) =>
    select(Cond, load(addrspacecast(&V1)), load(addrspacecast(&V2)))
    
Note: alive does not support addrspacecasts and thus proofs are omitted.
DeltaFile
+154-0llvm/test/Transforms/InstCombine/load-addrspacecast-select.ll
+23-7llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+177-72 files

LLVM/project 370529c — clang/lib/AST ExprConstant.cpp, clang/lib/CodeGen CGBuiltin.cpp

by NagaChaitanya Vellanki via GitHub on ⎇
[clang] Implement __builtin_stdc_rotate_left, __builtin_stdc_rotate_right (#160259)

This patch adds type-generic rotate builtins that accept any unsigned
integer
type. These builtins provide:

- Support for all unsigned integer types, including _BitInt
- Constexpr evaluation capability
- Automatic normalization of rotation counts modulo the bit-width
- Proper handling of negative rotation counts (converted to equivalent
  positive rotations in the opposite direction)
- Implicit conversion support for both arguments for
  types with conversion operators. 

The builtins follow C23 naming conventions.

Resolves https://github.com/llvm/llvm-project/issues/122819
DeltaFile
+239-1clang/test/CodeGen/builtin-rotate.c
+201-0clang/test/SemaCXX/constexpr-builtin-stdc-rotate.cpp
+132-0clang/test/Sema/builtin-stdc-rotate.c
+105-0clang/lib/Sema/SemaChecking.cpp
+69-17clang/lib/AST/ExprConstant.cpp
+49-2clang/lib/CodeGen/CGBuiltin.cpp
+795-205 files not shown
+881-3111 files

LLVM/project c3da5d7 — flang/include/flang/Optimizer/OpenACC/Support FIROpenACCUtils.h, flang/lib/Lower OpenACC.cpp

by jeanPerier via GitHub on ⎇
[flang][acc][NFC] move recipe generation in FIROpenACCUtils (#176924)

Move the code that generates private, firstprivate, and reduction from
Lower/OpenACC.cpp to Optimizer/OpenACC/Support/FIROpenACCUtils.cpp so
that it can be used in passes too.
DeltaFile
+13-396flang/lib/Lower/OpenACC.cpp
+383-13flang/lib/Optimizer/OpenACC/Support/FIROpenACCUtils.cpp
+37-0flang/include/flang/Optimizer/OpenACC/Support/FIROpenACCUtils.h
+433-4093 files

NetBSD/pkgsrc 0ToCq3z — graphics/png distinfo options.mk

by tnn on ⎇
   png: reference apng commit id instead of the tip. NFC
VersionDeltaFile
1.165+4-4graphics/png/distinfo
1.4+3-3graphics/png/options.mk
+7-72 files

NetBSD/pkgsrc nnc1mjB — graphics/png distinfo options.mk

by tnn on ⎇
   png: update apng patch for current release
VersionDeltaFile
1.164+4-4graphics/png/distinfo
1.3+3-3graphics/png/options.mk
+7-72 files

LLVM/project 242ca4e — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 aarch64-dup-ext-crash.ll

by David Green via GitHub on ⎇
[AArch64] Protect against unexpected SIGN_EXTEND_INREG in performBuildShuffleExtendCombine (#176733)

Apparently this code is only expecting shuffle of SIGN_EXTEND or
ZERO_EXTEND, but can sometimes see a SIGN_EXTEND_INREG of the second
vector operand. Add a check that the second operand has the same
constraints as the first.

Fixes #176314
DeltaFile
+20-0llvm/test/CodeGen/AArch64/aarch64-dup-ext-crash.ll
+4-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+24-02 files

LLVM/project 6a02703 — llvm/lib/Transforms/Coroutines CoroFrame.cpp, llvm/test/Transforms/Coroutines swift-async-dbg.ll declare-value.ll

by Felipe de Azevedo Piovezan via GitHub on ⎇
[CoroFrame] Save frame ptr in entry funclets (#176766)

The logic deciding whether to save the frame pointer using an Alloca was
flawed: it must be the opposite of deciding whether to use EntryValue,
since those are the only methods allowing debuggers to find the frame
pointer (and therefore variables) reliably. This commit fixes the logic.
DeltaFile
+11-7llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+6-4llvm/test/Transforms/Coroutines/swift-async-dbg.ll
+5-1llvm/test/Transforms/Coroutines/declare-value.ll
+22-123 files

LLVM/project fa98edd — clang-tools-extra/clang-tidy ClangTidy.cpp GlobList.h, clang-tools-extra/clang-tidy/bugprone StringIntegerAssignmentCheck.cpp NotNullTerminatedResultCheck.cpp

by Baranov Victor via GitHub on ⎇
[clang-tidy][NFC] Enable RemoveSemicolon in clang-format config (#176926)

Welcome everyone to YAFI (yet another format improvements) in 2026:)
Starting from `clang-format-16` we have quite useful option
`RemoveSemicolon`.
DeltaFile
+3-3clang-tools-extra/clang-tidy/bugprone/StringIntegerAssignmentCheck.cpp
+1-1clang-tools-extra/clang-tidy/bugprone/NotNullTerminatedResultCheck.cpp
+1-1clang-tools-extra/clang-tidy/ClangTidy.cpp
+1-1clang-tools-extra/clang-tidy/GlobList.h
+1-1clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
+1-0clang-tools-extra/clang-tidy/.clang-format
+8-76 files

LLVM/project b9760dc — llvm/include/llvm/IR IRBuilder.h

by Nikita Popov on ⎇
[IRBuilder] Remove deprecated CreateGlobalStringPtr() method

It has been deprecated in favor of CreateGlobalString() in LLVM 20.
DeltaFile
+0-17llvm/include/llvm/IR/IRBuilder.h
+0-171 files

OPNSense/core 4ed8e21 — . plist, src/etc/pkg/fingerprints/OPNsense/revoked pkg.opnsense.org.20241217

by Franco Fichtner on ⎇
firmware: add 26.1 fingerprint and revoke 25.1

(cherry picked from commit d50fa904387f3058f799d6c8757036f4c7a2ca49)
DeltaFile
+2-1plist
+2-0src/etc/pkg/fingerprints/OPNsense/trusted/pkg.opnsense.org.20260120
+2-0src/etc/pkg/fingerprints/OPNsense/revoked/pkg.opnsense.org.20241217
+0-2src/etc/pkg/fingerprints/OPNsense/trusted/pkg.opnsense.org.20241217
+6-34 files

OPNSense/core 6c57f85 — src/opnsense/service/templates/OPNsense/Dnsmasq dnsmasq.conf

by Monviech via Franco Fichtner on ⎇
dnsmasq: Fix log conditions and some whitespace cleanup (#9632)

(cherry picked from commit 664c80e7cab26725872c5b6f3ce2a2b6c0f566e5)
DeltaFile
+6-6src/opnsense/service/templates/OPNsense/Dnsmasq/dnsmasq.conf
+6-61 files

OPNSense/core 5168028 — Mk version.mk

by Franco Fichtner on ⎇
make: switch ABI
DeltaFile
+1-1Mk/version.mk
+1-11 files

OPNSense/core 3668d87 — src/opnsense/service/templates/OPNsense/Dnsmasq dnsmasq.conf

by Monviech via Franco Fichtner on ⎇
dnsmasq: Fix log conditions and some whitespace cleanup (#9632)

(cherry picked from commit 664c80e7cab26725872c5b6f3ce2a2b6c0f566e5)
DeltaFile
+6-6src/opnsense/service/templates/OPNsense/Dnsmasq/dnsmasq.conf
+6-61 files

LLVM/project e9b9e6c — llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp

by Matt Arsenault on ⎇
InstCombine: Use SimplifyDemandedFPClass epilog helper function for fma

NFC refactor to use shared code for fold to constant or set fast math
flags.
DeltaFile
+2-14llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+2-141 files

LLVM/project c50d75a — llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass-fma.ll

by Matt Arsenault on ⎇
propagate flags into fma queries
DeltaFile
+41-0llvm/test/Transforms/Attributor/nofpclass-fma.ll
+15-0llvm/lib/Analysis/ValueTracking.cpp
+56-02 files

LLVM/project 4d3dbfe — llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-sqrt.ll

by Matt Arsenault on ⎇
InstCombine: Infer fast math flags for sqrt
DeltaFile
+60-5llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-sqrt.ll
+36-4llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+96-92 files

LLVM/project 3158e3c — llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fma.ll

by Matt Arsenault on ⎇
InstCombine: Implement SimplifyDemandedFPClass for fma

This can't do much filtering on the sources, except for nans.
We can also attempt to introduce ninf/nnan.
DeltaFile
+82-31llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+16-31llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
+98-622 files

LLVM/project 9d5cb9f — llvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-fma.ll

by Matt Arsenault on ⎇
fix too conservative
DeltaFile
+1-3llvm/lib/Support/KnownFPClass.cpp
+2-2llvm/test/Transforms/Attributor/nofpclass-fma.ll
+3-52 files