[CIR] Correct the behavior of 'shouldEmitFunction' with always/noinline (#224378)
These attributes modified the linkage of functions in certain cases that
caused us to, ironically, skip emitting something when we picked it up
via PCH during self-build. This patch just copies/pastes the code from
classic codegen.
[SROA] Enable alloca promotion for stores through pointer PHIs (#222893)
A store to an alloca through a phi-node prevents promotion of that
alloca in mem2reg. Mem2reg requires all users of the alloca to be
loads/stores. Fixes https://github.com/llvm/llvm-project/issues/202670.
The following is a motivating example:
```llvm
define i32 @store_to_phi(i1 %cond, i32 %value) {
entry:
%a = alloca i32, align 4
%b = alloca i32, align 4
store i32 0, ptr %a, align 4
store i32 0, ptr %b, align 4
br i1 %cond, label %left, label %right
left:
br label %merge
[122 lines not shown]
WebAssembly: Move target EH passes into backend
Currently the wasm-specific EH lowering passes are added in the
generic pass configs, driven by the TargetOptions ExceptionModel.
As preparation for driving this process off the IR flag, move these
pass runs into the target. There should be no change in the relative
pass ordering.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[clang][OpenMP] ORDERED clause is allowed on FOR in 4.5+ (#225106)
Several compound directives containing FOR were missing the ORDERED
clause in the set of allowed (once) clauses.
[X86] Don't drop a redundant 32-bit `and` whose users were selected as def32 (#223750)
Fixes #222714
Nothing was wrong with the IR or the DAG combines here; the `and %idx,
1` survived all the way into instruction selection. Isel selects users
before operands, so the `zext` of the (narrowed, i32) `and` had already
been turned into a `SUBREG_TO_REG` through the `def32` pattern, which
assumes the i32 producer zeroes the upper 32 bits. When isel then
reached the `and`, `shrinkAndImmediate` noticed via known bits that the
mask was redundant and replaced the `and` with its operand — a
`truncate` of a 64-bit `cmov`. That truncate is just a subregister copy,
so the already-emitted `SUBREG_TO_REG` ended up reading the whole 64-bit
register, and the upper bits went straight into the scaled address. The
`_BitInt(98)` is a red herring; the same thing happens with plain `i64`.
The `def32` predicate now lives in `X86DAGToDAGISel::isDef32` (the
PatLeaf calls it), and `shrinkAndImmediate` only drops a 32-bit `and`
when its operand satisfies that predicate. Otherwise it returns false
and the `and` is selected as a normal 32-bit instruction, which zeroes
the upper half as the users expect.
net/freeipa-client: Respect PREFIX and LOCALBASE
The patches hardcoded /usr/local in 153 places. They now carry
%%PREFIX%% for the files this port installs itself and %%LOCALBASE%%
for the ones it only reads, substituted in post-patch.
client/ipa-join.c defined IPA_CONFIG as /etc/ipa/default.conf, so
ipa-client-install --uninstall could not read the configuration and
left the host enrolled on the server. Enrolling it again then failed
with "Host already enrolled", even with --force-join.
PR: 298186
Approved by: kiwi (maintainer timeout)
Sponsored by: Netzkommune GmbH
amd64/*sigtramp.S: re-enable some cfi annotations for special registers
Also explicitly specify .cfi_sections to emit the cfi bytecode into the
loadable .eh_frame section.
Reviewed by: mchoo
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D59838
amd64/*sigtramp.S: re-enable some cfi annotations for special registers
Also explicitly specify .cfi_sections to emit the cfi bytecode into the
loadable .eh_frame section.
Reviewed by: mchoo
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D59838
[AMDGPU][MC] Upstream gfx11/gfx12 true16 assembler test coverage
Upstream new assembler test cases, covering true16 .l/.h operands and op_sel
handling that had no upstream coverage.
[AMDGPU][MC] Upstream gfx12 true16 disassembler test coverage (#223825)
Upstream new gfx12 disassembler test cases, covering true16 operand
(.l/.h)
and op_sel decoding for f16 opcodes that had no upstream coverage:
[lldb] Bounds check minidump location descriptors (#223911)
MinidumpParser::GetModuleUUID sliced the file with the RVA and DataSize
taken straight from a module's CvRecord. ArrayRef::slice asserts, but a
build without assertions still reads out of bounds.
Route both through MinidumpFile::getRawData, which range checks in 64
bits, and log the error rather than returning a slice that looks valid.
rdar://186889966
rdar://186890172
[flang-rt][unittests] Define MAP_ANONYMOUS fallback for AIX in Assign tests (#224675)
We ran into
```
flang-rt/unittests/Runtime/Assign.cpp:497:21: error: use of undeclared identifier 'MAP_ANONYMOUS'
497 | MAP_PRIVATE | MAP_ANONYMOUS, -1, 0)};
```
On AIX, `flang-rt` is built with `_XOPEN_SOURCE=700` and without `_ALL_SOURCE`, which prevents `<sys/mman.h> `from exposing `MAP_ANONYMOUS` / `MAP_ANON`. Provide a fallback definition so mmap unit tests introduced in PR #222101 compile successfully on AIX.
[DebugInfo] Fix 32-bit overflow in AppleAcceleratorTable::equal_range (#224866)
Computing the end offset overflowed 32 bits before widening to 64 bits.
Because SameNameIterator stops on exact equality, a wrapped offset
caused an infinite loop.
Compute the product in 64 bits and return an empty range if the end
offset exceeds the section size.
rdar://186839483
hash: rename pkghash "hash" because it is now shared with other projects
While here use word-at-a-time hash, which from my benchmarks performs
the same as mum hash on the kind of dataset we have in pkg, while being
way smaller in its implementation
While here plug potential memory leak in the "rejected" hash_safe_add.
