Add middleware support for LIO ALUA HA
Wire up the middleware side of LIO ALUA high-availability: load
lio_ha.ko with per-node addresses on service start, manage the
4-row ALUA state table (MASTER/BACKUP × synced/not-synced) across
failover events, clean up STANDBY configfs on pool export, and
add pre-flight validation that targets have static initiator ACLs
before ALUA can be enabled.
[Support] Introduce a function to reset all debug counters (#194864)
This PR adds a function to reset all debug counters, and extends the
unit test to verify that the debug counters are reset as expected. This
is required for running tools repeatedly in the same process.
[WinEH] Fix crash when deleting C++ objects inside SEH __try (#180144)
Introduce a dedicated cleanup flag for SEH __finally blocks and use it
to separate SEH try cleanup emission from C++ object cleanup emission
This prevents __finally cleanups from emitting seh.scope.begin/end and
keeps destructor/delete cleanups paired with seh.scope markers
Fix #109576
[cmake] Fix find libxml2 for Windows static libraries (#194894)
* Add the usual Windows static library name "libxml2s"
* Windows build with static libxml2 requires compiler define
Revert "[LoopVectorize] Add metadata to distinguish vectorized loop body from scalar remainder (#190258)" (#194901)
Reverts llvm/llvm-project#190258
This commit is causing crashes on the `intel-sycl-gpu` buildbot:
https://lab.llvm.org/buildbot/#/builders/225/builds/7157
The crash is a SEGFAULT in
`LoopVectorizationPlanner::updateLoopMetadataAndProfileInfo` when
optimization remarks are enabled
(`-pass-remarks-analysis=loop-vectorize`). Reverting while investigating
the root cause.
Update to match recent cryptodev update
<opencrypto/cryptodev.h> recently changed a bunch of fields from
signed to unsigned. To avoid gcc stupidly complaining about
comparisons of different signedness ints (I mean, how can
for (i = 0; i < unsigned_thing; i++)
ever see i become negative?) change i from int to unsigned int.
Should fix the i386 build.
[VPlan] Expand DerivedIV into executable recipes (#187589)
This allows us to strip DerivedIVRecipe::execute, and remove the
dependency on emitTransformedIndex. It allows us to benefit from
existing simplifications in VPlan.
inpcb: allow to specify different sizes for port and load balance hashes
Understand zero size as instruction to not allocate the hash. Do not
allocate both hashes for rawip(4). There are no functional changes to TCP
or UDP.
Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D56705
[RISCV] Fix crashes and add RV32 RUN line to rvp-simd-64.ll (#194782)
Prevent combinePExtTruncate from forming RISCVISD nodes with illegal
type. Remove unnecessary call to getSimpleVT().
Legalize shift amount when custom legalizing i64 shifts.
SelectionDAGBuilder usually pre-legalizes shift amounts. If we scalarize
a vXi64 vector shift the shift amount will be i64.
inpcb: improve some internal function names
The 'hash' subword doesn't bring any additional information. All inpcb
lookup functions operate on hashes.
For lookup functions that work on either exact hash or wild hash just
perform s/hash_//. Rename in_pcblookup_hash() into
in_pcblookup_with_lock(), emphasizing its difference to
in_pcblookup_smr(). Rename in_pcblookup_hash_locked() to
in_pcblookup_internal(), as it doesn't return a locked inpcb and is used
only for internal purposes. Note that the IPv6 sibling of this function
already lives by name in6_pcblookup_internal(). Some future changes will
make such naming more justified.
No functional change.
Reviewed by: pouria, markj
Differential Revision: https://reviews.freebsd.org/D56482
[AMDGPU] Propagate debug info to constant materialization instr (#192669)
Set the debug location on non-target constant nodes so that the
resulting machine instructions inherit the correct source location.
sysutils/htop: Update to 3.5.1
Changes since 3.4.1:
What's new in version 3.5.1
* Consolidate ClockMeter code into DateTimeMeter code
* Darwin: Fix unsigned underflow in memory meter on ARM64 (Apple
Silicon 16K pages showing ~64TB used)
* Linux/PCP: Replace M_SHARE (SHR) with M_PRIV (PRIV) in default
Main screen columns
* PCP: Fix dynamic screen column (instance) sorting (incorrect
cast and field offsets)
* PCP: Fix units used when printing M_PRIV memory column values
* PCP: Add Darwin swap metric values and a fallback on Linux for
SwapMeter
* Fix null pointer dereference in actionBacktrace() (GCC LTO -O2
-flto, Ubuntu 24.04)
* Make search function activate following on find consistently
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[LoopVectorize] Add metadata to distinguish vectorized loop body from scalar remainder (#190258)
Add two new loop metadata attributes — `llvm.loop.vectorize.body` and
`llvm.loop.vectorize.epilogue` — that the loop vectorizer sets on the
generated vector loop and epilogue loop respectively. The metadata is
only emitted when optimization remarks are enabled (`ORE->enabled()`),
so it has zero cost in normal compilation.
These enable downstream passes (LoopUnroll, WarnMissedTransforms) to
produce more precise optimization remarks. Instead of the generic "loop
not unrolled" warning on a source line that was vectorized, the unroller
can now report:
- **"vectorized loop"** for the main vector body
- **"epilogue loop"** for the scalar epilogue/remainder
- **"epilogue vectorized loop"** for an epilogue that was itself
vectorized during epilogue vectorization (carries both attributes)
A shared `getLoopVectorizeKindPrefix()` helper in
`LoopUtils.h`/`LoopUtils.cpp` reads the metadata and returns the
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[RISCV] Use BufferSize = 0 for ProcResGroup in SiFive7 scheduling models (#194754)
As it turns out, even if a `ProcResGroup` consists of in-order pipes, as
long as its (the group's) BufferSize is not zero, Machine Scheduler will
not use in-order scheduling on instructions that consume it. Since
BufferSize also defaults to -1 for `ProcResGroup`, we have been
scheduling the resource consumption of SiFive7's `PipeAB` (scalar pipes)
and `VA1OrVA2` (vector pipes) in an out-of-order fashion!
Co-authored-by: Min Hsu <min.hsu at sifive.com>
