LLVM/project 29a9b63clang/lib/CIR/CodeGen CIRGenExprCXX.cpp CIRGenCleanup.cpp, clang/test/CIR/CodeGen new-delete.cpp

rebase

Created using spr 1.3.7
DeltaFile
+326-0clang/test/CIR/CodeGen/new-delete.cpp
+52-15clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+30-3offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+16-6clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
+16-2offload/plugins-nextgen/common/src/RecordReplay.cpp
+5-3clang/lib/CIR/CodeGen/CIRGenCleanup.h
+445-292 files not shown
+452-338 files

LLVM/project 8a4f8e5

dead include

Created using spr 1.3.7
DeltaFile
+0-00 files

LLVM/project 711cf04llvm/lib/CodeGen MachineBlockHashInfo.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-1llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+0-11 files

LLVM/project f6ce253offload/plugins-nextgen/common/src RecordReplay.cpp, offload/tools/kernelreplay llvm-omp-kernel-replay.cpp

[offload] Verify replay config of teams/threads is allowed (#192784)
DeltaFile
+30-3offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+16-2offload/plugins-nextgen/common/src/RecordReplay.cpp
+46-52 files

LLVM/project 72861aeclang/lib/CIR/CodeGen CIRGenExprCXX.cpp CIRGenCleanup.cpp, clang/test/CIR/CodeGen new-delete.cpp

[CIR] Implement support for delete after new in a conditional branch (#192544)

This implements handling for calling delete in an EH handler after a
call to new when the new call appears inside a conditional operation,
which requires the new result to be spilled inside the cleanup scope and
reloaded after.

This implementation introduces the DominatingValue helper class, which
is adapted from classic codegen, but only the parts of that class that
are needed for the current change are implemented. This will likely be
expanded in a future change as other uses are added.

Assisted-by: Cursor / claude-4.6-opus-high
DeltaFile
+326-0clang/test/CIR/CodeGen/new-delete.cpp
+52-15clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+16-6clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
+5-3clang/lib/CIR/CodeGen/CIRGenCleanup.h
+2-4clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+5-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+406-286 files

LLVM/project b01f02fllvm/test/Transforms/LoopVectorize/ARM mve-interleaved-cost.ll, llvm/test/Transforms/PhaseOrdering inline-store-to-load.ll

rebase

Created using spr 1.3.7
DeltaFile
+428-526llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
+309-281mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+212-121offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+47-173mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+119-0mlir/lib/Dialect/GPU/Transforms/IndexedAccessOpInterfaceImpl.cpp
+113-0llvm/test/Transforms/PhaseOrdering/inline-store-to-load.ll
+1,228-1,101101 files not shown
+2,470-1,686107 files

LLVM/project 555ec3allvm/test/Transforms/LoopVectorize/ARM mve-interleaved-cost.ll, llvm/test/Transforms/PhaseOrdering inline-store-to-load.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+428-526llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
+309-281mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+212-121offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+47-173mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+119-0mlir/lib/Dialect/GPU/Transforms/IndexedAccessOpInterfaceImpl.cpp
+113-0llvm/test/Transforms/PhaseOrdering/inline-store-to-load.ll
+1,228-1,101103 files not shown
+2,499-1,691109 files

LLVM/project c65d40bclang/docs ReleaseNotes.rst, clang/include/clang/Basic AttrDocs.td

[Clang][AMDGPU] Deprecate `amdgpu-num-vgpr` and `amdgpu-num-sgpr` (#193023)

We will just emit a warning at this moment. This will still take effect
for regular compilation, but in object linking, we will simply ignore
them.
DeltaFile
+16-0clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
+6-4llvm/docs/AMDGPUUsage.rst
+8-0clang/docs/ReleaseNotes.rst
+5-1clang/include/clang/Basic/AttrDocs.td
+5-0llvm/docs/ReleaseNotes.md
+4-0clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
+44-56 files not shown
+56-912 files

NetBSD/pkgsrc-wip 420a8f8xrdp TODO

xrdp: Add recent CVEs
DeltaFile
+2-1xrdp/TODO
+2-11 files

LLVM/project fed6a2dllvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen MachineBlockHashInfo.h Passes.h

newPM

Created using spr 1.3.7
DeltaFile
+33-45llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+36-2llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+0-4llvm/include/llvm/CodeGen/Passes.h
+3-0llvm/include/llvm/Passes/MachinePassRegistry.def
+1-1llvm/test/CodeGen/X86/machine-block-hash.mir
+0-1llvm/include/llvm/InitializePasses.h
+73-532 files not shown
+74-548 files

LLVM/project 354d62cllvm/include/llvm/CodeGen MachineBlockHashInfo.h, llvm/lib/CodeGen MachineBlockHashInfo.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+16-3llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+13-2llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+29-52 files

LLVM/project 47da700lldb/docs index.rst

[lldb][docs] Reorganize website navigation into topic-based sections (#192805)

As we've kept adding more documentation, the website has grown beyond
what's easily navigated. This PR breaks the two flat "Using LLDB" and
"Developing LLDB" sections into smaller, audience-oriented categories:

1. Getting Started: tutorial, GDB-to-LLDB map, settings,
troubleshooting, man page
2. Using LLDB: variables, formatting, symbolication, symbols, on-demand,
remote
3. IDE & Tool Integration: lldb-dap, MCP
4. Platform-Specific Topics: AArch64 Linux, Intel PT
5. Scripting LLDB: Python reference, API, extensions (unchanged)
6. Contributing to LLDB: overview, contributing, build, test, debugging,
fuzzing
7. Architecture & Internals: C++ APIs, SB API, data formatters,
formatter bytecode, language support, caveats, projects
8. Protocol & Format Specifications: symbol file JSON, GDB remote
extensions, platform packets

    [4 lines not shown]
DeltaFile
+57-29lldb/docs/index.rst
+57-291 files

FreeBSD/ports ab13cadnet/td-system-tools pkg-plist distinfo

net/td-system-tools: Update 2.2.5 => 2.3.1

Changelog:
https://github.com/dreibh/system-tools/blob/td-system-tools-2.3.1/ChangeLog

Commit log:
https://github.com/dreibh/system-tools/compare/td-system-tools-2.2.5...td-system-tools-2.3.1

PR:             294671
Sponsored by:   UNIS Labs
DeltaFile
+11-0net/td-system-tools/pkg-plist
+3-3net/td-system-tools/distinfo
+1-1net/td-system-tools/Makefile
+15-43 files

NetBSD/pkgsrc PiVmOcldevel/libgudev Makefile buildlink3.mk, devel/libgudev/patches patch-meson.build

   devel/libgudev: allow it to build on *BSD
VersionDeltaFile
1.5+13-4devel/libgudev/Makefile
1.1+15-0devel/libgudev/patches/patch-meson.build
1.4+9-3devel/libgudev/buildlink3.mk
1.2+2-1devel/libgudev/distinfo
+39-84 files

LLVM/project 9006598mlir/include/mlir/Dialect/SPIRV/IR SPIRVImageOps.td, mlir/test/Dialect/SPIRV/IR image-ops.mlir

[mlir][spirv] Add SPIRV_FetchOpInterface to SPIRV_ImageFetchOp (#192986)

SPIRV_ImageFetchOp was missing the SPIRV_FetchOpInterface interface.
Without it, the Lod image operand validation in ImageOps.cpp would
reject Lod on spirv.ImageFetch because line 77 checks
`(!isa<spirv::ExplicitLodOpInterface>(imageOp) &&
!isa<spirv::FetchOpInterface>(imageOp))`. The fix adds
DeclareOpInterfaceMethods<SPIRV_FetchOpInterface> to the op's trait
list.
DeltaFile
+11-1mlir/test/Dialect/SPIRV/IR/image-ops.mlir
+2-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVImageOps.td
+13-22 files

LLVM/project a583655llvm/lib/CodeGen MachineBlockHashInfo.cpp

Remove reservation of MBBHashInfo

Removed reservation of MBBHashInfo based on HashInfos size.
DeltaFile
+0-1llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+0-11 files

LLVM/project 0218403llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp AMDGPUBaseInfo.h

[NFC][AMDGU] Remove an unused function (#193053)
DeltaFile
+0-4llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+0-1llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+0-52 files

LLVM/project 6d99ce8clang/test/CIR/CodeGen paren-list-agg-init.cpp, clang/test/CIR/CodeGenCXX new-array-init.cpp

Merge branch 'main' into users/shiltian/deprecate-amdgpu-num-vgpr
DeltaFile
+428-526llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
+884-0clang/test/CIR/CodeGen/paren-list-agg-init.cpp
+651-0clang/test/CIR/CodeGenCXX/new-array-init.cpp
+309-281mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+212-121offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+47-173mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+2,531-1,101112 files not shown
+4,670-1,756118 files

LLVM/project 5023c86clang/docs ReleaseNotes.rst

[NFC] Remove trailing white spaces from clang/docs/ReleaseNotes.rst (#193062)
DeltaFile
+5-5clang/docs/ReleaseNotes.rst
+5-51 files

LLVM/project 140d89dllvm/lib/CodeGen MachineBlockHashInfo.cpp

Update MachineBlockHashInfo.cpp
DeltaFile
+1-1llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+1-11 files

NetBSD/pkgsrc-wip 000143ftailscale distinfo Makefile

tailscale: fixed using userspace-networking (I think)
DeltaFile
+3-3tailscale/distinfo
+1-1tailscale/Makefile
+4-42 files

FreeNAS/freenas 0d3d4acsrc/middlewared/middlewared/test/integration/utils system.py

NAS-140711 / 26.0.0-BETA.2 / Robustize helper to reset-failed (by anodos325) (#18769)

This commit handles edge-case where maybe our CI is trying to reset a
unit that is unloaded. This allows us to surface what may be a more
useful error condition later on in tests.

Original PR: https://github.com/truenas/middleware/pull/18762

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+13-1src/middlewared/middlewared/test/integration/utils/system.py
+13-11 files

LLVM/project 948daf1clang/test/CodeGen ptrauth-init-fini.c, llvm/lib/IR AutoUpgrade.cpp Verifier.cpp

[AArch64][PAC] Handle signing of init/fini pointers in AsmPrinter

Move signing of the contents of `@llvm.global_(ctors|dtors)` from
Clang frontend to the end of the backend pipeline, to AsmPrinter.

Signing of the pointers to init/fini functions in the backend fixes
registration of the constructors and destructors performed by the
optimizer or the backend.

This commit introduces two new module flags, `ptrauth-init-fini` and
`ptrauth-init-fini-address-discrimination`, mirroring corresponding
Clang options. The flags are semantically boolean, and the module
is allowed to have either none of these flags, only the first one,
or both. The particular constant discriminator to use is not
configurable via module flags and is hardcoded to the value 0xD9D4
in the `llvm/lib/Target/AArch64/AArch64PointerAuth.h` file.
DeltaFile
+143-0llvm/test/CodeGen/AArch64/ptrauth-init-fini-autoupgrade.ll
+99-2llvm/lib/IR/AutoUpgrade.cpp
+73-14llvm/test/CodeGen/AArch64/ptrauth-init-fini.ll
+47-11llvm/lib/IR/Verifier.cpp
+32-12llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+19-11clang/test/CodeGen/ptrauth-init-fini.c
+413-504 files not shown
+428-8510 files

LLVM/project 1fbdf8allvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/AArch64 interleaved_cost.ll sve-gather-scatter-cost.ll

[LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (#191216)

selectUserVectorizationFactor was still using legacy expectedCost.
Instead of going through the legacy cost model to check if the cost is
valid, directly go through the VPlan cost model.

This requires to first build the plans, then check their costs.

This removes another use of the legacy cost model.

PR: https://github.com/llvm/llvm-project/pull/191216
DeltaFile
+428-526llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
+30-56llvm/test/Transforms/LoopVectorize/AArch64/interleaved_cost.ll
+29-55llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+22-44llvm/test/Transforms/LoopVectorize/ARM/interleaved_cost.ll
+8-8llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter-cost.ll
+8-8llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
+525-69710 files not shown
+547-72016 files

OpenBSD/ports P8tI8U4graphics/lcms2 Makefile distinfo

   graphics/lcms2: Update to 2.19rc2

   Fixes several issues, for reference see
   https://marc.info/?l=oss-security&m=177646929211758&w=2

   pointed out by and ok tb@, ok naddy@
VersionDeltaFile
1.29+6-3graphics/lcms2/Makefile
1.15+2-2graphics/lcms2/distinfo
+8-52 files

LLVM/project 2d61daellvm/include/llvm/CodeGen MachineBlockHashInfo.h, llvm/lib/CodeGen MachineBlockHashInfo.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+18-3llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+13-2llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+31-52 files

FreeNAS/freenas ec66b66src/middlewared/middlewared/test/integration/utils system.py

Robustize helper to reset-failed

This commit handles edge-case where maybe our CI is trying to
reset a unit that is unloaded. This allows us to surface what
may be a more useful error condition later on in tests.

(cherry picked from commit 6ab6b07017c0fea31a0f254444934316f337a1d3)
DeltaFile
+13-1src/middlewared/middlewared/test/integration/utils/system.py
+13-11 files

FreeNAS/freenas 2651cd6src/middlewared/middlewared/test/integration/utils system.py

NAS-140711 / 27.0.0-BETA.1 / Robustize helper to reset-failed (#18762)

This commit handles edge-case where maybe our CI is trying to reset a
unit that is unloaded. This allows us to surface what may be a more
useful error condition later on in tests.
DeltaFile
+13-1src/middlewared/middlewared/test/integration/utils/system.py
+13-11 files

LLVM/project d61f12fllvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine urem-via-cmp-select.ll

InstCombine: Update assumption cache when replacing values (#192935)

Fixes worklist verifier error with assumption cache

Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>
DeltaFile
+16-2llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+3-6llvm/test/Transforms/InstCombine/urem-via-cmp-select.ll
+19-82 files

Linux/linux da6b5aaDocumentation/wmi/devices bitland-mifs-wmi.rst, drivers/platform/x86 bitland-mifs-wmi.c fujitsu-laptop.c

Merge tag 'platform-drivers-x86-v7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86

Pull x86 platform driver updates from Ilpo Järvinen:
 "asus-wmi:
   - Retain battery charge threshold during boot which avoids
     unsolicited change to 100%. Return -ENODATA when the limit
     is not yet known
   - Improve screenpad power/brightness handling consistency
   - Fix screenpad brightness range

  barco-p50-gpio:
   - Normalize gpio_get return values

  bitland-mifs-wmi:
   - Add driver for Bitland laptops (supports platform profile,
     hwmon, kbd backlight, gpu mode, hotkeys, and fan boost)

  dell_rbu:
   - Fix using uninitialized value in sysfs write function

    [70 lines not shown]
DeltaFile
+837-0drivers/platform/x86/bitland-mifs-wmi.c
+266-253drivers/platform/x86/fujitsu-laptop.c
+370-70drivers/platform/x86/uniwill/uniwill-acpi.c
+207-0Documentation/wmi/devices/bitland-mifs-wmi.rst
+82-111drivers/platform/x86/lenovo/thinkpad_acpi.c
+99-83drivers/platform/x86/toshiba_acpi.c
+1,861-51772 files not shown
+3,088-1,32478 files