[CIR][SYCL] Support SYCL kernel call statement in host codegen (#213728)
Add CIRGen support for lowering SYCLKernelCallStmt during host
compilation, emitting the kernel launch statement in place of the
`sycl_kernel_entry_point` function body (mirroring classic CodeGen).
Device compilation, were the offload kernel caller entry point
is emitted instead, is future work and thus marked as NIY.
[NPM] Make few more passes required - 2 (#213608)
as discussed in https://github.com/llvm/llvm-project/pull/203511, few of
these should not really be required (such as sink) with O0/opt-none, yet
we require this for consistency between legacy and NPM. We need to look
at the passes separately and selectively make strictly optimizing passes
optional.
[ELF][AArch64] Do not treat missing build attributes as defined (#213600)
Even if an AArch64 build attributes section contains only private
subsections and does not define feature flags or PAuth information,
`lld` still checks the values defined in the GNU Program Properties
section against the build attribute defaults, producing warnings and
errors. The patch adjusts the handling of build attributes so that only
the existing attributes are used.
---
* https://github.com/ARM-software/abi-aa/blob/main/buildattr64/buildattr64.rst
[LoongArch][MC] Pre-mark align fragments as linker-relaxable (#213582)
Extract `shouldRelaxAlign` from `relaxAlign` and call it during
`emitCodeAlignment` to eagerly set the linker-relaxable flag on align
fragments. This ensures `isRangeRelaxable` returns correct results
before the layout phase.
workflows/upload-release-artifact: Make this action self-contained (#213828)
The action now checks out its own files so calling workflows don't need
to do this. This helps prevent mistakes where the calling workflow
does not checkout the right files causing this action to fail.
(cherry picked from commit 4e725a2c756f32c4fe7512d9b30c6bf831e4d4a5)
[HLSL] Consistently quote resource attribute args (#214106)
The `hlsl::resource_class` and `hlsl::dimension` attributes both take a
single argument from a set of choices, but resource_class expects an
unevaluated identifier and dimension expects a string literal.
Consistently require the literal for both, and fix up the AST printers
to match.
[AArch64][Windows] Fix swift async context slot placement (#212922)
Swift async functions can miscompile on Windows ARM64 at `-O2`, when
there's enough register pressure that a local gets scavenged into the
callee-save area: the local ends up sharing an address with the saved
caller x29, so the epilogue restores a value the function has already
overwritten. swiftlang/swift#90920 has a reduced repro.
`assignCalleeSavedSpillSlots` creates the swift async context object
before the callee-save loop instead of inside it next to the FP slot.
MachineFrameInfo ends up with it above the frame record while the
prologue stores it below at FP-8, and the 8 byte disagreement leaves a
hole in the middle of the callee-save area. PEI's scavenger hands that
hole to the local. Only reproduces at -O2 and up since scavenging is
gated on the opt level.
```
sub sp, sp, #112
str x19, [sp, #16] // 8-byte Spill
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[mlir] fix builders by moving var into assert (#209494)
non-asserts builders are failing since `vecTy` is unused aside from this
one assertion: https://lab.llvm.org/buildbot/#/builders/228/builds/4754
Since side-effects here are uninteresting, move the entire expr into the
assert, per CodingStandards.md
Fix-forward for #199700
(cherry picked from commit e217dcb8de5dd83b307fe8b95b43de11a7d894ab)
[LoopInterchange] Reject interchange when a freeze would move or be cloned
Loop interchange moves four blocks to a different loop depth: the outer loop
header and latch, and the inner loop preheader and exit block. It also splits
the inner loop latch and clones the instructions that compute the latch branch
condition and induction variable updates into the new latch block.
LangRef guarantees that all uses of the value returned by one execution of a
`freeze` observe that same value. The guarantee does not extend across
executions, so one `freeze` may yield a different value each time it runs.
Different `freeze` instructions may also yield different values for the same
`undef` or poison operand. Both steps above can therefore change which value a
use observes.
Moving a `freeze` to a different loop depth changes which loop iterations share
one dynamic result. Uses that observed a single frozen value in the original
nest can observe values from separate executions after interchange. Cloning a
`freeze` creates a second, independent instruction, so the original and clone
can yield different values for the same operand.
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devel/erlang-ezlib: Update to 1.0.16
# Version 1.0.16
* Updating p1_utils to version 1.0.29.
* Fix new deprecation in R29
* Add documentation to hex package
