FreeBSD/src 3abd3d3sys/netinet6 in6_pcb.c

inpcb: return ENOMEM if bind(2) fails to allocate lbgroup

This is exactly the same as the second part of IPv4's change
136c5e17b61a1/D49153.
DeltaFile
+6-4sys/netinet6/in6_pcb.c
+6-41 files

FreeBSD/src ca4eb3fsys/netinet6 in6_pcb.c

inpcb: do not set INP_ANONPORT until successful operation
DeltaFile
+2-2sys/netinet6/in6_pcb.c
+2-21 files

LLVM/project 1052612llvm/test/CodeGen/X86 fmaddsub-combine.ll fmsubadd-combine.ll

[X86] fmaddsub-combine.ll + fmsubadd-combine.ll - cleanup 512-bit buildvector tests (#209850)

Followup to #207436 - the full buildvector and partial buildvector tests
are covered by PhaseOrdering/X86/fmaddsub.ll which outputs the (still
poor) vectorized shuffle patterns

Ensure the current middle-end IR is tested by the backend, even though
its still not optimal (and divergent between SSE and AVX targets) - I've
kept the buildvector backend patterns for now (and moved the buildvector
fmsubadd patterns to fmsubadd-combine.ll for consistency).

Next step will be to investigate why the middle-end IR result isn't
optimal.

Minor cleanup for #144489
DeltaFile
+519-281llvm/test/CodeGen/X86/fmaddsub-combine.ll
+695-0llvm/test/CodeGen/X86/fmsubadd-combine.ll
+1,214-2812 files

LLVM/project 725f644clang/lib/Format UnwrappedLineParser.cpp, clang/unittests/Format TokenAnnotatorTest.cpp

[clang-format] Improve requires clause parsing (#207542)

We did not consider dependent templates and thus ended the parsing after
template and forcing a line break there. The tests was formatted as:

template <typename T> struct S {
  template <typename Foo>
    requires T::template
  Has<Foo> void func(Foo);
};
DeltaFile
+10-0clang/unittests/Format/TokenAnnotatorTest.cpp
+1-0clang/lib/Format/UnwrappedLineParser.cpp
+11-02 files

LLVM/project 26194d4llvm/docs LFI.rst, llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

[LFI][AArch64] Add PAC support for LFI (#207915)

This patch adds support for PAC instructions that sign `x30` by deferring
the LFI mask until the next control-flow instruction or label, allowing
an authentication instruction to run before the mask, which overwrites
the PAC signature bits in the top bits of the pointer. This relies on
FEAT_FPAC to provide a security benefit, which requires authentication
failure to cause a trap, rather than expecting the branch on an invalid
pointer to cause the trap.
DeltaFile
+161-4llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCLFIRewriter.cpp
+98-2llvm/docs/LFI.rst
+53-0llvm/test/MC/AArch64/LFI/pac.s
+43-0llvm/test/MC/AArch64/LFI/return.s
+26-0llvm/test/MC/AArch64/LFI/mem-lr.s
+23-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+404-65 files not shown
+449-1111 files

LLVM/project 4e1a609clang/docs ReleaseNotes.md, clang/include/clang/Sema Sema.h

[Sema][Serialization] Emit unused local typedefs in a deterministic order (#209639)

Sema::UnusedLocalTypedefNameCandidates is populated while iterating a
Scope's
DeclsInScope, which is a SmallPtrSet whose iteration order depends on
pointer
values and is therefore not stable across runs. The candidates are
serialized
into the AST file -- both to assign declaration IDs and to write the
UNUSED_LOCAL_TYPEDEF_NAME_CANDIDATES record -- and are also used to emit
the
deferred -Wunused-local-typedef warnings, so neither the emitted PCH/AST
file
nor the diagnostics were reproducible. With deterministic compilation
caching
this surfaces as a "cache poisoned" error, because two builds of the
same PCH
produce different bytes.


    [4 lines not shown]
DeltaFile
+212-0clang/test/SemaCXX/warn-unused-local-typedef-deterministic-order.cpp
+115-0clang/test/PCH/unused-local-typedef-determinism.cpp
+16-1clang/lib/Sema/Sema.cpp
+10-4clang/lib/Serialization/ASTWriter.cpp
+6-1clang/include/clang/Sema/Sema.h
+4-0clang/docs/ReleaseNotes.md
+363-66 files not shown
+369-1212 files

LLVM/project b74c800compiler-rt/lib/tsan/rtl tsan_interface_atomic.cpp

[compiler-rt][tsan] Fix -Wunused-template in tsan_interface_atomic.cpp (NFC) (#209621)
DeltaFile
+9-6compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp
+9-61 files

FreeBSD/doc f02503cwebsite/content/en/status/report-2026-04-2026-06 ipv6_improvements.adoc ntsync.adoc

Status/2026Q2: typo fixes
DeltaFile
+1-1website/content/en/status/report-2026-04-2026-06/ipv6_improvements.adoc
+1-1website/content/en/status/report-2026-04-2026-06/ntsync.adoc
+2-22 files

LLVM/project 0256ff9clang/test lit.cfg.py

[clang][test][AIX] Set OBJECT_MODE=any for all clang test (#209531)

This patch sets OBJECT_MODE=any to have tools able to handle 32-bit or
64-bit objects.
DeltaFile
+1-4clang/test/lit.cfg.py
+1-41 files

LLVM/project 2dac2abutils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel][mlir] Port b8ba3c2b72cb53268129bbecfeb4ba7ec5b8d831 (#209854)

Add SCFToAffine target + deps
DeltaFile
+21-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+21-01 files

NetBSD/pkgsrc XlHhNvMsysutils/qemu-guest-agent Makefile

   Pullup ticket #7170 - requested by is
   sysutils/qemu-guest-agent: i386 build fix

   Revisions pulled up:
   - sysutils/qemu-guest-agent/Makefile                            1.11

   ---
      Module Name:      pkgsrc
      Committed By:     is
      Date:             Wed Jul  8 16:53:59 UTC 2026

      Modified Files:
        pkgsrc/sysutils/qemu-guest-agent: Makefile

      Log Message:
      make this compile for and work on i386 (actually, i586 and up) 32bit VMs.
VersionDeltaFile
1.10.2.1+3-1sysutils/qemu-guest-agent/Makefile
+3-11 files

LLVM/project 889b2d6clang/lib/Sema SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins QuadReadAcrossDiagonal.hlsl QuadReadAcrossX.hlsl

[HLSL] Adds diagnostics for missing/ambiguous shader entry function. (#184892)

Addresses #119260.
DeltaFile
+24-24clang/test/SemaHLSL/BuiltIns/unary-compat-overload-warnings.hlsl
+27-3clang/test/SemaHLSL/entry_shader.hlsl
+22-0clang/lib/Sema/SemaHLSL.cpp
+16-3clang/test/SemaHLSL/num_threads.hlsl
+4-4clang/test/CodeGenHLSL/builtins/QuadReadAcrossDiagonal.hlsl
+4-4clang/test/CodeGenHLSL/builtins/QuadReadAcrossX.hlsl
+97-38150 files not shown
+336-266156 files

NetBSD/pkgsrc-wip 2030053dpbox/patches patch-bl

dpbox: commit patch-bl and align distinfo
DeltaFile
+30-0dpbox/patches/patch-bl
+30-01 files

LLVM/project be1b1a7llvm/lib/LineEditor LineEditor.cpp

Turn signal handling on in LineEditor (#203616)

This PR was created to address
https://github.com/jank-lang/jank/issues/801.

Without signal handling, `CLRL+C` / `CTRL+Z` leaves the terminal in an
awkward state, breaking other command line tasks and forcing the user to
open a new/clean terminal window.

cc: @jeaye 

### Edit

#### AI

Per the contribution policies and review practices, AI was used to
locate the root cause of the issue I was seeing. From there, I
personally wrote the code and manually tested the build to verify that
the change fixed the problem I was seeing.

    [6 lines not shown]
DeltaFile
+1-0llvm/lib/LineEditor/LineEditor.cpp
+1-01 files

FreeNAS/freenas 9d4f009src/middlewared/middlewared/api/base model.py, src/middlewared/middlewared/plugins/catalog apps_details.py

Use `DumpableModel` as base for `NormalizedQuestions`
DeltaFile
+47-44src/middlewared/middlewared/api/base/model.py
+3-2src/middlewared/middlewared/plugins/catalog/apps_details.py
+50-462 files

LLVM/project 2732991llvm/lib/Target/AMDGPU AMDGPU.td

[AMDGPU] Limit unclaused VMEM w/a to specific targets (#209843)

Fixes: LCOMPILER-2448
DeltaFile
+9-4llvm/lib/Target/AMDGPU/AMDGPU.td
+9-41 files

OpenBSD/src c0m33fesbin/dhcp6leased engine.c

   Make sure replies contain the expected server-id.

   We only speak to and expect an answer from a specific server when we
   are requesting or renewing a lease. In all other case we accept an
   answer from any server.

   Pointed out by Clouditera Security.
   OK tb
VersionDeltaFile
1.39+11-1sbin/dhcp6leased/engine.c
+11-11 files

LLVM/project c4c4f20libc/src/__support freelist.cpp

[libc][baremetal][NFC] cache away redundant freelist memory access during push and pop (#208282)

By explicitly caching Node *next = node->next; and Node *prev =
node->prev; at function entry:
#### Before (Original):
```llvm                                                                                                                                                                                                             
    13:                                               ; preds = %6                                                                                                                                               
      %14 = load ptr, ptr %1, align 8                 ; Load node->prev                                                                                                                                          
      %15 = getelementptr inbounds nuw i8, ptr %14, i64 8                                                                                                                                                        
      store ptr %8, ptr %15, align 8                  ; Store next to prev->next                                                                                                                                 
      %16 = load ptr, ptr %7, align 8                 ; <--- REDUNDANT LOAD of node->next                                                                                                                        
      store ptr %14, ptr %16, align 8                 ; Store prev to next->prev                                                                                                                                 
      %17 = icmp eq ptr %3, %1                                                                                                                                                                                   
      br i1 %17, label %18, label %20                                                                                                                                                                            
  
    18:                                               ; preds = %13, %10
      %19 = phi ptr [ null, %10 ], [ %16, %13 ]
      store ptr %19, ptr %0, align 8
```

    [27 lines not shown]
DeltaFile
+6-4libc/src/__support/freelist.cpp
+6-41 files

OpenBSD/src eXw6y3Osbin/dhcp6leased engine.c

   Make sure we received a client identifier.

   Pointed out by Clouditera Security.
   OK tb
VersionDeltaFile
1.38+8-1sbin/dhcp6leased/engine.c
+8-11 files

OpenBSD/src 4i24SVtsbin/dhcp6leased engine.c

   Make sure the message belongs to the current transaction.

   Pointed out by Clouditera Security.
   OK tb
VersionDeltaFile
1.37+11-1sbin/dhcp6leased/engine.c
+11-11 files

FreeBSD/ports 4c9fefawww/p5-Mojolicious distinfo Makefile

www/p5-Mojolicious: Update to 9.48
DeltaFile
+3-3www/p5-Mojolicious/distinfo
+1-1www/p5-Mojolicious/Makefile
+4-42 files

LLVM/project 09a947elldb/packages/Python/lldbsuite/test lldbutil.py lldbtest.py, lldb/test/API/driver/longpath TestLongPathDriver.py

[lldb][Windows] Use extended path prefix for rmtree (#209409)

The test suite previously only warned when a test build directory or
artifact path exceeded Windows' `MAX_PATH (260)` limit, and
`shutil.rmtree` could fail to clean up such directories. This replaces
the warnings with actual long-path support.

This is a recurring problem in Swiftlang.
DeltaFile
+108-0lldb/packages/Python/lldbsuite/test/lldbutil.py
+4-33lldb/packages/Python/lldbsuite/test/lldbtest.py
+0-7lldb/test/Shell/helper/toolchain.py
+2-1lldb/test/API/tools/lldb-dap/longpath/TestDAP_launch_longPath.py
+2-1lldb/test/API/driver/longpath/TestLongPathDriver.py
+1-1lldb/test/API/functionalities/longpath/TestLongPath.py
+117-436 files

LLVM/project 378629bflang/lib/Optimizer/CodeGen TargetRewrite.cpp

[flang] Derive target-specific data layout from triple in TargetRewrite (#209649)

When target-rewrite runs without an explicit llvm.data_layout attribute,
it falls back to hardcoded generic default in MLIR (kDefaultDataLayout)
which specifies f128 ABI alignment as 16 bytes. This is incorrect for
targets where f128 ABI alignment differs from its size, such as SystemZ
which requires 8 bytes per the ELF ABI.

The target triple is available in the target-rewrite pass. Fix by
deriving the data layout from the target triple using
triple.computeDataLayout() before falling back to the generic default,
ensuring target-specific alignments are correctly reflected in
dlti.dl_spec.

@uweigand @dominik-steenken

---------

Co-authored-by: anoop.kumar6 at ibm.com <anoopk at b35lp63.lnxne.boe>
DeltaFile
+11-0flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
+11-01 files

LLVM/project ea61254polly/lib/CodeGen IslNodeBuilder.cpp BlockGenerators.cpp, polly/test/CodeGen issue205732.ll

[Polly] Fix codegen assertions to account for DefinedBehaviorContext (#209188)

DeLICM may produce new read access relations whose domain is restricted
to the DefinedBehaviorContext (e.g., only valid when a parameter ensures
no UB). The validation in setNewAccessRelation already accounts for
this, but the debug assertions in createNewAccesses and
generateScalarLoads did not, causing false assertion failures during
code generation.

Intersect the checked domains with getBestKnownDefinedBehaviorContext()
to match the contract that DeLICM relies on.

Fixes #205732
DeltaFile
+40-0polly/test/CodeGen/issue205732.ll
+10-2polly/lib/CodeGen/IslNodeBuilder.cpp
+5-0polly/lib/CodeGen/BlockGenerators.cpp
+55-23 files

FreeBSD/src a48a275sys/sys proc.h

sys/proc.h: remove spurious blank lines

Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
DeltaFile
+0-2sys/sys/proc.h
+0-21 files

LLVM/project ce6af70clang/lib/Sema SemaDecl.cpp, clang/test/SemaTemplate class-template-spec.cpp

Create a Template member to be the MemberSpec of a failed TemplVarDecl (#209604)

Patch #200092 changed to no longer check the previous var template when
setting whether the current one is a member specialization. However, if
the previous one was actually an error case (see the example here and in
the report), we ended up trying to do that anyway, which caused an
assertion.

This patch puts in a 'fake' declaration for the not-found declaration after we
emit the 'not found' error for the purposes of allowing our diagnostics to
continue evaluating these without causing problems.

Fixes: #209432
(cherry picked from commit 2c2e43675910603bab1b163655786e4850569d74)
DeltaFile
+21-0clang/test/SemaTemplate/class-template-spec.cpp
+15-0clang/lib/Sema/SemaDecl.cpp
+36-02 files

LLVM/project b8ba3c2mlir/include/mlir/Conversion Passes.td Passes.h, mlir/include/mlir/Conversion/SCFToAffine SCFToAffine.h

[mlir][SCFToAffine] Raise scf.for to affine.for (#200851)

Add a pass `-raise-scf-to-affine` that rewrites `scf.for` into
`affine.for` when the bounds and step are valid affine quantities. It
handles constant and dynamic steps, and integer-typed loops (by a
lossless cast of the bounds to `index`).

This is a first step; raising further scf ops to affine will follow.

Assisted-by: Claude Code (Anthropic)
Co-authored-by: Ming Yan <nexming7 at gmail.com>
Co-authored-by: Julian Farnsteiner <jcf96 at proton.me>
DeltaFile
+368-0mlir/lib/Conversion/SCFToAffine/SCFToAffine.cpp
+330-0mlir/test/Conversion/SCFToAffine/scf-to-affine.mlir
+37-0mlir/include/mlir/Conversion/Passes.td
+26-0mlir/include/mlir/Conversion/SCFToAffine/SCFToAffine.h
+15-0mlir/lib/Conversion/SCFToAffine/CMakeLists.txt
+1-0mlir/include/mlir/Conversion/Passes.h
+777-01 files not shown
+778-07 files

FreeBSD/src 1f5fe8asys/kern kern_exit.c sys_procdesc.c, sys/sys procdesc.h

kern: change several int types to bools

Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
DeltaFile
+3-3sys/kern/kern_exit.c
+3-3sys/kern/sys_procdesc.c
+1-1sys/sys/procdesc.h
+7-73 files

LLVM/project fc48c7ellvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/RISCV strided-accesses.ll strided-accesses-unroll.ll

[VPlan] Fix nowrap flags for strided access pointers from SCEV (#209453)

This patch addresses two things. First, the offset calculation
(canonical IV * stride) should not reuse the NSW flag of the add
recurrence. The NSW property from SCEV for the original scalar
recurrence does not necessarily hold for the reconstructed
multiplication using the vector canonical IV. The NUW flag, however, can
still be safely propagated.
Second, because vputils::getGEPFlagsForPtr currently doesn't support
recipes other than VPInstruction, and to avoid relying on LLVM IR
function (like calling stripPointerCasts()), we change
VPVectorPointerRecipe's GEP flags to use the add recurrence's flags to
prevent propagating unprovable GEP flags like inbounds.

(cherry picked from commit 1d4148821bf96bef23ea77952031e3e7bec26d3a)
DeltaFile
+7-7llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+5-5llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+1-3llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses-unroll.ll
+13-153 files

LLVM/project ed33424clang/test/Driver/print-enabled-extensions aarch64-cortex-a320.c, llvm/lib/Target/AArch64 AArch64Processors.td AArch64Features.td

[AArch64] Remove HCX feature flag from backend (#209477)

This patch removes +hcx option from the llvm and removes guarding of
HCRX_EL2 system register on it.

(cherry picked from commit f48200029bf6277d4fe3915b480a5c87c8f172c9)
DeltaFile
+4-6llvm/lib/Target/AArch64/AArch64Processors.td
+1-6llvm/test/MC/AArch64/armv8.7a-hcx.s
+1-5llvm/test/MC/Disassembler/AArch64/armv8.7a-hcx.txt
+1-4llvm/lib/Target/AArch64/AArch64Features.td
+1-3llvm/lib/Target/AArch64/AArch64SystemOperands.td
+0-2clang/test/Driver/print-enabled-extensions/aarch64-cortex-a320.c
+8-2632 files not shown
+8-5838 files