FreeBSD/ports 682fe3bdevel/py-jep distinfo Makefile

devel/py-jep: Update 4.3.1 => 4.3.2

Changelog:
https://github.com/ninia/jep/releases/tag/v4.3.2

- Replace PORTVERSION with DISTVERSION.
- Fix warnings from portclippy.
- Remove unnecessary CFLAGS and LDFLAGS.
- Replace LN with RLN.

PR:             297600
Sponsored by:   UNIS Labs
Co-authored-by: Vladimir Druzenko <vvd at FreeBSD.org>
DeltaFile
+5-10devel/py-jep/Makefile
+3-3devel/py-jep/distinfo
+8-132 files

Illumos/gate c44e3cbusr/src/lib/fm/topo/modules/common/zen topo_zen_tn.c

18327 zen topo module fails enumeration when hardware threads have no logical CPU
Reviewed by: Robert Mustacchi <rm at fingolfin.org>
Reviewed by: Toomas Soome <tsoome at me.com>
Approved by: Gordon Ross <gordon.w.ross at gmail.com>
DeltaFile
+28-0usr/src/lib/fm/topo/modules/common/zen/topo_zen_tn.c
+28-01 files

Illumos/gate 9ee65b8usr/src/test/i2c-tests/tests/ioctl i2c_ioctl_util.c

18352 i2c ioctl tests race device tree reconfiguration
Reviewed by: Robert Mustacchi <rm at fingolfin.org>
Approved by: Gordon Ross <gordon.w.ross at gmail.com>
DeltaFile
+32-1usr/src/test/i2c-tests/tests/ioctl/i2c_ioctl_util.c
+32-11 files

HardenedBSD/src baacdebshare/examples/mdoc example.4, sys/dev/ciss ciss.c

Merge remote-tracking branch 'rad/hardened/current/master' into hardened/current/pledge
DeltaFile
+72-24sys/dev/sound/pci/hdspe-pcm.c
+27-19share/examples/mdoc/example.4
+13-13sys/dev/sound/pci/hdspe.c
+6-6tools/tools/git/mfc-candidates.lua
+1-10sys/dev/ciss/ciss.c
+7-3usr.bin/yes/yes.c
+126-754 files not shown
+149-7710 files

LLVM/project b9dc5aallvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 long-non-power-of-2.ll abs-mul-buildvector-in-loop.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+15-14llvm/test/Transforms/SLPVectorizer/AArch64/abs-mul-buildvector-in-loop.ll
+15-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-2llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
+34-183 files

HardenedBSD/src 12e57c4share/examples/mdoc example.4, sys/dev/ciss ciss.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+72-24sys/dev/sound/pci/hdspe-pcm.c
+27-19share/examples/mdoc/example.4
+13-13sys/dev/sound/pci/hdspe.c
+6-6tools/tools/git/mfc-candidates.lua
+1-10sys/dev/ciss/ciss.c
+7-3usr.bin/yes/yes.c
+126-754 files not shown
+149-7710 files

HardenedBSD/src 43c743flib/libc/tests/secure generate-fortify-tests.lua fortify_uio_test.c, sys/dev/gve gve_adminq.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+80-20lib/libc/tests/secure/fortify_uio_test.c
+30-20sys/kern/subr_epoch.c
+37-10sys/dev/gve/gve_adminq.c
+18-9lib/libc/tests/secure/generate-fortify-tests.lua
+15-11sys/netinet6/raw_ip6.c
+11-4usr.sbin/bhyve/tpm_intf_crb.c
+191-7497 files not shown
+386-84103 files

LLVM/project 1d46683llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 long-non-power-of-2.ll abs-mul-buildvector-in-loop.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+15-14llvm/test/Transforms/SLPVectorizer/AArch64/abs-mul-buildvector-in-loop.ll
+15-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-2llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
+34-183 files

HardenedBSD/ports 92aba6adevel/py-python-ptrace/files patch-setup__cptrace.py patch-setup.py, devel/reposilite Makefile

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+27-0devel/py-python-ptrace/files/patch-setup__cptrace.py
+27-0devel/py-python-ptrace/files/patch-setup.py
+13-5devel/reposilite/Makefile
+5-7www/libmicrohttpd/Makefile
+4-7dns/libidn/Makefile
+6-3sysutils/pot/Makefile
+82-2225 files not shown
+136-6831 files

LLVM/project b4cf461offload/test/offloading/CUDA basic_launch_blocks_and_threads.cu, offload/test/offloading/HIP basic_launch_blocks_and_threads.hip

[LLVMOffload] Fix unitialized variable in test from #212373 (#216788)

This test was flaky due to using an uninitialized variable, leading to
buildbot failures. This PR initializes it to zero and renames the kernel
to `incrementCounter` to match.
DeltaFile
+5-3offload/test/offloading/HIP/basic_launch_blocks_and_threads.hip
+5-3offload/test/offloading/CUDA/basic_launch_blocks_and_threads.cu
+10-62 files

LLVM/project c730770llvm/lib/CodeGen ModuloSchedule.cpp

ModuloSchedule: Fix using getVRegDef/getUniqueVRegDef on physregs

These should be invalid to use on physical registers, but are currently
permissive. Avoid calling them so in the future they can assert.

Also this pass seems to run in SSA, so shouldn't really be using
getUniqueVRegDef.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+3-1llvm/lib/CodeGen/ModuloSchedule.cpp
+3-11 files

LLVM/project b53468ellvm/include/llvm/CodeGen/GlobalISel MIPatternMatch.h, llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp

AMDGPU: Use mi_match for more manual selector patterns (#216726)

Use mi_match G_SHUFFLE_VECTOR/G_FRAME_INDEX/G_SUB checks. Add new
matchers to check the shufflevector and frame index cases, avoiding
raw getVRegDef uses.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+24-34llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+44-0llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+8-8llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f16.ll
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
+2-2llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
+81-475 files

LLVM/project ace9095offload/languages/kernel/include LanguageUtils.h Stream.h, offload/languages/kernel/src State.cpp

add interal StreamTy
DeltaFile
+242-31offload/languages/kernel/src/State.cpp
+43-7offload/languages/kernel/include/State.h
+34-9offload/test/offloading/CUDA/stream_api.cu
+33-8offload/test/offloading/HIP/stream_api.hip
+33-0offload/languages/kernel/include/Stream.h
+16-1offload/languages/kernel/include/LanguageUtils.h
+401-563 files not shown
+412-669 files

LLVM/project 8e5e9e3llvm/lib/CodeGen MachinePipeliner.cpp

MachinePipeliner: Fix using getUniqueVRegDef on a physical register

Currently this is permissive and doesn't assert when called with
a physical register, but I'm working on changing this edge case.
No current observable change.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+2-0llvm/lib/CodeGen/MachinePipeliner.cpp
+2-01 files

LLVM/project ec85dd4llvm/lib/Target/AMDGPU SIFoldOperands.cpp

AMDGPU: Fix using getVRegDef on a physical register in SIFoldOperands (#216775)

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+3-0llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+3-01 files

LLVM/project ca7ffcaclang/lib/ScalableStaticAnalysis/Core/EntityLinker EntityLinker.cpp, clang/test/Analysis/Scalable/ssaf-linker linking-errors.test linking.test

[clang][ssaf] Link static libraries and multi-arch static libraries (#215349)

This change introduces support for linking static libraries and
multi-arch static libraries. To implement this, we have added two `link`
overloads to the `EntityLinker`: a static library folds in as a bundle
of TU summaries, and a multi-arch static library contributes only the
static library with the matching target triple. The target triple is
supplied through a new optional flag, `--target-triple`. If unspecified,
it is inferred from the first input, if possible.

rdar://184656074
DeltaFile
+295-0clang/tools/clang-ssaf-linker/LinkCLI.cpp
+137-0clang/test/Analysis/Scalable/ssaf-linker/linking.test
+16-118clang/tools/clang-ssaf-linker/SSAFLinker.cpp
+119-6clang/test/Analysis/Scalable/ssaf-linker/linking-errors.test
+111-0clang/tools/clang-ssaf-linker/LinkCLI.h
+78-0clang/lib/ScalableStaticAnalysis/Core/EntityLinker/EntityLinker.cpp
+756-12415 files not shown
+1,058-15421 files

LLVM/project a46df31flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP metadirective-loop.f90

Avoid closely nested barriers in metadirective loops

A loop-associated metadirective replacement can introduce a worksharing or SIMD
loop after semantic analysis, allowing a BARRIER in its associated body to be
lowered with invalid close nesting.

Check the realized OpenMP operation ancestry at the common BARRIER emission
point. Reject the BARRIER when a worksharing or SIMD loop is encountered before
an intervening parallel region. This covers direct BARRIER directives, nested
metadirective replacements and bodies, and runtime-selected paths while
preserving unreachable arms and valid barriers inside parallel regions.

Add OpenMP 5.1 and 5.2 coverage for the rejected and permitted cases.
DeltaFile
+162-0flang/test/Lower/OpenMP/Todo/metadirective-loop-unsupported-replacements.f90
+69-0flang/test/Lower/OpenMP/metadirective-loop.f90
+34-12flang/lib/Lower/OpenMP/OpenMP.cpp
+265-123 files

LLVM/project f6d259fllvm/test/Transforms/SLPVectorizer/AArch64 abs-mul-buildvector-in-loop.ll

[SLP][NFC]Add a test with the missed vectorization opportunity, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/216790
DeltaFile
+110-0llvm/test/Transforms/SLPVectorizer/AArch64/abs-mul-buildvector-in-loop.ll
+110-01 files

LLVM/project 8a6f51ellvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp

AMDGPU: Use mi_match for selector vector-source instruction lookups

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+11-8llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+11-81 files

HardenedBSD/src 4c1004csys/dev/sound/pci hdspe.h hdspe.c

snd_hdspe: Avoid allocation in the interrupt handler

Cache PCM children and drain interrupt callbacks before detach.
Allocate the parent softc by its actual size.

Reviewed by:    br
MFC after:      1 week
Differential Revision:  https://reviews.freebsd.org/D58370
DeltaFile
+72-24sys/dev/sound/pci/hdspe-pcm.c
+13-13sys/dev/sound/pci/hdspe.c
+9-0sys/dev/sound/pci/hdspe.h
+94-373 files

FreeBSD/src 4c1004csys/dev/sound/pci hdspe.h hdspe.c

snd_hdspe: Avoid allocation in the interrupt handler

Cache PCM children and drain interrupt callbacks before detach.
Allocate the parent softc by its actual size.

Reviewed by:    br
MFC after:      1 week
Differential Revision:  https://reviews.freebsd.org/D58370
DeltaFile
+72-24sys/dev/sound/pci/hdspe-pcm.c
+13-13sys/dev/sound/pci/hdspe.c
+9-0sys/dev/sound/pci/hdspe.h
+94-373 files

LLVM/project 5ccbdefllvm/lib/Target/RISCV RISCVInstrInfoSFB.td, llvm/test/CodeGen/RISCV short-forward-branch-opt-zibi.ll

[RISCV] Add HasConditionalMoveFusion Zibi patterns. (#216452)

Assisted-by: Claude
DeltaFile
+240-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-zibi.ll
+4-0llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
+244-02 files

LLVM/project e7b3f73llvm/include/llvm/Transforms/IPO ExpandVariadics.h

[ExpandVariadics] Move NewPM class to RequiredPassInfoMixin (#216597)

This pass is required lowering for most targets that use it during
CodeGen.
DeltaFile
+1-1llvm/include/llvm/Transforms/IPO/ExpandVariadics.h
+1-11 files

LLVM/project 8bab167mlir/include/mlir/Interfaces ControlFlowInterfaces.h, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir] Fix RemoveDeadRegionBranchOpSuccessorInputs producing invalid scf.for

RemoveDeadRegionBranchOpSuccessorInputs builds its tied-value sets from
RegionBranchOpInterface::getSuccessorOperandInputMapping, which is derived from
getSuccessorRegions. For an scf.for with a statically-known trip count of 1,
getSuccessorRegions drops the region->region back edge (the loop provably never
iterates back). That back edge is what forwards a yield operand to the region
iter_args, so without it an iter_arg and its corresponding op result are no
longer tied through a shared operand. The pattern then removes a dead iter_arg
without its (structurally required) result, producing an scf.for with
mismatched loop-carried counts:

    'scf.for' op mismatch in number of loop-carried values and defined values

The greedy driver repairs this on a later iteration (InlineRegionBranchOp folds
the single-trip loop), so it is only observed with
MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS, which verifies the IR after every
pattern application. It shows up across Linalg tiling / pack-unpack /
convolution lowering and scf loop canonicalization; see issue #163599.

    [15 lines not shown]
DeltaFile
+22-7mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+23-1mlir/lib/Dialect/SCF/IR/SCF.cpp
+17-2mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+62-103 files

LLVM/project 9bfcc05utils/bazel/llvm-project-overlay/libc BUILD.bazel, utils/bazel/llvm-project-overlay/libc/test/src/math BUILD.bazel

[bazel] Include Orc/Shared/SPSCI headers in OrcShared target (#216634)

This fixes two active bazel failures:
1. Update `OrcShared` in `llvm/BUILD.bazel` to recursively glob headers
under
`include/llvm/ExecutionEngine/Orc/Shared/**/*.h`.
2. libc float128 failures


Gemini assisted
DeltaFile
+6-0utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
+3-0utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
+1-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+12-15 files

FreeBSD/doc 93292c3documentation/content/en/books/fdp-primer/manual-pages _index.adoc

fdp: Licensing info is in the Licensing Policy
DeltaFile
+1-1documentation/content/en/books/fdp-primer/manual-pages/_index.adoc
+1-11 files

LLVM/project 8b990b7llvm/lib/Target/AArch64 AArch64ISelLowering.h AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 smul_fix_sat.ll

[AArch64] Select sqdmulh for smul.fix.sat with scale == eltbits-1 (#211579)

Follow-up to #209351 (which vectorized the generic expansion): on
AArch64, smul.fix.sat with scale == eltbits-1 is exactly sqdmulh, so
select it directly instead of the generic clamp.
DeltaFile
+40-0llvm/test/CodeGen/AArch64/smul_fix_sat.ll
+20-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1-0llvm/lib/Target/AArch64/AArch64ISelLowering.h
+61-03 files

LLVM/project 266ae6cflang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP metadirective-device-arch.f90 metadirective-block-eager-shared.f90

Remove overbroad metadirective block guards

Block data-environment guards added while hardening loop lowering also reject
valid block variants whose variables are handled by nested constructs or Fortran
scoping. General block DSA and host-association handling is outside this PR's
DO/SIMD replacement scope.

Remove the block-only guards while retaining the loop-associated safety checks.
Use task shared(x) in the architecture-selection test so it does not rely on
implicit task capture.
DeltaFile
+0-197flang/test/Lower/OpenMP/Todo/metadirective-block-data-environment.f90
+0-115flang/lib/Lower/OpenMP/OpenMP.cpp
+0-19flang/test/Lower/OpenMP/metadirective-block-eager-shared.f90
+2-2flang/test/Lower/OpenMP/metadirective-device-arch.f90
+1-1flang/test/Lower/OpenMP/Todo/metadirective-loop-data-environment.f90
+3-3345 files

LLVM/project 0eec3b0flang/test/Lower/OpenMP/Todo metadirective-block-host-association-clause.f90 metadirective-loop-unsupported-replacements.f90

Consolidate metadirective lowering TODO tests
DeltaFile
+101-4flang/test/Lower/OpenMP/Todo/metadirective-loop-data-environment.f90
+74-0flang/test/Lower/OpenMP/Todo/metadirective-loop-iteration-variable.f90
+68-3flang/test/Lower/OpenMP/Todo/metadirective-block-data-environment.f90
+0-60flang/test/Lower/OpenMP/Todo/metadirective-loop-enclosing-data-environment.f90
+52-0flang/test/Lower/OpenMP/Todo/metadirective-loop-unsupported-replacements.f90
+0-37flang/test/Lower/OpenMP/Todo/metadirective-block-host-association-clause.f90
+295-1049 files not shown
+295-29215 files

LLVM/project c00bc4eflang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP/Todo metadirective-loop-unsupported-replacements.f90

Reject trailing content in metadirective loop bodies

Loop-replacement lowering consumes only the associated DO. In a delimited
metadirective, it therefore drops following source statements when a loop variant
is selected, while a NOTHING variant retains them.

Diagnose such bodies until their remaining content can be lowered.  Ignore
PFTBuilder's source-less synthetic CONTINUE and add static and runtime-selection
coverage for OpenMP 5.1 and 5.2.
DeltaFile
+50-2flang/test/Lower/OpenMP/Todo/metadirective-loop-unsupported-replacements.f90
+21-0flang/lib/Lower/OpenMP/OpenMP.cpp
+71-22 files