LLVM/project 045375dclang/include/clang/Basic Cuda.h BuiltinsNVPTX.td, clang/lib/Basic Cuda.cpp

[clang][CUDA] Add new new CUDA and PTX versions (#197992)

PTX 9.1 and 9.2 already exists in LLVM, so this change just plumbs these
versions into clang to allow using newer instructions when we're
compiling with cuda-13.x
DeltaFile
+9-0clang/lib/Driver/ToolChains/Cuda.cpp
+4-2clang/include/clang/Basic/Cuda.h
+1-1clang/include/clang/Basic/BuiltinsNVPTX.td
+2-0clang/lib/Basic/Cuda.cpp
+16-34 files

OPNSense/core b580c68src/etc/inc filter.lib.inc

filter: DHCPv6 server rules for track mode should be excluded in "Identity association" mode, which uses the same field [track6-interface] to determine which interface to bind to. closes https://github.com/opnsense/core/issues/10316
DeltaFile
+1-1src/etc/inc/filter.lib.inc
+1-11 files

LLVM/project 0dd2996llvm/test/TableGen address-space-patfrags.td, llvm/test/TableGen/GlobalISelCombinerEmitter match-table-variadics.td

[TableGen] Resolve GlobalISel strict weak ordering check. (#197071)

This is aiming to resolve:
`llvm-tblgen failed: error executing TdGenerate command llvm-tblgen
-gen-global-isel-combiner '-combiners=AArch64PostLegalizerCombiner'
[...]
llvm-project/llvm/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc`
`strict_weak_ordering_check.h:50: libc++ Hardening assertion
!__comp(*(__first + __a), *(__first + __b)) failed: Your comparator is
not a valid strict-weak ordering`.
DeltaFile
+30-25llvm/test/TableGen/address-space-patfrags.td
+11-11llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-variadics.td
+5-0llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
+46-363 files

LLVM/project 0c18098llvm/lib/DebugInfo/PDB/Native PDBFileBuilder.cpp

Initialize PDBFileBuilder::Strings
DeltaFile
+2-2llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
+2-21 files

OPNSense/core 6c1b8f8src/opnsense/mvc/app/models/OPNsense/Routing Gateways.php

system: fix passing null into getRealInterface()

PR: https://forum.opnsense.org/index.php?topic=51930.0
(cherry picked from commit e80ad1a10630e45746785400807ff8164821b9dc)
DeltaFile
+2-1src/opnsense/mvc/app/models/OPNsense/Routing/Gateways.php
+2-11 files

LLVM/project d6f5793flang-rt/lib/runtime extrema.cpp matmul.cpp

[flang-rt][NFC] Split up expensive .cpp files into multiple files (#198111)

Summary:
This PR simply takes the existing `.cpp` files for the heaviest
implementations and separates them logically, typically between real,
integer, and complex types. The existing `.cpp` file is turned into a
`.h` file and we create new `.cpp` files that *only* contain the old
portion that used `RTDEF`. This allows for far more build system
parallelism, and it also means that static library linking semantics
mean that if the user only uses integer routines the linker will not
include the unused complex / real routines in the final executable.

All around this is a good practice for runtime libraries. Verified that
all `_Fortran` entrypoint routines are still present, port was strictly
mechanical.

The result of all of this is that I can now build `flang-rt` in ~10s
with all threads instead of ~50s due to the most expensive files being
split into parallelizable chunks.
DeltaFile
+0-878flang-rt/lib/runtime/extrema.cpp
+0-478flang-rt/lib/runtime/matmul.cpp
+471-0flang-rt/lib/runtime/matmul.h
+434-0flang-rt/lib/runtime/extrema.h
+0-407flang-rt/lib/runtime/findloc.cpp
+0-378flang-rt/lib/runtime/matmul-transpose.cpp
+905-2,14127 files not shown
+3,385-2,41033 files

LLVM/project d70adc0llvm/lib/DebugInfo/DWARF DWARFExpressionPrinter.cpp, llvm/test/tools/llvm-dwarfdump/NVPTX ptx-register-name.yaml lit.local.cfg

[llvm-dwarfdump] Decode the virtual register names from the dwarf register numbers (#192353)

Backends like `NVPTX` encode virtual register names as the DWARF
register number- the ASCII bytes of the name are concatenated into a
uint64_t.

This change adds fallback logic to decode these dwarf register numbers
into strings.

This improves the readability of Dwarfdump output.
e.g. 
Before the change- 
` DW_AT_location        (DW_OP_regx 0x25726431)`

After the change- 
` DW_AT_location        (DW_OP_regx %rd1)`
DeltaFile
+110-0llvm/test/tools/llvm-dwarfdump/NVPTX/ptx-register-name.yaml
+68-12llvm/lib/DebugInfo/DWARF/DWARFExpressionPrinter.cpp
+58-0llvm/unittests/DebugInfo/DWARF/DWARFExpressionCompactPrinterTest.cpp
+2-0llvm/test/tools/llvm-dwarfdump/NVPTX/lit.local.cfg
+238-124 files

LLVM/project d5ad811llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/RISCV load-store.ll

[SLP] Generate StoreChainContext for all chains for a given base pointer first (#193616)

Rather than generating the chains for a `RelatedStoreInsts` worth of
stores at a time and then vectorizing that group, create the
StoreChainContext for all chains in all `RelatedStoreInsts`, and then
vectorize at the end.

Will allow easier integration with runtime strided stores since those
will exist across `RelatedStoreInsts`.

Bigger VF chains are now attempted before smaller VF chains across all
`RelatedStoreInsts` groups for a base value type, so some behavioral
changes in the vectorization of overlapping chains as the relative order
in which we attempt to vectorize them may have changed (longer before
shorter).
DeltaFile
+17-28llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-10llvm/test/Transforms/SLPVectorizer/RISCV/load-store.ll
+21-382 files

FreeBSD/src be4f245sys/dev/sound/pcm ac97.c, sys/dev/thunderbolt tb_pcib.c

sys: Use is_pci_device instead of checking device or devclass names

Reviewed by:    bz, imp
Sponsored by:   Chelsio Communications
Differential Revision:  https://reviews.freebsd.org/D56998
DeltaFile
+2-5sys/dev/thunderbolt/tb_pcib.c
+1-1sys/dev/sound/pcm/ac97.c
+3-62 files

FreeBSD/src 6dc8133sys/arm64/iommu smmu.c, sys/dev/bge if_bge.c

sys: Use is_pci_device instead of direct comparisons to devclasses

Reviewed by:    bz
Sponsored by:   Chelsio Communications
Differential Revision:  https://reviews.freebsd.org/D56997
DeltaFile
+8-24sys/dev/iommu/busdma_iommu.c
+3-10sys/x86/iommu/intel_drv.c
+3-10sys/dev/bge/if_bge.c
+2-8sys/dev/pci/pci.c
+2-7sys/dev/vnic/thunder_bgx_fdt.c
+2-4sys/arm64/iommu/smmu.c
+20-636 files not shown
+29-8312 files

FreeBSD/src ffcf5e3share/man/man9 pci.9 Makefile, sys/dev/pci pci.c pcivar.h

pci: Add is_pci_device helper function

This returns true if a given device is a PCI device (child of a PCI
bus).

Reviewed by:    bz, kib
Sponsored by:   Chelsio Communications
Differential Revision:  https://reviews.freebsd.org/D56996
DeltaFile
+10-1share/man/man9/pci.9
+11-0sys/dev/pci/pci.c
+2-1share/man/man9/Makefile
+1-0sys/dev/pci/pcivar.h
+24-24 files

LLVM/project a11ca82clang/lib/CodeGen/TargetBuiltins ARM.cpp

[clang][AArch64][NFC] Remove redundant bitcasts in builtin codegen (#196988)

Update CodeGen for the ACLE AdvSIMD “extract one element from vector”
builtins to avoid emitting unnecessary bitcasts:

* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#extract-one-element-from-vector

The existing tests continue to cover the generated IR and require no
updates, confirming that this is an NFC cleanup.

This is similar to #195825.
DeltaFile
+0-28clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+0-281 files

FreeNAS/freenas a50f509src/middlewared/middlewared/plugins etc.py

NAS-141091 / 27.0.0-BETA.1 / Remove duplicate grub render at boot (#18970)

This commit fixes an issue where on boot two listeners on the
`system.ready` event both rendered grub:
`etc.generate_checkpoint(POST_INIT)` (via `etc.py`) and
`grub_config._reconcile`. Both invoked `write_grub_config` and
`grub-mkconfig` concurrently, racing on `/boot/grub/grub.cfg.tmp(.new)`
and occasionally producing the "grub-mkconfig error: Generating grub
configuration file ..." failure with no diagnostic stderr.

The grub entry is now registered with `checkpoint=None`, so it is
skipped during checkpoint-driven boot generation. `_reconcile` becomes
the sole boot-time path and only invokes `grub-mkconfig` when
`truenas.cfg` content actually changes. Runtime triggers in
`system_advanced/serial.py` and `system_vendor/vendor.py` (which call
`etc.generate('grub')` directly, without a checkpoint) are unaffected,
as is HA propagation via `failover.call_remote('etc.generate',
['grub'])`.
DeltaFile
+1-1src/middlewared/middlewared/plugins/etc.py
+1-11 files

FreeBSD/src 6a043d0sys/compat/linuxkpi/common/include/linux pci.h

LinuxKPI: Check the devclass of the parent device in dev_is_pci

Reviewed by:    bz
Fixes:          c41d83548b6c ("LinuxKPI: pci.h add more defines and functions")
Sponsored by:   Chelsio Communications
Differential Revision:  https://reviews.freebsd.org/D57066
DeltaFile
+2-2sys/compat/linuxkpi/common/include/linux/pci.h
+2-21 files

FreeBSD/ports c7f01dagraphics/zathura-pdf-poppler distinfo Makefile

graphics/zathura-pdf-poppler: Update to 2026.05.10

https://pwmt.org/projects/zathura-pdf-poppler/changelog/2026.05.10/index.html

PR:             295209
Approved by:    fluffy (mentor)
DeltaFile
+3-3graphics/zathura-pdf-poppler/distinfo
+1-2graphics/zathura-pdf-poppler/Makefile
+4-52 files

FreeBSD/ports d4424d4graphics/zathura-djvu distinfo Makefile

graphics/zathura-djvu: Update to 2026.05.10

https://pwmt.org/projects/zathura-djvu/changelog/2026.05.10/index.html

PR:             295209
Approved by:    fluffy (mentor)
DeltaFile
+3-3graphics/zathura-djvu/distinfo
+1-1graphics/zathura-djvu/Makefile
+4-42 files

FreeBSD/ports 07e7eb3graphics/zathura-cb distinfo Makefile, graphics/zathura-cb/files patch-meson.build

graphics/zathura-cb: Update to 2026.05.10

https://pwmt.org/projects/zathura-cb/changelog/2026.05.10/index.html

PR:             295209
Approved by:    fluffy (mentor)
DeltaFile
+6-6graphics/zathura-cb/files/patch-meson.build
+3-3graphics/zathura-cb/distinfo
+1-1graphics/zathura-cb/Makefile
+10-103 files

FreeBSD/ports 34ea16fgraphics/zathura distinfo Makefile

graphics/zathura: Update to 2026.05.11

https://pwmt.org/projects/zathura/changelog/2026.05.10/index.html
https://pwmt.org/projects/zathura/changelog/2026.05.11/index.html

PR:             295208
Approved by:    quentin.stievenart at gmail.com (maintainer)
Approved by:    fluffy (mentor)
DeltaFile
+3-3graphics/zathura/distinfo
+1-1graphics/zathura/Makefile
+4-42 files

LLVM/project 20d89acmlir/test/Dialect/MemRef emulate-narrow-type-cf.mlir emulate-narrow-type-cf-types.mlir, mlir/test/lib/Dialect/MemRef TestEmulateNarrowType.cpp CMakeLists.txt

[MLIR][test] Add lit coverage for cf.br/cond_br/switch under narrow-type emulation (#198053)

Wires `cf::populateCFStructuralTypeConversionsAndLegality` into the
in-tree `TestEmulateNarrowType` pass and adds lit coverage that
exercises `cf.br` / `cf.cond_br` / `cf.switch` operand and successor
block-argument rewriting when emulating sub-byte element types:

* `memref<NxiW>` carried across `cf.br` / `cf.cond_br` / `cf.switch`.
* Sub-byte integer scalars across `cf.br`.
* Sub-byte integer vectors across `cf.br`.

This PR initially added thin wrapper functions
(`memref::populateMemRefNarrowTypeEmulationCFPatterns`,
`vector::populateVectorNarrowTypeEmulationCFPatterns`) over
`cf::populateCFStructuralTypeConversionsAndLegality`. Per review
feedback those wrappers were redundant, so callers (including the
in-tree test pass) now call
`cf::populateCFStructuralTypeConversionsAndLegality`
directly. Net contribution is the test-pass plumbing and the new lit
tests demonstrating that the existing cf structural type conversion
correctly handles narrow-type-emulated values.
DeltaFile
+78-0mlir/test/Dialect/MemRef/emulate-narrow-type-cf.mlir
+38-0mlir/test/Dialect/MemRef/emulate-narrow-type-cf-types.mlir
+8-3mlir/test/lib/Dialect/MemRef/TestEmulateNarrowType.cpp
+1-0mlir/test/lib/Dialect/MemRef/CMakeLists.txt
+125-34 files

OpenBSD/src tnkPASRusr.sbin/bgpctl bgpctl.c

   In res_to_flowspec enforce the FLOWSPEC_SIZE_MAX limit for a single rule.

   OK tb@
VersionDeltaFile
1.321+3-1usr.sbin/bgpctl/bgpctl.c
+3-11 files

OpenBSD/src BI2DdF8usr.sbin/bgpd parse.y rde_prefix.c

   Introduce a maximum size for a single flowspec NLRI of 4000 bytes.

   Enforce this in both in the parser but also in the RDE.
   In the RDE flowspec_valid() will error out if the lenght is too long
   but also pt_get_flow() and pt_add_flow() will error out.
   The fixed buffer in pt_get_flow() is now sized appropriately instead
   of using a arbitrary size.

   OK tb@
VersionDeltaFile
1.498+10-3usr.sbin/bgpd/parse.y
1.62+10-2usr.sbin/bgpd/rde_prefix.c
1.6+5-1usr.sbin/bgpd/flowspec.c
1.543+2-1usr.sbin/bgpd/bgpd.h
+27-74 files

LLVM/project 9bc88acllvm/include/llvm/Transforms/IPO InstrumentorUtils.h, llvm/lib/Transforms/IPO InstrumentorUtils.cpp InstrumentorStubPrinter.cpp

[Instrumentor] Provide source location to runtime calls

To allow runtime calls to inspect the source location of the
instrumentation opportunity, we encode it in the module. This allows the
use in all environments, e.g., on GPUs, which might lack runtime dwarf
reading or libunwind. The stub printer is extended to make handling with
the encoded location information easy.
DeltaFile
+189-0llvm/lib/Transforms/IPO/InstrumentorUtils.cpp
+90-36llvm/test/Instrumentation/Instrumentor/default_rt.c
+99-4llvm/lib/Transforms/IPO/InstrumentorStubPrinter.cpp
+98-0llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h
+64-0llvm/test/Instrumentation/Instrumentor/default_rt.h
+45-15llvm/test/Instrumentation/Instrumentor/rt_config.json
+585-556 files not shown
+742-10712 files

FreeBSD/ports cb7d79ewww/firefox-esr/files patch-bug2023597

www/firefox-esr: enable configure with llvm 22

from clang 22.1 the target formerly known as wasm32-wasi is now
named wasm32-wasip1

Upstream: https://bugzilla.mozilla.org/show_bug.cgi?id=2023597

PR:             295332
Reported by:    Chad Jacob Milios
DeltaFile
+25-0www/firefox-esr/files/patch-bug2023597
+25-01 files

FreeBSD/ports 155b962mail/thunderbird-esr/files patch-bug2023597

mail/thunderbird-esr: enable configure with llvm 22

from clang 22.1 the target formerly known as wasm32-wasi is now
named wasm32-wasip1

Upstream: https://bugzilla.mozilla.org/show_bug.cgi?id=2023597

PR:                             295332
Reported by:    Chad Jacob Milios
DeltaFile
+25-0mail/thunderbird-esr/files/patch-bug2023597
+25-01 files

OpenZFS/src 3f44da7. README.md, .github/workflows zfs-qemu.yml

CI: remove FreeBSD 13.5 (EOL April 30, 2026)

FreeBSD 13.5 and stable/13 reached End-of-Life on April 30, 2026 and no
longer receive security support, so they fall outside README.md's stated
support policy.

Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Christos Longros <chris.longros at gmail.com>
Closes #18553
DeltaFile
+0-17.github/workflows/scripts/qemu-2-start.sh
+3-3.github/workflows/zfs-qemu.yml
+1-1README.md
+4-213 files

LLVM/project df6994dllvm/include/llvm/CodeGen/GlobalISel CombinerHelper.h, llvm/include/llvm/Target/GlobalISel Combine.td

[AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (#192866)

This patch adds GlobalISel pre-legalizer combines to pattern-match and
optimize average operations, bringing GlobalISel on par with
SelectionDAG.

Specifically, it matches:
- `(a + b) >> 1` into `G_UAVGFLOOR` / `G_SAVGFLOOR`
- `(a + b + 1) >> 1` into `G_UAVGCEIL` / `G_SAVGCEIL`

Support is included for both scalar and vector types, correctly handling
constants and splat vectors via `isOneOrOneSplat()`. This builds upon
the generic opcodes introduced for AArch64 intrinsics lowering and
enables optimal emission of Neon instructions (e.g., `urhadd`, `shadd`)
directly from generic IR.

Fixes #118083
DeltaFile
+337-0llvm/test/CodeGen/AArch64/GlobalISel/combine-avg.mir
+84-218llvm/test/CodeGen/AArch64/arm64-vhadd.ll
+26-92llvm/test/CodeGen/AArch64/hadd-combine.ll
+50-1llvm/include/llvm/Target/GlobalISel/Combine.td
+13-0llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+3-0llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+513-3116 files

LLVM/project e383eb9llvm/lib/Transforms/IPO InstrumentorStubPrinter.cpp Instrumentor.cpp, llvm/test/Instrumentation/Instrumentor default_rt.h rt_config.json

[Instrumentor] Improve stub printer (for C/C++ and value packs)

The stub printer now emits a helper header to deal with value packs (in
C and C++). We also make the files C/C++ compatible and use the proper
format strings for int32_t and int64_t.
DeltaFile
+410-5llvm/lib/Transforms/IPO/InstrumentorStubPrinter.cpp
+264-0llvm/test/Instrumentation/Instrumentor/default_rt.h
+190-2llvm/test/Instrumentation/Instrumentor/rt_config.json
+124-0llvm/test/Instrumentation/Instrumentor/default_rt.c
+0-37llvm/test/Instrumentation/Instrumentor/default_rt
+7-6llvm/lib/Transforms/IPO/Instrumentor.cpp
+995-504 files not shown
+1,004-5110 files

FreeNAS/freenas 08a4085src/middlewared/middlewared main.py, src/middlewared/middlewared/api/base/server event.py doc.py

draft
DeltaFile
+60-1src/middlewared/middlewared/api/base/server/event.py
+22-18src/middlewared/middlewared/main.py
+17-8src/middlewared/middlewared/api/base/server/doc.py
+99-273 files

LLVM/project 4046dc4llvm/cmake/modules CrossCompile.cmake

Make sure optional components are excluded (#187824)

Extends a fix from
https://github.com/llvm/llvm-project/commit/b1e92f8def98c5e34fdb3b4c18ac16d65fb613a2
to examples and docs, both of which may be missing but are
unconditionally included if missing

This fixes an issue where the Chapel team vendors LLVM (and subsequently
deletes directories like docs and examples for smaller file sizes), but
if those directories are missing the build will fail

Signed-off-by: Jade Abraham <jademabraham17 at gmail.com>
DeltaFile
+2-0llvm/cmake/modules/CrossCompile.cmake
+2-01 files

NetBSD/pkgsrc R9C5QmAgames/naev PLIST

   naev: fixed PLIST
VersionDeltaFile
1.6+3-3games/naev/PLIST
+3-31 files