LLVM/project 05daa3dlibc/src/complex/generic cargf.cpp carg.cpp, libc/test/src/complex CArgTest.h cargf_test.cpp

[libc][complex] Add cargf and carg functions to libc complex math (#204087)

This PR adds carg and cargf function to libc complex and also add test
cases to cover some special inputs.

---------

Signed-off-by: jinge90 <ge.jin at intel.com>
DeltaFile
+107-0libc/test/src/complex/CArgTest.h
+37-0libc/test/src/complex/cargf_test.cpp
+36-0libc/test/src/complex/carg_test.cpp
+27-0libc/src/complex/generic/cargf.cpp
+27-0libc/src/complex/generic/carg.cpp
+27-0libc/src/complex/generic/CMakeLists.txt
+261-014 files not shown
+370-120 files

FreeBSD/src f6cb220sys/x86/cpufreq hwpstate_intel.c

hwpstate_intel(4): Fix error tests

How I failed to notice this during the review will remain a mistery.

Fixes:          29b8220b179b ("hwpstate_intel: Use ipi instead of thread_lock + sched_bind")
Event:          Halifax Hackathon 202606
Location:       jrm@'s bathroom
Sponsored by:   The FreeBSD Foundation
DeltaFile
+19-13sys/x86/cpufreq/hwpstate_intel.c
+19-131 files

FreeBSD/src e4fdaaacrypto/heimdal/appl/login login.1, crypto/heimdal/appl/telnet/telnet telnet.1

heimdal: Fix some manpage typos

Reviewed by:    hrs
Event:          Halifax Hackathon 202606
Location:       jrm@'s couch
DeltaFile
+1-1crypto/heimdal/appl/telnet/telnet/telnet.1
+1-1crypto/heimdal/appl/login/login.1
+2-22 files

FreeBSD/ports c61eb39devel/sem distinfo Makefile

devel/sem: Update to 0.14.1
DeltaFile
+3-3devel/sem/distinfo
+1-1devel/sem/Makefile
+4-42 files

FreeBSD/src 5f43a84. .git-blame-ignore-revs

.git-blame-ignore-revs: sys/kern/kern_cpu.c whitespace changes

Event:          Halifax Hackathon 202606
Location:       jrm@'s kitchen
Sponsored by:   The FreeBSD Foundation
DeltaFile
+2-0.git-blame-ignore-revs
+2-01 files

FreeBSD/ports 79e6131security/py-python-gvm Makefile

security/py-python-gvm: Add missing BUILD_DEPENDS entry
DeltaFile
+2-1security/py-python-gvm/Makefile
+2-11 files

FreeBSD/ports 090a3bfsecurity/py-greenbone-feed-sync Makefile

security/py-greenbone-feed-sync: Add missing dependency
DeltaFile
+2-1security/py-greenbone-feed-sync/Makefile
+2-11 files

FreeBSD/src 3525528sys/kern kern_cpu.c

cpufreq: Fix the incorrect format

Event:          Halifax Hackathon 202606
Location:       jrm@'s dining room
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D57275
DeltaFile
+3-3sys/kern/kern_cpu.c
+3-31 files

FreeBSD/ports 42d1cf1devel/tig distinfo Makefile

devel/tig: Update to 2.6.1

https://raw.githubusercontent.com/jonas/tig/refs/tags/tig-2.6.1/NEWS.adoc

PR:             296238
Approved by:    0mp (maintainer)
Approved by:    fluffy (mentor)
MFH:            2026Q2

(cherry picked from commit 3e226ce7be7dada9414e2ae3a7a13fe870f43053)
DeltaFile
+3-3devel/tig/distinfo
+1-1devel/tig/Makefile
+4-42 files

FreeBSD/ports 6e475f0net/kea pkg-plist distinfo, net/kea/files patch-meson.build patch-src_lib_asiodns_io__fetch.h

net/kea: Update 3.0.3 => 3.2.0

Release Notes:
https://gitlab.isc.org/isc-projects/kea/-/wikis/Release-Notes/release-notes-3.2.0

Upgrading:
https://kb.isc.org/docs/things-to-be-aware-of-when-upgrading-to-kea-3-2

PR:             296258
Sponsored by:   UNIS Labs
DeltaFile
+86-61net/kea/pkg-plist
+12-21net/kea/files/patch-meson.build
+0-10net/kea/files/patch-src_lib_asiodns_io__fetch.h
+4-4net/kea/files/patch-src_bin_keactrl_meson.build
+4-4net/kea/files/patch-src_lib_asiolink_interval__timer.h
+3-3net/kea/distinfo
+109-1031 files not shown
+110-1047 files

FreeBSD/src 7b10734sys/x86/cpufreq hwpstate_amd.c

hwpstate_amd(4): Rename remaining 'struct set_autonomous_hwp_data'

For consistency.

No functional change (intended).

Fixes:          c6a0eb7ada62 ("hwpstate_amd(4): Rename '*set_autonomous_hwp*()' => 'enable_cppc*()'")
Event:          Halifax Hackathon 202606
Location:       jrm@'s living room
Sponsored by:   The FreeBSD Foundation
DeltaFile
+3-3sys/x86/cpufreq/hwpstate_amd.c
+3-31 files

FreeBSD/ports 3e226cedevel/tig distinfo Makefile

devel/tig: Update to 2.6.1

https://raw.githubusercontent.com/jonas/tig/refs/tags/tig-2.6.1/NEWS.adoc

PR:             296238
Approved by:    0mp (maintainer)
Approved by:    fluffy (mentor)
MFH:            2026Q2
DeltaFile
+3-3devel/tig/distinfo
+1-1devel/tig/Makefile
+4-42 files

LLVM/project 1fadc09mlir/lib/Dialect/XeGPU/IR XeGPUDialect.cpp, mlir/test/Dialect/XeGPU propagate-layout-subgroup.mlir

[MLIR][XeGPU] Fix order remapping in layout transpose (#205212)

LayoutAttr::transposeDims and LayoutAttr::isTransposeOf mishandled the
`order` field when transposing a layout. The `order` field is
fundamentally different from the size-valued fields (sg_layout, sg_data,
inst_data, lane_layout, lane_data): its values are dimension indices
(order[0] is the fastest-varying dim), not per-position sizes. The two
require different transpose rules:
    - Size fields — reindex by position: new[i] = orig[perm[i]]
- order — relabel values through the inverse permutation: newOrder[i] =
inversePerm[origOrder[i]]

Both functions incorrectly applied the size-field rule to `order`.
Because the bug was applied consistently in both places, it stayed
hidden for trivial/symmetric (e.g. 2D [1,0]) permutations, where the two
rules happen to coincide. It only surfaces for non-trivial permutations
such as the 3D [1,0,2] produced by a broadcast→transpose chain.
   
   Assist-by-Claude

    [3 lines not shown]
DeltaFile
+36-5mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
+19-0mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+55-52 files

FreeBSD/src d082115lib/libsys kqueue.2

kqueue.2: knote is activated as the first action of tdsendsignal()

(cherry picked from commit df8ca3f89aa2b2c374886cc39b24c76796d7db9a)
DeltaFile
+1-1lib/libsys/kqueue.2
+1-11 files

FreeBSD/src b4bbe15sys/amd64/amd64 exception.S

amd64: do not restore fsbase/gsbase for 32bit processes

(cherry picked from commit c7e5802ab6e6230a5782a09c914585d055eb5223)
DeltaFile
+31-0sys/amd64/amd64/exception.S
+31-01 files

FreeBSD/src 41e974asys/x86/x86 ucode.c

x86/ucode.c: supposedly fix i386 compilation

PR:     295926

(cherry picked from commit f4cd99131c70e8be2a793d939b644e20bbbd3374)
DeltaFile
+1-1sys/x86/x86/ucode.c
+1-11 files

FreeBSD/src b94b531sys/dev/efidev efirt.c

efirt(9): carefully destroy efi_lock

(cherry picked from commit 8edcb37dd0753dc7e50044d9ccf0e991392a3d84)
DeltaFile
+7-5sys/dev/efidev/efirt.c
+7-51 files

FreeBSD/src 9817261sys/dev/efidev efirt.c

efirt(9): in verbose mode, announce the attachment and fw spec version

(cherry picked from commit 43fb5b33b00f3b66ec03ab3e0ea002afd16cb7b3)
DeltaFile
+8-1sys/dev/efidev/efirt.c
+8-11 files

LLVM/project 4efc6efllvm/lib/Target/RISCV RISCVAsmPrinter.cpp, llvm/test/CodeGen/RISCV option-arch-experimental.ll

[RISCV] Emit .option arch extensions without the "experimental-" prefix (#205471)

We currently emit the "experimental-" prefix in .option arch, e.g.
`.option arch, +experimental-zicfiss`, but the assembler can't parse
that back.

There are two ways to fix this:

1. Teach the assembler to accept `.option arch, +experimental-zicfiss`.
2. Emit `.option arch, +zicfiss` instead of `.option arch,
+experimental-zicfiss`.

This patch takes the second approach, which better fits the .option arch
syntax we defined. Experimental extensions are still guarded by
`-menable-experimental-extensions`.
DeltaFile
+13-0llvm/test/CodeGen/RISCV/option-arch-experimental.ll
+3-1llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+16-12 files

FreeBSD/src 3a3d121sys/fs/nfsclient nfs_clvnops.c

nfs_clvnops.c: Fix the case where va_flags are being cleared

Commits c5d72d2 and 3b6d4c6 broke the case where the
archive/hidden/system attributes are being set false
(UF_ARCHIVE, UF_HIDDEN or UF_SYSTEM bits being cleared.)
and the NFS server does not support those attributes.
These patches only checked for support if the
archive/hidden/system attributes were non-zero.

This patch fixes the problem.

PR:     296088

(cherry picked from commit 572680712c317b81d66475203ac1b9d6bbeca5d5)
DeltaFile
+3-6sys/fs/nfsclient/nfs_clvnops.c
+3-61 files

LLVM/project 39ed392llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/RISCV rvp-srl-bitcast-bv.ll

[DAG] Fix illegal type in srl(bitcast(build_vector)) fold (#205074)

The fold

```
  (srl (bitcast (build_vector e1, ..., eN)), (N-1) * eltsize) -> (zext eN)
```

added in #181412 built the result through a narrow element integer type,
which
can be illegal (e.g. i16 on RV32 with the P extension, where `<2 x i16>`
is
legal). When the fold runs in the last DAG combine that illegal type
hits the
"Unexpected illegal type!" assert.

Build the result directly in the result type `VT` and mask off the high
bits
instead:

    [13 lines not shown]
DeltaFile
+36-0llvm/test/CodeGen/RISCV/rvp-srl-bitcast-bv.ll
+4-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+40-32 files

LLVM/project 89ac672libclc/clc/lib/nvptx CMakeLists.txt, libclc/clc/lib/nvptx/relational clc_isinf.cl

[libclc] Delete wrong implementation nvptx clc_isinf (#205699)

The file calls __nv_isinf which return 1 for true on vector input, while
the generic clc_isinf which return -1 for true on vector input. Using
nvptx clc_isinf in OpenCL isinf violates OpenCL spec.

Found the issue in https://github.com/intel/llvm/pull/22413
DeltaFile
+0-33libclc/clc/lib/nvptx/relational/clc_isinf.cl
+0-1libclc/clc/lib/nvptx/CMakeLists.txt
+0-342 files

FreeBSD/ports 92a0eb6graphics/mesa-devel distinfo Makefile

graphics/mesa-devel: update to 26.1.b.3676

Changes:        https://gitlab.freedesktop.org/mesa/mesa/-/compare/9dbe8846f5f...68468b6d1b9
DeltaFile
+3-3graphics/mesa-devel/distinfo
+2-2graphics/mesa-devel/Makefile
+5-52 files

FreeBSD/ports cfa4364games/veloren-weekly distinfo Makefile.crates, games/veloren-weekly/files patch-gilrs

games/veloren-weekly: update to s20260624

Changes:        https://gitlab.com/veloren/veloren/-/compare/ef31455955...3addf722cd
DeltaFile
+38-173games/veloren-weekly/files/patch-gilrs
+27-17games/veloren-weekly/distinfo
+12-7games/veloren-weekly/Makefile.crates
+2-2games/veloren-weekly/Makefile
+79-1994 files

FreeBSD/ports fa31695benchmarks/clpeak distinfo Makefile

benchmarks/clpeak: update to 2.0.14

Changes:        https://github.com/krrishnarraj/clpeak/releases/tag/2.0.14
Reported by:    GitHub (watch releases)
DeltaFile
+3-3benchmarks/clpeak/distinfo
+4-1benchmarks/clpeak/Makefile
+7-42 files

NetBSD/src Bi7FMIktests/usr.bin/netpgpverify t_netpgpverify.sh

   netpgpverify(1): Mark DSA test broken on sparc too.

   PR bin/59823: netpgpverify broken for PGP since switch to gcc 14.3
VersionDeltaFile
1.9+2-2tests/usr.bin/netpgpverify/t_netpgpverify.sh
+2-21 files

NetBSD/src shfk51ftests/usr.bin/c++ t_static_destructor.sh t_call_once.sh

   tests/usr.bin/c++: Fix a few xfails.

   PR toolchain/59710: various pic profile tests are failing and/or broken
VersionDeltaFile
1.14+12-2tests/usr.bin/c++/t_static_destructor.sh
1.11+7-1tests/usr.bin/c++/t_call_once.sh
1.11+7-1tests/usr.bin/c++/t_cxxruntime.sh
+26-43 files

LLVM/project f4a1491llvm/include/llvm/Target TargetLoweringObjectFile.h, llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp

[x86] Handle implicit sections when determining if a global is large (#204247)

Just like explicit sections.

We were seeing globals with implicit sections marked large under the
medium code model.

Assisted-by: Gemini
DeltaFile
+134-0llvm/test/CodeGen/X86/large-implicit-section.ll
+5-24llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+14-8llvm/lib/Target/TargetMachine.cpp
+19-0llvm/lib/Target/TargetLoweringObjectFile.cpp
+5-0llvm/include/llvm/Target/TargetLoweringObjectFile.h
+177-325 files

FreeBSD/src 39975c7sys/x86/cpufreq hwpstate_intel.c

hwpstate_intel(4): sysctl_epp_select(): Cache again new EPP value

This caching was removed inadvertently in the commit mentioned below.

Fixes:          8452afeb5682 ("hwpstate_intel: Use 8bit scale instead of percentage scale")
Event:          Halifax Hackathon 202606
Location:       jrm@'s living room
Sponsored by:   The FreeBSD Foundation
DeltaFile
+5-5sys/x86/cpufreq/hwpstate_intel.c
+5-51 files

FreeBSD/src 0143a40sys/x86/cpufreq hwpstate_intel.c

hwpstate_intel(4): Fix recent copyright formatting

Add an "empty" (comment) line between copyright and the Foundation text.

Fixes:          29b8220b179b ("hwpstate_intel: Use ipi instead of thread_lock + sched_bind")
Event:          Halifax Hackathon 202606
Location:       jrm@'s living room
Sponsored by:   The FreeBSD Foundation
DeltaFile
+1-0sys/x86/cpufreq/hwpstate_intel.c
+1-01 files