[mlir][IR] Add builtin mxi8 element type (#230479)
Add the builtin mxi8 type (MXI8Type) for the INT8 data element of the
OCP
MXINT8 block format. It uses signed 8-bit storage with six fractional
bits
and exposes the corresponding LLVM fixed-point semantics. The shared
E8M0 block scale is separate from this scalar type.
Add text and bytecode support, permit vector and tensor elements, and
encode dense elements through signless i8 attributes. Support hex-string
input for dense and sparse elements, including splats, with raw-buffer
size validation. Append the new bytecode type code so existing codes
retain their values.
Test text and bytecode round trips, raw storage endpoints, sparse zero
values, hex input and invalid buffer sizes, and fixed-point semantics.
See the Open Compute Project (OCP) MX specification:
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[GlobalOpt] Remove unnecessary call-site-only extends (#240384)
If signext/zeroext is only present on the call-site (but not on the
exact definition), then we can drop the call-site extend, as the
definition will not assume that it has happened.
This kind of asymmetric extension will be used on x86 by
https://github.com/llvm/llvm-project/pull/236450.
[Lint] Allow zeroext/signext on call-site only (#240406)
If zeroext/signext is only present at the call-site (but not on the
function), this means that the caller will extend, while the callee does
not assume extension. In this case, the extension is redundant, but
well-defined.
This kind of asymmetric extension will be used on x86 by
https://github.com/llvm/llvm-project/pull/236450.
[CI] Add /compile-time PR comment command (#233104)
This adds a `/compile-time` command that can be posted in PR comments,
similar to the existing `/test-suite`. The goal here is to allow simple
testing of PRs on https://llvm-compile-time-tracker.com/ without the
need to have your remote added to the compile-time tracker or pushing
someone else's diff to a branch. The use of the command is restricted to
members of llvm-committers.
The way this works is that the PR diff gets pushed to a `perf/pr-NNNNNN`
branch on the https://github.com/llvmbot/llvm-project fork, where the
compile-time tracker will pick it up in due time. For now, there's going
to be no response on the PR -- that's something I'd have to implement on
the server side.
(An earlier version used a separate
https://github.com/llvm-compile-time-bot/llvm-project fork instead,
which would require a separate LLVM_COMPILE_TIME_BOT_TOKEN access token.
I went with reusing the existing fork for now to simplify token
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users: api: add descriptions (#11167)
* users: api: add descriptions
* v2
* users: api: add descriptions and created timestamps, refactor https://github.com/opnsense/core/pull/11056
(work in progress)
* users: api: add descriptions and created timestamps, refactor https://github.com/opnsense/core/pull/11056
final bits and pieces.
The 27.1 release should remove some actions as mentioned in the comments, rest should work as planned, performance might not be the highest in the world, but given the expected request volume that's unlikely an issue.
* Apply suggestion from @fichtner
Co-authored-by: Franco Fichtner <franco at opnsense.org>
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[IR] Fix vp.udiv and friends introducing UB during expansion
vp.udiv/vp.sdiv/vp.urem/vp.srem only have UB if a divison by zero/overflow occurs, even if the mask contains poison. E.g. `vp.udiv x, <1, 1, 1, 1>, mask=<poison, poison, poison, poison>, evl=4` should be poison, but shouldn't be UB.
When vp.udiv/vp.sdiv/vp.urem/vp.srem are expanded, they're expanded to a safe divisor like `udiv op0, (select mask, op1, 1)`.
If one of the mask lanes is poison then the new divisor is poison, which is immediate UB. We need to freeze mask to prevent propagation.
It's possible to add a combine to avoid the x86 codegen regression but I don't think it's worth it. The loop vectorizer doesn't emit VP intrinsics on x86, nor will any other middle end pass.
masked.udiv and co. may also have the same problem at the SelectionDAG expansion level now that we're starting to represent poison semantics there.
CodeGen: Handle uses in unreachable blocks in LiveIntervals (#236894)
Previously LiveIntervals had the unenforced assumption that the
function does not contain any unreachable blocks. A register which had
a definition somewhere but also a use in an unreachable block would
hit a "Use not jointly dominated by defs" assertion.
Avoiding no-unreachable-blocks as a hard requirement avoids assertions
in some pass configuration edge cases. In particular when the
MachinePipeliner is enabled in an optimized pipeline there could still
be unreachable blocks in an optnone function which would hit the
assert. Not handling unreachable blocks was also a large problem for
llvm-reduce's MIR support and was one of the main obstacles to landing
a basic block reduction.
Give a value live into an unreachable block a phi-def at the start of
the block, using the dominator tree to identify unreachable blocks.
ConnectedVNInfoEqClasses::Classify joins a component made only of
phi-defs in unreachable blocks with a component that has a real def;
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py-acme py-certbot*: updated to 5.9.0
5.9.0
Added
Added an OCI image source label to Docker images, allowing third-party tools such as Renovate to discover the source repository.
Fixed
Fixes a bug where certbot would sometimes incorrectly pass failed SANs as successfully renewed SANs to renewal hooks.
The account to deactivate is selected before Certbot asks for irreversible deactivation confirmation.
[AMDGPU][GISel] Add RegBankLegalize rule for G_STACKRESTORE (#239502)
`G_STACKRESTORE` had no `AMDGPURegBankLegalize` rule, so
`llvm.stackrestore.p5` fails with "No AMDGPU `RegBankLegalize` rules
defined for opcode".
Map the `p5` operand with `SgprB32_ReadFirstLane`, matching
`AMDGPURegisterBankInfo` mapping and the `SReg_32` requirement in
`selectStackRestore`.
[Coroutines] Rebase ptrtoint/ptrtoaddr of frame allocas created before coro.begin (#240036)
insertSpills recreates GEP, bitcast, phi and select aliases of a frame
alloca that are created before coro.begin, but not ptrtoint/ptrtoaddr,
so those keep the address of the dead stack slot. LoopIdiomRecognize
can introduce such a ptrtoint through SCEVExpander when it forms a
memcpy, which then gets a bogus length in the ramp.
Treat these casts as aliases and recreate them from the frame.
Assisted-by: Claude Opus 5.5
Match audit backend alert by service in alert test
## Problem
test_audit_backend_alert makes /audit immutable and expects the first AuditBackendSetup alert to be for SMB. auditbackend.setup raises one alert per failing service, and with S3 now audited it fails too and sorts ahead of SMB, so the test sees 'S3' instead of 'SMB'.
## Solution
Pick the AuditBackendSetup alert whose service matches the one under test and assert there is exactly one, instead of relying on list order. Fixture setup and teardown are unchanged; teardown's auditbackend.setup already clears the alerts for every service.
(cherry picked from commit e9de416be1e350a109000957624692af572052bc)
NAS-145186 / 28.0.0-BETA.1 / Match audit backend alert by service in alert test (#20169)
## Problem
test_audit_backend_alert makes /audit immutable and expects the first
AuditBackendSetup alert to be for SMB. auditbackend.setup raises one
alert per failing service, and with S3 now audited it fails too and
sorts ahead of SMB, so the test sees 'S3' instead of 'SMB'.
## Solution
Pick the AuditBackendSetup alert whose service matches the one under
test and assert there is exactly one, instead of relying on list order.
Fixture setup and teardown are unchanged; teardown's auditbackend.setup
already clears the alerts for every service.
[CIR] Let llvmOp lowering forward properties to the LLVM op
The lowering patterns generated from `llvmOp` build the LLVM operation with
default properties, so a CIR op whose flags have an LLVM counterpart had to
be lowered by hand. `llvmOpProps` lists the CIR attributes and properties to
forward; the emitter derives the CIR getter and the LLVM setter from the
names, and a renamed LLVM property is given as a string, as in
`(ins "is_zero_poison":$poison_zero)`. Values go through the
convertToLLVMProperty overload for their C++ type. The emitter rejects
entries that are not attributes or properties of the op.
cir.add, cir.sub and cir.mul (overflow flags), the floating-point vector
reductions (fastmath flags), cir.clz, cir.ctz, cir.abs and cir.is_fp_class
switch to it, and cir.popcount, cir.vec.extract and cir.vec.insert use plain
`llvmOp`. Their hand-written patterns and lowerFPVectorReduction go away.
Assisted-by: Claude Code (Claude Opus 5.5).
[CIR] Match classic codegen for saturating fixed-point negation and padded conversions
Three CIR fixed-point paths diverged from classic codegen. Unary minus on a
saturating fixed-point type emitted a plain subtraction instead of a
saturating 0 - x. With -fpadding-on-unsigned-fixed-point, float to unsigned
fixed-point conversion produced the fptosi.sat result in an unsigned CIR
type, so its clamp to 0 compared as unsigned and never fired; it now
converts and clamps in a signed type, like llvm::FixedPointBuilder, and
casts to the unsigned type afterwards. A saturating fixed-point conversion
that kept the width but changed signedness returned a value of the source
CIR type, which broke the cir.cmp verifier and needed a pointer bitcast to
store; it now casts to the destination type.
Assisted-by: Claude Code (Claude Opus 5.5).
Validate container configuration values when they are saved
## Problem
Several container settings passed create and update but only failed at start, often as a raw IndexError or ValueError: an unparseable or empty init, a cpuset with whitespace or CPUs that are not online, and a memory limit above host RAM. A missing initdir made start report success for a container that exited immediately.
## Solution
- **Save time**: init must parse to at least one token; cpuset must be well formed and online, and memory within host RAM. The cpuset and memory checks only run when the value changes, so a host that has since lost CPUs or memory does not block unrelated edits.
- **Start time**: initdir must resolve to a directory inside the container root.
- **Migration**: an incus CPU count, or a CPU set or memory limit this host can't satisfy, is dropped with a job log line instead of failing the container.
- An invalid pinned VM cpuset is a validation error instead of an unhandled ValueError, and autostart failures are logged with a traceback. Accepting `0-0` relies on the matching truenas_pylibvirt parser change.
www/rustfs: New port: High-performance distributed S3-compatible object storage
RustFS is a high-performance, distributed object storage system built in
Rust, with broad S3 API compatibility.
The Console is released separately by upstream and embedded into the
binary at build time.
WWW: https://rustfs.com/
Approved by: jrm (mentor)
Differential Revision: https://reviews.freebsd.org/D61304
[SPARC] Do not force the asm printer into the new PM pipeline (#240371)
Otherwise we trigger this assert when printing MIR instead of asm:
[with PassT = llvm::AsmPrinterAnalysis; IRUnitT = llvm::Module;
ExtraArgTs = {}; ...]:
Assertion `AnalysisPasses.count(PassT::ID()) && "This analysis pass was
not registered prior to being queried"' failed.
Assisted-by: Claude
