RuntimeLibcalls: Add signatures for vector stret libcalls
The vector modf, sincos and sincospi stret functions return a pair of
vectors, so describe them with a struct of two vectors.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
RuntimeLibcalls: Add signatures for the divrem libcalls
Add struct types to the signature table so libcalls returning multiple
values can be described in TableGen. Use them for the ARM, Windows and
AVR divmod functions, which return the quotient and remainder in
registers, instead of building their types in C++.
The other divrem libcalls use the compiler-rt prototype, which stores
the remainder through a pointer. AVR gets its own __divmodsi4 and
__udivmodsi4, since ARM Darwin uses the compiler-rt functions with
those names.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[RISCV] Use a fully covered switch in RISCVABI::getStackAlignment.
This makes it more obvious the alignment has been chosen explicitly
for every ABI.
Not quite NFC because we no longer emit the stack align attribute for
an unknown ABI.
CodeGen: Compute the machine dominance frontier lazily (#239029)
The legacy pass eagerly computed the frontier whenever a pass required
it. X86 LVI load hardening always required it but returned immediately
unless the lvi-load-hardening feature is enabled, so this was computed
and thrown away in the default case. Record the dominator tree when
the wrapper runs and compute the frontier the first time it is
requested.
Instructions retired for llc -O3 -filetype=null over the 10 CTMark
programs as x86_64 full-LTO modules:
total -0.26%
ClamAV -0.47%
7zip -0.41%
consumer-typeset -0.32%
SPASS -0.31%
sqlite3 -0.29%
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Attributor: Require willreturn to skip capture checks for readonly functions (#231616)
AANoCapture assumed that a function which only reads memory, does not
unwind, and does not return a value cannot capture its arguments,
without looking at the uses. However, such a function can still capture
the address by whether it returns, e.g. by recursing forever if a
pointer is null. FunctionAttrs also requires willreturn for this.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[lldb] Extract reusable core register contexts (#237442)
As part of RegisterInfo/RegisterContext refactoring under
Process/Utility, move RegisterContextPOSIX to
Plugins/Register/Core/RegisterContextCore. The renaming is necessary
because RegisterContextPOSIX doesn't use any POSIX APIs, so the term is
misleading (e.g. FreeBSD-Kernel-Core does not have any relationship with
POSIX except that the FreeBSD operating system itself is compatible with
POSIX). Although RegisterContextPOSIX doesn't do coredump-specific
operations, only elf-core and FreeBSD-Kernel-Core depend on it and
that's the only naming I could justify (Names like Unix and Common don't
fit in this case). We can change the name later when non-coredump
process plugin depends on it, but the probability is low considering
that NativeRegisterContext and RegisterContextDarwin/Mach already cover
what we need.
[TargetParser] Map an Intel GPU to its IGCA target (#238917)
Map an Intel GPU to its IGCA target.
Each Intel GPU in `IntelGPUTargetParser.def` lists its IGCA target, e.g.
`igca_30r` for both `xe-mtl-u` and `xe-mtl-h`, but nothing could read it
out.
This PR adds `llvm::IntelGPU::getIGCATarget(GPUKind)`, which returns the
IGCA target that `IntelGPUTargetParser.def` lists for an Intel GPU, e.g.
igca_30r for xe-mtl-u, or an invalid IGCA target for `GK_NONE`.
It is the first step towards compiling device code once per IGCA target:
with `--offload-arch=xe-mtl-u,xe-mtl-h`, the driver will compile once
for `igca_30r` instead of once per device.
security/openpgp-card-ssh-agent: [NEW PORT] SSH agent backed by OpenPGP card authentication keys
openpgp-card-ssh-agent is an SSH agent that uses the authentication
key slot of OpenPGP cards. Private keys never leave the card, and the
agent works with standard SSH clients via SSH_AUTH_SOCK.
WWW: https://codeberg.org/openpgp-card/ssh-agent
PR: 293962
[X86] Enable SlotIndexes compaction by default
Compacting SlotIndexes before greedy allocation drops the entries of
erased instructions, so live range sizes and instruction distances
reflect the code being allocated rather than how much was erased
before it. AMDGPU has done this since #235806; do the same for X86.
Codegen changes only through allocation: no new crashes, verifier
errors or allocation failures in the lit suites, including
EXPENSIVE_CHECKS, and a stage-2 build of LLVM, clang and lld with
-verify-machineinstrs passes its own tests. On llvm-test-suite at -O3,
spills drop 0.3% and .text 0.06%, with compile time unchanged.
Most test updates are regenerated checks. misched-matmul now inserts
20 spills instead of 24. live-debug-vars-stale-slotindexes.mir gets
one more use of %27 so that accumulate_fit still reaches the stale
index path it was written for.
[BoundsSafety][NFC] Hold LateParsedTypeAttrInfo in declarator late-attribute lists
Make DeclSpec, Declarator and DeclaratorChunk hold a SmallVector of
LateParsedTypeAttrInfo * instead of a LateParsedAttrList.
LateParsedAttrList has inline storage for two pointers plus flags, which
makes DeclaratorChunk larger. That may have caused the compile-time
regression in #238909. The new list has no inline storage.
Sema also only has the definition of LateParsedTypeAttrInfo, not of
LateParsedAttribute. Holding the former lets Sema build the type directly,
without a callback into the parser.
No functional change: nothing populates or reads these lists yet.
Assisted-by: Sonnet 5.5
[lldb] Isolate reusable Darwin register contexts (#237400)
As part of RegisterInfo/RegisterContext refactoring under
Process/Utility, move RegisterContext{Darwin,Mach} to
Plugins/Register/Darwin.
