LLVM/project 5363d61llvm/include/llvm/ProfileData SampleProfWriter.h, llvm/lib/ProfileData SampleProfWriter.cpp

[SampleProfile] Introduce stabilizeTable (NFC) (#208501)

This patch adds stabilizeTable to replace duplicate code involving
O(N) heap allocations and hash lookups.  The new helper function
returns pointers to key-value pairs sorted by key.

Since the keys in MapVector are already guaranteed to be unique,
using std::set for sorting allocates unnecessary tree nodes on the
heap.

Assisted-by: Antigravity
DeltaFile
+22-32llvm/lib/ProfileData/SampleProfWriter.cpp
+0-3llvm/include/llvm/ProfileData/SampleProfWriter.h
+22-352 files

LLVM/project 351b968llvm/lib/Target/AMDGPU SIISelLowering.cpp VOP3Instructions.td, llvm/test/CodeGen/AMDGPU strict_fptrunc_bf16.ll

[AMDGPU] Fix crash on strict fptrunc to bf16 (#208037)
DeltaFile
+151-0llvm/test/CodeGen/AMDGPU/strict_fptrunc_bf16.ll
+9-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-1llvm/lib/Target/AMDGPU/VOP3Instructions.td
+161-33 files

LLVM/project 68c0f57utils/bazel/llvm-project-overlay/clang BUILD.bazel

[Bazel] Fixes 0f9f5a2 (#208562)

This fixes 0f9f5a2aba97070971f2d58f2e307f621edf9ada.

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0f9f5a2aba97070971f2d58f2e307f621edf9ada

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+11-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+11-01 files

LLVM/project b61833allvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp SIISelLowering.cpp

[AMDGPU] Guard more intrinsics with target features
DeltaFile
+1-51llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+0-42llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+16-17llvm/lib/Target/AMDGPU/AMDGPU.td
+0-24llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+15-2llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+4-4llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
+36-14020 files not shown
+80-18026 files

FreeBSD/ports ccf9d98net/croc Makefile, net/croc/files croc.in

net/croc: Add croc_host to bind the relay to a specific address
DeltaFile
+6-1net/croc/files/croc.in
+1-1net/croc/Makefile
+7-22 files

FreeBSD/ports 9347641. UPDATING

UPDATING: Note net/croc croc_host for IP-forwarding hosts
DeltaFile
+18-0UPDATING
+18-01 files

LLVM/project 509a0b8llvm/lib/CodeGen PrologEpilogInserter.cpp, llvm/lib/Target/RISCV RISCVFrameLowering.cpp RISCVRegisterInfo.td

[RISCV] Support Zdinx registers in -fzero-call-used-regs (#206323)

First, this patch makes the backend consider GPRF16 and GPRF32 registers
as GPR. These registers are aliases of normal GPR but for use with the
Zdinx extension (floating points instructions on GPR).

Second, it teaches the general -fzero-call-used-regs logic to handle
used registers that span over multiple physical registers. One example
of this is `GPRPair` in the RISC-V backend.
DeltaFile
+55-0llvm/test/CodeGen/RISCV/zero-call-used-regs.ll
+27-1llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+5-2llvm/lib/CodeGen/PrologEpilogInserter.cpp
+4-2llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+91-54 files

LLVM/project 4040a26offload/test lit.cfg

offload: Match amdgpu triple name in lit config

The configured offload system target is now amdgpu-amd-amdhsa since
d776ee4d4cae.
DeltaFile
+3-3offload/test/lit.cfg
+3-31 files

LLVM/project 0f9f5a2clang/docs LanguageExtensions.md, clang/include/clang/Basic BuiltinsZOS.td

[z/OS][Clang]  Add compare and swap builtin functions (#202362)

Implements the following compare and swap builtins:
```
int __cs(unsigned int *, unsigned int *, unsigned int), 4 byte compare & swap
int __cs1(void* OP1, void* OP2, void* OP3), 4 byte compare & swap
int __csg(void* OP1, void* OP2, void* OP3), 8 byte compare & swap
int __cds1(void* OP1, void* OP2, void* OP3), 8 byte compare & swap
int __cdsg(void* OP1, void* OP2, void* OP3), 16 byte compare & swap
```
The implementation utilizes the llvm cmpxchg intrinsic to generate the
CS instructions, then it generates a store instruction to store OP2 into
OP1, and finally invert the success flag of cmpxchg by an XOR
instruction with 1 and return the flag.
DeltaFile
+65-4clang/lib/CodeGen/TargetBuiltins/SystemZ.cpp
+66-0clang/test/CodeGen/SystemZ/builtins-zos-cs.c
+34-0clang/docs/LanguageExtensions.md
+27-0clang/include/clang/Basic/BuiltinsZOS.td
+21-1clang/lib/Basic/Targets/SystemZ.cpp
+20-0clang/lib/Headers/zos_wrappers/stdlib.h
+233-55 files not shown
+263-911 files

LLVM/project a160909llvm/include/llvm/MC MCSectionGOFF.h, llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp

[SystemZ][z/OS] Honor alignment of global data (#208095)

The alignment of sections is set after the section are created. Thus,
the ED structure set at object construction time is updated with the
current section alignment. This only applies to ED type section. As
result, the alignment of global data is correctly set.

Assisted by: IBM Bob
DeltaFile
+28-0llvm/test/CodeGen/SystemZ/zos-align.ll
+10-10llvm/lib/MC/MCObjectFileInfo.cpp
+9-7llvm/lib/MC/GOFFObjectWriter.cpp
+11-2llvm/include/llvm/MC/MCSectionGOFF.h
+4-6llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+5-5llvm/lib/MC/MCAsmInfoGOFF.cpp
+67-302 files not shown
+68-328 files

FreeBSD/ports 6c00422multimedia Makefile, multimedia/asdcplib pkg-plist Makefile

multimedia/asdcplib: New port: Library and tools for working with MXF and DCP files

AS-DCP Lib implements the SMPTE and MXF Interop standards used to package
Digital Cinema (DCP) and IMF essence, providing the libkumu and libasdcp
libraries plus a set of wrap/unwrap/info command line utilities.  Optional
support for AS-02 (IMF), JPEG XS and P-HDR is available via options.

This port was previously removed in 2019 and is reintroduced against the
current upstream at https://github.com/cinecert/asdcplib.
DeltaFile
+72-0multimedia/asdcplib/pkg-plist
+41-0multimedia/asdcplib/Makefile
+9-0multimedia/asdcplib/pkg-descr
+3-0multimedia/asdcplib/distinfo
+1-0multimedia/Makefile
+126-05 files

FreeBSD/ports 3b599efmultimedia Makefile, multimedia/shaka-packager Makefile distinfo

multimedia/shaka-packager: New port: Media packaging SDK and tool for DASH and HLS
DeltaFile
+43-0multimedia/shaka-packager/Makefile
+31-0multimedia/shaka-packager/distinfo
+12-0multimedia/shaka-packager/pkg-descr
+1-0multimedia/Makefile
+87-04 files

LLVM/project c050a2c.ci/green-dragon lldb-windows.groovy

Revert "[lldb][Windows][CI] split steps (#206946)" (#208519)

This reverts commit 07d5e0d550985db270e65131add93f8c5fda54dd.
DeltaFile
+3-24.ci/green-dragon/lldb-windows.groovy
+3-241 files

FreeBSD/ports 3f68b70textproc/otree distinfo Makefile

textproc/otree: Update to 0.7.1
DeltaFile
+399-227textproc/otree/distinfo
+199-114textproc/otree/Makefile
+598-3412 files

FreeBSD/ports 69cad13shells/rura distinfo Makefile.crates

shells/rura: Update to 1.8.0
DeltaFile
+53-43shells/rura/distinfo
+25-20shells/rura/Makefile.crates
+1-1shells/rura/Makefile
+79-643 files

FreeBSD/ports 047a08bgraphics/jogamp-jogl Makefile

graphics/jogamp-jogl: deprecate and expire in 4 months

No maintainer, does not compile with Java 11+, did not keep up with upstream.
The only usage in ports (math/scilab) has been deprecated.
Mail the maintainer if you use this.

Approved-by:    no maintainer
DeltaFile
+4-1graphics/jogamp-jogl/Makefile
+4-11 files

LLVM/project 2f2edd8llvm/lib/Target/BPF BPFCodeGenPassBuilder.cpp

feedback

Created using spr 1.3.7
DeltaFile
+3-3llvm/lib/Target/BPF/BPFCodeGenPassBuilder.cpp
+3-31 files

FreeBSD/ports e5a33d6devel/terraform-ls distinfo Makefile

devel/terraform-ls: Update to 0.38.8

ChangeLog:
https://github.com/hashicorp/terraform-ls/releases/tag/v0.38.8
DeltaFile
+5-5devel/terraform-ls/distinfo
+1-1devel/terraform-ls/Makefile
+6-62 files

LLVM/project a89bc0doffload/test lit.cfg

offload: Match amdgpu triple name in lit config

The configured offload system target is now amdgpu-amd-amdhsa (per the
plugin CMake change in d776ee4d4cae), which flows into
config.libomptarget_current_target / %target_triple. Update the lit
feature, USM/APU/large-allocation-pool, and PGO/flang-rt detection to key
off 'amdgpu' rather than the old 'amdgcn' prefix so AMDGPU offload tests
are configured correctly again.

Co-Authored-By: Claude <noreply at anthropic.com>  # Claude Opus 4.8
DeltaFile
+3-3offload/test/lit.cfg
+3-31 files

LLVM/project 8bbb5a8.github/workflows release-llvm-testing-tools.yml

[Github][TestingTools] Build on multiple platforms

Given we are shipping binaries, the produced packages are arch-specific
so we need to build/cross-compile on all the architectures that we care
about. Start by getting things working on latest MacOS and Windows.

Reviewers: Michael137, ldionne

Pull Request: https://github.com/llvm/llvm-project/pull/190884
DeltaFile
+8-7.github/workflows/release-llvm-testing-tools.yml
+8-71 files

LLVM/project 07b4876llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/test/MC/AMDGPU hsa-diag-v4.s isa-version-pal.s

Clarify .amdgcn_target processor mismatch diagnostic
DeltaFile
+25-8llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+4-4llvm/test/MC/AMDGPU/hsa-diag-v4.s
+2-2llvm/test/MC/AMDGPU/isa-version-pal.s
+1-1llvm/test/MC/AMDGPU/isa-version-hsa.s
+1-1llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
+1-1llvm/test/MC/AMDGPU/isa-version-unk.s
+34-176 files

LLVM/project c7f5b5ellvm/include/llvm/MC MCSubtargetInfo.h

Drop setCPU change
DeltaFile
+0-4llvm/include/llvm/MC/MCSubtargetInfo.h
+0-41 files

LLVM/project ccef92ellvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

remove r600 check
DeltaFile
+1-2llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+1-21 files

LLVM/project 47e79b5llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

AMDGPU: Respect target assembler directives over command line

Mutate the global subtarget, using essentially the same code that ARM uses.
The main difference is we need to mutate the actual CPU name in addition
to just flipping the feature bits, so this needs a new setter in
MCSubtargetInfo. Liberalize the triple check so that after #206480,
old assembly files to not break on new assembler invocations.

For some reason we have 2 different assembler directives that indicate the
target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal. Previously,
we would take the target from the command line and then error if the directive
did not exactly match. In order to move away from depending on the xnack and
sramecc subtarget features, start treating the directives as a change of target,
similar to ARM's .cpu and .arch directives.

Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc. Ideally
we would introduce new independent directives for these.

Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+65-7llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+33-0llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+5-5llvm/test/MC/AMDGPU/hsa-diag-v4.s
+7-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+3-3llvm/test/MC/AMDGPU/isa-version-unk.s
+3-3llvm/test/MC/AMDGPU/isa-version-hsa.s
+116-1810 files not shown
+132-2916 files

LLVM/project eee29edllvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll

rebase

Created using spr 1.3.7
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+31,001-87,165llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+48,431-47,321llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+24,087-21,000llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+580,981-155,48635,022 files not shown
+3,826,660-1,582,45835,028 files

FreeBSD/ports bda4c5fjava/eclipse-ecj Makefile

java/eclipse-ecj: deprecate and expire in 4 months

No maintainer, last update was 2015, does not build with Java 11, only usage in the ports tree (math/scilab) was just deprecated.

Approved-by:    no maintainer
DeltaFile
+4-1java/eclipse-ecj/Makefile
+4-11 files

LLVM/project 720066allvm/lib/Target/BPF BPFMIPeephole.cpp, llvm/test/CodeGen/BPF mov32-64-subreg-source.mir

BPF: Fix misfolding subregisters (#208244)

This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.

The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
DeltaFile
+44-0llvm/test/CodeGen/BPF/mov32-64-subreg-source.mir
+5-1llvm/lib/Target/BPF/BPFMIPeephole.cpp
+49-12 files

FreeBSD/ports f7dd45adns/aardvark-dns distinfo Makefile.crates, dns/aardvark-dns/files patch-cargo-crates_inotify-0.11.2_src_fd__guard.rs patch-Cargo.lock

dns/aardvark-dns: fix build by updating crates to their new versions

Bump PORTREVISION.

Sponsored by:   tipi.work
DeltaFile
+0-65dns/aardvark-dns/files/patch-cargo-crates_inotify-0.11.2_src_fd__guard.rs
+26-0dns/aardvark-dns/files/patch-Cargo.lock
+11-0dns/aardvark-dns/files/patch-Cargo.toml
+5-5dns/aardvark-dns/distinfo
+2-2dns/aardvark-dns/Makefile.crates
+1-0dns/aardvark-dns/Makefile
+45-726 files

OpenBSD/ports 7Ukz0Dolang/deno distinfo crates.inc, lang/deno/patches patch-cli_lib_rs patch-cli_tools_deploy_rs

   lang/deno: Update to 2.9.2
VersionDeltaFile
1.52+52-54lang/deno/distinfo
1.52+25-26lang/deno/crates.inc
1.5+5-5lang/deno/patches/patch-cli_lib_rs
1.6+2-2lang/deno/patches/patch-cli_tools_deploy_rs
1.4+2-2lang/deno/pkg/README
1.67+1-1lang/deno/Makefile
+87-904 files not shown
+91-9410 files

LLVM/project 34b57bfclang/include/clang/AST OpenMPClause.h, clang/lib/AST OpenMPClause.cpp

[Clang][OpenMP] Add parsing/sema for dims modifier in num_threads
DeltaFile
+150-41clang/include/clang/AST/OpenMPClause.h
+80-34clang/lib/Parse/ParseOpenMP.cpp
+61-36clang/lib/Sema/SemaOpenMP.cpp
+62-0clang/test/OpenMP/dims_modifier_ast_print.cpp
+52-7clang/lib/AST/OpenMPClause.cpp
+53-1clang/test/OpenMP/dims_modifier_messages.cpp
+458-11927 files not shown
+589-20733 files