LLVM/project 696e82dclang/lib/Sema SemaDeclCXX.cpp, clang/test/CodeGenCXX dllexport-inherited-ctor.cpp

[clang] Skip dllexport of inherited constructors with unsatisfied constraints (#186497)

When a class is marked `__declspec(dllexport)`, Clang eagerly creates
inherited constructors via `findInheritingConstructor` and propagates
the dllexport attribute to all members. This bypasses overload
resolution, which would normally filter out constructors whose requires
clause is not satisfied. As a result, Clang attempted to instantiate
constructor bodies that should never be available, causing spurious
compilation errors.

Add constraint satisfaction checks in `checkClassLevelDLLAttribute` to
match MSVC behavior:

1. Before eagerly creating inherited constructors, verify that the base
constructor's `requires` clause is satisfied. Skip creation otherwise.

2. Before applying dllexport to non-inherited methods of class template
specializations, verify constraint satisfaction. This handles the case
where `dllexport` propagates to a base template specialization whose own

    [9 lines not shown]
DeltaFile
+56-30clang/lib/Sema/SemaDeclCXX.cpp
+78-4clang/test/CodeGenCXX/dllexport-inherited-ctor.cpp
+40-0clang/test/SemaCXX/dllexport-constrained-inherited-ctor.cpp
+174-343 files

LLVM/project 4287cfeclang/include/clang/AST TypeBase.h TypeProperties.td, clang/lib/AST ASTContext.cpp Type.cpp

[clang] DeducedTypes deduction kind fix and improvement

This is a small refactor of how DeducedType and it's derived types are
represented.

The different deduction kinds are spelled out in an enum, and how this
is tracked is simplified, to allow easier profiling.

How these types are constructed and canonicalized is also brought more
in line with how it works for the other types.

This fixes a crash reported here: https://github.com/llvm/llvm-project/issues/167513#issuecomment-3692962115
DeltaFile
+82-91clang/lib/AST/ASTContext.cpp
+81-38clang/include/clang/AST/TypeBase.h
+48-20clang/lib/AST/Type.cpp
+14-16clang/lib/Sema/TreeTransform.h
+9-18clang/include/clang/AST/TypeProperties.td
+20-4clang/lib/AST/TextNodeDumper.cpp
+254-18713 files not shown
+317-23619 files

FreeBSD/src e608379contrib/tcpdump tcpdump.c print-icmp6.c, contrib/tcpdump/missing snprintf.c

tcpdump: Update to 4.99.6

Changes:        https://github.com/the-tcpdump-group/tcpdump/blob/tcpdump-4.99/CHANGES
Obtained from:  https://www.tcpdump.org/release/tcpdump-4.99.6.tar.xz
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D55578
Differential Revision:  https://reviews.freebsd.org/D55871
DeltaFile
+0-508contrib/tcpdump/missing/snprintf.c
+311-47contrib/tcpdump/tcpdump.c
+84-103contrib/tcpdump/print-icmp6.c
+79-105contrib/tcpdump/print-egp.c
+110-56contrib/tcpdump/CMakeLists.txt
+54-84contrib/tcpdump/print-mobility.c
+638-90363 files not shown
+1,581-1,65869 files

FreeBSD/ports aaee058audio/subtui distinfo Makefile

audio/subtui: Update to 2.11.3

Changelog: https://github.com/MattiaPun/SubTUI/releases/tag/v2.11.3
DeltaFile
+5-5audio/subtui/distinfo
+1-1audio/subtui/Makefile
+6-62 files

FreeNAS/freenas f80b036src/middlewared/middlewared/plugins/vm __init__.py vms.py

Move VM namespace to be typesafe
DeltaFile
+518-0src/middlewared/middlewared/plugins/vm/__init__.py
+0-463src/middlewared/middlewared/plugins/vm/vms.py
+0-426src/middlewared/middlewared/plugins/vm/vm_devices.py
+321-0src/middlewared/middlewared/plugins/vm/crud.py
+148-153src/middlewared/middlewared/plugins/vm/clone.py
+246-0src/middlewared/middlewared/plugins/vm/vm_device_convert.py
+1,233-1,04241 files not shown
+2,679-2,35247 files

LLVM/project 655d5e7lld/ELF/Arch RISCV.cpp LoongArch.cpp, lld/test/ELF riscv-relax-synthetic-in-text.s loongarch-relax-synthetic-in-text.s

[lld][ELF] Fix crash when relaxation pass encounters synthetic sections

In LoongArch and RISC-V, the relaxation pass iterates over input sections
within executable output sections. When a linker script places a synthetic
section (e.g., .got) into such an output section, the linker would crash
because synthetic sections do not have the relaxAux field initialized.

The relaxAux data structure is only allocated for non-synthetic sections
in initSymbolAnchors. This patch adds the necessary null checks in the
relaxation loops (relaxOnce and finalizeRelax) to skip sections that
do not require relaxation.

A null check is also added to elf::initSymbolAnchors to ensure the
subsequent sorting of anchors is safe.

Fixes: #184757

Reviewers: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/184758
DeltaFile
+33-0lld/test/ELF/riscv-relax-synthetic-in-text.s
+31-0lld/test/ELF/loongarch-relax-synthetic-in-text.s
+8-1lld/ELF/Arch/RISCV.cpp
+4-1lld/ELF/Arch/LoongArch.cpp
+76-24 files

FreeBSD/ports 6485392databases/soci Makefile

databases/soci: Adopt port
DeltaFile
+1-1databases/soci/Makefile
+1-11 files

FreeBSD/ports 9a19254editors/abiword-docs Makefile

editors/abiword-docs: bump PORTREVISION

Bump PORTREVISION to force rebuild and reinstall to make deprecation
more visible.

PR:             293693
DeltaFile
+1-1editors/abiword-docs/Makefile
+1-11 files

FreeNAS/freenas 8d9e929src/middlewared/middlewared/plugins/vm __init__.py vms.py

Move VM namespace to be typesafe
DeltaFile
+518-0src/middlewared/middlewared/plugins/vm/__init__.py
+0-463src/middlewared/middlewared/plugins/vm/vms.py
+0-426src/middlewared/middlewared/plugins/vm/vm_devices.py
+318-0src/middlewared/middlewared/plugins/vm/crud.py
+148-153src/middlewared/middlewared/plugins/vm/clone.py
+246-0src/middlewared/middlewared/plugins/vm/vm_device_convert.py
+1,230-1,04241 files not shown
+2,674-2,35247 files

FreeBSD/ports 9d45b55games/xray-16 pkg-plist distinfo

games/xray-16: Update 2921-january-2025-rc1.20251014 => 2921-january-2025-rc1.20260315

Commit log:
https://github.com/OpenXRay/xray-16/compare/e836dd9...5f16507

- Improve BUILD_DEPENDS.

PR:     293837
DeltaFile
+0-644games/xray-16/pkg-plist
+5-5games/xray-16/distinfo
+4-6games/xray-16/Makefile
+9-6553 files

LLVM/project f46a515llvm/lib/Target/LoongArch/MCTargetDesc LoongArchAsmBackend.cpp

[LoongArch] Remove unreachable Value check in fixupLeb128 (#186297)

Value is guaranteed to be zero after the loop:

  for (I = 0; Value; ++I, Value >>= 7)

Therefore the subsequent `if (Value)` condition is always false.
Remove the unreachable code. Reported by PVS-Studio.

Fixed: #170122
DeltaFile
+0-2llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+0-21 files

LLVM/project bb71dd0clang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp, libc/AOR_v20.02/math/test/traces sincosf.txt exp.txt

remove pie test

Created using spr 1.3.7
DeltaFile
+53,024-7,001llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+0-31,999libc/AOR_v20.02/math/test/traces/sincosf.txt
+15,172-1,553llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+0-16,000libc/AOR_v20.02/math/test/traces/exp.txt
+7,665-4,743llvm/test/CodeGen/AArch64/clmul-fixed.ll
+5,294-4,814clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+81,155-66,1106,563 files not shown
+478,858-308,2106,569 files

FreeNAS/freenas 949df0esrc/middlewared/middlewared/plugins/service_/services nfs.py

Regression fix
DeltaFile
+13-0src/middlewared/middlewared/plugins/service_/services/nfs.py
+13-01 files

FreeNAS/freenas 7aefb72src/middlewared/middlewared/plugins/service_/services nfs.py

Regression fix
DeltaFile
+13-0src/middlewared/middlewared/plugins/service_/services/nfs.py
+13-01 files

LLVM/project 6e6a46borc-rt/include/orc-rt iterator_range.h, orc-rt/unittests iterator_range-test.cpp CMakeLists.txt

[orc-rt] Add a simple iterator_range class. (#186720)

This will be used to simplify operations on iterator ranges in the ORC
runtime.
DeltaFile
+79-0orc-rt/unittests/iterator_range-test.cpp
+47-0orc-rt/include/orc-rt/iterator_range.h
+1-0orc-rt/unittests/CMakeLists.txt
+127-03 files

LLVM/project 4c5b1c4clang/test/Driver riscv-cpus.c, clang/test/Driver/print-enabled-extensions riscv-sifive-x180.c riscv-sifive-x160.c

[RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (#186264)

This PR adds new processor definitions for two SiFive cores:
- X160
(https://www.sifive.com/document-file/sifive-intelligence-x160-gen2-product-brief):
A RV32 core with Zve32f
- X180
(https://www.sifive.com/document-file/sifive-intelligence-x180-gen2-product-brief):
A RVV-capable RV64 core

Both of them have VLEN=128.

Scheduling model supports will be added in follow-up patches.
DeltaFile
+94-0llvm/lib/Target/RISCV/RISCVProcessors.td
+71-0clang/test/Driver/print-enabled-extensions/riscv-sifive-x180.c
+59-0clang/test/Driver/print-enabled-extensions/riscv-sifive-x160.c
+10-0clang/test/Driver/riscv-cpus.c
+4-0clang/test/Misc/target-invalid-cpu-note/riscv.c
+1-0llvm/docs/ReleaseNotes.md
+239-06 files

FreeBSD/ports 91a822anet-p2p/warpinator Makefile, net/py-magic-wormhole Makefile

security/py-pynacl: update 1.5.0 → 1.6.2
DeltaFile
+18-10security/py-pynacl/Makefile
+3-3security/py-pynacl/distinfo
+2-2net-p2p/warpinator/Makefile
+2-2net/py-magic-wormhole/Makefile
+2-2security/py-paramiko/Makefile
+2-2security/py-pyaff4/Makefile
+29-2112 files not shown
+53-4418 files

HardenedBSD/src 8802fa8sys/dev/rge if_rgevar.h if_rge.c, sys/modules/zfs Makefile

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+22-21sys/modules/zfs/Makefile
+0-4sys/dev/rge/if_rgevar.h
+2-2usr.bin/backlight/backlight.8
+2-2sys/dev/rge/if_rge.c
+1-1usr.sbin/bluetooth/rtlbtfw/rtlbtfw.conf
+1-0sys/netgraph/bluetooth/drivers/ubt/ng_ubt_rtl.c
+28-301 files not shown
+29-307 files

HardenedBSD/src c24fae9sys/dev/rge if_rgevar.h if_rge.c, sys/modules/zfs Makefile

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+22-21sys/modules/zfs/Makefile
+2-2usr.bin/backlight/backlight.8
+0-4sys/dev/rge/if_rgevar.h
+2-2sys/dev/rge/if_rge.c
+1-1usr.sbin/bluetooth/rtlbtfw/rtlbtfw.conf
+1-0usr.sbin/bluetooth/rtlbtfw/main.c
+28-301 files not shown
+29-307 files

HardenedBSD/ports cfa6664deskutils/pal/files patch-src_Makefile, multimedia/ffmpeg6 Makefile pkg-plist

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+272-0multimedia/ffmpeg6/Makefile
+226-0multimedia/ffmpeg6/pkg-plist
+110-86www/chromium/files/patch-chrome_browser_about__flags.cc
+157-0security/vuxml/vuln/2026.xml
+91-5deskutils/pal/files/patch-src_Makefile
+56-0www/chromium/files/patch-ui_ozone_platform_wayland_host_wayland__exchange__data__provider.cc
+912-91502 files not shown
+3,830-2,201508 files

OpenBSD/ports 3fY2syAarchivers/lzip/clzip distinfo Makefile

   Update clzip to 1.16.
VersionDeltaFile
1.13+2-2archivers/lzip/clzip/distinfo
1.20+1-1archivers/lzip/clzip/Makefile
+3-32 files

OpenBSD/ports Ih8ykTTarchivers/lzip/plzip distinfo Makefile

   Update plzip to 1.13.
VersionDeltaFile
1.14+2-2archivers/lzip/plzip/distinfo
1.25+1-1archivers/lzip/plzip/Makefile
+3-32 files

FreeBSD/ports 3595b1bmultimedia Makefile

xamultimedia/Makefile: fix previous commit

Reported by:    vvd at freebsd.org
DeltaFile
+1-0multimedia/Makefile
+1-01 files

HardenedBSD/ports 3595b1bmultimedia Makefile

xamultimedia/Makefile: fix previous commit

Reported by:    vvd at freebsd.org
DeltaFile
+1-0multimedia/Makefile
+1-01 files

LLVM/project 8767bdbllvm/include/llvm/MC MCPseudoProbe.h

[NFC] Delete `MCPseudoProbeDecoder`'s move constructor (#186698)

`MCPseudoProbeDecoder` cannot be copeied/moved due to its address
dependence on the DummyInlineRoot member address. Explicitly delete the move constructor.
DeltaFile
+8-0llvm/include/llvm/MC/MCPseudoProbe.h
+8-01 files

FreeBSD/ports b8f87cfnet/frr10 distinfo Makefile

net/frr10: Update to 10.5.3

Changelog:      https://github.com/FRRouting/frr/releases/tag/frr-10.5.3
DeltaFile
+3-3net/frr10/distinfo
+1-1net/frr10/Makefile
+4-42 files

HardenedBSD/ports b8f87cfnet/frr10 distinfo Makefile

net/frr10: Update to 10.5.3

Changelog:      https://github.com/FRRouting/frr/releases/tag/frr-10.5.3
DeltaFile
+3-3net/frr10/distinfo
+1-1net/frr10/Makefile
+4-42 files

FreeBSD/ports 6119c28archivers/plzip distinfo Makefile

archivers/plzip: upgrade to 1.13
DeltaFile
+3-3archivers/plzip/distinfo
+1-1archivers/plzip/Makefile
+4-42 files

HardenedBSD/ports 6119c28archivers/plzip distinfo Makefile

archivers/plzip: upgrade to 1.13
DeltaFile
+3-3archivers/plzip/distinfo
+1-1archivers/plzip/Makefile
+4-42 files

LLVM/project 70cd2acllvm/docs LangRef.rst, llvm/include/llvm/IR Constants.h

Revert "[IR] Add initial support for the byte type" (#186713)

Reverts llvm/llvm-project#178666 to unblock CI.
`CodeGen/X86/byte-constants.ll` is at fault. 
Will look into it and hopefully fix it by tomorrow.
DeltaFile
+17-290llvm/lib/IR/Constants.cpp
+16-177llvm/include/llvm/IR/Constants.h
+9-106llvm/docs/LangRef.rst
+0-101llvm/test/Assembler/byte.ll
+36-37llvm/test/tools/llvm-ir2vec/entities.ll
+0-73llvm/test/Assembler/byte-invalid.ll
+78-78440 files not shown
+168-1,48846 files