[lldb] Preserve TargetSP in Platform module lookup (#186323)
[lldb] Preserve TargetSP in Platform module lookup
When `Platform::GetRemoteSharedModule` resolves a module specification
by calling `GetModuleSpec` on
the process, the target context (`TargetSP`) is lost. This happens
because the underlying process plugin populates a new `ModuleSpec`
object that does not inherit the target context.
This causes failures in subsequent symbol resolution steps. For example,
when `ModuleList` relies on the `TargetSP` to query target-specific
settings like `target.exec-search-paths` and
`target.symbols-search-paths`, the lookup fails
because `TargetSP` evaluates to null. This prevents LLDB from finding
local unstripped libraries.
This commit fixes the issue by transferring the target context from the
original `module_spec` over to the `resolved_module_spec` before
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[AArch64][llvm] Rewrite the TLBI multiclass to be much clearer (NFC)
The `tlbi` multiclass is really doing four jobs at once: base TLBI,
synthesized nXS, optional TLBIP, and synthesized TLBIP nXS. Also,
`needsreg` and `optreg` are really just a 3-state operand policy in
disguise. Likewise, the PLBI multiclass has this same issue.
Change `needsreg` and `optreg` into a combined fake enum, so it's
clearer whether the instruction takes no register operand, a required
register operand or an optional register operand.
This improves on my original change 66e8270e8.
[X86] lowerV4F32Shuffle - don't use INSERTPS if SHUFPS will suffice (#186468)
If we have 2 or more undef/undemanded elements, the INSERTPS replaces
those with explicit zero'd elements which can cause infinite loops later
on in shuffle combining depending on whether we demand those elements or
not.
I'll try to improve the (minor) v2f32 regressions in a follow up, but I
need to fix the infinite loop first.
Fixes #186403
[LifetimeSafety] Fix false positives for pointers in loops (#182368)
When a pointer and its pointee die in the same loop scope, the back-edge
makes the pointer appear live at the pointee's `ExpireFact`, causing a
spurious use-after-scope warning. The origin's loans and liveness are
cleared at `LifetimeEnds` via `ExpireFact`, preventing the checker from
reporting against an origin whose variable is already dead.
Fixes: #169548
rtld-elf: Remove stray _exit prototype for aarch64
It's not clear why this is here. It's existed since the very first
version of rtld-elf for aarch64 but has never been used, and anything
actually using exit or _exit should be using rtld_libc.h's #define that
aliases them to __sys_exit.
Fixes: 047c6e3ae6ab ("Add the arm64 code to the runtime linker. It's not able to be built as we still need libc_pic for a few things, but this is expected to be ready soon.")
[LLDB][NativePDB] Add support for `S_REGREL32_INDIR` (#186124)
In #183172, I added support for reading `S_REGREL32_INDIR` records. This
adds support in LLDB. The record is emitted by MSVC for structured
bindings and in the compiler generated coroutine stubs.
It describes a location at `*(Register + Offset) + OffsetInUdt`.
Equivalent to
```
DW_OP_breg{reg} {Offset}
DW_OP_deref
DW_OP_plus_uconst {OffsetInUdt}
```
LLVM doesn't create this record - it only creates `S_LOCAL`s for local
variables. We'll probably need `S_DEFRANGE_REGISTER_REL_INDIR` for this
- should be simple to figure out the structure, but I haven't seen that
record emitted yet.
[AArch64][llvm] Rewrite the TLBI multiclass to be much clearer (NFC)
The `tlbi` multiclass is really doing four jobs at once: base TLBI,
synthesized nXS, optional TLBIP, and synthesized TLBIP nXS. Also,
`needsreg` and `optreg` are really just a 3-state operand policy in
disguise.
Change `needsreg` and `optreg` into a combined fake enum, so it's
clearer whether the instruction takes no register operand, a required
register operand or an optional register operand.
This improves on my original change 66e8270e8.
[AMDGPU] Fix setreg handling in the VGPR MSB lowering
There are multiple issues with it:
1. It can skip inserting S_SET_VGPR_MSB if we set the mode via
piggibacking. We are now relying on the HW bug for correct
behavior. If/when the bug is fixed lowering will be incorrect.
2. We should just unconditionally update MSBs if offset allows it.
We shall set correct bits and keep the rest of the immediate
(that is done). There is no reasonable way for an user to change
MSBs nor does it do anything good to set it with SETREG and then
immediately overwrite with S_SET_VGPR_MSB.
3. Current implementation assumes that offset in the mask is always
zero, which is not true.
4. Redundand mode changes created as seen in the
hazard-setreg-vgpr-msb-gfx1250.mir.
5. Decoding of the immediate was also wrong with non-zero offset.
With uncoditional immediate update most of time and not relying on
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i6300esbwd: Set error appropriately on event
Per the watchdog driver contract, if the driver successfully arms the
watchdog it must set error to 0, and if it's unable to arm the watchdog
it must leave error alone.
Sponsored by: Hewlett Packard Enterprise
[lldb][Process/FreeBSDKernelCore] Set kernel displacement (#183975)
Use `kvm_kerndisp()` on core load to retrieve the kernel displacement,
that is the difference between the kernel's
base virtual address at run time and the kernel base virtual address
specified in the kernel image file. Currently PowerPC is the only
architecture supporting kernel displacement.
---------
Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
databases/cego: update 2.54.9 -> 2.54.16
- rework tableset verification procedure
- removed logback.xml to avoid logging side effects
- Added admin command "verify locks" to perform a test aquire
of all lock manager locks read and write
- Fix CegoQueryHelper::maxFieldSize.
The returned size must be at least MAX_NULL_LEN
- CegoTableManager::checkBTreeIntegrity support for allowDuplicateNull
feature ( multiple null values in unique btree )
- CegoLockHandler, check for unlock methods to check for lockId == 0
- Completed verify locks command with missing pool, querycache, tablecache,
db and xml locks
- CegoClient: query abort via interrupt character fixed
[X86] Add correct model values for znver1, znver2 shld, shrd (#186175)
Values are from Agner Fog's tables, which also match uops.info expect for latency, which for which I used a similar pattern as in zvner3 and 4
[NFC][SCEV] Use const_cast to avoid warnings/errors. (#186474)
Follow-up on #91961. Some builds may fail, and other will issue
lots of warnings:
```
warning: cast from type ‘const llvm::SCEV*’ to type ‘void*’ casts away qualifiers [-Wcast-qual]
```
[mlir][shard,mpi] Marking explicitly bufferized buffers read-only where applicable (#186464)
Marking read-only buffers as such avoids unnecessary copies in
`one-shot-bufferize`
---------
Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot at users.noreply.github.com>
devel/heimdall: fix flashing on some samung tablet
Heimdall sends at some empty OUT transfers (as for the ODIN protocol)
with a 100ms timeou. The device is busy writing on the flash at that
point and NACKs OUT tokens for more than 100ms. The result is the empty
transfers times out. and since this is a required ODIN protocol marker,
the transfers fails.
Make sure those empty out transfers get a longer timeout.
[DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (#185915)
We have a dSYM that is ~5.6 GB and has 69,840 compile units that took 3+
hours to verify (`dsymutil --verify-dwarf=auto`). This severely slowed
our build time. So I investigated by `perf record` for a few minutes and
found that `DWARFVerifier::DieRangeInfo::insert(const DieRangeInfo &RI)`
was consuming 83% of CPU time — 48% in `_Rb_tree_increment` (iterator
traversal) and 36% in the `insert` function itself.
It turns out the function was linearly scanning all children in a
std::set to check for range overlaps, when it could leverage the sorted
property of the set and check only the immediate neighbors after a O(log
N) insertion. The worst compile unit had ~189K DIEs, making this O(N²)
scan take over 4 minutes for a single unit.
The fix: insert into the sorted set first (O(log N)), then check only
the predecessor and successor for intersection. Since children are
verified non-overlapping as they are inserted incrementally, if the
immediate neighbors don't intersect, no other child can either.
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