LLVM/project e0a1e78libclc CMakeLists.txt, libclc/clc/lib/generic/math clc_sincos_helpers.inc clc_sincos_helpers.cl

libclc: do not use int64 in sincos helpers (#188056)

int64 is optional, thus we do not want to force its usage for clspv.
DeltaFile
+12-0libclc/clc/lib/generic/math/clc_sincos_helpers.inc
+12-0libclc/clc/lib/generic/math/clc_sincos_helpers.cl
+2-1libclc/CMakeLists.txt
+26-13 files

NetBSD/pkgsrc IlbUbZAdoc CHANGES-2026

   Updated databases/py-pypika-tortoise, databases/py-tortoise-orm
VersionDeltaFile
1.1915+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc usoLuBSdatabases/py-tortoise-orm distinfo Makefile

   py-tortoise-orm: updated to 1.1.7

   1.1.7

   Added

   Tests for model validators.

   Fixed

   Reorder delete model operations in migrations to avoid foreign key constraint errors.
   Return value generated by db_default on create instead of None.
   Column comment alteration now works correctly for MySQL and PostgreSQL; fixed db_default handling for MySQL.
   Fix docstrings for a few classes.

   Changed

   Improved Pydantic JSON dump performance.
VersionDeltaFile
1.39+4-4databases/py-tortoise-orm/distinfo
1.48+3-3databases/py-tortoise-orm/Makefile
+7-72 files

NetBSD/pkgsrc V2z0qgIdatabases/py-pypika-tortoise distinfo Makefile

   py-pypika-tortoise: updated to 0.6.5

   0.6.5
   feat: Add default_values() API for default-only inserts with dialect-aware SQL rendering
VersionDeltaFile
1.12+4-4databases/py-pypika-tortoise/distinfo
1.14+2-2databases/py-pypika-tortoise/Makefile
+6-62 files

FreeBSD/ports 5f73ae9graphics Makefile, graphics/mmdr distinfo Makefile.crates

graphics/mmdr: Add new port

Mmdr is a fast native Rust Mermaid diagram renderer. No browser required. Mmdr
renders diagrams 100–1400x faster than mermaid-cli by eliminating browser
overhead. With the built-in font cache (warm after first run), tiny diagrams
reach 500–900x (and --fastText exceeds 1600x).

https://github.com/1jehuang/mermaid-rs-renderer
DeltaFile
+287-0graphics/mmdr/distinfo
+142-0graphics/mmdr/Makefile.crates
+24-0graphics/mmdr/Makefile
+4-0graphics/mmdr/pkg-descr
+1-0graphics/Makefile
+458-05 files

LLVM/project b164e7cllvm/lib/Transforms/Scalar LowerMatrixIntrinsics.cpp, llvm/test/Transforms/LowerMatrixIntrinsics multiply-fused-tile-size-0.ll

[Matrix] Handle -fuse-matrix-tile-size=0 as tiling disabled. (#188861)

Treat -fuse-matrix-tile-size=0 as disabling tiling, as tile-size of 0
doesn't really make sense.

Fixes https://github.com/llvm/llvm-project/issues/185153

PR: https://github.com/llvm/llvm-project/pull/188861
DeltaFile
+104-0llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-tile-size-0.ll
+1-1llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
+105-12 files

FreeBSD/ports e0614canet-im/linux-discord distinfo Makefile

net-im/linux-discord: Update to 0.0.130
DeltaFile
+3-3net-im/linux-discord/distinfo
+1-1net-im/linux-discord/Makefile
+4-42 files

LLVM/project 7ff0910libclc/clc/lib/amdgpu/subgroup clc_sub_group_non_uniform_reduce.cl clc_sub_group_reduce.cl, libclc/clc/lib/generic/collective clc_work_group_scan.inc

Merge branch 'main' into users/kasuga-fj/da-avoid-abs-in-weak-zero-siv
DeltaFile
+395-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse.ll
+384-0libclc/clc/lib/amdgpu/subgroup/clc_sub_group_non_uniform_reduce.cl
+232-78llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
+155-0libclc/clc/lib/generic/collective/clc_work_group_scan.inc
+8-134libclc/clc/lib/amdgpu/subgroup/clc_sub_group_reduce.cl
+108-15llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+1,282-22740 files not shown
+1,819-32946 files

LLVM/project 6a99441compiler-rt/lib/sanitizer_common sanitizer_internal_defs.h

[NFCI][sanitizer_common] Realign #ifdefs in sanitizer_internal_defs.h (#186861)

Currently it is very hard to tell these nested ifdefs apart. This patch
fixes that, while trying to be as light-touch as possible.
DeltaFile
+6-6compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
+6-61 files

LLVM/project 015994bcompiler-rt/test/asan/TestCases stack_container_dynamic_lib.c

[ASan][test-only] Remove superfluous guards in stack_container_dynamic_lib.c (#188469)

As noted in https://github.com/llvm/llvm-project/pull/188406 comments,
the documentation recommends guarding only with
__has_feature(address_sanitizer). This patch updates the test to follow
the same pattern by removing the
__SANITIZER_DISABLE_CONTAINER_OVERFLOW__ checks. Having this macro
defined results in the common_interface_defs.h header defining the
contiguous container functions as no-ops anyway.

This is a followup to https://github.com/llvm/llvm-project/pull/188406.
DeltaFile
+4-8compiler-rt/test/asan/TestCases/stack_container_dynamic_lib.c
+4-81 files

NetBSD/pkgsrc jh4zey0doc CHANGES-2026

   Updated security/py-cryptography[_vectors]
VersionDeltaFile
1.1914+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc Aiixk2ssecurity/py-cryptography distinfo Makefile, security/py-cryptography_vectors distinfo Makefile

   py-cryptography py-cryptography_vectors: updated to 46.0.6

   46.0.6 - 2026-03-25

   * **SECURITY ISSUE**: Fixed a bug where name constraints were not applied
     to peer names during verification when the leaf certificate contains a
     wildcard DNS SAN. Ordinary X.509 topologies are not affected by this bug,
     including those used by the Web PKI. Credit to **Oleh Konko (1seal)** for
     reporting the issue. **CVE-2026-34073**
VersionDeltaFile
1.75+4-4security/py-cryptography_vectors/distinfo
1.114+4-4security/py-cryptography/distinfo
1.141+2-3security/py-cryptography/Makefile
1.78+2-2security/py-cryptography_vectors/Makefile
+12-134 files

LLVM/project 07cce30llvm/test/tools/llvm-debuginfod-find headers-winhttp.test

Revert "[llvm] Attempt to re-enable llvm-debuginfod-find test on Windows bots" (#188935)

Reverts llvm/llvm-project#188810
DeltaFile
+10-1llvm/test/tools/llvm-debuginfod-find/headers-winhttp.test
+10-11 files

OPNSense/core 9ed8513src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes BaseSetField.php, src/opnsense/mvc/app/models/OPNsense/Kea KeaDhcpv6.php KeaDhcpv4.php

kea: move pool-in-subnet validation logic mostly to KeaPoolsField; closes #10040

While here use getValues() consistently and move the trim() calls to the
latest point in time to avoid generalized trimming of input (the subnet
notation isn't allowed to be trimmed).

An alternative would have been to allow " ?- ?" as a split-regex since the
trim() itself will allow the leading an trailing whitespaces of the pool line,
too.

Suggested by: @Astranox
DeltaFile
+32-6src/opnsense/mvc/app/models/OPNsense/Kea/FieldTypes/KeaPoolsField.php
+6-16src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv6.php
+1-1src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/BaseSetField.php
+1-1src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv4.php
+40-244 files

LLVM/project 5145d72llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp SPIRVGlobalRegistry.cpp, llvm/test/CodeGen/SPIRV/pointers PtrCast-in-OpSpecConstantOp.ll

[SPIR-V] Emit OpSpecConstantComposite for composites with spec constant operands (#188557)

- The SPIR-V spec requires that OpConstantComposite must not reference
spec constant operands. When a composite contains non-constant
constitued, OpSpecConstantComposite should be emitted instead of
OpConstantComposite
- Avoid creating function pointer types when the
SPV_INTEL_function_pointers extension is unavailable, falling back to i8
as the pointee type
- Re-enable spirv-val validation in tests that previously failed due to
this issue, and un-XFAIL the block_w_struct_return and global_block
transcoding tests

related to #60133
fixes #186756
DeltaFile
+27-2llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+11-10llvm/test/CodeGen/SPIRV/transcoding/global_block.ll
+9-10llvm/test/CodeGen/SPIRV/transcoding/block_w_struct_return.ll
+9-10llvm/test/CodeGen/SPIRV/pointers/PtrCast-in-OpSpecConstantOp.ll
+9-5llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+5-7llvm/test/CodeGen/SPIRV/transcoding/ConvertPtrInGlobalInit.ll
+70-444 files not shown
+80-6110 files

LLVM/project 8ab7b37openmp/cmake OpenMPTesting.cmake, openmp/runtime/test lit.cfg lit.site.cfg.in

[OpenMP][test] Remove %flags-use-compiler-omp-h (#188789)

With the standalone and project builds removed,
`OPENMP_TEST_COMPILER_HAS_OMP_H`/`config.test_compiler_has_omp_h` is set
to constant 1, which causes the `config.omp_header_directory` search
path NOT to be added to `%flags-use-compiler-omp-h`, causing the system
`omp.h` used, or the only test actually using it
(`omp50_taskdep_depobj.c`) failing if that one is not available.

The intention of `OPENMP_TEST_COMPILER_HAS_OMP_H` was to use gcc's
`omp.h` which declares `omp_depend_t` differently than our `omp.h`
(https://reviews.llvm.org/D108790). Using `OPENMP_TEST_C_COMPILER=gcc`
was used to test libomp's GOMP compatibility layer, but testing it is
currently unmaintained and has no buildbot (60 failing tests out of 389
with gcc-13, not including OMPD and OMPT). If updating testing for GOMP,
then gcc's own `omp.h` must be used for all tests: using the GOMP ABI
requires using GOMP's `omp.h`.

Closes: #187879
DeltaFile
+0-12openmp/runtime/test/lit.cfg
+1-1openmp/runtime/test/tasking/omp50_taskdep_depobj.c
+0-2openmp/cmake/OpenMPTesting.cmake
+0-1openmp/runtime/test/lit.site.cfg.in
+0-1openmp/runtime/test/CMakeLists.txt
+1-175 files

OPNSense/core 71ae01fsrc/opnsense/mvc/app/models/OPNsense/Base/FieldTypes BaseSetField.php, src/opnsense/mvc/app/models/OPNsense/Kea KeaDhcpv6.php

kea: move pool-in-subnet validation logic mostly to KeaPoolsField
DeltaFile
+32-6src/opnsense/mvc/app/models/OPNsense/Kea/FieldTypes/KeaPoolsField.php
+5-15src/opnsense/mvc/app/models/OPNsense/Kea/KeaDhcpv6.php
+1-1src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/BaseSetField.php
+38-223 files

LLVM/project 88c5774llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp, llvm/test/CodeGen/SPIRV/llvm-intrinsics bitreverse.ll bitreverse_small_type.ll

[SPIRV] Add bitreverse expansion for kernel (#186412)

The OpBitReverse is available when Shader or SPV_KHR_bit_instructions
extension is enabled. For targets without these capabilities, introduce
software emulation of G_BITREVERSE based on the parallel bit reversal
algorithm:
https://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel

The emulation supports 8/16/32/64-bit scalars and vectors using bitwise
operations (shifts, AND, OR). A helper lambda avoids undefined behavior
when computing masks for 64-bit types.

Tests added for both emulation and native paths across all supported
types.

Assisted-by: Claude Code
DeltaFile
+395-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse.ll
+232-78llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll
+81-13llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+708-913 files

LLVM/project 35781a7libclc/clc/include/clc/subgroup clc_sub_group_non_uniform_reduce_decl.inc clc_sub_group_non_uniform_reduce.h, libclc/clc/lib/amdgpu/subgroup clc_sub_group_non_uniform_reduce.cl clc_sub_group_reduce.cl

libclc: Partially implement nonuniform subgroup reduce functions (#188929)

For AMDGPU these are identical to the uniform case. Stub out the missing
cases with traps to avoid test failures from undefined symbols while
keeping the structure consistent.
DeltaFile
+384-0libclc/clc/lib/amdgpu/subgroup/clc_sub_group_non_uniform_reduce.cl
+8-134libclc/clc/lib/amdgpu/subgroup/clc_sub_group_reduce.cl
+48-0libclc/opencl/lib/generic/subgroup/sub_group_non_uniform_reduce.inc
+33-0libclc/clc/include/clc/subgroup/clc_sub_group_non_uniform_reduce_decl.inc
+30-0libclc/opencl/lib/generic/subgroup/sub_group_non_uniform_reduce.cl
+29-0libclc/clc/include/clc/subgroup/clc_sub_group_non_uniform_reduce.h
+532-1343 files not shown
+560-1349 files

FreeBSD/ports 03a722dmail/mlmmj-archiver distinfo Makefile

mail/mlmmj-archiver: release 0.6.2
DeltaFile
+3-3mail/mlmmj-archiver/distinfo
+1-1mail/mlmmj-archiver/Makefile
+4-42 files

NetBSD/src 8s7m5dJtests/bin/sh t_expand.sh

   Add some tests for an ancient NetBSD sh bug

   This adds 78 sub-tests to the t_expand:alternative test-case.

   In old NetBSD shells - which means anything from May 1994 (when CSRG
   BSD 4.4 lite was merged into NetBSD) until (early hours UTC) 26 Mar 2026,
   12 of these new 78 sub-tests would fail.

   The issue being tested here was fixed about 32 hours ago, along with the
   completely unrelated fix for the recently introduced land mine off by one bug.
   All these new sub-tests will pass in a /bin/sh from HEAD now.

   No other shell I have to test (except bosh) fails any of these added
   78 sub-tests (and bosh, which also fails plenty of the existing ones, fails
   less of the new ones than the NetBSD sh did - and different sub-tests).
   Of course, since I am adding tests to deliberately provoke what I already
   knew from reading the source would fail in our shell, that is perhaps an
   unfair comparison.


    [11 lines not shown]
VersionDeltaFile
1.29+51-1tests/bin/sh/t_expand.sh
+51-11 files

NetBSD/pkgsrc PpBhsOkdoc CHANGES-2026

   doc: Updated audio/rubberband to 4.0.0
VersionDeltaFile
1.1913+2-1doc/CHANGES-2026
+2-11 files

LLVM/project 67b5715llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-flt' into arm-fp-faddsub
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files

LLVM/project 45b21adllvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-fix' into arm-fp-flt
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files

LLVM/project dce023ellvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-f2d2f' into arm-fp-fix
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files

LLVM/project 584fe53llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-fcmp' into arm-fp-f2d2f
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files

LLVM/project b046026llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-dcmp' into arm-fp-fcmp
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files

NetBSD/pkgsrc saT3zVMaudio/rubberband PLIST distinfo, audio/rubberband/patches patch-src_common_mathmisc.h

   audio/rubberband: update to 4.0.0

   Version 4.0.0 is a major release which adds a new API, RubberBandLiveShifter, which is simpler to use than the general RubberBandStretcher interface in cases where only pitch-shifting is required. For more general purposes the original interface is still the proper one.

   The rest of the API is otherwise unchanged, so the library continues to be binary compatible with the 2.x and 1.x releases for existing applications. Code written to use earlier versions of the library can link and run against this version without alteration.
VersionDeltaFile
1.1+14-0audio/rubberband/patches/patch-src_common_mathmisc.h
1.9+6-5audio/rubberband/PLIST
1.9+5-4audio/rubberband/distinfo
1.19+2-3audio/rubberband/Makefile
1.8+2-2audio/rubberband/buildlink3.mk
+29-145 files

LLVM/project 0f2c019llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-dmuldiv' into arm-fp-dcmp
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files

LLVM/project b5c9babllvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i64-stride-7.ll vector-interleaved-store-i64-stride-7.ll

Merge branch 'arm-fp-daddsub' into arm-fp-dmuldiv
DeltaFile
+6,835-6,798llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+6,432-6,562llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+4,982-4,991llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+4,364-4,820llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,814-3,848llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+31,017-31,6425,677 files not shown
+289,135-131,5975,683 files