LLVM/project b23840dllvm/test/Transforms/LoopUnroll/branch-weights-freq unroll-epilog.ll peel.ll

[LoopUnroll][NFC] Simplify recent block frequency tests

Refactor a number of recent tests in
`llvm/test/Transforms/LoopUnroll/branch-weights-freq` to make it
easier to understand and extend them.

The changes mostly resemble the refactoring I recently did in
PR#165635 in response to reviewer comments:
- For each case (e.g., each `-unroll-count` value in
  `unroll-epilog.ll`), group all FileCheck directives together.  That
  way, while digesting a single case, the reader does not need to sift
  through all other cases and a complex FileCheck prefix scheme.
- Reduce CFG testing.  Drop many FileCheck directives that check for
  all basic block labels and branches, and drop the cryptic
  `-implicit-check-not` that excludes others.  Instead, just use
  positive checks for every loop body (represented by `call void @f`),
  for relevant metadata, and for the branch instructions to which the
  metadata is attached, and use simple negative checks (e.g.,
  `-implicit-check-not='!prof'`) to be sure we have not missed any.

    [4 lines not shown]
DeltaFile
+184-122llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-epilog.ll
+31-43llvm/test/Transforms/LoopUnroll/branch-weights-freq/peel.ll
+34-37llvm/test/Transforms/LoopUnroll/branch-weights-freq/unroll-partial.ll
+249-2023 files

FreeBSD/ports 811f998sysutils/go-ntfy distinfo Makefile

sysutils/go-ntfy: Update to 2.16.0

ChangeLog: https://github.com/binwiederhier/ntfy/releases/tag/v2.16.0
DeltaFile
+7-7sysutils/go-ntfy/distinfo
+2-3sysutils/go-ntfy/Makefile
+9-102 files

LLVM/project cf63329llvm/docs LangRef.rst

[IR] Update dereferencable wording after opaque pointers (#176991)

The documentation for the dereferenceable argument attribute mentioned
pointee types. Making a distinction around a pointee type no longer
makes sense after the move to opaque pointers.
DeltaFile
+4-5llvm/docs/LangRef.rst
+4-51 files

FreeBSD/doc 689b33bwebsite/content/en/cgi ports.cgi

ports.cgi: less perl warnings
DeltaFile
+4-6website/content/en/cgi/ports.cgi
+4-61 files

LLVM/project 7d4865emlir/include/mlir/Dialect/NVGPU/Transforms MemoryAccessOpInterfacesImpl.h, mlir/lib/Dialect/NVGPU/Transforms MemoryAccessOpInterfacesImpl.cpp

clang-format
DeltaFile
+3-4mlir/lib/Dialect/NVGPU/Transforms/MemoryAccessOpInterfacesImpl.cpp
+0-1mlir/include/mlir/Dialect/NVGPU/Transforms/MemoryAccessOpInterfacesImpl.h
+3-52 files

LLVM/project 0784819llvm/lib/Target/AMDGPU FLATInstructions.td

[AMDGPU] Allow predicates for alias in VFLAT_Real_AllAddr_gfx1250 (#176987)

Expose alias definition earlier, and add a new argument to specify the predicates for alias definition.
 This is for downstream development and NFC for now.
DeltaFile
+8-14llvm/lib/Target/AMDGPU/FLATInstructions.td
+8-141 files

LLVM/project 1061207llvm/lib/Target/PowerPC PPCTargetTransformInfo.cpp PPCTargetTransformInfo.h, llvm/test/Analysis/CostModel/PowerPC ld-st-with-length.ll

[PowerPC] cost modeling for length type VP intrinsic load/store (#168938)

Override and fill in the target hooks for PPC that allow opt to cost
using length style VP intrinsics for load/store.
DeltaFile
+321-0llvm/test/Analysis/CostModel/PowerPC/ld-st-with-length.ll
+96-1llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+15-0llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
+432-13 files

LLVM/project cf68af6llvm/test/TableGen directive2.td directive1.td, llvm/utils/TableGen/Basic DirectiveEmitter.cpp

[TableGen] Emit constexpr versions of some directive/clause functions (#176253)

Several of the functions that TableGen emits into the .cpp files for
OpenACC or OpenMP could be constexpr. They can't just be emitted into
the header files as constexpr as they are because they use "assert" and
"llvm_unreachable".
To preserve the existing functionality, this patch will cause TableGen
to emit the constexpr variants that return the value as std::optional,
where std::nullopt indicates an error. The exisiting functions will
invoke the constexpr versions and call assert/llvm_unreachable if
nullopt is returned. E.g.

```
// .h
constexpr std::optional<Association>
getDirectiveAssociationOpt(Directive D) {
  switch (D) {
    case ...:
      return Association::Block;

    [12 lines not shown]
DeltaFile
+108-39llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
+56-25llvm/test/TableGen/directive2.td
+56-25llvm/test/TableGen/directive1.td
+220-893 files

LLVM/project 7116d65llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-vcvt_f32_su32.ll arm64-vcvt_n.ll

[msan][NFCI] Add more NEON vector conversion tests (#176248)

Covers some strictly handled instructions:
- llvm.aarch64.neon.vcvtfp2hf
- llvm.aarch64.neon.vcvthf2fp
- llvm.aarch64.neon.vcvtfxs2fp
- llvm.aarch64.neon.vcvtfxu2fp

Forked from llvm/test/CodeGen/AArch64
DeltaFile
+160-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt_f32_su32.ll
+146-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vcvt_n.ll
+306-02 files

LLVM/project 14363eblibc/src/spawn/linux posix_spawn.cpp

[libc] Never consider an fd being 0 as an error when opening (#176581)

This is not semantically correct, as we can get 0 when calling open.
DeltaFile
+1-1libc/src/spawn/linux/posix_spawn.cpp
+1-11 files

LLVM/project 7289545clang/lib/Sema AnalysisBasedWarnings.cpp

attach source ranges to diags instead of location
DeltaFile
+4-4clang/lib/Sema/AnalysisBasedWarnings.cpp
+4-41 files

FreeNAS/freenas f798daasrc/middlewared/middlewared/plugins/directoryservices_ secrets.py connection.py

Flake8 fixes
DeltaFile
+1-1src/middlewared/middlewared/plugins/directoryservices_/secrets.py
+0-1src/middlewared/middlewared/plugins/directoryservices_/connection.py
+1-22 files

LLVM/project 902de4alldb/docs/use mcp.md

[lldb] Fix the mcp configuration in the mcp.md (#176878)

Per
https://code.visualstudio.com/docs/copilot/customization/mcp-servers#_configuration-structure,
the `mcp.json` has the `"servers": {}` as main section.
DeltaFile
+6-8lldb/docs/use/mcp.md
+6-81 files

FreeNAS/freenas bfad2f6src/middlewared/middlewared/plugins smb.py, src/middlewared/middlewared/plugins/directoryservices_ secrets.py connection.py

Handle stateful SMB directory services

Directory services secrets will be clustered when stateful SMB
failover is enabled. This requires some logic to sync from TDB
to CTDB and impacts how we restore config.
DeltaFile
+49-15src/middlewared/middlewared/plugins/directoryservices_/secrets.py
+14-0src/middlewared/middlewared/plugins/smb.py
+5-3src/middlewared/middlewared/plugins/directoryservices_/connection.py
+8-0src/middlewared/middlewared/utils/tdb.py
+76-184 files

LLVM/project 9bd0db7llvm/lib/Target/AMDGPU SIISelLowering.cpp

AMDGPU: Handle FP in integer in argument lowering (#175835)

This avoids an assertion when softPromoteHalfType is
enabled.
DeltaFile
+10-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+10-31 files

LLVM/project 6490250llvm/docs Extensions.rst, llvm/include/llvm/MC MCSection.h

MC: Add directive for specifying a section's preferred alignment.

The new asm directive:

.prefalign n

specifies that the preferred alignment of the current section is
determined by taking the maximum of ``n`` and the section's minimum
alignment.

Sections whose size is larger than the preferred alignment are aligned
to the preferred alignment. If the size of a section with a preferred
alignment is between the minimum alignment and the preferred alignment,
the section alignment is the smallest power of 2 >= the section size.

Part of this RFC:
https://discourse.llvm.org/t/rfc-enhancing-function-alignment-attributes/88019

Reviewers: efriedma-quic, vitalybuka, MaskRay

    [4 lines not shown]
DeltaFile
+104-0llvm/test/MC/ELF/prefalign.s
+20-0llvm/lib/MC/MCParser/AsmParser.cpp
+15-0llvm/docs/Extensions.rst
+14-0llvm/include/llvm/MC/MCSection.h
+10-0llvm/lib/MC/MCSection.cpp
+4-4llvm/lib/MC/ELFObjectWriter.cpp
+167-48 files not shown
+191-414 files

LLVM/project 25c95bdllvm/lib/Target/AMDGPU GCNPreRAOptimizations.cpp

[AMDGPU] Use subclass quesry for VGPR_16 RA hinting. NFCI
DeltaFile
+1-2llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
+1-21 files

FreeBSD/ports b8f1706devel/cdk distinfo Makefile

devel/cdk: Update to 5.0-20260119

ChangeLog: https://invisible-island.net/cdk/CHANGES.html
DeltaFile
+3-3devel/cdk/distinfo
+1-1devel/cdk/Makefile
+4-42 files

HardenedBSD/src 14a067csys/kern kern_jail.c

HBSD: Remove more old cruft regarding MAC jail destruction

There was an additional piece of code that needed to be removed. It
called mac_prison_destroy when it doesn't need to be called anymore (or
at least, not where the original call took place).

Favor FreeBSD's MAC jail destruction paths by removing the extra call to
mac_prison_destroy.

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
DeltaFile
+0-6sys/kern/kern_jail.c
+0-61 files

LLVM/project dddb1c7llvm/test/tools/llvm-objdump/MachO arm64-disassembly-color.s, llvm/tools/llvm-objdump MachODump.cpp llvm-objdump.cpp

[llvm-objdump] Fix --disassembler-color with --macho flag (#163815)

The --disassembler-color option was being ignored when using the --macho
flag because DisassembleMachO() never called setUseColor() on the
instruction printer.
DeltaFile
+16-2llvm/tools/llvm-objdump/MachODump.cpp
+1-8llvm/tools/llvm-objdump/llvm-objdump.cpp
+8-0llvm/tools/llvm-objdump/llvm-objdump.h
+4-0llvm/test/tools/llvm-objdump/MachO/arm64-disassembly-color.s
+29-104 files

LLVM/project d67da03mlir/lib/Dialect/XeGPU/IR XeGPUDialect.cpp

fix format
DeltaFile
+16-10mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
+16-101 files

LLVM/project 510863emlir/lib/Dialect/MemRef/Transforms FoldMemRefAliasOps.cpp, mlir/test/Dialect/MemRef fold-memref-alias-ops.mlir

[mlir][MemRef] Make fold-memref-alias-ops use memref interfaces

This replaces the large switch-cases and operation-specific patterns
in FoldMemRefAliashops with patterns that use the new
IndexedAccessOpInterface and IndexedMemCopyOpInterface, which will
allow us to remove the memref transforms' dependency on the NVGPU
dialect.

This does also resolve some bugs and potential unsoundnesses:
1. We will no longer fold in expand_shape into vector.load or
vector.transfer_read in cases where that would alter the strides
between dimensions in multi-dimensional loads. For example, if we have
a `vector.load %e[%i, %j, %k] : memref<8x8x9xf32>, vector<2x3xf32>`
where %e is
`expand_shape %m [[0], [1], [2. 3]] : memref<8x8x3x3xf32> to 8x8x9xf32,
we will no longer fold in that shape, since that would change which
value would be read (the previous patterns tried to account for this
but failed).
2. Subviews that have non-unit strides in positions that aren't being

    [15 lines not shown]
DeltaFile
+400-419mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
+292-1mlir/test/Dialect/MemRef/fold-memref-alias-ops.mlir
+692-4202 files

LLVM/project 1f9b559mlir/include/mlir/Dialect/MemRef/IR MemRefOps.td, mlir/include/mlir/Dialect/NVGPU/IR NVGPUOps.td

[mlir] Implement indexed access op interfaces for memref, vector, gpu, nvgpu

This commit implements the IndexedAccessOpInterface and
IndexedMemCopyInterface for all operations in the memref and vector
dialects that it would appear to apply to. It follows the code in
FoldMemRefAliasOps and ExtractAddressComputations to define the
interface implementations. This commit also adds the interface to the
GPU subgroup MMA load and store operations and to any NVGPU operations
currently being handled by the in-memref transformations (there may be
more suitable operations in the NVGPU dialect, but I haven't gone
looking systematically)

This code will be tested by a later commit that updates
fold-memref-alias-ops.

Assisted-by: Claude Code, Cursor (interface boilerplate, sketching out
implementations)
DeltaFile
+162-0mlir/lib/Dialect/Vector/Transforms/IndexedAccessOpInterfaceImpl.cpp
+66-64mlir/include/mlir/Dialect/NVGPU/IR/NVGPUOps.td
+115-0mlir/lib/Dialect/GPU/Transforms/IndexedAccessOpInterfaceImpl.cpp
+91-0mlir/lib/Dialect/NVGPU/Transforms/MemoryAccessOpInterfacesImpl.cpp
+69-0mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+27-6mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
+530-7013 files not shown
+655-7219 files

LLVM/project 7979652mlir/include/mlir/Interfaces VectorInterfaces.td VectorInterfaces.h

[mlir] Add [may]updateStartingPosition to VectorTransferOpInterface

This commit adds methods to VectorTransferOpInterface that allow
transfer operations to be queried for whether their base memref (or
tensor) and permutation map can be updated in some particular way and
then for performing this update. This is part of a series of changes
designed to make passes like fold-memref-alias-ops more generic,
allowing downstream operations, like IREE's transfer_gather, to
participate in them without needing to duplicate patterns.
DeltaFile
+67-1mlir/include/mlir/Interfaces/VectorInterfaces.td
+1-0mlir/include/mlir/Interfaces/VectorInterfaces.h
+68-12 files

NetBSD/pkgsrc 8K8O7dmdoc CHANGES-2026

   Updated devel/py-sarge, mail/py-imapclient
VersionDeltaFile
1.527+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc Nts7JfBmail/py-imapclient Makefile distinfo

   py-imapclient: updated to 3.1.0

   3.1.0

   New Features

   Simplify IMAP4_TLS class and fix Python 3.14+ compatibility

   Other Changes

   Fix typo in man page: certifcate -> certificate
   Move man page to section 7
   update supported python versions in doc
   chore(deps-dev): bump mypy from 1.6.1 to 1.8.0
   chore(deps-dev): bump sphinx from 6.2.1 to 7.2.6
   chore: add setuptools to requirements-dev.txt
   chore(deps-dev): bump black from 23.11.0 to 24.4.2
   chore(deps-dev): bump pylint from 3.0.2 to 3.2.6
   chore(deps-dev): bump flake8 from 6.1.0 to 7.1.0

    [12 lines not shown]
VersionDeltaFile
1.9+3-7mail/py-imapclient/Makefile
1.6+4-4mail/py-imapclient/distinfo
+7-112 files

LLVM/project 19f22a0llvm/lib/Target/AMDGPU SIISelLowering.cpp

whitespace fix
DeltaFile
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-11 files

LLVM/project a83a412llvm/lib/Target/AMDGPU SIISelLowering.cpp

Apply suggestion from @cdevadas

Co-authored-by: Christudasan Devadasan <christudasan.devadasan at amd.com>
DeltaFile
+2-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-21 files

FreeNAS/freenas da41929src/middlewared/middlewared/etc_files/ctdb nodes.mako ctdb.conf.mako, src/middlewared/middlewared/plugins smb.py etc.py

NAS-139388 / 26.04 / Simplify ctdb process management for HA (#18062)

Starting / stopping / reconfiguring ctdbd on an active system is fragile
and can and can trigger asserts in ctdbd if there are dependent services
with active ctdb sessions. Since the configuration is static and relies
on internal interfaces, we can simplify the ctdb process management so
that it always runs on truenas HA.
DeltaFile
+4-4src/middlewared/middlewared/plugins/smb.py
+1-3src/middlewared/middlewared/etc_files/ctdb/nodes.mako
+1-3src/middlewared/middlewared/plugins/etc.py
+4-0src/middlewared/middlewared/plugins/failover.py
+1-1src/middlewared/middlewared/etc_files/ctdb/ctdb.conf.mako
+11-115 files

NetBSD/pkgsrc 8HKzRWAdevel/py-sarge distinfo Makefile

   py-sarge: updated to 0.1.8

   0.1.8

   Fixed 55: Polled subcommands in order to return up-to-date return codes in Pipeline.returncodes.
   Fixed 56: Ensure process_ready event is set at the appropriate time.
   Fixed 57: Stored exception in command node for use when in asynchronous mode.
   Fixed 58: Ensure Capture object has a flush method.
VersionDeltaFile
1.6+4-4devel/py-sarge/distinfo
1.5+2-2devel/py-sarge/Makefile
+6-62 files