[clang] NFC: add asserts enforcing template parameters have valid positions
Some tests are violating these assertions, so they are commented out.
For the test in `clang/test/SemaTemplate/concepts.cpp`, that was broken by #195995
and needs a partial revert at least.
[Instrumentor] Introduce BasePointerIO to communicate base pointer information
Loads, stores, and later probably calls, can request a base pointer info
object from the user runtime. This object is queried right after the
base pointer of the operation is defined, and then passed to the
pre/post runtime calls of the loads and stores. This allows users to
inspect pointers early and once, but provide the analysis results to all
operations that might be executed in loops. A potential use case is to
lookup the size and start of the underlying object and then provide
those to the access runtime calls for in-bounds checking.
[PowerPC] Simplify lowering for lwat/ldat intrinsics (#194486)
This change defines 4 new output patterns, `PAIR8`,`EVEN8`, `AEXT8`, and
`TRUNC4`, and uses them to implement the lowering of the intrinsics
`int_ppc_amo_l[dw]at` and `int_ppc_amo_l[dw]at_cond` in TableGen. As
result, the output pattern to generate the instructions becomes more
understandable,, and the C++ code can be removed.
[OpenMP][MLIR] Modify lowering OpenMP Dialect lowering to support attach mapping
This PR adjusts the LLVM-IR lowering to support the new attach map type that the runtime
uses to link data and pointer together, this swaps the mapping from the older
OMP_MAP_PTR_AND_OBJ map type in most cases and allows slightly more complicated ref_ptr/ptee
and attach semantics.
[clang] NFC: add asserts enforcing template parameters have valid positions
Some tests are violating these assertions, so they are commented out.
Most of these are alias CTAD tests, with a couple of lambda in concepts tests on
top of that.
For the test in `clang/test/SemaTemplate/concepts.cpp`, that was broken by #195995
and needs a partial revert at least.
Update sysutils/intel-microcode-netbsd to 20260512
### Purpose
- Security updates for INTEL-SA-01420
- Update for functional issues. Refer to 4th Gen Intel Xeon Scalable Processors Specification Update for details.
- Update for functional issues. Refer to 5th Gen Intel Xeon Scalable Processors Specification Update for details.
- Update for functional issues. Refer to Intel Core Ultra 200 V Series Processor for details.
- Update for functional issues. Refer to Intel Core Ultra Processors (Series 2) for details.
- Update for functional issues. Refer to Intel Core Ultra Processors (Series 3) for details.
- Update for functional issues. Refer to Intel Xeon 6700 Series Processors with E-cores for details.
- Update for functional issues. Refer to Intel Xeon 6900/6700/6500 Series Processors with P-cores for details.
- Update for functional issues. Refer to Intel Xeon 6700P-B/6500P-B-Series SoC with P-Cores for details.
### New Platforms
| Processor | Stepping | F-M-S/PI | Old Ver | New Ver | Products
|:---------------|:---------|:------------|:---------|:---------|:---------
| PTL 404 | A1 | 06-cc-03/90 | | 0000011b | Intel Core Ultra Processor (Series 3)
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mitigate AMD Zen-2 operation cache corruption
On Zen 2, the operation cache can be used to change instructions
of a different privilege level.
https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7052.html
The mitigation is setting a chicken bit in an MSR. This is not documented
publicly, even in the security bulletin. The value comes from a patch
submitted to Linux by AMD employees.
ok deraadt@ brynet@
[Instrumentor] Add support for modules and globals
We can emit callbacks when a module is loaded/unloaded and before
globals are initialized. Both happens in newly introduced constructors
and destructors.
[Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (#184556)
This patch fixes several LLVM test failures on Windows that occur when
the LLVM_WINDOWS_PREFER_FORWARD_SLASH CMake option is enabled.
The failures were caused by tests either hardcoding backslash
expectations in FileCheck or constructing paths with strict backslashes
in C++ unit tests, both of which break when the environment is
configured to prefer forward slashes.
Specific changes:
- `llvm-cov` lit tests: Changed the path separators with
`-DSEP=%{fs-sep}`.
- `llvm-objdump` lit test: Relaxed
`source-interleave-prefix-windows.test` to accept either forward or
backward slashes using the `{{[/\\]}}` regex. This makes the path
matching resilient to the underlying separator preference without losing
precision.
- CommandLineTest.cpp: Conditionalized the TestRoot variable to use
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[Instrumentor] Add support for modules and globals
We can emit callbacks when a module is loaded/unloaded and before
globals are initialized. Both happens in newly introduced constructors
and destructors.
[Instrumentor] Add a property filter for static properties
The user can define static filters in the json to limit instrumentation
to opportunities that match the static expression, e.g., is_volatile==1.
The matcher logic is pretty basic for now. Integer comparisons, pointer
null checks, string equalities and startswith are supported.
The commit was prepared with Claude (AI) and modified/tested by me.
[llvm] Add a tablegen !sort operator (#197303)
This operator creates a new ``list`` containing the same elements as
*list*
but in sorted order. To determine the order, TableGen binds the variable
*var* to each element and evaluates the *key* expression, which
presumably
refers to *var*. The key must produce a ``string`` or integer value
(``bit``, ``bits``, or ``int``); all keys must be of the same type.
Elements
with equal keys preserve their original relative order, resulting in a
stable
sort.
For example, to sort a list of records by their ``Name`` field::
` list<Thing> sorted = !sort(t, Things, t.Name);`
[Offload] Make 'llvm-offload-binary' use multi-binaries (#197456)
Summary:
There's two ways you can put multiple binaries in the section. Either
use the version two multi-binary support or just concatenate them. This
PR changes the llvm-offload-binary tool to use the multi-support rather
than directly concatenating them.
The motivation for this is to save space and make it easier to support
compression in the future. Compression would be a flag in the header and
the compression is only really valuable if it can combine the
architecture variants. ELF section compression is a little spotty but
would be another good solution.
devel/py-pytest-mock: Update to 3.15.1
Tweaks on top of the PR patch:
- Use DISTVERSION (referenced by ${DISTVERSION} in DISTNAME) instead
of PORTVERSION.
- Add py-wheel to BUILD_DEPENDS (required by USE_PYTHON=pep517 with the
setuptools build backend).
- Bump pytest dep to >=6.2.5 to match upstream pyproject.toml.
PR: 273337
Submitted by: takefu
nfscl: Disable use of callbacks for NFSv4.0
The only use for callbacks for NFSv4.0 is delegations
and delegations rarely work well for NFSv4.0 anyhow.
Therefore, this patch disables callbacks for the
NFSv4.0 client. This is the same behavior as
occurred when the nfscbd(8) daemon was not running.
This change allowed a function called nfscl_getmyip()
to be removed from the kernel, which is nice since
maintaining this function was bothersome, due to its
use of routing, etc.
(cherry picked from commit 71ac1ec5c9d990e7881e75f04140eb0bfe473a21)
newport: timing fixes, documentation fixes, XMAP code refactoring
* Update the README to describe what the newport driver really supports now.
* Refactor the XMAP9 access to mirror what I did in the newport console
driver in the kernel.
* Add some comments around the acceleration routines to do with GFIFO
tracking and potential overruns.
* Document what some of the acceleration routines are doing.
* Add an option to set the XMAP9 timing (fast, slow) in case someone's
using a 1024x768x60Hz monitor (like me).
* Always setup an RGB2 ramp regardless of 8 or 24 bit operation.
It doesn't hurt to set this up for both and it'll be useful later on
when I add/commit support for 24 bit framebuffer via hardware dithering
on XL8.
RGB2 is one of the DAC colour spaces which are used to translate the 24 bit
RGB values into what is sent to the 13W3 connector. This isn't an 8 bit
colour map for 8 bit psuedo colour, this is a gamma correction table which
the hardware can choose per-pixel by settings in the XMAP/VC2 (but is
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