LLVM/project ee28ae7 — orc-rt/tools/ogre ogre.cpp

[orc-rt] Add comments to the ogre utility. NFC. (#226900)
DeltaFile
+45-4orc-rt/tools/ogre/ogre.cpp
+45-41 files

LLVM/project 7cb518a — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

TargetMachine: Remove pointer-size query methods (#226404)

Remove the shim methods from the TargetMachine's copy of the DataLayout, 
which will soon be eliminated. The Module owns the authoritative DataLayout, 
so callers should read the value from the contextual Module.

Completely unreasonably, Mips's ABI name can change the pointer size which
we probably should just not support. Many other triple checks will never be 
correct. This avoids potential mismatches in these contexts, but I still expect
this to be widely broken.

Some of the TargetLowering constructor changes and AMDGPULegalizerInfo
changes are kind of annoying. We could pass in the DataLayout through the 
subtarget constructors but it didn't seem worth the effort and the information 
should be derivable from the triple anyway.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+11-15llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+14-12llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+12-7llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+4-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+5-2llvm/include/llvm/CodeGen/AsmPrinter.h
+3-2llvm/lib/Target/AVR/AVRTargetMachine.h
+49-4132 files not shown
+108-8438 files

FreeBSD/ports 3c40c3b — games/emptyepsilon Makefile

games/emptyepsilon: fix configure with CMake 4

PR:     297973
DeltaFile
+2-0games/emptyepsilon/Makefile
+2-01 files

FreeBSD/ports 4e84008 — cad/cascade-compiler Makefile

cad/cascade-compiler: fix configure with CMake 4

PR:     297914
DeltaFile
+1-0cad/cascade-compiler/Makefile
+1-01 files

FreeBSD/ports 018a8a0 — math/colpack Makefile

math/colpack: fix configure with CMake 4

PR:     297943
DeltaFile
+1-0math/colpack/Makefile
+1-01 files

FreeBSD/ports f948e41 — science/coordgenlibs Makefile

science/coordgenlibs: fix configure with CMake 4

PR:     297947
DeltaFile
+1-0science/coordgenlibs/Makefile
+1-01 files

FreeBSD/ports 2485ca5 — biology/edlib Makefile distinfo

biology/edlib: fix configure with CMake 4

PR:     297971
DeltaFile
+3-3biology/edlib/distinfo
+2-1biology/edlib/Makefile
+5-42 files

FreeBSD/ports fcaa98b — graphics/ossim distinfo Makefile

graphics/ossim: Update to 2.12.1

PR:             298802
Approved by:    lbartoletti (maintainer)
DeltaFile
+30-1graphics/ossim/pkg-plist
+8-4graphics/ossim/Makefile
+3-3graphics/ossim/distinfo
+41-83 files

FreeNAS/freenas e2709f4 — src/middlewared/middlewared/plugins/zfs resource_create.py share_presets.py, tests/api2 test_zvol_resize.py

Follow-up fixes to the zfs.resource shims

## Problem
- **share_type ACL target**: `zfs.resource.create` checked traversal for and applied the `share_type` ACL at `/mnt/<path>`. Under a parent with a custom mountpoint the new filesystem mounts elsewhere, so the traversal check looked at the wrong directories and the ACL step failed after the dataset was already created.
- **test_zvol_resize**: the read-only, locked and headroom cases expected a single `ValidationError`, but `pool.dataset.update` now reports them together as `ValidationErrors`, so all four failed.

## Solution
- **share_type ACL target**: work out where the new filesystem mounts from its nearest existing ancestor's mountpoint and use that for both the traversal check and `setacl`. A parent whose mountpoint is `none` or `legacy` keeps the `/mnt/<path>` target master used.
- **test_zvol_resize**: expect `ValidationErrors`; the messages matched are unchanged.
DeltaFile
+17-5src/middlewared/middlewared/plugins/zfs/share_presets.py
+5-5tests/api2/test_zvol_resize.py
+4-3src/middlewared/middlewared/plugins/zfs/resource_create.py
+26-133 files

LLVM/project 42477f2 — llvm/lib/Target/NVPTX NVPTXTargetMachine.cpp NVPTXCodeGenPassBuilder.cpp, llvm/test/CodeGen/NVPTX llc-pipeline-npm.ll

NVPTX: Drop LiveVariables from the register allocation pipeline

The optimized RegAlloc pipeline ran LiveVariables only to satisfy PHIElimination
and TwoAddressInstruction, both of which no longer need it. Remove the
LiveVariables run (and, in the new pass manager, the UnreachableMachineBlockElim
that was there only as a LiveVariables prerequisite).

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+0-7llvm/lib/Target/NVPTX/NVPTXCodeGenPassBuilder.cpp
+0-2llvm/test/CodeGen/NVPTX/llc-pipeline-npm.ll
+0-1llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+0-103 files

LLVM/project 17f2379 — llvm/lib/Target/AMDGPU SIFoldOperands.cpp SIInstrInfo.cpp, llvm/lib/Target/RISCV RISCVInstrInfo.cpp

CodeGen: Drop the LiveVariables parameter from convertToThreeAddress

This was used for analysis updates, but now the analysis is being
removed.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+15-69llvm/lib/Target/X86/X86InstrInfo.cpp
+0-17llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+0-11llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+1-10llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+2-4llvm/lib/Target/X86/X86InstrInfo.h
+2-2llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+20-1136 files not shown
+25-12012 files

LLVM/project 60fc055 — llvm/lib/Target/AMDGPU SILowerControlFlow.cpp, llvm/test/CodeGen/AMDGPU lower-control-flow-live-variables-update.xfail.mir lower-control-flow-live-variables-update.mir

AMDGPU: Remove update-only LiveVariables maintenance from SILowerControlFlow

This was only maintained, never relied on. Part of staged LiveVariables
removal.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+87-0llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
+5-71llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+0-42llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
+92-1133 files

LLVM/project 4bc5bfe — llvm/lib/CodeGen TwoAddressInstructionPass.cpp, llvm/test/CodeGen/Hexagon two-addr-tied-subregs.mir

CodeGen: Remove LiveVariables use from TwoAddressInstructionPass

Now that LiveIntervals is computed unconditionally before TwoAddressInstructions
in the pipeline, the pass no longer needs LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+38-131llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+18-18llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
+9-16llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
+8-8llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
+7-7llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
+3-3llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
+83-1831 files not shown
+85-1857 files

LLVM/project 3c6aab7 — llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll amdgcn.bitcast.960bit.ll, llvm/test/CodeGen/X86 mul-i1024.ll

CodeGen: Compute LiveIntervals before TwoAddressInstructions

TwoAddressInstructions is the traditional primary use of LiveVariables,
but it has gained a LiveIntervals path. By moving LiveIntervals earlier,
the default flips to rely on it instead of LiveVariables. The overall
test churn is mostly neutral, with more net wins than losses.

This should move before phi elimination. This is a staging move to
incrementally remove the LiveVariables support from TwoAddressInstructions,
and because the move to running LiveIntervals on SSA is a bigger leap.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+2,603-2,582llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+1,833-1,839llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+1,790-1,779llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+1,685-1,735llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+1,569-1,565llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+1,316-1,322llvm/test/CodeGen/X86/mul-i1024.ll
+10,796-10,822299 files not shown
+47,312-47,703305 files

LLVM/project 2378df7 — llvm/lib/CodeGen TargetPassConfig.cpp, llvm/test/CodeGen/RISCV/rvv fminimum-sdnode.ll fmaximum-sdnode.ll

Remove the obsolete -early-live-intervals flag
DeltaFile
+89-180llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
+2-9llvm/test/CodeGen/Thumb2/mve-shuffle.ll
+0-8llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
+0-8llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
+1-5llvm/test/CodeGen/Thumb2/mve-vld3.ll
+0-5llvm/lib/CodeGen/TargetPassConfig.cpp
+92-21543 files not shown
+96-27449 files

OPNSense/plugins 0382ba2 — net/frr/src/opnsense/mvc/app/views/OPNsense/Quagga ospf6.volt ospf.volt

net/frr: OSPF/OSPFv3 move tabs around to reflect natural configuration order
DeltaFile
+2-2net/frr/src/opnsense/mvc/app/views/OPNsense/Quagga/ospf.volt
+1-1net/frr/src/opnsense/mvc/app/views/OPNsense/Quagga/ospf6.volt
+3-32 files

OPNSense/plugins 268712e — net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms ospf.xml dialogEditOSPFInterface.xml, net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga OSPF.xml

net/frr: OSPF passive interface moves to correct spot, the interface configuration
DeltaFile
+74-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/Migrations/M1_1_5.php
+5-8net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF.xml
+11-0net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms/dialogEditOSPFInterface.xml
+3-7net/frr/src/opnsense/service/templates/OPNsense/Quagga/Config/ospfd.conf
+0-6net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms/ospf.xml
+93-215 files

OPNSense/plugins b01e77f — net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga OSPF6.xml OSPF.xml

net/frr: OSPF/OSPFv3 Interface should be required and exclude firewall group interfaces
DeltaFile
+2-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF6.xml
+2-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF.xml
+4-02 files

OPNSense/plugins f987839 — net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms dialogEditOSPF6Area.xml, net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga OSPF6.xml OSPF.xml

net/frr: make OSPF and OSPFv3 areas explicit
DeltaFile
+130-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/Migrations/M1_1_4.php
+53-37net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF.xml
+52-8net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF6.xml
+56-0net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms/dialogEditOSPF6Area.xml
+31-22net/frr/src/opnsense/service/templates/OPNsense/Quagga/Config/ospf6d.conf
+28-22net/frr/src/opnsense/service/templates/OPNsense/Quagga/Config/ospfd.conf
+350-8910 files not shown
+450-15116 files

LLVM/project 70f22b8 — llvm/lib/CodeGen MachineBasicBlock.cpp, llvm/test/CodeGen/AMDGPU phi-elimination-split-critical-edge-subranges.mir

CodeGen: Fix SplitCriticalEdge using wrong VNInfo for subranges (#226214)

This fixes verifier errors when LiveIntervals is run before phi
elimination.

When extending a live interval across a newly split critical edge for a
PHI source operand, the subrange segments were added using the VNInfo of
the main range instead of the subrange's own value. Look up the
subrange's value at the predecessor's last index, as the other subrange
loop in the same function already does, and skip subranges with no value
there.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+68-0llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-subranges.mir
+4-2llvm/lib/CodeGen/MachineBasicBlock.cpp
+72-22 files

NetBSD/pkgsrc-wip bd4dd1e — rust-beta Makefile distinfo

rust-beta: update to 1.99 beta 8
DeltaFile
+3-3rust-beta/distinfo
+1-1rust-beta/Makefile
+4-42 files

OPNSense/plugins 315ca3d — dns/ddclient/src/opnsense/scripts/ddclient/lib/account porkbun.py

dns/ddclient: linter pass over executables
DeltaFile
+0-0dns/ddclient/src/opnsense/scripts/ddclient/lib/account/porkbun.py
+0-01 files

FreeBSD/ports 69ed7d5 — math/qposases Makefile

math/qposases: fix configure with CMake 4

PR:     297940
DeltaFile
+1-0math/qposases/Makefile
+1-01 files

FreeBSD/ports a04b742 — devel/asyncplusplus Makefile

devel/asyncplusplus: fix configure with CMake 4

PR:     297866
DeltaFile
+1-0devel/asyncplusplus/Makefile
+1-01 files

FreeBSD/ports 5037768 — devel/eastl pkg-plist Makefile, devel/eastl/files patch-CMakeLists.txt patch-test_CMakeLists.txt

devel/eastl: update 3.21.23 → 3.27.01; fix configure with CMake 4

PR:     297968
DeltaFile
+15-15devel/eastl/distinfo
+23-0devel/eastl/files/patch-test_packages_EAMain_source_EAMainExit.cpp
+13-9devel/eastl/Makefile
+16-0devel/eastl/files/patch-test_CMakeLists.txt
+12-1devel/eastl/pkg-plist
+1-11devel/eastl/files/patch-CMakeLists.txt
+80-366 files

FreeBSD/ports dcf5a38 — devel/aixlog Makefile

devel/aixlog: fix configure with CMake 4

PR:     297849
DeltaFile
+1-0devel/aixlog/Makefile
+1-01 files

FreeBSD/ports 21ee672 — math/btor2tools distinfo Makefile, math/btor2tools/files patch-configure.sh patch-test_runtests.sh

math/btor2tools: update g20320816 → 1.0.3; fix configure with CMake 4

PR:     297911 (CMake 4)
DeltaFile
+16-0math/btor2tools/files/patch-test_runtests.sh
+4-4math/btor2tools/files/patch-configure.sh
+6-2math/btor2tools/Makefile
+3-3math/btor2tools/distinfo
+29-94 files

OPNSense/plugins 50cbd63 — net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga OSPF6.xml OSPF.xml

net/frr: OSPF/OSPFv3 Interface should be required and exclude firewall group interfaces
DeltaFile
+2-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF6.xml
+2-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF.xml
+4-02 files

OPNSense/plugins 755dab8 — net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms ospf.xml dialogEditOSPFInterface.xml, net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga OSPF.xml

net/frr: OSPF passive interface moves to correct spot, the interface configuration
DeltaFile
+74-0net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/Migrations/M1_1_5.php
+5-8net/frr/src/opnsense/mvc/app/models/OPNsense/Quagga/OSPF.xml
+11-0net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms/dialogEditOSPFInterface.xml
+3-7net/frr/src/opnsense/service/templates/OPNsense/Quagga/Config/ospfd.conf
+0-6net/frr/src/opnsense/mvc/app/controllers/OPNsense/Quagga/forms/ospf.xml
+93-215 files

OPNSense/plugins c508271 — net/frr/src/opnsense/mvc/app/views/OPNsense/Quagga ospf6.volt ospf.volt

net/frr: OSPF/OSPFv3 move tabs around to reflect natural configuration order
DeltaFile
+9-9net/frr/src/opnsense/mvc/app/views/OPNsense/Quagga/ospf.volt
+5-5net/frr/src/opnsense/mvc/app/views/OPNsense/Quagga/ospf6.volt
+14-142 files