x11/quickshell: Add port: Building blocks for your desktop
Quickshell is a toolkit for building status bars, widgets,
lockscreens, and other desktop components using QtQuick. It can be
used alongside your wayland compositor or window manager to build a
complete desktop environment.
WWW: https://quickshell.org/
[LLD][MachO][NFC] Rename Reloc to Relocation (#175586)
Due to heavy use of using namespace llvm, Reloc is often ambiguous with
llvm::Reloc, the relocation model. Previously, this was sometimes
disambiguated with macho::Reloc. This ambiguity is even more problematic
when using pre-compiled headers, where it's no longer "obvious" whether
it should be Reloc or macho::Reloc.
Therefore, rename Reloc to Relocation. This is also consistent with
lld/ELF, where the type is also named Relocation.
[CSSPGO][NFC] Remove unused code in finalizeWeightPropagation() (#175521)
Remove unused code since the usage of `EntryWeight` was dropped in
[D134756](https://reviews.llvm.org/D134756).
[clang-doc] Fix misnamed, mismatched, or incorrect tags (#175112)
This is mostly a chore patch that fixes misnamed, mismatched,
or non-existant tags. That includes renaming the function tags in the
class template to `Has*Methods` instead of `Has*Functions`. The "method"
style was already preferred in the template HTML.
Some extraneous tags were removed from the enum template. All templates
should use
`Description` for rendering comments, but it was still using an old tag
name. Also, the JSON generator currently doesn't serialize individual
enum value comments, so that tag was removed. Same for public members.
`Description` is removed for friends due to the way Mustache handles
missing
tags. If `Description` isn't present, it will use the parent's
description which is undesirable.
[RISCV] Merge the 'f' and 'r' field argument of the RVPPairBase class. (#175694)
I don't think the spec ever calls this field 'r' for any of the
instructions that use this class. The bit is either a constant 0/1 or
part of 'f'. Make it a 4-bit 'f' and make the derived classes
concatenate the 0/1 when they need to widen from 3 bits to 4.
[LoongArch] Enable tail calls for sret and byval functions (#168506)
Allow tail calls for functions returning via sret when the caller's sret
pointer can be reused. Also support tail calls for byval arguments.
The previous restriction requiring exact match of caller and callee
arguments is relaxed: tail calls are allowed as long as the callee does
not use more stack space than the caller.
Fixes #168152
[RISCV] Add isCommutable=1 to some binary P extension instructions. (#175692)
This allows MachineCSE to commute these instructions if it would allow
CSE.
Remove caching from sysdataset plugin
Retrieving the underlying dataset name for the sysdataset path
is now only two syscalls (statx + statmount) instead of reading
the entire /proc/self/mountinfo contents and so this extra caching
actually hurting us now.
Rework system dataset migration to be less bad
This commit reworks how we migrate the system datasets so that
it's somewhat less racy and uses kernel APIs for this.
On migration:
1. build new mount tree in middleware run dir
2. sync data from old to new
3. move new under old
4. move old to middleware rundir
5. restart services
6. cleanup
[Metadata][profcheck] Handle identical MDNodes in getMergedProfMetadata
This fixes a bug where !prof metadata was dropped from SelectInsts when GVN simplified/merged them.
Guarded by -profcheck-disable-metadata-fixes. Exposed by the tests in
Transforms/SampleProfile.
[libc++][istream] Removed `[[nodiscard]]` from `peek()` (#175591)
Calling `peek()` after constructing a stream is something one can use to
make the stream ignore empty inputs:
```
#include <sstream>
int main() {
std::istringstream s;
s.peek();
while (s && !s.eof()) {
char c;
s >> c;
printf("not eof; read \'%c\' (%d)\n", c, c);
}
}
```
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[InlineSpiller][AMDGPU] Implement subreg reload during RA spill
Currently, when a virtual register is partially used, the
entire tuple is restored from the spilled location, even if
only a subset of its sub-registers is needed. This patch
introduces support for partial reloads by analyzing actual
register usage and restoring only the required sub-registers.
This improvement enhances register allocation efficiency,
particularly for cases involving tuple virtual registers.
For AMDGPU, this change brings considerable improvements
in workloads that involve matrix operations, large vectors,
and complex control flows.
[AMDGPU] Put back ProperlyAlighedRC helper functions
Putting back the functions that are recently deleted
as they were found unused. They are needed for
implementing subreg reload during RA.
[AMDGPU] Test precommit for subreg reload
This test currently fails due to insufficient
registers during allocation. Once the subreg
reload is implemented, it will begin to pass
as the partial reload help mitigate register
pressure.
[CodeGen] Enhance createFrom for sub-reg aware cloning
Instead of just cloning the virtual register, this
function now creates a new virtual register derived
from a subregister class of the original value.
