LLVM/project bfa3da8clang/lib/AST/ByteCode Record.h Record.cpp

[clang][bytecode] Optimize `interp::Record` a bit (#183494)

And things around it.

Remove the `FieldMap`, since we can use the field's index instead and
only keep an array around. `reserve()` the sizes and use
`emplace_back()`.
DeltaFile
+15-7clang/lib/AST/ByteCode/Record.h
+1-9clang/lib/AST/ByteCode/Record.cpp
+5-3clang/lib/AST/ByteCode/Program.cpp
+21-193 files

LLVM/project bb30e28llvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/unittests/Target/AArch64 InstSizes.cpp

[AArch64] Report accurate sizes for MOVaddr and MOVimm pseudos
DeltaFile
+89-0llvm/unittests/Target/AArch64/InstSizes.cpp
+28-16llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+117-162 files

ELF Tool Chain/elftoolchain 4334trunk/readelf readelf.c

readelf: Use elftc_get_program_name(3).
DeltaFile
+2-3trunk/readelf/readelf.c
+2-31 files

FreeBSD/ports 64cc754astro/traccar distinfo Makefile

astro/traccar: update to 6.12.1
DeltaFile
+3-3astro/traccar/distinfo
+1-2astro/traccar/Makefile
+1-1astro/traccar/pkg-plist
+5-63 files

FreeBSD/ports b53971ddns Makefile

dns/knot-resolver6: Connect to build

Reported by:    antoine (via email)
Fixes:          36bded72682c (Add new port)
MFH:            2026Q1

(cherry picked from commit ac0b4215121d7653a0bae2504c7c3b68d3ea39a6)
DeltaFile
+1-0dns/Makefile
+1-01 files

FreeBSD/ports ac0b421dns Makefile

dns/knot-resolver6: Connect to build

Reported by:    antoine (via email)
Fixes:          36bded72682c (Add new port)
MFH:            2026Q1
DeltaFile
+1-0dns/Makefile
+1-01 files

LLVM/project 9e48c00llvm/test/CodeGen/AMDGPU local-stack-alloc-add-references.gfx8.mir coalesce-copy-to-agpr-to-av-registers.mir, llvm/test/TableGen ArtificialRegs.td

[TableGen] Complete the support for artificial registers

Artificial registers were added in eb0c510ecde667cd911682cc1e855f73f341d134
as a means of giving super-registers heavier weights than that
of their subregisters, even when they only contain a single
physical subregister.

Artifical registers thus do exist in code and participate in
register unit weight calculations, but are not supposed to be
available for register allocation.

This patch completes the support for artificial registers to:

- Ignore artificial registers when joining register unit uber
  sets. Artificial registers may be members of classes that
  together include registers and their sub-registers, making it
  impossible to compute normalised weights for uber sets they
  belong to.


    [28 lines not shown]
DeltaFile
+180-180llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
+120-120llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
+90-90llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
+60-7llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+56-0llvm/test/TableGen/ArtificialRegs.td
+18-18llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir
+524-41525 files not shown
+675-56231 files

ELF Tool Chain/elftoolchain 4333trunk/size size.c

size: Use elftc_get_program_name(3).
DeltaFile
+2-2trunk/size/size.c
+2-21 files

ELF Tool Chain/elftoolchain 4332trunk/strings strings.c

strings: Use elftc_get_program_name(3).
DeltaFile
+2-2trunk/strings/strings.c
+2-21 files

ELF Tool Chain/elftoolchain 4331trunk/addr2line addr2line.c

addr2line: Use elftc_get_program_name(3).
DeltaFile
+3-2trunk/addr2line/addr2line.c
+3-21 files

LLVM/project d8ce0e7flang/lib/Semantics check-omp-loop.cpp check-omp-structure.h

[flang][OpenMP] Inline CheckNestedBlock, NFC (#181732)

CheckNestedBlock no longer calls itself, which was the primary reason
for the code to be in a separate function.
DeltaFile
+21-26flang/lib/Semantics/check-omp-loop.cpp
+0-2flang/lib/Semantics/check-omp-structure.h
+21-282 files

LLVM/project d3f76b3llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

[AArch64] Report accurate sizes for MOVaddr and MOVimm pseudos
DeltaFile
+28-16llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+28-161 files

LLVM/project 1ec3b86llvm/lib/Target/AArch64 AArch64ExpandPseudo.cpp AArch64ExpandImm.cpp

[NFC][AArch64] Extract MOVaddr* expansion model into common header

This makes the expansion logic reusable by getInstSizeInBytes in a
follow-up patch.
DeltaFile
+742-0llvm/lib/Target/AArch64/AArch64ExpandPseudo.cpp
+0-722llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
+75-56llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+42-0llvm/lib/Target/AArch64/AArch64ExpandPseudo.h
+0-35llvm/lib/Target/AArch64/AArch64ExpandImm.h
+10-9llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+869-8225 files not shown
+886-83911 files

ELF Tool Chain/elftoolchain 4330trunk/libelftc elftc_get_program_name.3 elftc.3

libelftc: document elftc_get_program_name(3).
DeltaFile
+55-0trunk/libelftc/elftc_get_program_name.3
+2-0trunk/libelftc/elftc.3
+57-02 files

LLVM/project 254cb2allvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/CodeGen PostRAHazardRecognizer.cpp

[AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (#176895)

On GFX1250, V_NOPs inserted for WMMA coexecution hazards are placed at
the use-site. When the hazard-consuming instruction is inside a loop and
the WMMA is outside, these NOPs execute every iteration even though the
hazard only needs to be covered once.

This patch hoists the V_NOPs to the loop preheader, reducing executions
from N iterations to 1.

```
Example (assuming a hazard requiring K V_NOPs):
  Before:
    bb.0 (preheader): WMMA writes vgpr0
    bb.1 (loop):      V_NOP xK, VALU reads vgpr0, branch bb.1
                      -> K NOPs executed per iteration

  After:
    bb.0 (preheader): WMMA writes vgpr0, V_NOP xK

    [12 lines not shown]
DeltaFile
+516-30llvm/test/CodeGen/AMDGPU/wmma-nop-hoisting.mir
+163-62llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+21-4llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
+14-7llvm/lib/CodeGen/PostRAHazardRecognizer.cpp
+3-2llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+3-1llvm/include/llvm/CodeGen/TargetInstrInfo.h
+720-1061 files not shown
+722-1077 files

OPNSense/core dd03157src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterBaseController.php, src/opnsense/mvc/app/library/OPNsense/Firewall Rule.php

mvc: PortField: make "well-known" port numbers known #9835

After team discussion it makes sense to not bloat the list
or otherwise adapt it except for the fact that the legacy
GUI has a lookup array now folded into PortField for maximum
effect.

Make the labels nicer and unify them and resolve the service
name via getWellKnown() lookup trick.

We don't need the test anymore.  The PortField use in the
shaper is different and unaffected for better or worse.
We should revisit but not before someone runs into this as
this hasn't happend for many years?

FWIW, the new rules GUI pages could use a better formatter
but then again we were talking about only storing numbers
anyway which the legacy code is doing.  In that case we could
offer a full label to protocol numbers, but not before also
migrating service names to port numbers.
DeltaFile
+56-41src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/PortField.php
+7-50src/www/guiconfig.inc
+9-3src/opnsense/mvc/app/library/OPNsense/Firewall/Rule.php
+2-2src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterBaseController.php
+0-3src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes/PortFieldTest.php
+74-995 files

LLVM/project 32b8b9bllvm/lib/Transforms/Vectorize VPlanConstruction.cpp VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize use-scalar-epilogue-if-tp-fails.ll

[VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (#182507)

Now that we have ExitingIVValue, we can also use it for tail-folded
loops; the only difference is that we have to compute the end value with
the original trip count instead the vector trip count.

This allows removing the induction increment operand only used when
tail-folding.

PR: https://github.com/llvm/llvm-project/pull/182507
DeltaFile
+66-11llvm/test/Transforms/LoopVectorize/X86/fold-tail-low-trip-count.ll
+48-8llvm/test/Transforms/LoopVectorize/AArch64/fold-tail-low-trip-count.ll
+12-26llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll
+10-8llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+12-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-9llvm/test/Transforms/LoopVectorize/X86/small-size.ll
+152-688 files not shown
+167-9614 files

NetBSD/pkgsrc sUxcv3edoc CHANGES-2026

   doc: Updated www/chromium to 145.0.7632.116
VersionDeltaFile
1.1400+2-1doc/CHANGES-2026
+2-11 files

LLVM/project f02c6eallvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-trig-preop.ll

AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (#183306)

This returns a positive value less than 1.
DeltaFile
+2-2llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-trig-preop.ll
+2-1llvm/lib/Analysis/ValueTracking.cpp
+4-32 files

NetBSD/pkgsrc HxdpvJHwww/chromium distinfo Makefile

   www/chromium: update to 145.0.7632.116

   * 145.0.7632.116
   This update includes 3 security fixes. Please see the
   Chrome Security Page for more information.
   [TBD][482862710] High CVE-2026-3061: Out of bounds read in Media.
   Reported by Luke Francis on 2026-02-09
   [TBD][483751167] High CVE-2026-3062: Out of bounds read and write
   in Tint. Reported by cinzinga on 2026-02-11
   [TBD][485287859] High CVE-2026-3063: Inappropriate implementation
   in DevTools. Reported by M. Fauzan Wijaya (Gh05t666nero) on 2026-02-17
VersionDeltaFile
1.30+9-9www/chromium/distinfo
1.44+3-3www/chromium/Makefile
+12-122 files

LLVM/project 69115bellvm/test/CodeGen/AMDGPU annotate-kernel-features-hsa.ll attr-amdgpu-max-num-workgroups-propagate.ll

AMDGPU: Stop adding uniform-work-group-size=false

This is one of the string attributes that takes a boolean
value for no reason. There is no point in ever writing this
with an explicit false. Stop adding the noise and reporting
an unnecessary change.
DeltaFile
+45-44llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
+29-35llvm/test/CodeGen/AMDGPU/attr-amdgpu-max-num-workgroups-propagate.ll
+29-33llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
+24-24llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-sincos.ll
+23-23llvm/test/CodeGen/AMDGPU/amdgpu-attributor-min-agpr-alloc.ll
+21-21llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll
+171-18033 files not shown
+302-32739 files

LLVM/project 516d902llvm/lib/Target/AArch64 AArch64ExpandPseudo.cpp AArch64ExpandImm.cpp

[NFC][AArch64] Extract MOVaddr* expansion model into common header

This makes the expansion logic reusable by getInstSizeInBytes in a
follow-up patch.
DeltaFile
+742-0llvm/lib/Target/AArch64/AArch64ExpandPseudo.cpp
+0-722llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
+75-56llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+42-0llvm/lib/Target/AArch64/AArch64ExpandPseudo.h
+0-35llvm/lib/Target/AArch64/AArch64ExpandImm.h
+9-9llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+868-8225 files not shown
+885-83911 files

ELF Tool Chain/elftoolchain 4329trunk/libelftc elftc_get_program_name.c

libelftc: Use SVN 'Id' keyword expansion for a file.
DeltaFile
+4-0trunk/libelftc/elftc_get_program_name.c
+4-01 files

NetBSD/pkgsrc bBuLTMEdoc CHANGES-2026 TODO

   doc: Updated www/esbuild to 0.27.3
VersionDeltaFile
1.1399+2-1doc/CHANGES-2026
1.26865+1-2doc/TODO
+3-32 files

NetBSD/pkgsrc-wip c4add04esbuild COMMIT_MSG Makefile

esbuild: remove, imported to pkgsrc
DeltaFile
+0-43esbuild/COMMIT_MSG
+0-18esbuild/Makefile
+0-14esbuild/DESCR
+0-11esbuild/distinfo
+0-4esbuild/go-modules.mk
+0-2esbuild/PLIST
+0-921 files not shown
+0-937 files

LLVM/project 7cddd7bllvm/include/llvm/Analysis ScalarEvolution.h ScalarEvolutionExpressions.h, llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Introduce SCEVUse wrapper type (NFC)

Add SCEVUse as a PointerIntPair wrapper around const SCEV * to prepare
for storing additional per-use information.

This commit contains the mechanical changes of adding an intial SCEVUse
wrapper and updating all relevant interfaces to take SCEVUse. Note that
currently the integer part is never set, and all SCEVUses are
considered canonical.
DeltaFile
+295-249llvm/lib/Analysis/ScalarEvolution.cpp
+156-47llvm/include/llvm/Analysis/ScalarEvolution.h
+78-70llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
+36-29llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+25-26llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+17-18llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+607-43922 files not shown
+725-54328 files

NetBSD/pkgsrc-wip 07ab6b3chromium distinfo COMMIT_MSG

chromium: update to 145.0.7632.116
DeltaFile
+9-9chromium/distinfo
+8-8chromium/COMMIT_MSG
+1-1chromium/Makefile
+18-183 files

NetBSD/pkgsrc YTiTLLhwww/esbuild distinfo Makefile

   www/esbuild: update to 0.27.3

   * 0.27.3
   Preserve URL fragments in data URLs
   Parse and print CSS @scope rules
   Fix a minification bug with lowering of for await
   Update the Go compiler from v1.25.5 to v1.25.7

   * 0.27.2
   Allow import path specifiers starting with #/
   Automatically add the -webkit-mask prefix
   Additional minification of switch statements
   Forbid using declarations inside switch clauses

   * 0.27.1
   Fix bundler bug with var nested inside if
   Fix minifier bug with for inside try inside label
   Inline IIFEs containing a single expression
   The minifier now strips empty finally clauses

    [23 lines not shown]
VersionDeltaFile
1.7+4-4www/esbuild/distinfo
1.28+1-2www/esbuild/Makefile
1.6+0-0www/esbuild/go-modules.mk
+5-63 files

LLVM/project cd68939llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPUAsmPrinter.cpp

[AMDGPU] Add attribute for FWD_PROGRESS (#181675)

Added an attribute for FWD_PROGRESS that allows it to be
turned off for some shaders.
DeltaFile
+5-4llvm/test/CodeGen/AMDGPU/pal-metadata-3.0.ll
+4-0llvm/docs/AMDGPUUsage.rst
+1-1llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+10-53 files

ELF Tool Chain/elftoolchain 4328trunk/libelftc elftc_get_program_name.c

elftc_get_program_name: Handle a NULL return from getprogname(3).
DeltaFile
+3-1trunk/libelftc/elftc_get_program_name.c
+3-11 files