LLVM/project 2d10684libcxx/docs/ReleaseNotes 23.rst, libcxx/include/__algorithm ranges_fold.h

[libcxx] Optimize `ranges::fold_left_with_iter` for segmented iterators (#177853)

Part of https://github.com/llvm/llvm-project/issues/102817.

This patch attempts to optimize the performance of
`ranges::fold_left_with_iter` for segmented iterators.

- before

```
# | rng::fold_left(vector<int>)/8             2.78 ns         2.78 ns    241953718
# | rng::fold_left(vector<int>)/32            12.2 ns         12.2 ns     57579851
# | rng::fold_left(vector<int>)/50            19.2 ns         19.2 ns     36487764
# | rng::fold_left(vector<int>)/8192          3226 ns         3226 ns       216811
# | rng::fold_left(vector<int>)/1048576     441842 ns       441839 ns         1592
# | rng::fold_left(deque<int>)/8              2.83 ns         2.83 ns    243888678
# | rng::fold_left(deque<int>)/32             16.6 ns         16.6 ns     42297458
# | rng::fold_left(deque<int>)/50             22.3 ns         22.3 ns     31387998
# | rng::fold_left(deque<int>)/8192           2492 ns         2492 ns       281637

    [26 lines not shown]
DeltaFile
+12-4libcxx/include/__algorithm/ranges_fold.h
+7-0libcxx/test/std/algorithms/alg.nonmodifying/alg.fold/left_folds.pass.cpp
+4-0libcxx/docs/ReleaseNotes/23.rst
+23-43 files

FreeNAS/freenas 3734367src/middlewared/middlewared/plugins network.py, src/middlewared/middlewared/plugins/interface vlan.py sync.py

add configure_vlans
DeltaFile
+69-36src/middlewared/middlewared/plugins/interface/vlan.py
+8-0src/middlewared/middlewared/plugins/interface/sync.py
+0-8src/middlewared/middlewared/plugins/network.py
+77-443 files

FreeNAS/freenas af6bd2csrc/middlewared/middlewared/plugins/interface bond.py

more simplification
DeltaFile
+2-2src/middlewared/middlewared/plugins/interface/bond.py
+2-21 files

FreeNAS/freenas bc8ad91src/middlewared/middlewared/plugins failover.py

NAS-139623 / 25.10.2 / Fix incorrect method called on failover update (by themylogin) (by bugclerk) (#18152)

`update.update` is now a `ConfigService` method. The correct method to
call is `update.run`

The fix is not retroactive. Existing systems will have to be updated
using manual update upload.

Additionally, fix the bug where local update job succeeds, remote job
fails, but update status is displayed as successful.

Original PR: https://github.com/truenas/middleware/pull/18151

Co-authored-by: themylogin <themylogin at gmail.com>
DeltaFile
+7-2src/middlewared/middlewared/plugins/failover.py
+7-21 files

LLVM/project 823e3e0libc/src/__support/math exp.h expm1.h

[libc][math] Resolve size issues on baremetal and cleanup code. (#179707)

DeltaFile
+21-20libc/src/__support/math/exp.h
+17-18libc/src/__support/math/expm1.h
+16-18libc/src/__support/math/exp10.h
+24-9libc/src/__support/math/sincosf_utils.h
+14-13libc/src/__support/math/acosf.h
+12-14libc/src/__support/math/exp2.h
+104-92110 files not shown
+336-322116 files

FreeNAS/freenas 412207fsrc/middlewared/middlewared/plugins failover.py

NAS-139623 / 26.0.0-BETA.1 / Fix incorrect method called on failover update (by themylogin) (#18151)

`update.update` is now a `ConfigService` method. The correct method to
call is `update.run`

The fix is not retroactive. Existing systems will have to be updated
using manual update upload.

Additionally, fix the bug where local update job succeeds, remote job
fails, but update status is displayed as successful.

Co-authored-by: themylogin <themylogin at gmail.com>
DeltaFile
+7-2src/middlewared/middlewared/plugins/failover.py
+7-21 files

LLVM/project 744827ellvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 pr179489.ll

[X86] Fixed truncated masked stores (#179853)

Fixes: #179489
DeltaFile
+57-0llvm/test/CodeGen/X86/pr179489.ll
+10-2llvm/lib/Target/X86/X86ISelLowering.cpp
+67-22 files

FreeNAS/freenas 2636964src/middlewared/middlewared/plugins/webshare sharing.py, src/middlewared/middlewared/utils path.py

Address Claude review
DeltaFile
+4-2src/middlewared/middlewared/plugins/webshare/sharing.py
+1-1src/middlewared/middlewared/utils/path.py
+5-32 files

HardenedBSD/src 153371cusr.bin/touch touch.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+4-9usr.bin/touch/touch.c
+4-91 files

HardenedBSD/src 3a6b698release/tools azure.conf openstack.conf, sbin/ifconfig ifgre.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+2-2sbin/ifconfig/ifgre.c
+2-2stand/efi/loader/main.c
+2-2stand/i386/loader/main.c
+1-1release/tools/azure.conf
+1-1release/tools/openstack.conf
+8-85 files

FreeNAS/freenas 17cc10csrc/middlewared/middlewared/plugins sysdataset.py, src/middlewared/middlewared/plugins/pool_ import_pool.py pool.py

NAS-139363 / 26.0.0-BETA.1 / Reset pool mountpoint even when its explicitly set to the default value (#18148)

## Summary
- On pool import, inherit root dataset mountpoint if source is not
"default" (even if the value is correct)
- Explicitly set mountpoints cause issues during replication as the
property gets replicated to target systems where paths differ
DeltaFile
+52-0tests/api2/test_pool_import.py
+7-6src/middlewared/middlewared/plugins/pool_/import_pool.py
+2-2src/middlewared/middlewared/plugins/pool_/pool.py
+1-1src/middlewared/middlewared/plugins/sysdataset.py
+1-1src/middlewared/middlewared/plugins/test/mock.py
+63-105 files

LLVM/project db07843clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

Comment
DeltaFile
+0-2clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+0-21 files

HardenedBSD/ports d78d5d4graphics/gegl/files patch-gegl_gegl-init.c, graphics/xournalpp pkg-plist

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+801-481misc/codex/distinfo
+399-239misc/codex/Makefile.crates
+68-12graphics/xournalpp/pkg-plist
+63-0graphics/gegl/files/patch-gegl_gegl-init.c
+49-0x11/babl/files/patch-babl_babl.c
+17-16www/trac/Makefile
+1,397-74833 files not shown
+1,563-81939 files

LLVM/project f0dcb2fmlir/include/mlir/IR BuiltinTypeInterfaces.td BuiltinTypeInterfaces.h, mlir/lib/IR BuiltinTypes.cpp BuiltinAttributes.cpp

getter / iterator via interface
DeltaFile
+153-0mlir/lib/IR/BuiltinTypes.cpp
+32-110mlir/lib/IR/BuiltinAttributes.cpp
+68-56mlir/include/mlir/IR/BuiltinTypeInterfaces.td
+53-0mlir/lib/IR/BuiltinTypeInterfaces.cpp
+20-13mlir/lib/IR/AsmPrinter.cpp
+16-0mlir/include/mlir/IR/BuiltinTypeInterfaces.h
+342-1794 files not shown
+365-19310 files

LLVM/project 3e240e0llvm/include/llvm/IR DebugInfo.h, llvm/lib/Analysis ModuleDebugInfoPrinter.cpp

[DebugInfo] Add macro tracking support to DebugInfoFinder

Extend DebugInfoFinder to collect and expose macro debug information
(DIMacro and DIMacroFile nodes).

Also update ModuleDebugInfoPrinter to display macro information including
the macro type, name, value, and source location.
DeltaFile
+44-0llvm/lib/IR/DebugInfo.cpp
+32-0llvm/test/DebugInfo/Generic/debuginfofinder-macros.ll
+25-0llvm/lib/Analysis/ModuleDebugInfoPrinter.cpp
+8-0llvm/include/llvm/IR/DebugInfo.h
+109-04 files

LLVM/project 31a0195mlir/include/mlir/IR BuiltinTypeInterfaces.td BuiltinTypeInterfaces.h, mlir/lib/IR BuiltinTypes.cpp BuiltinAttributes.cpp

getter / iterator via interface
DeltaFile
+153-0mlir/lib/IR/BuiltinTypes.cpp
+32-110mlir/lib/IR/BuiltinAttributes.cpp
+68-56mlir/include/mlir/IR/BuiltinTypeInterfaces.td
+53-0mlir/lib/IR/BuiltinTypeInterfaces.cpp
+20-13mlir/lib/IR/AsmPrinter.cpp
+16-0mlir/include/mlir/IR/BuiltinTypeInterfaces.h
+342-1795 files not shown
+363-19011 files

FreeNAS/freenas e9589a7src/middlewared/middlewared/plugins/interface configure.py

simplify and dont block event loop
DeltaFile
+0-11src/middlewared/middlewared/plugins/interface/configure.py
+0-111 files

FreeNAS/freenas 6084aefsrc/middlewared/middlewared/plugins/interface bond.py

address review
DeltaFile
+1-1src/middlewared/middlewared/plugins/interface/bond.py
+1-11 files

FreeNAS/freenas c9b3839src/middlewared/middlewared/plugins/interface configure.py bond.py

address review
DeltaFile
+11-0src/middlewared/middlewared/plugins/interface/configure.py
+1-2src/middlewared/middlewared/plugins/interface/bond.py
+12-22 files

LLVM/project 238ccd0llvm/include/llvm/ADT ScopeExit.h

[llvm][ADT] Mark scope_exit contructors [[nodiscard]] (#179720)

DeltaFile
+3-2llvm/include/llvm/ADT/ScopeExit.h
+3-21 files

LLVM/project df38810llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU promote-alloca-non-volatile-accesses.ll promote-alloca-vgpr-ratio.ll

[AMDGPU][PromoteAlloca] Set !amdgpu.non.volatile if promotion fails

I thought about doing this in a separate pass, but this pass already has all the necessary analysis for this to be a trivial addition.
We can simply set `!amdgpu.non.volatile`  if all other attempts to promote the operation failed.
DeltaFile
+45-0llvm/test/CodeGen/AMDGPU/promote-alloca-non-volatile-accesses.ll
+23-18llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
+29-2llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+2-2llvm/test/CodeGen/AMDGPU/promote-alloca-memset.ll
+99-224 files

LLVM/project 33cb864llvm/lib/Target/AMDGPU SIISelLowering.cpp

Rename to MOThreadPrivate
DeltaFile
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-11 files

LLVM/project 28c76cfllvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU SIISelLowering.cpp

Pull metadata impl at the top of the patch stack
DeltaFile
+218-0llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
+23-0llvm/docs/AMDGPUUsage.rst
+2-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+243-03 files

LLVM/project e619011llvm/test/CodeGen/AMDGPU pei-build-spill-offset-overflow-gfx950.mir

fix test
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/pei-build-spill-offset-overflow-gfx950.mir
+2-21 files

OPNSense/core 4f528e6src/opnsense/mvc/app/models/OPNsense/Firewall Filter.xml

Firewall: Rules [new]: The SKIP icmp type is not a valid name for pf, most likely a bug. Number would work
DeltaFile
+1-1src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.xml
+1-11 files

FreeNAS/freenas c5ca7f2src/middlewared/middlewared/plugins failover.py

Fix incorrect method called on failover update
DeltaFile
+7-2src/middlewared/middlewared/plugins/failover.py
+7-21 files

LLVM/project c493141llvm/test/Bitcode compatibility.ll, llvm/test/CodeGen/AMDGPU default-fp-mode.ll

Fix test merge
DeltaFile
+34-67llvm/test/Transforms/Attributor/nofpclass.ll
+9-9llvm/test/Transforms/Attributor/denormal-fp-math.ll
+8-8llvm/test/Bitcode/compatibility.ll
+5-5llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
+2-2llvm/test/Transforms/InstSimplify/constant-fold-fp-denormal.ll
+0-3llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-maxnum.ll
+58-9412 files not shown
+69-10818 files

LLVM/project 54eb7b8llvm/test/Transforms/Attributor nofpclass.ll

Fix test
DeltaFile
+10-10llvm/test/Transforms/Attributor/nofpclass.ll
+10-101 files

LLVM/project 99858b1llvm/test/Bitcode auto_upgrade_denormal_fp_math.ll

Clean up upgrade test
DeltaFile
+8-5llvm/test/Bitcode/auto_upgrade_denormal_fp_math.ll
+8-51 files

LLVM/project 38ce2c1clang/test/CodeGen denormalfpmode-f32.c, llvm/docs LangRef.rst

Address comments
DeltaFile
+49-48llvm/test/Bitcode/auto_upgrade_denormal_fp_math.ll
+12-6llvm/test/Assembler/invalid_denormal_fpenv.ll
+4-13mlir/test/Target/LLVMIR/Import/function-attributes.ll
+9-5llvm/lib/AsmParser/LLParser.cpp
+8-4llvm/docs/LangRef.rst
+6-6clang/test/CodeGen/denormalfpmode-f32.c
+88-826 files not shown
+103-9612 files