FreeBSD/ports 345cd69devel/git-modes distinfo Makefile

devel/git-modes: udpate to 1.4.8.
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+1-1devel/git-modes/Makefile
+4-42 files

LLVM/project 17ad555clang/docs ReleaseNotes.rst, clang/include/clang/Sema Sema.h

[Clang] Added clang diagnostic when snprintf/vsnprintf uses sizeof(dest) for the len parameter

Closes: [#162366](https://github.com/llvm/llvm-project/issues/162366)

---------

Co-authored-by: Bogdan Zunic <bzunic at cisco.com>
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+71-56clang/lib/Sema/SemaChecking.cpp
+116-0clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
+3-0clang/docs/ReleaseNotes.rst
+2-0clang/include/clang/Sema/Sema.h
+192-564 files

FreeNAS/freenas 825a4besrc/middlewared/middlewared/pytest/unit/plugins test_datastore.py

Fix
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+2-1src/middlewared/middlewared/pytest/unit/plugins/test_datastore.py
+2-11 files

LLVM/project d710b1cclang/docs CMakeLists.txt index.rst, clang/include/clang/Basic BuiltinsAMDGPUDocs.td BuiltinsAMDGPU.td

[Clang][AMDGPU][Docs] Add builtin documentation for AMDGPU builtins

Use the documentation generation infrastructure to document the AMDGPU builtins.
This PR starts with the ABI / Special Register builtins. Documentation for the
remaining builtin categories will be added incrementally in follow-up patches.
DeltaFile
+291-0clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
+114-30clang/include/clang/Basic/BuiltinsAMDGPU.td
+1-0clang/docs/CMakeLists.txt
+1-0clang/docs/index.rst
+407-304 files

LLVM/project 802e1afclang/utils/TableGen ClangBuiltinsEmitter.cpp

review comments
DeltaFile
+18-22clang/utils/TableGen/ClangBuiltinsEmitter.cpp
+18-221 files

LLVM/project e85b10bclang/include/clang/Basic BuiltinsBase.td, clang/test/TableGen builtin-docs.td

[Clang][TableGen] Add documentation generation infrastructure for builtins

Add a `-gen-builtin-docs` TableGen backend that generates RST
documentation from builtin definitions, modeled after the existing
attribute documentation system (`-gen-attr-docs`).

The emitter generates per-builtin RST sections grouped by category, including
prototype rendering with optional named parameters (via `ArgNames`), target
feature annotations, and documentation content. A mismatch between `ArgNames`
count and prototype parameter count is a fatal error.
DeltaFile
+265-0clang/test/TableGen/builtin-docs.td
+187-0clang/utils/TableGen/ClangBuiltinsEmitter.cpp
+50-0clang/include/clang/Basic/BuiltinsBase.td
+6-0clang/utils/TableGen/TableGen.cpp
+2-0clang/utils/TableGen/TableGenBackends.h
+510-05 files

LLVM/project 6e179bbllvm/lib/Target/AMDGPU AMDGPURegBankCombiner.cpp

Fix formatting
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+1-2llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+1-21 files

LLVM/project f5cd21ellvm/test/CodeGen/AMDGPU llvm.is.fpclass.ll llvm.is.fpclass.f16.ll, llvm/test/CodeGen/AMDGPU/GlobalISel regbankcombiner-copy-scc-vcc.mir inst-select-copy-scc-vcc.ll

Remove wip_match_opcode, add TODO for regression
DeltaFile
+83-175llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
+115-116llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-copy-scc-vcc.mir
+36-81llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
+14-16llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy-scc-vcc.ll
+9-9llvm/test/CodeGen/AMDGPU/fminimum.ll
+9-9llvm/test/CodeGen/AMDGPU/fmaximum.ll
+266-4065 files not shown
+284-42311 files

LLVM/project bf83bbfllvm/include/llvm/CodeGen SlotIndexes.h

[SlotIndexes] Make IndexListEntry/slot constructor private

This was made public only for some unit tests introduced in
e5e3dccd0741c2cf6e1885f0b6053fcfc6684102 that have now been removed.
Since they have been removed, make the method private to prevent misuse,
remove the warning now that misuse is prevented by visibility, and
remove the description of the destructor given it is redundant with the
code.
DeltaFile
+2-5llvm/include/llvm/CodeGen/SlotIndexes.h
+2-51 files

LLVM/project 553ce3aflang-rt/include/flang-rt/runtime memory.h

[flang-rt] Temporarily disable destructor call in OwningPtr::delete_ptr. (#182635)

This is causing failures in CUF testing, because the device compiler
cannot identify the static stack size for kernels.
DeltaFile
+21-0flang-rt/include/flang-rt/runtime/memory.h
+21-01 files

LLVM/project f2eff5amlir/include/mlir/Dialect/AMDGPU/IR AMDGPUOps.td

[mlir][amdgpu] Revise AMDGPU dialect DPP documentation (#182639)

Assisted by: Claude

---------

Signed-off-by: Eric Feng <Eric.Feng at amd.com>
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+91-14mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
+91-141 files

HardenedBSD/ports fbc90bbscience/zotero Makefile

HBSD: Disable PaX PAGEEXEC and PaX NOEXEC for science/zotero

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
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+4-1science/zotero/Makefile
+4-11 files

NetBSD/src I0obCVEsbin/ccdconfig ccdconfig.8

   ccdconfig(8): g/c stray trailing whitespace in previous
VersionDeltaFile
1.30+2-2sbin/ccdconfig/ccdconfig.8
+2-21 files

NetBSD/src 96uVGjusbin/ccdconfig ccdconfig.8

   ccdconfig(8): brush up markup
VersionDeltaFile
1.29+66-48sbin/ccdconfig/ccdconfig.8
+66-481 files

LLVM/project a2b7f1fllvm/include/llvm/LTO LTO.h, llvm/include/llvm/Transforms/IPO MemProfContextDisambiguation.h

[ThinLTO][MemProf] Support remark emission for thin link and use in MemProf (#182570)

Enable optimization remark emission during the ThinLTO thin link phase.
This is useful for global analysis passes like MemProf context
disambiguation which operate on the summary index and may need to
report diagnostics before any IR modules are available.

Key changes:
- Create a dummy function ("thinlto_remark_dummy") in a private Module
  within the LTO class to provide the necessary Function context for
  OptimizationRemarkEmitter.
- Update MemProfContextDisambiguation to use a callback for remark
  emission, allowing it to report hinted sizes and other diagnostics
  during the thin link.
- Ensure the dummy module and function are safely cleaned up at the end
  of the LTO session via the LTO::cleanup mechanism.
DeltaFile
+24-16llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
+24-1llvm/lib/LTO/LTO.cpp
+9-0llvm/include/llvm/LTO/LTO.h
+5-2llvm/test/ThinLTO/X86/memprof-basic.ll
+3-1llvm/include/llvm/Transforms/IPO/MemProfContextDisambiguation.h
+65-205 files

NetBSD/src esTEw0Rsbin/ccdconfig ccd.conf.5

   ccd.conf(5): brush up markup

   .Ar produces "file ..." so make "dev ..." here follow the same pattern
   using the right font too.
VersionDeltaFile
1.7+11-15sbin/ccdconfig/ccd.conf.5
+11-151 files

LLVM/project 594e9fbllvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV condops.ll select.ll

[RISCV] Remove srl from (srl (and X, (1 << C)), C) used as czero.eqz/nez condition. (#182598)

(setne (and X, 1 << C), 0) is canonicalized to (srl (and X, (1 << C)),
C).
If this is later used as a czero.eqz/nez condition, we can remove
the srl if the and can be represented as an ANDI.
DeltaFile
+108-0llvm/test/CodeGen/RISCV/condops.ll
+55-0llvm/test/CodeGen/RISCV/select.ll
+20-3llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+183-33 files

FreeNAS/freenas 7952816src/middlewared/middlewared/test/integration/utils ha.py, tests/sharing_protocols/iscsi test_262_iscsi_alua.py test_261_iscsi_cmd.py

NAS-139920 / 26.0.0-BETA.1 / Improve settle_ha (#18265)

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+30-2tests/sharing_protocols/iscsi/test_262_iscsi_alua.py
+3-21tests/sharing_protocols/iscsi/test_261_iscsi_cmd.py
+1-0src/middlewared/middlewared/test/integration/utils/ha.py
+34-233 files

FreeNAS/freenas 4a098c7src/middlewared/middlewared/plugins/pool_ dataset_encryption_info.py

NAS-139921 / 26.0.0-BETA.1 / Fix broken check for locked shares (#18266)

The fast path added for when we have dataset names can set None type for
locked rather than false. This commit ensures that we have boolean
output.
DeltaFile
+1-1src/middlewared/middlewared/plugins/pool_/dataset_encryption_info.py
+1-11 files

FreeBSD/ports 78447a3x11-toolkits/py-wxpython Makefile distinfo, x11-toolkits/py-wxpython/files patch-pyproject.toml

x11-toolkits/py-wxpython: update to 4.2.5

Changelog: https://github.com/wxWidgets/Phoenix/blob/wxPython-4.2.5/CHANGES.rst
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+3-7x11-toolkits/py-wxpython/Makefile
+1-8x11-toolkits/py-wxpython/files/patch-pyproject.toml
+3-5x11-toolkits/py-wxpython/distinfo
+7-203 files

LLVM/project c3ddc3fllvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Fix formatting

Created using spr 1.3.7
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+4-4llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-41 files

LLVM/project 3343a5bclang/lib/Frontend CompilerInvocation.cpp, clang/test/CodeGenHLSL/builtins step-overloads.hlsl

[HLSL] Enable `-Wconversion`, `-Wvector-conversion`, and `-Wmatrix-conversion` warnings for HLSL by default (#182607)

Fixes #180038 by enabling `-Wconversion`, `-Wvector-conversion`, and
`-Wmatrix-conversion` warnings for HLSL by default, both in the HLSL
clang driver and when fixing up clang invocations under HLSL in
CompilerInvocation.cpp (so that they are enabled even with clang -cc1).

This PR also updates existing tests to expect warnings that weren't
expected before, and removes the `-Wconversion` flags from existing HLSL
tests since it is now redundant due to being enabled by default.

Note that no existing HLSL tests use or exercise `-Wvector-conversion`
or `-Wmatrix-conversion`.
DeltaFile
+28-0clang/test/SemaHLSL/no-conversion-warnings.hlsl
+17-0clang/test/Driver/HLSL/conversion-warning-flags.hlsl
+12-0clang/lib/Frontend/CompilerInvocation.cpp
+0-7clang/test/Driver/HLSL/wconversion.hlsl
+3-3clang/test/SemaHLSL/SplatOverloadResolution.hlsl
+2-2clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
+62-1238 files not shown
+109-5744 files

LLVM/project c9d5e47llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 tsc-s352.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+241-41llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
+221-41llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
+63-29llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
+60-23llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+26-24llvm/test/Transforms/SLPVectorizer/X86/phi.ll
+7-13llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s352.ll
+618-1712 files not shown
+633-1858 files

FreeNAS/freenas 2b99d28src/middlewared/middlewared/pytest/unit/plugins test_datastore.py

Fix test
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+1-6src/middlewared/middlewared/pytest/unit/plugins/test_datastore.py
+1-61 files

LLVM/project 555cb27llvm/test/Analysis/FunctionPropertiesAnalysis properties-stats.ll, llvm/test/Other functionpropertiesanalysis.ll

Moved FunctionProperties test to correct test path (#182637)

Test was previously in Other ambiguous path. Now under its appropiate
folder
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+70-0llvm/test/Analysis/FunctionPropertiesAnalysis/properties-stats.ll
+0-70llvm/test/Other/functionpropertiesanalysis.ll
+70-702 files

LLVM/project d30de66clang/lib/Analysis/FlowSensitive DataflowEnvironment.cpp

also co_yield

Created using spr 1.3.7
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+4-4clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
+4-41 files

FreeBSD/ports 014126fdevel/bear distinfo Makefile.crates, devel/bear/files patch-intercept-preload_src_lib.rs patch-bear_build.rs

devel/bear: Upgrade to 4.0.3

Approved by:    lwhsu (mentor, implicitly)
Differential Revision: https://reviews.freebsd.org/D55401
DeltaFile
+53-53devel/bear/distinfo
+25-25devel/bear/Makefile.crates
+0-16devel/bear/files/patch-intercept-preload_src_lib.rs
+7-5devel/bear/files/patch-bear_build.rs
+0-11devel/bear/files/patch-intercept-preload_Cargo.toml
+1-2devel/bear/Makefile
+86-1126 files

LLVM/project 4071c1bllvm/lib/Frontend/OpenMP OMPIRBuilder.cpp, mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

Refactor buildAffinityData by hoisting the creation of affinity_list
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+47-54mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+2-5llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+49-592 files

LLVM/project a7cbf17clang/lib/Analysis/FlowSensitive DataflowEnvironment.cpp

coyield

Created using spr 1.3.7
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+3-1clang/lib/Analysis/FlowSensitive/DataflowEnvironment.cpp
+3-11 files

LLVM/project 40252b9mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

Extract iterator loop body convertion logic
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+37-27mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+37-271 files