LLVM/project 46dbecdclang/lib/Sema SemaExpr.cpp, clang/test/ParserOpenACC parse-constructs.cpp

[clang] use typo-corrected name qualifier for expressions

Fixes #175783
DeltaFile
+12-0clang/test/SemaCXX/GH175783.cpp
+7-0clang/lib/Sema/SemaExpr.cpp
+2-2clang/test/ParserOpenACC/parse-constructs.cpp
+21-23 files

GhostBSD/build bacbc5cpackages drivers

replace drm-kmod with drm-latest-kmod in packages list (#270)

DeltaFile
+1-1packages/drivers
+1-11 files

LLVM/project 9d1d80bllvm/lib/CodeGen/SelectionDAG InstrEmitter.cpp

DAG: Replace legal type check in EmitCopyFromReg (#177788)

It doesn't make sense that an illegal type would get here; a
CopyFromReg cannot be illegally typed. The only exception that
was hit here is in a handful of SystemZ inline assembly tests
for i128, which use untyped. They shouldn't; it should treat
v2i64 as legal instead. Just leave the untyped check for now.
DeltaFile
+5-4llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+5-41 files

LLVM/project af388bbllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV clmul.ll

Rebase

Created using spr 1.3.7
DeltaFile
+84,317-78,372llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+25,751-24,782llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+24,655-20,149llvm/test/CodeGen/RISCV/clmul.ll
+23,663-20,281llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+21,867-18,577llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+246,546-191,6525,461 files not shown
+722,116-447,1445,467 files

LLVM/project 65d378dlibcxx/docs/ReleaseNotes 23.rst, libcxx/include regex

[libc++] Remove `__wrap_iter::base()` (#179389)

Resolves #126442

- Converts all the relevant functions that used `.base()` into friends
- Fixed usage in `<regex>`

---------

Co-authored-by: A. Jiang <de34 at live.cn>
DeltaFile
+12-12libcxx/include/__iterator/wrap_iter.h
+3-0libcxx/docs/ReleaseNotes/23.rst
+2-1libcxx/include/regex
+17-133 files

GhostBSD/ports 4ffeef0x11/xconfig distinfo Makefile

x11/xconfig: update to 3.1
DeltaFile
+3-3x11/xconfig/distinfo
+1-1x11/xconfig/Makefile
+4-42 files

GhostBSD/xconfig de2e7a7bin xconfig

Merge pull request #53 from ghostbsd/scfb

Add remove_scfb and remove_vesa and refactor cleanup functions
DeltaFile
+61-73bin/xconfig
+61-731 files

FreeBSD/ports a1246c5textproc/groff pkg-plist Makefile, textproc/groff/files mdoc.local patch-lib_math.in.h

textproc/groff: Update 1.23.0 => 1.24.0, take maintainership

* Clarify LICENSE
* Add LICENSE_FILE
* Add DOCS and EXAMPLES options
* Switch from custom to canonical EXAMPLESDIR
* Pet portclippy(1) and portfmt(1)

Reviewed by:            vvd@
Approved by:            yuri@ (Mentor)
Approved by:            db@, yuri@ (Mentors, implicit)
Differential Revision:  https://reviews.freebsd.org/D55637
DeltaFile
+47-142textproc/groff/pkg-plist
+23-17textproc/groff/Makefile
+1-27textproc/groff/files/mdoc.local
+8-8textproc/groff/files/patch-lib_math.in.h
+3-3textproc/groff/distinfo
+2-2textproc/groff/files/patch-Makefile.in
+84-1996 files

GhostBSD/xconfig cd06c21bin xconfig

Add remove_scfb and remove_vesa and refactor cleanup functions

Add remove_scfb() and remove_vesa() to uninstall xf86-video-scfb and
xf86-video-vesa when a proper driver is configured. Call them in
cmd_auto() for all GPU and VM detections, except hyperv and bhyve which
use the scfb driver internally.

Rename all cleanup_* functions to remove_* and drop template file
deletion, limiting them to package removal only. Remove cleanup_hyperv
and cleanup_bhyve as they had no packages to remove.
DeltaFile
+61-73bin/xconfig
+61-731 files

LLVM/project 0f59753mlir/lib/Dialect/SparseTensor/Transforms Sparsification.cpp, mlir/test/Dialect/SparseTensor spy_sddmm.mlir

[mlir][sparse] Fix crash in sparsification when unary/binary present block captures sparse tensor argument (#184597)

`relinkBranch` in Sparsification.cpp assumed that any block argument
from the outer `linalg.generic` op encountered inside an inlined
semi-ring branch must be a dense tensor, and asserted accordingly.
However, the `present` block of a `sparse_tensor.unary` (or similar
semi-ring ops) is permitted to capture sparse tensor operands directly
via `isAdmissibleBranchExp`, which accepts any `BlockArgument` as
admissible.

The fix removes the incorrect assertion and extends the load generation
to handle sparse tensors using `genSubscript`, which already knows how
to return the value buffer and current value position via the loop
emitter. The `kSparseIterator` strategy (where `genSubscript` returns a
`TensorType`) is also handled by emitting a
`sparse_tensor.extract_value` op.

Fixes #91183
DeltaFile
+71-0mlir/test/Dialect/SparseTensor/spy_sddmm.mlir
+13-5mlir/lib/Dialect/SparseTensor/Transforms/Sparsification.cpp
+84-52 files

LLVM/project 9c87724llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll

Merge remote-tracking branch 'external-upstream/main' into users/mariusz-sikora-at-amd/gfx13/hazard-getreg
DeltaFile
+84,317-78,372llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+25,751-24,782llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+23,663-20,281llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+21,867-18,577llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+19,112-16,445llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+241,003-187,9484,730 files not shown
+621,230-368,0104,736 files

LLVM/project 001c049llvm/test/CodeGen/X86 known-pow2.ll

[X86] known-pow2.ll - add zext vector test for #182226 (#184772)

DeltaFile
+30-0llvm/test/CodeGen/X86/known-pow2.ll
+30-01 files

LLVM/project e56b580llvm/lib/Target/SPIRV SPIRVEmitIntrinsics.cpp, llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2 exec_mode3.ll

Reapply "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)) (#182552)

This reverts commit 395858d9f172ff1c61c661aa7c2a18b449daffa6.

This PR had been reverted due to an unrelated address-sanitizer failure.
DeltaFile
+117-3llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+45-38llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
+46-30llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_float_controls2/exec_mode3.ll
+15-15llvm/test/CodeGen/SPIRV/extensions/SPV_NV_shader_atomic_fp16_vector/atomicrmw_fminfmax_vec_float16.ll
+15-15llvm/test/CodeGen/SPIRV/extensions/SPV_NV_shader_atomic_fp16_vector/atomicrmw_faddfsub_vec_float16.ll
+238-1015 files

LLVM/project 68c0afallvm/lib/Target/AMDGPU AMDGPU.td, llvm/lib/Target/AMDGPU/MCTargetDesc AMDGPUInstPrinter.cpp

AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (#183483)

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
DeltaFile
+5-1llvm/lib/Target/AMDGPU/AMDGPU.td
+1-1llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
+6-22 files

OpenBSD/ports qoOhtnXnet Makefile

   +neighbot
VersionDeltaFile
1.1455+1-0net/Makefile
+1-01 files

OpenBSD/ports JG7Eq59infrastructure/db user.list

   904 _neighbot
VersionDeltaFile
1.483+2-1infrastructure/db/user.list
+2-11 files

NetBSD/pkgsrc-wip 1183471swayidle DESCR

swayidle: fix typo
DeltaFile
+1-1swayidle/DESCR
+1-11 files

OpenBSD/ports uulaROtnet/neighbot Makefile distinfo, net/neighbot/pkg neighbot.rc PLIST

   Initial revision
VersionDeltaFile
1.1+34-0net/neighbot/Makefile
1.1+14-0net/neighbot/pkg/neighbot.rc
1.1+12-0net/neighbot/pkg/PLIST
1.1+7-0net/neighbot/pkg/DESCR
1.1+2-0net/neighbot/distinfo
1.1.1.1+0-0net/neighbot/pkg/DESCR
+69-04 files not shown
+69-010 files

LLVM/project e67360elibclc/clc/include/clc/address_space qualifier.h, libclc/clc/lib/amdgcn SOURCES

libclc: Implement address space qualifier functions for amdgpu (#184766)

DeltaFile
+36-0libclc/clc/lib/amdgcn/address_space/qualifier.cl
+35-0libclc/opencl/lib/generic/address_space/qualifier.cl
+33-0libclc/clc/include/clc/address_space/qualifier.h
+33-0libclc/clc/lib/generic/shared/clc_qualifier.cl
+1-0libclc/clc/lib/amdgcn/SOURCES
+1-0libclc/clc/lib/generic/SOURCES
+139-01 files not shown
+140-07 files

NetBSD/pkgsrc-wip 10cf4a4swayidle Makefile PLIST

Import swayidle
DeltaFile
+19-0swayidle/Makefile
+6-0swayidle/PLIST
+5-0swayidle/DESCR
+5-0swayidle/distinfo
+35-04 files

NetBSD/pkgsrc-wip 5451500. Makefile, swaylock Makefile PLIST

Import swaylock
DeltaFile
+57-0swaylock/Makefile
+8-0swaylock/PLIST
+5-0swaylock/distinfo
+4-0swaylock/DESCR
+2-0swaylock/files/swaylock
+2-0Makefile
+78-06 files

LLVM/project 4afd0cfmlir/lib/Dialect/SparseTensor/Transforms SparseAssembler.cpp, mlir/test/Dialect/SparseTensor external_after_codegen.mlir

[mlir][sparse] Fix crash in SparseAssembler when run after SparseTensorCodegen (#183896)

After --sparse-tensor-codegen, sparse tensor arguments are replaced by
memrefs and \!sparse_tensor.storage_specifier types. The subsequent
--sparse-assembler pass calls getSparseTensorEncoding() to identify
sparse arguments to wrap/unwrap. However, getSparseTensorEncoding()
returns non-null for StorageSpecifierType as well as for sparse
RankedTensorType. Since StorageSpecifierType is not a RankedTensorType,
the subsequent cast<RankedTensorType> in convTypes() and convVals()
would crash with an assertion failure.

Fix by also checking isa<RankedTensorType>(type) in the passthrough
condition in both convTypes() and convVals(), so that
StorageSpecifierType arguments pass through unchanged.

Fixes #183776
DeltaFile
+30-0mlir/test/Dialect/SparseTensor/external_after_codegen.mlir
+8-4mlir/lib/Dialect/SparseTensor/Transforms/SparseAssembler.cpp
+38-42 files

LLVM/project 1bddfedclang/test/CodeGenHLSL/builtins f16tof32-builtin.hlsl f16tof32.hlsl

[HLSL] Amend f32tof16() and f16tof32() tests (#179261)

Amend the codegen tests for f32tof16() and f16tof32() to include SPIRV
as a target in addition to DXIL.

Fixes #179257

Co-authored-by: Tim Corringham <tcorring at amd.com>
DeltaFile
+27-6clang/test/CodeGenHLSL/builtins/f16tof32-builtin.hlsl
+27-6clang/test/CodeGenHLSL/builtins/f16tof32.hlsl
+27-3clang/test/CodeGenHLSL/builtins/f32tof16-builtin.hlsl
+27-3clang/test/CodeGenHLSL/builtins/f32tof16.hlsl
+108-184 files

FreeBSD/src ec22c40sys/net vnet.c

vnet: Ensure the space allocated by vnet_data_alloc() is sufficent aligned

Some 32-bit architectures, e.g., armv7, require strict 8-byte
alignment while doing atomic 64-bit access. Hence aligning to the
pointer type (4-byte alignment) does not meet the requirement on
those architectures.

Make the space allocated by vnet_data_alloc() sufficent aligned to
avoid unaligned access.

PR:             265639
Diagnosed by:   markj
Reviewed by:    jhb, markj
Co-authored-by: jhb
MFC after:      5 days
Differential Revision:  https://reviews.freebsd.org/D55560

(cherry picked from commit 32beb3ae71cb320dbe4190a01c036943d99083b3)
(cherry picked from commit 973d607b284ba68e63f0386af44c28bfde15add2)
(cherry picked from commit baee504b868b9417c815c0de6474a0d6e5d6b4ac)
DeltaFile
+11-3sys/net/vnet.c
+11-31 files

NetBSD/src Q1a6gCuexternal/bsd/tmux/usr.bin/tmux Makefile

   Downgrade maybe-uninitialized to a warning for grid.c

   Otherwise aarch64 builds fail with:

   /home/source/ab/netbsd-10/src/external/bsd/tmux/dist/grid.c: In function 'grid_string_cells':
   /home/source/ab/netbsd-10/src/external/bsd/tmux/dist/grid.c:1070:22: error: 'size' may be used uninitialized in this function [-Werror=maybe-uninitialized]
    1070 |  size_t    len, off, size, codelen;
         |                      ^~~~

   but the code always initializes size before first use.
VersionDeltaFile
1.28.2.2+2-1external/bsd/tmux/usr.bin/tmux/Makefile
+2-11 files

OPNSense/core 9a9ff87src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterBaseController.php, src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt nat_rule.volt

Firewall: Rules [new]: Fix category colors in grid

Before this change, the controller returned color values and the frontend matched them best effort to the category key. This means there was an implicit order, and this order could break.
With this change, order independant metadata is returned, and the frontend renders these categories directly in the category formatter.
DeltaFile
+15-6src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterBaseController.php
+5-6src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+5-6src/opnsense/mvc/app/views/OPNsense/Firewall/nat_rule.volt
+25-183 files

LLVM/project 72e68falldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional TestDataFormatterGenericOptional.py

[lldb][test] TestDataFormatterGenericOptional.py: remove obsolete skipIfs

Clang 7 and GCC 5 are pretty ancient. There's unlikely to be any bot configurations running this anymore. Lets remove it to reduce test noise.
DeltaFile
+0-12lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
+0-121 files

LLVM/project fcf6bb8lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/bitset TestDataFormatterGenericBitset.py, lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/coroutine_handle TestCoroutineHandle.py

[lldb][test] Clean up USE_LIBSTDCPP/USE_LIBCPP usage

This patch makes the two tests consistent with the rest of the formatter API tests (and is in my opionion easier to follow).
DeltaFile
+10-13lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/bitset/TestDataFormatterGenericBitset.py
+5-8lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/coroutine_handle/TestCoroutineHandle.py
+15-212 files

LLVM/project 2f90df0flang/lib/Parser io-parsers.cpp, flang/test/Semantics io17.f90

 [Flang] Fix wrong compile-time error message, issue #178494. (#183878)

Fix the problem described in issue #178494. It will cover the failures
with S, SP, SS, BN, BZ, LZ, LZP, LZS, etc. It will resolve the test
failures in PR #183500.
DeltaFile
+56-0flang/test/Semantics/io17.f90
+5-0flang/lib/Parser/io-parsers.cpp
+61-02 files

FreeBSD/src baee504sys/net vnet.c

vnet: Ensure the space allocated by vnet_data_alloc() is sufficent aligned

Some 32-bit architectures, e.g., armv7, require strict 8-byte
alignment while doing atomic 64-bit access. Hence aligning to the
pointer type (4-byte alignment) does not meet the requirement on
those architectures.

Make the space allocated by vnet_data_alloc() sufficent aligned to
avoid unaligned access.

PR:             265639
Diagnosed by:   markj
Reviewed by:    jhb, markj
Co-authored-by: jhb
MFC after:      5 days
Differential Revision:  https://reviews.freebsd.org/D55560

(cherry picked from commit 32beb3ae71cb320dbe4190a01c036943d99083b3)
(cherry picked from commit 973d607b284ba68e63f0386af44c28bfde15add2)
DeltaFile
+11-3sys/net/vnet.c
+11-31 files