[Lanai] Declare command line options in TableGen (#234503)
Move the cl::opts into LanaiOptions.td. LanaiTargetMachine holds
`const LanaiOptions &CLOpts`, and LanaiSubtarget copies it.
-disable-lanai-mem-alu-combiner is renamed to -lanai-mem-alu-combiner,
with the old spelling kept as an alias.
[clang][OpenMP] Match device and target_device ISA names separately
A context selector can name ISAs in both device={isa(...)} and
target_device={isa(...)}. These are separate selectors, but their ISA
names were checked together, so an ISA that the target does not support
made both selectors fail. The default match_all needs both selectors
anyway, but the match_any and match_none extensions selected the wrong
variant. For example, on x86-64:
#pragma omp declare variant(variant) \
match(device = {isa(sse2)}, target_device = {isa(bogus_isa)}, \
implementation = {extension(match_any)})
did not select variant, although device={isa(sse2)} matches. Likewise,
match_none accepted a variant whose target_device ISA matched.
This patch records which selector each ISA name belongs to and check
each selector against its own names only. Because begin declare variant
only looks at the device and implementation sets, a target_device ISA
[5 lines not shown]
[XCore] Declare command line options in TableGen (#234499)
Move -xcore-max-threads into XCoreOptions.td. XCoreLowerThreadLocal
reads it from the module's LLVMContext.
[AtomicExpand][NVPTX] Add single-lane atomic RMW coverage
Record current expansion and code generation before changing single-lane RMW legalization. Check the full pipeline separately from direct instruction selection while their output differs.
unit: zfs_file tests shouldn't use libzpool
The zfs_file unit tests shouldn't link against all of libzpool.
Only the zfs_file_os.c source is needed, add it to the SOURCES
and replace libzpool.la with libspl.la in LDADD.
Additionally, to avoid having to pull in libzutil() solely for
zfs_basename() drop the call and do the strrchr() directly.
Reviewed-by: Kamil Monicz <kamil at monicz.dev>
Reviewed-by: Rob Norris <rob.norris at truenas.com>
Signed-off-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Closes #19522
[RISCV] Remove rv32p.ll. NFC (#234476)
This has been replaced by rvp-scalar.ll in #232613. Due to large number
of changes when including the RV64 RUN lines, git didn't track it as a
rename. When resolving a merge conflict before commit, I failed to keep
the deletion of rv32p.ll.
[X86] Combine mask_beforefirst to (x - 1) & ~x in GPR
EVEX and libc use this pattern in strcpy etc. to set the bits before the lowest set bit. It works correctly for x=0 too, returning an all ones mask.
Because SSE/AVX/AVX2 promote vNi1 types, do this as a DAG combine before type legalization.
We need to restrict it to power of 2 types otherwise we hit a latent crash in combineToExtendBoolVectorInReg.
[VPlan] Use llvm.mask.beforefirst for computing early exit mask
This makes the cost more accurate and improves codegen for RISC-V. The codegen for an early exit loop with side effects then goes from:
.LBB0_3: # %vector.body
# =>This Inner Loop Header: Depth=1
vl1r.v v16, (a3)
vsetvli zero, zero, e8, m1, ta, ma
vmseq.vi v16, v16, 0
vfirst.m a7, v16
srli t0, a7, 63
czero.nez a7, a7, t0
czero.eqz t0, a1, t0
or a7, t0, a7
vsetvli zero, zero, e64, m8, ta, ma
vmsltu.vx v0, v8, a7
vle8.v v17, (a5), v0.t
vcpop.m t1, v16
vsetvli zero, zero, e8, m1, ta, ma
[20 lines not shown]
[SelectionDAG] Handle splitting in get_active_lane_mask expansion
Split when the type is legal, e.g. v64i1, but the step vector needed for expansion needs split, e.g. v64i8.
This can happen on avx512 when the 512 bit registers are disabled.
[BOLT] Prevent LBR parsing from crossing entry boundaries (#234216)
#202813 assumed that LBR entries strictly follow the
`FROM/TO/EVENT/INTX/ABORT/CYCLES/TYPE/SPEC` format. But the `TYPE/SPEC`
fields might not exist in older versions. This can cause the parser to
over-read into the next LBR entry, resulting in severely corrupted CFG
flow.
Therefore, this patch isolates and splits a complete LBR entry upfront
before reading its fields sequentially, which prevents parsing
misalignment and improves overall parsing efficiency.
[Clang] Do not assume existing substition for template specialization (#227501)
Mangled symbol is not always available when having template
specialization. For example, a template alias mangled the substituted
type when actually doing substitution. In previous code, B in```
A<B>::foo()``` is always mangled because ```A<B>``` do mangle the name.
When doing substition insides ```A<T>```, B is always available. Alias
is not the case here, B is mangled when reaching A<T> inside.
As now, TemplateName::SubstTemplateTemplateParm might needs to be
resolved further as B is not always defined, we remove it from the
switch case and find recursively like the origianl path.
Assisted-by: Claude # Tests, ReleaseNotes
Remove redundant evtimer_pending() and signal_pending() checks
event_del() has no effect when an event is not pending, so there is no
need to check its state before deleting timer and signal events in
ldapd, radiusd, and vmd.
These are mechanical cleanups with no change in event scheduling or
callback behaviour.
Reads OK florian@
Remove redundant evtimer_pending() checks in routing daemons
event_del() has no effect when an event is not pending, so there is no
need to check its state before deleting timers in dvmrpd, eigrpd, ldpd,
ospf6d, ospfd, and ripd.
These are mechanical cleanups with no change in timer or protocol
behaviour.
Reads OK florian@
