LLVM/project 841a3c5 — llvm/lib/DebugInfo/CodeView TypeRecordMapping.cpp, llvm/test/DebugInfo/COFF types-data-members.ll

[DebugInfo][CodeView] Fix VFTableShape slot decoding order (#233442)

While working on something else (something like
[MCCAS](https://llvm.org/devmtg/2024-10/slides/techtalk/Rastogi-Fine-grained-compilation-caching-using-llvm-cas.pdf)
for CodeView) I noticed that:
1. The LF_VTSHAPE type record is `TypeRecordMapping` got its
deserialization wrong (this PR)
2. In the usual Codgen path in Clang we get through a
serialize/deserialize/reserialize cycle for each CodeView record (fix
here https://github.com/llvm/llvm-project/pull/233609)

This PR fixes the first issue. In VFTableShapeRecord deserialization
(read), the high and low nibbles were reversed. Writing got it right.

Added a unit test because that's the simplest and more direct thing we
could do.

Also checked against the latest MSVC to ensure we do the right thing.
DeltaFile
+59-0llvm/unittests/DebugInfo/CodeView/TypeRecordMappingTest.cpp
+2-2llvm/lib/DebugInfo/CodeView/TypeRecordMapping.cpp
+1-1llvm/test/DebugInfo/COFF/types-data-members.ll
+1-0llvm/unittests/DebugInfo/CodeView/CMakeLists.txt
+63-34 files

LLVM/project bb44b90 — llvm/test/Transforms/SLPVectorizer semanticly-same.ll

[SLP] Add new test for LShr/UDiv conversions with Alt opcodes (#233590)

Tests courtesy of @alexey-bataev for #181731.
DeltaFile
+52-0llvm/test/Transforms/SLPVectorizer/semanticly-same.ll
+52-01 files

LLVM/project 32353d4 — flang/lib/Optimizer/Transforms LoopInvariantCodeMotion.cpp, flang/test/Transforms licm-hoisted-location.fir

[flang][debug] Clear the source line of operations hoisted by LICM (#233584)

Fixes #233484.

When `flang-licm` hoists a loop-invariant operation, the operation keeps
the location of the statement it was written in. Because the hoist point
precedes the loop, the line table then claims that statement begins in
the loop setup code, and a breakpoint placed on the statement binds
there rather than in the loop body. At that address the variables the
statement reads are not live yet, so they print as `<optimized out>` in
gdb.

This patch clears the line and column of a hoisted operation, keeping
the file. LLVM does the same to instructions it hoists or sinks, so that
one does not keep reporting a line it no longer belongs to.
DeltaFile
+87-0flang/test/Transforms/licm-hoisted-location.fir
+24-0flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
+111-02 files

FreeBSD/ports 2cebb1b — graphics/openfx-misc Makefile distinfo

graphics/openfx-misc: update to 2.5.0

And update the maintainer.

PR:             283411
DeltaFile
+7-7graphics/openfx-misc/distinfo
+4-4graphics/openfx-misc/Makefile
+11-112 files

LLVM/project 25674b4 — llvm/lib/CodeGen ProcessImplicitDefs.cpp

ProcessImplicitDefs: Fix erasing instruction before debug printing it (#233594)
DeltaFile
+1-1llvm/lib/CodeGen/ProcessImplicitDefs.cpp
+1-11 files

FreeBSD/ports 60c7a43 — graphics/openfx-arena distinfo Makefile, graphics/openfx-arena/files patch-Makefile.master

graphics/openfx-arena: update to 2.5.0

And change the maintainer.

PR:             283411
DeltaFile
+11-27graphics/openfx-arena/Makefile
+11-11graphics/openfx-arena/distinfo
+0-20graphics/openfx-arena/files/patch-Makefile.master
+22-583 files

LLVM/project d7c54ea — mlir/lib/Analysis CMakeLists.txt, mlir/lib/Dialect/Affine/Analysis CMakeLists.txt

[mlir] Split analysis implementations into subsystem libraries (#232793)

Introduce MLIRAnalysisBase, MLIRAnalysisDataFlow and
MLIRAnalysisPresburger with independent source ownership and focused
interface dependencies. Keep the generic Presburger mathematics library
independent of MLIR IR.

Reuse the component objects in the full MLIRAnalysis compatibility
archive, and include only the components in aggregate libMLIR. Migrate
MLIR, CIR and Flang library consumers to their required analysis APIs,
including dependencies previously supplied through other libraries.

This reduces unnecessary transitive dependencies: we don't need to build
Presburger and similar things for CIR for example.

Assisted-by: Codex
DeltaFile
+84-34mlir/lib/Analysis/CMakeLists.txt
+7-0mlir/lib/Rewrite/CMakeLists.txt
+3-2mlir/test/lib/Analysis/CMakeLists.txt
+2-1mlir/lib/Transforms/CMakeLists.txt
+2-1mlir/lib/Dialect/Affine/Analysis/CMakeLists.txt
+1-1mlir/test/lib/Transforms/CMakeLists.txt
+99-3951 files not shown
+148-6357 files

LLVM/project 58fb370 — clang/include/clang/Sema Sema.h, lld/ELF Config.h Driver.cpp

[ADT] Adopt SmallVectorWithFlags in padding-saving records

Pack boolean and small-bitfield state into SmallVectorWithFlags across
464 records in LLVM, Clang, MLIR, Flang, LLD, LLDB, BOLT, Polly, and
clang-tools-extra. Preserve inline capacities, initial flag values,
payload-only comparisons, and existing copy and move behavior. Remove
redundant state where doing so provides the same layout improvement.

Add ordinary-vector construction and payload move assignment support.
Use ArrayRef for read-only vector interfaces and explicit payload transfers
where existing mutable SmallVectorImpl interfaces need ordinary vectors.
Add regression tests for flag retention during vector growth, copy, move,
serialization, and calling-convention lowering.

Leave ELFObjectFile lazy caches separate from immutable flags to preserve
independent const access. Leave generated AffineVectorizeOptions unchanged
because its public aggregate contract needs a separate generator change.

Validation: Clang unit tests, check-lld, 21 selected unit-test binaries,

    [4 lines not shown]
DeltaFile
+201-203lld/ELF/Driver.cpp
+275-110lld/ELF/Config.h
+152-91llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+170-61clang/include/clang/Sema/Sema.h
+126-76llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+117-72llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+1,041-613855 files not shown
+12,981-8,709861 files

LLVM/project 06b9534 — llvm/test/CodeGen/AArch64 fsh.ll vec-combine-compare-to-bitmask.ll, llvm/test/CodeGen/AArch64/GlobalISel combine-simplify-demanded-bits-trunc-xor-select.mir

feat(gisel): mirror trunc/xor/select demanded bits

Mirror SelectionDAG demand propagation, known-bits folding, truncation
of logical shifts, and XOR narrowing and constant simplifications.
Respect shared producers, legality and target profitability, including
AArch64 XOR/shift commuting. Preserve integer LLTs when narrowing.
DeltaFile
+1,327-1,103llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+526-520llvm/test/CodeGen/AArch64/overflow-vec.ll
+388-390llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+744-0llvm/test/CodeGen/AArch64/GlobalISel/combine-simplify-demanded-bits-trunc-xor-select.mir
+201-222llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
+159-172llvm/test/CodeGen/AArch64/fsh.ll
+3,345-2,40740 files not shown
+4,140-3,03346 files

LLVM/project cef45d4 — llvm/test/CodeGen/AMDGPU freeze.ll, llvm/test/CodeGen/AMDGPU/GlobalISel postlegalizercombiner-ubfx.mir combine-shl-from-extend-narrow.postlegal.mir

test(amdgpu): use extended LLTs in MIR tests
DeltaFile
+186-186llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
+65-65llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-ubfx.mir
+4-4llvm/test/CodeGen/AMDGPU/freeze.ll
+255-2553 files

LLVM/project 409d920 — llvm/test/CodeGen/AMDGPU freeze.ll integer-mad-patterns.ll, llvm/test/CodeGen/AMDGPU/GlobalISel extractelement.ll insertelement.i8.ll

feat(gisel): simplify demanded bits through shifts

Propagate demanded bits through constant shifts and convert ASHR to
LSHR when sign fill is unobserved or the source is nonnegative.
Enable the combiner for AMDGPU with focused MIR coverage.
DeltaFile
+224-265llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
+164-237llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
+157-230llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
+150-214llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
+161-168llvm/test/CodeGen/AMDGPU/freeze.ll
+0-328llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
+856-1,44270 files not shown
+2,557-3,43876 files

NetBSD/src KSFvckN — sys/dev/raidframe rf_compat80.c rf_compat50.c

   maxOutstadingDiskReqs was already used like a uint8_t; make it one.
   Shuts up Clang, though Clang was actually right to complain in this case.
VersionDeltaFile
1.18+2-2sys/dev/raidframe/rf_compat80.c
1.14+2-2sys/dev/raidframe/rf_compat50.c
1.10+2-2sys/dev/raidframe/rf_compat32.c
1.25+2-2sys/dev/raidframe/raidframevar.h
+8-84 files

GhostBSD/ports a1f5255 — sysutils/setup-station Makefile distinfo

sysutils/setup-station: Update to 1.0

Setup Station 1.0 adds the admin user to the video group so it can
access video devices without extra setup.
DeltaFile
+3-3sysutils/setup-station/distinfo
+1-1sysutils/setup-station/Makefile
+4-42 files

FreeBSD/ports 346a71f — emulators/tic-80 Makefile

emulators/tic-80: return to pool

Upstream has recently updated this project, redoing the entire build
system.  It was very time consuming to port on account of having to
unbundle all sorts of dependencies.  Having just started a new job,
I don't seem to have the time to do it all over again for the new
build system.
DeltaFile
+1-1emulators/tic-80/Makefile
+1-11 files

FreeBSD/ports 80265bd — emulators/fceux Makefile distinfo

emulators/fceux: address rerolled distfile

Upstream has rerolled the 1.7.0 distfile to get another commit in.
Update distinfo to follow along.

Changelog: https://github.com/TASEmulators/fceux/commit/8cdbeeb248f5a13aa97a58b4a0437ae13fb6aea8

PR:             299551
Reported by:    diizzy
DeltaFile
+3-3emulators/fceux/distinfo
+1-0emulators/fceux/Makefile
+4-32 files

FreeBSD/ports 3efadeb — games/quackle Makefile distinfo

games/quackle: address rerolled distfile

Upstream has rerolled the 1.1.0 distfile to address some deployment
issues on macOS, none of which seem relevant to FreeBSD.  Update
distfile to follow along.

Changelog: https://github.com/quackle/quackle/compare/fa6a0efb287c1ceef1162c608313b1d372e27288...v1.1.0
DeltaFile
+3-3games/quackle/distinfo
+1-0games/quackle/Makefile
+4-32 files

FreeBSD/ports 221eab8 — devel/merve Makefile, devel/opendht Makefile

*/*: bump PORTREVISION following libsimdutf soname change
DeltaFile
+1-1x11/ghostty/Makefile
+1-1devel/opendht/Makefile
+1-1devel/merve/Makefile
+3-33 files

FreeBSD/ports d16f328 — converters/simdutf Makefile pkg-plist

converters/simdutf: update to 9.3.2

Changelog: https://github.com/simdutf/simdutf/releases/tag/v9.3.0
Changelog: https://github.com/simdutf/simdutf/releases/tag/v9.3.1
Changelog: https://github.com/simdutf/simdutf/releases/tag/v9.3.2

MFH:            no (soname change)
DeltaFile
+3-3converters/simdutf/distinfo
+3-2converters/simdutf/pkg-plist
+1-1converters/simdutf/Makefile
+7-63 files

FreeBSD/ports ead1133 — devel/gopls pkg-plist Makefile

devel/gopls: update to 0.24.0

Changelog: https://go.dev/gopls/release/v0.24.0
DeltaFile
+5-5devel/gopls/distinfo
+1-2devel/gopls/Makefile
+1-0devel/gopls/pkg-plist
+7-73 files

LLVM/project 89afbf8 — llvm/lib/CodeGen ProcessImplicitDefs.cpp

ProcessImplicitDefs: Fix erasing instruction before debug printing it
DeltaFile
+1-1llvm/lib/CodeGen/ProcessImplicitDefs.cpp
+1-11 files

LLVM/project dfa8a1b — llvm/include/llvm/CodeGen MachineBasicBlock.h, llvm/lib/CodeGen MachineBasicBlock.cpp ProcessImplicitDefs.cpp

ProcessImplicitDefs: Mark kept physreg IMPLICIT_DEFs dead (#232821)

An IMPLICIT_DEF is erased by setting undef an all uses of the def in a 
block. If there are uses outside of the block, it is kept. In the case of 
physical registers, this was left as an unused def without a  dead flag. 
Look at the liveins of the successors to check if it's live, and add the
dead flag if not. We probably should just erase the instruction, but I've
left that for a future change.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+110-0llvm/test/CodeGen/X86/process-implicit-defs-physreg-dead.mir
+82-0llvm/test/CodeGen/AMDGPU/process-implicit-defs-set-dead.mir
+13-4llvm/lib/CodeGen/ProcessImplicitDefs.cpp
+16-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+5-0llvm/include/llvm/CodeGen/MachineBasicBlock.h
+226-45 files

FreeBSD/ports b5838ab — print/pdfcpu Makefile distinfo

print/pdfcpu: Update to 0.16.3

Changelog: https://github.com/pdfcpu/pdfcpu/releases/tag/v0.16.3

Security:       GHSA-jp42-qm45-2x6g
                GHSA-44h9-p34h-2w4p
DeltaFile
+5-5print/pdfcpu/distinfo
+1-1print/pdfcpu/Makefile
+6-62 files

LLVM/project a43db54 — mlir/lib/Conversion/MathToFuncs MathToFuncs.cpp, mlir/lib/Dialect/Math/Transforms AlgebraicSimplification.cpp

[mlir][math] Avoid integer division by zero when lowering math.ipowi (#230271)

`math.ipowi` with a zero base and a negative exponent is lowered to an
integer division by zero in two places: `MathToFuncs` emits a literal `1
/ 0` for that case, and `PowIStrengthReduction` rewrites a constant
negative exponent into `1 / (b * b * ...)` for a base that may be zero.
`arith.divsi` by zero is undefined behavior, so the result depends on
the target and the optimizer: on AArch64, `0 ** -1` lowered through
`MathToFuncs` returns 0 under `mlir-runner --O0` and 1 under `--O3`.

This patch:

- deletes the `b == 0` branch from the `MathToFuncs` helper, so a zero
base with a negative exponent returns 0 through the same final return as
every `|b| > 1` base;
- stops `PowIStrengthReduction` from reducing `ipowi` on `IntegerType`
with a negative exponent, leaving it to `MathToFuncs`;
- makes `PowIStrengthReduction` bail out for an `INT64_MIN` exponent,
since negating it is signed overflow (this changes `fpowi`,

    [22 lines not shown]
DeltaFile
+88-62mlir/test/Conversion/MathToFuncs/ipowi.mlir
+63-18mlir/test/Dialect/Math/algebraic-simplification.mlir
+74-0mlir/test/Integration/Dialect/Math/CPU/mathtofuncs_ipowi.mlir
+3-19mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
+15-0mlir/lib/Dialect/Math/Transforms/AlgebraicSimplification.cpp
+10-0mlir/test/Dialect/Complex/powi-simplify.mlir
+253-996 files

LLVM/project 0f80d3e — llvm/lib/Bitcode/Writer BitcodeWriter.cpp, llvm/test/Bitcode thinlto-function-summary-callgraph-pgo.ll

[Bitcode] Avoid emitting trailing zeros for non-GlobalValue IDs in writeGUIDList (#233554)

ModuleBitcodeWriterBase::writeGUIDList previously sized the GUIDs vector
to VE.getValues().size(), which includes not only M.global_values()
(assigned the lowest ValueIDs by ValueEnumerator) but also all constants
and ConstantAsMetadata enumerated in the module (such as global
initializers, profile metadata, and debug info constants).

Because only GlobalValues can have GUIDs, and both BitcodeReader and
IndexBitcodeReader already bound lookups by GUIDList.size() and ignore
zero entries, sizing GUIDs to VE.getValues().size() emitted a 64-bit
zero for every constant in the module.

Instead, resize GUIDs dynamically up to the highest ValueID among
M.global_values() with a non-zero assigned GUID. On two large ThinLTO
applications, this reduced the total size of the minimized thin link
bitcode files by 8.6% (1.14 GiB) and 14.7% (0.79 GiB), with an
equivalent reduction in thin link peak RSS.


    [5 lines not shown]
DeltaFile
+6-9llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+1-1llvm/test/Bitcode/thinlto-function-summary-callgraph-pgo.ll
+7-102 files

LLVM/project 59da49c — llvm/test/Transforms/Util/DeclareRuntimeLibcalls systemz.ll sparc.ll

RuntimeLibcalls: Add signatures for atomic libcalls

Define type signatures in tablegen for the various atomic
library functions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+1,060-1,060llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+336-336llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+336-336llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+336-336llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+224-224llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+224-224llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sparc.ll
+2,516-2,51612 files not shown
+4,047-3,99818 files

NetBSD/pkgsrc-wip c484b5e — galene distinfo TODO, galene/patches patch-galene.go

galene: Install static files and use them by default

Galene server needs static files to run otherwise it will fail to
start.
Install them and also adjust the default for `-static' to automatically
pick them up.
DeltaFile
+48-0galene/PLIST
+15-0galene/patches/patch-galene.go
+12-0galene/Makefile
+0-3galene/TODO
+1-0galene/distinfo
+76-35 files

LLVM/project 64f50ff — llvm/lib/Transforms/IPO GlobalOpt.cpp, llvm/test/Transforms/GlobalOpt dbg-intrinsic-loopanalysis.ll

[GlobalOpt] [NFC] Skip cold call analysis when no function can use coldcc (#227944)

OptimizeFunctions() starts by calling hasOnlyColdCalls() on every
function in the module to find functions whose callers are all cold.
That analysis needs BlockFrequencyInfo for each caller and can be
expensive on large modules.

The result is only used to switch functions to the cold calling
convention, which happens only if TargetTransformInfo::
useColdCCForColdCall() returns true for the function (or if
-enable-coldcc-stress-test is set). On targets where that hook never
returns true, the analysis is wasted work.

Add a cheap pre-scan that asks TTI whether any non-intrinsic function in
the module can use coldcc, and only run the hasOnlyColdCalls() loop if
one can, or if the stress-test flag is set. The pre-scan stops at the
first match.

This is a compile-time improvement only; there is no change in output.

    [5 lines not shown]
DeltaFile
+14-9llvm/lib/Transforms/IPO/GlobalOpt.cpp
+3-2llvm/test/Transforms/GlobalOpt/dbg-intrinsic-loopanalysis.ll
+17-112 files

LLVM/project d8ade6d — mlir/lib/Target/LLVM/XeVM Target.cpp, mlir/test lit.cfg.py

[MLIR][XeVM] Set the required sub-group size on every kernel (#232844)

When serializing a gpu.module to SPIR-V, the XeVM target sets
intel_reqd_sub_group_size = 16 on the first kernel only: the walk stops
after the first kernel it finds. The other kernels of the module get no
required size, so the GPU compiler may pick a different sub-group size
for them, for example 32. Code that the XeGPU and XeVM lowering emits
assumes 16 lanes, so those kernels can compute wrong results.

Set the required sub-group size on every kernel of the module.

---------

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+25-0mlir/test/Dialect/GPU/module-to-binary-xevm.mlir
+1-5mlir/lib/Target/LLVM/XeVM/Target.cpp
+3-0mlir/test/lit.cfg.py
+29-53 files

FreeBSD/ports 5a63139 — misc/opencode Makefile Makefile.crates, misc/opencode/files opencode-pty-build.rs.patch setup-fff-freebsd.py

misc/opencode: New port: AI coding agent for the terminal

OpenCode is an open-source, model-agnostic AI coding agent that runs in
the terminal.  It combines a full-screen TUI and a scriptable CLI with
a client/server architecture, LSP awareness and multi-session support.
Tested on arm64 and amd64.
DeltaFile
+753-0misc/opencode/distinfo
+375-0misc/opencode/Makefile.crates
+235-0misc/opencode/Makefile
+156-0misc/opencode/files/setup-opentui-freebsd.py
+113-0misc/opencode/files/setup-fff-freebsd.py
+69-0misc/opencode/files/opencode-pty-build.rs.patch
+1,701-08 files not shown
+1,846-014 files

LLVM/project 54831f6 — llvm/lib/CodeGen ProcessImplicitDefs.cpp

ProcessImplicitDefs: Fix erasing instruction before debug printing it
DeltaFile
+1-1llvm/lib/CodeGen/ProcessImplicitDefs.cpp
+1-11 files