[SPIR-V] Print group operation of uniform group instructions as enum (#222540)
Opcodes typed `$groupOp` as i32imm, so the printer emitted 0 instead of
"Reduce" and spirv-as rejected the output
[ORC] Resolve unwind-info alloc-actions via lookupAndApply (#223312)
UnwindInfoRegistrationPlugin::Create resolved its register- /
deregister-section alloc-actions with EPC.getBootstrapSymbols. For
consistency, switch to lookupAndApply/recordAddr on the bootstrap
JITDylib instead.
[CodeGen][test] use -float-abi=soft in 2009-03-29-SoftFloatVectorExtract.ll (#223122)
In #221434, using +soft-float with a hard-float ABI is now an error on
ARM.
This test does not specify a target triple, so it will fail when the
default triple is hard-float ARM. Explicitly specify -float-abi=soft
so the test will continue to use the host triple but force the
soft-float ABI
where applicable.
sysutils/vm-tui: New port
vm-tui is a terminal UI and scripting front-end for vm-bhyve, showing
guests, switches, datastores, images, templates and rc.conf settings,
and editing guest configuration keys with pre-flight checks.
WWW: https://github.com/olgeni/vm-tui
[RISCV] Lower f16 to i64 fp_to_[su]int via i32 on RV32 (#222829)
i64 is not a legal type on RV32, so f16 to i64 conversions used to be expanded to a __fixhfdi/__fixunshfdi libcall, which compiler-rt does not provide. f16 is the only FP type whose finite values always fit in an i32 after truncation towards zero, so custom expand them to an i32 conversion plus an extension instead; out of range values and NaN are poison, so the fcvt clamping is acceptable. With only Zfhmin/Zhinxmin the i32 conversion promotes f16 to f32, and both imply F/Zfinx so f32 is always legal. Other FP source types keep using the libcall.
[GlobalOpt] Fix assertion failure with CallInst user (#221955)
By removing the unnecessary assertion, which can get
out of sync with GlobalStatus.
Fixes: #221589
interfaces: remove stray loopback queue introduced in 1f34fdeb68e2
The original idea was to have a separate loopback queue but that
does not seem necessary. Remove the assignment again, because
otherwise the queue would be implicity late and not early as before.
[Allocator] Don't overestimate alignment for operator new (#223300)
On many platforms with alignof(max_align_t)=16, when sizeof(T) == 24,
The placement new overestimates the alignment to 16:
`std::min(llvm::bit_ceil(Size), alignof(std::max_align_t)) = min(32, 16) = 16`.
We can use a better estimate: `min(countr_zero(Size),
alignof(max_align_t))`, which is hand-optimized to the form in the code.
[TargetInstrInfo] Enable instruction size verification by default (#221687)
Enable verification for instruction sizes by default. When emitting
machine code, this checks that the reported instruction size is not
smaller than the actual instruction size. Not under-reporting
instruction sizes is critical for any target that does branch relaxation
(or similar) on MIR.
The default allows over-estimating the size. Targets can opt-in to
precise instruction sizes if they want.
Exclude two instructions on ARM, which report incorrect sizes, but
fixing those sizes breaks the constant islands pass for some reason.
[Clang][RISCV] Add packed widening add accumulate intrinsics (#221622)
Add Clang header intrinsics for the RISC-V P-extension packed widening
add accumulate operations:
- __riscv_pwadda_i16x4
- __riscv_pwadda_i32x2
- __riscv_pwaddau_u16x4
- __riscv_pwaddau_u32x2
The header wrappers use generic LLVM IR. RV32 selects the direct
`pwadda.*` / `pwaddau.*` instructions. RV64 lowers the generic IR to the
decomposition specified by the P-extension intrinsic spec, including
`zip16p + pli.h + pm2adda.h/pm2addau.h` for the halfword forms.
net/if.c: Add fib-aware ifa_ifwithaddr()
Add FIB selection logic by introducing ifa_ifwithaddr_fib() to
support FIB-specific lookups. Then have ifa_ifwithaddr() wrap it
with RT_ALL_FIBS.
Also, do the same for ifa_ifwithaddr_check().
Reviewed by: glebius, bnovkov
Differential Revision: https://reviews.freebsd.org/D58305
(cherry picked from commit b00d30950cde27eda8f51523a40f2c05a38daac1)
video(4): wake the kqueue knote when a buffer completes
selwakeup() only wakes select/poll waiters; it does not notify the kqueue
knote registered on the device, so EVFILT_READ never fired when a frame
became available.
[IR] Simplify ValueAsMetadata::handleRAUW. NFC (#223301)
Metadata refers to a Value through its unique ValueAsMetadata wrapper.
When a Value is RAUW'd, handleRAUW reuses the old value's wrapper for
the new value if the new value has none yet; otherwise it moves the uses
to the new value's wrapper, with special cases for a local becoming a
constant, a constant becoming a local, and a value moving to another
function.
Always move the uses (or drop them in the last two cases) and delete the
old wrapper, so that a ValueAsMetadata wraps the same value for its
whole life.
Instruction counts for SLPVectorizer.cpp and X86ISelLowering.cpp at -O2
-g are unchanged (-0.04%, -0.01%).
Aided by Opus 5
[libc] Implement pthread_attr_[gs]etschedparam (#222991)
This patch implements pthread_attr_setschedparam and
pthread_attr_getschedparam.
Like the schedpolicy patch, this commit only operates on the
pthread_attr_t object and does not attempt to install scheduling
parameters when creating a new thread.
I also don't attempt to validate the priority value here. The valid
priority range depends on the scheduling policy (which may not even be
set yet or could change later), and we can let the kernel validate the
parameters when creating the thread or setting scheduler settings.
While in there:
- update the file headers to the modern llvm format
- use proxy headers instead of direct pthread.h inclusion
Assisted-by: Gemini
