FreeNAS/freenas 7c5a19bsrc/middlewared/middlewared/plugins directoryservices.py failover.py, src/middlewared/middlewared/plugins/directoryservices_ connection.py

Improve failover handling for services

This commit addresses two issues:

1. Certain ctdb databases will be reinitialized if the client opening
   database is the first to open. This means that we need the SMB
   server on standby controller running prior to failover events and
   we need to not issue a restart during failover processing.

2. We have some services that are dependent on directory services
   health and recovery and so their restart is managed by
   directoryservices.setup call within failover event to become
   vrrp_master. This commit removes redundant earlier restart of
   these services.
DeltaFile
+19-6src/middlewared/middlewared/plugins/directoryservices.py
+14-3src/middlewared/middlewared/plugins/failover_/event.py
+6-1src/middlewared/middlewared/plugins/failover.py
+0-2src/middlewared/middlewared/plugins/directoryservices_/connection.py
+39-124 files

LLVM/project 8d28955llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine select-binop-associative-prof.ll

[InstCombine] Preserve !prof metadata when creating select instructions.
DeltaFile
+19-0llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll
+3-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+22-12 files

LLVM/project 9297558llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine branch.ll

[InstCombine][profcheck] Propogate profile metadata when transforming br (X && !Y) to br (!X || Y)

Updated visitBranchInst to propagate and swap !prof metadata when transforming br (X && !Y) to br (!X || Y).
DeltaFile
+18-7llvm/test/Transforms/InstCombine/branch.ll
+12-0llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+30-72 files

LLVM/project 0ae2043llvm/test/CodeGen/AMDGPU amdgcn.bitcast.512bit.ll

AMDGPU: Disable machine verifier for gfx6 run line in test (#178008)

Hack around expensive checks failures for now.
DeltaFile
+1-1llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+1-11 files

LLVM/project c9e0cf1llvm/include/llvm/Target TargetSelectionDAG.td, llvm/lib/Target/AMDGPU AMDGPUInstructions.td

[AMDGPU] Update patterns for v_cvt_flr and v_cvt_rpi (#177962)

Support GlobalISel and switch to checking `nnan` flag on instruction
instead of TargetOptions.
    
Instruction are renamed to v_cvt_floor and v_cvt_nearest on gfx11+
so add gfx11 tests as well.
DeltaFile
+289-39llvm/test/CodeGen/AMDGPU/cvt_flr_i32_f32.ll
+248-36llvm/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll
+11-9llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+8-0llvm/include/llvm/Target/TargetSelectionDAG.td
+3-0llvm/test/TableGen/GlobalISelEmitter/CustomPredicate.td
+2-1llvm/test/TableGen/GlobalISelEmitter/GlobalISelEmitter.td
+561-856 files

LLVM/project ecb1b0bmlir/lib/Bindings/Python IRCore.cpp

[MLIR][Python] Fix overly specific type annotation on PyValue.owner (#178003)

DeltaFile
+2-1mlir/lib/Bindings/Python/IRCore.cpp
+2-11 files

LLVM/project bcf6d52llvm/test/MC/RISCV zibi-valid.s

[RISCV] Test Zibi relocation type (#177896)

Zibi beqi/bnei (#127463) use a modified B-type format (replace `rs2`
with `cimm`) and reuse the R_RISCV_BRANCH relocation type.
DeltaFile
+6-1llvm/test/MC/RISCV/zibi-valid.s
+6-11 files

OPNSense/core 7dd517dsrc/opnsense/mvc/app/controllers/OPNsense/Kea/Api LeasesController.php, src/opnsense/mvc/app/views/OPNsense/Kea leases6.volt

Since with just a boolean "is_reserved" key we don't know why it was reserved, the search button cannot distinguish between duid and hwaddr.
So we need to add some sort of metadata, in this case "is_reserved_key" which can contain this information.
Now the DHCPv6 Reservation page can distinguish between the two choices of reservation reason, and change the lease lookup button to either
search for a duid or hwaddr.
DeltaFile
+16-6src/opnsense/mvc/app/controllers/OPNsense/Kea/Api/LeasesController.php
+9-1src/opnsense/mvc/app/views/OPNsense/Kea/leases6.volt
+25-72 files

LLVM/project a2cf1d9llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll, polly/lib/External/isl/include/isl typed_cpp.h cpp.h

rebase

Created using spr 1.3.6
DeltaFile
+52,760-0polly/lib/External/isl/include/isl/typed_cpp.h
+19,051-23,588llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+30,864-0polly/lib/External/isl/include/isl/cpp.h
+21,192-0polly/lib/External/isl/include/isl/cpp-checked.h
+19,097-0polly/lib/External/isl/interface/isl.py.core
+7,381-11,318llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+150,345-34,906778 files not shown
+250,094-135,053784 files

LLVM/project 5aff076llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll, polly/lib/External/isl/include/isl typed_cpp.h cpp.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6

[skip ci]
DeltaFile
+52,760-0polly/lib/External/isl/include/isl/typed_cpp.h
+19,051-23,588llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+30,864-0polly/lib/External/isl/include/isl/cpp.h
+21,192-0polly/lib/External/isl/include/isl/cpp-checked.h
+19,097-0polly/lib/External/isl/interface/isl.py.core
+7,381-11,318llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+150,345-34,906778 files not shown
+250,094-135,053784 files

FreeNAS/freenas 5e283dfsrc/middlewared/middlewared/plugins directoryservices.py failover.py, src/middlewared/middlewared/plugins/directoryservices_ connection.py

Improve failover handling for services

This commit addresses two issues:

1. Certain ctdb databases will be reinitialized if the client opening
   database is the first to open. This means that we need the SMB
   server on standby controller running prior to failover events and
   we need to not issue a restart during failover processing.

2. We have some services that are dependent on directory services
   health and recovery and so their restart is managed by
   directoryservices.setup call within failover event to become
   vrrp_master. This commit removes redundant earlier restart of
   these services.
DeltaFile
+15-5src/middlewared/middlewared/plugins/directoryservices.py
+14-3src/middlewared/middlewared/plugins/failover_/event.py
+6-1src/middlewared/middlewared/plugins/failover.py
+0-2src/middlewared/middlewared/plugins/directoryservices_/connection.py
+35-114 files

LLVM/project fc6a5edllvm/lib/Transforms/Utils MemoryTaggingSupport.cpp, llvm/test/CodeGen/AArch64 stack-tagging-split-lifetime.ll stack-tagging-untag-placement.ll

[HWASan] [MTE] use precise lifetimes even if they don't cover all exits

Previously, for performance reasons, we would only use precise lifetimes
if they cover all reachable exits. Now, if they do not, we use precise
lifetimes in addition to untagging at every exit that is not dominated
by them.

This is the behavior of ASan.

Reviewers: vitalybuka, pcc

Pull Request: https://github.com/llvm/llvm-project/pull/174875
DeltaFile
+417-14llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+46-2llvm/test/CodeGen/AArch64/stack-tagging-split-lifetime.ll
+9-19llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+4-2llvm/test/CodeGen/AArch64/stack-tagging-untag-placement.ll
+2-1llvm/test/CodeGen/AArch64/stack-tagging-ex-1.ll
+478-385 files

LLVM/project c327d46llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.fract.ll llvm.amdgcn.frexp.mant.ll

[AMDGPU][GlobalISel] Add frexp_mant/fract intrinsic RegBankLegalize r… (#177512)

…ules
DeltaFile
+96-0llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fract.ll
+76-0llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.frexp.mant.ll
+8-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+180-03 files

FreeBSD/ports 49da6f7ports-mgmt/pkg_replace distinfo Makefile

ports-mgmt/pkg_replace: Update 20260121 => 20260126

Changelog:
- Fix behavior of `pkg_replace -V`
- Improved execution speed using cache files `make -V FLAVORS`
- Cleanup code
- Update man page pkg_replace.1
https://github.com/kdeguchi/pkg_replace/releases/tag/20260126

PR:     292720
DeltaFile
+3-3ports-mgmt/pkg_replace/distinfo
+1-1ports-mgmt/pkg_replace/Makefile
+4-42 files

LLVM/project e4dc703lldb/source/Plugins/Language/CPlusPlus LibCxx.cpp CPlusPlusLanguage.cpp, lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/ordering TestDataFormatterStdOrdering.py

[lldb] Add libcxx std::*_ordering summary providers (#174227)

Added libcxx std::*_ordering summary providers similar to #174195.
DeltaFile
+77-0lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
+16-0lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
+12-0lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
+5-0lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/ordering/TestDataFormatterStdOrdering.py
+110-04 files

FreeBSD/ports f6f7500sysutils/py-overlord distinfo Makefile

sysutils/py-overlord: Update to 0.22.1

ChangeLog: https://github.com/DtxdF/overlord/releases/tag/v0.22.1
DeltaFile
+3-3sysutils/py-overlord/distinfo
+1-1sysutils/py-overlord/Makefile
+4-42 files

FreeBSD/ports 1080675sysutils/appjail-devel distinfo Makefile

sysutils/appjail-devel: Update to 4.8.0.20260126

ChangeLog:
https://github.com/DtxdF/AppJail/commits/2bc63026a1dfd9b71aadceb65cdeaef990611c1d/
DeltaFile
+3-3sysutils/appjail-devel/distinfo
+2-2sysutils/appjail-devel/Makefile
+5-52 files

FreeBSD/ports 9ee436csysutils/appjail distinfo Makefile

sysutils/appjail: Update to 4.8.0

ChangeLog: https://github.com/DtxdF/AppJail/releases/tag/v4.8.0
DeltaFile
+3-3sysutils/appjail/distinfo
+1-1sysutils/appjail/Makefile
+4-42 files

LLVM/project c3e0ff4mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

[OpenMP][MLIR] Modify lowering OpenMP Dialect lowering to support attach mapping

This PR adjusts the LLVM-IR lowering to support the new attach map type that the runtime
uses to link data and pointer together, this swaps the mapping from the older
OMP_MAP_PTR_AND_OBJ map type in most cases and allows slightly more complicated ref_ptr/ptee
and attach semantics.
DeltaFile
+610-289mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+610-2891 files

LLVM/project d6dbf78llvm/include/llvm/Analysis TargetTransformInfo.h

[TTI] Fix comment for 'bool UnrollVectorizedLoop = false;' (NFC). (#177880)

DeltaFile
+1-1llvm/include/llvm/Analysis/TargetTransformInfo.h
+1-11 files

LLVM/project 49fe31bllvm/lib/Target/AMDGPU R600ISelLowering.cpp, llvm/test/CodeGen/AMDGPU kernel-args.ll

Reapply "R600: Remove softPromoteHalfType (#177420)"

This reverts commit 38b7176c92f31c274226ff418891545046dcf1f0.
DeltaFile
+174-0llvm/test/CodeGen/AMDGPU/kernel-args.ll
+11-4llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+185-42 files

LLVM/project 8805e27llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU] Cleanup: Use unique_ptr for WCG and remove unnecessary class members (#177689)

DeltaFile
+7-12llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+7-121 files

LLVM/project bd3ecdclibc/shared/math f16sqrtl.h, libc/src/__support/math f16sqrtl.h CMakeLists.txt

[libc][math] Refactor f16sqrtl to Header Only. (#176333)

builds correctly with both `clang`, `gcc`, `cmake`, and `Bazel`.

Closes https://github.com/llvm/llvm-project/issues/175331.
DeltaFile
+33-0libc/src/__support/math/f16sqrtl.h
+27-0libc/shared/math/f16sqrtl.h
+13-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+9-0libc/src/__support/math/CMakeLists.txt
+2-4libc/src/math/generic/f16sqrtl.cpp
+2-2libc/src/math/generic/CMakeLists.txt
+86-73 files not shown
+89-79 files

LLVM/project c0ae6c9libcxx/test/libcxx/utilities/optional/optional.object/optional.iterator assert.bounded_iterator.pass.cpp, libcxx/utils/libcxx/test/features libcxx_macros.py

[libc++] Add assertion tests for optional bounded iterator (#176597)

These were missed when implementing `optional` iterator.
DeltaFile
+87-0libcxx/test/libcxx/utilities/optional/optional.object/optional.iterator/assert.bounded_iterator.pass.cpp
+1-0libcxx/utils/libcxx/test/features/libcxx_macros.py
+88-02 files

LLVM/project 913dbcfllvm/test/CodeGen/AMDGPU amdgcn.bitcast.512bit.ll

AMDGPU: Disable machine verifier for gfx6 run line in test

Hack around expensive checks failures for now.
DeltaFile
+1-1llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+1-11 files

Illumos/gate 9f7091cusr/src/lib/libsff/common libsff.c sff.h

17827 Update libsff values
Reviewed by: Robert Mustacchi <rm+illumos at fingolfin.org>
Reviewed by: C Fraire <cfraire at me.com>
Approved by: Gordon Ross <gordon.w.ross at gmail.com>
DeltaFile
+147-62usr/src/lib/libsff/common/libsff.c
+41-26usr/src/lib/libsff/common/sff.h
+188-882 files

LLVM/project 6233946libcxx/include/__configuration availability.h, libcxx/include/__exception exception_ptr.h

[libc++] Do not redefine _LIBCPP_AVAILABILITY_HAS_INIT_PRIMARY_EXCEPTION  (#177851)

Review in #176857 asked to remove this block and make
_LIBCPP_AVAILABILITY_HAS_INIT_PRIMARY_EXCEPTION similar
to the other availability macros. This patch does this.
DeltaFile
+8-8libcxx/include/__exception/exception_ptr.h
+0-9libcxx/include/__configuration/availability.h
+8-172 files

LLVM/project 1d74db7cross-project-tests/dtlto test_temps.py signal.test, llvm/lib/DTLTO DTLTO.cpp

[DTLTO] Make temporary file handling consistent (#176807)

DTLTO emits temporary files to allow distribution of archive member
inputs.

It also emits temporary files from the ThinLTO backend, such as the
index files needed for each distributed ThinLTO backend compilation.

This change brings archive member temporary files into line with those
produced by the ThinLTO backend. They are now emitted in the same
location, warnings are emitted if they cannot be deleted, and they are
cleaned up on abnormal exit (e.g. Ctrl-C). All temporary files are
preserved when --save-temps is specified.

The existing signal-handling test has been extended to cover the full
set of DTLTO temporary files, and a new test has been added to exercise
temporary file handling in normal operation. Additionally, a minimal
test has been added to show the COFF behaviour.

SIE Internal tracker: TOOLCHAIN-21022
DeltaFile
+128-0cross-project-tests/dtlto/test_temps.py
+19-55cross-project-tests/dtlto/signal.test
+70-0cross-project-tests/dtlto/savetemps.test
+44-0cross-project-tests/dtlto/savetemps-lock.test
+44-0cross-project-tests/dtlto/link-savetemps.test
+18-5llvm/lib/DTLTO/DTLTO.cpp
+323-604 files not shown
+365-6810 files

FreeBSD/ports 6b011cfdevel/py-ttkbootstrap distinfo Makefile

devel/py-ttkbootstrap: Update to 1.20.1

ChangeLog:      https://github.com/israel-dryer/ttkbootstrap/releases/tag/v1.20.1
Reported by:    Israel Dryer <notifications at github.com>
DeltaFile
+3-3devel/py-ttkbootstrap/distinfo
+1-1devel/py-ttkbootstrap/Makefile
+4-42 files

LLVM/project 29fd868llvm/include/llvm/CAS ValidationResult.h, llvm/lib/CAS UnifiedOnDiskCache.cpp ActionCaches.cpp

[llvm/CAS] Improve layering and decouple `UnifiedOnDiskCache` from the builtin hash implementation (#177280)

DeltaFile
+63-1llvm/unittests/CAS/CASTestConfig.cpp
+40-1llvm/unittests/CAS/CASTestConfig.h
+27-13llvm/lib/CAS/UnifiedOnDiskCache.cpp
+24-9llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
+29-0llvm/include/llvm/CAS/ValidationResult.h
+1-14llvm/lib/CAS/ActionCaches.cpp
+184-3811 files not shown
+217-6617 files