x11/nvidia-driver, x11/nvidia-kmod, x11/linux-nvidia-libs, graphics/nvidia-drm*-kmod, x11/nvidia-settings, x11/nvidia-xconfig: Update to 580.142
Update to latest Production Branch of drivers 580.142:
https://www.nvidia.com/en-us/drivers/details/265444/
Linux counterparts for x11/linux-nvidia-libs:
https://www.nvidia.com/en-us/drivers/details/265443/
Add graphics/egl-wayland2 as a dependency for non-legacy branches.
This library can be installed alongside the previous egl-wayland
implementation (graphics/egl-wayland) and has a higher selection
priority by default, but doesn't support legacy branches.
PR: 293738
Differential Revision: https://reviews.freebsd.org/D55813
Safeguard app config persistence against rendering edge cases
App config rendering should not fail as values are validated beforehand, but as an edge case safeguard, values are now rendered against the actual template and only persisted on success.
update to php-8.4.19
an upstream commit changed php_openssl_load_all_certs_from_file() to use
sk_new_reserve to avoid alloc failures from sk_push. libressl doesn't yet
have this (and I want to push this to 7.8-stable anyway), so instead
revert to sk_new_null as done in the previous version, and check sk_push
for a failure return code instead and free/error out if hit.
MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (#185820)
There may be some BB to COPY fgr64cc register, and the fgr64cc register
is set by the previous BB.
We add a new pass called MipsSetMachineRegisterFlags, in which we set
We introduce a new pass called MipsSetMachineRegisterFlags, in which we
set NoSWrap flag for all instructions that works with fgr64cc registers.
And in copyPhyRegister, we allow the COPY instruction with NoSignWrap
from the double float registers to gpr32.
[flang] Improve error message for missing primary expression (#185484)
Don't mention the possible expectation that the extension %LOC() could
appear when emitting the error messages for a completely missing primary
expression; it's just confusing.
[flang][cuda] Emit CUDA attributes in type declarations in mod files (#185462)
The compiler implements CUDA object entity attributes in module files by
emitting "attributes()" statements after the type declaration statement
for the object. This works fine for variables, but not at all for
derived type components -- the "attributes()" statement is not allowed
in a derived type definition, and the module file isn't readable later
when USE'd. The fix is to emit the attribute as part of the type
declaration statement or component declaration statement instead.
[lldb] Update TestProcessCrashInfo for MTE (#185808)
With MTE, the issue is caught by hardware and libmalloc records a
different message: "BUG IN CLIENT OF LIBMALLOC: MTE tag mismatch
(probable double-free)". Update the test accordingly.
[lldb] Use raw address in "memory history" command (#185812)
The `memory history` command was using `ToAddress` for its address
argument, which strips non-addressable bits (including MTE tag bits) via
`FixAnyAddress`. This caused us to pass a stripped address to
`__asan_get_alloc_stack`/`__asan_get_free_stack`, which is incorrect.
Switch to `ToRawAddress` to preserve the complete address, including the
MTE tag, so we can look up the correct address.
[lldb] Use SBProcess.FixAddress in address_ranges_helper.py (#185802)
Use `SBProcess.FixAddress` in `address_ranges_helper.py` to support
arm64e and ARM's Memory Tagging Extension (MTE) which rely on TBI to
encode data in the top byte, which in this mode is ignored by the HW.
This fixes TestFindInMemory.py and TestFindRangesInMemory.py when
running the LLDB test suite with MTE.
Merge pull request #382 from ghostbsd/dependabot/pip/contrib/libcbor/doc/source/tornado-6.5.5
build(deps): bump tornado from 6.3.3 to 6.5.5 in /contrib/libcbor/doc/source
[mlir][OpenMP] Translate omp.declare_simd to LLVM IR
This mod aim to generate same vector ABI [1] for declare simd as Clang
and reuse function paramater mangling and codegen logic authored by
@alexey-bataev in [2].
Codegen for AArch64 is not included in this patch.
For each omp.declare_simd, lowering computes:
ParamAttrs: one entry per function argument, classifying it as
Vector / Uniform / Linear (+ step or var-stride) / Aligned.
Branch kind: Undefined / Inbranch / Notinbranch.
VLEN: either from simdlen(...) or derived from the CDT size.
llvm then emits x86 declare-simd variants by attaching mangled
function attributes of the form:
_ZGV _
where:
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[CIR] Preserve attributes when converting call to try_call (#185782)
This adds code to preserve any attributes, including parameter and
return value attributes, that were present on a call operation that is
being replaced with a try_call operation.
[DirectX] Specify element-aligned vectors (#180622)
Use the new "ve" Data Layout specifier to indicate that vectors are
element-aligned for the target.
Part of #123968
