[AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (#194144)
Map conversions from FP8 source formats to v_cvt_{,pk_}f32_{fp8,bf8} and v_cvt_{pk_}f16_{fp8,bf8} HW instructions.
[lldb] Treat synthetic variables as always in scope (#204177)
When the variables in scope are requested, synthetic variables wouldn't
be returned, because `Variable::IsInScope` would return false. With this
PR, we return true for synthetic variables.
There's still one inconsistency between `frame var` and
`SBFrame::GetVariables` where `frame var` shows "re-exported" variables
from real frames (here: `variable_in_main`). Note that
`IsSyntheticValueType` returns false for `variable_in_main`.
[flang][Transforms] Add LiftSCFWhileToSCFFor pass
Introduces `--lift-scf-while-to-scf-for`, which walks every scf.while
produced by upstream `lift-cf-to-scf` and, when the canonical
"trip-counter + induction-variable" shape is recognized, rewrites the
loop as scf.for. Other loop-carried before-args are passed through as
iter_args. Loops that do not match (data-dependent updates, used
results, non-positive IV step, etc.) are left untouched and a
diagnostic is emitted to stderr.
Recognition collects a LoopInfo describing the loop:
- trip counter: candidate the gating cmp uses, must have step -1
- induction variable: the single non-trip affine recurrence, must
have positive step (negative step bails for now)
- iter_args: any other before-args that pass through unchanged
Rewrite materializes `ub_excl = ivInit + tripInit * ivStep` before
the scf.while, casts lb/ub/step to index (so the resulting scf.for
is compatible with downstream affine conversion), and clones the
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[libc] Fix float128-to-integer conversion UB (#211593)
https://github.com/llvm/llvm-project/pull/200565#discussion_r3643991194
Fixes the recent issue pointed out in the above comment
about undefined behavior for float128 in the case of extremely large
values and extremely small values.
AMDGPU: Separate image_msaa_load from bvh-ray-tracing-insts
Add a separate msaa-load-insts feature so image_msaa_load is available on
gfx13, which has it but not the BVH intersect-ray instructions. These were
assumed to be the same feature previously, but gfx13 does not have the bvh
instructions, but does have image_msaa_load.
Co-authored-by: Claude (Claude-Opus-4.8)
[flang] Delete the legacy array-value operations from FIR (#213159)
Nothing in flang has produced fir.array_load, fir.array_fetch,
fir.array_update, fir.array_modify, fir.array_access, fir.array_amend,
or fir.array_merge_store since the legacy (non-HLFIR) expression
lowering was deleted (#210385, #210621, #210639, #210873), and the
array-value-copy pass that legalized them is gone (#211816, #212643).
Delete the operations and the surface that existed only for them:
- FIROps.td: the "Array value operations" section including the
copy-in/copy-out design comment; FIROps.cpp: the ops verifiers, effects
and getExtents. fir.array_coor is unrelated and stays, as does the
validTypeParams helper shared with fir.pack_array.
- Tests: the ops roundtrip/verifier blocks in fir-ops.fir and
invalid.fir; scaffolding rewrites in inline-elemental.fir (store via
hlfir.designate; hlfir.apply-in-do_loop coverage preserved),
loop-versioning.fir @test4 (the versioned loops are untouched), and
simplifyintrinsics.fir (inert copy-back loops dropped; no CHECK lines
affected).
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[libc++][NFC] Make size_t -> int conversions explicit in a few PSTL tests (#213145)
The implicit truncating conversions that were introduced in some PSTL
tests are causing warnings on MSVC. This PR fixes that.
See
https://github.com/llvm/llvm-project/pull/212366#discussion_r3679252259
for more details.
java/openjdk11: Update to version 11.0.32
Includes the following FreeBSD specific fixes:
- Fix SIGBUS on sparc64 w/gcc 16 by reducing optimization level
- Set wxneeded flag on executables on FreeBSD
- Fix build with clang 22
Sponsored by: The FreeBSD Foundation
if_gif: Add netlink support with tests
Migrate to new if_clone KPI and implement netlink support
for gif(4). Also break GIFSOPTS ioctl logic out of gif_ioctl.
Reviewed by: markj
Differential Revision: https://reviews.freebsd.org/D57666
[mlir][linalg] Support non-unit dilations in im2col decomposition (#208424)
The im2col patterns for conv_2d_nhwc_hwcf, conv_2d_nchw_fchw and
conv_2d_nhwc_fhwc avoided non-unit dilations, but the restriction
doesn't seem to be fundamental: dilation only affects the gather step,
which can fold it into its indexing map. Generalize the convolved index
expression from `oh * stride + fh` to `oh * stride + fh * dilation` and
drop the match failures.
Verified by comparing the results of a dilated convolution lowered
directly to loops against the im2col decomposition with mlir-runner.
Assisted-By: Claude Code (for generating tests).
AMDGPU: Add missing msad-insts to gfx13 frontend feature map (#213122)
fillAMDGCNFeatureMap omitted msad-insts for gfx1310/gfx13-generic, so
clang wrongly rejected __builtin_amdgcn_msad_u8 on those targets even
though the backend enables the feature (FeatureGFX9 generation,
inherited through FeatureGFX13). Add it to the gfx13 case.
Co-authored-by: Claude (Claude-Opus-4.8)
[lldb][Windows] Don't cut the loader helper off after 250ms (#213010)
`LoadLibraryW` runs on the debuggee with a timeout of 250ms (the
default). On a loaded machine (in CI), this timeout is reached quite
often, causing tests failures.
This patch gives both loader helpers an explicit timeout of 5s (clamped
to half the overall timeout so the two stay consistent).
ixgbe: clear VF head write-back state on reset
VF reset and FLR do not clear the transmit head write-back address
registers. A previous VF driver can therefore leave DMA write-back
enabled with a stale address for the next driver instance.
After consuming the reset request and disabling the VF queues, clear the
address registers for each queue belonging to that VF. Derive the queue
count from the active IOV mode so peer queue state is not touched.
Linux commit dbf231af81a7 documents the hardware behavior. The FreeBSD
implementation follows the local queue mapping and register interfaces.
MFC after: 1 week
textproc/libe-book: update to 0.1.4 release (+)
libe-book 0.1.4:
* Fix various problems when reading broken files, found with the help of
american-fuzzy-lop and oss-fuzz.
* Do not access the network when parsing XML.
* Add a fuzzer for FictionBook v.2.
* Fix build with ICU 68.
* Fix build with recent MSVC.
[lld][MachO] Preserve class-address addends in ObjC category merging (#211431)
Mach-O category merging can encounter Swift class references as an
enclosing
metadata symbol plus a non-zero addend after LTO removes the exact
class-address alias. For example, a category can refer to a `CMf` symbol
plus
the offset of the class object within that metadata record.
`tryGetSymbolAtIsecOffset()` previously resolved such a relocation to
the
enclosing symbol and discarded the residual addend. `getClassRo()` then
read
the class layout at the wrong address. For valid Swift metadata this can
return
null; before the defensive check in the first commit the linker
dereferenced
that result and crashed, while the check alone safely skipped a category
that
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DAG: Use poison for some load/store offsets in legalizer
Unindexed load/store offsets are a don't-care operand that must be poison
rather than undef now that poison is legal. Convert the remaining producers
that build the offset with getUNDEF (in SelectionDAGBuilder and the ARM,
Hexagon, RISCV, and X86 lowerings) to getPOISON, and strengthen the offset
asserts in the SelectionDAG memory-node builders to require POISON exactly
instead of accepting any undef-or-poison value.
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
ixgbe: dispatch PBA string reads through EEPROM ops
E610 installs a device-specific PBA string reader, but the public API
always calls the generic implementation. Dispatch through the EEPROM
operation table so device overrides are honored.
Initialize the generic operation for devices that use the ordinary
EEPROM representation.
Obtained from: Intel ix 3.4.39
MFC after: 1 week
ixgbe: dispatch PBA string reads through EEPROM ops
E610 installs a device-specific PBA string reader, but the public API
always calls the generic implementation. Dispatch through the EEPROM
operation table so device overrides are honored.
Initialize the generic operation for devices that use the ordinary
EEPROM representation.
Obtained from: Intel ix 3.4.39
MFC after: 1 week
