FreeBSD/ports b477247devel/ta-lib distinfo pkg-plist, devel/ta-lib/files patch-ta-lib-config.in

devel/ta-lib: update 0.4.0 → 0.7.1

PR:             297033
Approved by:    bdheeman at gmail.com (maintainer's timeout; 14 days)
DeltaFile
+0-13devel/ta-lib/files/patch-ta-lib-config.in
+7-5devel/ta-lib/Makefile
+6-5devel/ta-lib/pkg-plist
+3-2devel/ta-lib/distinfo
+16-254 files

FreeBSD/ports 11380e4finance/py-ta-lib distinfo Makefile, finance/py-ta-lib/files patch-pyproject.toml patch-talib___ta__lib.c

finance/py-ta-lib: update 0.4.32 → 0.7.1
DeltaFile
+608-0finance/py-ta-lib/files/patch-talib___ta__lib.c
+31-0finance/py-ta-lib/files/patch-pyproject.toml
+8-11finance/py-ta-lib/Makefile
+3-3finance/py-ta-lib/distinfo
+650-144 files

ELF Tool Chain/elftoolchain 4397trunk/tests/tet/libelf/tset/gelf_xlate xlate.m4

libelf/testsuite: Initialize structs prior to taking their addresses.

The functions being tested currently fail (as expected) without
accessing these structs.  This changelist however improves the
robustness of these tests if this implementation behavior were
to change in the future.

DeltaFile
+6-0trunk/tests/tet/libelf/tset/gelf_xlate/xlate.m4
+6-01 files

LLVM/project f7d0289llvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/lib/Target/AMDGPU SIISelLowering.cpp

[AMDGPU] Guard intrinsics that need vmem-to-lds-load-insts
DeltaFile
+24-12llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+24-10llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.lds.err.ll
+0-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+48-243 files

FreeBSD/ports a5ed14edevel/p5-RRDTool-OO Makefile

devel/p5-RRDTool-OO: Adjust patch to rrdtool 1.11.0 update
DeltaFile
+2-2devel/p5-RRDTool-OO/Makefile
+2-21 files

FreeBSD/ports 69aa28fdatabases/rrdtool distinfo, databases/rrdtool/files patch-examples_rrdcached_Makefile.in patch-examples_Makefile.in

databases/rrdtool: Update to 1.11.0

ChangeLog: https://github.com/oetiker/rrdtool-1.x/releases/tag/v1.11.0
DeltaFile
+3-3databases/rrdtool/files/patch-configure
+3-3databases/rrdtool/files/patch-bindings_Makefile.in
+3-3databases/rrdtool/distinfo
+2-2databases/rrdtool/files/patch-examples_rrdcached_Makefile.in
+2-2databases/rrdtool/files/patch-examples_Makefile.in
+2-2databases/rrdtool/files/extra-patch-locktimeout
+15-151 files not shown
+16-167 files

FreeBSD/ports aeb733edatabases/pecl-rrd Makefile, databases/py-rrdtool Makefile

databases/rrdtool: Bump revisions after 1.11.0
DeltaFile
+1-1net-mgmt/smokeping/Makefile
+1-1net-mgmt/rrdbot/Makefile
+1-1net-mgmt/collectd5/Makefile
+1-1mail/opendkim-devel/Makefile
+1-1databases/py-rrdtool/Makefile
+1-1databases/pecl-rrd/Makefile
+6-67 files not shown
+13-913 files

FreeNAS/freenas 4353f53src/middlewared/middlewared/plugins/pool_ utils.py, tests/api2 test_pool_dataset_user_props.py

No uppercase in ZFS user properties
DeltaFile
+3-2tests/api2/test_pool_dataset_user_props.py
+1-1src/middlewared/middlewared/plugins/pool_/utils.py
+4-32 files

FreeBSD/ports c08f9e3x11/rio Makefile distinfo

x11/rio: update 0.5.14 → 0.5.19
DeltaFile
+3-3x11/rio/distinfo
+1-1x11/rio/Makefile
+4-42 files

FreeBSD/ports d544ef8shells/atuin Makefile distinfo

shells/atuin: update 18.18.1 → 18.19.0
DeltaFile
+139-63shells/atuin/distinfo
+72-32shells/atuin/Makefile
+211-952 files

FreeBSD/ports 8fb5b28lang/typstyle Makefile distinfo

lang/typstyle: update 0.15.0 → 0.15.1
DeltaFile
+31-33lang/typstyle/distinfo
+15-17lang/typstyle/Makefile
+46-502 files

FreeBSD/ports 45dec06finance/ord Makefile distinfo

finance/ord: update 0.27.1 → 0.29.0
DeltaFile
+373-387finance/ord/distinfo
+186-194finance/ord/Makefile
+559-5812 files

FreeBSD/ports 36c08ffdevel/nextest Makefile distinfo

devel/nextest: update 0.9.140 → 0.9.143
DeltaFile
+111-101devel/nextest/distinfo
+55-51devel/nextest/Makefile
+166-1522 files

FreeBSD/ports 7fa5399devel/convco Makefile distinfo

devel/convco: update 0.7.0 → 0.7.1
DeltaFile
+129-125devel/convco/distinfo
+64-63devel/convco/Makefile
+193-1882 files

FreeBSD/ports 51d5379deskutils/just Makefile distinfo

deskutils/just: update 1.57.0 → 1.58.0
DeltaFile
+33-33deskutils/just/distinfo
+16-17deskutils/just/Makefile
+49-502 files

FreeBSD/ports 9783532shells/meka Makefile distinfo

shells/meka: update 0.35.0 → 0.36.0
DeltaFile
+11-9shells/meka/distinfo
+5-4shells/meka/Makefile
+16-132 files

FreeBSD/ports ba76dd8cad/veryl Makefile Makefile.crates

cad/veryl: update 0.20.2 → 0.20.3
DeltaFile
+447-425cad/veryl/distinfo
+222-211cad/veryl/Makefile.crates
+1-2cad/veryl/Makefile
+670-6383 files

FreeBSD/ports d15bceadatabases/iceberg-rust Makefile distinfo

databases/iceberg-rust: update 0.10.0 → 0.10.1
DeltaFile
+5-5databases/iceberg-rust/distinfo
+2-2databases/iceberg-rust/Makefile
+7-72 files

FreeBSD/ports 4ee6cc9lang/gluon Makefile distinfo

lang/gluon: update 0.18.3 → 0.18.4
DeltaFile
+131-127lang/gluon/distinfo
+65-64lang/gluon/Makefile
+196-1912 files

LLVM/project 56801ballvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/lib/Target/AMDGPU SIISelLowering.cpp

[AMDGPU] Guard intrinsics that need vmem-to-lds-load-insts
DeltaFile
+24-12llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+25-11llvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.lds.err.ll
+0-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+49-253 files

FreeBSD/ports dcae09dmath/octave-forge-signal Makefile distinfo

math/octave-forge-signal: Update to 1.4.8.
DeltaFile
+3-3math/octave-forge-signal/distinfo
+1-2math/octave-forge-signal/Makefile
+4-52 files

FreeBSD/ports 6ec5b93math/octave-forge-datatypes Makefile distinfo

math/octave-forge-datatypes: Update to 1.3.2.
DeltaFile
+3-3math/octave-forge-datatypes/distinfo
+1-1math/octave-forge-datatypes/Makefile
+4-42 files

LLVM/project 4c002cfllvm/test/Transforms/LoopVectorize vplan-based-stride-mv-btc.ll

[LV][Test Only] Fix build after #214047: drop `-tail-predication` option (#214838)

It's target-specific and unnecessary here.
DeltaFile
+2-2llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
+2-21 files

FreeBSD/ports 090e79ctextproc Makefile, textproc/py-tinyhtml5 pkg-descr distinfo

textproc/py-tinyhtml5: Add new port

Tinyhtml5 is a HTML5 parser that transforms a possibly malformed HTML document
into an ElementTree tree.

https://doc.courtbouillon.org/tinyhtml5/latest/
DeltaFile
+20-0textproc/py-tinyhtml5/Makefile
+3-0textproc/py-tinyhtml5/distinfo
+2-0textproc/py-tinyhtml5/pkg-descr
+1-0textproc/Makefile
+26-04 files

OpenBSD/ports Ax3VO8cgraphics/p5-Imager Makefile distinfo

   update p5-Imager to 1.034
   CVE-2026-19082
VersionDeltaFile
1.22+2-2graphics/p5-Imager/distinfo
1.58+1-1graphics/p5-Imager/Makefile
+3-32 files

LLVM/project 1b5247fclang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp, clang/test/CIR/CodeGen global-init-coerced-return.cpp

[CIR] Fix crash coercing a call outside a cir.func body (#214785)

A namespace-scope `Pair g = makePair();` crashes x86_64
calling-convention lowering. Coercing the call's register-pair return
needs a temporary alloca, and the code asked the enclosing function for
its entry block to hold it. LoweringPrepare runs after this pass, so the
initializer is still sitting in its cir.global ctor region with no
enclosing cir.func, and getParentOfType returned null.

`emitCoercion` and `emitCoercionToMemory` now take the block to use
directly, and `coercionSlotBlock` picks it: the function's entry block
when there is one, otherwise the entry block of the outermost region
below the module. That block dominates the whole body and travels with
it into whatever function LoweringPrepare later outlines the body into.

This is a prerequisite for enabling x86_64 calling-convention lowering
by default.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+42-25clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+32-0clang/test/CIR/CodeGen/global-init-coerced-return.cpp
+30-0clang/test/CIR/CodeGenOpenACC/private-clause-coerced-ctor.cpp
+104-253 files

FreeBSD/ports 1908605textproc/py-textual-fastdatatable distinfo Makefile

textproc/py-textual-fastdatatable: Update to 0.16.1

- Update list of run dependencies

ChangeLog:

- https://github.com/tconbeer/textual-fastdatatable/releases#release-v0.15.0
- https://github.com/tconbeer/textual-fastdatatable/releases#release-v0.16.0
- https://github.com/tconbeer/textual-fastdatatable/releases#release-v0.16.1

Reported by:    "github-actions[bot]" <notifications at github.com>
DeltaFile
+4-5textproc/py-textual-fastdatatable/Makefile
+3-3textproc/py-textual-fastdatatable/distinfo
+7-82 files

LLVM/project c99056eclang/lib/CIR/Dialect/IR CIRTypes.cpp, clang/unittests/CIR CMakeLists.txt VectorTypeABIAlignTest.cpp

[CIR] Fix vector ABI alignment units and rounding (#214783)

`cir::VectorType::getABIAlignment` returned `NextPowerOf2` of the type's
size in bits, but the hook answers in bytes, and `NextPowerOf2` is
strictly greater so it doubles a size that is already a power of two. A
one-element vector of double reported 128 where its alignment is 8.

Convert the size to bytes and round up with `PowerOf2Ceil`, which leaves
an exact power of two alone. This matches how `llvm::DataLayout` aligns
a vector that has no explicit layout entry.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+65-0clang/unittests/CIR/VectorTypeABIAlignTest.cpp
+3-1clang/lib/CIR/Dialect/IR/CIRTypes.cpp
+1-0clang/unittests/CIR/CMakeLists.txt
+69-13 files

LLVM/project f49e971llvm/test/Transforms/LoopVectorize histograms.ll

[LV] Add historgram multi-use tests (NFC). (#214831)

Add test coverage for miscompiles with histograms and multiple uses of
bucket value and increment.

While touching the file, modernize the existing test + check lines as
well.
DeltaFile
+135-39llvm/test/Transforms/LoopVectorize/histograms.ll
+135-391 files

LLVM/project 75bded6llvm/lib/Object Archive.cpp

Add assert into getZOSAttributes()
DeltaFile
+2-2llvm/lib/Object/Archive.cpp
+2-21 files