[Remarks] Fix use-after-free of block scalar values in the YAML remark parser (#228072)
`YAMLRemarkParser::parseStr` returned `BlockScalarNode::getValue()` as is. That value lives in the YAML document's node allocator, and `next()` advances the document iterator before returning the remark, which frees it. So every argument written as a block scalar (`|`), such as LowerMatrixIntrinsics remarks, pointed at freed memory by the time the caller saw it. This affects the C API, `RemarkLinker`, MLIR remark import, `llvm-remarkutil` and `llvm-opt-report`.
Copy block scalar values into an allocator owned by the parser. The new test reads a block value after parsing the next remark. Under ASan it fails without the fix with a heap-use-after-free in `YAMLRemarkParser::next()`.
Assisted-by: Claude Code (Claude Fable 5.1).
SystemZ: Don't convert AND to RISBG if CC is live
The RISBG-type replacements either don't define CC or set it with
different semantics, so the conversion dropped or clobbered a CC value
that was still used.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
SystemZ: Remove stale CC live range when converting AND to RISBG
convertToThreeAddress replaces an AND immediate with a dead CC def with RISBMux
neither of which defines CC. If the liveness was precomputed for the physreg,
the dead def was still incorrectly tracked in the LiveInterval.
Fixes #229045
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
First bits of scan code for the MT7925 chip.
Only 2GHz is currently scanned and then it is stuck on the auth frame.
Diff is already large enough.
Most bits from a diff by mlarkin@
ARM: Stop setting kill flags on virtual registers before FinalizeISel
There is no point in maintaining kill flags before register allocation
anymore.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Revert "Revert "[AMDGPU] Disable V_WMMA_F{16|32}_16X16X128_[BF]P8_[BF]P8 on gfx1250-strict"" (#229044)
Reverts llvm/llvm-project#228932
apologies, this was not the problematic commit, restoring
PowerPC: Promote 32-bit ops to 64-bit in place for EXTSW elimination
promoteInstr32To64ForElimEXTSW rebuilt a 32-bit instruction as its 64-bit
counterpart (e.g. SRAWI -> SRAWI8) with BuildMI, which adds the opcode's
implicit defs, and then copied over the original operands, which already
carry them. This produced duplicate, inconsistent defs:
%8:g8rc = SRAWI8 killed %7, 8, implicit-def $carry, implicit-def dead $carry
The 32-bit and 64-bit opcodes have the same operand layout, so mutate the
original instruction with setDesc instead. This keeps the original implicit
defs with their dead flags, and also preserves the memoperands and MI flags
that rebuilding dropped. The preserved memoperand on a promoted LHA8 allows
the scheduler to reorder it with spills in aix-cc-abi.ll.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[SPIRV] Only emit MaxByteOffset decoration for SPIR-V 1.1 or later (#228973)
The MaxByteOffset decoration was introduced in SPIR-V 1.1.
Guard the MaxByteOffset decoration emission in lowerFormalArguments with
version check, matching SPIRV-LLVM-Translator behavior.
[LifetimeSafety] Report the alias chain for returned stack memory (#226395)
reportUseAfterReturn did not receive the aliasing chain, so a returned
dangling value was reported without saying which calls or variables
carried the borrow, unlike use-after-scope. Build the chain from the
escaping origin with a new buildOriginFlowChain overload for escape
facts. Like the UseFact overload, it drops the casts that just load the
returned variable, which would otherwise repeat the "returned here"
note.
Assisted by: Opus 5.5
---------
Co-authored-by: Gabor Horvath <gaborh at apple.com>
[mlir][ArmSME] Skip tile allocation for functions with no SME tile ops (#227153)
Functions with a non-empty body but no ArmSME tile ops still ran the
full pipeline (i.e., preprocessing, liveness analysis, and operation
numbering) before discovering there was nothing to allocate.
This PR adds `hasArmSMETileOps`, which checks whether the function
contains any `ArmSMETileOpInterface` op, and bails out early when none
are found (a value not produced/consumed by such an op never gets a tile
ID, so allocation would be a no-op).
**Note**: `overlapping_branches` in `tile-allocation-liveness.mlir` was
updated to use `arm_sme.get_tile` instead of bare function-argument tile
values, and no longer expects an error. `arm_sme.get_tile` has no
operands, so it's trivially cloneable. The allocator resolves the
tile-ID conflict by cloning it into whichever branch needs it, instead
of erroring. The "move required" diagnostic is still covered, in the new
`tile-allocation-move-required.mlir`, using `arm_sme.load_tile_slice`
(which has operands and so can't be cloned for free).
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[orc-rt] Add ORC_RT_TARGET_POSIX, use it to select POSIX sources (#229048)
The list of systems that get the shared POSIX implementation (Apple and
Linux) was repeated wherever POSIX-only headers, sources or tests were
selected. Compute it once, as ORC_RT_TARGET_POSIX, and test that
instead, so that the list can't drift between the copies.
lib/bedrock now composes its system sources the way its comment
describes: the POSIX list is added for any POSIX target, and each OS
adds only its own list on top.
No change to the set of files built or installed.
Assisted-by: Claude
[AArch64] Add sext(shl x, imm)/sext(sra x, imm) selection patterns (#226065)
Currently there are no selection patterns for code where the result of a
constant shift is sign-extended, even though these can be selected to a
single sbfiz/sbfx instruction. For example, at the moment, 2
instructions are generated for the following C function:
```C
int64_t shl_ext(int8_t x) { return x * 2; }
```
Co-authored-by: Hari Limaye <hari.limaye at arm.com>
[SimplifyCFG] Preserve AA metadata when speculating stores (#227034)
When speculating a store instruction, we currently conservatively drop
all UB-implying metadata and attributes, inhibiting alias-analysis after
this transformation has been performed.
This patch improves this by computing the intersection of the
alias-analysis metadata from the speculated store and the previous store
which enabled it.
Assisted-by: Codex
