x11/nvidia-kmod-580, x11/nvidia-driver-580, x11/linux-nvidia-libs-580, graphics/nvidia-drm-*-kmod-580: Update to 580.178.04
Update Legacy version 580 series of drivers to 580.178.04.
In document below:
https://docs.nvidia.com/datacenter/tesla/pdf/NVIDIA_Data_Center_GPU_Driver_Release_Notes_580_v12.0.pdf
1.2. Fixed Issues
* When FM deletes a partition, it doesn’t release MC teams, as a result MC Team
resources (i.e., MLIDs are leaked). We now delete all outstanding MC teams
associated with a partition while de-activating it.
* Multibank failures have been identified in HBM3E fleet and the current driver is
better optimized to handle these failures by triggering channel repair upon the 2nd
uncorrectable error in a pseudochannel.
* On self-hosted systems, the WPR region is mapped in RM reserved memory, while
the CPU never explicitly accesses the mapping. The existence of the mapping could
lead to CPU speculative access and kernel panic. The fix removes WPR from reserved
region mapping and avoids CPU speculative access.
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igb: Stop writing the legacy TADV register
TADV is an em-class interrupt delay register and is absent from the
82575 and later register model. The igb attach path does not expose or
initialize that control, but transmit initialization still wrote its
zero valued storage into a reserved queue-window offset.
Apply the same igb_mac_min boundary already used for TIDV and the
absolute-delay sysctls.
Sponsored by: BBOX.io
(cherry picked from commit c637d474045a41b1763c17a8b4b7763d4159504f)
igb: Reprogram descriptor queues while disabled
Disable each igb-class transmit and receive queue and flush before
changing its descriptor-ring registers. Restore the head and tail
indices that Intel documents as surviving a VF reset.
Use the igb queue-enable control instead of programming legacy TXDCTL
granularity, low-water, and reserved bits that do not belong to the
82575 and later.
Sponsored by: BBOX.io
(cherry picked from commit f879d1cd7df3c5afa69428cc2b07e1675d7776c9)
igb: Correct I350 loopback VLAN byte order
I350 loopback receive descriptors report VLAN tags byte-swapped for
both PFs and VFs. The receive path handled the PF device types but
omitted e1000_vfadapt_i350, causing an admitted VF VLAN packet to be
delivered untagged to the VF parent.
Include the I350 VF type in the existing correction. This matches the
dedicated IGB_RXQ_FLAG_LB_BSWAP_VLAN handling in DPDK igbvf.
Sponsored by: BBOX.io
(cherry picked from commit 7eb7ff6459219e802d51add3ba9d1d9d874db561)
pci_iov: Clear NumVFs when configuration fails
pci_iov_config() programs NumVFs before validating the final VF RID
layout and allocating all generic resources. A subsequent error ran the
driver uninit callback but left the hardware NumVFs register programmed
while the software VF count returned to zero.
Clear NumVFs in the error path after the driver uninit callback,
matching normal SR-IOV teardown ordering. This prevents stale hardware
state after a failed configuration and permits a clean retry.
Sponsored by: BBOX.io
(cherry picked from commit 621498b58cdab36a237d5f0b5c902952ad743fa9)
igb: Stop writing the legacy TADV register
TADV is an em-class interrupt delay register and is absent from the
82575 and later register model. The igb attach path does not expose or
initialize that control, but transmit initialization still wrote its
zero valued storage into a reserved queue-window offset.
Apply the same igb_mac_min boundary already used for TIDV and the
absolute-delay sysctls.
Sponsored by: BBOX.io
(cherry picked from commit c637d474045a41b1763c17a8b4b7763d4159504f)
igb: Reprogram descriptor queues while disabled
Disable each igb-class transmit and receive queue and flush before
changing its descriptor-ring registers. Restore the head and tail
indices that Intel documents as surviving a VF reset.
Use the igb queue-enable control instead of programming legacy TXDCTL
granularity, low-water, and reserved bits that do not belong to the
82575 and later.
Sponsored by: BBOX.io
(cherry picked from commit f879d1cd7df3c5afa69428cc2b07e1675d7776c9)
igb: Correct I350 loopback VLAN byte order
I350 loopback receive descriptors report VLAN tags byte-swapped for
both PFs and VFs. The receive path handled the PF device types but
omitted e1000_vfadapt_i350, causing an admitted VF VLAN packet to be
delivered untagged to the VF parent.
Include the I350 VF type in the existing correction. This matches the
dedicated IGB_RXQ_FLAG_LB_BSWAP_VLAN handling in DPDK igbvf.
Sponsored by: BBOX.io
(cherry picked from commit 7eb7ff6459219e802d51add3ba9d1d9d874db561)
pci_iov: Clear NumVFs when configuration fails
pci_iov_config() programs NumVFs before validating the final VF RID
layout and allocating all generic resources. A subsequent error ran the
driver uninit callback but left the hardware NumVFs register programmed
while the software VF count returned to zero.
Clear NumVFs in the error path after the driver uninit callback,
matching normal SR-IOV teardown ordering. This prevents stale hardware
state after a failed configuration and permits a clean retry.
Sponsored by: BBOX.io
(cherry picked from commit 621498b58cdab36a237d5f0b5c902952ad743fa9)
[compiler-rt][pgo] Add profile instrumentation test for coroutines (#213801)
This PR adds a compiler-rt test (`instrprof-coroutine-profile.cpp`) to
verify PGO profile counter generation and ingestion for C++20
coroutines.
During investigating the iFDO profile ingested for coroutine pass, we
found that the profile data contains entry counts for the original
coroutine function (`foo`), but lacks the entry counters for the split
`foo.resume` function.
After inspecting
[PassBuilderPipelines.cpp](https://github.com/llvm/llvm-project/blob/f7b7ec8d5542dcede1ae607aa74dfe36d7a3c530/llvm/lib/Passes/PassBuilderPipelines.cpp#L1273)
confirms that `PGOInstrumentationGen` runs before `CoroSplitPass`.
Therefore,
- 1) the iFDO profile correctly ingests and associates profile counters
with coroutine function `foo`.
- 2) Separate function entry counters for `foo.resume` are not expected
in the iFDO profile.
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[AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (#207956)
Prevent legalisation of this opcode falling back to SDAG.
In situations where a G_EXTRACT_SUBVECTOR is being performed on two
vectors which aren't double/half the size of each other, represent the
extract as build_vector(extract_vector_element, extract_vector_element,
...).
