FreeBSD/src 65e0e06usr.bin/elfdump elfdump.c

elfdump: Decode SHT_LLVM_ADDRSIG section header type

Reported by:    bz
Sponsored by:   The FreeBSD Foundation

(cherry picked from commit 3c07cfb25283d93f03cdac51158289853d0e17a8)
DeltaFile
+1-0usr.bin/elfdump/elfdump.c
+1-01 files

LLVM/project 9c54c82lldb/docs/resources lldbgdbremote.md, lldb/include/lldb/Host ProcessLaunchInfo.h

[lldb][gdb-remote] Forward client terminal size to lldb-server (#201141)

Add a new gdb-remote packet, `QSetSTDIOWindowSize:cols=N;rows=N`, to
send the dimension of the terminal to the debuggee.

On Windows, the ConPTY emulates a PTY. The client's terminal (the one
the user is running lldb from) has to match the dimensions of the ConPTY
so that the debuggee (which is attached to the ConPTY) gets proper
terminal emulation. If there is a mismatch, lines will not wrap at the
right column and VT sequences will be out of place. In practice, in
lldb, this results in the `(lldb)` prompt being overwritten by the
stdout of the debuggee.

This patch forwards the dimension of the client (the terminal lldb.exe
is running in) to the ConPTY (opened by the server) so that the
dimensions of the client's terminal match the ones of the ConPTY.

As an example, here is the opposite case where the terminal does not
have dimensions (the vscode debug console) and the ConPTY still has

    [3 lines not shown]
DeltaFile
+35-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerCommon.cpp
+30-0lldb/docs/resources/lldbgdbremote.md
+26-0lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+15-8lldb/source/Host/windows/PseudoConsole.cpp
+19-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+13-0lldb/include/lldb/Host/ProcessLaunchInfo.h
+138-86 files not shown
+151-1012 files

LLVM/project ee39c60clang/docs Multilib.rst ReleaseNotes.rst, clang/lib/Driver/ToolChains MSVC.cpp

[Clang] Support multilibs on Windows (#200212)

Summary:
This was pushed to a follow-up, and I think the previous has lingered
long enough to expand this to Windows. the per-target runtime directory
this uses is default-off, but nothing stops us from just providing this.
The interest in this is for ROCm builds on Windows to be able to provide
asan / debug builds the same way on Linux.
DeltaFile
+87-0clang/test/Driver/msvc-multilib.yaml
+18-0clang/lib/Driver/ToolChains/MSVC.cpp
+3-0clang/test/Driver/print-multi-selection-flags.c
+2-1clang/docs/Multilib.rst
+3-0clang/docs/ReleaseNotes.rst
+0-0clang/test/Driver/Inputs/multilib_msvc_tree/bin/.keep
+113-14 files not shown
+113-110 files

LLVM/project 53870f7libc/include math.yaml

[libc][math] Add missing math function entries dfmal,dfmaf128 to math.yaml (#199485)

Part of https://github.com/llvm/llvm-project/issues/199266

Added missing math function entries to `libc/include/math.yaml`:

-  dfmaf128
-  dfmal
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+17-0libc/include/math.yaml
+17-01 files

OPNSense/tools 1fba29fconfig/26.1 ports.conf

Add net/cloudflared to ports build (#512)
DeltaFile
+1-0config/26.1/ports.conf
+1-01 files

OPNSense/core 956a256src/opnsense/mvc/app/controllers/OPNsense/Diagnostics/Api LogController.php, src/opnsense/www/js opnsense_widget_manager.js

widgets: enhance Live Log widget (#10086)

Uses client-side DOM for determining log endpoints, doesn't require any default target access, allows options for severity and search filter and variable log lines to show, which are displayed in summary in widget, and uses true log tailing plus backfill

---------

Co-authored-by: Stephan de Wit <stephan.de.wit at deciso.com>
DeltaFile
+213-30src/opnsense/www/js/widgets/LiveLog.js
+20-5src/opnsense/www/js/widgets/Metadata/Core.xml
+12-0src/opnsense/www/js/opnsense_widget_manager.js
+2-1src/opnsense/mvc/app/controllers/OPNsense/Diagnostics/Api/LogController.php
+247-364 files

FreeNAS/freenas 9f8bfc1src/middlewared/middlewared/plugins/iscsi_ alua.py

NAS-141309 / 26.0.0-RC.1 / Mark STANDBY ALUA ready on middlewared restart when state intact (by bmeagherix) (#19094)

iscsi.alua.standby_alua_ready gates the LUN-replace fast path in
become_active. It is set at the end of the standby_after_start job and
reset on every middlewared start, so if middlewared is restarted on the
STANDBY node while iscsitarget is still running with ALUA fully
configured, the next failover unnecessarily falls back to the
iscsitarget-restart path.

Add standby_recheck_ready, which (on middlewared restart, gated on
system.ready) verifies the steady-state invariants directly from SCST
sysfs on both nodes.

----
Passing extended CI
[here](http://jenkins.eng.ixsystems.net:8080/job/tests/job/sharing_protocols_tests/2572/).

Original PR: https://github.com/truenas/middleware/pull/19090

Co-authored-by: Brian M <brian.meagher at ixsystems.com>
DeltaFile
+77-0src/middlewared/middlewared/plugins/iscsi_/alua.py
+77-01 files

FreeNAS/freenas 467c81csrc/middlewared/middlewared/utils/disks_ disk_class.py

mypy fix
DeltaFile
+3-2src/middlewared/middlewared/utils/disks_/disk_class.py
+3-21 files

OPNSense/core 684782csrc/opnsense/mvc/app/models/OPNsense/Base/FieldTypes TextField.php, src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes TextFieldTest.php

mvc: add new validators to TextField: AllowSpaces, AllowNewlines, AllowSpecial
DeltaFile
+82-0src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes/TextFieldTest.php
+61-2src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/TextField.php
+143-22 files

NetBSD/pkgsrc eEs0Vhhdoc CHANGES-2026

   doc: Updated devel/ruby-msgpack to 1.8.2
VersionDeltaFile
1.3657+2-1doc/CHANGES-2026
+2-11 files

FreeNAS/freenas 343add2src/middlewared/middlewared/alembic/versions/26.0 2026-06-08_12-30_vm_suspend_on_snapshot_default.py

ruff format
DeltaFile
+7-6src/middlewared/middlewared/alembic/versions/26.0/2026-06-08_12-30_vm_suspend_on_snapshot_default.py
+7-61 files

LLVM/project 9be7e75llvm/lib/Target/X86 X86ScheduleC864GM7.td, llvm/test/CodeGen/AMDGPU atomic_optimizations_local_pointer.ll

Merge branch 'main' into users/jeanPerier/mem2reg-fix-197158
DeltaFile
+5,294-0llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512vl.s
+3,721-0llvm/lib/Target/X86/X86ScheduleC864GM7.td
+3,685-0llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
+3,264-0llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512.s
+2,976-0llvm/test/tools/llvm-mca/X86/C864GM7/resources-avx512bwvl.s
+2,894-0llvm/test/tools/llvm-mca/X86/C864GM7/resources-x86_64.s
+21,834-0882 files not shown
+85,422-9,261888 files

NetBSD/pkgsrc 5hcKkSLdevel/ruby-msgpack distinfo Makefile

   devel/ruby-msgpack: update to 1.8.2

   2026-06-09 1.8.2

   * Fix Buffer#clear to properly reset memory chunks before adding them back
     to the pool.  This could have caused data to leak across buffers when
     using the MessagePack::Buffer API directly.  [CVE-PENDING].
VersionDeltaFile
1.36+4-4devel/ruby-msgpack/distinfo
1.35+2-2devel/ruby-msgpack/Makefile
+6-62 files

OPNSense/plugins 05fedc3security/netbird Makefile, security/netbird/src/opnsense/mvc/app/views/OPNsense/Netbird status.volt

security/netbird: small fix (#5491)
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+5-10security/netbird/src/opnsense/mvc/app/views/OPNsense/Netbird/status.volt
+1-1security/netbird/Makefile
+6-112 files

NetBSD/pkgsrc lkd8B4idoc CHANGES-2026

   doc: Updated www/typo3-13 to 13.4.31
VersionDeltaFile
1.3656+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 3hVcZENwww/typo3-13 PLIST distinfo

   www/typo3-13: update to 13.4.31

   13.4.28 (2026-04-14)

   This version is a bugfix and maintenance release.

   13.4.29 (2026-05-12)

   This version is a bugfix and maintenance release.

   13.4.30 (2026-05-26)

   This version is a bugfix and maintenance release.

   13.4.31 (2026-06-09)

   This release is a combined bug fix and security release.

   Find more details in the security bulletins:

    [14 lines not shown]
VersionDeltaFile
1.9+111-29www/typo3-13/PLIST
1.13+4-4www/typo3-13/distinfo
1.14+2-2www/typo3-13/Makefile
+117-353 files

LLVM/project 6584857llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp VOP3PInstructions.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3

For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add their VOPDName and mark
them with usesCustomInserter which will be used to add pre-RA register
allocation hints to preferably assign dst and src2 to the same physical
register. When the hint is satisfied, canMapVOP3PToVOPD recognises the
instruction as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.

Original patch had a bug where it did not check if physical src
registers match register class of appropriate operand in fullVOPD
instructions, check is now done via isValidVOPDSrc.
DeltaFile
+442-520llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+166-69llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+32-1llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+8-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+662-5951 files not shown
+664-5977 files

LLVM/project 7854401llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp

AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC

Replace isVGPR checks with isValidVOPDSrc that validates physical source
registers against the actual combined VOPD/VOPD3 instruction's operand
register classes. Now we also validate operands for VOPD instructions.
DeltaFile
+44-7llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+44-71 files

LLVM/project a2d3d9fllvm/lib/Target/AMDGPU GCNVOPDUtils.cpp

AMDGPU: Refactor checkVOPDRegConstraints
DeltaFile
+28-41llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+28-411 files

LLVM/project 13b28dbllvm/include/llvm/IR Intrinsics.td, llvm/test/TableGen target-mem-intrinsic-attrs.td

[TableGen] Add ArgMem memory location (#201597)

This will allow to use IntrRead/IntrWrite with ArgMem. So this:
```
[IntrWriteMem , IntrInaccessibleMemOrArgMemOnly]
```
could become this:
```
[IntrWriteMem, IntrWrite<[ArgMem, InaccessibleMem]>] 
```
DeltaFile
+47-62llvm/test/TableGen/target-mem-intrinsic-attrs.td
+1-0llvm/include/llvm/IR/Intrinsics.td
+1-0llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
+49-623 files

LLVM/project 70b68dfllvm/lib/Target/AMDGPU SIOptimizeExecMasking.cpp, llvm/test/CodeGen/AMDGPU vcmp-saveexec-to-vcmpx.mir

[AMDGPU] Fix si-optimize-exec-masking stepping into debug values (#201947)

Summary:
This pass tries to step between register uses and would try to enter a
debug instruction if it managed to get between them.
DeltaFile
+8-4llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
+1-0llvm/test/CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.mir
+9-42 files

OPNSense/core f3f1460src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes TextField.php, src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes TextFieldTest.php

mvc: add new validators to TextField: AllowSpaces, AllowNewlines, AllowSpecial
DeltaFile
+82-0src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes/TextFieldTest.php
+61-2src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/TextField.php
+143-22 files

OpenBSD/ports R1B5gdJmail/postfix/stable Makefile, security/sslscan Makefile

   stable: bump statically linked openssl consumers
VersionDeltaFile
1.86.2.1+1-1security/sslscan/Makefile
1.56.2.1+1-1sysutils/borgbackup/2.0/Makefile
1.281.2.2+1-0mail/postfix/stable/Makefile
+3-23 files

OpenBSD/ports XNsUPFCsecurity/openssl/3.5 distinfo Makefile, security/openssl/3.5/pkg PLIST

   MFC: OpenSSL 3.5.7
VersionDeltaFile
1.7.2.1+2-2security/openssl/3.5/distinfo
1.7.2.1+4-0security/openssl/3.5/pkg/PLIST
1.16.2.1+1-1security/openssl/3.5/Makefile
+7-33 files

OpenBSD/ports qduA9ixsecurity/openssl/4.0 distinfo Makefile, security/openssl/4.0/pkg PLIST

   MFC: OpenSSL 4.0.1
VersionDeltaFile
1.2.2.1+14-0security/openssl/4.0/pkg/PLIST
1.2.2.1+2-2security/openssl/4.0/distinfo
1.4.2.1+1-1security/openssl/4.0/Makefile
+17-33 files

FreeNAS/freenas 1c7badfsrc/middlewared/middlewared/plugins/iscsi_ alua.py

Mark STANDBY ALUA ready on middlewared restart when state intact

iscsi.alua.standby_alua_ready gates the LUN-replace fast path in
become_active. It is set at the end of the standby_after_start job
and reset on every middlewared start, so if middlewared is restarted
on the STANDBY node while iscsitarget is still running with ALUA
fully configured, the next failover unnecessarily falls back to the
iscsitarget-restart path.

Add standby_recheck_ready, which (on middlewared restart, gated on
system.ready) verifies the steady-state invariants directly from
SCST sysfs on both nodes.

(cherry picked from commit d5681ffd58e72ff8466c0b8ebacc153e05f857b1)
DeltaFile
+77-0src/middlewared/middlewared/plugins/iscsi_/alua.py
+77-01 files

FreeNAS/freenas 8d60a25src/middlewared/middlewared/plugins/iscsi_ alua.py

NAS-141309 / 27.0.0-BETA.1 / Mark STANDBY ALUA ready on middlewared restart when state intact (#19090)

iscsi.alua.standby_alua_ready gates the LUN-replace fast path in
become_active. It is set at the end of the standby_after_start job and
reset on every middlewared start, so if middlewared is restarted on the
STANDBY node while iscsitarget is still running with ALUA fully
configured, the next failover unnecessarily falls back to the
iscsitarget-restart path.

Add standby_recheck_ready, which (on middlewared restart, gated on
system.ready) verifies the steady-state invariants directly from SCST
sysfs on both nodes.
DeltaFile
+77-0src/middlewared/middlewared/plugins/iscsi_/alua.py
+77-01 files

OPNSense/core 84ae887src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Firewall: Rules: add banner if no rules defined (#10396)
DeltaFile
+22-0src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+22-01 files

OpenBSD/ports gAm7vpEmail/postfix/stable Makefile, security/sslscan Makefile

   bump statically linked openssl consumers
VersionDeltaFile
1.87+1-1security/sslscan/Makefile
1.59+1-1sysutils/borgbackup/2.0/Makefile
1.283+1-0mail/postfix/stable/Makefile
+3-23 files

LLVM/project dae2935llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp, llvm/test/CodeGen/SPIRV/llvm-intrinsics memmove.ll memcpy.align.ll

[SPIR-V] Drop constant zero-sized memcpy/memmove/memset before selection (#201904)

A constant zero Size operand is invalid for OpCopyMemorySized, and these
intrinsics are no-ops, so erase them instead of lowering
DeltaFile
+9-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/memmove.ll
+9-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/memcpy.align.ll
+7-0llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+3-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
+28-04 files