LLVM/project 9b61ff2clang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp teams_distribute_parallel_for_simd_schedule_codegen.cpp

Revert "[OpenMP] Move OpenMP implicit argument to the end and reformat" (#186309)

Reverts llvm/llvm-project#185989
DeltaFile
+4,814-5,294clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+4,758-5,238clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+4,098-4,350clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+3,524-4,004clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
+3,520-4,000clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
+3,174-3,590clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
+23,888-26,476350 files not shown
+112,671-126,870356 files

FreeBSD/ports 558f402www/lexbor pkg-plist distinfo

www/lexbor: Update 2.6.0 => 2.7.0

Approved by:       db@, yuri@ (Mentors, implicit)
DeltaFile
+7-0www/lexbor/pkg-plist
+3-3www/lexbor/distinfo
+1-1www/lexbor/Makefile
+11-43 files

LLVM/project a8c6ccelibc/config/linux/aarch64 entrypoints.txt, libc/config/linux/x86_64 entrypoints.txt

[libc] Add posix_memalign as external entrypoint on Linux x86/ARM. (#185310)

`posix_memalign` is provided by Scudo allocator and is a part of POSIX
standard, so we can safely declare it in the `<stdlib.h>` header on
Linux systems.
DeltaFile
+8-0libc/src/stdlib/CMakeLists.txt
+1-0libc/config/linux/aarch64/entrypoints.txt
+1-0libc/config/linux/x86_64/entrypoints.txt
+10-03 files

NetBSD/pkgsrc-wip 3484323py-beartype PLIST Makefile, py-camel-converter Makefile

py-ksef2: update to 0.9.0

v0.9.0 (2026-03-07)
Feat
    logging: add package structlog helpers
    add batch upload workflow
    add client lifecycle and transport config
    expand client layer with dedicated modules for all API domains
    reorganize infra mappers into domain-specific modules
    refactor domain models, remove deprecated module
    refactor core infrastructure with middleware support
    refactored certifacets client, mappers and models layers
    refactor the endpoints layer along with comprehensive unit tests, 100% coverage
    move Peppol from services to clients, improve API, add method with internal pagination

Fix
    mappers: handle unsupported authentication method codes
    permissions: add entity grants query endpoint
    logging: remove duplicate logger imports

    [16 lines not shown]
DeltaFile
+1,266-0py-beartype/PLIST
+207-114py-ksef2/PLIST
+120-0py-polyfactory/PLIST
+22-0py-polyfactory/Makefile
+19-0py-beartype/Makefile
+19-0py-camel-converter/Makefile
+1,653-11410 files not shown
+1,708-11816 files

LLVM/project 863e058clang/include/clang/CIR/Dialect/IR CIRDialect.td, clang/lib/CIR/CodeGen CIRGenAMDGPU.cpp CIRGenModule.cpp

[CIR][AMDGPU] Add module flags for AMDGPU target (#186081)

Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2100

This PR adds support to emit AMDGPU-specific module flags
`amdhsa_code_object_version` and `amdgpu_printf_kind` to match OGCG
behavior.

In `CIRGenModule`, the flags are stored as CIR module attributes:

`cir.amdhsa_code_object_version` (integer)
`cir.amdgpu_printf_kind` (string: "hostcall" or "buffered")
During lowering to LLVM IR (in LowerToLLVMIR.cpp), these attributes are
converted to LLVM module flags.
DeltaFile
+41-0clang/lib/CIR/CodeGen/CIRGenAMDGPU.cpp
+30-0clang/test/CIR/CodeGenHIP/amdgpu-module-flags.hip
+22-1clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
+3-0clang/include/clang/CIR/Dialect/IR/CIRDialect.td
+3-0clang/lib/CIR/CodeGen/CIRGenModule.cpp
+3-0clang/lib/CIR/CodeGen/CIRGenModule.h
+102-11 files not shown
+103-17 files

LLVM/project 6bf197dmlir/lib/Conversion/XeVMToLLVM XeVMToLLVM.cpp, mlir/lib/Target/LLVMIR/Dialect/XeVM XeVMToLLVMIRTranslation.cpp

Merge branch 'main' into revert-185989-UpdateImplicitArgs
DeltaFile
+247-16mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
+84-44mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
+17-42openmp/docs/design/Runtimes.rst
+10-36mlir/test/Target/LLVMIR/xevm.mlir
+1-37mlir/lib/Target/LLVMIR/Dialect/XeVM/XeVMToLLVMIRTranslation.cpp
+0-31offload/test/api/omp_dynamic_shared_memory.c
+359-2067 files not shown
+371-24413 files

LLVM/project 0770c83mlir/lib/Conversion/XeVMToLLVM XeVMToLLVM.cpp, mlir/lib/Target/LLVMIR/Dialect/XeVM XeVMToLLVMIRTranslation.cpp

[XeVM] Add translation for XeVM cache-control attributes. (#181856)

Use `llvm.intr.ptr.annotation` to attach cache-control metadata to a
pointer. Each cache-control attribute produces its own annotation call;
multiple attributes are chained so every annotation sits on the same
pointer.

This approach protects the metadata across optimizations.
DeltaFile
+247-16mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
+84-44mlir/test/Conversion/XeVMToLLVM/xevm-to-llvm.mlir
+10-36mlir/test/Target/LLVMIR/xevm.mlir
+1-37mlir/lib/Target/LLVMIR/Dialect/XeVM/XeVMToLLVMIRTranslation.cpp
+342-1334 files

NetBSD/src klvChJ2usr.bin/make main.c var.c, usr.bin/make/unit-tests varname-dot-make-save_dollars.mk opt-debug-graph2.exp

   make: ensure .MAKE.SAVE_DOLLARS is set.

   This makes it possible for macros to be set so as to work correctly
   whether .MAKE.SAVE_DOLLARS is "yes" (NetBSD) or "no" (bmake).
VersionDeltaFile
1.8+6-6usr.bin/make/unit-tests/varname-dot-make-save_dollars.mk
1.668+7-2usr.bin/make/main.c
1.1179+3-4usr.bin/make/var.c
1.365+3-1usr.bin/make/make.h
1.12+1-0usr.bin/make/unit-tests/opt-debug-graph2.exp
1.12+1-0usr.bin/make/unit-tests/opt-debug-graph3.exp
+21-133 files not shown
+24-139 files

LLVM/project ac71b18offload/libomptarget OffloadRTL.cpp, offload/plugins-nextgen/amdgpu/src rtl.cpp

[offload] Remove LIBOMPTARGET_SHARED_MEMORY_SIZE envar (#186231)

This commit removes the `LIBOMPTARGET_SHARED_MEMORY_SIZE` envar and
outputs a runtime warning if it is defined. Access to dynamic shared memory
should be obtained through the `dyn_groupprivate` clause (OpenMP 6.1) or
the launch arguments in liboffload kernel launch.
DeltaFile
+17-42openmp/docs/design/Runtimes.rst
+0-31offload/test/api/omp_dynamic_shared_memory.c
+0-26offload/test/api/omp_dynamic_shared_memory_amdgpu.c
+11-0offload/libomptarget/OffloadRTL.cpp
+0-4offload/plugins-nextgen/cuda/src/rtl.cpp
+0-4offload/plugins-nextgen/amdgpu/src/rtl.cpp
+28-1073 files not shown
+29-1119 files

LLVM/project 9226288clang/test/OpenMP target_teams_distribute_parallel_for_simd_schedule_codegen.cpp teams_distribute_parallel_for_simd_schedule_codegen.cpp

Revert "[OpenMP] Move OpenMP implicit argument to the end and reformat (#185989)"

This reverts commit 4376fbd7931048837d34c91b79f01cd1246637a5.
DeltaFile
+4,814-5,294clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+4,758-5,238clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+4,098-4,350clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+3,524-4,004clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp
+3,520-4,000clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp
+3,174-3,590clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
+23,888-26,476350 files not shown
+112,671-126,870356 files

LLVM/project e51e9afmlir/lib/Dialect/XeGPU/Transforms XeGPUSgToWiDistributeExperimental.cpp, mlir/test/Dialect/XeGPU sg-to-wi-experimental-unit.mlir

[MLIR][XeGPU] Add distribution pattern for convertLayoutOp (#184826)
DeltaFile
+22-2mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
+13-0mlir/test/Dialect/XeGPU/sg-to-wi-experimental-unit.mlir
+35-22 files

LLVM/project 13e94eaclang/lib/CodeGen CodeGenFunction.cpp

remove unused var
DeltaFile
+0-1clang/lib/CodeGen/CodeGenFunction.cpp
+0-11 files

LLVM/project 1cf130dmlir/test/Dialect/Builtin/Bytecode builtin_fixed.mlir

Exclude known failure case (#186305)

External resources does not produce same result on big-endian. Keeping
this test for regressions of the encoding scoped keeps it simple while
it doesn't affect the usage there. So just mark as XFAIL.
DeltaFile
+3-0mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
+3-01 files

LLVM/project 40b2079clang/test/CodeGen attr-target-clones-ppc.c

adjust test to reflect the new IR we generate after rebasing on b3d99ac2cda4
DeltaFile
+4-4clang/test/CodeGen/attr-target-clones-ppc.c
+4-41 files

LLVM/project 7b677a8mlir/test/Dialect/Builtin/Bytecode builtin_fixed.mlir

Exclude known failure case

External resources does not produce same result on big-endian. Keeping this test for regressions of the encoding scoped keeps it simple while it doesn't affect the usage there. So just mark as XFAIL.
DeltaFile
+3-0mlir/test/Dialect/Builtin/Bytecode/builtin_fixed.mlir
+3-01 files

LLVM/project 94ba117mlir/lib/Dialect/XeGPU/Transforms XeGPUSubgroupDistribute.cpp, mlir/lib/Dialect/XeGPU/Utils XeGPUUtils.cpp

[MLIR][XeGPU] Support leading unit dim for reduction in sg to wi pass (#185110)
DeltaFile
+74-0mlir/test/Dialect/XeGPU/subgroup-distribute-unit.mlir
+30-16mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+31-15mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
+135-313 files

LLVM/project 4540415llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/RISCV rvp-shuffle-reverse.ll

[RISCV] Fix crash in getShuffleCost for P-extension without V extension (#186149)

RISCVTTIImpl::getShuffleCost() crashes when querying the cost of a
reverse shufflevector on a target with the P-extension but without V/Zve
extensions. The SK_Reverse case calls
getContainerForFixedLengthVector(), which asserts hasVInstructions().

The P-extension uses fixed-width packed SIMD in GPRs, not RVV registers,
so V extension is typically not enabled.

Add an early return for P-extension fixed vectors in getShuffleCost,
consistent with the existing guards in getScalarizationOverhead,
getCastInstrCost, and getVectorInstrCost.
DeltaFile
+70-0llvm/test/Analysis/CostModel/RISCV/rvp-shuffle-reverse.ll
+7-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+77-02 files

LLVM/project bcdf3c9llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-narrowing-shift-trunc.ll

[RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (#186141)

combinePExtTruncate is called from performTRUNCATECombine when the
P-extension is enabled. It attempts to match patterns like
truncate(srl(mul/sub(...), shamt)) and combine them into P-extension
narrowing shift instructions (e.g. PNSRLI, PNSRAI).

However, after extracting the shift input operand `Op` from the SRL
node, the function unconditionally accessed Op.getOperand(0) and
Op.getOperand(1) without first verifying that Op has at least two
operands. For example, when combining:

```
  truncate(v2i16
    srl(v2i32
      bitcast(v2i32 i64),   <-- Op = bitcast, a unary op with 1 operand
      BUILD_VECTOR <8, 8>))
```


    [7 lines not shown]
DeltaFile
+80-0llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
+4-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+84-02 files

LLVM/project c6395bbmlir/lib/Dialect/XeGPU/Transforms XeGPULayoutImpl.cpp XeGPUPropagateLayout.cpp, mlir/test/Dialect/XeGPU propagate-layout.mlir propagate-layout-inst-data.mlir

[MLIR][XeGPU] Enhance Layout Propagation for broadcasting both leading dimensions and  inner unit dimensions (#185583)

This PR enhances the layout propagation rules for broadcast operations.

The source layout is derived from the result layout based on the
broadcast pattern:
1. Broadcast on leading dimensions
  The source layout is the slice layout of the result layout.
2. Broadcast on inner unit dimensions
The source layout matches the result layout, with sg_data and lane_data
set to 1.
3. Broadcast on both leading dimensions and inner unit dimensions
  The source layout is derived by combining the above two rules.
DeltaFile
+17-12mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
+27-0mlir/test/Dialect/XeGPU/propagate-layout.mlir
+21-0mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
+21-0mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+11-4mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+7-7mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
+104-233 files not shown
+115-369 files

LLVM/project 2aaef84llvm/include module.modulemap

[llvm] Fix modules build after 2e614f353871a9a0738c3b49d35d5ed4e480633b (#186302)
DeltaFile
+1-0llvm/include/module.modulemap
+1-01 files

OpenBSD/src qvsTTSSsys/dev/pci/drm/scheduler sched_main.c

   drm/sched: Fix kernel-doc warning for drm_sched_job_done()

   From Yujie Liu
   da09dfc90cb7ed1ab40d675234382f151eeb0563 in linux-6.18.y/6.18.17
   61ded1083b264ff67ca8c2de822c66b6febaf9a8 in mainline linux
VersionDeltaFile
1.16+1-0sys/dev/pci/drm/scheduler/sched_main.c
+1-01 files

OpenBSD/src qHnKy2fsys/dev/pci/drm drm_syncobj.c

   drm/syncobj: Fix handle <-> fd ioctls with dirty stack

   From Julian Orth
   7196a1ff7b9a2ab6d973fe3c1dfc426d8d8ed4d2 in linux-6.18.y/6.18.17
   2e3649e237237258a08d75afef96648dd2b379f7 in mainline linux
VersionDeltaFile
1.18+2-2sys/dev/pci/drm/drm_syncobj.c
+2-21 files

FreeBSD/ports cd74697audio/subtui distinfo Makefile

audio/subtui: Update to 2.11.0

Changelog: https://github.com/MattiaPun/SubTUI/releases/tag/v2.11.0
DeltaFile
+5-5audio/subtui/distinfo
+1-1audio/subtui/Makefile
+6-62 files

OpenBSD/src LyUxiO1sys/dev/pci/drm/amd/display/dc/core dc_stream.c

   drm/amd/display: Use GFP_ATOMIC in dc_create_stream_for_sink

   From Natalie Vock
   0381584929791c4b989fb0a36a466ae20aea1608 in linux-6.18.y/6.18.17
   28dfe4317541e57fe52f9a290394cd29c348228b in mainline linux
VersionDeltaFile
1.12+1-1sys/dev/pci/drm/amd/display/dc/core/dc_stream.c
+1-11 files

OpenBSD/src Vg8yO7ysys/dev/pci/drm/i915/display intel_dp.c

   drm/i915/dp: Fix pipe BPP clamping due to HDR

   From Imre Deak
   9498fa25a0b0d8c095ce3d1f15d7864228692822 in linux-6.18.y/6.18.17
   fe26ae6ac8b88fcdac5036b557c129a17fe520d2 in mainline linux
VersionDeltaFile
1.32+17-3sys/dev/pci/drm/i915/display/intel_dp.c
+17-31 files

OpenBSD/src mEjXyJ3sys/dev/pci/drm/i915/display intel_dp.c

   drm/i915/dp: Fail state computation for invalid DSC source input BPP values

   From Imre Deak
   99f617ea2ff017b0ba10d5371d83345331091afa in linux-6.18.y/6.18.17
   338465490cf7bd4a700ecd33e4855fee4622fa5f in mainline linux
VersionDeltaFile
1.31+21-7sys/dev/pci/drm/i915/display/intel_dp.c
+21-71 files

OpenBSD/src ouFnkAesys/dev/pci/drm/amd/amdgpu amdgpu_device.c

   drm/amd: Fix hang on amdgpu unload by using pci_dev_is_disconnected()

   From Mario Limonciello
   378dff71efddd15f34124bf9d7c98cd69cd05286 in linux-6.18.y/6.18.17
   f7afda7fcd169a9168695247d07ad94cf7b9798f in mainline linux
VersionDeltaFile
1.94+2-2sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c
+2-21 files

OpenBSD/src aLf49rZsys/dev/pci/drm/amd/amdgpu amdgpu_device.c

   drm/amdgpu: Fix error handling in slot reset

   From Lijo Lazar
   73e8bdf14248136459753252a438177df7ed8c7c in linux-6.18.y/6.18.17
   b57c4ec98c17789136a4db948aec6daadceb5024 in mainline linux
VersionDeltaFile
1.93+10-7sys/dev/pci/drm/amd/amdgpu/amdgpu_device.c
+10-71 files

NetBSD/pkgsrc EnUIb7bdoc CHANGES-2026

   pkgtools/depgraph: Note update of depgraph to 20260312, fixing a tyop in a sed expression
VersionDeltaFile
1.1718+2-1doc/CHANGES-2026
+2-11 files

LLVM/project eb5f780clang/lib/Basic/Targets PPC.cpp PPC.h, clang/lib/CodeGen CodeGenFunction.cpp CodeGenModule.cpp

code review

code review

code review
DeltaFile
+3-9clang/lib/CodeGen/CodeGenFunction.cpp
+4-6clang/lib/CodeGen/CodeGenModule.cpp
+0-7clang/lib/Basic/Targets/PPC.cpp
+0-1clang/lib/Basic/Targets/PPC.h
+7-234 files