OPNSense/core 8086e22 — src/opnsense/mvc/app/models/OPNsense/Hostdiscovery/Menu Menu.xml, src/opnsense/mvc/app/models/OPNsense/Interfaces/Menu Menu.xml

Interfaces: Neighbors: Automatic Discovery: Separate menu items (#11159)
DeltaFile
+3-2src/opnsense/mvc/app/models/OPNsense/Hostdiscovery/Menu/Menu.xml
+1-1src/opnsense/mvc/app/models/OPNsense/Interfaces/Menu/Menu.xml
+4-32 files

LLVM/project aacdf8b — mlir/include/mlir/Dialect/OpenACC OpenACCUtilsLoop.h, mlir/lib/Dialect/OpenACC/Utils OpenACCUtilsLoop.cpp

[OpenACC] Wrap multi-block acc.loop bodies in scf.execute_region (#238974)

convertACCLoopToSCFFor always cloned the loop body directly into the
innermost scf.for. cloneACCRegionInto only handles single-block regions,
so a structured acc.loop whose body has more than one block hit an
unreachable in the orphan-loop path of acc-specialize-for-host.

Wrap multi-block bodies in scf.execute_region, as
convertACCLoopToSCFParallel already does. Single-block bodies are still
cloned directly into the scf.for, so existing output is unchanged.

Add a unit test for a two-block body and a acc-specialize-for-host check
for an orphan multi-block loop.
DeltaFile
+47-0mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
+28-0mlir/test/Dialect/OpenACC/acc-specialize-for-host.mlir
+14-3mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
+2-1mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsLoop.h
+91-44 files

LLVM/project 33b06b2 — llvm/test/CodeGen/WebAssembly simd-intrinsics.ll memory-interleave.ll, llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs wasm_function_name.ll wasm_function_name.ll.expected

Fix WebAssembly function regex matching without verbose asm (#238717)

Fixes #238289
DeltaFile
+8,752-1,285llvm/test/CodeGen/WebAssembly/memory-interleave.ll
+337-342llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
+5-0llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/wasm_function_name.ll.expected
+1-1llvm/utils/UpdateTestChecks/asm.py
+1-0llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/wasm_function_name.ll
+9,096-1,6285 files

LLVM/project b19ecc0 — clang/include/clang/AST StmtOpenMP.h, clang/lib/AST StmtOpenMP.cpp

Merge branch 'main' into users/zero9178/bufferization-drop-sparse-dep
DeltaFile
+764-684clang/test/OpenMP/interchange_codegen.cpp
+427-0clang/test/OpenMP/loop_transform_iv.c
+278-83clang/lib/Sema/SemaOpenMP.cpp
+200-0clang/test/OpenMP/fuse_codegen.cpp
+83-22clang/include/clang/AST/StmtOpenMP.h
+67-31clang/lib/AST/StmtOpenMP.cpp
+1,819-82023 files not shown
+2,503-86429 files

LLVM/project 6a25fdd — clang/include/clang/AST StmtOpenMP.h, clang/lib/AST StmtOpenMP.cpp

[CLANG][OpenMP] Restore loop variable values after transformation directives (#214717)

This patch fixes loop variable finalization for OpenMP 6.0
loop-transformations constructs: tile, stripe, reverse, interchange and
fuse to comply with spec requirement page 371, lines 19-21. The spec
requires that "After the execution of the loop-transforming construct,
the loop-iteration variables of any of its transformation-affected loops
have the values that they would have without the loop-transforming
directive".
DeltaFile
+764-684clang/test/OpenMP/interchange_codegen.cpp
+427-0clang/test/OpenMP/loop_transform_iv.c
+278-83clang/lib/Sema/SemaOpenMP.cpp
+200-0clang/test/OpenMP/fuse_codegen.cpp
+83-22clang/include/clang/AST/StmtOpenMP.h
+67-31clang/lib/AST/StmtOpenMP.cpp
+1,819-82018 files not shown
+2,485-84124 files

LLVM/project 9de3882 — mlir/lib/Dialect/Bufferization/IR CMakeLists.txt

[mlir][bufferization] Drop unused MLIRSparseTensorDialect dependency (NFC)

MLIRBufferizationDialect has not used anything from the sparse tensor
dialect since #85482 removed the sparse-specific verification of
bufferization.alloc_tensor, and #147549 removed the last include of
SparseTensor.h. Drop the stale link dependency.

Co-authored-by: Claude <noreply at anthropic.com>
DeltaFile
+0-1mlir/lib/Dialect/Bufferization/IR/CMakeLists.txt
+0-11 files

LLVM/project 3489d60 — llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU true16-v2s-copy-subreg-phi.ll fix-sgpr-copies-f16-true16.mir

[AMDGPU][True16] Don't narrow 32-bit uses when folding a VGPR-to-SGPR copy

True16 has no 16-bit SGPRs, so a 16-bit VGPR value is copied into a
32-bit SGPR:

  %3:sreg_32 = COPY %2.lo16:vgpr_32

Since #211848, moveToVALU removes this copy by replacing every use of %3
with %2.lo16. Uses that read all 32 bits become malformed, e.g. a PHI:

  %5:vgpr_32 = PHI %x, %bb.0, %2.lo16, %bb.1

DetectDeadLanes then treats %2 as dead, and the load defining it is
deleted. On gfx1250 this drops the conditional f16 load of alpha/beta
in rocSPARSE and rocBLAS kernels in device pointer mode.

Now uses that read 16 bits, including %3.lo16, get %2.lo16. Uses that
read 32 bits get one 32-bit value built at the copy with REG_SEQUENCE.


    [6 lines not shown]
DeltaFile
+101-212llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+44-7llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-7llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
+3-1llvm/test/CodeGen/AMDGPU/true16-v2s-copy-subreg-phi.ll
+153-2274 files

LLVM/project d38b41f — llvm/lib/Target/AMDGPU SIInstrInfo.h SIFixSGPRCopies.cpp

[AMDGPU][NFC] Add a helper to widen a 16-bit VGPR value to 32 bits

Three places in SIInstrInfo and SIFixSGPRCopies build the same sequence
to put a 16-bit value into the low half of a 32-bit VGPR:

  %undef:vgpr_16 = IMPLICIT_DEF
  %dst:vgpr_32 = REG_SEQUENCE %src.sub, %subreg.lo16, %undef, %subreg.hi16

Move it into SIInstrInfo::buildVGPR32FromLo16(). The source subregister
is a parameter, so callers can't silently drop it.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+22-20llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+1-8llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
+8-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+31-283 files

LLVM/project 99e517b — llvm/test/CodeGen/AMDGPU fix-sgpr-copies-f16-true16.mir true16-v2s-copy-subreg-phi.ll

[AMDGPU][NFC] Pre-commit tests for true16 VGPR-to-SGPR copies of 16-bit subregs

Add tests for VGPR-to-SGPR copies of a 16-bit VGPR subregister in
true16 mode. The current output is wrong in all of them:

- v2s_copy_lo16_phi (MIR) and true16-v2s-copy-subreg-phi.ll: a 32-bit
  PHI gets a 16-bit subregister operand (%src.lo16). On gfx1250 the
  conditional f16 load feeding the PHI is then deleted.
- v2s_copy_hi16_through_sgpr32 (MIR): a copy of %src.hi16 ends up
  reading %src.lo16.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+87-0llvm/test/CodeGen/AMDGPU/true16-v2s-copy-subreg-phi.ll
+66-0llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-true16.mir
+153-02 files

LLVM/project 282a413 — llvm/include/llvm/CodeGen RegisterClassInfo.h, llvm/lib/CodeGen RegisterClassInfo.cpp

[AMDGPU] Stop publishing reserved registers from AMDGPUReserveWWMRegs (#237446)

Since #226523, the register allocators publish the reserved register set
they
freeze to the shared RegisterClassInfo. That makes the publication in
AMDGPUReserveWWMRegs redundant: it recomputes the set with
TRI->getReservedRegs(), and the VGPR allocator republishes the same set
right
after it.

The first commit asserts at the entry of AMDGPURewriteAGPRCopyMFMA, the
consumer
that was handed a reserved register before #221849, that the analysis
matches
MRI's frozen set. It adds RegisterClassInfo::hasCurrentReservedRegs()
for the
comparison. check-llvm passes with it; without the allocators'
publication,
many AMDGPU tests trip it, whereas no test notices without the

    [9 lines not shown]
DeltaFile
+3-22llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
+4-0llvm/lib/CodeGen/RegisterClassInfo.cpp
+4-0llvm/include/llvm/CodeGen/RegisterClassInfo.h
+3-0llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+14-224 files

LLVM/project 5d98972 — mlir/unittests/Bytecode BytecodeTest.cpp

[MLIR][Bytecode] Fix test failure depending on version length (#239179)

This test is testing alignment, and would fail whenever the version
string (which is embedded in the bytecode as the producer) ended up
putting the resource section at a 32-byte aligned offset. This doesn't
happen with the default producer string, but can happen with an unlucky
value of `LLVM_VERSION_SUFFIX`.

Fixes an issue that was exposed by
https://github.com/llvm/llvm-project/pull/222776.
DeltaFile
+4-1mlir/unittests/Bytecode/BytecodeTest.cpp
+4-11 files

FreeBSD/ports 94d37f7 — devel/opencl-clang distinfo.llvm16 Makefile, devel/opencl-clang/files extra-ge16-patch-common__clang.map extra-17to21-patch-options.h

devel/opencl-clang: add LLVM 18-22 support

Remove blanket deprecation and replace with deprecation of flavors using
LLVM < 19 (current LLVM_DEFAULT). (brooks)

PR:             293448
Co-authored-by: Brooks Davis <brooks at FreeBSD.org>
Co-authored-by: Hiroo Ono <hiroo.ono+freebsd at gmail.com>
DeltaFile
+66-36devel/opencl-clang/Makefile
+3-11devel/opencl-clang/distinfo.llvm16
+14-0devel/opencl-clang/files/extra-17to21-patch-options.h
+14-0devel/opencl-clang/files/extra-15to21-patch-options__compile.cpp
+14-0devel/opencl-clang/files/extra-15+16-patch-options.h
+13-0devel/opencl-clang/files/extra-ge16-patch-common__clang.map
+124-477 files not shown
+145-5313 files

FreeBSD/ports 8c58258 — devel/llvm18 Makefile, devel/llvm18/files gold-off-llvm_tools_CMakeLists.txt patch-llvm_tools_CMakeLists.txt

devel/llvm18: remove GOLD support

binutils will remove gold in upcoming releases so drop support preemptively.
DeltaFile
+2-15devel/llvm18/Makefile
+0-10devel/llvm18/files/gold-off-llvm_tools_CMakeLists.txt
+10-0devel/llvm18/files/patch-llvm_tools_CMakeLists.txt
+12-253 files

FreeBSD/ports 2f6111b — www/worldmonitor distinfo pkg-plist, www/worldmonitor/files worldmonitor.env.sample extract-eval-scripts.mjs

www/worldmonitor: Update to 2.11.8

Upstream now has settings for the bind address of the Redis REST proxy
and the relay, fixes the User-Agent for Overpass and pins the Lua
scripts of the military bases seeder. Drop our patches for these.

A Pro subscriber can now unlock the Pro panels with a desktop key,
install the file this needs.

Changelog:      https://github.com/koala73/worldmonitor/releases/tag/v2.11.8

Sponsored by:   Netzkommune GmbH
DeltaFile
+434-384www/worldmonitor/pkg-plist
+0-20www/worldmonitor/files/patch-docker_redis-rest-proxy.mjs
+9-9www/worldmonitor/distinfo
+6-9www/worldmonitor/files/pkg-message.in
+0-14www/worldmonitor/files/extract-eval-scripts.mjs
+11-0www/worldmonitor/files/worldmonitor.env.sample
+460-4366 files not shown
+469-46812 files

LLVM/project 34f9bd8 — mlir/include/mlir/Dialect/OpenMP OpenMPOpsEnums.h, mlir/include/mlir/Dialect/SPIRV/IR SPIRVEnums.h

[mlir][ODS] Include headers required by generated enum declarations and definitions

Generated enum declarations and definitions use C++ constructs that are
not declared by any header they include. They therefore relied on the
surrounding source file to include these headers first.

The enum declarations and definitions now include the headers declaring
these constructs, depending on the features of the enums.

The declarations still only forward declare `AsmParser` and `FieldParser`
to keep the generated headers cheap to include.

Similar to #236155 and #238735 but for the enum generator.

Co-authored-by: Claude <noreply at anthropic.com>
DeltaFile
+86-0mlir/test/mlir-tblgen/cpp-includes-enums.td
+61-7mlir/tools/mlir-tblgen/EnumsGen.cpp
+0-5mlir/include/mlir/Dialect/OpenMP/OpenMPOpsEnums.h
+0-3mlir/unittests/TableGen/EnumsGenTest.cpp
+0-2mlir/include/mlir/Dialect/Transform/IR/TransformAttrs.h
+0-2mlir/include/mlir/Dialect/SPIRV/IR/SPIRVEnums.h
+147-1912 files not shown
+147-3218 files

LLVM/project 305a281 — mlir/lib/Transforms RemoveDeadValues.cpp, mlir/test/Transforms remove-dead-values.mlir

[mlir] remove dead values: don't remove used symbols (#238760)

This was hitherto accidental for functions and region-carrying globals,
make it intentional. In a custom dialect, one may have a side effect
free global-like operation with a symbol referenced from elsewhere in
the translation unit. We don't want that to be removed.

Assisted-by: Gemini 4 Argon
DeltaFile
+16-0mlir/test/Transforms/remove-dead-values.mlir
+11-2mlir/lib/Transforms/RemoveDeadValues.cpp
+27-22 files

LLVM/project 2356fb4 — llvm/include/llvm/CodeGen Rematerializer.h, llvm/lib/CodeGen Rematerializer.cpp

Avoid re-computations, lazy-init rematerializer
DeltaFile
+40-50llvm/lib/Target/AMDGPU/GCNRematStrategy.cpp
+32-23llvm/lib/Target/AMDGPU/GCNRematStrategy.h
+9-9llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+2-2llvm/include/llvm/CodeGen/Rematerializer.h
+3-0llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+1-1llvm/lib/CodeGen/Rematerializer.cpp
+87-856 files

FreeBSD/ports 0f36a5b — textproc/elasticsearch8 Makefile, textproc/elasticsearch8/files patch-build-conventions_src_main_java_org_elasticsearch_gradle_internal_conventions_info_ParallelDetector.java

textproc/elasticsearch8: Fix path to distfiles in LOCAL

While here fix whitespaces in one patch.

PR:             288653
Approved by:    blanket (fix fetch)
Reported by:    linus.sundqvist at loopia.se
Sponsored by:   UNIS Labs
MFH:            2026Q4

(cherry picked from commit abde9a63044975aa2d41da654e437c17196864e2)
DeltaFile
+1-1textproc/elasticsearch8/files/patch-build-conventions_src_main_java_org_elasticsearch_gradle_internal_conventions_info_ParallelDetector.java
+1-1textproc/elasticsearch8/Makefile
+2-22 files

FreeBSD/ports abde9a6 — textproc/elasticsearch8 Makefile, textproc/elasticsearch8/files patch-build-conventions_src_main_java_org_elasticsearch_gradle_internal_conventions_info_ParallelDetector.java

textproc/elasticsearch8: Fix path to distfiles in LOCAL

While here fix whitespaces in one patch.

PR:             288653
Approved by:    blanket (fix fetch)
Reported by:    linus.sundqvist at loopia.se
Sponsored by:   UNIS Labs
MFH:            2026Q4
DeltaFile
+1-1textproc/elasticsearch8/files/patch-build-conventions_src_main_java_org_elasticsearch_gradle_internal_conventions_info_ParallelDetector.java
+1-1textproc/elasticsearch8/Makefile
+2-22 files

LLVM/project f216bf4 — llvm/lib/Target/SPIRV SPIRVTypeInst.h SPIRVUtils.h, llvm/lib/Target/SPIRV/Analysis SPIRVConvergenceRegionAnalysis.h

[NFC][SPIR-V] Remove unused helpers (#239203)

Simple dead symbols clean up
DeltaFile
+0-6llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+0-4llvm/lib/Target/SPIRV/SPIRVTypeInst.cpp
+0-3llvm/lib/Target/SPIRV/SPIRVUtils.h
+0-2llvm/lib/Target/SPIRV/SPIRVTypeInst.h
+0-1llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.h
+0-165 files

LLVM/project 80542d2 — clang/lib/Driver/ToolChains/Arch LoongArch.cpp, clang/test/CodeGen/LoongArch target-abi-module-flag.c abi-default-no-warning.c

[clang][LoongArch] Pick the default ABI of environment-less triples from the architecture (#231441)

For a LoongArch triple without an environment, such as
loongarch32-unknown-none-elf, the
driver defaults to the double-float ABI (ilp32d), but none of the 32-bit
architectures
(loongarch32, la32v1.0, la32rv1.0) has an FPU, so the driver passes
`-target-abi ilp32d`
together with features that cannot implement it. Compiling anything then
warns:

```
warning: both target-abi and the triple-implied ABI are invalid, ignoring and using feature-implied ABI
```

and the parts disagree on the ABI: the backend falls back to ilp32s,
while clang lowers calls
and defines the predefined macros for ilp32d (`__loongarch_double_float`
is 1 while

    [14 lines not shown]
DeltaFile
+16-0clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
+8-0clang/test/CodeGen/LoongArch/abi-default-no-warning.c
+6-0clang/test/Driver/loongarch-abi.c
+5-0clang/test/CodeGen/LoongArch/target-abi-module-flag.c
+2-2clang/test/Driver/loongarch-march.c
+2-0clang/test/Preprocessor/init-loongarch.c
+39-21 files not shown
+40-37 files

OPNSense/core 30ef1c2 — src/opnsense/mvc/app/models/OPNsense/Hostdiscovery/Menu Menu.xml, src/opnsense/mvc/app/models/OPNsense/Interfaces/Menu Menu.xml

Pool these all together under Discovery
DeltaFile
+2-2src/opnsense/mvc/app/models/OPNsense/Hostdiscovery/Menu/Menu.xml
+1-1src/opnsense/mvc/app/models/OPNsense/Interfaces/Menu/Menu.xml
+3-32 files

FreeBSD/doc 6689b15 — website/content/en/status/report-2026-07-2026-09 bpf-ifnet-hardening.adoc

Status/2026Q3/bpf-ifnet-hardening.adoc: Add report

Pull Request:   https://github.com/freebsd/freebsd-doc/pull/708
DeltaFile
+44-0website/content/en/status/report-2026-07-2026-09/bpf-ifnet-hardening.adoc
+44-01 files

FreeBSD/doc 472c7bc — website/content/en/status/report-2026-07-2026-09 aq.adoc

Status/2026Q3/aq.adoc: Add report

Reviewed by:    nprice
Pull Request:   https://github.com/freebsd/freebsd-doc/pull/715
Differential Revision:  https://reviews.freebsd.org/D60784
DeltaFile
+25-0website/content/en/status/report-2026-07-2026-09/aq.adoc
+25-01 files

LLVM/project 3b1f7fd — llvm/test/CodeGen/LoongArch/lasx vec-sext-invec-mask.ll build-vector.ll, llvm/test/CodeGen/LoongArch/lsx scalar-load-to-vector.ll vec-sext.ll

[LoongArch] Load scalars into vector lane 0 with FLD/VLDREPL (#234119)

Inserting a loaded integer into lane 0 of an undefined vector, which is
also how sub-128-bit vector loads are legalized, was lowered to a scalar
load plus [X]VINSGR2VR. VINSGR2VR merges into its destination, so it
carries a false dependency on the previous value of that register, and
it needs a GPR-to-vector move.

Use FLD.{S/D} for 32/64-bit elements and [X]VLDREPL.{B/H} for 8/16-bit
elements instead. They write the whole register in one instruction.

When the register allocator reuses one vector register for several such
loads, the false dependency serializes otherwise independent chains. In
the GSM autocorrelation loop (9 x i64 multiply-accumulate over i16 taps)
on LA664:

  VF2: 0.953s -> 0.724s
  VF4: 1.446s -> 0.856s
DeltaFile
+76-80llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
+32-50llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
+33-41llvm/test/CodeGen/LoongArch/lsx/scalar-load-to-vector.ll
+30-36llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uitofp.ll
+28-32llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sitofp.ll
+20-32llvm/test/CodeGen/LoongArch/lasx/vec-sext-invec-mask.ll
+219-27121 files not shown
+521-67427 files

LLVM/project 96a415c — llvm/test/CodeGen/LoongArch/lasx scalar-load-to-vector.ll, llvm/test/CodeGen/LoongArch/lsx scalar-load-to-vector.ll

[LoongArch][NFC] Pre-commit tests for loading a scalar into a vector (#234118)
DeltaFile
+237-0llvm/test/CodeGen/LoongArch/lsx/scalar-load-to-vector.ll
+137-0llvm/test/CodeGen/LoongArch/lasx/scalar-load-to-vector.ll
+374-02 files

LLVM/project d11c21a — llvm/lib/Target/SPIRV SPIRV.h SPIRVRemoveUnusedResources.cpp, llvm/test/CodeGen/SPIRV/hlsl-resources remove-unused-resource-dead-handle.ll remove-unused-resources-counter.ll

[hlsl][spirv] Add late pass in spirv backend to remove dead resources (#225270)

Add a pass to remove unused resource handle intrinsics and unused global
variables used to store these handles.
Also remove stores to aforementioned globals that are generated by Clang
as initializers as well as string names only used in dead handle calls.

Based on DXILUnusedResources pass, but differs by removing a resource
global variable if dead regardless of whether the corresponding handle
intrinsic used in its initializer is dead.

Assisted by: codex
DeltaFile
+134-0llvm/lib/Target/SPIRV/SPIRVRemoveUnusedResources.cpp
+51-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resources-live-handle.ll
+49-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resources-loaded-handle.ll
+48-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resources-counter.ll
+29-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resource-dead-handle.ll
+9-0llvm/lib/Target/SPIRV/SPIRV.h
+320-06 files not shown
+330-512 files

LLVM/project 83f726a — clang/lib/StaticAnalyzer/Checkers DynamicTypePropagation.cpp NullabilityChecker.cpp, clang/unittests/StaticAnalyzer CheckLifetimeEndTest.cpp BugReportInterestingnessTest.cpp

[analyzer] Handle null nodes from CheckerContext node creation (#238414)

Node creation (addTransition, addSink, generateNonFatalErrorNode)
returns null when the node already exists or the state is
overconstrained. Several callers dereferenced or reported against the
result unchecked.

Fixes:
- NullabilityChecker: reportBugIfInvariantHolds got null from 4 callers
and from its own addTransition
- DynamicTypeChecker, DynamicTypePropagation, PutenvStackArrayChecker
- Unit test checkers that fed addSink() into a bug report unchecked

Authored-By: Claude
DeltaFile
+4-2clang/lib/StaticAnalyzer/Checkers/DynamicTypeChecker.cpp
+3-2clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
+2-2clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
+4-0clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
+1-1clang/unittests/StaticAnalyzer/CheckLifetimeEndTest.cpp
+2-0clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
+16-71 files not shown
+18-77 files

LLVM/project 5eed099 — flang/lib/Lower OpenACC.cpp, flang/test/Lower/OpenACC acc-data-operands-remapping-selector.f90

[flang][OpenACC] Fix remapping of SELECT TYPE associate names in data clauses

Using the associate name of an allocatable or pointer SELECT TYPE selector
in an OpenACC data clause hit an assertion while lowering, because the
associate name's descriptor type still marked it allocatable or pointer
while the data clause's did not. Convert between the two descriptor types
when they differ only in that way.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+55-1flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
+14-1flang/lib/Lower/OpenACC.cpp
+69-22 files

FreeBSD/ports 5bc84e7 — biology/seaview distinfo pkg-descr, biology/seaview/files patch-Makefile

biology/seaview: Improve port, take maintainership

* Switch MASTER_SITES to official site
* Use localbase for locating FLTK
* Prefer static patching of CC/CXX over dynamic one
* Remove old workaround for 'boolean javarun;' in csrc/phylip.c
* Pet portclippy(1) and portfmt(1)
* Improve pkg-descr

MFH:            2026Q4
(cherry picked from commit c4293503664000a6914433a870dd0edd3d023b08)
DeltaFile
+10-22biology/seaview/Makefile
+21-8biology/seaview/pkg-descr
+13-0biology/seaview/files/patch-Makefile
+3-3biology/seaview/distinfo
+47-334 files