[MLIR][XeGPU] Add distribution pattern for xegpu.load & store for sg to wi pass (#181917)
This PR adds distribution pattern for xegpu.load & store ops for the new
sg-to-wi pass
[SystemZ] Emit external aliases for indirect function descriptors in the ADA section
This is the last of the three patches aimed to support indirect symbol handling for
the SystemZ backend.
An external alias is emitted for indirect function descriptors within the ADA
section, rather than a temporary alias, while also setting all of the appropriate
symbol attributes that are needed for the HLASM streamer to emit the correct XATTR
and ALIAS instructions for the indirect symbols.
Moreover, this patch updates the `CodeGen/SystemZ/zos-ada-relocations.ll` test
as the ADA section is currently the only user of indirect symbols on z/OS.
[Hexagon] Fix assert on sign-bit CONST32 immediates (#182118)
This patch fixes a HexagonConstPropagation assert when evaluating
sign-bit CONST32/CONST64 immediates (e.g. 0x80000000) after ConstantInt
stopped implicitly truncating, by allowing truncation for that signed
case.
[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs
These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.
Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
[AMDGPU] Implement CFI for CSR spills
Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.
Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.
Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
[AMDGPU] Implement CFI for non-kernel functions
This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.
Change-Id: I5e3a9a62cf9189245011a82a129790d813d49373
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
devel/arduino-irremote: Update to 4.6.0
Changes since 4.5.0:
- Fixed missing ESP IRAM_ATTR for receiving interrupt.
- Changed USE_DEFAULT_FEEDBACK_LED_PIN from 0 to 0xFF, because
megaTinyCore defines the not special pin PIN_PA4 as 0.
- Changed timer for ATtiny16X4.
- Fixed missing initialization with pinMode() for feedback LED.
- Fixed bitmask error in sendBiphaseData() when not sending start
bit.
- Improved decodeSamsung().
- OpenLASIR protocol added by danielweidman.
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[clang][ssaf] Improve serialization for Model types and error messages in `JSONFormat`
This changes fixes the diagnostic infrastructure in `JSONFormat`
implementation to pass model objects (`EntityId`, `EntityLinkage`,
`BuildNamespace`, `NestedBuildNamespace`, `SummaryName`) directly to
`ErrorBuilder` instead of manually extracting their components. This
relies on existing `llvm::format_provider` specializations for these
objects.
To support consistent string conversion for `BuildNamespaceKind` and
`EntityLinkageType`, across both serialization and `operator<<`,
`toString`/`fromString` functions have been introduced in an internal
header `ModelStringConversions.h`.
`EntityLinkage::LinkageType` is promoted to a standalone enum class
`EntityLinkageType` at namespace scope, following the same pattern as
`BuildNamespaceKind`.
Tests have been added for `operator<<` and `format_provider` for all
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[OpenMP] Remove NVPTX local addrspace on parameters (#183195)
In CGOpenMPRuntimeGPU::translateParameter, reference-type captured
variables were translated to pointer parameters with two address-space
annotations:
1. LangAS::opencl_global on the pointee (for map'd variables), which
correctly produces ptr addrspace(1) in NVPTX IR.
2. getLangASFromTargetAS(NVPTX_local_addr=5) on the pointer itself,
annotating the parameter as living in NVPTX local (stack) memory.
The second annotation is incorrect at the Clang type-system level:
EmitParmDecl only supports parameters to be in LangAS::Default (or the
special cases for OpenCL).
Temporarily add an assert in EmitParmDecl that catches parameters with
non-default address spaces in non-OpenCL compilations, and fix the
violation by dropping the NVPTX_local_addr addAddressSpace call.
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[SCEV] Introduce SCEVUse wrapper type (NFC)
Add SCEVUse as a PointerIntPair wrapper around const SCEV * to prepare
for storing additional per-use information.
This commit contains the mechanical changes of adding an intial SCEVUse
wrapper and updating all relevant interfaces to take SCEVUse. Note that
currently the integer part is never set, and all SCEVUses are
considered canonical.
[clang] stop error recovery in SFINAE for narrowing in converted constant expressions
A narrowing conversion in a converted constant expression should produce an
invalid expression so that [temp.deduct.general]p7 is satisfied, by stopping
substitution at this point.
Fixes #167709
[Clang][AST] Fix extending an unsigned to signed in `ExprConstant.cpp` (#180563)
Fixes #154713.
The crash was due to `Index` sometimes being an unsigned 64-bit integer
which was being zero-extended to a signed 64-bit, triggering an
assertion failure in `APSInt::getExtValue`. This patch zero-extends it
to a unsigned 64-bit integer instead, since `HandleLValueVectorElement`
takes in a `uint64_t` anyway.
Reserve the first MB of the DVA address space because qwx(4) doesn't
succeed in doing DMA when the DVA is 0x1000 and PCI-PCI bridges may not
forward address in part of that first MB as well.
ok chris@
[SystemZ] Emit external aliases for indirect function descriptors in the ADA section
This is the last of the three patches aimed to support indirect symbol handling for
the SystemZ backend.
An external alias is emitted for indirect function descriptors within the ADA
section, rather than a temporary alias, while also setting all of the appropriate
symbol attributes that are needed for the HLASM streamer to emit the correct XATTR
and ALIAS instructions for the indirect symbols.
Moreover, this patch updates the `CodeGen/SystemZ/zos-ada-relocations.ll` test
as the ADA section is currently the only user of indirect symbols on z/OS.
divert: Use a better source identifier for netisr_queue_src() calls
These opaque IDs are used by netisr to distribute work among threads.
The mapping function is simply SourceID % numthreads, so using socket
addresses as source IDs isn't going to distribute packets well due to
alignment.
Use the divert socket's generation number instead, as that suits this
purpose much better.
Reviewed by: zlei, glebius
MFC after: 1 week
Sponsored by: OPNsense
Sponsored by: Klara, Inc.
Differential Revision: https://reviews.freebsd.org/D55537
[CIR][NFC] Fix unused variable warnings (#183604)
We have accumulated four places where variables were only being used in
asserts. This change silences the warnings for that.
