[mlir-translate] Parse LLVM library options into context (#242707)
Since #233195, -import-llvm ignores library options such as
--use-constant-int-for-fixed-length-splat, which
Target/LLVMIR/Import/constant.ll passes: its LLVMContext reads them from
its own context, which nothing parses into.
Parse mlir-translate's command line into a context that -import-llvm
assigns to its LLVMContext. This silent ignore issue would be caught
after #242689
py-cloud-init: update to 26.2
This update required switching to Meson for the build.
The initial configuration is now correctly loaded from
/usr/pkg/etc/cloud/cloud.cfg although the patch for this needs more
work.
It is still not clear that cloud-init does anything useful in NetBSD.
Increase the MCLBYTES RX DMA allocation size, since the valid maximum 802.11
frame size can be larger, and therefore could write beyond the allocation.
Diff from acts1631kjv at proton dot me.
ok claudio@
security/wazuh-agent: Change GH_TAGNAME to use 4.14.9 version
- Bump PORTREVISION
PR: 300525
Reported by: Tomas Engin <toma __at_ engin.se>
(cherry picked from commit 8d8560301aab4cd10982e471de212014a86aa2f7)
[DAGCombiner] Don't fold fmul/fdiv by a power of 2 that converts to inf (#242493)
`combineFMulOrFDivWithIntPow2` turns `(fdiv C, (uitofp Pow2))` into an
integer subtract on C's exponent, and `fmul` into an add. It checks that
the result stays inside the exponent range, but not that `Pow2` itself
converts to a finite value. For half, `(uitofp (shl 1, 16))` is +inf, so
`8192 / (1 << 16)` is 0, but the fold gave 0.125. The fmul form gave 64
instead of +inf.
Don't fold when the largest power of 2 the operand can hold is above the
format's maximum exponent. Only half is affected in practice: the other
formats would need an integer wider than 128 bits.
The first commit adds the tests with the current output. They're on X86,
which folds both forms; the fdiv form also fires on other targets. 2^15,
the largest finite power of 2 in half, still folds.
Fixes #241266.
Assisted by Claude (Anthropic).
xhci: Enlarge total transfer number
We enlarge the total number of queued transfer. Also, to make controller
always busy. We enqueue the xfer as much as possible to the ring in
multiple enter code.
Differential Revision: https://reviews.freebsd.org/D61246
xhci: Map stream id to occupied slot
In xhci_check_transfer, we tried to iterate through STREAM * NUM_SLOTS
and find the correct stream. However, stream is rear nowadaya both on
FreeBSD and Linux. In which means that such STREAM * NUM_SLOTS array is
sparse.
As a result, we use a bit map to map stream id to slot. For a
xhci_mask[stream_id], it contains the slot_id bitmap over which slot has
been occupied.
Differential Revision: https://reviews.freebsd.org/D61247
[CIR] Report side effects of volatile loads and memory asm operands
cir.load, cir.get_bitfield and cir.matrix.column_major_load declared only
a read of their address, so dead code elimination erased them when the
result was unused, even when the load was volatile or atomic. A cir.asm
with a memory operand such as "=*m" and no result was erased the same
way. A volatile or atomic load now also reports unknown read and write
effects, as the LLVM dialect does, and an inline asm reports a read and
a write of each memory operand. The new InlineAsmOp::isMemoryOperand
names the operand_attrs encoding of memory operands; the LLVM lowering
uses it too. A cir.asm verifier now checks that operand_attrs has one
entry per operand, each a unit attribute on a pointer operand or an
empty dictionary.
Assisted-by: Claude Code (claude-opus-5-5).
[Passes] Remove -enable-loopinterchange (#238899)
-enable-loopinterchange provides the default of
PipelineTuningOptions::LoopInterchange, but clang and flang always set
the field from -f[no-]loop-interchange, so -mllvm
-enable-loopinterchange has no effect there. Remove it and give the
field a constant default. Use -opt-disable=loop-interchange to skip the
pass.
DTLTO no longer depends on LLVMPasses. As llvm-lto2 and linkers no
longer set the field to false, remote-options.test only checks that
DTLTO forwards -floop-interchange.
LLM-aided
[APInt] Add a single-word fast path to smul_ov (#242542)
smul_ov detects overflow by dividing the product by one of the operands.
Callers on hot paths, such as BasicAA since #241379, pay for that
division.
For single-word values, multiply the sign-extended operands with
MulOverflow, which uses the compiler's overflow builtin where available,
and check that the product fits in the bit width. Wider values keep the
existing implementation.
Assisted-by: Claude Code
Assisted-by: OpenAI Codex
[CIR] Report side effects of volatile loads and memory asm operands
cir.load, cir.get_bitfield and cir.matrix.column_major_load declared only
a read of their address, so dead code elimination erased them when the
result was unused, even when the load was volatile or atomic. A cir.asm
with a memory operand such as "=*m" and no result was erased the same
way. A volatile or atomic load now also reports unknown read and write
effects, as the LLVM dialect does, and an inline asm reports a read and
a write of each memory operand. The new InlineAsmOp::isMemoryOperand
names the operand_attrs encoding of memory operands; the LLVM lowering
uses it too.
Assisted-by: Claude Code (claude-opus-5-5).
CodeGen: Merge shrinkToUses live-in segments in one pass
extendSegmentsToUses visits blocks in worklist order and inserted each
live-in segment into the middle of the segment vector, as did
createSegmentsForValues for the def segments. Sort both and merge them
in one pass instead, with at most one live-in segment per block. The
gain is largest in cases with large live ranges across many blocks.
llc instructions:u:
CTMark x86_64: -0.13%
CTMark arm64: -0.06%
AMDGPU sample: -0.28%
Largest AMDGPU improvements:
rocsolver potf2-specialized-kernels-d (gfx942): -4.40%
rocsolver getf2-small-d (gfx942): -2.62%
rocsolver getf2-small-d (gfx1100): -2.00%
rocprim warp_sort (gfx1100): -1.54%
Blender Cycles kernel (gfx1030/gfx1100/gfx1201): -0.9%
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AMDGPU: Promote 16-bit arguments to i32 in the calling convention
Promote i16, f16 and bf16 arguments to i32 in the calling convention
when they are inreg or real true16 is not used, instead of special
casing the copy type in LowerFormalArguments. The manual call lowering
code can now rely on LocVT / ArgVT.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
