LLVM/project 10ecc78 — llvm/lib/Target/RISCV RISCVLoadStoreOptimizer.cpp

Fix RISC-V's O3-pipeline.ll

Created using spr 1.3.6-beta.1
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
+1-01 files

LLVM/project a9472e2 — llvm/lib/Target/AArch64 AArch64TargetTransformInfo.h AArch64ISelLowering.cpp

[AArch64] Merge TTI::isLegalAddressingMode() into TLI (NFC) (#231568)
DeltaFile
+0-38llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+30-7llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+0-5llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
+30-503 files

LLVM/project f32db55 — flang/include/flang/Optimizer/Transforms Passes.td DebugTypeGenerator.h, flang/lib/Optimizer/Transforms AddDebugInfo.cpp DebugTypeGenerator.cpp

[flang][debug] Keep the bounds of variables in stack slots at -O0. (#229876)

flang uses hidden variables to carry the bounds and length parameters of
an array or character in the debug info. The fake_use thing was added to
keep them alive throughout the function. It works in many but not all
cases, and the ones it does not cover take a number of different forms.
Most of them show up on GPU, but several can be reproduced on the host
as well, two of which are
https://github.com/llvm/llvm-project/issues/229434 and the GDB fortran
test gdb.fortran/mixed-lang-stack.exp.

For VLA, clang emits a stack slot to carry each dimension and points the
DISubrange at a dbg.declare on that slot. The optimizer promotes the
slot away, so it is at -O0 that it survives and gives the dimension a
location valid throughout the function.

Using similar approach, at -O0, AddDebugInfo gives each of these hidden
variables a stack slot of its own: a fir.alloca in the alloca block of
the enclosing region, with the bound or length parameter stored into it

    [8 lines not shown]
DeltaFile
+120-0flang/test/Transforms/debug-bounds-stack-slot.fir
+62-0flang/test/Integration/debug-bounds-stack-slot.f90
+52-7flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
+16-1flang/include/flang/Optimizer/Transforms/DebugTypeGenerator.h
+11-5flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
+6-1flang/include/flang/Optimizer/Transforms/Passes.td
+267-141 files not shown
+268-147 files

FreeBSD/ports ae2d073 — textproc/fcitx5-qt Makefile

textproc/fcitx5-qt: Do not pretend to be dependent on KF5

ECM module is provided by the latest KDE Frameworks anyway.

PR:             299313
DeltaFile
+1-1textproc/fcitx5-qt/Makefile
+1-11 files

LLVM/project f2c7098 — bolt/include/bolt/Core Relocation.h, bolt/lib/Core Relocation.cpp

[BOLT] Move target-specific relocation logic into target handlers (#217926)

[BOLT] Introduce target-specific relocation handlers

This PR cleans up BOLT's target-specific relocation handling.
Move relocation logic directly into the X86, AArch64, and RISC-V
handlers located in their corresponding lib/Target directories.
This removes the remaining target-specific relocation helpers from the
generic Relocation.cpp implementation.
This is a behavior-preserving refactoring.

AI tools (codex) were used to assist with implementation.
DeltaFile
+18-1,034bolt/lib/Core/Relocation.cpp
+469-0bolt/lib/Target/AArch64/AArch64RelocationHandler.cpp
+348-0bolt/lib/Target/RISCV/RISCVRelocationHandler.cpp
+223-0bolt/lib/Target/X86/X86RelocationHandler.cpp
+91-96bolt/include/bolt/Core/Relocation.h
+71-42bolt/lib/Rewrite/RewriteInstance.cpp
+1,220-1,17225 files not shown
+1,423-1,26631 files

LLVM/project 87cd6a7 — llvm/lib/Transforms/InstCombine InstCombineSelect.cpp

Update for comments
DeltaFile
+1-11llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+1-111 files

LLVM/project b9aeaf3 — offload/plugins-nextgen/amdgpu/src rtl.cpp

fix braces
DeltaFile
+2-1offload/plugins-nextgen/amdgpu/src/rtl.cpp
+2-11 files

LLVM/project d2595b5 — lldb/test/API/functionalities/inferior-assert TestInferiorAssert.py, lldb/test/API/functionalities/inline-stepping TestInlineStepping.py

[lldb][test] Adjust Windows xfails now that PDB tests are ran (#231831)

Since #230116, several tests have been failing on Windows on Arm.
Failing aka not running before and now running and failing.

It seems that PDB versions pass on Windows on x86_64 but not AArch64.
Though I am suspicious of that, I cannot find any evidence of x86_64
failures so I assume it's the case.
DeltaFile
+20-0lldb/test/API/functionalities/inferior-assert/TestInferiorAssert.py
+4-0lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
+2-0lldb/test/API/lang/cpp/static_members/TestCPPStaticMembers.py
+1-0lldb/test/API/lang/cpp/union-static-data-members/TestCppUnionStaticMembers.py
+1-0lldb/test/API/functionalities/return-value/TestReturnValue.py
+28-05 files

LLVM/project 2194d8c — clang/include/clang/Analysis/Analyses/LifetimeSafety Loans.h, clang/lib/Analysis/LifetimeSafety Loans.cpp Checker.cpp

field-origin-escape
DeltaFile
+147-3clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
+30-15clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
+32-3clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+34-0clang/lib/Analysis/LifetimeSafety/Checker.cpp
+23-0clang/lib/Sema/SemaLifetimeSafety.h
+16-0clang/lib/Analysis/LifetimeSafety/Loans.cpp
+282-215 files not shown
+314-2411 files

LLVM/project 0759dc3 — llvm/include module.install.modulemap, llvm/include/llvm/TargetParser CMakeLists.txt

ARM: Generate processor family and architecture lists in backend (#231620)

ARMTargetParserDef.inc is only included by ARMSubtarget. It was
generated by the TargetParser library's tablegen step, which every
other LLVM library depends on, even when the ARM target is not
built. Generate it with the rest of the ARM backend's tablegen outputs
instead.

This removes 14% of the time in the TargetParser tablegen step, along
with a dependency on 71 ARM td files.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+4-19utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+10-0llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
+0-8llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
+2-2llvm/lib/Target/ARM/ARMSubtarget.h
+0-3llvm/include/llvm/TargetParser/CMakeLists.txt
+0-1llvm/include/module.install.modulemap
+16-332 files not shown
+18-338 files

OPNSense/core 9ad30d7 — src/www interfaces.php

interfaces: remove system_routing_configure() #9352

The function is called via $reload hook so adding another
hook makes no sense.  This may have changed since the original
commit below and since we need to priv-sep these calls the
easiest way is to remove it.  ;)

See also: https://github.com/pfsense/pfsense/commit/8e11b23f541d

(cherry picked from commit 530ee0cee00cf1399af7333945e884878d0d3cdf)
DeltaFile
+0-1src/www/interfaces.php
+0-11 files

LLVM/project ba30129 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx/ir-instruction mulwev_od.ll

including v2i128
DeltaFile
+58-870llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
+13-4llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+71-8742 files

LLVM/project 2ac1d90 — clang-tools-extra/clang-doc BitcodeReader.cpp, clang-tools-extra/clang-doc/tool ClangDocMain.cpp

[TimeProfiler] Mark the TimeTraceScope class nodiscard (#231700)

This would have caught #213521
This patch is similar to #180008 - to understand why
to put this attribute onto the class instead of on the individual ctors.

This patch also fixes the discarded TimeTraceScope
instances within clang and clang-tools-extra now that I was here.
DeltaFile
+7-7clang-tools-extra/clang-doc/BitcodeReader.cpp
+1-1llvm/include/llvm/Support/TimeProfiler.h
+1-1clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
+9-93 files

LLVM/project 0ad4a00 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lsx/ir-instruction mulwev_od.ll

deal with lsx i128
DeltaFile
+96-356llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
+34-22llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+130-3782 files

LLVM/project 07c682b — llvm/lib/Target/LoongArch LoongArchLASXInstrInfo.td LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx/ir-instruction mulwev_od.ll

[LoongArch] Perform DAG combine for MUL to generate `[x]vmulw{ev/od}`
DeltaFile
+32-1,008llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mulwev_od.ll
+35-169llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mulwev_od.ll
+113-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+50-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+41-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+271-1,1775 files

OPNSense/core 9a9796f — src/etc/ssl opnsense.cnf

system: minor tweak in previous
DeltaFile
+1-1src/etc/ssl/opnsense.cnf
+1-11 files

OPNSense/core 3f46903 — contrib/IXR IXR_Library.php

contrib: multiple deprecation fixes

- Replace xml_set_object() and string handlers with proper object callables.
- Remove xml_parser_free(), a no-op since PHP 8.0

(cherry picked from commit 00afadefce308c2a701ad2c9d5baeacec668c136)
DeltaFile
+2-4contrib/IXR/IXR_Library.php
+2-41 files

OPNSense/core ada5990 — src/man/man8 opnsense-version.8, src/sbin opnsense-version

firmware: opnsense-version: simplifications and verbose mode

-V is already taken so verbose mode goes to -D instead.

Try something new by passing ${OPT} expansion so we can also
make command assingments more easy in the future.
DeltaFile
+25-14src/sbin/opnsense-version
+4-2src/man/man8/opnsense-version.8
+29-162 files

LLVM/project d3b943e — llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine intrinsic-select.ll

Update for comments
DeltaFile
+15-20llvm/test/Transforms/InstCombine/intrinsic-select.ll
+4-0llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+19-202 files

LLVM/project 25ab0e4 — llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine select-fcmp-fmul-zero-absorbing-value.ll

Use TriviallyVectorizable
DeltaFile
+10-4llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+2-3llvm/test/Transforms/InstCombine/select-fcmp-fmul-zero-absorbing-value.ll
+12-72 files

LLVM/project 45f0ed5 — llvm/test/CodeGen/AMDGPU simplify-libcalls.ll amdgpu-simplify-libcall-pow.ll

Fix lit test issue.
DeltaFile
+18-36llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-rootn.ll
+9-11llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
+2-4llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
+29-513 files

LLVM/project da21cd2 — llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine intrinsic-select.ll

[InstCombine] Fold select of pow into select of the differing operand

When both arms of a select are calls to `llvm.pow` with one use that
differ in exactly one operand, sink the select into that operand:

$$
\mathrm{select}(c,\ x^{y},\ x^{z}) \rightarrow x^{\mathrm{select}(c,\ y,\ z)}
$$

$$
\mathrm{select}(c,\ x^{z},\ y^{z}) \rightarrow \mathrm{select}(c,\ x,\ y)^{z}
$$

This removes one `pow` call. FMF are intersected and debug locations
are merged. The transform is skipped when a differing operand is a
constant, since that may enable a cheaper lowering (e.g.
$x^2 \rightarrow x \cdot x$).
DeltaFile
+23-31llvm/test/Transforms/InstCombine/intrinsic-select.ll
+35-0llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+58-312 files

LLVM/project e851f76 — llvm/test/CodeGen/AMDGPU simplify-libcalls.ll

[AMDGPU] Autogenerate checks in simplify-libcalls.ll. NFC
DeltaFile
+1,680-274llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
+1,680-2741 files

OPNSense/core c3aa05b — src/opnsense/www/js opnsense_widgets.js, src/opnsense/www/js/widgets BaseWidget.js Gateways.js

dashboard: widget lifecycle cleanup

- Remove manual tick calls in onWidgetOptionsChanged case and centralize this to the manager
- When refreshing, cancel any outstanding refresh actions
- Only resolve option metadata once when opening a dialog
- Prevent a double graph data fetch for the HealthGraph during both onMarkupRendered() and the initial tick
- Remove direct tick/update calls from Certificates, DnsmasqLeases, KeaLeases, Gateways and ThermalSensors as the manager now takes care of this.
DeltaFile
+20-16src/opnsense/www/js/widgets/Certificates.js
+27-6src/opnsense/www/js/opnsense_widgets.js
+7-10src/opnsense/www/js/widgets/HealthGraph.js
+0-8src/opnsense/www/js/widgets/ThermalSensors.js
+0-5src/opnsense/www/js/widgets/Gateways.js
+2-2src/opnsense/www/js/widgets/BaseWidget.js
+56-473 files not shown
+56-509 files

LLVM/project 7e2d179 — libc/src/unistd lockf.h, libc/src/unistd/linux lockf.cpp

[libc] Implement lockf in unistd (#230856) (#231145)

Implement the POSIX function `lockf(int fd, int cmd, off_t len)` in
`<unistd.h>`.

Fixes #230856.

Assisted by Antigravity and reviewed by Aman Maurya.
DeltaFile
+103-0libc/test/src/unistd/lockf_test.cpp
+81-0libc/test/integration/src/unistd/lockf_test.cpp
+69-0libc/src/unistd/linux/lockf.cpp
+26-0libc/src/unistd/lockf.h
+23-0libc/test/integration/src/unistd/CMakeLists.txt
+20-0libc/test/src/unistd/CMakeLists.txt
+322-010 files not shown
+377-016 files

FreeBSD/src fa4f5cc — share/man/man4 pcm.4, sys/dev/sound/pcm channel.c

pcm.4: Remove DIAGNOSTICS section

These diagnostics do not exist anymore.

MFC after:      1 week

(cherry picked from commit 25faf861089ca119528ea4da39fe594b1c5ca55a)
DeltaFile
+1-9share/man/man4/pcm.4
+1-1sys/dev/sound/pcm/channel.c
+2-102 files

FreeBSD/src 680957e — libexec/rc/rc.d mountd

rc.d/mountd: Do not require /etc/exports

mountd exits if it cannot read any exports files. Requiring
/etc/exports, however, unconditionally stops mountd from starting on a
server that exports ZFS datasets only (/etc/zfs/exports).

Let sbin/mountd handle requirements itself, instead of hardcoding
/etc/exports, which is also wrong, because different files can be
specified in mountd_flags.

This patch also works with nfsv4_server_enable="YES", by preserving the
behavior of failing to start if there is no "V4:" line in the exports
file, which is missing by default on ZFS-only exports.

MFC after:      1 week
Sponsored by:   The FreeBSD Foundation
Reviewed by:    rmacklem, markj, emaste
Differential Revision:  https://reviews.freebsd.org/D60044

(cherry picked from commit 26203cca52621c215f60640bf59128dcd9780be7)
DeltaFile
+0-1libexec/rc/rc.d/mountd
+0-11 files

FreeBSD/ports 21a150d — devel/eastl Makefile

devel/eastl: Broken on aarch64, riscv64

Reported by:    fallout

(cherry picked from commit 069d5f6036fcdd37763d4ddd2493c53424e1cbd2)
DeltaFile
+2-2devel/eastl/Makefile
+2-21 files

FreeBSD/ports 069d5f6 — devel/eastl Makefile

devel/eastl: Broken on aarch64, riscv64

Reported by:    fallout
DeltaFile
+2-2devel/eastl/Makefile
+2-21 files

LLVM/project 7ebbd31 — llvm/test/Transforms/InstCombine intrinsic-select.ll

[InstCombine] Add tests for select of intrinsics differing in one operand. NFC (#227736)

Add tests for select between two calls to the same trivially
vectorizable
intrinsic whose operands differ in exactly one position.

Positive cases cover pow (scalar, vector, f64, vector with scalar
condition,
FMF, !prof metadata, one constant operand), sqrt, fma, copysign, fshl,
and
powi with a scalar condition.

Negative cases cover both operands constant, multiple differing
operands,
identical operands, extra uses, mismatched intrinsics, non intrinsic
calls,
powi with a vector condition, powi with mismatched exponent types, and
immarg operands (smul_fix).
DeltaFile
+340-0llvm/test/Transforms/InstCombine/intrinsic-select.ll
+340-01 files