LLVM/project 821ff7cllvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange no-partially-perfect-subnest.ll preserve-sibling-order.ll

[LoopInterchange] Supported partially-perfect Loop Nests (#199511)

In the current implementation when the outermost loop contains sibling
sub-loops (i.e. multiple independent loop nests at the same depth), the
pass silently skips the entire loop nest without attempting to
interchange any of the valid sub-nests (See Below Example).

Example:
```
for(int i=0; i<n; i++){  // Loop 1
    for(int j=0; j<m; j++){  // Loop 2
         for(int r=0; r<m; r++){  // Loop 3
         // Do something
         }
    }
    for(int k=0; k<p; k++){  // Loop 4
        for(int l=0; l<p; l++){  // Loop 5
            //Access A[l][k]
        }

    [7 lines not shown]
DeltaFile
+126-0llvm/test/Transforms/LoopInterchange/missed-outer-prefix-subnest.ll
+119-0llvm/test/Transforms/LoopInterchange/confused-dependence-subnest.ll
+111-0llvm/test/Transforms/LoopInterchange/dependency-matrix-padding.ll
+69-26llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+72-0llvm/test/Transforms/LoopInterchange/preserve-sibling-order.ll
+63-0llvm/test/Transforms/LoopInterchange/no-partially-perfect-subnest.ll
+560-263 files not shown
+622-579 files

LLVM/project 9526701llvm/docs/GlobalISel GenericOpcode.md, llvm/include/llvm/Target GenericOpcodes.td

[RISCV][GlobalISel] Add G_CLMULH support (#221686)

Add G_CLMULH to represent the high half of a carry-less multiplication
in generic Machine IR.

Translate llvm.riscv.clmulh to G_CLMULH and mark it legal for native
XLEN scalar types when Zbkc is available. Reuse the existing
SelectionDAG pattern to select the RISC-V CLMULH instruction.
DeltaFile
+60-0llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv64.ll
+28-0llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+15-0llvm/test/CodeGen/RISCV/GlobalISel/clmul-rv32.ll
+10-0llvm/docs/GlobalISel/GenericOpcode.md
+8-0llvm/include/llvm/Target/GenericOpcodes.td
+2-2llvm/test/TableGen/get-named-operand-idx.td
+123-24 files not shown
+133-210 files

NetBSD/src 4EnPXgbsys/arch/arm/dts imx8mq-phanbell.dts

   Enable sdhc on Google i.MX8MQ Phanbell
VersionDeltaFile
1.1+36-0sys/arch/arm/dts/imx8mq-phanbell.dts
+36-01 files

NetBSD/pkgsrc NnkgsKhdoc CHANGES-2026

   doc: Updated wm/enlightenment16 to 1.0.32
VersionDeltaFile
1.6005+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc MNuCM9Dwm/enlightenment16 Makefile distinfo

   enlightenment16: update to 1.0.32

   e16 v1.0.32 - 2026-09-03
   ------------------------
   - 1.0.32
   - snaps: Fix potential crash in title match feature
   - Spec file: Add a %conf section
   - Update po
   - French translation update (Philippe J. Guillaumie)
   - De-iconify windows demanding attention
   - edge: Re-enable button press/release events on top/bottom edge windows
   - .gitignore: Add missing item
   - autofoo: Fix configure.ac for gettext v1.0
   - menus: Remove definitions for horizontal menus
   - manus: Remove broken support for horizontal menus
   - backgrounds: Show progress bars when compositing is enabled
   - pagers: Forgot cast
   - backgrounds: Tweak background scaling heuristics
   - backgrounds: Cosmetics

    [11 lines not shown]
VersionDeltaFile
1.21+4-4wm/enlightenment16/distinfo
1.48+2-3wm/enlightenment16/Makefile
+6-72 files

LLVM/project fd7eac5lld/ELF/Arch AMDGPU.cpp

[AMDGPU][lld] Remove "using namespace llvm" from AMDGPU.cpp (#222818)

AMDGPU class in anonymous namespace collides with llvm::AMDGPU, causing
an error with MSVC.
DeltaFile
+0-1lld/ELF/Arch/AMDGPU.cpp
+0-11 files

LLVM/project c410bbfllvm/test/MC/LoongArch/Relocations sub-expr.s

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+24-2llvm/test/MC/LoongArch/Relocations/sub-expr.s
+24-21 files

LLVM/project 7c3849aclang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn-global-load-tr-w64.hip builtins-amdgcn-global-load-tr-w32.hip

[CIR][AMDGPU] Add support for AMDGCN global/DS load builtins (#220611)

Adds codegen support for AMDGCN global and DS load/read builtins with
transpose variants. These builtins are lowered to their corresponding
`llvm.amdgcn.*` intrinsics.
DeltaFile
+131-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx1250-load-tr.hip
+78-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx950-read-tr.hip
+43-22clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+60-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w32.hip
+59-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-global-load-tr-w64.hip
+371-225 files

FreeBSD/ports 8443f06misc/crush Makefile distinfo, misc/crush/files extra-patch-disable-command-blocking

misc/crush: Update to 0.93.1

Changelog: https://github.com/charmbracelet/crush/releases/tag/v0.93.1

Reported by:    GitHub (watch releases)
DeltaFile
+5-5misc/crush/distinfo
+2-3misc/crush/Makefile
+2-2misc/crush/files/extra-patch-disable-command-blocking
+9-103 files

NetBSD/src YqEEPIzsys/dev/acpi acpi_bat.c

   acpi_bat.c: add Surface Go 3 support

   This device uses a non-standard HID. Addresses PR kern/60709 from
   Ron Ben Aroya, who provided the patch.
VersionDeltaFile
1.124+3-2sys/dev/acpi/acpi_bat.c
+3-21 files

LLVM/project 81e4717clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow PointerFlowPairs.h, clang/lib/ScalableStaticAnalysis/Analyses SSAFAnalysesCommon.h

[SSAF][PointerFlow] Factor out and make the pointer-flow matching reusable

The PointerFlowExtractor matches AST nodes representing pointer-flows
and converts them to entity-based data structures directly. This
commit divides this procedure into two steps: 1) match and represent
AST nodes as PointerFlowPairs; 2) convert PointerFlowPairs to
entity-based edges. Therefore, other SSAF tools may use
PointerFlowPairs.

The refactoring also improves coverage: it separates pointer-type
checking from structural matching, so structural matching alone now
discovers cases that were previously missed due to overly aggressive
type checking (e.g. a record-typed call argument or return value
initialized with a braced-init-list).

Along the way, this also fixes a bug for unnamed bit-fields.

First patch for
rdar://187125348
DeltaFile
+433-0clang/unittests/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairsTest.cpp
+300-0clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairs.cpp
+67-232clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
+122-0clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairs.h
+7-1clang/lib/ScalableStaticAnalysis/Analyses/SSAFAnalysesCommon.h
+1-0llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
+930-2333 files not shown
+933-2339 files

LLVM/project dc7fb83clang/include/clang/ScalableStaticAnalysis/Analyses/EntityPointerLevel EntityPointerLevel.h, clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow PointerFlowPairs.h

[SSAF][PointerFlow] Drop unused TUSummaryExtractor param from translateDeclPointerLevel

TUSummaryExtractor is only needed to mint EntityIds when building an
EntityPointerLevel; translateDeclPointerLevel just walks the Expr and
returns raw DeclPointerLevels, so it never touched Extractor.

This is the second patch the radar below depends on:
rdar://187125348
DeltaFile
+24-20clang/lib/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
+2-3clang/include/clang/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.h
+2-2clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
+2-0clang/include/clang/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowPairs.h
+30-254 files

LLVM/project 07d6729llvm/lib/Target/Mips MipsSEInstrInfo.cpp MipsScheduleP5600.td, llvm/test/CodeGen/Mips mips1-not-support-ldc1-sdc1.ll

[Mips] Fix buildbot failure of MIPS I double store using SWC1 (#221912)

Expand ExtractElementF64_FPR to FMOV_S instead of MFC1 to avoid
incorrect integer store.

Fix x86_64-expensive-checks compile error as for pr
https://github.com/llvm/llvm-project/pull/209362.

Fix #62190.
DeltaFile
+4-8llvm/test/CodeGen/Mips/mips1-not-support-ldc1-sdc1.ll
+6-5llvm/lib/Target/Mips/MipsInstrFPU.td
+1-1llvm/lib/Target/Mips/MipsScheduleP5600.td
+1-1llvm/lib/Target/Mips/MipsScheduleGeneric.td
+0-1llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+12-165 files

LLVM/project e152f54llvm/utils/gn/secondary/libcxx/include BUILD.gn

[gn build] Port f896082fb9ea (#222824)
DeltaFile
+1-0llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+1-01 files

FreeNAS/freenas 50b45a8src/freenas/etc/logrotate.d truenas_s3, src/middlewared/middlewared/alembic/versions/26.0 2026-09-09_21-00_s3_service_name.py

NAS-143516 / 26.0.0 / rename the s3 service from truenas_s3 to s3 (by anodos325) (#19683)

service.query reported it as truenas_s3, the daemon's name rather than
the protocol's. The services_services row has to move with
ServiceInterface.name or nothing resolves it, so a migration renames it;
ServiceWriteRole is keyed by the name upper-cased and moves too.

Root is refused as an access key account and as a bucket owner. Both run
as uid 0, which no bucket grant and no file mode restrains.

The daemon's own messages get /var/log/truenas_s3.log, filtered on the
journal identifier it writes, s3d, and rotated the way scst and
truenas-discoveryd are. Its audit records are a separate path and are
untouched.

The systemd unit, the etc group and the tables keep the truenas_s3 name:
they are the daemon's, and nothing outside middleware names them.

Original PR: https://github.com/truenas/middleware/pull/19672

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+34-0src/middlewared/middlewared/alembic/versions/26.0/2026-09-09_21-00_s3_service_name.py
+20-1tests/api2/test_s3_bucket.py
+12-2src/middlewared/middlewared/plugins/truenas_s3/bucket_crud.py
+12-0src/freenas/etc/logrotate.d/truenas_s3
+11-0tests/api2/test_s3_accesskey.py
+11-0src/middlewared/middlewared/plugins/truenas_s3/accesskey_crud.py
+100-39 files not shown
+132-2015 files

OpenBSD/src V4lFtvgsys/dev/pci/drm drm_drv.c drm_linux.c, sys/dev/pci/drm/include/drm drm_device.h

   correct dma_tag_lookup() loop

   drm_cd.cd_ndevs[] has pointers to drm_softc not drm_device

   Currently, dma_tag_lookup() is only used by the apldcp/apldrm drivers.
   At the start of the softc for both of those is struct platform_device.
   If the loop doesn't match the the function argument is cast to
   struct platform_device *, so the problem was not noticed.

   discussed with kettenis@ and apldcp/apldrm tested on m1 mac mini
VersionDeltaFile
1.146+5-5sys/dev/pci/drm/drm_linux.c
1.207+0-6sys/dev/pci/drm/drm_drv.c
1.13+6-0sys/dev/pci/drm/include/drm/drm_device.h
+11-113 files

FreeBSD/ports 5a3985fdevel/p5-Test-Pod-Links distinfo Makefile

devel/p5-Test-Pod-Links: Update 0.003 => 0.004

Changelog:
https://metacpan.org/release/SKIRMESS/Test-Pod-Links-0.004/source/Changes

- Respect license change.
- Fix antipattern "BUILD_DEPENDS=RUN_DEPENDS".

PR:             298380 283227
Sponsored by:   UNIS Labs (vvd, commit patch)
DeltaFile
+7-5devel/p5-Test-Pod-Links/Makefile
+3-3devel/p5-Test-Pod-Links/distinfo
+10-82 files

LLVM/project 96a51a0mlir/include/mlir/Dialect/AMDGPU/IR AMDGPUDialect.h AMDGPUDialectDecl.h, mlir/lib RegisterAllDialects.cpp

[mlir][AMDGPU] Split the dialect declaration (NFC)

Introduce a self-contained dialect declaration so RegisterAllDialects does not
need the generated AMDGPU operation umbrella.

Across five controlled rebuilds of the affected TU, median instructions fell
from 71.757B to 70.331B (-1.987%) and median wall time fell from 11.01s to
10.77s (-2.180%).

Assisted-by: Codex
DeltaFile
+16-0mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialectDecl.h
+1-2mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUDialect.h
+1-1mlir/lib/RegisterAllDialects.cpp
+18-33 files

LLVM/project 93a5d4fmlir/include/mlir/Dialect/Func/IR FuncOps.h FuncDialect.h, mlir/test/lib/Dialect/GPU TestGpuRewrite.cpp

[mlir][Func] Split the dialect declaration (NFC)

Introduce a self-contained dialect declaration and use it in ten configured
consumers that do not need the generated operation umbrella.

Across three controlled -j16 rebuilds of the affected TUs, median instructions
fell from 224.883B to 220.787B (-1.821%) and median wall time fell from 8.44s
to 8.31s (-1.540%).

Assisted-by: Codex
DeltaFile
+16-0mlir/include/mlir/Dialect/Func/IR/FuncDialect.h
+1-3mlir/include/mlir/Dialect/Func/IR/FuncOps.h
+1-1mlir/unittests/Dialect/Transform/BuildOnlyExtensionTest.cpp
+1-1mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
+1-1mlir/unittests/Dialect/Linalg/InferConvolutionDimsTest.cpp
+1-1mlir/test/lib/Dialect/GPU/TestGpuRewrite.cpp
+21-77 files not shown
+28-1413 files

LLVM/project 092c224clang/unittests/CodeGen QualTypeMapperTest.cpp, flang/test/Fir/OpenACC acc-fir-map-info-prep-attach.mlir

Merge branch 'main' into users/rampitec/block16-strict-disable
DeltaFile
+132-207flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
+295-0clang/unittests/CodeGen/QualTypeMapperTest.cpp
+252-0libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp
+247-0lldb/test/API/functionalities/gdb_remote_client/TestBreakpointNotHit.py
+158-0flang/test/Fir/OpenACC/acc-fir-map-info-prep-attach.mlir
+96-9llvm/include/llvm/ABI/Types.h
+1,180-21664 files not shown
+1,959-36170 files

FreeBSD/src 39cc57alib/libsys pdfork.2

pdfork.2: document kern.pdfork_implicit_nowaitpid

(cherry picked from commit 661d1135e4ed12d6017220ea654ae67a6956dc73)
DeltaFile
+11-0lib/libsys/pdfork.2
+11-01 files

FreeBSD/src f2307ecsys/kern kern_fork.c

kern_fork.c: add kern.pdfork_implicit_nowaitpid sysctl

(cherry picked from commit 24d3cbaaf5ad45b53e15d4729961fc8a8b385562)
DeltaFile
+7-1sys/kern/kern_fork.c
+7-11 files

LLVM/project 78ce438mlir/include/mlir/Dialect/Bufferization/IR Bufferization.h BufferizationDialect.h, mlir/lib RegisterAllDialects.cpp

[mlir][Bufferization] Split the dialect declaration (NFC)

Introduce a self-contained dialect declaration and use it in four consumers
that do not need the generated operation umbrella.

Across three controlled serial rebuilds of the affected TUs, median
instructions fell from 97.470B to 94.887B (-2.650%) and median wall time fell
from 15.20s to 14.70s (-3.289%). Three -j16 runs confirmed a 2.623% reduction
in instructions, with wall time improving 0.722% on the parallel critical path.

Assisted-by: Codex
DeltaFile
+16-0mlir/include/mlir/Dialect/Bufferization/IR/BufferizationDialect.h
+1-6mlir/include/mlir/Dialect/Bufferization/IR/Bufferization.h
+1-1mlir/test/lib/Dialect/Bufferization/TestTensorCopyInsertion.cpp
+1-1mlir/lib/RegisterAllDialects.cpp
+1-1mlir/lib/Dialect/Bufferization/Transforms/EmptyTensorElimination.cpp
+1-1mlir/lib/CAPI/Dialect/Bufferization.cpp
+21-106 files

LLVM/project c9e8899llvm/lib/Target/LoongArch/MCTargetDesc LoongArchAsmBackend.cpp, llvm/test/MC/LoongArch/Relocations sub-expr.s

[LoongArch] Generate more PCRel relocations for resolvable sub-symbols

Use PC-relative relocations when the sub-symbol offset can be resolved
during assembly, avoiding ADD/SUB relocation pairs.

Fixes #210052

Reviewers: SixWeining, MaskRay

Reviewed By: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/211754
DeltaFile
+18-37llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+5-0llvm/test/MC/LoongArch/Relocations/sub-expr.s
+23-372 files

LLVM/project 07ed472llvm/test/CodeGen/AArch64 vector-ldst-align-float.ll, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.960bit.ll amdgcn.bitcast.512bit.ll

rebase and squash #211756

Created using spr 1.3.7
DeltaFile
+59,115-57,981llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+17,286-3,454llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+13,787-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+8,038-8,233llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,936-6,017llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+9,921-0llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+114,083-82,54123,487 files not shown
+1,553,841-792,60323,493 files

FreeBSD/ports c7bb885databases/pgterm Makefile Makefile.crates

databases/pgterm: Update to 0.3.1
DeltaFile
+169-13databases/pgterm/distinfo
+83-5databases/pgterm/Makefile.crates
+1-2databases/pgterm/Makefile
+253-203 files

FreeBSD/ports 46b21e9databases/sq Makefile distinfo

databases/sq: Update to 0.55.0
DeltaFile
+7-7databases/sq/distinfo
+1-2databases/sq/Makefile
+8-92 files

FreeBSD/ports 5479f7adatabases/datui Makefile Makefile.crates

databases/datui: Update to 0.3.1
DeltaFile
+11-5databases/datui/distinfo
+4-1databases/datui/Makefile.crates
+1-2databases/datui/Makefile
+16-83 files

LLVM/project f309540llvm/test/CodeGen/AArch64 vector-ldst-align-float.ll, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.960bit.ll amdgcn.bitcast.512bit.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+59,115-57,981llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+17,286-3,454llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+13,787-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+8,038-8,233llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,936-6,017llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+9,921-0llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+114,083-82,54123,488 files not shown
+1,553,841-792,61023,494 files

NetBSD/pkgsrc iLBIfiadoc CHANGES-2026

   doc: Updated lang/janet to 1.42.1
VersionDeltaFile
1.6004+2-1doc/CHANGES-2026
+2-11 files