LLVM/project 588fa29llvm/lib/Transforms/Vectorize VPlanAnalysis.cpp

[VPlan] Fix cyclic phi type inference in early outer loop plans. (#196634)

For phis check if any of the operands are VPIRValues or we already have
cached types. If so, return them.

This fixes a verification stack overflow in the VPlan outer loop path
after https://github.com/llvm/llvm-project/pull/192868.
DeltaFile
+8-1llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+8-11 files

LLVM/project f1708dellvm/lib/Target/AMDGPU SIFrameLowering.cpp SIMachineFunctionInfo.h, llvm/test/CodeGen/AMDGPU amdgpu-spill-cfi-saved-regs.ll

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
DeltaFile
+2,998-0llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
+17-0llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-0llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+9-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+3,036-05 files

LLVM/project c56f481llvm/include/llvm/CodeGen MachineFunction.h, llvm/lib/CodeGen MachineFunction.cpp

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
DeltaFile
+67-67llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+30-0llvm/lib/MC/MCDwarf.cpp
+15-15llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+14-0llvm/lib/CodeGen/MachineFunction.cpp
+4-4llvm/test/CodeGen/AMDGPU/debug-frame.ll
+4-0llvm/include/llvm/CodeGen/MachineFunction.h
+134-865 files not shown
+145-9011 files

LLVM/project 4805dfcllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll gfx-callable-argument-types.ll

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+3,568-2,598llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,912-1,913llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+2,700-12llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+631-631llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+505-510llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+394-399llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+9,710-6,063108 files not shown
+14,825-9,527114 files

LLVM/project c53cc7cllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll

[AMDGPU] Use register pair for PC spill

Change-Id: Ibedeef926f7ff235a06de65a83087c151f66a416
DeltaFile
+4,331-4,331llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,742-1,740llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+1,562-1,560llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+1,462-1,460llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+1,238-1,236llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+1,030-1,028llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+11,365-11,35589 files not shown
+18,153-18,04495 files

LLVM/project fc8bebbllvm/test/CodeGen/AMDGPU accvgpr-spill-scc-clobber.mir pei-build-av-spill.mir

[AMDGPU] Implement CFI for non-kernel functions

This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.

Change-Id: I5e3a9a62cf9189245011a82a129790d813d49373
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+5,568-0llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,000-96llvm/test/CodeGen/AMDGPU/pei-build-av-spill.mir
+2,208-72llvm/test/CodeGen/AMDGPU/pei-build-spill.mir
+2,196-0llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+2,136-0llvm/test/CodeGen/AMDGPU/vgpr-spill-scc-clobber.mir
+1,671-1llvm/test/CodeGen/AMDGPU/debug-frame.ll
+16,779-16993 files not shown
+22,889-1,13299 files

LLVM/project 3aac4eallvm/lib/Target/AMDGPU SIFrameLowering.cpp, llvm/test/CodeGen/AMDGPU debug-frame.ll eliminate-frame-index-v-add-u32.mir

[AMDGPU] Emit entry function Dwarf CFI

Entry functions represent the end of unwinding, as they are the
outer-most frame. This implies they can only have a meaningful
definition for the CFA, which AMDGPU defines using a memory location
description with a literal private address space address. The return
address is set to undefined as a sentinel value to signal the end of
unwinding.

Change-Id: I21580f6a24f4869ba32939c9c6332506032cc654
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+1,405-0llvm/test/CodeGen/AMDGPU/debug-frame.ll
+204-12llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir
+134-6llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
+114-10llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir
+42-5llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+34-0llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir
+1,933-3322 files not shown
+2,044-5028 files

LLVM/project 819b479clang/lib/Driver/ToolChains Gnu.cpp, clang/test/Driver amdgpu-unwind.cl

[Clang] Default to async unwind tables for amdgcn

To avoid codegen changes when enabling debug-info (see
https://bugs.llvm.org/show_bug.cgi?id=37240) we want to
enable unwind tables by default.

There is some pessimization in post-prologepilog scheduling, and a
general solution to the problem of CFI_INSTRUCTION-as-scheduling-barrier
should be explored.

Change-Id: I83625875966928c7c4411cd7b95174dc58bda25a
DeltaFile
+26-0clang/test/Driver/amdgpu-unwind.cl
+1-0clang/lib/Driver/ToolChains/Gnu.cpp
+27-02 files

LLVM/project 0236ad5mlir/lib/Pass IRPrinting.cpp

[mlir][core] Restore dropped printIR behavior. (#196628)

Restore checking for module scope which is dropped in #195198
DeltaFile
+5-0mlir/lib/Pass/IRPrinting.cpp
+5-01 files

FreeNAS/freenas 6bbecf7tests/api2 test_300_nfs.py, tests/protocols pynfs_proto.py

Address review:

* Validate we bclone when using OP_CLONE
* Remove unnecessary op.getfh

(cherry picked from commit e48c858fb527d29c8745b963a7d00f192337161e)
DeltaFile
+72-0tests/sharing_protocols/nfs/test_nfs_server_side_copy.py
+28-20tests/protocols/pynfs_proto.py
+11-5tests/sharing_protocols/nfs/test_nfs_xattr.py
+6-2tests/sharing_protocols/nfs/test_nfs_acl.py
+0-6tests/api2/test_300_nfs.py
+117-335 files

FreeNAS/freenas ca735b7tests/protocols pynfs_proto.py, tests/sharing_protocols/nfs test_nfs_server_side_copy.py

Fix ruff complaints

(cherry picked from commit 972f9b5d259c227137cb2c5ec796b393db9b725e)
DeltaFile
+10-5tests/sharing_protocols/nfs/test_nfs_server_side_copy.py
+3-2tests/protocols/pynfs_proto.py
+13-72 files

FreeNAS/freenas 37fe76etests/protocols pynfs_proto.py, tests/sharing_protocols/nfs test_nfs_dacl_readdir.py test_nfs_acl.py

Expand sharing protocol tests for NFS

This commit converts some NFS tests into using lower-level
pynfs library to explicitly test server behavior and expands
test coverage for readdir operations.

Originally tests were executed via the linux NFS client which
was extremely limiting in how we can exercise server in a
fine-grained manner.

(cherry picked from commit b7d93a78a95c85f3c943f9fcb73054d1c4812b30)
DeltaFile
+835-0tests/protocols/pynfs_proto.py
+658-0tests/sharing_protocols/nfs/test_nfs_dacl_readdir.py
+471-109tests/sharing_protocols/nfs/test_nfs_acl.py
+355-0tests/sharing_protocols/nfs/test_nfs_dacl_posix_backing.py
+293-28tests/sharing_protocols/nfs/test_nfs_xattr.py
+90-0tests/sharing_protocols/nfs/conftest.py
+2,702-1374 files not shown
+2,816-19910 files

FreeNAS/freenas 10417e3tests/api2 test_300_nfs.py, tests/protocols pynfs_proto.py

NAS-140934 / 27.0.0-BETA.1 / Expand sharing protocol tests for NFS (#18912)

This commit converts some NFS tests into using lower-level pynfs library
to explicitly test server behavior and expands test coverage for readdir
operations.

Originally tests were executed via the linux NFS client which was
extremely limiting in how we can exercise server in a fine-grained
manner. This had the practical impact that a bug in an ACL-related
server response for non-Linux clients was undetected ( where READDIR
also requests NFS4.1 DACL -- linux never does this).
DeltaFile
+844-0tests/protocols/pynfs_proto.py
+658-0tests/sharing_protocols/nfs/test_nfs_dacl_readdir.py
+475-109tests/sharing_protocols/nfs/test_nfs_acl.py
+355-0tests/sharing_protocols/nfs/test_nfs_dacl_posix_backing.py
+299-28tests/sharing_protocols/nfs/test_nfs_xattr.py
+51-39tests/api2/test_300_nfs.py
+2,682-1765 files not shown
+2,911-20411 files

LLVM/project 7175d46flang/test/Driver intrinsic-module-path_per_target.f90

Specify target triple
DeltaFile
+8-8flang/test/Driver/intrinsic-module-path_per_target.f90
+8-81 files

LLVM/project 0a2f943libcxx/include/__utility pair.h

[libc++] Remove _LIBCPP_HIDE_FROM_ABI from <__utility/pair.h> (#196508)

This is a follow-up to #193045. This only drops `_LIBCPP_HIDE_FROM_ABI`
in a small part of the code base to make sure everything works as
expected. Once this has been in trunk for a while and there aren't any
problems, there will be larger follow-up patches to remove
`_LIBCPP_HIDE_FROM_ABI` throughout the code base.
DeltaFile
+77-97libcxx/include/__utility/pair.h
+77-971 files

FreeNAS/freenas 972f9b5tests/protocols pynfs_proto.py, tests/sharing_protocols/nfs test_nfs_server_side_copy.py

Fix ruff complaints
DeltaFile
+10-5tests/sharing_protocols/nfs/test_nfs_server_side_copy.py
+3-2tests/protocols/pynfs_proto.py
+13-72 files

LLVM/project 9dae222llvm/lib/ABI FunctionInfo.cpp

shorten comment

Created using spr 1.3.7
DeltaFile
+2-3llvm/lib/ABI/FunctionInfo.cpp
+2-31 files

LLVM/project 1ae2255clang/include/clang/DependencyScanning DependencyScannerImpl.h, clang/lib/DependencyScanning DependencyScannerImpl.cpp ModuleDepCollector.cpp

[clang][deps] Use `ModuleDepCollector` for Make output (#182063)

The dependency scanner works significantly differently depending on what
kind of output it's asked to produce. The Make output format has been
using the regular Clang dependency collection mechanism since it was
first implemented. This means the implementation works very differently
to the rest of the scanner and isn't able to turn implicit module
command lines into Makefiles using explicit modules.

This PR unifies the two implementations, using `ModuleDepCollector` even
for Make output. Emitting explicit module builds into Makefiles will
come in a later PR.
DeltaFile
+11-49clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+20-10clang/lib/Tooling/DependencyScanningTool.cpp
+6-4clang/unittests/Tooling/DependencyScannerTest.cpp
+7-0clang/lib/DependencyScanning/ModuleDepCollector.cpp
+3-4clang/include/clang/DependencyScanning/DependencyScannerImpl.h
+2-2clang/tools/clang-scan-deps/ClangScanDeps.cpp
+49-694 files not shown
+56-7110 files

LLVM/project 300c7b0llvm/lib/ABI FunctionInfo.cpp

address review comments: relocate comment to FunctionInfo::create()

Created using spr 1.3.7
DeltaFile
+3-0llvm/lib/ABI/FunctionInfo.cpp
+3-01 files

LLVM/project 9414ed7llvm/include/llvm/Transforms/Vectorize LoopVectorize.h, llvm/lib/Transforms/Vectorize LoopVectorize.cpp LoopVectorizationPlanner.cpp

Revert "[VPlan] Unify inner and outer loop paths (NFCI). (#192868)"

This reverts commit b84f58ee844ca929db2fff2e41e2195e255548b8.
DeltaFile
+246-108llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+0-48llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
+27-15llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+21-8llvm/lib/Transforms/Vectorize/VPlan.cpp
+3-6llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
+0-4llvm/lib/Transforms/Vectorize/VPlan.h
+297-1894 files not shown
+300-19510 files

LLVM/project cd1ed45llvm/utils/gn/secondary/lldb/include/lldb/Host BUILD.gn

[gn] port 7e74c78ea342 (#196624)
DeltaFile
+1-0llvm/utils/gn/secondary/lldb/include/lldb/Host/BUILD.gn
+1-01 files

LLVM/project f6c2acbllvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/test/MC/AMDGPU literals.s

[AMDGPU] Validate forced lit() immediate

Right now it takes validation path of an inline constant if fits
even though it is forced to literal encoding.
DeltaFile
+7-1llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+2-2llvm/test/MC/AMDGPU/literals.s
+9-32 files

LLVM/project 792610ellvm/utils/gn/secondary/clang/unittests/DependencyScanning BUILD.gn

[gn build] Port ebb9a79cd370 (#196622)
DeltaFile
+4-1llvm/utils/gn/secondary/clang/unittests/DependencyScanning/BUILD.gn
+4-11 files

LLVM/project e9a914allvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU BUILD.gn

[gn build] Port e6efa1a4c9f6 (#196621)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/unittests/Target/AMDGPU/BUILD.gn
+1-01 files

LLVM/project c26716fllvm/utils/gn/secondary/llvm/lib/Transforms/IPO BUILD.gn

[gn build] Port c507e2024c9a (#196620)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Transforms/IPO/BUILD.gn
+1-01 files

LLVM/project 62efd9dllvm/utils/gn/secondary/lldb/source/Target BUILD.gn

[gn build] Port 3fe311f215d0 (#196619)
DeltaFile
+1-0llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
+1-01 files

LLVM/project 1ab839dllvm/utils/gn/secondary/libcxx/include BUILD.gn

[gn] port 2e2d90b98661 (#196618)
DeltaFile
+1-0llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+1-01 files

FreeBSD/src 9432351sys/arm/include _types.h, sys/arm64/include _types.h

types: provide __SIZEOF_{INT{8,16,32,64},TIME,TIME32}_T

Suggested by:   kib
Reviewed by:    imp, kib
Discussed with: emaste, jrtc27
Differential Revision:  https://reviews.freebsd.org/D56783
DeltaFile
+5-0sys/sys/_types.h
+2-0sys/x86/include/_types.h
+2-0sys/sys/abi_types.h
+1-0sys/riscv/include/_types.h
+1-0sys/arm64/include/_types.h
+1-0sys/arm/include/_types.h
+12-01 files not shown
+13-07 files

FreeBSD/src 324d53csys/sys time.h

sys/time: rework saturation ifdef to avoid direct arch ref

Suggested by:   kib
Reviewed by:    imp, kib
Differential Revision:  https://reviews.freebsd.org/D56401
DeltaFile
+2-2sys/sys/time.h
+2-21 files

LLVM/project b84f58ellvm/include/llvm/Transforms/Vectorize LoopVectorize.h, llvm/lib/Transforms/Vectorize LoopVectorize.cpp LoopVectorizationPlanner.cpp

[VPlan] Unify inner and outer loop paths (NFCI). (#192868)

Move combine the logic of tryToBuildVPlanWithVPRecipes and
tryToBuildVPlan, as well as planInVPlanNativePath and plan.

This unifies the code paths to construct plans for both inner and outer
loop vectorization, and removes some duplication. It also ensures we run
almost the same VPlan-transformations in both modes. Currently a few
code paths need to be guarded with a check if we are dealing with an
inner and outer loop.

PR: https://github.com/llvm/llvm-project/pull/192868
DeltaFile
+108-246llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+48-0llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
+15-27llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+8-21llvm/lib/Transforms/Vectorize/VPlan.cpp
+6-3llvm/include/llvm/Transforms/Vectorize/LoopVectorize.h
+4-0llvm/lib/Transforms/Vectorize/VPlan.h
+189-2974 files not shown
+195-30010 files