[PowerPC] No splat loads on multi-use through bitcast (#231147)
When lowering a vector shuffle of a load to a splatting load, we look
through bitcasts and scalar_to_vector on the input. We then check that
the input load has a single use. However, it is also important to check
that the bitcast/scalar_to_vector has a single use as a second use will
prevent the removal of the load. What's even worse than the performance
issue is that the old load will no longer be chained to what it was
chained to previously, allowing it to be moved across possible aliased
stores.
Fixes: https://github.com/llvm/llvm-project/issues/230422
[BOLT] Pass the context's MCTargetOptions to createMCAsmBackend (#236594)
## Summary
Previously BOLT passed a temporary MCTargetOptions when creating the
MCAsmBackend. The backend outlives the statement that creates it, but
the temporary is destroyed at the end of that statement. If future code
reads the stored reference (RISC-V keeps it), the reference is dangling
and the behaviour is undefined.
The llvm/llvm-project#194200 change made MCAsmInfo hold a reference to a
function-local static MCTargetOptions in createBinaryContext, so the
options outlive MCAsmInfo.
* Use the context's existing long-lived MCTargetOptions at the
createMCAsmBackend call sites as well, so they outlive the MCAsmBackend.
Also remove a backend in DWARFRewriter.cpp that was created but never
used.
[12 lines not shown]
[flang] Cache in flang-licm which locations a loop may modify
Hoisting a load asks the alias analysis whether the loop may modify each
location the load reads, and the answer depends only on the loop and the
location. The loads of a loop read the same few locations over and over, so
flang-licm asked the same question many times: on a large OpenACC region 97%
of the queries of a run repeated an earlier one, and with alias analysis
implementations that are expensive to query the pass took minutes.
Cache the answers of a run, keyed by the loop and the location, in a small
LoopModifiesLocationCache that the pass owns. It is valid for the whole run
because the pass only hoists operations that have no effects or only read: it
never moves a write, so a location that is not modified in a loop does not
become modified in it. Only whether the location may be modified is used, as
before.
-debug-only=flang-licm-cache prints, for each run, how many queries were
answered from the cache and how many asked the alias analysis.
[VPlan] Support tail folding uncountable early exits
After #237254, the MaskedHandleExitInVectorLoop early exit style uses the CFG to handle masking for early exit loops. This allows it to compose with tail folding which is also handled via the CFG in #176143.
The main thing we need to update is just to make sure the combined early exit condition is false on the lanes past the header mask.
This PR only enables tail folding for early exit loops with no side effects. Side effects will be enabled in the next PR. data-and-control-flow tail folding styles are also not handled in this PR.
[Inliner] Change CalleeTTI -> CallerTTI
It makes more sense to use the caller's TTI, as this way we can query
whether the instruction can be inlined into the parent function, using
state described by the caller's TTI.
For example, for AArch64 SME where a function can be in a different mode
(streaming/non-streaming), the cost-model gives different answers based
on the TTI used.
For now, we don't expect to see any changes in behaviour as there are
currently no targets where it makes different cost/inlining-decisions
based on which TTI is used.
devel/subversion: fix svnserve rc.d status/stop when SVNSERVE_WRAPPER is on
When SVNSERVE_WRAPPER is enabled (now the default), bin/svnserve is
the umask-setting wrapper, which execs straight into bin/svnserve.bin
-- same PID, but the running process image is svnserve.bin, not
svnserve. rc.subr's run_rc_command built-ins (status, stop, restart,
poll) match running processes against procname, defaulting to
command's basename when procname is unset; since command is still the
wrapper path, every one of those built-ins fails to find the actually
running daemon ("svnserve is not running" even while it is).
Set procname explicitly to the real binary path, swapping in .bin via
a new SUB_LIST token when the wrapper is active, same pattern already
used for BINS_TO_STRIP.
Co-Authored-By: Claude Sonnet 5 <noreply at anthropic.com>
Reported by: vvd
[mlir][vector][contract] Add comments and rename helper hooks (NFC) (#237708)
* Renames `getDimMap` to `getDimPairForIterTy` to make its purpose
clearer.
* Adds a `ContractionOp` argument to the updated helpers to make it
explicit that they only apply to that op.
* Reduces code duplication.
[NFC][analyzer] Unify allocated states in MallocChecker (#236725)
Among the possible states of memory regions tracked by `MallocChecker`,
the `Allocated` and `AllocatedOfSizeZero` states were very similar, so
the expression `State.isAllocated() || State.isAllocatedOfSizeZero()`
was repeated many times in the codebase.
To make the code more readable, I renamed the `Allocated` enum value to
`AllocatedOfAnySize` and redefined `RefState::isAllocated()` to return
true for either of the two allocated states.
With this we can write `State.isAllocated()` instead of the old and
cumbersome `State.isAllocated() || State.isAllocatedOfSizeZero()`.
net/freeradius: restore Eap model import in API controller (#5861)
Restore the import removed in 7f3cbdc448ce to fix model
resolution in the EAP API GET and POST actions.
[UpdateTestChecks] Add support for (RE)DEFINE directives (#237599)
NOTE: This will be useful if we eventually want to auto-generate e.g.
CIR tests (which currently rely on this).
[lldb] Assemble scalar DW_OP_bit_piece fragments into composites (#219383)
`DW_OP_bit_piece` currently extracts a scalar fragment in place but
leaves the source on the expression stack and never appends the fragment
to the composite piece buffer. Evaluation consequently returns the
remaining scalar instead of the assembled composite value.
Track the composite offset in bits and append eagerly materialized
pieces at bit granularity. Scalar `DW_OP_bit_piece` operations now
consume their source and contribute the extracted range to the composite
buffer, including consecutive non-byte-sized pieces and mixed
`DW_OP_piece`/`DW_OP_bit_piece` expressions.
Unit tests cover source offsets, zero extension, little- and big-endian
packing, mixed byte/bit pieces, and oversized source offsets. Empty and
address-source bit pieces retain their existing behavior and remain
outside this focused fix.
Fixes #209093
atto(1): fatal cannot take special format string arguments other than
the initial %s for the program name. Gain some safety by not having
callers pass a format string in the first place.
With this, we can raise WARNS to 5.
[offload][AMDGPU] Properly scan for available SDMA engines (#237744)
Two reasons:
(1) satisfy the documented API requirements of
hsa_amd_memory_async_copy_on_engine which say that the "client should
use hsa_amd_memory_copy_engine_status first to get the ID availability"
(2) work around device-dependent restrictions: the ROCr sources say that
"due to a RAS issue, GFX90a can only support H2D copies on SDMA0"
This patch was hand-manufactured using Neovim.
---------
Co-authored-by: Joseph Huber <huberjn at outlook.com>
[CIR] Split offload printf lowering by target (NFC) (#237227)
Move the NVPTX and AMDGPU lowerings of cir.offload.printf into
LowerToLLVMOffloadPrintfNVPTX.cpp and
LowerToLLVMOffloadPrintfAMDGPU.cpp. LowerToLLVMOffloadPrintf.cpp keeps
the pattern, which picks the lowering for the target, and
LowerToLLVMOffloadPrintf.h declares the entry point of each.
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
