LLVM/project 69c38bellvm/lib/ProfileData ETMTraceDecoder.cpp CMakeLists.txt, llvm/test/tools/llvm-profgen etm-arch.test

Reapply "Reland "[llvm-profgen] Add support for ETM trace decoding"" … (#194730)

…(#194695)

This relands the original commit
e3bd61890e68303a33fdd33fbdd9abeda1037450 (#191584).

The original change was reverted in the following commits:

1) ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b (#194087) 
2) c26ae41c8765fdd073c71061f21a83a161598901 (#194695)

This reland incorporates the following fixes:

1) Change LLVM_ENABLE_OPENCSD to default to OFF (opt-in).

2) Parse the OpenCSD version from ocsd_if_version.h and gate OpenCSD
support on a minimum version of 1.5.4 to avoid compilation errors.


    [2 lines not shown]
DeltaFile
+251-0llvm/lib/ProfileData/ETMTraceDecoder.cpp
+71-36llvm/tools/llvm-profgen/llvm-profgen.cpp
+72-17llvm/tools/llvm-profgen/PerfReader.cpp
+81-0llvm/test/tools/llvm-profgen/etm-arch.test
+57-0llvm/lib/ProfileData/CMakeLists.txt
+48-0llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
+580-5310 files not shown
+703-7216 files

LLVM/project 3cab3bcllvm/lib/Target/WebAssembly WebAssemblyCFGStackify.cpp

[WebAssembly] Fix -Wunused-function (#194776)

After 4aee20b8caa9b8477aef94d10c37b2f00805de07, getBBName is only used
within an assertion so mark it [[maybe_unused]] so it does not cause a
-Wunused-function warning in non-asserts builds.
DeltaFile
+1-1llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+1-11 files

LLVM/project a6187c0.github/workflows prune-branches.yml

[Github] Disable prune-unused-branches workflow (#194773)

It decided to delete 237 branches today which is probably not correct
and at least one of them was tied to an open PR which is definitely not
correct, so disable for now until we can investigate fully.
DeltaFile
+0-2.github/workflows/prune-branches.yml
+0-21 files

LLVM/project c6a3c37clang/lib/Interpreter IncrementalExecutor.cpp, llvm/include/llvm/ExecutionEngine/Orc LLJIT.h EPCGenericJITLinkMemoryManager.h

[ORC] Move JITLinkMemoryManager ownership out of ExecutorProcessControl. (#192665)

Removes the JITLinkMemoryManager pointer and getMemMgr() accessor from
ExecutorProcessControl, replacing them with a
createDefaultMemoryManager() virtual factory method. This follows the
same decoupling pattern applied to DylibManager and MemoryAccess in
earlier patches.

JITLinkMemoryManager ownership moves to the client:
- LLJIT gains a MemMgr member and a MemoryManagerCreator builder hook.
- EPCIndirectionUtils takes a JITLinkMemoryManager& parameter.
- LinkGraphLinkingLayer and ObjectLinkingLayer lose their no-arg
constructors (MemMgr is now required).
- SimpleRemoteEPC::Setup is removed; custom memory manager selection now
happens at the client level rather than during EPC setup.
DeltaFile
+34-31llvm/tools/llvm-jitlink/llvm-jitlink.cpp
+17-28clang/lib/Interpreter/IncrementalExecutor.cpp
+21-22llvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
+24-0llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
+11-13llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
+5-17llvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
+112-11123 files not shown
+255-20529 files

LLVM/project bf51625llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lsx/ir-instruction fptrunc.ll

avoid regression
DeltaFile
+20-7llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+4-8llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
+24-152 files

LLVM/project 29de6c9llvm/test/CodeGen/LoongArch/lsx/ir-instruction fptrunc.ll

update tests
DeltaFile
+8-4llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
+8-41 files

LLVM/project 7594924llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll shuffle-as-xvshuf.ll

fix
DeltaFile
+6-3llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
+4-4llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+4-4llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+4-2llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
+3-3llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
+2-2llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+23-186 files

LLVM/project b69daf8llvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll shuffle-as-xvshuf.ll

[LoongArch] Custom legalize vector_shuffle to `[x]vpermi.w`
DeltaFile
+118-14llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-7llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+3-7llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+2-8llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
+7-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+136-422 files not shown
+144-468 files

LLVM/project 4e05294llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll, llvm/test/CodeGen/LoongArch/lsx/ir-instruction shuffle-as-vpermi.ll

[LoongArch][NFC] Pre-commit tests for `[x]vpermi.w` (#164944)
DeltaFile
+41-0llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+41-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+82-02 files

FreeBSD/src 454322clib/libifconfig libifconfig_bridge.c

libifconfig: Skip bridge VLAN config for span members

bridge(4) doesn't support BRDGGIFVLANSET for span members, which
means if a span interface is configured, libifconfig will fail to
fetch bridge members.  Skip this for IFBIF_SPAN members.

PR:     292634
MFC after:      3 days
Reported by:    Emrion <kmachine at free.fr>
Reviewed by:    pouria, zlei
Sponsored by:   https://www.patreon.com/bsdivy
Differential Revision:  https://reviews.freebsd.org/D56694
DeltaFile
+5-0lib/libifconfig/libifconfig_bridge.c
+5-01 files

LLVM/project f2cb2a1utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Update WebAssemblyGenGlobalISel.inc -gisel-extended-llt (#194768)

Fixup for #193047
DeltaFile
+4-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-11 files

LLVM/project 478db95llvm/test/CodeGen/AArch64/Atomics aarch64-atomicrmw-rcpc.ll aarch64-atomicrmw-lse2.ll, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

New approach

Created using spr 1.3.6-beta.1
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+3,230-456llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
+14,911-8,5332,821 files not shown
+114,962-49,1242,827 files

FreeBSD/ports f1872dbnews/inn Makefile pkg-plist, news/inn-current pkg-plist Makefile

news/inn{-current}: Modernize the port

Update to modern ports practices while retaining same functionality.

- Option helpers
- GNU_CONFIGURE with overrides for existing filesystem layout
- USES gssapi for krb5, clean up ac_cv_ hacks
- Fix setuid for SETGID_INEWS and UUCP_RNEWS
- Add newer config files as @sample: inn-radius.conf, inn-secrets.conf
- Install all filter scripts as @sample
- Remove ex script and install empty history as @sample
- Use find to run bin/.so strip list instead of manual list
- Clean up inn-current slave port
- portclippy
DeltaFile
+142-180news/inn/Makefile
+18-90news/inn/files/pkg-install.in
+18-16news/inn-current/pkg-plist
+18-16news/inn/pkg-plist
+9-11news/inn-current/Makefile
+205-3135 files

FreeBSD/ports e6ca093news/cleanfeed Makefile pkg-install

news/cleanfeed: Clean up the port

- Use plist to handle ownerships and installation to filter_innd.pl
- Install bad_ files as sample so the admin can edit them
DeltaFile
+17-20news/cleanfeed/Makefile
+0-26news/cleanfeed/pkg-install
+15-10news/cleanfeed/pkg-plist
+32-563 files

LLVM/project 740e3a0llvm/test/CodeGen/AArch64/Atomics aarch64-atomicrmw-lse2.ll aarch64-atomicrmw-rcpc3.ll, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

Merge branch 'main' into users/zhaoqi5/test-vpermiw
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+3,230-456llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
+14,911-8,5333,247 files not shown
+129,959-53,8373,253 files

LLVM/project 0e3c4c4utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Update WebAssemblyGenGlobalISel.inc -gisel-extended-llt

Fixup for #193047
DeltaFile
+4-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-11 files

FreeBSD/ports 58300d1x11/py-nwg-displays Makefile distinfo

x11/py-nwg-displays: Update to 0.4.0

While here, switch to USE_PYTHON=pep517.

Changelog: https://github.com/nwg-piotr/nwg-displays/releases/tag/v0.4.0

Reported by:    GitHub (watch releases)
DeltaFile
+4-2x11/py-nwg-displays/Makefile
+3-3x11/py-nwg-displays/distinfo
+7-52 files

FreeBSD/ports 7026b24x11/hyprlauncher distinfo Makefile, x11/hyprlauncher/files patch-src_config_ConfigManager.cpp patch-src_finders_desktop_DesktopFinder.cpp

x11/hyprlauncher: Update to 0.1.6

While here, remove upstreamed patches.

Changelog: https://github.com/hyprwm/hyprlauncher/releases/tag/v0.1.6

Reported by:    GitHub (watch releases)
DeltaFile
+0-11x11/hyprlauncher/files/patch-src_config_ConfigManager.cpp
+0-10x11/hyprlauncher/files/patch-src_finders_desktop_DesktopFinder.cpp
+3-3x11/hyprlauncher/distinfo
+1-2x11/hyprlauncher/Makefile
+4-264 files

LLVM/project 8e9fc75clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_subp.c, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

dynamic version

Created using spr 1.3.8-beta.1
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,509-924mlir/utils/vscode/package-lock.json
+1,779-131llvm/test/CodeGen/SystemZ/memset-08.ll
+970-0llvm/test/CodeGen/SystemZ/memmove-01.ll
+928-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_subp.c
+13,117-5,2171,757 files not shown
+62,781-22,0421,763 files

LLVM/project 9e4748eclang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow connected_units_by_ret.cpp disconnected_units.cpp

[SSAF][UnsafeBufferReachableAnalysis] add end-to-end testing
DeltaFile
+183-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_ret.cpp
+138-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/disconnected_units.cpp
+117-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_calls.cpp
+111-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_global.cpp
+83-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_class_and_clients.cpp
+632-05 files

LLVM/project 8419579clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis SourcePassAnalysis.h, clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis WPASuite.h

[SSAF] Add UnsafeBufferReachableDebugAnalysis--a source pass analysis

Also added temporary workaround for LUNamespace and Entity linkage info
DeltaFile
+103-1clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+26-0clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
+5-1clang/test/Analysis/Scalable/help.cpp
+5-0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
+4-1clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.cpp
+2-0clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis/SourcePassAnalysis.h
+145-318 files not shown
+164-324 files

LLVM/project e555021orc-rt/unittests SimpleNativeMemoryMapSPSCITest.cpp

[orc-rt] Remove explicit addSimpleNativeMemoryMap call. NFCI. (#194766)

The SimpleNativeMemoryMap::Create call two lines below will add this
interface anyway, so the explicit call is redundant.
DeltaFile
+0-1orc-rt/unittests/SimpleNativeMemoryMapSPSCITest.cpp
+0-11 files

LLVM/project 8da581dclang/lib/CodeGen CGException.cpp CGDecl.cpp, clang/test/CodeGenCXX exceptions-seh.cpp

[WinEH] Diagnose SEH object unwinding in skipped __except bodies (#187718)

When an SEH __except block has no EH branches, CodeGen skips emitting the handler
body. This also skipped the existing diagnostic for local variables that require destruction
under C++ exceptions

Diagnose those variables before dropping the skipped handler body, and add coverage
for both sync and async exception modes
DeltaFile
+11-14clang/test/CodeGenCXX/exceptions-seh.cpp
+11-0clang/lib/CodeGen/CGException.cpp
+0-2clang/lib/CodeGen/CGDecl.cpp
+22-163 files

LLVM/project c7e805cclang/include/clang/Frontend FrontendOptions.h, clang/include/clang/Options Options.td

[SSAF] Add CLI option for SourcePassAnalysis
DeltaFile
+78-0clang/lib/ScalableStaticAnalysisFramework/Frontend/SourcePassAnalysisFrontendAction.cpp
+33-0clang/include/clang/ScalableStaticAnalysisFramework/Frontend/SourcePassAnalysisFrontendAction.h
+14-0clang/include/clang/Options/Options.td
+6-0clang/include/clang/Frontend/FrontendOptions.h
+4-0clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
+1-0clang/lib/ScalableStaticAnalysisFramework/Frontend/CMakeLists.txt
+136-06 files

GhostBSD/ghostbsd 3a8717crelease/packages/ucl ghostbsd-cert-all.ucl, stand/defaults loader.conf.5 loader.conf

Merge pull request #385 from ghostbsd/ghostbsd/issues#312

loader: add hidden boot menu option and fix verbose/mute interaction
DeltaFile
+51-8stand/lua/menu.lua
+23-18stand/lua/gfx-glogo.lua
+14-0release/packages/ucl/ghostbsd-cert-all.ucl
+11-0stand/defaults/loader.conf.5
+2-1stand/defaults/loader.conf
+1-1sys/conf/package-version
+102-283 files not shown
+105-309 files

LLVM/project 3ac2a32llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-fp-setcc.ll fixed-vectors-setcc-fp-vp.ll

Merge branch 'fix-blockfreq-unroll-unconditional-latches--fast' into fix-blockfreq-unroll-unconditional-latches--uniform
DeltaFile
+4,811-4,818llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+326-4,626llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
+1,872-1,883llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+3,230-456llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
+565-2,727llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
+1,117-1,613llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
+11,921-16,1234,339 files not shown
+191,359-100,5894,345 files

NetBSD/src Mwk0qcOsys/arch/amiga/include param.h, sys/arch/atari/include param.h

   No need for N copies of NPTEPG; two is just fine, thanks.
VersionDeltaFile
1.19+1-3sys/arch/news68k/include/param.h
1.15+3-1sys/arch/m68k/include/pmap_68k.h
1.37+1-3sys/arch/atari/include/param.h
1.52+1-3sys/arch/amiga/include/param.h
1.15+1-3sys/arch/next68k/include/param.h
1.55+1-3sys/arch/hp300/include/param.h
+8-168 files not shown
+18-3714 files

LLVM/project 1c55073clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_subp.c, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

rebase

Created using spr 1.3.8-beta.1
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,509-924mlir/utils/vscode/package-lock.json
+1,779-131llvm/test/CodeGen/SystemZ/memset-08.ll
+970-0llvm/test/CodeGen/SystemZ/memmove-01.ll
+928-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_subp.c
+13,117-5,2171,756 files not shown
+62,768-22,0411,762 files

LLVM/project 385f862llvm/utils/TableGen AsmMatcherEmitter.cpp

[TableGen] Fix indentation of generated code. NFC

This line was missing the indent(4) call. Noticed while looking at the
generated code.

Pull Request: https://github.com/llvm/llvm-project/pull/194765
DeltaFile
+2-1llvm/utils/TableGen/AsmMatcherEmitter.cpp
+2-11 files

LLVM/project 81545fallvm/lib/TargetParser TargetDataLayout.cpp, llvm/test/CodeGen/RISCV/rvy datalayout.ll

[RISC-V][RVY] Add a DataLayout component for CHERI capabilities

This adds a new pointer address space to the data layout when RVY is
enabled, making use of the new 'e' flag for pointers with
[external state](https://github.com/llvm/llvm-project/pull/105735).
I chose address space 200 since that is what has been used in the
downstream CHERI forks for the past decade and therefore makes it slightly
easier to upstream tests, etc. but am happy to use any other value if that
is preferred. We can look at the ABI name parameter to detect
pure-capability ABIs, so this does not support the "hybrid" CHERI case that
is supported downstream where capability registers are supported (i.e.
the AS200 pointer attributes exist in the data layout), but the default
address spaces are still integers instead of AS200.
to handle the "hybrid" case where only some pointers use Y registers.

Reviewed By: topperc, lenary

Pull Request: https://github.com/llvm/llvm-project/pull/177249
DeltaFile
+18-7llvm/lib/TargetParser/TargetDataLayout.cpp
+15-0llvm/test/CodeGen/RISCV/rvy/datalayout.ll
+33-72 files