[AMDGPU] Define gfx1310 target with ELF number 0x50 (#177355)
For now this is identical to gfx1250.
---------
Co-authored-by: Jay Foad <jay.foad at amd.com>
[SPIRV] Process indirect function calls immediately (#177222)
The SPIR-V backend processes indirect function calls in
`SPIRVCallLowering`, which is a subclass of the generic `CallLowering`.
It intends to process them function by function, by first collecting all
indirect calls in a function, and then processing all of a function's
indirect calls at once when the call lowering for the function is about
to end.
Today, it relies on the `lowerReturn` virtual function to be called by
the generic call lowering infra to know the function processing is about
to end, and at that time it processes all of the collected indirect
calls and clears the vector of indirect calls.
The problem is that not all functions have return instructions. Every
basic block must have a terminator instruction, but it does
[not](https://llvm.org/docs/LangRef.html#terminator-instructions) have
to be a return.
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[AArch64] Optimize memcpy for non-power of two sizes (#168890)
The previous getMemcpyLoadsAndStores implementation would chain
load/store instructions from "NumLdStInMemcpy - GlueIter -
GluedLdStLimit" to "NumLdStInMemcpy - GlueIter". This approach caused
issues when copying non-power-of-two sizes, as it would chain leading
load/stores with subsequent instructions at non-power-of-two aligned
offsets.
This chaining pattern prevented optimal optimizations in
aarch64-ldst-opt pass for these load/store instructions.
This commit modifies the chaining range to be from GlueIter to GlueIter
+ GluedLdStLimit, enabling proper optimization of load/store
instructions in aarch64-ldst-opt.
Closes https://github.com/llvm/llvm-project/issues/165947
[APINotes] Support overloaded operators
This adds support for annotating C++ operators via API Notes. For instance:
```
Tags:
- Name: MyTag
Methods:
- Name: operator+
Availability: none
```
rdar://148534260
[flang] Allow missing space in some free-form keywords (#177254)
When asked to emit warnings about missing spaces in free form source
code, flang-new is emitting some warnings in cases when the space is an
optional one between keywords. Use the existing token matching
capability that allows these ("END " with a trailing blank), add a test
for all cases in Table 6.2, and fix a couple other bogus warning exposed
by compiling that test with -pedantic.
Fixes https://github.com/llvm/llvm-project/issues/177098.
[flang] Improve error message for polymorphic implicit interface (#177225)
PROCEDURE(CLASS(...)) specifies a procedure with an implicit interface
whose result is polymorphic. That turns out to never be a valid
declaration, since a CLASS(...) function result is required to also be
POINTER or ALLOCATABLE, both of which require the presence of an
explicit interface. We caught this error already, but the message should
be improved for procedures.
Fixes https://github.com/llvm/llvm-project/issues/176861.
[flang] Allow multiple identical DATA initializations (#177063)
ISO Fortran disallows DATA statements from affecting the same bit of
memory more than once; however, all (but one) other compilers allow this
usage. They differ, however, in the case of multiple distinct
initializations -- some compilers take the "last" value in source order,
some don't.
This patch accepts multiple identical DATA initializations, which is
portable usage that appears in code, and emits an optional warning. It
continues to detect and report multiple distinct DATA initializations,
since they are not portable.
[AArch64] Add register check to ConditionOptimizer cross-block logic (#176528)
This patch adds a missing guard to the AArch64 ConditionOptimizer pass
Previously, the cross-block optimization would not check for register
equivalence before modifying the two comparison instructions.
This means that two cmp instructions with suitable cond codes and
immediates would be modified, even if their registers were different,
which would not trigger CSE afterwards. This doesn't affect correctness
but is unhelpful.
A negative ll test and mir tests has also been added to confirm this
fix.
*: Add missing BOOTSTRAP_PKG=yes where required.
These packages are definitely part of bootstrap. Avoids issue in bulk builds
where an older version of the package may be provided by the bootstrap kit and
the pkg_add test will fail, causing a build failure. pkg_add does not exit
with an error if the versions happen to be identical, which is likely why this
hasn't been noticed until now.
[clang][modules] Read PCM validation timestamp earlier (#177062)
When building a module, the PCM file is always written first and then
the validation timestamp gets created. Clang needs to first read the
validation timestamp and only then read the PCM file. Otherwise, it
could read an out-of-date PCM file and then read the validation
timestamp for its new up-to-date version. This would erroneously skip
validation with `-fmodules-validate-once-per-build-session`. I'm not
concerned about multiple Clang instances seeing different filesystem
contents from each other within a single build session, since that would
break the assumption `-fmodules-validate-once-per-build-session` relies
on.
print/qpdf: Update to 12.3.1
Changelog:
12.3.1: January 19, 2026
Bug fixes
Fix failure of QPDFJob::run and QPDFJob::createQPDF when called
with a copy of a destroyed QPDFJob object. This affects using
the job interface from pikepdf.
[RISCV] Add sub_128 SubRegIndex. Use if for FPR256. (#176986)
Instead of branching FPR256 from FPR32, branch it from FPR128. The
hardware that supports FPR256 doesn't have D or Q, but I assume if it
did, the FPR64/FPR128 registers would be subregs of FPR256.
[RISCV] Use DecoderMethod and a template function to reduce the amount of boilerplate for decodings a register class. NFC (#177296)
The decode functions for GPR/FPR and their compressed register classes
are very similar. We just need the number of registers, the constant for
the first register in the class, and whether or not the register class
is shrunk by RVE.
I've added a template function that takes this information and used the
DecoderMethod in tablegen to provide the values for the the template
parameters.
I kept an alias for DecodeGPRRegisterClass because it has multiple
callers.
---------
Co-authored-by: Sam Elliott <sam at lenary.co.uk>
