LLVM/project 9112f8fmlir/include/mlir/Dialect/EmitC/IR EmitC.td, mlir/include/mlir/Dialect/OpenMP OpenMPOps.td

[MLIR] Adopt HasAncestor trait in omp.workshare.loop_wrapper and emitc.get_field (#197911)

Following #195447 which added the `HasAncestor` trait, replace the
ancestor-existence checks in two ops:
- `omp.workshare.loop_wrapper`
- `emitc.get_field`
DeltaFile
+0-8mlir/lib/Dialect/EmitC/IR/EmitC.cpp
+0-6mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+2-3mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+2-2mlir/test/Dialect/EmitC/invalid_ops.mlir
+1-2mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
+1-1mlir/test/Dialect/OpenMP/invalid.mlir
+6-226 files

FreeBSD/ports 0f64219games/openenroth distinfo Makefile, games/openenroth/files patch-thirdparty_CMakeLists.txt patch-src_Library_Serialization_CMakeLists.txt

games/openenroth: introduce some minor improvements and fixes

- Reflect currently required C++ standard (23) in the USES line
- Convert GH_ACCOUNT/GH_PROJECT/GH_TAGNAME/GH_SUBDIR lists into
  GH_TUPLE which is shorter, more blame-friendly and thus easier
  to maintain (assess changes)
- Depend on `math/fast_float' implementation from the ports
- Try to unbreak the build against Clang 21.1.8 by initializing
  const pointer and explicitly invoking operator bool() when
  asserting unique_ptr

Reported by:    pkg-fallout
DeltaFile
+22-24games/openenroth/distinfo
+24-21games/openenroth/Makefile
+10-2games/openenroth/files/patch-thirdparty_CMakeLists.txt
+10-0games/openenroth/files/patch-src_Library_Serialization_CMakeLists.txt
+66-474 files

LLVM/project 734d569llvm/lib/CodeGen RenameIndependentSubregs.cpp, llvm/test/CodeGen/AMDGPU rename-independent-subregs-unused-lanes.ll rename-independent-subregs.mir

[Codegen] Avoid duplicate subranges for unused lanes (#204091)

Splitting registers in `RenameIndependentSubregs` requires inserting
`IMPLICIT_DEF` to ensure definition of the new register on all paths.

The existing logic for handling unused lanes would create duplicate
subranges if multiple predecessor blocks exist, causing the machine
verifier to fail.

This change ensures that only a single subrange is created for the
unused lanes which is then updated with additional segments in the
following iterations.

This fixes https://github.com/llvm/llvm-project/issues/197733.

---------

Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
DeltaFile
+82-0llvm/test/CodeGen/AMDGPU/rename-independent-subregs-unused-lanes.ll
+52-0llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
+7-1llvm/lib/CodeGen/RenameIndependentSubregs.cpp
+141-13 files

LLVM/project 4a3052bclang/lib/AST/ByteCode Pointer.h

[clang][bytecode][NFC] Fix Pointer::operator<< for non-block pointers (#204156)

Some of those functions can only be called on block pointers.
DeltaFile
+2-2clang/lib/AST/ByteCode/Pointer.h
+2-21 files

LLVM/project 16d2217clang/docs ReleaseNotes.rst, clang/include/clang/Basic OpenCLOptions.h LangStandards.def

[Clang][OpenCL] Add OpenCL 3.1 language version (#204043)

OpenCL 3.1 was recently added to spec in
https://github.com/KhronosGroup/OpenCL-Docs/commit/9fff1a87a975

This PR adds version 3.1 to clang support, including frontend flag
`-std=cl3.1` (and its alias `-std=CL3.1`).
Updated release note.

A few extensions are promoted to 3.1 core. They'll be handled in
follow-up PRs.

Assisted-by: Claude Sonnet 4.6
DeltaFile
+15-0clang/test/Preprocessor/predefined-macros.c
+4-1clang/include/clang/Basic/OpenCLOptions.h
+4-0clang/docs/ReleaseNotes.rst
+4-0clang/lib/Frontend/InitPreprocessor.cpp
+4-0clang/include/clang/Basic/LangStandards.def
+1-1clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
+32-25 files not shown
+39-311 files

LLVM/project 2aa9457llvm/lib/IR Verifier.cpp VerifierAMDGPU.cpp, llvm/test/Verifier callbr-intrinsic.ll

[RFC][IR] Extract AMDGPU-specific verification logic into `VerifierAMDGPU.cpp`

`Verifier.cpp` is large and already mixes generic IR verification with
target-specific checks. We also have a growing amount of AMDGPU verifier logic
downstream, which would all end up in the same file if we don't address this,
and that is not ideal.

This patch extracts AMDGPU-specific verification logic into a separate
`VerifierAMDGPU.cpp` file, with shared infrastructure (`VerifierSupport`) moved
into `VerifierInternal.h`.

This is purely a code organization change, not a target-dependent IR verifier.
All checks remain compiled and linked into `LLVMCore` regardless of the target
triple. The extracted functions are called unconditionally at well-defined
extension points in `Verifier.cpp`, and each function internally gates on
target-specific conditions (for example, triple checks or intrinsic IDs) as
needed. The file is strictly limited to AMDGPU-specific IR constructs (amdgcn
intrinsics, AMDGPU module flags, etc.), and does not contain generic IR rules
that vary by target.

    [10 lines not shown]
DeltaFile
+15-528llvm/lib/IR/Verifier.cpp
+392-0llvm/lib/IR/VerifierAMDGPU.cpp
+228-0llvm/lib/IR/VerifierInternal.h
+4-4llvm/test/Verifier/callbr-intrinsic.ll
+1-0llvm/lib/IR/CMakeLists.txt
+1-0llvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
+641-5326 files

LLVM/project 641f2dallvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx vsllwil.ll

[LoongArch] Add DAG combine for widening shift-left (#202602)

Add DAG combines to recognize vector widening left-shift idioms and
lower them to VSLLWIL instructions.

The following pattern is matched for both signed and unsigned variants:

```
  SEXT/ZEXT(Low-Half-Lanes(vec)) << Imm
```

This covers the following instructions:

```
  LSX:  VSLLWIL.H.B, VSLLWIL.W.H, VSLLWIL.D.W
        VSLLWIL.HU.BU, VSLLWIL.WU.HU, VSLLWIL.DU.WU

  LASX: XVSLLWIL.H.B, XVSLLWIL.W.H, XVSLLWIL.D.W
        XVSLLWIL.HU.BU, XVSLLWIL.WU.HU, XVSLLWIL.DU.WU
```
DeltaFile
+6-128llvm/test/CodeGen/LoongArch/lasx/vsllwil.ll
+131-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+29-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+24-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+6-18llvm/test/CodeGen/LoongArch/lsx/vsllwil.ll
+196-1465 files

LLVM/project e57dfa3llvm/include/llvm/CodeGen RDFGraph.h RDFLiveness.h, llvm/lib/CodeGen RDFLiveness.cpp RDFGraph.cpp

[RDF] Replace unordered_map with DenseMap. NFC (#204280)

std::unordered_map is slow. Switch DefStackMap and RefMap to DenseMap.
erase-while-iterating loops become DenseMap::remove_if.
DeltaFile
+9-9llvm/lib/CodeGen/RDFLiveness.cpp
+1-6llvm/lib/CodeGen/RDFGraph.cpp
+2-3llvm/include/llvm/CodeGen/RDFGraph.h
+1-2llvm/include/llvm/CodeGen/RDFLiveness.h
+13-204 files

FreeBSD/src 652f4d4sys/dev/acpica acpi_timer.c

acpi(4): Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit f2574978567e63a1eb518c6d325ddf424a22a5e0)
DeltaFile
+1-1sys/dev/acpica/acpi_timer.c
+1-11 files

FreeBSD/src 66dde7dsys/dev/sdhci fsl_sdhci.c

sdhci(4): Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit dd8ba1f2fc513cea3ef18b6cdfed0e7d4260bb1a)
DeltaFile
+1-1sys/dev/sdhci/fsl_sdhci.c
+1-11 files

FreeBSD/src cf6fb0asys/dev/qcom_clk qcom_clk_rcg2.c

qcom_clk: Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit 6280a0630089d6e1726f9942ce9118556a32bb59)
DeltaFile
+1-1sys/dev/qcom_clk/qcom_clk_rcg2.c
+1-11 files

FreeBSD/src 2e7e5bfsys/dev/et if_et.c

et(4): Fix a typo in a source code comment

- s/Diable/Disable/

(cherry picked from commit 0ea84e9cce72e9df9d621b731ddd7247e175b3a7)
DeltaFile
+1-1sys/dev/et/if_et.c
+1-11 files

FreeBSD/src 1dfc91fsys/dev/extres/clk clknode_if.m

clk: Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit 58cf810066c850131d29de2eee32239e6f817c58)
DeltaFile
+1-1sys/dev/extres/clk/clknode_if.m
+1-11 files

FreeBSD/src c8f0bb3sys/dev/aic7xxx aic79xx.c aic7xxx.seq

aic7xxx: Fix two typos in source code comments

- s/Diable/Disable/
- s/connonical/canonical/

(cherry picked from commit 49ced8d765f46c3f81214590ad384846cfdfbbf8)
DeltaFile
+1-1sys/dev/aic7xxx/aic79xx.c
+1-1sys/dev/aic7xxx/aic7xxx.seq
+2-22 files

LLVM/project efbfb2cclang/include/clang/CIR/Dialect/Builder CIRBaseBuilder.h, clang/include/clang/CIR/Dialect/IR CIROps.td

[CIR] Add invariant attribute to cir.load
DeltaFile
+21-0clang/test/CIR/Lowering/load-invariant.cir
+20-0clang/test/CIR/IR/load-invariant.cir
+10-5clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
+9-1clang/include/clang/CIR/Dialect/IR/CIROps.td
+5-3clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+4-2clang/lib/CIR/CodeGen/CIRGenBuilder.h
+69-113 files not shown
+76-159 files

FreeBSD/src 55407c3sys/dev/acpica acpi_timer.c

acpi(4): Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit f2574978567e63a1eb518c6d325ddf424a22a5e0)
DeltaFile
+1-1sys/dev/acpica/acpi_timer.c
+1-11 files

FreeBSD/src fd6cad7sys/dev/sdhci fsl_sdhci.c

sdhci(4): Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit dd8ba1f2fc513cea3ef18b6cdfed0e7d4260bb1a)
DeltaFile
+1-1sys/dev/sdhci/fsl_sdhci.c
+1-11 files

FreeBSD/src b6ce96bsys/dev/ufshci ufshci_ctrlr.c

ufshci(4): Fix a typo in a source code comment

- s/Diable/Disable/

(cherry picked from commit 54e4b9c9faf0d4d478eea41fed0a7c7f0bac5eda)
DeltaFile
+1-1sys/dev/ufshci/ufshci_ctrlr.c
+1-11 files

FreeBSD/src 7763576sys/dev/qcom_clk qcom_clk_rcg2.c

qcom_clk: Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit 6280a0630089d6e1726f9942ce9118556a32bb59)
DeltaFile
+1-1sys/dev/qcom_clk/qcom_clk_rcg2.c
+1-11 files

FreeBSD/src b5f28bbsys/dev/et if_et.c

et(4): Fix a typo in a source code comment

- s/Diable/Disable/

(cherry picked from commit 0ea84e9cce72e9df9d621b731ddd7247e175b3a7)
DeltaFile
+1-1sys/dev/et/if_et.c
+1-11 files

FreeBSD/src e85a0e8sys/dev/clk clknode_if.m

clk: Fix a typo in a source code comment

- s/freqency/frequency/

(cherry picked from commit 58cf810066c850131d29de2eee32239e6f817c58)
DeltaFile
+1-1sys/dev/clk/clknode_if.m
+1-11 files

FreeBSD/src 7bd1f83sys/dev/aic7xxx aic79xx.c aic7xxx.seq

aic7xxx: Fix two typos in source code comments

- s/Diable/Disable/
- s/connonical/canonical/

(cherry picked from commit 49ced8d765f46c3f81214590ad384846cfdfbbf8)
DeltaFile
+1-1sys/dev/aic7xxx/aic79xx.c
+1-1sys/dev/aic7xxx/aic7xxx.seq
+2-22 files

FreeBSD/ports 5156872databases/timescaledb distinfo Makefile

databases/timescaledb: Update to 2.28.0
DeltaFile
+3-3databases/timescaledb/distinfo
+1-1databases/timescaledb/Makefile
+1-0databases/timescaledb/pkg-plist
+5-43 files

LLVM/project 37881c6llvm/lib/CodeGen MLRegAllocEvictAdvisor.cpp, llvm/lib/Passes StandardInstrumentations.cpp

[llvm] Replace unordered_{map,set} with Dense{Map,Set} in local maps (#204277)

std::unordered_map is slow. Replace maps and sets without a
pointer-stability requirement to DenseMap/DenseSet.
Extracted from #202222
DeltaFile
+2-3llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
+2-2llvm/lib/Transforms/Utils/SampleProfileInference.cpp
+2-2llvm/lib/Passes/StandardInstrumentations.cpp
+1-2llvm/lib/Transforms/Instrumentation/IndirectCallPromotion.cpp
+1-2llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
+1-2llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+9-131 files not shown
+10-147 files

LLVM/project 9d788feutils/bazel .bazelrc, utils/bazel/llvm-project-overlay/llvm/utils/lit/tests BUILD.bazel

[bazel] Use --incompatible_default_to_explicit_init_py (#204275)

After #203998, the `per-test-coverage-by-lit-cfg.py` test is failing in
Bazel. It seems to be due to automatic `__init__.py` generation.

With some extra logs:
```
# .---command stdout------------
# | -- Testing: 5 tests, 1 workers --
# | FAIL: per-test-coverage-by-lit-cfg :: name-collision/__init__.py (1 of 5)
# | ******************** TEST 'per-test-coverage-by-lit-cfg :: name-collision/__init__.py' FAILED ********************
...
# | # .---command stderr------------
# | # | error: no check strings found with prefix 'CHECK:'
# | # `----------------------------- 
```

I am not sure exactly the best way to deal with this, but
`--incompatible_default_to_explicit_init_py` disables this behavior and

    [2 lines not shown]
DeltaFile
+1-5utils/bazel/llvm-project-overlay/llvm/utils/lit/tests/BUILD.bazel
+3-0utils/bazel/.bazelrc
+4-52 files

LLVM/project 088b307llvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx vsllwil.ll

[LoongArch] Add DAG combine for widening shift-left

Add DAG combines to recognize vector widening left-shift idioms and
lower them to VSLLWIL instructions.

The following pattern is matched for both signed and unsigned variants:

```
  SEXT/ZEXT(Low-Half-Lanes(vec)) << Imm
```

This covers the following instructions:

```
  LSX:  VSLLWIL.H.B, VSLLWIL.W.H, VSLLWIL.D.W
        VSLLWIL.HU.BU, VSLLWIL.WU.HU, VSLLWIL.DU.WU

  LASX: XVSLLWIL.H.B, XVSLLWIL.W.H, XVSLLWIL.D.W
        XVSLLWIL.HU.BU, XVSLLWIL.WU.HU, XVSLLWIL.DU.WU
```
DeltaFile
+6-128llvm/test/CodeGen/LoongArch/lasx/vsllwil.ll
+131-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+29-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+24-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+6-18llvm/test/CodeGen/LoongArch/lsx/vsllwil.ll
+196-1465 files

LLVM/project 847dbc3llvm/test/CodeGen/LoongArch/lasx vsllwil.ll, llvm/test/CodeGen/LoongArch/lsx vsllwil.ll

[LoongArch][NFC] Add widening shift-left tests (#202601)
DeltaFile
+229-0llvm/test/CodeGen/LoongArch/lasx/vsllwil.ll
+113-0llvm/test/CodeGen/LoongArch/lsx/vsllwil.ll
+342-02 files

FreeBSD/ports ffabfd6math/lean4 pkg-plist Makefile, math/lean4/files patch-src_CMakeLists.txt patch-stage0_src_runtime_thread.h

math/lean4: update 4.30.0 → 4.31.0
DeltaFile
+3,264-2,550math/lean4/pkg-plist
+14-3math/lean4/Makefile
+6-6math/lean4/files/patch-src_CMakeLists.txt
+7-5math/lean4/files/patch-stage0_src_runtime_thread.h
+7-5math/lean4/files/patch-src_runtime_thread.h
+6-6math/lean4/files/patch-stage0_src_CMakeLists.txt
+3,304-2,5753 files not shown
+3,313-2,5849 files

FreeBSD/ports d013bddmail/mailio Makefile distinfo

mail/mailio: update 0.25.3 → 0.26.0
DeltaFile
+11-6mail/mailio/Makefile
+3-3mail/mailio/distinfo
+14-92 files

FreeBSD/ports 2335edfnet-p2p/qbittorrent distinfo Makefile

net-p2p/qbittorrent: update 5.2.1 → 5.2.2
DeltaFile
+3-3net-p2p/qbittorrent/distinfo
+1-1net-p2p/qbittorrent/Makefile
+4-42 files