LLVM/project 2b03d68llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass.ll

InstCombine: Improve single use fabs SimplifyDemandedFPClass handling (#176359)

SimplifyDemandedFPClass's handling of fabs recently became smarter in
the multiple use case than single. Unify these so the single use case
is equally as smart. This includes propagating ninf / nnan context into
the instruction, and accounting for nsz if the only bit difference is
for zero.
DeltaFile
+33-8llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+33-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+66-82 files

LLVM/project 5b767cellvm/lib/Target/ARM ARMSelectionDAGInfo.cpp

ARM: Avoid using getLibcallName

Get the symbol name from the LibcallImpl.
DeltaFile
+5-3llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
+5-31 files

FreeBSD/ports f52c148audio/py-pyradio distinfo Makefile, audio/py-pyradio/files patch-pyproject.toml

audio/py-pyradio: Update to 0.9.3.11.23

ChangeLog:      https://github.com/coderholic/pyradio/releases/tag/0.9.3.11.23
Reported by:    Spiros Georgaras <notifications at github.com
DeltaFile
+5-15audio/py-pyradio/files/patch-pyproject.toml
+3-3audio/py-pyradio/distinfo
+1-1audio/py-pyradio/Makefile
+9-193 files

LLVM/project 5b4ed87llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel ssubsat.ll saddsat.ll

[AMDGPU][GlobalISel] Add RegBankLegalize rules for [us]addsat/[us]subsat (#176255)

DeltaFile
+836-1,089llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
+795-1,060llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
+332-221llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
+332-221llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
+8-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+2,303-2,5915 files

LLVM/project c52a878llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-trunc.mir

[AMDGPU][GlobalISel] Fix G_TRUNC S16 to VCC for pre-GFX8 targets (#176254)

DeltaFile
+75-41llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-trunc.mir
+9-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+5-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+1-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+90-424 files

LLVM/project b7dd281llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPUGlobalISelUtils.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel fpext.ll unmerge-sgpr-s16.ll

AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES

Move G_UNMERGE_VALUES handling to AMDGPURegBankLegalizeRules.cpp.
Fix sgpr S16 unmerge by lowering using shift and using S32.
Previously sgpr S16 unmerge was selected using _lo16 and _hi16 subreg
indexes which are exclusive to vgpr register classes.
For remaing cases we do trivial mapping, assigns same reg bank
to all operands, vgpr or sgpr.
DeltaFile
+47-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+13-27llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
+36-0llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
+16-0llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
+14-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+6-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+132-282 files not shown
+140-318 files

LLVM/project aa61209llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

GlobalISel: Use LibcallLoweringInfo more in IRTranslator
DeltaFile
+10-5llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+10-51 files

FreeBSD/src c527f58lib/libc/gen exterr_cat_filenames.h

exterr: Regenerate exterr_cat_filenames.h
DeltaFile
+1-1lib/libc/gen/exterr_cat_filenames.h
+1-11 files

FreeBSD/src bda6ed2tools/build make_libc_exterr_cat_filenames.sh

exterr: Sort output from make_libc_exterr_cat_filenames.sh

Otherwise the script may permute the order of entries in the file since
find(1) output is not stable.

Reviewed by:    kib
MFC after:      1 week
Differential Revision:  https://reviews.freebsd.org/D54669
DeltaFile
+1-1tools/build/make_libc_exterr_cat_filenames.sh
+1-11 files

LLVM/project a0caa61llvm/include/llvm/CodeGen/GlobalISel LegalizerHelper.h, llvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp

GlobalISel: Use LibcallLoweringInfo more in LegalizerHelper

Avoid using TargetLowering for libcall information.
DeltaFile
+25-16llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+1-0llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
+26-162 files

pkgng/pkgng 485013edocs pkg-query.8

pkg-query.8: Add supports for complex attribute evaluation in query

Update pkg-query(8) to include documentation for the newly supported
multiline variables in evaluation expressions.
- Split variables into 'Normal Variables' and 'Multiline variables'
- Add description and example for multiline variable evaluation (e.g., %dn)
- List supported multiline variables: %d, %r, %C, %L, %B, %b, %A
DeltaFile
+33-1docs/pkg-query.8
+33-11 files

pkgng/pkgng 9cd02desrc query.c

pkg-query: Add support query evaluation of complex attributes

Add support for querying complex attributes (lists) in the evaluation
string mechanism. This includes:

- %d[nov]: Dependencies (Name, Origin, Version)
- %r[nov]: Reverse dependencies (Name, Origin, Version)
- %C: Categories
- %L: Licenses
- %B: Shared libraries required
- %b: Shared libraries provided
- %A[tv]: Annotations (Tag, Value)

These are implemented by generating subqueries using EXISTS/NOT EXISTS
operators in the resulting SQL.

The following fields are not implemented as their use cases are unclear:
- %F[psugmftl]: the list of files
- %S[pugmf]: the list of (sub-)directories

    [3 lines not shown]
DeltaFile
+97-7src/query.c
+97-71 files

pkgng/pkgng 2dde163tests/frontend query.sh

tests: Add test cases for dependency query evaluation

Add regression tests to verify the behavior of evaluating dependency
attributes (%dn) in query expressions.
- Test exact match (=)
- Test inequality (!=)
DeltaFile
+17-0tests/frontend/query.sh
+17-01 files

LLVM/project 2c16364mlir/test/python/dialects transform_interpreter.py

[MLIR][Python] add builtin module transform test (#176388)

See https://github.com/llvm/llvm-project/pull/176299
DeltaFile
+28-1mlir/test/python/dialects/transform_interpreter.py
+28-11 files

LLVM/project f09321dmlir/lib/Bindings/Python TransformInterpreter.cpp

remove stray merge
DeltaFile
+6-0mlir/lib/Bindings/Python/TransformInterpreter.cpp
+6-01 files

LLVM/project 9671aaellvm/lib/IR Verifier.cpp, llvm/lib/Transforms/Scalar DeadStoreElimination.cpp

[DSE][Verifier] Respect the calling convention of the function specified by "alloc-variant-zeroed" (#175911)

Require that the calling convention between the zeroed and non-zeroed
variants is the same, and set it appropriate in the DSE transform.
DeltaFile
+14-0llvm/test/Transforms/DeadStoreElimination/noop-stores.ll
+5-1llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
+5-0llvm/lib/IR/Verifier.cpp
+4-0llvm/test/Verifier/alloc-variant-zeroed.ll
+28-14 files

LLVM/project f7ee822llvm/include/llvm/Support KnownFPClass.h, llvm/test/Transforms/Attributor nofpclass-fmul.ll nofpclass.ll

ValueTracking: Propagate non-nan sources through fmul square (#176243)

ValueTracking: Propagate non-nan sources through fmul square

https://alive2.llvm.org/ce/z/hbZUfc
DeltaFile
+30-0llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+1-1llvm/test/Transforms/Attributor/nofpclass.ll
+1-1llvm/test/Transforms/Attributor/nofpclass-nan-fmul.ll
+1-1llvm/unittests/Analysis/ValueTrackingTest.cpp
+1-0llvm/include/llvm/Support/KnownFPClass.h
+34-35 files

LLVM/project dfcb805llvm/lib/Target/X86 X86ISelLowering.cpp

X86: Avoid some uses of getLibcallName (#176365)

Query the LibcallImpl, check if it's supported, and generate
the symbol through the enum.
DeltaFile
+28-12llvm/lib/Target/X86/X86ISelLowering.cpp
+28-121 files

LLVM/project 25693dcllvm/lib/Target/Sparc SparcISelLowering.cpp SparcISelLowering.h

Sparc: Avoid passing around libfunc names for f128 operations (#176364)

DeltaFile
+31-41llvm/lib/Target/Sparc/SparcISelLowering.cpp
+1-2llvm/lib/Target/Sparc/SparcISelLowering.h
+32-432 files

LLVM/project d66d894mlir/test/python/dialects transform_interpreter.py

Update transform_interpreter.py
DeltaFile
+3-3mlir/test/python/dialects/transform_interpreter.py
+3-31 files

LLVM/project 7ec2aecllvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/test/Transforms/LoopVectorize multiple-early-exits.ll unsupported_early_exit.ll

Merge branch 'main' into users/arsenm/instcombine/improve-single-use-fabs-simplify-demanded-fpclass
DeltaFile
+315-79mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
+353-34mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
+150-88llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
+222-0llvm/test/Transforms/LoopVectorize/unsupported_early_exit.ll
+104-111llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+183-0mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
+1,327-31256 files not shown
+2,088-50062 files

LLVM/project 5d7975fmlir/test/python/dialects transform_interpreter.py

Update transform_interpreter.py
DeltaFile
+1-0mlir/test/python/dialects/transform_interpreter.py
+1-01 files

LLVM/project df63a02mlir/test/python/dialects transform_interpreter.py

Update transform_interpreter.py
DeltaFile
+8-1mlir/test/python/dialects/transform_interpreter.py
+8-11 files

LLVM/project 728c4b5llvm/test/CodeGen/AMDGPU fmul-to-ldexp.ll llvm.log10.ll

[AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (WIP)

Change si-peephole-sdwa to eliminate V_PACK_B32_F16_e64 instructions
by changing the second operand to write to the upper word of the
destination directly.
DeltaFile
+126-140llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
+138-98llvm/test/CodeGen/AMDGPU/llvm.log10.ll
+138-98llvm/test/CodeGen/AMDGPU/llvm.log.ll
+92-104llvm/test/CodeGen/AMDGPU/fpow.ll
+68-127llvm/test/CodeGen/AMDGPU/llvm.log2.ll
+74-118llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
+636-68529 files not shown
+1,251-1,34835 files

LLVM/project 74a9e06llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.cos.f16.ll llvm.sin.f16.ll

[AMDGPU] Enable ISD::{FSIN,FCOS} custom lowering to work on v2f16

Currently ISD::FSIN and ISD::FCOS of type MVT::v2f16 are legalized by
first expanding and then using a custom lowering on the resulting f16
instructions. This ordering prevents using packed math variants of the
instructions introduced by the legalization (e.g. the multiplication),
if available, and makes it difficult to eliminate the packing of the
results by using SDWA form; previous attempts to deal with the latter
situation in the si-peephole-sdwa pass were unwieldly since it was
necessary to reconstruct the association between the source and target
vectors.

Change the legalization action for ISD::FSIN and ISD::FCOS of type
MTF::v2f16 to Custom and change the custom intrinsic lowering to deal
with the v2f16 for the intrinsics introduced in this way.
DeltaFile
+27-38llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
+27-38llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
+34-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+88-793 files

LLVM/project 516fcd8llvm/lib/Target/AMDGPU SIISelLowering.cpp

[AMDGPU] SIIselLowering: Use intrinsics in LowerTrig

This allows to apply further legalization actions to the
resulting nodes which is a preparatory step to extend the
custom lowering to vector types.
DeltaFile
+12-9llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-91 files

FreeBSD/ports 6156948devel/godot35 Makefile

devel/godot35: Deprecate

Legacy version should have been removed with devel/godot35-tools,
consider migrating to devel/godot.

PR:     292141
(cherry picked from commit 4073e1292654ee946e82f5f25147e49c7a35559b)
DeltaFile
+3-0devel/godot35/Makefile
+3-01 files

LLVM/project e90dd53clang/include/clang/Analysis/Analyses/LifetimeSafety FactsGenerator.h Loans.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

std_move false positive
DeltaFile
+23-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+18-0clang/test/Sema/warn-lifetime-safety.cpp
+5-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+2-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Loans.h
+48-04 files

FreeBSD/ports 4073e12devel/godot35 Makefile

devel/godot35: Deprecate

Legacy version should have been removed with devel/godot35-tools,
consider migrating to devel/godot.

PR:     292141
DeltaFile
+3-0devel/godot35/Makefile
+3-01 files

LLVM/project 9a2d3abmlir/lib/Dialect/XeGPU/IR XeGPUDialect.cpp, mlir/lib/Dialect/XeGPU/Transforms XeGPUWgToSgDistribute.cpp

[MLIR][XeGPU] Add support for cross-subgroup reduction from wg to sg (#170936)

This PR adds support for cross-sg reduction whilst distributing from
workgroup to subgroup. It has following limitation
1. Cannot reduce to a scalar
2. For cross-sg, only 1:1 decomposition (each sg should be assigned only
one tile in the original WG tile) is supported for now. For example for
a WG tile of size 256x128, sg_layout = [8, 4], sg_data = [16, 16] wont
be supported.
DeltaFile
+353-34mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
+183-0mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops.mlir
+0-19mlir/test/Dialect/XeGPU/invalid.mlir
+6-11mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
+3-1mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-unify-ops-rr.mlir
+545-655 files