LLVM/project c32caeemlir/lib/Dialect/SPIRV/Transforms SPIRVConversion.cpp, mlir/test/Conversion/ConvertToSPIRV func-signature-vector-unroll.mlir

[mlir][spirv] Fix crash in FuncOpVectorUnroll for dynamic-shaped tensor args (#184626)

FuncOpVectorUnroll::matchAndRewrite iterates over all function arguments
and creates a zero-constant placeholder for any non-vector argument via
rewriter.getZeroAttr(type). For dynamically-shaped tensor types such as
tensor<?x2xi8>, getZeroAttr ultimately calls
DenseIntOrFPElementsAttr::getRaw which asserts that the type has a
static shape.

Add an early pre-check that returns failure() for any non-vector
argument with a dynamically-shaped type. This must be done before any IR
modifications are made, since returning failure() after inlining the
function body would leave the IR in an inconsistent state.

Fixes #148369
DeltaFile
+12-0mlir/test/Conversion/ConvertToSPIRV/func-signature-vector-unroll.mlir
+9-0mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
+21-02 files

FreeBSD/ports 7e0ac38devel Makefile, devel/py-cloup Makefile distinfo

devel/py-cloup: New port

Cloup — originally from “Click + option groups” — enriches Click with
several features that make it more expressive and configurable.
DeltaFile
+23-0devel/py-cloup/Makefile
+3-0devel/py-cloup/distinfo
+2-0devel/py-cloup/pkg-descr
+1-0devel/Makefile
+29-04 files

LLVM/project d07ab18mlir/lib/IR Verifier.cpp, mlir/unittests/IR VerifierTest.cpp CMakeLists.txt

[mlir] Add cross-context checks to the IR verifier (#184627)

Detect IR where result types, operand types, or discardable attribute
values come from a different MLIRContext than the operation itself.
Mixing contexts is a latent use-after-free hazard when one context is
destroyed before the other; the verifier now reports a clear error
instead of silently allowing the invalid IR through.

Three new unit tests in MLIRIRTests cover each scenario.

Fix #61569
DeltaFile
+177-0mlir/unittests/IR/VerifierTest.cpp
+60-3mlir/lib/IR/Verifier.cpp
+1-0mlir/unittests/IR/CMakeLists.txt
+238-33 files

FreeBSD/ports 73911d6www/py-django52 distinfo Makefile, www/py-django52/files patch-pyproject.toml

www/py-django52: Update to 5.2.12

(cherry picked from commit 50c96e0a1fd75e72f1c1f8ba436925d8330bb99b)
DeltaFile
+3-3www/py-django52/distinfo
+3-3www/py-django52/files/patch-pyproject.toml
+1-1www/py-django52/Makefile
+7-73 files

FreeBSD/ports 64ea3e3www/py-django42 distinfo Makefile

www/py-django42: Update to 4.2.29

(cherry picked from commit 150ca0651bce557f9c15a295076f55050b6134ca)
DeltaFile
+3-3www/py-django42/distinfo
+1-1www/py-django42/Makefile
+4-42 files

FreeBSD/ports 9d8b4cawww/py-django60 distinfo Makefile, www/py-django60/files patch-pyproject.toml

www/py-django60: Update to 6.0.3

(cherry picked from commit 5c93c840f4900907f3ffdaea52d651d074e51c74)
DeltaFile
+9-6www/py-django60/files/patch-pyproject.toml
+3-3www/py-django60/distinfo
+1-1www/py-django60/Makefile
+13-103 files

FreeBSD/ports 150ca06www/py-django42 distinfo Makefile

www/py-django42: Update to 4.2.29
DeltaFile
+3-3www/py-django42/distinfo
+1-1www/py-django42/Makefile
+4-42 files

FreeBSD/ports 50c96e0www/py-django52 distinfo Makefile, www/py-django52/files patch-pyproject.toml

www/py-django52: Update to 5.2.12
DeltaFile
+3-3www/py-django52/distinfo
+3-3www/py-django52/files/patch-pyproject.toml
+1-1www/py-django52/Makefile
+7-73 files

FreeBSD/ports 5c93c84www/py-django60 distinfo Makefile, www/py-django60/files patch-pyproject.toml

www/py-django60: Update to 6.0.3
DeltaFile
+9-6www/py-django60/files/patch-pyproject.toml
+3-3www/py-django60/distinfo
+1-1www/py-django60/Makefile
+13-103 files

LLVM/project 61d8e5cmlir/lib/Dialect/Vector/Utils VectorUtils.cpp, mlir/test/Dialect/Affine/SuperVectorize vector_utils.mlir

[MLIR][Vector] Fix crash in operatesOnSuperVectorsOf on rank-mismatched shaped (#183967)

The `operatesOnSuperVectorsOf` function in VectorUtils.cpp contained an
assertion that fired when a `vector.transfer` operation's vector type
had a different rank (or non-divisible shape) from the sub-vector type
supplied by the caller:

  assert((ratio || \!mustDivide) &&
"vector.transfer operation in which super-vector size is not an"
         " integer multiple of sub-vector size");

This assertion was incorrect because the function's callers (e.g., the
affine super-vectorizer) legitimately pass transfer ops whose vector
type doesn't match the requested sub-vector shape. In those cases the
correct answer is simply that the op does not operate on a super-vector
of that sub-vector type, so `operatesOnSuperVectorsOf` should return
`false`.

Remove the assert return `false` when `computeShapeRatio` produces no

    [3 lines not shown]
DeltaFile
+3-15mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
+17-0mlir/test/Dialect/Affine/SuperVectorize/vector_utils.mlir
+20-152 files

LLVM/project 6b7a3b3clang-tools-extra/clang-tidy/performance FasterStringFindCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Teach `performance-faster-string-find` about `operator+=` (#182697)

This is a followup to #182633. Like in that PR, `operator+=` doesn't fit
with the check name, but the same optimization is applicable to it:
https://en.cppreference.com/w/cpp/string/basic_string/operator+=.html
DeltaFile
+13-6clang-tools-extra/clang-tidy/performance/FasterStringFindCheck.cpp
+11-0clang-tools-extra/test/clang-tidy/checkers/performance/faster-string-find.cpp
+2-2clang-tools-extra/docs/ReleaseNotes.rst
+2-2clang-tools-extra/docs/clang-tidy/checks/performance/faster-string-find.rst
+28-104 files

FreeBSD/ports cde38c4biology/bowtie2 Makefile distinfo

biology/bowtie2: Update to 2.5.5

Add -d (deterministic) flag for better efficiency
Add runtime AVX detection on x86-64
Changes: https://github.com/BenLangmead/bowtie2/releases

Reported by:    portscout
DeltaFile
+13-2biology/bowtie2/Makefile
+3-3biology/bowtie2/distinfo
+2-0biology/bowtie2/pkg-plist
+18-53 files

LLVM/project 4427575llvm/tools/dsymutil DebugMap.h

[dsymutil] Add DebugMapObjectFilter destructor (#184701)

Fixes #182083.
DeltaFile
+1-0llvm/tools/dsymutil/DebugMap.h
+1-01 files

LLVM/project bfe349cllvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/test/CodeGen/AMDGPU vgpr-setreg-mode-swar.mir

[AMDGPU] Optimize S_SETREG_IMM32_B32 piggybacking by treating it as a mode scope boundary (#184703)

When `handleSetregMode` encounters an `S_SETREG_IMM32_B32` with `Size <=
12`, the instruction's `imm32[12:19]` bits are "free" for VGPR MSB
piggybacking. Previously, the old mode was eagerly written into these
bits, but the `Rewritten` guard in `setMode` would then block subsequent
piggybacking when the next VGPR instruction needed a different mode,
causing an unnecessary `S_SET_VGPR_MSB` to be emitted.

Model the `S_SETREG_IMM32_B32` as the boundary of the old mode's control
range: reset `CurrentMode` and clear `bits[12:19]` to zero. This lets
the next `setMode` call freely piggyback the required mode without
triggering `Rewritten`.
DeltaFile
+21-22llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+5-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+26-252 files

LLVM/project 576c244lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition TestCrashingCondition.py main.c

Add a test for handling a crashing breakpoint condition (#184247)

I was working on something and broke the handling of breakpoint
conditions that crash. In fixing that I noticed that there wasn't a test
for this scenario, so this PR adds one.

---------

Co-authored-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+57-0lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/TestCrashingCondition.py
+11-0lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/main.c
+4-0lldb/test/API/functionalities/breakpoint/breakpoint_conditions/crashing_condition/Makefile
+72-03 files

FreeBSD/ports 395c527games/veloren-weekly distinfo Makefile.crates

games/veloren-weekly: update to s20260301

Changes:        https://gitlab.com/veloren/veloren/-/compare/41052f1060...651cf906e24
(cherry picked from commit 252f31c449118def9dc77e1cb58ff147e1f47482)
DeltaFile
+89-93games/veloren-weekly/distinfo
+43-45games/veloren-weekly/Makefile.crates
+2-2games/veloren-weekly/Makefile
+134-1403 files

FreeBSD/ports 0d9f02cgraphics/mesa-devel distinfo Makefile

graphics/mesa-devel: update to 26.0.b.1976

Changes:        https://gitlab.freedesktop.org/mesa/mesa/-/compare/788a8ab2396...651cf906e24
DeltaFile
+3-3graphics/mesa-devel/distinfo
+2-2graphics/mesa-devel/Makefile
+5-52 files

FreeBSD/ports 252f31cgames/veloren-weekly distinfo Makefile.crates

games/veloren-weekly: update to s20260301

Changes:        https://gitlab.com/veloren/veloren/-/compare/41052f1060...651cf906e24
DeltaFile
+89-93games/veloren-weekly/distinfo
+43-45games/veloren-weekly/Makefile.crates
+2-2games/veloren-weekly/Makefile
+134-1403 files

FreeBSD/ports 80ac0a4emulators/rpcs3 distinfo Makefile

emulators/rpcs3: update to 0.0.39.18876

Changes:        https://github.com/RPCS3/rpcs3/compare/41e036473a...d46ddcee5d
DeltaFile
+3-3emulators/rpcs3/distinfo
+2-2emulators/rpcs3/Makefile
+5-52 files

LLVM/project 18b648clibclc CMakeLists.txt, libclc/clc/lib/generic/async clc_prefetch.inc

[libclc][NFC] Add -Wall -Wextra to build flags and fix build warnings (#184549)

Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
DeltaFile
+4-1libclc/clc/lib/generic/async/clc_prefetch.inc
+0-4libclc/clc/lib/generic/math/clc_fmod.cl
+3-0libclc/clc/lib/ptx-nvidiacl/synchronization/clc_work_group_barrier.cl
+1-1libclc/clc/lib/generic/math/clc_erfc.cl
+2-0libclc/CMakeLists.txt
+2-0libclc/clc/lib/ptx-nvidiacl/mem_fence/clc_mem_fence.cl
+12-65 files not shown
+14-1011 files

LLVM/project 537f3d3llvm/lib/CodeGen SafeStack.cpp, llvm/test/CodeGen/AArch64 safestack_scalar.ll

[SafeStack] Fix crashing with scalable TypeSizes (#180547)

On e.g. aarch64 the TypeSize of scalar types can have a size that is not
known at compile time.
Currently when safestack occurs those it simply crashes as described in
https://github.com/llvm/llvm-project/issues/175868.

Since we cannot verify the size at compile time we simply consider the
access to be unsafe (in regards to safestack).

Reproducer:
```
#include <arm_sve.h>

int main() {
    svint32_t vec = svindex_s32(0, 1);
    svint32_t res = svadd_s32_z(svptrue_b32(), vec, vec);
    int32_t buffer[1024];
    svst1_s32(svptrue_b32(), buffer, res);

    [2 lines not shown]
DeltaFile
+17-0llvm/test/CodeGen/AArch64/safestack_scalar.ll
+12-0llvm/lib/CodeGen/SafeStack.cpp
+29-02 files

pfSense/pfsense d9e6cb1src/etc/inc gwlb.inc

Fix function comment typo
DeltaFile
+1-1src/etc/inc/gwlb.inc
+1-11 files

LLVM/project cee0703lldb/test/API/python_api/block TestFrameBlocks.py TestBlocks.py

[lldb] Fixing the python_api/block tests. (#184647)

Renaming the file to be unique and updating the symbols for Windows.
DeltaFile
+59-0lldb/test/API/python_api/block/TestFrameBlocks.py
+0-59lldb/test/API/python_api/block/TestBlocks.py
+1-1lldb/test/API/python_api/block/fn.c
+1-1lldb/test/API/python_api/block/main.c
+61-614 files

LLVM/project 8c2d6cblldb/source/Plugins/Process/Utility RegisterInfos_arm64.h RegisterInfos_arm64_sve.h

[lldb] Fix the AArch64 CPSR reg defn to list generic reg

My change to remove an incorrect DWARF register number for
CPSR unintentionally dropped the LLDB_REGNUM_GENERIC_FLAGS
generic reg type in the definitions of cpsr.

We need to have a macro (DEFINE_MISC_REGS) for status/control
registers that have no DWARF/eh_frame and no generic reg num.

I added a new macro, DEFINE_GPR_CPSR, for cpsr which is unique
in having no DWARF/eh_frame numbers but does have a generic
flags reg number.
DeltaFile
+15-6lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h
+1-2lldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
+16-82 files

LLVM/project 521c2e1lldb/unittests/Host SocketTest.cpp, lldb/unittests/Interpreter TestCompletion.cpp

[llvm][Support] Make createUniquePath require at least one wildcard marker (#184688)

The API was a bit easy to accidentally mis-use, as it silently accepted
Model strings without any randomness marker characters (`%`), which
results in a unique path that's not at all unique. To avoid this
foot-gun, we now assert that the model contains at least one, and update
all the broken usages accordingly.

rdar://170349565
DeltaFile
+11-11llvm/unittests/Support/Path.cpp
+8-5llvm/unittests/Support/raw_socket_stream_test.cpp
+3-2lldb/unittests/Interpreter/TestCompletion.cpp
+2-2lldb/unittests/Host/SocketTest.cpp
+3-0llvm/lib/Support/Path.cpp
+1-1llvm/include/llvm/Support/FileSystem.h
+28-211 files not shown
+29-227 files

NetBSD/pkgsrc-wip 3401970tofu-ls Makefile

tofu-ls: Take MAINTAINERship
DeltaFile
+1-1tofu-ls/Makefile
+1-11 files

NetBSD/pkgsrc-wip 45d62b0tofu-ls distinfo go-modules.mk

tofu-ls: Update to 0.3.1

Changes:
v0.3.1
* Latest available OpenTofu releases as of 10/12/2025
* OpenTofu release matching fixed

v0.3.0
* Generate schema with the provider version

v0.2.0
* Ephemeral support

v0.1.1
* Schema bump to v0.1.1

v0.1.0
* Adds support for additional language IDs - terraform and terraform-vars
DeltaFile
+33-75tofu-ls/distinfo
+10-24tofu-ls/go-modules.mk
+1-1tofu-ls/Makefile
+44-1003 files

FreeBSD/src 2f44015sys/dev/hid hpen.c

hid: Fix 'strenght' typo in hpen.c

Reviewed by:    wulf, obiwac
Approved by:    wulf, obiwac
Fixes:  d97d5c0ce89d ("hid: Import hidmap-based drivers written by Greg V")
Differential Revision:  https://reviews.freebsd.org/D55626
DeltaFile
+3-3sys/dev/hid/hpen.c
+3-31 files

FreeBSD/ports c05bc12biology/rna-seq Makefile distinfo

biology/rna-seq: Update to 0.2.0

Add biology/fasda-utils to metaport depends
DeltaFile
+5-2biology/rna-seq/Makefile
+1-1biology/rna-seq/distinfo
+6-32 files

LLVM/project f4a20a0clang/test/CIR/CodeGen complex-compound-assignment.cpp complex-mul-div.cpp

[CIR][NFCI] Fixup some test regressions due to OGCG changes (#184699)

Discovered during CI in a different patch, 3 tests started failing for
unknown reasons due to some very mild changes to the IR, but only in
'classic' codgen parts of the tests. These tests were overly specific
for no good reason, so this patch just fixes that.
DeltaFile
+2-2clang/test/CIR/CodeGen/complex-compound-assignment.cpp
+2-2clang/test/CIR/CodeGen/complex-mul-div.cpp
+1-1clang/test/CIR/CodeGen/optsize-func-attr.cpp
+5-53 files