LLVM/project 83ffe1emlir/test/python/dialects transform_interpreter.py

[MLIR][Python] add builtin module transform test
DeltaFile
+19-0mlir/test/python/dialects/transform_interpreter.py
+19-01 files

LLVM/project 5f697b3llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

AArch64: Use getLibcallImplCallingConv more consistently (#176377)

This was querying the calling conv from the Libcall instead of
the LibcallImpl.
DeltaFile
+2-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-11 files

LLVM/project 4c0f295llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPUGlobalISelUtils.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel fpext.ll unmerge-sgpr-s16.ll

AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES

Move G_UNMERGE_VALUES handling to AMDGPURegBankLegalizeRules.cpp.
Fix sgpr S16 unmerge by lowering using shift and using S32.
Previously sgpr S16 unmerge was selected using _lo16 and _hi16 subreg
indexes which are exclusive to vgpr register classes.
For remaing cases we do trivial mapping, assigns same reg bank
to all operands, vgpr or sgpr.
DeltaFile
+47-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+13-27llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
+36-0llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
+18-0llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
+10-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+6-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+130-282 files not shown
+137-318 files

LLVM/project bd17d55llvm/lib/Target/AArch64 AArch64SelectionDAGInfo.cpp

AArch64: Avoid getLibcallName when emitting special mem libcalls (#176376)

Get the symbol through the RTLIB::LibcallImpl enum.
DeltaFile
+6-3llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
+6-31 files

FreeBSD/src b39662fsys/arm/broadcom/bcm2835 files.bcm283x, sys/conf kern.mk files.arm64

vchiq: fix build with clang 21

When compiling vchiq with clang 21, the following -Werror warning is
produced:

    sys/contrib/vchiq/interface/vchiq_arm/vchiq_arm.c:728:27: error: default initialization of an object of type 'VCHIQ_QUEUE_MESSAGE32_T' with const member leaves the object uninitialized [-Werror,-Wdefault-const-init-field-unsafe]
      728 |                 VCHIQ_QUEUE_MESSAGE32_T args32;
          |                                         ^
    sys/contrib/vchiq/interface/vchiq_arm/vchiq_ioctl.h:151:40: note: member 'elements' declared 'const' here
      151 |         const /*VCHIQ_ELEMENT_T * */ uint32_t elements;
          |                                               ^

While the warning is formally correct, the 'args32' object is
immediately initialized after its declaration. Therefore, suppress the
warning.

MFC after:      3 days
DeltaFile
+3-0sys/conf/kern.mk
+1-1sys/conf/files.arm64
+1-1sys/arm/broadcom/bcm2835/files.bcm283x
+5-23 files

LLVM/project 832b091llvm/test/TableGen directive2.td directive1.td, llvm/utils/TableGen/Basic DirectiveEmitter.cpp

Restore comment with a period at the end
DeltaFile
+2-0llvm/test/TableGen/directive2.td
+2-0llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
+2-0llvm/test/TableGen/directive1.td
+6-03 files

LLVM/project 129ccf9llvm/include/llvm/Transforms/Utils LowerMemIntrinsics.h, llvm/lib/Transforms/Utils LowerMemIntrinsics.cpp

Add an overload of `expandMemSetAsLoop` that takes an optional TTI pointer

This avoids breaking the API for out-of-tree tools like the
SPIRV-LLVM-Translator.
DeltaFile
+24-12llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+7-0llvm/include/llvm/Transforms/Utils/LowerMemIntrinsics.h
+31-122 files

LLVM/project 14349bcllvm/lib/Target/AVR AVRISelLowering.cpp

AVR: Avoid getLibcallName (#176375)

Create the symbol through RTLIB::LibcallImpl
DeltaFile
+8-4llvm/lib/Target/AVR/AVRISelLowering.cpp
+8-41 files

LLVM/project 47689d2llvm/utils/release github-upload-release.py

[llvm][utils][release] Remove mention of sub-project source archives (#176348)

These are no longer provided as of llvm 22:
https://discourse.llvm.org/t/llvm-22-1-0-rc1-released/89479

> Please note: since the last release the subproject tarballs have been
> removed and are no longer provided. See RFC: Do "something" with the
> subproject tarballs in the release page for more details.

There are now only llvm-project and llvm-test-suite archives.
DeltaFile
+1-1llvm/utils/release/github-upload-release.py
+1-11 files

SmartOS/live ff3cb7esrc/vm/node_modules/cloudinit lofs-fat16.js index.js

Add license header to new files
DeltaFile
+22-1src/vm/node_modules/cloudinit/lofs-fat16.js
+21-0src/vm/node_modules/cloudinit/index.js
+21-0src/vm/node_modules/cloudinit/nocloud.js
+64-13 files

LLVM/project 9e6b658llvm/lib/Target/Hexagon HexagonSelectionDAGInfo.cpp

Hexagon: Avoid using getLibcallName for special memcpy (#176374)

Create the symbol through the RTLIB::LibcallImpl enum.
DeltaFile
+7-4llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp
+7-41 files

LLVM/project 907b6c6llvm/test/CodeGen/AMDGPU fmul-to-ldexp.ll llvm.log10.ll

[AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (WIP)

Change si-peephole-sdwa to eliminate V_PACK_B32_F16_e64 instructions
by changing the second operand to write to the upper word of the
destination directly.
DeltaFile
+126-140llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
+138-98llvm/test/CodeGen/AMDGPU/llvm.log10.ll
+138-98llvm/test/CodeGen/AMDGPU/llvm.log.ll
+92-104llvm/test/CodeGen/AMDGPU/fpow.ll
+68-127llvm/test/CodeGen/AMDGPU/llvm.log2.ll
+74-118llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
+636-68529 files not shown
+1,251-1,34835 files

LLVM/project a536850llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.cos.f16.ll llvm.sin.f16.ll

[AMDGPU] Enable ISD::{FSIN,FCOS} custom lowering to work on v2f16

Currently ISD::FSIN and ISD::FCOS of type MVT::v2f16 are legalized by
first expanding and then using a custom lowering on the resulting f16
instructions. This ordering prevents using packed math variants of the
instructions introduced by the legalization (e.g. the multiplication),
if available, and makes it difficult to eliminate the packing of the
results by using SDWA form; previous attempts to deal with the latter
situation in the si-peephole-sdwa pass were unwieldly since it was
necessary to reconstruct the association between the source and target
vectors.

Change the legalization action for ISD::FSIN and ISD::FCOS of type
MTF::v2f16 to Custom and change the custom intrinsic lowering to deal
with the v2f16 for the intrinsics introduced in this way.
DeltaFile
+27-38llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
+27-38llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
+34-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+88-793 files

FreeBSD/ports 182d797textproc/py-dict2xml distinfo Makefile

textproc/py-dict2xml: Update to 1.7.8

Reported by:    portscout!
DeltaFile
+3-3textproc/py-dict2xml/distinfo
+1-1textproc/py-dict2xml/Makefile
+4-42 files

LLVM/project 2eb709bllvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/test/CodeGen/AMDGPU whole-wave-functions.ll vgpr-set-msb-coissue.mir

[AMDGPU] Fix typo in `LowerVGPREncoding` to allow it to hoist past `waitcnt` instructions (#176355)

Fixes a typo which prevented `set_vgpr_msb` to be hoisted past `waitcnt`
instructions.
DeltaFile
+3-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+2-2llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+1-1llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
+6-63 files

LLVM/project 135744cllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass.ll

InstCombine: Consider nsz when simplifying fabs/fneg uses (#176156)

Later this trick should also be applied in the single use
case.
DeltaFile
+11-4llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+3-3llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+14-72 files

LLVM/project 9d43694llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-f64-system.ll expand-atomic-f32-agent.ll

AtomicExpand: Use LibcallLoweringInfo analysis
DeltaFile
+36-8llvm/lib/CodeGen/AtomicExpandPass.cpp
+8-8llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
+8-8llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
+8-8llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
+8-8llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
+8-8llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-agent.ll
+76-4855 files not shown
+220-18561 files

LLVM/project ec12f65llvm/lib/Transforms/Utils LowerMemIntrinsics.cpp, llvm/test/CodeGen/AMDGPU memset-param-combinations.ll memintrinsic-unroll.ll

[LowerMemIntrinsics] Optimize memset lowering

This patch changes the memset lowering to match the optimized memcpy lowering.
The memset lowering now queries TTI.getMemcpyLoopLoweringType for a preferred
memory access type. If that type is larger than a byte, the memset is lowered
into two loops: a main loop that stores a sufficiently wide vector splat of the
SetValue with the preferred memory access type and a residual loop that covers
the remaining bytes individually. If the memset size is statically known, the
residual loop is replaced by a sequence of stores.

This improves memset performance on gfx1030 (AMDGPU) in microbenchmarks by
around 7-20x.

I'm planning similar treatment for memset.pattern as a follow-up PR.

For SWDEV-543208.
DeltaFile
+1,896-0llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
+1,616-0llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+686-90llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
+218-116llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
+204-8llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+103-11llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
+4,723-22511 files not shown
+4,829-30217 files

LLVM/project 0d74c8cllvm/lib/CodeGen DwarfEHPrepare.cpp, llvm/test/CodeGen/AArch64 dwarf-eh-prepare-dbg.ll

DwarfEHPrepare: Use LibcallLoweringInfo analysis
DeltaFile
+39-15llvm/lib/CodeGen/DwarfEHPrepare.cpp
+7-0llvm/test/Transforms/DwarfEHPrepare/missing-analysis.ll
+1-1llvm/test/CodeGen/X86/dwarf-eh-prepare.ll
+1-1llvm/test/CodeGen/AArch64/dwarf-eh-prepare-dbg.ll
+1-1llvm/test/CodeGen/X86/dwarf-eh-prepare-dbg.ll
+1-1llvm/test/CodeGen/X86/dwarf_eh_resume.ll
+50-196 files

LLVM/project 76772f9llvm/lib/CodeGen SafeStack.cpp, llvm/test/Transforms/SafeStack/X86 abi_ssp.ll abi.ll

SafeStack: Use LibcallLoweringInfo analysis pass
DeltaFile
+44-15llvm/lib/CodeGen/SafeStack.cpp
+5-5llvm/test/Transforms/SafeStack/X86/abi_ssp.ll
+4-4llvm/test/Transforms/SafeStack/X86/abi.ll
+6-0llvm/test/Transforms/SafeStack/X86/missing-analysis.ll
+2-2llvm/test/Transforms/SafeStack/X86/ret.ll
+2-2llvm/test/Transforms/SafeStack/X86/setjmp.ll
+63-2855 files not shown
+152-11761 files

LLVM/project c4b3b47llvm/lib/CodeGen StackProtector.cpp, llvm/test/CodeGen/NVPTX no-stack-protector-libcall-error.ll

StackProtector: Use LibcallLoweringInfo analysis
DeltaFile
+55-27llvm/lib/CodeGen/StackProtector.cpp
+7-0llvm/test/Transforms/StackProtector/missing-analysis.ll
+2-2llvm/test/CodeGen/X86/stack-protector-atomicrmw-xchg.ll
+1-1llvm/test/Transforms/StackProtector/cross-dso-cfi-stack-chk-fail.ll
+1-1llvm/test/Transforms/StackProtector/stack-chk-fail-alias.ll
+1-1llvm/test/CodeGen/NVPTX/no-stack-protector-libcall-error.ll
+67-326 files

LLVM/project 5394129llvm/include/llvm/CodeGen LibcallLoweringInfo.h, llvm/include/llvm/CodeGen/GlobalISel LegalizerHelper.h

GlobalISel: Use LibcallLoweringInfo analysis in legalizer (#170328)

This is mostly boilerplate to move various freestanding utility
functions into LegalizerHelper. LibcallLoweringInfo is currently
optional, mostly because threading it through assorted other
uses of LegalizerHelper is more difficult.

I had a lot of trouble getting this to work in the legacy pass
manager with setRequiresCodeGenSCCOrder, and am not happy with the
result. A sub-pass manager is introduced and this is invalidated,
so we're re-computing this unnecessarily.
DeltaFile
+104-111llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+43-30llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
+32-31llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+16-9llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
+9-9llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+11-5llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
+215-1959 files not shown
+242-20815 files

LLVM/project 3b1a747mlir/lib/Bindings/Python TransformInterpreter.cpp

[mlir][Python] remove stray nb::cast (#176299)

In https://github.com/llvm/llvm-project/pull/155114 we removed
`liveOperations` but forgot this line which was being used to invalidate
operations under a transform root, which currently isn't being used for
anything. So remove.

FYI this led to a subtle double free bug after
https://github.com/llvm/llvm-project/pull/175405:

```python
@test_in_context
def check_builtin():
    module = builtin_d.ModuleOp()
    with module.context, ir.Location.unknown():
        transform_module = builtin_d.Module.create()
        transform_module.operation.attributes["transform.with_named_sequence"] = (
            ir.UnitAttr.get()
        )

    [34 lines not shown]
DeltaFile
+0-6mlir/lib/Bindings/Python/TransformInterpreter.cpp
+0-61 files

LLVM/project 85b6d43llvm/lib/CodeGen TargetLoweringBase.cpp

TargetLowering: Avoid getLibcallName in getSafeStackPointerLocation (#176362)

DeltaFile
+5-5llvm/lib/CodeGen/TargetLoweringBase.cpp
+5-51 files

LLVM/project 8193ab1llvm/lib/Target/XCore XCoreSelectionDAGInfo.cpp

XCore: Use memcpy_align_4 through LibcallImpl (#176363)

DeltaFile
+7-4llvm/lib/Target/XCore/XCoreSelectionDAGInfo.cpp
+7-41 files

FreeBSD/ports f0b9a73shells/sash Makefile

shells/sash: broke on FreeBSD 15

This port requires struct msdosfs_args, which is now kernel-only.

See also:       https://reviews.freebsd.org/D50718

(cherry picked from commit d7fdb3471c32765c89146c4333c5b984361ad4ab)
DeltaFile
+3-0shells/sash/Makefile
+3-01 files

FreeBSD/ports 523cabdgraphics/sdl2_gpu Makefile pkg-descr

graphics/sdl2_gpu: disable DOCS option due to OOM condition in graphviz

For some reason graphviz now needs more than 20 GB to process one of
the figures in the documentation of this project.

Disable docs to avoid OOM conditions.

MFH:            2026Q1
(cherry picked from commit 1f4db82dbd52c18499fb8f7d222415324877dff3)
DeltaFile
+3-0graphics/sdl2_gpu/Makefile
+1-1graphics/sdl2_gpu/pkg-descr
+4-12 files

FreeBSD/ports d684014cad/spice/files patch-src_include_misc_h

cad/spice: fix build on FreeBSD 15.0

The timezone symbol now follows POSIX on FreeBSD 15.0.
Remove spice's own declaration, which seems to have gone unused in any
case.

See also:       https://reviews.freebsd.org/D44281
Approved by:    portmgr (build fix blanket)
MFH:            2026Q1

(cherry picked from commit 46b4e04137ac569c1bbcd3965c087e785c70bc55)
DeltaFile
+14-5cad/spice/files/patch-src_include_misc_h
+14-51 files

FreeBSD/ports 54a77bbemulators/tic-80 distinfo Makefile, emulators/tic-80/files patch-vendor_msf__gif_msf__gif.h

emulators/tic-80: bump msf-gif bundled dependency to v2.4

Upstream has nuked the repository, removing the v2.2 version of the
package.  Switch to v2.4 in the new repository to fix fetching.

See also:       https://github.com/notnullnotvoid/msf_gif/issues/14
MFH:            2026Q1

(cherry picked from commit 1f3a06bf4e1b4148db1e7df11ad1ab90e4ee6286)
DeltaFile
+11-0emulators/tic-80/files/patch-vendor_msf__gif_msf__gif.h
+3-3emulators/tic-80/distinfo
+2-2emulators/tic-80/Makefile
+16-53 files

FreeBSD/ports 54f8a1amisc/raspberrypi-gpioshutdown/files patch-Makefile

misc/raspberrypi-gpioshutdown: fix poudriere build

Replace ../.. with ${SYSDIR} for finding kernel files.

Approved by:    portmgr (build fix blanket)
MFH:            2026Q1

(cherry picked from commit d529e8ab0cd9602e1a211d409b3713cb94d8d487)
DeltaFile
+19-0misc/raspberrypi-gpioshutdown/files/patch-Makefile
+19-01 files