[SCEV] Look thru more expressions in isKnownMultipleOf (#219951)
Generalize the existing logic to look through AddRecs to look through
Add, Mul, and MinMax expressions in isKnownMultipleOf, noting that this
simply increases precision of added predicates, allowing us to add more
fine-grained predicates. It also fixes an underlying bug in the case the
AddRec wraps. The patch has no optimization impact at the moment, and
only serves to have higher precision in its sole user,
DependenceAnalysis.
Proof: https://alive2.llvm.org/ce/z/JLCqGJ
[llvm] Updates case folding rules to Unicode 18 (#223716)
This PR updates other Unicode tables started by
https://github.com/llvm/llvm-project/pull/198255
Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
[LLD][ELF] Reduce memory and file size of overlay thunk tests (#222565)
Add AT(address) to linker script to force generation of a program header
for each address. Without AT we get a single large program header that
takes up a large amount of memory and causes a large file to be
generated. This may prevent the test from running on a 32-bit machine
without a lot of memory. See comment on #200415
Also removed a superfluous --print-map from
aarch64-thunk-bit-overlay-reuse.s. This was used when constructing the
test but it is not needed.
ice: Add a failure injection facility
Add compile-time optional, non-sleeping fail points around every VF
creation resource boundary, before VF VSI reconstruction, and in the
GET_STATS validation path.
Provide an ICE-wide wrapper and device selector so other driver
subsystems can add scoped points without duplicating the failpoint
plumbing. Keep the current SR-IOV points and VF selector in an iov
child namespace.
Compile the facility only with options DRIVER_FAILPOINTS. This shared
option avoids a separate kernel option for every driver that provides
test-only injection hooks. Ordinary kernels contain no ICE failpoint
objects or sysctl nodes. Require an exact PF device name and
optionally a VF index before any point can fire. This prevents a stale
test setting from affecting another PF.
The hooks exposed two reset-lifetime defects while validating the
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[Flang][Driver]Implemented the support for option -f[no-]optimize-sibling-calls in Flang (#216650)
Added support for -foptimize-sibling-calls and
-fno-optimize-sibling-calls in Flang.
- Sibling call optimization is on by default and the driver pass the
option `-f[no-]optimize-sibling-calls` to flang -fc1.
- When `-fno-optimize-sibling-calls` flag is passed, it sets boolen
`DisableTailCalls` and this results in adding the LLVM IR attribute
`"disable-tail-calls"="true"` which disables sibling call optimization.
ice: Make VF VLAN requests idempotent
VF drivers replay their VLAN filters after a reset and may retry a
request whose reply was lost. The PF tracked only a count and sent
every requested ID back to the switch. After PF reset replay had
already restored the filters, duplicate VID 0 failed with
ICE_ERR_ALREADY_EXISTS and NACKed the entire VF batch.
Track exact VLAN membership for each VF. Compact requests to unique
IDs whose membership changes, enforce the configured limit against
those IDs, and update membership after each hardware operation so
partial failures cannot undercount filters. Treat already-present
adds and already-absent deletes as successful reconciliation and
suppress their misleading low-level error dump.
Validated on an E810-XXV with a host-attached iavf VF. A three-filter
limit was filled with VIDs 0, 1, and 4094. PF and CORE resets replayed
all three without a duplicate warning or ADD_VLAN NACK, and DTrace
confirmed a three-VID replay reached the PF. A fourth unique VID was
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This branch should build components from related branches on Jenkins too.
NOTE: THIS CHANGE AND ANY OTHERS IN Jenkinsfile SHOULD NOT GET PUSHED
INTO `master` WHEN IT IS READY FOR BEING ACTUALLY COMMITTED!
ice: Fix SR-IOV VF resource cleanup
ice_iov_uninit() freed each VF interrupt-map array without returning the
reserved indices to the device interrupt resource manager. Repeated VF
create and destroy cycles therefore exhausted the PF interrupt map even
though no VFs remained.
Return the interrupt allocation before freeing its map. Also split
software-only VSI release from hardware teardown so failures before
ice_initialize_vsi() do not issue invalid RSS, scheduler, and Free VSI
commands for an object firmware has never seen.
Keep a VF disabled until all of its resources and hardware state have
been created successfully. Clear the enabled state before teardown and
after any failed add so asynchronous mailbox processing cannot use a
partial or freed VSI. Consume VFLR status for inactive VF slots without
trying to reset a nonexistent VSI.
Track whether firmware currently owns each VSI and clear that ownership
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WebAssembly: Drive Emscripten EH from the exception model, drop the cl::opt (#223972)
Remove the deprecated -enable-emscripten-cxx-exceptions flag. This
should now be driven by the generic exception-model mechanisms. There
was also some special case handling of the -mllvm flag in the clang driver
which also needed removal.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[libc] Make it possible to join the main thread (#221177)
Joining the main thread currently crashes because its ThreadAttributes
has a null platform_data pointer, causing Thread::wait() to dereference
a null futex.
While this is not a frequently used feature, it is supported by other
implementations, and I believe it is required by POSIX (the exec page
says that the main thread is created in a joinable state, and neither
pthread_join nor pthread_exit mention them not working on the main
thread).
This patch sets up the main thread attributes during startup:
- allocate a static futex for the main thread's clear_tid and point
platform_data to it
- invoke set_tid_address to have the kernel clear the futex and wake
waiters on thread termination
- mark the main thread as joinable (it was previously defaulting to
detached)
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[SROA] Avoid unnecessary stack realignment when rewriting allocas (#222967)
SROA can introduce dynamic stack realignment when rewriting an aggregate
alloca as a vector. On SystemZ (`S64`), a five-pointer structure with
alignment 8 becomes `<5 x ptr>` with alignment 64, adding an alignment
mask and extra stack-frame setup instructions.
Create replacement allocas with the alignment inherited from the
original alloca and partition offset, then use `tryEnforceAlignment` to
request the preferred type alignment. This reuses the existing
stack-alignment check: when a natural stack alignment is specified,
promotions beyond it are rejected. Stronger inherited alignments are
preserved.
Add SROA-only regression coverage for `S64`, `S128`, unspecified natural
stack alignment, and explicit stronger alignments. Existing SROA,
debug-info, and NVPTX tests retain their original RUN lines and checks,
including the NVPTX vector stores.
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plugins: add error returns to plugins_configure()
These are not really errors. They indicate a possible issue
but should not error. An unknown hook may be normal given
that the plugin owning the hook is not installed.
We also don't consider hooks to return errors in a meaningful
way as they are meant as machinery to run a reconfiguration
which can register its own errors elsewhere in the system.
But this can give the user running manual queries a useful hint.
powerpc/pmap: Use dcbz to zero pages in the radix pmap
pagezero() was a plain store loop (bzero), which under the kernel build
flags (-mno-vsx -msoft-float) compiles to byte stores. dcbz
establishes a zeroed cache line directly in the cache without a
read-for-ownership fetch from memory, roughly halving the memory
transactions of page zeroing.
Measured on POWER9 (Raptor Blackbird, DD2.3, bare metal), zeroing a
cold 256 MB buffer with 128-byte scalar loops:
byte stores (current libkern memset) 8.6 GB/s
doubleword (std) stores 26.8 GB/s
dcbz 34.6 GB/s
dcbz raises an alignment interrupt on caching-inhibited mappings, and
the kernel does not emulate it, so mmu_radix_zero_page() falls back to
bzero() for any page whose memattr is not the write-back default. The
internal pagezero() callers only touch freshly allocated page-table
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[DenseMap] memcpy buckets with trivial copy constructor and destructor. NFC (#224193)
std::pair has a user-provided copy assignment operator, so
std::is_trivially_copyable is false. Define is weaker
isRelocatableBucket instead.
This optimizes some DenseMap instantiations within lld (e.g.
lld/ELF/SyntheticSections.cpp)
ice: Report VF queue enable failures as hardware errors
The ENABLE_QUEUES handler has already validated the queue selection
before attempting to enable Rx hardware. A timeout or unexpected queue
state is an operation failure, not an invalid virtchnl parameter.
Return VIRTCHNL_STATUS_ERR_ADMIN_QUEUE_ERROR for these failures, matching
the disable path. Keep ERR_PARAM for invalid requests and attempts to
enable unconfigured queues. Preserve the recorded state of queues which
were enabled before a later queue failed.
MFC after: 2 weeks
Sponsored by: BBOX.io
ice: Make VF queue transitions idempotent
The VF mailbox handler unconditionally submitted queue-disable
commands, including when a VF repeated a request or negotiated after a
PF reset had already destroyed its queues. Firmware can reject stale
Tx queue metadata, causing a NACK and unnecessary VF recovery.
Track queue configuration and enable state across virtchnl operations,
and clear it at VF and PF reset. Apply only hardware transitions that
are not already complete while preserving progress after a partial
failure. Validate queue configurations before mutating hardware so the
state maps remain trustworthy.
FreeBSD configures Tx hardware in CONFIG_VSI_QUEUES rather than
ENABLE_QUEUES, so track Tx configuration separately from Rx
configuration and enable state. Linux ice similarly tracks per-VF Tx
and Rx queue state and skips redundant transitions.
On an E810-XXV, the prior code emitted AQ_RC_EINVAL while configuring a
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[compiler-rt][ARM] Make ARMv4T assembly builtins interwork (#221725)
ARMv4T can't switch instruction state when a saved return address is
loaded directly into the pc. Several builtins did exactly that, so a
call from Thumb could call into Arm state and return without switching.
To mitigate that, this patch amends POP_PC and adds
POP_PC_WITH_REGS, which expand to sensible code depending on
what arch they are compiled for. ARMv5 and later keep direct pop-to-pc
forms. v4T returns through ip and bx.
[mlir][affine] Avoid folding out-of-bounds constant loads (#224076)
`AffineLoadOp::fold` could crash when folding a constant load with
out-of-bounds indices, including loads from zero-sized constant memrefs.
Check `ElementsAttr::isValidIndex` before indexing the constant
attribute and skip folding when the access is invalid.
Adds a regression test for `memref<0xi8>`.
Fixes #223949
Co-authored-by: Purnima Shrivastava <purnimashrivastava05@.com>
[CIR] Support bitfields when unaligned access is expensive (#223748)
This basically ports OGCG codepath to enable bitfields on AMDGPU.
Assisted by claude in test checks generation.
