[LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (#146238)
This patch improves the lowering of 128-bit unsigned division and
remainder by constants (UDIV/UREM) by avoiding a fallback to libcall
(__udivti3/uremti3) for specific divisors.
When a divisor D satisfies the condition (1 << ChunkWidth) % D == 1, the
128-bit value is split into fixed-width chunks (e.g., 30-bit) and summed
before applying a smaller UDIV/UREM. This transformation is based on the
"remainder by summing digits" trick described in Hacker’s Delight.
This fixes #137514 for some constants.
An unknown option should only allow hex, otherwise we accidentally allow all encoding types. The IANA list may contain options that are not inside the DHCPv4 or DHCPv6 maps
sound: enforce MASTER volume mute during playback
MASTER mute (vol.mute) works while audio is playing. However, if a
stream is stopped and restarted (PCMTRIG_STOP -> PCMTRIG_START), the
audio will resume even though the mixer shows the MASTER volume as
muted. Other streams that are already playing remain silent. New streams
may also start playing audio regardless of the MASTER mute state.
The volume feeder now considers the MASTER mute when determining whether
a channel should be muted. This ensures MASTER mute is consistently
enforced for all streams and removes the dependency on trigger-driven
state propagation.
Tested with Creative Labs CA0132 card.
MFC after: 1 week
Reviewed by: christos
Differential Revision: https://reviews.freebsd.org/D55605
(cherry picked from commit ac5ff2813027c385f9037b47b2b164d4c1bebd09)
[SLP]Do not match buildvector node, if current node is part of its combined nodes
If current buildvector node is part of the combined nodes of the
matching candidate node, this matching candidate must be considered as
non-matching to prevent wrong def-use chain
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/187491
[VPlan] Permit derived IV in isHeaderMask (#187360)
When matching scalar steps of the canonical IV, also match a derived IV
of the canonical IV if the derivation is essentially a no-op. Fixes a
failure in the mve-reg-pressure-spills.ll test when expensive checks are
enabled.
AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3
Codegen for v_dual_dot2acc_f32_f16/bf16 for targets that only have VOP3
version of the instruction.
Since there is no VOP2 version, instroduce temporary mir DOT2ACC pseudo
that is selected when there are no src_modifiers. This DOT2ACC pseudo
has src2 tied to dst (like the VOP2 version), PostRA pseudo expansion will
restore pseudo to VOP3 version of the instruction.
CreateVOPD will recoginize such VOP3 pseudo and generate v_dual_dot2acc.
mattermost: Set up rc.d script
Like many of the packages that target Docker installations, mattermost
does not daemonize. The rc.d script runs the process with daemonize(8)
(see the security/vaultwarden example).
Add tiering API
This commit modifies the truenas API to wrap around tiering design
in the following ways:
A new namespace zfs.tier. will be added. This contains global
configuration for systemwide tiering settings. Parameters include
- enabled: whether to enable tiering. This feature requries changes
to global ZFS behavior and we will have various internal checks
that check this value in datastore extend context methods.
- max_concurrent_jobs: the maximum number of concurrent rewrite
jobs (tier migrations for existing data).
- min_available_space: point in available space for a dataset where
tier migrations will error out.
The namespace will also support APIs for managing and querying
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[SPARC] Add TTI implementation for getting register numbers and widths (#180660)
Correctly inform transform passes about our registers; this prevents the
issue with the `find-last` test where the loop vectorizer pass
mistakenly thinks that the backend has vector capabilities and generates
vector types, which causes the backend to crash.
See also: https://github.com/sparclinux/issues/issues/69
[clang] Add implicit std::align_val_t to std namespace DeclContext for module merging (#187347)
When a virtual destructor is encountered before any module providing
std::align_val_t is loaded, DeclareGlobalNewDelete() implicitly creates
a std::align_val_t EnumDecl. However, this EnumDecl was not added to the
std namespace's DeclContext -- it was only stored in the
Sema::StdAlignValT field.
Later, when a module containing an explicit std::align_val_t definition
is loaded, ASTReaderDecl::findExisting() attempts to find the implicit
decl via DeclContext::noload_lookup() on the std namespace. Since the
implicit EnumDecl was never added to that DeclContext, the lookup fails,
and the two align_val_t declarations are not merged into a single
redeclaration chain. This results in two distinct types both named
std::align_val_t.
The implicitly declared operator delete overloads (also created by
DeclareGlobalNewDelete) use the implicit align_val_t type for their
aligned-deallocation parameter. When module code (e.g. std::allocator::
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[NFC][SPIRV] Run `spirv-val` on tests related to `SPV_ALTERA_arbitrary_precision_integers` (#187464)
https://github.com/KhronosGroup/SPIRV-Tools/pull/6232 landed support for
this extension in `spirv-val`.
This PR updates some relevant tests to run `spirv-val` on their output.
[LLVM][DAGCombiner] Limit extract_subvec(extract_subvec()) combine to vectors of the same type. (#187334)
The index operand of ISD::EXTRACT_SUBVECTOR is implicitly scaled by
vscale, which is effectively always one for fixed-length vectors. When
combining nested extracts we must ensure all use the same implicit
scaling otherwise the transform is not equivalent.
Fixes https://github.com/llvm/llvm-project/issues/186563
