[CIR] Implement 'simple' atomic inc/dec. (#222730)
This only works for types where a compare-exchange instruction (or just
a lock-free implementation matters) is possible, and a loop isn't
necessary. This is basically just a conversion of classic-codegen,
except it clarifies some of the logic (particularly around bools).
[CIR][NFCI] Refactor uses of 'mlir::Location' vs 'SourceRange' on calls/etc (#222981)
As a prerequisite to an upcoming patch, emitCall needs access to the
Clang source locations, not just the mlir::Location. We're going to need
this in quite a few more places in the future, since there are various
diagnostics that use clang locations in the code generation.
This patch also has to change the RAII source location stuff, which I
switched to SourceRange. This should improve the amount of data we give
for our source information.
I DID have to remove the assertion on it though, because we do have a
few places that intentionally wanted an invalid location if other stuff
wasn't available (see the CUDA use in particular), but otherwise this
should allow us to improve our source location info, AND use it for
diagnostics in the future.
iflibdd(9): Clarify resume during suspend rollback
The resume callback also runs when suspend fails, without an intervening
PCI power-state transition or configuration-space restore. Document
that drivers must not assume either has occurred.
MFC after: 2 weeks
Sponsored by: BBOX.io
ixgbe: Pause firmware recovery polling in low power
The firmware recovery callout continues polling controller registers
after a power transition. An inaccessible E610 GL_MNG_FWSM register
reads as all ones in D3, which looks like firmware recovery mode and
queues an iflib reset while the device is suspended. A later D0 poll
then reports recovery complete and queues another reset.
Pause and drain the callout before terminal stop policy is applied,
prevent an in-flight callback from rearming it, and restart polling
only after resume has cleared the wake state. Track callout
initialization so partial attach cleanup does not drain an uninitialized
callout.
The false transition was reproduced on a dual-port E610 with direct D3
and system S3. Validate the guard with wake-disabled and wake-armed D3,
three repeated D3 cycles per port, and an S3 magic-packet wake. Both
ports returned to D0 without a false recovery transition.
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NAS-143506 / 26.0.0 / Refuse to export VM disks without 512 byte sectors to VHDX, VDI or VMDK (by yocalebo) (#19694)
qemu-img can only write 512 byte sectors for these formats. If the VM
disk was set up with a different sector size the guest laid out its
partitions that way, so the exported image looks empty to any hypervisor
and will not boot. Raise a validation error and point the user at RAW or
QCOW2, which do not record a sector size.
Original PR: https://github.com/truenas/middleware/pull/19692
Co-authored-by: Caleb St. John <30729806+yocalebo at users.noreply.github.com>
Merge tag 'riscv-for-linus-7.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley:
"From a RISC-V point of view, there's one notable fix here, reverting
an earlier bogus fix to the pointer masking code. Fortunately the
practical impact appears to be small.
- Revert a bad fix, likely LLM-generated, in the pointer masking code
that confused the RISC-V hardware pointer masking implementation
with the Linux kernel tagged address feature
- Fix unexpected faults caused by kprobe instruction slot writes when
!CONFIG_STRICT_MODULE_RWX
- Fix unexpected faults on minimal configurations during runtime code
patching on !CONFIG_STRICT_MODULE_RWX systems
- Fix a misplaced variable clear causing incorrect reuse of previous
values in the RISC-V hardware feature probing code
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[RISCV] Remove Ventana Conditional Ops (#221042)
This extension is used by any silicon as far as I am aware.
If any person/company was reliant on this extension, the extension
can be added back in under the same/different name.
AI Usage: Assisted by Codex
iflib: Reject media changes during suspend
iflib gates its built-in administrative and media-status callbacks once
a power transition starts, but iflib_media_change() could still invoke a
driver while the device was suspending or suspended. Several drivers
perform PHY or firmware I/O directly from this callback.
Return EBUSY before invoking IFDI_MEDIA_CHANGE() unless the device is
active. ifmedia then restores the prior selection, avoiding both
suspended hardware access and an unvalidated configuration that would
need to be replayed during resume.
Validated with device suspend on 82579LM, I210, and I225-IT
controllers. Media-selection requests returned EBUSY on every
suspended device. Resume restored the linked management interfaces at
1 Gbps with working traffic and no watchdogs; unconfigured interfaces
retained their prior admin and link state.
Reviewed by: iflib (gallatin)
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[dsymutil] Test qualified name hashing for members (#223017)
hashFullyQualifiedName walks DW_AT_specification to reach a member's
enclosing struct, so the accelerator table entry for a type nested in an
out-of-line member function definition depends on that walk. Pin the
resulting hash.
The test has lived downstream since the fix that made the function take
its DWARFDie by value instead of by pointer, where the pointee went out
of scope during the walk. Give it a debug map of its own describing
member-hash/2.o rather than extending the shared dummy-debug-map.map,
which describes a different set of objects.
rdar://184990209
[mlir][AMDGPU] Keep `chipset` as a deprecated alias for `arch`
Renaming the option meant every existing invocation of these passes had
to be updated in lockstep. Accept the old spelling instead: `chipset` on
`convert-amdgpu-to-rocdl`, `convert-gpu-to-rocdl`, `convert-arith-to-amdgpu`,
`convert-math-to-rocdl` and `amdgpu-emulate-atomics`, and `chip` on
`gpu-lower-to-rocdl-pipeline`, which is what each of them was called
before the rename.
`arch` wins whenever it names a target; the alias is consulted only when
`arch` is still at the sentinel that means "no target given", so with
neither given the error still names the unusable default rather than an
empty string, and a stale alias value is reported as itself.
[mlir][ROCDL] Carry `arch`'s xnack/sramecc onto the module
`rocdl-attach-target` rejected a target ID that pinned xnack or sramecc,
because `#rocdl.target` feeds a TargetMachine and the backend no longer
accepts those two as subtarget features. Now that the module attributes
exist, migrate them instead of refusing: `TargetInfo` gains
`migrateArchFeaturesToModuleFlags`, which records the settings the target
ID pinned as `rocdl.xnack` / `rocdl.sramecc` on a module, and
`rocdl-attach-target` calls it on each module it attaches to.
A setting the target ID leaves open, or that the GPU does not support, is
left alone rather than written as false: an absent flag means "either",
so writing false would be a different request. That also means an
attribute already on the module survives an `arch` that says nothing
about the feature, while an `arch` that does pin it wins as the more
specific request.
[mlir][AMDGPU] Take an `arch` target ID instead of triple/chip/features
`features` was a general `-mattr` string, which needed a general feature
parser and let callers ask for arbitrary combinations we have no interest
in supporting. In practice the only things anyone sets are the wavefront
size and the xnack/sramecc settings that come off a device query.
Replace `triple`, `chip` and `features` with a single `arch` option that
names the target the way Clang does, parsed by `llvm::AMDGPU::TargetID`
rather than by hand. It accepts
- a processor, with optional target-ID modifiers: `gfx942`,
`gfx942:xnack+`, `gfx9-4-generic`;
- a triple: `amdgpu9.42-amd-amdhsa`;
- a full target ID: `amdcgn-amd-amdhsa--gfx90a:sramecc+:xnack-`, which
is what `rocminfo` prints for a device's ISA, so that output can be
pasted straight in.
Since `chipset=gfx942` becomes `arch=gfx942`, migration is a rename.
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[mlir] Migrate AMDGPU/ROCDL to targets, not chipset versions
**migration tl;dr:** `chipset=` becomes `triple=`, migrate off of
`amdgpu::Chipset` to `ROCDL::TargetInfo`, and eventually change
`gfxXYZ` to `amdgpuX.YZ-amd-amdhsa` in that `triple` argument.
`amdgpu::Chipset` was an awkward hack that was hard to keep up to date
with changes in the compiler/new architectures, and didn't properly
support generic targets (and has been strongly disfavored by the
compiler team).
This PR replaces `amdgpu::Chipset` with `ROCDL::TargetInfo`, a
structure that uses LLVM's TargetParser and the underlying LLVM
features tables to get the real nature of the target being compiled
for.
This also helps MLIR move to
new-style (`-mtriple=amdgpuX.YZ-amd-amdhsa`) over "old
style" (`-mtriple=amdgcn-amd-amdhsa -mcpu=gfxXYZ`) triples.
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[mlir][AMDGPU][NFC] Pre-commit tests for incorrect version checks
There'll be a refactoring from `amdgpu::Chipset` to
`ROCDL::TargetInfo`, thus also moving from chip version checks to
features checks. This commit adds tests for incorrect lowerings that
were allowed by the current code.
- gfx90c is >= gfx90a but stil needs atomic emulation (it doesn't
have buffer fmax and so on).
- gfx90c is also >= gfx90a but has no barrier back-off, so it needs
the inline asm workaround around `s_barrier` that it isn't getting
- gfx908 doesn't have a packed fp16 atomic add but we thought it did
- gfx950 is mistakenly allowing xf32 MFMAs
- gfx1200 is allowing permlane_swap instructions that it doesn't have
- gfx11.7 should be allowing OCP FP8 conversions but isn't on the list
This also cleans up some redundant tests with a --check-prefixes
AI disclosure: Claude found these and wrote the tests.
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[mlir][ROCDL] Add `rocdl.xnack` and `rocdl.sramecc` module attributes
Since 27eeb7370281, the AMDGPU backend takes the xnack
and sramecc target-ID settings from the `amdgpu.xnack` and
`amdgpu.sramecc` module flags instead subtarget features, making the
old usage a hard error.
This commit adds `rocdl.xnack` and `rocdl.sramecc` module attributes
to the discardable attribute list the ROCDL dialect defines in order
to represent these flags and adds translations for them.
Omitting them means to leave these modifiers at
their default "either" state, which isn't the same as setting them to
false.
AI disclosure: Claude wrote this code and I reviewed it and tried to
reword the comments to something better.
[AMDGPU] Expose buffer resource num_records width in TargetParser (#220103)
This also fixes the conflict in gfx12.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
[lldb] Use lowercase for path "lib\site-packages" on Windows. (#222816)
Using an uppercase "L" doesn't have any visible effect for most uses.
But if you create a zip file with `set(cpack_generator ZIP)`, you get a
zip file which contains both "lib/" and "Lib/". That produces odd
results if you extract it on Linux.
iflib: Own queue quiescence during power transitions
Perform a terminal datapath stop before suspend and shutdown
callbacks, then drain the private configuration taskqueue before
entering low power. Track power state independently of queue
ownership and prevent built-in admin, IOV, LED, and media-status
callbacks from accessing a suspended device.
Restore driver-specific state while the datapath remains stopped.
Initialize it exactly once on resume when the interface is
administratively up, and keep an administratively-down interface
stopped. Roll back the driver when suspend or child suspension fails.
Add ifdi_power_prepare() for policy which must be established before
the terminal stop. Use it to snapshot ixgbe(4) wake policy and preserve
X550EM PHY ordering, and remove the duplicate stop from aq(4).
Reviewed by: iflib (gallatin)
MFC after: 2 weeks
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bsd.sites.mk: use static CDN to download rust crates
static.crates.io is the recommended upstream download
path. This avoids "403 Forbidden" rate limiting results
when trying to download crates too fast. This also
seems to improve download speeds/latency.
As per https://crates.io/data-access#crate-content,
> Crates can be downloaded directly from the crates.io CDN
> [...]
> No rate limits apply to static.crates.io at present.
And as per https://crates.io/data-access#api,
> you are welcome to use the crates.io API provided you abide by the following limits:
> * A maximum of 1 request per second, and
> * A user-agent header that identifies your application.
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[CIR] Remove the NYI test case for a pointer-element vector (#223019)
#222736 removed CIR_AnyPtrType from VectorElementType, so `!cir.vector<2
x !cir.ptr<!s32i>>` no longer verifies. That stops
x86_64-aggregate-nyi.cir parsing at all, so the whole test fails rather
than just that case.
The case only pinned that the x86_64 bridge refuses the shape. No C or
C++ source produces it, since clang rejects a pointer element with
"invalid vector element type", so the verifier is the earlier and better
place for that rejection. The comment in isSupportedType justifying the
bridge-side exclusion is also removed.
Assisted-by: Cursor / claude-opus-5
Cache analysis-warning gates by diagnostic state
Avoid resolving the same disabled warning groups for every function.
Reuse one cached policy for the lifetime, uninitialized-use,
fallthrough, recursion, noexcept, and logical-error analysis gates.
CTMark O0 (3 samples, CPU 6): 29.439800 s -> 29.457833 s (+0.061%).
Impact on significant TUs in MLIR build time:
- `mlir/lib/RegisterAllDialects.cpp`: 1.5439% fewer retired
instructions.
- `mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp`: 0.7746% fewer retired
instructions.
Assisted-by: Codex
