LLVM/project 1d6853ellvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/Target/AMDGPU R600TargetMachine.cpp

formatting

Created using spr 1.3.7
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+4-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+3-3llvm/include/llvm/Passes/CodeGenPassBuilder.h
+3-3llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+10-103 files

LLVM/project 951cbballvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/Target/AMDGPU R600TargetMachine.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
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+4-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+3-3llvm/include/llvm/Passes/CodeGenPassBuilder.h
+3-3llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+10-103 files

LLVM/project 738baffllvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/Target/AMDGPU R600TargetMachine.cpp

formatting

Created using spr 1.3.7
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+4-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+3-3llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+3-3llvm/include/llvm/Passes/CodeGenPassBuilder.h
+10-103 files

LLVM/project 059acccmlir/include/mlir-c ExtensibleDialect.h, mlir/include/mlir/Bindings/Python IRTypes.h

[MLIR][Python] Add Python and C API of `mlir::DynamicType` (#182751)

This PR adds C and Python API support for `mlir::DynamicType`. It
primarily enables types in dialects that are dynamically generated via
IRDL to be constructed in Python, and allows retrieving the parameters
contained in a dynamic type from Python.

---------

Co-authored-by: Rolf Morel <rolfmorel at gmail.com>
DeltaFile
+75-0mlir/test/python/dialects/irdl.py
+64-0mlir/lib/Bindings/Python/IRTypes.cpp
+52-0mlir/lib/CAPI/IR/ExtensibleDialect.cpp
+40-0mlir/include/mlir-c/ExtensibleDialect.h
+12-0mlir/include/mlir/Bindings/Python/IRTypes.h
+243-05 files

LLVM/project 4b773acllvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
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+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+32-15llvm/include/llvm/Passes/CodeGenPassBuilder.h
+21-6llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+20-5llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+16-4llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
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+187-8813 files

LLVM/project d9822afllvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+59-41llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+85-0llvm/lib/Target/X86/X86AsmPrinter.h
+78-3llvm/include/llvm/CodeGen/AsmPrinter.h
+32-15llvm/include/llvm/Passes/CodeGenPassBuilder.h
+23-7llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+20-5llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+297-718 files not shown
+355-9514 files

LLVM/project 6359be8llvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
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+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+32-15llvm/include/llvm/Passes/CodeGenPassBuilder.h
+21-6llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+20-5llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+16-4llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+12-3llvm/include/llvm/CodeGen/AsmPrinter.h
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+169-8311 files

LLVM/project b303a70llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+32-15llvm/include/llvm/Passes/CodeGenPassBuilder.h
+21-6llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+20-5llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+16-4llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
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+187-8813 files

LLVM/project cfd7560llvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
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+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+12-3llvm/include/llvm/CodeGen/AsmPrinter.h
+7-6llvm/include/llvm/Passes/CodeGenPassBuilder.h
+5-6llvm/include/llvm/Target/TargetMachine.h
+3-3llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+3-2llvm/tools/llc/NewPMDriver.cpp
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LLVM/project b64cb4allvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+32-15llvm/include/llvm/Passes/CodeGenPassBuilder.h
+21-6llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+20-5llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+16-4llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+12-3llvm/include/llvm/CodeGen/AsmPrinter.h
+158-725 files not shown
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LLVM/project 8a78b2bllvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
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+12-3llvm/include/llvm/CodeGen/AsmPrinter.h
+69-422 files

LLVM/project 5973c79llvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+12-3llvm/include/llvm/CodeGen/AsmPrinter.h
+7-6llvm/include/llvm/Passes/CodeGenPassBuilder.h
+5-6llvm/include/llvm/Target/TargetMachine.h
+3-3llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+3-2llvm/tools/llc/NewPMDriver.cpp
+87-595 files not shown
+94-6611 files

LLVM/project f759d60llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+12-3llvm/include/llvm/CodeGen/AsmPrinter.h
+69-422 files

LLVM/project ff88b83llvm/lib/Transforms/Vectorize VPlanRecipes.cpp VPlanTransforms.cpp

[VPlan] Handle extracts for middle blocks also used by early exiting blocks. NFC (#181789)

Currently createExtractsForLiveOuts only handles creating extracts when
the middle block has one predecessor, but if an early exit exits to the
same block as the latch then it might have multiple predecessors.

This handles the latter case to avoid the need to handle it in
VPlanTransforms::handleUncountableEarlyExits. Addresses the comment in
https://github.com/llvm/llvm-project/pull/174864#discussion_r2794153217
DeltaFile
+8-18llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+0-24llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-11llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+4-5llvm/lib/Transforms/Vectorize/VPlan.h
+19-584 files

FreeBSD/doc 2d760fewebsite/content/ru/status/report-2025-10-2025-12 _index.adoc foundation-sta.adoc

website: translate Status report Q4 2026 to russian

Differential Revision: https://reviews.freebsd.org/D55437
DeltaFile
+183-0website/content/ru/status/report-2025-10-2025-12/_index.adoc
+143-0website/content/ru/status/report-2025-10-2025-12/foundation-sta.adoc
+94-0website/content/ru/status/report-2025-10-2025-12/freebsd-foundation.adoc
+87-0website/content/ru/status/report-2025-10-2025-12/sylve.adoc
+69-0website/content/ru/status/report-2025-10-2025-12/bhyve-cpuid.adoc
+58-0website/content/ru/status/report-2025-10-2025-12/lkpi-wireless.adoc
+634-025 files not shown
+1,533-131 files

LLVM/project 2617cc5llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/Analysis/CostModel/X86 clmul.ll

[TargetLowering][RISCV] Avoid ISD::MUL in expandCLMUL if hasBitTest or MUL requires a library call. (#182389)

Scalar multiply is not part of the most basic RISC-V ISA. Use a
and+setcc+select for these targets.

The and+setcc+select is also beneficial for targets with bit test
instructions. RISC-V may not get the full benefit here due to
not having a cmove-like instruction without Zicond.

Co-authored-by: fbrv <Fabio.Baravalle at gmail.com>
DeltaFile
+24,655-20,149llvm/test/CodeGen/RISCV/clmul.ll
+12,512-13,372llvm/test/CodeGen/RISCV/clmulr.ll
+12,350-13,322llvm/test/CodeGen/RISCV/clmulh.ll
+2,888-1,812llvm/test/CodeGen/X86/clmul.ll
+16-16llvm/test/Analysis/CostModel/X86/clmul.ll
+22-2llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+52,443-48,6731 files not shown
+52,451-48,6747 files

OpenBSD/ports wNc8GHegames/golly distinfo Makefile, games/golly/patches patch-gui-wx_makefile-gtk

   update golly to 5.0
VersionDeltaFile
1.8+2-2games/golly/distinfo
1.10+1-2games/golly/pkg/PLIST
1.2+1-1games/golly/patches/patch-gui-wx_makefile-gtk
1.25+1-1games/golly/Makefile
+5-64 files

OpenBSD/ports t7JlTEYdevel/py-async-lru distinfo Makefile

   update py-async-lru to 2.2.0
VersionDeltaFile
1.5+2-2devel/py-async-lru/distinfo
1.9+1-1devel/py-async-lru/Makefile
+3-32 files

FreeBSD/ports 8d9310csysutils/logrotate Makefile, sysutils/logrotate/files logrotate.conf.sample.in logrotate.conf.sample

sysutils/logrotate: Update 3.13.0 => 3.22.0

Changelogs:
https://github.com/logrotate/logrotate/releases/tag/3.14.0
https://github.com/logrotate/logrotate/releases/tag/3.15.0
https://github.com/logrotate/logrotate/releases/tag/3.15.1
https://github.com/logrotate/logrotate/releases/tag/3.16.0
https://github.com/logrotate/logrotate/releases/tag/3.17.0
https://github.com/logrotate/logrotate/releases/tag/3.18.0
https://github.com/logrotate/logrotate/releases/tag/3.18.1
https://github.com/logrotate/logrotate/releases/tag/3.19.0
https://github.com/logrotate/logrotate/releases/tag/3.20.0
https://github.com/logrotate/logrotate/releases/tag/3.20.1
https://github.com/logrotate/logrotate/releases/tag/3.21.0
https://github.com/logrotate/logrotate/releases/tag/3.22.0

Improve port:
- Switch from USE_GITHUB to tarball from upstream.
- Use SUB_FILES+INSTALL_DATA for logrotate.conf.sample instead of SED.

    [5 lines not shown]
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+23-0sysutils/logrotate/files/logrotate.conf.sample.in
+0-23sysutils/logrotate/files/logrotate.conf.sample
+0-19sysutils/logrotate/files/patch-logrotate.c
+0-19sysutils/logrotate/files/patch-config.c
+9-10sysutils/logrotate/Makefile
+0-11sysutils/logrotate/files/patch-logrotate.h
+32-821 files not shown
+35-857 files

LLVM/project 0285308llvm/include/llvm/Target TargetMachine.h, llvm/lib/Target/X86 X86TargetMachine.h

[CodeGen][NewPM] Name parameters in buildCodeGenPipeline

This is consistent with the coding style, and makes things consistent
between the various header files/improves readability slightly.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/182774
DeltaFile
+6-4llvm/include/llvm/Target/TargetMachine.h
+5-4llvm/lib/Target/X86/X86TargetMachine.h
+11-82 files

LLVM/project 384106bllvm/lib/Target/RISCV RISCVSchedAndes45.td, llvm/test/tools/llvm-mca/RISCV/Andes45 rvv-fp.s rvv-conversion.s

[RISCV] Update Andes45 vector floating-point arithmetic scheduling info (#181289)

This PR adds latency/throughput for all RVV floating-point arithmetic to
the andes45 series scheduling model.
DeltaFile
+1,447-1,447llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fp.s
+370-370llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s
+121-121llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
+105-34llvm/lib/Target/RISCV/RISCVSchedAndes45.td
+25-25llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
+2,068-1,9975 files

FreeBSD/ports 1ab6c62www/elinks Makefile distinfo

www/elinks: Update 0.19.0 => 0.19.1

Changelog:
https://github.com/rkd77/elinks/releases/tag/v0.19.1

- Switch from USE_GITHUB to tarball from upstream.
- Allow use more recent lua versions.

PR:     293038
DeltaFile
+4-6www/elinks/Makefile
+3-3www/elinks/distinfo
+7-92 files

LLVM/project e37c985libcxx/include/__atomic atomic.h

[libc++] Fix typo in atomic.h comment (#182719)

DeltaFile
+2-2libcxx/include/__atomic/atomic.h
+2-21 files

HardenedBSD/src 2ee4aa9sbin/init ttys, sys/conf options

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+39-3sys/dev/uart/uart_dev_ns8250.c
+14-14sbin/init/ttys
+4-0sys/conf/options
+1-1sys/sys/buf.h
+1-0sys/net/if_vlan.c
+59-185 files

HardenedBSD/src 35d7753sbin/init ttys, sys/conf options

Merge branch 'freebsd/current/main' into hardened/current/master
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+39-3sys/dev/uart/uart_dev_ns8250.c
+14-14sbin/init/ttys
+4-0sys/conf/options
+1-1sys/sys/buf.h
+1-0sys/net/if_vlan.c
+59-185 files

HardenedBSD/src af26c2asys/kern kern_syscalls.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+8-2sys/kern/kern_syscalls.c
+8-21 files

HardenedBSD/ports a93db25net-p2p/transmission-components Makefile, net-p2p/transmission-components/files patch-CMakeLists.txt patch-cmake_TrMacros.cmake

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+296-18net-p2p/transmission-components/files/patch-CMakeLists.txt
+85-144net-p2p/transmission-components/Makefile
+146-0net-p2p/transmission-components/files/patch-cmake_TrMacros.cmake
+97-0net-p2p/transmission-components/files/patch-cmake_Findlibutp.cmake
+92-0net-p2p/transmission-components/files/patch-cmake_FindLibevent.cmake
+76-0net-p2p/transmission-components/files/patch-cmake_Findlibdeflate.cmake
+792-162112 files not shown
+1,741-589118 files

LLVM/project 686acf6mlir/include/mlir/Dialect/MemRef/IR MemRefOps.td, mlir/include/mlir/Dialect/Tensor/IR TensorOps.td

[mlir] Make [tensor|memref]::ExpandShapeOp verifier stricter. (#181020)

The number of dynamic dims in output_shape is expected to be as the same
as the result type.

The revision also trims double whitespaces from the doc, because it also
updates the op description.

---------

Signed-off-by: hanhanW <hanhan0912 at gmail.com>
DeltaFile
+13-0mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
+6-5mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
+5-4mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
+8-0mlir/test/Dialect/MemRef/invalid.mlir
+7-0mlir/test/Dialect/Tensor/invalid.mlir
+6-0mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+45-93 files not shown
+49-139 files

OpenBSD/src LTkc1wQsys/dev/pci/drm/amd/amdgpu amdgpu_ras.c

   don't return an error when skipping sysfs bits in amdgpu_ras_sysfs_create()

   should avoid fatal init error on Radeon VII reported by Justin Roberts
VersionDeltaFile
1.17+2-4sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c
+2-41 files

FreeBSD/ports 6b50d38graphics/openexr Makefile distinfo, graphics/openexr-website-docs distinfo Makefile

graphics/openexr*: Security update to v3.4.5 and i386 fix

"Patch release that fixes an incorrect size check in
istream_nonparallel_read that could lead to a buffer overflow on invalid
input data."

Also fix i386 self-tests by adding -msse2: i386 builds require SSE2, but
the upstream cmake stuff does not enable this, so use CFLAGS_i386.

To prevent people seeing SIGILL crashes down late at run-time,
check if the CPU is sse2-capable by querying the clang compiler from
the pre-install script (pkg-plist's @preexec). Suggested by diizzy@.
  Other than that we could use the cpuid or the lscpu port instead, but
let's for now assume everything that wants to run OpenEXR also has a
working cc that is clang and has -march=native and gives us CPU details).
(GCC also gives us this but will use a different output format.)

While here, make failed tests verbose through ctest's environment so we
can see what's up from the build log already. (We need to go through

    [6 lines not shown]
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+15-2graphics/openexr/Makefile
+3-3graphics/openexr/distinfo
+3-3graphics/openexr-website-docs/distinfo
+1-1graphics/openexr-website-docs/Makefile
+1-0graphics/openexr/pkg-plist
+23-95 files