[Clang][SVE ACLE] Remove +bf16 requirement from neon-sve bridge builtins. (#205332)
These builtins only care about the size of the element type and do not
require bfloat specific instructions.
[AMDGPU] Accept sext addresses when folding image ops to a16 (#203189)
canSafelyConvertTo16Bit() only accepts a zext when narrowing image
address coordinates to 16 bits. Add an opt-in AllowI16SExt flag so a
sext from i16 is accepted too, and enable it for sampler-less image
instructions.
Coordinates of sampler-less loads/stores are unsigned, so sext and zext
only disagree for a negative i16 (>= 0x8000), which is already out of
bounds since the maximum image dimension is <= 0x8000. Accepting the
sext therefore lets such coordinates fold to the a16 form, reducing VGPR
pressure.
Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>
newvers.sh: Avoid spurious -dirty in git revision
If git is installed and .git exists but git rev-parse failed to report a
hash we previously produced just "-dirty" as the git revision. Gate the
git commit count and -dirty check on the rev-parse passing.
Reviewed by: jlduran
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57995
[VPlan] Optimize pre-increment IV latch users with tail folding (#206499)
This was noticed after #204089 caused IndVarsSimplify to convert some
live out IV users to use the pre-incremented IV, not the
post-incremented.
Tail folded live-outs don't have the `(extract-last-lane
(extract-last-part foo))` form, but instead have the form `(extract-lane
(last-active-lane header-mask), foo)`.
For post-incremented IVs in tail folding, these are converted to
VPInstruction::ExitingIVValue which are handled separately. But
ExitingIVValue can't be used for the pre-incremented IV. So this teaches
optimizeLatchExitInductionUser to detect the last-active-lane of the
header mask form.
[ADT][NFC] Remove unused includes in DenseMap/DenseSet headers (#207282)
Remove unused includes in DenseMap/DenseSet headers.
`llvm/Support/AlignOf.h` was transitively included in
`llvm/Support/JSON.h`
opentofu: updated to 1.12.3
1.12.3
BUG FIXES:
Properly handle TF_ENCRYPTION with only blank spaces.
The value resulted from the lifecycle.enabled evaluation now has its deprecation marks processed correctly
Update documentation to clarify the usage restriction of ephemeral values in lifecycle.enabled.
tofu console -lock=false now works as intended.
SECURITY ADVISORIES:
Previous releases in the v1.12 series could read an arbitrary file during certain git operations via a maliciously crafted URL
Advisory: GHSA-q7j3-v8qv-22vq
[mlir][OpenMP] Change device declare target functions to hidden visibility (#207234)
During OpenMP lowering, globally visible device functions are emitted.
These functions might not be kernels themselves, but are designed to
only be called in a kernel context. However, if they are unused, and not
inlined, and reference LDS, the AMDGPU ISel emits lots of misleading
warnings related to "local memory global used by non-kernel function".
Fix by changing visibility from external+default to external+hidden,
which allows DCE to just remove the functions.
Claude assisted with this patch.
[M68k] Fix build after removal of RegisterClasses pointer array (#207364)
Commit 4d8ec1968023 ("[CodeGen][NFC] Remove RegisterClasses pointer
array (#207204)") removed regclass_begin()/regclass_end() from
TargetRegisterInfo, so those names now resolve to the MCRegisterInfo
versions whose iterator dereferences to a MCRegisterClass rather than a
const TargetRegisterClass *, breaking getMaximalPhysRegClass():
error: cannot convert 'const llvm::MCRegisterClass' to
'const llvm::TargetRegisterClass*' in initialization
M68k was not updated in that commit. Switch to the range-based
regclasses() idiom used elsewhere in the same change.
Regressor: 4d8ec1968023 ("[CodeGen][NFC] Remove RegisterClasses pointer
array") (#207204)
py-treq: updated to 26.7.0
26.7.0 (2026-07-01)
Features
- Document support for Python 3.14.
- PyPy 3.11 is now supported, and PyPy 3.9 and 3.10, which are no longer well-supported by the ecosystem, have been dropped.
Bugfixes
- treq no longer vendors the ``multipart`` library, now that it no longer has import conflicts with ``python-multipart``.
- Fix building documentation with Sphinx 9.1.0.
Deprecations and Removals
- treq no longer depends on `requests`. Consequently, the ``cookies()`` method no longer returns a `requests.cookies.RequestsCookieJar <https://requests.readthedocs.io/en/latest/api/#requests.cookies.RequestsCookieJar>`_. Instead, it returns `treq.cookies.IndexableCookieJar`, which implements ``__getitem__`` as a compatibility shim. We have *not* attempted to maintain full dict-interface compatibility with ``RequestsCookieJar``, as many of its interface extensions are difficult to use securely because they obscure the relationship between cookies and domains. treq interfaces still accept a ``request.cookies.RequestsCookieJar`` as the *cookies* parameter, like any `http.cookiejar.CookieJar` subclass.
- Support for Python 3.8, which has reached end of support, has been dropped.
[AArch64] Minor simplification in aarch64-ldst-opt with an early return (#207182)
Remove the local `MBBIWithRenameReg` by moving an early return at an
even earlier point.
When `MBBIWithRenameReg` is set we always return early. By moving the
early return to `MBBIWithRenameReg` update we get rid of a local
variable which spans 200+ lines. This also fixes a misleading debug
print between `MBBIWithRenameReg` update and early return:
```
LLVM_DEBUG(dbgs() << "Unable to combine these instructions due to "
<< "interference in between, keep looking.\n");
```
This line shouldn't be printed when we set `MBBIWithRenameReg`, which is
fixed with this change.
py-zope.testing: updated to 6.2
6.2 (2026-07-03)
- Add support for Python 3.15.
- Deprecate ``zope.testing.doctestcase`` in favour of plain ``doctest``
(e.g. ``doctest.DocTestSuite`` or ``doctest.DocFileSuite``).
- Move package metadata from setup.py to pyproject.toml.
[X86] haddsub-undef.ll - sync more testnames with their phaseordering equivalents (#207370)
Ensure we have equivalent hadd/sub middle-end test coverage with similar names for lookup
