[MLIR] Add missing MLIRPass dep when DMLIR_ENABLE_PDL_IN_PATTERNMATCH=OFF used (NFC) (#208289)
When PDL dialect is disabled during build stage
(`DMLIR_ENABLE_PDL_IN_PATTERNMATCH=OFF`) we got a compiler errors due to
some of pdl deps transitively includes `MLIRPass` but without PDL this
dep missing and lead to compile errors
[mlir][acc] Specialize acc.on_device with constant arg for device (#208099) (#208351)
Fold known result acc.on_device to a constant in device-side code.
Re-submitted PR due to accidental stack PR merge
[clang] add triple to `test/SemaCXX/deduced-return-type-cxx14.cpp` (#208340)
Fixes issue reported here:
https://github.com/llvm/llvm-project/pull/208285#issuecomment-4919717057
Since that test file now uses the `cdecl` attribute, which is not
supported in some targets, pin that test to x86_64 triple.
[flang][acc] Emit acc.on_device operation for acc_on_device call (#208098)
It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
prusaslicer: update to 2.9.6
PrusaSlicer 2.9.6
Changes with respect to 2.9.6-rc1:
* Toolpath moves between FLUSH_START and FLUSH_END tags are now not shown in
the G-code preview.
* Fan speed was incorrectly being restored to the value belonging to wrong
filament when toolchange command was prepended by whitespace.
PrusaSlicer 2.9.6-rc1
Improvements with respect to 2.9.6-beta1
* Use area-dominant extruder instead of the default one when applying "Maximum
width of a segmented region".
* Incorporate filament_load_time and filament_unload_time into cooling
slowdown logic.
[66 lines not shown]
[flang][acc] Emit acc.on_device operation for acc_on_device call (#208098)
It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
dev/ic/mpt_netbsd.c - another clang appeasement attempt
and change all strncat() (which were not what was intended)
into strlcat() which implement the original intent.
[clang] Fix type of the MaterializeTemporaryExpr with incomplete array type. (#187618)
This affects constructs like `int f(int (&&x)[]); int z = f({1});`.
A temporary logically can't have incomplete type: if we don't know the
type, we can't materialize it. Rearrange the casts to make more sense.
I'm not sure this has any practical effects at the moment due to the way
we use skipRValueSubobjectAdjustments; we usually end up ignoring the
type of the MaterializeTemporaryExpr.
[LLDB] Add an API to check whether a variable is writable (#208042)
IDEs may offer functionality to set a variable to a specific value.
There are many situations where this isn't actually possible, for
example, if the variable's value is a constant or the result of a
complex DWARF expression. Instead of offering to change a value only to
have it fail with an error, this API lets the IDE query whether setting
a value is generally feasible so it can hide the action where it isn't
applicable.
rdar://142358140
Assisted-by: claude
[X86] Split FLDEXP when AVX512 is not available (#208292)
Mark the 512-bit types Custom only under useAVX512Regs(); otherwise
generic type legalization splits FLDEXP into the legal narrower halves
that LowerFLDEXP handles.
Add a LIT test for the v8f64 -> two 256-bit vscalefpd split.
Co-authored-by: Yanliang Mu <yanliang.mu at intel.com>
[flang][cuda] Register device/constant globals as device-resident under -gpu=mem:unified (#208336)
```fortran
module m
integer, device :: aaa; bind(c, name='aaa_from_c') :: aaa
integer, constant :: zzz; bind(c, name='zzz_from_c') :: zzz
end module
```
```c
extern int aaa_from_c;
#pragma acc declare create(aaa_from_c) // same for zzz_from_c
```
In this code, under `-gpu=mem:unified` a module-scope device/constant
global is registered only as a CUDA variable. Another translation unit
that declares the same symbol on the host can make it be treated as host
memory, so the device symbol is unresolved at run time.
Fix: emit `cuf.register_variable_static` for device/constant globals
under `mem:unified` so they are additionally registered as
device-resident.
[SSAF] Replace std::set with SetVector for deterministic order of contributor Decls
The container `std::set<const NamedDecl *>` created a
non-deterministic traversal order for a contributor's `Decls`, making
the resulting representative `Decls[0]` non-deterministic as well.
Also fix typos in assertion messages.
Follow-up to #204482.
[SSAF][WPA] Operator new/delete overload entities that shall retain their types
A follow-up change to #206600. This commit adds the WPA
implementation for those operator new/delete overload entities that
shall retain their types. This WPA result will later be used to
filter unsafe buffer analysis results.
rdar://179151541
NAS-141710 / 27.0.0-BETA.1 / Add ISCSI_DISK device type to VM API (#19281)
Adds VMISCSIDiskDevice and VMISCSIDiskTarget to the v27 API model, wires
the ISCSI_DISK dtype through factory_utils, and calls
check_pci_slot_conflicts() from _validate_device() so PCI slot
collisions are caught at vm.device.create/update time rather than
failing silently at VM start.
Also:
- Add NIC pci_address slot validation
Override VMNICDelegate.validate_middleware() to enforce machine-topology
slot rules using pci_slot_error_for_machine(): PCIe machines (q35 /
aarch64 virt) require slot == 0 on point-to-point ports; i440fx PCI
bridges reserve slot 0 for the SHPC controller so usable slots start at
1. Machine type is read from the VM instance, which is already in hand
at create/update time.
- Tighten VMNICPciAddress constraints
[flang][cuda] Switch CUFAllocDelay to operate on fir.declare (#208334)
CUFAllocDelay previously matched hlfir.declare, requiring it to run
before HLFIR-to-FIR lowering. Match fir.declare instead so the pass can
be scheduled with the other CUF preparation passes (which also operate
on fir.declare), before cuf.alloc is lowered. The delay logic is
unchanged.
[ConstraintEli] Add more tests with latch guarded loops+overflows (NFC) (#208328)
Add additional tests with latch controlled loops and cases where we
currently bail out due to constraint-system overflows.