FreshBSD

LLVM/project f14a8aa — llvm/test/CodeGen/X86 bit-manip-i512.ll bit-manip-i256.ll

2026-03-05 16:13:56 UTC by Simon Pilgrim via GitHub on ⎇

main

[X86] add i256/i512 bit manipulation tests suggested by #132601 (#184813)

Delta		File
+6,520	-0	llvm/test/CodeGen/X86/bit-manip-i512.ll
+3,257	-0	llvm/test/CodeGen/X86/bit-manip-i256.ll
+9,777	-0	2 files

FreeBSD/src 6d2a147 — contrib/libedit map.c

2026-03-05 16:13:08 UTC by Baptiste Daroussin (bapt) on ⎇

main

libedit: fix use after free

Delta		File
+2	-2	contrib/libedit/map.c
+2	-2	1 files

LLVM/project 6b3f57d — lldb/test/API/python_api/block TestFrameBlocks.py

2026-03-05 16:12:19 UTC by John Harrison via GitHub on ⎇

main

[lldb] Skip SBBlock test on Windows. (#184818)

Skipping this test to unblock CI.

Delta		File
+1	-0	lldb/test/API/python_api/block/TestFrameBlocks.py
+1	-0	1 files

NetBSD/pkgsrc-wip 917b2de — labwc distinfo Makefile

2026-03-05 16:10:24 UTC by kikadf on ⎇

master

labwc: update to 0.9.5

Delta		File
+3	-3	labwc/distinfo
+1	-1	labwc/Makefile
+4	-4	2 files

LLVM/project a9fb8b0 — mlir/lib/Conversion/VectorToXeGPU VectorToXeGPU.cpp, mlir/test/Conversion/VectorToXeGPU contract-to-xegpu.mlir

2026-03-05 16:08:55 UTC by Dmitry Chigarev via GitHub on ⎇

main

[MLIR][XeGPU] Support vector.contract transpose_a/transpose_b via 'vector-to-gpu' patterns (#182885)

The PR adds [`vector.contract(transpose_a/transpose_b)` decomposition
patterns](https://github.com/llvm/llvm-project/blob/3215645b8d81bbef7db1d16b88de7ed0288f2274/mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp#L1263)
from `vector-to-gpu` to `vector-to-xegpu` pass.

The `populatePrepareVectorToMMAPatterns` adds two patterns:
1. `PrepareContractToGPUMMA` that splits `vector.contract(transpose)`
into `vector.transpose + vector.contract`
2. `CombineTransferReadOpTranspose` that fuses `vector.transpose` into
the permutation map of `vector.transfer_read`

The second pattern doesn't always bring us to the desired result
(`xegpu.load_nd + vector.transpose + xegpu.dpas`) since [not all data
types are supported
](https://github.com/llvm/llvm-project/blob/1237bd6df05a4777f444677186e4814388916ea9/mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp#L570-L575)
for the transposed-read case. There's a second PR (#182875) on this
matter that adds a decomposition-pattern for unsupported types (it might
seem strange that we first fuse and then decompose

    [5 lines not shown]

Delta		File
+50	-36	mlir/test/Conversion/VectorToXeGPU/contract-to-xegpu.mlir
+2	-0	mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
+52	-36	2 files

LLVM/project 3925d11 — mlir/lib/Conversion/VectorToXeGPU VectorToXeGPU.cpp, mlir/test/Conversion/VectorToXeGPU transfer-read-to-xegpu.mlir

2026-03-05 16:08:22 UTC by Dmitry Chigarev via GitHub on ⎇

main

[MLIR][XeGPU] Decompose unsupported 'vector.transfer_read'-transpose-permutations (#182875)

The PR adds a pattern to `vector-to-xegpu` pass that decomposes
`vector.transfer_read` with unsupported transpose-permutations
(unsupported element-type) into `vector.transfer_read +
vector.transpose`:

Example:

```mlir
// input-ir:
  %0 = vector.transfer_read %source[%offset, %offset], %c0
    {permutation_map = affine_map<(d0, d1) -> (d1, d0)>,
    in_bounds = [true, true]} : memref<32x64xf16>, vector<8x16xf16>

// mlir-opt %s --convert-vector-to-xegpu
// before PR (no conversion because of unsupported type):
  %0 = vector.transfer_read %source[%offset, %offset], %c0
    {permutation_map = affine_map<(d0, d1) -> (d1, d0)>,

    [10 lines not shown]

Delta		File
+31	-26	mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
+6	-4	mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
+37	-30	2 files

LLVM/project efb6f54 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-ext-rv64.ll

2026-03-05 16:07:48 UTC by Craig Topper via GitHub on ⎇

main

[RISCV] Don't make ISD::ABDS/ABDU legal for v2i32 with P extension. (#184753)

We don't have the instructions for this so it causes a cannot select
error.

Delta		File
+36	-6	llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+3	-1	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+39	-7	2 files

LLVM/project 5c3d0dd — mlir/lib/Dialect/MemRef/IR MemRefOps.cpp, mlir/test/Dialect/MemRef canonicalize.mlir

2026-03-05 16:04:58 UTC by Mehdi Amini via GitHub on ⎇

main

[mlir][memref] Fix crash in DimOp::fold for subview with ambiguous dropped dims (#183995)

When a rank-reducing subview has multiple size-1 source dimensions and
all strides are dynamic, `computeMemRefRankReductionMask` cannot
unambiguously determine which dimension is dropped. It would fall back
to an arbitrary choice that could be wrong.

In `DimOp::fold`, the code then maps a result dimension to that
(possibly incorrect) source dimension and asserts
`isDynamicSize(sourceIndex)`. If `getDroppedDims()` picked the wrong
dropped dim, the source dim at `sourceIndex` may be statically sized,
causing the assertion to fire.

Fix this by replacing the assert with a guard that returns `{}` (no
fold) when the resolved source dimension is not dynamic. This is safe
because the fold already handles the statically-sized result case
earlier.

Fixes #111244

Assisted-by: Claude Code

Delta		File
+12	-14	mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+21	-0	mlir/test/Dialect/MemRef/canonicalize.mlir
+33	-14	2 files

LLVM/project 228dac2 — clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CIR/CodeGenBuiltins/AArch64 acle_sve_dup.c

2026-03-05 16:03:50 UTC by Andrzej Warzynski on ⎇

users/banach-space/cir/cleanup

Address PR comments

Delta		File
+42	-42	clang/test/CIR/CodeGenBuiltins/AArch64/acle_sve_dup.c
+30	-30	clang/test/CodeGen/AArch64/neon/intrinsics.c
+6	-6	clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+4	-4	clang/test/CodeGen/AArch64/neon/fullfp16.c
+82	-82	4 files

LLVM/project 2580ddf — flang CMakeLists.txt

2026-03-05 16:03:37 UTC by Daniel Chen via GitHub on ⎇

main

[flang] Fix distribution build of `ISO_Fortran_binding.h` to also install it in `CMAKE_INSTALL_INCLUDEDIR`. (#184284)

Currently with `-DLLVM_DISTRIBUTION_COMPONENTS="flang-fortran-binding"`,
header file `ISO_Fortran_binding.h` is only installed at
`./lib/clang/23/include/ISO_Fortran_binding.h`, but not in the user
include.
This PR is to fix that so that the `ISO_Fortran_binding.h` is also
installed at `./include/flang/ISO_Fortran_binding.h`, which is the same
as the "normal" (non-distribution) build.

Delta		File
+4	-0	flang/CMakeLists.txt
+4	-0	1 files

LLVM/project e9657a1 — lld/test/COFF base.test stack.test, llvm/lib/Object COFFModuleDefinition.cpp

2026-03-05 16:01:58 UTC by Will via GitHub on ⎇

main

COFF: Allow hex literals in .def files: BASE/HEAPSIZE/STACKSIZE (#184764)

For a Win32 DLL, a .def file can have a custom executable base:
```
LIBRARY "stub.dll" BASE=0x10000000
```

Currently the parser enforces Base 10, but [Microsoft's
documentation](https://learn.microsoft.com/en-us/cpp/build/reference/rules-for-module-definition-statements?view=msvc-170)
states "Numeric arguments are specified in base 10 or hexadecimal".

This fixes that, and also HEAPSIZE and STACKSIZE (which use the same
function).

There are a few more instances of `getAsInteger` that expect base10 -
for ordinals and the VERSION directive. Since I don't have an
in-the-wild example of a .def file using hexadecimal for these, I am
wary about changing those too.

Delta		File
+15	-0	lld/test/COFF/base.test
+6	-0	lld/test/COFF/stack.test
+6	-0	lld/test/COFF/heap.test
+1	-1	llvm/lib/Object/COFFModuleDefinition.cpp
+28	-1	4 files

FreeBSD/ports 5ddf3be — multimedia/navidrome distinfo Makefile

2026-03-05 16:01:00 UTC by Jesús Daniel Colmenares Oviedo (dtxdf) on ⎇

main

multimedia/navidrome: Update to 0.60.3

ChangeLog: https://github.com/navidrome/navidrome/releases/tag/v0.60.3

Delta		File
+7	-7	multimedia/navidrome/distinfo
+3	-3	multimedia/navidrome/Makefile
+10	-10	2 files

LLVM/project 8bcfd58 — flang-rt/lib/runtime execute.cpp, lldb/test/API/python_api/block TestFrameBlocks.py TestBlocks.py

2026-03-05 16:00:51 UTC by Vitaly Buka on ⎇

users/vitalybuka/spr/libcxxstring-replace-asan-volatile-wrapper-with-memory-barrier

asm

Created using spr 1.3.7

Delta		File
+177	-0	mlir/unittests/IR/VerifierTest.cpp
+64	-64	flang-rt/lib/runtime/execute.cpp
+2	-104	llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+60	-3	mlir/lib/IR/Verifier.cpp
+59	-0	lldb/test/API/python_api/block/TestFrameBlocks.py
+0	-59	lldb/test/API/python_api/block/TestBlocks.py
+362	-230	133 files not shown
+887	-519	139 files

LLVM/project 749df98 — clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Headers arm_acle.h

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! More small fixes

Delta		File
+15	-37	clang/lib/Sema/SemaARM.cpp
+11	-0	clang/test/Sema/AArch64/pcdphint-atomic-store.c
+5	-3	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+2	-2	clang/lib/Headers/arm_acle.h
+0	-1	clang/test/CodeGen/arm_acle.c
+33	-43	5 files

LLVM/project 0b62aa3 — clang/lib/CodeGen/TargetBuiltins ARM.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64ExpandPseudoInsts.cpp

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Fixes for Caroline

Delta		File
+27	-0	llvm/test/CodeGen/AArch64/pcdphint-atomic-store-diagnostic.ll
+1	-12	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2	-2	llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+0	-3	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+30	-17	4 files

LLVM/project 24fda04 — clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Sema SemaARM.cpp

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Final changes before merge

Delta		File
+47	-0	llvm/test/Verifier/AArch64/intrinsic-immarg.ll
+0	-47	llvm/test/Verifier/intrinsic-immarg.ll
+2	-4	clang/lib/Sema/SemaARM.cpp
+2	-2	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+51	-53	4 files

LLVM/project 5bb8e40 — clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Headers arm_acle.h

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Address Carol's comments and fix git clang-format issues

Delta		File
+27	-0	llvm/test/CodeGen/AArch64/pcdphint-atomic-store-diagnostic.ll
+20	-0	llvm/lib/IR/Verifier.cpp
+12	-6	clang/lib/Sema/SemaARM.cpp
+0	-11	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+2	-4	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+4	-2	clang/lib/Headers/arm_acle.h
+65	-23	6 files

LLVM/project 3e8af58 — clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Sema SemaARM.cpp

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Move code to `AArch64ExpandPseudoInsts` and `getTgtMemIntrinsic`

Move code to `AArch64ExpandPseudoInsts` and `getTgtMemIntrinsic`
and use tablegen pattern for intrinsic, plus other small review changes.

Delta		File
+47	-75	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+69	-32	llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+42	-47	clang/lib/Sema/SemaARM.cpp
+21	-12	llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+10	-12	llvm/lib/Target/AArch64/AArch64InstrInfo.td
+17	-5	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+206	-183	5 files not shown
+220	-192	11 files

LLVM/project f3b4f6f — clang/lib/Sema SemaARM.cpp, llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Address more helpful review comments from Kerry

Delta		File
+160	-0	llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+4	-4	llvm/lib/Target/AArch64/AArch64InstrInfo.td
+1	-4	clang/lib/Sema/SemaARM.cpp
+0	-5	llvm/lib/Target/AArch64/AArch64InstrFormats.td
+165	-13	4 files

LLVM/project b2417b3 — llvm/lib/Target/AArch64 AArch64InstrFormats.td

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Add $policy to MIOperandInfo

Delta		File
+1	-1	llvm/lib/Target/AArch64/AArch64InstrFormats.td
+1	-1	1 files

LLVM/project 7fadeed — clang/lib/Sema SemaARM.cpp, clang/test/Sema/AArch64 pcdphint-atomic-store.c

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Ensure Context.getTypeSize() is only called after checking ValType->isIntegerType()

Delta		File
+6	-0	clang/test/Sema/AArch64/pcdphint-atomic-store.c
+3	-2	clang/lib/Sema/SemaARM.cpp
+9	-2	2 files

LLVM/project eda89eb — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 pcdphint-atomic-store-diagnostic.ll

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Move tests to llvm/test/Verifier

Delta		File
+0	-54	llvm/test/CodeGen/AArch64/pcdphint-atomic-store-diagnostic.ll
+47	-0	llvm/test/Verifier/intrinsic-immarg.ll
+0	-32	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+47	-86	3 files

LLVM/project 723b0f0 — clang/lib/CodeGen/TargetBuiltins ARM.cpp, llvm/lib/IR Verifier.cpp

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! More small optimisations Kerry spotted

Delta		File
+7	-12	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+2	-3	llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+1	-2	llvm/lib/IR/Verifier.cpp
+10	-17	3 files

LLVM/project ec158fa — llvm/test/CodeGen/AArch64 pcdphint-atomic-store.ll

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Sort out testcases

Delta		File
+54	-102	llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+54	-102	1 files

LLVM/project 8d54803 — clang/lib/Sema SemaARM.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64ExpandPseudoInsts.cpp

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Small fixes Kerry has suggested

Delta		File
+112	-40	llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+7	-11	clang/lib/Sema/SemaARM.cpp
+7	-9	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1	-1	llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+127	-61	4 files

LLVM/project c47069a — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

2026-03-05 15:58:16 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Fix tests

Delta		File
+2	-0	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2	-0	1 files

LLVM/project c4dd5f0 — clang/include/clang/Basic BuiltinsAArch64.def, clang/lib/CodeGen/TargetBuiltins ARM.cpp

2026-03-05 15:58:15 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup!

More small issues tidied, and remove gating.

Delta		File
+6	-2	clang/test/Sema/AArch64/pcdphint-atomic-store.c
+2	-2	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+0	-2	clang/lib/Headers/arm_acle.h
+1	-1	clang/include/clang/Basic/BuiltinsAArch64.def
+1	-1	clang/lib/Sema/SemaARM.cpp
+1	-1	clang/test/CodeGen/AArch64/pcdphint-atomic-store.c
+11	-9	6 files

LLVM/project 42d910a — llvm/include/llvm/IR IntrinsicsAArch64.td, llvm/lib/Target/AArch64 AArch64InstrFormats.td

2026-03-05 15:58:15 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! remove mayLoad/mayStore as suggested by Kerry

Delta		File
+0	-5	llvm/lib/Target/AArch64/AArch64InstrFormats.td
+1	-1	llvm/include/llvm/IR/IntrinsicsAArch64.td
+1	-6	2 files

LLVM/project 74593fb — clang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/CodeGen/TargetBuiltins ARM.cpp

2026-03-05 15:58:15 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Fix Kerry's CR comments and add negative test for "must be an integer type"

Delta		File
+16	-6	llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+3	-7	clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+3	-3	clang/lib/Sema/SemaARM.cpp
+5	-0	clang/test/Sema/AArch64/pcdphint-atomic-store.c
+3	-0	clang/include/clang/Basic/DiagnosticSemaKinds.td
+1	-1	clang/lib/Headers/arm_acle.h
+31	-17	6 files

LLVM/project fb2087c — clang/test/CodeGen arm_acle.c builtins-arm64.c, clang/test/Sema/AArch64 pcdphint-atomic-store.c

2026-03-05 15:58:15 UTC by Jonathan Thackray on ⎇

users/jthackray/acle_pcdphint_arm_atomic_store_with_stshh

fixup! Fix more PR comments

Delta		File
+19	-9	clang/test/Sema/AArch64/pcdphint-atomic-store.c
+8	-6	llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+10	-0	clang/test/CodeGen/arm_acle.c
+0	-9	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+5	-0	clang/test/CodeGen/builtins-arm64.c
+0	-4	llvm/include/llvm/IR/IntrinsicsAArch64.td
+42	-28	2 files not shown
+44	-32	8 files