[VPlan] Lower CanIVIncrementForPart in convertToConcreteRecipes. (#190844)
Move the lowering of CanonicalIVIncrementForPart from generate() to
convertToConcreteRecipes, converting it to an Add VPInstruction at the
VPlan level. This enables VPlan-level simplifications (e.g., folding add
0, x) and prepares for adding a 3-operand form.
PR: https://github.com/llvm/llvm-project/pull/190844
[Inliner] Put inline history into IR as !inline_history metadata (#190876)
(Reland of #190700 with checks for RefSCCs with one function with a
self-reference, plus determinism fix)
(Reland of #190092 with verifier change to look through GlobalAliases)
So that it's preserved across all inline invocations rather than just
one inliner pass run.
This prevents cases where devirtualization in the simplification
pipeline uncovers inlining opportunities that should be discarded due to
inline history, but we dropped the inline history between inliner pass
runs, causing code size to blow up, sometimes exponentially.
For compile time reasons, we want to limit this to only call sites that
have the potential to inline through SCCs, potentially with the help of
devirtualization. This means that the callee is in a non-trivial
(Ref)SCC, or the call site was previously an indirect call, which can
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[flang] Implement conditional expressions parser/semantics (F2023) (#186489)
## Implement Fortran 2023 Conditional Expressions (R1002)
***This PR contains the implementation for parsing and semantic
analysis. Lowering is implemented in a separate PR (#186490)***
Implements Fortran 2023 conditional expressions with syntax: `result =
(condition ? value1 : condition2 ? value2 : ... : elseValue)`
Issue: #176999
Discourse:
https://discourse.llvm.org/t/rfc-adding-conditional-expressions-in-flang-f2023/89869/1
-- note that some of the details provided in the RFC post are no longer
accurate
### Implementation Details
**Parser:**
- Added ConditionalExpr as primary expression (F2023 R1002)
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[RISCV][MCA] Update `sifive-x390`'s tests to consume input files instead (#190883)
In the same spirit as #189785 , use the new input file system for
sifive-x390's llvm-mca tests.
bpf: Support aggregate returns (#190894)
i128 and 16 byte structs are now returned in R0:R2 which matches x86
that returns { i64, i32 } in RAX:RDX.
Both skip one register in between (RCX / R1).
Signed-off-by: Alexei Starovoitov <ast at kernel.org>
Co-authored-by: Alexei Starovoitov <ast at kernel.org>
Filter ctdb-related logs into dedicated files
This commit adds syslog-ng filters to ensure that ctdb
logs are written to /var/log/ctdb/ctdb.log rather than
by default landing in /var/log/syslog
CI: set /etc/hostid in zloop runner
ztest can enable and disable the multihost property when testing.
This can result in a failure when attempting to import an existing
pool when multihost=on but no /etc/hostid file exists. Update the
workflow to use zgenhostid to create /etc/hostid when not present.
Reviewed-by: Alexander Motin <alexander.motin at TrueNAS.com>
Signed-off-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Closes #18413
[SimplifyCFG] Update profile metadata regardless of weight count (#190982)
Otherwise we miss updating in cases where we should be updating which
causes assertion failures later due to the fact that the number of cases
no longer matches the number of branch weights.
It looks like this was last touched in #160629, but it doesn't seem like
there is anything there specifically motivating this diff hunk.
Fixes #190901.
[Flang] mark safe external globals as dso_local (#189709)
Globals inside a Fortran module are not marked as dso_local,
which results in their alignment not being promoted.
This fix mimics some of the functionality found in
shouldAssumeDSOLocal in /clang/lib/CIR/CodeGen/CIRGenModule.cpp
Fixes #189069
vnstati: Bump PKGREVISION and improve build
Don't need gmake any longer.
Its own Makefile now installs correctly, so don't roll our own.
Remove incorrect path to check for a config file.
Add blank line at top of DESCR fragment to improve final output.
vnstat: bump PKGREVISION and improve build
Don't need gmake any longer.
Its own Makefile now installs correctly, so don't roll our own.
Move example configuration file to subdir.
Move vnstatd daemon to sbin, from bin.
Remove incorrect path to check for a config file.
[flang] Use reduction recognition friendly pattern for hlfir.count. (#190856)
The change is to select between `0` and `1` based on the condition
and then add the result to the current reduction value.
japanese/font-migmix: Refactor
Lint with portclippy.
Refactoring do-install*.
Switch from LN to RLN.
PR: 277645
Approved by: fluffy (mentor), osa (mentor)
japanese/font-migmix: Update to 1.0.20231123 and take maintainership
In this release, the version numbers for 1? and 2? are different.
Update MASTER_SITES, DISTFILES and WWW.
Changelog (japanese):
https://itouhiro.github.io/mixfont-mplus-ipa/changelog.html
PR: 277645
Approved by: hrs (maintainer timeout > 3 months)
Approved by: fluffy (mentor), osa (mentor)
[LoopUnroll] Fix freqs for unconditional latches: introduce tests
This patch introduces all tests for PR #179520 but with current
results so that it is easier to see which results PR #179520 improves.
This patch should not land without PR #179520.
[NewPM] Port AArch64RedundantCopyElimination (#190582)
Adds a newPM pass for AArch64RedundantCopyElimination
- Refactors base logic into an Impl class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass using refactored logic
- Updated existing .mir tests to also test with the New Pass Manager.
Context and motivation in
https://llvm.org/docs/NewPassManager.html#status-of-the-new-and-legacy-pass-managers
[InstCombine][ValueTracking] Add m_FMinNum and m_FMaxNum to matchFastFloatClamp. (#188149)
This allows us to recognize clamp patterns if the first part of the
clamp has been turned into minnum/maxnum.
[Hexagon][MIR] Serialize HexagonMachineFunctionInfo::StackAlignBaseReg to MIR (#190003)
This patch adds serialization of HexagonMachineFunctionInfo::StackAlignBaseReg
into MIR. This field stores the physical register used as the aligned-stack base pointer
when a function has both variable-sized stack objects and requires stack
alignment greater than the default.
This replaces the workaround from commit 2e10b6299591 ("[Hexagon] Add AP
register to liveins when used for frame index access") which manually added
AP to liveins. That approach was incorrect because it only updated one
block without updating predecessors, breaking liveness invariants.
[HLSL] Add missing Shader Model 6.0 availability for wave intrinsics (#189445)
Depends on PR #188814 to be merged first.
This PR fixes Shader Model availability for HLSL wave intrinsics so that
they all require at least SM 6.0.
Furthermore, there wasn't an easy way to specify Shader Model 6.0
availability while maintaining the requirement for Shader Model 6.2 when
16-bit types is enabled and the overload uses half types.
To fix the issue, this PR extends `_HLSL_16BIT_AVAILABILITY` to accept a
3rd optional argument that specifies the Shader Model availability when
16-bit types is disabled.
Example:
```hlsl
// If 16-bit types is enabled, require SM 6.2. Else, require SM 6.0 otherwise.
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2, 6.0)
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_wave_active_all_equal)
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