FreeNAS/freenas 802ffb9src/middlewared/debian control

Re-add parted package for partprobe
DeltaFile
+1-0src/middlewared/debian/control
+1-01 files

FreeBSD/ports b26ea95security/boringssl Makefile distinfo

security/boringssl: fix build on arm64 by applying a vendor's fix

Bump PORTREVISION.

Reported by:    pkg-fallout
Tested by:      fluffy

Sponsored by:   tipi.work
DeltaFile
+4-0security/boringssl/Makefile
+3-1security/boringssl/distinfo
+7-12 files

HardenedBSD/src 93cf26esbin/conscontrol conscontrol.8, sys/net if_gre.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+407-66sys/net/if_gre.c
+173-0tests/sys/netlink/test_rtnl_gre.c
+23-0sys/netlink/route/interface.h
+3-1sys/netpfil/pf/pf.c
+1-1sbin/conscontrol/conscontrol.8
+1-1usr.bin/man/manpath.1
+608-697 files not shown
+616-7313 files

HardenedBSD/ports 14d95d2devel/small pkg-plist, textproc/krep Makefile

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+127-8www/matomo/pkg-plist
+41-0devel/small/pkg-plist
+34-0textproc/krep/files/patch-Makefile
+26-0textproc/krep/Makefile
+15-9x11/xwayland-satellite/distinfo
+10-10www/matomo/Makefile
+253-2741 files not shown
+425-11147 files

FreeBSD/ports a0c7b8cdeskutils Makefile

deskutils/xdgctl: hook to the build
DeltaFile
+1-0deskutils/Makefile
+1-01 files

FreeBSD/ports 3557216sysutils/mackerel-agent distinfo Makefile

sysutils/mackerel-agent: Update to 0.86.1

Changes:        https://github.com/mackerelio/mackerel-agent/releases/tag/v0.86.1
DeltaFile
+5-5sysutils/mackerel-agent/distinfo
+1-2sysutils/mackerel-agent/Makefile
+6-72 files

FreeBSD/ports 52beb62textproc/yamlfmt distinfo Makefile

textproc/yamlfmt: Update to 0.21.0

Changes:        https://github.com/google/yamlfmt/releases/tag/v0.21.0
DeltaFile
+5-5textproc/yamlfmt/distinfo
+1-2textproc/yamlfmt/Makefile
+6-72 files

FreeBSD/ports ebc3320deskutils/xdgctl Makefile distinfo

deskutils/xdgctl: Add new port

TUI for managing XDG default applications.

PR:             293229
DeltaFile
+27-0deskutils/xdgctl/Makefile
+3-0deskutils/xdgctl/distinfo
+1-0deskutils/xdgctl/pkg-descr
+31-03 files

FreeBSD/ports 314eecfdevel/lazygit distinfo Makefile

devel/lazygit: Update to 0.59.0

Changes:        https://github.com/jesseduffield/lazygit/releases/tag/v0.59.0
DeltaFile
+5-5devel/lazygit/distinfo
+1-2devel/lazygit/Makefile
+6-72 files

HardenedBSD/ports 39e0536dns/unbound/files patch-libunbound_python_libunbound.i

HBSD: Bring in candidate patch to fix dns/unbound

This patch fixes the build of dns/unbound. We enable python support for
unbound by default, which is why we're hitting this.

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
Obtained-from:  https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=292625
DeltaFile
+11-0dns/unbound/files/patch-libunbound_python_libunbound.i
+11-01 files

LLVM/project dec1c18llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll

rebase

Created using spr 1.3.8-beta.1
DeltaFile
+121,421-138,357llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+43,316-44,830llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+56,025-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+52,760-0polly/lib/External/isl/include/isl/typed_cpp.h
+12,842-18,547llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+30,890-0polly/lib/External/isl/include/isl/cpp.h
+317,254-201,73410,452 files not shown
+1,171,684-645,00710,458 files

LLVM/project f9e0021llvm/lib/Target/RISCV RISCVInstrInfoVPseudos.td, llvm/lib/Target/RISCV/MCTargetDesc RISCVBaseInfo.h

[RISCV] Use getNamedOperandIdx in getFRMOpNum/getVXRMOpNum. NFC (#182181)

Rather than relying on complex rules about the order of operands.
DeltaFile
+119-121llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+2-0llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+121-1212 files

LLVM/project e246d16llvm/lib/Target/RISCV RISCVFrameLowering.cpp RISCVSubtarget.cpp, llvm/test/CodeGen/RISCV riscv-scavenge-crash-2nd-pass-rv32.mir riscv-scavenge-crash-2nd-pass-rv64.mir

[RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (#182124)

We need to be able to address emergency spill slots without requiring a
register scavenging. This requires the emergency spill slot to be near
the SP or the FP to keep the offset small enough. If there is a large
reserved call frame, we can't keep the emergency spill slot near SP. But
we might not have a frame pointer.

This patch forces the use of a frame pointer when the max reserved call
frame is large so we can keep the emergency spill slot near it. This
idea is borrowed from AArch64.

Multiple MIR tests had to be updated to set the max call frame size as
the reserved registers are frozen before mirFileLoaded is called. I
copied mirFileLoaded from AArch64, but it appears the register freezing
moved after the AArch64 code was written.

Fixes #180199.
DeltaFile
+132-5llvm/test/CodeGen/RISCV/riscv-scavenge-crash-2nd-pass-rv32.mir
+57-3llvm/test/CodeGen/RISCV/riscv-scavenge-crash-2nd-pass-rv64.mir
+24-16llvm/test/CodeGen/RISCV/rvv/stack-probing-dynamic.ll
+20-3llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+11-0llvm/lib/Target/RISCV/RISCVSubtarget.cpp
+4-0llvm/test/CodeGen/RISCV/xqccmp-cm-popretz.mir
+248-276 files not shown
+261-2812 files

LLVM/project cb2c26allvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp RISCVTargetTransformInfo.h, llvm/test/CodeGen/RISCV loop-strength-reduce-loop-invar.ll

[LSR][RISCV] Add support for cmp/branch fuse.

RISCV has cmp within branches, and therefore
costing using cmp/branch fuse in LSR is
useful to configure the proposed solution
cost for LSR.
DeltaFile
+218-326llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
+16-14llvm/test/CodeGen/RISCV/loop-strength-reduce-loop-invar.ll
+5-6llvm/test/Transforms/LoopStrengthReduce/RISCV/lsr-cost-compare.ll
+2-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+2-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+243-3465 files

NetBSD/pkgsrc-wip abc1ac9qgis PLIST Makefile, qgis/patches patch-cmake_FindQwt.cmake patch-src_crssync_CMakeLists.txt

qgis: Start package for qgis4

This is currently from a commit along qgis master from git, as a proxy
for the not-existing 4.0alpha1.
DeltaFile
+9,303-0qgis/PLIST
+152-0qgis/Makefile
+39-0qgis/patches/patch-cmake_FindQwt.cmake
+20-0qgis/TODO
+18-0qgis/patches/patch-src_crssync_CMakeLists.txt
+17-0qgis/patches/patch-external_nmea_tok.c
+9,549-08 files not shown
+9,637-014 files

FreeBSD/ports 7d55738games/veloren-weekly distinfo Makefile

games/veloren-weekly: update to s20260218

Changes:        https://gitlab.com/veloren/veloren/-/compare/d82a4a6cf1...bba0ea5ca8
(cherry picked from commit 19543d2f908ddadf4e78c9d82fd608c07e319dc7)
DeltaFile
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-52 files

HardenedBSD/ports 3a7c49cgraphics/mesa-devel distinfo Makefile

graphics/mesa-devel: update to 26.0.b.1382

Changes:        https://gitlab.freedesktop.org/mesa/mesa/-/compare/b651fd90d2d...7899854e626
DeltaFile
+3-3graphics/mesa-devel/distinfo
+2-2graphics/mesa-devel/Makefile
+5-52 files

HardenedBSD/ports 2ded9abemulators/rpcs3 distinfo Makefile

emulators/rpcs3: update to 0.0.39.18797

Changes:        https://github.com/RPCS3/rpcs3/compare/7cfe96a1d1...2064bd87e3
DeltaFile
+7-7emulators/rpcs3/distinfo
+4-4emulators/rpcs3/Makefile
+11-112 files

FreeBSD/ports 3a7c49cgraphics/mesa-devel distinfo Makefile

graphics/mesa-devel: update to 26.0.b.1382

Changes:        https://gitlab.freedesktop.org/mesa/mesa/-/compare/b651fd90d2d...7899854e626
DeltaFile
+3-3graphics/mesa-devel/distinfo
+2-2graphics/mesa-devel/Makefile
+5-52 files

FreeBSD/ports 2ded9abemulators/rpcs3 distinfo Makefile

emulators/rpcs3: update to 0.0.39.18797

Changes:        https://github.com/RPCS3/rpcs3/compare/7cfe96a1d1...2064bd87e3
DeltaFile
+7-7emulators/rpcs3/distinfo
+4-4emulators/rpcs3/Makefile
+11-112 files

HardenedBSD/ports 19543d2games/veloren-weekly distinfo Makefile

games/veloren-weekly: update to s20260218

Changes:        https://gitlab.com/veloren/veloren/-/compare/d82a4a6cf1...bba0ea5ca8
DeltaFile
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-52 files

HardenedBSD/ports 06d0f75x11/xwayland-satellite distinfo Makefile.crates

x11/xwayland-satellite: update to 0.8.1

Changes:        https://github.com/Supreeeme/xwayland-satellite/releases/tag/v0.8.1
Reported by:    GitHub (watch releases)
DeltaFile
+15-9x11/xwayland-satellite/distinfo
+6-3x11/xwayland-satellite/Makefile.crates
+1-2x11/xwayland-satellite/Makefile
+22-143 files

FreeBSD/ports 19543d2games/veloren-weekly distinfo Makefile

games/veloren-weekly: update to s20260218

Changes:        https://gitlab.com/veloren/veloren/-/compare/d82a4a6cf1...bba0ea5ca8
DeltaFile
+3-3games/veloren-weekly/distinfo
+2-2games/veloren-weekly/Makefile
+5-52 files

FreeBSD/ports 06d0f75x11/xwayland-satellite distinfo Makefile.crates

x11/xwayland-satellite: update to 0.8.1

Changes:        https://github.com/Supreeeme/xwayland-satellite/releases/tag/v0.8.1
Reported by:    GitHub (watch releases)
DeltaFile
+15-9x11/xwayland-satellite/distinfo
+6-3x11/xwayland-satellite/Makefile.crates
+1-2x11/xwayland-satellite/Makefile
+22-143 files

LLVM/project 20bd5ecllvm/include/llvm/IR ModuleSummaryIndex.h, llvm/lib/LTO LTO.cpp

[ThinLTO] Distinguish symbols that are promoted
DeltaFile
+27-0llvm/test/ThinLTO/X86/export2.ll
+21-1llvm/include/llvm/IR/ModuleSummaryIndex.h
+8-2llvm/lib/LTO/LTO.cpp
+9-0llvm/test/ThinLTO/X86/Inputs/export2.ll
+1-1llvm/lib/Transforms/IPO/FunctionAttrs.cpp
+1-1llvm/lib/Transforms/IPO/FunctionImport.cpp
+67-52 files not shown
+69-78 files

FreeBSD/ports a945207www/R-cran-httr distinfo Makefile

www/R-cran-httr: Update to 1.4.8

Reported by:    portscout
DeltaFile
+3-3www/R-cran-httr/distinfo
+2-2www/R-cran-httr/Makefile
+5-52 files

HardenedBSD/ports a945207www/R-cran-httr distinfo Makefile

www/R-cran-httr: Update to 1.4.8

Reported by:    portscout
DeltaFile
+3-3www/R-cran-httr/distinfo
+2-2www/R-cran-httr/Makefile
+5-52 files

LLVM/project 7772a45flang-rt/lib/cuda stream.cpp, flang/include/flang/Optimizer/Builder CUDAIntrinsicCall.h

[flang][cuda] Add entry points for cudastreamsynchronize (#181932)

DeltaFile
+36-0flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
+12-0flang/test/Lower/CUDA/cuda-default-stream.cuf
+10-0flang/module/cuda_runtime_api.f90
+9-0flang-rt/lib/cuda/stream.cpp
+4-0flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
+2-0flang/include/flang/Runtime/CUDA/stream.h
+73-06 files

LLVM/project bfa6dedflang/include/flang/Evaluate tools.h, flang/test/Lower/CUDA cuda-data-transfer.cuf

[flang][cuda] Do managed array initialization on the device (#182171)

DeltaFile
+12-0flang/test/Lower/CUDA/cuda-data-transfer.cuf
+5-0flang/include/flang/Evaluate/tools.h
+17-02 files

LLVM/project 4e290e4mlir/test/mlir-tblgen gen-op-doc.td openmp-ops.td, mlir/tools/mlir-tblgen OpDocGen.cpp

[MLIR][tblgen] Honor `-dialect` in `-gen-{attrdef,op,typedef,enum}-doc`

Make all dialect documentation generators use the same set of records as
`-gen-dialect-doc`, which honors the `-dialect` tblgen option to filter
records by dialect. Add a `-keep-op-source-order` option to allow
`-gen-op-doc` to continue producing unsorted op lists if needed.

This commit factors the record collection, filtering, and sorting
performed in `emitDialectDoc` out into a separate `collectRecords`
function, returning a `DialectRecords` with the results. The emit
functions now all accept a `DialectRecords` argument instead of
collecting records themselves. Most changes are mechanical renamings and
moving code around.

This fixes a confusing issue where `gen-dialect-doc` would produce the
entire documentation for a dialect, but individual calls to
`gen-attrdef-doc` and the like would seemingly operate on a different
set of records, potentially covering multiple dialects. This all produce
the overall documentation now.
DeltaFile
+155-121mlir/tools/mlir-tblgen/OpDocGen.cpp
+20-0mlir/test/mlir-tblgen/gen-op-doc.td
+1-1mlir/test/mlir-tblgen/openmp-ops.td
+176-1223 files