LLVM/project 80603c6llvm/docs LangRef.rst, llvm/lib/FuzzMutate RandomIRBuilder.cpp

[CoroSplit] Never collect allocas used by catchpad into frame (#186728)

Windows EH requires exception objects allocated on stack. But there is
no reliable way to identify them. CoroSplit employs a best-effort
algorithm to determine whether allocas persist on the stack or the
frame, which may result in miscompilation when Windows exceptions are
used.
This patch proposes that we treat allocas used by catchpad as exception
objects and never place them on the frame. A verifier check is added to
enforce that operands of catchpad are either constants or allocas.

Close #143235 Close #153949 Close #182584
DeltaFile
+66-0llvm/test/Transforms/Coroutines/coro-alloca-10.ll
+7-0llvm/lib/Transforms/Coroutines/SpillUtils.cpp
+7-0llvm/lib/IR/Verifier.cpp
+3-2llvm/docs/LangRef.rst
+5-0llvm/lib/FuzzMutate/RandomIRBuilder.cpp
+2-1llvm/unittests/FuzzMutate/StrategiesTest.cpp
+90-31 files not shown
+93-37 files

LLVM/project cd9a0dcllvm/include/llvm/ExecutionEngine/Orc EPCGenericJITLinkMemoryManager.h, llvm/lib/ExecutionEngine/Orc EPCGenericJITLinkMemoryManager.cpp

[ORC] EPCGenericJITLinkMemoryManager from SimpleNativeMemoryMap syms. (#188391)

Adds a new EPCGenericJITLinkMemoryManager convenience constructor that
constructs an instance by looking up the given symbol names in the
bootstrap JITDylib of the given ExecutionSession.

The symbol names default to the SimpleNativeMemoryMap SPS-interface
symbol names provided by the new ORC runtime.
DeltaFile
+36-0llvm/unittests/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManagerTest.cpp
+13-1llvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
+14-0llvm/lib/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.cpp
+63-13 files

FreeBSD/src 615f1b9sys/amd64/amd64 machdep.c

kern/amd64/machdep: Replace memset in wrmsr_early_safe_end

GENERIC-KASAN kernel failed to boot on a Dell PowerEdge C6615 with
an AMD EPYC 8224P CPU; UEFI BIOS caught a #GP exception with %RIP
in kasan_memset where %GS relative pointer (curthread->td_pflags2)
was dereferenced. Investigation led to wrmsr_early_safe_end which
calls memset to clear early #GP IDT entry. Replacing memset with
__builtin_memset_inline still resulted in the compiler emitting a
call to the memset resolver in GENERIC-KASAN build and the kernel
stil faulted during boot. This version which has been successfully
tested with both GENERIC and GENERIC-KASAN kernels uses memset_early.

Signed-off-by: Kristofer Peterson <kris at tranception.com>
Reviewed-by: kib
Pull-Request: https://github.com/freebsd/freebsd-src/pull/2069
DeltaFile
+1-1sys/amd64/amd64/machdep.c
+1-11 files

LLVM/project 29a627allvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvextrins.ll shuffle-as-xvshuf4i.ll

update tests
DeltaFile
+7-15llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll
+1-4llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
+8-192 files

LLVM/project 2bc4992llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

[LoongArch] Custom legalize vector_shuffle to `xvextrins`
DeltaFile
+79-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+79-01 files

LLVM/project 1573cbfllvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvextrins.ll

[LoongArch][NFC] Pre-commit tests for `xvextrins`
DeltaFile
+78-0llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvextrins.ll
+78-01 files

LLVM/project 6ae5803llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch fsqrt-reciprocal-estimate.ll

[LoongArch] Fix incorrect reciprocal sqrt estimate semantics (#187621)

The current implementation of getSqrtEstimate() has incorrect semantics
when using `FRSQRTE`.

`FRSQRTE` computes an approximation to 1/sqrt(x), but the existing code
multiplies the estimate by the operand when Reciprocal is true. This
results in returning sqrt(x) instead of 1/sqrt(x), effectively reversing
the intended semantics of the 'Reciprocal' flag.

Additionally, the implementation does not properly account for LLVM's
Newton-Raphson refinement pipeline. When refinement steps are requested,
the initial estimate must be in reciprocal form so that the generic
DAGCombiner can apply NR iterations correctly.

This patch fixes the behavior by:

- Returning the raw FRSQRTE result when Reciprocal is true, or when
  refinement steps are required.

    [13 lines not shown]
DeltaFile
+67-31llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+0-12llvm/test/CodeGen/LoongArch/fsqrt-reciprocal-estimate.ll
+0-4llvm/test/CodeGen/LoongArch/lasx/fsqrt-reciprocal-estimate.ll
+0-2llvm/test/CodeGen/LoongArch/lsx/fsqrt-reciprocal-estimate.ll
+67-494 files

LLVM/project d49d24cllvm/lib/Target/RISCV RISCVInstrInfoXRivos.td, llvm/test/Analysis/CostModel/RISCV rvv-extractelement.ll rvv-insertelement.ll

[RISCV] Remove the experimental XRivosVisni extension (#188370)
DeltaFile
+0-399llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
+0-331llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
+0-293llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll
+0-291llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll
+1-86llvm/lib/Target/RISCV/RISCVInstrInfoXRivos.td
+0-43llvm/test/MC/RISCV/xrivosvisni-valid.s
+1-1,44313 files not shown
+7-1,50819 files

LLVM/project 218f240llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp

[RISCV] Fix ssub_sat cost model to use signed VSSUB instead of VSSUBU (#188195)

Intrinsic::ssub_sat was incorrectly mapped to RISCV::VSSUBU_VV (unsigned
saturating subtract) instead of RISCV::VSSUB_VV (signed saturating
subtract), causing wrong cost estimates.

Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
DeltaFile
+1-1llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+1-11 files

LLVM/project 448c10ellvm/lib/Target/LoongArch LoongArchISelLowering.cpp

rebase after vshuf4i_d was defined
DeltaFile
+1-1llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+1-11 files

LLVM/project 5d7b810llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vec-shuffle-byte-rotate.ll

[LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d`
DeltaFile
+28-4llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-7llvm/test/CodeGen/LoongArch/lasx/vec-shuffle-byte-rotate.ll
+2-7llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf4i.ll
+33-183 files

NetBSD/pkgsrc CVaAi5Wmath/R distinfo, math/R/patches patch-configure.ac

   R: fix install-time error on Darwin builds by restoring patch lost in update

   There seem to be more missing hunks plus some weird lines ending with a
   vertical bar in patch-configure.ac, but I'm doing minimal changes to fix
   an issue at the moment.
VersionDeltaFile
1.15+18-5math/R/patches/patch-configure.ac
1.115+2-2math/R/distinfo
+20-72 files

LLVM/project 4a83fe7llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lsx vec-sext.ll vec-shuffle-any-ext.ll

[LoongArch] Custom legalize vector_shuffle to `vextrins`

TODO: LASX supporting will be in a later commit.
DeltaFile
+88-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+24-27llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
+24-24llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vextrins.ll
+18-21llvm/test/CodeGen/LoongArch/lsx/vec-shuffle-any-ext.ll
+11-23llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
+4-10llvm/test/CodeGen/LoongArch/lsx/vmskcond.ll
+169-1056 files

LLVM/project 303a1a4libc/src/__support/wctype perfect_hash_map.h

implicit cast
DeltaFile
+9-7libc/src/__support/wctype/perfect_hash_map.h
+9-71 files

LLVM/project 04c12callvm/test/CodeGen/LoongArch/lsx/ir-instruction shuffle-as-vextrins.ll

[LoongArch][NFC] Pre-commit tests for `vextrins`
DeltaFile
+78-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vextrins.ll
+78-01 files

FreeBSD/src b1d3252sys/dev/nvmf/controller nvmft_controller.c

nvmf: Fix null ptr reference

Reported by:    Nikolay Denev <ndenev at gmail.com>
Reviewed by:    imp, jhb
Differential Revision:  https://reviews.freebsd.org/D55863

(cherry picked from commit 09c5bb35425bc70573c007e7f7e82be286677a87)
DeltaFile
+1-1sys/dev/nvmf/controller/nvmft_controller.c
+1-11 files

FreeBSD/src 930a790share/man/man4 rge.4, sys/dev/rge if_rge_sysctl.c if_rge.c

rge: make rx_process_limit a sysctl tunable

The number of packets processed per interrupt was hardcoded to 16.
Add a per-interface sysctl dev.rge.%d.rx_process_limit tunable so
users can adjust this value at runtime.

Signed-off-by: Christos Longros <chris.longros at gmail.com>

Reviewed by:    ziaee, adrian
Differential Revision:  https://reviews.freebsd.org/D56014
DeltaFile
+5-0share/man/man4/rge.4
+5-0sys/dev/rge/if_rge_sysctl.c
+2-1sys/dev/rge/if_rge.c
+2-0sys/dev/rge/if_rgevar.h
+14-14 files

LLVM/project 8de427blibc/src/__support/wctype upper_to_lower.h lower_to_upper.h, libc/test/src/__support/wctype wctype_perfect_hash_test.cpp

fix size difference on windows
DeltaFile
+540-523libc/src/__support/wctype/upper_to_lower.h
+460-538libc/src/__support/wctype/lower_to_upper.h
+42-28libc/utils/wctype_utils/conversion/hex_writer.py
+24-0libc/test/src/__support/wctype/wctype_perfect_hash_test.cpp
+1,066-1,0894 files

FreeBSD/src 8f36a01share/man/man4 rge.4

rge.4: fix incorrect speed range in HARDWARE section

The HARDWARE section stated "PCIe 1GB to 1GB Ethernet devices"
which is incorrect. The RTL8125/8126/8127 chips support speeds
from 1Gbps to 10Gbps. Correct the range.

Signed-off-by: Christos Longros <chris.longros at gmail.com>

rge.4: note that the driver manages PHY directly

The rge(4) driver does not use the miibus(4) interface for PHY
management. Instead, it accesses PHY registers directly via the
chip's OCP (On-Chip Peripheral) bus. Document this in the
DESCRIPTION section.

Signed-off-by: Christos Longros <chris.longros at gmail.com>

Reviewed by:    adrian
Differential Revision:  https://reviews.freebsd.org/D55995
DeltaFile
+17-2share/man/man4/rge.4
+17-21 files

FreeBSD/src f7fd4e7sys/dev/rge if_rge.c if_rgevar.h

rge: handle interface flags changes

Handle interface flags like other drivers do.

Reviewed by:    zlei, adrian
Differential Revision:  https://reviews.freebsd.org/D55728
DeltaFile
+9-14sys/dev/rge/if_rge.c
+2-0sys/dev/rge/if_rgevar.h
+11-142 files

LLVM/project cb12534compiler-rt/lib/builtins emutls.c

[compiler-rt] Suppress unused variable report in emutls

Pull Request: https://github.com/llvm/llvm-project/pull/188329
DeltaFile
+4-0compiler-rt/lib/builtins/emutls.c
+4-01 files

LLVM/project a32d903bolt/docs profiles.md, llvm/include/llvm/CodeGenTypes LowLevelType.h

Merge branch 'main' into users/vitalybuka/spr/compiler-rt-suppress-unused-variable-report-in-emutls
DeltaFile
+132-389llvm/include/llvm/CodeGenTypes/LowLevelType.h
+364-0llvm/test/CodeGen/SPIRV/bool-vector-bitcast.ll
+253-0llvm/lib/Target/SPIRV/SPIRVCtorDtorLowering.cpp
+73-160llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+212-0bolt/docs/profiles.md
+0-135llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
+1,034-68494 files not shown
+2,235-1,312100 files

LLVM/project aecfaf1flang/lib/Optimizer/OpenACC/Support RegisterOpenACCExtensions.cpp, flang/test/Fir/OpenACC offload-livein-value-canonicalization.fir

[flang][acc] Handle fir.undefined with OutlineRematerializationOpInterface in OffloadLiveInValueCanonicalization (#188325)

Example:
```fortran
!$ACC KERNELS PRESENT(CG, W1)
  CG(1:W1%WDES1%NPL, NN) = W1%CPTWFP(1:W1%WDES1%NPL)
  CPROJ(:, NN) = W1%CPROJ(1:SIZE(CPROJ,1))
!$ACC END KERNELS
```

When compiling OpenACC kernels containing array section assignments of
rank-2 arrays with a scalar index in one dimension (e.g. `CG(1:NPL,
NN)`), the Fortran lowering creates a `fir.slice` where collapsed
(scalar) dimensions use `fir.undefined index` as the stop/step values.
`SliceOp::getOutputRank()` relies on `getDefiningOp()` returning
`fir::UndefOp` to identify these collapsed dimensions and compute the
correct output rank.

When `fir.undefined` values defined outside an offload region are used

    [15 lines not shown]
DeltaFile
+52-0flang/test/Fir/OpenACC/offload-livein-value-canonicalization.fir
+4-0flang/lib/Optimizer/OpenACC/Support/RegisterOpenACCExtensions.cpp
+56-02 files

FreeBSD/ports 240e094sysutils/vm-bhyve Makefile, sysutils/vm-bhyve-devel Makefile

sysutils/vm-bhyve{,-devel}: Assign to vm-bhyve@ team

Approved by:    driesm [1]

[1] https://reviews.freebsd.org/D55841#1277452
DeltaFile
+1-1sysutils/vm-bhyve/Makefile
+1-1sysutils/vm-bhyve-devel/Makefile
+2-22 files

LLVM/project 408bb4dlibc/src/math totalordermagbf16.h totalorderbf16.h

[libc] Wrong guards for `totalorderbf16` and `totalordermagbf16` (#188241)

Currently the guards for `totalorderbf16` and `totalordermagbf16` are as
follows:
```
#ifndef LLVM_LIBC_SRC_MATH_TOTALORDERMAGF16_H
#define LLVM_LIBC_SRC_MATH_TOTALORDERMAGF16_H
-
#endif // LLVM_LIBC_SRC_MATH_TOTALORDERMAGF16_H
```
and 
```
#ifndef LLVM_LIBC_SRC_MATH_TOTALORDERF16_H
#define LLVM_LIBC_SRC_MATH_TOTALORDERF16_H
-
#endif // LLVM_LIBC_SRC_MATH_TOTALORDERF16_H
```
As we can see these are for F16 and not BF16 .
This Pr intends to fix that with correct guards as `TOTALORDERBF16` and
`TOTALORDERMAGBF16`
DeltaFile
+3-3libc/src/math/totalordermagbf16.h
+3-3libc/src/math/totalorderbf16.h
+6-62 files

LLVM/project 9999f7flibc/src/math atanpif16.h

[libc] Wrong header guard comment for atanpif16 (#188310)

This PR intends to fix a small nit caused in
[1c1135b](https://github.com/llvm/llvm-project/pull/150400/commits/1c1135b3fccf59537243fc365e83a568f77273ae)
```
#endif // LLVM_LIBC_SRC_MATH_ASINIF16_H
```
to 
```
#endif // LLVM_LIBC_SRC_MATH_ATANPIF16_H
```
DeltaFile
+1-1libc/src/math/atanpif16.h
+1-11 files

FreeNAS/freenas d8caa3fsrc/middlewared/middlewared/plugins/failover_ event.py, src/middlewared/middlewared/plugins/iscsi_ scst.py

Set ALUA transitioning state during failover

During the dev_disk/dev_vdisk swap window the local controller's ALUA
target group state is set to transitioning.
DeltaFile
+18-0src/middlewared/middlewared/plugins/iscsi_/scst.py
+2-0src/middlewared/middlewared/plugins/failover_/event.py
+20-02 files

FreeBSD/src 151ae09lib/libc/stdlib realpath.c

realpath: Improve prev_len logic

* Save prev_len after having checked for and appended a trailing slash,
  not before.  This requires us to back up if we end up returning a
  partial result, but previously we would sometimes return a partial
  result with a trailing slash and sometimes without.

* Replace strlcat() with a faster strlcpy() since we know exactly how
  far into the buffer we are.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Reviewed by:    kevans
Differential Revision:  https://reviews.freebsd.org/D55914

(cherry picked from commit 99d295e471bc362a7927047c89472e1ee2d0da6b)
DeltaFile
+7-3lib/libc/stdlib/realpath.c
+7-31 files

FreeBSD/src f5b8309lib/libc/stdlib realpath.3

realpath: Improve manual page

* Try to make the RETURN VALUES section flow better.

* Add basename(3), dirname(3), free(3) to the SEE ALSO section.

* Drop the CAVEATS section, which was obsolete the moment realpath(3)
  was added to the Single Unix Specification in 1994.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Reviewed by:    kevans
Differential Revision:  https://reviews.freebsd.org/D55928

(cherry picked from commit 1aecb32021ce46d812db36b9037cdc6f423575f9)
DeltaFile
+12-24lib/libc/stdlib/realpath.3
+12-241 files

FreeBSD/src 8e987f8lib/libc/stdlib realpath.3

realpath: Improve manual page

* Try to make the RETURN VALUES section flow better.

* Add basename(3), dirname(3), free(3) to the SEE ALSO section.

* Drop the CAVEATS section, which was obsolete the moment realpath(3)
  was added to the Single Unix Specification in 1994.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Reviewed by:    kevans
Differential Revision:  https://reviews.freebsd.org/D55928

(cherry picked from commit 1aecb32021ce46d812db36b9037cdc6f423575f9)
DeltaFile
+12-24lib/libc/stdlib/realpath.3
+12-241 files