FreeBSD/src 464b298sys/cddl/dev/dtrace/aarch64 dtrace_asm.S

dtrace/arm64: de-pessimize dtrace_copy

When DTrace catches a data abort exception it resumes execution on the
next instruction. If a probe executes copyinto from unmapped memory,
then dtrace_copy keeps faulting on successive bytes until the loop
counter is exhausted. Detect the situation by witnessing the absence
of zero-extension from an aborted unprivileged load.

Reviewed by:    markj
MFC after:      2 weeks
Differential Revision:  https://reviews.freebsd.org/D59341
DeltaFile
+9-5sys/cddl/dev/dtrace/aarch64/dtrace_asm.S
+9-51 files

NetBSD/pkgsrc-wip 69e5215waybar distinfo

waybar: fix distinfo
DeltaFile
+4-4waybar/distinfo
+4-41 files

NetBSD/pkgsrc-wip ccddddcwaybar/patches patch-src_util_icon__loader.cpp patch-src_modules_user.cpp

waybar: add some upstream pull reqs
DeltaFile
+1-0waybar/patches/patch-src_util_icon__loader.cpp
+1-0waybar/patches/patch-src_modules_user.cpp
+1-0waybar/patches/patch-src_modules_memory_bsd.cpp
+1-0waybar/patches/patch-src_modules_cpu__frequency_bsd.cpp
+4-04 files

LLVM/project 246beebllvm/lib/Transforms/Utils BuildLibCalls.cpp

[BuildLibCalls] Use emitLibCall() in more places (NFCI) (#222557)
DeltaFile
+12-106llvm/lib/Transforms/Utils/BuildLibCalls.cpp
+12-1061 files

OPNSense/core aad415fsrc/opnsense/mvc/app/models/OPNsense/Interfaces/Menu Menu.php

interfaces: bring back wireless status page
DeltaFile
+1-1src/opnsense/mvc/app/models/OPNsense/Interfaces/Menu/Menu.php
+1-11 files

FreeNAS/freenas 95e25b3src/middlewared/middlewared/plugins/pool_ snapshot.py, src/middlewared/middlewared/plugins/zfs exceptions.py snapshot_crud.py

NAS-141987 / 26.0.0 / Rework snapshot rollback with batched destroys (by Qubad786) (#19675)

## Problem
Rolling back past a snapshot that has a dependent clone crashed: the "no
safety check" path called a `destroy()` method that does not exist on
the pylibzfs dataset object, and the "newer clone" path skipped the
safety check and let the kernel refuse with a raw EEXIST after some
newer snapshots were already destroyed one at a time. With
`recursive_rollback`, a blocked child was only discovered after the
parent had already been rolled back, and every kernel error was
flattened into `ValidationError(EINVAL)` with a raw strerror.

## Solution
- **Enumerate once, up front, for the whole tree.** Newer snapshots are
collected for every affected dataset before anything is touched. Without
`recursive`, the rollback is refused with every conflicting snapshot
named; with it, holds and clones are checked first and the rollback is
refused before any destroy, naming each blocker. A missing child
snapshot fails the whole tree before the parent moves.

    [14 lines not shown]
DeltaFile
+129-137src/middlewared/middlewared/plugins/zfs/snapshot_rollback_impl.py
+184-6tests/api2/test_zfs_resource_snapshot_rollback.py
+36-18src/middlewared/middlewared/plugins/zfs/snapshot_crud.py
+51-1src/middlewared/middlewared/plugins/zfs/exceptions.py
+38-0tests/api2/test_pool_snapshot_rollback.py
+17-5src/middlewared/middlewared/plugins/pool_/snapshot.py
+455-1672 files not shown
+457-1698 files

LLVM/project add15b3llvm/lib/Target/AMDGPU SIOptimizeVGPRLiveRange.cpp, llvm/test/CodeGen/AMDGPU si-opt-vgpr-liverange-bug-deadlanes.mir opt-vgpr-live-range-verifier-error.mir

AMDGPU: Use LiveIntervals in SIOptimizeVGPRLiveRange when available

LiveVariables has been long deprecated. Use LiveIntervals if available.
With the current pass structure, this will use LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+76-18llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+2-0llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
+2-0llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
+80-183 files

LLVM/project 14ec791llvm/lib/Target/AMDGPU SIOptimizeVGPRLiveRange.cpp

Address review comments
DeltaFile
+8-13llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+8-131 files

FreeNAS/freenas 7b6aa84src/middlewared/middlewared/pytest/unit/plugins test_interface.py

NAS-143526 / 26.0.0 / Mock VM and container queries in bridge validation unit tests (#19677)

## Problem
The two bridge unit tests in `test_interface.py` fail with `KeyError:
'vm.query'`. BRIDGE validation now calls `nic_attach_users()` whenever
`bridge_members` is set, which queries VMs and containers to find NICs
attached directly to a member, but the mock middleware in those tests
only stubs `interface.query`, `datastore.query` and
`network.common.check_failover_disabled`.

## Solution
Stub `vm.query` and `container.query` with empty results in both tests,
so validation reaches the member checks the tests actually assert on.
DeltaFile
+4-0src/middlewared/middlewared/pytest/unit/plugins/test_interface.py
+4-01 files

LLVM/project 35a6d33llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU AMDGPUTargetParser.td GCNProcessors.td

AMDGPU: Remove deprecated getArchAttr and ArchFeatures TableGen (#222462)

Everything should now use getFeatureBitset*

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+92-159llvm/lib/Target/AMDGPU/GCNProcessors.td
+0-44llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+20-21llvm/unittests/TargetParser/TargetParserTest.cpp
+2-23llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+0-21llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+0-20llvm/test/TableGen/AMDGPUTargetDefErrors.td
+114-2885 files not shown
+121-31611 files

LLVM/project 182f0eacompiler-rt/test/fuzzer stop-file.test

[libFuzzer] Modify stop-file.test to support remote devices (#222012)

Currently this test fails when running on remote devices because the
'rm' command only removes the file from the host, and the second part of
the test expects the file to have been removed. This patch changes the later 
run command to point to a non-existent file in order to work around this.

rdar://186683123
DeltaFile
+1-3compiler-rt/test/fuzzer/stop-file.test
+1-31 files

FreeBSD/ports 8538e91devel/py-gitlab-webhook-handler Makefile

devel/py-gitlab-webhook-handler: Remove incorrect CPE information
DeltaFile
+1-2devel/py-gitlab-webhook-handler/Makefile
+1-21 files

LLVM/project 404ceballvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 neon-implicit-zero-filling.ll

[AArch64][NEON] Fold insert(zero, extract(X, 0), 0) -> X when X is known to zero lanes 1-N (#213940)

Add patterns for NEON across-lane reductions whose scalar result
is inserted into lane zero of a zero vector.

This is valid because these instructions place their result in lane zero
and
clear the remaining lanes.

Limit this change to matching input and result vector types. Mixed
vector
sizes and scalar conversions are not part of this PR.

Handle llvm.vector.reduce.add.v2i64 separately because it lowers to
ADDP.
NEON has no equivalent instruction for v2i64 signed or unsigned min/max
reductions, so they cannot use this fold. Double-precision
floating-point
reductions are already handled by pairwise instruction patterns.
DeltaFile
+400-0llvm/test/CodeGen/AArch64/neon-implicit-zero-filling.ll
+59-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+459-02 files

LLVM/project 24d30a5llvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU sgpr-scavenge-fi-stack-id.ll sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir

[AMDGPU] Scale the frame register in place when lowering scalar frame indices
DeltaFile
+184-0llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
+73-7llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+3-23llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
+260-303 files

NetBSD/pkgsrc zOmPixGdoc CHANGES-2026

   texstudio update
VersionDeltaFile
1.5986+2-2doc/CHANGES-2026
+2-21 files

NetBSD/pkgsrc XHl3Ob0editors/texstudio Makefile PLIST, editors/texstudio/patches patch-CMakeLists.txt

   texstudio: update to 4.9.7

   4.9.6
   This fixes some crashes and add a git panel.

   4.9.7
   This fixes some crashes.
VersionDeltaFile
1.2+20-2editors/texstudio/patches/patch-CMakeLists.txt
1.14+5-5editors/texstudio/distinfo
1.10+5-2editors/texstudio/PLIST
1.117+3-3editors/texstudio/Makefile
+33-124 files

LLVM/project 48b81ddllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPTree.h

[SLP][modularisation][NFC] Move BoUpSLP class declaration to SLPTree.h

Move the BoUpSLP class declaration and its nested types out of
SLPVectorizer.cpp into SLPVectorizer/SLPTree.h. This is a pure relocation:
method definitions stay in SLPVectorizer.cpp, and the prerequisite changes
(de-inlining the cl::opt users; seeding SLPTree.h with ReductionVectorPart
and MinScheduleRegionSize) landed earlier in the stack.

The header is included after DEBUG_TYPE is defined because BoUpSLP inline
methods use LLVM_DEBUG. The DenseMapInfo/GraphTraits specializations remain
in SLPVectorizer.cpp.

Part of the SLPVectorizer.cpp modularization effort:
https://discourse.llvm.org/t/modularizing-slpvectorizer-cpp/90922
DeltaFile
+4,958-3llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTree.h
+4-4,863llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4,962-4,8662 files

LLVM/project f5eb6f9llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][GIsel][NPM] Complete Global Isel pipeline
DeltaFile
+976-476llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+46-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+1,022-4762 files

FreeBSD/ports a3cbbc6misc/py-litellm distinfo Makefile

misc/py-litellm: Update to 1.100.1

While here, relax upper version limit of py-openai. Also, switch to
py-importlib-metadata to resolve runtime dependency conflict[1].

PR:             298345 [1]
Reported by:    cedric <cedric at precidata.com> [1]
DeltaFile
+5-5misc/py-litellm/Makefile
+3-3misc/py-litellm/distinfo
+8-82 files

FreeBSD/ports 6e8d131misc/py-litellm-proxy-extras Makefile distinfo

misc/py-litellm-proxy-extras: Update to 0.4.95

Reported by:    portscout
DeltaFile
+3-3misc/py-litellm-proxy-extras/distinfo
+1-1misc/py-litellm-proxy-extras/Makefile
+4-42 files

OpenBSD/ports E5hB0yNsysutils/exfetch Makefile distinfo

   Update to exfetch-1.8.

   From izzy Meyer (MAINTAINER)

   ok jtt@
VersionDeltaFile
1.11+2-2sysutils/exfetch/distinfo
1.12+1-1sysutils/exfetch/Makefile
+3-32 files

LLVM/project 8016407mlir/include/mlir/Dialect/Linalg/IR LinalgNamedStructuredOps.yaml, mlir/lib/Dialect/Linalg/Transforms NamedToElementwise.cpp CategoryToNamedOp.cpp

[MLIR][Linalg] Remove Linalg named ops (#220916)

Removes the named ops from the Linalg dialect.

I have also updated the ElementwiseOp builder to simplify the default
case: kind + no affine map.

Depends on both unary and binary removal branches. #220905 #220912

This PR also has the final cleanup, which turned out to be simple
enough.

Ref:

https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531

Assisted by: Claude Opus
DeltaFile
+95-100mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
+9-57mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
+0-61mlir/lib/Dialect/Linalg/Transforms/CategoryToNamedOp.cpp
+0-57mlir/lib/Dialect/Linalg/Transforms/NamedToElementwise.cpp
+0-57mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
+0-48mlir/test/Dialect/Linalg/named-ops-fail.mlir
+104-38012 files not shown
+121-53018 files

LLVM/project 70f5696mlir/include/mlir/Dialect/Linalg/IR LinalgNamedStructuredOps.yaml, mlir/python/mlir/dialects/linalg/opdsl/ops core_named_ops.py

[MLIR][Linalg] Remove binary named ops (#220912)

Remove ops, change tests to elementwise to continue working as is.

Depends on the unary removal branch. #220905 

Ref:

https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531

Assisted by: Claude Opus
DeltaFile
+0-395mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
+0-272mlir/test/Dialect/Linalg/named-ops.mlir
+0-202mlir/test/Dialect/Linalg/generalize-named-ops.mlir
+0-160mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
+0-155mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
+33-105mlir/test/Dialect/Linalg/specialize-generic-ops.mlir
+33-1,28924 files not shown
+235-1,86530 files

LLVM/project 3b99e79mlir/include/mlir/Dialect/Linalg/IR LinalgNamedStructuredOps.yaml, mlir/python/mlir/dialects/linalg/opdsl/ops core_named_ops.py

[MLIR][Linalg] Remove unary named ops (#220905)

Remove ops, change tests to elementwise to continue working as is.

Ref:

https://discourse.llvm.org/t/rfc-update-semantics-of-linalg-named-operations-unary-binary-ternary/91531

Assisted by: Claude Opus
DeltaFile
+1-456mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
+0-403mlir/test/Dialect/Linalg/named-ops.mlir
+0-275mlir/test/Dialect/Linalg/generalize-named-ops.mlir
+0-208mlir/test/Dialect/Linalg/named-ops-fail.mlir
+1-157mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
+63-63mlir/test/Dialect/Linalg/transform-op-fuse.mlir
+65-1,56222 files not shown
+184-2,15128 files

NetBSD/pkgsrc C6gtIpcdoc CHANGES-2026

   Updated net/samba4
VersionDeltaFile
1.5985+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 00mW7W4net/samba4 distinfo Makefile, net/samba4/patches patch-libcli_dns_wscript__build

   samba4: updated to 4.24.7

   Changes since 4.24.6
   --------------------

   o  Ralph Boehme <slow at samba.org>
      * BUG 16097: POSIX ACL backend silently discards erros when processing NT
        ACLs with non-canonical ordering

   o  Volker Lendecke <vl at samba.org>
      * BUG 16225: dns client problems related to EDNS usage

   o  AndrĂŠas Leroux <aleroux at tranquil.it>
      * BUG 15988: Samba internal DNS service doesn't handle switch from UDP to TCP
        when packet is larger than 4k

   o  Stefan Metzmacher <metze at samba.org>
      * BUG 15988: Samba internal DNS service doesn't handle switch from UDP to TCP
        when packet is larger than 4k

    [19 lines not shown]
VersionDeltaFile
1.223+7-8net/samba4/Makefile
1.131+5-5net/samba4/distinfo
1.3+3-3net/samba4/patches/patch-libcli_dns_wscript__build
+15-163 files

LLVM/project 51daef2llvm/lib/Target/X86 X86FixupSetCC.cpp X86FastISel.cpp, llvm/lib/Target/X86/GISel X86InstructionSelector.cpp

X86: Mark EFLAGS dead on MOV32r0 emitted outside SelectionDAG (#222464)

Currently these get set by LiveVariables after the fact, but
ideally we would not rely on that since it's long overdue for
deletion.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+13-7llvm/lib/Target/X86/X86FastISel.cpp
+2-2llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
+2-1llvm/lib/Target/X86/X86FixupSetCC.cpp
+17-103 files

LLVM/project 0573ec9mlir/lib/Tools/mlir-lsp-server MLIRServer.cpp, mlir/test/mlir-lsp-server diagnostics.test definition.test

[mlir][lsp] Handle unrepresentable file locations (#220913)
DeltaFile
+89-0mlir/test/mlir-lsp-server/definition.test
+28-7mlir/lib/Tools/mlir-lsp-server/MLIRServer.cpp
+20-0mlir/test/mlir-lsp-server/diagnostics.test
+137-73 files

LLVM/project bab513bllvm/test/CodeGen/AMDGPU amdgcn.bitcast.768bit.ll amdgcn.bitcast.832bit.ll

[AMDGPU] Use new CSR cost calculation (#219220)

So far, AMDGPU backend relied on the legacy calculation for the cost of
the first use of a callee-save register. This legacy path scales the
entry block frequency by a fixed value, making a comparison with
alternatives, e.g., rematerialization, difficult due to different
scales. One example for that is the work in
https://github.com/llvm/llvm-project/pull/206756, where comparison of
rematerialization cost and first use of a CSR is hard to compare due to
the different scales.

Change to instead use the new calculation path with different target
hooks for better comparability.

As the new scale is different, the cost was changed. The new cost value
accounts for various factors impacting CSR cost.

This change (with different cost value) was originally part of
https://github.com/llvm/llvm-project/pull/202007. Another part of that

    [5 lines not shown]
DeltaFile
+57,327-55,762llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+6,634-6,608llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,576-5,657llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+4,486-4,550llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+2,884-2,534llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+2,268-1,797llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+79,175-76,90815 files not shown
+83,791-80,79221 files

LLVM/project dbda42allvm/test/CodeGen/AMDGPU select-flags-to-fmin-fmax.ll fptosi-sat-vector.ll

Add COPY_TO_REGCLASS
DeltaFile
+1,049-1,046llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
+358-358llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+272-152llvm/test/CodeGen/AMDGPU/fpow.ll
+188-187llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll
+162-162llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+144-144llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
+2,173-2,04941 files not shown
+3,226-3,13147 files