[clang][bytecode] Do BaseToDerived casts step-by-step (#231131)
Computing the offset of the entire cast path once doesn't work out in
practice if the dynamic type of the expression we're casting doesn't
match its static type. Do it one step at a time. This way we don't have
to compute an offset at all, but we stil need to check the validity of
the cast on every step.
[CIR] Implement Matrix-Insert and do lowering to it for lvalue subscript (#230600)
Matrix element assignment requires an insert operation, which this
provides and implements. Most of this very similar/cribbed from the
previous Extract patch, so hopefully this is simple/right enough.
[CIR] Implement 'matrix-subtraction' lowering. (#230536)
This ends up being basically just a copy/paste from the 'add' patch I
just did, otherthan not having to modify the 'splat' work (as that is
already done!).
SelectionDAG: Mark physreg defs dead on scheduler-cloned nodes
When the list scheduler clones a node to break a physreg dependency,
the copies share one SDNode, so InstrEmitter can't tell that a copy's
implicit physreg def (e.g. EFLAGS) lost its users and didn't mark it
dead. LiveVariables recomputes it later, but dead flags are most useful
to earlier optimizations.
Instead, mark the def dead at emission time if the copy has no
scheduler edge for it. This lets convertToThreeAddress form LEAs again,
and is a step toward removing LiveVariables.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[LV] Add helpers to extend VPWidenMemIntrinsicRecipe to non-VP intrinsics (NFC) (#230486)
This patch adds three new vector utils to query the mask, pointer, and
access type of vector memory intrinsics. It then uses these hooks to
generalize VPWidenMemIntrinsicRecipe to non-VPIntrinsic instructions.
A basic unit test is added to test these hooks work for
compresstore/expandload.
Split off from #214491.
[X86] x87.ll - regenerate checks for all x86/x64 +/-x87 +/-sse1 tests (#231140)
Ensure we check full codegen
Split single large test into int2fp fp32/64/128 tests to keep them
focussed
[VPlan] Model the ExtractValue indices as operands from VPlan0. (#230494)
Add the extractvalue indices as VPlan constant operands when building
VPlan0, instead of only appending a single index when creating
VPWidenRecipes. This gives VPInstruction, VPWidenRecipe and
VPReplicateRecipe the same operand layout, so the indices are printed
for all of them and the result type is derived from the operands.
Includes test coverage for extracts with multiple indices.
As the indices are now proper operands, extractvalues can be CSE'd.
PR: https://github.com/llvm/llvm-project/pull/230494
[BOLT][RISCV] Do not lower a conditional tail call to an unconditional one (#231117)
isCall() is true for a conditional tail call, so FixRISCVCallsPass
replaced it with a PseudoTAIL, dropping the condition and the
fall-through path.
The pass could instead rewrite it as an inverted branch over a
PseudoTAIL, but RISC-V has no conditional tail call instruction to lower
it to. Skipping conditional branches is simpler: the branch stays as it
is, and the assembler still relaxes it when the target is too far.
Found in a BOLT-optimized clang that crashed in
TargetLoweringBase::getSoftFloatCmpLibcallPredicate().
[Mips] Fix symbol names for private functions in relocation hints (#230572)
Fixes errors such as
ld.lld: error: undefined symbol: compiler_rt.rem_pio2.rem_pio2
>>> referenced by compiler_rt
>>>
/home/alexrp/.cache/zig/o/a0062b09f46a198885da4835be133933/compiler_rt_zcu.o:(tan)
in archive
/home/alexrp/.cache/zig/o/a0062b09f46a198885da4835be133933/libcompiler_rt.a
which would happen because the actual symbol is
`$compiler_rt.rem_pio2.rem_pio2` for O32 or
`.Lcompiler_rt.rem_pio2.rem_pio2` for N64/N32.
[ViewOpGraph] Re-use `AsmState` to significantly speed-up printing. (#208240)
I was trying to print some rather large functions (5000+ ops) to a
graphivz/dot file, and noticed that the `ViewOpGraph` pass is rather
slow.
`--view-op-graph` previously always called `Operation::printAsOperand`
with the default `OpPrintingFlags` causing a new `AsmState` to be
constructed every time, which is extremely inefficient.
This patch instead creates a top-level `AsmState` once for each pass
run, and re-uses it for all printing.
This makes printing graphviz/dot files for large graphs *significantly*
faster: A single `func.func` with 5000 operations previously took 33
seconds to print, and can now be printed (essentially) instantly :)
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[SCEV] Make operand complexity order total. (#230252)
Update CompareSCEVComplexity to return a total order for SCEVs. The
missing cases added are
* SCEVs with matching pointers are ordered by their use-flags
* SCEVUnknowns get assigned an ID at construction and are ordered by it.
The latter is the main change, ensuring SCEVUnkowns are ordered
determinstically by the ID depending on the construction order. Note
that this makes the order dependent on the order SCEVs are created. We
could try to use other sources to order SCEVUnkowns (comesBefore in
basic block, dominance), but those will be more expensive.
With that, we should only return 0 for equal nodes. Previously we could
return 0 for distinct nodes and IIUC this was the main reason for
MaxSCEVCompareDepth, because the operand compare loop could end up doing
a lot of work for distinct operands.
This came up as part of
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[lldb] Explicitly handle unreachable code (#230372)
This silences a warning with MSVC, which does not treat the switch as
exhaustive unlike gcc and clang.
nono: update to 1.8.4.
1.8.4 (2026/10/11)
vm(New): "Implement an NWB-225 video board partially for NWS-1750."
vm(New): "Implement an NWP-411A keyboard for NWS-1750."
vm(New): "Implement (not tested) mouse for NWS-1750."
vm(New): "Implement an AST interrupt on NWS-1750."
vm(Update): "Implement SCC interrupt acknowledge cascade for NWS-1750."
vm(Fix): "Fix DIPSW bit 6, 7 on NWS-1750."
vm(Update): "Change the serial console emulation to VT100 compatible."
vm(Fix): "Fix the handling of cases where the lower limit of DECSTBM exceeded the number of physical rows. These two fixes resolve the screen corruption in sysinst on NetBSD/virt68k after 11.0_RC7."
vm(Update): "Remove DECLRMM, a feature introduced in VT420, from serial console emulation."
vm(Fix): "Fix a double bus fault caused by key input at the PROM prompt after a reboot when using the built-in PROM on LUNA-I."
vm(Fix): "Fix the stack pointer on X68030 Pluto-X. This resolves a dmesg corruption after a reboot on NetBSD/x68k using built-in IPLROM. "
m88k(Fix): "Implement the case of SFIP/SNIP.V=0 on RTE instruction."
GUI(Update): "Rename a menu "Monitor>Main Devices" to "Monitor>Devices" on LUNA."
GUI(Update): "Rename a "Bitmap Plane" monitor to "Framebuffer" monitor on LUNA."
GUI(Fix): "Flip switches on the NWS-1750 DIP-SW monitor upside down."
GUI(Fix): "Fix an issue where the header rendering might corrupted in the access status monitor."
[LoopFlatten] Avoid asserting on same-width trip counts (#228130)
The backedge-taken count can already have the same type as the widened
compare RHS.
Use getNoopOrZeroExtend() instead of getZeroExtendExpr() (it requires a
strictly wider destination type) to prevent the assert when types are
same.
