PowerPC: Use use_instr_nodbg_begin in PPCReduceCRLogicals (#219988)
Fetch the using instruction directly through the instruction iterator
instead of dereferencing an operand's parent.
Co-authored-by: Claude (Claude-Opus-4.8)
[NVPTX] Use MCSymbols in Isel, remove mutable StrPool (NFC) (#219530)
Using MCSymbols is more idiomatic and allows us to remove mutable
members from the TM and simplifies MFI data structures.
igbv: Fence DMA while sanitizing retained queues
The 82576 and I350 retain VF queue enable and DMA address state
across VFLR. iflib enables PCI bus mastering before driver attach, so
stale state left by a previous owner can otherwise issue DMA before
igbvf has completed its first reset and queue sanitization.
Disable PCI bus mastering immediately after mapping the VF BAR. Keep
it disabled until reset and queue sanitization succeed, verify both
disable and enable through PCI command-register readback, and wait for
pending transactions before treating the fence as complete.
Resanitize on stop before iflib releases queue mappings.
The sanitizer and recovery were exercised on I350 and 82576 VFs. Forced
queue-disable failure left the VF down, and a later administrative
down/up recovered it; successful I350 VFs passed bidirectional traffic
with no errors or drops.
Sponsored by: BBOX.io
Hexagon: Use use_instructions in checkHVXUses32/checkHVXUses16
The loops only inspect the using instruction, so iterate instructions
directly instead of operands and their parents.
Co-authored-by: Claude (Claude-Opus-4.8)
[flang] Enable FIR loop invariant code motion by default (#218703)
The FIR loop invariant code motion pass was added in #173438, where it
was disabled by default. This enables it for optimization levels above
`-O0`. The option `-disable-fir-licm` has been added in place of
`-enable-fir-licm`. The pass itself is unchanged.
Relates to #208086 and fixes #110613. Tests updated.
Assisted-by: Copilot
AMDGPU: Add visible features for aperture regs, doorbell ID and AGPR alloc
These fields are needed to migrate AMDGPUAttributor to using TargetParser
information instead of subtarget features.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
RISCV: Pass instruction and operand index to replacePtrWithInt (#219958)
The helper used the operand's parent instruction as the insertion point.
Pass the containing instruction and operand index directly so it no
longer depends on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[AMDGPU][GIsel] Make getBaseWithConstantantOffset see `or disjoint` (#219551)
This change is split from #207821, where it was made in the process of
implementing that change to make getBaseWithConstantOffset() have the
same behavior as the SelectionDAG version.
AI disclosure: I'm pretty sure this was Codex code, and I do recall it
being an AI-found discrepancy.
[clang][bytecode][NFC] Remove an unreachable parameter check (#219977)
We check this both in Context and in ByteCodeEmitter. The latter is not
reachable since the former will already not create Function instances
for such functions.
