[libc][bazel] Add a repo with linux kernel UAPI headers
This will be used to support libc's -DFULL_BUILD option, which uses `-nostdlibinc` and thus requires a copy of linux kernel headers.
[SLP][AArch64]Support masked div/rem on non-pow-2 vectors
For fixed-width integer div/rem on AArch64 SVE, a non-power-of-2 vector
cannot execute as a single whole-register operation. When profitable,
pad the vector to the next full register and use the masked div/rem
intrinsics.
Fixes #207880
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/210623
[bazel] Set up windows specific cmake defines for lldb bazel build and config for LZMA (#205823)
Adds an @platforms//os:windows branch to the ConfigHeader
expand_template OS select(), alongside the
existing macos/linux branches. On Windows the POSIX-oriented features
are disabled (HAVE_PTSNAME_R,
LLDB_ENABLE_POSIX, LLDB_ENABLE_TERMIOS → 0) and the platform-detection
macros (HAVE_LIBCOMPRESSION,
HAVE_*_PROCESS_VM_READV, HAVE_PPOLL, HAVE_SYS_EVENT_H,
LLDB_ENABLE_LIBXML2, LLDB_HAVE_EL_RFUNC_T) are
set to their Windows values. This complements the recently added Windows
process plugin (#203146) so a
Windows-configured lldb gets a correct Config.h. Python stays disabled
on Windows (base default
LLDB_ENABLE_PYTHON 0).
Continuing to work backwards from Meta's internally working buck2 build
that is translated from this bazel. This lacked windows select entirely,
so porting back what we ended up needing. There are still some changes
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[SPIRV] Support switch terminators when merging region exits (#209859)
fixes #209310
This change fixes the `llvm_unreachable("Unhandled terminator type.")`
crash in `createExitVariable` when a convergence region's exit block
ends in a switch instruction.
To handle the SwitchInst properly we needed to:
1. Build a select chain keyed on the switch condition, using the default
destination as the fallback value and skipping successors that are
internal to the region. This is an almost exact copy of what already
exists for `CondBrInst`.
2. Modify the SPIRVStructurizer.cpp `splitSwitchCases`to removes a case
whose target is the default destination instead of splitting it into a
new successor block.
Assisted by Claude Opus 4.8
[CIR] Add opt-in flag to run x86_64 call-conv lowering (#211335)
The x86_64 System V classifier and the CallConvLowering pass that drives
it are already in the tree, but nothing runs them: the -fclangir
pipeline never adds the pass, so CIR still emits uncoerced aggregate
signatures on x86_64 and its LLVM output diverges from classic CodeGen
for anything passed or returned in registers.
This adds the cc1 flag -clangir-enable-call-conv-lowering, off by
default like -clangir-enable-idiom-recognizer, and runs the pass in
runCIRToCIRPasses right after CXXABILowering, which has already reduced
C++ ABI types to plain records the classifier can handle. The flag is
gated on x86_64. On other targets it is a silent no-op, so a driver can
set it unconditionally without breaking non-x86_64 builds. The AVX level
is fixed at None because the classifier's current supported subset has
no >128-bit vector aggregate where the level would change the result.
With the flag on, supported scalars and small aggregates are coerced to
match classic CodeGen: sign/zero-extended narrow integers, SSE scalars,
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[analyzer] Detect dangling pointers passed to function calls (#211045)
In order to detect if a dangling pointer is passed to a function the
analyzer has to inspect each call argument. For that reason I have
implemented the `checkPostCall` for the `DanglingPtrDeref` checker to
check if an argument passed to a function is dangling. Since
`checkLocation` only catches dereferences and cannot reason about
whether an argument passed to a function is dangling it cannot detect
these type of bugs alone.
[HIPSPV] Preserve device debug info requested via -g
HIPSPVToolChain::adjustDebugInfoKind() unconditionally forced NoDebugInfo,
so compiling HIP device code with -g produced SPIR-V with no debug metadata.
Debuggers such as Intel's gdb-oneapi could therefore not resolve source
lines or local variables in offloaded kernels. The stated reason for
disabling it (the SPIRV-LLVM-Translator aborting on DW_OP_LLVM_convert) no
longer applies, as the translator now lowers that operation.
Stop clobbering the requested debug level, and when -g is given emit debug
info in the NonSemantic.Shader.DebugInfo form
(--spirv-debug-info-version=nonsemantic-shader-200), enabling the required
SPV_KHR_non_semantic_info extension. The default (no -g) output is
unchanged.
Also enable SPV_INTEL_optnone when -g is requested. At -O0 Clang marks
functions optnone; preserving that attribute lets gdb-oneapi inspect kernel
arguments and locals instead of reporting them as <optimized out>. The
extension is a no-op at -O1 and above.
Reported downstream: CHIP-SPV/chipStar#1004
knot-resolver: Update to 6.4.1
Knot Resolver 6.4.1 (2026-07-22)
Security:
DNS-over-QUIC (DoQ) had severe issues, allowing even RCE Many people reported (some of) these issues to us.
DNSSEC correctness issues, acting mainly through the aggressive cache:
* dealing with Labels field in RRSIGs being smaller than the signer’s
* dealing with NSEC’s next-name pointing outside of the zone
Special thanks to Qifan Zhang from Palo Alto Networks.
Improvements:
docker: upgrade to Debian 13 (!1856)
update IANA’s certificate for root trust anchor bootstrapping (!1845)
Bugfixes:
/local-data/addresses*: make multiple addresses work (#808, #954)
views: fix protocol-based matching for DoQ
Inline `RewriteVPExpandSCEV` lambda
Calling it on `Plan.getTripCount()` explicitly doesn't seem to be
necessary anymore, so can inline into the single remaining use.
Unconditionally set cpuresetfn and powerdownfn. The K3 firmware that I'm
currently working with claims to implement the System Reset Extension,
but the reset doesn't actually work. Looking at the K1/K3 firmware
code reveals that the firmware would do the same thing as this driver,
so overriding these functions should be fine.
ok jsg@
