FreeNAS/freenas 6b21d41src/middlewared/middlewared/plugins/enclosure_ nvme2.py

NAS-140418 / 26.0.0-BETA.2 / fix R50BM rear nvme drive bays (by yocalebo) (#18640)

Platform team gave me access to an internal R50BM that was 100% verified
to be configured according MPI. It was installed with 24.10.2 (and NO
that's not a typo for the version). The rear nvme drive bays do NOT get
wired up properly. This is a long convoluted story but the gist is that
4 years when we added this platform the system that was used to test
these changes was NOT configured according to the MPI that we have
currently. Investigation is still ongoing internally to make sure we
don't have a kernel change causing slot mappings to be wonky but for
now, these changes 100% fix the rear nvme drive bay mapping issue.

Original PR: https://github.com/truenas/middleware/pull/18635

Co-authored-by: caleb <yocalebo at gmail.com>
DeltaFile
+0-9src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-91 files

FreeNAS/freenas 094250esrc/middlewared/middlewared/plugins/enclosure_ nvme2.py

NAS-140418 / 25.10.2.2 / fix R50BM rear nvme drive bays (by yocalebo) (#18638)

Platform team gave me access to an internal R50BM that was 100% verified
to be configured according MPI. It was installed with 24.10.2 (and NO
that's not a typo for the version). The rear nvme drive bays do NOT get
wired up properly. This is a long convoluted story but the gist is that
4 years when we added this platform the system that was used to test
these changes was NOT configured according to the MPI that we have
currently. Investigation is still ongoing internally to make sure we
don't have a kernel change causing slot mappings to be wonky but for
now, these changes 100% fix the rear nvme drive bay mapping issue.

Original PR: https://github.com/truenas/middleware/pull/18635

Co-authored-by: caleb <yocalebo at gmail.com>
DeltaFile
+0-9src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-91 files

FreeNAS/freenas c709ff0src/middlewared/middlewared/plugins/enclosure_ nvme2.py

NAS-140418 / 26.0.0-BETA.1 / fix R50BM rear nvme drive bays (by yocalebo) (#18639)

Platform team gave me access to an internal R50BM that was 100% verified
to be configured according MPI. It was installed with 24.10.2 (and NO
that's not a typo for the version). The rear nvme drive bays do NOT get
wired up properly. This is a long convoluted story but the gist is that
4 years when we added this platform the system that was used to test
these changes was NOT configured according to the MPI that we have
currently. Investigation is still ongoing internally to make sure we
don't have a kernel change causing slot mappings to be wonky but for
now, these changes 100% fix the rear nvme drive bay mapping issue.

Original PR: https://github.com/truenas/middleware/pull/18635

Co-authored-by: caleb <yocalebo at gmail.com>
DeltaFile
+0-9src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-91 files

LLVM/project 6f48ec2clang/lib/Driver Driver.cpp

clang: Stop assuming one toolchain covers all GPUArchs

Previously there was a vector of toolchains, but a number of
places assumed there was only a single toolchain. I'm also not
sure how you were supposed to identify which toolchain to use from
this array. Make this parallel to the stored GpuArches. For
the fat binary cases, we still need to pick a toolchain so that
still just picks the first one; it probably should use
the most neutral available triple.

This also doesn't feel like a complete fix. The various Actions
all contain a reference to an OffloadingToolChain, which seems
to frequently be missing and isn't set at construction time.
DeltaFile
+22-18clang/lib/Driver/Driver.cpp
+22-181 files

LLVM/project 8033cf3llvm/lib/Transforms/Scalar SROA.cpp

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+4-2llvm/lib/Transforms/Scalar/SROA.cpp
+4-21 files

LLVM/project f26b30eclang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR] Auto-generate matchAndRewrite for one-to-one CIR-to-LLVM lowerings (#190326)

When a CIR op specifies a non-empty `llvmOp` field, the lowering
emitter now generates the `matchAndRewrite` body that converts the
result type and forwards all operands to the corresponding LLVM op.
This removes 27 boilerplate lowering patterns from LowerToLLVM.cpp.

Ops needing custom logic (FMaxNumOp/FMinNumOp for FastmathFlags::nsz)
override `llvmOp = ""` to retain hand-written implementations.

Also fixes llvmOp names (TruncOp -> FTruncOp, FloorOp -> FFloorOp)
and adds a diagnostic rejecting conflicting llvmOp + custom constructor.
DeltaFile
+0-255clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+30-5clang/utils/TableGen/CIRLoweringEmitter.cpp
+6-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+36-2623 files

LLVM/project 2108252clang/docs ReleaseNotes.rst, clang/lib/CodeGen CGExprComplex.cpp

[clang] Fixed a crash when explicitly casting to atomic complex (#172163)

Fixed a crash when explicitly casting a scalar to an atomic complex.

resolve: #114885
DeltaFile
+14-0clang/test/CodeGen/complex.c
+2-3clang/lib/CodeGen/CGExprComplex.cpp
+1-0clang/docs/ReleaseNotes.rst
+17-33 files

FreeNAS/freenas fdb5930src/middlewared/middlewared/plugins/enclosure_ nvme2.py

NAS-140418 / 27.0.0-BETA.1 / fix R50BM rear nvme drive bays (#18635)

Platform team gave me access to an internal R50BM that was 100% verified
to be configured according MPI. It was installed with 24.10.2 (and NO
that's not a typo for the version). The rear nvme drive bays do NOT get
wired up properly. This is a long convoluted story but the gist is that
4 years when we added this platform the system that was used to test
these changes was NOT configured according to the MPI that we have
currently. Investigation is still ongoing internally to make sure we
don't have a kernel change causing slot mappings to be wonky but for
now, these changes 100% fix the rear nvme drive bay mapping issue.
DeltaFile
+0-9src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-91 files

LLVM/project 24163c2llvm/include/llvm/Analysis MemoryDependenceAnalysis.h, llvm/lib/Analysis MemoryDependenceAnalysis.cpp

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+65-53llvm/lib/Analysis/MemoryDependenceAnalysis.cpp
+8-1llvm/include/llvm/Analysis/MemoryDependenceAnalysis.h
+73-542 files

FreeNAS/freenas 735ba49src/middlewared/middlewared/plugins/system debug.py

NAS-140520 / 26.0.0-BETA.2 / Pass caller privilege context to debug generation for correct job visibility (by Qubad786) (#18637)

## Problem

When generating a system debug, `jobs.json` contains only 2-3 jobs
instead of the full set. This happens because ixdiagnose was calling
`privilege.become_readonly()` before all API calls to ensure Secret
field redaction in debug output.

The issue is that `become_readonly()` drops the credential from
FULL_ADMIN to READONLY_ADMIN, which has two effects: (1) Secret fields
are redacted in API responses (intended), and (2)
`credential_is_limited_to_own_jobs()` in `core.get_jobs` activates
per-user job filtering (unintended side effect). Since the ixdiagnose
middleware client is a freshly created session that owns no jobs, the
result is nearly empty — only jobs with explicit `read_roles` (like
`replication.run`) survive the filter.

This affects all users regardless of privilege level because ixdiagnose

    [32 lines not shown]
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

FreeNAS/freenas cbba9dasrc/middlewared/middlewared/plugins/system debug.py

NAS-140520 / 26.0.0-BETA.1 / Pass caller privilege context to debug generation for correct job visibility (by Qubad786) (#18636)

## Problem

When generating a system debug, `jobs.json` contains only 2-3 jobs
instead of the full set. This happens because ixdiagnose was calling
`privilege.become_readonly()` before all API calls to ensure Secret
field redaction in debug output.

The issue is that `become_readonly()` drops the credential from
FULL_ADMIN to READONLY_ADMIN, which has two effects: (1) Secret fields
are redacted in API responses (intended), and (2)
`credential_is_limited_to_own_jobs()` in `core.get_jobs` activates
per-user job filtering (unintended side effect). Since the ixdiagnose
middleware client is a freshly created session that owns no jobs, the
result is nearly empty — only jobs with explicit `read_roles` (like
`replication.run`) survive the filter.

This affects all users regardless of privilege level because ixdiagnose

    [32 lines not shown]
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

FreeBSD/ports 084ffb4www/firefox-esr distinfo Makefile

www/firefox-esr: update to 140.9.1

Release Notes (soon):
  https://www.firefox.com/en-US/firefox/140.9.1/releasenotes/

(cherry picked from commit d7f428f335aba4f007bdbc6d98245fda2e759988)
DeltaFile
+3-3www/firefox-esr/distinfo
+1-2www/firefox-esr/Makefile
+4-52 files

FreeBSD/ports d352866www/firefox distinfo Makefile

www/firefox: update to 149.0.2

Release Notes (soon):
  https://www.firefox.com/en-US/firefox/149.0.2/releasenotes/

(cherry picked from commit 3b4ee97550bd4550d9b1184f112c811f3725832a)
DeltaFile
+3-3www/firefox/distinfo
+1-2www/firefox/Makefile
+4-52 files

LLVM/project 708a5cfoffload/plugins-nextgen/amdgpu/src rtl.cpp

Fix build with gcc
DeltaFile
+4-1offload/plugins-nextgen/amdgpu/src/rtl.cpp
+4-11 files

FreeBSD/ports d7f428fwww/firefox-esr distinfo Makefile

www/firefox-esr: update to 140.9.1

Release Notes (soon):
  https://www.firefox.com/en-US/firefox/140.9.1/releasenotes/
DeltaFile
+3-3www/firefox-esr/distinfo
+1-2www/firefox-esr/Makefile
+4-52 files

FreeNAS/freenas df6df09src/middlewared/middlewared/plugins/system debug.py

Pass caller privilege context to debug generation for correct job visibility

(cherry picked from commit 09c07a4fc6af28e255e2b2ca84b00d7b84f75ece)
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

FreeNAS/freenas 5037274src/middlewared/middlewared/plugins/system debug.py

Pass caller privilege context to debug generation for correct job visibility

(cherry picked from commit 09c07a4fc6af28e255e2b2ca84b00d7b84f75ece)
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

FreeBSD/ports 3b4ee97www/firefox distinfo Makefile

www/firefox: update to 149.0.2

Release Notes (soon):
  https://www.firefox.com/en-US/firefox/149.0.2/releasenotes/
DeltaFile
+3-3www/firefox/distinfo
+1-2www/firefox/Makefile
+4-52 files

FreeNAS/freenas d021913src/middlewared/middlewared/plugins/system debug.py

NAS-140520 / 27.0.0-BETA.1 / Pass caller privilege context to debug generation for correct job visibility (#18632)

## Problem

When generating a system debug, `jobs.json` contains only 2-3 jobs
instead of the full set. This happens because ixdiagnose was calling
`privilege.become_readonly()` before all API calls to ensure Secret
field redaction in debug output.

The issue is that `become_readonly()` drops the credential from
FULL_ADMIN to READONLY_ADMIN, which has two effects: (1) Secret fields
are redacted in API responses (intended), and (2)
`credential_is_limited_to_own_jobs()` in `core.get_jobs` activates
per-user job filtering (unintended side effect). Since the ixdiagnose
middleware client is a freshly created session that owns no jobs, the
result is nearly empty — only jobs with explicit `read_roles` (like
`replication.run`) survive the filter.

This affects all users regardless of privilege level because ixdiagnose

    [27 lines not shown]
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

LLVM/project 853ea94llvm/include/llvm/Transforms/InstCombine InstCombiner.h, llvm/lib/Transforms/InstCombine InstCombineCasts.cpp

[InstCombine][NFC] Expose isKnownExactCastIntToFP as a public method (#190327)

 
DeltaFile
+6-9llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+4-0llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
+10-92 files

LLVM/project dec90ffclang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenRecordLayoutBuilder.cpp, clang/test/CIR/CodeGen no-unique-address.cpp assign-operator.cpp

[CIR] Fix record layout for [[no_unique_address]] fields (#186701)

Fix two bugs in CIR's handling of `[[no_unique_address]]` fields:

- Record layout: Use the base subobject type (without tail padding)
instead of the complete object type for [[no_unique_address]] fields,
allowing subsequent fields to overlap with tail padding.
- Field access: Insert bitcasts from the base subobject pointer to the
complete object pointer after cir.get_member for potentially-overlapping
fields, so downstream code sees the expected type.
- Zero-sized fields: Handle truly empty [[no_unique_address]] fields by
computing their address via byte offsets rather than cir.get_member,
since they have no entry in the record layout.

A known gap (CIR copies 8 bytes where OG copies 5 via
`ConstructorMemcpyizer`) is noted for follow-up.
DeltaFile
+81-24clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+53-0clang/test/CIR/CodeGen/no-unique-address.cpp
+28-2clang/test/CIR/CodeGen/assign-operator.cpp
+12-6clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+5-2clang/test/CIR/CodeGen/dtors.cpp
+179-345 files

LLVM/project 271a088lldb/source/Core ModuleList.cpp, lldb/source/Host/macosx/objcxx HostInfoMacOSX.mm

[lldb] Load scripts from code signed dSYM bundles (#189444)

LLDB automatically discovers, but doesn't automatically load, scripts in
the dSYM bundle. This is to prevent running untrusted code. Users can
choose to import the script manually or toggle a global setting to
override this policy. This isn't a great user experience: the former
quickly becomes tedious and the latter leads to decreased security.

This PR offers a middle ground that allows LLDB to automatically load
scripts from trusted dSYM bundles. Trusted here means that the bundle
was signed with a certificate trusted by the system. This can be a
locally created certificate (but not an ad-hoc certificate) or a
certificate from a trusted vendor.
DeltaFile
+78-0lldb/test/API/macosx/dsym_codesign/TestdSYMCodesign.py
+35-0lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+28-0lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
+12-6lldb/source/Core/ModuleList.cpp
+6-4lldb/source/Target/TargetProperties.td
+6-0lldb/source/Target/Target.cpp
+165-1010 files not shown
+195-1316 files

LLVM/project 7da3a66bolt/lib/Rewrite RewriteInstance.cpp

[BOLT] Check for write errors before keeping output file (#190359)

Summary:
When the disk runs out of space during output file writing, BOLT would
crash with SIGSEGV/SIGABRT because raw_fd_ostream silently records write
errors and only reports them via abort() in its destructor. This made it
difficult to distinguish real BOLT bugs from infrastructure issues in
production monitoring.

Add an explicit error check on the output stream before calling
Out->keep(), so BOLT exits cleanly with exit code 1 and a clear error
message instead.

Test: manually verified with a full filesystem that BOLT now prints
"BOLT-ERROR: failed to write output file: No space left on device" and
exits with code 1.
DeltaFile
+7-0bolt/lib/Rewrite/RewriteInstance.cpp
+7-01 files

FreeNAS/freenas 325af90src/middlewared/middlewared/plugins/filesystem_ acl_template.py

Fix double-entry
DeltaFile
+10-12src/middlewared/middlewared/plugins/filesystem_/acl_template.py
+10-121 files

LLVM/project 1500421llvm/include/llvm/Target/GlobalISel Combine.td, llvm/test/CodeGen/AArch64 neon-bitwise-instructions.ll

[GlobalISel] Add `sub(-1, x) -> (xor x, -1)` from SelectionDAG (#181014)

This PR adds the pattern `// (sub -1, x) -> (xor x, -1)` to GlobalISel
from SelectionDAG.

Original SelectionDAG rewrite:
https://github.com/llvm/llvm-project/blob/5b4811eddb28264ef1ccacc93c0f7d8cb0da31c8/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4305

---------

Co-authored-by: Jay Foad <jay.foad at gmail.com>
DeltaFile
+46-1llvm/test/CodeGen/AArch64/GlobalISel/combine-sub.mir
+20-0llvm/test/CodeGen/AArch64/GlobalISel/combine-sub.ll
+8-2llvm/include/llvm/Target/GlobalISel/Combine.td
+4-6llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
+78-94 files

FreeNAS/freenas c51e07fsrc/middlewared/middlewared/plugins/enclosure_ nvme2.py

fix R50BM rear nvme drive bays
DeltaFile
+0-9src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-91 files

LLVM/project df1e67bllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.s.memtime.ll llvm.amdgcn.s.get.waveid.in.workgroup.ll

AMDGPU/GlobalISel: RegBankLegalize rules for s_memtime, s_get_waveid (#190268)
DeltaFile
+5-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll
+2-2llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+1-2llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir
+2-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
+1-2llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
+11-115 files

NetBSD/pkgsrc CQfnfHBchat/icb distinfo, chat/icb/patches patch-readline_Make

   build fix
   In NetBSD 11 and possibly also SmartOS the ar 'l' modifier went from
   l   This modifier is accepted but not used.
   to
   l   Specify dependencies of this library.
   so ar clq went to "not working"; remove the l and reorder to
   "command first, modifier after" and it'll build again.
   Test-built on netbsd-11 and netbsd-10
VersionDeltaFile
1.2+10-1chat/icb/patches/patch-readline_Make
1.24+2-2chat/icb/distinfo
+12-32 files

LLVM/project 730a07fllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-no-dotprod.ll partial-reduce-chained.ll

[LV] Only create partial reductions when profitable. (#181706)

We want the LV cost-model to make the best possible decision of VF and
whether or not to use partial reductions. At the moment, when the LV can
use partial reductions for a given VF range, it assumes those are always
preferred. After transforming the plan to use partial reductions, it
then chooses the most profitable VF. It is possible for a different VF
to have been more profitable, if it wouldn't have chosen to use partial
reductions.

This PR changes that, to first decide whether partial reductions are
more profitable for a given chain. If not, then it won't do the
transform.

This causes some regressions for AArch64 which are addressed in a
follow-up PR to keep this one simple.
DeltaFile
+94-82llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-9llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
+6-8llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
+6-6llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
+4-4llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
+119-1095 files

FreeBSD/ports d7f642fsecurity/vuxml/vuln 2026.xml

security/vuxml: Add mongodb{78}0 vulnerability

 CVSS-B         6.0 MEDIUM
 Vector:        CVSS:4.0/AV:N/AC:H/AT:N/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N
DeltaFile
+37-0security/vuxml/vuln/2026.xml
+37-01 files