FreeBSD/src f98d856sys/netpfil/ipfilter/netinet fil.c

ipfilter(4): Fix a typo in a source code comment

- s/pointr/pointer/

Obtained from:  NetBSD
MFC after:      3 days
DeltaFile
+1-1sys/netpfil/ipfilter/netinet/fil.c
+1-11 files

LLVM/project 2cb0587clang/lib/StaticAnalyzer/Checkers DanglingPtrDeref.cpp

[analyzer] Add aggregate lifetime source binding to DanglingPtrDeref
DeltaFile
+8-0clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
+8-01 files

LLVM/project 354bafaclang/lib/StaticAnalyzer/Checkers LifetimeModeling.cpp, clang/test/Analysis lifetime-bound.cpp

Add getRegionsFromSVal helper and correct test function name.
DeltaFile
+10-7clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
+2-2clang/test/Analysis/lifetime-bound.cpp
+12-92 files

LLVM/project b22c8a6llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination ssub-with-overflow.ll

[ConstraintElimination] Defer removal of simplified ssub.with.overflow (#215135)

replaceSubOverflowUses erased the intrinsic as soon as it became dead.
That frees the intrinsic's operand Use array, but the worklist can still
hold UseCheck entries pointing into it, storing a now invalid pointer to
a Use *.

Instead of erasing the intrinsic in place, poison its arguments and push
it onto ToRemove.

PR: https://github.com/llvm/llvm-project/pull/215135
DeltaFile
+46-0llvm/test/Transforms/ConstraintElimination/ssub-with-overflow.ll
+4-1llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+50-12 files

LLVM/project a74f304lldb/source/Plugins/Process/Utility RegisterTypeDetector_arm64.cpp RegisterTypeDetector_arm64.h

[lldb][AArch64] Detect type for many registers with a single function

It was pointed out during review of https://github.com/llvm/llvm-project/pull/214515
that the type for the 2 GCS registers will be created twice.
Each one will have the same ID so we will only emit one and
the other goes unused.

To account for this, and the possibility of not just 2 but N
registers later, I've changed the name in the register entry
to a list of names.

So for the 2 GCS registers we only do detection once, and both
of them will refer to the same instance of the type.
DeltaFile
+14-14lldb/source/Plugins/Process/Utility/RegisterTypeDetector_arm64.h
+2-1lldb/source/Plugins/Process/Utility/RegisterTypeDetector_arm64.cpp
+16-152 files

LLVM/project 43d162flldb/source/Plugins/Process/Utility RegisterTypeDetector_arm64.h

[lldb][AArch64] Remove size from type detector entries

This was passed to the constructor but goes unused.
The detector functions know the size of the type
they're creating already.
DeltaFile
+10-11lldb/source/Plugins/Process/Utility/RegisterTypeDetector_arm64.h
+10-111 files

LLVM/project f1890balldb/source/Plugins/Process/Utility RegisterTypeDetector_arm64.h RegisterTypeDetector_arm64.cpp, lldb/test/API/linux/aarch64/mte_core_file TestAArch64LinuxMTEMemoryTagCoreFile.py

[lldb][AArch64] Use unique_ptr instead of statics in RegisterTypeDetector (#214515)

Fixes #214264.

I used static variables for the created types, on the assumption
that only one detector would be used and that the host's
features would not change.

That is true for an lldb-server on a real Linux/FreeBSD system.
It is not true when we use the detector with core files. In the
same LLDB session you might load several files that came from
systems with different features.

The result was that the first detection sets up the static variables
and future detections do not update them. So subsequent core
files can have incorrect types.

(and in future if types vary per-process, we could have the same
issue in lldb-server)

    [30 lines not shown]
DeltaFile
+64-74lldb/source/Plugins/Process/Utility/RegisterTypeDetector_arm64.cpp
+56-26lldb/source/Plugins/Process/Utility/RegisterTypeDetector_arm64.h
+19-0lldb/test/API/linux/aarch64/mte_core_file/TestAArch64LinuxMTEMemoryTagCoreFile.py
+139-1003 files

LLVM/project 9430bcdllvm/include/llvm/Analysis IVDescriptors.h, llvm/lib/Analysis IVDescriptors.cpp

Fixups
DeltaFile
+5-4llvm/include/llvm/Analysis/IVDescriptors.h
+2-1llvm/lib/Analysis/IVDescriptors.cpp
+7-52 files

FreeBSD/src e779914sys/dev/ixl virtchnl.h ixl_pf_iov.c

ixl: Validate VF virtchnl configuration

Bound variable-length virtchnl messages before computing their expected
length, following the newer Intel virtchnl implementation.

Validate VF ring sizes and alignments before programming HMC contexts.
DPDK uses 128-byte ring alignment and 64 through 8160 descriptors;
the virtchnl ABI further specifies TX multiples of 8 and RX multiples
of 32.  Preserve the 4096-descriptor limit on X722.

Validate queue bitmaps before changing any rings, validate all queue
and interrupt contexts before applying a request, and reject invalid
RSS table entries.  Also avoid sending an ACK after VLAN-strip setup
fails and reply to delete-VLAN errors with the correct opcode.

These checks prevent malformed or oversized requests from an untrusted
VF from partially programming resources outside its allocation.

MFC after:      2 weeks
DeltaFile
+108-48sys/dev/ixl/ixl_pf_iov.c
+57-13sys/dev/ixl/virtchnl.h
+165-612 files

LLVM/project 1264c1bclang/lib/CodeGen/Targets LoongArch.cpp, clang/test/CodeGen/LoongArch abi-lp64d.c

[clang][LoongArch] Match GCC ABI handling of integer complex types

GNU integer complex types such as `_Complex unsigned char` and
`_Complex unsigned short` were incorrectly recognized as eligible
floating-point ABI aggregates by `detectFARsEligibleStructHelper`.
When used as a member of a structure, this caused the real and
imaginary parts to be expanded into separate general-purpose argument
registers.

Integer complex types are not floating-point complex types and should
be handled as ordinary aggregates. Restrict the complex-type expansion
path to elements with real floating-point types, allowing small integer
complex aggregates to be packed into a single general-purpose register,
consistent with GCC.
DeltaFile
+28-0clang/test/CodeGen/LoongArch/abi-lp64d.c
+6-0clang/lib/CodeGen/Targets/LoongArch.cpp
+34-02 files

NetBSD/pkgsrc JqDIZM6doc CHANGES-2026

   Updated net/ncdc, sysutils/ncdu
VersionDeltaFile
1.5129+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc 4DknXQUsysutils/ncdu Makefile distinfo

   ncdu: updated to 1.22

   1.22

   - Add support for @-prefixed lines to ignore errors in config file (from 2.8)
   - List all supported options in `--help` (from 2.8)
   - Use `kB` instead of `KB` in `--si` mode (from 2.8)
   - Add `--graph-style` option (from 2.1)
   - Fix supported range of uid/gid numbers
VersionDeltaFile
1.15+4-4sysutils/ncdu/distinfo
1.21+4-3sysutils/ncdu/Makefile
+8-72 files

NetBSD/pkgsrc ey5aUAUnet/ncdc distinfo Makefile

   ncdc: updated to 1.25

   1.25

   - Add support for IP to country lookups through libloc
   - Add `location_db` config option
   - Indicate GeoIP support in `--version`
VersionDeltaFile
1.45+5-6net/ncdc/Makefile
1.11+4-4net/ncdc/distinfo
+9-102 files

LLVM/project 57227c7mlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector canonicalize.mlir

[mlir][vector] Don't fold in_bounds for scalable vector dimensions (#213506)

`isInBounds` compares `index + getVectorType().getDimSize(resultIdx)`
against the static size of the corresponding source dimension. For a
scalable dimension the vector holds `vscale * getDimSize(resultIdx)`
elements, so the static size is only a lower bound and the comparison
can succeed for a transfer that is actually out of bounds.

For example, reading `vector<[4]xf32>` at index 0 of a `memref<4xf32>`
folds to `in_bounds = [true]` because `0 + 4 <= 4`. Lowering then turns
a predicated masked load into a plain full-width load:

```mlir
// Without the fold: predicated, lanes >= 4 are inactive.
%8  = llvm.intr.stepvector : vector<[4]xi32>
%16 = llvm.icmp "slt" %8, %15 : vector<[4]xi32>
%23 = llvm.intr.masked.load %22, %16, %20 {alignment = 4 : i32} :
        (!llvm.ptr, vector<[4]xi1>, vector<[4]xf32>) -> vector<[4]xf32>


    [19 lines not shown]
DeltaFile
+31-0mlir/test/Dialect/Vector/canonicalize.mlir
+4-0mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+35-02 files

FreeBSD/src 4b195f1sys/dev/pci pci_iov.c

pci_iov: Roll back failed VF enumeration

pci_iov_enumerate_vfs() logged a failed VF creation or driver
configuration but still reported the whole SR-IOV configuration as
successful.  The PF remained enabled with the requested NumVFs and
driver state even though one or more VF children were absent.

Make VF enumeration atomic.  Delete children created by the failed
attempt, invoke the PF driver cleanup, disable VF memory space and VF
Enable, release the IOV resources, and return the original error to
iovctl.  Also treat failure to create a VF child as an error instead
of silently accepting a partial configuration.

MFC after:      2 weeks
DeltaFile
+26-7sys/dev/pci/pci_iov.c
+26-71 files

FreeBSD/src ae122c5sys/dev/ixl ixl_pf_iov.c

ixl: Initialize VF sysctl contexts before use

The VF array is zeroed at allocation, but its sysctl contexts were
only populated after each VF was successfully added.  If VF setup
failed, IOV teardown still passed every requested VF context to
sysctl_ctx_free().  An untouched context is not an initialized empty
TAILQ and caused a page fault during teardown.

Initialize every VF context with the array so both successful setup
and partial-failure cleanup have a valid lifetime.

MFC after:      2 weeks
DeltaFile
+3-1sys/dev/ixl/ixl_pf_iov.c
+3-11 files

LLVM/project 82825ddclang/lib/CodeGen/Targets Mips.cpp, clang/test/CodeGen mips-zero-sized-struct.c

[MIPS] fix zero-sized type  causing incorrect register for later float arguments (#213746)

fixes https://github.com/llvm/llvm-project/issues/213540

https://godbolt.org/z/zMW6MMoze

On O32 a zero-sized type is not passed, but it does (in GCC) end the run
of leading float arguments that are passed in float registers. The new
behavior is consistent with GCC. It seems unlikely that people rely on
this (zero-sized structs are rare in C, but much more common in Rust) so
I did not bother with the ABI flag. It could be added though if there is
reason to.
DeltaFile
+115-0clang/test/CodeGen/mips-zero-sized-struct.c
+27-3clang/lib/CodeGen/Targets/Mips.cpp
+142-32 files

FreeBSD/src 8eb4403sys/dev/iavf iavf_txrx_iflib.c

iavf: Honor iflib transmit completion batching

iavf uses descriptor writeback by default.  Hardware writes completion
status into a transmit descriptor only when it completes a descriptor
marked RS.  iavf marked every packet RS even though its report-status
queue recorded and inspected only descriptors selected by iflib.  The
other completion writes could not help reclaim descriptors.

iflib marks selected packets with IPI_TX_INTR as completion
checkpoints.  It forces a checkpoint as deferred work or ring pressure
grows.  Retain EOP on every packet, but set RS only at those
checkpoints.

The deprecated head-writeback option on 700-series VFs gets the same
batching: each RS checkpoint permits hardware to publish the completed
ring head.

DPDK uses the same sparse RS design.  Let iflib choose the adaptive
interval for FreeBSD.  This is a PCIe/memory bandwidth savings.

    [2 lines not shown]
DeltaFile
+5-4sys/dev/iavf/iavf_txrx_iflib.c
+5-41 files

FreeBSD/src dd32931sys/dev/ixl ixl_txrx.c

ixl: Honor iflib transmit completion batching

ixl uses head writeback by default.  Hardware publishes the transmit
ring head through DMA only after completing a descriptor marked RS.
Marking every packet requested much more frequent head updates than
iflib needs to reclaim descriptors.

iflib marks selected packets with IPI_TX_INTR as completion
checkpoints.  It forces a checkpoint as deferred work or ring pressure
grows.  Retain EOP on every packet, but set RS only at those
checkpoints.  This batches head writebacks while preserving bounded
descriptor reclamation.

The optional descriptor writeback mode benefits as well.  ixl already
recorded only IPI_TX_INTR descriptors in its report-status queue, so
status written for every other packet was not inspected.

DPDK uses the same sparse RS design.  Let iflib choose the adaptive
interval for FreeBSD.  This is a PCIe/memory bandwidth savings.

    [2 lines not shown]
DeltaFile
+5-4sys/dev/ixl/ixl_txrx.c
+5-41 files

FreeBSD/ports d12faf0net/zapret2 Makefile distinfo

net/zapret2: Update 1.0.3 => 1.0.4

Approved by:            yuri@ (maintainer, Mentor)
Approved by:            db@, yuri@ (Mentors, implicit)
Differential Revision:  https://reviews.freebsd.org/D58752
DeltaFile
+3-3net/zapret2/distinfo
+1-1net/zapret2/Makefile
+4-42 files

NetBSD/pkgsrc-wip 3b5e58dkubectl Makefile COMMIT_MSG

kubectl: update to 1.36.3

Bug or Regression

* Fixes a 1.36 regression in server side apply where patching a container
  type (list or map) could result in 422 required errors for apply requests
  that previously succeeded. [SIG API Machinery, Architecture, Auth, CLI,
  Cloud Provider, Cluster Lifecycle, Network, Node, Scheduling and Storage]
DeltaFile
+9-9kubectl/distinfo
+2-2kubectl/go-modules.mk
+1-1kubectl/Makefile
+1-1kubectl/COMMIT_MSG
+13-134 files

NetBSD/othersrc kV9ZTNnusr.bin/gooeymux term.c kernelstuff.h

   make terminal colours configurable vie config.h
VersionDeltaFile
1.2+7-3usr.bin/gooeymux/config.h
1.3+3-3usr.bin/gooeymux/kernelstuff.h
1.4+2-2usr.bin/gooeymux/term.c
+12-83 files

LLVM/project 9234ec8clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll amdgcn.bitcast.512bit.ll

Rebase

Created using spr 1.3.6-beta.1
DeltaFile
+9,385-9,006llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+4,767-5,119llvm/test/CodeGen/AMDGPU/bf16.ll
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,004clang/docs/ClangFormatStyleOptions.rst
+3,972-3,823llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+30,325-29,63910,255 files not shown
+552,422-308,93010,261 files

LLVM/project 413f81bclang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll amdgcn.bitcast.512bit.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+9,385-9,006llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+4,767-5,119llvm/test/CodeGen/AMDGPU/bf16.ll
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,004clang/docs/ClangFormatStyleOptions.rst
+3,972-3,823llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+30,325-29,63910,255 files not shown
+552,422-308,93010,261 files

NetBSD/pkgsrc 0oPsDaAwww/py-flask-admin distinfo, www/py-flask-admin/patches patch-pyproject.toml

   py-flask-admin: fix build with flit_core 4.
VersionDeltaFile
1.1+14-0www/py-flask-admin/patches/patch-pyproject.toml
1.32+2-1www/py-flask-admin/distinfo
+16-12 files

NetBSD/pkgsrc-wip 96831c3iosevka-aile-ttf distinfo, iosevka-curly-slab-ttf distinfo

iosevka-*: update to 34.8.0

* Add diagonal-tailed variants for Lower Eszet (ß).
* Add Characters:
  * LATIN CAPITAL LETTER VISIGOTHIC Z (U+A762).
  * LATIN SMALL LETTER VISIGOTHIC Z (U+A763).
* Refine shape of the following characters:
  * LATIN CAPITAL LETTER A WITH BREVE (U+0102).
  * LATIN SMALL LETTER A WITH BREVE (U+0103).
  * LATIN CAPITAL LETTER E WITH BREVE (U+0114).
  * LATIN SMALL LETTER E WITH BREVE (U+0115).
  * LATIN CAPITAL LETTER G WITH BREVE (U+011E).
  * LATIN SMALL LETTER G WITH BREVE (U+011F).
  * LATIN CAPITAL LETTER I WITH BREVE (U+012C).
  * LATIN SMALL LETTER I WITH BREVE (U+021D).
  * LATIN CAPITAL LETTER ENG (U+014A).
  * LATIN CAPITAL LETTER O WITH BREVE (U+014E).
  * LATIN SMALL LETTER O WITH BREVE (U+014F).
  * LATIN CAPITAL LETTER U WITH BREVE (U+016C).

    [55 lines not shown]
DeltaFile
+3-3iosevka-ttf/distinfo
+3-3iosevka-slab-ttf/distinfo
+3-3iosevka-etoile-ttf/distinfo
+3-3iosevka-curly-ttf/distinfo
+3-3iosevka-curly-slab-ttf/distinfo
+3-3iosevka-aile-ttf/distinfo
+18-1812 files not shown
+30-3018 files

NetBSD/pkgsrc TvSX2YXdoc CHANGES-2026

   doc: Updated textproc/py-sphinxcontrib-jquery to 4.1nb3
VersionDeltaFile
1.5128+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 8sZpknztextproc/py-sphinxcontrib-jquery PLIST Makefile

   py-sphinxcontrib-jquery: fix PLIST for latest flit_core and depend on it

   Bump PKGREVISION.
VersionDeltaFile
1.11+3-3textproc/py-sphinxcontrib-jquery/Makefile
1.4+1-0textproc/py-sphinxcontrib-jquery/PLIST
+4-32 files

FreeBSD/doc 90fc64edocumentation/content/ru/books/handbook/jails _index.adoc _index.po

update translation of books/handbook/jails to Russian

Differential Revision: https://reviews.freebsd.org/D58751
DeltaFile
+4,294-598documentation/content/ru/books/handbook/jails/_index.po
+1,046-50documentation/content/ru/books/handbook/jails/_index.adoc
+5,340-6482 files

LLVM/project 8ea1b9dllvm/include/llvm/ExecutionEngine/Orc/RTBridge Proxy.h, llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS ProxySpecs.h

[ORC] Generalize rt::Proxy result mapping to Error / Expected<T> callees (#215181)

Previously a Proxy's callee return type RetT mapped to the client-facing
result (ErrorRetT) as: void -> Error, everything else -> Expected<RetT>.
That could not represent a callee whose own result is fallible: an
Error-returning callee became Expected<Error>, and an Expected<T> callee
became Expected<Expected<T>>.

Generalize the mapping to:
  void        -> Error
  Error       -> Error
  T           -> Expected<T>
  Expected<T> -> Expected<T>   (flattened, not nested)

so a dispatch failure and the callee's own error collapse into a single
Error/Expected<T>. The SPS ProxySpec dispatch handles the new cases,
forwarding an Error/Expected callee's own result and, on a dispatch
failure, discarding the (unproduced) placeholder result before reporting
the error.

    [5 lines not shown]
DeltaFile
+78-0llvm/unittests/ExecutionEngine/Orc/ProxyTest.cpp
+71-0llvm/unittests/ExecutionEngine/Orc/SPSProxiesTest.cpp
+40-8llvm/include/llvm/ExecutionEngine/Orc/RTBridge/Proxy.h
+14-1llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS/ProxySpecs.h
+203-94 files