LLVM/project 7d08e9dlldb/source/Utility DataExtractor.cpp, lldb/unittests/Utility DataExtractorTest.cpp

[lldb] Fix misaligned pointer UB in DataExtractor::GetU16/U32/U64 array reads (#213038)

The multi-value overloads
`DataExtractor::GetU16`/`GetU32`/`GetU64(offset_ptr, dst, count)` extract `count` consecutive integers from the buffer. When the
data byte order differs from the host, they walked the source and destination
through typed pointers (`const uint16_t *`/`uint32_t *`/`uint64_t *`).

`GetData()` hands back a pointer to an arbitrary byte offset within the
underlying buffer, and the caller's destination is an arbitrary `void*`, so
neither is guaranteed to be aligned for the wider integer type. Casting
such a byte-offset pointer to a wider typed pointer, advancing it, and loading or
storing through it is undefined behavior even when the individual accesses go
through `memcpy`-based helpers, because the typed pointer itself is required to be aligned.

Compiling with UBSan's alignment check (`-fsanitize=alignment`) turns this UB
into a runtime diagnostic, for example:

```
runtime error: store to misaligned address 0x... for type 'uint16_t',

    [9 lines not shown]
DeltaFile
+46-126lldb/source/Utility/DataExtractor.cpp
+167-0lldb/unittests/Utility/DataExtractorTest.cpp
+213-1262 files

FreeBSD/src 0053a4bsys/netinet tcp_var.h

tcp: fix TF_BITS

Add missing TF_DISCONNECTED bit.

Reported by:    Hannes Elfert
Fixes:          40dbb06fa73c ("inpcb: retire INP_DROPPED and in_pcbdrop()")
DeltaFile
+1-1sys/netinet/tcp_var.h
+1-11 files

LLVM/project 18b8812clang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c, llvm/test/CodeGen/AArch64 fixed-deinterleave-intrinsics.ll sve-interleaved-accesses.ll

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+2,728-2,728clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+2,724-2,724clang/test/CodeGen/LoongArch/lasx/builtin.c
+3,049-0llvm/test/CodeGen/AArch64/interleaved-accesses.ll
+1,956-0llvm/test/CodeGen/AArch64/sve-interleaved-accesses.ll
+166-1,134llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
+1,091-0llvm/test/CodeGen/AArch64/fixed-deinterleave-intrinsics.ll
+11,714-6,586295 files not shown
+17,330-12,428301 files

LLVM/project 75a2936llvm/unittests/CAS ObjectStoreTest.cpp

fix linux and windows test failures

Created using spr 1.3.7
DeltaFile
+9-7llvm/unittests/CAS/ObjectStoreTest.cpp
+9-71 files

LLVM/project 6a8ce46llvm/lib/Transforms/Scalar TailRecursionElimination.cpp, llvm/test/Transforms/TailCallElim shl-accumulator-opt.ll

[TailRecElim] Fix miscompile of returns using a non-eliminated recursive call (#214503)
DeltaFile
+53-0llvm/test/Transforms/TailCallElim/shl-accumulator-opt.ll
+16-24llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
+69-242 files

LLVM/project ec98c8fllvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/test/CodeGen/AArch64 machine-outliner-macho-compact-unwind-frame-fp.mir machine-outliner-macho-compact-unwind-frame.mir

[AArch64] Use a frame record for non-leaf outlined functions on MachO (#213711)

A non-leaf outlined function saves LR. Saving it alone (str x30) can't
be described by MachO compact unwind, so the encoder falls back to a
larger DWARF FDE. Saving a full frame record (stp x29,x30 ; mov x29,sp)
with the matching CFI gets the small UNWIND_ARM64_MODE_FRAME encoding
instead, for one extra instruction (the mov). getOutliningCandidateInfo
accounts for it.

Only on MachO, where the ABI keeps x29 reserved as the frame pointer, so
setting it up here can't clobber a live value. Other targets keep the
str x30 save (DWARF describes it fine).

Size on a large iOS binary (~70 MiB of code): ~630 KiB smaller
uncompressed -- ~370 KiB less unwind info (compact FRAME instead of
DWARF FDEs) and ~260 KiB less .text. The .text win is a link-time
effect: with compact unwind the linker can ICF-fold identical outlined
functions; a per-function DWARF FDE (which points at its own function)
keeps them distinct and unfoldable.

Assisted-by: Claude Opus 4.8
DeltaFile
+127-21llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+107-0llvm/test/CodeGen/AArch64/machine-outliner-macho-compact-unwind-frame.mir
+89-0llvm/test/CodeGen/AArch64/machine-outliner-macho-compact-unwind-frame-fp.mir
+323-213 files

LLVM/project e3e337fllvm/test/Transforms/SLPVectorizer/X86 supernode.ll

[SLP][NFC]Add an extra test with altop nodes reordering, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/215367
DeltaFile
+55-0llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
+55-01 files

NetBSD/pkgsrc gOwP2y4doc CHANGES-2026

   Note addition of ldis, version 20260810, to the packages collection.
VersionDeltaFile
1.5142+2-1doc/CHANGES-2026
+2-11 files

LLVM/project 4455e8allvm/test/MC/Disassembler/AMDGPU gfx950_dasm_err.txt gfx9_dasm_err.txt

[NFC][AMDGPU] Reorganize dasm error tests (#215168)
DeltaFile
+0-148llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+51-0llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_err.txt
+48-0llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_err.txt
+43-0llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_err.txt
+10-0llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_err.txt
+10-0llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
+162-1486 files

NetBSD/pkgsrc eZUjr5Ndevel Makefile

   Add and enable ldis, the Lua disassembler, version 20260810
VersionDeltaFile
1.4672+2-1devel/Makefile
+2-11 files

NetBSD/pkgsrc IkYhYAudevel/ldis distinfo PLIST, devel/ldis/patches patch-bin-Makefile

   Import ldis, a lua 5.4 and 5.5 disassembler, into the packages collection.

        This is ldis, a disassembler for lua binary files.  It works for
        binaries compiled by the 5.4 and 5.5 branches of lua, discovering the
        compiler used to compile into the opcodes, and delivers the assembly
        opcodes and data in an easy to read form.  It is similar to the output
        produced by luac -l -l, but of course, does not need the lua source
        code around to be able to recover the opcodes, constants, upvals and
        local variables.

        In general, there is little lua consistency between major lua releases.
        Bytecodes are numbered differently, and so there is little
        consistency, and compiled programs usually need to be recompiled.
        This disassembler tries to bridge that gap, by being able to
        disassemble both 5.4 and 5.5-compiled binaries.
VersionDeltaFile
1.1+20-0devel/ldis/Makefile
1.1+15-0devel/ldis/patches/patch-bin-Makefile
1.1+13-0devel/ldis/DESCR
1.1+9-0devel/ldis/PLIST
1.1+6-0devel/ldis/distinfo
+63-05 files

LLVM/project 4a877c9llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU gfx9_dasm_mai_err.txt

[AMDGPU][MC] Return fail when it is not a VGPR in the decoder (#215136)

Fixes #215003.
DeltaFile
+26-0llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_mai_err.txt
+8-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+34-02 files

LLVM/project 2b52459llvm/lib/Target/NVPTX NVPTXTargetMachine.cpp

[NVPTX] Remove addMachineSSAOptimization override (#215321)

This effectively reverts 6dca83987c838a. 

In the 10 years since we forked addMachineSSAOptimization we have not
changed it at all and the only differences are from our version going a
little bit stale. This change will add a second run of
`DeadMachineInstructionElim` after `PeepholeOptimizerLegacy` since this
was added after we copied our version but I don't expect there to be
major behavior impacts.
DeltaFile
+0-41llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+0-411 files

LLVM/project e03cfd9clang/test/OpenMP target_parallel_reduction_half_codegen.c, llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h

[OpenMP][offload] Fix target reduction for narrow non-integer types (#215294)

Cast the result of the shuffle function back to the width that
corresponds to the integer that is used to hold the bits of the actual
type.
Prevents corresponding reductions from returning NaN or otherwise
incorrect results at higher optimization levels.

Claude assisted with this patch.
DeltaFile
+37-0offload/test/offloading/xteam_fp16_reduction.c
+30-0clang/test/OpenMP/target_parallel_reduction_half_codegen.c
+6-4llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+2-1llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+75-54 files

LLVM/project 2915160clang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c, clang/test/CodeGen/RISCV bitint.c

[Clang][CodeGen] Emit dereferenceable and nofree for indirect arguments (#213347)

Followup to https://github.com/llvm/llvm-project/pull/201999. Closes
https://github.com/llvm/llvm-project/issues/129337.

In the non-byval case we can't infer `dereferenceable` and `nofree`, so
we will need to add those attributes manually. Indirect arguments are
certainly `nofree` because function parameters have automatic storage
duration. Furthermore, the indirect pointer needs to always point to an
instance of the parameter's type, as function parameters need to be
initialized, so the indirect pointer must be `dereferenceable`.
DeltaFile
+2,728-2,728clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+2,724-2,724clang/test/CodeGen/LoongArch/lasx/builtin.c
+93-93clang/test/CodeGen/RISCV/bitint.c
+56-56clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
+56-56clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
+46-46clang/test/CodeGen/SystemZ/systemz-abi-vector.c
+5,703-5,703128 files not shown
+6,524-6,508134 files

LLVM/project ad716f7clang/lib/CodeGen CGVTT.cpp CGPointerAuth.cpp, clang/lib/Frontend CompilerInvocation.cpp

[PAC][clang] Implement address/type discrimination for VTT vtable pointers (#205808)

Add support for address and type discrimination for vtable pointers
stored in VTTs under the `-fptrauth-vtt-vtable-pointer-discrimination`
option. This option is not enabled by default on any target and works in
combination with `-fptrauth-vtable-pointer-address-discrimination`
and/or `-fptrauth-vtable-pointer-type-discrimination`. Explicit user
control over the signing schema for VTT entries is not currently
supported.
    
For address discrimination, the address of the corresponding VTT entry
is used as the discriminator.
    
The type discriminator is computed similarly to the one used for vtable
pointers stored in objects, but is based on the vtable type rather than
its primary base. To distinguish VTT entries from object vtable
pointers, the discriminator is derived from the vtable mangling with an
appended `_VTT` suffix.
DeltaFile
+102-0clang/test/CodeGenCXX/ptrauth-vtable-in-vtt.cpp
+29-18clang/lib/CodeGen/CGPointerAuth.cpp
+22-11clang/test/Preprocessor/ptrauth_feature.c
+17-11clang/lib/CodeGen/CGVTT.cpp
+13-2clang/lib/Frontend/CompilerInvocation.cpp
+10-4clang/test/Driver/aarch64-ptrauth.c
+193-4615 files not shown
+252-6421 files

NetBSD/pkgsrc-wip 524abb2rust-beta Makefile distinfo

rust-beta: update to 1.98.0beta.7
DeltaFile
+3-3rust-beta/distinfo
+1-1rust-beta/Makefile
+4-42 files

LLVM/project 317aa53clang/lib/CodeGen CGBuiltin.cpp, clang/test/CodeGen builtin-stdc-bit-functions.c

[clang] Fix crash in __builtin_stdc_bit_ceil for a 1-bit _BitInt (#214822)

The literal 2 as an ArgType constant requires at least 2 bits. For a
1-bit unsigned _BitInt, this triggers an assertion failure in APInt's
constructor (and silently computes a corrupted result in NDEBUG builds).
Compute the value via a shift of the always-valid constant 1 instead, so
it never depends on ArgType's width.

Fixes: #214478
DeltaFile
+7-0clang/test/CodeGen/builtin-stdc-bit-functions.c
+2-3clang/lib/CodeGen/CGBuiltin.cpp
+4-0clang/test/SemaCXX/constexpr-builtin-stdc-bit-functions.cpp
+13-33 files

FreeBSD/src 435cde9sys/dev/ixgbe if_ix.c

ixgbe: Report the management packet drop counter

The management_pkts_drpd sysctl was wired to MNGPTC, making it an
alias of management_pkts_txd, instead of MNGPDC.

MFC after:      3 days
DeltaFile
+1-1sys/dev/ixgbe/if_ix.c
+1-11 files

LLVM/project f22b57fclang/lib/StaticAnalyzer/Core HTMLDiagnostics.cpp, clang/test/Analysis/html_diagnostics highlight-range-mapping.cpp

[analyzer] Fix -analyzer-output=html assert on reversed and macro ranges

HTMLDiagnostics::HighlightRange guarded against a reversed range by
comparing line numbers, so a same-line reversal - which is what the piece for
an implicit copy constructor carries - reached html::HighlightRange.
Its scan walks from begin to end, ran off the end of the buffer, and asserted:
https://godbolt.org/z/sTb5qfjjd

  Invalid position to insert! (RewriteRope.h)

It also added the end token's length itself and then passed a token range to
html::HighlightRange, which measured the token again, this time from the
interior. For most tokens the two cancel, but where the tail re-lexes longer
the highlight reached past the end of the range, e.g. over a trailing ';'.

Use getExpansionRangeInFile(), which rejects reversed and cross-file ranges,
then convert once and tell html::HighlightRange the range is already
char-granular.


    [4 lines not shown]
DeltaFile
+43-0clang/test/Analysis/html_diagnostics/highlight-range-mapping.cpp
+8-27clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
+51-272 files

LLVM/project d77fa50clang/lib/StaticAnalyzer/Core SarifDiagnostics.cpp, clang/test/Analysis/diagnostics sarif-macro-expansion.c

[analyzer] Fix -analyzer-output=sarif crash on macro-expanded ranges (#214462)

A path piece whose range ends inside a macro expansion aborted the whole
document: https://godbolt.org/z/61vWYcsWj

  Cannot create a physicalLocation from invalid SourceRange!

convertTokenRangeToCharRange() built the end with
Lexer::getLocForEndOfToken(), which returns an invalid location for a
macro ID that is not at the end of its expansion, and used it unchecked.
The analyzer's own test corpus hits this in nine files; text and plist output
were unaffected because both already map such ranges to the expansion.

- Use getExpansionRangeInFile(), so the region covers the macro use like
  the other two outputs.
- Fall back to a caret when the range is unusable. A thread flow needs a
  location per piece, so dropping one would truncate the reported path.
  This also stops reversed ranges producing regions with:
  endColumn < startColumn.

    [4 lines not shown]
DeltaFile
+22-21clang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
+35-0clang/test/Analysis/diagnostics/sarif-macro-expansion.c
+57-212 files

FreeBSD/src 392f0afsys/dev/ixgbe ixgbe_phy.c

ixgbe: Recognize production X550 PHY IDs

According to Linux 5f1c3589b0f0, the X550 PHY classifier still matches
an alpha silicon ID, while the shared definitions contain the two
production IDs.  This can leave production hardware on the generic
probing path and issue unnecessary PHY queries.

MFC after:      2 weeks
DeltaFile
+2-0sys/dev/ixgbe/ixgbe_phy.c
+2-01 files

LLVM/project f179c58clang/lib/Sema SemaOpenMP.cpp, clang/test/OpenMP allocate_missing_predefined_allocator_enum.cpp allocate_missing_predefined_allocator.cpp

[OpenMP] Fix a crash when a predefined allocator is not declared. (#215312)

`findOMPAllocatorHandleT()` records `omp_allocator_handle_t` before it
fills the table of predefined allocators, but that type is also what it
tests on entry to decide the table is already built. So when a
translation unit declares the type without declaring every predefined
allocator, the first call gives up partway through the table and reports
an error, while the next one takes the early exit and reports success.
`getAllocatorKind()` then walks the abandoned table and dereferences a
null allocator.

A single directive naming an allocator was therefore diagnosed, but a
second one crashed clang. Code that includes <omp.h> declares all of
them and never sees this.

Record the type once the table is known to be complete.

Fixes #157868 and #215277.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+20-0clang/test/OpenMP/allocate_missing_predefined_allocator_enum.cpp
+20-0clang/test/OpenMP/allocate_missing_predefined_allocator.cpp
+5-1clang/lib/Sema/SemaOpenMP.cpp
+45-13 files

LLVM/project d450ba4clang/test/CodeGenHIP builtins-make-buffer-rsrc.hip, clang/test/CodeGenOpenCL builtins-amdgcn-make-buffer-rsrc.cl

[AMDGPU] Improve handling of numRecords for make.buffer.rsrc (#213180)

1. Change make.buffer.rsrc to take an arbitrary-width integer for the
numRecords argument, allowing pre-gfx1250 targets to pass in an i32
(thus preventing truncations from mysteriously appearing in the
backend). To do this, document the semantics of make.buffer.rsrc to be
zero-extension if the number of records is too short.
2. Update MLIR to pass the correct (or near-correct) width of integer
depending on the target's features. Therefore, expose "having a 45-bit
num_records" to clang.
3. Per AI review, ensure that the numRecords field doesn't spill into
the flags fields by actively truncating to 45 bits.
4. While we're here, specify gfx13 as having a 45-bit num_records.

---------

Co-authored-by: Codex <codex at openai.com>
DeltaFile
+364-119llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
+353-85llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
+156-76clang/test/CodeGenHIP/builtins-make-buffer-rsrc.hip
+130-52mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
+129-50clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
+7-7llvm/test/Transforms/FunctionAttrs/make-buffer-rsrc.ll
+1,139-38925 files not shown
+1,224-45131 files

LLVM/project 062213fllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU fcanonicalize.bf16.ll vector-reduce-fmax.ll

[AMDGPU] Preserve NaN payload in fcanonicalize constant fold. (#214608)

getCanonicalConstantFP was replacing all NaN inputs (SNaN and
non-default-payload QNaN) with the default-payload QNaN 0x7FC00000. This
does not match AMDGPU hardware behavior: v_max_f32(x, x) quiets an SNaN
by setting bit 22 only, preserving the rest of the payload, and passes
QNaN through unchanged.

Use APFloat::makeQuiet() for the SNaN case and let QNaN fall through
unmodified, matching what the hardware would produce.

Assisted-By: cursor (claude).

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+172-198llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+133-0llvm/test/CodeGen/AMDGPU/fcanonicalize-nan-payload.ll
+54-54llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
+8-8llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
+6-6llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
+1-10llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+374-2762 files not shown
+379-2818 files

LLVM/project 1eae8a7llvm/test/Transforms/LoopVectorize vplan-based-stride-mv-btc.ll vplan-based-stride-mv.ll

[NFC][LV] Use `force-target-supports-*` to simplify `vplan-based-stride-mv*.ll` (#215300)

...and remove unnecessary stderr redirection. Addresses post-commit
review
https://github.com/llvm/llvm-project/pull/214047#pullrequestreview-4885628542
(and extends it to one other file).
DeltaFile
+166-1,134llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
+88-696llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
+254-1,8302 files

LLVM/project 1b89acallvm/include/llvm/CAS OnDiskGraphDB.h ObjectStore.h, llvm/lib/CAS OnDiskCAS.cpp ObjectStore.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+148-0llvm/unittests/CAS/ObjectStoreTest.cpp
+78-0llvm/lib/CAS/OnDiskGraphDB.cpp
+30-4llvm/include/llvm/CAS/ObjectStore.h
+19-0llvm/lib/CAS/ObjectStore.cpp
+14-0llvm/include/llvm/CAS/OnDiskGraphDB.h
+12-0llvm/lib/CAS/OnDiskCAS.cpp
+301-42 files not shown
+317-48 files

LLVM/project cdb491alldb/source/Plugins/Platform/MacOSX PlatformDarwin.cpp, lldb/source/Plugins/Platform/POSIX PlatformPOSIX.h PlatformPOSIX.cpp

[lldb] Replace ConstString in Platform::GetFullNameForDylib (#214874)

Basename is read-only, so it can be a StringRef. Similarly, there's no
need to create a ConstString of a dylib name that may or may not exist.
DeltaFile
+4-6lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
+4-6lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
+4-6lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+2-2lldb/source/Target/Platform.cpp
+1-1lldb/source/Plugins/Platform/Windows/PlatformWindows.h
+1-1lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.h
+16-222 files not shown
+18-248 files

LLVM/project 5c3b538llvm/test/MC/Disassembler/AMDGPU gfx950_dasm_err.txt gfx9_dasm_err.txt

[NFC][AMDGPU] Reorganize dasm error tests
DeltaFile
+0-148llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+51-0llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_err.txt
+48-0llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_err.txt
+43-0llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_err.txt
+10-0llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_err.txt
+10-0llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
+162-1486 files

LLVM/project 071403ellvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU gfx9_dasm_mai_err.txt

[AMDGPU][MC] Return fail when it is not a VGPR in the decoder

Fixes #215003.
DeltaFile
+26-0llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_mai_err.txt
+8-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+34-02 files