LLVM/project 9640b6a — mlir/lib/Dialect/OpenACC/Transforms ACCLoopTiling.cpp, mlir/test/Dialect/OpenACC acc-loop-tiling.mlir

[mlir][acc] Do not tile unstructured loops (#237357)

A loop with an early exit is lowered to an unstructured acc.loop: it has
no induction variables, and its iterations are implemented by the
control flow in its body. Flang produces one for a valid program such as

  !$acc serial
  !$acc loop tile(4)
  do i = 1, n
    if (a(i) < 0) exit
    a(i) = 1.0
  end do
  !$acc end serial

ACCLoopTiling still tried to tile such a loop and indexed its missing
induction variables out of bounds. The tile clause does not require
tiling, so drop it from unstructured loops and leave them as they are.

Assisted-by: Cursor
DeltaFile
+34-0mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
+17-6mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
+51-62 files

LLVM/project 9b3037a — mlir/include/mlir/Dialect/OpenACC OpenACCOps.td OpenACCUtilsTiling.h, mlir/include/mlir/Dialect/OpenACC/Transforms Passes.td

[mlir][acc] Apply tile sizes to the innermost loop first (#237355)

The OpenACC tile clause lists its sizes innermost loop first (OpenACC
3.4, section 2.9.8). In

  !$acc loop tile(128, 1)
  do k = 1, nk
    do i = 1, ni

the i loop is tiled by 128 and the k loop by 1. Frontends store the
sizes on acc.loop in clause order and list the induction variables
outermost first, but tileACCLoops paired the size at position k with
induction variable k, so the nest above was tiled by 128 along k and by
1 along i. The results stay correct, but the tile is transposed: for an
array indexed (i, k), the vector lanes of a tile access memory with a
stride instead of contiguously.

Pair the size at position k with induction variable n - 1 - k in
tileACCLoops and in the pass's tile size type check, and document the

    [10 lines not shown]
DeltaFile
+104-3mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
+21-19mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
+13-10mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
+21-0mlir/test/Dialect/OpenACC/acc-loop-tiling-invalid.mlir
+11-8mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsTiling.h
+12-3mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+182-432 files not shown
+191-488 files

LLVM/project 4755b34 — llvm/lib/Target/DirectX DXILPrettyPrinter.h DirectXPassRegistry.def, llvm/lib/Target/DirectX/DirectXIRPasses DXILDebugInfo.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+118-0llvm/lib/Target/DirectX/DirectX.h
+0-43llvm/lib/Target/DirectX/DXILTranslateMetadata.h
+0-38llvm/lib/Target/DirectX/DXILFinalizeLinkage.h
+0-34llvm/lib/Target/DirectX/DXILPrettyPrinter.h
+17-17llvm/lib/Target/DirectX/DirectXPassRegistry.def
+0-32llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.h
+135-16435 files not shown
+200-55341 files

LLVM/project 09783dd — llvm/lib/Target/DirectX DXILPrettyPrinter.h DirectXPassRegistry.def

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+181-157llvm/lib/Target/DirectX/DXILPrepare.cpp
+127-2llvm/lib/Target/DirectX/DirectX.h
+0-43llvm/lib/Target/DirectX/DXILTranslateMetadata.h
+0-38llvm/lib/Target/DirectX/DXILFinalizeLinkage.h
+18-17llvm/lib/Target/DirectX/DirectXPassRegistry.def
+0-34llvm/lib/Target/DirectX/DXILPrettyPrinter.h
+326-29136 files not shown
+393-71442 files

LLVM/project 12bbbfc — mlir/include/mlir/Dialect/Bufferization/Transforms Passes.td, mlir/lib/Dialect/Bufferization/Transforms StaticMemoryPlannerAnalysis.cpp

[mlir][bufferization] Skip non-identity layouts in static memory planning
DeltaFile
+52-0mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-analysis.mlir
+7-0mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlannerAnalysis.cpp
+1-0mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
+60-03 files

LLVM/project 74c9938 — llvm/lib/Target/Mips/Disassembler CMakeLists.txt

[Mips] Fix disassembler linking in shared builds (#238133)

Follow up to ed4de391c25b065bdf7bc8d9e47feea672.

Fixes the undefined `MIPS_MC::getCOP0Register` symbol when linking
`LLVMMipsDisassembler` with `BUILD_SHARED_LIBS=ON` by adding the missing
`MipsDesc` link dependency.
DeltaFile
+1-0llvm/lib/Target/Mips/Disassembler/CMakeLists.txt
+1-01 files

FreeBSD/ports 2b41693 — audio Makefile, audio/maolan-plugins pkg-descr Makefile

audio/maolan-plugins: New port: CLAP plugins from the Maolan ecosystem

Maolan plugins are a collection of CLAP plugins which currently includes:
- drust: A DrumGizmo-inspired drum sampler plugin.
- rural-modeler: A guitar amp modeler based on NAM and IR.
- EQ: parametric and graphic
- maximizer: adaptive clipper/limiter with Vintage and Modern variants
- imager: stereo width processor with Mild, Wide, and Aggressive algorithms
- monitoring: monitoring toolbox with 17 modes
- saturator: waveshape saturation

WWW: https://maolan.rs

PR:             294885
Reported by:    Goran Mekić <meka at sys.it.com> (new maintainer)
DeltaFile
+1,271-0audio/maolan-plugins/distinfo
+634-0audio/maolan-plugins/Makefile.crates
+33-0audio/maolan-plugins/Makefile
+8-0audio/maolan-plugins/pkg-descr
+1-0audio/Makefile
+1,947-05 files

HardenedBSD/ports 2b41693 — audio Makefile, audio/maolan-plugins pkg-descr Makefile

audio/maolan-plugins: New port: CLAP plugins from the Maolan ecosystem

Maolan plugins are a collection of CLAP plugins which currently includes:
- drust: A DrumGizmo-inspired drum sampler plugin.
- rural-modeler: A guitar amp modeler based on NAM and IR.
- EQ: parametric and graphic
- maximizer: adaptive clipper/limiter with Vintage and Modern variants
- imager: stereo width processor with Mild, Wide, and Aggressive algorithms
- monitoring: monitoring toolbox with 17 modes
- saturator: waveshape saturation

WWW: https://maolan.rs

PR:             294885
Reported by:    Goran Mekić <meka at sys.it.com> (new maintainer)
DeltaFile
+1,271-0audio/maolan-plugins/distinfo
+634-0audio/maolan-plugins/Makefile.crates
+33-0audio/maolan-plugins/Makefile
+8-0audio/maolan-plugins/pkg-descr
+1-0audio/Makefile
+1,947-05 files

LLVM/project 0bbb7e9 — clang/include/clang/Sema DeclSpec.h

Address feedback about comment
DeltaFile
+3-2clang/include/clang/Sema/DeclSpec.h
+3-21 files

LLVM/project a5b2498 — llvm/test/CodeGen/AArch64 win64_vararg_split.ll, llvm/test/CodeGen/AMDGPU cvt-scalef32-scale-demanded-bits-gfx1250.ll cvt-scalef32-scale-demanded-bits-gfx950.ll

Merge branch 'users/void/callbr-asm-error' into users/void/asm-goto-_Complext-types
DeltaFile
+663-0llvm/test/CodeGen/AArch64/win64_vararg_split.ll
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+376-0llvm/test/Transforms/InstCombine/AMDGPU/cvt-scalef32-scale-demanded-bits.ll
+285-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+278-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx950.ll
+222-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx1250.ll
+2,189-86100 files not shown
+3,612-738106 files

LLVM/project 6f293be — llvm/lib/Passes PassBuilderPipelines.cpp, llvm/test/Other new-pm-lto-defaults.ll

Revert "[PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes" (#238109)

Reverts llvm/llvm-project#197678 as it caused an assertion failure in
`AArch64 Assembly Printer` as reported in

https://github.com/llvm/llvm-project/pull/197678#issuecomment-6583881035
and https://github.com/llvm/llvm-project/issues/238154.
DeltaFile
+4-18llvm/lib/Passes/PassBuilderPipelines.cpp
+0-10llvm/test/Other/new-pm-lto-defaults.ll
+4-282 files

LLVM/project 7848e86 — llvm/test/CodeGen/AArch64 win64_vararg_split.ll, llvm/test/CodeGen/AMDGPU cvt-scalef32-scale-demanded-bits-gfx1250.ll cvt-scalef32-scale-demanded-bits-gfx950.ll

Merge branch 'users/void/callbr-indirect-uses' into users/void/machinecse-inlineasm-br
DeltaFile
+663-0llvm/test/CodeGen/AArch64/win64_vararg_split.ll
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+376-0llvm/test/Transforms/InstCombine/AMDGPU/cvt-scalef32-scale-demanded-bits.ll
+285-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+278-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx950.ll
+222-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx1250.ll
+2,189-86102 files not shown
+3,688-746108 files

LLVM/project 42cefec — llvm/test/CodeGen/AArch64 win64_vararg_split.ll, llvm/test/CodeGen/AMDGPU cvt-scalef32-scale-demanded-bits-gfx1250.ll cvt-scalef32-scale-demanded-bits-gfx950.ll

Merge branch 'main' into users/void/callbr-indirect-uses
DeltaFile
+663-0llvm/test/CodeGen/AArch64/win64_vararg_split.ll
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+376-0llvm/test/Transforms/InstCombine/AMDGPU/cvt-scalef32-scale-demanded-bits.ll
+285-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+278-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx950.ll
+222-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx1250.ll
+2,189-86102 files not shown
+3,688-746108 files

LLVM/project a54f9a7 — llvm/test/CodeGen/AArch64 win64_vararg_split.ll, llvm/test/CodeGen/AMDGPU cvt-scalef32-scale-demanded-bits-gfx1250.ll cvt-scalef32-scale-demanded-bits-gfx950.ll

Merge branch 'users/void/callbr-indirect-reg-output' into users/void/callbr-asm-outputs
DeltaFile
+663-0llvm/test/CodeGen/AArch64/win64_vararg_split.ll
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+376-0llvm/test/Transforms/InstCombine/AMDGPU/cvt-scalef32-scale-demanded-bits.ll
+285-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+278-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx950.ll
+222-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx1250.ll
+2,189-86102 files not shown
+3,688-746108 files

LLVM/project a5ea1e8 — llvm/test/CodeGen/AArch64 win64_vararg_split.ll, llvm/test/CodeGen/AMDGPU cvt-scalef32-scale-demanded-bits-gfx1250.ll cvt-scalef32-scale-demanded-bits-gfx950.ll

Merge branch 'users/void/machinecse-inlineasm-br' into users/void/callbr-indirect-reg-output
DeltaFile
+663-0llvm/test/CodeGen/AArch64/win64_vararg_split.ll
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+376-0llvm/test/Transforms/InstCombine/AMDGPU/cvt-scalef32-scale-demanded-bits.ll
+285-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+278-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx950.ll
+222-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx1250.ll
+2,189-86102 files not shown
+3,688-746108 files

LLVM/project 7784cbd — llvm/test/CodeGen/AArch64 win64_vararg_split.ll, llvm/test/CodeGen/AMDGPU cvt-scalef32-scale-demanded-bits-gfx1250.ll cvt-scalef32-scale-demanded-bits-gfx950.ll

Merge branch 'users/void/callbr-asm-outputs' into users/void/callbr-asm-error
DeltaFile
+663-0llvm/test/CodeGen/AArch64/win64_vararg_split.ll
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+376-0llvm/test/Transforms/InstCombine/AMDGPU/cvt-scalef32-scale-demanded-bits.ll
+285-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+278-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx950.ll
+222-0llvm/test/CodeGen/AMDGPU/cvt-scalef32-scale-demanded-bits-gfx1250.ll
+2,189-86102 files not shown
+3,688-746108 files

LLVM/project bbb2405 — mlir/include/mlir/Dialect/Bufferization/Transforms Passes.td, mlir/lib/Dialect/Bufferization/Transforms StaticMemoryPlannerAnalysis.cpp

[mlir][bufferization] Preserve deallocs shared with skipped allocations
DeltaFile
+101-0mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-analysis.mlir
+54-10mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlannerAnalysis.cpp
+6-0mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
+161-103 files

LLVM/project c62494a — clang/lib/CodeGen CGStmt.cpp, clang/test/CodeGen/X86 inline-asm-mask-output.c

[Clang][CodeGen] Don't crash on a struct inline asm output in a mask register (#236728)

A struct register output with "=k" crashes when x86's
'adjustInlineAsmType' returned '<N x i1>' for "k". The conversion chain
then bitcast that vector to the struct type, which is invalid IR.

Fix this by casting the vector to an integer that's the same size as the
vector, then truncate it to the destination's size.

Fixes: 8d6e82d501cd ("[X86] Use vXi1 for `k` constraint in inline asm (#77733)")
Assisted-by: Claude Opus 5.5
DeltaFile
+63-0clang/test/CodeGen/X86/inline-asm-mask-output.c
+13-8clang/lib/CodeGen/CGStmt.cpp
+76-82 files

FreeBSD/ports d6e7033 — net/freerdp3 pkg-plist distinfo

net/freerdp3: Update 3.32.2 => 3.33.0

Changelog:
https://github.com/FreeRDP/FreeRDP/releases/tag/3.33.0

Security:       GHSA-hhfh-fvm7-7w65
Security:       GHSA-pq35-c472-69w2
Security:       GHSA-v7hr-xh82-79p7
Security:       GHSA-9r9q-9r7p-4mr6
Security:       GHSA-76c4-7552-ffhv
Security:       GHSA-j5pq-cm28-qm6v
Security:       GHSA-2hm9-2h5q-x525
Security:       GHSA-hj6g-r86h-wrcg
Security:       GHSA-fw6x-h8gw-778w
Security:       GHSA-q8p6-8mmj-j4ph
Security:       GHSA-r664-f94r-rgg6
Security:       GHSA-4g67-jhpc-q5xp
Security:       GHSA-8m87-jj8p-2fqc
Sponsored by:   UNIS Labs

    [3 lines not shown]
DeltaFile
+18-4net/freerdp3/Makefile
+3-3net/freerdp3/distinfo
+4-0net/freerdp3/pkg-plist
+25-73 files

FreeBSD/ports d4fc967 — net/freerdp3 pkg-plist distinfo

net/freerdp3: Update 3.32.2 => 3.33.0

Changelog:
https://github.com/FreeRDP/FreeRDP/releases/tag/3.33.0

Security:       GHSA-hhfh-fvm7-7w65
Security:       GHSA-pq35-c472-69w2
Security:       GHSA-v7hr-xh82-79p7
Security:       GHSA-9r9q-9r7p-4mr6
Security:       GHSA-76c4-7552-ffhv
Security:       GHSA-j5pq-cm28-qm6v
Security:       GHSA-2hm9-2h5q-x525
Security:       GHSA-hj6g-r86h-wrcg
Security:       GHSA-fw6x-h8gw-778w
Security:       GHSA-q8p6-8mmj-j4ph
Security:       GHSA-r664-f94r-rgg6
Security:       GHSA-4g67-jhpc-q5xp
Security:       GHSA-8m87-jj8p-2fqc
Sponsored by:   UNIS Labs
MFH:            2026Q4
DeltaFile
+18-4net/freerdp3/Makefile
+3-3net/freerdp3/distinfo
+4-0net/freerdp3/pkg-plist
+25-73 files

HardenedBSD/ports d4fc967 — net/freerdp3 pkg-plist distinfo

net/freerdp3: Update 3.32.2 => 3.33.0

Changelog:
https://github.com/FreeRDP/FreeRDP/releases/tag/3.33.0

Security:       GHSA-hhfh-fvm7-7w65
Security:       GHSA-pq35-c472-69w2
Security:       GHSA-v7hr-xh82-79p7
Security:       GHSA-9r9q-9r7p-4mr6
Security:       GHSA-76c4-7552-ffhv
Security:       GHSA-j5pq-cm28-qm6v
Security:       GHSA-2hm9-2h5q-x525
Security:       GHSA-hj6g-r86h-wrcg
Security:       GHSA-fw6x-h8gw-778w
Security:       GHSA-q8p6-8mmj-j4ph
Security:       GHSA-r664-f94r-rgg6
Security:       GHSA-4g67-jhpc-q5xp
Security:       GHSA-8m87-jj8p-2fqc
Sponsored by:   UNIS Labs
MFH:            2026Q4
DeltaFile
+18-4net/freerdp3/Makefile
+3-3net/freerdp3/distinfo
+4-0net/freerdp3/pkg-plist
+25-73 files

LLVM/project 0ea5fab —

Merge branch 'users/void/callbr-asm-error' into users/void/asm-goto-_Complext-types
DeltaFile
+0-00 files

LLVM/project 3baf1e3 — llvm/test/CodeGen/AMDGPU memory-legalizer-global-system.ll memory-legalizer-global-agent.ll

Merge branch 'users/void/callbr-asm-outputs' into users/void/callbr-asm-error
DeltaFile
+7,612-3,682llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+7,188-3,478llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+4,386-2,069llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+4,138-1,953llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+32,216-15,3762,062 files not shown
+83,624-29,7812,068 files

LLVM/project e4dff98 — llvm/test/CodeGen/AMDGPU memory-legalizer-global-system.ll memory-legalizer-global-agent.ll

Merge branch 'users/void/callbr-indirect-uses' into users/void/machinecse-inlineasm-br
DeltaFile
+7,612-3,682llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+7,188-3,478llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+4,386-2,069llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+4,138-1,953llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+32,216-15,3762,062 files not shown
+83,624-29,7812,068 files

LLVM/project 6b8b8fe — llvm/test/CodeGen/AMDGPU memory-legalizer-global-system.ll memory-legalizer-global-agent.ll

Merge branch 'main' into users/void/callbr-indirect-uses
DeltaFile
+7,612-3,682llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+7,188-3,478llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+4,386-2,069llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+4,138-1,953llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+32,216-15,3762,062 files not shown
+83,624-29,7812,068 files

LLVM/project 617005b — llvm/test/CodeGen/AMDGPU memory-legalizer-global-system.ll memory-legalizer-global-agent.ll

Merge branch 'users/void/callbr-indirect-reg-output' into users/void/callbr-asm-outputs
DeltaFile
+7,612-3,682llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+7,188-3,478llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+4,386-2,069llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+4,138-1,953llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+32,216-15,3762,062 files not shown
+83,624-29,7812,068 files

LLVM/project a75a203 — llvm/test/CodeGen/AMDGPU memory-legalizer-global-system.ll memory-legalizer-global-agent.ll

Merge branch 'users/void/machinecse-inlineasm-br' into users/void/callbr-indirect-reg-output
DeltaFile
+7,612-3,682llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+7,188-3,478llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
+4,446-2,097llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
+4,386-2,069llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
+4,138-1,953llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
+32,216-15,3762,062 files not shown
+83,624-29,7812,068 files

LLVM/project 142de6e — clang/lib/CodeGen CGStmt.cpp, clang/test/CodeGen/X86 inline-asm-complex-output.c

[Clang][CodeGen] Pass 128-bit aggregate inline asm register inputs by value

Clang returns a register output of aggregate type, such as '_Complex
double' or a 16-byte struct, by value as an integer of the same size
(i128 for both). EmitAsmInputLValue, however, loaded aggregate register
inputs by value only up to 64 bits and passed larger ones by pointer.
So '"+r"' on a '_Complex double' emitted '"=r,*0"', which SelectionDAG
rejects as an unsupported tied indirect register input, and '"r"' on a
16-byte struct emitted '"*r"', which it rejects as an indirect register
input. Read-write '"rm"' and '"g"' operands hit the same error.

Load power-of-2 aggregate register inputs of up to 128 bits by value,
as with '__int128'. Tied aggregate operands of other sizes are still
passed by pointer and rejected.

Assisted-by: Claude Opus 5.5
DeltaFile
+75-8clang/test/CodeGen/X86/inline-asm-complex-output.c
+1-1clang/lib/CodeGen/CGStmt.cpp
+76-92 files

NetBSD/src E6IGN7y — external/gpl3/gcc/dist/gcc/config/m68k netbsd-elf.h

   FUNCTION_PROFILER(): On 68010, use the same two step profile counter
   reference strategy as ColdFire does.  This avoids overflowing R_68K_PC16
   relocations for pretty much every reasonably sized program build for
   profiling.
VersionDeltaFile
1.23+1-1external/gpl3/gcc/dist/gcc/config/m68k/netbsd-elf.h
+1-11 files

LLVM/project 14a3c75 — llvm/lib/CodeGen/GlobalISel InlineAsmLowering.cpp, llvm/test/CodeGen/AArch64/GlobalISel arm64-fallback.ll

[GlobalISel] Fall back on tied inline asm inputs needing several registers

InlineAsmLowering ties a matching input to a single register, and
asserted that the output it matches uses only one. But an i128 output
with an "r" constraint on AArch64 uses two 64-bit registers, so '"+r"'
on an '__int128' crashed at -O0, where GlobalISel is the default. Fall
back to SelectionDAG, which ties each register, instead.

Assisted-by: Claude Opus 5.5
DeltaFile
+9-1llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
+10-0llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
+19-12 files