LLVM/project 027da63 — compiler-rt/lib/tsan/rtl tsan_platform_linux.cpp

[tsan] Calibrate jmp_buf pointer mangling (#216558)

glibc 2.44 moved the pointer guard out of the TCB and added the
x86-style rotation on other mangling targets. TSan hardcodes the old
guard locations and transformations, so longjmp interception can no
longer recover the saved stack pointer.

Derive the identity, XOR, or XOR-and-rotate scheme from two _setjmp
probes at different stack depths. This supports old and new glibc and
preserves bionic lazy initialization without depending on private guard
storage.

Developed with Fable/Sol. Tested locally on 64-bit Arch Linux, which
already ships glibc 2.44. Without this change, eight existing TSan tests
fail with `ThreadSanitizer: can't find longjmp buf`; with it, the full
`check-tsan` suite passes.

Fixes #216004.
DeltaFile
+92-79compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp
+92-791 files

LLVM/project f1907c9 — llvm/lib/Transforms/Scalar LowerMatrixIntrinsics.cpp

[Matrix] Create the copy alloca once in getNonAliasingPointer (NFC). (#237455)

Both the different address space path and the runtime alias check path
create the same alloca in the entry block. Create it once up front.
DeltaFile
+8-13llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
+8-131 files

NetBSD/pkgsrc-wip 3917f42 — srt Makefile distinfo

srt: update 1.5.7
DeltaFile
+3-3srt/distinfo
+1-1srt/Makefile
+4-42 files

LLVM/project eb690b9 — llvm/lib/Support KnownFPClass.cpp

[KnownFPClass][NFC] Apply denormal modes inside KnownFPClass functions (#237084)

Converts remaining `KnownFPClass` functions over to the
`applyInputDenormalMode` and `applyOutputDenormalMode` helpers. This
also switches `isKnownNeverLogicalZero(Mode)` to `isKnownNever(fcZero)`.

`KnownFPClass::canonicalize` will be handled in a separate PR.
DeltaFile
+27-27llvm/lib/Support/KnownFPClass.cpp
+27-271 files

LLVM/project eae0634 — llvm/lib/Analysis ValueTracking.cpp, llvm/lib/CodeGen/GlobalISel GISelValueTracking.cpp

[KnownFPClass] Rule out non-zero finite results for fmul and fdiv (#231052)

Follow up to https://github.com/llvm/llvm-project/pull/229638

A normal or subnormal result of `fmul`/`fdiv` requires both operands to
be non-zero finite values. In other words, we don't care if either side
could be zero, inf, or NaN when ruling out normal/subnormal values.
DeltaFile
+145-9llvm/test/Transforms/Attributor/nofpclass-fdiv.ll
+139-5llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+30-19llvm/lib/Support/KnownFPClass.cpp
+44-0llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
+1-1llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+1-1llvm/lib/Analysis/ValueTracking.cpp
+360-356 files

FreeBSD/ports f5a80e9 — dns/hesiod Makefile

dns/hesiod: Mark DEPRECATED

This version has multiple vulnerabilities (CVE-2016-10151, CVE-2016-10152)

PR:             300135
Approved by:    Chris Hutchinson <portmaster at BSDforge.com> (former maintainer)
Approved by:    osa, fluffy (mentors, implicit)
MFH:            2026Q4

(cherry picked from commit 9367f6ba7be9aa5f85602512b47ada8277802ae7)
DeltaFile
+5-3dns/hesiod/Makefile
+5-31 files

FreeBSD/ports 9367f6b — dns/hesiod Makefile

dns/hesiod: Mark DEPRECATED

This version has multiple vulnerabilities (CVE-2016-10151, CVE-2016-10152)

PR:             300135
Approved by:    Chris Hutchinson <portmaster at BSDforge.com> (former maintainer)
Approved by:    osa, fluffy (mentors, implicit)
MFH:            2026Q4
DeltaFile
+5-3dns/hesiod/Makefile
+5-31 files

FreeBSD/ports 3afc371 — databases/heidisql Makefile distinfo

databases/heidisql: Update to 12.22

ChangeLog at:   https://github.com/HeidiSQL/HeidiSQL/releases/tag/v12.22
DeltaFile
+3-3databases/heidisql/distinfo
+1-1databases/heidisql/Makefile
+4-42 files

LLVM/project 7a0edec — llvm/lib/Transforms/Utils LoopUtils.cpp, llvm/lib/Transforms/Vectorize VPlanConstruction.cpp

Revert "[LV] Model memory runtime checks for inner loops of loop nests in VPlan." (#237453)

Reverts llvm/llvm-project#232794

Breaks bots, see llvm/llvm-project#232794.
DeltaFile
+60-310llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
+31-31llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+28-28llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
+17-33llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+11-19llvm/lib/Transforms/Utils/LoopUtils.cpp
+15-13llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
+162-43415 files not shown
+211-53021 files

LLVM/project 9f8c35a — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-4-regallocfast-fold' into users/void/asm-rm-5-prefer-reg
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project 6c028de — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-3-direct-mem-output-error' into users/void/asm-rm-4-regallocfast-fold
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project 375551a — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-2f-peephole-asm-load-fold' into users/void/asm-rm-3-direct-mem-output-error
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project 1371ec8 — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-2e-fold-asm-memoperands' into users/void/asm-rm-2f-peephole-asm-load-fold
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project 52a3f42 — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-2d-prefer-spilling-foldable' into users/void/asm-rm-2e-fold-asm-memoperands
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project b7e40cb — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-2c-fold-subreg-offset' into users/void/asm-rm-2d-prefer-spilling-foldable
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project 7a2ea29 — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-2b-fold-all-reg-operands' into users/void/asm-rm-2c-fold-subreg-offset
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project cbe5848 — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/asm-rm-2-fold-tied-operands' into users/void/asm-rm-2b-fold-all-reg-operands
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project a4d75d4 — llvm/test/CodeGen/MIR/X86 inline-asm-operand-count.mir inline-asm-func-kind.ll

Merge branch 'users/void/mir-inline-asm-func-kind' into users/void/asm-rm-2-fold-tied-operands
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+39-162 files

LLVM/project 9e830e1 — llvm/include/llvm/IR InlineAsm.h, llvm/lib/CodeGen MIRPrinter.cpp MachineInstr.cpp

[MIR] Round-trip the "func" kind of inline asm operand flags

An x86 inline asm call or jmp whose target is a function, given as a "p"
operand or as a "*m" operand that ISel turns into an address, gets a flag
of kind Func. Like a Mem flag, it carries a memory constraint. But
getKindName() returned "mem" for it, and the MIR printer printed the
constraint only for a Mem flag. So this:

    call void asm sideeffect "call ${0:P}", "p,~{dirflag},~{fpsr},~{flags}"(ptr @g)

was printed as:

    INLINEASM &"call ${0:P}", sideeffect attdialect, mem ops:5, target-flags(x86-plt) @g, 1, $noreg, 0, $noreg, ...

which parses back as a Mem flag with no constraint. Printing that again
hits llvm_unreachable, and the asm printer asserts in PrintMemReference()
instead of emitting "callq g at PLT". MachineInstr::print() also printed the
constraint as a register class (e.g. "mem:GR8_NOREX").


    [4 lines not shown]
DeltaFile
+38-0llvm/test/CodeGen/MIR/X86/inline-asm-func-kind.ll
+3-2llvm/lib/CodeGen/MachineInstr.cpp
+2-1llvm/lib/CodeGen/MIRParser/MIParser.cpp
+2-1llvm/include/llvm/IR/InlineAsm.h
+1-1llvm/lib/CodeGen/MIRPrinter.cpp
+46-55 files

NetBSD/pkgsrc-wip fb6e9a7 — librist Makefile

librist: fix HOMEPAGE
DeltaFile
+1-1librist/Makefile
+1-11 files

FreeBSD/ports 010cde8 — misc/claude-code Makefile distinfo

misc/claude-code: update 2.1.312 → 2.1.314
DeltaFile
+5-5misc/claude-code/distinfo
+1-1misc/claude-code/Makefile
+6-62 files

FreeBSD/ports e1fbeb9 — misc/antigravity-cli Makefile distinfo

misc/antigravity-cli: update 1.4.8 → 1.4.12
DeltaFile
+5-5misc/antigravity-cli/distinfo
+2-2misc/antigravity-cli/Makefile
+7-72 files

LLVM/project 3938e84 — llvm/include/llvm/IR InlineAsm.h, llvm/lib/CodeGen MIRPrinter.cpp MachineInstr.cpp

[MIR] Move the "func" kind round trip to its own PR

Round-tripping the "func" kind of inline asm operand flags is separate
from serializing the operand count, so it moves to its own PR, stacked
on this one, with more tests.

Assisted-by: Claude Opus 5.5
DeltaFile
+1-16llvm/test/CodeGen/MIR/X86/inline-asm-operand-count.mir
+2-3llvm/lib/CodeGen/MachineInstr.cpp
+1-2llvm/lib/CodeGen/MIRParser/MIParser.cpp
+1-2llvm/include/llvm/IR/InlineAsm.h
+1-1llvm/lib/CodeGen/MIRPrinter.cpp
+6-245 files

FreeBSD/ports cb9cc3d — databases/py-pylance Makefile distinfo, databases/py-pylance/files patch-rust_lance-linalg_build.rs patch-rust_lance-linalg_src_simd_i32.rs

databases/py-pylance: update 12.0.0 → 14.0.2
DeltaFile
+0-406databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f32.rs
+0-371databases/py-pylance/files/patch-rust_lance-linalg_src_simd_f64.rs
+113-81databases/py-pylance/distinfo
+0-192databases/py-pylance/files/patch-rust_lance-linalg_src_simd_i32.rs
+59-43databases/py-pylance/Makefile
+0-25databases/py-pylance/files/patch-rust_lance-linalg_build.rs
+172-1,1181 files not shown
+176-1,1227 files

LLVM/project ccce555 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize interleaved-accesses.ll

[LV] Invalidate interleave-groups with gaps if for early-exit loops. (#237409)

If the loop exits from a block other than the latch, the scalar
iteration reserved for the exit may leave the loop before reaching the
grouped accesses.

Invalidate interleave groups in the case, to avoid mis-compile.

Fixes https://github.com/llvm/llvm-project/issues/237192.
DeltaFile
+170-0llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
+8-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+178-12 files

FreeBSD/src 9b8bc7b — sys/dev/qlnx/qlnxe qlnx_def.h qlnx_os.c

qlnx: Report SR-IOV VF status

Retain the PF-known MAC and allocated transmit and receive queue counts
for each VF and expose them through the PF ifnet.  Sum queues across all
hardware functions rather than reporting only the first one.

Publish and snapshot the VF cache under the existing hardware lock.
Unpublish it before hardware teardown, and invalidate queue-allocation
knowledge when error recovery releases the underlying VF resources.

Initialize the cache, release it on failed initialization, and reject an
out-of-range VF index instead of continuing into the array.

Tested by:      zlei
Sponsored by:   BBOX.io
Differential Revision:  https://reviews.freebsd.org/D58742
DeltaFile
+143-23sys/dev/qlnx/qlnxe/qlnx_os.c
+2-0sys/dev/qlnx/qlnxe/qlnx_def.h
+145-232 files

LLVM/project 8e0455d — clang/include/clang/Basic TargetID.h, clang/lib/Basic TargetID.cpp

[Clang][Offload] Request canonical target IDs in --should-extract (#232148)

The linker wrapper extracts device code from a static library only when
a `--should-extract` value matches the device image's arch label
exactly. The label is the canonical target ID, with features sorted, but
`--should-extract` used the raw `--offload-arch` value. So
`--offload-arch=gfx908:xnack+:sramecc-` labeled the device image
`gfx908:sramecc-:xnack+` but requested `gfx908:xnack+:sramecc-`. Add a
`getCanonicalTargetID` helper that takes a raw target ID, and use it for
both the label and `--should-extract`.
DeltaFile
+9-3clang/lib/Driver/ToolChains/Clang.cpp
+10-0clang/lib/Basic/TargetID.cpp
+9-0clang/test/Driver/hip-link-offload-binary.c
+3-4clang/lib/Driver/Driver.cpp
+6-0clang/include/clang/Basic/TargetID.h
+37-75 files

NetBSD/pkgsrc 1M3tBkv — devel/py-pluggy Makefile

   devel/py-pluggy: needs recent py-setuptools_scm to build successfully
VersionDeltaFile
1.33+2-2devel/py-pluggy/Makefile
+2-21 files

LLVM/project c24601a — llvm/lib/Transforms/Utils LoopUtils.cpp, llvm/lib/Transforms/Vectorize VPlanConstruction.cpp

Revert "[LV] Model memory runtime checks for inner loops of loop nests in VPl…"

This reverts commit 0d387de3856273874ef65aa2e90cd07a7a9a2fd0.
DeltaFile
+60-310llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
+31-31llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+28-28llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
+17-33llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+11-19llvm/lib/Transforms/Utils/LoopUtils.cpp
+15-13llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
+162-43415 files not shown
+211-53021 files

FreeBSD/ports 5e6f69a — print/lout Makefile distinfo

print/lout: Update to 3.43.5

Changelog: https://github.com/william8000/lout/blob/3.43.5/whatsnew
DeltaFile
+3-3print/lout/distinfo
+1-1print/lout/Makefile
+4-42 files