LLVM/project 416f328 — llvm/lib/CodeGen XRayInstrumentation.cpp, llvm/test/CodeGen/X86 xray-debug-instruction-threshold.mir

[XRay] Ignore debug instructions in instruction threshold (#219400)

Debug instructions currently contribute to `xray-instruction-threshold`,
so
enabling debug information can change whether a function is
instrumented.

Count raw machine instructions while excluding only debug instructions.
Using
the raw instruction range preserves the existing treatment of bundled
instructions and non-debug meta instructions.

The first commit records the existing behavior. The second applies the
fix and
updates the test expectations.

Fixes #219376

Assisted-by: OpenAI Codex 5.6 Sol, co-reviewed by Claude and Yongqiang
Tian.
DeltaFile
+86-0llvm/test/CodeGen/X86/xray-debug-instruction-threshold.mir
+4-2llvm/lib/CodeGen/XRayInstrumentation.cpp
+90-22 files

FreeBSD/src 0a9e5c6 — sbin/ping/tests ping_test.sh

tests/ping: Fix date(1) invocations

Fixes:  069681afd58a ("ping: use CLOCK_REALTIME for ICMP Originate Timestamp")
(cherry picked from commit 667dd9eafa4d5352efdfcdc1a9e228c23fbc60f5)
DeltaFile
+2-2sbin/ping/tests/ping_test.sh
+2-21 files

FreeBSD/src 6c604ba — sbin/ping ping.c, sbin/ping/tests ping_test.sh

ping: use CLOCK_REALTIME for ICMP Originate Timestamp

RFC 792 defines the ICMP Originate Timestamp field as milliseconds
since midnight UTC.  However, ping(8) currently derives this value
from CLOCK_MONOTONIC, which represents time since an unspecified
starting point and is not related to UTC.

The issue was introduced by commit 1ad76f1b6047, which replaced
gettimeofday(2) with clock_gettime(CLOCK_MONOTONIC) for timekeeping
in ping(8).

Fix this by using CLOCK_REALTIME when generating the ICMP originate
timestamp.

Before:

$ ping -Mt -c1 127.0.0.1
ICMP_TSTAMP
PING 127.0.0.1 (127.0.0.1): 56 data bytes

    [17 lines not shown]
DeltaFile
+35-0sbin/ping/tests/ping_test.sh
+8-1sbin/ping/ping.c
+43-12 files

FreeBSD/src 49f56f3 — sbin/ping/tests ping_test.sh

ping: fix test timestamp_origin when tstamprepl is disabled

The timestamp_origin test sends an ICMP Timestamp Request (ping -Mt) and parses
the tso/tsr fields out of the reply.
When the sysctl net.inet.icmp.tstamprepl is 0, the kernel silently drops the
request, ping receives no reply, and the sed extraction yields an empty $tso.
The test then fails inside atf_check test -n "$tso" with the unhelpful message

Approved by:    maxim
Sponsored by:   Netflix
Differential Revision:  https://reviews.freebsd.org/D57287

(cherry picked from commit ff873565bc2c3e47fe1d070305aa851189ee8bcf)
DeltaFile
+15-1sbin/ping/tests/ping_test.sh
+15-11 files

LLVM/project 67841e3 — lldb/unittests/SymbolFile/DWARF DWARFASTParserClangTests.cpp

[lldb] Fix SymbolFileDWARFTests link failure on Windows (#234441)

LLDB unit tests don't link clang libraries themselves, use
ObjCInterfaceDecl::getObjCRuntimeNameAsString() instead.

Assisted-by: Claude
DeltaFile
+2-4lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
+2-41 files

Linux/linux 4403278 — Documentation/devicetree/bindings/thermal google,gs101-tmu-top.yaml ti_soc_thermal.txt, drivers/thermal airoha_thermal.c

Merge tag 'thermal-7.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull thermal control updates from Rafael Wysocki:
 "These are mostly updates of thermal drivers including a new Exynos
  ACPM thermal driver for Google GS101, new Renesas RZ/G3L thermal
  sensor support, new Qualcomm MSM8952 TSENS support, new Qualcomm
  PMAU0102 Master BandGap temperature monitor support in DT bindings,
  and new rugged Panther Lake support in intel_tcc_cooling. Moreover,
  the AN7583 driver is extended to register separate thermal zones for
  bandgap, GbE and CPU (its DT bindings are updated accordingly).

  There are also multiple fixes and assorted cleanups, as usual.

  Specifics:

   - Make the Intel powerclamp thermal driver reject invalid window_size
     values, drop redundant clamp() from duration_set() in it, and
     simplify 4 functions in it (Thorsten Blum)


    [122 lines not shown]
DeltaFile
+651-0drivers/thermal/samsung/acpm-tmu.c
+137-46drivers/thermal/airoha_thermal.c
+177-0Documentation/devicetree/bindings/thermal/ti,omap-bandgap.yaml
+0-88Documentation/devicetree/bindings/thermal/ti_soc_thermal.txt
+69-0Documentation/devicetree/bindings/thermal/google,gs101-tmu-top.yaml
+20-44drivers/thermal/intel/intel_powerclamp.c
+1,054-17836 files not shown
+1,333-28942 files

Linux/linux df37e39 — Documentation/power runtime_pm.rst, arch/x86/kernel/acpi cppc.c

Merge tag 'pm-7.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

Pull power management updates from Rafael Wysocki:
 "This time, the most visible part are the ACPI CPPC updates from
  Christian Loehle, including CPPC cpufreq driver changes, even though
  updates of cpufreq drivers proper are still the largest topic group.
  However, the updates of cpufreq drivers depend on the ACPI CPPC
  updates, so they should really be counted together and that is well
  over 1/2 of the total commit count.

  Interestingly enough, almost all of the updates included here are
  fixes or cleanups, with some new feature support in the amd-pstate
  cpufreq driver and IPQ9650 support in the qcom-nvmem cpufreq driver.
  The runtime PM documentation improvements from Brian Norris can also
  be mostly regarded as fixes, but a new kunit test goes along with
  them.

  Specifics:


    [116 lines not shown]
DeltaFile
+1,884-339drivers/acpi/cppc_acpi.c
+175-412Documentation/power/runtime_pm.rst
+233-176include/linux/pm_runtime.h
+234-111drivers/cpufreq/amd-pstate.c
+124-56arch/x86/kernel/acpi/cppc.c
+79-47kernel/power/em_netlink.c
+2,729-1,14151 files not shown
+3,474-1,37657 files

FreeBSD/ports ccd47a9 — www/R-cran-selectr Makefile distinfo

www/R-cran-selectr: Update to 0.8-0

Reported by:    portscout
DeltaFile
+3-3www/R-cran-selectr/distinfo
+1-3www/R-cran-selectr/Makefile
+4-62 files

OpenBSD/ports FETNQWY — math/z3 distinfo Makefile

   math/z3: update to 5.3.1
VersionDeltaFile
1.52+6-2math/z3/Makefile
1.29+2-2math/z3/distinfo
+8-42 files

LLVM/project e01f8e1 — llvm/lib/CodeGen MachineScheduler.cpp, llvm/test/CodeGen/AMDGPU shufflevector-physreg-copy.ll reschedule-physreg-copy-stale-undef.ll

[MachineScheduler] Fix stale read-undef flags when rescheduling physreg copies (#227897)

`GenericScheduler::reschedulePhysReg` can leave stale `read-undef` flags
when moving an already-scheduled COPY. This can be exposed most commonly
if a user introduces a large inline assembly section that can otherwise
limit the registers that are available to the compiler.

This addresses this bug in 2 steps:

1) Check for backends that can produce `read-undef` on subregisters in a
way that can meaningful move (e.g. has lane mask).
2) After a move regenerate the `read-undef` flags for just the region of
"movement" between the old/new location in the code.

You can find the motivating example here:
https://gist.github.com/njriasan/73a4b080e98cdb54bd0b59138bc5ad9c
DeltaFile
+41-0llvm/lib/CodeGen/MachineScheduler.cpp
+22-0llvm/test/CodeGen/AMDGPU/reschedule-physreg-copy-stale-undef.ll
+4-4llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
+67-43 files

FreeBSD/src 4292233 — sbin/ping ping.c, sbin/ping/tests test_ping.py

ping: do a better job with what we received from the net, part 2

When we see a difference between the payload we sent and what we
received, we dump both but we were not prepared for the case when
the received payload is less than we sent.  In this case we were trying
to dump more than needed.

Funny enough, 23 years ago I already fixed a similar issue here but
didn't pay attention to this small dumping loop.

Test written by jlduran.

Reviewed by:    jlduran
MFC after:      1 month
Found with:     Claude Code Sonnet 5

Differential Revision: https://reviews.freebsd.org/D59556
Differential Revision: https://reviews.freebsd.org/D59582

(cherry picked from commit 0b9434d707c71de7b1b62e400e6e780224f0384d)
DeltaFile
+39-1sbin/ping/tests/test_ping.py
+4-2sbin/ping/ping.c
+43-32 files

FreeBSD/src 43e0c9c — sbin/ping ping.c

ping: do a better job checking what we receive from the net

- zero out a buffer for the incoming icmp message that
  we are about to parse
- for ICMP_MASKREPLY and ICMP_TSTAMPREPLY responses check their length
  and warn and reject them if they are truncated

Without these checks a part of stack allocated struct icmp icp could
be printed out which seems low severity since we already dropped root
privileges by the time icp is allocated.

Reviewed by:    glebius
MFC after:      1 month
Found with:     Claude Code Sonnet 5

Differential Revision: https://reviews.freebsd.org/D59555

(cherry picked from commit aa6683207d189a0b58ccf8806bd9f8793914bc45)
DeltaFile
+15-0sbin/ping/ping.c
+15-01 files

LLVM/project 784eb2c — llvm/lib/Target/PowerPC PPCMIPeephole.cpp, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

PPC: Fold 64-bit zero-extending word load feeding extsw subregister (#211107)

A gprc LWZ/LWZX feeding EXTSW_32_64 is rewritten into a sign-extending
LWA/LWAX load. Extend the same fold to the 64-bit zero-extending word
loads LWZ8/LWZX8 when the EXTSW_32_64 reads their sub_32 subregister,
producing a single LWA/LWAX instead of a redundant lwz+extsw pair.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+12-12llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+13-3llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+25-152 files

LLVM/project c8d2ad5 — llvm/lib/Transforms/IPO FunctionImport.cpp, llvm/test/ThinLTO/X86 local_name_conflict_var.ll

[ThinLTO] Import locals with colliding GUIDs (#234247)

The ThinLTO importer treated a local already defined in the destination
as satisfying any reference with the same GUID. Distinct locals in
different modules can share a GUID when their source filenames and names
match. A needed definition was then skipped, tripping the export/import
consistency assertion for read-only variables.

Check the referencing module before skipping the import.

Assisted-by: OpenAI Codex
DeltaFile
+8-4llvm/test/ThinLTO/X86/local_name_conflict_var.ll
+7-2llvm/lib/Transforms/IPO/FunctionImport.cpp
+15-62 files

HardenedBSD/ports 720940b — devel/cargo-readme Makefile.crates distinfo, security/pass-cli Makefile.crates distinfo

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+245-243www/xh/distinfo
+185-187security/pass-cli/distinfo
+121-120www/xh/Makefile.crates
+83-84security/pass-cli/Makefile.crates
+43-41devel/cargo-readme/distinfo
+20-19devel/cargo-readme/Makefile.crates
+697-69492 files not shown
+1,376-91998 files

LLVM/project 06fb4eb — libcxx/docs/ReleaseNotes 22.rst 21.rst, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

rebase

Created using spr 2.0.0-beta.1
DeltaFile
+0-217libcxx/docs/ReleaseNotes/20.rst
+0-169libcxx/docs/ReleaseNotes/21.rst
+0-158libcxx/docs/ReleaseNotes/22.rst
+152-6llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+122-0mlir/test/Dialect/ControlFlow/canonicalize.mlir
+81-14llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+355-56457 files not shown
+820-80263 files

LLVM/project 8bb5d37 — libcxx/docs/ReleaseNotes 22.rst 21.rst, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

rebase

Created using spr 2.0.0-beta.1
DeltaFile
+0-217libcxx/docs/ReleaseNotes/20.rst
+0-169libcxx/docs/ReleaseNotes/21.rst
+0-158libcxx/docs/ReleaseNotes/22.rst
+152-6llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+122-0mlir/test/Dialect/ControlFlow/canonicalize.mlir
+81-14llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+355-56457 files not shown
+820-80263 files

LLVM/project 4bab159 — libcxx/docs/ReleaseNotes 22.rst 21.rst, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

rebase

Created using spr 2.0.0-beta.1
DeltaFile
+0-217libcxx/docs/ReleaseNotes/20.rst
+0-169libcxx/docs/ReleaseNotes/21.rst
+0-158libcxx/docs/ReleaseNotes/22.rst
+152-6llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+122-0mlir/test/Dialect/ControlFlow/canonicalize.mlir
+81-14llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+355-56458 files not shown
+820-82764 files

LLVM/project 0c2084d — libcxx/docs/ReleaseNotes 22.rst 21.rst, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

rebase

Created using spr 2.0.0-beta.1
DeltaFile
+0-217libcxx/docs/ReleaseNotes/20.rst
+0-169libcxx/docs/ReleaseNotes/21.rst
+0-158libcxx/docs/ReleaseNotes/22.rst
+152-6llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+122-0mlir/test/Dialect/ControlFlow/canonicalize.mlir
+81-14llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+355-56458 files not shown
+820-82764 files

LLVM/project 5e6300b — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[RISCV][P-ext] Fold (sext_inreg (bitcast (ppaire X, Y)), SrcVT) -> (sext_inreg (bitcast (freeze X)), SrcVT). (#233951)

If SrcVT is extending from only the even elements for the ppaire. In the
changed tests, the ppaire is a zext_inreg due to the second operand
being a zero vector. This transform doesn't care what the second operand
of the ppaire is since it is a discarded.
DeltaFile
+16-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+0-2llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+16-22 files

LLVM/project 5356b20 — libcxx/docs/ReleaseNotes 22.rst 21.rst, llvm/test/CodeGen/PowerPC peephole-elim-extsw-subreg-input.mir

move dllexport test to 234415

Created using spr 2.0.0-beta.1
DeltaFile
+0-217libcxx/docs/ReleaseNotes/20.rst
+0-169libcxx/docs/ReleaseNotes/21.rst
+0-158libcxx/docs/ReleaseNotes/22.rst
+152-6llvm/test/CodeGen/PowerPC/peephole-elim-extsw-subreg-input.mir
+122-0mlir/test/Dialect/ControlFlow/canonicalize.mlir
+81-14llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+355-56458 files not shown
+820-82764 files

LLVM/project 55c925e — libc/test/src/math/exhaustive cos.wc sin.wc, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll

Merge branch 'main' into users/atrosinenko/libunwind-sign-dso-base-argument
DeltaFile
+1,091,085-0libc/test/src/math/exhaustive/sin.wc
+1,090,178-0libc/test/src/math/exhaustive/cos.wc
+275,100-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+107,855-124,603llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+30,873-87,365llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+2,739,770-211,96870,415 files not shown
+9,896,840-3,274,42970,421 files

LLVM/project aab17ee — llvm/include/llvm/TargetParser CMakeLists.txt, llvm/lib/Target/PowerPC PPCTargetParserDef.td

PowerPC: Use minimal tablegen inputs for TargetParser

Generate PPCGenTargetFeatures.inc from a file that only includes the
feature and processor definitions, instead of the full PPC.td. Add
stub SchedMachineModel, as was recently done for AArch64 in #231954,
since the TargetParser usage does not need them.

llvm-min-tblgen -gen-target-features

                         Gigainstructions  Peak RSS  .td deps
  PPC.td                 1.72              85 MB     81
  PPCTargetParserDef.td  0.01               6 MB      7

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+33-0llvm/lib/Target/PowerPC/PPCTargetParserDef.td
+1-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+1-1llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
+1-1llvm/include/llvm/TargetParser/CMakeLists.txt
+36-34 files

LLVM/project 74aabde — llvm/lib/Target/PowerPC PPC.td PPCProcessors.td

PowerPC: Move processor definitions to PPCProcessors.td

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+148-0llvm/lib/Target/PowerPC/PPCProcessors.td
+1-140llvm/lib/Target/PowerPC/PPC.td
+149-1402 files

LLVM/project d75b239 — llvm/lib/Target/PowerPC PPC.td PPCFeatures.td

PowerPC: Move subtarget features to PPCFeatures.td

Move the subtarget features, predicates and processor feature lists out
of PPC.td, so they can be used without parsing the instruction and
register definitions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+574-0llvm/lib/Target/PowerPC/PPCFeatures.td
+1-566llvm/lib/Target/PowerPC/PPC.td
+575-5662 files

LLVM/project 8ba9fb9 — llvm/lib/Target/PowerPC PPC.td PPCRegisterInfo.td

PowerPC: Move the PPC32 and PPC64 hardware modes to PPCRegisterInfo.td

They are only used by the register, instruction and calling convention
definitions. This allows the feature definitions to be used without
HwMode.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+0-7llvm/lib/Target/PowerPC/PPC.td
+7-0llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+7-72 files

LLVM/project ee73fb8 — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/SystemZ atomic-store-08.ll atomic-store-09.ll

[AtomicExpandPass] Add missing arg extensions. (#234332)

This involves the ordering argument(s) to atomic libcalls.
DeltaFile
+40-0llvm/test/Transforms/AtomicExpand/SystemZ/libcall-argext.ll
+12-2llvm/lib/CodeGen/AtomicExpandPass.cpp
+2-2llvm/test/Transforms/AtomicExpand/LoongArch/load-store-atomic.ll
+2-2llvm/test/CodeGen/SystemZ/atomic-store-09.ll
+2-2llvm/test/CodeGen/SystemZ/atomic-load-09.ll
+1-1llvm/test/CodeGen/SystemZ/atomic-store-08.ll
+59-93 files not shown
+63-119 files

LLVM/project 56fb625 — libcxx/test/std/utilities/charconv/charconv.from.chars integral.roundtrip.pass.cpp integral.pass.cpp, libcxx/test/std/utilities/charconv/charconv.to.chars integral.pass.cpp

[libc++] Replace integrals helper by types::integer_types (#233923)

integrals imprecisely describes the list of all integer
types, only 'char' is included from character types
DeltaFile
+0-3libcxx/test/support/charconv_test_helpers.h
+1-1libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp
+1-1libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp
+1-1libcxx/test/std/utilities/charconv/charconv.from.chars/integral.pass.cpp
+3-64 files

LLVM/project 9adf952 — llvm/lib/Target/RISCV RISCVSubtarget.h RISCVInstrInfoY.td, llvm/lib/Target/RISCV/AsmParser RISCVAsmParser.cpp

rename predicate to be similar to HasVInstructions
DeltaFile
+3-3llvm/lib/Target/RISCV/RISCVFeatures.td
+2-2llvm/lib/Target/RISCV/RISCVSubtarget.h
+2-2llvm/lib/Target/RISCV/RISCVInstrInfoY.td
+1-1llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+8-84 files

LLVM/project f56fbea — llvm/include/llvm/MC MCContext.h MCSubtargetInfo.h, llvm/test/TableGen HwModeBitSet.td

[nspr] initial commit
DeltaFile
+24-1llvm/utils/TableGen/SubtargetEmitter.cpp
+15-0llvm/test/TableGen/HwModeBitSet.td
+2-5llvm/unittests/MC/TargetRegistry.cpp
+2-5llvm/unittests/CodeGen/TargetOptionsTest.cpp
+5-0llvm/include/llvm/MC/MCSubtargetInfo.h
+3-1llvm/include/llvm/MC/MCContext.h
+51-121 files not shown
+53-147 files