LLVM/project d4d37b8 — llvm/lib/Target/RISCV/GISel RISCVLegalizerInfo.cpp, llvm/test/CodeGen/RISCV/GlobalISel rv32xtheadbb.ll rv64xtheadbb.ll

[RISCV][GlobalISel] Widen narrow G_CTTZ before lowering for XTHeadBb (#238214)

With XTHeadBb, `G_CTLZ` is legal only at XLEN. Narrow `G_CTTZ` and
`G_CTTZ_ZERO_POISON` were lowered at their original width, so
`LegalizerHelper` could not use `G_CTLZ` and fell back to the
popcount-based expansion.

This patch widens them to XLEN before lowering. The generic lowering
then emits `XLEN - ctlz(~x & (x - 1))`, which selects to `th.ff1`.

Closes https://github.com/llvm/llvm-project/issues/237492
DeltaFile
+47-165llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv64.mir
+30-102llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-cttz-rv32.mir
+103-0llvm/test/CodeGen/RISCV/GlobalISel/rv64xtheadbb.ll
+69-0llvm/test/CodeGen/RISCV/GlobalISel/rv32xtheadbb.ll
+8-7llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+257-2745 files

LLVM/project 81156c9 — llvm/test/CodeGen/AArch64 kcfi.ll, llvm/test/CodeGen/ARM machine-outliner-thunk.ll machine-outliner-tail.ll

CodeGen: Remove -verify-machineinstrs from llc -stop-after IR tests

llc verifies MIR outputs by default, so all -stop-after will perform a
final verifier run. They no longer run the verifier after every pass
in the pipeline, which is much more expensive and has low chance of
catching a transient verifier error. The full pipeline verification is
still covered in EXPENSIVE_CHECKS builds.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+7-7llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
+5-8llvm/test/CodeGen/PowerPC/jump-table.ll
+6-6llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
+6-6llvm/test/CodeGen/AArch64/kcfi.ll
+5-5llvm/test/CodeGen/ARM/machine-outliner-thunk.ll
+5-5llvm/test/CodeGen/ARM/machine-outliner-tail.ll
+34-37218 files not shown
+363-372224 files

LLVM/project 1da66b3 — llvm/test/CodeGen/AMDGPU lower-i1-copies-clear-kills.mir coalescer-subranges-another-prune-error.mir, llvm/test/CodeGen/AMDGPU/NextUseAnalysis acyclic-770bb.mir

AMDGPU: Remove kill flags on virtual registers from MIR tests

Soon the verifier will disallow this. Delete redundant tests which
only differed from others by kill flag uses. twoaddr-bundle.mir relied
on the input kill flags in TwoAddressInstruction, so compute
LiveIntervals first as the real pipeline does.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+847-847llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom-mir.mir
+773-773llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+201-201llvm/test/CodeGen/AMDGPU/optimize-compare.mir
+149-149llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir
+101-101llvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
+0-157llvm/test/CodeGen/AMDGPU/lower-i1-copies-clear-kills.mir
+2,071-2,228181 files not shown
+4,280-4,668187 files

LLVM/project 68338a6 — llvm/test/tools/llubi lib_printf_format.ll

[NFC][test] Accommodate AIX %F output for NaN values

Resolves CI failure from
https://github.com/llvm/llvm-project/pull/238071.
DeltaFile
+5-4llvm/test/tools/llubi/lib_printf_format.ll
+5-41 files

FreeBSD/src b138d01 — lib/libc/locale mbrtocXX_iconv.h

libc/locale: Check EILSEQ return

_citrus_iconv_std_iconv_convert can return EILSEQ without setting
invlen. As a result, we should check EILSEQ in the return value or it
will incorrectly return -2

Reviewed by:    kevans
Fixes: e2030ca246a7 ("libc: fix c*rtomb/mbrtoc*")
MFC after:      2 days
Differential Revision: https://reviews.freebsd.org/D61151
DeltaFile
+1-1lib/libc/locale/mbrtocXX_iconv.h
+1-11 files

LLVM/project 7f88c71 — clang/test/Driver msvc-multilib.yaml, clang/test/Driver/Inputs/multilib_msvc_tree/resource/include .keep

[clang][NFC] Test msvc multilib resource dirs (#238210)

As with other similar tests, explicitly add checks for the resource dir
paths added by the driver when using multilibs.

Assisted-by: AI
DeltaFile
+14-3clang/test/Driver/msvc-multilib.yaml
+1-0clang/test/Driver/Inputs/multilib_msvc_tree/resource/lib/x86_64-pc-windows-msvc/noexcept/clang_rt.builtins.lib
+1-0clang/test/Driver/Inputs/multilib_msvc_tree/resource/lib/x86_64-pc-windows-msvc/debug/clang_rt.builtins.lib
+1-0clang/test/Driver/Inputs/multilib_msvc_tree/resource/lib/x86_64-pc-windows-msvc/clang_rt.builtins.lib
+0-0clang/test/Driver/Inputs/multilib_msvc_tree/resource/include/.keep
+17-35 files

LLVM/project 90f7f03 — llvm/lib/Target/RISCV RISCVSubtarget.h, llvm/test/CodeGen/RISCV calling-conv-lp64e.ll

[RISCV] Add ABI_LP64E to isSoftFPABI. (#238499)
DeltaFile
+2-2llvm/test/CodeGen/RISCV/calling-conv-lp64e.ll
+1-0llvm/lib/Target/RISCV/RISCVSubtarget.h
+3-22 files

LLVM/project 46eda9f — libunwind/src Unwind-sjlj.c, llvm/lib/CodeGen SjLjEHPrepare.cpp

libunwind: Use libgcc's function context layout for sjlj (#238128)

Make call_site an i32 and the __data words pointer
sized. compiler-rt's SjLj_Function_Context was not defined in the same
way as libgcc.

This was broken for all 64-bit targets. Every field was i32, so the
exception pointer in __data[0] was truncated. It just happens that no
64-bit target defaults to SJLJ exceptions except VE. Instead of fixing
that, a VE special case was introduced in the libunwind sources and
SjLjEHPrepare, which had a special TargetMachine hook for this data
size. In reality it should just be a uintptr_t which we can already
infer from the DataLayout.

This is an ABI break for 64-bit targets other than VE when using
libunwind built for SjLj: the __data, personality, lsda and jbuf
offsets move, so compiled code and libunwind must be updated
together. That configuration was already broken by the pointer
truncation and is not the default anywhere. 32-bit targets are

    [3 lines not shown]
DeltaFile
+38-14llvm/test/CodeGen/X86/sjlj-eh.ll
+25-25llvm/lib/CodeGen/SjLjEHPrepare.cpp
+24-24llvm/test/CodeGen/X86/indirect-branch-tracking-eh2.ll
+41-0llvm/test/Transforms/SjLjEHPrepare/function-context-layout.ll
+10-20libunwind/src/Unwind-sjlj.c
+6-7llvm/lib/Target/VE/VEISelLowering.cpp
+144-9010 files not shown
+168-11216 files

LLVM/project 0d1c61e — libc/docs conf.py

[libc] Add missing favicon for LLVM libc website  (#238494)

This would just link our logo to use as a favicon/tab icon
DeltaFile
+2-2libc/docs/conf.py
+2-21 files

LLVM/project 0058d4d — lldb/source/Plugins/SymbolFile/DWARF DWARFASTParserFortran.cpp

Fixed error
DeltaFile
+1-1lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserFortran.cpp
+1-11 files

LLVM/project cad3a1c — llvm/include/llvm/Transforms/Utils CallGraphUpdater.h, llvm/lib/Transforms/IPO Attributor.cpp

Attributor: Add new call graph references before reanalyzing (#238535)

If a reference moved between two functions of the SCC, e.g. an argument
was replaced by the function passed at its only call site, reanalyzing the 
caller first removed the edge that kept the target a descendant. Adding
the edge for the callee then failed the trivial edge assertion with
EXPENSIVE_CHECKS in cgscc-new-ref-edge.ll.

Add the reference edges of a new constant when it replaces a use, before
any function is reanalyzed.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+14-0llvm/lib/Transforms/Utils/CallGraphUpdater.cpp
+4-1llvm/lib/Transforms/IPO/Attributor.cpp
+5-0llvm/include/llvm/Transforms/Utils/CallGraphUpdater.h
+23-13 files

LLVM/project bc737f2 — bolt/include/bolt/Core BinaryBasicBlock.h, bolt/lib/Passes Instrumentation.cpp

[BOLT] Batch instruction insertion during instrumentation (#237930)

Insert each instrumentation snippet as a range to avoid repeatedly
shifting the remaining instructions in a basic block.

| Variant | Instrumentation Time (s) |
| --- | ---: |
| Baseline (before optimization) | 51.93 |
| commit | 40.19 |

---------

Co-authored-by: Jinjie Huang <huangjinjie at bytedance.com>
DeltaFile
+9-16bolt/lib/Passes/Instrumentation.cpp
+13-0bolt/include/bolt/Core/BinaryBasicBlock.h
+22-162 files

LLVM/project c10fb19 — llvm/lib/Transforms/Scalar ScalarOptions.td LoopUnrollPass.cpp, llvm/test/Transforms/LoopUnroll unroll-nest-cap-peel-partial.ll runtime-nest-cap.ll

[LoopUnroll] Cap unrolling and peeling in very large loop nests (#221702)

Add an option, `-unroll-max-nest-loops` (default 128), that suppresses
**heuristic run-time unrolling, partial unrolling, and peeling** of a
loop when the outermost loop of its nest contains more than that many
loops.

Each of these transforms calls `forgetTopmostLoop` (from LoopUnroll and
LoopPeel), which invalidates ScalarEvolution for the entire top-level
nest. In a nest with a very large number of sibling/child loops,
transforming each candidate re-invalidates the whole nest, so compile
time grows quadratically with the nest size while the run-time benefit
of these transforms is negligible.

The nest size for each top-level loop is computed once per function, so
the guard adds only a constant-factor check per candidate loop. None of
the gated transforms enqueue new loops (remainder/peeled bodies are
never added to the worklist), and a nest that shrinks later only makes
the cap more conservative. Explicit unroll pragmas and forced counts are

    [14 lines not shown]
DeltaFile
+558-0llvm/test/Transforms/LoopUnroll/runtime-nest-cap.ll
+92-0llvm/test/Transforms/LoopUnroll/unroll-nest-cap-peel-partial.ll
+31-2llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
+2-0llvm/lib/Transforms/Scalar/ScalarOptions.td
+683-24 files

LLVM/project fc723f9 — llvm/test/CodeGen/AArch64 aarch64-condopt-chaining.mir machine-combiner-reassociate-accumulators.mir

AArch64: Remove kill flags on virtual registers from MIR tests

These will soon be disallowed by the verifier. Delete tests which only
tested kill flag maintenance and only differed from other functions in
kill flag uses.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+91-91llvm/test/CodeGen/AArch64/sms-order-physreg-deps.mir
+86-86llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
+75-75llvm/test/CodeGen/AArch64/aarch64-combine-gather-lanes.mir
+40-40llvm/test/CodeGen/AArch64/machine-combiner-fmul-dup.mir
+34-34llvm/test/CodeGen/AArch64/machine-combiner-reassociate-accumulators.mir
+30-30llvm/test/CodeGen/AArch64/aarch64-condopt-chaining.mir
+356-35682 files not shown
+996-1,06288 files

LLVM/project 74d5dd3 — libc/src/__support/OSUtil/linux/syscall_wrappers CMakeLists.txt poll.h, libc/src/poll/linux CMakeLists.txt poll.cpp

[libc] Use a syscall wrapper for poll (#238266)

This PR move poll behind the centralized syscall wrappers, following
libc/docs/dev/syscall_wrapper_refactor.md.

---

<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
DeltaFile
+60-0libc/src/__support/OSUtil/linux/syscall_wrappers/poll.h
+5-36libc/src/poll/linux/poll.cpp
+20-2utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+15-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+4-3libc/src/poll/linux/CMakeLists.txt
+104-415 files

LLVM/project 6ff3ac0 — libc/src/__support/OSUtil/linux/syscall_wrappers CMakeLists.txt openat.h, libc/src/fcntl/linux CMakeLists.txt openat.cpp

[libc] Use a syscall wrapper for openat (#238264)

This PR move openat behind the centralized syscall wrappers, following
libc/docs/dev/syscall_wrapper_refactor.md.

---

<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
DeltaFile
+36-0libc/src/__support/OSUtil/linux/syscall_wrappers/openat.h
+17-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+13-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+5-7libc/src/fcntl/linux/openat.cpp
+5-1libc/src/fcntl/linux/CMakeLists.txt
+76-95 files

LLVM/project 085fb6e — llvm/lib/Target/LoongArch LoongArchISelDAGToDAG.cpp, llvm/test/CodeGen/LoongArch mul-zext-i32-const.ll

[LoongArch] Select MULW_D_WU for zext i32 multiplied by a 32-bit constant

i32 udiv/urem by a constant is lowered on LA64 to
(mul (bstrpick X, 31, 0), C). MULW_D_WU only reads the low 32 bits of
its operands, so select it directly: the BSTRPICK goes away and, when
bit 31 of C is set, the constant can be materialized sign-extended
without LU32I_D.

rustc-perf fmt-write-str on LA664: 3998.1M -> 3988.1M instructions
(-0.25%).

Assisted-by: LLM
DeltaFile
+79-27llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
+8-18llvm/test/CodeGen/LoongArch/mul-zext-i32-const.ll
+87-452 files

LLVM/project 73ec858 — llvm/test/CodeGen/LoongArch mul-zext-i32-const.ll

[LoongArch][NFC] Pre-commit tests for multiplying zext i32 by a constant

Assisted-by: LLM
DeltaFile
+148-0llvm/test/CodeGen/LoongArch/mul-zext-i32-const.ll
+148-01 files

LLVM/project 3d8c0cc — llvm/test/CodeGen/Hexagon signext-inreg.ll, llvm/test/CodeGen/Hexagon/autohvx fp-to-int.ll cttz-elts-split.ll

[Hexagon] Enable SlotIndexes compaction by default

Opt Hexagon in to dropping dead SlotIndexes entries before greedy
allocation, as AMDGPU already does, so live range sizes count only
instructions that still exist.

The test updates are register allocation changes; two pipeliner tests
get back their original, shorter kernels.
DeltaFile
+551-549llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
+233-235llvm/test/CodeGen/Hexagon/autohvx/build-vector-float-type.ll
+154-146llvm/test/CodeGen/Hexagon/autohvx/cttz-elts-split.ll
+113-115llvm/test/CodeGen/Hexagon/autohvx/fp-to-int.ll
+95-95llvm/test/CodeGen/Hexagon/vect/vect-vshifts.ll
+70-71llvm/test/CodeGen/Hexagon/signext-inreg.ll
+1,216-1,21112 files not shown
+1,329-1,32218 files

LLVM/project 2dd54ad — llvm/include/llvm/IR RuntimeLibcalls.td

RuntimeLibcalls: Add signatures for size returning new and GPU profiling

__size_returning_new and its variants return __sized_ptr_t, a pointer
and size pair. The GPU profiling functions use the compiler-rt
prototypes.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+8-6llvm/include/llvm/IR/RuntimeLibcalls.td
+8-61 files

LLVM/project 90066c1 — llvm/lib/CodeGen SjLjEHPrepare.cpp, llvm/test/Transforms/SjLjEHPrepare function-context-layout.ll sjlj-eh-prepare.ll

Fall back to the pointer size for an unknown arch
DeltaFile
+4-2llvm/lib/CodeGen/SjLjEHPrepare.cpp
+2-2llvm/test/Transforms/SjLjEHPrepare/respect-exception-model-flag.ll
+1-1llvm/test/Transforms/SjLjEHPrepare/sjlj-eh-prepare.ll
+1-0llvm/test/Transforms/SjLjEHPrepare/function-context-layout.ll
+8-54 files

LLVM/project a9ea7b1 — llvm/test/CodeGen/X86 sjlj-eh.ll

X86: Update the SjLj function context layout comments in sjlj-eh.ll

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+18-9llvm/test/CodeGen/X86/sjlj-eh.ll
+18-91 files

LLVM/project 2c20af5 — llvm/include/llvm/CodeGen SjLjEHPrepare.h, llvm/lib/CodeGen SjLjEHPrepare.cpp

Size the __data words as unwind words
DeltaFile
+20-15llvm/lib/CodeGen/SjLjEHPrepare.cpp
+15-0llvm/test/CodeGen/X86/sjlj-eh.ll
+6-7llvm/lib/Target/VE/VEISelLowering.cpp
+9-3llvm/test/Transforms/SjLjEHPrepare/function-context-layout.ll
+8-2llvm/lib/Target/X86/X86ISelLowering.cpp
+7-0llvm/include/llvm/CodeGen/SjLjEHPrepare.h
+65-273 files not shown
+72-329 files

LLVM/project 800ea4a — libunwind/src Unwind-sjlj.c, llvm/lib/CodeGen SjLjEHPrepare.cpp

libunwind: Use libgcc's function context layout for sjlj

Make call_site an i32 and the __data words pointer
sized. compiler-rt's SjLj_Function_Context was not defined in the same
way as libgcc.

This was broken for all 64-bit targets. Every field was i32, so the
exception pointer in __data[0] was truncated. It just happens that no
64-bit target defaults to SJLJ exceptions except VE. Instead of fixing
that, a VE special case was introduced in the libunwind sources and
SjLjEHPrepare, which had a special TargetMachine hook for this data
size. In reality it should just be a uintptr_t which we can already
infer from the DataLayout.

This is an ABI break for 64-bit targets other than VE when using
libunwind built for SjLj: the __data, personality, lsda and jbuf
offsets move, so compiled code and libunwind must be updated
together. That configuration was already broken by the pointer
truncation and is not the default anywhere. 32-bit targets are

    [4 lines not shown]
DeltaFile
+24-24llvm/test/CodeGen/X86/indirect-branch-tracking-eh2.ll
+34-0llvm/test/Transforms/SjLjEHPrepare/function-context-layout.ll
+7-19libunwind/src/Unwind-sjlj.c
+7-14llvm/lib/CodeGen/SjLjEHPrepare.cpp
+5-5llvm/test/CodeGen/X86/sjlj-eh.ll
+4-4llvm/test/CodeGen/VE/Scalar/builtin_sjlj_callsite.ll
+81-6610 files not shown
+91-8716 files

LLVM/project 31b3ae1 — llvm/test/CodeGen/Hexagon signext-inreg.ll, llvm/test/CodeGen/Hexagon/autohvx fp-to-int.ll cttz-elts-split.ll

[Hexagon] Enable SlotIndexes compaction by default

Opt Hexagon in to dropping dead SlotIndexes entries before greedy
allocation, as AMDGPU already does, so live range sizes count only
instructions that still exist.

The test updates are register allocation changes; two pipeliner tests
get back their original, shorter kernels.
DeltaFile
+551-549llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
+233-235llvm/test/CodeGen/Hexagon/autohvx/build-vector-float-type.ll
+154-146llvm/test/CodeGen/Hexagon/autohvx/cttz-elts-split.ll
+113-115llvm/test/CodeGen/Hexagon/autohvx/fp-to-int.ll
+95-95llvm/test/CodeGen/Hexagon/vect/vect-vshifts.ll
+70-71llvm/test/CodeGen/Hexagon/signext-inreg.ll
+1,216-1,21113 files not shown
+1,408-1,32219 files

LLVM/project e7f0323 — llvm/include/llvm/IR RuntimeLibcalls.td

RuntimeLibcalls: Add a signature for __llvm_deoptimize

llvm.experimental.deoptimize is lowered to a call to __llvm_deoptimize
with the intrinsic's arguments and return type, which vary between
calls, so declare it as void (...). No actual output change because
this happens to be the filler signature used for unhandled functions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+1-1llvm/include/llvm/IR/RuntimeLibcalls.td
+1-11 files

LLVM/project 4b94b6d — llvm/include/llvm/IR RuntimeLibcalls.td

RuntimeLibcalls: Add signatures for size returning new and GPU profiling

__size_returning_new and its variants return __sized_ptr_t, a pointer
and size pair. The GPU profiling functions use the compiler-rt
prototypes.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+8-6llvm/include/llvm/IR/RuntimeLibcalls.td
+8-61 files

LLVM/project 10419de — llvm/lib/Target/AMDGPU GCNRegPressure.h

clang-format
DeltaFile
+1-2llvm/lib/Target/AMDGPU/GCNRegPressure.h
+1-21 files

LLVM/project fb288ec — flang/include/flang/Evaluate real-value.h

[flang][NFC] Explain the -Waix-compat suppression in real-value.h (#238635)

Follow-up to 238605, which suppressed `-Waix-compat` on
`RealValue::opaque_` without saying why the warning does not point at a
real problem.

The warning flags a by-value struct with a 16-byte-aligned member as not
binary compatible with IBM XL C/C++ for AIX 16.1.0 or older. Here the
alignment is required: it is that of `RealValueImpl`, which comes from
`Real<>::word_`, and `real.h` already suppresses the same warning there.
Those older compilers cannot compile flang's C++17 code, so there is no
compatibility to preserve. This adds a comment saying so; no functional
change.

Assisted-by: AI
DeltaFile
+6-0flang/include/flang/Evaluate/real-value.h
+6-01 files

LLVM/project 26221eb — lld/test/MachO arm64e-input-abi.s

Set IsLittleEndian in arm64e-input-abi.s

#238122 makes IsLittleEndian required in Mach-O YAML. Set it here so this test works whichever of the two lands first.

Assisted-by: Claude Code
DeltaFile
+1-0lld/test/MachO/arm64e-input-abi.s
+1-01 files