FreeNAS/freenas 14f66e4src/middlewared/middlewared main.py, src/middlewared/middlewared/plugins network.py

remove interface.unconfigure
DeltaFile
+0-151src/middlewared/middlewared/plugins/interface/configure.py
+23-46src/middlewared/middlewared/plugins/network.py
+53-3src/middlewared/middlewared/plugins/interface/sync.py
+10-3src/middlewared/middlewared/main.py
+86-2034 files

NetBSD/pkgsrc-wip 9a6f05demacs-git PLIST

emacs-git: update PLIST
DeltaFile
+14-0emacs-git/PLIST
+14-01 files

LLVM/project 8cd86ffllvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h VPlan.h, llvm/test/Transforms/LoopVectorize phi-with-fastflags-vplan.ll phi-with-fastflags.ll

[VPlan] Propagate FastMathFlags from phis to blends (#180226)

If a phi has fast math flags, we can propagate it to the widened select.
To do this, this patch makes VPPhi and VPBlendRecipe subclasses of
VPRecipeWithIRFlags, and propagates it through PlainCFGBuilder and
VPPredicator.

Alive2 proofs for some of the FMFs (it looks like it can't reason about
the full "fast" set yet)
nnan: https://alive2.llvm.org/ce/z/f0bRd4
nsz: https://alive2.llvm.org/ce/z/u9P96T

The actual motivation for this to eventually be able to move the special
casing for tail folding in
LoopVectorizationPlanner::addReductionResultComputation into the CFG in
#176143, which requires passing through FMFs.
DeltaFile
+74-0llvm/test/Transforms/LoopVectorize/phi-with-fastflags-vplan.ll
+46-0llvm/test/Transforms/LoopVectorize/phi-with-fastflags.ll
+10-11llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+12-8llvm/lib/Transforms/Vectorize/VPlan.h
+10-5llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+4-5llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+156-295 files not shown
+164-3611 files

LLVM/project 72ff1cbflang/test/Lower explicit-interface-results.f90 explicit-interface-results-2.f90

[flang][NFC] Converted five tests from old lowering to new lowering (part 15) (#179854)

Tests converted from test/Lower: equivalence-with-host-assoc.f90,
explicit-interface-results-2.f90, explicit-interface-results.f90,
ext-proc-as-actual-argument-1.f90, ext-proc-as-actual-argument-2.f90
DeltaFile
+154-166flang/test/Lower/explicit-interface-results.f90
+103-98flang/test/Lower/explicit-interface-results-2.f90
+1-72flang/test/Lower/equivalence-with-host-assoc.f90
+22-12flang/test/Lower/ext-proc-as-actual-argument-1.f90
+20-12flang/test/Lower/ext-proc-as-actual-argument-2.f90
+300-3605 files

LLVM/project 5fb8390llvm/include/llvm/ADT GenericUniformityImpl.h GenericUniformityInfo.h, llvm/lib/Analysis UniformityAnalysis.cpp

track uniform values at SSA level
DeltaFile
+22-2llvm/include/llvm/ADT/GenericUniformityImpl.h
+17-0llvm/lib/Analysis/UniformityAnalysis.cpp
+12-0llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+1-0llvm/include/llvm/ADT/GenericUniformityInfo.h
+52-24 files

LLVM/project a40275cclang/lib/Analysis CloneDetection.cpp, clang/lib/Parse ParseDeclCXX.cpp

[clang] Add explicit std::move(...) to avoid a few copies (#180482)

Moving an std::vector is almost always profitable.

A clang::CXXScopeSpec contains an owned
clang::NestedNameSpecifierLocBuilder which currently does not benefit
from being moved, but may structurally in the future.

A clang::MultiLevelTemplateArgumentList contains an llvm::SmalVector
which may benefit from being moved dependiong on its size.

A clang::Environment contains an llvm::ImmutableMap which itself
contains an llvm::IntrusiveRefCntPtr that benefits from being moved.

Changes suggested by performance-use-std-move from #179467

---------

Co-authored-by: Timm Baeder <tbaeder at redhat.com>
DeltaFile
+3-3clang/lib/Analysis/CloneDetection.cpp
+2-1clang/lib/Sema/SemaTemplateInstantiate.cpp
+1-1clang/lib/Parse/ParseDeclCXX.cpp
+1-1clang/lib/StaticAnalyzer/Core/ProgramState.cpp
+1-1clang/lib/Tooling/DependencyScanningTool.cpp
+8-75 files

LLVM/project dbf2caaclang/lib/Driver/ToolChains Gnu.cpp Darwin.cpp

[clang] Add explicit std::move(...) to avoid a few copies (#180477)

Moving a clang::MultilibSet is almost always profitable.

Changes suggested by performance-use-std-move from #179467
DeltaFile
+5-5clang/lib/Driver/ToolChains/Gnu.cpp
+1-1clang/lib/Driver/ToolChains/Darwin.cpp
+1-1clang/lib/Driver/ToolChains/OHOS.cpp
+7-73 files

LLVM/project f88e018clang-tools-extra/clangd ClangdLSPServer.cpp

[clangd] Add explicit std::move(...) to avoid a few copies (#180475)

Moving an std::map is almost always profitable (DiagnosticToDiagRefMap).

Changes suggested by performance-use-std-move from #179467
DeltaFile
+1-1clang-tools-extra/clangd/ClangdLSPServer.cpp
+1-11 files

LLVM/project de457a6offload/test/offloading ompx_bare.c ompx_bare_multi_dim.cpp

fix formatting
DeltaFile
+3-1offload/test/offloading/ompx_bare.c
+3-1offload/test/offloading/ompx_bare_multi_dim.cpp
+6-22 files

LLVM/project f71e321clang/lib/AST/ByteCode InterpState.cpp InterpState.h, clang/test/AST/ByteCode constexpr-steps.cpp

[clang][bytecode] Implement constexpr step limit (#176150)

This only calls `noteStep()` on jump opcodes, so this works for loops.
It does not prevent "hangs" when a function is just _very_ long (could
be interesting how this interfaces with expand statements?).

Fixes https://github.com/llvm/llvm-project/issues/165951
DeltaFile
+17-2clang/lib/AST/ByteCode/InterpState.cpp
+10-0clang/test/AST/ByteCode/constexpr-steps.cpp
+10-0clang/lib/AST/ByteCode/InterpState.h
+3-3clang/lib/AST/ByteCode/Interp.cpp
+40-54 files

FreeBSD/ports cc6de24security/vuxml/vuln 2026.xml

security/vuxml: fix CVE ids for the latest chromium entry

Reported by:    fernape@
DeltaFile
+2-1security/vuxml/vuln/2026.xml
+2-11 files

LLVM/project b169123llvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/test/CodeGen/AMDGPU intrinsic-amdgcn-s-alloc-vgpr.ll

Address review comments
DeltaFile
+5-3llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+3-3llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
+8-62 files

LLVM/project 2b8cd80llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp

Update after upstream changes
DeltaFile
+2-2llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+2-21 files

LLVM/project 371c70eoffload/test/offloading/fortran target-no-loop.f90 target-parallel-do-collapse.f90

[offload] Adapt tests to new PluginInterface quoting [NFC]

https://github.com/llvm/llvm-project/commit/4096cb60175a3bfdde25dd0cca167416f4f4338e
removed the quotes around PluginInterface
DeltaFile
+6-6offload/test/offloading/fortran/target-no-loop.f90
+1-1offload/test/offloading/fortran/target-parallel-do-collapse.f90
+1-1offload/test/offloading/fortran/do-concurrent-to-omp-saxpy-2d.f90
+1-1offload/test/offloading/fortran/basic-target-teams-parallel-reduction.f90
+1-1offload/test/offloading/fortran/default-mapper-nested-derived-type.f90
+1-1offload/test/offloading/fortran/do-concurrent-to-omp-saxpy.f90
+11-117 files not shown
+18-1813 files

LLVM/project 1d61ac2clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

[clang][amdgpu] mapCABIAtomicOrdering - fix MSVC not all control paths return a value warning. NFC. (#180500)

DeltaFile
+1-0clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+1-01 files

OpenBSD/ports QLyvAIWmultimedia/gstreamer1/plugins-rs distinfo crates.inc, multimedia/gstreamer1/plugins-rs/patches patch-Cargo_toml

   Update to gst-plugins-rs-0.15.0alpha2.
VersionDeltaFile
1.7+814-392multimedia/gstreamer1/plugins-rs/distinfo
1.7+403-192multimedia/gstreamer1/plugins-rs/crates.inc
1.9+12-9multimedia/gstreamer1/plugins-rs/Makefile
1.4+5-4multimedia/gstreamer1/plugins-rs/patches/patch-Cargo_toml
+1,234-5974 files

LLVM/project bf84e84clang/lib/CodeGen/Targets AMDGPU.cpp

[clang][amdgpu] getLLVMSyncScopeStr - fix MSVC not all control paths return a value warning. NFC. (#180501)

DeltaFile
+1-0clang/lib/CodeGen/Targets/AMDGPU.cpp
+1-01 files

LLVM/project 2eb8112llvm/lib/CAS OnDiskGraphDB.cpp

[CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (#180499)

DeltaFile
+1-0llvm/lib/CAS/OnDiskGraphDB.cpp
+1-01 files

LLVM/project 5b2bfceflang/lib/Optimizer/Analysis CMakeLists.txt

[flang][NFC] Remove dependency on FIRBuilder from FIRAnalysis. (#180300)

The dependency actually appears to be unused.

Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
DeltaFile
+0-1flang/lib/Optimizer/Analysis/CMakeLists.txt
+0-11 files

NetBSD/pkgsrc 8mYT5Rvdoc CHANGES-2026

   Updated x11/py-wxPython, textproc/py-pyaml
VersionDeltaFile
1.993+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc k3CnUCItextproc/py-pyaml distinfo Makefile

   py-pyaml: updated to 26.2.1

   26.2.1
   cli: add -o/--out-file option
VersionDeltaFile
1.18+4-4textproc/py-pyaml/distinfo
1.22+2-2textproc/py-pyaml/Makefile
+6-62 files

NetBSD/src gug9ceJsys/arch/powerpc/powerpc bus_dma.c

   powerpc: make _bus_dmamap_load_raw work
VersionDeltaFile
1.58+15-5sys/arch/powerpc/powerpc/bus_dma.c
+15-51 files

NetBSD/pkgsrc eVDjqQGx11/py-wxPython distinfo Makefile

   py-wxPython: updated to 4.2.5

   4.2.5

   New and improved in this release:
   * This release was built using the wxWidgets' v3.2.9 release tag.  The only exception is that libtiff and pcre2 bundled with wxWidgets are updated to the versions from the wxWidgets master branch (libtiff 4.7.0 and pcre2 10.44).
   * Fix build/wheel installation using setuptools 81+
   * Replace md5 with sha256 when validating downloaded waf and doxygen build tools
   * Add missing attribute _x_maincol to constructor of TreeListMainWindow
   * Fix wx.svg to work with cython 3.1 generated code
VersionDeltaFile
1.5+4-4x11/py-wxPython/distinfo
1.22+2-4x11/py-wxPython/Makefile
+6-82 files

NetBSD/src r4eNHIosys/external/bsd/drm2/include/drm bus_dma_hacks.h

   drm2: More powerpc fixes
VersionDeltaFile
1.27+7-4sys/external/bsd/drm2/include/drm/bus_dma_hacks.h
+7-41 files

LLVM/project 13cdecdflang/lib/Optimizer/HLFIR/Transforms ScheduleOrderedAssignments.cpp, flang/test/HLFIR/order_assignments where-array-sections.f90

handle the EitherIdenticalOrDisjoint as assuming identical
DeltaFile
+48-10flang/test/HLFIR/order_assignments/where-array-sections.f90
+16-11flang/lib/Optimizer/HLFIR/Transforms/ScheduleOrderedAssignments.cpp
+64-212 files

LLVM/project 49026a7clang/include/clang/Analysis/Analyses/LifetimeSafety FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

Improve liveness to detect more invaldiations
DeltaFile
+16-13clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+16-3clang/test/Sema/warn-lifetime-safety-invalidations.cpp
+11-5clang/test/Sema/Inputs/lifetime-analysis.h
+4-4clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+47-254 files

LLVM/project 9803e3ellvm/docs AMDGPUUsage.rst

AMDGPUUsage: add async versions of existing entries in the table
DeltaFile
+6-0llvm/docs/AMDGPUUsage.rst
+6-01 files

LLVM/project 964651allvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 select-big-integer.ll

[X86] Allow handling of i128/256/512 SELECT on the FPU (#180197)

If the scalar integer selection sources are freely transferable to the
FPU, then splat to create an allbits select condition and create a
vector select instead
DeltaFile
+220-491llvm/test/CodeGen/X86/select-big-integer.ll
+36-0llvm/lib/Target/X86/X86ISelLowering.cpp
+256-4912 files

LLVM/project aac785bllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll

Merge remote-tracking branch 'remotes/origin/main' into s-alloc-vgpr-intrinsic
DeltaFile
+121,421-138,357llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+43,316-44,830llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+56,025-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+52,760-0polly/lib/External/isl/include/isl/typed_cpp.h
+12,842-18,547llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+30,890-0polly/lib/External/isl/include/isl/cpp.h
+317,254-201,7348,514 files not shown
+1,095,468-634,6868,520 files

LLVM/project 27a8ab0llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU indirect-reg-read-imm-idx.ll indirect-reg-read-imm-idx.mir

[AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (#179699)

The definition for V_INDIRECT_REG_READ_GPR_IDX_B32_V*'s SSrc_b32 operand
allows immediates, but the expansion logic handles only register cases
now. This can result in expansion failures when e.g.
llvm.amdgcn.wave.reduce.umin.i32 is folded into a constant and then used
as an insertelement idx.
DeltaFile
+21-0llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.ll
+18-0llvm/test/CodeGen/AMDGPU/indirect-reg-read-imm-idx.mir
+1-2llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+40-23 files