LLVM/project c3e7b45offload/test lit.cfg

[offload] Define flang-rt as an available test feature (#187732)

Can now be used as `REQUIRES: flang-rt`, for example.
DeltaFile
+15-13offload/test/lit.cfg
+15-131 files

LLVM/project e42b449offload/test/offloading/fortran io.f90 formatted-io.f90

also fix offloading/fortran/.*io.f90
DeltaFile
+1-1offload/test/offloading/fortran/io.f90
+1-1offload/test/offloading/fortran/formatted-io.f90
+2-22 files

LLVM/project bae4197flang/include/flang/Semantics openmp-utils.h, flang/lib/Semantics check-omp-loop.cpp openmp-utils.cpp

Revert "[flang][OpenMP] Allow "Reason" messages to not have source locations"

This reverts commit 7d3379ca600347797a945feb6270963def5d5a5d.
DeltaFile
+9-9flang/lib/Semantics/check-omp-loop.cpp
+3-14flang/include/flang/Semantics/openmp-utils.h
+2-14flang/lib/Semantics/openmp-utils.cpp
+14-373 files

LLVM/project d8104bfllvm/include/llvm/IR IntrinsicsSPIRV.td, llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

[SPIR-V] Add `llvm.spv.named.boolean.spec.constant` (#187420)

This adds a SPIR-V intrinsic for associating a name (textual identifier)
to a specialisation constant. The name is encoded in metadata, and is
intended to be used within LLVM / by the SPIR-V BE (e.g. #134016 would
be a direct user), as it is never emitted into the SPIR-V object.
Non-boolean and composite specialisation constants will be handled in
the future, via dedicated intrinsics, if there is interest.
DeltaFile
+20-1llvm/test/CodeGen/SPIRV/constant/spec-constant.ll
+14-0llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+5-0llvm/include/llvm/IR/IntrinsicsSPIRV.td
+39-13 files

FreeBSD/ports 16125d5www/hs-postgrest distinfo Makefile.cabal

www/hs-postgrest: Update 14.2 => 14.6

* Add WWW for source code repository.

Approved by:            haskell@ (alven@)
Approved by:            db@, yuri@ (Mentors, implicit)
DeltaFile
+49-33www/hs-postgrest/distinfo
+24-23www/hs-postgrest/Makefile.cabal
+3-2www/hs-postgrest/Makefile
+76-583 files

LLVM/project bf57f91clang/lib/Serialization ASTReader.cpp

[Clang] Fix -Wunused-variable
DeltaFile
+2-1clang/lib/Serialization/ASTReader.cpp
+2-11 files

FreeBSD/src 3bfda6flibexec/nuageinit nuageinit.7

nuageinit.7: fix cloud-config header line

This updates the nuageinit man page by aligning mentions of the
cloud-config header line with the cloud-init documentation[0], removing
an unwanted "!" character.

[0] https://docs.cloud-init.io/en/latest/explanation/about-cloud-config.html#how-do-i-create-a-cloud-config-file

Signed-off-by: Jonathan Matthews <freebsd at hello.jonathanmatthews.com>
Differential Revision:  https://reviews.freebsd.org/D53706
(cherry picked from commit 4ab2d625e1462e9a78cb8086906c1a3da3aa6713)
DeltaFile
+2-2libexec/nuageinit/nuageinit.7
+2-21 files

Linux/linux 1651602arch/arm64/kernel rsi.c, arch/arm64/kernel/pi patch-scs.c

Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Will Deacon:
 "There's a small crop of fixes for the MPAM resctrl driver, a fix for
  SCS/PAC patching with the AMDGPU driver and a page-table fix for
  realms running with 52-bit physical addresses:

   - Fix DWARF parsing for SCS/PAC patching to work with very large
     modules (such as the amdgpu driver)

   - Fixes to the mpam resctrl driver

   - Fix broken handling of 52-bit physical addresses when sharing
     memory from within a realm"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: realm: Fix PTE_NS_SHARED for 52bit PA support
  arm_mpam: Force __iomem casts
  arm_mpam: Disable preemption when making accesses to fake MSC in kunit test

    [2 lines not shown]
DeltaFile
+15-7drivers/resctrl/test_mpam_devices.c
+8-0arch/arm64/kernel/pi/patch-scs.c
+2-1arch/arm64/kernel/rsi.c
+2-0drivers/resctrl/mpam_devices.c
+27-84 files

LLVM/project e1347d1llvm/unittests/Target/SPIRV CMakeLists.txt

[SPIR-V] Fix linker error after #187685 (#187722)

Fix build with `BUILD_SHARED_LIBS=On`
DeltaFile
+4-0llvm/unittests/Target/SPIRV/CMakeLists.txt
+4-01 files

LLVM/project 2466528offload/test/offloading/fortran implicit-record-field-mapping.f90

[offload] Use flang-rt for test feature requirements
DeltaFile
+1-5offload/test/offloading/fortran/implicit-record-field-mapping.f90
+1-51 files

Linux/linux c3d1378arch/x86/hyperv hv_crash.c, arch/x86/kernel/cpu mshyperv.c

Merge tag 'hyperv-fixes-signed-20260319' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux

Pull Hyper-V fixes from Wei Liu:

 - Fix ARM64 MSHV support (Anirudh Rayabharam)

 - Fix MSHV driver memory handling issues (Stanislav Kinsburskii)

 - Update maintainers for Hyper-V DRM driver (Saurabh Sengar)

 - Misc clean up in MSHV crashdump code (Ard Biesheuvel, Uros Bizjak)

 - Minor improvements to MSHV code (Mukesh R, Wei Liu)

 - Revert not yet released MSHV scrub partition hypercall (Wei Liu)

* tag 'hyperv-fixes-signed-20260319' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux:
  mshv: Fix error handling in mshv_region_pin
  MAINTAINERS: Update maintainers for Hyper-V DRM driver

    [10 lines not shown]
DeltaFile
+173-15drivers/hv/mshv_synic.c
+61-57arch/x86/hyperv/hv_crash.c
+22-71drivers/hv/mshv_root_main.c
+4-2drivers/hv/mshv_regions.c
+2-3drivers/hv/mshv_root.h
+3-2arch/x86/kernel/cpu/mshyperv.c
+265-1502 files not shown
+270-1528 files

LLVM/project 063109fllvm/lib/Target/AArch64 AArch64MIPeepholeOpt.cpp AArch64.h, llvm/test/CodeGen/AArch64 peephole-movd.mir peephole-orr.mir

[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)

Adds a port for AArch64MIPeepholeOpt

- Refactored lib/Target/AArch64/AArch64MIPeepholeOpt.cpp to extract base
logic as Impl
- Renamed existing pass with "Legacy" suffix and updated references
- Added NewPM pass AArch64MIPeepholeOptPass
- Updated tests
DeltaFile
+62-35llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+9-2llvm/lib/Target/AArch64/AArch64.h
+2-2llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+1-0llvm/test/CodeGen/AArch64/peephole-movd.mir
+1-0llvm/test/CodeGen/AArch64/peephole-orr.mir
+1-0llvm/test/CodeGen/AArch64/peephole-sxtw.mir
+76-396 files not shown
+82-3912 files

LLVM/project f2d4d0eoffload/test lit.cfg

[offload] Define flang-rt as an available test feature

Can now be used as `REQUIRES: flang-rt`, for example.
DeltaFile
+15-13offload/test/lit.cfg
+15-131 files

LLVM/project bb070eallvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers fp-simple-hierarchy.ll fp_cmp.ll, llvm/test/CodeGen/SPIRV/pointers fun-ptr-to-itself.ll fun-with-aggregate-arg-in-const-init.ll

[SPIRV][NFC] Update `SPV_INTEL_function_pointers` tests to check `spirv-val` output (#182549)

https://github.com/KhronosGroup/SPIRV-Tools/pull/6232 added support for
`SPV_INTEL_function_pointers` on `spirv-val`.

This PR updates some relevant tests to run `spirv-val` and document why
some others are failing.
DeltaFile
+5-1llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
+5-1llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_cmp.ll
+3-2llvm/test/CodeGen/SPIRV/pointers/fun-ptr-to-itself.ll
+4-1llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_no_return.ll
+4-1llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fun-ptr-addrcast.ll
+3-0llvm/test/CodeGen/SPIRV/pointers/fun-with-aggregate-arg-in-const-init.ll
+24-63 files not shown
+27-99 files

Linux/linux 7006433fs/smb/client inode.c smb2ops.c

Merge tag 'v7.0-rc4-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6

Pull smb client fixes from Steve French:

 - Fix reporting of i_blocks

 - Fix Kerberos mounts with different usernames to same server

 - Trivial comment cleanup

* tag 'v7.0-rc4-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6:
  smb: client: fix generic/694 due to wrong ->i_blocks
  cifs: smb1: fix comment typo
  smb: client: fix krb5 mount with username option
DeltaFile
+6-15fs/smb/client/inode.c
+4-16fs/smb/client/smb2ops.c
+6-0fs/smb/client/cifsglob.h
+4-0fs/smb/client/connect.c
+1-1fs/smb/client/smb1transport.c
+0-1fs/smb/client/file.c
+21-336 files

LLVM/project 93d7583llvm/lib/Target/AMDGPU AMDGPU.td GCNSubtarget.h, llvm/test/CodeGen/AMDGPU required-export-priority.ll required-export-priority.mir

[AMDGPU] Update features for gfx1170 (#186107)

- Enable `NoF16PseudoScalarTransInlineConstants` for 11.7.
- Add test for `RequiredExportPriority`, one of the differences between
11.5 and 11.7.
DeltaFile
+324-185llvm/test/CodeGen/AMDGPU/required-export-priority.ll
+95-0llvm/test/CodeGen/AMDGPU/required-export-priority.mir
+10-2llvm/lib/Target/AMDGPU/AMDGPU.td
+0-6llvm/lib/Target/AMDGPU/GCNSubtarget.h
+2-1llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.mir
+431-1945 files

Linux/linux f268964fs/smb/server smb2pdu.c, fs/smb/server/mgmt tree_connect.c

Merge tag 'v7.0-rc4-ksmbd-server-fixes' of git://git.samba.org/ksmbd

Pull smb server fixes from Steve French:

 - Three use after free fixes (in close, in compounded ops, and in tree
   disconnect)

 - Multichannel fix

 - return proper volume identifier (superblock uuid if available) in
   FS_OBJECT_ID queries

* tag 'v7.0-rc4-ksmbd-server-fixes' of git://git.samba.org/ksmbd:
  ksmbd: fix use-after-free in durable v2 replay of active file handles
  ksmbd: fix use-after-free of share_conf in compound request
  ksmbd: use volume UUID in FS_OBJECT_ID_INFORMATION
  ksmbd: unset conn->binding on failed binding request
  ksmbd: fix share_conf UAF in tree_conn disconnect
DeltaFile
+12-5fs/smb/server/smb2pdu.c
+6-3fs/smb/server/mgmt/tree_connect.c
+18-82 files

LLVM/project 2bb0fa4llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/X86 avg.ll

[SLP]Prefer copyable over alternate

If the instructions state is alternate and/or contains non-directly
matching instructions, need to check if it is better to represent such
operations as non-alternate with copyables.
To do this, we need to compare operands between the instructions in their
different representations and choose the best one for optimal
vectorization.

Reviewers: RKSimon, hiraditya

Pull Request: https://github.com/llvm/llvm-project/pull/183777
DeltaFile
+282-58llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+74-85llvm/test/Transforms/PhaseOrdering/X86/avg.ll
+62-61llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
+41-39llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
+27-27llvm/test/Transforms/SLPVectorizer/X86/parent-node-schedulable-with-multi-copyables.ll
+24-29llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
+510-29923 files not shown
+664-48729 files

FreeNAS/freenas 3d77522src/middlewared/middlewared/api/v26_0_0 system_general.py, src/middlewared/middlewared/api/v27_0_0 system_general.py

Add ui_certificate_name to system.general.config

This commmit adds a `ui_certificate_name` field to
system.general.config output. This allows the UI to avoid
making a much more expensive request to query certificates.
DeltaFile
+4-0src/middlewared/middlewared/api/v26_0_0/system_general.py
+3-0src/middlewared/middlewared/api/v27_0_0/system_general.py
+3-0src/middlewared/middlewared/plugins/system_general/update.py
+10-03 files

LLVM/project 20768a9mlir/lib/Dialect/OpenACC/Transforms ACCSpecializeForDevice.cpp, mlir/test/Dialect/OpenACC acc-specialize-for-device.mlir

[ACC] Use ExistingOps strictness in ACCSpecializeForDevice for non-specialized functions (#187645)

For non-specialized functions, ACCSpecializeForDevice collects ACC ops
inside compute constructs and applies device specialization patterns via
applyOpPatternsGreedily. With the default AnyOp strictness, the greedy
driver expands the worklist to parent ops when inner ops are modified,
accidentally unwrapping the parent acc.parallel via
ACCRegionUnwrapConversion. This leaves orphaned acc.loop
combined(parallel) ops that lose their parallelism and reduction
information downstream.

Set GreedyRewriteStrictness::ExistingOps so the greedy driver only
processes the initially collected inner ops, preserving the parent
compute construct for ACCComputeLowering to handle.
DeltaFile
+28-0mlir/test/Dialect/OpenACC/acc-specialize-for-device.mlir
+5-0mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForDevice.cpp
+33-02 files

LLVM/project 6d45f6dclang-tools-extra/clang-tidy ClangTidyProfiling.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Generate valid JSON for characters that require escaping (#187454)

As of AI Usage: This PR is assisted by Claude
Closes #187201
DeltaFile
+19-7clang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
+3-0clang-tools-extra/docs/ReleaseNotes.rst
+2-0clang-tools-extra/test/clang-tidy/infrastructure/clang-tidy-store-check-profile-one-tu.cpp
+24-73 files

LLVM/project 8cbf3f3llvm/include/llvm/CodeGen/GlobalISel CombinerHelper.h, llvm/include/llvm/Target/GlobalISel Combine.td

[GlobalISel] Fold `a bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` (#181725)

Based on the suggestions in #140639, this PR adds the rewrite pattern `a
bitwiseop (~b +/- c)` -> `a bitwiseop ~(b -/+ c)` for AND, OR, and XOR
operations. This rewrite enables lowering to `ANDN`, `ORN`, and `XORN`
operations.

Added new MIR tests in `combine-binop-neg.mir` for AArch64 to verify the
new combine works for various commuted and uncommuted forms with AND,
OR, and XOR and added new LLVM IR tests for RISC-V in `rv32zbb-zbkb.ll`
to ensure the combine produces the expected `ANDN`, `ORN`, and `XORN`
operations.
DeltaFile
+237-0llvm/test/CodeGen/AArch64/GlobalISel/combine-binop-neg.mir
+68-0llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+57-0llvm/test/CodeGen/RISCV/GlobalISel/rv32zbb-zbkb.ll
+10-1llvm/include/llvm/Target/GlobalISel/Combine.td
+8-0llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+380-15 files

NetBSD/pkgsrc HbUbMXKdoc TODO

   doc/TODO: + gnunet-0.27, wayland-1.25.
VersionDeltaFile
1.26950+3-1doc/TODO
+3-11 files

LLVM/project 0c15b99llvm/lib/Target/AMDGPU SIShrinkInstructions.cpp, llvm/test/CodeGen/AMDGPU v_swap_b16.ll v_swap_b32.mir

Revert "[AMDGPU] Generate more swaps (#184164)"

This reverts commit 81396ebc51c40214465111ede745147989c67e48.
DeltaFile
+0-154llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
+52-62llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+32-66llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
+29-15llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+2-2llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+115-2995 files

LLVM/project a6cc2f5llvm/lib/Target/AMDGPU VOP1Instructions.td

[AMDGPU] Remove `_e32` patterns for i32 saturated conversions (#187715)

This brings it in line with `i16` conversions. `_e32` patterns are not
needed as `_e64` are later narrowed where possible.
DeltaFile
+0-8llvm/lib/Target/AMDGPU/VOP1Instructions.td
+0-81 files

FreeBSD/ports f8e3f13print/freetype2 Makefile distinfo

print/freetype2: Update to 2.14.2

PR:             293643
Approved by:    arrowd (desktop)
Exp-run by:     antoine
Co-authored-by: Gleb Popov <arrowd at FreeBSD.org>
DeltaFile
+16-49print/freetype2/Makefile
+3-3print/freetype2/distinfo
+1-1print/freetype2/pkg-plist
+20-533 files

LLVM/project c6ba0e0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis DerivedAnalysis.h SummaryAnalysis.h, clang/lib/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis AnalysisDriver.cpp

[clang][ssaf] Add whole-program analysis execution layer

This change Introduces the analysis execution layer of the Scalable
Static Analysis Framework. This layer bridges the LUSummary (entity
summaries from the linker phase) to WPASuite (the collection of
whole-program analysis results). It introduces the following classes:

  - `AnalysisResult` — base class for all per-analysis results.
- `AnalysisBase` — minimal common base with a private kind tag used by
the driver for dispatch
- `SummaryAnalysis<ResultT, EntitySummaryT>` — processes per-entity
EntitySummary objects from LUSummary.
- `DerivedAnalysis<ResultT, DepResultTs...>` — consumes previously
produced AnalysisResult objects.
- `AnalysisRegistry` — unified `llvm::Registry` backed registry to
register analyses.
- `WPASuite` — Container bundling `EntityIdTable` and all
`AnalysisResult` objects from a driver run.
- `AnalysisDriver` — executes analyses topologically, feeding results of
child analyses to parent analyses.
DeltaFile
+566-0clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis/AnalysisDriverTest.cpp
+212-0clang/lib/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisDriver.cpp
+140-0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/DerivedAnalysis.h
+128-0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/SummaryAnalysis.h
+109-0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisRegistry.h
+95-0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/AnalysisDriver.h
+1,250-012 files not shown
+1,599-018 files

FreeNAS/freenas 2dd3ed5src/middlewared/middlewared/plugins/update_ trains.py, src/middlewared/middlewared/pytest/unit/plugins/update test_trains.py

Allow the trains to be marked as unstable to make "the system can be upgraded only to the next train" constraint feasible
DeltaFile
+35-0src/middlewared/middlewared/pytest/unit/plugins/update/test_trains.py
+12-7src/middlewared/middlewared/plugins/update_/trains.py
+47-72 files

FreeBSD/ports 6008d82net/rabbitmq pkg-plist distinfo

net/rabbitmq: Update 4.2.2 => 4.2.5

Changelogs:
https://github.com/rabbitmq/rabbitmq-server/releases/tag/v4.2.3
https://github.com/rabbitmq/rabbitmq-server/releases/tag/v4.2.4
https://github.com/rabbitmq/rabbitmq-server/releases/tag/v4.2.5

MFH:    2026Q1
(cherry picked from commit 53ec74efae3581c50ee1fc9dbc976660fe6805e1)
DeltaFile
+112-107net/rabbitmq/pkg-plist
+3-3net/rabbitmq/distinfo
+1-1net/rabbitmq/Makefile
+116-1113 files

LLVM/project 0d251dbllvm/lib/Target/NVPTX NVPTXUtilities.cpp NVVMProperties.cpp

[NVPTX] Split NVVM annotation query helpers out of NVPTXUtilities (NFC) (#187349)
DeltaFile
+2-336llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
+325-0llvm/lib/Target/NVPTX/NVVMProperties.cpp
+69-0llvm/lib/Target/NVPTX/NVVMProperties.h
+1-43llvm/lib/Target/NVPTX/NVPTXUtilities.h
+16-0llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+5-4llvm/lib/Target/NVPTX/CMakeLists.txt
+418-3839 files not shown
+431-38915 files