LLVM/project 12fe8b2 — llvm/lib/Target/AArch64 AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 sme2-intrinsics-int-dots.ll sme-vg-to-stack.ll

[AArch64] Reorder callee-saved spills to maximise load/store register groupings (#229349)

Currently, the callee-saved spills reorder to maximize ZPR pairs, but do
not reorder to maximize ZPR quads. Modify the reordering algorithm to
also maximize ZPR quads and pairs.

Note: Quad spills are not enabled yet but will implemented in a
subsequent PR.

The main idea behind the reordering is to align the starting offset of
the ZPR quads when we begin the spill due to the conditions required to
form a ZPR quad store/load. To do this, we calculate the starting offset
and use pairs/single spills to align the offset.
DeltaFile
+352-352llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
+352-352llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
+245-108llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
+87-62llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+52-52llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
+32-32llvm/test/CodeGen/AArch64/sme2-intrinsics-int-dots.ll
+1,120-9585 files not shown
+1,162-1,00011 files

LLVM/project df42bd6 — llvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/CodeGen/RISCV bitinsert-bitextract-fp.ll bitinsert-bitextract.ll

RISCV: Make GPRAll non-allocatable

GPRAll contains the reserved DUMMY_REG_PAIR_WITH_X0, which cannot be
spilled, so the class should not be allocatable. Nothing creates virtual
registers in it yet, but inline asm constraint lookup returns GPRAll for
cases like {x8} with i32 on riscv64.

This increases spilling in some tests due to RegisterClassInfo defects.
RegisterClassInfo::computePSetLimit subtracts the reserved registers of
the largest allocatable class in the GPR pressure set, which is now
GPRF16 instead of GPRAll. The reserved dummy unit is no longer
subtracted, raising the limit by one.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+5,611-5,555llvm/test/CodeGen/RISCV/clmul.ll
+1,314-1,312llvm/test/CodeGen/RISCV/clmulr.ll
+1,274-1,292llvm/test/CodeGen/RISCV/clmulh.ll
+229-223llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
+113-110llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
+3-1llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+8,544-8,4936 files

OPNSense/core 141585a — src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterBaseController.php

Make one comment clearer
DeltaFile
+1-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterBaseController.php
+1-11 files

LLVM/project 55aa5fa — llvm/lib/Target/AMDGPU SIInstrInfo.cpp

[AMDGPU] Removed unneeded entries from isRenamedInGFX9. NFC. (#231396)

The _sdwa forms are handled separately in pseudoToMCOpcode. The _e64_dpp
and _fake16_e64 forms only exist in GFX11+.
DeltaFile
+1-6llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+1-61 files

NetBSD/pkgsrc bzLXBFz — parallel/pocl/patches patch-lib_CL_CMakeLists.txt

   pocl: add missing patch
VersionDeltaFile
1.1+14-0parallel/pocl/patches/patch-lib_CL_CMakeLists.txt
+14-01 files

OPNSense/core 2ae9689 — src/opnsense/mvc/app/controllers/OPNsense/Core/Api SnapshotsController.php

snapshots: notes: small fix
DeltaFile
+1-1src/opnsense/mvc/app/controllers/OPNsense/Core/Api/SnapshotsController.php
+1-11 files

FreeBSD/src b5e6d60 — tools/test/stress2/misc rename15.sh

stress2: Add a new FS type: UFS2 to the test.

Workaround for kern.maxfiles limit exceeded.
Workaround for SU disk full issue.
Added some debug info, if umount(8) returns EBUSY.
DeltaFile
+26-12tools/test/stress2/misc/rename15.sh
+26-121 files

OPNSense/core 6f30bde — src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterBaseController.php

Remove this additional validation, lets trust the initial validation
DeltaFile
+0-4src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterBaseController.php
+0-41 files

NetBSD/pkgsrc hTptzFn — doc CHANGES-2026

   Updated parallel/opencl-headers, parallel/opencl-clang
VersionDeltaFile
1.6937+3-1doc/CHANGES-2026
+3-11 files

NetBSD/pkgsrc sdu3rUN — parallel/opencl-clang buildlink3.mk PLIST

   opencl-clang: updated to 22.1.4

   22.1.4
   This release is linked against LLVM v22.1.8 and SPIR-V LLVM translator v22.1.5.
VersionDeltaFile
1.29+4-5parallel/opencl-clang/Makefile
1.15+4-4parallel/opencl-clang/distinfo
1.15+2-2parallel/opencl-clang/buildlink3.mk
1.12+2-2parallel/opencl-clang/PLIST
+12-134 files

LLVM/project 9249fc9 — llvm/lib/Target/RISCV RISCVInstrInfo.cpp, llvm/test/CodeGen/RISCV/GlobalISel fpr-gpr-copy-rv64.ll fpr-gpr-copy-rv32.ll

[RISCV] Support copies between GPR and FPR16 (#231382)

Handle GPR-to-FPR16 and FPR16-to-GPR copies in copyPhysReg using
`FMV.H.X` and `FMV.X.H`.

This fixes a GlobalISel crash when half-precision values cross register
banks, such as arguments and return values passed in GPRs under the
soft-float ABI.

Reproducer: https://godbolt.org/z/n8EaYjvhG
Follow up of #231097
DeltaFile
+24-1llvm/test/CodeGen/RISCV/GlobalISel/fpr-gpr-copy-rv64.ll
+24-1llvm/test/CodeGen/RISCV/GlobalISel/fpr-gpr-copy-rv32.ll
+16-0llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+64-23 files

OPNSense/core 4b880ed — src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterBaseController.php

Try at refactoring the logic, we want to preserve the sequence in which the rules have been selected, otherwise sortBy does not guarantee a user expected order
DeltaFile
+77-70src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterBaseController.php
+77-701 files

NetBSD/pkgsrc MDvD55S — parallel/opencl-headers Makefile distinfo

   opencl-headers: updated to 2026.05.29

   2026.05.29
   Synchronize with OpenCL v3.1.1 specification release.
VersionDeltaFile
1.8+4-4parallel/opencl-headers/distinfo
1.7+2-4parallel/opencl-headers/Makefile
+6-82 files

LLVM/project d723ad9 — libc/src/stdlib bsearch.cpp

[libc][stdlib] Optimize bsearch() by reordering comparison branches (#230823)

During a binary search, compare_result == 0 is triggered at most once,
or 0 times when the key is not found, whereas compare_result < 0 and
compare_result > 0 are triggered multiple times across loop iterations.
Check < 0 and > 0 before the equality case so the loop does not test for
== 0 first on every iteration.

With clang -O2, the loop body changes as follows:

x86-64:
```diff
        movq    %rbp, %rsi
        callq   *(%rsp)
        testl   %eax, %eax
-       je      .LBB0_7
        js      .LBB0_5
+       je      .LBB0_7
        notq    %r13

    [18 lines not shown]
DeltaFile
+3-4libc/src/stdlib/bsearch.cpp
+3-41 files

LLVM/project d66309d — llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Analysis/ScalarEvolution ptrtoaddr-at-scope.ll

[SCEV] Add missing scPtrToAddr to getCastExpr. (#211899)

https://github.com/llvm/llvm-project/pull/180244 (8e76c3f0d29) missed
adding scPtrToAddr to getCastExpr, causing `Not a SCEV cast expression!`
on some of the AMDGPU bots, including
 https://lab.llvm.org/buildbot/#/builders/10/builds/32555.

Add missing case to handle PtrToAddr.

(cherry picked from commit 2ac96dbb3a08baf4d72584e04e6ad299c176fcce)
DeltaFile
+50-0llvm/test/Analysis/ScalarEvolution/ptrtoaddr-at-scope.ll
+5-0llvm/lib/Analysis/ScalarEvolution.cpp
+55-02 files

LLVM/project 94ae4f8 — llvm/lib/Passes PassBuilderPipelines.cpp, llvm/test/Other new-pm-lto-defaults.ll

[Passes] Run MergeICmps/ExpandMemCmps in LTO post-link pipeline (#230562)

Otherwise memcmp will never get expanded if running the combination of
ThinLTO pre-link and LTO post-link, which is what Rust does, and what
unified LTO does.

The pipeline position is chosen to roughly match what the module
optimization pipeline does. There is no compile-time impact.

For https://github.com/rust-lang/rust/issues/163677.

(cherry picked from commit 17379353858fbac934f573a22e6aa5acce6884d7)
DeltaFile
+56-0llvm/test/Transforms/PhaseOrdering/X86/expand-memcmp-middle-end.ll
+7-1llvm/lib/Passes/PassBuilderPipelines.cpp
+2-0llvm/test/Other/new-pm-lto-defaults.ll
+65-13 files

LLVM/project 7909311 — llvm/lib/Target/Mips Mips.td MipsSubtarget.cpp

[Mips] Remove experimental warning bits in a few places (#223230)

- Remove the warning message "warning: MIPS-I support is experimental" from
  MipsSubtarget.cpp. The warning can interfere with build systems that do not
  expect diagnostic output on stderr.
- Remove experimental / highly experimental from a few MIPS processors.
  MIPS I is on track and the rest I wouldn't consider experimental anymore.

(cherry picked from commit 73641283fc038d819b5a0d3e5fd1315d501ff9e1)
DeltaFile
+0-7llvm/lib/Target/Mips/MipsSubtarget.cpp
+3-3llvm/lib/Target/Mips/Mips.td
+3-102 files

LLVM/project 1be9d5e — llvm/lib/ObjCopy/COFF COFFObjcopy.cpp, llvm/test/tools/llvm-objcopy/COFF strip-unneeded-comdat.test

[llvm-objcopy][COFF] Keep COMDAT section definition symbols when stripping (#228783)

--strip-unneeded and --discard-all removed the section definition symbol of
a COMDAT section if no relocation referenced it directly, which is the
common case since relocations target the COMDAT leader. The aux record of
that symbol carries the COMDAT selection; without it lld discards the
section as a leaderless COMDAT and silently drops relocations against it.

This broke e.g. .refptr.* sections in MinGW objects, producing executables
that load garbage instead of the referenced pointer.

Assisted-by: Claude Opus 5.5
(cherry picked from commit cf40a83cb398897d21bb54c5a7a2eecb8d0633b3)
DeltaFile
+94-0llvm/test/tools/llvm-objcopy/COFF/strip-unneeded-comdat.test
+16-0llvm/lib/ObjCopy/COFF/COFFObjcopy.cpp
+110-02 files

LLVM/project 8451016 — llvm/include/llvm/Object GOFFObjectFile.h, llvm/lib/Object GOFFObjectFile.cpp ArchiveWriter.cpp

release/23.x: [llvm-ar][GOFF] Implement symbol attributes for GOFF archives (#214528)

Backport 847fb5cfde68fdea490171bc24087ebb0cd90738

This backport has been modified slightly by updating the LIT tests to remove
the dependency on llvm-nm. llvm-nm added GOFF support after the LLVM 23.x release
cut, and its new functionality is not available in LLVM 23.
DeltaFile
+79-0llvm/test/tools/llvm-ar/zos-symattrs.test
+38-14llvm/lib/Object/ArchiveWriter.cpp
+38-0llvm/lib/Object/GOFFObjectFile.cpp
+9-1llvm/test/tools/llvm-ar/zos-write.test
+6-0llvm/include/llvm/Object/GOFFObjectFile.h
+170-155 files

LLVM/project 1b84390 — llvm/docs ReleaseNotes.md

Change release notes wording
DeltaFile
+4-3llvm/docs/ReleaseNotes.md
+4-31 files

LLVM/project ca0b6a8 — llvm CMakeLists.txt, llvm/cmake WiXPerMachinePatch.xml

workflows/release-binaries: Improve Windows installer (#220414)

The Windows WiX installer was missing two things for its setup:

1. The "product ID" which is used to uninstall any previous installed
LLVM versions. This avoids having versions living side-by-side with each
new release. I've reused the same GUID as the current 23.1.0 Win64
installer, to continue that "line" of product. The AArch64 installation
and any prior LLVM version (NSIS) before 23.1.0 will need to be
uninstalled manually, if we want to avoid side-by-side installatin.

2. A "per machine" scope which avoids messy installations which are
installed globally, but cannot be uninstalled globally, and available
only for the current user. After this PR, the installation is available
/ uninstallable to all users on the machine.

Since LLVM currently requires cmake 3.20 for building, and hasn't been
bumped yet to 3.31, also provide a workaround for the WiX scope setup.


    [4 lines not shown]
DeltaFile
+48-0llvm/utils/release/build_llvm_release.bat
+15-0llvm/CMakeLists.txt
+6-0llvm/docs/ReleaseNotes.md
+5-0llvm/cmake/WiXPerMachinePatch.xml
+74-04 files

LLVM/project 5177329 — llvm/test/tools/extract_symbols registry-itanium.test registry-microsoft.test, llvm/test/tools/extract_symbols/Inputs user-msvc.s lib-msvc.s

[Windows] Export Registry<T> members and accessors for plugins again (#221296)

Since #185141 reworked `llvm::Registry`, the registered-node list lives
behind the explicitly specialized
`llvm::detail::getRegistryLinkListInstance<R>()` accessor defined by
`LLVM_DEFINE_REGISTRY`, and the `Head`/`Tail` static data members that
used to be referenced across objects are gone (#163391 had special-cased
those).

`extract_symbols.py` handles neither. The accessor is a `??$` function
template specialization, which the script drops on the assumption that
it can be instantiated in the importing translation unit; here it
cannot, it is defined once by `LLVM_DEFINE_REGISTRY`. And `Registry<T>`
members are only exported when some object references the `Registry`
template, which nothing does anymore because every use goes through the
accessor. On a static clang.exe built with
`LLVM_EXPORT_SYMBOLS_FOR_PLUGINS`, the export table went from 11
`Registry<clang::PluginASTAction>` symbols on 22.1.8 to zero on 23.1.0,
and linking a plugin fails:

    [31 lines not shown]
DeltaFile
+21-0llvm/test/tools/extract_symbols/lit.local.cfg
+12-8llvm/utils/extract_symbols.py
+19-0llvm/test/tools/extract_symbols/registry-microsoft.test
+13-0llvm/test/tools/extract_symbols/registry-itanium.test
+12-0llvm/test/tools/extract_symbols/Inputs/lib-msvc.s
+10-0llvm/test/tools/extract_symbols/Inputs/user-msvc.s
+87-82 files not shown
+105-88 files

LLVM/project 1ce3f22 — llvm/lib/Transforms/Instrumentation InstrumentationOptions.td

[Instrumentation] Define default value as float (#231383)

In #230746, the Instrumentation command line options were moved to
TableGen. The `icp-vtable-percentage-threshold` default value is now
defined as `0.995`, which is a double value, while the type for this
option is a float, triggering a C4305 warning with MSVC.

This fixes the issue by changing the literal to `0.995f`.
DeltaFile
+1-1llvm/lib/Transforms/Instrumentation/InstrumentationOptions.td
+1-11 files

FreeBSD/ports 2ac7d48 — net Makefile, net/mbtget distinfo pkg-descr

net/mbtget: [NEW PORT] Simple Modbus/TCP client CLI tool

PR:             299338
DeltaFile
+28-0net/mbtget/Makefile
+7-0net/mbtget/pkg-descr
+3-0net/mbtget/distinfo
+1-0net/Makefile
+39-04 files

LLVM/project 860259c — mlir/include/mlir/Dialect/Bufferization/Transforms Passes.td, mlir/lib/Dialect/Bufferization/Transforms BufferOptimizations.cpp

[mlir][bufferization] handle exit aliases in buffer-loop-hoisting (#226951)

As discussed in #223944, `buffer-loop-hoisting` rejects an allocation in
`scf.while` even though the buffer is never passed back to the region
containing the allocation. The allocation and the forwarded `after`
argument belong to different regions, so their common dominator is the
block containing the loop, which in turn makes `isLegalPlacement` return
false and reject the hoist.

This PR adds a fallback for `memref.alloc` directly in the `before`
region of `scf.while` when the existing common-dominator check rejects
the hoist. It keeps the full alias set and rejects hoisting if an alias
is carried back to `before`. It also checks uses of all aliases,
including loop results, for capture, deallocation and explicit
observations of allocation identity. The fallback requires the loop's
parent to stop further loop hoisting: it must either be a non-loop
operation or have the `HasParallelRegion` trait. This restriction avoids
exposing the allocation to further hoisting through enclosing loops with
incorrectly classified execution semantics, as in #226090.

    [9 lines not shown]
DeltaFile
+607-0mlir/test/Dialect/Bufferization/Transforms/buffer-loop-hoisting.mlir
+94-0mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
+77-10mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
+8-0mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
+786-104 files

NetBSD/pkgsrc UXBUJxt — inputmethod/libhangul distinfo buildlink3.mk, inputmethod/libhangul/patches patch-libhangul.pc.in

   libhangul: link against libintl; update pkg-config file to reflect that; bump revision
VersionDeltaFile
1.1+13-0inputmethod/libhangul/patches/patch-libhangul.pc.in
1.14+4-1inputmethod/libhangul/Makefile
1.6+3-1inputmethod/libhangul/buildlink3.mk
1.12+2-1inputmethod/libhangul/distinfo
+22-34 files

NetBSD/pkgsrc u3pjN6p — devel/binutils PLIST

   binutils: Add missing libdep.so entry.

   I delete this on some of my builds to avoid a dependency on libgcc which causes
   circular dependencies, and ended up copying the wrong file over from testing.
VersionDeltaFile
1.8+2-1devel/binutils/PLIST
+2-11 files

LLVM/project 8f93901 — llvm/cmake/modules HandleLLVMOptions.cmake

[libcxx][CMake] Rework LLVM_ENABLE_ASSERTIONS interaction w. libcxx hardening (#229359)

[Libc++ hardening modes](libcxx/docs/Hardening.md) can be set in 2 ways:
- The default hardening mode is set when compiling libc++, this is
applied to the pre-compiled object files of libc++, and also sets the
default value for the hardening macros used in the headers of libc++.
- Users of libc++ can override the default in the headers for their
builds by setting a macro.

When LLVM_ENABLE_ASSERTIONS is set, and we are *using* libc++ to build
LLVM, we want to harden our binaries and tests (of other LLVM
components, NOT libc++ itself).

Additionally we also set the default hardening mode of libc++ itself
when performing an assertions build. This is in theory orthogonal to the
hardening of binaries and tests. It enables runtime hardening checks not
in the compiler itself, but in the code that links against libc++ (e.g.
applications compiled using the toolchain we just built).


    [8 lines not shown]
DeltaFile
+5-5llvm/cmake/modules/HandleLLVMOptions.cmake
+5-51 files

FreeNAS/freenas bdeece3 — src/middlewared/middlewared/alembic/versions/28.0 2026-10-12_13-24_vm_video_model.py, src/middlewared/middlewared/api/v28_0_0 vm.py

Allow selecting the VM video model

## Problem
VMs always got a QXL video adapter. QXL can deadlock a Linux guest during shutdown when the host stops releasing its memory, and it doesn't exist on aarch64, so aarch64 VMs with a display device couldn't start.

## Solution
Added `video_model` (`QXL`, `VGA`, `VIRTIO`) to VMs. New VMs default to `VGA`, or `VIRTIO` for aarch64 guests, which only accept `VIRTIO`. The migration keeps existing x86 VMs with a display on `QXL`, moves headless VMs from libvirt's implicit cirrus adapter to `VGA`, and sets aarch64 VMs to `VIRTIO`. This depends on the matching truenas_pylibvirt change and has to be merged together with it.
DeltaFile
+37-0src/middlewared/middlewared/alembic/versions/28.0/2026-10-12_13-24_vm_video_model.py
+14-0src/middlewared/middlewared/api/v28_0_0/vm.py
+9-0src/middlewared/middlewared/plugins/vm/crud.py
+6-0src/middlewared/middlewared/pytest/unit/plugins/vm/test_arch_validation.py
+2-1src/middlewared/middlewared/plugins/vm/lifecycle.py
+68-15 files

LLVM/project f038a4e — clang-tools-extra/clangd/test CMakeLists.txt

[clangd][test] Add `clang` to `CLANGD_TEST_DEPS`. (#230061)

86a48da46ff5 (#193426) added `prebuilt_module_file_reuse.test`, which
invokes the `clang` binary directly to precompile a module file, but did
not add the binary to the dependencies of the corresponding CMake
target. This PR fixes that.

Signed-off-by: Ingo Müller <ingomueller at google.com>
DeltaFile
+1-0clang-tools-extra/clangd/test/CMakeLists.txt
+1-01 files