Reapply "[libc++] Optimize fstream::read" (#206453)
This was reverted due to causing crashes if an ifstream wasn't opened.
This patch addresses this issue by simply checking whether the `__file_`
handle is null, and if it is simply fall back to the generic
implementation.
Fixes #168628
Fixes #205845
This reverts commit 347512ff38748ac6ebfacbfda172edb5cf1edbe2.
[LV] Regenerate RISC-V interleaved-cost.ll with UTC. NFC (#207138)
Also don't have an individual RUN for each of the
+optimized-nfX-segment-load-store, just have an optimized and
unoptimized RUN for scalable and fixed VFs each.
[RuntimeLibcalls] Use a multiclass for all libm impls (NFC) (#148349)
`LibmLongDoubleLibcalls` currently handles generating definitions for
the three long double variants, but `F32` and `F64` always get a written
definition. Simplify this by changing `LibmLongDoubleLibcalls` to
`LibmLibcallImpls` that also expands `F32` and `F64`.
As part of this, `LibmLibcallImpls` can take a function name with an `X`
placeholder, to be replaced with the float type suffix. This allows the
multiclass to also be used for libcalls with the suffix in the middle
rather than strictly at the end.
[LangRef] Clarify cttz.elts returns poison for undersized result types (#206970)
Update the LangRef for `llvm.experimental.cttz.elts` and
`llvm.vp.cttz.elts` to state that an undersized return type produces
poison rather than UB, matching the intrinsic's speculatable behavior.
See also
https://github.com/llvm/llvm-project/pull/206899#discussion_r3504289653.
mvc: BaseField: in getNodes, emit descriptions as well when they're not the same as the value to match getNodeContent()'s behavior.
ref: https://github.com/opnsense/core/pull/10476
py-gevent: updated to 26.5.0
26.5.0 (2026-05-20)
Features
- Build and publish Windows 11 ARM wheels.
- Add preliminary support for Python 3.15b1 and distribute binary wheels
for it.
Deprecations and Removals
Support for Python 3.10 will be ending soon. Support for PyPy will be
ending soon.
[CodeGen][NFC] Move getRawAllocOrder to TargetRegInfo (#207124)
For most TargetRegisterClasses, the allocation order function is null
and we try to avoid pointer members in constants, so move the order
function to the TargetRegisterInfo to avoid the pointer member and
shrink the data structure.
graphics/gdal: disable LTO (IPO) on armv7
The linker runs out of address space when LTO is enabled for this port.
Approved by: portmgr (build fix blanket)
[AArch64][GlobalISel] Add legalisation for G_INSERT_SUBVECTOR (#205349)
Previously, G_INSERT_SUBVECTOR has no legalisation logic.
To fix, legalise G_INSERT_SUBVECTOR into one of these collections of
instructions:
1. If Vector V is double the size of subvector W:
insert_subvector(V, W, idx) -> concat(W, extract(correct half of V)).
2. V is NOT double the size of W:
insert_subvector(V, W, idx) -> shuffle(V, W, Mask).
Note that the generated code is not as optimal as that produced by SDAG.
libc: Fix assert() sanitiser for C++ contextual bool conversion
Replace the `(bool(*)(bool))` probe in `__assert_sanitize()` with an unevaluated
conditional expression, so types with `explicit operator bool()` that require a
contextually converted constant expression of type `bool` are handled correctly.
Ergo, arity check is now performed separately via `__assert_sanitize_arity()`, a
unary template whose parameter pack must bind to exactly on argument after
`__VA_ARGS__` is substituted into the call.
Also align NDEBUG with C23 requirements.
Reported by: dim, aokblast
Signed-off-by: Faraz Vahedi <kfv at kfv.io>
Reviewed by: aokblast, fuz
MFC after: 1 week
Fixes: 867b51452ea78ece0b312a387e63fdbc2a11056a
Pull Request: https://github.com/freebsd/freebsd-src/pull/2265
(cherry picked from commit 48d20fd1cf90179e778c6155900cbed2be140273)
[clang][analyzer] Add allocation failure modeling to DynamicMemoryModeling (#205371)
New option is added to the checker to create branches with null return
value from memory allocations (off by default).
[Windows][Arm64EC] Enable thunk generation for bfloat16 (#206710)
This patch enables thunk generation for functions that take and return
bfloat16 types. These types live in the same registers as fp16 types in
both Arm64 and x86 so we just need the same behaviour as for fp16.
Assisted-by: codex (gpt-5.5)
Co-authored-by: nick.dingle at arm.com
Implement a simple rib entry pending paths queue.
Elements are added to the queue when rib entries are enqueued in
rde_enqueue_updates() for the EVAL_DEFAULT and EVAL_ALL cases.
The queue is then flushed once processed by peer_process_updates().
In rib_remove() assert that the queue is empty before free. This is
implied by the re_is_queued() check but that check only looks at the
pq_mode.
A specific path can only be enqueued once, only the last version matters.
In other words rapid withdraw and update actions will be aggregated into
a single action.
Nothing is currently using this data. This will follow next.
OK tb@
Firewall: fix some small issues in menu registration, taking under account the situations where legacy removed the items leading to config.xml like:
<filter>
<rule/>
</filter>
And mvc Filter->rules always being there (the container vs the entries)
(cherry picked from commit bf08cc48326216eca7703a93b06f10825e64ae43)
Revert "[libc++] Move threading and random device config into <__configuration/platform.h>" (#207134)
There were CI failures that I missed when merging.
Reverts llvm/llvm-project#206262
[clang] Handle constructor closures with consteval default args (#203554)
Fixes https://github.com/llvm/llvm-project/issues/201320
Just grabbing the default argument with `getDefaultArg()` during codegen
doesn't work if the expression requires evaluating a consteval
expression (see bug). Instead, we must properly BuildCXXDefaultArgExpr
it during Sema, store it in the AST (including
serialization/deserialization) and then use that during codegen.
