LLVM/project df8c87dllvm/lib/Transforms/IPO Instrumentor.cpp

Update llvm/lib/Transforms/IPO/Instrumentor.cpp

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
DeltaFile
+1-1llvm/lib/Transforms/IPO/Instrumentor.cpp
+1-11 files

LLVM/project 9aa55b2compiler-rt/lib/sanitizer_common sanitizer_symbolizer_report.cpp, compiler-rt/lib/tsan/rtl tsan_report.cpp

[sanitizer] Capitalize HINT in reports (#195734)

Consistency with other sanitizer reports which use uppercase "HINT:".
DeltaFile
+7-6compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
+6-6compiler-rt/test/asan/TestCases/Posix/high-address-dereference.c
+3-2compiler-rt/lib/tsan/rtl/tsan_report.cpp
+1-1compiler-rt/test/asan/TestCases/Windows/report_after_syminitialize.cpp
+17-154 files

LLVM/project affe132libc/src/__support/OSUtil/linux/syscall_wrappers ftruncate.h link.h, libc/src/semaphore posix_semaphore.h

Add named posix semaphore lifetime operations on linux (#192278)

This implements the second part of #190847 

Specifically, this pr adds `sem_open`, `sem_close`, and `sem_unlink` for
posix semaphore on linux.
https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_open.html

https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_close.html

https://pubs.opengroup.org/onlinepubs/9799919799/functions/sem_unlink.html

Since it targets on linux implementation, two extra things are added:
1. add system call wrappers for `mmap`, `munmap`, `link`, `unlink`, and
`ftruncate`. Those are necessary for the implementation of semaphore on
linux. Wrappers is added based on the refactor proposal:
https://libc.llvm.org/dev/syscall_wrapper_refactor.html.
2. refactor the previous semaphore implementation, put it under `linux/`
since its based on linux.
DeltaFile
+195-0libc/src/semaphore/linux/named_semaphore.cpp
+114-0libc/test/src/semaphore/linux/semaphore_test.cpp
+73-0libc/src/semaphore/linux/semaphore.h
+0-59libc/src/semaphore/posix_semaphore.h
+41-0libc/src/__support/OSUtil/linux/syscall_wrappers/ftruncate.h
+39-0libc/src/__support/OSUtil/linux/syscall_wrappers/link.h
+462-598 files not shown
+616-10914 files

LLVM/project 7237429llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 aarch64_be-shuffle-vector.ll fix-shuffle-vector-be-rev.ll

[AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (#193076)

A function like

```llvm
define <4 x i16> @xtn_shuffle_even_v8i16(<8 x i16> %a) {
entry:
  %r = shufflevector <8 x i16> %a, <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
  ret <4 x i16> %r
}
```

will use the `xtn` instruction, which for each 32-bit vector element
keeps only the lower 16 bits, so effectively this is a truncation.
However, if the vector actually has 16-bit elements, then the conversion
from a shuffle to a truncation is only valid on LE, not on BE. On BE,
`uzp1` should be used instead. So this PR moves some logic to right
after a check for LE, so that BE does not miscompile.


    [5 lines not shown]
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+95-0llvm/test/CodeGen/AArch64/aarch64_be-shuffle-vector.ll
+27-27llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+0-39llvm/test/CodeGen/AArch64/fix-shuffle-vector-be-rev.ll
+122-663 files

LLVM/project 5e29d8allvm/lib/Target/Mips MipsDelaySlotFiller.cpp, llvm/test/CodeGen/Mips unalignedload.ll mips1-load-in-delay-slot.ll

Prevent undefined behavior caused by combination of branch and load delay slots on MIPS1 (#185427)

Under certain conditions the LLVM `MipsDelaySlotFiller` fills a branch
delay slot with an instruction requiring a load delay slot. However the
`MipsDelaySlotFiller` does not check the filled instruction for hazard
which leads to code like this:
```asm
        beqz    $1, $BB0_5
        lbu     $2, %lo(_RNvCs5jWYnRsDZoD_3app13CONTROLLERS_A)($2)
# --- Some other instructions
$BB0_5:
        andi    $1, $2, 1
```
`lbu` got moved into the branch delay slot but has a load delay slot -
so when jumping to `$BB0_5` the value for `$2` will not be ready, which
leads to undefined behavior.

This PR suggests to declare instructions with a load delay slot to be
hazardous for the branch delay slot, only for `MIPS1`. This will prevent

    [23 lines not shown]
DeltaFile
+221-84llvm/test/CodeGen/Mips/llvm-ir/load.ll
+225-35llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
+179-32llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+62-6llvm/test/CodeGen/Mips/unalignedload.ll
+61-0llvm/test/CodeGen/Mips/mips1-load-in-delay-slot.ll
+50-0llvm/test/CodeGen/Mips/gprestore.ll
+798-1571 files not shown
+800-1587 files

LLVM/project 125619allvm/lib/Analysis ConstantFolding.cpp, llvm/lib/IR Constants.cpp ConstantFold.cpp

[RFC][NFCI][Constants] Add `Constant::isZeroValue`

The old `isZeroValue` was removed because it was functionally identical to
`Constant::isNullValue`. Currently, a "null value" in LLVM means a zero value.
We are moving toward changing the semantics of `ConstantPointerNull` to
represent a semantic null pointer instead of a zero-valued pointer. As a result,
the meaning of "null value" will also change in the future.

This PR series is the first step toward renaming the two widely used "null
value" interfaces to "zero value". As the first PR in the series, this change
adds a "new" `isZeroValue` alongside `isNullValue`, and makes `isNullValue` call
`isZeroValue` directly. Then, all uses of `isNullValue` in LLVM are replaced
with `isZeroValue`. Uses in other projects will be updated in separate PRs.

The plan is to eventually remove `isNullValue` after all uses have been
migrated.
DeltaFile
+15-15llvm/lib/Analysis/ConstantFolding.cpp
+14-14llvm/lib/IR/Constants.cpp
+11-11llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+11-9llvm/lib/IR/ConstantFold.cpp
+9-9llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+9-9llvm/unittests/Analysis/ValueLatticeTest.cpp
+69-67100 files not shown
+276-265106 files

LLVM/project 622e3f0compiler-rt/test/asan/TestCases/Windows report_after_syminitialize.cpp

Winfix

Created using spr 1.3.7
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+1-1compiler-rt/test/asan/TestCases/Windows/report_after_syminitialize.cpp
+1-11 files

LLVM/project 01aefballvm/lib/Transforms/Vectorize VPlanUtils.cpp LoopVectorize.cpp

[VPlan] Get GEP wrap flags from VPInstructions (NFCI). (#195730)

Add helper to retrieve GEP no-wrap flags from VPInstructions, looking
through zero-index GEPs and pointer casts, like
Value::stripPointerCasts. Removes an access to underlying IR.
DeltaFile
+19-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+6-10llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+4-0llvm/lib/Transforms/Vectorize/VPlanUtils.h
+29-103 files

LLVM/project 04e5b1bclang/test/AST ast-dump-linkage.cpp ast-dump-linkage-internal.cpp, compiler-rt/test/asan/TestCases contiguous_container_crash.cpp

rebase

Created using spr 1.3.7
DeltaFile
+485-0clang/test/AST/ast-dump-linkage.cpp
+477-0clang/test/AST/ast-dump-linkage-internal.cpp
+198-0llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-live-outs.ll
+63-63clang/test/AST/ast-dump-decl.cpp
+47-48lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
+0-79compiler-rt/test/asan/TestCases/contiguous_container_crash.cpp
+1,270-19082 files not shown
+1,683-55188 files

LLVM/project 59ca7caclang/test/AST ast-dump-linkage.cpp ast-dump-linkage-internal.cpp, compiler-rt/test/asan/TestCases contiguous_container_crash.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+485-0clang/test/AST/ast-dump-linkage.cpp
+477-0clang/test/AST/ast-dump-linkage-internal.cpp
+198-0llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-live-outs.ll
+63-63clang/test/AST/ast-dump-decl.cpp
+47-48lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
+0-79compiler-rt/test/asan/TestCases/contiguous_container_crash.cpp
+1,270-19082 files not shown
+1,683-55188 files

LLVM/project 9792c77compiler-rt/test/asan/TestCases contiguous_container_crash.cpp

[asan] Add tests for __sanitizer_annotate_double_ended_contiguous_container (#195673)
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+77-4compiler-rt/test/asan/TestCases/contiguous_container_crash.cpp
+77-41 files

LLVM/project 1e835b3llvm/lib/Transforms/IPO ModuleInliner.cpp

[ModuleInliner] Skip function declarations during candidate scan (#195567)

This patch skips function declarations during the candidate scan in
ModuleInlinerPass::run as declarations do not have bodies.
DeltaFile
+2-0llvm/lib/Transforms/IPO/ModuleInliner.cpp
+2-01 files

LLVM/project 5275e72llvm/lib/Analysis InlineOrder.cpp, llvm/test/Transforms/Inline module-inliner-cba-crash.ll

[InlineOrder] Fix assertion failure in CostBenefitPriority (#195564)

InlineCost::getStaticBonusApplied() triggers an assertion failure
if the CostBenefitPriority constructor calls it when
IC.isVariable() is false. This is because
getStaticBonusApplied() expects isVariable() to be true.
Unconditionally populating CostBenefit also incorrectly prioritizes
a NeverInline candidate with a cost-benefit pair over other
valid variable-cost sites.
  
This patch fixes the crash and the sorting issue by calling
getStaticBonusApplied() and populating CostBenefit only when
IC.isVariable() is true. For AlwaysInline and NeverInline costs,
CostBenefit is explicitly set to std::nullopt.
DeltaFile
+23-0llvm/test/Transforms/Inline/module-inliner-cba-crash.ll
+7-4llvm/lib/Analysis/InlineOrder.cpp
+30-42 files

LLVM/project 7e44c07llvm/lib/Transforms/IPO ModuleInliner.cpp, llvm/test/Transforms/Inline module-inliner-cycle.ll

[IPO] Fix infinite recursive inlining in ModuleInliner (#195471)

The ModuleInliner currently lacks inline history tracking.  Without
it, the inliner can get stuck in an infinite loop when mutually
recursive functions are involved.

This patch enables inline history tracking in the ModuleInliner to
address this issue.

The minsize attribute in the test case lowers the threshold for the
mutually recursive functions, ensuring the bug reproduces in pass
isolation.
DeltaFile
+34-0llvm/test/Transforms/Inline/module-inliner-cycle.ll
+3-1llvm/lib/Transforms/IPO/ModuleInliner.cpp
+37-12 files

FreeBSD/ports f8aedc0www/phpmyfaq pkg-plist distinfo

www/phpmyfaq: Update to 4.1.2
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+11-45www/phpmyfaq/pkg-plist
+3-3www/phpmyfaq/distinfo
+1-1www/phpmyfaq/Makefile
+15-493 files

LLVM/project d234050clang/docs LanguageExtensions.rst, clang/test/AST ast-dump-linkage.cpp ast-dump-linkage-internal.cpp

rebase

Created using spr 1.3.7
DeltaFile
+485-0clang/test/AST/ast-dump-linkage.cpp
+477-0clang/test/AST/ast-dump-linkage-internal.cpp
+198-0llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-live-outs.ll
+63-63clang/test/AST/ast-dump-decl.cpp
+47-48lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
+33-24clang/docs/LanguageExtensions.rst
+1,303-13580 files not shown
+1,669-45486 files

LLVM/project c886414clang/docs LanguageExtensions.rst, clang/test/AST ast-dump-linkage.cpp ast-dump-linkage-internal.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+485-0clang/test/AST/ast-dump-linkage.cpp
+477-0clang/test/AST/ast-dump-linkage-internal.cpp
+198-0llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-live-outs.ll
+63-63clang/test/AST/ast-dump-decl.cpp
+47-48lldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
+33-24clang/docs/LanguageExtensions.rst
+1,303-13579 files not shown
+1,665-45085 files

LLVM/project ae5a3eeclang/include/clang/Basic DiagnosticFrontendKinds.td, clang/include/clang/Frontend FrontendOptions.h

[SSAF] Add CLI option --ssaf-apply-source-pass for SourcePassAnalysis

The '--ssaf-apply-source-pass' option takes a list of
SourcePassAnalysis names.  The option expects the user to provide a WPA
result using '--ssaf-load-wpa-result'.

Provided SourcePassAnalysis passes will be run by clang on each AST
with the WPA result.
DeltaFile
+88-0clang/lib/ScalableStaticAnalysisFramework/Frontend/SourcePassAnalysisFrontendAction.cpp
+33-0clang/include/clang/ScalableStaticAnalysisFramework/Frontend/SourcePassAnalysisFrontendAction.h
+14-0clang/include/clang/Options/Options.td
+10-0clang/include/clang/Basic/DiagnosticFrontendKinds.td
+6-0clang/include/clang/Frontend/FrontendOptions.h
+6-0clang/test/Analysis/Scalable/command-line-interface.cpp
+157-03 files not shown
+167-19 files

LLVM/project d867fdbmlir/include/mlir/Interfaces VectorInterfaces.td

Missed one suggestion

Co-authored-by: Erick Ochoa Lopez <erick.ochoalopez at amd.com>
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+1-1mlir/include/mlir/Interfaces/VectorInterfaces.td
+1-11 files

LLVM/project 4394b26mlir/include/mlir/Interfaces VectorInterfaces.td

Fix my typos

Co-authored-by: Erick Ochoa Lopez <eochoalo at amd.com>
DeltaFile
+3-3mlir/include/mlir/Interfaces/VectorInterfaces.td
+3-31 files

LLVM/project 0770770mlir/lib/Dialect/Vector/Transforms VectorDropLeadUnitDim.cpp, mlir/test/Dialect/Vector vector-dropleadunitdim-transforms.mlir

[mlir][Vector] Add load, store, etc. to dropleadunitdim (#195686)

Discussions on improvements to fold-memref-alias-ops changes revealed
that the patterns meant to drop leading unit dimensions from vector
operations weren't handling load, store, and other "terminal" vector
dialect operations. This PR adds the patterns to fix that.

Assisted-by: Claude 4.7
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+105-1mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
+95-0mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
+200-12 files

FreeBSD/ports 08f9d0cwww/py-pelican Makefile distinfo

www/py-pelican: Update 4.11.0 => 4.12.0, take maintainership

Changelog:
https://docs.getpelican.com/en/latest/changelog.html#id1

PR:             294991
Sponsored by:   UNIS Labs
DeltaFile
+7-11www/py-pelican/Makefile
+3-3www/py-pelican/distinfo
+10-142 files

LLVM/project 2462becclang/lib/Serialization ASTReader.cpp, clang/test/Modules merge-target-features.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+67-0clang/test/Modules/merge-target-features.cpp
+26-10clang/lib/Serialization/ASTReader.cpp
+93-102 files

LLVM/project 695cc59

rebase

Created using spr 1.3.7
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+0-00 files

LLVM/project 53a1d59clang/lib/Serialization ASTReader.cpp, clang/test/Modules merge-target-features.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-67clang/test/Modules/merge-target-features.cpp
+10-26clang/lib/Serialization/ASTReader.cpp
+10-932 files

LLVM/project a6470d6llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/AArch64 transform-narrow-interleave-to-widen-memory-with-live-outs.ll

[VPlan] Bail out on recipes without live-outs in narrowIG. (#195729)

When narrowing interleave groups, recipes with users outside the loop
region are not be handled properly. We would need to properly check if
the operations can be narrowed in a way that serve the correct results
to the users.

For now, just bail out to fix miscompiles/crashes.
DeltaFile
+198-0llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-live-outs.ll
+10-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+208-02 files

LLVM/project 9e09558compiler-rt/test/asan/TestCases contiguous_container_crash.cpp

[NFC][asan] Use asan_interface.h in contiguous_container_crash.cpp (#195671)
DeltaFile
+1-5compiler-rt/test/asan/TestCases/contiguous_container_crash.cpp
+1-51 files

LLVM/project 814c054libsycl/src CMakeLists.txt

[libsycl] Add explicit LLVMSupport dependency (#195371)

libLLVMSYCL.so includes <llvm/Object/OffloadBinary.h>, which
transitively instantiates LLVMSupport templates.
With -Wl,-z,defs those symbols must be on the direct link line.
LLVMObject (which contains OffloadBinary.cpp) was already linked, but
LLVMSupport was not, causing undefined-reference errors in clean builds.
DeltaFile
+1-0libsycl/src/CMakeLists.txt
+1-01 files

LLVM/project 3723463libcxx/include string

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
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+13-3libcxx/include/string
+13-31 files

LLVM/project d5ef711clang/lib/Serialization ASTReader.cpp, clang/test/Modules merge-target-features.cpp

[clang] correctly handle +/- features when matching modules

By sorting and then comparing, we made +sse2 -sse2 equal to
-sse2 +sse2, where the former has sse2 disabled, and the latter
enabled. I verified this is actually the case by compiling the
following:

```
 #ifdef __SSE2__
  #error X
 #endif
```

Pull Request: https://github.com/llvm/llvm-project/pull/187624
DeltaFile
+67-0clang/test/Modules/merge-target-features.cpp
+26-10clang/lib/Serialization/ASTReader.cpp
+93-102 files