LLVM/project dd069b6lldb/source/Symbol Function.cpp, lldb/test/Shell/SymbolFile/DWARF/x86 prologue-entry-not-covered.s

[lldb] Skip the prologue when a function's entry has no line row (#204480)

Function::GetPrologueByteSize computed the prologue only when a line
table row contained the function's entry address (low_pc). When no row
covers low_pc it returned 0, leaving a name breakpoint sitting on the
function's entry address. For WebAssembly the entry address is the
function's locals-declaration byte rather than an instruction, so the
line table has no row there and the breakpoint is never hit.

When low_pc has no covering row, fall back to the first line row that
begins within the function's range and run the existing prologue logic
on it. For functions whose entry is already covered (all normally
compiled native code) this branch is not taken, so behavior is remains
unchanged.

This PR adds a hand (Claude) crafted regression test with a function
whose entry address is not covered by a line row.
DeltaFile
+101-0lldb/test/Shell/SymbolFile/DWARF/x86/prologue-entry-not-covered.s
+33-2lldb/source/Symbol/Function.cpp
+134-22 files

LLVM/project 0c6222dllvm/lib/Target/AArch64 AArch64SystemOperands.td AArch64InstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Address PR comments
DeltaFile
+22-50llvm/lib/Target/AArch64/AArch64SystemOperands.td
+21-23llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+14-20llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+15-8llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
+5-13llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+6-5llvm/lib/Target/AArch64/AArch64InstrFormats.td
+83-1192 files not shown
+89-1228 files

LLVM/project aedf92cllvm/lib/Target/AMDGPU AMDGPU.td GCNHazardRecognizer.cpp, llvm/test/CodeGen/AMDGPU trans-coexecution-hazard.mir

[AMDGPU] Introduce TransCoexecutionHazard target feature (#204412)

  TransCoexecutionHazard implies there is data hazard between TRANS and
the following VALU instruction when they are co-executed. Currently
gfx1250 and gfx1251 have this target feature.
DeltaFile
+44-19llvm/test/CodeGen/AMDGPU/trans-coexecution-hazard.mir
+12-3llvm/lib/Target/AMDGPU/AMDGPU.td
+1-1llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+57-233 files

LLVM/project 0a92811utils/bazel/llvm-project-overlay/clang BUILD.bazel

[Bazel] Fixes 53dabae (#204494)

This fixes 53dabae40fb3a85148f1bb72e885e32081482dbe.

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+20-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+20-01 files

LLVM/project cc60ab0llvm/test/MC/AArch64 armv9.7a-memsys.s basic-a64-instructions.s

fixup! Add testcases for all missing HINTs
DeltaFile
+13-1llvm/test/MC/AArch64/armv9.7a-memsys.s
+12-0llvm/test/MC/AArch64/basic-a64-instructions.s
+9-1llvm/test/MC/AArch64/armv9.6a-pcdphint.s
+8-0llvm/test/MC/AArch64/armv8.4a-trace.s
+6-0llvm/test/MC/AArch64/armv9.5a-pauthlr.s
+3-0llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s
+51-22 files not shown
+56-28 files

LLVM/project 484fc36llvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Some instructions should be `HINT` aliases (NFC)

Implement the following instructions as a `HINT` alias instead of a
dedicated instruction in separate classes:
  * `stshh`
  * `stcph`
  * `shuh`
  * `tsb`

Updated all their helper methods too, and updated the `stshh` pseudo
expansion for the intrinsic to emit `HINT #0x30 | policy`.

Code in AArch64AsmPrinter::emitInstruction identified an initial BTI using a
broad bitmask on the HINT immediate, which also matched shuh/stcph (50..52)
This could move the patchable entry label after a non-BTI instruction.
Replaced it with an exact BTI check using the BTI HINT range (32..63) and
AArch64BTIHint::lookupBTIByEncoding(Imm ^ 32).

A following change will remove duplicated code and simplify.

    [2 lines not shown]
DeltaFile
+86-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+41-40llvm/lib/Target/AArch64/AArch64InstrFormats.td
+22-3llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+5-14llvm/lib/Target/AArch64/AArch64InstrInfo.td
+5-10llvm/lib/Target/AArch64/AArch64SystemOperands.td
+4-2llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+163-692 files not shown
+170-708 files

LLVM/project 5796aa9clang-tools-extra/docs ReleaseNotes.rst, clang-tools-extra/test/clang-tidy/checkers/bugprone branch-clone-inline-asm.cpp

[clang][AST] Fix StmtProfile handling of GCCAsmStmt asm strings and clobbers (#201481)

`VisitGCCAsmStmt` did not profile asm strings and clobbers because they
are not child statements.
As a result, different inline asm statements could produce the same
profile.
This fixes a false positive in `bugprone-branch-clone` where branches
containing inline asm were incorrectly reported as identical.

I used AI assistance when writing the test code, but I personally
reviewed it. 🤖

Fixes https://github.com/llvm/llvm-project/issues/198616
DeltaFile
+67-0clang/test/Modules/asm-stmt-odr.cppm
+43-0clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clone-inline-asm.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+2-2clang/lib/AST/StmtProfile.cpp
+1-0clang/docs/ReleaseNotes.rst
+118-25 files

LLVM/project 5f3e70cbolt/lib/Rewrite RewriteInstance.cpp, bolt/test/AArch64 instrument-no-fini.s

[BOLT] Instrument static PIEs through entry point (#204475)

Static PIEs contain DT_INIT and DT_FINI. However, statically linked libc
does not read the dynamic entries, so patching those entries has no
effect. Check DT_FLAGS_1 to detect input static PIEs and rely on entry
point patching accordingly.

Fixes #201371.
DeltaFile
+34-0bolt/test/X86/instrument-static-pie.s
+1-15bolt/test/runtime/X86/instrument-wrong-target.s
+10-2bolt/lib/Rewrite/RewriteInstance.cpp
+5-3bolt/test/AArch64/instrument-no-fini.s
+5-3bolt/test/X86/instrument-no-fini.s
+55-235 files

LLVM/project adfdb40llvm/test/CodeGen/X86 atomic-load-store.ll

[X86] Add aligned atomic vector load tests wider than 128 bits (NFC)

These >128-bit loads are expanded to __atomic_load libcalls regardless
of alignment, since x86 caps atomic ops at 128 bits.
DeltaFile
+360-0llvm/test/CodeGen/X86/atomic-load-store.ll
+360-01 files

FreeBSD/ports a029594audio/py-librosa Makefile

audio/py-librosa: Fix build by correcting dependency

PR:             296113
Reported by:    Robert Cina <transitive at gmail.com>
DeltaFile
+1-1audio/py-librosa/Makefile
+1-11 files

FreeBSD/ports a068b15audio/py-torchaudio Makefile

audio/py-torchaudio: Fix build by correcting dependency
DeltaFile
+1-1audio/py-torchaudio/Makefile
+1-11 files

FreeBSD/ports 07dd85amisc/py-comfy-aimdo distinfo Makefile

misc/py-comfy-aimdo: update 0.4.9 → 0.4.10
DeltaFile
+3-3misc/py-comfy-aimdo/distinfo
+1-1misc/py-comfy-aimdo/Makefile
+4-42 files

FreeBSD/ports c1663f7misc/comfyui pkg-plist Makefile

misc/comfyui: update 0.24.1 → 0.25.0
DeltaFile
+28-6misc/comfyui/pkg-plist
+4-4misc/comfyui/Makefile
+3-3misc/comfyui/distinfo
+35-133 files

FreeBSD/ports 84f6989audio/py-soxr Makefile

audio/py-soxr: Correct test dependency
DeltaFile
+1-1audio/py-soxr/Makefile
+1-11 files

FreeBSD/ports 522e541misc/comfy-cli distinfo Makefile

misc/comfy-cli: update 1.10.4 → 1.10.5
DeltaFile
+3-3misc/comfy-cli/distinfo
+1-1misc/comfy-cli/Makefile
+4-42 files

FreeBSD/ports a1fcf6amisc/py-kokoro Makefile

misc/py-kokoro: Fix build by correcting dependency
DeltaFile
+1-1misc/py-kokoro/Makefile
+1-11 files

FreeBSD/ports 5da5cd8misc/py-comfyui-workflow-templates distinfo Makefile

misc/py-comfyui-workflow-templates: update 0.9.98 → 0.10.0
DeltaFile
+3-3misc/py-comfyui-workflow-templates/distinfo
+1-1misc/py-comfyui-workflow-templates/Makefile
+4-42 files

FreeBSD/ports 8e85953misc/py-comfyui-workflow-templates-media-other distinfo Makefile

misc/py-comfyui-workflow-templates-media-other: update 0.3.217 → 0.3.220
DeltaFile
+3-3misc/py-comfyui-workflow-templates-media-other/distinfo
+1-1misc/py-comfyui-workflow-templates-media-other/Makefile
+4-42 files

FreeBSD/ports 26feb7fmisc/py-comfyui-workflow-templates-media-video distinfo Makefile

misc/py-comfyui-workflow-templates-media-video: update 0.3.91 → 0.3.92
DeltaFile
+3-3misc/py-comfyui-workflow-templates-media-video/distinfo
+1-1misc/py-comfyui-workflow-templates-media-video/Makefile
+4-42 files

FreeBSD/ports 27b35fbmisc/py-comfyui-workflow-templates-core distinfo Makefile

misc/py-comfyui-workflow-templates-core: update 0.3.252 → 0.3.255
DeltaFile
+3-3misc/py-comfyui-workflow-templates-core/distinfo
+1-1misc/py-comfyui-workflow-templates-core/Makefile
+4-42 files

FreeBSD/ports 0e22a89misc/py-comfyui-workflow-templates-media-image distinfo Makefile

misc/py-comfyui-workflow-templates-media-image: update 0.3.150 → 0.3.152
DeltaFile
+3-3misc/py-comfyui-workflow-templates-media-image/distinfo
+1-1misc/py-comfyui-workflow-templates-media-image/Makefile
+4-42 files

LLVM/project 7f7adfcllvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp AArch64InstPrinter.h

[AArch64][llvm] Deduplicate hint alias parsing code (NFC)

The code which handles instructions that are aliased in the `HINT`
encoding space is very similar and repetitive.

Move common code into templated functions, so that it's consistent and
simpler, whilst still remaining readable.

This also means any future instructions added in the `HINT` space will
be simpler to implement. Net removal of ~53 lines of code.
DeltaFile
+90-142llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+23-31llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+7-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+120-1733 files

LLVM/project 53dabaeclang/include/clang/ScalableStaticAnalysisFramework/SourceTransformation TransformationRegistry.h Transformation.h, clang/lib/ScalableStaticAnalysisFramework/SourceTransformation TransformationRegistry.cpp

[clang][ssaf] Add source-transformation library scaffolding (#204214)

Introduces the abstract base classes, registries, and force-linker
anchor for the SSAF source-transformation library.

A `Transformation` is an `ASTConsumer` that consumes a previously
computed `WPASuite` and emits source edits and findings through two
sinks: `SourceEditEmitter` (accumulates `clang::tooling::Replacement`s)
and `TransformationReportEmitter` (accumulates `(ruleId, level, range,
message)` tuples). The accumulated state is then handed to a
`SourceEditFormat` and a `TransformationReportFormat` for serialization.

Three `llvm::Registry`-backed registries — keyed by transformation name
and by file extension respectively — let transformations and formats be
linked in statically (with a force-linker anchor) or loaded dynamically
as a clang plugin. Each registry exposes the standard `is*Registered` /
`make*` / `printAvailable*` helpers used elsewhere in SSAF.

No transformation or format ships yet; this commit only adds the

    [4 lines not shown]
DeltaFile
+81-0clang/unittests/ScalableStaticAnalysisFramework/SourceTransformation/EmitterTest.cpp
+78-0clang/unittests/ScalableStaticAnalysisFramework/SourceTransformation/RegistryTest.cpp
+66-0clang/include/clang/ScalableStaticAnalysisFramework/SourceTransformation/TransformationRegistry.h
+44-0clang/lib/ScalableStaticAnalysisFramework/SourceTransformation/TransformationRegistry.cpp
+38-0clang/include/clang/ScalableStaticAnalysisFramework/SourceTransformation/Transformation.h
+33-0clang/include/clang/ScalableStaticAnalysisFramework/SourceTransformation/TransformationReportEmitter.h
+340-010 files not shown
+393-016 files

LLVM/project d9d5446lldb/packages/Python/lldbsuite/test dotest.py

[lldb] Only run libc++ tests when the architecture matches (#204267)

It does not make sense to run the libc++ tests when the libc++ dylib has
an architecture that does not match the test binary.

I ran into this when running the test suite with arm64e test binaries
and the locally-built libc++ is built arm64.

---------

Co-authored-by: Dave Lee <davelee.com at gmail.com>
DeltaFile
+16-0lldb/packages/Python/lldbsuite/test/dotest.py
+16-01 files

FreeNAS/freenas 5a7b365src/middlewared/middlewared/plugins/cloud_backup crud.py __init__.py

Convert cloud_backup plugin to the typesafe pattern

This commit adds changes to convert the cloud_backup plugin to the typesafe service/part pattern, so query and get_instance return Pydantic models, public methods use @api_method(check_annotations=True), and same-process calls go through call2/call_sync2.

The shared CloudTaskServiceMixin is left untyped since cloud_sync still depends on it, with a single sibling-safe edit to its zvol validation path. All in-process consumers were updated for model access: the cloud_sync credential delete check, the cron.d mako, and the path-resolution migration. Since the password is a Secret field, the create/update and restic paths dump with expose_secrets so an unchanged password isn't written back as the redaction string.
DeltaFile
+88-150src/middlewared/middlewared/plugins/cloud_backup/crud.py
+174-0src/middlewared/middlewared/plugins/cloud_backup/__init__.py
+73-82src/middlewared/middlewared/plugins/cloud_backup/sync.py
+65-83src/middlewared/middlewared/plugins/cloud_backup/snapshot.py
+60-63src/middlewared/middlewared/plugins/cloud_backup/init.py
+38-37src/middlewared/middlewared/plugins/cloud_backup/restore.py
+498-41510 files not shown
+572-43316 files

LLVM/project bf5f523mlir/lib/Target/Cpp TranslateToCpp.cpp, mlir/test/Target/Cpp class.mlir

[mlir][emitc] Set operator precedence for `GetFieldOp` (#203416)

This sets the precedence for the `GetFieldOp`, preventing an unsupported
operation error. The precedence is set to 18, the same as `GetGlobalOp`,
because `GetFieldOp` behaves the same way.
DeltaFile
+23-0mlir/test/Target/Cpp/class.mlir
+1-0mlir/lib/Target/Cpp/TranslateToCpp.cpp
+24-02 files

FreeBSD/src bb14ba3lib/libc/gen daemon.3

daemon(3): Note about environment after calling daemon()

While here, fix missing comma typo.

Reviewed by:    0mp, ziaee
Approved by:    0mp, ziaee
MFC after:      3 days
Obtained from:  https://github.com/apple-oss-distributions/libc (partially)
Sponsored by:   Klara, Inc.
Differential Revision:  https://reviews.freebsd.org/D57384
DeltaFile
+24-2lib/libc/gen/daemon.3
+24-21 files

FreeBSD/src 13184a6share/mk bsd.sys.mk

build: provide a FORTIFY_SOURCE.<src file> override

For native files we can do more minimal fixes to avoid this large of a
hammer, but for third party files it may not be worth the effort to try
and patch them.  NetBSD has the original _FORTIFY_SOURCE implementation
that ours is based on, for instance, but tests sourced from there can't
do an __ssp_real(foo) without being certain that `foo` actually has a
fortified definition.

This change does always define _FORTIFY_SOURCE as a result, so gate it
on CFLAGS not already containing _FORTIFY_SOURCE definitions.

This re-applies c46a0b59071614, but without re-defining _FORTIFY_SOURCE
needlessly.

PR:             294881
Reviewed by:    markj, sjg (both previous version)
Differential Revision:  https://reviews.freebsd.org/D57356
DeltaFile
+13-6share/mk/bsd.sys.mk
+13-61 files

LLVM/project ec6b043llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp AArch64InstPrinter.h

[AArch64][llvm] Deduplicate hint alias parsing code (NFC)

The code which handles instructions that are aliased in the `HINT`
encoding space is very similar and repetitive.

Move common code into templated functions, so that it's consistent and
simpler, whilst still remaining readable.

This also means any future instructions added in the `HINT` space will
be simpler to implement. Net removal of ~53 lines of code.
DeltaFile
+86-142llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+27-31llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+7-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+120-1733 files

LLVM/project 7e3a85ellvm/lib/Target/NVPTX NVPTXISelLowering.h, llvm/test/CodeGen/NVPTX insert-vector-elt-bitcast-legalize.ll

Revert "[NVPTX] Fix illegal combineInsertEltToShuffle pattern (#198259)"

This reverts commit d226dcc019d6a83cba79951ec2a8a08c53a57858.
DeltaFile
+0-24llvm/test/CodeGen/NVPTX/insert-vector-elt-bitcast-legalize.ll
+0-4llvm/lib/Target/NVPTX/NVPTXISelLowering.h
+0-282 files