LLVM/project 08169f5llvm/include/llvm/Analysis ScalarEvolution.h, llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Return a SCEVUse from getMulExpr and propagate use flags. (#221486)

Same as https://github.com/llvm/llvm-project/pull/220007 but for
getMulExpr:

add option to pass SCEVUse-specific flags to getMulExpr and propagate
them through, if valid conservatively. That is, the final expression
multiples the same operands (potentially in different order). For
example, it is not valid to propagate the use flags if other
(sub-)expressions have been inlined.

It also includes a few mechanical changes, to update users that still
expected const SCEV *.

PR: https://github.com/llvm/llvm-project/pull/221486
DeltaFile
+99-0llvm/unittests/Analysis/ScalarEvolutionTest.cpp
+20-8llvm/lib/Analysis/ScalarEvolution.cpp
+6-9llvm/include/llvm/Analysis/ScalarEvolution.h
+2-2llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+1-1llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
+128-205 files

LLVM/project 6569252llvm/test/Analysis/CostModel/ARM shuffle.ll

[ARM] Add cost test coverage for uzp/zip/trn shuffles. NFC (#223621)
DeltaFile
+752-318llvm/test/Analysis/CostModel/ARM/shuffle.ll
+752-3181 files

FreeBSD/src 5407f76sys/compat/linuxkpi/common/include/asm cpu_device_id.h, sys/compat/linuxkpi/common/src linux_compat.c

linuxkpi: Compile `x86_match_cpu()` on amd64 and i386 only

This fixes the build on other architectures where `struct x86_cpu_id` is
unavailable.

Sponsored by:   The FreeBSD Foundation
DeltaFile
+2-0sys/compat/linuxkpi/common/src/linux_compat.c
+2-0sys/compat/linuxkpi/common/include/asm/cpu_device_id.h
+4-02 files

FreeBSD/ports 22132a2misc/llama-cpp pkg-plist distinfo, misc/llama-cpp/files fetch-ui.sh package-lock.json

misc/llama-cpp: update 10900 → 10975
DeltaFile
+0-18,100misc/llama-cpp/files/package-lock.json
+0-107misc/llama-cpp/files/fetch-ui.sh
+14-37misc/llama-cpp/Makefile
+7-5misc/llama-cpp/distinfo
+3-3misc/llama-cpp/pkg-plist
+24-18,2525 files

OPNSense/plugins 6cb23d3www/caddy pkg-descr Makefile, www/caddy/src/opnsense/service/templates/OPNsense/Caddy/Config includeAuthProvider

www/caddy: sync with master
DeltaFile
+2-3www/caddy/src/opnsense/service/templates/OPNsense/Caddy/Config/includeAuthProvider
+1-0www/caddy/pkg-descr
+1-0www/caddy/Makefile
+4-33 files

OPNSense/plugins 78af74cwww/caddy pkg-descr

www/caddy: document change
DeltaFile
+1-0www/caddy/pkg-descr
+1-01 files

NetBSD/pkgsrc 48LJGTOdevel/openocd distinfo, devel/openocd/patches patch-configure

   openocd: remove chunk that shouldn't be there
VersionDeltaFile
1.3+1-10devel/openocd/patches/patch-configure
1.14+2-2devel/openocd/distinfo
+3-122 files

LLVM/project f0907c3llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 arm64-fixed-point-scalar-cvt-dagcombine.ll fcvt-fixed.ll

[AArch64] Improve scalar fixed-point int-to-fp codegen (#220299)

[AArch64] Improve scalar fixed-point int-to-fp codegen

Select the scalar FPR shifted conversion forms when the integer input
is already in an FPR, and keep the GPR forms for integer inputs in
GPRs.

Add coverage for intrinsic and sitofp/uitofp fixed-point conversions.

Select scalar FP/SIMD-register conversion forms when a fixed-point
int-to-fp conversion uses a value extracted from a SIMD vector.

This avoids moving the reduction result through a GPR before
converting to floating point.
DeltaFile
+326-4llvm/test/CodeGen/AArch64/fcvt-fixed.ll
+184-0llvm/test/CodeGen/AArch64/arm64-fixed-point-scalar-cvt-dagcombine.ll
+57-32llvm/lib/Target/AArch64/AArch64InstrInfo.td
+567-363 files

LLVM/project 74bdb15clang/lib/StaticAnalyzer/Core ExprEngine.cpp

[NFC][analyzer] Do not spell out unreachable statement kinds in `shouldJustCallCheckers` (#223473)

The function `shouldJustCallCheckers` introduced recently in
e829049823905405779c6b908437b200e7ed1b2e returns true by default and
returns false for statement kinds where it is inappropriate to call the
PreStmt and PostStmt checkers in the "normal" pattern.

Unreachable statement kinds (e.g. control flow statements that never
appear as non-terminator statements in a CFGBlock) were covered by
explicit cases in `shouldJustCallCheckers`, but this was needless
complexity, so this commit removes it. These statement kinds run into
`llvm_unreachable` in `ExprEngine::Visit`, so the behavior of
`shouldJustCallCheckers` is completely inconsequential.
DeltaFile
+0-49clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
+0-491 files

OPNSense/plugins fad95a7security/openvpn-legacy Makefile, security/openvpn-legacy/src/etc/rc.syshook.d/carp 50-openvpn-legacy

security/openvpn-legacy: sync with master
DeltaFile
+61-0security/openvpn-legacy/src/etc/rc.syshook.d/carp/50-openvpn-legacy
+1-1security/openvpn-legacy/Makefile
+62-12 files

NetBSD/pkgsrc yiegFv1lang/jimtcl Makefile

   jimtcl: fix HOMEPAGE
VersionDeltaFile
1.17+2-2lang/jimtcl/Makefile
+2-21 files

OPNSense/plugins b94d8b2. LICENSE

LICENSE: sync
DeltaFile
+2-0LICENSE
+2-01 files

OPNSense/plugins cd4a463security/acme-client pkg-descr, security/acme-client/src/opnsense/mvc/app/controllers/OPNsense/AcmeClient/forms dialogValidation.xml

security/acme-client: sync with master
DeltaFile
+44-0security/acme-client/src/opnsense/mvc/app/library/OPNsense/AcmeClient/LeValidation/DnsHostinger.php
+44-0security/acme-client/src/opnsense/mvc/app/library/OPNsense/AcmeClient/LeValidation/DnsGcore.php
+44-0security/acme-client/src/opnsense/mvc/app/library/OPNsense/AcmeClient/LeValidation/DnsFreemyip.php
+30-0security/acme-client/src/opnsense/mvc/app/controllers/OPNsense/AcmeClient/forms/dialogValidation.xml
+13-1security/acme-client/src/opnsense/mvc/app/models/OPNsense/AcmeClient/AcmeClient.xml
+14-0security/acme-client/pkg-descr
+189-13 files not shown
+194-69 files

LLVM/project 503a09fllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

Fix lit test fail again
DeltaFile
+3-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+3-51 files

OPNSense/plugins 2b28236net/turnserver Makefile pkg-descr, net/turnserver/src/etc/inc/plugins.inc.d turnserver.inc

net/turnserver: sync with master
DeltaFile
+8-0net/turnserver/pkg-descr
+6-0net/turnserver/src/opnsense/scripts/OPNsense/Turnserver/setup.sh
+1-1net/turnserver/src/opnsense/service/templates/OPNsense/Turnserver/rc.conf.d
+1-1net/turnserver/src/etc/inc/plugins.inc.d/turnserver.inc
+1-1net/turnserver/Makefile
+2-0net/turnserver/src/opnsense/scripts/OPNsense/Turnserver/export_certs.php
+19-31 files not shown
+20-37 files

OpenBSD/src jxL9S8susr.bin/ssh ssh-keygen.1

   the default KDF rounds for keys generated by ssh-keygen is 24, not 16
   bz3975; from lbrick
VersionDeltaFile
1.241+3-3usr.bin/ssh/ssh-keygen.1
+3-31 files

LLVM/project c7e741bllvm/lib/Target/RISCV RISCVInstrInfo.td, llvm/test/MC/RISCV hinval-invalid.s

[RISCV][MC] Require H for HINVAL instructions (#223588)

HINVAL.VVMA and HINVAL.GVMA are provided by Svinval only when the
Hypervisor extension is implemented.
This commit fixes the incorrect extension dependency.

See:
https://github.com/riscv/riscv-isa-manual/blob/be8cb008612ce2ac1712e4ba3f09fc2109c0d462/src/priv/svinval.adoc?plain=1#L45-L46
DeltaFile
+16-0llvm/test/MC/RISCV/hinval-invalid.s
+3-0llvm/lib/Target/RISCV/RISCVInstrInfo.td
+19-02 files

LLVM/project f123e15llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AArch64 sve-intrinsics.ll sve-vls-shuffle-extract.ll

[AArch64][CostModel] Update SVE inserelement/extractelement costs (#220627)

This updates the costs for inserting/extracting elements into/from
fixed-length SVE vectors when the lane exceeds the index for the
NEON mov lane (dup/ins) instructions.
DeltaFile
+278-0llvm/test/Analysis/CostModel/AArch64/sve-insert-extract.ll
+43-90llvm/test/Transforms/LoopVectorize/AArch64/sve-non-native-interleaved-accesses.ll
+40-40llvm/test/Analysis/CostModel/AArch64/sve-vls-shuffle-extract.ll
+22-0llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+2-2llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
+385-1325 files

NetBSD/pkgsrc zFHUJxwtextproc/enju distinfo, textproc/enju/patches patch-ll_include_liblilfes_procstream.h

   enju: add missing header to fix build
VersionDeltaFile
1.1+14-0textproc/enju/patches/patch-ll_include_liblilfes_procstream.h
1.3+2-1textproc/enju/distinfo
+16-12 files

LLVM/project 95bdf4cllvm/lib/IR Metadata.cpp, llvm/unittests/IR DebugInfoTest.cpp MetadataTest.cpp

[IR] Do not track metadata uses of ConstantData (#223303)

A ConstantData is never RAUW'd or deleted (#137313 removed its use list
for that reason), so the use list of its ConstantAsMetadata node is
written but never read. Stop tracking these uses.

In a module with debug info the PoisonValue node had the largest use
lists: a debug record is retargeted to poison when the instruction it
describes is deleted (`Instruction::~Instruction`) or its location is
killed.

Aided by Opus 5
DeltaFile
+17-13llvm/unittests/IR/MetadataTest.cpp
+11-3llvm/lib/IR/Metadata.cpp
+6-0llvm/unittests/IR/DebugInfoTest.cpp
+34-163 files

FreeBSD/ports 33312c1multimedia/go2tv Makefile distinfo

multimedia/go2tv: Update to 2.6.0

ChangeLog:

1. https://github.com/alexballas/go2tv/releases/tag/v2.4.0
2. https://github.com/alexballas/go2tv/releases/tag/v2.5.0
3. https://github.com/alexballas/go2tv/releases/tag/v2.6.0

Reported by:    "github-actions[bot]" <notifications at github.com>
DeltaFile
+5-5multimedia/go2tv/distinfo
+2-2multimedia/go2tv/Makefile
+7-72 files

FreeBSD/ports 4e0e80fmail/py-resend Makefile distinfo

mail/py-resend: Update to 2.45.0

Changelog: https://github.com/resend/resend-python/releases/tag/v2.45.0

Reported by:    portscout
DeltaFile
+3-3mail/py-resend/distinfo
+1-1mail/py-resend/Makefile
+4-42 files

OpenBSD/src xgKnZnyusr.bin/ssh sshd.c channels.c

   warnings fixes (static vs missing prototype, sign conversion)
VersionDeltaFile
1.466+10-12usr.bin/ssh/channels.c
1.632+2-2usr.bin/ssh/sshd.c
+12-142 files

FreeBSD/ports 0fb1c8cdevel/py-grpcio-tools Makefile distinfo

devel/py-grpcio-tools: update to 1.84.0.
DeltaFile
+3-3devel/py-grpcio-tools/distinfo
+1-1devel/py-grpcio-tools/Makefile
+4-42 files

FreeBSD/ports 35d4905devel/php-grpc Makefile distinfo

devel/php-grpc: update to 1.84.0.
DeltaFile
+3-3devel/php-grpc/distinfo
+1-1devel/php-grpc/Makefile
+4-42 files

FreeBSD/ports 4d16d16devel/py-grpcio Makefile distinfo

devel/py-grpcio: update to 1.84.0.
DeltaFile
+3-3devel/py-grpcio/distinfo
+1-1devel/py-grpcio/Makefile
+4-42 files

LLVM/project b2ef8caclang/lib/Basic/Targets RISCV.h RISCV.cpp, clang/test/CodeGen/RISCV riscv-cf-protection.c

[Clang] Make Unlabeled the default control flow branch label scheme (#223297)

The work on "func-sig" label scheme is discontinued, so it's better to
switch the default to unlabeled at this time.
DeltaFile
+0-10clang/test/CodeGen/RISCV/riscv-cf-protection.c
+1-6clang/lib/Basic/Targets/RISCV.cpp
+1-1clang/lib/Basic/Targets/RISCV.h
+2-173 files

LLVM/project 64fb83bllvm/include/llvm/Transforms/Utils LowerAtomic.h, llvm/lib/Target/AMDGPU SIISelLowering.cpp

LowerAtomic: Preserve the volatile flag when lowering atomicrmw and cmpxchg

These utility functions built the replacements without copying the volatile
flag from the original instruction.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+60-0llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-flat-i64-private-volatile.ll
+10-10llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll
+9-8llvm/lib/Transforms/Utils/LowerAtomic.cpp
+7-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+3-4llvm/include/llvm/Transforms/Utils/LowerAtomic.h
+2-2llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
+91-296 files

LLVM/project 6526e5bllvm/lib/Target/X86 X86FloatingPoint.cpp, llvm/test/CodeGen/X86 pr149371.ll

[X86] Fix FP `stackifier` crash on invalid `x87` inline `asm` constraints (#221881)

Fixes #149371

When an x87 inline asm uses the stack registers in a layout the FP
stackifier can't model, for example an input tied to `st(1)` while
`st(0)` and `st(1)` are both outputs, the pass reports "fixed input regs
must be last on the x87 stack" and then keeps going as if nothing
happened. It simulates the pops and pushes with counts taken from masks
it has just found to be non-contiguous, so the input never leaves the
stack model and the same register gets pushed again as an output. The
model now holds a duplicate entry, and the next `adjustLiveRegs` trips
"Live count mismatch". The odd `R0` constraint in the report isn't the
culprit, by the way; it resolves to a plain integer register and leaves
the tied `1` as the only x87 input.

Once any of these errors has been reported, the asm is no longer
simulated. The pass pops the inputs the asm kills and pushes its
outputs, which keeps the stack model consistent with what the register

    [7 lines not shown]
DeltaFile
+66-35llvm/lib/Target/X86/X86FloatingPoint.cpp
+38-0llvm/test/CodeGen/X86/pr149371.ll
+104-352 files

OpenBSD/src A62ZJOmusr.bin/ssh sshd.c

   wrap line
VersionDeltaFile
1.631+3-2usr.bin/ssh/sshd.c
+3-21 files