LLVM/project bbd5b1dmlir/lib/Conversion/VectorToXeGPU VectorToXeGPU.cpp, mlir/test/Conversion/VectorToXeGPU store-to-xegpu.mlir

[mlir][VectorToXeGPU] Fix crash on memref with non-scalar element type (#183905)

The vector.store and vector.load lowering in --convert-vector-to-xegpu
would crash when the source memref had a non-integer/float element type
(e.g. memref<?xvector<4xf32>>).

The crash occurred inside createNdDescriptor() when computing the byte
offset for dynamic memrefs: srcTy.getElementTypeBitWidth() internally
calls getIntOrFloatBitWidth() which asserts on non-scalar types such as
vector<4xf32>.

Fix by adding a check for the memref's element type in
storeLoadPreconditions(). If the element type is not an integer or
float, the pattern returns notifyMatchFailure() instead of proceeding
and crashing.

The same guard is applied to TransferReadLowering and
TransferWriteLowering which share the same helper and can hit the same
path.

Fixes #181463
DeltaFile
+18-5mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
+16-0mlir/test/Conversion/VectorToXeGPU/store-to-xegpu.mlir
+34-52 files

FreeBSD/src d00b32cusr.sbin/mixer mixer.c mixer.8

Revert "mixer(8): Implement hot-swapping"

We now have devd rules in snd.conf that achieve this in a much cleaner
way.

This reverts commit 9aac27599acaffa21ff69c5be8a2d71d29cc3d6b.

Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential Revision:  https://reviews.freebsd.org/D55532
DeltaFile
+7-74usr.sbin/mixer/mixer.c
+4-71usr.sbin/mixer/mixer.8
+11-1452 files

FreeBSD/src 428517asbin/devd snd.conf devd.conf.5, sys/dev/sound/pcm sound.c

sound: Notify devd when no devices are connected

Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Reviewed by:    imp
Differential Revision:  https://reviews.freebsd.org/D55531
DeltaFile
+10-0sbin/devd/snd.conf
+3-1sbin/devd/devd.conf.5
+2-0sys/dev/sound/pcm/sound.c
+15-13 files

FreeBSD/src d40189fsys/dev/sound/pcm sound.c

sound: Notify devd on hw.snd.default_unit change

If we have virtual_oss running, this devd notification will make sure to
automatically transfer sound to the new default unit, while also making
sure that we switch to it only for the supported directions (recording
and/or playback).

For more information, please refer to 2ffaca551eaf ("snd_hda: Implement
automatic redirection between associations").

Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Reviewed by:    imp
Differential Revision:  https://reviews.freebsd.org/D55530
DeltaFile
+7-0sys/dev/sound/pcm/sound.c
+7-01 files

LLVM/project efba6a8mlir/lib/Dialect/OpenMP/Utils Utils.cpp

simplify private clause check
DeltaFile
+10-13mlir/lib/Dialect/OpenMP/Utils/Utils.cpp
+10-131 files

LLVM/project a8a5242mlir/lib/Dialect/XeGPU/Transforms XeGPUWgToSgDistribute.cpp, mlir/test/Dialect/XeGPU xegpu-wg-to-sg.mlir

[mlir][XeGPU] Fix crash in wg-to-sg type converter on non-XeGPU tensors (#183914)

The SCF structural type conversion in XeGPUWgToSgDistributePass
registered a RankedTensorType conversion callback that unconditionally
called VectorType::get() on the tensor's shape. If the tensor had
dynamic dimensions (e.g. tensor<?xi32>) and no XeGPU layout encoding,
getSgShapeAndCount() returned the original shape intact (including the
kDynamic sentinel value), causing VectorType::get() to abort because
VectorType does not support dynamic sizes.

Fix by checking whether the RankedTensorType carries an XeGPU LayoutAttr
encoding before attempting the conversion. Plain tensors without such an
encoding are left unchanged (std::nullopt causes the passthrough
converter to handle them).

Add a regression test for the no-encoding / dynamic-tensor case.

Fixes #182999
DeltaFile
+23-0mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
+9-3mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
+32-32 files

LLVM/project 7856e98mlir/include/mlir/Dialect/XeGPU/uArch IntelGpuXe2.h, mlir/lib/Dialect/XeGPU/Transforms XeGPUPropagateLayout.cpp XeGPUSgToWiDistributeExperimental.cpp

[mlir][XeGPU] Fix crash in getUArch when no chip target attribute is set (#183912)

When running --xegpu-subgroup-distribute (or --xegpu-propagate-layout)
on a gpu.func that lacks a chip target attribute, getChipStr() returns
std::nullopt and the callers pass an empty string to getUArch(). This
function used llvm_unreachable for unrecognised architecture names,
causing an immediate abort instead of gracefully skipping the operation.

Fix by:
1. Changing getUArch() to return nullptr for unknown arch names instead
of calling llvm_unreachable.
2. Adding null-pointer guards to all callers in XeGPUPropagateLayout.cpp
that were missing them. The callers in XeGPUSubgroupDistribute.cpp
already had null checks but they were unreachable due to the unreachable
call.

Add a regression test that runs --xegpu-subgroup-distribute on a
gpu.func without any chip attribute and verifies it no longer crashes.

Fixes #181531
Fixes #179167
DeltaFile
+33-11mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+12-0mlir/test/Dialect/XeGPU/xegpu-subgroup-distribute-no-arch.mlir
+1-4mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
+1-1mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
+47-164 files

LLVM/project ecec792mlir/lib/Dialect/Func/IR FuncOps.cpp, mlir/test/Conversion/FuncToLLVM func-memref-return.mlir

[mlir][func] Move return-type verification from ReturnOp to FuncOp (#184153)

Move the operand count and type checks for func.return from
ReturnOp::verify() into a new FuncOp::verify(). The verifier iterates
all blocks in the callable region, skipping terminators that are not
func.return (e.g. llvm.return or test.return that may appear during
dialect conversion).

Fix several invalid-IR tests that had func.func return types
inconsistent with the actual func.return operands. Previously these
mismatches were silent because block verification stopped at an earlier
expected error before reaching the func.return; now that
FuncOp::verify() runs before body verification, the return types must be
consistent.
DeltaFile
+29-15mlir/lib/Dialect/Func/IR/FuncOps.cpp
+15-15mlir/test/Dialect/LLVMIR/nvvm.mlir
+5-5mlir/test/Dialect/LLVMIR/invalid.mlir
+5-3mlir/test/Transforms/test-legalizer.mlir
+0-7mlir/test/Conversion/FuncToLLVM/func-memref-return.mlir
+3-3mlir/test/Transforms/test-dialect-conversion-pdll.mlir
+57-4812 files not shown
+73-6418 files

LLVM/project 263a22emlir/lib/Dialect/XeGPU/Transforms XeGPUPropagateLayout.cpp, mlir/test/Dialect/XeGPU xegpu-propagate-layout-invalid.mlir

[mlir][xegpu] Fix crash in XeGPUPropagateLayout when module has llvm.func (#183899)

updateFunctionOpInterface() called
funcOp.setType(FunctionType::get(...)) on every FunctionOpInterface
operation, including llvm.func. However, llvm.func stores its type as
LLVMFunctionType, not the standard FunctionType. Calling
setType(FunctionType{}) on it corrupts the function_type attribute, and
the next call to getFunctionType() (which tries to
cast<LLVMFunctionType> the stored attribute) aborts.

Fix by skipping functions whose type is not a standard FunctionType.
XeGPU layout propagation only applies to functions using MLIR's
FunctionType; other function types (like LLVMFunctionType) are not
expected to carry XeGPU layouts.

Fixes #177846
Fixes #177777
Fixes #181970
DeltaFile
+13-0mlir/test/Dialect/XeGPU/xegpu-propagate-layout-invalid.mlir
+6-0mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+19-02 files

LLVM/project 6ee48f2llvm/lib/Target/RISCV RISCVVLOptimizer.cpp, llvm/test/CodeGen/RISCV/rvv vl-opt.ll

[RISCV] Remove VL != 1 restriction in RISCVVLOptimizer (#184298)

This was added way back in #112228 when the VLs were reduced in-situ,
and returning false in isSupportedInstr could trim the number of
instructions processed.

However after #124530 the demanded VLs are all computed beforehand as an
analysis so this is no longer an optimization.

This also removes the diff in rvv-peephole-vmerge-vops.ll in #184297
DeltaFile
+12-0llvm/test/CodeGen/RISCV/rvv/vl-opt.ll
+0-7llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+12-72 files

FreeNAS/freenas a76659ddebian/debian postinst rules, src/freenas/debian rules

Remove Debian branding
DeltaFile
+10-0debian/debian/postinst
+0-3src/freenas/debian/rules
+1-1debian/debian/rules
+11-43 files

LLVM/project 36cced2llvm/test/tools/llvm-mca/AArch64/Apple/Inputs neon-instructions.s, llvm/test/tools/llvm-mca/AArch64/Inputs sve-instructions.s neon-instructions.s

[NFC][AArch64] Refactor Arm llvm-mca tests (#183294)

This patch refactors the llvm-mca tests for AArch64 targets
which make use of the shared "Neoverse/Inputs" directory. For the
sake of making scaling easier, the "Inputs" directory is now on the
toplevel at llvm-mca/AArch64 and all tests referencing this directory
are rewritten to use the new path.
DeltaFile
+0-3,414llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/sve-instructions.s
+3,414-0llvm/test/tools/llvm-mca/AArch64/Inputs/sve-instructions.s
+0-1,559llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/neon-instructions.s
+1,559-0llvm/test/tools/llvm-mca/AArch64/Inputs/neon-instructions.s
+0-1,559llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/neon-instructions.s
+0-1,448llvm/test/tools/llvm-mca/AArch64/Neoverse/Inputs/basic-instructions.s
+4,973-7,98077 files not shown
+6,656-9,66383 files

NetBSD/pkgsrc-wip 93c6cd2terraform-provider-vultr COMMIT_MSG

terraform-provider-vultr: add more info to the candidate commit message
DeltaFile
+13-2terraform-provider-vultr/COMMIT_MSG
+13-21 files

LLVM/project 245887ellvm/test/CodeGen/X86 veclib-llvm.sincos.ll

[X86] Added sincos vector lib codegen test coverage (#183702)

Added veclib-llvm.sincos.ll tests for amdlibm and libmvec

Fixes #182847
DeltaFile
+122-0llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
+122-01 files

NetBSD/pkgsrc-wip 6299c29terraform-provider-template COMMIT_MSG

terraform-provider-template: add candidate commit message
DeltaFile
+10-0terraform-provider-template/COMMIT_MSG
+10-01 files

NetBSD/pkgsrc-wip 6888909terraform-provider-random2 COMMIT_MSG

terraform-provider-random2: add candidate commit message
DeltaFile
+11-0terraform-provider-random2/COMMIT_MSG
+11-01 files

LLVM/project 0b36d42llvm/lib/CodeGen TargetLoweringBase.cpp, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp LegalizeVectorOps.cpp

[AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (#183750)

This patch teaches the backend how to lower the FCBRT DAG node to the
vector math library function when using ArmPL. This is similar to what
we already do for llvm.pow/FPOW, however the only way to expose this is
via a DAG combine that converts

  FPOW(<2 x double> %x, <2 x double> <double 1.0/3.0, double 1.0/3.0>)

into

  FCBRT(<2 x double> %x)

when the appropriate fast math flags are present on the node. I've
updated the DAG combine to handle vector types and only perform the
transformation if there exists a vector library variant of cbrt.
DeltaFile
+45-17llvm/lib/IR/RuntimeLibcalls.cpp
+39-2llvm/test/CodeGen/AArch64/veclib-llvm.pow.ll
+23-0llvm/lib/CodeGen/TargetLoweringBase.cpp
+15-1llvm/test/CodeGen/ARM/pow.ll
+9-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+10-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+141-233 files not shown
+152-249 files

NetBSD/pkgsrc-wip f5b5cb9terraform-provider-null COMMIT_MSG

terraform-provider-null: add candidate commit message
DeltaFile
+19-1terraform-provider-null/COMMIT_MSG
+19-11 files

LLVM/project 03a9ebcllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 known-never-zero.ll

[DAG] isKnownNeverZero - add ISD::UADDSAT/UMAX/UMIN DemandedElts handling and tests (#183992)

Fixes #183038

Adds `isKnownNeverZero` support for `UADDSAT`, `UMAX`, and `UMIN`. This
allows the compiler to prove a vector result is _non-zero_ by analyzing
only the demanded lanes of its operands.
DeltaFile
+7-5llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+3-6llvm/test/CodeGen/X86/known-never-zero.ll
+10-112 files

OPNSense/core 196334csrc/opnsense/mvc/app/views/OPNsense/Firewall nat_rule.volt

Firewall: NAT: Destination NAT: do the same here as https://github.com/opnsense/core/commit/4bc542cc7fad2ccd11e08bcd7bd2266f2accefd1
DeltaFile
+5-0src/opnsense/mvc/app/views/OPNsense/Firewall/nat_rule.volt
+5-01 files

LLVM/project 5e814e2mlir/lib/Dialect/LLVMIR/Transforms InlinerInterfaceImpl.cpp, mlir/test/Dialect/LLVMIR inlining.mlir

[mlir][llvm] Fix crash in LLVM inliner when callee has no recognized terminator (#183949)

When the callee of an llvm.call has a body block ending with an
unregistered op (rather than a recognized LLVM terminator like
llvm.return), the LLVM inliner's handleTerminator method was called with
that unregistered op and crashed via a cast<LLVM::ReturnOp>() assertion
or use-after-erase due to unresolved call result uses.

The root cause is that the generic MLIR verifier conservatively treats
unregistered ops as potential terminators (using mightHaveTrait), so
malformed IR of this shape passes verification. The inliner, however,
assumes that the callee's terminator is a recognized LLVM op.

Fix by adding a guard in LLVMInlinerInterface::isLegalToInline() that
refuses to inline a callee containing any block whose last operation
does not have the IsTerminator trait. This prevents the crash and leaves
the call site intact without any IR mutation.

Fixes #108363
Fixes #118766
DeltaFile
+39-0mlir/test/Dialect/LLVMIR/inlining.mlir
+14-0mlir/lib/Dialect/LLVMIR/Transforms/InlinerInterfaceImpl.cpp
+53-02 files

NetBSD/pkgsrc-wip 1e61af5terraform-provider-local COMMIT_MSG

terraform-provider-local: Add candidate commit message
DeltaFile
+29-0terraform-provider-local/COMMIT_MSG
+29-01 files

NetBSD/pkgsrc-wip 10477c0terraform-provider-local Makefile

terraform-provider-local: G/C not needed bits
DeltaFile
+0-2terraform-provider-local/Makefile
+0-21 files

LLVM/project d1c563blldb/unittests/Target CMakeLists.txt

[lldb] Don't link TestingSupport as a component (#184310)

This doesn't work with dylib builds, because TestingSupport is not part
of the dylib. Instead, we should link it via LINK_LIBS, like other tests
already do.
DeltaFile
+1-1lldb/unittests/Target/CMakeLists.txt
+1-11 files

NetBSD/pkgsrc-wip 93af418terraform-provider-kubernetes1 COMMIT_MSG

terraform-provider-kubernetes1: add candidate commit message
DeltaFile
+11-0terraform-provider-kubernetes1/COMMIT_MSG
+11-01 files

NetBSD/src 5lnDvpDexternal/gpl3/gcc.old/dist/gcc/config/vax vax.md

   gcc/vax: (gcc12) adjust the constraints on the output operands of the
   '*extzv_aligned' instruction patterns, removing the 'earlyclobber'
   modifier, to be consistent with the constraints on the output operands
   of the related 'extv_aligned' instruction patterns.
VersionDeltaFile
1.20+2-2external/gpl3/gcc.old/dist/gcc/config/vax/vax.md
+2-21 files

FreeBSD/ports 44f2066devel/py-commoncode Makefile distinfo, devel/py-commoncode/files patch-requirements.txt patch-PKG-INFO

devel/py-commoncode: update to 32.2.1

PR:             293080
DeltaFile
+38-0devel/py-commoncode/files/patch-requirements.txt
+11-0devel/py-commoncode/files/patch-PKG-INFO
+11-0devel/py-commoncode/files/patch-setup.cfg
+3-3devel/py-commoncode/Makefile
+3-3devel/py-commoncode/distinfo
+66-65 files

NetBSD/pkgsrc-wip 708963aterraform-provider-aws3 Makefile

terraform-provider-aws3: G/C no longer needed bits
DeltaFile
+0-4terraform-provider-aws3/Makefile
+0-41 files

NetBSD/pkgsrc-wip 3fb14edsyncthing TODO

Add some more notes on non working options
DeltaFile
+5-0syncthing/TODO
+5-01 files

NetBSD/pkgsrc-wip fa7a3fdsyncthing distinfo go-modules.mk, syncthing/files syncthing.sh

Initial (non working) syncthing 2.x package

Fails to start on NetBSD with

/usr/pkg/bin/syncthing: text relocations
/usr/pkg/bin/syncthing: Cannot write-enable text segment: Permission denied

Adding NOT_PAX_MPROTECT_SAFE to test just gets a segfault

Could be related to the switch to sqlite?
DeltaFile
+977-0syncthing/distinfo
+326-0syncthing/go-modules.mk
+80-0syncthing/Makefile
+44-0syncthing/files/syncthing.sh
+9-0syncthing/PLIST
+8-0syncthing/TODO
+1,444-01 files not shown
+1,452-07 files