OPNSense/src 1266f4esys/dev/igc if_igc.c

igc: test 4
DeltaFile
+1-45sys/dev/igc/if_igc.c
+1-451 files

LLVM/project 649466amlir/include/mlir/Dialect/OpenACC OpenACCCGOps.td

[NFC][OpenACC] fix doc formatting for reduction ops (#209739)

Was not printing correctly due to the matching `$`
DeltaFile
+7-7mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+7-71 files

FreeBSD/ports cddddc8devel/gprbuild Makefile

devel/gprbuild: ignore on i386

It builds fine, but cannot be used to build the other ports.

PR:             296655
DeltaFile
+3-0devel/gprbuild/Makefile
+3-01 files

FreeNAS/freenas 9ce7e43

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files

FreeNAS/freenas 8f490bbsrc/middlewared/middlewared/plugins/container lifecycle.py, tests/api2 test_container_mknod.py

NAS-141470 / 27.0.0-BETA.1 / Inject mknod for privileged Allow-All containers (#19319)

## Problem
A privileged container with `capabilities_policy` "ALLOW" keeps every
capability in the bounding set, but libvirt only widens the LXC cgroup
device ACL when an explicit `<mknod state='on'/>` child is emitted. As a
result "Allow All" can't create device nodes, so Docker fails to extract
images whose layers contain overlay whiteouts (character 0:0 nodes made
via mknod) even though CAP_MKNOD is present.

## Solution
For privileged containers (idmap None) under an ALLOW policy, inject the
mknod capability unless the user set it explicitly, so libvirt emits
`<mknod state='on'/>` and widens the device ACL — making "Allow All"
actually allow device-node creation. Adds an api2 integration test that
pulls and runs a complex image inside such a container.
DeltaFile
+60-0tests/api2/test_container_mknod.py
+15-0src/middlewared/middlewared/plugins/container/lifecycle.py
+75-02 files

LLVM/project 39ff4dallvm/test/CodeGen/AMDGPU trap.ll verify-sop.mir

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (52)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 -> -mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu following the default-subtarget pinning. Codegen output is unchanged.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/trap.ll
+2-2llvm/test/CodeGen/AMDGPU/verify-sop.mir
+2-2llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir
+2-2llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
+2-2llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
+2-2llvm/test/CodeGen/AMDGPU/twoaddr-regsequence-keep-copy-on-use.mir
+28-2840 files not shown
+75-7546 files

LLVM/project 87cbc79llvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-f32-agent.ll expand-atomic-f32-system.ll

AMDGPU: Migrate tests with regenerated checks to amdgpu subarch triple (54)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on autogenerated tests where the folded triple changes output relative to the previous default subtarget (e.g. cost-model BASE lines, scheduling). CHECK lines were regenerated with the update_*_test_checks.py scripts.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+803-803llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
+284-284llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
+244-244llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
+202-202llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
+194-194llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i32-agent.ll
+149-141llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomicrmw-flat-noalias-addrspace.ll
+1,876-1,86865 files not shown
+3,799-3,82071 files

LLVM/project 8519b92llvm/test/CodeGen/AMDGPU/GlobalISel udiv.i32.ll udiv.i64.ll

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (53)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 -> -mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu following the default-subtarget pinning. Codegen output is unchanged.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
+12-1287 files not shown
+109-10993 files

LLVM/project 3e7de3fllvm/test/CodeGen/AMDGPU set-wave-priority.ll llvm.amdgcn.unreachable.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (51)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 -> -mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu following the default-subtarget pinning. Codegen output is unchanged.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/set-wave-priority.ll
+4-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.unreachable.ll
+3-3llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-2llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll
+2-2llvm/test/CodeGen/AMDGPU/lds-size.ll
+2-2llvm/test/CodeGen/AMDGPU/liveness.mir
+17-1794 files not shown
+132-132100 files

LLVM/project 7eccd5dllvm/test/CodeGen/AMDGPU fadd-fma-fmul-combine.ll debug_frame.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (50)

Fold the explicit -mcpu subtarget into the amdgpu subarch triple on llc/opt RUN lines (e.g. -mtriple=amdgcn -mcpu=gfx600 -> -mtriple=amdgpu6.00), now that these tests carry an explicit -mcpu following the default-subtarget pinning. Codegen output is unchanged.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-combine.ll
+4-4llvm/test/CodeGen/AMDGPU/debug_frame.ll
+4-4llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
+3-3llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address-codegen.ll
+3-3llvm/test/CodeGen/AMDGPU/allow-check.ll
+3-3llvm/test/CodeGen/AMDGPU/amdgpu-function-calls-option.ll
+21-2193 files not shown
+136-13699 files

LLVM/project 8c08803llvm/test/CodeGen/AMDGPU/GlobalISel xor.ll xnor.ll

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (49)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+7-7llvm/test/CodeGen/AMDGPU/GlobalISel/xor.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll
+5-5llvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
+24-245 files not shown
+34-3411 files

LLVM/project c78147allvm/test/CodeGen/AMDGPU/GlobalISel ssubsat.ll shl-ext-reduce.ll

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (48) (#209756)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/sub.ll
+36-3695 files not shown
+229-229101 files

FreeBSD/ports b665e89devel/gprbuild Makefile

devel/gprbuild: Improve option DEBUG

devel/gprbuild:
 * Currently options DEBUG is ${BROKEN} because of some warnings from
   libgpr and between the Port and the GNAT tool-chain. Replace the
   ${BROKEN} statement with a new variable that is passed to the libgrp
   do-build phase that attenuates the tool-chain warnings

 PR:            296655
DeltaFile
+7-2devel/gprbuild/Makefile
+7-21 files

OPNSense/src 890682asys/dev/igc if_igc.c

igc: copy without eee setting
DeltaFile
+70-1sys/dev/igc/if_igc.c
+70-11 files

LLVM/project f1cb3d3llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-copy.mir regbankselect-icmp.mir

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (47) (#209755)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-dyn-stackalloc.mir
+19-1994 files not shown
+124-124100 files

LLVM/project 703e9b3llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[Flang][OpenMP] Implement DEPEND clause for TASKWAIT directive (#193568)

Implements support for the `DEPEND` clause on `TASKWAIT`, added in
OpenMP 5.0.
DeltaFile
+63-19llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+53-0mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
+13-5mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+8-6llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+9-4mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+0-11mlir/test/Target/LLVMIR/openmp-todo.mlir
+146-453 files not shown
+158-579 files

LLVM/project f829df1llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.workitem.id.ll load-constant.96.ll

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (46) (#209754)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+10-10llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
+9-9llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
+9-9llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
+7-7llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
+7-7llvm/test/CodeGen/AMDGPU/GlobalISel/or.ll
+5-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
+47-4794 files not shown
+209-209100 files

LLVM/project f8f37a6mlir/lib/Dialect/OpenACC/Transforms ACCCGToGPU.cpp, mlir/test/Dialect/OpenACC acc-cg-to-gpu-launch-mapping.mlir acc-cg-to-gpu-barrier-gang-private-init.mlir

[mlir][acc] Introduce acc to gpu codegen pass (#209606)

Introduce pass that lowers `acc.compute_region` to the GPU dialect. For
host-side kernels it wraps the region in `gpu.launch`; for specialized
ACC routines already inside a `gpu.func`, the body is lowered in place.

The pass maps nested `scf.parallel` / `scf.for` loops carrying
`acc.par_dims` to GPU block and thread parallelism, materializes
privatization and reductions for the device, and handles
synchronization.

Example input IR:
```
func.func @two_sibling_loops() {
  %c4 = arith.constant 4 : index
  %c32 = arith.constant 32 : index
  %grid = acc.par_width %c4 {par_dim = #acc.par_dim<block_x>}
  %block = acc.par_width %c32 {par_dim = #acc.par_dim<thread_x>}


    [94 lines not shown]
DeltaFile
+3,617-0mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+277-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
+107-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-barrier-gang-private-init.mlir
+83-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
+82-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-combine-region-private-dest.mlir
+74-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-routine-worker-call-with-thread-y-reduction.mlir
+4,240-015 files not shown
+4,859-021 files

LLVM/project 957b663llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.raw.buffer.load.tfe.ll llvm.amdgcn.struct.buffer.load.tfe.ll

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (45) (#209753)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+8-8llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
+8-8llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
+6-6llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.d16.ll
+5-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
+5-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
+5-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.setreg.ll
+37-3794 files not shown
+255-255100 files

LLVM/project 0d6013cllvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

AMDGPU: Migrate GlobalISel CodeGen tests to amdgpu subarch triple (44) (#209734)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+14-14llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
+9-9llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
+7-7llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
+78-7894 files not shown
+350-350100 files

LLVM/project 00f263bclang/lib/Driver/ToolChains HIPAMD.cpp, clang/test/Driver spirv-amd-toolchain.c

[HIP][SPIR-V] Enable -spirv-preserve-auxdata (#209520)

Function attributes such as `convergent` are only kept through SPIRV if
`-spirv-preserve-auxdata` is enabled. This is important to keep the
translation as accurate as possible. Also, this aligns with the
translator path.
DeltaFile
+2-2clang/lib/Driver/ToolChains/HIPAMD.cpp
+1-1clang/test/Driver/spirv-amd-toolchain.c
+3-32 files

LLVM/project 469794eclang/lib/StaticAnalyzer/Checkers/MPI-Checker MPIFunctionClassifier.cpp, clang/test/Analysis mpichecker.cpp MPIMock.h

[analyzer] Recognize missing MPI collectives in MPI-Checker (#209263)

Fixes a false positive in the `optin.mpi.MPI-Checker` where legitimate
code was flagged with "Request 'X' has no matching nonblocking call."

Background for reviewers unfamiliar with MPI or this checker
------------------------------------------------------------

MPI (Message Passing Interface) is the standard API for communication
between processes in HPC/cluster programs (C/C++/Fortran). Many MPI
operations come in a *nonblocking* form, prefixed with "I" (for
"immediate"): e.g. `MPI_Isend`, `MPI_Iscatter`. A nonblocking call
returns immediately and hands back an `MPI_Request` handle; the caller
must later complete it with `MPI_Wait` (or `MPI_Waitall`). Forgetting to
wait, or reusing a request before waiting, are real bugs (buffer reuse
races, leaked requests).

The MPI-Checker (originally contributed as a GSoC 2016 project, and is a
domain-specific check - hence it's in "optin").

    [57 lines not shown]
DeltaFile
+40-0clang/test/Analysis/mpichecker.cpp
+37-0clang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIFunctionClassifier.cpp
+7-0clang/test/Analysis/MPIMock.h
+84-03 files

LLVM/project 4339419utils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel][libc] Add missing header deps (#209767)

For stat/ioctl/size headers

Not sure which commit exactly broke this, maybe #209449
DeltaFile
+9-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+9-01 files

OpenBSD/src uXHmwNBsys/kern kern_exit.c

   When signaling untraced processes with a SIGKILL check the right process
   for PS_EXITING.

   Fix for the sys/kern/ptrace regress hangs.
   OK kettenis@
VersionDeltaFile
1.254+2-2sys/kern/kern_exit.c
+2-21 files

LLVM/project 426a44aclang/test/AST/HLSL Textures-scalar-AST.hlsl Textures-vector-AST.hlsl

[HLSL] Consolidate texture tests (#209348)

Fixes #205878 

This PR consolidates all the current texture tests into files that all
texture types can extend by adding new RUN lines.

This should greatly reduce the amount of effort required to implement
and review tests for new texture types.

Assisted by: Claude Opus 4.8
DeltaFile
+932-0clang/test/AST/HLSL/Textures-scalar-AST.hlsl
+932-0clang/test/AST/HLSL/Textures-vector-AST.hlsl
+0-931clang/test/AST/HLSL/Texture2DArray-scalar-AST.hlsl
+0-931clang/test/AST/HLSL/Texture2DArray-vector-AST.hlsl
+0-905clang/test/AST/HLSL/Texture2D-vector-AST.hlsl
+0-905clang/test/AST/HLSL/Texture2D-scalar-AST.hlsl
+1,864-3,67287 files not shown
+3,918-7,30993 files

LLVM/project 543e714utils/bazel/llvm-project-overlay/lldb BUILD.bazel

[lldb][bazel] Add the lldb-mcp binary to the Bazel overlay (#209498)

#143628 added the lldb-mcp tool (an MCP server multiplexer for LLDB),
built by lldb/tools/lldb-mcp/CMakeLists.txt. The Bazel overlay already
models the ProtocolMCP library and the MCP protocol-server plugin, but
not the lldb-mcp executable itself, so it is missing from the Bazel
build.

Add an lldb-mcp cc_binary modeled on the existing lldb-dap target: glob
tools/lldb-mcp/**, expand the macOS Info.plist via expand_template, and
depend on liblldb.wrapper, Host, Utility, ProtocolMCP, and the LLVM
Option/Support libraries. lldb-mcp has no Options.td, so unlike lldb-dap
no gentbl_cc_library is needed.

This properly translates into BUCk internally at Meta and then builds
with buck2, but I cannot validate the bazel build of this new target
directly.

bazel rule generation assisted with: claude
DeltaFile
+39-0utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+39-01 files

OPNSense/src be59543sys/dev/igc if_igc.c

next
DeltaFile
+3-2sys/dev/igc/if_igc.c
+3-21 files

OpenBSD/src ikhrfdLusr.bin/tmux server-client.c

   Small section missed from previous.
VersionDeltaFile
1.494+31-4usr.bin/tmux/server-client.c
+31-41 files

NetBSD/pkgsrc-wip 640323e. TODO

TODO: + tor-browser-15.0.18.
DeltaFile
+1-1TODO
+1-11 files

LLVM/project 8bc9daellvm/lib/Target/WebAssembly WebAssemblyArgumentMove.cpp WebAssembly.h

[WebAssembly] Port WebAssemblyArgumentMovePass

Standard NewPM pass porting.

Reviewers: aheejin, sbc100, dschuff

Pull Request: https://github.com/llvm/llvm-project/pull/209368
DeltaFile
+23-7llvm/lib/Target/WebAssembly/WebAssemblyArgumentMove.cpp
+10-2llvm/lib/Target/WebAssembly/WebAssembly.h
+3-3llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+1-1llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+1-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+38-135 files