LLVM/project 0a4d470llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.abs.ll regbankselect-abs.mir

AMDGPU/GlobalISel: RegBankLegalize rules for G_ABS (#192760)
DeltaFile
+54-143llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll
+56-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+7-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+3-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+1-2llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-abs.mir
+2-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
+123-1476 files

LLVM/project 3c7c4d4llvm/lib/CodeGen SelectOptimize.cpp, llvm/test/CodeGen/X86 select-optimize-psi.ll

[SelectOptimize] Update Missing PSI Error Message, Add Test (#193034)

Update the error message to omit a period/start with a lowercase letter
per the coding standards. Also add a test as suggested in post-commit
feedback on #192871.

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+10-0llvm/test/CodeGen/X86/select-optimize-psi.ll
+2-2llvm/lib/CodeGen/SelectOptimize.cpp
+12-22 files

LLVM/project 69ebdbcllvm/docs LangRef.rst

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+3-1llvm/docs/LangRef.rst
+3-11 files

LLVM/project d86ad85clang/test/Lexer cxx-features.cpp

fix build
DeltaFile
+4-4clang/test/Lexer/cxx-features.cpp
+4-41 files

LLVM/project a5c12acclang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsage.h UnsafeBufferUsageExtractor.h, clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary TUSummary.h

[clang][SSAF] Add missing `explicit` to single-argument constructors (#193052)

This PR adds `explicit` to `TUSummary`,
`UnsafeBufferUsageTUSummaryExtractor`, and
`UnsafeBufferUsageEntitySummary` constructors. This ensures uniform use
of `explicit` for all SSAF single-argument constructors.
DeltaFile
+2-2clang/unittests/ScalableStaticAnalysisFramework/TUSummaryBuilderTest.cpp
+2-2clang/unittests/ScalableStaticAnalysisFramework/Analyses/CallGraph/CallGraphExtractorTest.cpp
+2-1clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
+2-1clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummary.h
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsage.h
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.h
+10-86 files

LLVM/project f3109e2clang/include/clang/ScalableStaticAnalysisFramework/Core/SummaryData SummaryDataStore.h SummaryDataTraits.h

[clang][SSAF][NFC] Add `HasSummaryName_v` convenience alias to match `HasAnalysisName_v` (#193054)
DeltaFile
+3-3clang/include/clang/ScalableStaticAnalysisFramework/Core/SummaryData/SummaryDataStore.h
+3-0clang/include/clang/ScalableStaticAnalysisFramework/Core/SummaryData/SummaryDataTraits.h
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Core/SummaryData/SummaryDataBuilder.h
+7-43 files

FreeBSD/src 1b8e5c0sys/amd64/amd64 mp_machdep.c

amd64: fix INVLPGB range invalidation

AMD64 Architecture Programmer's Manual Volume 3 says the following:

> ECX[15:0] contains a count of the number of sequential pages to
> invalidate in addition to the original virtual address, starting from
> the virtual address specified in rAX. A count of 0 invalidates a
> single page. ECX[31]=0 indicates to increment the virtual address at
> the 4K boundary. ECX[31]=1 indicates to increment the virtual address
> at the 2M boundary. The maximum count supported is reported in
> CPUID function 8000_0008h, EDX[15:0].

ECX[31] being what we call INVLPGB_2M_CNT, signaling to increment the
VA by 2M.

> This instruction invalidates the TLB entry or entries, regardless of
> the page size (4 Kbytes, 2 Mbytes, 4 Mbytes, or 1 Gbyte). [...]

Combined with this, my interpretation of the current code is: if

    [20 lines not shown]
DeltaFile
+6-19sys/amd64/amd64/mp_machdep.c
+6-191 files

LLVM/project 9332051lldb/source/Target ThreadList.cpp Process.cpp, lldb/test/API/functionalities/always-run-threads TestAlwaysRunThreadNames.py main.cpp

[lldb] Add target.process.always-run-thread-names setting (#192870)

Add a process setting that keeps named threads running during
single-stepping operations. Some programs install in-process Mach
exception handler threads that must continue running to forward
exceptions. When lldb single-steps and suspends all other threads, these
handler threads stall, potentially causing a deadlock if the stepped
instruction raises an exception.

The new `target.process.always-run-thread-names` setting accepts a list
of thread name strings. In `ThreadList::WillResume`, threads whose names
match an entry in this list are resumed with `eStateRunning` instead of
`eStateSuspended`, ensuring they appear in vCont packets even during
single-thread stepping.

rdar://175038920
DeltaFile
+69-0lldb/test/API/functionalities/always-run-threads/TestAlwaysRunThreadNames.py
+48-0lldb/test/API/functionalities/always-run-threads/main.cpp
+25-3lldb/source/Target/ThreadList.cpp
+7-0lldb/source/Target/Process.cpp
+6-0lldb/source/Target/TargetProperties.td
+4-0lldb/test/API/functionalities/always-run-threads/Makefile
+159-31 files not shown
+160-37 files

LLVM/project 9562d48clang/docs ClangFormatStyleOptions.rst, clang/include/clang/Format Format.h

[clang-format] Add BreakParametersAfter formatting option (#181281)

Adds the `BreakParametersAfter`  option based on the feature request.

Resolves #54220.
DeltaFile
+143-48clang/include/clang/Format/Format.h
+141-18clang/docs/ClangFormatStyleOptions.rst
+82-28clang/unittests/Format/FormatTest.cpp
+53-13clang/unittests/Format/ConfigParseTest.cpp
+40-8clang/lib/Format/Format.cpp
+16-16clang/unittests/Format/AlignBracketsTest.cpp
+475-1317 files not shown
+530-15313 files

FreeBSD/ports ad752f7graphics/fractgen distinfo Makefile

graphics/fractgen: Update 3.0.7 => 3.0.8

Changelog:
https://github.com/dreibh/fractgen/blob/fractgen-3.0.8/ChangeLog

Commit log:
https://github.com/dreibh/fractgen/compare/fractgen-3.0.7...fractgen-3.0.8

PR:             294670
Sponsored by:   UNIS Labs
DeltaFile
+3-3graphics/fractgen/distinfo
+1-1graphics/fractgen/Makefile
+4-42 files

LLVM/project 09cb39dllvm/lib/Target/SPIRV SPIRVLegalizePointerCast.cpp, llvm/test/CodeGen/SPIRV/pointers load-store-matrix-in-struct.ll

[SPIR-V] Matrix in struct pointer legalization

When looking to load an object at the start of a struct, the types do
not always match exactly. When we have an HLSL matrix the type in the
load will not match the type in memory. We need to improve the pointer
legalization pass to look for any "compatible" type at the start of an
aggragate.

A compatible are two types that the pass knows know to convert from one
to another.

This involves a refactoring of the code to make the check more general.

Assisted-by: Gemini
DeltaFile
+122-101llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
+57-0llvm/test/CodeGen/SPIRV/pointers/load-store-matrix-in-struct.ll
+179-1012 files

LLVM/project 44abef1llvm/test/CodeGen/AArch64 addp-shuffle.ll faddp.ll

[AArch64] Extend testing of add-like-ors. NFC (#193071)
DeltaFile
+261-0llvm/test/CodeGen/AArch64/addp-shuffle.ll
+0-26llvm/test/CodeGen/AArch64/faddp.ll
+13-0llvm/test/CodeGen/AArch64/arm64-addp.ll
+274-263 files

LLVM/project a6fb8f9llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/RISCV mul-to-shl-nsw.ll

[DAGCombiner] Preserve nsw when folding (mul x, 2^c) to (shl x, c) (#192366)

When the multiplier is a power of two strictly less than 2^(BitWidth-1),
the signed multiplication cannot overflow any more than the equivalent
shift, so nsw transfers from the mul to the shl. At 2^(BitWidth-1) the
multiplier is the signed minimum and the equivalence breaks, so keep
the existing behaviour of dropping nsw in that case.

---------

Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
DeltaFile
+58-0llvm/test/CodeGen/RISCV/mul-to-shl-nsw.ll
+5-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+63-12 files

FreeBSD/doc 4a8f0e9website/content/ru/copyright daemon.adoc

website/ru: Update copyright/daemon.adoc

Update to EN 989d921f5d4ac8d8b7c831c13b8954ad1901be24
DeltaFile
+12-8website/content/ru/copyright/daemon.adoc
+12-81 files

LLVM/project af9f6d6llvm/include/llvm/IR IntrinsicsDirectX.td Intrinsics.h, llvm/lib/Analysis VectorUtils.cpp TargetTransformInfo.cpp

[NFC][VectorUtils] Simplify description of `TriviallyScalaraziable` intrinsics (#192505)

This pr allows us to specify if an intrinsic is `TriviallyScalarizable`
by specifying it in a more idiomatic way as an intrinsic property.

This was suggested here:
https://github.com/llvm/llvm-project/issues/120169#issuecomment-3805670982,
and would allow for the attached issue to be resolved in a similar
manner by having a `TriviallyVectorizable` property as well.

Assisted by: Github Copilot
DeltaFile
+37-37llvm/include/llvm/IR/IntrinsicsDirectX.td
+0-46llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
+13-0llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
+2-6llvm/lib/Analysis/VectorUtils.cpp
+0-5llvm/lib/Analysis/TargetTransformInfo.cpp
+5-0llvm/include/llvm/IR/Intrinsics.h
+57-9410 files not shown
+73-10916 files

LLVM/project 3572aa0llvm/lib/Target/SPIRV SPIRVEmitIntrinsics.cpp, llvm/test/CodeGen/SPIRV/pointers getelementptr-byte-addressing-array.ll struct-i8-dynamic-index.ll

[SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics

LLVM started generating [N x i8] types on array indexing GEPs. Emit
intrinsiscs did not know what to do with it so it was generating a
cast to [N x i8] to perform the GEP. This does not work in logical
addressing.

The handle this, we expand the `i8` gep handling for logical addressing
mode to work for arbitrary size byte addressing.
DeltaFile
+65-18llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+64-0llvm/test/CodeGen/SPIRV/pointers/getelementptr-byte-addressing-array.ll
+24-0llvm/test/CodeGen/SPIRV/pointers/struct-i8-dynamic-index.ll
+153-183 files

LLVM/project 5320cc5libcxx/include __mbstate_t.h

[libc++] Update `__mbstate_t.h` to include path to Android's `mbstate_t.h` (#192307)

Ever since ce4ac9945 started including `__mbstate_t.h` in this C++
`wchar.h`, the Android NDK sees some redefinition errors with
`-fmodules`, likely because this Android `mbstate_t.h` was not included.
Elliot, enh-google from the Android team, suggested this inclusion to
fix it, and it worked for me in my local testing: see
swiftlang/swift#85365 for the errors and more info. This fixes
android/ndk#2230, once it gets into the NDK sysroot.
DeltaFile
+2-0libcxx/include/__mbstate_t.h
+2-01 files

LLVM/project 29a9b63clang/lib/CIR/CodeGen CIRGenExprCXX.cpp CIRGenCleanup.cpp, clang/test/CIR/CodeGen new-delete.cpp

rebase

Created using spr 1.3.7
DeltaFile
+326-0clang/test/CIR/CodeGen/new-delete.cpp
+52-15clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+30-3offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+16-6clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
+16-2offload/plugins-nextgen/common/src/RecordReplay.cpp
+5-3clang/lib/CIR/CodeGen/CIRGenCleanup.h
+445-292 files not shown
+452-338 files

LLVM/project 8a4f8e5

dead include

Created using spr 1.3.7
DeltaFile
+0-00 files

LLVM/project 711cf04llvm/lib/CodeGen MachineBlockHashInfo.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-1llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+0-11 files

LLVM/project f6ce253offload/plugins-nextgen/common/src RecordReplay.cpp, offload/tools/kernelreplay llvm-omp-kernel-replay.cpp

[offload] Verify replay config of teams/threads is allowed (#192784)
DeltaFile
+30-3offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+16-2offload/plugins-nextgen/common/src/RecordReplay.cpp
+46-52 files

LLVM/project 72861aeclang/lib/CIR/CodeGen CIRGenExprCXX.cpp CIRGenCleanup.cpp, clang/test/CIR/CodeGen new-delete.cpp

[CIR] Implement support for delete after new in a conditional branch (#192544)

This implements handling for calling delete in an EH handler after a
call to new when the new call appears inside a conditional operation,
which requires the new result to be spilled inside the cleanup scope and
reloaded after.

This implementation introduces the DominatingValue helper class, which
is adapted from classic codegen, but only the parts of that class that
are needed for the current change are implemented. This will likely be
expanded in a future change as other uses are added.

Assisted-by: Cursor / claude-4.6-opus-high
DeltaFile
+326-0clang/test/CIR/CodeGen/new-delete.cpp
+52-15clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+16-6clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
+5-3clang/lib/CIR/CodeGen/CIRGenCleanup.h
+2-4clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+5-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+406-286 files

LLVM/project b01f02fllvm/test/Transforms/LoopVectorize/ARM mve-interleaved-cost.ll, llvm/test/Transforms/PhaseOrdering inline-store-to-load.ll

rebase

Created using spr 1.3.7
DeltaFile
+428-526llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
+309-281mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+212-121offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+47-173mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+119-0mlir/lib/Dialect/GPU/Transforms/IndexedAccessOpInterfaceImpl.cpp
+113-0llvm/test/Transforms/PhaseOrdering/inline-store-to-load.ll
+1,228-1,101101 files not shown
+2,470-1,686107 files

LLVM/project 555ec3allvm/test/Transforms/LoopVectorize/ARM mve-interleaved-cost.ll, llvm/test/Transforms/PhaseOrdering inline-store-to-load.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+428-526llvm/test/Transforms/LoopVectorize/ARM/mve-interleaved-cost.ll
+309-281mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+212-121offload/tools/kernelreplay/llvm-omp-kernel-replay.cpp
+47-173mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+119-0mlir/lib/Dialect/GPU/Transforms/IndexedAccessOpInterfaceImpl.cpp
+113-0llvm/test/Transforms/PhaseOrdering/inline-store-to-load.ll
+1,228-1,101103 files not shown
+2,499-1,691109 files

LLVM/project c65d40bclang/docs ReleaseNotes.rst, clang/include/clang/Basic AttrDocs.td

[Clang][AMDGPU] Deprecate `amdgpu-num-vgpr` and `amdgpu-num-sgpr` (#193023)

We will just emit a warning at this moment. This will still take effect
for regular compilation, but in object linking, we will simply ignore
them.
DeltaFile
+16-0clang/test/SemaOpenCL/amdgpu-num-sgpr-vgpr-deprecated.cl
+6-4llvm/docs/AMDGPUUsage.rst
+8-0clang/docs/ReleaseNotes.rst
+5-1clang/include/clang/Basic/AttrDocs.td
+5-0llvm/docs/ReleaseNotes.md
+4-0clang/test/CIR/CodeGenHIP/amdgpu-attrs.hip
+44-56 files not shown
+56-912 files

NetBSD/pkgsrc-wip 420a8f8xrdp TODO

xrdp: Add recent CVEs
DeltaFile
+2-1xrdp/TODO
+2-11 files

LLVM/project fed6a2dllvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen MachineBlockHashInfo.h Passes.h

newPM

Created using spr 1.3.7
DeltaFile
+33-45llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+36-2llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+0-4llvm/include/llvm/CodeGen/Passes.h
+3-0llvm/include/llvm/Passes/MachinePassRegistry.def
+1-1llvm/test/CodeGen/X86/machine-block-hash.mir
+0-1llvm/include/llvm/InitializePasses.h
+73-532 files not shown
+74-548 files

LLVM/project 354d62cllvm/include/llvm/CodeGen MachineBlockHashInfo.h, llvm/lib/CodeGen MachineBlockHashInfo.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+16-3llvm/lib/CodeGen/MachineBlockHashInfo.cpp
+13-2llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
+29-52 files

LLVM/project 47da700lldb/docs index.rst

[lldb][docs] Reorganize website navigation into topic-based sections (#192805)

As we've kept adding more documentation, the website has grown beyond
what's easily navigated. This PR breaks the two flat "Using LLDB" and
"Developing LLDB" sections into smaller, audience-oriented categories:

1. Getting Started: tutorial, GDB-to-LLDB map, settings,
troubleshooting, man page
2. Using LLDB: variables, formatting, symbolication, symbols, on-demand,
remote
3. IDE & Tool Integration: lldb-dap, MCP
4. Platform-Specific Topics: AArch64 Linux, Intel PT
5. Scripting LLDB: Python reference, API, extensions (unchanged)
6. Contributing to LLDB: overview, contributing, build, test, debugging,
fuzzing
7. Architecture & Internals: C++ APIs, SB API, data formatters,
formatter bytecode, language support, caveats, projects
8. Protocol & Format Specifications: symbol file JSON, GDB remote
extensions, platform packets

    [4 lines not shown]
DeltaFile
+57-29lldb/docs/index.rst
+57-291 files

FreeBSD/ports ab13cadnet/td-system-tools pkg-plist distinfo

net/td-system-tools: Update 2.2.5 => 2.3.1

Changelog:
https://github.com/dreibh/system-tools/blob/td-system-tools-2.3.1/ChangeLog

Commit log:
https://github.com/dreibh/system-tools/compare/td-system-tools-2.2.5...td-system-tools-2.3.1

PR:             294671
Sponsored by:   UNIS Labs
DeltaFile
+11-0net/td-system-tools/pkg-plist
+3-3net/td-system-tools/distinfo
+1-1net/td-system-tools/Makefile
+15-43 files