[VPlan] Directly pass SrcEltTy when constructing WideGEP (NFC) (#200043)
Avoid getting the source element type from the underlying instruction,
and make the underlying instruction optional.
PR/59452: Marcin Gondek: Add a new mount flag "nowccmsg" to suppress printing
wcc-related messages. Apparently some synology server is causing them. This
just suppresses the messages, but does not change the behavior of the client.
[lldb][NFCI] Cleanup APIs in AppleObjCClassDescriptorV2 (#200122)
This removes unnecessary unique_ptrs and uses better error handling
(expected instead of bools).
deskutils/py-paperless-ngx: Move away from py-dj52-* ports
* The counterparts of the py-dj52-* ports were switched to Django 5.2
in ce59801b72ef, thus move py-paperless-ngx to those ones.
* Rename py-dj52-django-treenode to py-django-treenode, since there's
no equivalent for it yet.
* Bump PORTREVISION due changed dependencies.
PR: 291707
Approved by: grembo (maintainer, via private mail)
www/py-django-auditlog: Update to 3.4.0
* There is already a newer version available, but stick with this one
for now to stay in sync with the py-dj52 counterpart. This is being
done as a precaution to avoid any potential issues later on when
py-paperless-ngx is switched from py-dj52-django-auditlog to this
port.
Changelog since 3.0.0:
https://github.com/jazzband/django-auditlog/blob/v3.4.0/CHANGELOG.md
Approved by: grembo (maintainer, via private mail)
www/py-django-multiselectfield: Update to 0.1.13
* There are already newer versions available, but stick with this one
for now to stay in sync with the py-dj52 counterpart. This is being
done as a precaution to avoid any potential issues later on when
py-paperless-ngx is switched from py-dj52-django-multiselectfield to
this port.
* Also switch to the PEP517 build framework to make the port future
proof while I'm here.
Changelog:
https://github.com/goinnn/django-multiselectfield/blob/v0.1.13/CHANGES.rst
Approved by: grembo (maintainer, via private mail)
[SCEV] Canonicalise round-up idiom when some bits known (#197126)
Since #174380, instcombine can clear some set bits in the added constant
in expressions like this, when A has some known-clear low order bits.
(A + 15) & ~15
This transformation is valid, but can make it harder for later passes to
recognise this idiom for rounding up to a power of 2. This is causing
the ARM MVE tail predication pass to fail on loops with a trip count
which is a multiple of a small power of 2.
The fix is to reverse the transformation when building SCEV expressions,
canonicalising to always use the largest valid value for the added
constant.
Alive proofs:
https://alive2.llvm.org/ce/z/hhndoWhttps://alive2.llvm.org/ce/z/_JYVat
[AArch64][llvm] Deprecate FEAT_MPAMv2_VID
`FEAT_MPAMv2_VID` instructions and system registers, as introduced
in change d30f18d2c, are being deprecated at this time, as they've been
removed from the latest Arm ARM, which doesn't preclude them returning
in some form in future.
Other system registers introduced with `FEAT_MPAMv2` are unaffected,
and these continue to be ungated. `+mpamv2` gating is now renamed to
`+mpamv2-deprecated`, to avoid an ABI break. This makes it obvious that
it shouldn't be used.
Emit newline after IR-dump banner in PrintCallGraphPass (#199410)
Required for Compiler Explorer's opt-pipeline viewer: the tool parses
pass output by splitting on the IR-dump banner line, so the banner must
end with a newline. Without it, targets that exercise this pass cannot
be inspected through the opt-pipeline feature.
Assisted by Claude.
[flang][OpenMP] Event handles are not predetermined shared (#200055)
An event-handle variable that appears in a DETACH has its data-sharing
attributes determined according to the usual rules in the constructs
enclosing the clause.
[AArch64] Do not generate indexed addressing mode for volatile accesses (#196305)
Instructions performing register writeback do not set a valid
instruction syndrome, making it impossible to handle MMIO in protected
hypervisors. Suppress the use of postinc/preinc addressing modes for
volatile accesses, which may be used to interact with MMIO.
There are three different places that can form indexed addressing modes:
* GISel via isIndexingLegal()
* SDAG via getPreIndexedAddressParts() and getPostIndexedAddressParts()
* AArch64LoadStoreOptimizer
The the latter case, exclude volatile accesses on SP (which are relevant
for stack probing) and MTE tag stores, as both cannot be MMIO.
Fixes https://github.com/llvm/llvm-project/issues/173014.
bsdinstall: Use libarchive secure flags for extract
This doesn't really matter, as we trust that the installer tarballs are
not malicious, but it doesn't hurt to set these flags.
Reported by: Yuxiang Yang, Yizhou Zhao, Ao Wang, Xuewei Feng, Qi Li, and Ke Xu from Tsinghua University using GLM-5.1 from Z.ai
Reviewed by: markj
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D57274
snd_uaudio: Lock usbd_transfer_start() in uaudio_mixer_ctl_set()
This section would be previously locked by sound(4)'s mixer lock (see
e87654db5a09 ("snd_uaudio: Stop using mixer_get_lock()")), but
snd_uaudio(4) no longer uses it. This particular code path was missed
during testing, because my sound card does not reach it.
Fixes: 9a00e0b8ca56 ("snd_uaudio: Do not use snd_mixer->lock as mixer_lock")
Reported by: netchild
Tested by: netchild
Sponsored by: The FreeBSD Foundation
MFC after: 6 days
[llubi] Add basic support for provenance modeling (#185977)
There are four solutions to model the provenance in the memory:
1. `(allocid, bitindex)` for each bit: It follows the definition of byte
type.
2. `(allocid, bitindex)` for each byte: This assumes the pointer/byte
types are always byte-sized, and requires bitextract/bitinsert to shift
by multiples of 8, as posted in
https://discourse.llvm.org/t/rfc-add-a-new-byte-type-to-llvm-ir/89522/53.
I believe this is true in most real-world cases.
3. Assign a random tag for each memory object: The tag has the same
width as the address. It is stored in the memory like addresses. Thus,
each logical byte only occupies 4 bytes. When loading a pointer, the tag
is loaded and used to recover the provenance. Incorrect bit ordering
will result in nullary provenance (with a negligible rate of false
negatives). I think it is feasible because we can always turn a false
negative into a positive with a different seed. It is also compatible
with captured components
(https://github.com/dtcxzyw/llvm-ub-aware-interpreter/blob/d15dfef5bc0c1b30b05512bbc28fddb2b50cc0b1/ubi.h#L187)
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Previous commit introduced a logic bug.
Code needs to call ib_dump_free() for every context where
id matches ctx->ctx_id and ctx->ctx_re is set (this skips
adjout_prefix_dump contexts since there ctx_re is NULL).
OK tb@
[GitHub] Add InstCombine Contributor Guide to new contributor greeting comment (#199730)
I have always manually replied to new contributors, reminding them to
follow the InstCombine contributor guide. Let’s automate this process.
Now it will append the link to the guide when the PR changes the
InstCombine (and highly related components) files.
[CIR] Implement 'coroutine' exception handling lowering (#200045)
This patch implements the lowering to CIR for exception handling.
Unfortunately the missing components of Flatten-CFG don't work here, so
we only test that we get successfully to CIR, not to LLVM-IR.
This patch runs the 'await-resume' in a try/catch, and only if that
succeeds, does it run the coroutine body (also in a try/catch if there
is an exception handler).
This is nearly identical to the implementation in classic-codegen,
except we invert the resume-eh variable's value, so we can just use a
simple `if` op for the branch.
sys: add safe_read(9)
The MD function with MI interface to provide a way to read arbitrary
(canonical) KVA. amd64 only for now.
Reviewed by: markj
Tested by: aokblast
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D49566
