LLVM/project 3aad8a1llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU coexec-sched-flavor-classification.mir

[AMDGPU] Classify VMEM as VMEM for CoExecSched (#203396)

Previously classifyFlavor wasn't classifying buffer_loads as VMEM
DeltaFile
+61-0llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
+1-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+62-12 files

LLVM/project 77f7abcllvm/test/CodeGen/RISCV clmul.ll clmulr.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll clmul-sdnode.ll

[ISel] Improve `clmul` fallback implementation for `i32` and `i64` (#203727)

Improve the `clmul` fallback implementation for `i32..=i64`.

The new approach is "multiplication with holes", based on [bearssl
source](https://github.com/unkaktus/bearssl/blob/6a1dab03beac9a324fdaed36ffdeb5081ac64b9a/src/hash/ghash_ctmul64.c#L27-L56),
https://www.bearssl.org/constanttime.html#ghash-for-gcm, and the
[polyval](https://github.com/RustCrypto/universal-hashes/blob/815ddc90ea652b09804565e193e34784c94a3849/polyval/src/field_element/soft.rs#L74-L108)
crate. https://www.bearssl.org/constanttime.html#ghash-for-gcm explains
the idea.

Future work is

- extend the fallback to smaller integer types. These can use a smaller
hole (the wider hole works but uses more instructions than the naive
fallback)
- investigate how to extend this approach to wider integers. We can use
wider holes, but a recursive definition defined in terms of smaller
integer types might be better.

    [7 lines not shown]
DeltaFile
+25,784-36,416llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+12,227-23,140llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+4,004-11,142llvm/test/CodeGen/RISCV/clmul.ll
+3,502-9,174llvm/test/CodeGen/X86/clmul-vector.ll
+3,985-7,989llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,144-6,437llvm/test/CodeGen/RISCV/clmulr.ll
+53,646-94,29814 files not shown
+64,759-123,19620 files

LLVM/project 0757950llvm/include/llvm/ADT APFloat.h, llvm/lib/Support APFloat.cpp

[APFloat] Extend fltSemantics and drop special case E8M0 bit conversionJan/apfloat e8m0 (#204200)

This is one step towards being able to make APFloat extensible with
custom formats in the future.

fltSemantics gained a new flag to indicate lack of denormal support.
Combined with hasZero = 0 it means exponent 0 does not have a special
meaning. This makes it possible to remove the special case
implementation for initFromFloat8E8M0FNUAPInt and handle it in the
generic version.

The generic initFromIEEEAPInt function now also supports existing
fltSemantics flags for hasZero, and hasSignedRepr which where only
needed in the specialized initFromFloat8E8M0FNUAPInt.

Also adds new tests for bitcasting to and from APInt. There are several
tests involving bitcastToAPInt together with convert functions but none
explicitly verify the functionality of bitcastToAPInt.


    [4 lines not shown]
DeltaFile
+35-47llvm/lib/Support/APFloat.cpp
+71-0llvm/unittests/ADT/APFloatTest.cpp
+5-0llvm/include/llvm/ADT/APFloat.h
+111-473 files

LLVM/project 150ddcfllvm/test/CodeGen/AMDGPU spillv16Kernel.ll spillv16Kernel.mir

[AMDGPU][True16] NFC. update two lit test for spill v16 (#203922)

Follow up from
https://github.com/llvm/llvm-project/pull/203589#discussion_r3406309174.
Update two tests
DeltaFile
+40-30llvm/test/CodeGen/AMDGPU/spillv16Kernel.ll
+48-0llvm/test/CodeGen/AMDGPU/spillv16Kernel.mir
+88-302 files

LLVM/project feace09llvm/test/CodeGen/AArch64 aggressive-interleaving.ll, llvm/test/Transforms/LoopVectorize/AArch64 aggressive-interleaving.ll

[AArch64] Move aggressive-interleaving.ll test to LoopVectorizer tests. NFC (#204652)

It looks like this test was put into CodeGen where it would better live
with
other vectorizer tests in Transforms/LoopVectorize/AArch64.
DeltaFile
+324-0llvm/test/Transforms/LoopVectorize/AArch64/aggressive-interleaving.ll
+0-324llvm/test/CodeGen/AArch64/aggressive-interleaving.ll
+324-3242 files

FreeBSD/ports 2d5d5a7www/firefox distinfo Makefile

www/firefox: update to 152.0.1

Release Notes:
  https://www.firefox.com/en-US/firefox/152.0.1/releasenotes/

(cherry picked from commit 66f99305b44f239ac2daa9fe51cc6b4219737a45)
DeltaFile
+3-3www/firefox/distinfo
+1-1www/firefox/Makefile
+4-42 files

FreeBSD/ports 66f9930www/firefox distinfo Makefile

www/firefox: update to 152.0.1

Release Notes:
  https://www.firefox.com/en-US/firefox/152.0.1/releasenotes/
DeltaFile
+3-3www/firefox/distinfo
+1-1www/firefox/Makefile
+4-42 files

FreeBSD/doc c9a6912documentation README, website README

README: Remove unmaintained duplicates

These were exact copies of the the README at the root of the tree.
DeltaFile
+0-10documentation/README
+0-10website/README
+0-202 files

LLVM/project 410484flldb/source/Plugins/ObjectContainer/Universal-Mach-O ObjectContainerUniversalMachO.cpp, lldb/unittests CMakeLists.txt

[lldb][Mach-O] Fix two fuzzer-found hangs/crashes parsing universal Mach-O fat headers (#204471)

This fixes two denial-of-service issues in the universal (fat) Mach-O
container parser, both found by `lldb-target-fuzzer` and both reachable
from
`SBDebugger::CreateTarget` → `ObjectFile::GetModuleSpecifications` →
`ObjectContainerUniversalMachO::{GetModuleSpecifications,ParseHeader}`.

### 1. Bound the fat header arch loop by available data

`ParseHeader` read the untrusted 32-bit `nfat_arch` field and used it
directly
as the loop bound when indexing the `fat_arch` records, without
validating it
against the data actually present. A crafted header claiming
`nfat_arch = 0xFFFFFFFF` with only a few bytes of payload made the loop
spin
~4.29 billion times — `ValidOffsetForDataOfSize()` fails on every
iteration

    [44 lines not shown]
DeltaFile
+119-0lldb/unittests/ObjectContainer/ObjectContainerUniversalMachOTest.cpp
+11-1lldb/source/Plugins/ObjectContainer/Universal-Mach-O/ObjectContainerUniversalMachO.cpp
+9-0lldb/unittests/ObjectContainer/CMakeLists.txt
+1-0lldb/unittests/CMakeLists.txt
+140-14 files

LLVM/project ece20efmlir/lib/Conversion/MemRefToEmitC MemRefToEmitC.cpp, mlir/test/Conversion/MemRefToEmitC memref-with-custom-types.mlir

[mlir][emitc] Apply type converter to memref element types in -convert-memref-to-emitc (#203742)

This change fixes a few places where the memref-to-emitc
conversion didn't properly convert memref element types.

This PR updates both memref.alloc and memref.copy to convert the memref
element type when using the element type for `sizeof` calls, as well as
generating the output pointer type (just for `alloc`).

This was missed because there are no `convert-to-emitc` tests that use a
type converter with custom types, so I added such a registration to the
test dialect. It is worth noting that, while this patch only affects
`-convert-memref-to-emitc`, the change has no impact without the
additional type converter registrations in `-convert-to-emitc` because
there are no builtin types that have nontrivial emit conversions today.

As a drive-by improvement, I deduped a "total size in bytes" calculation
that was happening in the lowerings for both `memref.alloc` and
`memref.copy`.
DeltaFile
+26-22mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
+46-0mlir/test/Conversion/MemRefToEmitC/memref-with-custom-types.mlir
+19-0mlir/test/lib/Dialect/Test/TestDialectInterfaces.cpp
+2-0mlir/test/lib/Dialect/Test/CMakeLists.txt
+2-0utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
+95-225 files

LLVM/project 0edadaellvm/lib/Target/RISCV RISCVInstrInfoXCV.td RISCVSubtarget.h, llvm/test/CodeGen/RISCV xcvbitmanip.ll

[RISCV][XCV] Fix incorrect llvm.ctlz lowering to cv.fl1 (#197288)

Fixes #197006.

The XCVbitmanip pattern `def : PatGpr<ctlz, CV_FL1, i32>;` is
semantically incorrect: `cv.fl1` returns a bit position while
`llvm.ctlz` returns a leading-zero count. They differ by up to 31 on
every non-zero input, miscompiling every use of `__builtin_clz`,
including compiler-rt's `__udivdi3`.

This PR:
- Replaces the pattern with one matching `llvm.ctlz` with
  `is_zero_poison=true`, lowered to `xori (cv.fl1 rs1), 31`.
- Adds explicit `setOperationAction` calls in `RISCVISelLowering.cpp`
  to route `ISD::CTLZ` to generic expansion and keep
  `ISD::CTLZ_ZERO_*` matched by the `.td` pattern.

The companion `def : PatGpr<cttz, CV_FF1, i32>;` is correct as-is
(both return 32 on zero, coincide on non-zero), and is left

    [3 lines not shown]
DeltaFile
+41-0llvm/test/CodeGen/RISCV/xcvbitmanip.ll
+4-1llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
+1-4llvm/lib/Target/RISCV/RISCVSubtarget.h
+2-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+48-54 files

FreeBSD/ports 0128591multimedia/snapcast Makefile pkg-plist

multimedia/snapcast: fix missing @sample in wrongly installed

PR:     261072
Approved by:    yuri (maintainer timeout, 1+ years)
DeltaFile
+3-1multimedia/snapcast/Makefile
+1-1multimedia/snapcast/pkg-plist
+4-22 files

LLVM/project e5ce3edllvm/test/Transforms/SLPVectorizer/X86 runtime-alias-checks.ll

[SLP][NFC]Add a test with rt checks in optsize function, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/204646
DeltaFile
+116-0llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
+116-01 files

LLVM/project 4a86da4compiler-rt/lib/scudo/standalone combined.h wrappers_c.cpp, compiler-rt/lib/scudo/standalone/fuzz get_error_info_fuzzer.cpp CMakeLists.txt

[scudo] Remove static error info functions. (#204483)

Android was the only platform using the static error info functions. The
latest Android no longer uses them, so delete these unused functions.

These functions were implicitly exporting implementation details and
made it difficult to implement the multi-region code. This is the final
step to submit the multi-region code and modify how the region code
works.

Remove the error info fuzzer since that was only necessary since so many
values were passed in to the function.
DeltaFile
+10-223compiler-rt/lib/scudo/standalone/combined.h
+0-52compiler-rt/lib/scudo/standalone/fuzz/get_error_info_fuzzer.cpp
+0-33compiler-rt/lib/scudo/standalone/wrappers_c.cpp
+1-12compiler-rt/lib/scudo/standalone/fuzz/CMakeLists.txt
+5-3compiler-rt/lib/scudo/standalone/include/scudo/interface.h
+16-3235 files

LLVM/project 2b76fe3libc/src/math/docs add_math_function.md

[libc][docs] Fix file path for fputil (#204534)

Fixes a nit in the file path ( replaces `FPUtils` correctly with `FPUtil` )  
DeltaFile
+2-2libc/src/math/docs/add_math_function.md
+2-21 files

LLVM/project 65a4081flang/lib/Semantics check-omp-structure.cpp, flang/test/Semantics/OpenMP requires10.f90 requires03.f90

[flang][OpenMP] Emit warning that REVERSE_OFFLOAD is not supported

Right now we quietly ignore it, whereas the OpenMP spec mandates a
compilation error for requirements that the implmentation does not
support.
The REVERSE_OFFLOAD was not causing a compilation error to allow
testing of incremental implementation improvements, but we should
at least warn about not supporting it.
DeltaFile
+1-9llvm/include/llvm/Frontend/OpenMP/OMP.td
+6-0flang/lib/Semantics/check-omp-structure.cpp
+2-0flang/test/Semantics/OpenMP/requires10.f90
+1-0flang/test/Semantics/OpenMP/requires03.f90
+1-0flang/test/Semantics/OpenMP/requires04.f90
+1-0flang/test/Semantics/OpenMP/requires05.f90
+12-95 files not shown
+17-911 files

LLVM/project dcf632aclang/test/Driver amdgpu-xnack-sramecc-flags.c, llvm/lib/Target/AMDGPU AMDGPUAsmPrinter.cpp

AMDGPU: Use module flags to control xnack and sramecc

This ensures these ABI details are encoded in the IR module
rather than depending on external state from command-line flags.
Previously, these were encoded as function-level subtarget features.
The code object output was a single target ID directive implied
by the global subtarget. The backend would previously check if a
function's subtarget feature mismatched the global subtarget. This
is avoided by making xnack and sramecc module-level properties from
the start. This also provides proper linker compatibility
enforcement, moving the error point earlier.

The old encoding was also an abuse of the subtarget feature system.
Subtarget features are a bitvector, and later features in the string
can override earlier ones. The old handling added a special case
where explicit settings were preserved: ordinarily +feature,-feature
should result in the feature being disabled, but +xnack,-xnack would
preserve the explicit "-xnack" state, which differs from the absence
of any xnack setting.

    [25 lines not shown]
DeltaFile
+52-52llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
+30-46llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+75-0llvm/test/CodeGen/AMDGPU/module-flag-xnack.ll
+36-33clang/test/Driver/amdgpu-xnack-sramecc-flags.c
+66-0llvm/test/CodeGen/AMDGPU/module-flag-sramecc.ll
+54-0llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
+313-13195 files not shown
+1,197-352101 files

LLVM/project a7d852cclang/test/Driver invalid-target-id.cl, llvm/include/llvm/TargetParser AMDGPUTargetParser.def

AMDGPU: Add subtarget feature for controllable xnack modes

This replaces the previously removed xnack-any-only feature,
with the inversion xnack-on-off-modes. All pre-gfx12.5 xnack
targets support the controllable mode. Ignore explicitly
set xnack settings the same way as is done for xnack requests
on other unsupported targets.
DeltaFile
+22-22llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
+13-11llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+22-0llvm/test/CodeGen/AMDGPU/target-id-xnack-always-on.ll
+21-0clang/test/Driver/invalid-target-id.cl
+14-6llvm/lib/Target/AMDGPU/AMDGPU.td
+2-8llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h
+94-476 files not shown
+105-5812 files

LLVM/project 872f3f0llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU i128-add-carry-chain.ll

[AMDGPU] Keep i64 carry chains on VCC when feeding VALU users

This PR fixes an issue where ISel could mix scalar and vector carry chains when
lowering widened integer add/sub operations. A scalar-looking i64 carry producer
may feed a divergent carry consumer, so ISel now keeps that carry chain on VCC
to avoid invalid MIR.
DeltaFile
+65-0llvm/test/CodeGen/AMDGPU/i128-add-carry-chain.ll
+36-2llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+101-22 files

LLVM/project ba11547clang/lib/CodeGen CodeGenModule.cpp

Address review comments
DeltaFile
+8-9clang/lib/CodeGen/CodeGenModule.cpp
+8-91 files

LLVM/project c5e1f9cllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Update llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Co-authored-by: Luke Lau <luke at igalia.com>
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-11 files

OPNSense/plugins 05bda33net/udpbroadcastrelay/src/opnsense/mvc/app/controllers/OPNsense/UDPBroadcastRelay/Api SettingsController.php

udpbroadcastrelay: remove stray semicolon in $internalModelClass (#5507)
DeltaFile
+1-1net/udpbroadcastrelay/src/opnsense/mvc/app/controllers/OPNsense/UDPBroadcastRelay/Api/SettingsController.php
+1-11 files

OpenBSD/src C7Cqnmdsbin/iked ikev2_pld.c

   iked: Avoid stack exhaustion by unbounded recursion

   Problem found and patch supplied by mfriedl at genua.de.  Similar
   report from zhangph12138 at 163.com, thanks!

   ok markus@
VersionDeltaFile
1.139+102-104sbin/iked/ikev2_pld.c
+102-1041 files

LLVM/project 8c64097lldb/source/Host/windows PythonRuntimeLoaderWindows.cpp

[lldb][Windows] fix missing include (#204628)

lldb fails to build when `LLDB_PYTHON_DLL_RELATIVE_PATH` is set because
of a missing include.
DeltaFile
+1-0lldb/source/Host/windows/PythonRuntimeLoaderWindows.cpp
+1-01 files

FreeNAS/freenas c708f6csrc/middlewared/middlewared/api/base/types json_schema.py, src/middlewared/middlewared/api/v25_10_0 common.py

NAS-141273 / 26.0.0-RC.1 / Remove shared pydantic `Field()` from API type aliases (by themylogin) (by bugclerk) (#19155)

## Problem

Several API fields that are declared *required* are silently treated as
**optional with a bogus default** at runtime. For example, on the
current API
(v25_10_4):

VMRAWDevice.path = '127.0.0.1' # required path field, no default
declared

`VMRAWDevice.path` is `path: NonEmptyString = Field(pattern=...)` — it
should be
required, but it inherits `'127.0.0.1'` (leaked from
`VMDisplayDevice.bind`).
So `vm.device.create` for a RAW device with no `path` passes validation
and
silently uses `'127.0.0.1'` as the file path instead of being rejected.

    [73 lines not shown]
DeltaFile
+30-0src/middlewared/middlewared/api/base/types/json_schema.py
+15-7src/middlewared/middlewared/api/v26_0_0/common.py
+11-6src/middlewared/middlewared/api/v25_10_1/common.py
+11-6src/middlewared/middlewared/api/v25_10_0/common.py
+11-6src/middlewared/middlewared/api/v25_10_4/common.py
+11-6src/middlewared/middlewared/api/v25_10_3/common.py
+89-3178 files not shown
+335-20484 files

LLVM/project 0a73d41bolt/lib/Passes LongJmp.cpp

[BOLT][AArch64] Only reserve constant-island space when an island exists (#204261)

`tentativeLayout()` aligns every function's tail to its constant island
alignment even when the function has no constant island. This over-padded
nearly every function, drifting tentative layout from emitted layout non
trivially, while the emitter only pads when emitting real constant island.
Guard with `estimateConstantIslandSize() > 0` so tentative better matches
emitted.
DeltaFile
+8-4bolt/lib/Passes/LongJmp.cpp
+8-41 files

Linux/linux 83f1454fs/ext4 fast_commit.c hash-test.c, fs/jbd2 journal.c

Merge tag 'ext4_for_linus-7.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4

Pull ext4 updates from Ted Ts'o:

 - A major rework of the fast commit mechanism to avoid lock contention
   and deadlocks. We also export snapshot statistics in
   /proc/fs/ext4/*/fc_info

 - Performance optimization for directory hash computation by processing
   input in 4-byte chunks and removing function pointers, along with new
   KUnit tests for directory hash

 - Cleanups in JBD2 to remove special slabs and use kmalloc() instead

 - Various bug fixes, including:
     - Early validation of donor superblock in EXT4_IOC_MOVE_EXT to
       avoid cross-fs deadlock
     - Fix for a kernel BUG in ext4_write_inline_data_end under
       data=journal

    [30 lines not shown]
DeltaFile
+633-171fs/ext4/fast_commit.c
+567-0fs/ext4/hash-test.c
+8-116fs/jbd2/journal.c
+90-3fs/ext4/ext4.h
+46-22fs/ext4/hash.c
+61-0include/trace/events/ext4.h
+1,405-31211 files not shown
+1,505-34517 files

FreeBSD/ports 802a745sysutils/py-hcloud distinfo Makefile

sysutils/py-hcloud: update to 2.22.0

Changes:        https://github.com/hetznercloud/hcloud-python/blob/v2.22.0/CHANGELOG.md
Reported by:    repology
DeltaFile
+3-3sysutils/py-hcloud/distinfo
+1-1sysutils/py-hcloud/Makefile
+4-42 files

LLVM/project fb6e3c8flang/docs/MeetingNotes/2026 2026-06-17.md

[flang] Add Flang Community Call Notes from June 17th meeting (#204622)
DeltaFile
+73-0flang/docs/MeetingNotes/2026/2026-06-17.md
+73-01 files

LLVM/project 59286c4llvm/test/CodeGen/AMDGPU coexec-sched-flavor-classification.mir

Update llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
DeltaFile
+1-1llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
+1-11 files