LLVM/project 60c1020llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/lib/Target/AArch64/MCTargetDesc AArch64ELFObjectWriter.cpp AArch64MCAsmInfo.cpp

[AArch64][AsmParser] Add MC support for %dtprel() relocation (#186599)

This patch adds support for the %dtprel relocation specifier in the
AArch64 assembler. This specifier is used to generate the
R_AARCH64_TLS_DTPREL64 relocation, which is used in .debug_info sections
to describe the location of thread-local variables.

Prerequisite for  https://github.com/llvm/llvm-project/pull/146572
DeltaFile
+27-0llvm/test/MC/AArch64/tls-dtprel64.s
+4-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
+2-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
+1-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+34-04 files

LLVM/project b37f8a5flang/lib/Parser source.cpp, flang/test/Semantics getsymbols02.f90

[flang] Fix extra "./" prefix in source file paths (#186212)

When a relative file search path in the current working directory was
passed to LocateSourceFile, an extra `./` was appended, producing paths
like "././test.F90". This caused the `__FILE__` macro to expand
incorrectly and did not match the behavior of other Fortran compilers
such as gfortran. This caused failures when running an external test
suites that parses `__FILE__` to generate test log filenames.

In LocateSourceFile and LocateSourceFileAll: do not append the search
path if it is the current working directory (`.`). In all other cases,
append the search path to the file name (original behavior).

The test expectation in getsymbols02.f90 is updated because the old
CHECK patterns matched the buggy "././" output.
DeltaFile
+18-4flang/lib/Parser/source.cpp
+2-2flang/test/Semantics/getsymbols02.f90
+20-62 files

FreeNAS/freenas 1b6a9cbsrc/middlewared/middlewared/plugins/apps rollback.py

remove
DeltaFile
+1-1src/middlewared/middlewared/plugins/apps/rollback.py
+1-11 files

FreeNAS/freenas e97606csrc/middlewared/middlewared/plugins/apps crud.py rollback.py

add more progress updates in apps
DeltaFile
+5-1src/middlewared/middlewared/plugins/apps/crud.py
+2-1src/middlewared/middlewared/plugins/apps/rollback.py
+2-1src/middlewared/middlewared/plugins/apps/upgrade.py
+2-0src/middlewared/middlewared/plugins/apps/custom_app.py
+11-34 files

LLVM/project a083e19llvm/include/llvm/Analysis TargetTransformInfoImpl.h, llvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlanAnalysis.cpp

[VPlan] Add the cost of spills when considering register pressure (#179646)

Currently when considering register pressure is enabled, we reject any
VF that has higher pressure than the number of registers. However this
can result in failing to vectorize in cases where it's beneficial, as
the cost of the extra spills is less than the benefit we get from
vectorizing.

Deal with this by instead calculating the cost of spills and adding that
to the rest of the cost, so we can detect this kind of situation and
still vectorize while avoiding vectorizing in cases where the extra cost
makes it not with it.
DeltaFile
+266-0llvm/test/Transforms/LoopVectorize/ARM/mve-reg-pressure-spills.ll
+87-7llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
+21-23llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+22-7llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+12-0llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+7-4llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
+415-414 files not shown
+439-4410 files

LLVM/project b5ef9e2mlir/lib/Dialect/XeGPU/Transforms XeGPUSubgroupDistribute.cpp, mlir/test/Dialect/XeGPU move-gpu-func-to-warp-op.mlir

[MLIR][XeGPU] Avoid crashing on `gpu.func` missing `gpu.return` (#186330)

Skip malformed `gpu.func` operations in `MoveFuncBodyToWarpOp`.
This prevents functions without a `gpu.return` terminator from
triggering an assertion.

Add a regression test covering a `gpu.func` missing a return terminator,
and switch the existing unknown-op test to `test.unknown` so the file no
longer needs `--allow-unregistered-dialect`.
While touching the test file, trim a few FileCheck lines that were
asserting printer details instead of the transform behavior.

Fix https://github.com/llvm/llvm-project/issues/186037
DeltaFile
+21-12mlir/test/Dialect/XeGPU/move-gpu-func-to-warp-op.mlir
+9-6mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+30-182 files

FreeBSD/ports 0aedfd5mail/roundcube distinfo Makefile

mail/roundcube: update to 1.6.14 releas

PR:             293904
Submitted by:   filis
DeltaFile
+3-3mail/roundcube/distinfo
+1-1mail/roundcube/Makefile
+4-42 files

FreeNAS/freenas aa3f51dsrc/middlewared/middlewared/plugins/zettarepl_ state.py

bettterrrrr
DeltaFile
+5-3src/middlewared/middlewared/plugins/zettarepl_/state.py
+5-31 files

LLVM/project dc0ba9bflang/lib/Optimizer/OpenACC/Analysis CMakeLists.txt

[flang][acc] Add missing dependency for checking CUF attributes (#187292)

PR https://github.com/llvm/llvm-project/pull/187161 introduced some
logic which checks CUF attributes. But this wasn't added properly to the
dependencies.
DeltaFile
+4-0flang/lib/Optimizer/OpenACC/Analysis/CMakeLists.txt
+4-01 files

FreeNAS/freenas dda9a30src/middlewared/middlewared/plugins/zettarepl_ state.py

betterrr
DeltaFile
+2-1src/middlewared/middlewared/plugins/zettarepl_/state.py
+2-11 files

FreeNAS/freenas 66f252bsrc/middlewared/middlewared/plugins/zettarepl_ state.py

fix bad code in zettarepl_/state.py
DeltaFile
+15-10src/middlewared/middlewared/plugins/zettarepl_/state.py
+15-101 files

LLVM/project 9871ad1llvm/lib/Transforms/Vectorize VPlanAnalysis.cpp VPlanAnalysis.h

[VPlan] Rename DataLayout -> DL

To fix the buildbot failure in https://lab.llvm.org/buildbot/#/builders/97/builds/12155
DeltaFile
+2-2llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+1-1llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
+3-32 files

Dreckly/dreckly 995c933graphics/xplot distinfo, graphics/xplot/patches patch-signed.c

xplot: Fix implicit function declarations
DeltaFile
+14-0graphics/xplot/patches/patch-signed.c
+1-0graphics/xplot/distinfo
+15-02 files

Dreckly/dreckly 18b342agraphics/xpaint distinfo, graphics/xpaint/patches patch-fileBrowser.c patch-print.c

xpaint: Fix implicit declarations.
DeltaFile
+10-8graphics/xpaint/patches/patch-fileBrowser.c
+14-0graphics/xpaint/patches/patch-print.c
+14-0graphics/xpaint/patches/patch-xpaintrw_readWriteBMP.c
+12-0graphics/xpaint/patches/patch-brushOp.c
+10-0graphics/xpaint/patches/patch-xpaintrw_readWriteSGI.c
+5-1graphics/xpaint/distinfo
+65-96 files

LLVM/project 88f8a2bflang/test/Lower/Intrinsics ishftc.f90 lbound.f90

[flang][NFC] Converted five tests from old lowering to new lowering (part 34) (#187175)

Tests converted from test/Lower/Intrinsics: is_iostat_value.f90,
ishft.f90, ishftc.f90, lbound.f90, leadz.f90
DeltaFile
+95-79flang/test/Lower/Intrinsics/ishftc.f90
+71-61flang/test/Lower/Intrinsics/lbound.f90
+40-31flang/test/Lower/Intrinsics/leadz.f90
+26-22flang/test/Lower/Intrinsics/ishft.f90
+10-10flang/test/Lower/Intrinsics/is_iostat_value.f90
+242-2035 files

LLVM/project 080bc25llvm/include/llvm/IR BasicBlock.h, llvm/lib/ExecutionEngine/Orc SpeculateAnalyses.cpp

[IR][NFCI] Remove *WithoutDebug (#187240)

The function instructionsWithoutDebug serves two uses: skipping debug
intrinsics and skipping pseudo instructions. Nonetheless, these
functions are expensive due to out-of-line filtering using
std::function. Ideally, the filter should be inlined, but that would
require including IntrinsicInst.h in BasicBlock.h.

We no longer use debug intrinsics, so the first use (parameter false) is
no longer needed. The second use is sometimes needed, but the
distinction between PseudoProbe instructions can be made at the call
sites more easily in many cases.

Therefore, remove instructionsWithoutDebug/sizeWithoutDebug.

c-t-t stage2-O3 -0.21%.
DeltaFile
+0-38llvm/unittests/IR/BasicBlockTest.cpp
+18-15llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+0-27llvm/lib/IR/BasicBlock.cpp
+0-21llvm/include/llvm/IR/BasicBlock.h
+5-6llvm/lib/ExecutionEngine/Orc/SpeculateAnalyses.cpp
+4-6llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
+27-11324 files not shown
+71-15830 files

FreeNAS/freenas a0ce0efsrc/middlewared/middlewared/plugins/zettarepl_ state.py

NAS-140346 / 26.0.0-BETA.2 / fix NoRowsWereUpdatedException in zettarepl (by yocalebo) (#18491)

Commit a08212fc46 (NAS-136213, June 2025) changed datastore.update from
raising RuntimeError('No rows were updated') to raising
`NoRowsWereUpdatedException()`.

The except RuntimeError in flush_state was correct before that commit —
it was specifically catching this "no rows updated" case. But when the
exception type was changed, nobody updated flush_state to match, so it
became a silently broken error handler.

To make matters even more confusing, an unrelated change in master
4b7769149f (NAS-140201) fixed this but because that was a much more
involved change it was never back ported.

Original PR: https://github.com/truenas/middleware/pull/18488

Co-authored-by: caleb <yocalebo at gmail.com>
DeltaFile
+3-2src/middlewared/middlewared/plugins/zettarepl_/state.py
+3-21 files

LLVM/project 9f4a1ebflang/include/flang/Parser message.h

[flang] Add const-qualified version of parser::Messages::messages() (#187250)
DeltaFile
+1-0flang/include/flang/Parser/message.h
+1-01 files

LLVM/project 3a3f863llvm/test/CodeGen/X86 sse-minmax.ll sse-minmax-finite.ll

[X86] sse-minmax.ll - add baseline SSE2 test coverage (#187283)

Also removed a load of orphaned RELAX checks
DeltaFile
+418-237llvm/test/CodeGen/X86/sse-minmax.ll
+2-1llvm/test/CodeGen/X86/sse-minmax-finite.ll
+420-2382 files

LLVM/project 5e32027mlir/lib/Rewrite FrozenRewritePatternSet.cpp, mlir/test/mlir-opt debugcounter.mlir

[MLIR] Fix crash in FrozenRewritePatternSet when PDL lowering is skipped by debug counter (#186159)

When using --mlir-debug-counter=pass-execution-skip=N, the MLIR debug
counter can skip the internal PDL-to-PDLInterp lowering pass that runs
inside FrozenRewritePatternSet's constructor. This caused an assertion
failure in PDLByteCode::Generator::generate() because the PDL module
wasn't properly converted to the interpreter dialect.

The fix adds a check after the PDL lowering pipeline runs to verify that
the expected matcher function symbol was produced. If the symbol is
absent (e.g., because the lowering was skipped by a debug counter),
bytecode generation is skipped entirely and PDL patterns are not
applied. This allows debug counter bisection to work without crashing.

Fixes #131441
Fixes #128342

Assisted-by: Claude Code
DeltaFile
+10-0mlir/lib/Rewrite/FrozenRewritePatternSet.cpp
+6-0mlir/test/mlir-opt/debugcounter.mlir
+16-02 files

LLVM/project bf46a95llvm/lib/Transforms/Vectorize VPlanRecipes.cpp VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize optsize.ll

[VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (#186361)

Fixes #186005

On RV32 with zve32x, i.e. no legal 64 bit types either scalar or vector,
@llvm.cttz.elts.i64 cannot be lowered and so returns an illegal cost for
scalable VFs. However VPInstruction::FirstActiveLane and
VPInstruction::LastActiveLane always use a hardcoded i64 type.

This causes a legacy/VPlan cost model mismatch in the live-out.ll test,
and in early-exit-live-out.ll prevents the scalable VF from being
chosen.

This PR teaches the two VPInstructions to use the target's index type,
i.e. the width of a pointer in the default address space, so it will
generate a 32 bit cttz.elts on RV32. This should be large enough to hold
the maximum number of elements in a vector, as if the vector was any
bigger it would imply it isn't accessible by memory.


    [2 lines not shown]
DeltaFile
+176-0llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
+97-0llvm/test/Transforms/LoopVectorize/RISCV/live-out.ll
+25-25llvm/test/Transforms/LoopVectorize/optsize.ll
+12-11llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+9-5llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+5-2llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+324-431 files not shown
+326-437 files

FreeBSD/ports 0a8edbebenchmarks/hipercontracer pkg-plist distinfo

benchmarks/hipercontracer: Update 2.1.11 => 2.1.12

While here, remove %%PYTHON_SUFFIX%% from pkg-plist.

Changelog:
https://github.com/dreibh/hipercontracer/blob/hipercontracer-2.1.12/ChangeLog

Commit log:
https://github.com/dreibh/hipercontracer/compare/hipercontracer-2.1.11...hipercontracer-2.1.12

PR:             293801
Reported by:    Thomas Dreibholz <thomas.dreibholz at gmail.com> (maintainer)
Approved by:    maintainer, vvd (mentor)
DeltaFile
+26-26benchmarks/hipercontracer/pkg-plist
+3-3benchmarks/hipercontracer/distinfo
+1-1benchmarks/hipercontracer/Makefile
+30-303 files

LLVM/project fc569dalibcxx/include unordered_set unordered_map, libcxx/include/__functional is_transparent.h

[libc++] Refactor __is_transparent_v to make it clear what it depends on (#186419)

__is_transparent_v used to accept an additional _Key template argument
whose sole purpose was to make the instantiation as a whole dependent.
It turns out that creates confusion around whether that trait takes into
account the key type (it does not). Instead, we can use our traditional
approach for making template params artificially dependent, which allows
removing the confusing parameter.

For disclaimer, I authored this patch with Claude code just to see if I
could get it to do the right thing. It works, but you have to steer it
right.

Fixes #186417
DeltaFile
+48-12libcxx/include/unordered_set
+48-12libcxx/include/unordered_map
+27-27libcxx/include/map
+20-20libcxx/include/set
+3-3libcxx/include/__functional/is_transparent.h
+146-745 files

LLVM/project a4ef581llvm/lib/Transforms/InstCombine InstCombineLoadStoreAlloca.cpp, llvm/test/Transforms/InstCombine gep-replace-idx-zero-multi-use.ll

[InstCombine] RAUW for proven zero-indexed GEPs rather than cloning for a specific user (#185053)

When analyzing operands of loads/stores, if we can guarantee that a GEP
is always zero-indexed, it is better to modify the GEP such that other
users can take advantage of the simplification, rather than just cloning
it for one specific load/store user. Edit: implementation changed to
call replaceInstUsesWith instead of modifying in place.

Without this change, replaceGEPIdxWithZero clones the GEP for the
triggering load/store, leaving the original variable-indexed GEP in
place. Other users of that GEP (e.g., a constant-offset GEP feeding a
second load) miss the simplification. Testcase demonstrates this:
without the first load _modifying_ the gep, the _second_ load will still
be dependent on both GEPs, and thus unnecessarily dependent on the %idx.
This lack of simplification can cause issues with later passes such as
LICM.

Alternative approaches could be to add a version of this transform into
visitGEP, but there is precedent to doing so in visitLoad/visitStore,

    [8 lines not shown]
DeltaFile
+121-0llvm/test/Transforms/InstCombine/gep-replace-idx-zero-multi-use.ll
+9-0llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+130-02 files

NetBSD/pkgsrc AwuKN23graphics/xbmbrowser distinfo, graphics/xbmbrowser/patches patch-ab patch-ad

   xbmbrowser: Fix building with recent GCC.
VersionDeltaFile
1.2+25-6graphics/xbmbrowser/patches/patch-ab
1.2+13-5graphics/xbmbrowser/patches/patch-ad
1.1+14-0graphics/xbmbrowser/patches/patch-IconLabel.c
1.10+4-3graphics/xbmbrowser/distinfo
+56-144 files

NetBSD/src VOzIgtQtests/bin/sh t_expand.sh

   PR bin/60099 fix a (harmless) c&p issue in previous

   The test name used in failure error messages suffered from
   a c&p problem (cut from the wrong place).   No effect upon
   the tests themselves, just the error message produced when
   a test case fails.
VersionDeltaFile
1.25+2-2tests/bin/sh/t_expand.sh
+2-21 files

Dreckly/dreckly 690d9edgraphics/xbmbrowser distinfo, graphics/xbmbrowser/patches patch-IconLabel.c

xbmbrowser: document patch
DeltaFile
+2-0graphics/xbmbrowser/patches/patch-IconLabel.c
+1-1graphics/xbmbrowser/distinfo
+3-12 files

LLVM/project 7a2193coffload CMakeLists.txt

[Offload] Add CMake alias for CI (#186099)

In the pre-merge CI we need a top-level visible target that can be used
to build offload, i.e., libomptarget and LLVMOffload.

The related PR to include offload into pre-merge CI is here:
https://github.com/llvm/llvm-project/pull/174955
DeltaFile
+13-0offload/CMakeLists.txt
+13-01 files

LLVM/project b85cf95flang/include/flang/Optimizer/OpenACC/Analysis FIROpenACCSupportAnalysis.h, flang/lib/Optimizer/OpenACC/Analysis FIROpenACCSupportAnalysis.cpp

[mlir][acc] Move acc routine functions into GPU module (#187161)

The OpenACC routine directive defines functions that may be called from
device code; those functions (and any device-required callees) must be
present in the device compilation unit. This PR introduces
ACCRoutineToGPUFunc pass which moves materialized acc routines into the
GPU module as gpu.func so they can be compiled for the device.

This adds testing showing the pass on both MLIR and FIR. The FIR tests
required improvements in OpenACCSupport implementation to ensure that
CUF and Fortran runtime is considered as legal for GPU.
DeltaFile
+328-0mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineToGPUFunc.cpp
+103-0flang/test/Fir/OpenACC/acc-routine-to-gpu-func.fir
+60-0mlir/test/Dialect/OpenACC/acc-routine-to-gpu-func.mlir
+34-0flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
+11-0mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
+4-0flang/include/flang/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.h
+540-01 files not shown
+541-07 files

Dreckly/dreckly a69890fgraphics/xbmbrowser distinfo, graphics/xbmbrowser/patches patch-ab patch-ad

xbmbrowser: Fix building with recent GCC.
DeltaFile
+24-5graphics/xbmbrowser/patches/patch-ab
+12-4graphics/xbmbrowser/patches/patch-ad
+12-0graphics/xbmbrowser/patches/patch-IconLabel.c
+3-2graphics/xbmbrowser/distinfo
+51-114 files