[CIR] Add missing Coroutine region successors (#230466)
* A coroutine may be destroyed after its `initial_suspend`. Add an edge
from there to `destroy`
* `suspend` has no edge to `resume`. Add this, too
[Option] Add Condition for build-conditional library options (#230898)
A field under `let Condition = AssertsOnly` declares its member, table
row, and parser case under `#if !defined(NDEBUG)`. In other builds, the
command line rejects the option as an unknown argument, and readers must
be guarded like those of a conditional cl::opt. An OptionsStruct's table
rows refer to groups and alias targets by OPT_ enumerator, since an
omitted row shifts the IDs after it.
Port -loop-fusion-verbose-debug and -stress-ivchain, the NDEBUG-only
Scalar options.
Aided by Opus 5.5
[WebKit checkers] Treat destruction of a null smart pointer temporary as trivial (#230809)
TrivialFunctionAnalysis treated HashMap<K, Ref<V>>::get as non-trivial
because its miss path, MappedTraits::peek(MappedTraits::emptyValue()),
creates and destroys a temporary Ref<V> constructed from
HashTableEmptyValue. Ref's destructor calls deref(), which may delete,
so any local raw pointer obtained from such a HashMap was reported by
alpha.webkit.UncountedLocalVarsChecker even in otherwise trivial
contexts.
Skip the destructor check of a temporary owning smart pointer when it is
known to hold nullptr: one which is default constructed, constructed
from nullptr or HashTableEmptyValue, copied or moved from such a smart
pointer, or returned by a function whose body is a single return
statement of such a smart pointer (e.g.
HashTraits<Ref<T>>::emptyValue()).
Also treat CXXScalarValueInitExpr (e.g. T() for a scalar T as in
GenericHashTraits<T>::emptyValue()) as trivial.
Authored with Claude Code.
Merge tag 'landlock-7.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mic/linux
Pull Landlock fix from Mickaël Salaün:
"This fixes a Clang bug by removing an annotation, which was introduced
mostly for documentation"
* tag 'landlock-7.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/mic/linux:
landlock: Drop __counted_by from landlock_domain.handled_masks
[RISCV][P-ext] Re-generate rvp-intrinsics.c. NFC (#230691)
This fixes cases that used RV32 and RV64 instead of the common CHECK.
This also fixes cases where a mix of CHECK and RV32/RV64 were used in
the same function. The script is unable to do this so they must have
been manually written. Manual checks place burden on future editors of
this file since they can't use the script output directly.
[RISCV][P-ext] Move scalar mulh intrinsic tests to rv32p.ll and rv64p.ll. NFC (#230716)
These were in a file with simd in its name, but they aren't simd.
Assisted-by: Claude
Merge tag 'spi-fix-v7.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi fixes from Mark Brown:
"A small collection of driver specific fixes, plus a new device ID in
the DesignWare device tree binding.
One of the sg2044 fixes which enforces clock limits properly is more
critical than average since getting them wrong might lead to data
corruption"
* tag 'spi-fix-v7.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: dt-bindings: snps,dw-apb-ssi: Add Synaptics sl2610 spi
spi: sg2044-nor: Honor SPI clock limits
spi: sg2044-nor: Return transfer errors
spi: cadence-qspi: Fix status polling with octal DTR chips
spi: spi-nxp-fspi: exit stop mode before waiting for DLL lock
sysutils/smartmontools: migrate to the libusb api
This should fix problems with CURRENT and aligned with an upstream
change. While here - also update pkg-message
PR: 297564
Merge tag 'regulator-fix-v7.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator fixes from Mark Brown:
"There's a couple of core fixes here: there were a couple of issues
with of_regulator_bulk_get_all() not behaving consistently with the
other bulk regulator APIs which caused memory leaks and error handling
issues in users.
We also have a couple of fairly standard driver specific fixes"
* tag 'regulator-fix-v7.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: ltc3676: don't read the write-only HRST and CLIRQ registers
regulator: of: state who owns the array from of_regulator_bulk_get_all()
regulator: of: fill in supply names in of_regulator_bulk_get_all()
regulator: tps6594-regulator: Fix n_linear_ranges for TPS65224 BUCK2-4
AMDGPU: Use TargetSubtarget.td in TargetDef tablegen tests
The -gen-amdgpu-target-def tests only need the subtarget and processor
classes. Include TargetSubtarget.td instead of Target.td, which also
checks that it works standalone, and drop the unneeded dummy Target.
The 14 llvm-tblgen RUN lines each parsed Target.td, which costs 1.29 G
instructions:u (Release+asserts); TargetSubtarget.td costs 0.005 G.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
AMDGPU: Use minimal tablegen inputs for TargetParser
Avoid parsing the heavyweight AMDGPU.td to generate the TargetParser
inc files. Only include the minimal subtarget information required.
llvm-min-tblgen -gen-amdgpu-target-def (Release+asserts):
wall instructions:u peak RSS .td deps
AMDGPU.td 12.16 s 79.49 G 909 MB 76
AMDGPUTargetParserDef.td 0.01 s 0.056 G 7 MB 10
R600.td 0.38 s 1.59 G 92 MB 57
R600TargetParserDef.td <0.01 s 0.008 G 6 MB 10
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
TableGen: Split subtarget and processor classes out of Target.td
Move the subtarget feature, predicate and processor definitions into
a separate file. In the future this will allow TargetParser tablegen
inputs to use them without parsing the full target definitions like
instructions, registers and intrinsics.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
vulnx: Add version 2.0.2
Modern CLI for exploring vulnerability data with powerful search,
filtering, and analysis capabilities.
What's Changed
Other Changes
fix: always emit is_* bool flags in JSON by @dogancanbakir in #468
fix: inject version via ldflags at build time by @XananasX7 in #467
fix: send api key in X-Api-Key header by @dogancanbakir in #472
fix: redact sensitive headers in HTTP request/response logs by @mirackayikci in #469
fix: remove unsupported search filter flags (#476) by @dogancanbakir in #477
chore: prepare v2.0.2 release by @ehsandeep in #480
Fix GCC warning by enclosing operand with parentheses. (#230939)
PR #174549 made a change to `APValue.h` which causes GCC to emit a
warning like this:
```
clang/include/clang/AST/APValue.h: In static member function ‘static clang::DynamicAllocLValue clang::DynamicAllocLValue::getFromOpaqueValue(const void*)’:
clang/include/clang/AST/APValue.h:114:54: warning: suggest parentheses around ‘-’ in operand of ‘&’ [-Wparentheses]
114 | V.AllocKind = Combined & (1 << NumAllocKindBits) - 1;
| ~~~~~~~~~~~~~~~~~~~~~~~~^~~
```
From my build with gcc, this shows up around 1200 times in the logfile
for my build. The problem with this is that for distributed builds, this
forces the build of the file where the warning is emitted to be done
locally which causes a bottleneck. This fixes the source of the warning
so that the build of the files which include `APValue.h` can again be
distributed.
[AMDGPU] Extract byte lanes of a split vector from the 32-bit source (#228424)
After a <4 x i8> is split into i16 halves, a byte lane is extended
from an i16 shift of a truncate. Rewrite it on the 32-bit source as an
and of srl or a sign_extend_inreg of srl, which select to a single bit
field extract.
Uniform zero and any extends are left alone, their i16 shift is already
promoted to i32.
Assisted-by: Claude Code Opus 5
safe_eval.sh: safe_set_var avoid positional args
Use options to set ssv_{allow,only,extra}
Improve the documentation.
Add a test harness for safe_set_var.
AMDGPU: Move GCN subtarget features to GCNFeatures.td (#230996)
Move the GCN SubtargetFeature definitions, the FeatureISAVersion lists
and AMDGPUFrontendVisibleFeatures out of AMDGPU.td, so they can be used
without parsing the instruction, register and intrinsic definitions.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
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Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
AMDGPU: Move R600 subtarget features to R600Features.td (#230997)
Split the R600 SubtargetFeature definitions and
R600FrontendVisibleFeatures out of R600Processors.td, mirroring
GCNFeatures.td.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
---
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Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
