LLVM/project f91da0eclang/include/clang/Analysis/Analyses/LifetimeSafety MovedLoans.h Facts.h, clang/lib/Analysis/LifetimeSafety MovedLoans.cpp Facts.cpp

Revisit handling moved origins
DeltaFile
+108-0clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
+66-5clang/lib/Analysis/LifetimeSafety/Facts.cpp
+32-24clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+37-17clang/test/Sema/warn-lifetime-safety.cpp
+44-0clang/include/clang/Analysis/Analyses/LifetimeSafety/MovedLoans.h
+36-6clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+323-5215 files not shown
+480-11721 files

LLVM/project 0c04a64llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp

Fix using Known as input
DeltaFile
+2-3llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+2-31 files

LLVM/project 87cbb3fllvm/include/llvm/Support KnownFPClass.h, llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp

InstCombine: Handle multiple use copysign

Handle multiple use copysign in SimplifyDemandedFPClass
DeltaFile
+36-3llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+7-7llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+7-0llvm/include/llvm/Support/KnownFPClass.h
+50-103 files

FreeBSD/src 1539a65tests/sys/netinet6 test_ip6_output.py

ip6_output tests: Remove an unused import

No functional change intended.

MFC after:      1 week
Sponsored by:   Stormshield
Sponsored by:   Klara, Inc.
DeltaFile
+0-1tests/sys/netinet6/test_ip6_output.py
+0-11 files

FreeBSD/src a03eabfsys/netinet6 ip6_mroute.c

ip6_mroute: Mark functions as static

No functional change intended.

MFC after:      2 weeks
Sponsored by:   Stormshield
Sponsored by:   Klara, Inc.
DeltaFile
+10-10sys/netinet6/ip6_mroute.c
+10-101 files

LLVM/project 6c8d9d0llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine load-shufflevector.ll

[VectorCombine] Trim low end of loads used in shufflevector rebroadcasts. (#149093)

Following on from #128938, trim the low end of loads where only some of
the incoming lanes are used for rebroadcasts in shufflevector
instructions.

---------

Co-authored-by: Leon Clark <leoclark at amd.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
DeltaFile
+32-23llvm/test/Transforms/VectorCombine/load-shufflevector.ll
+18-8llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+50-312 files

LLVM/project b4b8d4ellvm/lib/Target/AMDGPU GCNVOPDUtils.cpp, llvm/test/CodeGen/AMDGPU atomic_optimizations_struct_buffer.ll vopd-combine-gfx1250.mir

[AMDGPU] Fix VOPD checks for commuting OpX and OpY (#178772)

We need to check that OpX does not write the sources of OpY, but if we
swap OpX and OpY with respect to program order, the check was not
swapped correctly.

The checks on gfx1250 can be relaxed slightly, that is planned for a
future patch.

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+54-113llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
+107-0llvm/test/CodeGen/AMDGPU/vopd-combine-gfx1250.mir
+30-28llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+25-20llvm/test/CodeGen/AMDGPU/bf16.ll
+12-24llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
+16-16llvm/test/CodeGen/AMDGPU/expand-waitcnt-profiling.ll
+244-20114 files not shown
+340-25920 files

FreeNAS/freenas 81ca69dsrc/freenas/etc/systemd/system/nfs-server.service.d override.conf

NAS-139536 / 26.0.0-BETA.1 / Remove unused NFS systemctl depency: nslcd (#18124)

TrueNAS has long removed support for nslcd.  This dependency is unused.
Removing it.
DeltaFile
+0-1src/freenas/etc/systemd/system/nfs-server.service.d/override.conf
+0-11 files

LLVM/project 2eaaaf1clang/include/clang/Basic CodeGenOptions.h, clang/include/clang/Options Options.td

NFC: Rename CodeGenOptions::StackUsageOutput to StackUsageFile (#178898)

Preparation for #178005.

"Output" has too many different interpretations: it could be an
enabled/disabled, a file format, etc. Clarify that it's the destination
file.
DeltaFile
+1-1clang/include/clang/Basic/CodeGenOptions.h
+1-1clang/include/clang/Options/Options.td
+1-1clang/lib/CodeGen/BackendUtil.cpp
+1-1clang/lib/Frontend/CompilerInvocation.cpp
+1-1llvm/include/llvm/Target/TargetOptions.h
+1-1llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+6-66 files

LLVM/project 09f8f22libcxx/include stdatomic.h, libcxx/test/extensions/libcxx/depr/depr.c.headers include_stdatomic_as_c.sh.cpp

[libc++] "Always" include_next for non C++ path in stdatomic.h (#178463)

In https://github.com/llvm/llvm-project/pull/176903, `#include
<__configuration/compiler.h>` is moved into the
`#ifdef _cplusplus` clause, so `_LIBCPP_COMPILER_CLANG_BASED` is no
longer set for C compiles. This causes a regression internally, where
when C compiles includes stdatomic.h, they no longer get the
corresponding C header.

C++ stdlib headers "shouldn't" be on the search patch for C compile, but
we do and so do lots of other people, so libc++ tends to support that.
This include_next for a C compile should be unconditional, not
conditional upon being Clang.
DeltaFile
+30-0libcxx/test/extensions/libcxx/depr/depr.c.headers/include_stdatomic_as_c.sh.cpp
+1-1libcxx/include/stdatomic.h
+31-12 files

LLVM/project d1e2ddfllvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU misaligned-vgpr-regsequence.mir siloadstoreopt-misaligned-regsequence.ll

[AMDGPU] Emit b32 movs if (a)v_mov_b64_pseudo dest vgprs are misaligned (#160547)

#154115 Exposed a possible destination misaligned v_mov_b64

Relaxes v_mov_b64_pseudo register class constraint (which matches
av_mov_b64_pseudo's register class).
DeltaFile
+22-14llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+30-0llvm/test/CodeGen/AMDGPU/misaligned-vgpr-regsequence.mir
+21-0llvm/test/CodeGen/AMDGPU/siloadstoreopt-misaligned-regsequence.ll
+20-0llvm/test/CodeGen/AMDGPU/av_movimm_pseudo_expansion.mir
+9-0llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir
+3-2llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
+105-161 files not shown
+106-177 files

LLVM/project a726b19llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-chained.ll

NFC: Cleanup AArch64/partial-reduce-chained.ll

This had some loop attributes that were unused.
Also cleaned up the flags a little bit.
DeltaFile
+16-15llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
+16-151 files

NetBSD/pkgsrc-wip fb21beblibopeninput distinfo, libopeninput/patches patch-src_wscons.c patch-src_wscons.h

libopeninput: handle devive attach/detach
DeltaFile
+275-0libopeninput/patches/patch-src_wscons.c
+27-0libopeninput/patches/patch-src_wscons.h
+2-0libopeninput/distinfo
+304-03 files

LLVM/project 6a2d74dllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass.ll

InstCombine: Handle nsz in copysign SimplifyDemandedFPClass (#176916)

If the only sign bit difference is for 0, fold through the source.
DeltaFile
+30-0llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+2-4llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+32-42 files

LLVM/project 5823ce0clang/include/clang/Analysis/Analyses/LifetimeSafety MovedLoans.h Facts.h, clang/lib/Analysis/LifetimeSafety MovedLoans.cpp Facts.cpp

Revisit handling moved origins
DeltaFile
+108-0clang/lib/Analysis/LifetimeSafety/MovedLoans.cpp
+66-5clang/lib/Analysis/LifetimeSafety/Facts.cpp
+32-24clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+37-17clang/test/Sema/warn-lifetime-safety.cpp
+44-0clang/include/clang/Analysis/Analyses/LifetimeSafety/MovedLoans.h
+36-6clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+323-5215 files not shown
+480-11721 files

OPNSense/plugins a5acdaesecurity/wazuh-agent Makefile, security/wazuh-agent/src/opnsense/scripts/wazuh opnsense-fw

security/wazuh-agent: sync with master
DeltaFile
+8-5security/wazuh-agent/src/opnsense/scripts/wazuh/opnsense-fw
+1-0security/wazuh-agent/Makefile
+9-52 files

OPNSense/plugins 4773ff7security/wazuh-agent Makefile

security/wazuh-agent: bump revision
DeltaFile
+1-0security/wazuh-agent/Makefile
+1-01 files

OPNSense/core cd653ddsrc/opnsense/mvc/app/controllers/OPNsense/Firewall/forms dialogFilterRule.xml, src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt

Firewall: Rules [new]: Statistics column is responsive now
DeltaFile
+13-9src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+0-1src/opnsense/mvc/app/controllers/OPNsense/Firewall/forms/dialogFilterRule.xml
+13-102 files

OpenBSD/ports 5o5f295multimedia/vvenc Makefile distinfo, multimedia/vvenc/patches patch-CMakeLists_txt

   update to vvenc-1.14.0, from Brad (maintainer)
VersionDeltaFile
1.3+1-4multimedia/vvenc/Makefile
1.2+2-2multimedia/vvenc/distinfo
1.2+1-1multimedia/vvenc/patches/patch-CMakeLists_txt
+4-73 files

OpenBSD/ports jbPv6yYmisc/openhab-addons/5 distinfo Makefile, misc/openhab/5 distinfo Makefile

   update to openhab-5.1.1, from maintainer
VersionDeltaFile
1.2+298-287misc/openhab/5/pkg/PLIST
1.3+2-2misc/openhab-addons/5/distinfo
1.3+2-2misc/openhab/5/distinfo
1.3+1-1misc/openhab-addons/5/Makefile
1.3+1-1misc/openhab/5/Makefile
+304-2935 files

LLVM/project 1dbc705llvm/lib/Transforms/Scalar SimplifyCFGPass.cpp

[SimplifyCFG] Increase iterative simplification convergence limit. (#178406)

https://github.com/llvm/llvm-project/commit/a9b0776a81e84d8042716863842fe1f8adf39cad
added an assertion to avoid infinite loops. However, the limit seems
arbitrary, there is no justification for it neither in the code nor in
the commit message, so I think this can be increased.
DeltaFile
+1-1llvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
+1-11 files

NetBSD/pkgsrc SGhQjYTdoc CHANGES-2026

   doc: Updated security/libgpg-error to 1.58nb1
VersionDeltaFile
1.761+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc DQm6Mrwsecurity/libgpg-error Makefile

   libgpg-error: fix rpath in pkg-config file

   Bump PKGREVISION.
VersionDeltaFile
1.99+6-1security/libgpg-error/Makefile
+6-11 files

pfSense/pfsense d302f44src/usr/local/bin kea2fib6 kea2unbound

kea2{fib6,unbound}: chase API changes in Symfony Console 8
DeltaFile
+8-5src/usr/local/bin/kea2fib6
+4-4src/usr/local/bin/kea2unbound
+12-92 files

OpenBSD/ports kwFXSkzdatabases/py-alembic distinfo Makefile

   update to py3-alembic-1.18.3
VersionDeltaFile
1.23+2-2databases/py-alembic/distinfo
1.32+1-1databases/py-alembic/Makefile
+3-32 files

LLVM/project d8c17dcllvm/lib/Target/AMDGPU VOP3PInstructions.td, llvm/test/CodeGen/AMDGPU wmma-gfx12-convergent.mir

[AMDGPU] Ensure all WMMA instructions are marked as convergent (#178314)

This is an extension of
https://github.com/llvm/llvm-project/pull/165602. It is needed to fix an
issue with V_WMMA_F32_16X16X16_F16_twoaddr_w32 being incorrectly sunk by
machine-sink.

All WMMA instructions in AMDGPUGenInstrInfo.inc were verified to be
marked as convergent.

---------

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+151-2llvm/test/CodeGen/AMDGPU/wmma-gfx12-convergent.mir
+2-2llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+153-42 files

OpenBSD/ports CLXfpnVnet/rdapper Makefile distinfo

   update to rdapper-1.22
VersionDeltaFile
1.14+4-3net/rdapper/Makefile
1.11+2-2net/rdapper/distinfo
+6-52 files

OpenBSD/src gnwxD6Jlib/libcrypto/man EVP_SealInit.3

   EVP_SealInit.3: fix RETURN VALUES section

   While normal calls return 0 for error and npubk for success, there is a
   case where it returns the usual 1/0 thing. Make that explicit.

   Prompted by a report by Niels Dossche

   ok jsing kenjiro
VersionDeltaFile
1.11+12-2lib/libcrypto/man/EVP_SealInit.3
+12-21 files

OpenBSD/ports Uf5bja0net Makefile

   +p5-Net-IDN-PP
VersionDeltaFile
1.1453+1-0net/Makefile
+1-01 files

OpenBSD/ports RWi8fyqnet/p5-Net-IDN-PP Makefile distinfo, net/p5-Net-IDN-PP/pkg PLIST DESCR

   import ports/net/p5-Net-IDN-PP, tweak/ok benoit@

   A pure-Perl implementation of the Punycode algorithm for encoding
   internationalized domain names (IDNs).
VersionDeltaFile
1.1+13-0net/p5-Net-IDN-PP/Makefile
1.1+4-0net/p5-Net-IDN-PP/pkg/PLIST
1.1+2-0net/p5-Net-IDN-PP/pkg/DESCR
1.1+2-0net/p5-Net-IDN-PP/distinfo
1.1.1.1+0-0net/p5-Net-IDN-PP/Makefile
1.1.1.1+0-0net/p5-Net-IDN-PP/distinfo
+21-02 files not shown
+21-08 files