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   net/unison: TOOL_DEPEND on ocaml-findlib

Merge branch 'main' into users/huntergr-arm/splat-pattern-match

typescript: remove, imported to pkgsrc

AMDGPU: Merge live interval critical edge splitting tests (#228051)

   doc: Updated lang/typescript to 7.0.2

   typescript: update to 7.0.2

   TypeScript 7, a 10x faster native port of TypeScript
   See: https://devblogs.microsoft.com/typescript/announcing-typescript-7-0/

[AArch64] Select ADDHN instead of SHRN when possible (#225094)

The throughput of the ADDHN instruction is either double or the same as
the throughput of the SHRN instruction almost everywhere, so it's better
to use ADDHN when possible.

   Removed security/py-crack, security/py-crcmod, security/py-cryptkit, security/py-hsm

   py-hsm: removed, last update 2016-11-03

CodeGen: Remove LiveVariables use from TwoAddressInstructionPass (#225176)

Now that LiveIntervals is computed unconditionally before TwoAddressInstructions 
in the pipeline, the pass no longer needs LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

   py-cryptkit: removed, last update 2001-11-30

   py-crcmod: removed, last update 2010-06-27

   py-crack: removed, dead upstream

tests/libelftc: Catch-up with [r4399] (addition of EM_LST & EM_CHILI).

[mlir][tosa] Add MXFP support for GATHER (#227710)

Change-Id: I007889a6d934c8588feae7d2c5a023df60c85ca5

Signed-off-by: Madeleine Dunn <madeleine.dunn at arm.com>

[GlobalISel] [AArch64] Skip redundant shift amount masking during isel (#223136)

AArch64 shift instructions (LSL/LSR/ASR) only use the low 5 bits (i32)or
6 bits (i64) of the shift amount. When the shift amount is masked with
an AND that was introduced by legalization of a narrow type zext, or is
a G_ZEXT itself, the operation is redundant and can be skipped during
instruction selection.

This mirrors what AArch64DAGToDAGISel::tryShiftAmountMod does for
SelectionDAG, bringing GlobalISel to parity for i32 shift amounts with
narrow shift amount types (i8, i16).

Before (GlobalISel shl i32 with i8 shift amount):
  and w8, w1, #0xff
  lsl w0, w0, w8

After (matches SelectionDAG):
  lsl w0, w0, w1


    [2 lines not shown]

Add EM_LST and EM_CHILI.

Obtained from:  The Generic ABI discussion list.

   Removed net/py-simplesoap, net/py-socksipy-branch, net/py-txamqp, print/pdf-redact-tools

Merge commit 80e8c0a59189 from llvm-project (by ShengYi Hung):

  [DebugInfo] Fill Column 0 if Line is not found (#227559)

  It is possible that user specified line 0 as the start of the line in C
  language (using `# 0`). However, it is rejected by the Lexer as we have
  no line but still carries column information. As a result, we fill
  column to 0 if we cannot find line.

  Assisted-by: Claude # Test
  Fixes: #56186

This fixes a fatal error when building the textproc/peg port.

PR:             264853
MFC after:      3 days

   pdf-redact-tools: removed, upsteam dead since 2020-05-06

   py-txamqp: removed, last update 2017-02-07

rcvd: PR/60775 Initial load as provided by submitter, now optimalization part with start

   py-socksipy-branch: removed, last update 2010-05-26

   py-simplesoap: removed, last update 2017-12-03

AArch64: Remove unnecessary NZCV def from PSTATE write instructions

PstateWriteSimple is the base class for the MSR immediate forms that
write a single PSTATE field. None of those fields is NZCV, so these do
not clobber the condition flags.

XAFLAG and AXFLAG do write the flags, but they already have their own
Uses/Defs of NZCV.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>

   Removed net/py-pcap, net/py-pylint-celery, net/py-pysendfile, net/py-requestbuilder

   py-requestbuilder: last update 2016-12-09

   py-pysendfile: removed, last update 2014-05-27

   py-pylint-celery: removed, last update 2014-09-25

   py-pcap: removed, last update 2005-10-17