[NVPTX] Correct tcgen05 MMA memory effects (#232314)
Model accumulator reads and shared-memory reads through descriptors,
while restricting writes to argument memory and internal state. Mark
tensor A readonly unless `.ashift` is present, and mark sparse metadata,
scale inputs, and decompression tables readonly.
Assisted-by: GPT-6 Astra
Enable ClangIR Build By Default (#221291)
This is subject to an RFC:
https://discourse.llvm.org/t/rfc-enable-clangir-build-by-default/91730
This patch enables building ClangIR (and thus MLIR) by default in clang
builds. The project has hit a maturity level where we believe this is a
good time to do it. See the RFC for details.
[clang-format] Fix the precedence of Verilog `->` (#230131)
after
```SystemVerilog
xxxx = x -> //
x;
```
before
```SystemVerilog
xxxx = x -> //
x;
```
In Verilog, the implication operator (logical less than or equal to)
`->` and equivalence operator `<->` have a precedence that is higher
than assignment. When a line is to be broken, the continuation part
should all be to the right of the `=` sign as is the case if the `->` is
replaced with the `<=`.
[X86] Combine mask_beforefirst to (x - 1) & ~x in GPR
EVEX and libc use this pattern in strcpy etc. to set the bits before the lowest set bit. It works correctly for x=0 too, returning an all ones mask.
Because SSE/AVX/AVX2 promote vNi1 types, do this as a DAG combine before type legalization.
We need to restrict it to power of 2 types otherwise we hit a latent crash in combineToExtendBoolVectorInReg.
[VPlan] Use llvm.mask.beforefirst for computing early exit mask
This makes the cost more accurate and improves codegen for RISC-V. The codegen for an early exit loop with side effects then goes from:
.LBB0_3: # %vector.body
# =>This Inner Loop Header: Depth=1
vl1r.v v16, (a3)
vsetvli zero, zero, e8, m1, ta, ma
vmseq.vi v16, v16, 0
vfirst.m a7, v16
srli t0, a7, 63
czero.nez a7, a7, t0
czero.eqz t0, a1, t0
or a7, t0, a7
vsetvli zero, zero, e64, m8, ta, ma
vmsltu.vx v0, v8, a7
vle8.v v17, (a5), v0.t
vcpop.m t1, v16
vsetvli zero, zero, e8, m1, ta, ma
[20 lines not shown]
[AArch64] Lower mask_beforefirst to brkb for NEON types on SVE (#232255)
When SVE is available we can use lower fixed length mask_beforefirst
calls to brkb, see the discussion in
https://github.com/llvm/llvm-project/pull/230163#pullrequestreview-5469079195
Fixed vectors in streaming mode are left out of this PR for now.
[DAG] Handle widened step vectors in expandGetActiveLaneMask (#230296)
On AVX512 getLegalMaskAndStepVector will need to widen the step vector
type. Handle this in expandGetActiveLaneMask, so we don't crash on
AVX512 which widens e.g. v8i1 -> v16i1. We don't actually use Mask, it's
just a dummy poison value to work out what type the final mask result
should be.
[DAG] Explicitly truncate splat operand in get_active_lane_mask expansion (#230056)
x86 can't handle the implicit truncation of build_vector operands so
these test cases crash after expanding get_active_lane_mask (stemming
from mask.beforefirst). Fix it by explicitly truncating it.
lang/php84: update to 8.5.12
PHP 8.5.12 (2026-10-22)
- Core:
. Fixed GHSA-w8hw-w9fx-j79w, GHSA-6wmf-4rv5-p3rp (Avoid state corruption via
bailout). (CVE-2026-109618, CVE-2026-109619) (Arnaud, ilutov, Jakub Zelenka,
ndossche, Nicolas Grekas)
. Fixed bug GH-23644 (Optimizer leaves a constant-vs-constant comparison
unfolded, crashing the VM in zval_undefined_cv). (ndossche)
. Fixed OSS-Fuzz 532353396 (assertion failure with static type). (Girgias)
. Fix GH-23662 (Avoid NAN warning in print_r()). (CodedByManish)
. Fix GH-21999: GC inconsistency with lazy object, var_dump(), and object
comparison. (Arnaud)
. Fixed OSS-Fuzz #536440507 (Immutable class incorrect assertion).
(ndossche)
. Fixed AVX being reported as supported when the OS has not enabled AVX
state. (Ilia Alshanetsky)
. Fixed GH-23980 (ZEND_ASSERT violation @ ZEND_INCLUDE_OR_EVAL). (ndossche)
[231 lines not shown]
[ConstraintElim] Limit GEP decomposition to canonical types. (#234137)
Narrow indices in GEPs are implicitly sign-extended. SExts can only be
decompsed in the unsigned system if the value is non-negative. This
matches the existing explicit m_SExt handling.
PR: https://github.com/llvm/llvm-project/pull/234137
[Clang][C2y] Diagnose declarations in a 'while' condition directly
Instead of the generic "expected expression", a declaration in the
controlling clause of a 'while' statement in C is now rejected with
"ISO C does not allow a declaration in a 'while' statement".
Co-Authored-By: Claude Fable 5.1 <noreply at anthropic.com>
lang/php84: update to 8.4.27
PHP 8.4.27 (2026-10-22)
- Core:
. Fixed GHSA-w8hw-w9fx-j79w, GHSA-6wmf-4rv5-p3rp (Avoid state corruption via
bailout). (CVE-2026-109618, CVE-2026-109619) (Arnaud, ilutov, Jakub Zelenka,
ndossche, Nicolas Grekas)
. Fix GH-21999: GC inconsistency with lazy object, var_dump(), and object
comparison. (Arnaud)
. Fixed OSS-Fuzz #536440507 (Immutable class incorrect assertion).
(ndossche)
. Fixed AVX being reported as supported when the OS has not enabled AVX
state. (Ilia Alshanetsky)
. Fixed GH-23980 (ZEND_ASSERT violation @ ZEND_INCLUDE_OR_EVAL). (ndossche)
. Fixed bug GH-23896 (Assertion failure in zend_call_function() after a
throwing deprecation). (lazerg)
. Fixed use-after-free when a dl()-loaded extension declares a frameless
function and a later request calls it. (Ilia Alshanetsky)
[229 lines not shown]
graphics/optipng: Fix does not set execute bit on binary
Upstream uses "install(FILES ..." instead of "install(PROGRAMS ..."
for install executable binary.
PR: 299678 299132
Approved by: blanket (fix runtime)
Sponsored by: UNIS Labs
[SCEV] Prove signed/unsigned implications in either operand order
SCEV could prove some signed conditions from unsigned ones and the
other way around, but only with the operands in the same order. For
example, it proved a <s b from a <u b and b >=s 0, but not b >s a.
Handle both orders.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
