LLVM/project 0667896utils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel] fix #193207 (#195898)

fix #193207
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

FreeNAS/freenas b7d7dc0src/middlewared/middlewared/plugins/truenas_connect internal.py config.py, src/middlewared/middlewared/pytest/unit/plugins test_truenas_connect.py

Test fixes
DeltaFile
+62-39src/middlewared/middlewared/plugins/truenas_connect/internal.py
+40-42src/middlewared/middlewared/plugins/truenas_connect/config.py
+18-14src/middlewared/middlewared/plugins/truenas_connect/acme.py
+14-8src/middlewared/middlewared/plugins/truenas_connect/__init__.py
+2-12src/middlewared/middlewared/pytest/unit/plugins/test_truenas_connect.py
+6-6src/middlewared/middlewared/plugins/truenas_connect/request.py
+142-1216 files not shown
+151-13212 files

LLVM/project eb899dcllvm/lib/Transforms/Vectorize VPlanUtils.cpp, llvm/test/Transforms/LoopVectorize/X86 induction-step.ll

[VPlan] Check for VInstruction in findCanonicalIVIncrement. (#195845)

There are cases where findCanonicalIVIncrement may discover a
non-VPInstruction add that matches the expected shape, but we expect a
VPInstruction. Add explicit check to fix crash.
DeltaFile
+173-82llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
+2-1llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+175-832 files

LLVM/project 4a28ba6flang/include/flang/Optimizer/Dialect/CUF/Attributes CUFAttr.h, flang/lib/Semantics expression.cpp check-cuda.cpp

[flang][cuda][openacc] Add UseDevice attribute to model host_data use_device symbols (#195182)

Symbols appearing in `!$acc host_data use_device(...)` were previously
marked with `CUDADataAttr::Device`, which caused generic resolution to
fail.

Introduce a new CUDADataAttr::UseDevice enumerator and use it in
`CopySymbolWithDevice` / `CloneDerivedTypeForUseDeviceImpl` instead of
Device. The new attribute is:

1. Compatible with any dummy in AreCompatibleCUDADataAttrs.
2. Ranked in the matching distance table (GetMatchingDistance): prefers
Device dummies (0), accepts Managed/Unified (2), and allows host dummies
(3).
3. Not user-spellable — only set internally during OpenACC name
resolution, never parsed from source or written to module files.
4. Treated like Device for non-host-array checks, I/O restrictions, and
MLIR lowering (mapped to `cuf::DataAttribute::Device`).
DeltaFile
+85-0flang/test/Semantics/cuf27.cuf
+18-0flang/lib/Semantics/expression.cpp
+8-3flang/lib/Semantics/check-cuda.cpp
+4-2flang/lib/Semantics/resolve-names.cpp
+3-0flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.h
+3-0flang/lib/Support/Fortran.cpp
+121-53 files not shown
+125-79 files

LLVM/project 6b80b27clang/test/Driver clang-sycl-linker-test.cpp, clang/test/Driver/Inputs/SYCL two-kernels.ll

[clang-sycl-linker] Add per-kernel device code splitting (#195362)

Introduce a --sycl-module-split-mode option for clang-sycl-linker that
selects how the fully linked device module is split into device images:
  - none (default): one device image containing all kernels
- kernel: one device image per kernel function, built by taking the
transitive closure of each kernel's dependencies

The split is implemented by delegating to
llvm::splitModuleTransitiveFromEntryPoints, providing a categorizer that
assigns each kernel definition a unique integer id.

Symbol collection now happens during splitting while the Module is still
in memory, avoiding a round-trip through disk to re-read the bitcode for
symbol extraction.

As part of this change, the splitModuleTransitiveFromEntryPoints API is
updated to accept an Error-returning callback and propagate errors from
it, replacing the previous void callback signature. The existing caller

    [10 lines not shown]
DeltaFile
+150-38clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
+30-2clang/test/Driver/clang-sycl-linker-test.cpp
+23-0clang/test/Driver/Inputs/SYCL/two-kernels.ll
+5-3llvm/lib/Transforms/Utils/SplitModuleByCategory.cpp
+4-4llvm/tools/llvm-split/llvm-split.cpp
+6-0clang/tools/clang-sycl-linker/SYCLLinkOpts.td
+218-472 files not shown
+222-498 files

LLVM/project 5e275efllvm/lib/Transforms/Vectorize VPlanTransforms.cpp LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/VPlan vplan-print-after-all.ll

[NFC][VPlan] Split `makeMemOpWideningDecisions` into subpasses

The idea is to have handling of strided memory operations (either from
https://github.com/llvm/llvm-project/pull/147297 or for VPlan-based
multiversioning for unit-strided accesses) done after some mandatory
processing has been performed (e.g., some types **must** be scalarized)
but before legacy CM's decision to widen (gather/scatter) or scalarize
has been committed.

And in longer term, we can uplift all other memory widening decision to
be done here directly at VPlan level. I expect this structure would also
be beneficial for that.
DeltaFile
+69-28llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+0-10llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+10-0llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+3-0llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
+82-384 files

LLVM/project 10db733mlir/lib/Dialect/Transform/IR Utils.cpp, mlir/test/Dialect/Transform inliner-legality.mlir

[MLIR][Transform] Don't error when a structurally inlinable call exists (#195770)

Fixes bug introduced in https://github.com/llvm/llvm-project/pull/192956

Specifically transform-interpreter would crash if any op in the region
it is applied to is marked as no-inline via the inliner interface. This
is because the check added does a post processing to verify that all
operations can be inlined [and there isn't an issue due to symbol
merging]. However, it fails to account for the case where an operation
was already not inlinable (and not an error introduced by the transform
symbol merging).
DeltaFile
+30-2mlir/lib/Dialect/Transform/IR/Utils.cpp
+18-0mlir/test/Dialect/Transform/inliner-legality.mlir
+48-22 files

FreeNAS/freenas 71b25a2src/middlewared pyproject.toml, src/middlewared/middlewared sqlalchemy.py

fix the build (remove isodate)
DeltaFile
+3-4src/middlewared/middlewared/sqlalchemy.py
+3-3src/middlewared/middlewared/plugins/zettarepl_/snapshot_removal_date.py
+1-1src/middlewared/pyproject.toml
+7-83 files

LLVM/project ad72a39utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[Bazel] Fixes bb51440 (#195851)

This fixes bb51440ffe693007fee40df9c9227432ebc5e0f0.

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+1-01 files

LLVM/project 6726ce2llvm/include/llvm/Analysis LoopAccessAnalysis.h

unsigned->uint64_t for AbsCommonStrideInBytes
DeltaFile
+2-2llvm/include/llvm/Analysis/LoopAccessAnalysis.h
+2-21 files

LLVM/project 3e6654dllvm/include/llvm/Analysis LoopAccessAnalysis.h, llvm/lib/Analysis LoopAccessAnalysis.cpp

[LAA] Enable diff checks for non-unit constant stride

This can be extended to non-constant loop-invariant strides but that is
left to a separate change.
DeltaFile
+19-55llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-runtime-checks.ll
+26-44llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+12-7llvm/lib/Transforms/Utils/LoopUtils.cpp
+7-5llvm/lib/Analysis/LoopAccessAnalysis.cpp
+4-5llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+4-1llvm/include/llvm/Analysis/LoopAccessAnalysis.h
+72-1176 files

NetBSD/pkgsrc rIr03Nzdoc CHANGES-2026

   Updated mail/py-checkdmarc, textproc/py-pugjs, textproc/py-parse
VersionDeltaFile
1.2836+4-1doc/CHANGES-2026
+4-11 files

NetBSD/pkgsrc lWKj5jOtextproc/py-parse PLIST distinfo

   py-parse: updated to 1.22.0

   1.22.0
   Add type hinting
VersionDeltaFile
1.5+5-4textproc/py-parse/PLIST
1.17+4-4textproc/py-parse/distinfo
1.19+2-2textproc/py-parse/Makefile
+11-103 files

LLVM/project 0beb9f4llvm/include/llvm/SandboxIR Values.def Value.h, llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer SandboxVectorizerIR.h SandboxVectorizerIRValues.def

[SandboxVec] SandboxVectorizerIR Boilerplate (#189515)

This patch introduces a new specialization of SandboxIR named
SandboxVectorizerIR that contains the new Pack instruction (though it is
just a placeholder for now). It also implements the necessary
boilerplate in SandboxIR to support adding such specializations.

Each specialization requires its own *Values.def file defining its new
instructions. The new .def file also needs to be added to
ValuesDefFilesList.def which allows SandboxIR to include entries from
all specializations and populate structures like the Opcode enum,
ClassID and others.

Given that we need to include both .def files in several places, I had
to (i) change the .def file to undefine its locally defined macros so
that they won't get redefined in the next #include .def, and (ii) add
the DEF_DISABLE_AUTO_UNDEF option to disable undefining the macros at
the end because otherwise the user-specified DEF_ macros would be
undefined by the time we reach the second .def file.
DeltaFile
+57-18llvm/include/llvm/SandboxIR/Values.def
+59-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIR.h
+57-0llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIRTest.cpp
+48-0llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIR.cpp
+40-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIRValues.def
+22-3llvm/include/llvm/SandboxIR/Value.h
+283-2111 files not shown
+336-4117 files

LLVM/project 602f2a5llvm/lib/DWARFLinker Utils.cpp, llvm/lib/DWARFLinker/Classic DWARFLinker.cpp

Revert "[DWARFLinker] Patch DW_AT_LLVM_stmt_sequence in the parallel linker (…"

This reverts commit 7ff811a88e3157aa32dddb147d9b264ef8870c75.
DeltaFile
+59-159llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
+107-14llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+0-118llvm/unittests/DWARFLinkerParallel/DWARFLinkerTest.cpp
+0-100llvm/lib/DWARFLinker/Utils.cpp
+2-64llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
+2-33llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.cpp
+170-4886 files not shown
+191-58112 files

NetBSD/pkgsrc dc4fqNKtextproc/py-pugjs distinfo Makefile

   py-pugjs: updated to 6.0.3

   6.0.3
   Unknown changes
VersionDeltaFile
1.3+4-4textproc/py-pugjs/distinfo
1.3+2-2textproc/py-pugjs/Makefile
+6-62 files

LLVM/project 3bbc3acllvm/lib/CodeGen MachineFunction.cpp, llvm/lib/MC MCDwarf.cpp

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
DeltaFile
+67-67llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+33-0llvm/lib/MC/MCDwarf.cpp
+15-15llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+10-0llvm/lib/CodeGen/MachineFunction.cpp
+4-4llvm/test/CodeGen/AMDGPU/debug-frame.ll
+2-2llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+131-885 files not shown
+143-9011 files

LLVM/project 4c0b0b0llvm/lib/Target/AMDGPU SIFrameLowering.cpp SIMachineFunctionInfo.h, llvm/test/CodeGen/AMDGPU amdgpu-spill-cfi-saved-regs.ll

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
DeltaFile
+2,998-0llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
+17-0llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-0llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+9-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+3,036-05 files

LLVM/project 1382906llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll gfx-callable-argument-types.ll

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+3,568-2,598llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,912-1,913llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+2,700-12llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+631-631llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+505-510llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+394-399llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+9,710-6,063108 files not shown
+14,825-9,527114 files

NetBSD/pkgsrc LuhJHLTmail/py-checkdmarc distinfo Makefile

   py-checkdmarc: updated to 5.15.3

   5.15.3
   Fixes
   Display a warning is a BIMI image is provided without a VMC/CMC
VersionDeltaFile
1.29+4-4mail/py-checkdmarc/distinfo
1.31+2-2mail/py-checkdmarc/Makefile
+6-62 files

LLVM/project 9cf264fllvm/lib/Target/SPIRV SPIRVInstrInfo.td SPIRVRegisterInfo.td

[NFC][SPIR-V] Rename vID register class to viID (#195711)

Rename the v2i64 register and its class from vID/vID0 to viID/viID0 so
it follows the same `v<element-kind>ID` convention as vfID (v2f64) and
vpID (v2p64) for better consistency
DeltaFile
+8-8llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
+3-3llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
+2-2llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+1-1llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+1-1llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
+15-155 files

NetBSD/pkgsrc-wip d77f6c6gvfs Makefile PLIST

gvfs: unbreak build on Slackware
DeltaFile
+6-7gvfs/Makefile
+4-2gvfs/PLIST
+2-2gvfs/options.mk
+12-113 files

LLVM/project e63548eclang/lib/Driver/ToolChains AMDGPU.cpp

clang: Print full triple arch name in error (#195889)

More instances of pattern from 58f94f0a4648a5d8d624c05a51dea8c37e5fe7bc
DeltaFile
+2-4clang/lib/Driver/ToolChains/AMDGPU.cpp
+2-41 files

LLVM/project 3f13bc7llvm/test/Transforms/LoopVectorize runtime-checks-difference.ll

Add a test
DeltaFile
+32-0llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+32-01 files

NetBSD/pkgsrc LrwvDHDdoc CHANGES-2026

   Updated security/defguard, security/defguard-proxy, security/defguard-gateway
VersionDeltaFile
1.2835+4-1doc/CHANGES-2026
+4-11 files

NetBSD/pkgsrc EwZHApisecurity/defguard distinfo cargo-depends.mk, security/defguard-gateway distinfo cargo-depends.mk

   defguard: updated to 2.0.0

   2.0.0

   It’s a significant step up from version 1.x, featuring:

   a completely redesigned UI,
   a new and easy deployment approach (and component communication security),
   and some other major architectural changes.
VersionDeltaFile
1.4+866-360security/defguard-gateway/distinfo
1.4+896-305security/defguard-proxy/distinfo
1.4+715-436security/defguard/distinfo
1.4+284-115security/defguard-gateway/cargo-depends.mk
1.4+295-98security/defguard-proxy/cargo-depends.mk
1.4+235-142security/defguard/cargo-depends.mk
+3,291-1,4566 files not shown
+3,329-1,48612 files

FreeBSD/src 49e496dusr.bin/stat/tests stat_test.sh

stat: Set the timezone before testing -t flag

The test assumes UTC, which is what I use on my development systems and
clearly what is used on our CI runners.

MFC after:      1 week
Sponsored by:   Klara, Inc.
Reviewed by:    kevans
Differential Revision:  https://reviews.freebsd.org/D56836
DeltaFile
+2-2usr.bin/stat/tests/stat_test.sh
+2-21 files

FreeNAS/freenas 0630f14src/middlewared/debian control

remove more dead dependencies
DeltaFile
+0-4src/middlewared/debian/control
+0-41 files

LLVM/project 8411886mlir/lib/ExecutionEngine SyclRuntimeWrappers.cpp

[mlir][SYCL] Fail init errors cleanly instead of `abort`ing (#192979)

Disclaimer: this is my first PR to LLVM. I'm trying to follow the
contribution guide and the conventions i see in other PRs, but if i
missed something -- please let me know.

## Summary

Fixes #182807.

When the SYCL runtime wrapper is loaded on a host without a Level-Zero
backend, `getDefaultDevice()` throws an `std::runtime_error`, `catchAll`
catches it, and calls `abort()`, which results in a "PLEASE submit a bug
report" stack dump, which is not correct for this kind of crash.

With this change `catchAll` now writes to stderr and terminates via
`std::exit(EXIT_FAILURE)`, yielding a clean exit code 1 with no crash
dump. The "getDefaultDevice failed" message is also replaced with a
(hopefully) better one.

    [31 lines not shown]
DeltaFile
+13-9mlir/lib/ExecutionEngine/SyclRuntimeWrappers.cpp
+13-91 files

OPNSense/core 983ece5src/opnsense/mvc/app/controllers/OPNsense/IPsec/forms dialogConnection.xml, src/opnsense/mvc/app/views/OPNsense/IPsec connections.volt

ipsec: allow save_cancel render as field and restyle for gap layout incl. content box and vertical border
DeltaFile
+51-34src/opnsense/mvc/app/views/OPNsense/IPsec/connections.volt
+17-0src/opnsense/mvc/app/views/layout_partials/form_input_tr.volt
+0-14src/opnsense/mvc/app/views/layout_partials/base_dialog.volt
+4-0src/opnsense/mvc/app/controllers/OPNsense/IPsec/forms/dialogConnection.xml
+72-484 files