LLVM/project ed2aa30llvm/lib/Target/RISCV RISCVInstrInfoXSf.td

[RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (#179565)

This correctly names the operands vd, vs1, and vs2 instead of rd, rs1,
and rs2. RVInstVCCustom2 is now only used for VCIX which has its own
operand naming problems.

I'm considering using named operand indices in
RISCVAsmParser::validateInstruction for the RVVConstraints, but first I
would have to make vs1, vs2 named correctly across all vector
instructions.
DeltaFile
+8-3llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
+8-31 files

LLVM/project dcf853dllvm/lib/CodeGen/LiveDebugValues InstrRefBasedImpl.cpp, llvm/lib/Support VirtualFileSystem.cpp

[perf] Replace extra copy-assign by move-assign in llvm/lib/ (#179465)

Co-authored-by: Nikita Popov <github at npopov.com>
DeltaFile
+1-3llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
+1-1llvm/lib/Support/VirtualFileSystem.cpp
+2-42 files

LLVM/project 2abc5ecllvm/tools/llvm-objdump SourcePrinter.cpp

[perf] Replace copy-assign by move-assign in llvm/tools/ (#179463)

DeltaFile
+1-1llvm/tools/llvm-objdump/SourcePrinter.cpp
+1-11 files

FreeBSD/src 3f3cc6fsys/dev/rge if_rge_microcode.h if_rge_hw.c

if_rge: sync with up to date OpenBSD code

e574c2d36cbcacf2556088879be336775e80154b
Add support for RTL8125D revision 0x6890000

Reviewed by:    adrian
Differential Revision:  https://reviews.freebsd.org/D54922
MFC after: 2 weeks
DeltaFile
+635-1sys/dev/rge/if_rge_microcode.h
+122-13sys/dev/rge/if_rge_hw.c
+12-8sys/dev/rge/if_rge.c
+5-1sys/dev/rge/if_rgereg.h
+2-1sys/dev/rge/if_rgevar.h
+776-245 files

LLVM/project b10d6a5llvm/lib/Target/RISCV RISCVMacroFusion.td, llvm/test/CodeGen/RISCV macro-fusion-shift-bit-extract.mir macro-fusion-add-mem.mir

[RISCV] Add macro fusion support for spacemit-x100 (#178594)

New fusion types:
- AND(I)/OR(I)/XOR(I) + AND(I)/OR(I)/XOR(I) (3 variants)
- MUL(W)+ADD(W)
- ADD + LOAD/STORE
- SLLI + SRLI/SRAI
DeltaFile
+132-0llvm/test/CodeGen/RISCV/macro-fusion-shift-bit-extract.mir
+108-0llvm/lib/Target/RISCV/RISCVMacroFusion.td
+102-0llvm/test/CodeGen/RISCV/macro-fusion-add-mem.mir
+67-0llvm/test/CodeGen/RISCV/macro-fusion-mul-add.mir
+64-0llvm/test/CodeGen/RISCV/macro-fusion-logic-reg-reg.mir
+62-0llvm/test/CodeGen/RISCV/macro-fusion-logic-imm-reg.mir
+535-03 files not shown
+610-19 files

LLVM/project 3412850llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/MC/AMDGPU gfx8_asm_vop3.s gfx7_asm_vop3.s

Merge branch 'users/ylzsx/precommit-vxi1-masks' into users/ylzsx/vxi1-vector-masks
DeltaFile
+144,154-158,055llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+54,918-53,595llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+41,419-41,418llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+36,428-36,427llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+28,175-28,174llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
+347,443-360,01730,038 files not shown
+4,064,327-2,473,37930,044 files

FreeBSD/ports aa067b9graphics/R-cran-rgl distinfo Makefile

graphics/R-cran-rgl: Update to 1.3.34

Changelog: https://cran.r-project.org/web/packages/rgl/news/news.html
DeltaFile
+3-3graphics/R-cran-rgl/distinfo
+1-1graphics/R-cran-rgl/Makefile
+4-42 files

LLVM/project 0d11f68llvm/test/CodeGen/RISCV/rvv vfma-vp.ll vfmuladd-vp.ll

[RISCV] Run VLOptimizer right after ISel (#179377)

When working on #177238 I found some cases where machine SSA
optimizations (or any optimizations that run before the current
VLOptimizer, really) can benefit from reduced VL operands. In addition,
by running VLOptimizer early, in the future we can further remove the
mini VL reduction currently in RISCVVectorPeephole, once we teach
VLOptimizer some corner cases (e.g. handle vector stores).
This patch therefore moves VLOptimizer to be (basically) right after the
ISel phase.
DeltaFile
+56-50llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+38-38llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll
+29-29llvm/test/CodeGen/RISCV/rvv/vp-vector-interleaved-access.ll
+28-20llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
+13-13llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll
+8-8llvm/test/CodeGen/RISCV/rvv/vsmul.ll
+172-15873 files not shown
+434-41579 files

LLVM/project 1b066dbllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/MC/AMDGPU gfx8_asm_vop3.s gfx7_asm_vop3.s

Merge branch 'main' into users/ylzsx/precommit-vxi1-masks
DeltaFile
+144,154-158,055llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+54,918-53,595llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+41,419-41,418llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+36,428-36,427llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+28,175-28,174llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
+347,443-360,01730,038 files not shown
+4,064,327-2,473,38230,044 files

FreeBSD/ports 4ffaf3dchinese/wordpress-zh_CN distinfo, chinese/wordpress-zh_TW distinfo

www/wordpress: upgrade to 6.9.1

Take maintainership
DeltaFile
+3-3chinese/wordpress-zh_CN/distinfo
+3-3chinese/wordpress-zh_TW/distinfo
+3-3french/wordpress/distinfo
+3-3german/wordpress/distinfo
+3-3japanese/wordpress/distinfo
+3-3russian/wordpress/distinfo
+18-182 files not shown
+23-238 files

LLVM/project d8073d9llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine vector-splice.ll

[InstCombine] Bubble splices of binop operands to their result (#179432)

In #172961 we are trying to remove llvm.experimental.vp.reverse now that
llvm.vector.splice.right supports variable offsets.

A VP reverse reverses the first EVL elements of the vector, e.g.
01234567 -> 210xxxxx when EVL=3, where x=poison.

This can now be represented by splice.right(reverse(V), poison, EVL):

       01234567
    -> 76543210 (reverse)
    -> 210xxxxx (splice.right)

This PR implements the vp.reverse combines that pull through binops, but
generalized to vector.splice. Specifically, this implements the
following combines:

    Op(splice(V1, poison, offset), splice(V2, poison, offset)) -> splice(Op(V1, V2), poison, offset)

    [4 lines not shown]
DeltaFile
+123-0llvm/test/Transforms/InstCombine/vector-splice.ll
+49-0llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+172-02 files

NetBSD/src Dod2M0Csys/arch/arm/arm32 pmap.c

   spaces to tab
VersionDeltaFile
1.445+3-3sys/arch/arm/arm32/pmap.c
+3-31 files

LLVM/project a03f82dllvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp

[AMDGPU][NPM] Add target-specific register allocation options (#178889)

Add below AMDGPU-specific options for its SGPR, WWM & VGPR
registers allocation in NPM -
- `-sgpr-regalloc-npm`
- `-wwm-regalloc-npm`
- `-vgpr-regalloc-npm`
DeltaFile
+102-17llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+54-0llvm/test/tools/llc/new-pm/regalloc-amdgpu.mir
+12-15llvm/include/llvm/Passes/CodeGenPassBuilder.h
+168-323 files

LLVM/project 7b2190cllvm/lib/Target/RISCV RISCVFeatures.td RISCVInstrInfo.td, llvm/test/CodeGen/RISCV compress-opt-select.ll

[RISCV] Enable SelectCompressOpt with HasStdExtZca. (#179601)

This removes the last use of HasStdExtC in tablegen so I've removed it as
well.
DeltaFile
+3-0llvm/test/CodeGen/RISCV/compress-opt-select.ll
+0-3llvm/lib/Target/RISCV/RISCVFeatures.td
+1-1llvm/lib/Target/RISCV/RISCVInstrInfo.td
+4-43 files

NetBSD/src V8aJXbWsys/arch/arm/include cpufunc.h

   KNF
VersionDeltaFile
1.94+2-2sys/arch/arm/include/cpufunc.h
+2-21 files

LLVM/project c46baaamlir/lib/Bindings/Python Globals.cpp

[MLIR][Python] Ignore the returned status of dialect module loading in lookup functions
DeltaFile
+4-6mlir/lib/Bindings/Python/Globals.cpp
+4-61 files

LLVM/project 33f10b1mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-teams.mlir openmp-target-launch-host.mlir

[OpenMP][MLIR] Add thread_limit mlir->llvm lowering
DeltaFile
+47-20mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+36-0mlir/test/Target/LLVMIR/openmp-teams.mlir
+3-3mlir/test/Target/LLVMIR/openmp-target-launch-host.mlir
+3-3mlir/test/Target/LLVMIR/openmp-todo.mlir
+89-264 files

LLVM/project a3a15f3llvm CMakeLists.txt

[LLVM] Remove 'libclc' from ALL projects (#179485)

Summary:
We should only build `libclc` as a runtime in the future. There's
already a warning for putting it in the projects list so it shouldn't be
included in all the projects.
DeltaFile
+2-2llvm/CMakeLists.txt
+2-21 files

LLVM/project d53bf41lld/ELF SyntheticSections.cpp SyntheticSections.h, lld/test/ELF eh-frame-hdr-sdata8.s eh-frame-pcrel-overflow.s

[ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (#179089)

Currently, both GNU ld and lld only support
`table_enc = DW_EH_PE_datarel | DW_EH_PE_sdata4` for .eh_frame_hdr.
When a table entry exceeds the 32-bit range, we can use
`DW_EH_PE_sdata8` instead of reporting an error
(https://reviews.llvm.org/D49607 introduced the "PC offset is too large"
error). This is useful for certain large executables.

This patch auto-detects when 64-bit encoding is needed and upgrades
the encoding accordingly. We use DW_EH_PE_sdata8 when either a table
entry or eh_frame_ptr exceeds the 32-bit range.

Technically, eh_frame_ptr could remain sdata4 when only table entries
require sdata8, but there is little value in this flexibility since
.eh_frame/.eh_frame_hdr distance is a much less strict constraint than
.text/.eh_frame_hdr distance.

The implementation caches FDE data in EhFrameHeader during

    [16 lines not shown]
DeltaFile
+84-87lld/ELF/SyntheticSections.cpp
+110-0lld/test/ELF/eh-frame-hdr-sdata8.s
+0-35lld/test/ELF/eh-frame-pcrel-overflow.s
+11-5lld/ELF/SyntheticSections.h
+6-0lld/ELF/Writer.cpp
+211-1275 files

FreeBSD/src b5e328blib/libpam/pam.d cron, usr.sbin/cron/cron do_command.c

cron: Implement full PAM session lifecycle for user jobs

Extend PAM integration beyond account checks to include credential
establishment and session management, allowing PAM modules to configure
the execution environment for user cron jobs.

Previously, cron only called pam_acct_mgmt() to verify account validity
but immediately terminated the PAM handle before job execution. This
prevented PAM modules from establishing sessions, setting credentials
(e.g., Kerberos tickets), or exporting environment variables needed by
jobs.

The PAM handle now persists in the intermediate process throughout the
job execution, enabling proper session open/close pairing. Credentials
are established and sessions opened while still running as root, before
dropping privileges in the grandchild. PAM environment variables are
exported in the job process with user crontab variables taking precedence.

A session rule (pam_permit.so) is added to /etc/pam.d/cron to enable

    [10 lines not shown]
DeltaFile
+139-5usr.sbin/cron/cron/do_command.c
+3-0lib/libpam/pam.d/cron
+142-52 files

FreeBSD/src 770479clib/libpam/pam.d cron, usr.sbin/cron/cron do_command.c

cron: Implement full PAM session lifecycle for user jobs

Extend PAM integration beyond account checks to include credential
establishment and session management, allowing PAM modules to configure
the execution environment for user cron jobs.

Previously, cron only called pam_acct_mgmt() to verify account validity
but immediately terminated the PAM handle before job execution. This
prevented PAM modules from establishing sessions, setting credentials
(e.g., Kerberos tickets), or exporting environment variables needed by
jobs.

The PAM handle now persists in the intermediate process throughout the
job execution, enabling proper session open/close pairing. Credentials
are established and sessions opened while still running as root, before
dropping privileges in the grandchild. PAM environment variables are
exported in the job process with user crontab variables taking precedence.

A session rule (pam_permit.so) is added to /etc/pam.d/cron to enable

    [10 lines not shown]
DeltaFile
+139-5usr.sbin/cron/cron/do_command.c
+3-0lib/libpam/pam.d/cron
+142-52 files

LLVM/project e206132llvm/test/CodeGen/PowerPC aix-ifunc-toc-restore-query.ll

[AIX] fix aix-ifunc-toc-restore-query.ll (#153049)
DeltaFile
+1-0llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query.ll
+1-01 files

LLVM/project cc58596llvm/test/CodeGen/PowerPC aix-ifunc-toc-restore-query-neg.ll

[AIX] disable aix-ifunc-toc-restore-query-neg.ll on all platforms except ppc for now (#153049)
DeltaFile
+1-0llvm/test/CodeGen/PowerPC/aix-ifunc-toc-restore-query-neg.ll
+1-01 files

Illumos/gate 3e72fe0usr/src/uts/common/io/mac mac_datapath_setup.c mac_soft_ring.c, usr/src/uts/common/sys mac_soft_ring.h

17853 the last vnic will not go gentle into that good night
Reviewed by: Dan Cross <cross at oxidecomputer.com>
Reviewed by: Kyle Simpson <kyle at oxide.computer>
Approved by: Joshua M. Clulow <josh at sysmgr.org>
DeltaFile
+24-77usr/src/uts/common/io/mac/mac_datapath_setup.c
+58-0usr/src/uts/common/io/mac/mac_soft_ring.c
+4-0usr/src/uts/common/sys/mac_soft_ring.h
+86-773 files

DragonFlyBSD/src 5d6e3acusr.bin/netstat route.c

netstat(1): Use same width for 'Netif' column in IPv4/IPv6 cases

This utility used a narrower 'Netif' column for IPv4 than IPv6, which
looks a bit strange and is actually insufficient nowadays, since we
supports to customize the interface name.  So just use the same column
width for both IPv4 and IPv6.
DeltaFile
+1-2usr.bin/netstat/route.c
+1-21 files

FreeBSD/ports f13b9e1misc Makefile, misc/emacs-libvterm Makefile pkg-message

misc/emacs-libvterm: New port for Emacs libvterm integration

Emacs-libvterm (vterm) is fully-fledged terminal emulator inside GNU
Emacs based on libvterm, a C library. As a result of using compiled
code (instead of elisp), emacs-libvterm is fully capable, fast, and it
can seamlessly handle large outputs.

Reviewed by:    jrm
Pull Request:   https://github.com/freebsd/freebsd-ports/pull/480
DeltaFile
+34-0misc/emacs-libvterm/Makefile
+12-0misc/emacs-libvterm/pkg-message
+5-0misc/emacs-libvterm/pkg-plist
+4-0misc/emacs-libvterm/pkg-descr
+3-0misc/emacs-libvterm/distinfo
+1-0misc/Makefile
+59-06 files

LLVM/project 6e2048ellvm/lib/Target/RISCV RISCVInstrInfoZvk.td, llvm/test/CodeGen/RISCV/rvv vwsll-sdnode.ll

[RISCV] Add isel patterns to form vwsll.vx/vi when the LHS is an any_extend. (#179571)

If we know the shift amount is greater than or equal to the
incoming EEW, the zext will have been converted to an anyext by
SimplifyDemandedBits. Treat this case the same as zext.
DeltaFile
+78-0llvm/test/CodeGen/RISCV/rvv/vwsll-sdnode.ll
+16-0llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
+94-02 files

LLVM/project 6b77030clang/include/clang/Basic DiagnosticCommonKinds.td, clang/lib/CodeGen CGDecl.cpp

[WinEH] Fix crash object unwinding in seh block (#172287)

On Windows, prevent object unwinding when the current function uses SEH, consistent with MSVC. It also avoids EH number algorithm crashes
DeltaFile
+29-0clang/test/CodeGenCXX/exceptions-seh.cpp
+6-1clang/lib/CodeGen/CGDecl.cpp
+2-0clang/include/clang/Basic/DiagnosticCommonKinds.td
+37-13 files

FreeBSD/ports 85f2911devel/task distinfo Makefile

devel/task: Update to 3.48.0

Changelog: https://github.com/go-task/task/blob/v3.48.0/CHANGELOG.md

Reported by:    GitHub (watch releases)
DeltaFile
+5-5devel/task/distinfo
+2-3devel/task/Makefile
+7-82 files

FreeBSD/ports 95f5307databases/lmdb distinfo Makefile

databases/lmdb: upgrade to 0.9.35
DeltaFile
+3-3databases/lmdb/distinfo
+1-2databases/lmdb/Makefile
+4-52 files