[InstCombine] Skip redundant demanded element queries in insert chains (#205948)
Avoid re-running `SimplifyDemandedVectorElts` on intermediate
`insertelement` chain nodes when a bounded scan proves the top-level
all-lanes query cannot change the IR.
The skip is implemented inside the `InsertElement` case of
`SimplifyDemandedVectorElts` and is limited to the top-level all-lanes
query (`Depth == 0 && DemandedElts.isAllOnes()`). The bounded scan
matches the existing SDVE depth window and only skips chains with
distinct in-range constant insert indices. This keeps the normal SDVE
path for duplicate indices, variable indices, out-of-range indices,
multi-use chains, and the final chain root.
This was motivated by a cutile matmul compile-time case where loop
unrolling produced 128-lane vector insert/extract chains. Before this
change, InstCombine repeatedly invoked SDVE on intermediate
`insertelement` nodes in those chains. On the representative IR, the
affected InstCombine pass time went from about `44.9 ms` to `29.8 ms`,
[4 lines not shown]
www/deno: fix three patch correctness bugs found in review
- patch-cli_standalone_binary.rs: restore Linux ELF target support by
using || instead of replacing the linux check with freebsd
- patch-ext_os_lib.rs: fix FreeBSD rss() return type usize -> u64 to
match all other platforms; use %%PREFIX%% placeholder so post-patch
REINPLACE_CMD correctly substitutes the install prefix at build time
- Makefile: add s|%%PREFIX%%|${PREFIX}| substitution for ext/os/lib.rs
Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
[RISCV] Remove -riscv-v-fixed-length-vector-lmul-max option (#207312)
Whilst reviewing https://github.com/llvm/llvm-project/pull/207254, I
threw claude at it and it found a crash when passing in a non-default
-riscv-v-fixed-length-vector-lmul-max flag.
This option was added 5 years ago around the time initial fixed vector
support was being added in a719b667a9794, and IIUC it was added so that
support for more LMULs could be added over time.
We don't have any substantial codegen testing for it and I couldn't find
any downstream users either. So rather than trying to fix
https://github.com/llvm/llvm-project/pull/207254 to handle it it seems
easier just to remove it now that fixed vector support for RVV has
matured.
[InstSimplify] Fold value-preserving zext/sext of trunc (#204089)
Fold a value-preserving `zext (trunc nuw X)` / `sext (trunc nsw X)` back
to
`X` in `simplifyCastInst` (when the trunc source type equals the extend
result type and the no-wrap flag guarantees the round-trip is identity).
After indvars canonicalizes a min-index loop, the running-index select
has a
`trunc nuw nsw i64 %iv to i32` on its true side while `arr[i]` is
addressed
directly with the i64 `%iv`. When PHI-translating the select-dependent
address along the backedge (see #203863), the true side becomes
`gep base, zext nneg (trunc nuw %iv)`, which has no matching instruction
in
the loop, so the select dependency is never formed and the redundant
load
survives.
[11 lines not shown]
graphics/fotocx: the port had been updated to version 26.6.1
Move KERN_PROC_PATHNAME sysctl(3) call into its own function
and use it where applicable; this further reduces the number
of linuxisms in the program.
Reported by: portscout
[libc][complex] Enable cabs and cabsf in libc (#206677)
This PR adds basic implementation for cabs and cabsf in LLVM libc and
also extend current MPC infrastructure to support cabs operation.
---------
Signed-off-by: jinge90 <ge.jin at intel.com>
[SPARC] Make SPARC_REGISTER Sparc specific in llvm-readobj and LLDB (#206316)
The commit 4418a8e5 failed to limit SPARC_REGISTER to Sparc targets
only, which causes conflict when adding new dynamic tags for other
targets.
[NewPM] Port StaticDataAnnotator
Standard NewPM pass porting. The PassBuilder wireup/test coverage will
come in the next PR.
Reviewers: arsenm, teresajohnson, mingmingl-llvm
Pull Request: https://github.com/llvm/llvm-project/pull/207629
[NewPM] Port StaticDataSplitter
Standard pass porting. Remove the MBPI member given it was unused.
Reviewers: arsenm, teresajohnson, mingmingl-llvm
Pull Request: https://github.com/llvm/llvm-project/pull/207627
[ObjectYAML][NFC] Hoist ContiguousBlobAccumulator into a shared header (#207306)
Move ContiguousBlobAccumulator out of ELFEmitter.cpp's anonymous
namespace so other yaml2obj emitters can reuse it.
[RFC][AMDGPU][lld] Add object linking support
Add AMDGPU ELF object-linking support in lld, including resource propagation,
LDS layout, indirect-call handling, named-barrier updates, target compatibility
checks, and kernel descriptor/metadata patching.
This is a large PR because the linker needs to understand and validate several
AMDGPU object-linking concepts end to end. I tried to keep the changes scoped to
the necessary linker support and related metadata plumbing, but I'm open to
suggestions on how to split or structure the review to make it easier.
[AMDGPU] Introduce ABI occupancy for object linking
This PR introduces ABI occupancy as the contract used to compile functions under
object linking. The default is derived from the occupancy needed for a 1024
workitem workgroup, can be overridden with `-amdgpu-abi-waves-per-eu`, and can
be overridden per function by `amdgpu-flat-work-group-size` or tightened by an
accepted `amdgpu-waves-per-eu` hint.
The backend emits the selected occupancy in `.amdgpu.info` and uses it to
enforce the object linking register budget.
[docs][AMDGPU] move DMA operations to a separate file (#206917)
This includes the various `.async` and `.tensor` operations. Various
scattered bits of information are now in one place. Also added the
missing documentation for tensor intrinsics.
