LLVM/project 5160322llvm/tools/libCASPluginTest CMakeLists.txt, llvm/unittests/CAS CASTestConfig.h CMakeLists.txt

[CAS] Fix build with LLVM_ENABLE_PIC=OFF (#215351)

libCASPluginTest, added in #213331, is a shared library, which cannot be
built without PIC. Skip it and the tests that need it in that case.
DeltaFile
+0-46llvm/unittests/CAS/CASTestConfig.cpp
+37-0llvm/unittests/CAS/PluginCASTest.cpp
+13-2llvm/unittests/CAS/CMakeLists.txt
+4-3llvm/tools/libCASPluginTest/CMakeLists.txt
+0-4llvm/unittests/CAS/CASTestConfig.h
+54-555 files

LLVM/project e8b75c1llvm/lib/Target/NVPTX NVPTXPassRegistry.def NVPTXTargetMachine.cpp

[NVPTX] Add NewPM boilerplate to NVPTXAssignValidGlobalNames (#215052)
DeltaFile
+46-27llvm/lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp
+8-2llvm/lib/Target/NVPTX/NVPTX.h
+2-2llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+1-0llvm/lib/Target/NVPTX/NVPTXPassRegistry.def
+57-314 files

LLVM/project a17f28amlir/include/mlir/Dialect/EmitC/Transforms Passes.td, mlir/lib/Dialect/EmitC/Transforms WrapFuncInClass.cpp

[mlir][EmitC] Make function name placeholder optional in `wrap-emitc-func-in-class` (#214602)

Allow `class-name-format` in `wrap-emitc-func-in-class` to accept format
strings without a `{}` by disabling format validation in
`llvm::formatv`. Prevents assertion failures.
DeltaFile
+14-0mlir/test/Dialect/EmitC/wrap-func-in-class-static-name.mlir
+4-4mlir/lib/Dialect/EmitC/Transforms/WrapFuncInClass.cpp
+2-2mlir/include/mlir/Dialect/EmitC/Transforms/Passes.td
+20-63 files

HardenedBSD/ports 4f45906ports-mgmt/pkg Makefile distinfo

HBSD: Resolve merge conflict

Bump ports-mgmt/pkg to 2.8.2.

Signed-off-by:  Shawn Webb <shawn.webb at hardenedbsd.org>
DeltaFile
+3-9ports-mgmt/pkg/distinfo
+1-1ports-mgmt/pkg/Makefile
+4-102 files

LLVM/project 77881cfllvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel mul-known-bits.i128.ll

[AMDGPU][GlobalISel] Fix wide multiply with known-zero parts

Materialize a zero accumulator when all partial products for a destination part are skipped, avoiding an invalid null register during legalization.

Change-Id: I05294cf68ddd4363ccb20df7159981280e7c9c4e
DeltaFile
+26-0llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i128.ll
+6-0llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+32-02 files

LLVM/project 56686f3clang/lib/CIR/CodeGen CIRGenDecl.cpp, clang/test/CIR/CodeGen static-vla-pointer.c

[CIR] Evaluate VLA bounds for a static local of variably modified type (#214926)

emitStaticVarDecl bailed with errorNYI whenever a `static` local had a
variably modified type -- in practice a pointer to a VLA, since the
static itself can't be one. CIRGenFunction::emitVariablyModifiedType
already exists and already handles this walk, so this is the same
one-liner classic CodeGen uses in CodeGenFunction::EmitStaticVarDecl.

Found when building binutils. This is autoconf's AC_C_VARARRAYS probe,
so the NYI was quietly changing what configure-based projects build: the
probe failed under -fclangir, config.h came out with HAVE_C_VARARRAYS
undefined and __STDC_NO_VLA__ defined, and gnulib took its non-VLA
fallback paths. Nothing errored -- the CIR build just compiled different
source than the baseline.
DeltaFile
+57-0clang/test/CIR/CodeGen/static-vla-pointer.c
+2-4clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+59-42 files

LLVM/project f11f1a8llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU decode-err.txt

[AMDGPU][MC] Return fail when the decoding is not an VGPR (#215101)

Fixes #215000.
DeltaFile
+13-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+2-1llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+15-12 files

LLVM/project a9adae0llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.h AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU decode-err.txt gfx950_dasm_err.txt

[AMDGPU][MC] Fix crash caused by unsupported non-VGPR widths (#215167)

Fixes #215001.
DeltaFile
+42-0llvm/test/MC/Disassembler/AMDGPU/gfx950_dasm_err.txt
+27-14llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+5-2llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
+5-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+79-164 files

LLVM/project 8978db8mlir/include/mlir/Dialect/MemRef/IR MemRefOps.td, mlir/lib/Dialect/MemRef/IR MemRefMemorySlot.cpp

Revert "[MLIR][Mem2Reg] Add support for memref.alloca_scope" (#215354)

Reverts llvm/llvm-project#214221

unblock bots: 
https://lab.llvm.org/buildbot/#/builders/203
https://lab.llvm.org/buildbot/#/builders/226
https://lab.llvm.org/buildbot/#/builders/234/builds/1876
DeltaFile
+1-39mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
+0-21mlir/test/Dialect/MemRef/mem2reg.mlir
+7-8mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
+8-683 files

LLVM/project 2a0ececllvm/test/CodeGen/AArch64 binopshuffles.ll fixed-deinterleave-intrinsics.ll, llvm/test/Transforms/InterleavedAccess/AArch64 sve-interleaved-accesses.ll interleaved-accesses.ll

[AArch64] Move interleaved access testcase to codegen (#214133)
DeltaFile
+3,049-0llvm/test/CodeGen/AArch64/interleaved-accesses.ll
+1,956-0llvm/test/CodeGen/AArch64/sve-interleaved-accesses.ll
+1,091-0llvm/test/CodeGen/AArch64/fixed-deinterleave-intrinsics.ll
+0-755llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses.ll
+0-602llvm/test/Transforms/InterleavedAccess/AArch64/sve-interleaved-accesses.ll
+402-0llvm/test/CodeGen/AArch64/binopshuffles.ll
+6,498-1,3576 files not shown
+6,645-2,34312 files

HardenedBSD/ports 0f6a62adevel/boost-libs pkg-plist, multimedia/wf-recorder/files patch-ffmpeg-9

Merge remote-tracking branch 'rad/freebsd/main' into hardenedbsd/main

Conflicts:
        ports-mgmt/pkg/distinfo (unresolved)
DeltaFile
+425-60devel/boost-libs/pkg-plist
+0-147x11/lightdm/files/patch-data_Makefile.in
+103-0multimedia/wf-recorder/files/patch-ffmpeg-9
+6-92x11/lightdm/files/patch-src_vt.c
+14-72x11/lightdm/files/patch-src_session-child.c
+0-63x11/lightdm/files/patch-src_x-server.c
+548-434273 files not shown
+1,319-1,018279 files

FreeNAS/freenas c6bb433src/middlewared/middlewared/plugins/directoryservices_ util_cache.py

Fix imports
DeltaFile
+0-2src/middlewared/middlewared/plugins/directoryservices_/util_cache.py
+0-21 files

LLVM/project 5ef04fbllvm/include/llvm/Transforms/Vectorize/SandboxVectorizer DependencyGraph.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer Scheduler.cpp DependencyGraph.cpp

[SandboxVec][Scheduler][DAG] Fix the update of DGNode on setOperand (#214110)

The callback for updating the DAG when a Use is set was part of the DAG.
But the DAG is not aware of the scheduling direction so it would try to
update the UnscheduledPreds even in the bottom-up direction, which would
cause an assertion failure.

The fix is to make the DAG aware of the scheduling direction and guard
the Unscheduled counters based on the direction.
DeltaFile
+90-46llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
+42-0llvm/test/Transforms/SandboxVectorizer/scheduling_assertion_error.ll
+20-4llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
+12-2llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
+0-12llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
+7-5llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
+171-691 files not shown
+172-787 files

HardenedBSD/src cb29d34lib/libsysdecode netlink.c, share/man/man4 unix.4

Merge remote-tracking branch 'rad/hardened/current/master' into hardened/current/pledge
DeltaFile
+771-0tests/sys/kern/unix_connectat.c
+353-136sys/kern/uipc_usrreq.c
+181-17lib/libsysdecode/netlink.c
+122-0sys/dev/ixl/ixl_pf_iov.c
+120-0tests/sys/kern/unix_passfd_test.c
+104-1share/man/man4/unix.4
+1,651-15430 files not shown
+2,097-22136 files

HardenedBSD/src aa4bd61lib/libsysdecode netlink.c, share/man/man4 unix.4

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+771-0tests/sys/kern/unix_connectat.c
+353-136sys/kern/uipc_usrreq.c
+181-17lib/libsysdecode/netlink.c
+122-0sys/dev/ixl/ixl_pf_iov.c
+120-0tests/sys/kern/unix_passfd_test.c
+104-1share/man/man4/unix.4
+1,651-15430 files not shown
+2,097-22136 files

HardenedBSD/src 082a588lib/libc/db/hash hash_func.c, sys/dev/uart uart_dev_ns8250.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+1-106lib/libc/db/hash/hash_func.c
+39-9usr.sbin/bhyve/block_if.c
+25-13usr.sbin/bhyve/bhyve.8
+30-8usr.sbin/bhyve/bhyverun.c
+7-0sys/dev/uart/uart_dev_ns8250.c
+3-2usr.sbin/bhyve/riscv/bhyverun_machdep.c
+105-1385 files not shown
+118-14411 files

LLVM/project 2299be0clang/test/CodeGenHLSL/builtins step.hlsl step-overloads.hlsl, clang/test/SemaHLSL/BuiltIns step-errors.hlsl

[HLSL] Move `step` implementation to header files (#214604)

Closes #213098.

This PR replaces the previous implementation of `step` with a new one
inside the header files.

Assisted-by: Claude Opus 4.8
DeltaFile
+81-68clang/test/CodeGenHLSL/builtins/step-overloads.hlsl
+33-48clang/test/CodeGenHLSL/builtins/step.hlsl
+0-78llvm/test/CodeGen/DirectX/step.ll
+21-13clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
+0-33llvm/test/CodeGen/SPIRV/hlsl-intrinsics/step.ll
+0-26llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+135-26610 files not shown
+142-30316 files

LLVM/project 627002ellvm/lib/Target/AArch64 AArch64SchedHIP12.td, llvm/test/tools/llvm-mca/AArch64/HiSilicon hip12-forwarding.s hip12-basic-instructions.s

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+6,869-0llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-instructions.s
+5,269-0llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-writeback.s
+3,354-0llvm/lib/Target/AArch64/AArch64SchedHIP12.td
+3,159-0llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-neon-instructions.s
+2,519-0llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-basic-instructions.s
+1,871-0llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-forwarding.s
+23,041-0578 files not shown
+47,336-10,034584 files

LLVM/project 09b1ed1mlir/include/mlir/Dialect/MemRef/IR MemRefOps.td, mlir/lib/Dialect/MemRef/IR MemRefMemorySlot.cpp

Revert "[MLIR][Mem2Reg] Add support for memref.alloca_scope (#214221)"

This reverts commit 7214eb03c28238b89b6ba7e6d56b67359d6cf79e.
DeltaFile
+1-39mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp
+0-21mlir/test/Dialect/MemRef/mem2reg.mlir
+7-8mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
+8-683 files

LLVM/project a3c784ellvm/include/llvm/IR PassInstrumentation.h, llvm/include/llvm/Passes StandardInstrumentations.h

[PassInstrumentation] Pass Any as const &. (NFC) (#215120)

llvm::Any has a heap allocation on every copy and pass instrumentations
take the IR unit to instrument as llvm::Any. In the default pipeline
without any additional options, OptNoneInstrumentation is registered and
runs on each executed pass.

Update to take llvm::Any as const &, to avoid unnecessary heap
allocations and improves compile-time:

* stage1-O3: -0.25%
* stage1-ReleaseThinLTO: -0.26%
* stage1-ReleaseLTO-g: -0.20%
* stage1-aarch64-O3: -0.22%
* stage2-O3: -0.26%
* clang: -0.46%


https://llvm-compile-time-tracker.com/compare.php?from=5371bcaa368e59a99a03f6a726949ee52e07fb65&to=a4544f9d91d9f806791f2ba74cd93b0685fc3f75&stat=instructions:u

    [5 lines not shown]
DeltaFile
+84-75llvm/lib/Passes/StandardInstrumentations.cpp
+23-22llvm/include/llvm/Passes/StandardInstrumentations.h
+19-15llvm/unittests/IR/PassBuilderCallbacksTest.cpp
+9-6llvm/lib/Transforms/Utils/Debugify.cpp
+7-7llvm/include/llvm/IR/PassInstrumentation.h
+7-6llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
+149-1317 files not shown
+168-14913 files

LLVM/project 2d60b83llvm/lib/CodeGen/SelectionDAG LegalizeTypes.h LegalizeVectorTypes.cpp, llvm/test/CodeGen/AArch64 fixed-vector-interleave-widen-no-neon.ll sve-vector-interleave-widen.ll

[AArch64] Add widening for vector interleave (#214313)
DeltaFile
+492-0llvm/test/CodeGen/AArch64/sve-vector-interleave-widen.ll
+216-0llvm/test/CodeGen/AArch64/fixed-vector-interleave-widen-no-neon.ll
+47-2llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+756-24 files

FreeNAS/freenas b5afc29src/middlewared/middlewared/plugins directoryservices.py, src/middlewared/middlewared/plugins/directoryservices_ util_cache.py

NAS-142059 / 27.0.0-BETA.1 / Directory services cache fixes (#19477)

insert_cache_entry() built the NAME_ key from the numeric id rather than
the name, so entries added by the lazy insertion path were only
reachable by id. A by-name lookup for such an entry missed the cache and
fell through to NSS plus idmap.synthetic_user. The bulk fill path was
unaffected, and query_cache_entries() reads only ID_-prefixed keys, so
enumeration results did not change.

DSCacheFill did not remove its temporary files when `fill_cache()`
raised `before _commit()`, so a failed fill can leave
`directory_service_cache_tmp_*` files behind in the cache `directory.
fill_cache()` documents NssError, WBCErr and job abort as reachable, and
nothing else removes those files. Cleanup now also covers a failure
partway through `__enter__`, which does not invoke `__exit__`.

expire_cache() now writes a timezone-aware UTC timestamp, matching
fill_cache() and check_cache_expired().


    [9 lines not shown]
DeltaFile
+199-0tests/unit/test_directoryservices_util_cache.py
+51-29src/middlewared/middlewared/plugins/directoryservices_/util_cache.py
+5-5src/middlewared/middlewared/plugins/directoryservices.py
+255-343 files

LLVM/project 1f9f944clang/lib/CIR/CodeGen CIRGenCall.cpp, clang/test/CIR/CodeGen pass-object-size.c

[CIR] Fix crash calling a variadic pass_object_size function with no varargs (#214928)

arrangeFreeFunctionLikeCall added getNumPassObjectSizeParams(proto) to
the extra-slot count it passed to
RequiredArgs::getFromProtoWithExtraSlots, which adds that same count
itself. The pass_object_size slots were therefore counted twice, and the
resulting signature claimed more required arguments than the CallArgList
held.

requiredArguments() builds an ArrayRef of getNumRequiredArgs() entries
over the trailing-object array, so the over-count read past the end and
handed a null QualType to convertType -- a segfault in release, an
assertion in +asserts. The call had to supply zero variadic arguments
for the counts to disagree; one or more explicit varargs padded the
array back over the required count and hid it.

```
  extern int f(const char *__attribute__((pass_object_size(1))) s, ...);
  int main(void) { f("x"); return 0; }    // crashed in every -fclangir mode

    [16 lines not shown]
DeltaFile
+48-0clang/test/CIR/CodeGen/pass-object-size.c
+14-2clang/lib/CIR/CodeGen/CIRGenCall.cpp
+62-22 files

FreeBSD/ports 6c34779net/hostapd-devel/files patch-src_utils_os__unix.c, net/hostapd/files patch-src_utils_os__unix.c

{net,security}/{hostapd*,wpa_supplicant*}: Remove unneeded patch

Upstream has incorporated our patch. We can remove ours now.

Fixes:  d7e66a13b386, 2b067a2748cc, f37b72501299, f37b72501299
DeltaFile
+0-16security/wpa_supplicant/files/patch-src_utils_os__unix.c
+0-16security/wpa_supplicant-devel/files/patch-src_utils_os__unix.c
+0-16net/hostapd/files/patch-src_utils_os__unix.c
+0-16net/hostapd-devel/files/patch-src_utils_os__unix.c
+1-1security/wpa_supplicant-devel/Makefile
+1-0security/wpa_supplicant/Makefile
+2-652 files not shown
+4-658 files

HardenedBSD/ports 6c34779net/hostapd-devel/files patch-src_utils_os__unix.c, net/hostapd/files patch-src_utils_os__unix.c

{net,security}/{hostapd*,wpa_supplicant*}: Remove unneeded patch

Upstream has incorporated our patch. We can remove ours now.

Fixes:  d7e66a13b386, 2b067a2748cc, f37b72501299, f37b72501299
DeltaFile
+0-16security/wpa_supplicant/files/patch-src_utils_os__unix.c
+0-16security/wpa_supplicant-devel/files/patch-src_utils_os__unix.c
+0-16net/hostapd/files/patch-src_utils_os__unix.c
+0-16net/hostapd-devel/files/patch-src_utils_os__unix.c
+1-1security/wpa_supplicant-devel/Makefile
+1-0security/wpa_supplicant/Makefile
+2-652 files not shown
+4-658 files

FreeBSD/src 4f87828sys/riscv/include atomic.h

riscv/atomic: Provide some additional aliases

These are already available and having them defined helps keep the KASAN
atomic(9) interceptors uniform.

Reviewed by:    mhorne
MFC after:      1 week
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D58680
DeltaFile
+3-0sys/riscv/include/atomic.h
+3-01 files

HardenedBSD/src 4f87828sys/riscv/include atomic.h

riscv/atomic: Provide some additional aliases

These are already available and having them defined helps keep the KASAN
atomic(9) interceptors uniform.

Reviewed by:    mhorne
MFC after:      1 week
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D58680
DeltaFile
+3-0sys/riscv/include/atomic.h
+3-01 files

HardenedBSD/src 46dc4af. RELNOTES

RELNOTES: Add an entry for a new unix socket feature
DeltaFile
+4-0RELNOTES
+4-01 files

FreeBSD/src 46dc4af. RELNOTES

RELNOTES: Add an entry for a new unix socket feature
DeltaFile
+4-0RELNOTES
+4-01 files

FreeNAS/freenas c58c88f

Empty commit to create PR on github.

You should reset it
DeltaFile
+0-00 files