[AMDGPU] Add assembler check for GFX1250 unclaused vmem workaround (#209517)
Warn if an entrypoint does not start with the standard workaround
sequence.
[SPIR-V] Preserve signed i1 semantics in sitofp (#209232)
selectIToF hardcoded IsSigned=false when materializing the bool-to-int
conversion, so sitofp i1 true was miscompiled as 1.0 instead of -1.0
[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210080)
In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When importing ARM64X
image, add both native and EC views to the symbol table on EC targets.
Also getMachine() on such images returns ARM64X, treat it as ARM64
instead.
AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper
Here we also had to change comparisons to extended LLTs to avoid
matching bfloats. In the old scalar version, before the switch to extended
LLTs, s16 was treated as f16 and bf16 was combined as if it were f16.
AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering
We could get away with just the type from MMO in most cases, but MMO splitting
creates MMO with LLT::scalar and we prefer integer.
AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store
Affects f16 and bf16. Earlier, they were widened to f32 and s32 respectively.
The actual error was the artifact combiner creating a copy between f32/i32
which fails in the machine verifier. Maybe we could create a bitcast there.
However i32 is more efficient for us and matches well with how argument
lowering keeps f16 and bf16 in i32 copies to/from physical registers.
Also starting from f16 store, G_STORE %0(f16), %1(p1) :: (store (f16),
and doing widen scalar to 32 bit type, i32 makes more sense since store
will store 16 least significant bits G_STORE %0(i32), %1(p1) :: (store (f16)
compared to G_STORE %0(f32), %1(p1) :: (store (f16), which looks incorrect if
we assume input was really in f32 format.
AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT
Use LLT::integer in bit twiddling lowering for extract/insert vector element.
Fix CI failures: type compose progress state as dataclasses for mypy --strict and apply ruff import sorting/formatting to new files
Co-Authored-By: Claude Fable 5 <noreply at anthropic.com>
[libcxx] avoid include Uppercase windows headers (#208903)
We should use unknwn.h and windows.h instead of Unknwn.h and Windows.h
because Linux and other non‑Windows systems treat filenames as
case‑sensitive. Windows does not, so mixed‑case includes work there but
break elsewhere. Both mingw‑w64‑crt and windows‑msvc‑sysroot provide all
Windows headers in fully lowercase, so using the lowercase forms ensures
consistent cross‑platform builds.
Fixes #208901
AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs
Handle bitcast between i16 and f16/bf16.
For true16 this was already legal, make it legal in regbanklegalize as well.
For non-true16 widen it using G_ANYEXT to i32 and G_TRUNC to dst.
The "i32 G_ANYEXT f16/bf16" and "f16/bf16 G_TRUNC i32" are already legal,
for example these are generated by common CallLowering argument lowering.
graphics/linux-rl9-vulkan: Add vulkan-tools
Following the same Linux packaging pattern as x11/linux-rl9-xorg-libs,
we're simplifying any additional Linux Vulkan packaging into a single
port.
PR: 296502
Co-authored-by: Vincent <tmp386 at live.com>
Approved by: arrowd (co-mentor)
Add stall-based job timeout to busy_wait_on_job and assert image reuse via pull progress in app reinstall test
Co-Authored-By: Claude Fable 5 <noreply at anthropic.com>
