[SLP]Flatten fsub/fneg chains into fadd reductions with per-operand signs
For unordered fadd reductions, reassociable (reassoc+nsz) fsub/fneg
chain links are recursed into and their leaves tracked with a flipped
sign, which is part of the grouping key, so reduced-values groups are
sign-uniform by construction. If per-value signs cannot model the
chain, the analysis restarts once without the flattening. Negated
parts are combined with vector fsub (may form per-lane fma) and
subtracted once in the final combine; no extra negations are emitted.
Fixes #211521
Reviewers: hiraditya, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/215840
[ConstraintElim] Support loops where header is also latch. (#221494)
Remove the bail out for header == latch. We now support deriving facts
from the latch condition and the restriction is no longer necessary.
This enables inferring additional flags in a number of cases, and a few
additional folds in practice:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1200.
It also removes a surprising limitation when writing manual tests.
PR: https://github.com/llvm/llvm-project/pull/221494
[LifetimeSafety] Gate lifetime checks behind per-diagnostic opts (#221610)
Granular Lifetime Safety Check Gating
We split `IsLifetimeSafetyEnabled` into individual check functions in
`SemaLifetimeSafety.h`.
These properties are stored in `LifetimeSafetyOpts`, which are then
checked inside the `Checker` to avoid invoking expensive reporting
functions mapping to diagnostics that are disabled.
`reportMisplacedLifetimebound` was found to be the most expensive
(possibly because it iterates on redecls).
[mlir][NVVM] Reject f16 WGMMA accumulators for BF16 inputs (#220869)
WGMMA supports an f32 accumulator for BF16 multiplicands. The verifier
also accepted an f16 accumulator, allowing an unsupported operation
through dialect verification.
Restrict the BF16 case to f32 and add verifier coverage to the existing
NVVM dialect test.
Found by Coverity.
Assisted-by: Codex
CodeGen: Drop inert -fp-contract flags from tests
-fp-contract is nearly dead, but referenced in tests. These have
no output change with or without the flag now.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[orc-rt] Add ORC_RT_ENABLE_PIC, default on. (#221705)
An upcoming patch will add support for building bedrock as a dylib. In
preparation for this, add ORC_RT_ENABLE_PIC option, and use it to set
POSITION_INDEPENDENT_CODE (needed for shared library builds) on the
bedrock and support object libraries.
[clang][AST] Fix generation with multiple external sources (#219189)
ExternalASTSource::incrementGeneration returns the OldGeneration,
which must be taken into account in case it is delegated to the topmost
external source.
This obsoletes a long-standing downstream patch in Cling that was
previously submitted in https://reviews.llvm.org/D39714.
Test proposed by Vassil Vassilev, assisted by Claude.
[LV] Bring isLegalGatherOrScatter in line with existing method (NFC) (#221698)
Bring isLegalGatherOrScatter in line with isLegalMaskedLoadOrStore in
prepartion to widen gathers/scatters in VPlan.
[clang][NVPTX][MLIR][NVVM] Add overloaded fadd intrinsics (#221681)
This change adds the following overloaded `fadd` intrinsics with
NVPTX codegen:
- `llvm.nvvm.fadd`
- `llvm.nvvm.fadd.ftz`
- `llvm.nvvm.fadd.sat`
- `llvm.nvvm.fadd.ftz.sat`
The rounding mode is passed in as an `i32` immediate operand.
Auto-upgrades the older non-overloaded intrinsics to the new
ones, and updates clang builtins, CIR codegen, and MLIR NVVM ops
to lower to the new intrinsics.
In the interest of completion, this also:
- Adds intrinsics support for lowering some half-precision additions
that were omitted earlier (`f16/f16x2` without saturation, and
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[ValueTracking] Handle idx widths > 64 bit in GetPointerBaseWithConst. (#221692)
GetPointerBaseWithConstantOffset may be called for GEPs with indices
that do not fit into 64 bit. Use trySExtValue to avoid assertions in the
newly added tests.
PR: https://github.com/llvm/llvm-project/pull/221692
[AArch64][GlobalISel] Select i16/f16 cross-bank bitcasts (#220612)
Test bitcast_to_half in
llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll crashes with
H0 = COPY W8
unimplemented reg-to-reg copy
UNREACHABLE executed at
/home/culrho01/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp:6363!
when type-based RegBankSelect (#199040) is enabled. Normal RBS keeps
both operands on GPR and moves to FPR afterward. This extends
instruction select to support bitcasts where src/dst reg bank doens't
match.
Assisted-by: codex
[libc] Enable code coverage using continuous instrumentation profiling (#213271)
This patch adds coverage to LLVM-libc using Clang continuous
instrumentation.
The `LIBC_ENABLE_COVERAGE` CMake option enables
`-fprofile-instr-generate=libc_cov_%c%p.profraw`, `-fcoverage-mapping`,
and `-fprofile-continuous` for Clang overlay builds, and is limited to
overlay build.
Developer documentation and usage instructions are added in
`libc/docs/dev/code_coverage.md` and indexed in
`libc/docs/dev/index.md`.
Assisted-by: Automated tooling, human reviewed.
py-rich-click: updated to 1.9.9
1.9.9
Fixed ctx.forward() not working with commands patched via rich_click.patch()
Added support for Click 8.5 (resolved DeprecationWarnings)
geography/mapserver: Update to 8.6.6
This release contains multiple security fixes, for issues that are
surely not all listed in pkg-vulnerabilities.
Upstream NEWS (misplaced in HISTORY.md), less non-NEWS content:
8.6.6 release (2026-09-06)
--------------------------
8.6.5 release (2026-07-10)
--------------------------
