HardenedBSD/ports a3c8d20 — devel/py-dj60-strawberry-graphql Makefile, editors/zed Makefile.crates distinfo

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+171-199editors/zed/distinfo
+21-185editors/zed/files/patch-Cargo.lock
+84-98editors/zed/Makefile.crates
+75-0science/py-netCDF4/files/patch-src_netCDF4___netCDF4.pyx
+27-0textproc/R-cran-rio/files/patch-tests_testthat_test__import__list.R
+20-5devel/py-dj60-strawberry-graphql/Makefile
+398-487123 files not shown
+678-832129 files

LLVM/project 1259d00 — llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll amdgcn.bitcast.832bit.ll

[AMDGPU] Enable SlotIndexes compaction by default

Add TargetRegisterInfo::shouldCompactSlotIndexes() so targets can opt
in to dropping dead SlotIndexes entries before greedy allocation, one
target at a time. An explicit -greedy-compact-slot-indexes still
overrides the target. Enable it for AMDGPU, where the leftover entries
skew live range priorities enough to cause heavy spilling.
DeltaFile
+83,931-84,023llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+22,996-22,987llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+9,311-9,381llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+8,998-9,209llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+8,016-8,194llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+7,335-7,432llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+140,587-141,226281 files not shown
+233,470-234,081287 files

LLVM/project aa2599c — llvm/lib/Analysis MemorySSAUpdater.cpp LoopInfo.cpp

[Analysis] Do not check result of getTerminator. NFC. (#232760)

Since #189416 BasicBlock::getTerminator cannot return nullptr.
DeltaFile
+1-5llvm/lib/Analysis/TargetTransformInfo.cpp
+1-3llvm/lib/Analysis/MemorySSAUpdater.cpp
+1-3llvm/lib/Analysis/LoopInfo.cpp
+3-113 files

LLVM/project caca755 — llvm/lib/MC GOFFObjectWriter.cpp, llvm/test/CodeGen/SystemZ zos-symbol-2.ll zos-common-global.ll

[SystemZ][z/OS] Add AMODE to PR symbols (#223541)

Contrary to the documentation, setting the AMODE at PR symbols is
required. The symptom is that references to variables `optind` and
`optarg` (from include `<getopt.h>`, the LE-provided C runtime) results
in "missing symbol" errors.
The fix is to derive the AMODE of the PR from the RMODE of the ED, which
is the way HLASM handles it.
DeltaFile
+19-0llvm/lib/MC/GOFFObjectWriter.cpp
+4-4llvm/test/CodeGen/SystemZ/zos-section-2.ll
+2-2llvm/test/CodeGen/SystemZ/zos-section-1.ll
+1-1llvm/test/tools/llvm-ar/zos-symattrs.test
+1-1llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
+1-1llvm/test/CodeGen/SystemZ/zos-common-global.ll
+28-96 files

LLVM/project 3dd5077 — llvm/utils/TableGen DecoderEmitter.cpp CodeEmitterGen.cpp, llvm/utils/TableGen/Common InstructionEncoding.h CodeGenTarget.h

[TableGen] Reverse little-endian encoding bits without mutating records (#234583)

CodeEmitterGen and DecoderEmitter reversed the Inst field of every
instruction encoding in place for targets with little-endian encodings.
As suggested by the FIXME, replace this with a helper,
getInstructionEncodingBits, that returns the reversed bits and caches
them, and use it wherever these backends read the encoding bits.

Creating new BitsInits from a backend seems contrary to the const
correctness goals of #108752, so this patch allocates raw arrays from a
new BumpPtrAllocator instead.

Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+17-36llvm/utils/TableGen/Common/CodeGenTarget.cpp
+24-24llvm/utils/TableGen/CodeEmitterGen.cpp
+16-15llvm/utils/TableGen/Common/InstructionEncoding.cpp
+8-3llvm/utils/TableGen/Common/CodeGenTarget.h
+4-4llvm/utils/TableGen/DecoderEmitter.cpp
+4-4llvm/utils/TableGen/Common/InstructionEncoding.h
+73-866 files

FreeBSD/ports 71c3e8b — textproc/py-genshi Makefile distinfo

textproc/py-genshi: Update to 0.7.12

ChangeLog:

1. https://github.com/edgewall/genshi/releases/tag/0.7.12

Reported by:    "Simon Cross" <notifications at github.com>
DeltaFile
+3-3textproc/py-genshi/distinfo
+2-2textproc/py-genshi/Makefile
+5-52 files

HardenedBSD/ports 71c3e8b — textproc/py-genshi Makefile distinfo

textproc/py-genshi: Update to 0.7.12

ChangeLog:

1. https://github.com/edgewall/genshi/releases/tag/0.7.12

Reported by:    "Simon Cross" <notifications at github.com>
DeltaFile
+3-3textproc/py-genshi/distinfo
+2-2textproc/py-genshi/Makefile
+5-52 files

LLVM/project 985a9ef — compiler-rt/lib/builtins/macho_embedded arm.txt

[compiler-rt] Add fnan2, fnorm2, funder to macho_embedded arm.txt

After #168394 armv6m's mulsf3.S references these helpers, but they
were filtered out of the macho_embedded builtins, leaving undefined
symbols at link time.

Assisted-By: Claude
DeltaFile
+3-0compiler-rt/lib/builtins/macho_embedded/arm.txt
+3-01 files

LLVM/project cb4e606 — llvm/lib/Target/AArch64 AArch64StackTaggingPreRA.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 settag.ll

[AArch64][MTE] Lower llvm.aarch64.settag with a variable size
DeltaFile
+133-1llvm/test/CodeGen/AArch64/settag.ll
+104-0llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+21-3llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
+15-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+3-1llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp
+276-55 files

LLVM/project b805db3 — llvm/test/CodeGen/AMDGPU global-saddr-load.ll, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.image.gather4.a16.dim.ll legalize-llvm.amdgcn.image.atomic.dim.a16.ll

rebase and update test
DeltaFile
+1,222-1,222llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
+84-1,344llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
+494-494llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
+112-752llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
+432-432llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
+419-419llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
+2,763-4,66314 files not shown
+4,273-6,05220 files

LLVM/project 013c802 — clang/include/clang/DependencyScanning DependencyScanningWorker.h, clang/include/clang/Tooling DependencyScanningTool.h

[clang][DepScan] Introduce API to find modulemaps without loading

Introduce a way to batch look up the modulemap that defines
each of a set of module names.

`getModuleMapsForModules` builds a compiler instance from the same
command line as a by-name scan, then does every lookup in a separate
header search with lazy modulemap loading turned on and diagnostics
ignored.

The main use case is to let the Swift dependency scanner
invalidate its serialized dependency graph without the cost of loading
the referenced modules.

* Modulemaps passed with `-fmodule-map-file` are parsed first, all
  other modules are resolved by by-name header search.
DeltaFile
+160-0clang/unittests/Tooling/DependencyScannerTest.cpp
+91-6clang/lib/DependencyScanning/DependencyScanningWorker.cpp
+33-6clang/lib/Tooling/DependencyScanningTool.cpp
+12-0clang/include/clang/Tooling/DependencyScanningTool.h
+9-0clang/include/clang/DependencyScanning/DependencyScanningWorker.h
+305-125 files

LLVM/project 4511fac — bolt/lib/Rewrite BinaryPassManager.cpp, bolt/test/AArch64 patch-entries-old-text.s

[BOLT] Skip PatchEntries pass when old text will be rewritten (#235153)

If the original text section will be rewritten (--use-old-text), then
there is no original function entry to patch, and hence we should skip
the PatchEntries pass.
DeltaFile
+46-0bolt/test/AArch64/patch-entries-old-text.s
+3-2bolt/lib/Rewrite/BinaryPassManager.cpp
+49-22 files

FreeBSD/ports f74f5c7 — dns/dnscontrol Makefile distinfo

dns/dnscontrol: Update to 5.7.0
DeltaFile
+5-5dns/dnscontrol/distinfo
+1-2dns/dnscontrol/Makefile
+6-72 files

HardenedBSD/ports f74f5c7 — dns/dnscontrol Makefile distinfo

dns/dnscontrol: Update to 5.7.0
DeltaFile
+5-5dns/dnscontrol/distinfo
+1-2dns/dnscontrol/Makefile
+6-72 files

LLVM/project 26e50de — llvm/test/CodeGen/AArch64 selectiondag-order.ll

[AArch64] Remove +avx from selectiondag-order.ll test. NFC (#235842)
DeltaFile
+17-17llvm/test/CodeGen/AArch64/selectiondag-order.ll
+17-171 files

FreeBSD/ports cdbf242 — www/vikunja Makefile distinfo

www/vikunja: Update to 2.7.1
DeltaFile
+7-7www/vikunja/distinfo
+1-2www/vikunja/Makefile
+8-92 files

HardenedBSD/ports cdbf242 — www/vikunja Makefile distinfo

www/vikunja: Update to 2.7.1
DeltaFile
+7-7www/vikunja/distinfo
+1-2www/vikunja/Makefile
+8-92 files

LLVM/project a2931f8 — .github CODEOWNERS, bolt Maintainers.md

[BOLT][AArch64] Update backend maintainer (#233402)

Former maintainer Paschalis Mpeis has handed over maintainer duties to
Alexandros Lamprineas.
DeltaFile
+5-2bolt/Maintainers.md
+1-1.github/CODEOWNERS
+6-32 files

HardenedBSD/ports 0ac0381 — multimedia/minisatip Makefile distinfo

multimedia/minisatip: Update to 2.0.173
DeltaFile
+3-3multimedia/minisatip/distinfo
+1-1multimedia/minisatip/Makefile
+4-42 files

FreeBSD/ports 0ac0381 — multimedia/minisatip Makefile distinfo

multimedia/minisatip: Update to 2.0.173
DeltaFile
+3-3multimedia/minisatip/distinfo
+1-1multimedia/minisatip/Makefile
+4-42 files

FreeBSD/ports 3eecbb7 — sysutils/dfc distinfo Makefile

sysutils/dfc: Update and fix build with CMake 4

- Update port to snapshot dated 20251014.
- Upstream moved to GitHub.
- Pet port{clippy,fmt}.

PR:             299500, 297958
Reported by:    arrowd (PR 297958)
Approved by:    osa, vvd (Mentors, implicit)
MFH:            2026Q4

(cherry picked from commit 27f5051ac41a8596b6af88114fed4852b340446a)
DeltaFile
+12-6sysutils/dfc/Makefile
+3-3sysutils/dfc/distinfo
+15-92 files

LLVM/project 0d14a9f — llvm/lib/Support/Unix Program.inc

[SystemZ][z/OS] Enable z/OS to write in UTF-8 in writeFileWithEncoding (#234736)

The function writeFileWithEncoding() writes UTF-8 on all Unix-line
platforms. Do the same for z/OS.
The fixes the failure in ProgramTest.TestWriteWithSystemEncoding.
DeltaFile
+13-0llvm/lib/Support/Unix/Program.inc
+13-01 files

HardenedBSD/ports 27f5051 — sysutils/dfc distinfo Makefile

sysutils/dfc: Update and fix build with CMake 4

- Update port to snapshot dated 20251014.
- Upstream moved to GitHub.
- Pet port{clippy,fmt}.

PR:             299500, 297958
Reported by:    arrowd (PR 297958)
Approved by:    osa, vvd (Mentors, implicit)
MFH:            2026Q4
DeltaFile
+12-6sysutils/dfc/Makefile
+3-3sysutils/dfc/distinfo
+15-92 files

FreeBSD/ports 27f5051 — sysutils/dfc distinfo Makefile

sysutils/dfc: Update and fix build with CMake 4

- Update port to snapshot dated 20251014.
- Upstream moved to GitHub.
- Pet port{clippy,fmt}.

PR:             299500, 297958
Reported by:    arrowd (PR 297958)
Approved by:    osa, vvd (Mentors, implicit)
MFH:            2026Q4
DeltaFile
+12-6sysutils/dfc/Makefile
+3-3sysutils/dfc/distinfo
+15-92 files

LLVM/project 1c403fd — lld/ELF InputSection.cpp, llvm/include/llvm/Support Compiler.h

[ELF] Make merge section piece lookup branchless. NFC (#235375)

getSectionPiece's binary search causes a lot of branch mispredictions.
Rewrite the search so that the compiler emits a conditional move.

In a clang build, SimplifyCFG folds the ?: operator into a select, but
X86CmovConversion turns a cmov on a loop's critical path back into a
branch unless the condition is marked with `__builtin_unpredictable`.
GCC emits a cmov either way.

```
Write sections        1561 -> 940 ms
Total, --threads=8    5.07 -> 4.49 s
Total, --threads=1    21.6 -> 17.0 s
```
DeltaFile
+6-3lld/ELF/InputSection.cpp
+8-0llvm/include/llvm/Support/Compiler.h
+14-32 files

LLVM/project 82cc603 — mlir/lib/Dialect/Vector/Utils VectorUtils.cpp, mlir/test/Dialect/Linalg/vectorization insert-slice.mlir

[mlir][vector] Mask a write that fills its dims but starts at a non-zero index (#233243)

`createWriteOrMaskedWrite` left a write unmasked when the vector shape
matched the destination dims it writes to, without looking at the write
indices. A write that starts at a non-zero index then runs past the end
of the destination.

For example, vectorizing this with `vector_sizes [8]`:

```mlir
%r = tensor.insert_slice %src into %dest[2] [6] [1]
    : tensor<6xi32> into tensor<8xi32>
```

gave an unmasked `vector.transfer_write` of 8 elements at index 2, which
also writes `%dest[8]` and `%dest[9]`. The mask is now skipped only when
the write starts at 0 in those dims, so this write is masked to its
first 6 elements.


    [11 lines not shown]
DeltaFile
+38-0mlir/test/Dialect/Linalg/vectorization/insert-slice.mlir
+6-2mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
+44-22 files

LLVM/project e224763 — llvm/include/llvm/DebugInfo/DWARF DWARFExpressionPrinter.h

[DebugInfo] Note why DWARFUnit is not forward-declared in DWARFExpressionPrinter.h
DeltaFile
+4-0llvm/include/llvm/DebugInfo/DWARF/DWARFExpressionPrinter.h
+4-01 files

LLVM/project bf84133 — llvm/lib/Frontend/OpenMP OMPDescriptors.inc

Add descriptor
DeltaFile
+23-10llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
+23-101 files

LLVM/project fa54d5f — clang/include/clang/DependencyScanning DependencyScanningWorker.h, clang/include/clang/Tooling DependencyScanningTool.h

[clang][DepScan] Introduce API to find modulemaps without loading

Introduce a way to batch look up the modulemap that defines
each of a set of module names.

`getModuleMapsForModules` builds a compiler instance from the same
command line as a by-name scan, then does every lookup in a separate
header search with lazy modulemap loading turned on and diagnostics
ignored.

The main use case is to let the Swift dependency scanner
invalidate its serialized dependency graph without the cost of loading
the referenced modules.

* Modulemaps passed with `-fmodule-map-file` are parsed first, all
  other modules are resolved by by-name header search.
DeltaFile
+159-0clang/unittests/Tooling/DependencyScannerTest.cpp
+93-6clang/lib/DependencyScanning/DependencyScanningWorker.cpp
+33-6clang/lib/Tooling/DependencyScanningTool.cpp
+12-0clang/include/clang/Tooling/DependencyScanningTool.h
+9-0clang/include/clang/DependencyScanning/DependencyScanningWorker.h
+306-125 files

LLVM/project 82ed977 — clang/test/CodeGen/RISCV rvp-intrinsics.c, llvm/test/CodeGen/AMDGPU/GlobalISel insertelement.ll legalize-llvm.amdgcn.image.sample.a16.ll

Merge branch 'main' into users/kparzysz/begin-metadirective
DeltaFile
+9,687-0llvm/test/TableGen/x86-fold-tables.inc
+2,112-452llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
+1,222-1,222llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
+2,335-48clang/test/CodeGen/RISCV/rvp-intrinsics.c
+1,665-0llvm/test/CodeGen/RISCV/GlobalISel/half-convert.ll
+738-856llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
+17,759-2,5781,113 files not shown
+63,776-22,2921,119 files