LLVM/project f5c5aeellvm/test/MC/AMDGPU vopc-errs.s vop2-err.s

AMDGPU: Remove some assembler tests using dummy target (#212595)

In the future it will be illegal to do anything with a binary
without a specific subarch. Most of these were redundant with an
existing run line.
DeltaFile
+0-2llvm/test/MC/AMDGPU/trap.s
+0-2llvm/test/MC/AMDGPU/sopk-err.s
+0-2llvm/test/MC/AMDGPU/sop2.s
+0-1llvm/test/MC/AMDGPU/vopc-errs.s
+0-1llvm/test/MC/AMDGPU/vop2-err.s
+0-1llvm/test/MC/AMDGPU/sopp-err.s
+0-94 files not shown
+0-1310 files

LLVM/project cf0c518clang/test/OpenMP update_clause_ast_dump.cpp

Update clang/test/OpenMP/update_clause_ast_dump.cpp

Co-authored-by: Alexey Bataev <a.bataev at outlook.com>
DeltaFile
+1-1clang/test/OpenMP/update_clause_ast_dump.cpp
+1-11 files

LLVM/project 148d796clang/test/OpenMP update_clause_ast_dump.cpp

Update clang/test/OpenMP/update_clause_ast_dump.cpp

Co-authored-by: Alexey Bataev <a.bataev at outlook.com>
DeltaFile
+1-1clang/test/OpenMP/update_clause_ast_dump.cpp
+1-11 files

Illumos/gate 1a1e2adusr/src/cmd/mdb/intel/mdb mdb_ia32util.c

18282 mdb register di wrong in 32-bit program
Reviewed by: Robert Mustacchi <rm at fingolfin.org>
Reviewed by: Bill Sommerfeld <sommerfeld at hamachi.org>
Reviewed by: Toomas Soome <tsoome at me.com>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+1-1usr/src/cmd/mdb/intel/mdb/mdb_ia32util.c
+1-11 files

LLVM/project d814f55mlir/include/mlir/Conversion Passes.td, mlir/lib/Conversion/MathToXeVM CMakeLists.txt MathToXeVM.cpp

[mlir][MathToXeVM] Convert fastmath math ops on size-1 vectors (#211921)

SPIR-V has no size-1 vector type, so `convert-math-to-xevm` previously
rejected `math.exp fastmath<fast> : vector<1xf32>` (and the other native
OCL patterns), leaving them as unconverted `math.exp`. These degenerate
size-1 vectors are the result of the XeGPU pipeline distributing and
linearizing larger vectors down to a single element per lane, so in
practice fastmath exps in e.g. flash-attention softmax were never
lowered to `__spirv_ocl_native_exp`, hurting performance.

Handle size-1 vectors by unwrapping them to the scalar element type:
`vector.extract [0]` -> scalar native intrinsic -> `vector.broadcast`
back. `vector::ExtractOp`/`BroadcastOp` are marked legal in the
conversion target so the partial conversion does not roll back, and the
pass now depends on the Vector dialect.

---------

Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
DeltaFile
+100-59mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
+12-0mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
+1-0mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
+1-0mlir/include/mlir/Conversion/Passes.td
+114-594 files

FreeNAS/freenas 5781c53src/middlewared/middlewared/utils tdb.py, tests/unit test_directoryservices_secrets.py

NAS-141967 / 26.0.0-RC.1 / Fix termination of clustered secrets key names (by anodos325) (#19433)

This commit fixes an issue where the clustered secrets file entries were
being migrated with a terminated an extra null for their name. The
termination behavior depends on the particular tdb file in question in
samba / winbind.

Original PR: https://github.com/truenas/middleware/pull/19422

---------

Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
DeltaFile
+42-1tests/unit/test_directoryservices_secrets.py
+29-6src/middlewared/middlewared/utils/tdb.py
+71-72 files

LLVM/project 0f482c9llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/TargetParser AMDGPUTargetParser.cpp

AMDGPU: Eliminate old macro driven processor name parsing

Previously the generated inc file had a series of macros for use
with StringSwitch; now just directly scan the generated name table.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+153-101llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+72-44llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+2-2llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+227-1473 files

LLVM/project 12875a1llvm/lib/TargetParser AMDGPUTargetParser.cpp, llvm/utils/TableGen/Basic AMDGPUTargetDefEmitter.cpp

AMDGPU: TableGen the subarch to processor name mapping table

Replace the hand-written AMDGPUSubArchNames array (SubArch -> canonical GPU
name) with a generated table.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+23-43llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+61-5llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+84-482 files

FreeBSD/src 52b7cbcsys/netinet tcp_timer.c

tcp: improve handling of stopped timers

When a TCP timer is stopped, t_timers[] is set to SBT_MAX. Adding the
corresponding t_precisions[], if it is not zero, would result in
overflows in tcp_timer_next(). To avoid this, skip stopped timers.

The problem was identified while debugging uperf by Lukas Book and
an initial patch was provided by him. The committed patch was
suggested by glebius.

The problem can be observed by running netstat -nxptcp and looking for
negative timer values and by observing very long running timers in
some cases.

Reported by:            Lukas Book <lkbook at outlook.de>
Reviewed by:            glebius
Differential Revision:  https://reviews.freebsd.org/D58484
DeltaFile
+2-0sys/netinet/tcp_timer.c
+2-01 files

LLVM/project f91f6fbllvm/lib/Target/AMDGPU GCNProcessors.td AMDGPUTargetParser.td, llvm/lib/TargetParser AMDGPUTargetParser.cpp

AMDGPU: TableGen subarch to major subarch table

Replace the hand-written AMDGPUMajorFamilies array with a
generated lookup table. Adds a special case for the major
arches missing a concrete generic target definition (we probably
should just define those to avoid this).

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+86-20llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+20-56llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+8-0llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+6-0llvm/lib/Target/AMDGPU/GCNProcessors.td
+120-764 files

LLVM/project 0c22e51clang/lib/Basic/Targets AMDGPU.cpp, llvm/include/llvm/TargetParser AMDGPUTargetParser.h

AMDGPU: Handle more TargetParser queries in tablegen

Previously we had various enum switches. Start generated tables
indexed by enums. Avoid some special cases by defining the dummy
"generic" and "generic-hsa" targets as real processors.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+63-82llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+87-30llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+7-4llvm/lib/Target/AMDGPU/GCNProcessors.td
+2-5clang/lib/Basic/Targets/AMDGPU.cpp
+2-4llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+4-0llvm/test/TableGen/AMDGPUTargetDefErrors.td
+165-1253 files not shown
+172-1269 files

LLVM/project 2a5a8b2llvm/include/llvm/TargetParser AMDGPUTargetParser.def, llvm/lib/Target/AMDGPU AMDGPUTargetParser.td GCNProcessors.td

AMDGPU: Generate TargetParser table from TableGen

Migrate .def file to tablegen. The initial TargetParser
AMDGPU backend only handled R600. Extend to modern targets.
Stub out some tablegen definitions which will be used in future
changes.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+255-191llvm/lib/Target/AMDGPU/GCNProcessors.td
+0-155llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
+117-7llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+22-22llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+35-7llvm/test/TableGen/AMDGPUTargetDefErrors.td
+28-2llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+457-3846 files not shown
+477-39112 files

FreeBSD/ports 9e6837bwww/linux-widevine-cdm Makefile

www/linux-widevine-cdm: Fix DISTNAME for aarch64

Reported by:    fluffy
DeltaFile
+1-1www/linux-widevine-cdm/Makefile
+1-11 files

LLVM/project 6084459llvm/include/llvm/TargetParser SubtargetFeature.h, llvm/lib/Target/RISCV RISCVMacroFusion.td RISCVMacroFusionXQCI.td

[RISCV] Add macro fusion support for the Xqci extension instructions (#209542)

Add macro fusion definitions for the Qualcomm Xqci extension covering
movimm-alu, movimm-mul, movimm-ldst, movimm-jump, movimm-longlogical,
movimm-mov, mov-mov, mov-longlogical fusions.

The fusion definitions live in a new RISCVMacroFusionXQCI.td which is
included from RISCVMacroFusion.td. A MIR test and the feature list test
are updated accordingly.

To accomodate additional features, increased MAX_SUBTARGET_FEATURES to
448 (from 384).

Signed-off-by: Pankaj Gode <pgode at qti.qualcomm.com>
DeltaFile
+106-0llvm/lib/Target/RISCV/RISCVMacroFusionXQCI.td
+103-0llvm/test/CodeGen/RISCV/macro-fusions-xqci.mir
+6-0llvm/test/CodeGen/RISCV/features-info.ll
+4-0llvm/lib/Target/RISCV/RISCVMacroFusion.td
+1-1llvm/include/llvm/TargetParser/SubtargetFeature.h
+220-15 files

LLVM/project 88a6fc0llvm/lib/Transforms/Utils LoopUtils.cpp, llvm/test/Transforms/LoopVectorize/RISCV dead-ops-cost.ll

Fold "-1" in ThresholdMinusOne into another sub(_, constant)
DeltaFile
+6-9llvm/lib/Transforms/Utils/LoopUtils.cpp
+1-2llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+7-112 files

LLVM/project 83dfacdlibc/src/__support/CPP type_traits.h CMakeLists.txt, libc/src/__support/macros attributes.h

[libc] Implement cpp::unique_ptr utility (#206701)

[libc] Implement cpp::unique_ptr utility

Implemented cpp::unique_ptr and cpp::default_delete in
libc/src/__support/CPP/unique_ptr.h for internal use within LLVM-libc.

* Added cpp::default_delete and its array specialization.
* Implemented cpp::unique_ptr with support for custom deleters and
  array specialization.
* Applied LIBC_TRIVIAL_ABI to unique_ptr and LIBC_NO_UNIQUE_ADDRESS to
the
  deleter to enable empty member optimization and register-passing ABI.
* Defined portable LIBC_NO_UNIQUE_ADDRESS and LIBC_TRIVIAL_ABI macros in
  attributes.h.
* Included is_assignable.h in type_traits.h to support conversion
  assignment constraints.
* Modernized template constraints using enable_if_t and
is_convertible_v.

    [12 lines not shown]
DeltaFile
+214-0libc/test/src/__support/CPP/unique_ptr_test.cpp
+207-0libc/src/__support/CPP/unique_ptr.h
+16-6libc/test/src/__support/CPP/CMakeLists.txt
+16-0libc/src/__support/macros/attributes.h
+12-0libc/src/__support/CPP/CMakeLists.txt
+7-1libc/src/__support/CPP/type_traits.h
+472-76 files

LLVM/project 810062e.github/workflows libcxx-benchmark-commit.yml

[libc++] Require selecting a machine when dispatching the benchmark workflow (#212591)

This resolves a TODO to allow selecting which machine we're running on.
As I am working on automation to dispatch these benchmarking jobs, it
turns out that we always want to specify the machine, and we always want
to specify a single machine to run per workflow, since this is the only
way we can track which commits have been attempted (or are still in
flight) on a given machine.

Therefore, the ability to run benchmarks on all machines at once is
removed from this workflow (but not from the related PR A/B benchmarking
workflow).

This patch also includes the machine name and the commit being
benchmarked into the runs's name, which is necessary for automation to
know what the workflow was benchmarking.
DeltaFile
+52-12.github/workflows/libcxx-benchmark-commit.yml
+52-121 files

LLVM/project 255162allvm/lib/Target/RISCV RISCVFrameLowering.cpp RISCVPushPopOptimizer.cpp, llvm/test/CodeGen/RISCV shadow-stack-zcmp.ll shadowcallstack.ll

[RISC-V] Do not emit cm.popret[z] with zicfiss (#196267)

When emitting shadow call stack protection instructions, the push/pop
optimization needs to be turned off because an sspopchk before a
cm.popret[z] is guaranteed to fail in a non-leaf function. In addition,
the sspopchk must be emitted after a cm.pop so that the ra has the
correct value when the check is performed.

Fixes: https://github.com/llvm/llvm-project/issues/196261

Co-authored-by: Nemanja Ivanovic <nemanja at synopsys.com>
DeltaFile
+330-0llvm/test/CodeGen/RISCV/shadowcallstack.ll
+57-0llvm/test/CodeGen/RISCV/shadow-stack-zcmp.ll
+9-0llvm/lib/Target/RISCV/RISCVPushPopOptimizer.cpp
+4-0llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+400-04 files

LLVM/project 592b344llvm/test/MC/AMDGPU isa-version-unk.s isa-version-pal.s

AMDGPU: Migrate target ID diagnostic tests to subarch triples (#212588)
DeltaFile
+29-6llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+20-13llvm/test/MC/AMDGPU/hsa-diag-v4.s
+11-11llvm/test/MC/AMDGPU/isa-version-unk.s
+11-11llvm/test/MC/AMDGPU/isa-version-pal.s
+71-414 files

LLVM/project 94ba1d7llvm/test/Transforms/LoopVectorize runtime-checks-difference.ll runtime-checks-diff-wrap-i32-address-space.ll, llvm/test/Transforms/LoopVectorize/RISCV dead-ops-cost.ll

Update tests after merging in `origin/main`
DeltaFile
+7-5llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+2-1llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+2-1llvm/test/Transforms/LoopVectorize/runtime-checks-diff-wrap-i32-address-space.ll
+11-73 files

LLVM/project b2b2501llvm/docs LangRef.md LangRef.rst, llvm/lib/Support UnicodeNameToCodepointGenerated.cpp

Merge remote-tracking branch 'origin/main' into HEAD
DeltaFile
+42,238-41,887llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+24,053-23,916llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+0-33,109llvm/docs/LangRef.rst
+30,413-0llvm/docs/LangRef.md
+14,735-13,822llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+23,904-12llvm/test/CodeGen/RISCV/clmul.ll
+135,343-112,74622,162 files not shown
+1,274,097-773,86722,168 files

LLVM/project d139efellvm/test/MC/AMDGPU vopc-errs.s vop2-err.s

AMDGPU: Remove some assembler tests using dummy target

In the future it will be illegal to do anything with a binary
without a specific subarch. Most of these were redundant with an
existing run line.
DeltaFile
+0-2llvm/test/MC/AMDGPU/trap.s
+0-2llvm/test/MC/AMDGPU/sopk-err.s
+0-2llvm/test/MC/AMDGPU/sop2.s
+0-1llvm/test/MC/AMDGPU/vopc-errs.s
+0-1llvm/test/MC/AMDGPU/vop2-err.s
+0-1llvm/test/MC/AMDGPU/sopp-err.s
+0-94 files not shown
+0-1310 files

FreeBSD/src 2e259c2sys/kern kern_exit.c

kern_pdwait(): print the process pointer through pd

to avoid using uninitialized value in the KASSERT() statement on the first
iteration.

Also, do the assert under the proctree_lock, which is not critical but
satisfies the invariants.

Noted and reviewed by:  markj
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D58505
DeltaFile
+2-2sys/kern/kern_exit.c
+2-21 files

FreeBSD/src 8cef3c9sys/kern kern_exit.c

proc_realparent(): assert that an orphaned child has real parent != parent

Reviewed by:    markj
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D58504
DeltaFile
+3-0sys/kern/kern_exit.c
+3-01 files

FreeBSD/ports 48aaf76net-mgmt/p5-OSLV-Monitor Makefile distinfo

net-mgmt/p5-OSLV-Monitor: Update to 1.0.5

re: https://github.com/VVelox/OSLV-Monitor/releases/tag/1.0.5

Obtained from:  Carolina Beach
DeltaFile
+3-3net-mgmt/p5-OSLV-Monitor/distinfo
+1-1net-mgmt/p5-OSLV-Monitor/Makefile
+4-42 files

OPNSense/core 9b4b21bsrc/opnsense/mvc/app/library/OPNsense/Auth/SSOProviders Provider.php

Auth/SSOProviders - add glue for https://github.com/opnsense/core/issues/10433
DeltaFile
+10-1src/opnsense/mvc/app/library/OPNsense/Auth/SSOProviders/Provider.php
+10-11 files

LLVM/project bd69a84clang/lib/Format WhitespaceManager.cpp, clang/unittests/Format FormatTestComments.cpp

[clang-format] Fix OverEmptyLines aligning trailing comments across block boundaries (#208324)

Fix `AlignTrailingComments` with `OverEmptyLines` aligning trailing
comments across block boundaries (e.g., between two functions or
structs). The alignment sequence now breaks at block-type braces
(`BK_Block`).

This is an `OverEmptyLines` bug exposed by
bae9ddca423145baf0c35e31898b723aa273f85c (#206393).
Fixes https://github.com/llvm/llvm-project/issues/208266
(https://github.com/llvm/llvm-project/issues/208266).

Commit created with the help of kiro-cli.

Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
DeltaFile
+36-0clang/unittests/Format/FormatTestComments.cpp
+8-0clang/lib/Format/WhitespaceManager.cpp
+44-02 files

LLVM/project 617dd98utils/bazel/llvm-project-overlay/mlir/test BUILD.bazel

[bazel] fix #212406 (#212585)
DeltaFile
+4-4utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
+4-41 files

FreeBSD/ports 2427a4dwww/linux-widevine-cdm distinfo Makefile

www/linux-widevine-cdm: Bump CHROME_VERSION and enable aarch64

Reported by:    fluffy
DeltaFile
+13-4www/linux-widevine-cdm/Makefile
+5-3www/linux-widevine-cdm/distinfo
+18-72 files

FreeBSD/ports 36f0951www/foreign-cdm Makefile

www/foreign-cdm: Enable for aarch64

Co-authored-by: Gleb Popov <arrowd at FreeBSD.org>
DeltaFile
+7-5www/foreign-cdm/Makefile
+7-51 files