[AArch64] Combine shift and truncate into deinterleave. (#216060)
This is an alternative approach to #213252, from which I've taken some
of the tests.
Co-authored-by: Jacob Crawley <jacob.crawley at arm.com>
[lldb][NFC] Fix GetPointeeDataTest after the ProcessAddress migration (#216978)
One unit-test override was missed when `Process::DoReadMemory` was
changed to accept `const ProcessAddress &`. `SentinelProcess` in
`GetPointeeDataTest.cpp` still uses `lldb::addr_t`, so the override does
not match, the mock remains abstract, and `check-lldb` fails to build.
Update the parameter type and the remaining stale `Process.h`
documentation. This is a quick NFC fix for the broken build.
## Testing
`check-lldb` builds successfully.
[SPIR-V] Fix crash when a function pointer global is a use of a cloned function (#216638)
GlobalValue operands must be updated via replaceUsesOfWith, not
Constant::handleOperandChange, which doesn't support them
Fixes LCOMPILER-2616
RuntimeLibcalls: Fix wrongly typed x87/fp128 long double libcalls on x86
The x86 and default libcall sets gated the l-suffixed long double libm
functions on OS conditions rather than the long double format. This
incorrectly provided the f80 libcalls on targets whose long double is not x87
(Windows-MSVC, UEFI, x86_64 Android), double-provided frexpl/ldexpl on musl,
and provided the fp128 sincosl on targets using double as long double (m68k).
Gate the l-suffixed libm math on the long double format, mirroring the earlier
AArch64 fix: x87 targets get the _f80 calls, fp128 targets the _f128 calls, and
double targets neither. The compiler-rt f80 helpers (__extendxftf2, __fixxfti,
__powixf2, ...) are keyed to the x86_fp80 IR type, not the long double format,
so they stay unconditional on x86.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[SelectionDAG] Fix soft-promotion of f16 BUILD_VECTOR for MSA targets (#210515)
When compiling for MIPS with +msa and f16 vectors (v8f16, v4f16, v2f16),
LLVM would crash with "Do not know how to soft promote this operator's
operand!" because BUILD_VECTOR was missing from the
SoftPromoteHalfOperand switch statement in LegalizeFloatTypes.cpp.
On MIPS, f16 is not natively supported by default, so LLVM soft-promotes
it: stores as i16, computes as f32.
Building f16 vectors requires handling BUILD_VECTOR with soft-promoted
i16 operands.
This patch adds the missing BUILD_VECTOR case and implements
SoftPromoteHalfOp_BUILD_VECTOR, which:
(1) retrieves soft-promoted i16 operands via GetSoftPromotedHalf,
(2) builds a v{N}i16 integer vector,
(3) bitcasts to the original v{N}f16 type.
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AArch64: Use mi_match for G_CONSTANT operand check in RegisterBankInfo (#216955)
Replace the getVRegDef + G_CONSTANT opcode check in the build_vector
all-constant-operands test with an m_ICst match. NFC.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[Flang][HLFIR] Lower PACK(array, .TRUE.) to hlfir.reshape (#213603)
When the PACK mask is the compile-time scalar .TRUE., the result is
equivalent to RESHAPE(array, [SIZE(array)]). Detect this case during
HLFIR intrinsic lowering and emit hlfir.reshape, reusing the same
operation as the RESHAPE intrinsic rather than calling _FortranAPack.
This allows later optimization passes to handle the operation as a
reshape instead of going through the general PACK runtime. Variable or
array masks, VECTOR, and non-trivial or polymorphic operands continue to
use the existing runtime PACK path.
Assisted by: Claude
[InstCombine] Fix miscompile when folding a select into a masked load (#216730)
`visitSelectInst` folds:
select(mask, masked.load(ptr, mask, PT), FV)
into:
masked.load(ptr, mask, FV)
The replacement load was previously created at the select, effectively
moving the memory access past any intervening instructions. If one of
them writes the loaded memory, the replacement load reads the updated
value instead of the original one. This was also observed downstream in
[ispc/ispc#3891](https://github.com/ispc/ispc/issues/3891).
The fold was added in `eb8589987267`. The issue is labelled
`regression:22`, so it affects LLVM 22.1 as well as current trunk.
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[flang][PFT] do not record a FORMAT statement as an assigned GO TO target
A FORMAT statement is not a branch target, so a program that assigns its
label to a variable and then branches to that variable is not conforming
and is meant to reach a run-time error.
Skip FORMAT statements when recording the targets, the same way the
AssignStmt case already does.
Only the `go to v` form needs this: in `go to v, (l1, l2, ...)` a
FORMAT label is rejected during semantic checking, so it never reaches
the PFT. assign07.f90 is extended to test this semantic check.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[AArch64] Extend optimizeCrossBlock() to handle select-family instructions (#208369)
* The cross-block condition optimizer previously only handled blocks
ending with a Bcc terminator. This patch extends optimizeCrossBlock() to
also recognize CSEL, CSET, CSINC, CSINV, and CSNEG as conditional
consumers by introducing findCondConsumer(), which unifies consumer
discovery for both block roles: trying a Bcc terminator first and
falling back to a reverse scan for the sole NZCV-consuming select-family
instruction if no Bcc is present.
* This enables CMP adjustment and CSE elimination across all four
head/true-successor combinations: Bcc+Bcc (original), Select+Bcc,
Bcc+Select, and Select+Select.
* Tests are added in aarch64-condopt-cross-block-select.mir covering all
three new combinations along with negative cases for NZCV liveness and
mismatched registers.
Assisted by: Claude for mir test cases
[VPlan] Check enclosing region first (NFC). (#216676)
Check cheaper getEnclosingLoopRegion() first; it only walks the parent
chain, while getVectorLoopRegion() traverses the plan's top-level
blocks.
[NewPM] Port ImplicitNullChecks to the new pass manager
Adds a newPM pass for ImplicitNullChecks.
- Refactors base logic into an ImplicitNullChecks class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass ImplicitNullChecksPass
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder
- Updated existing .mir tests to also test with the New Pass Manager
TAG=agy
CONV=f54ff826-1008-4e8c-9be5-0364adbe3923
SPIRV: Use mi_match in combiner match functions
Convert some simple cases away from getVRegDef + opcode
checks which don't require new matchers.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
AArch64: Use mi_match for G_CONSTANT operand check in RegisterBankInfo
Replace the getVRegDef + G_CONSTANT opcode check in the build_vector
all-constant-operands test with an m_ICst match. NFC.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[Clang][Frontend] Fix fix-it size overflow in emitted .dia (#216075)
When fix-its are emitted into a .dia, we previously stored the fix-it
text in a blob of arbitrary size, but the size of the text was stored in
a separate 16 bit field. For really large fix-its, the size won't fit it
those 16 bits, and the compiler crashes.
Switch to a variable length encoding of the fit-it size. This is similar
to this issue:
https://github.com/llvm/llvm-project/commit/e26aea5b290165f3bccffab662a706d4a56f7540
We also remove a hard coded check in the clang library used to load .dia
files that failed for fix-its whose size doesn't fit in 16 bits.
Generated with codex
Co-authored-by: Nuri Amari <nuriamari at fb.com>
(cherry picked from commit bb123b2208060bf3ec8a5f22f2111bd194c4ad4d)
[sanitizer] Skip hanging tests on NetBSD (#216712)
Several sanitizer tests hang indefinitely on NetBSD:
```
MemorySanitizer-Unit :: ./Msan-x86_64-Test
MemorySanitizer-Unit :: ./Msan-x86_64-with-call-Test
MemorySanitizer-X86_64 :: zero_alloc.cpp
ThreadSanitizer-x86_64 :: signal_cond.cpp
libFuzzer-x86_64-default-NetBSD :: reload.test
```
All of them loop and don't time out, so they need to be terminated
manually for `ninja check-all` to complete. To avoid this, this patch
skips the affected tests or subtests. Unfortunately, the Msan unit tests
still hang on exit in `__cxa_finalize` even if all subtests are skipped
with `llvm-lit -gtest_filter=-*`.
Tested on `x86_64-pc-netbsd11.0`, `x86_64-pc-freebsd15.1`, and
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GlobalISel: Add m_PosZeroFP matcher and use it in AArch64 selector (#216925)
Add an FP-constant predicate matcher m_PosZeroFP, mirroring the IR
PatternMatch helper, and use it in emitFPCompare instead of binding the
ConstantFP just to test for +0.0. NFC.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
