LLVM/project 9083925lld/test/ELF retain-symbols-file.s retain-und.s

[ELF,test] Modernize --retain-symbols-file tests (#209062)

Switch to llvm-readelf, compact FileCheck directives, and
split-file-style naming. Prepares for a --retain-symbols-file behavior
change.
DeltaFile
+37-52lld/test/ELF/retain-symbols-file.s
+10-10lld/test/ELF/retain-und.s
+47-622 files

LLVM/project fe85b5bllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 minbitwidth-signed-icmp-const.ll

[SLP] Fix miscompile from truncating signed icmp constant

getActiveBits() ignores sign, so a positive constant needing the
narrower type's top bit was truncated to a negative value. Use
getSignificantBits() for signed comparisons.

Fixes #209010

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/209061
DeltaFile
+7-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+2-1llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
+9-32 files

LLVM/project 0188651llvm/test/Transforms/SLPVectorizer/X86 minbitwidth-signed-icmp-const.ll

[SLP][NFC]Add a test with the incorrect const trunc in signed compare, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/209059
DeltaFile
+50-0llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-signed-icmp-const.ll
+50-01 files

LLVM/project d036d30lld/test/MachO bp-section-orderer-errs.s

[test] Add REQUIRES: aarch64 (#209058)
DeltaFile
+1-0lld/test/MachO/bp-section-orderer-errs.s
+1-01 files

LLVM/project bb4aea6llvm/test/Analysis/ScalarEvolution ptrtoint-special-pointers.ll, llvm/test/Transforms/GVN ptrtoaddr.ll

[SCEV,GVN] Add additional ptrtoaddr tests (NFC) (#209049)

Extend test coverage with files with mixied ptrtoaddr/ptrtoint, as well
as wide pointers.

Extra test coverage for
https://github.com/llvm/llvm-project/pull/180244.
DeltaFile
+193-0llvm/test/Analysis/ScalarEvolution/ptrtoint-special-pointers.ll
+46-0llvm/test/Transforms/IndVarSimplify/AArch64/expand-ptrtoaddr-reuse-ptrtoint.ll
+46-0llvm/test/Transforms/GVN/ptrtoaddr.ll
+285-03 files

LLVM/project fd65249llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize outer-loop-atomic.ll

[VPlan] Handle AtomicRMW/AtomicCmpXchg/Fence in outer loop creation. (#209031)

Teach VPInstruction::getNumOperandsForOpcode about AtomicRMW,
AtomicCmpXchg and Fence, so VPlan construction over an outer loop that
still contains these operations does not crash before later legality
rejects the loop.

Fixes crashes in the added tests.
DeltaFile
+168-0llvm/test/Transforms/LoopVectorize/outer-loop-atomic.ll
+5-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+3-0llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+176-03 files

LLVM/project 6237781llvm/lib/Target/AArch64 AArch64InstrInfo.cpp SVEInstrFormats.td, llvm/lib/Target/AArch64/MCTargetDesc AArch64MCTargetDesc.h

[AArch64] Add an OPERAND_IMM_UINT5 operand type. (#209057)

This helps verify that certain operands are in the correct range, in
this case
0-31.
DeltaFile
+6-0llvm/test/CodeGen/AArch64/verify-imm.mir
+6-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+3-0llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+2-0llvm/lib/Target/AArch64/SVEInstrFormats.td
+1-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
+18-05 files

LLVM/project 349542fllvm/test/Transforms/LoopVectorize/RISCV strided-accesses.ll

[VPlan] Add strided access test with disjoint or. (NFC) (#209051)

Currently this is missed by VPlan SCEV due to disjoint OR not being
handled.
DeltaFile
+109-0llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+109-01 files

LLVM/project 7ccaa93llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp

fix

Created using spr 1.3.7
DeltaFile
+0-1llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+0-11 files

LLVM/project 987bca0llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+235-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+214-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+18-183llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+86-13llvm/lib/Target/WebAssembly/WebAssembly.h
+746-33810 files not shown
+917-37916 files

LLVM/project fd0003cllvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+236-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+214-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+20-185llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+98-15llvm/lib/Target/WebAssembly/WebAssembly.h
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+761-34211 files not shown
+957-39117 files

LLVM/project 5566928llvm/lib/Analysis LoopAccessAnalysis.cpp, llvm/test/Analysis/LoopAccessAnalysis wide-pointer-index-distance.ll

[LAA] Bail out of dependence analysis when distance exceeds 64 bits. (#209052)

isDependent extracts the dependence distance into 64 bit integers.

Bail out conservatively when the constant distance or the signed minimum
distance needs more than 64 bits.
DeltaFile
+85-0llvm/test/Analysis/LoopAccessAnalysis/wide-pointer-index-distance.ll
+16-5llvm/lib/Analysis/LoopAccessAnalysis.cpp
+101-52 files

LLVM/project e7885c3llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+234-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+18-183llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+197-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+73-13llvm/lib/Target/WebAssembly/WebAssembly.h
+715-33810 files not shown
+884-37916 files

LLVM/project 9a921b4llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+235-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+214-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+18-183llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+86-13llvm/lib/Target/WebAssembly/WebAssembly.h
+746-33810 files not shown
+917-37916 files

LLVM/project 552f196llvm/lib/Target/WebAssembly WebAssemblyCoalesceFeaturesAndStripAtomics.cpp

fix

Created using spr 1.3.7
DeltaFile
+1-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+1-01 files

LLVM/project b8d37cbllvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.cpp, llvm/lib/Target/AArch64/MCTargetDesc AArch64MCTargetDesc.h

[AArch64] Add an OPERAND_IMM_UINT8 operand type. (#209050)

This helps verify that certain operands are in the correct range, in
this case
0-255.
DeltaFile
+12-0llvm/test/CodeGen/AArch64/verify-imm.mir
+8-1llvm/lib/Target/AArch64/AArch64InstrFormats.td
+6-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+3-0llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+1-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.h
+30-15 files

LLVM/project 30c81e2llvm/lib/Target/WebAssembly WebAssemblyCoalesceFeaturesAndStripAtomics.cpp

fix

Created using spr 1.3.7
DeltaFile
+1-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+1-01 files

LLVM/project 927878dllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 add-sub-nuw.ll

[SLP] Drop nuw when add/sub interchange negates a nonzero constant

sub nuw X, C requires X u>= C, but add nuw X, -C requires X u< C, so
nuw must always be dropped on interchange.

Fixes #209023

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/209047
DeltaFile
+21-17llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+2-2llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
+23-192 files

LLVM/project 80fca3bllvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+234-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+70-13llvm/lib/Target/WebAssembly/WebAssembly.h
+36-12llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+34-13llvm/lib/Target/WebAssembly/WebAssemblyRefTypeMem2Local.cpp
+567-1809 files not shown
+681-21015 files

LLVM/project d2adc5ellvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+234-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+18-183llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+195-0llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+73-13llvm/lib/Target/WebAssembly/WebAssembly.h
+713-33810 files not shown
+882-37916 files

LLVM/project 65735abllvm/test/Transforms/SLPVectorizer/X86 add-sub-nuw.ll

[SLP][NFC]Add a test with incorrect nuw propagation in add/sub vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/209045
DeltaFile
+77-0llvm/test/Transforms/SLPVectorizer/X86/add-sub-nuw.ll
+77-01 files

LLVM/project 654eea8llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+234-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+70-13llvm/lib/Target/WebAssembly/WebAssembly.h
+36-12llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+34-13llvm/lib/Target/WebAssembly/WebAssemblyRefTypeMem2Local.cpp
+567-1809 files not shown
+681-21015 files

LLVM/project bd49406llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+234-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+61-11llvm/lib/Target/WebAssembly/WebAssembly.h
+36-12llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+33-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+557-1658 files not shown
+635-19314 files

LLVM/project 19dc25fllvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp

fix

Created using spr 1.3.7
DeltaFile
+0-1llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+0-11 files

LLVM/project 3687639llvm/test/tools/llvm-debuginfod-find/Inputs delay_req.py

[llvm][HTTP] Increase request handler sleep (#209038)

Fixup for
https://github.com/llvm/llvm-project/pull/188969#issuecomment-4952185708.
The issue is likely the same as I described in
https://github.com/llvm/llvm-project/pull/192061#issuecomment-4926882131
where WinHTTP doesn't time out immediately but adds some delay. The fix
here is to increase the sleep in the mock server.
DeltaFile
+1-1llvm/test/tools/llvm-debuginfod-find/Inputs/delay_req.py
+1-11 files

LLVM/project 5fb5a35llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyReduceToAnyAllTrue.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+235-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+125-104llvm/lib/Target/WebAssembly/WebAssemblyReduceToAnyAllTrue.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+61-11llvm/lib/Target/WebAssembly/WebAssembly.h
+36-12llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+33-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+558-1658 files not shown
+636-19314 files

LLVM/project b6ea502llvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyLowerEmscriptenEHSjLj.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+234-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+68-38llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
+46-10llvm/lib/Target/WebAssembly/WebAssembly.h
+36-12llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+32-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+21-7llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
+437-677 files not shown
+492-8713 files

LLVM/project 5485d62lld/ELF MarkLive.cpp, lld/test/ELF emit-relocs-discard-locals.s

[ELF] --discard-{locals,all}: mark local symbols referenced by retained non-SHF_ALLOC sections (#209042)

With --gc-sections, mark() does not scan relocations of retained
non-SHF_ALLOC sections, so local symbols referenced only by such
sections (e.g. .L symbols in .debug_str_offsets referenced by
.debug_info) do not get the USED flag.

-r/--emit-relocs with --discard-{locals,all} would discard the symbols
and rewrite relocations to reference the null symbol, corrupting DWARF
in the output. This is common on RISC-V, where
RISCVELFObjectWriter::needsRelocateWithSymbol returns true, but is also
possible on other targets with --reloc-section-sym=none.

Call markUsedLocalSymbols from the retention loop (introduced by
#209035)
to set the flag.

Fix #160789
DeltaFile
+24-3lld/test/ELF/emit-relocs-discard-locals.s
+5-0lld/ELF/MarkLive.cpp
+29-32 files

LLVM/project 2fdc877llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 copyable-addsub-reorder.ll

[SLP] Fix miscompile from unsafe operand-order normalization

IsCommutative(MainOp) is also true for a Sub/FSub feeding only
fabs/icmp-eq-0, but that doesn't make every lane swappable: a
converted Add/FAdd lane's operand order is fixed to preserve its
value, and swapping it into a native Sub/FSub's layout negates it.
Re-check each lane before swapping instead of trusting MainOp's.

Fixes #208944

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/209041
DeltaFile
+19-16llvm/test/Transforms/SLPVectorizer/X86/copyable-addsub-reorder.ll
+9-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+28-182 files

LLVM/project aa72b8dllvm/lib/Target/WebAssembly WebAssemblyCodeGenPassBuilder.cpp WebAssemblyOptimizeReturned.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+233-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+36-12llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
+38-8llvm/lib/Target/WebAssembly/WebAssembly.h
+31-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+21-7llvm/lib/Target/WebAssembly/WebAssemblyAddMissingPrototypes.cpp
+20-7llvm/lib/Target/WebAssembly/WebAssemblyFixFunctionBitcasts.cpp
+379-345 files not shown
+411-4511 files