LLVM/project 6a5c448 — compiler-rt/test lit.common.configured.in lit.common.cfg.py

Revert "[compiler-rt][test] Use sysroot dynamic linker and rpath on Linux" (#239886)

Reverts llvm/llvm-project#239878 caused sanitizer tests fail as in

https://luci-milo.appspot.com/ui/p/fuchsia/builders/toolchain.ci/clang-linux-x64/b8665827129947110481/overview
DeltaFile
+0-6compiler-rt/test/lit.common.cfg.py
+0-1compiler-rt/test/lit.common.configured.in
+0-72 files

LLVM/project cb1a495 — llvm/test/CodeGen/CSKY atomic-load-store.ll atomic-cmpxchg.ll

[test,CSKY] Fix AtomicExpand tests after #238972 (#239889)
DeltaFile
+190-80llvm/test/CodeGen/CSKY/atomic-rmw.ll
+60-80llvm/test/CodeGen/CSKY/atomic-cmpxchg.ll
+40-64llvm/test/CodeGen/CSKY/atomic-load-store.ll
+290-2243 files

LLVM/project 5fdb0a1 — clang/test/CIR/CodeGen wide-string.cpp predefined-expr.c, clang/test/CIR/CodeGenHIP string-literal-addrspace.hip

[CIR] Add unnamed_addr to cir.global (#239429)

Add an `unnamed_addr` unit property to cir.global and lower it to the
LLVM dialect's `unnamed_addr` attribute.

The LLVM dialect models this as a three-valued enum
(`#llvm.unnamed_addr<none|local_unnamed_addr|unnamed_addr>`). CIR uses
an on/off flag instead: classic codegen only ever sets `unnamed_addr` or
nothing, never `local_unnamed_addr` (that is introduced later by
optimization passes), so the extra state is not needed.

AI modified the tests accordingly.
DeltaFile
+24-24clang/test/CIR/CodeGenHIP/string-literal-addrspace.hip
+19-19clang/test/CIR/CodeGen/predefined-expr.c
+16-16clang/test/CIR/CodeGenSYCL/unique-stable-name.cpp
+16-16clang/test/CIR/CodeGen/wide-string.cpp
+28-0clang/test/CIR/IR/global-unnamed-addr.cir
+12-12clang/test/CIR/CodeGenOpenCL/string-literal-addrspace.cl
+115-8739 files not shown
+248-20045 files

LLVM/project a04c40b — clang/lib/CIR/CodeGen CIRGenModule.h, clang/test/CIR/CodeGenCXX device-rtti.cpp

[CIR] Match classic codegen's shouldEmitRTTI for offload devices (#239817)

CIR's shouldEmitRTTI only disabled RTTI for CUDA/HIP device compiles and
OpenMP device compiles on NVPTX. Classic codegen disables it for any
offload device compile (SYCL, OpenMP, CUDA, HIP) targeting a GPU.

I use the same condition as classic codegen. CUDA and HIP behavior is
unchanged. Classic CodeGen does not have a.t.m tests for SYCL or OMP 
on AMDGPU I could not find any OG tests. As such, I am pushing tests
on the CIR test dir.
DeltaFile
+64-0clang/test/CIR/CodeGenCXX/device-rtti.cpp
+2-3clang/lib/CIR/CodeGen/CIRGenModule.h
+66-32 files

LLVM/project 2df00e1 — llvm/include/llvm/Option LibraryOptions.h, llvm/lib/Transforms/IPO IPOOptions.cpp

[Option] Add and use LLVM_REGISTER_LIBRARY_OPTIONS. NFC (#239887)

Extract from #239678: Exempt the file-scope registration of options
struct from -Wglobal-constructors, in preparation for enabling
-Werror=global-constructors for llvm/lib.
DeltaFile
+16-0llvm/include/llvm/Option/LibraryOptions.h
+1-2llvm/lib/Transforms/Instrumentation/InstrumentationOptions.cpp
+1-2llvm/lib/Transforms/InstCombine/InstCombineCLOptions.cpp
+1-1llvm/lib/Transforms/Vectorize/VectorizeOptions.cpp
+1-1llvm/lib/Transforms/Scalar/ScalarOptions.cpp
+1-1llvm/lib/Transforms/IPO/IPOOptions.cpp
+21-78 files not shown
+29-1514 files

LLVM/project b9df621 — compiler-rt/test lit.common.configured.in lit.common.cfg.py

Revert "[compiler-rt][test] Use sysroot dynamic linker and rpath on Linux (#2…"

This reverts commit cba0ce818d10e4541a5f0bdc43ab8826edf45ff6.
DeltaFile
+0-6compiler-rt/test/lit.common.cfg.py
+0-1compiler-rt/test/lit.common.configured.in
+0-72 files

LLVM/project 108d0d1 — llvm/lib/CodeGen CodeGenPrepare.cpp, llvm/test/Transforms/CodeGenPrepare/RISCV strength-reduce-vector-as-data-rv32.ll

[CGP] Fix incorrect sized ConstantInt crash

Fixes a buildbot failure after #226197, https://lab.llvm.org/buildbot/#/builders/210/builds/13772.

We were always using a 64-bit APInt for StructSize which causes a type mismatch and crash for 32-bit targets with scalable vectors, e.g. riscv32 with +v
DeltaFile
+57-0llvm/test/Transforms/CodeGenPrepare/RISCV/strength-reduce-vector-as-data-rv32.ll
+1-1llvm/lib/CodeGen/CodeGenPrepare.cpp
+58-12 files

LLVM/project 84919a0 — clang/utils/perf-training perf-helper.py

[perf-training][merge-fdata] Clean up input fdata files (#139650)

BOLT AArch64 worker has been running out of disk space due to excessive
fdata files being produced from clang-bolt builder. Delete merged fdata
files to counter disk space waste.
DeltaFile
+5-3clang/utils/perf-training/perf-helper.py
+5-31 files

LLVM/project d25851a — clang/lib/Sema SemaDeclCXX.cpp, clang/test/AST ast-dump-defaulted-postfix-operators.cpp

[Clang][C++2d] Implement defaulted postfix increment and decrement operators (P3668R4) (#229560)

Paper:
https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2026/p3668r4.html

Allow the postfix `operator++(int)` and `operator--(int)` to be
explicitly defaulted, as specified by P3668R4 ([over.inc.default]). The
implicit definition of a defaulted postfix operator for a type `C` is
equivalent to

```cpp
  C tmp(c);
  ++c;       // or --c
  return tmp;
```

where c denotes `*this` for an implicit object member function and the
first parameter otherwise. The copy is direct-initialized and `tmp` is a
candidate for named return value optimization.

    [32 lines not shown]
DeltaFile
+619-40clang/lib/Sema/SemaDeclCXX.cpp
+653-0clang/test/SemaCXX/cxx2d-defaulted-postfix-operators-definition.cpp
+452-0clang/test/SemaCXX/cxx2d-defaulted-postfix-operators-deleted.cpp
+413-0clang/test/SemaCXX/cxx2d-defaulted-postfix-operators-declaration.cpp
+191-0clang/test/SemaCXX/cxx2d-defaulted-postfix-operators.cpp
+119-0clang/test/AST/ast-dump-defaulted-postfix-operators.cpp
+2,447-4017 files not shown
+2,818-6523 files

LLVM/project cba0ce8 — compiler-rt/test lit.common.configured.in lit.common.cfg.py

[compiler-rt][test] Use sysroot dynamic linker and rpath on Linux (#239878)

Follow-up to https://github.com/llvm/llvm-project/pull/239742.
`glibc-X.Y` lit features are detected from `CMAKE_SYSROOT` headers, but
test binaries still executed against the host's glibc at runtime,
breaking
tests like `preinit_array.cpp` (`UNSUPPORTED: glibc-2.34`) and
`getline_nohang.cpp` (`UNSUPPORTED: glibc-2.38`) when the host glibc is
newer than the sysroot.

Assisted-by: Gemini
DeltaFile
+6-0compiler-rt/test/lit.common.cfg.py
+1-0compiler-rt/test/lit.common.configured.in
+7-02 files

LLVM/project e5b917d — llvm/lib/CodeGen OptimizePHIs.cpp MachineLICM.cpp, llvm/lib/CodeGen/SelectionDAG SelectionDAGISel.cpp

CodeGen: Remove clearKillFlags calls on virtual registers (#239778)

Kill flags are no longer permitted on virtual registers, so clearing
them is a no-op. Remove the calls in generic passes where the register
can only be virtual.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+2-21llvm/lib/CodeGen/PeepholeOptimizer.cpp
+0-20llvm/lib/CodeGen/MachineSink.cpp
+0-9llvm/lib/CodeGen/RegisterCoalescer.cpp
+0-8llvm/lib/CodeGen/MachineLICM.cpp
+0-6llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+0-3llvm/lib/CodeGen/OptimizePHIs.cpp
+2-671 files not shown
+2-707 files

LLVM/project f42820c — compiler-rt/test lit.common.configured.in lit.common.cfg.py

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+4-53compiler-rt/test/lit.common.cfg.py
+1-0compiler-rt/test/lit.common.configured.in
+5-532 files

LLVM/project f6dbe55 — clang/lib/Lex LiteralSupport.cpp

[clang][NFC] Clean up conditional statement and make pointer type explicit (#239279)

Remove redundant `else if` and replace with `if` in conditional logic.
The first `if` condition will cause an early return and making the next
condition an `else if` is not beneficial here.

Define `Delim` as a `const auto*` pointer to make the variable type
explicit.

Signed-off-by: Hardik Kumar <hardikxk at gmail.com>
DeltaFile
+2-2clang/lib/Lex/LiteralSupport.cpp
+2-21 files

LLVM/project 0504f09 — llvm/test/CodeGen/X86 regallocfast-inline-asm-fold-pressure.mir regallocfast-inline-asm-fold.mir

Merge branch 'users/void/asm-rm-4-regallocfast-fold' into users/void/asm-rm-5-prefer-reg
DeltaFile
+2-24llvm/test/CodeGen/X86/regallocfast-inline-asm-fold.mir
+1-1llvm/test/CodeGen/X86/regallocfast-inline-asm-fold-pressure.mir
+3-252 files

LLVM/project d2c4fcf — llvm/test/CodeGen/X86 regallocfast-inline-asm-fold-pressure.mir regallocfast-inline-asm-fold.mir

[RegAllocFast] Drop kill flags on virtual registers from the fold tests

The machine verifier now rejects them (#239012). The fast register
allocator works out where each value dies on its own, so the output is the
same without them. That makes tied_input_dies_no_kill_flag a copy of
tied_input_dies, so remove it.

Assisted-by: Claude Opus 5.5
DeltaFile
+2-24llvm/test/CodeGen/X86/regallocfast-inline-asm-fold.mir
+1-1llvm/test/CodeGen/X86/regallocfast-inline-asm-fold-pressure.mir
+3-252 files

LLVM/project c3f8513 — clang/utils/perf-training perf-helper.py

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+5-3clang/utils/perf-training/perf-helper.py
+5-31 files

LLVM/project 3e7841e — lldb/source/Host/macosx/objcxx Host.mm, lldb/test/API/macosx/posix_spawn arm64e.c Makefile

[lldb] Honor the arm64 subtype when launching on Darwin (#239423)

LaunchProcessPosixSpawn treated a CPU subtype of 0 as unset and fell
back to posix_spawnattr_setbinpref_np, which only takes a CPU type.
CPU_SUBTYPE_ARM64_ALL is 0, so launching the arm64 slice of a
universal arm64/arm64e binary ran the arm64e slice while LLDB
reported arm64. debugserver had the same check.

With the check gone, the kernel requires an exact subtype match. Map
arm64_32 to CPU_SUBTYPE_ARM64_32_V8 in debugserver instead of 0.

rdar://191339428
Assisted-by: Claude
DeltaFile
+43-16lldb/test/API/macosx/posix_spawn/TestLaunchProcessPosixSpawn.py
+16-18lldb/tools/debugserver/source/MacOSX/MachProcess.mm
+6-1lldb/test/API/macosx/posix_spawn/Makefile
+5-0lldb/test/API/macosx/posix_spawn/arm64e.c
+2-1lldb/tools/debugserver/source/DNB.cpp
+0-1lldb/source/Host/macosx/objcxx/Host.mm
+72-376 files

LLVM/project 58b0fd5 — lldb/test/API/functionalities/scripted_frame_provider test_frame_providers.py

[lldb] Forward real registers in TestScriptedFrameProvider's frame without variables (#239875)

`test_expression_at_frame_without_variables` failed on aarch64 Linux
with "Couldn't allocate space for materialized struct". Its scripted
frame had no register context, so LLDB couldn't allocate memory in the
inferior to run the expression from that frame. On macOS, debugserver
allocates memory without going through the frame, which is why the test
passed there.

This patch makes the frame forward the registers of the real frame it
replaces, so evaluating an expression there works like at a regular
frame. It still keeps the default `get_variables()`, which the test is
about.

Assisted-by: Claude

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+31-2lldb/test/API/functionalities/scripted_frame_provider/test_frame_providers.py
+31-21 files

LLVM/project 3a9c48c — compiler-rt/test lit.common.cfg.py

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+55-0compiler-rt/test/lit.common.cfg.py
+55-01 files

LLVM/project 7fc6c84 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-4-regallocfast-fold' into users/void/asm-rm-5-prefer-reg
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
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+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project 917f3c0 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-3-direct-mem-output-error' into users/void/asm-rm-4-regallocfast-fold
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
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+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project ace5565 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-2f-peephole-asm-load-fold' into users/void/asm-rm-3-direct-mem-output-error
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project 5e9d29a — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-2e-fold-asm-memoperands' into users/void/asm-rm-2f-peephole-asm-load-fold
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project d88ee96 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-2d-prefer-spilling-foldable' into users/void/asm-rm-2e-fold-asm-memoperands
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project b27959d — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-2c-fold-subreg-offset' into users/void/asm-rm-2d-prefer-spilling-foldable
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project 3d44189 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-2b-fold-all-reg-operands' into users/void/asm-rm-2c-fold-subreg-offset
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project cd4e116 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/asm-rm-2-fold-tied-operands' into users/void/asm-rm-2b-fold-all-reg-operands
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project ff8fdd5 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/mir-inline-asm-func-kind' into users/void/asm-rm-2-fold-tied-operands
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project fe88979 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'users/void/mir-inline-asm-operand-count' into users/void/mir-inline-asm-func-kind
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
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+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-011,047 files not shown
+1,086,442-142,89911,053 files

LLVM/project dd3b422 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Merge branch 'main' into users/void/mir-inline-asm-operand-count
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
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+163,516-011,047 files not shown
+1,086,442-142,89911,053 files