LLVM/project 968b8b0clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowAnalysis.cpp

change 'result()' to 'getResult()'
DeltaFile
+5-5clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
+5-51 files

LLVM/project 031f4bcllvm/include/llvm/Analysis TargetTransformInfoImpl.h, llvm/include/llvm/CodeGen BasicTTIImpl.h

[LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF

Add components of maxVF and its support for scalable
vectorization. The default for unspecified RISCV is
LMUL=4 with this change, so some tests will have
the flag that controls max LMUL to extend to LMUL=8
when the request is made.
DeltaFile
+32-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+7-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+3-3llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-maxbandwidth.ll
+5-0llvm/lib/Analysis/TargetTransformInfo.cpp
+5-0llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+5-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+57-34 files not shown
+65-510 files

LLVM/project 698dce1flang/lib/Optimizer/Builder IntrinsicCall.cpp, flang/test/Lower/Intrinsics transfer-unsigned.f90

[flang] Fix inline transfer for unsigned integer types (#193570)

Fix a crash when transfer is used with Fortran unsigned types. The
arith.bitcast op requires signless integer or float operands, but the
inline optimization was applying it to unsigned integer types (ui32),
causing a verification failure. Changed the guard from
mlir::isa<mlir::IntegerType> to isSignlessIntOrFloat() so unsigned
integer transfers fall through to the address-level fir.convert path
instead.

This is to fix a regression reported here:
https://github.com/llvm/llvm-project/pull/191589#issuecomment-4298846795
DeltaFile
+16-0flang/test/Lower/Intrinsics/transfer-unsigned.f90
+2-2flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+18-22 files

LLVM/project fed79d4llvm/lib/Target/RISCV RISCVTargetTransformInfo.h, llvm/test/CodeGen/RISCV/rvv vp-inttoptr-ptrtoint.ll fixed-vectors-inttoptr-ptrtoint.ll

[RISCV] Expand vp.inttoptr, vp.ptrtoint (#193530)

Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999

This splits off 2 intrinsics from #179622. There are no corresponding
ISD nodes, they are converted into the appropriate integer casts in
SelectionDAGBuilder
DeltaFile
+15-15llvm/test/CodeGen/RISCV/rvv/vp-inttoptr-ptrtoint.ll
+4-4llvm/test/CodeGen/RISCV/rvv/fixed-vectors-inttoptr-ptrtoint.ll
+0-2llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+19-213 files

LLVM/project 2cb6359llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

update

Created using spr 1.3.7
DeltaFile
+158,756-173,230llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+50,477-50,088llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+92,827-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+764,189-265,66642,201 files not shown
+6,544,899-3,297,05042,207 files

LLVM/project 32ba94allvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+158,756-173,230llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+50,477-50,088llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+92,827-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+764,189-265,66642,198 files not shown
+6,544,872-3,297,04042,204 files

LLVM/project 76c06c4llvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG/X86 switch-to-lookup-comdat.ll

Revert "Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table"…"

This reverts commit 347dc1321ed50578bb09da6fa10ccec581d8a2b6.
DeltaFile
+0-58llvm/test/Transforms/SimplifyCFG/X86/switch-to-lookup-comdat.ll
+0-1llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+0-592 files

LLVM/project 97015adclang/include/clang/Basic IdentifierTable.h TokenKinds.def, clang/lib/Basic IdentifierTable.cpp

[HLSL] Disallow `volatile` keyword (#193322)

This PR disallows the `volatile` keyword in HLSL.
The keyword is meaningless in this language, and it comes from the C++
foundation that HLSL stands on.
Fixes https://github.com/llvm/llvm-project/issues/192559
It is arguably in the category of this scenario:
https://github.com/llvm/wg-hlsl/issues/300
Assisted by: Github Copilot
DeltaFile
+10-0clang/test/SemaHLSL/Language/Volatile.hlsl
+4-3clang/include/clang/Basic/IdentifierTable.h
+2-1clang/include/clang/Basic/TokenKinds.def
+3-0clang/lib/Basic/IdentifierTable.cpp
+19-44 files

LLVM/project af626d8clang/docs ReleaseNotes.rst, clang/lib/AST StmtProfile.cpp

Revert "[clang] fix profiling of pack index expressions (#192810)"

This reverts commit b5048038ef7c8c344d49b0bfe5b5d32db45ed8f3.
DeltaFile
+0-10clang/test/SemaCXX/cxx2c-pack-indexing.cpp
+3-3clang/lib/AST/StmtProfile.cpp
+1-2clang/docs/ReleaseNotes.rst
+4-153 files

LLVM/project 835daballvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

Merge branch 'users/ziqingluo/PR-174874942-2' into users/ziqingluo/PR-174874942-3

 Conflicts:
        clang/include/clang/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.h
        clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+41,844-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
+40,613-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
+37,209-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
+597,128-03,180 files not shown
+976,533-61,1103,186 files

LLVM/project 0062071clang/lib/CIR/CodeGen CIRGenModule.cpp, clang/test/CIR/CodeGen replace-global-deferred-strings.c

[CIR] Fix a dangling reference to a replaced global (#193561)

We had a bug in CIR where we were replacing a global value that was
being used to track the insertion location of the last global created.
When we erased this value while still holding a reference to it, it
caused subsequent globals to be created in a detatched state, which in
turn led to crashes when lowering uses of those globals to the LLVM
dialect.

This change updates `lastGlobalOp` when the global it is referencing is
replaced.

Assisted-by: Cursor / claude-4.7-opus-high
DeltaFile
+40-0clang/test/CIR/CodeGen/replace-global-deferred-strings.c
+8-1clang/lib/CIR/CodeGen/CIRGenModule.cpp
+48-12 files

LLVM/project a8f6ba7clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel EntityPointerLevelFormat.h, clang/include/clang/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowAnalysis.h

fix clang-format
DeltaFile
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.h
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.h
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.h
+3-33 files

LLVM/project 6ef1b80bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86 dwarf4-dwp-x86.s

[BOLT] Fix null pointer dereference in DWP processing with split DWARF (#191474)

Fix two null pointer dereferences in BOLT's DWP processing path that
cause SIGSEGV in worker threads when -update-debug-sections is used with
a co-located .dwp file.

1. getSliceData() in updateDebugData() dereferences the result of
getContribution() without checking for null. getContribution() returns
nullptr when the requested section kind (e.g. DW_SECT_LINE) is not
present as a column in the DWP CU index. When BOLT processes a DWP where
certain section kinds are absent from the index, every worker thread
that hits this path crashes simultaneously.

2. processSplitCU() dereferences getUnitDIEbyUnit() without checking for
null. If buildDWOUnit() fails for a CU, the returned DIE* is null and
the dereference crashes.

Crash signature from dmesg:
```

    [11 lines not shown]
DeltaFile
+11-1bolt/test/X86/dwarf4-dwp-x86.s
+9-2bolt/lib/Rewrite/DWARFRewriter.cpp
+20-32 files

LLVM/project 5d9a1c1lldb/source/Target SectionLoadList.cpp

[lldb] Eliminate linear scan in SetSectionLoadAddress (#193560)

This PR changes SectionLoadList::SetSectionLoadAddress to avoid O(n)
linear scan when removing stale reverse-map entries. While I was there,
I did some gardening to improve the function's readability.

The change is not NFC as I also fixed a pre-existing bug where the stale
addr-to-sect entry was not removed when the new load address already
existed in the map (the ats_pos != end() branch).
DeltaFile
+61-67lldb/source/Target/SectionLoadList.cpp
+61-671 files

LLVM/project 1c6ab11llvm/utils profcheck-xfail.txt

Add expand-fp-math.ll to profcheck-xfail.txt (#193577)

(from #193552) 
We haven't yet addressed PreIselIntrinsicsLowering
DeltaFile
+1-0llvm/utils/profcheck-xfail.txt
+1-01 files

LLVM/project 1fe66f6llvm/lib/Object OffloadBundle.cpp, llvm/test/tools/llvm-objdump/Offloading fatbin-compress.test

[llvm-objdump][offload] Fix offload bundle decompressing (#192729)

The flag to enable decompressing offload bundles was not passed along to
the OffloadBundleFatBin class. The --offloading option was not
decompressing compressed objects.
DeltaFile
+51-0llvm/test/tools/llvm-objdump/Offloading/fatbin-compress.test
+1-1llvm/lib/Object/OffloadBundle.cpp
+52-12 files

LLVM/project 335f9f9clang/lib/Sema SemaHLSL.cpp, clang/test/CodeGenHLSL/BasicFeatures InitLists.hlsl

[HLSL] Reuse temporaries of aggregate types in list initialization (#191605)

When aggregate types appear as _prvalues_ in HLSL initializer lists, convert them to _xvalues_ and wrap them in `OpaqueValueExpr` so the temporaries can be reused across all element accesses. This allows code generation to avoid emitting redundant copies of the same aggregate temporary.

This should be especially helpful once support for constructors on user-defined structs is removed, and initializer lists will be the primary mechanism for struct initialization.

A similar optimization may also be applicable to vector and matrix types. However, their current code generation path does not yet support handling `OpaqueValueExpr` in initializer lists.
DeltaFile
+8-51clang/test/CodeGenHLSL/BasicFeatures/InitLists.hlsl
+12-5clang/lib/Sema/SemaHLSL.cpp
+10-0clang/test/SemaHLSL/Language/InitListAST.hlsl
+30-563 files

LLVM/project 1aad4a2llvm/lib/CodeGen TargetLoweringBase.cpp PreISelIntrinsicLowering.cpp, llvm/test/Transforms/PreISelIntrinsicLowering/AArch64 expand-fp-math.ll

[PreISelIntrinsicLowering] Expand all unary elementwise intrinsics (#193552)

This expands the set of scalable typed unary intrinsics which can be
expanded to match the entire set of builtin element wise routines
provided by clang. Support for the binary ones will follow in a separate
patch.

Note that the lowering quality is terrible, particularly when the libc
entry for the scalar routine doesn't preserve vector registers (e.g.
RISC-V default). This is a functional fix to avoid crashes when trying
to codegen these, nothing more.

Written by Claude, sanity checked by me.
DeltaFile
+289-0llvm/test/Transforms/PreISelIntrinsicLowering/AArch64/expand-fp-math.ll
+26-0llvm/lib/CodeGen/TargetLoweringBase.cpp
+13-0llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
+328-03 files

LLVM/project e2f6618clang/lib/Lex ModuleMap.cpp

[clang][Modules] Avoid checking for duplicating module definitions when a module does not have a valid definition location (#193534)

69e0367e8221b8002b5d438fb70ff3daf36257fc enhanced the duplicating module
definition diagnostics to check across ModuleMaps in a very specific
case. The check proved to be overly strict. This PR makes sure we do not
check when the `Existing` module's definition location is unknown. Such
cases are only observed when a module built through include-tree (CAS)
is imported through a pch (e.g.
https://github.com/swiftlang/llvm-project/blob/4a8f552d072f7dfdecc241c02696f82761ec0596/clang/test/ClangScanDeps/modules-include-tree-pch-common-stale-prefix-map.c#L1)
Such cases are only present when CAS is used, so no test case is
attached here.

Assisted-by: claude-opus-4.6

rdar://174894322
DeltaFile
+9-4clang/lib/Lex/ModuleMap.cpp
+9-41 files

LLVM/project fb02433clang/include/clang/AST DeclTemplate.h, clang/lib/AST DeclTemplate.cpp

 [Clang][AST] Introduce `ExplicitInstantiationDecl` to preserve source info and fix diagnostic locations  (#191658)

This is the initial fix of
https://github.com/llvm/llvm-project/issues/191442. Following the
discussion here
https://github.com/llvm/llvm-project/issues/115418#issuecomment-2467017012.

- Fix #21040
- Fix #52659
- Fix #115418
- Fix #14230
- Fix #21133

### Description

This PR introduces a new AST node, `ExplicitInstantiationDecl`, to
systematically fix the long-standing issue of missing or incorrect
source location information for explicit template instantiations.


    [53 lines not shown]
DeltaFile
+214-0clang/test/AST/explicit-instantiation-source-info.cpp
+133-0clang/include/clang/AST/DeclTemplate.h
+129-0clang/lib/AST/DeclTemplate.cpp
+100-17clang/lib/Sema/SemaTemplate.cpp
+67-0clang/test/SemaTemplate/explicit-instantiation-diag-location.cpp
+50-12clang/test/AST/ast-dump-templates.cpp
+693-2933 files not shown
+1,200-8939 files

LLVM/project 50d7c99flang/lib/Lower/OpenMP OpenMP.cpp, flang/lib/Lower/Support ReductionProcessor.cpp

[flang][OpenMP] Support user-defined declare reduction with derived types (#190288)

Fix lowering of `!$omp declare reduction` for intrinsic operators
applied
to user-defined derived types (e.g., `+` on `type(t)`). Previously, this
hit a TODO in `ReductionProcessor::getReductionInitValue` because the
code
tried to compute an init value for a non-predefined type, when it should
instead use the initializer region from the `DeclareReductionOp`.

This fixes the issue #176278: [Flang][OpenMP] Compilation error when
type-list in declare reduction directive is derived type name.

The root cause was a naming mismatch: `genOMP` for
`OpenMPDeclareReductionConstruct` used a raw operator string (e.g.,
"Add")
as the reduction name, while `processReductionArguments` at the use site
computed a canonical name via `getReductionName` (e.g.,
"add_reduction_byref_rec__QFTt"). The `lookupSymbol` in

    [76 lines not shown]
DeltaFile
+151-30flang/lib/Lower/OpenMP/OpenMP.cpp
+56-50llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+86-0flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
+18-22flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
+25-10flang/lib/Lower/Support/ReductionProcessor.cpp
+25-2flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
+361-1145 files not shown
+419-13111 files

LLVM/project 9343e8bclang/include/clang/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowAnalysis.h

fix clang-format
DeltaFile
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.h
+1-11 files

LLVM/project c2ba462llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU rsq.f64.ll fdiv.f64.ll

AMDGPU: Skip last corrections in afn f64 reciprocal

Device libs has a fast reciprocal macro that is close
to the fast division expansion, but skips the last terms
compared to the full division.

The basic reciprocal handling has identical output to this
macro. The negative reciprocal case has different fneg placement
and smaller code size, but I believe should be the same.
DeltaFile
+32-116llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+37-7llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll
+17-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+16-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-2llvm/test/CodeGen/AMDGPU/fdiv.f64.ll
+0-4llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
+114-1311 files not shown
+114-1337 files

LLVM/project ebf14edclang/lib/CIR/Dialect/Transforms CXXABILowering.cpp, clang/test/CIR/CodeGen cxx-abi-lowering-string-array.cpp

[CIR] Fix lowering of strings in constant array attributes (#193553)

There was code in the CIR CXXABILowering pass that was assuming
ConstArrayAttr::getElts() would return an ArrayAttr. This isn't true in
the case of string constants with trailing zeros, so we had a crash in a
mlir::cast<> call. The problem only appeared when a string array
appeared in the same initializer as a type that required CXXABI-specific
lowering, such as a member pointer.

This change fixes the CXXABILowering to simply keep the existing string
attribute, which is known to be legal for the purposes of that pass.

Assisted-by: Cursor / claude-4.7-opus-high
DeltaFile
+29-0clang/test/CIR/CodeGen/cxx-abi-lowering-string-array.cpp
+11-0clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
+40-02 files

LLVM/project 0dbf737llvm/docs LangRef.rst

[LangRef] inline asm: the instructions are treated opaquely (#157080)

This wasn't true until recently, but
https://github.com/llvm/llvm-project/issues/156571 got fixed to make it
true.

I was not entirely sure where to put this; for now I made it a new
paragraph fairly early on in the inline asm docs.
DeltaFile
+8-0llvm/docs/LangRef.rst
+8-01 files

LLVM/project 55762f3llvm/lib/IR Verifier.cpp, llvm/test/Assembler fpmath.ll

IR: Allow !fpmath metadata on homogeneous float structs (#193537)

This matches the logic for fast math flags / nofpclass, and allows
marking llvm.sincos calls with !fpmath.
DeltaFile
+19-0llvm/test/Assembler/fpmath.ll
+1-1llvm/lib/IR/Verifier.cpp
+20-12 files

LLVM/project b307eb0llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

Merge remote-tracking branch 'origin/users/ziqingluo/PR-174874942-1' into users/ziqingluo/PR-174874942-2

 Conflicts:
        clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
        clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+41,844-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
+40,613-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
+37,209-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
+597,128-03,180 files not shown
+976,534-61,1103,186 files

LLVM/project e5e4df2clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowAnalysis.cpp

fix clang-format
DeltaFile
+4-4clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
+4-41 files

LLVM/project be529fcllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 commutative-copyable-external-phi-use.ll copyable-used-outside-with-immediate-op.ll

[SLP]Fix scheduling of copyable bundle with commutative op used outside parent PHI

The previous (V, Op) pair insert was a no-op since V is unique per iteration.
Replace it with a hasOneUse() fast path plus a check that bails only when I
has a user outside the grandparent PHI's Scalars. Uses within the same
vectorized PHI are tracked by the existing dep machinery; an external user
(e.g. a scalar PHI in a different block) is what trips scheduleBlock's
"must be scheduled at this point" assertion.

Fixes #193315.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/193566
DeltaFile
+55-0llvm/test/Transforms/SLPVectorizer/X86/commutative-copyable-external-phi-use.ll
+13-4llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+6-4llvm/test/Transforms/SLPVectorizer/X86/copyable-used-outside-with-immediate-op.ll
+74-83 files

LLVM/project 80efad5clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/CodeGen static-local.cpp

[CIR] Support guard COMDAT for weak linkage in LoweringPrepare (#193274)

Static locals inside inline functions get `linkonce_odr` linkage, and
their guard variables need their own COMDAT groups so the linker can
deduplicate them across TUs. We were hitting an NYI error for this case
in `LoweringPrepare`.

The fix is straightforward: set `guard.setComdat(true)`, which makes
`LowerToLLVM` create a per-symbol COMDAT selector — the same thing
classic codegen does at `ItaniumCXXABI.cpp:2798`.

I ran into this while trying to compile the Bullet physics engine
through CIR. Functions like `btMatrix3x3::getIdentity()` use this
pattern (return a reference to a function-local static from an inline
member function), and 6 of the 121 source files were failing because of
it. With this fix, all 121 compile cleanly.

Made with [Cursor](https://cursor.com)
DeltaFile
+56-2clang/test/CIR/CodeGen/static-local.cpp
+1-2clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+57-42 files