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[AArch64][GlobalISel] Update scalar types in postlegalizer tests. NFC (#208620)

Revert "[Docs] Migrate LLVM docs to furo" (#208619)

Reverts llvm/llvm-project#184440

Furo seems to parse the entire navtree HTML blob for every page, and the
navtree is large, so now doc building takes > 25min. I wasn't able to
fix forward, so let's roll back for now.

Agent analysis here:
https://gist.github.com/rnk/5e26e09fbf1f51a501e6ab4139d048ad

[clang][bytecode][NFC] Simplify redecl loop (#208477)

Avoid the `Redecl == VD` iteration.

[NFC][AMDGPU] Add tests for eliminateFrameIndex

Add MIR tests to cover all instances where a Vgpr needs to be scavenged
and used due to Sgpr scarcity, during elimination of frame indices.

[flang][OpenMP] Lower target in_reduction for host fallback

Enable host-fallback lowering for target in_reduction in Flang and MLIR OpenMP translation.

Model target in_reduction through the matching map entry, force address-preserving implicit mapping for Flang in_reduction list items, and emit the host-side task-reduction lookup with __kmpc_task_reduction_get_th_data. The runtime entry point takes and returns a generic, default-address-space pointer, so normalize a non-default-address-space captured pointer to the generic address space before the call and cast the returned private pointer back to the map block argument's address space, mirroring the in_reduction handling on omp.taskloop. On the target device, in_reduction is handled as a regular map(tofrom) variable. The byref modifier, two-argument initializers, cleanup regions, and the remaining Flang COMMON/EQUIVALENCE/privatized-variable cases continue to be diagnosed.

Add Flang lowering, MLIR verifier/translation, and LLVM IR tests for the supported host-fallback path, including a non-default-address-space case, and the remaining unsupported cases.

[X86][Inline] Don't inline callee with cx16 if caller is without cx16 (#187505)

closes https://github.com/llvm/llvm-project/issues/187503

[RISCV][P-ext] Improve the codegen for pzip (#208479)

This patch recognizes interleaved shuffle (as packed zip intrinsics use)
and selects the corresponding instructions.

[flang] Do not implicitly use module when processing the module (#208582)

https://github.com/llvm/llvm-project/pull/207824 Added ability to use
implicitly a module. The use should not happen while processing the
module used implicitly.

[clang] Add -mavx512bmm flag (#208520)

https://github.com/llvm/llvm-project/pull/182556 missed the addition of
the -mavx512bmm flag

Update for comment

[Clang] ASTUnit should use the CompilerInstance's CodeGenOptions (#195338)

Currently, `ASTUnit::LoadFromCompilerInvocation()` just calls the
constructor of `ASTUnit`, which default-constructs a `CodeGenOptions`
instance. The options from the `CompilerInstance` are never actually
saved in the `ASTUnit`. As a result, serialising the `ASTUnit` ends up
serialising the default-constructed `CodeGenOptions` rather than the
_actual_ `CodeGenOptions`.

This is problematic if you attempt to do the following:
1. Call e.g. `buildASTFromCodeWithArgs()` to build an `ASTUnit`
2. Serialise that `ASTUnit`.
3. Call e.g. `buildASTFromCodeWithArgs()` again with the exact same
arguments and add use the first `ASTUnit` as a PCH using `-include-pch`.

This causes Clang to error because the `CodeGenOptions` we deserialised
for the first `ASTUnit` (the default-constructed ones) are incompatible
with the `CodeGenOptions` implicitly created for the second TU (which
were created by the `CompilerInstance` and potentially modified due to

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[Clang] [C++26] Expansion Statements (Part 9)

[Clang] [C++26] Expansion Statements (Part 10)

[Clang] [C++26] Expansion Statements (Part 11)

[CodeGen][BranchFolding] Add options to control common hoisting and block reordering (#205704)

The BranchFolder pass performs several independent optimizations: tail
 merging, common-code hoisting, and branch optimization (which includes
 basic-block reordering). Currently only tail merging is individually
controllable -- it is disabled for targets that require a structured
CFG,
because tail merging can make the CFG irreducible. Common-code hoisting
and
 basic-block reordering always run whenever the pass executes.

 Those two sub-phases do not change CFG edges (so they cannot affect
 reducibility); they only change block layout. A target whose register
 allocation is sensitive to the final block layout may need the rest of
 branch folding while suppressing reordering and/or hoisting. This is a
 layout / register-allocation concern, distinct from the structured-CFG
 (reducibility) concern that gates tail merging.

 This change makes common-code hoisting and basic-block reordering

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Fix Typo

Update for comment

Update doc

Update for comments

Add element non byte

Add verifier test

[IR] Add elementwise modifier to atomic loads

Update for comments.

[Clang] [C++26] Expansion Statements (Part 7)

[Clang] [C++26] Expansion Statements (Part 6)

[Clang] [C++26] Expansion Statements (Part 8)

[Clang] [C++26] Expansion Statements (Part 5)

[SandboxVec][Scheduler][NFC] Add direction arg to Scheduler constructor (#208602)

With this patch we require the user to set the scheduling direction
during construction. The direction used to default to BottomUp which
would cause crashes if the user had forgotten to set the direction and
attempt to scheduler top-down.

Also drop Scheduler::setDirection() as there is no longer a need for it.

fixup

fixup