LLVM/project 06c8ee6llvm/test/CodeGen/DirectX/CBufferAccess gep-ce-two-uses.ll

[NFC] [DirectX] Make DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` more strict (#169855)

Continuation of PR #169848 to address PR comments.

This PR makes the test more strict by adding CHECKs to ensure the loads
are indeed using the same or different GEPs.
DeltaFile
+8-5llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
+8-51 files

LLVM/project 8459508llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/RISCV pointer-induction.ll

[VPlan] Handle scalar VPWidenPointerInd in convertToConcreteRecipes. (#169338)

In some case, VPWidenPointerInductions become only used by scalars after
legalizeAndOptimizationInducftions was already run, for example due to
some VPlan optimizations.

Move the code to scalarize VPWidenPointerInductions to a helper and use
it if needed.

This fixes a crash after #148274 in the added test case.

Fixes https://github.com/llvm/llvm-project/issues/169780
DeltaFile
+100-0llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction.ll
+28-10llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+128-102 files

LLVM/project 07d14cbclang/lib/Format UnwrappedLineParser.cpp UnwrappedLineParser.h

[clang-format][NFC] Remove the parameter of parseRequires...() (#169773)

DeltaFile
+34-53clang/lib/Format/UnwrappedLineParser.cpp
+2-2clang/lib/Format/UnwrappedLineParser.h
+36-552 files

LLVM/project 2cb3785llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer crash_exceed_scheduling.ll extract-many-users-buildvector.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+92-46llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
+26-102llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
+34-38llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
+26-23llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+18-26llvm/test/Transforms/SLPVectorizer/X86/user-with-multi-copyable-ops.ll
+20-20llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
+216-25510 files not shown
+288-34116 files

LLVM/project 8f36135llvm/lib/Transforms/Vectorize VPlanConstruction.cpp VPlanPatternMatch.h

[VPlan] Add m_Intrinsic matcher that takes a variable intrinsic ID (NFC)

Add a variant of m_Intrinsic that matches a variable runtime ID.
DeltaFile
+5-15llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+5-0llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+10-152 files

LLVM/project 2e655c2clang/include/clang/CIR/Dialect/IR CIROps.td CIRDialect.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

[CIR] Upstream TryCallOp (#165303)

Upstream TryCall Op as a prerequisite for Try Catch work

Issue https://github.com/llvm/llvm-project/issues/154992
DeltaFile
+97-7clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+91-1clang/include/clang/CIR/Dialect/IR/CIROps.td
+35-0clang/test/CIR/IR/try-call.cir
+1-0clang/include/clang/CIR/Dialect/IR/CIRDialect.td
+224-84 files

LLVM/project ad605bdbolt/include/bolt/Core MCPlusBuilder.h, bolt/lib/Passes Instrumentation.cpp

[bolt][aarch64] Change indirect call instrumentation snippet

Indirect call instrumentation snippet uses x16 register in exit
handler to go to destination target

    __bolt_instr_ind_call_handler_func:
            msr  nzcv, x1
            ldp  x0, x1, [sp], llvm#16
            ldr  x16, [sp], llvm#16
            ldp  x0, x1, [sp], llvm#16
            br   x16    <-----

This patch adds the instrumentation snippet by calling instrumentation
runtime library through indirect call instruction and adding the wrapper
to store/load target value and the register for original indirect instruction.

Example:
            mov x16, foo


    [79 lines not shown]
DeltaFile
+87-56bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+55-1bolt/test/runtime/AArch64/instrumentation-ind-call.c
+8-2bolt/runtime/instr.cpp
+6-3bolt/lib/Passes/Instrumentation.cpp
+4-2bolt/runtime/sys_aarch64.h
+5-0bolt/include/bolt/Core/MCPlusBuilder.h
+165-646 files

LLVM/project 2479918flang/test/Integration/OpenMP map-types-and-sizes.f90, mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

[MLIR][OpenMP] Add OpenMPToLLVMIRTranslation support for is_device_ptr

This PR adds support for the OpenMP is_device_ptr clause in the MLIR to LLVM IR translation for target regions. The is_device_ptr clause allows device pointers (allocated via OpenMP runtime APIs) to be used directly in target regions without implicit mapping.
DeltaFile
+46-0offload/test/offloading/fortran/target-is-device-ptr.f90
+17-0mlir/test/Target/LLVMIR/omptarget-llvm.mlir
+10-6mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+0-11mlir/test/Target/LLVMIR/openmp-todo.mlir
+9-0flang/test/Integration/OpenMP/map-types-and-sizes.f90
+82-175 files

LLVM/project d39f524llvm/lib/Target/PowerPC PPCInstrFuture.td PPCRegisterInfo.td, llvm/lib/Target/PowerPC/MCTargetDesc PPCInstPrinter.cpp PPCAsmBackend.cpp

[PowerPC] Implement paddis (#161572)

DeltaFile
+44-0llvm/lib/Target/PowerPC/PPCInstrFuture.td
+19-0llvm/lib/Target/PowerPC/PPCRegisterInfo.td
+12-0llvm/test/MC/PowerPC/ppc-encoding-ISAFuture.s
+11-0llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+9-0llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
+6-0llvm/lib/Target/PowerPC/MCTargetDesc/PPCFixupKinds.h
+101-06 files not shown
+125-012 files

LLVM/project a1f30c2llvm/test/CodeGen/DirectX/CBufferAccess gep-ce-two-uses.ll

[NFC] [DirectX] Update DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` due to changes to ReplaceConstant (#169848)

Fixes an LLVM DirectX codegen test after it broke due to #169141

The CBuffer loads and GEPs are no longer duplicated when there are two
or more accesses within the same basic block.
This PR removes the duplicate check for CBuffer load and GEP from the
original test function `@f` and adds a new test function `@g` which
places duplicate CBuffer loads into separate basic blocks.
DeltaFile
+16-0llvm/test/CodeGen/DirectX/CBufferAccess/gep-ce-two-uses.ll
+16-01 files

LLVM/project f5d82d2flang/lib/Lower/OpenMP OpenMP.cpp ClauseProcessor.cpp, flang/test/Lower/OpenMP target.f90

[Flang][OpenMP] Add lowering support for is_device_ptr clause

Add support for OpenMP is_device_ptr clause for target directives.
DeltaFile
+41-4flang/lib/Lower/OpenMP/OpenMP.cpp
+15-27flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+30-0flang/test/Lower/OpenMP/target.f90
+5-0mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+3-1mlir/include/mlir/Dialect/OpenMP/OpenMPEnums.td
+1-1flang/lib/Lower/OpenMP/ClauseProcessor.h
+95-336 files

LLVM/project 965c3d7lld/test/wasm wrap_import.s, lld/wasm Driver.cpp SyntheticSections.cpp

[lld][WebAssembly] Fix SEGFAULT when importing wrapped symbol (#169656)

When wrapping a symbol `foo` via `-wrap=foo`, we create the symbol
`__wrap_foo` that replaces all mentions of `foo`. This feature was
implemented for wasm-ld in commit a5ca34e.

So far, no valid signature has been attached to the undefined symbol,
leading to a nullptr dereference in the logic for creating the import
section. This change adds the correct signature to the wrapped symbol,
enabling the generation of an import for it.
DeltaFile
+32-0lld/test/wasm/wrap_import.s
+5-3lld/wasm/Driver.cpp
+3-1lld/wasm/SyntheticSections.cpp
+40-43 files

LLVM/project ee45ba2llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 fixed-length-bf16-arith.ll sve-indexed-arithmetic.ll

[AArch64] Use SVE for fixed-length bf16 operations with +sve-b16b16 (#169329)

This can avoid the promotion bf16 -> f32 -> bf16 round trip (or costly
expansions).
DeltaFile
+936-0llvm/test/CodeGen/AArch64/fixed-length-bf16-arith.ll
+18-85llvm/test/CodeGen/AArch64/sve-indexed-arithmetic.ll
+6-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+960-873 files

LLVM/project 1b7ae0bllvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 aarch64-isel-umin.ll arm64-popcnt.ll

[AArch64] Use umin for x != 0 when +cssc is enabled (#169159)

Closes https://github.com/llvm/llvm-project/issues/161584
DeltaFile
+336-0llvm/test/CodeGen/AArch64/aarch64-isel-umin.ll
+6-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-2llvm/test/CodeGen/AArch64/arm64-popcnt.ll
+344-33 files

LLVM/project fd19a20llvm/include/llvm/CodeGen MachineBasicBlock.h, llvm/lib/CodeGen ShrinkWrap.cpp

Revert "[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks" (#169852)

Reverts llvm/llvm-project#167548

As commented at
https://github.com/llvm/llvm-project/pull/167548#issuecomment-3587008602
this is causing miscompiles in two-stage RISC-V Clang/LLVM builds that
result in test failures on the builders.
DeltaFile
+0-179llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
+7-5llvm/lib/CodeGen/ShrinkWrap.cpp
+0-7llvm/include/llvm/CodeGen/MachineBasicBlock.h
+7-1913 files

LLVM/project 03c8624clang/lib/AST ExprConstant.cpp

[clang:ast] Avoid warning for unused var without assertions. (NFC) (#169822)

This PR avoids a compiler warning, which turns into an error with
`-Werror`, for a variable introduced in #169276 and only used in an
assertion (which is, thus, unused if compiled without assertions).

Signed-off-by: Ingo Müller <ingomueller at google.com>
Co-authored-by: Simon Pilgrim <llvm-dev at redking.me.uk>
DeltaFile
+2-2clang/lib/AST/ExprConstant.cpp
+2-21 files

LLVM/project db85babllvm/lib/Transforms/Vectorize VPlanUnroll.cpp VPlanAnalysis.cpp

[VPlan] Use m_Intrinsic to match assumes/noalias_scope_decl (NFC).

Use pattern matching to check for intrinsics to slightly simplify code.
DeltaFile
+4-5llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
+3-2llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+7-72 files

LLVM/project 78686bbllvm/include/llvm/CodeGen MachineBasicBlock.h, llvm/lib/CodeGen ShrinkWrap.cpp

Revert "[ShrinkWrap] Modify shrink wrapping to accommodate functions terminat…"

This reverts commit 650eeb867fa95435b7c123e6630eb98934ac5bf3.
DeltaFile
+0-179llvm/test/CodeGen/AArch64/arm64-shrink-wrapping.ll
+7-5llvm/lib/CodeGen/ShrinkWrap.cpp
+0-7llvm/include/llvm/CodeGen/MachineBasicBlock.h
+7-1913 files

LLVM/project bde0665openmp/runtime/src kmp_ftn_cdecl.cpp kmp_ftn_entry.h, openmp/runtime/src/include omp_lib.h.var omp_lib.F90.var

remove Fortran support for this patch
DeltaFile
+0-65openmp/runtime/test/api/omp_device_uid.f90
+30-0openmp/runtime/src/kmp_ftn_cdecl.cpp
+2-27openmp/runtime/src/kmp_ftn_entry.h
+0-21openmp/runtime/src/include/omp_lib.h.var
+0-18openmp/runtime/src/include/omp_lib.F90.var
+0-8openmp/runtime/src/kmp_ftn_os.h
+32-1396 files

LLVM/project 86bdc70mlir/lib/Dialect/Affine/IR AffineOps.cpp

[mlir][Affine] Avoid forcing a non-composable affine Inliner impl
DeltaFile
+2-1mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+2-11 files

LLVM/project 75e4438clang/lib/CodeGen SanitizerHandler.h, clang/test/DebugInfo/Generic ubsan-trap-reason-type-mismatch.c

[ubsan] Change "Type mismatch in operation" trap reason to "Alignment, null, or object-size error" (#169752)

I originally proposed this rewording when trap reasons were introduced
in
https://github.com/llvm/llvm-project/pull/145967#discussion_r2196212344.
This was not adopted because there was a counter-proposal to split the
enum; however, that work appears to have stalled
(https://github.com/llvm/llvm-project/pull/151243). In the meantime,
there has been an additional datapoint that the current wording is
confusing to users. Thus, let's reword it now to prevent further
confusion.
DeltaFile
+1-1clang/lib/CodeGen/SanitizerHandler.h
+1-1clang/test/DebugInfo/Generic/ubsan-trap-reason-type-mismatch.c
+2-22 files

LLVM/project 8397945clang/lib/CIR/CodeGen CIRGenBuiltinX86.cpp

[clang][CIR] Fix build after builtins removal. NFC
DeltaFile
+0-10clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+0-101 files

LLVM/project a1ca690llvm/lib/Target/AArch64 AArch64PerfectShuffle.h AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 reduce-shuffle.ll insert-extend.ll

[AArch64] recognise zip1/zip2 with flipped operands (#167235)

Currently, the following two snippets get treated very differently from
each other (https://godbolt.org/z/rYGj9TGz6):
```LLVM
define <8 x i8> @foo(<8 x i8> %x, <8 x i8> %y) local_unnamed_addr #0 {
entry:
  %0 = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32>
       <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
  ret <8 x i8> %0
}

define <8 x i8> @bar(<8 x i8> %x, <8 x i8> %y) local_unnamed_addr #0 {
entry:
  %0 = shufflevector <8 x i8> %x, <8 x i8> %y, <8 x i32>
       <i32 8, i32 0, i32 9, i32 1, i32 10, i32 2, i32 11, i32 3>
  ret <8 x i8> %0
}
```

    [39 lines not shown]
DeltaFile
+82-84llvm/test/CodeGen/AArch64/reduce-shuffle.ll
+36-36llvm/test/CodeGen/AArch64/insert-extend.ll
+39-22llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
+12-36llvm/test/CodeGen/AArch64/arm64-zip.ll
+11-26llvm/test/CodeGen/AArch64/insert-subvector.ll
+18-7llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+198-2114 files not shown
+207-22010 files

LLVM/project e3a28c0flang-rt/lib/cuda allocator.cpp, flang-rt/unittests/Runtime/CUDA Allocatable.cpp

[flang][cuda][NFC] Fix naming of CUFGetAssociatedStream (#169838)

DeltaFile
+3-3flang-rt/unittests/Runtime/CUDA/Allocatable.cpp
+1-1flang/include/flang/Runtime/CUDA/allocator.h
+1-1flang-rt/lib/cuda/allocator.cpp
+5-53 files

LLVM/project 620f1f1llvm/test/CodeGen/AMDGPU global-address.ll fneg-combines-gfx1200.ll

[AMDGPU] Remove odd syntax in some RUN lines. NFC. (#169831)

DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/global-address.ll
+2-2llvm/test/CodeGen/AMDGPU/fneg-combines-gfx1200.ll
+2-2llvm/test/CodeGen/AMDGPU/whole-wave-register-spill.ll
+8-83 files

LLVM/project 58fa7e4clang/test/OpenMP irbuilder_nested_parallel_for.c ordered_codegen.cpp, llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h

Revert "[OMPIRBuilder] always leave PARALLEL via the same barrier" (#169829)

Reverts llvm/llvm-project#164586

Reverting due to buildbot failure:
https://lab.llvm.org/buildbot/#/builders/169/builds/17519
DeltaFile
+77-69llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+53-56llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+47-61clang/test/OpenMP/irbuilder_nested_parallel_for.c
+10-30clang/test/OpenMP/ordered_codegen.cpp
+20-20clang/test/OpenMP/cancel_codegen.cpp
+10-27llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+217-26317 files not shown
+263-37023 files

LLVM/project f065583llvm/lib/Transforms/Instrumentation AllocToken.cpp, llvm/test/Instrumentation/AllocToken hot-cold-new.ll

rebase

Created using spr 1.3.8-beta.1
DeltaFile
+25-0llvm/test/LTO/X86/alloc-token-hot-cold-new.ll
+12-12llvm/lib/Transforms/Instrumentation/AllocToken.cpp
+20-0llvm/test/Instrumentation/AllocToken/hot-cold-new.ll
+57-123 files

LLVM/project 25ba298llvm/lib/Transforms/Instrumentation AllocToken.cpp, llvm/test/Instrumentation/AllocToken hot-cold-new.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+25-0llvm/test/LTO/X86/alloc-token-hot-cold-new.ll
+12-12llvm/lib/Transforms/Instrumentation/AllocToken.cpp
+20-0llvm/test/Instrumentation/AllocToken/hot-cold-new.ll
+57-123 files

LLVM/project bcd5787llvm/lib/Transforms/Instrumentation AllocToken.cpp, llvm/test/Instrumentation/AllocToken hot-cold-new.ll

simplify copts, add extra tests

Created using spr 1.3.8-beta.1
DeltaFile
+25-0llvm/test/LTO/X86/alloc-token-hot-cold-new.ll
+12-12llvm/lib/Transforms/Instrumentation/AllocToken.cpp
+20-0llvm/test/Instrumentation/AllocToken/hot-cold-new.ll
+57-123 files

LLVM/project fb94261libc/cmake/modules LLVMLibCArchitectures.cmake, libc/include/sys syscall.h.def

[libc][darwin] add syscall numbers from macos sdk (#166354)

This PR adds support to include syscall.h from MacOS sdk by explicitly including the path to the sdk via `xcrun`.
DeltaFile
+31-0libc/cmake/modules/LLVMLibCArchitectures.cmake
+2-1libc/include/sys/syscall.h.def
+33-12 files