[llvm][utils][release] Remove mention of sub-project source archives (#176348)
These are no longer provided as of llvm 22:
https://discourse.llvm.org/t/llvm-22-1-0-rc1-released/89479
> Please note: since the last release the subproject tarballs have been
> removed and are no longer provided. See RFC: Do "something" with the
> subproject tarballs in the release page for more details.
There are now only llvm-project and llvm-test-suite archives.
[AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (WIP)
Change si-peephole-sdwa to eliminate V_PACK_B32_F16_e64 instructions
by changing the second operand to write to the upper word of the
destination directly.
[AMDGPU] Enable ISD::{FSIN,FCOS} custom lowering to work on v2f16
Currently ISD::FSIN and ISD::FCOS of type MVT::v2f16 are legalized by
first expanding and then using a custom lowering on the resulting f16
instructions. This ordering prevents using packed math variants of the
instructions introduced by the legalization (e.g. the multiplication),
if available, and makes it difficult to eliminate the packing of the
results by using SDWA form; previous attempts to deal with the latter
situation in the si-peephole-sdwa pass were unwieldly since it was
necessary to reconstruct the association between the source and target
vectors.
Change the legalization action for ISD::FSIN and ISD::FCOS of type
MTF::v2f16 to Custom and change the custom intrinsic lowering to deal
with the v2f16 for the intrinsics introduced in this way.
[AMDGPU] Fix typo in `LowerVGPREncoding` to allow it to hoist past `waitcnt` instructions (#176355)
Fixes a typo which prevented `set_vgpr_msb` to be hoisted past `waitcnt`
instructions.
GlobalISel: Use LibcallLoweringInfo analysis in legalizer (#170328)
This is mostly boilerplate to move various freestanding utility
functions into LegalizerHelper. LibcallLoweringInfo is currently
optional, mostly because threading it through assorted other
uses of LegalizerHelper is more difficult.
I had a lot of trouble getting this to work in the legacy pass
manager with setRequiresCodeGenSCCOrder, and am not happy with the
result. A sub-pass manager is introduced and this is invalidated,
so we're re-computing this unnecessarily.
[mlir][Python] remove stray nb::cast (#176299)
In https://github.com/llvm/llvm-project/pull/155114 we removed
`liveOperations` but forgot this line which was being used to invalidate
operations under a transform root, which currently isn't being used for
anything. So remove.
FYI this led to a subtle double free bug after
https://github.com/llvm/llvm-project/pull/175405:
```python
@test_in_context
def check_builtin():
module = builtin_d.ModuleOp()
with module.context, ir.Location.unknown():
transform_module = builtin_d.Module.create()
transform_module.operation.attributes["transform.with_named_sequence"] = (
ir.UnitAttr.get()
)
[34 lines not shown]
InstCombine: Improve single-use fneg(fabs(x)) SimplifyDemandedFPClass handling
Match the multi-use case's logic for understanding no-nan/no-inf context
and nsz.
InstCombine: Improve single use fabs SimplifyDemandedFPClass handling
SimplifyDemandedFPClass's handling of fabs recently became smarter in
the multiple use case than single. Unify these so the single use case
is equally as smart. This includes propagating ninf / nnan context into
the instruction, and accounting for nsz if the only bit difference is
for zero.
InstCombine: Handle multiple use fneg(fabs(x)) in SimplifyDemandedFPClass (#176149)
This ends up being smarter than the single use case, so these should
be merged at some point.