LLVM/project b8dcc02clang/include/clang/AST TemplateName.h, clang/lib/AST TemplateName.cpp

[Clang][C++29] Template pack indexing (#218738)

This partially implement p3670r4
(https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2026/p3670r4.pdf) I
haven't implemented mangling yet, it part to limit the scope of this
change which is somewhat larger than I thought it would be.

This introduces a new uncommon template name storage kind that stores a
pattern and the expanded parameter, like we do for types and
expressions.

The rest is fairly mechanical.

The feature is backported to C++98 (for type template parameters).
Funnilly, the backport of pack indexing of types was never actually
tested in C++98 mode and did not work.
It should be fixed by this PR but I'll write tests for it as a follow
up.


    [8 lines not shown]
DeltaFile
+456-0clang/test/SemaCXX/cxx2d-pack-indexing-template.cpp
+139-20clang/lib/Sema/TreeTransform.h
+156-3clang/lib/AST/TemplateName.cpp
+99-1clang/include/clang/AST/TemplateName.h
+82-0clang/lib/Parse/ParseDeclCXX.cpp
+43-32clang/lib/Parse/ParseExprCXX.cpp
+975-5658 files not shown
+1,896-21464 files

LLVM/project 2cba3adllvm/lib/Target/AMDGPU SIRegisterInfo.cpp AMDGPUInstructionSelector.cpp, llvm/lib/Target/RISCV RISCVRegisterInfo.cpp

GlobalISel: Replace MachineOperand based register constraint API (#219283)
DeltaFile
+38-39llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+6-6llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
+4-5llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+4-5llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-6llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
+3-2llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h
+57-635 files not shown
+66-7211 files

LLVM/project d34be0fclang-tools-extra/clang-tidy/readability IdentifierNamingCheck.cpp, clang-tools-extra/docs ReleaseNotes.md

[Clang-Tidy] Support lambda's init captures in `readability-identifier-naming`. (#214353)

Add an ability to declare a custom rules for lambda's init-captures. It
recently came up in some of the discussions and people find it useful to
to have rules for those types of identifiers.

Co-authored-by: Dmitrii Kuragin <dkuragin at adobe.com>
DeltaFile
+60-0clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
+45-0clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming-lambda-capture.cpp
+4-0clang-tools-extra/docs/ReleaseNotes.md
+4-0clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
+113-04 files

LLVM/project ec53c6eclang/include/clang/Options Options.td, clang/test/Driver linker-opts.c

[clang] Fix --entry command line option (#69114)

Fixes: #68355
DeltaFile
+6-0clang/test/Driver/linker-opts.c
+3-2clang/include/clang/Options/Options.td
+9-22 files

LLVM/project 8712ee6llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AArch64 vec3-ops.ll load_store.ll

[AArch64] Improve load / store costs for non-power2 vector types. (#214695)

This adjusts the existing non-power-2 load/store cost routines to handle
larger than 128bit vectors, by splitting out the initial 128bit chunks
and costing the remainder with loads + inserts.

Fixes #214475
DeltaFile
+172-172llvm/test/Analysis/CostModel/AArch64/load_store.ll
+32-32llvm/test/Analysis/CostModel/AArch64/vec3-ops.ll
+17-16llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+30-3llvm/test/Transforms/SLPVectorizer/AArch64/masked-loads-side-effects-after-vec.ll
+14-0llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll
+265-2235 files

LLVM/project c3a5d37llvm/lib/Transforms/InstCombine InstCombineAndOrXor.cpp, llvm/test/Transforms/InstCombine and-xor-or.ll

[InstCombine] Preserve no-wrap flags in BitwiseOp(trunc(A), trunc(B)) fold. (#219567)

proof: https://alive2.llvm.org/ce/z/BP5VSQ
DeltaFile
+195-0llvm/test/Transforms/InstCombine/and-xor-or.ll
+12-1llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+207-12 files

LLVM/project 118efe7clang/lib/Driver/ToolChains OpenBSD.cpp, clang/test/Driver openbsd.c

[Driver][OpenBSD] Pass -pie for static PIE links (#216907)

OpenBSD uses `rcrt0.o` for static PIE executables. This startup object
references the linker-defined `_DYNAMIC` symbol.

OpenBSD's system linker defaults to PIE, which previously masked the
missing driver flag. An LLD cross-linker built on a non-OpenBSD host
does not share that default. Consequently,
`clang --target=...-openbsd -static` selects `rcrt0.o`, but LLD does not
create `_DYNAMIC`, causing the link to fail.
DeltaFile
+6-2clang/lib/Driver/ToolChains/OpenBSD.cpp
+1-0clang/test/Driver/openbsd.c
+7-22 files

LLVM/project e744b81orc-rt/include/orc-rt/support SimplePackedSerialization.h, orc-rt/include/orc-rt/support/sps SimplePackedSerialization.h

[orc-rt] Group SPS headers under sps/ subdirectories. NFC. (#219614)

The SPS format headers move from support/ to support/sps/, and
SimpleRemoteCA -- whose wire format is SPS, fixed by compatibility with
LLVM's SimpleRemoteEPC -- moves from bedrock/ to bedrock/sps/. Every
file whose contents are SPS-specific now lives under an sps/ directory
in its layer, matching what the sps-ci -> sps rename set up. Tests and
include guards follow.
DeltaFile
+0-826orc-rt/include/orc-rt/support/SimplePackedSerialization.h
+826-0orc-rt/include/orc-rt/support/sps/SimplePackedSerialization.h
+0-441orc-rt/test/unit/support/SimplePackedSerializationTest.cpp
+441-0orc-rt/test/unit/support/sps/SimplePackedSerializationTest.cpp
+0-318orc-rt/test/unit/support/SPSWrapperFunctionTest.cpp
+318-0orc-rt/test/unit/support/sps/SPSWrapperFunctionTest.cpp
+1,585-1,58536 files not shown
+2,775-2,77442 files

LLVM/project b5a2282llvm/include/llvm/ADT SmallPtrSet.h

[ADT] Simplify SmallPtrSetIterator (NFC) (#219087)

This patch simplifies SmallPtrSetIterator by defining it directly
without the type-erased SmallPtrSetIteratorImpl.

In commit cc3fe3c546e0 (#160814), SmallPtrSetIteratorImpl was introduced
to reduce template instantiation bloat.  However, because
SmallPtrSetIteratorImpl is defined entirely in the header and its
trivial iterator loops are aggressively inlined at call sites, the
separate base class adds structural complexity without providing
meaningful code size savings.

Assisted-by: Antigravity
DeltaFile
+34-48llvm/include/llvm/ADT/SmallPtrSet.h
+34-481 files

LLVM/project e714fcellvm/docs/CommandGuide llvm-ar.md llvm-exegesis.md

[docs] Convert CommandGuide docs to Markdown
DeltaFile
+1,610-1,625llvm/docs/CommandGuide/llvm-debuginfo-analyzer.md
+581-604llvm/docs/CommandGuide/FileCheck.md
+524-549llvm/docs/CommandGuide/lit.md
+417-429llvm/docs/CommandGuide/llvm-cov.md
+302-310llvm/docs/CommandGuide/llvm-exegesis.md
+269-275llvm/docs/CommandGuide/llvm-ar.md
+3,703-3,79225 files not shown
+5,638-5,82731 files

LLVM/project d0a2bd3llvm/docs/CommandGuide lit.rst lit.md

[docs] Rename CommandGuide docs to Markdown
DeltaFile
+0-2,234llvm/docs/CommandGuide/llvm-debuginfo-analyzer.rst
+2,234-0llvm/docs/CommandGuide/llvm-debuginfo-analyzer.md
+0-961llvm/docs/CommandGuide/FileCheck.rst
+961-0llvm/docs/CommandGuide/FileCheck.md
+0-798llvm/docs/CommandGuide/lit.rst
+798-0llvm/docs/CommandGuide/lit.md
+3,993-3,99356 files not shown
+8,796-8,79662 files

LLVM/project 4cbcc02mlir/lib/Dialect/XeGPU/Transforms XeGPUPropagateLayout.cpp XeGPULayoutImpl.cpp, mlir/test/Dialect/XeGPU resolve-layout-conflicts.mlir

[mlir][xegpu] Resolve layout conflict on scf.for init operands (#215911)

Extends XeGPU layout conflict resolution to cover values carried across
region boundaries. Previously
`ResolveLayoutConflicts::resolveVectorConsumer` skipped all
region-branch operands, so a mismatch between a loop-carried
value's own layout and the layout its loop position requires was never
reconciled and causing lowering issue.
  
  
  assisted-by-claude

---------

Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
DeltaFile
+80-3mlir/test/Dialect/XeGPU/resolve-layout-conflicts.mlir
+63-0mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
+14-19mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+157-223 files

LLVM/project 2d8d8f4clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVMOpenCLMetadata.cpp, flang/lib/Optimizer/OpenACC/Support FIROpenACCTypeInterfaces.cpp

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+521-370llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
+301-0llvm/test/Transforms/LoopVectorize/VPlan/epilogue-vectorization-printing.ll
+285-0llvm/test/Transforms/LoopVectorize/bounded-load-scalable.ll
+175-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
+83-21flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
+100-0llvm/test/CodeGen/AMDGPU/trans-bf16-omod.ll
+1,465-39147 files not shown
+2,275-67353 files

LLVM/project 48378dellvm/test/Transforms/SLPVectorizer/RISCV splat-gather-trim-combined.ll

[SLP][NFC]Add an extra test for throttled splats, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/219607
DeltaFile
+92-0llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim-combined.ll
+92-01 files

LLVM/project efaaff6clang/test/OpenMP parallel_for_codegen.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.icmp.w32.ll llvm.amdgcn.icmp.w64.ll

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+0-2,905llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
+0-2,456llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
+1,049-1,049clang/test/OpenMP/parallel_for_codegen.cpp
+0-2,074llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
+0-1,719llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
+1,194-0orc-rt/test/unit/bedrock/SessionTest.cpp
+2,243-10,203916 files not shown
+38,163-34,943922 files

LLVM/project ce39ebamlir/test/Integration/GPU/CUDA/TensorCore wmma-matmul-f32.mlir wmma-matmul-f32-bare-ptr.mlir

[mlir][gpu] Drop the explicit sm_70 from the CUDA WMMA integration tests (#219373)

Let the three TensorCore WMMA tests compile for the default chip.

CUDA 13 dropped Volta, so its `ptxas` no longer knows `sm_70`:

  ptxas fatal : Value 'sm_70' is not defined for option 'gpu-name'

which fails all three tests on any machine with a current toolkit,
whatever GPU it has -- the arch is pinned in the RUN line and never
reached the hardware's own.

Nothing here needs the arch pinned. `sm_75` is already the default chip
of `gpu-lower-to-nvvm-pipeline`, of `nvvm-attach-target`, and of
`#nvvm.target`, and it is the oldest arch a current `ptxas` accepts; the
WMMA shapes these tests use are available there. Every other CUDA
integration test that doesn't need a specific arch takes that default,
so take it here too, and these tests follow the one place the minimum
supported arch is written down rather than pinning their own copy of it

    [2 lines not shown]
DeltaFile
+1-1mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32.mlir
+1-1mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f32-bare-ptr.mlir
+1-1mlir/test/Integration/GPU/CUDA/TensorCore/wmma-matmul-f16.mlir
+3-33 files

LLVM/project 9a6c60corc-rt/include/orc-rt/support BitmaskEnum.h Math.h, orc-rt/lib/bedrock ExecutorProcessInfo.cpp

[orc-rt] Replace Math.h in favor of bit.h. (#219390)

Replace isPowerOf2 with has_single_bit, and nextPowerOf2 with bit_width
(plus necessary arithmetic at the call sites, and a guard on the long
from sysconf in detectPageSize, which only excluded -1).

Bitmask enums must now have an unsigned underlying type (STL <bit> APIs
require it, and "bit.h" matches the STL).
DeltaFile
+0-78orc-rt/test/unit/support/MathTest.cpp
+0-35orc-rt/include/orc-rt/support/Math.h
+19-3orc-rt/test/unit/support/BitmaskEnumTest.cpp
+13-3orc-rt/include/orc-rt/support/BitmaskEnum.h
+13-0orc-rt/test/unit/support/bit-test.cpp
+3-3orc-rt/lib/bedrock/ExecutorProcessInfo.cpp
+48-1223 files not shown
+50-1269 files

LLVM/project 5224a6cllvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Extra tests for mask/phi re-use
DeltaFile
+149-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+149-01 files

LLVM/project 078262allvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Share block masks in reconstructSSA for blend masks
DeltaFile
+10-18llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+4-7llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+14-252 files

LLVM/project 6c53d34llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize blend-in-header.ll predicatedinst-loop-invariant.ll

Don't preserve branch-on-constant
DeltaFile
+15-62llvm/test/Transforms/LoopVectorize/constantfolder.ll
+5-25llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
+2-10llvm/test/Transforms/LoopVectorize/blend-in-header.ll
+11-1llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+2-9llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
+3-7llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+38-1141 files not shown
+39-1217 files

LLVM/project ef05287llvm/test/Transforms/LoopVectorize scalarize-masked-call.ll predicator.ll, llvm/test/Transforms/LoopVectorize/RISCV divrem.ll

WIP2
DeltaFile
+303-346llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+100-100llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
+97-97llvm/test/Transforms/LoopVectorize/induction.ll
+64-60llvm/test/Transforms/LoopVectorize/predicator.ll
+56-65llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
+23-23llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
+643-69116 files not shown
+835-84922 files

LLVM/project ae95181llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll

Fix bug in previous commit
DeltaFile
+80-12llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+26-18llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
+22-19llvm/test/Transforms/LoopVectorize/predicator.ll
+10-5llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+7-6llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+7-6llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
+152-663 files not shown
+167-779 files

LLVM/project c735037llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll constantfolder.ll

WIP
DeltaFile
+336-288llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+66-56llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
+26-27llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+31-16llvm/test/Transforms/LoopVectorize/constantfolder.ll
+18-10llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+17-10llvm/test/Transforms/LoopVectorize/predicator.ll
+494-40714 files not shown
+579-45420 files

LLVM/project 75d3f01llvm/test/Transforms/LoopVectorize constant-fold-commutative-and.ll predicator.ll, llvm/test/Transforms/LoopVectorize/RISCV tail-folding-complex-mask.ll gather-scatter-cost.ll

Do CommonDom mask removal before reconstructSSA run for blend masks
DeltaFile
+23-31llvm/test/Transforms/LoopVectorize/predicator.ll
+12-16llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+8-12llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+8-12llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
+5-10llvm/test/Transforms/LoopVectorize/constant-fold-commutative-and.ll
+5-10llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+61-913 files not shown
+74-1069 files

LLVM/project ee5d9b2llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize induction.ll predicator.ll

WIP preserve move uniform cfg, BROKEN

Masks for blends originated from preserved CFG are `true` which is wrong
with the current algorithm, see blend_masks_triangle_phi in
predicator.ll
DeltaFile
+6-369llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
+126-126llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
+128-83llvm/test/Transforms/LoopVectorize/predicator.ll
+97-97llvm/test/Transforms/LoopVectorize/induction.ll
+76-75llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+84-15llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+517-76526 files not shown
+993-1,09132 files

LLVM/project b9557a3llvm/lib/Transforms/Vectorize VPlanUtils.h VPlanUtils.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

Luke's reconstructSSA (#212209)
DeltaFile
+268-0llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+37-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+9-0llvm/lib/Transforms/Vectorize/VPlanUtils.h
+314-03 files

LLVM/project 8e7bd8cllvm/lib/Transforms/Vectorize VPlan.h VPlanHelpers.h, llvm/test/Transforms/LoopVectorize hoist-predicated-loads-with-predicated-stores.ll

Awful AI-generated hack to deal with bcast/extractelement breaking SSA
DeltaFile
+35-77llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
+33-1llvm/lib/Transforms/Vectorize/VPlan.cpp
+18-12llvm/test/Transforms/LoopVectorize/hoist-predicated-loads-with-predicated-stores.ll
+14-10llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
+12-0llvm/lib/Transforms/Vectorize/VPlanHelpers.h
+6-0llvm/lib/Transforms/Vectorize/VPlan.h
+118-1002 files not shown
+120-1018 files

LLVM/project b806bf6llvm/lib/Transforms/Vectorize VPlanPredicator.cpp

[AI] Move convertPhisToBlends to post-linearization
DeltaFile
+40-12llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+40-121 files

LLVM/project e70bb60llvm/test/Transforms/LoopVectorize predicator.ll div-exact.ll, llvm/test/Transforms/LoopVectorize/AArch64 predication_costs.ll

WIP Don't adjust mask for preserved uniform edges
DeltaFile
+43-136llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+10-124llvm/test/Transforms/LoopVectorize/div-exact.ll
+33-48llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+7-48llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+13-38llvm/test/Transforms/LoopVectorize/predicator.ll
+34-4llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
+140-39812 files not shown
+179-50718 files

LLVM/project 59f8645llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize uniform-blend.ll predicator.ll

[VPlan][Predicator] Preserve some uniform control flow

Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack. Does **NOT** improve predication/masking yet, so
applicability is artificially narrowed, only some uniform branches are
preserved. In particular, the following is left for future PRs:

* Block masks still contains now-unnecessary term for the preserved
  uniform branches.
* Mixed blends/phis aren't supported yet. Detecting where they would be
  necessary is as complex as implementing proper support (which would
  need either Luke's `reconstructSSA` or Iterated Dominance Frontier),
  so we also limit it to a trivial/structured CFG where there's only
  single block where those would need to be inserted.

I think even the current version might be enough to start implementing
an alternative to https://github.com/llvm/llvm-project/pull/141900 (see
BOSCC in the paper).
DeltaFile
+81-45llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+104-4llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+45-38llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+49-13llvm/test/Transforms/LoopVectorize/predicator.ll
+32-8llvm/test/Transforms/LoopVectorize/uniform-blend.ll
+18-10llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
+329-11815 files not shown
+442-14921 files