LLVM/project a7c3c2f — compiler-rt/lib/ubsan ubsan_loop_detect.cpp, compiler-rt/test/cfi lit.cfg.py

by Peter Collingbourne on ⎇
Format

Created using spr 1.3.6-beta.1
DeltaFile
+9-3compiler-rt/test/cfi/lit.cfg.py
+3-3compiler-rt/lib/ubsan/ubsan_loop_detect.cpp
+12-62 files

LLVM/project 76bb2a1 — compiler-rt/test/cfi CMakeLists.txt

by Peter Collingbourne on ⎇
Check for x86 in test/cfi/CMakeLists.txt

Created using spr 1.3.6-beta.1
DeltaFile
+1-1compiler-rt/test/cfi/CMakeLists.txt
+1-11 files

LLVM/project 313a200 — llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine load-shufflevector.ll

by Deric C. via GitHub on ⎇
[VectorCombine] Fix the PtrAdd offset in shrinkLoadForShuffles to account for element type size (#179001)

This PR fixes an [issue I pointed out in regards to incorrect GEP
indices](https://github.com/llvm/llvm-project/pull/149093#discussion_r2748266079)
introduced by PR #149093.

Changes:
- Updated the pointer offset calculation in
`VectorCombine::shrinkLoadForShuffles` so that the offset is now
multiplied by the element size (`ElemSize`) when computing the new
pointer for loads
- Updated the GEP indices in
`llvm/test/Transforms/VectorCombine/load-shufflevector.ll` for the
correct byte offsets
DeltaFile
+10-10llvm/test/Transforms/VectorCombine/load-shufflevector.ll
+6-4llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+16-142 files

LLVM/project eb603f3 — clang/docs UsersManual.rst, llvm/docs LangRef.rst

by Peter Collingbourne on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+29-22llvm/lib/Target/X86/X86ISelLowering.cpp
+50-0llvm/test/CodeGen/X86/cond-loop.ll
+48-0llvm/docs/LangRef.rst
+45-0llvm/test/Transforms/LowerTypeTests/cond-loop.ll
+25-0clang/docs/UsersManual.rst
+20-5llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+217-2721 files not shown
+367-2827 files

LLVM/project 2886425 — compiler-rt/lib/ubsan ubsan_loop_detect.cpp, llvm/docs LangRef.rst

by Peter Collingbourne on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+101-0compiler-rt/lib/ubsan/ubsan_loop_detect.cpp
+29-22llvm/lib/Target/X86/X86ISelLowering.cpp
+50-0llvm/test/CodeGen/X86/cond-loop.ll
+48-0llvm/docs/LangRef.rst
+45-0llvm/test/Transforms/LowerTypeTests/cond-loop.ll
+20-5llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+293-2730 files not shown
+554-3836 files

LLVM/project 8065a03 — clang/lib/Sema SemaHLSL.cpp, clang/test/AST/HLSL matrix-general-initializer.hlsl matrix-constructors.hlsl

by Farzon Lotfi via GitHub on ⎇
[HLSL] Make  Matrix types in  `buildInitializerListImpl` index in row major order for initializer lists. (#178931)

fixes #178930

- changes the loop indexing order
- updates the associated tests
DeltaFile
+32-32clang/test/AST/HLSL/matrix-general-initializer.hlsl
+3-2clang/test/AST/HLSL/matrix-constructors.hlsl
+2-2clang/lib/Sema/SemaHLSL.cpp
+37-363 files

LLVM/project 61c7d9e — llvm/lib/Transforms/Instrumentation MemorySanitizer.cpp, llvm/test/Instrumentation/MemorySanitizer/AArch64 aarch64-matmul.ll

by Thurston Dang via GitHub on ⎇
[msan] Support Arm NEON usdot (#178982)

Handle tariff-free dot-product using the existing
handleVectorDotProductIntrinsic() instead of with the default handler.
DeltaFile
+191-178llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
+3-2llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+194-1802 files

LLVM/project d6b4aea — lldb/packages/Python/lldbsuite/test/make Makefile.rules, lldb/test/API/lang/cpp/thread_local TestThreadLocal.py

by Igor Kudrin on ⎇
Restore unintentionally changed files

This restores files that were unintentionally added to commit
21a74f527839b5b8dd882e62a25093d980c79078, 'Revert "[lldb] Add FP
conversion instructions to IR interpreter (#175292)"'
DeltaFile
+1-1lldb/test/API/lang/cpp/thread_local/TestThreadLocal.py
+1-1lldb/packages/Python/lldbsuite/test/make/Makefile.rules
+2-22 files

LLVM/project 5c2126f — llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

by Farzon Lotfi via GitHub on ⎇
[SPIRV][NFC] Merge Subgroup Reduce into uniform selector (#178802)

The ReduceMax, ReduceMin, and ReduceSum selectors were all doing the
samething with the exception of which opcode they were using.

This change unifies these implementations and allows pick the opcode via
a helper lambda.
DeltaFile
+42-54llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+42-541 files

LLVM/project b560203 — mlir/test/Dialect/MemRef high-rank-overflow.mlir

by Florian Mayer via GitHub on ⎇
[MLIR] Disable high-rank-overflow with UBSan (#178994)

See discussion in #178395
DeltaFile
+2-0mlir/test/Dialect/MemRef/high-rank-overflow.mlir
+2-01 files

LLVM/project ef720ac — llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

by vporpo via GitHub on ⎇
[AMDGPU][SIInsertWaitcnts][NFC] Use loop to set Wait entries (#178764)

Please note that the original code was skipping STORE_CNT but this one
is not.
DeltaFile
+7-26llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+7-261 files

LLVM/project 59f8e75 — clang/lib/Driver/ToolChains Darwin.cpp

by Ian Anderson via GitHub on ⎇
[clang][driver][darwin] Tweak the use after scope fix in Darwin driver toolchain (#178981)

It's ever so slightly cleaner looking and less error prone to make the
SmallVector hold std::string instead of making a local just for the
version string.
DeltaFile
+2-3clang/lib/Driver/ToolChains/Darwin.cpp
+2-31 files

LLVM/project 6a9aed5 — compiler-rt/lib/sanitizer_common sanitizer_posix_libcdep.cpp

by Paul Kirth on ⎇
[compiler-rt][common] Don't try to unmap non-page aligned pointers

When the sanitizer hasn't mapped the alternate signal stack, but the
host program has (like LLVM), the stack's base pointer may not be
aligned, if it were allocated via malloc, and thus wouldn't be safe to
unmap anyway. A solution that doesn't unmap the alternate stack unless
the sanitizer had mapped it in the first place will take more time to
design. For now, we can just avoid calling munmap on pointers without
the correct alignment.
DeltaFile
+2-1compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
+2-11 files

LLVM/project 2f97c47 — flang/lib/Optimizer/OpenACC/Support FIROpenACCOpsInterfaces.cpp, flang/test/Transforms licm.fir

by Slava Zakharin via GitHub on ⎇
[flang,openacc] Fixed canMoveOutOf() for acc.loop. (#178971)

We should check all data operands, and do not exit after the first one.
DeltaFile
+33-0flang/test/Transforms/licm.fir
+5-4flang/lib/Optimizer/OpenACC/Support/FIROpenACCOpsInterfaces.cpp
+38-42 files

LLVM/project a01b91f — flang/include/flang/Parser options.h, flang/lib/Parser parsing.cpp Fortran-parsers.cpp

by Valentin Clement (バレンタイン クレメン) via GitHub on ⎇
[flang] Add support for additional compiler directive sentinel (#178941)

This patch allows to set up additional compiler directive sentinel in
addition to the default `!dir$`. Some user code could use other vendor
specific compiler directive sentinel and this solution allows to add
them to the parser options.
DeltaFile
+14-0flang/test/Parser/compiler-directive-sentinel.f90
+8-0flang/tools/bbc/bbc.cpp
+3-0flang/lib/Parser/parsing.cpp
+1-1flang/lib/Parser/Fortran-parsers.cpp
+1-0flang/include/flang/Parser/options.h
+27-15 files

LLVM/project 78ab5ef — mlir/test/Dialect/MemRef high-rank-overflow.mlir

by Florian Mayer on ⎇
actually xfail

Created using spr 1.3.6
DeltaFile
+1-1mlir/test/Dialect/MemRef/high-rank-overflow.mlir
+1-11 files

LLVM/project 5632c25 — mlir/test/Dialect/MemRef high-rank-overflow.mlir

by Florian Mayer on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.6
DeltaFile
+2-0mlir/test/Dialect/MemRef/high-rank-overflow.mlir
+2-01 files

LLVM/project 629236a — llvm/test/CodeGen/AMDGPU fneg-combines.f16.ll fneg-combines.ll, llvm/test/CodeGen/RISCV fpclamptosat.ll

by NAKAMURA Takumi via GitHub on ⎇
Merge branch 'main' into users/chapuni/mcdc/nest/covmapdesc
DeltaFile
+56,025-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+14,154-5,110llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+850-5,393llvm/test/CodeGen/RISCV/fpclamptosat.ll
+2,230-3,501llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
+2,626-2,303llvm/test/CodeGen/AMDGPU/fneg-combines.ll
+4,716-0llvm/test/MC/AMDGPU/gfx13_asm_sop2.s
+80,601-16,307959 files not shown
+134,810-36,629965 files

LLVM/project 7e48b14 — llvm/lib/CodeGen/SelectionDAG SelectionDAGISel.cpp

by Craig Topper via GitHub on ⎇
[SelectionDAGISel] Avoid unnecessary MatchScope copy. NFC (#178957)

Add the MatchScope to the vector first, then write its fields.
DeltaFile
+1-2llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+1-21 files

LLVM/project 9926b04 — llvm/test/Transforms/VectorCombine/X86 binop-shuffle-mask1-cm.ll

by NAKAMURA Takumi on ⎇
VectorCombine: Mark the test `+asserts` (fixup for #178072)
DeltaFile
+1-0llvm/test/Transforms/VectorCombine/X86/binop-shuffle-mask1-cm.ll
+1-01 files

LLVM/project b847795 — clang/test/ClangScanDeps prune-scanning-modules.m

by Cyndy Ishida via GitHub on ⎇
[ClangScanDeps] Add test that proves pruning happens on scanning pcms (#178733)

The test was adapted from clang/test/Modules/prune.m
DeltaFile
+62-0clang/test/ClangScanDeps/prune-scanning-modules.m
+62-01 files

LLVM/project 49c3c4e — clang/lib/CIR/CodeGen CIRGenModule.cpp

by David Rivera on ⎇
fmt yo
DeltaFile
+1-1clang/lib/CIR/CodeGen/CIRGenModule.cpp
+1-11 files

LLVM/project 4351184 — clang/lib/CIR/CodeGen CIRGenModule.cpp, clang/test/CIR/CodeGen/CUDA filter-decl.cu

by David Rivera on ⎇
address comments
DeltaFile
+32-14clang/test/CIR/CodeGen/CUDA/filter-decl.cu
+2-9clang/lib/CIR/CodeGen/CIRGenModule.cpp
+34-232 files

LLVM/project 96b46fa — lld/MachO SectionPriorities.cpp, lld/test/MachO order-file-cstring.s

by SharonXSharon via GitHub on ⎇
[lld][MachO] Accept hex format for cstring hashes in order file (#178933)

Support both decimal and hexadecimal formats for cstring hashes in
the order file. Hex values must use the 0x prefix (case insensitive).
    
    Examples:
      CSTR;1234567890    (decimal)
      CSTR;0x499602D2    (hex)

Co-authored-by: Sharon Xu <sharonxu at fb.com>
DeltaFile
+4-4lld/test/MachO/order-file-cstring.s
+3-1lld/MachO/SectionPriorities.cpp
+7-52 files

LLVM/project 202f45c — clang/lib/Driver/ToolChains Darwin.cpp

by Paul Kirth via GitHub on ⎇
[clang][Driver] Fix use after scope in darwin driver (#178967)

`Version.getAsString()` returns an `std::string`, and thus the
`StringRef` points to an invalid location when pushed into the
Components vector. This just keeps the temporary alive for the
new string to be generated, to fix the ASAN failure after #176541
DeltaFile
+2-1clang/lib/Driver/ToolChains/Darwin.cpp
+2-11 files

LLVM/project a1993f2 — mlir/include/mlir/Bindings/Python IRCore.h

by Rolf Morel on ⎇
Narrow down crash on Windows CI
DeltaFile
+1-1mlir/include/mlir/Bindings/Python/IRCore.h
+1-11 files

LLVM/project f3d81d4 — llvm/lib/Target/RISCV/AsmParser RISCVAsmParser.cpp, llvm/lib/Target/RISCV/MCTargetDesc RISCVBaseInfo.h

by Craig Topper via GitHub on ⎇
[RISCV] Rename ConstraintMask->RVVConstraintMask. NFC (#178963)

This matches how we refer to it in tablegen.
DeltaFile
+6-6llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+1-1llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+7-72 files

LLVM/project 485eb62 — llvm/lib/Transforms/IPO AttributorAttributes.cpp, llvm/test/Transforms/Attributor nofpclass.ll

by Matt Arsenault via GitHub on ⎇
Attributor: Use anchor scope for SimplifyQuery context (#178958)

This was asserting in computeKnownFPClass when a dominator tree
check happened across functions.

Fixes #178954
DeltaFile
+80-38llvm/test/Transforms/Attributor/nofpclass.ll
+1-1llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+81-392 files

LLVM/project d944d16 — clang/lib/Driver/ToolChains Darwin.cpp

by Paul Kirth on ⎇
[clang][Driver] Fix use after scope in darwin driver

`Version.getAsString()` returns an `std::string`, and thus the
`StringRef` points to an invalid location when pushed into the
Components vector. This just keeps the temporary alive for the
new string to be generated, to fix the ASAN failure after #176541
DeltaFile
+2-1clang/lib/Driver/ToolChains/Darwin.cpp
+2-11 files

LLVM/project 7639d21 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 cls.ll

by Hamza Hassanain via GitHub on ⎇
[AArch64] Convert CLS intrinsics to use ISD::CTLS (#178885)

This patch converts AArch64 CLS intrinsics (aarch64_neon_cls) to use the
generic ISD::CTLS node.

- aarch64_neon_cls: Lowered to ISD::CTLS, pattern-matched to CLS
instruction
- Set ISD::CTLS as Legal for NEON vector types (v8i8, v16i8, v4i16,
v8i16, v2i32, v4i32)

Also adds generic CTLS expansion support:
- ExpandIntRes_CTLS in LegalizeIntegerTypes for i64->i32 type expansion
- expandCTLS in TargetLowering for targets without native CLS
instruction

Part of: https://github.com/llvm/llvm-project/issues/174337
DeltaFile
+14-0llvm/test/CodeGen/AArch64/cls.ll
+9-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1-1llvm/lib/Target/AArch64/AArch64InstrInfo.td
+24-13 files