LLVM/project 579840amlir/test/Integration/Dialect/EmitC regalloc-eviction-test-model-tosa.mlir inline-oz-test-model-tosa.mlir

Align TOSA->EmitC integration tests with MLGO config (#216787)

Adapt existing TOSA->EmitC integration tests to use exactly the same
pipeline as the MLGO CMake config proposes in
https://github.com/llvm/llvm-project/pull/212650.

The first `RUN` directive tests the TOSA->EmitC lowering.
The second tests class-based C++ code generation for MLGO. For this, the
pipeline needs extra passes helping transform the model function into a
class:
- `promote-buffers-to-stack`: heap-based -> stack-based allocations
- `wrap-emitc-func-in-class`: standalone `emitc.func` -> `emitc.class`
- `mlgo-add-reflection-map`: adds a reflection map + helper method to
`emitc.class` for runtime field lookup.
Therefore, we're now emitting a `.cpp` file instead of `.c`.

The missing `buffer-deallocation-pipeline` lead to a skipped
canonicalization that created `arith` ops, which the current pipeline
couldn't actually lower, due to recent changes in the `arith-expand`

    [2 lines not shown]
DeltaFile
+41-5mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
+32-6mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
+73-112 files

LLVM/project 76bcfd7utils/bazel/llvm-project-overlay/libc BUILD.bazel, utils/bazel/llvm-project-overlay/libc/test/UnitTest BUILD.bazel

[Bazel] Fixes e84b8cf (#217352)

This fixes e84b8cf804ea41c7ed1c1c64c519b6355abafa31 (#211867).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=e84b8cf804ea41c7ed1c1c64c519b6355abafa31

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+2-02 files

LLVM/project 6b5312bclang/docs ReleaseNotes.md, clang/lib/Sema SemaType.cpp

[clang][Sema] Fixed a crash when an `address_space` attribute with a dependent argument was written after the declarator-id (#216348)

Fixes #196982
Fixes #111463 

When filling in source locations for a dependent `address_space` type,
we only looked at the declarator chunk being visited. But an attribute
written after the declarator-id appertains to the declared entity, so it
never lands on a chunk — it gets applied to the outermost type instead.
The search came up empty and we hit the `llvm_unreachable`. Nothing to
do with the malformed code in the bug report, by the way: plain template
`<int AS> void f() { void *p [[clang::address_space(AS)]]; }` crashes
too.

The lookup now searches every attribute list of the declarator (chunk,
declarator, decl-spec, declaration), passed as an `ArrayRef` by the
caller, so the attribute is always findable and the original
`llvm_unreachable` stays. Attributes that are invalid or malformed are
skipped, since they never produced a type. This matters when a malformed

    [3 lines not shown]
DeltaFile
+28-0clang/test/SemaTemplate/address_space-dependent.cpp
+16-6clang/lib/Sema/SemaType.cpp
+4-0clang/docs/ReleaseNotes.md
+48-63 files

LLVM/project 4db2d38llvm/lib/Target/AMDGPU GCNSubtarget.h GCNSubtarget.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-max-mii.ll swp-amdgpu-pipeline-regpressure-retry.mir

[AMDGPU] Configure the software pipeliner policy

Set the pipeliner policy in overridePipelinerPolicy(): raise the maximum MII
and opt into the generic register-pressure detector.

MFMA latencies push the MII of otherwise pipelineable loops past the generic
limit of 27, so AMDGPU raises it to 256, which covers the II distributions
observed across Composable Kernels and Triton workloads on gfx950. Removing
the limit entirely pipelines no additional loops on those workloads and costs
around 23% more compile time, so the bound stays finite.

Enable the generic register-pressure detector so schedules exceeding the
target-provided pressure-set limits are rejected and retried at a higher II.
DeltaFile
+181-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-regpressure-retry.mir
+5-5llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-max-mii.ll
+9-0llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+2-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+197-54 files

LLVM/project fc1f1b8llvm/include/llvm/CodeGen TargetSubtargetInfo.h MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Let targets configure the maximum MII

The pipeliner rejects a loop whose minimum initiation interval exceeds
-pipeliner-max-mii. Its default of 27 suits targets with short instruction
latencies, but is too small for others: on AMDGPU a couple of MFMA
instructions already push the MII past it, so the loop never pipelines.

Move the limit into a MachinePipelinerPolicy that targets customize by
implementing TargetSubtargetInfo::overridePipelinerPolicy(). The generic
default is unchanged and an explicit -pipeliner-max-mii still wins over the
target's choice, so no target changes behavior here. Exercised by the AMDGPU
adoption in a following commit.
DeltaFile
+12-3llvm/lib/CodeGen/MachinePipeliner.cpp
+14-0llvm/include/llvm/CodeGen/MachinePipeliner.h
+4-0llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+30-33 files

LLVM/project 597e57cllvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-unpipeline-compare.mir swp-amdgpu-pipeline-loop-carried-mem.mir

[AMDGPU] Add MachinePipeliner support for AMDGPU

Implement the target hooks to enable MachinePipeliner for AMDGPU. The
pass is off by default and can be enabled with -amdgpu-enable-pipeliner
at -O2 and above.

Only uniform, single-basic-block counted loops with a scalar (SCC)
back-edge are pipelined; loops with a divergent (VCC/EXEC) back-edge, or
containing calls or inline asm, are rejected. Code is generated by the
default modulo schedule expander (DFA, window scheduler, and MVE
expansion are disabled for AMDGPU).

Validated on gfx942 and gfx950 with Composable Kernel and Triton workloads.
DeltaFile
+177-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-minimal.ll
+134-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
+78-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+71-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
+58-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
+48-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-unpipeline-compare.mir
+566-014 files not shown
+952-020 files

LLVM/project 45e338dllvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Let targets enable the register-pressure detector

The generic MachinePipeliner register-pressure detector, added in #74807,
was only reachable through the global -pipeliner-register-pressure option.

Add MachinePipelinerPolicy::ShouldLimitRegPressure so targets can enable the
detector in TargetSubtargetInfo::overridePipelinerPolicy. An explicit command-
line option continues to override the target policy.

The policy defaults to false, preserving existing behavior for other targets.
It is exercised by the AMDGPU adoption in the following commit.
DeltaFile
+6-4llvm/lib/CodeGen/MachinePipeliner.cpp
+4-0llvm/include/llvm/CodeGen/MachinePipeliner.h
+10-42 files

LLVM/project 40f48bfmlir/include/mlir/Conversion/OpenACCToLLVM ACCToLLVM.h, mlir/lib/Conversion/OpenACCToLLVM CMakeLists.txt ACCToLLVM.cpp

[mlir][acc] Introduce acc atomic to llvm patterns (#217142)

Add support for lowering the OpenACC atomic operations - atomic.read,
atomic.write, atomic.update, and atomic.capture - to LLVM dialect.

Co-authored-by: Matsu <kmatsumura at nvidia.com>
DeltaFile
+783-0mlir/lib/Conversion/OpenACCToLLVM/ACCAtomicPatterns.cpp
+211-0mlir/test/Conversion/OpenACCToLLVM/atomic.mlir
+22-0mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
+7-0mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
+5-0mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
+1,028-05 files

LLVM/project 1d7d16bllvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmax.ll buffer-fat-pointer-atomicrmw-fadd.ll

[CodeGen] Avoid register pressure limit underflow (#216372)

RegisterClassInfo::computePSetLimit() subtracts an estimated
reserved-register weight from the target-provided pressure-set limit. If
the weight exceeds the limit, the unsigned subtraction wraps to a very
large value, effectively disabling register-pressure checks. An equal
weight produces zero, which is the uncomputed-limit sentinel.
    
MachineSink and MachineLICM exposed this underflow after switching to
RegisterClassInfo limits.
    
Preserve the target-provided nonzero limit when the approximate
adjustment would exhaust it. Non-underflowing adjustments remain
unchanged. Add an AMDGPU regression test and update the affected checks.
DeltaFile
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,252-3,311llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,533-2,603llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+20,441-20,46853 files not shown
+46,226-47,04259 files

LLVM/project d92b3ddllvm/lib/CodeGen/GlobalISel Localizer.cpp

fix

Created using spr 1.3.7
DeltaFile
+1-0llvm/lib/CodeGen/GlobalISel/Localizer.cpp
+1-01 files

LLVM/project f2d08fallvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h

[LV][NFC] Fix up else-after-return introduced by PR #216981 (#217337)
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+1-11 files

LLVM/project e84b8cflibc/src/__support/wchar character_converter.h, libc/test/UnitTest LibcTest.cpp

[libc] Add support for wchar_t in StringConverter. (#211867)

This takes care of a TODO in LibcTest.cpp from #203355, allowing
`wstring_view` to be printed as UTF-8 in tests. It also enables updates
to __support/printf_core/ for implementing `swprintf`.

The change to `StringConverter` is enabled by extending the
`CharacterConverter` API when `wchar_t` is detected as being UTF-32.

The `StringConverter` unit test is updated so it no longer compiles to a
no-op on Windows.

Note: this change does not respect `-fwide-exec-charset`, which Clang still
does not support but GCC does. This is the existing libc behavior.
DeltaFile
+134-113libc/test/src/__support/wchar/string_converter_test.cpp
+44-16libc/test/src/__support/wchar/utf8_to_32_test.cpp
+33-11libc/test/src/__support/wchar/utf32_to_8_test.cpp
+21-15libc/test/src/__support/wchar/CMakeLists.txt
+30-0libc/src/__support/wchar/character_converter.h
+19-2libc/test/UnitTest/LibcTest.cpp
+281-1573 files not shown
+296-1579 files

LLVM/project 73a20f5llvm/include/llvm/CodeGen/GlobalISel Localizer.h

forward decls

Created using spr 1.3.7
DeltaFile
+0-5llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+0-51 files

LLVM/project 804d645llvm/include/llvm/CodeGen/GlobalISel Localizer.h LoadStoreOpt.h, llvm/lib/CodeGen/GlobalISel Localizer.cpp LoadStoreOpt.cpp

feedback

Created using spr 1.3.7
DeltaFile
+0-93llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+91-0llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+40-0llvm/lib/CodeGen/GlobalISel/Localizer.cpp
+0-36llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+131-1294 files

LLVM/project 4c3c9c2llvm/include/llvm/CodeGen/GlobalISel LoadStoreOpt.h, llvm/lib/CodeGen/GlobalISel LoadStoreOpt.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-93llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+91-0llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+91-932 files

LLVM/project 379b518llvm/include/llvm/CodeGen/GlobalISel LoadStoreOpt.h, llvm/lib/CodeGen/GlobalISel LoadStoreOpt.cpp

feedback

Created using spr 1.3.7
DeltaFile
+0-93llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+91-0llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+91-932 files

LLVM/project 297fe1ecompiler-rt/test/asan/TestCases invalid-pointer-pairs-vector-extract.cpp, llvm/lib/Transforms/Instrumentation AddressSanitizer.cpp

[ASan] Correctly handle vectorized pointer sub/cmp for `invalid-pointer-pair` (#213546)

Before this PR, asan will treat vector operands just like pointer and
pass it to `__sanitizer_ptr_sub/__sanitizer_ptr_cmp(i64, i64)`,
which leads to assertion failure because it doesn't matches the needed
parameter type.

This PR extracts vector's elements and creates runtime call for each
pair of them.

Closes #212453 .
DeltaFile
+28-7llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+30-0llvm/test/Instrumentation/AddressSanitizer/asan-detect-invalid-pointer-pair.ll
+0-6compiler-rt/test/asan/TestCases/invalid-pointer-pairs-vector-extract.cpp
+58-133 files

LLVM/project d2adf78mlir/lib/Dialect/LLVMIR/IR NVVMDialect.cpp, mlir/test/Target/LLVMIR/nvvm tcgen05-mma-tensor-ti16.mlir tcgen05-mma-ws-shared-ti16.mlir

[MLIR][NVVM] Support kind::ti16 for tcgen05.mma Ops (#216588)

This change adds `kind::ti16` support for tcgen05.mma MLIR Ops.
DeltaFile
+30-4mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+21-0mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-shared-ti16.mlir
+21-0mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-tensor-ti16.mlir
+21-0mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-tensor-ti16.mlir
+21-0mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-ws-sp-shared-ti16.mlir
+17-0mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor-ti16.mlir
+131-46 files not shown
+202-1112 files

LLVM/project 2075bfeflang/lib/Utils CMakeLists.txt

[flang][NFC] Fix BUILD_SHARED_LIBS build of FortranUtils (#217312)

[5ee2778b6072](https://github.com/llvm/llvm-project/commit/5ee2778b60725219579eb6d439e6b250c2ff1f85)
("[flang][OpenMP] Reuse canonical default mapper names for nested
mappings", [#212251](https://github.com/llvm/llvm-project/pull/212251))
added calls to `fir::NameUniquer::deconstruct()` and
`fir::NameUniquer::doGenerated()` in `flang/lib/Utils/OpenMP.cpp`, but
did not add the library defining them, `FIRSupport`, to `FortranUtils`'
`LINK_LIBS`.

Assisted-by: AI
DeltaFile
+1-0flang/lib/Utils/CMakeLists.txt
+1-01 files

LLVM/project 9858b9bllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 setcc-logic.ll

[DAG] Fold pow2 masked bittest comparisons (#216302)

Implements logic to merge bittest comparisons in `foldLogicOfSetCCs` .

Equivalent to the fold done in `foldLogOpOfMaskedICmps`.

Fold is valid when `LL1` and `RL1` are powers of 2.
```cpp
(and (setne (and X, LL1), 0), (setne (and X, RL1), 0)) --> (seteq (and X, (LL1|RL1)), (LL1|RL1))
(or  (seteq (and X, LL1), 0), (seteq (and X, RL1), 0)) --> (setne (and X, (LL1|RL1)), (LL1|RL1))
```

Fixes #214772 .
DeltaFile
+133-0llvm/test/CodeGen/X86/setcc-logic.ll
+20-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+153-02 files

LLVM/project c6a5dd5llvm/lib/Transforms/Vectorize VPlanTransforms.cpp LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/VPlan vplan-print-before-after-all.ll

[VPlan] Split handleEarlyExits into countable and uncountable passes. NFC (#206017)

This allows us to remove UncountableExitStyle::NoUncountableExit, and
isolate it to just the uncountable exit path. This should make it easier
to choose a style from within VPlan alone later on.

This also allows us to plug UncountableExitStyle into a TTI hook or CLI
flag eventually, as I don't think we want to expose NoUncountableExit.
DeltaFile
+6-29llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+16-13llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+13-10llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+10-7llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
+12-2llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-1llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
+58-621 files not shown
+58-637 files

LLVM/project a2a9b2alibc/src/__support/math fminf128.h fmaxf128.h, libc/test/shared shared_math_test.cpp shared_math_constexpr_test.cpp

[libc] Modify `fmaxf128` and `fminf128` to use emulated Float128 type  (#216575)
DeltaFile
+4-7libc/src/__support/math/fminf128.h
+4-7libc/src/__support/math/fmaxf128.h
+4-5libc/test/shared/shared_math_constexpr_test.cpp
+4-4libc/test/shared/shared_math_test.cpp
+6-2utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+6-0utils/bazel/llvm-project-overlay/libc/test/src/math/smoke/BUILD.bazel
+28-2526 files not shown
+92-5932 files

LLVM/project 288fe8allvm/utils/gn/secondary/llvm/lib/CodeGen/GlobalISel BUILD.gn

[gn] Make GlobalISel depend on SelectionDAG (#217335)

This dependency has been present in the CMake build for many years.
Suddenly, a bunch of binaries (e.g. llvm-extract) stopped linking
without it, so add it to the GN build too.
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/CodeGen/GlobalISel/BUILD.gn
+1-01 files

LLVM/project 6719148llvm/utils/gn/secondary/llvm/test BUILD.gn, llvm/utils/gn/secondary/llvm/unittests/Analysis BUILD.gn

[gn build] Port ab547095ead5 (#217332)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/test/BUILD.gn
+2-02 files

LLVM/project 4ea61aellvm/utils/gn/secondary/llvm/unittests/ObjectYAML BUILD.gn

[gn build] Port 61036c3361ce (#217331)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/unittests/ObjectYAML/BUILD.gn
+1-01 files

LLVM/project 202ece6mlir/include/mlir/Dialect/SPIRV/Transforms SPIRVConversion.h, mlir/lib/Conversion/VectorToSPIRV VectorToSPIRV.cpp

[mlir][spirv] Add in-bounds access chain conversion (#216984)

Use spirv.InBoundsAccessChain for static StorageBuffer accesses whose
linearized range fits the declared SPIR-V object.

Keep plain access chains for dynamic layouts and packed sub-16-bit
storage.
DeltaFile
+73-3mlir/lib/Dialect/SPIRV/Transforms/SPIRVConversion.cpp
+17-6mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
+8-8mlir/test/Conversion/ConvertToSPIRV/memref.mlir
+14-0mlir/include/mlir/Dialect/SPIRV/Transforms/SPIRVConversion.h
+6-6mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
+6-6mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
+124-299 files not shown
+149-5415 files

LLVM/project 3cc45b4clang/docs/analyzer checkers.rst

Reword the cfg-lifetime option text.
DeltaFile
+6-4clang/docs/analyzer/checkers.rst
+6-41 files

LLVM/project 2f7fc25llvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize early_exit_combined_exits.ll early_exit_combined_exits_epilogue.ll

Address comments
DeltaFile
+73-0llvm/test/Transforms/LoopVectorize/early_exit_combined_exits_epilogue.ll
+39-0llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
+20-15llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+7-7llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-6llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+2-2llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
+148-302 files not shown
+150-328 files

LLVM/project 98205aaclang/lib/AST ExprConstant.cpp, clang/lib/AST/ByteCode InterpBuiltin.cpp

[X86][Clang] VectorExprEvaluator::VisitCallExpr / InterpretBuiltin - allow SSE/AVX FP2INT conversion intrinsics to be used in constexpr (#214611)

Adds constexpr support for below builtins,
_mm_cvtss_si32
_mm_cvt_ss2si
_mm_cvtss_si64
_mm_cvtps_pi32
_mm_cvt_ps2pi

_mm_cvttss_si32
_mm_cvtt_ss2si
_mm_cvttss_si64
_mm_cvttps_pi32
_mm_cvtt_ps2pi

_mm_cvtps_pi16
_mm_cvtps_pi8

_mm_cvtpd_epi32

    [24 lines not shown]
DeltaFile
+79-0clang/lib/AST/ByteCode/InterpBuiltin.cpp
+67-0clang/lib/AST/ExprConstant.cpp
+21-42clang/lib/Headers/xmmintrin.h
+19-10clang/lib/Headers/emmintrin.h
+12-16clang/lib/Headers/avxintrin.h
+12-0clang/test/CodeGen/X86/sse-builtins.c
+210-685 files not shown
+238-7211 files

LLVM/project 4f0d299clang/docs/analyzer checkers.rst

Add new example for dereference in return statement.
DeltaFile
+10-0clang/docs/analyzer/checkers.rst
+10-01 files