LLVM/project a47be19llvm/test/Transforms/LoopVectorize simplify-reverse-reverse.ll

[VPlan] Add more tests for reverse simplification. NFC (#208255)
DeltaFile
+196-0llvm/test/Transforms/LoopVectorize/simplify-reverse-reverse.ll
+196-01 files

LLVM/project 0a015ccllvm/test/CodeGen/AMDGPU global-atomicrmw-fadd.ll atomicrmw_usub_sat.ll

[AMDGPU] Replace zext pattern from reg_sequence to cvt_u32_u16 (#208045)

Isel pattern putting imm inside reg_sequence create side effects when
register coalescer join these `copy` from imm
```
%1 = v_mov_b16_t16_e64 ...
%2.hi16 = copy %1
%2.lo16 = ....
...
%3.hi16 = copy %1
%3.lo16 = ....
....
%4.hi16 = copy %1
%4.lo16 = ....
```
to
```
%1 = v_mov_b16_t16_e64 ...
%2.hi16 = copy %1

    [9 lines not shown]
DeltaFile
+155-150llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
+124-106llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
+88-78llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+88-78llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+88-78llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+88-78llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+631-56846 files not shown
+1,512-1,37652 files

LLVM/project 940824dllvm/test/Assembler callbr.ll, llvm/test/CodeGen/AMDGPU callbr-intrinsics.ll

move tests
DeltaFile
+0-60llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
+41-0llvm/test/Assembler/callbr.ll
+41-602 files

LLVM/project 0019a7cllvm/include/llvm/Analysis BranchProbabilityInfo.h, llvm/include/llvm/Support BranchProbability.h

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+74-90llvm/lib/Analysis/BranchProbabilityInfo.cpp
+21-7llvm/include/llvm/Support/BranchProbability.h
+0-12llvm/lib/Support/BranchProbability.cpp
+2-3llvm/include/llvm/Analysis/BranchProbabilityInfo.h
+97-1124 files

LLVM/project e2d6498flang/include/flang/Optimizer/Transforms Passes.td, flang/lib/Optimizer/Transforms/CUDA CUFFunctionRewrite.cpp

[flang][cuda] Defer on_device() folding in host copies of OpenACC routines (#208125)

Add a `defer-acc-routines` option to `cuf-function-rewrite`. When set,
`on_device()` is not folded in the host copy of an OpenACC routine (has
`acc.routine_info`, not in a `gpu.module`), because that body is later
cloned into the device routine and would otherwise bake in the host
value (`.false.`). A later run folds each copy in its own context. Calls
already in a `gpu.module` are still folded.
DeltaFile
+63-0flang/test/Fir/CUDA/cuda-function-rewrite.mlir
+22-3flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
+7-0flang/include/flang/Optimizer/Transforms/Passes.td
+92-33 files

LLVM/project 02a7cd5llvm/lib/Target/BPF BPFMIPeephole.cpp

BPF: Remove unnecessary isReg check on phi operand (#208243)

These must be a register. This pass has quite a lot of
defensive code against invalid MIR that should be deleted.
DeltaFile
+0-3llvm/lib/Target/BPF/BPFMIPeephole.cpp
+0-31 files

LLVM/project 9065f7dllvm/include/llvm/ADT FunctionExtras.h

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+70-179llvm/include/llvm/ADT/FunctionExtras.h
+70-1791 files

LLVM/project 33ef532mlir/lib/Dialect/Linalg/Transforms Vectorization.cpp, mlir/test/Dialect/Linalg/vectorization extract.mlir

[mlir][linalg] Fix mask rank for masked contiguous `tensor.extract` (#206207)

### Summary

Note: This fix was made mostly by Claude based on a failure case in
IREE. It addresses issue
https://github.com/llvm/llvm-project/issues/206209

When `vectorizeTensorExtract` lowers a `tensor.extract` recognized as a
*contiguous load*, it builds a `vector.transfer_read` whose permutation
map broadcasts the leading iteration dims and only reads the trailing
`min(dstRank, srcRank)` dims of the source. Until now this read was
returned unmasked and masked later by the generic path, which applies a
**full iteration-space identity mask**. When the source rank is smaller
than the loop nest, that mask is over-ranked relative to the
(rank-reduced) read — e.g. a `vector<1x4xi1>` mask on a read whose
inferred mask type is `vector<4xi1>` — and the op fails verification:

```

    [65 lines not shown]
DeltaFile
+49-0mlir/test/Dialect/Linalg/vectorization/extract.mlir
+14-2mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+63-22 files

LLVM/project df6b80dclang/lib/CodeGen CGOpenMPRuntimeGPU.cpp, offload/plugins-nextgen/common/include PluginInterface.h

[offload][OpenMP] Improve cross-team reduction grid selection

The default cross-team reduction algorithm benefits from larger and
fewer teams. Implement that by using 2 x the default number of threads
and 1/2 x the default number of teams for reduction kernels.  This
doesn't change the default total number of threads, it just
redistributes them.

This is a first, rather simple heuristic, derived from (a subset of)
what AOMP does.
The performance benefits I observed for the reduction tests in
https://github.com/ro-i/xteam-test on a gfx942
(c71339705091500f731e2a39f247d2660bacbdce) are up to a few percent, with
no regressions.

Claude assisted with this patch.
DeltaFile
+22-4offload/plugins-nextgen/common/src/PluginInterface.cpp
+22-0clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+5-0offload/plugins-nextgen/common/include/PluginInterface.h
+49-43 files

LLVM/project 9df4aedflang/lib/Optimizer/Transforms StackArrays.cpp, flang/test/Transforms stack-arrays.fir

[flang] add some missing stackrestore with -fstack-arrays (#208161)

In the StackArray pass that moves array temporaries from the heap to the
stack under -fstack-arrays, when visiting FreeMemOp to insert
stackrestore, the code was not unwrapping converts as done in other
parts of the code leading to the allocation conversion and stacksave
insertion to happen without the emission of the stackrestore.

Reuse the same utility as in the rest of the pass to get consistent
behavior and fix the memory leak.
DeltaFile
+30-0flang/test/Transforms/stack-arrays.fir
+5-11flang/lib/Optimizer/Transforms/StackArrays.cpp
+35-112 files

LLVM/project b634fffllvm/lib/Target/AMDGPU AMDGPUCombinerHelper.cpp AMDGPUCombine.td, llvm/test/CodeGen/AMDGPU fptrunc.ll

[AMDGPU] SDAG and GISel support for folding fabs into fp_round source modifiers (#204861)
DeltaFile
+248-544llvm/test/CodeGen/AMDGPU/fptrunc.ll
+23-0llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.cpp
+12-2llvm/lib/Target/AMDGPU/AMDGPUCombine.td
+10-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+3-0llvm/lib/Target/AMDGPU/AMDGPUCombinerHelper.h
+296-5465 files

LLVM/project b4503acllvm/lib/Transforms/Scalar StructurizeCFG.cpp, llvm/test/CodeGen/AMDGPU infinite-loop.ll si-unify-exit-multiple-unreachables.ll

fix tests after rebase; improve unreachable testing
DeltaFile
+124-40llvm/test/CodeGen/AMDGPU/infinite-loop.ll
+110-38llvm/test/CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
+62-31llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
+9-5llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
+305-1144 files

LLVM/project c9e2c30clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 v8.2a-fp16-intrinsics.c

[CIR][AArc64] Add lowering for fp16 intrinsics (step + rounding) (#207511)

This PR adds lowering for the following intrinsic groups:
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-reciprocal-step

It also adds FP16 tests for these intrinsics (implemented in #195021
without tests):
* https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#markdown-toc-rounding-1

It also moves the corresponding tests from:

* clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c

to:
* clang/test/CodeGen/AArch64/neon/fullfp16.c

The lowering follows the existing implementation in
CodeGen/TargetBuiltins/ARM.cpp.
DeltaFile
+86-0clang/test/CodeGen/AArch64/neon/fullfp16.c
+0-56clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
+10-3clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+96-593 files

LLVM/project b49d10fclang/test/CodeGen/AArch64/neon subtraction.c

[CIR][test] Use global instcombine RUN line in AArch64 neon subtracti… (#207894)

Related to https://github.com/llvm/llvm-project/issues/185382

Follow-up to https://github.com/llvm/llvm-project/pull/207115

Include `instcombine` into the global LLVM RUN line and remove the
separate `LLVM-IC` prefix that only covered the narrowing-subtraction
tests in `clang/test/CodeGen/AArch64/neon/subtraction.c`.

Update LLVM CHECK to match the `instcombine` output: bitcast checks are
dropped, the inferred `nsw` flags are added on the widening subs, and
unused shuffle operands are canonicalized to `poison`.
DeltaFile
+236-287clang/test/CodeGen/AArch64/neon/subtraction.c
+236-2871 files

LLVM/project 2fc4cd3llvm/lib/Target/BPF BPFMIPeephole.cpp, llvm/test/CodeGen/BPF mov32-64-subreg-source.mir

BPF: Fix misfolding subregisters

This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.

The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
DeltaFile
+43-0llvm/test/CodeGen/BPF/mov32-64-subreg-source.mir
+7-4llvm/lib/Target/BPF/BPFMIPeephole.cpp
+50-42 files

LLVM/project fb26065llvm/lib/Transforms/AggressiveInstCombine AggressiveInstCombine.cpp

[AggressiveInstCombine] Factor out the common part of tryToRecognizeTableBasedCttz and tryToRecognizeTableBasedLog2. NFC (#208123)

They both start with the same GEP+load matching.

Assisted-by: Claude
DeltaFile
+55-52llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+55-521 files

LLVM/project 411beacllvm/lib/Target/BPF BPFMIPeephole.cpp

BPF: Remove unnecessary isReg check on phi operand

These must be a register. This pass has quite a lot of
defensive code against invalid MIR that should be deleted.
DeltaFile
+0-3llvm/lib/Target/BPF/BPFMIPeephole.cpp
+0-31 files

LLVM/project 92f0214clang/include/clang/Serialization ASTReader.h ModuleFile.h, clang/lib/Serialization ASTReader.cpp

[clang][Serialization] Deduplicate loaded header-unit SLoc ranges

Header units that textually include the same large header used to consume loaded SourceLocation address space independently, even when the serialized file contents were identical. Importing many such header units could therefore run out of the loaded SLoc region long before the translation unit was large in any meaningful source sense.

Use the eager SLoc dedup metadata to share already-loaded file ranges when a later header-unit PCM contains a matching dedupable file entry. The reader now builds a per-module remapping from serialized local offsets to the global SourceManager offsets actually used for the import. Fresh entries are packed into the module's allocation, while duplicate file entries map back to the canonical FileID and offset range from the first loaded PCM.

This changes the module-loading model from a single base-offset translation for every loaded location to a segmented translation for PCMs that participate in deduplication. Modules without dedup metadata keep the existing single-add fast path. The SourceManager loaded-entry table only receives slots for entries that are actually allocated, and serialized local FileIDs are remapped to their canonical loaded FileIDs when a file range is shared.

The result is that repeated textual headers in header units no longer multiply loaded SLoc address-space usage when the flag is enabled, while the default path and PCMs without the new metadata continue to load as before.
DeltaFile
+115-15clang/lib/Serialization/ASTReader.cpp
+38-0clang/include/clang/Serialization/ASTReader.h
+16-0clang/include/clang/Serialization/ModuleFile.h
+169-153 files

LLVM/project 466c1c2clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp, clang/test/CodeGenCUDA builtins-spirv-amdgcn.cu builtins-amdgcn.cu

[AMDGPU] Reimplement icmp and fcmp builtins using ballot (#208231)

Use `llvm.amdgcn.ballot` instead of the deprecated intrinsics
`llvm.amdgcn.icmp` and `llvm.amdgcn.fcmp`.
DeltaFile
+8-16clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+14-8clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+8-6clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
+4-3clang/test/CodeGenCUDA/builtins-amdgcn.cu
+34-334 files

LLVM/project 7a4c856llvm/cmake/modules FindLibXml2.cmake

[cmake] FindLibXml2: fall back to xmlversion.h when pkg-config has no… (#207797)

… version

LLVM's cmake/modules/FindLibXml2.cmake uses PC_LIBXML_VERSION (from
pkg-config) as the VERSION_VAR in find_package_handle_standard_args.
When pkg-config has no libxml-2.0.pc file (e.g. when linking against a
static libxml2-pic.a that ships no .pc file), PC_LIBXML_VERSION is left
empty after pkg_check_modules fails and the >=2.8 version check reports
'Found unsuitable version ""', causing LLDB_ENABLE_LIBXML2 to be set to
FALSE.

Fix: before calling find_package_handle_standard_args, check whether
PC_LIBXML_VERSION is still empty and if so read LIBXML_DOTTED_VERSION
from the xmlversion.h header. This mirrors the version-detection logic
in the system CMake FindLibXml2 module and ensures LLDB is built with
libxml2 support on installations that use a static libxml2 without a .pc
file.
DeltaFile
+17-0llvm/cmake/modules/FindLibXml2.cmake
+17-01 files

LLVM/project e954883lldb/source/Commands CommandObjectTarget.cpp, lldb/test/API/functionalities/scripted_frame_provider/register_command_status TestFrameProviderRegisterCommandStatus.py frame_provider.py

[lldb] Fix assert when `target frame-provider register` succeeds (#208232)

`CommandObjectTargetFrameProviderRegister::DoExecute` never called
`CommandReturnObject::SetStatus()` on its success path.
`CommandObject.cpp` has a `DoExecuteStatusCheck` RAII guard that resets
the result's status to `eReturnStatusInvalid` before `DoExecute` runs,
and asserts on exit that `DoExecute` changed it.
`AppendMessage()`/`AppendMessageWithFormatv()` don't touch status
(unlike AppendError()/SetError(), which call
`SetStatus(eReturnStatusFailed)`), so on the success path the status
stayed eReturnStatusInvalid, tripping the assert.

This went unnoticed because every existing `scripted_frame_provider`
test uses `SBTarget::RegisterScriptedFrameProvider` directly, bypassing
the `target frame-provider register` command entirely. Add a regression
test that exercises the command instead.

Assisted-by: Claude

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+39-0lldb/test/API/functionalities/scripted_frame_provider/register_command_status/TestFrameProviderRegisterCommandStatus.py
+16-0lldb/test/API/functionalities/scripted_frame_provider/register_command_status/frame_provider.py
+7-0lldb/test/API/functionalities/scripted_frame_provider/register_command_status/main.c
+2-0lldb/test/API/functionalities/scripted_frame_provider/register_command_status/Makefile
+1-0lldb/source/Commands/CommandObjectTarget.cpp
+65-05 files

LLVM/project 62cf5declang/lib/Frontend ASTConsumers.cpp

[clang] Use DynamicRecursiveASTVisitor for AST listing (#202661)

Replace `ASTDeclNodeLister`'s CRTP `RecursiveASTVisitor` with
`DynamicRecursiveASTVisitor` while keeping `ASTPrinter` and
`ASTDeclNodeLister` separate. Set `ShouldWalkTypesOfTypeLocs` to false
to
preserve the previous traversal.

In identical arm64 release builds, standalone clang shrinks by 251,840
bytes
(0.215%), stripped clang by 149,488 bytes, and `ASTConsumers.cpp.o` by
153,352
bytes; linked `__TEXT` falls by 147,456 bytes and linked fixups increase
by
1,040.

The `-ast-list` output is byte-identical on the existing clang-check
input and
`ASTConsumers.cpp` (150,918 lines); two reversed-order ten-run timing

    [6 lines not shown]
DeltaFile
+6-5clang/lib/Frontend/ASTConsumers.cpp
+6-51 files

LLVM/project 3e7a2eclibcxx/include/__algorithm pstl.h, libcxx/include/__pstl/backends default.h

[libc++][pstl] Default implementation of parallel std::find_first_of (#206328)

This PR adds a default "one-liner" implementation of parallel
`std::find_first_of` expressed as a call to `__find_if`.

The implementation is based on find_if and any_of.


Part of #99938
DeltaFile
+140-0libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/pstl.find_first_of_pred.pass.cpp
+79-46libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/find_first_of_pred.pass.cpp
+119-0libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/pstl.find_first_of.pass.cpp
+52-29libcxx/test/std/algorithms/alg.nonmodifying/alg.find.first.of/find_first_of.pass.cpp
+48-0libcxx/include/__algorithm/pstl.h
+28-0libcxx/include/__pstl/backends/default.h
+466-756 files not shown
+509-7512 files

LLVM/project 78f5fd3llvm/lib/Target/RISCV RISCVSystemOperands.td

[RISCV] Avoid let statements in RISCVSystemOperands. NFC (#207890)

Add an optional RV32Only operand to SysReg.
Add AltSysRegName and DeprecatedSysRegName wrappers.
DeltaFile
+77-104llvm/lib/Target/RISCV/RISCVSystemOperands.td
+77-1041 files

LLVM/project a52eb98llvm/lib/Target/RISCV RISCVISelLowering.cpp

[RISCV] Fix inconsistent braces in performReverseEVLCombine. NFC (#208097)
DeltaFile
+5-4llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+5-41 files

LLVM/project ea6cf8cllvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/X86 bmi2.ll

[SelectionDAG][X86] Replace OriginalDemandedBits with DemandedBits in SimplifyDemandedBits ISD::PDEP handling. (#208104)

DemandedBits is set to all 1s if the node has multiple uses.

Fixes regression from #204144. The changed test case reverts back to the
output before that change.
DeltaFile
+4-5llvm/test/CodeGen/X86/bmi2.ll
+1-1llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+5-62 files

LLVM/project fcdae16flang/include/flang/Optimizer/Builder OpenACCIntrinsicCall.h IntrinsicCall.h, flang/lib/Lower ConvertCall.cpp

[flang][acc] Emit acc.on_device operation for acc_on_device call

It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
DeltaFile
+51-0flang/lib/Optimizer/Builder/OpenACCIntrinsicCall.cpp
+23-19flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+32-0flang/include/flang/Optimizer/Builder/OpenACCIntrinsicCall.h
+5-15flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
+15-1flang/include/flang/Optimizer/Builder/IntrinsicCall.h
+8-7flang/lib/Lower/ConvertCall.cpp
+134-424 files not shown
+144-4510 files

LLVM/project cf02cbcflang/lib/Optimizer/Builder OpenACCIntrinsicCall.cpp

simplify builder
DeltaFile
+1-4flang/lib/Optimizer/Builder/OpenACCIntrinsicCall.cpp
+1-41 files

LLVM/project 7445979mlir/test/Dialect/OpenACC ops.mlir

test
DeltaFile
+2-2mlir/test/Dialect/OpenACC/ops.mlir
+2-21 files

LLVM/project d55faf2libc/config/linux/riscv entrypoints.txt, libc/src/__support/OSUtil fcntl.h

[libc] Move fcntl implementation into the syscall_wrappers layer (#207878)

linux_syscalls::fcntl called SYS_fcntl unconditionally, breaking the
riscv32 full build where only SYS_fcntl64 exists. The syscall selection
and command translation already lived in internal::fcntl, so move that
implementation into syscall_wrappers/fcntl.h, delete the legacy
OSUtil/fcntl.h and OSUtil/linux/fcntl.cpp, and port the callers (fcntl
entrypoint, file.cpp, dup2.h) to linux_syscalls::fcntl.
DeltaFile
+0-120libc/src/__support/OSUtil/linux/fcntl.cpp
+89-8libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
+0-27libc/src/__support/OSUtil/fcntl.h
+5-10libc/src/__support/OSUtil/linux/syscall_wrappers/dup2.h
+5-6libc/config/linux/riscv/entrypoints.txt
+5-6utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+104-1776 files not shown
+120-19112 files