LLVM/project a128514 — llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.h SPIRVNonSemanticDebugHandler.cpp, llvm/test/CodeGen/SPIRV/debug-info debug-function-declaration-composite-scope.ll

by Manuel Carrasco on ⎇
[SPIRV] Drop the per-kind NSDI type vectors.

Replace partitionTypes and the seven type lists with the type list from DebugInfoFinder.
DeltaFile
+47-89llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+1-17llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+4-4llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-composite-scope.ll
+52-1103 files

LLVM/project 9683a9b — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 atomic-cmp-fold.ll

by Aochang Liu via GitHub on ⎇
[X86] Fix reversed condition in ADC/SBB fold of COND_A compares (#228693)

#161388 added a COND_A case to combineAddOrSubToADCOrSBB that reuses the
flags of `CMP X, Y` for ADC/SBB without swapping the operands, computing
X +/- (X <u Y) instead of X +/- (X >u Y).

It was unreachable until #221290 started emitting X86ISD::CMP instead of
X86ISD::SUB for compares of atomic loads. This patch removes it.

 `(a - b) - (a > b)` case #161388 targeted goes through the X86ISD::SUB path and is unaffected.

Fixes #228457

Assisted-by: Claude Opus 5.5
DeltaFile
+53-0llvm/test/CodeGen/X86/atomic-cmp-fold.ll
+0-10llvm/lib/Target/X86/X86ISelLowering.cpp
+53-102 files

LLVM/project fc7f642 — llvm/lib/IR Instructions.cpp, llvm/test/Transforms/InstCombine byte-cast-pairs.ll

by Pedro Lobo on ⎇
[IR] Fold pointer-byte-integer `bitcast` pairs to `ptrtoaddr`
DeltaFile
+11-2llvm/lib/IR/Instructions.cpp
+2-4llvm/test/Transforms/InstCombine/byte-cast-pairs.ll
+1-1llvm/test/Transforms/InstSimplify/byte-cast-pairs.ll
+14-73 files

LLVM/project c6db326 — llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp TailDuplicator.cpp, llvm/lib/Target/AArch64 AArch64MCInstLower.cpp AArch64FrameLowering.cpp

by Matt Arsenault on ⎇
CodeGen: Prefer getting the Triple from the Module

Continue replacing TargetMachine::getTargetTriple() with the module's
triple at sites where a Module is one hop away through an available
Function, GlobalValue or MachineModuleInfo.

Where the surrounding class already holds a Subtarget, use its triple
rather than routing through the Module.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+7-3llvm/lib/CodeGen/TailDuplicator.cpp
+4-4llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+3-2llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+2-2llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+2-1llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
+2-1llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
+20-1313 files not shown
+34-2619 files

LLVM/project 70fb870 — llvm/lib/Target/X86 X86DynAllocaExpander.cpp, llvm/test/CodeGen/X86 dyn-alloca-expander-dead-eflags.ll

by Matt Arsenault on ⎇
X86: Preserve the dead flag clobber when expanding dynamic allocas

The DYN_ALLOCA pseudos clobber EFLAGS, so propagate the pseudo's dead
flag to the stack adjustment they expand to.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+51-0llvm/test/CodeGen/X86/dyn-alloca-expander-dead-eflags.ll
+15-7llvm/lib/Target/X86/X86DynAllocaExpander.cpp
+66-72 files

LLVM/project aa7315f — llvm/test/CodeGen/VE/Scalar store_stk.ll stackframe_align.ll, llvm/test/CodeGen/VE/Vector store_stk_stvm.ll load_stk_ldvm.ll

by Matt Arsenault on ⎇
VE: Use splitAt in expandExtendStackPseudo

Replace the manual block-splitting in expandExtendStackPseudo with
MachineBasicBlock::splitAt. Reduces boilerplate, but there's some
block renumbering churn in the output.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+57-57llvm/test/CodeGen/VE/Scalar/atomic_swap.ll
+57-57llvm/test/CodeGen/VE/Scalar/atomic_cmp_swap.ll
+48-48llvm/test/CodeGen/VE/Vector/store_stk_stvm.ll
+48-48llvm/test/CodeGen/VE/Vector/load_stk_ldvm.ll
+42-42llvm/test/CodeGen/VE/Scalar/store_stk.ll
+42-42llvm/test/CodeGen/VE/Scalar/stackframe_align.ll
+294-29461 files not shown
+759-76267 files

LLVM/project 330eb34 — llvm/test/Transforms/InstCombine byte-cast-pairs.ll

by Pedro Lobo on ⎇
[IR] Pre-commit tests for folding `bitcast` pairs to `ptrtoaddr`
DeltaFile
+14-0llvm/test/Transforms/InstCombine/byte-cast-pairs.ll
+14-01 files

LLVM/project c73950c — llvm/lib/Target/Mips MipsISelLowering.cpp MipsFastISel.cpp, llvm/test/CodeGen/Mips/Fast-ISel mul-dead-hilo.ll

by Matt Arsenault on ⎇
Mips: Stop setting kill flags on virtual registers before FinalizeISel

There is no point in maintaining these before register allocation anymore.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+3-3llvm/lib/Target/Mips/MipsISelLowering.cpp
+3-3llvm/lib/Target/Mips/MipsFastISel.cpp
+2-2llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll
+8-83 files

LLVM/project 5b07ba7 — llvm/bindings/ocaml/llvm llvm_ocaml.c llvm.mli, llvm/include/llvm-c Core.h

by Nikita Popov via GitHub on ⎇
[llvm-c][ocaml] Deprecate/replace constexpr GEP APIs (#228998)

In the C API, this deprecates LLVMConstGEP, LLVMConstInBoundsGEP and
LLVMConstGEPWithNoWrapFlags. The replacement APIs are LLVMConstPtrAdd
and LLVMConstPtrAddFromIndices. The latter exposes the DataLayout-aware
`getGetElementPtr()` API, and only exists for the sake of convenience.

Similarly, in the OCaml API, remove const_gep and const_inbounds_gep in
favor of const_ptradd and const_ptradd_from_indices, which mirror the C
APIs translated to OCaml.

Unlike the older APIs, the new ones work directly on GEPNoWrapFlags
instead of providing (an incomplete set of) separate APIs for different
flavors.

This completes https://github.com/llvm/llvm-project/pull/227601 by
extending the deprecation of constexpr GEP methods to the C API.
DeltaFile
+39-16llvm/include/llvm-c/Core.h
+21-10llvm/bindings/ocaml/llvm/llvm.mli
+28-0llvm/unittests/IR/ConstantsTest.cpp
+23-4llvm/test/Bindings/OCaml/core.ml
+14-12llvm/bindings/ocaml/llvm/llvm_ocaml.c
+21-0llvm/lib/IR/Core.cpp
+146-424 files not shown
+180-5410 files

LLVM/project 042302b — clang/test/CodeGen builtins-arm64.c, llvm/include/llvm/Support AArch64MemoryHints.h

by Lukacma via GitHub on ⎇
[AArch64] Add CMH hints to store_with_hint intrinsic (#227326)

This patch extends __arm_atomic_store_with_hint intrinsic with new CMH
hints defined in
[ACLE](https://arm-software.github.io/acle/main/acle.html#atomic-store-with-hints-intrinsics)
DeltaFile
+403-1llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-hint.ll
+15-6llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+12-6llvm/test/CodeGen/AArch64/Atomics/aarch64-relaxed-store-hint.ll
+16-1clang/test/CodeGen/builtins-arm64.c
+4-10llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+10-1llvm/include/llvm/Support/AArch64MemoryHints.h
+460-252 files not shown
+465-268 files

LLVM/project bb67802 — llvm/lib/IR Instructions.cpp, llvm/test/Transforms/InstCombine byte-cast-pairs.ll

by Pedro Lobo on ⎇
[IR] Don't fold `bitcast` pairs through bytes into invalid casts
DeltaFile
+107-0llvm/test/Transforms/InstCombine/byte-cast-pairs.ll
+26-0llvm/test/Transforms/InstSimplify/byte-cast-pairs.ll
+20-1llvm/lib/IR/Instructions.cpp
+153-13 files

LLVM/project e1ab1b1 — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 avx512fp16-combine-fmsubadd.ll avx512fp16-combine-fmsubadd-fadd.ll

by Rohan Shenoy via GitHub on ⎇
[X86] Fold FMADDSUB into VFMULC for fp16 complex multiply (#227698)

We fold fmaddsub using isCFMulFromFMAddSub (formerly isCFMulFromFMSUBADD) into vfmulc.
DeltaFile
+54-0llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd-fadd.ll
+51-0llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd.ll
+15-11llvm/lib/Target/X86/X86ISelLowering.cpp
+120-113 files

LLVM/project 5b2879a — llvm/lib/Target/AMDGPU AMDGPUAtomicOptimizer.cpp, llvm/test/CodeGen/AMDGPU local-atomicrmw-fadd.ll atomic_optimizations_local_pointer.ll

by Dmitry Sidorov via GitHub on ⎇
[AMDGPU] Skip the iterative atomic scan on native LDS atomics (#227222)

The iterative scan runs a serial loop with one iteration per active lane. For an LDS atomic that the target executes natively, this costs more than the hardware serialization it replaces. Leave such atomics alone when the value is divergent.
DeltaFile
+733-5,435llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
+68-479llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
+7-0llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+808-5,9143 files

LLVM/project 123ad4d — llvm/lib/IR Instructions.cpp, llvm/test/Transforms/InstCombine byte-cast-pairs.ll

by Pedro Lobo on ⎇
[IR] Don't fold bitcast pairs through bytes into invalid casts

A pair of bitcasts through a byte can change whether a value is a
pointer, or its address space. Merging such a pair produced an invalid
bitcast and crashed InstCombine, InstSimplify, constant folding and the
IR parser. Give bitcast pairs their own case, and only fold them if
neither end is a pointer, or both are pointers in the same address
space.

Also keep inttoptr and ptrtoint/ptrtoaddr separate from a pointer-byte
bitcast. These pairs used to hit an assertion.

Fixes #207532.
DeltaFile
+107-0llvm/test/Transforms/InstCombine/byte-cast-pairs.ll
+26-0llvm/test/Transforms/InstSimplify/byte-cast-pairs.ll
+20-1llvm/lib/IR/Instructions.cpp
+153-13 files

LLVM/project 795e750 — llvm/lib/Target/PowerPC/GISel PPCInstructionSelector.cpp

by Matt Arsenault via GitHub on ⎇
PowerPC/GlobalISel: Stop setting kill flags on selected instructions (#229016)

There is no point in maintaining these before register allocation
anymore.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+18-18llvm/lib/Target/PowerPC/GISel/PPCInstructionSelector.cpp
+18-181 files

LLVM/project 73ad673 — llvm/lib/Target/VE VEISelLowering.cpp

by Matt Arsenault via GitHub on ⎇
VE: Stop setting kill flags on virtual registers before FinalizeISel (#229012)

There is no point in maintaining kill flags before register allocation
anymore.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+30-30llvm/lib/Target/VE/VEISelLowering.cpp
+30-301 files

LLVM/project 07cd029 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

by Benjamin Maxwell via GitHub on ⎇
[LV] Make partial-reduction naming consistent (NFC) (#222377)

The partial-reduction code used "Chain" to refer to two different
concepts:

1. A `VPPartialReductionChain`, which is a collection of recipes that
   form a partial reduction.
2. A list of `VPPartialReductionChain` objects that forms a chained
   reduction.

This patch renames `VPPartialReductionChain` to
`PartialReductionDescriptor` and updates the terminology as follows: a
`Link` is a single `PartialReductionDescriptor`, a `Chain` is a list of
links, and `Chains` refers to a collection of chains.
DeltaFile
+60-60llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+60-601 files

LLVM/project f96e385 — llvm/lib/Target/VE VEInstrInfo.cpp, llvm/test/CodeGen/VE/Scalar builtin_sjlj.ll

by Matt Arsenault via GitHub on ⎇
VE: Compute live-ins after splitting for EXTEND_STACK expansion (#221553)

expandExtendStackPseudo splits its block but left the new blocks without
live-in lists, so their uses of registers live across the split are rejected by 
-verify-machineinstrs.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+5-0llvm/lib/Target/VE/VEInstrInfo.cpp
+2-2llvm/test/CodeGen/VE/Scalar/builtin_sjlj.ll
+7-22 files

LLVM/project 542f3e6 — libc/docs CMakeLists.txt, libc/docs/headers index.rst

by Prashanth via GitHub on ⎇
[libc][docs] Add sys/msg.h to the header status docs (#227619)

Add a header status page for `sys/msg.h`
https://github.com/llvm/llvm-project/issues/122006
DeltaFile
+13-0libc/utils/docgen/sys/msg.yaml
+1-0libc/docs/headers/index.rst
+1-0libc/docs/CMakeLists.txt
+15-03 files

LLVM/project fb89552 — llvm/docs/GlobalISel IRTranslator.md, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

by Pedro Lobo via GitHub on ⎇
[GlobalISel] Translate byte to ptr bitcasts to `G_INTTOPTR`/`G_PTRTOINT` (#226541)

Reverts #209557 and fixes the underlying crash it worked around.

A `bitcast` from a byte type to a pointer is valid IR and preserves
pointer provenance. #209557 replaced it with a `bitcast` to `i64`
followed by `inttoptr`, which drops provenance. That's unsound.

The crash came from the IRTranslator. It lowered scalar byte to pointer
bitcasts to `G_INTTOPTR` and `G_PTRTOINT`, but left vector forms as
`G_BITCAST`. The MachineVerifier rejects that when the pointer side is a
scalar pointer. We now go through an integer matching the pointer size,
and add a `G_BITCAST` first when the shapes differ:
```diff
 %r = bitcast <2 x b32> %v to ptr

-%r:_(p0) = G_BITCAST %v(<2 x i32>)   ; bitcast cannot convert between pointers and other types
+%i:_(i64) = G_BITCAST %v(<2 x i32>)
+%r:_(p0) = G_INTTOPTR %i(i64)
```
DeltaFile
+137-3llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
+16-10llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+0-18llvm/unittests/IR/IRBuilderTest.cpp
+5-10llvm/test/CodeGen/AMDGPU/promote-alloca-byte-ptr-cast.ll
+6-4llvm/docs/GlobalISel/IRTranslator.md
+2-6llvm/lib/IR/IRBuilder.cpp
+166-516 files

LLVM/project 98606f5 — llvm/test/Transforms/LoopVectorize/VPlan compress-idioms.ll

by Benjamin Maxwell on ⎇
Rebase fixups
DeltaFile
+3-3llvm/test/Transforms/LoopVectorize/VPlan/compress-idioms.ll
+3-31 files

LLVM/project cc802a8 — llvm/lib/Target/X86 X86FastISel.cpp X86ISelLowering.cpp

by Matt Arsenault on ⎇
X86: Stop setting kill flags on virtual registers before FinalizeISel

There is no point in maintaining kill flags before register allocation
anymore.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+6-6llvm/lib/Target/X86/X86ISelLowering.cpp
+3-3llvm/lib/Target/X86/X86FastISel.cpp
+9-92 files

LLVM/project 5451653 — llvm/lib/Transforms/Utils LoopUtils.cpp, llvm/lib/Transforms/Vectorize LoopVectorizationLegality.cpp LoopVectorize.cpp

by Benjamin Maxwell on ⎇
Fixups
DeltaFile
+67-0llvm/test/Transforms/LoopVectorize/compress-idioms-negative-tests.ll
+10-5llvm/lib/Transforms/Utils/LoopUtils.cpp
+6-8llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-5llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
+1-10llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+7-4llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+100-321 files not shown
+101-337 files

LLVM/project c731ddd — llvm/include/llvm/Transforms/Utils LoopUtils.h

by Benjamin Maxwell on ⎇
Add LLVM_ABI marker
DeltaFile
+3-4llvm/include/llvm/Transforms/Utils/LoopUtils.h
+3-41 files

LLVM/project bab95c4 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp

by Benjamin Maxwell on ⎇
Rebase fixups
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+1-11 files

LLVM/project b404eae — llvm/lib/Transforms/Utils LoopUtils.cpp

by Benjamin Maxwell on ⎇
Rebase fixups
DeltaFile
+1-1llvm/lib/Transforms/Utils/LoopUtils.cpp
+1-11 files

LLVM/project 845cffd — llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h LoopVectorizationPlanner.cpp

by Benjamin Maxwell on ⎇
Always pass a vector type to TTI.isLegalMaskedCompressStore/ExpandLoad
DeltaFile
+4-4llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+4-3llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
+1-1llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+9-83 files

LLVM/project f42ac98 — llvm/test/Transforms/LoopVectorize/RISCV compress-idioms.ll, llvm/test/Transforms/LoopVectorize/X86 compress-idioms.ll

by Benjamin Maxwell on ⎇
Rebase tests
DeltaFile
+45-29llvm/test/Transforms/LoopVectorize/RISCV/compress-idioms.ll
+12-12llvm/test/Transforms/LoopVectorize/X86/compress-idioms.ll
+57-412 files

LLVM/project 0596847 — llvm/test/Transforms/LoopVectorize compress-store-vec-epilogue.ll compress-idioms.ll, llvm/test/Transforms/LoopVectorize/AArch64 compress-idioms.ll

by Benjamin Maxwell on ⎇
Update checks
DeltaFile
+333-418llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+132-53llvm/test/Transforms/LoopVectorize/X86/compress-idioms.ll
+59-43llvm/test/Transforms/LoopVectorize/AArch64/compress-idioms.ll
+54-4llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
+578-5184 files

LLVM/project bb491b0 — llvm/include/llvm/Transforms/Vectorize LoopVectorizationLegality.h, llvm/lib/Transforms/Utils LoopUtils.cpp

by Sergey Kachkov via Benjamin Maxwell on ⎇
[LoopVectorize] Support vectorization of compressing patterns in VPlan

RFC link: https://discourse.llvm.org/t/rfc-loop-vectorization-of-compress-store-expand-load-patterns/86442

This adds loop vectorizer support for "compressing" patterns,
for example:

```
int dst_idx = 0;
for (int i = 0; i < n; i++) {
  if (cond[i])
    dst[dst_idx++] = src[i];
}
```

Can be vectorized with a `llvm.masked.compressstore` as:

```
int dst_idx = 0;

    [74 lines not shown]
DeltaFile
+153-0llvm/test/Transforms/LoopVectorize/VPlan/compress-idioms.ll
+94-12llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+91-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+75-0llvm/lib/Transforms/Utils/LoopUtils.cpp
+63-9llvm/lib/Transforms/Vectorize/VPlan.h
+55-1llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
+531-2216 files not shown
+738-3522 files