LLVM/project 06a6c5ellvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel BUILD.gn

[gn] port acb8fbe83ff12 more (#211295)
DeltaFile
+4-0llvm/utils/gn/secondary/llvm/unittests/DWARFLinkerParallel/BUILD.gn
+4-01 files

LLVM/project aee6075llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize BUILD.gn

[gn build] Port fdae383abe62 (#211293)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
+1-01 files

LLVM/project bf0336fllvm/utils/gn/secondary/llvm/tools/dsymutil BUILD.gn

Merge branch 'main' into users/mtrofin/mtrofin-patch-1
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
+1-01 files

LLVM/project 8b460c5llvm/utils profcheck-xfail.txt

Exclude another coro test from profcheck

Coro aren't yet fixed for profcheck.

(related: #207799)
DeltaFile
+1-0llvm/utils/profcheck-xfail.txt
+1-01 files

LLVM/project c6257d6llvm/lib/Target/WebAssembly WebAssemblyMCLowerPrePass.cpp

fix

Created using spr 1.3.7
DeltaFile
+15-4llvm/lib/Target/WebAssembly/WebAssemblyMCLowerPrePass.cpp
+15-41 files

LLVM/project eec8ff8llvm/utils/gn/secondary/llvm/tools/dsymutil BUILD.gn

[gn build] Port c2a39ea72dc1 (#211292)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/tools/dsymutil/BUILD.gn
+1-01 files

LLVM/project f7ba9c3flang/test/Lower do_loop_unstructured.f90, flang/test/Lower/MIF change_team2.f90

[flang][PFT-to-MLIR] Default wrap-unstructured-constructs-in-execute-region to off

Flip the default of `-wrap-unstructured-constructs-in-execute-region`
from true to false while further miscompiles under the wrap path are
investigated. The flag is still available; lit tests that exercise the
wrap path now pass it explicitly on their RUN lines.

Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
DeltaFile
+2-2flang/test/Lower/OpenMP/stop-stmt-in-region.f90
+2-2flang/test/Lower/MIF/change_team2.f90
+2-2flang/test/Lower/OpenACC/acc-terminator.f90
+2-2flang/test/Lower/OpenMP/loop-compound.f90
+2-2flang/test/Lower/OpenMP/parallel-reduction3.f90
+2-2flang/test/Lower/do_loop_unstructured.f90
+12-1212 files not shown
+25-2518 files

LLVM/project 8aa8084libunwind/src UnwindCursor.hpp

[libunwind][AIX] Handle VAPI-based return addresses in stack unwinding for LLU (#209280)

In AIX's implementation of LLU (Live Library Update), the caller of a
Virtual API (VAPI) interface instead calls VAPI glue and the
implementation for a VAPI function is entered from the VAPI glue. If a
VAPI is not already active on the thread, the VAPI calls the
implementation of the VAPI function with the link register (LR) value
set to a return address in the VAPI glue. In this case, the LR (return
address) value on entry to the VAPI glue is saved in the VAPI control
block. This PR checks whether the return address in a stack frame falls
within the VAPI address range. If it does, the unwinder retrieves the LR
value from the VAPI control block and uses it as the return address
during stack unwinding. In addition, before transferring control to a
landing pad, this PR executes the VAPI return glue to clear the VAPI
control block if the VAPI glue was used.

---------

Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
DeltaFile
+116-4libunwind/src/UnwindCursor.hpp
+116-41 files

LLVM/project 0769e6dclang/tools/offload-arch AMDGPUArchByHIP.cpp

[offload-arch] Fix amdgpu HIP DLL search path on Windows (#209898)

## Motivation

This follows up on https://github.com/llvm/llvm-project/pull/194063 to
fix https://github.com/ROCm/TheRock/issues/6571, where `offload-arch`
distributed as part of ROCm has been failing with:
```diff
 D:\projects\TheRock (main -> upstream)
 λ .\build\dist\rocm\lib\llvm\bin\offload-arch.exe --verbose
 Found HIP runtime: D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll
-note: priming LoadLibraryExW failed for D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll (error 126)
 Failed to load D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll: D:/projects/TheRock/build/dist/rocm/bin/amdhip64_7.dll:  Can't open: The specified module could not be found.  (0x7E)
 Failed to 'dlopen' libcuda.so.1
 Unable to load library 'libze_loader.so': libze_loader.so: Can't open: The specified module could not be found.  (0x7E)
```

## Fix details


    [47 lines not shown]
DeltaFile
+13-1clang/tools/offload-arch/AMDGPUArchByHIP.cpp
+13-11 files

LLVM/project a323bebllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPUtils.cpp SLPUtils.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+27-6llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+10-20llvm/test/Transforms/SLPVectorizer/X86/fma-fmuladd-mix.ll
+4-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
+4-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
+45-264 files

LLVM/project e397896llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.1024bit.si.ll

[NFC][AMDGPU][test] Split slow lit tests with shared Inputs/ sources
DeltaFile
+0-231,405llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+81,360-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.si.ll
+56,719-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.gfx11.ll
+47,028-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.vi.ll
+44,264-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.gfx9.ll
+2-15,771llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+229,373-247,17635 files not shown
+247,675-247,57341 files

LLVM/project 9ca28bdllvm/lib/ExecutionEngine/RuntimeDyld/Targets RuntimeDyldCOFFX86_64.h, llvm/test/ExecutionEngine/RuntimeDyld/X86 COFF_x86_64_SECREL.s

[RuntimeDyld][COFF] Apply addend for IMAGE_REL_AMD64_SECREL (#211015)

`IMAGE_REL_AMD64_SECREL` currently falls through the default case. Its
`Addend` is built using the target symbol's section offset. This is
incorrect: for a SECREL against a section symbol (offset 0), the real
value is stored as the addend in the relocated field. This results in
the SECREL writer always writing 0, which is wrong.

This patch reads the 4-byte field addend for SECREL, as `REL32` and
`ADDR64` already do. It also adds a test which fails without this.

Source: https://learn.microsoft.com/en-us/windows/win32/debug/pe-format
DeltaFile
+25-0llvm/test/ExecutionEngine/RuntimeDyld/X86/COFF_x86_64_SECREL.s
+6-0llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldCOFFX86_64.h
+31-02 files

LLVM/project 9669791flang/test/Lower do_loop_unstructured.f90 nsw.f90, flang/test/Lower/MIF change_team2.f90

[flang][PFT-to-MLIR] Default wrap-unstructured-constructs-in-execute-region to off

Flip the default of `-wrap-unstructured-constructs-in-execute-region`
from true to false while further miscompiles under the wrap path are
investigated. The flag is still available; lit tests that exercise the
wrap path now pass it explicitly on their RUN lines.

Co-Authored-By: Claude Sonnet 4.6 <noreply at anthropic.com>
DeltaFile
+2-2flang/test/Lower/OpenMP/parallel-reduction3.f90
+2-2flang/test/Lower/do_loop_unstructured.f90
+2-2flang/test/Lower/nsw.f90
+2-2flang/test/Lower/MIF/change_team2.f90
+2-2flang/test/Lower/OpenACC/acc-terminator.f90
+2-2flang/test/Lower/OpenMP/loop-compound.f90
+12-1212 files not shown
+25-2518 files

LLVM/project da26ba8lldb/packages/Python/lldbsuite/test decorators.py, lldb/test/API/functionalities/data-formatter/data-formatter-objc TestDataFormatterObjCNSBundle.py

[LLDB] Disable Foundation test on newer versions of macOS (#211127)

On macOS >= 27 Foundation caches the path of a URL-initialized
NSBundle as a native Swift String. We cannot format that without the
Swift language plugin.

Add a requiresSwiftPlugin() decorator in decorators.py and use it for
the NSBundle formatter test. It expects failure only when LLDB lacks the
Swift plugin, and only on Apple targets at or after a given OS version
(checked against the target platform, so it is correct for
iOS/tvOS/watchOS/visionOS as well as macOS). Builds with the plugin are
expected to pass.

Assisted-by: claude
DeltaFile
+45-0lldb/packages/Python/lldbsuite/test/decorators.py
+5-0lldb/test/API/functionalities/data-formatter/data-formatter-objc/TestDataFormatterObjCNSBundle.py
+50-02 files

LLVM/project 4300ed0llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.1024bit.si.ll

[NFC][AMDGPU][test] Split slow lit tests with shared Inputs/ sources
DeltaFile
+0-231,405llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+81,360-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.si.ll
+56,719-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.gfx11.ll
+47,028-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.vi.ll
+44,264-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.gfx9.ll
+3-15,768llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+229,374-247,17335 files not shown
+247,778-247,57041 files

LLVM/project 930cd75mlir/lib/Dialect/OpenACC/Transforms ACCCGToGPU.cpp, mlir/test/Dialect/OpenACC acc-cg-to-gpu-reduction-array.mlir

[mlir][OpenACC] Support static multi-rank OpenACC array reduction accumulators (#210853)

Example:
```fortran
!$acc parallel loop reduction(+:a)
do i = 1, n
  a(i,:) = a(i,:) + input(i,:)
end do
```

In this code, the reduction accumulator can have rank greater than one,
but GPU lowering assumes rank one.

Fix: initialize rank-N accumulators with nested loops and delinearize
flattened indices before loading, reducing, and storing each element.
DeltaFile
+112-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-reduction-array.mlir
+44-13mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+156-132 files

LLVM/project 15e5b04llvm/include/llvm/CodeGen RDFGraph.h, llvm/lib/Target/Hexagon HexagonPostRAHandleQFP.cpp

[Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (#210192)

Removed NodeAddr::operator< that was added by mistake in #207082.
Nothing needed it once HexagonPostRAHandleQFP.cpp's containers went back
to keying on NodeId.
Also removed the contradictory UNSUPPORTED+REQUIRES asserts in two
tests; subreg2 still crashes so it's XFAIL'd for now.
DeltaFile
+12-12llvm/lib/Target/Hexagon/HexagonPostRAHandleQFP.cpp
+2-2llvm/test/CodeGen/Hexagon/autohvx/xqf-postra-subreg2.ll
+0-2llvm/include/llvm/CodeGen/RDFGraph.h
+0-2llvm/test/CodeGen/Hexagon/autohvx/xqf-postra-subreg3.ll
+14-184 files

LLVM/project 77981e3llvm/lib/Target/ARM ARMInstrInfo.td, llvm/test/CodeGen/ARM/Windows chkstk-cpsr-clobber.ll

[ARM] Fix chkstk definition (#210940)
DeltaFile
+25-0llvm/test/CodeGen/ARM/Windows/chkstk-cpsr-clobber.ll
+1-1llvm/lib/Target/ARM/ARMInstrInfo.td
+26-12 files

LLVM/project 7f3a8c0llvm/docs AMDGPUUsage.rst

Comments
DeltaFile
+1-1llvm/docs/AMDGPUUsage.rst
+1-11 files

LLVM/project 0586a27llvm/lib/Target/AMDGPU SIDefines.h AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU addrspacecast-barrier.ll

Comments
DeltaFile
+4-3llvm/lib/Target/AMDGPU/SIDefines.h
+1-3llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
+9-106 files

LLVM/project 4c86088llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp SIISelLowering.cpp

[AMDGPU] Add synthetic apertures and use them for barriers

Define what a synthetic aperture is, and adjust the barrier AS
to use this new system. This makes the barrier AS even safer to
use as now we can use all 32 bits of it without ever risking
hitting a valid address of any kind (LDS or outside LDS).
DeltaFile
+72-87llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+44-5llvm/docs/AMDGPUUsage.rst
+21-23llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+18-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+12-0llvm/lib/Target/AMDGPU/SIDefines.h
+9-0llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
+176-1324 files not shown
+186-13710 files

LLVM/project 24c79eellvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU addrspacecast-barrier.ll s-barrier-signal-var-gep.ll

[RFC][AMDGPU] Add BARRIER address space

Add a new BARRIER address space that is used for global variables that are used to represent the barrier IDs in GFX12.5.

These barrier addresses just have values corresponding 1-1 to barrier IDs. They are still implemented on top of LDS, but the offsetting happens during an addrspacecast to generic, not whenever the barrier GV is used.

The motivation for this is to make the relation between LDS and barrier GVs explicit in the compiler. It does add a bit more complexity, but that complexity was already there, just hidden by pretending barrier GVs were actual LDS.
DeltaFile
+474-0llvm/test/CodeGen/AMDGPU/addrspacecast-barrier.ll
+81-74llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+72-61llvm/test/CodeGen/AMDGPU/s-barrier.ll
+59-43llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+52-14llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+32-32llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
+770-22448 files not shown
+1,234-57454 files

LLVM/project c7958abllvm/docs AMDGPUUsage.rst

Update docs
DeltaFile
+20-13llvm/docs/AMDGPUUsage.rst
+20-131 files

LLVM/project 9cdc2eellvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp AMDGPULegalizerInfo.cpp

Comments
DeltaFile
+7-12llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+8-10llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+8-0llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.cpp
+6-0llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
+4-1llvm/docs/AMDGPUUsage.rst
+1-1llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
+34-243 files not shown
+38-269 files

LLVM/project 25231a0clang/docs AMDGPUSupport.md

docs
DeltaFile
+16-8clang/docs/AMDGPUSupport.md
+16-81 files

LLVM/project 958f9ffllvm/test/Transforms/SLPVectorizer/X86 fma-fmuladd-mix.ll

[SLP][NFC]Add a test for mixed fma/fmuladd scalars, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/211280
DeltaFile
+126-0llvm/test/Transforms/SLPVectorizer/X86/fma-fmuladd-mix.ll
+126-01 files

LLVM/project 2f5771copenmp CMakeLists.txt, openmp/module CMakeLists.txt

[openmp][cmake] Match GPU triples consistently in openmp/module (#211138)

Fixes #211135.

`openmp/module/CMakeLists.txt:29` gates the GPU-only Fortran compile
options on `"^amdgcn|^nvptx"`, while `openmp/CMakeLists.txt:176-177`
selects host-vs-device layout for the same build using
`"^amdgpu|^amdgcn|^nvptx|^spirv64"` against both
`LLVM_DEFAULT_TARGET_TRIPLE` and `CMAKE_CXX_COMPILER_TARGET`.

All four offload cache files use the triple `amdgpu-amd-amdhsa`, which
`^amdgcn` does not match, so `-nogpulib -flto` are silently not applied
to `libomp-mod` in the recommended AMDGPU offload configurations.

Compute the test once as `LIBOMP_TARGET_IS_GPU` in
`openmp/CMakeLists.txt` and use it at both sites, rather than
duplicating a widened regex. The conditions differ, not just the
patterns: copying the regex alone would leave a build that sets
`CMAKE_CXX_COMPILER_TARGET` without `LLVM_DEFAULT_TARGET_TRIPLE` still

    [33 lines not shown]
DeltaFile
+12-3openmp/CMakeLists.txt
+1-1openmp/module/CMakeLists.txt
+13-42 files

LLVM/project 65e5600llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

feedback

Created using spr 1.3.7
DeltaFile
+9,398-9,218llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+6,993-6,921llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+5,803-5,808llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+3,842-3,722llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
+2,196-5,244llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
+3,572-3,745llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+31,804-34,6582,097 files not shown
+216,587-146,6252,103 files

LLVM/project 4b27bb2llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+9,398-9,218llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+6,993-6,921llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+5,803-5,808llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+3,842-3,722llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
+2,196-5,244llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
+3,572-3,745llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+31,804-34,6582,096 files not shown
+216,580-146,6182,102 files

LLVM/project 34436dbclang/lib/Sema DeclSpec.cpp, clang/test/SemaCXX auto-cxx98.cpp

[clang] Emit diagnostic for typedef+auto missed case in C++98/C23 (#210141)

CheckTypeSpec() converted 'auto' to a storage-class specifier without
checking whether 'typedef' was already set. [dcl.stc]p1 unconditionally
forbids typedef alongside any storage-class specifier regardless of C++
version.

This change add the check for tydef in the code handling auto.
DeltaFile
+26-10clang/lib/Sema/DeclSpec.cpp
+9-1clang/test/SemaCXX/auto-cxx98.cpp
+35-112 files