Align TOSA->EmitC integration tests with MLGO config (#216787)
Adapt existing TOSA->EmitC integration tests to use exactly the same
pipeline as the MLGO CMake config proposes in
https://github.com/llvm/llvm-project/pull/212650.
The first `RUN` directive tests the TOSA->EmitC lowering.
The second tests class-based C++ code generation for MLGO. For this, the
pipeline needs extra passes helping transform the model function into a
class:
- `promote-buffers-to-stack`: heap-based -> stack-based allocations
- `wrap-emitc-func-in-class`: standalone `emitc.func` -> `emitc.class`
- `mlgo-add-reflection-map`: adds a reflection map + helper method to
`emitc.class` for runtime field lookup.
Therefore, we're now emitting a `.cpp` file instead of `.c`.
The missing `buffer-deallocation-pipeline` lead to a skipped
canonicalization that created `arith` ops, which the current pipeline
couldn't actually lower, due to recent changes in the `arith-expand`
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[clang][Sema] Fixed a crash when an `address_space` attribute with a dependent argument was written after the declarator-id (#216348)
Fixes #196982
Fixes #111463
When filling in source locations for a dependent `address_space` type,
we only looked at the declarator chunk being visited. But an attribute
written after the declarator-id appertains to the declared entity, so it
never lands on a chunk — it gets applied to the outermost type instead.
The search came up empty and we hit the `llvm_unreachable`. Nothing to
do with the malformed code in the bug report, by the way: plain template
`<int AS> void f() { void *p [[clang::address_space(AS)]]; }` crashes
too.
The lookup now searches every attribute list of the declarator (chunk,
declarator, decl-spec, declaration), passed as an `ArrayRef` by the
caller, so the attribute is always findable and the original
`llvm_unreachable` stays. Attributes that are invalid or malformed are
skipped, since they never produced a type. This matters when a malformed
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[AMDGPU] Configure the software pipeliner policy
Set the pipeliner policy in overridePipelinerPolicy(): raise the maximum MII
and opt into the generic register-pressure detector.
MFMA latencies push the MII of otherwise pipelineable loops past the generic
limit of 27, so AMDGPU raises it to 256, which covers the II distributions
observed across Composable Kernels and Triton workloads on gfx950. Removing
the limit entirely pipelines no additional loops on those workloads and costs
around 23% more compile time, so the bound stays finite.
Enable the generic register-pressure detector so schedules exceeding the
target-provided pressure-set limits are rejected and retried at a higher II.
[MachinePipeliner] Let targets configure the maximum MII
The pipeliner rejects a loop whose minimum initiation interval exceeds
-pipeliner-max-mii. Its default of 27 suits targets with short instruction
latencies, but is too small for others: on AMDGPU a couple of MFMA
instructions already push the MII past it, so the loop never pipelines.
Move the limit into a MachinePipelinerPolicy that targets customize by
implementing TargetSubtargetInfo::overridePipelinerPolicy(). The generic
default is unchanged and an explicit -pipeliner-max-mii still wins over the
target's choice, so no target changes behavior here. Exercised by the AMDGPU
adoption in a following commit.
[AMDGPU] Add MachinePipeliner support for AMDGPU
Implement the target hooks to enable MachinePipeliner for AMDGPU. The
pass is off by default and can be enabled with -amdgpu-enable-pipeliner
at -O2 and above.
Only uniform, single-basic-block counted loops with a scalar (SCC)
back-edge are pipelined; loops with a divergent (VCC/EXEC) back-edge, or
containing calls or inline asm, are rejected. Code is generated by the
default modulo schedule expander (DFA, window scheduler, and MVE
expansion are disabled for AMDGPU).
Validated on gfx942 and gfx950 with Composable Kernel and Triton workloads.
[MachinePipeliner] Let targets enable the register-pressure detector
The generic MachinePipeliner register-pressure detector, added in #74807,
was only reachable through the global -pipeliner-register-pressure option.
Add MachinePipelinerPolicy::ShouldLimitRegPressure so targets can enable the
detector in TargetSubtargetInfo::overridePipelinerPolicy. An explicit command-
line option continues to override the target policy.
The policy defaults to false, preserving existing behavior for other targets.
It is exercised by the AMDGPU adoption in the following commit.
[mlir][acc] Introduce acc atomic to llvm patterns (#217142)
Add support for lowering the OpenACC atomic operations - atomic.read,
atomic.write, atomic.update, and atomic.capture - to LLVM dialect.
Co-authored-by: Matsu <kmatsumura at nvidia.com>
[CodeGen] Avoid register pressure limit underflow (#216372)
RegisterClassInfo::computePSetLimit() subtracts an estimated
reserved-register weight from the target-provided pressure-set limit. If
the weight exceeds the limit, the unsigned subtraction wraps to a very
large value, effectively disabling register-pressure checks. An equal
weight produces zero, which is the uncomputed-limit sentinel.
MachineSink and MachineLICM exposed this underflow after switching to
RegisterClassInfo limits.
Preserve the target-provided nonzero limit when the approximate
adjustment would exhaust it. Non-underflowing adjustments remain
unchanged. Add an AMDGPU regression test and update the affected checks.
[libc] Add support for wchar_t in StringConverter. (#211867)
This takes care of a TODO in LibcTest.cpp from #203355, allowing
`wstring_view` to be printed as UTF-8 in tests. It also enables updates
to __support/printf_core/ for implementing `swprintf`.
The change to `StringConverter` is enabled by extending the
`CharacterConverter` API when `wchar_t` is detected as being UTF-32.
The `StringConverter` unit test is updated so it no longer compiles to a
no-op on Windows.
Note: this change does not respect `-fwide-exec-charset`, which Clang still
does not support but GCC does. This is the existing libc behavior.
[ASan] Correctly handle vectorized pointer sub/cmp for `invalid-pointer-pair` (#213546)
Before this PR, asan will treat vector operands just like pointer and
pass it to `__sanitizer_ptr_sub/__sanitizer_ptr_cmp(i64, i64)`,
which leads to assertion failure because it doesn't matches the needed
parameter type.
This PR extracts vector's elements and creates runtime call for each
pair of them.
Closes #212453 .
[VPlan] Split handleEarlyExits into countable and uncountable passes. NFC (#206017)
This allows us to remove UncountableExitStyle::NoUncountableExit, and
isolate it to just the uncountable exit path. This should make it easier
to choose a style from within VPlan alone later on.
This also allows us to plug UncountableExitStyle into a TTI hook or CLI
flag eventually, as I don't think we want to expose NoUncountableExit.
[gn] Make GlobalISel depend on SelectionDAG (#217335)
This dependency has been present in the CMake build for many years.
Suddenly, a bunch of binaries (e.g. llvm-extract) stopped linking
without it, so add it to the GN build too.
