LLVM/project 29316beclang-tools-extra/clang-tidy/cppcoreguidelines UseEnumClassCheck.cpp, clang-tools-extra/docs ReleaseNotes.md

[clang-tidy] Fix `cppcoreguidelines-use-enum-class` anonymous enum bug (#215352)

`UseEnumClassCheck::registerMatchers` implementing
`cppcoreguidelines-use-enum-class` didn't check for empty enum names and
suggested erroneous "fix" to make anonymous enums `class enum`, which is
ill-defined, fix this.

Fixes #215328
DeltaFile
+11-4clang-tools-extra/clang-tidy/cppcoreguidelines/UseEnumClassCheck.cpp
+2-1clang-tools-extra/docs/clang-tidy/checks/cppcoreguidelines/use-enum-class.rst
+3-0clang-tools-extra/docs/ReleaseNotes.md
+2-0clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/use-enum-class.cpp
+18-54 files

LLVM/project 2256564llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.cpp

[SandboxVectorizer] Dispatch LoadStoreVec::runOnRegion on seed kind

Rebuilt on top of the direction-agnostic packOperands() redesign and
the fresh-Scheduler-per-sub-run fix (previously this same feature
existed on the now-superseded vectorize-loads branch, stacked on the
classifyStoreOperands-gated version of partition-store-bundles).

runOnRegion() previously assumed its seed slice was always a store
chain, unconditionally casting Bndl[0] to StoreInst. This crashed
(assertion in areConsecutive<StoreInst>) whenever -sbvec-collect-seeds
included "loads", since a load-seeded region's Aux holds LoadInsts.

Add createVectorLoad(), a standalone builder used only by the new
vectorizeLoads() (packOperands() replaced its old role of also being
vectorizeStores()'s all-loads fast path -- that path no longer exists,
per the direction-agnostic redesign).

Add a symmetric top-level path for load-kind seed slices:
  - vectorizeLoads() builds the vector load via createVectorLoad(), then

    [39 lines not shown]
DeltaFile
+132-3llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+71-0llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec_load_seeds.ll
+26-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
+229-33 files

LLVM/project a9b8e89llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.cpp

[SandboxVectorizer] Vectorize partial store sub-bundles in LoadStoreVec

Rebuilt on top of the direction-agnostic packOperands() redesign
(previously this same feature existed on the now-superseded
partition-store-bundles branch, gated by classifyStoreOperands).

runOnRegion() previously required the entire seed chain to vectorize as
one unit. A seed slice can legitimately fail that as a whole while a
sub-run within it is still fine, e.g. because it spans an address gap
(SeedBundle::getSlice sorts by address but doesn't guarantee
contiguity) or a sub-range fails to schedule. Add
findLegalStoreRun()/isLegalStoreRun() to search for the longest
vectorizable run starting at a given position, and have runOnRegion()
call vectorizeStores() once per such run instead of once for the whole
chain. isLegalStoreRun() is purely an address/scheduling check now --
no operand-eligibility check is needed since packOperands() accepts any
operand kind.

The search only ever shrinks a candidate length, never grows one:

    [35 lines not shown]
DeltaFile
+48-2llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+45-0llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec.ll
+19-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
+112-23 files

LLVM/project 5888127llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer VecUtils.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes BundleVec.cpp

[SandboxVectorizer] Hoist getInsertPointAfterInstrs into VecUtils

Move BottomUpVec.cpp's file-local getInsertPointAfterInstrs() into
VecUtils, next to the getLowest()/getLastPHIOrSelf() primitives it's
built from. It has no BottomUpVec-specific state; the next commit adds a
second caller in LoadStoreVec.

Not hoisting BottomUpVec::createPack() itself here: it asserts a single
common scalar type (VecUtils::getCommonScalarType), which doesn't fit
LoadStoreVec's mixed-type ("enable-diff-types") requirement. That needs
its own extended packer, kept local to LoadStoreVec.cpp rather than
force-fitting the shared version.

No functional change: check-llvm Transforms/SandboxVectorizer passes
(28/28).

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+6-18llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
+13-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
+19-182 files

LLVM/project 8ed027cllvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.cpp

[SandboxVectorizer] Make LoadStoreVec::vectorizeStores direction-agnostic

Remove classifyStoreOperands()/isFoldableLoadOperand(): vectorizeStores()
no longer gates on whether a store chain's value operands are all loads,
all constants, or neither. Instead it always builds the vector value via
a new packOperands(), which packs any mix of loads, constants, or
arbitrary SSA values via extractelement/insertelement -- direction-
agnostic in the sense that it doesn't care what kind of operand it's
given, unlike the load-specific and constant-specific paths it replaces.

packOperands() combines operands at the granularity of their narrowest
common scalar element type (the same rule getCombinedVectorTypeFor()
uses), splitting a wider operand into multiple lanes via a bitcast. A
plain bitcast can't convert between pointer and non-pointer types, and
inttoptr requires an integer source, so reinterpretSameWidth() picks
bitcast, ptrtoint, or inttoptr as needed, routing a non-integer,
non-pointer operand (e.g. double) through an intermediate same-width
integer when the target granularity is a pointer.


    [38 lines not shown]
DeltaFile
+149-96llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+114-36llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec_mixed_types.ll
+116-32llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec.ll
+6-2llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/AMDGPU/basic.ll
+6-2llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
+391-1685 files

LLVM/project cb72195lldb/source/Plugins/Process/Utility RegisterInfoPOSIXDynamic_riscv32.h RegisterInfoPOSIXDynamic_riscv32.cpp, lldb/source/Plugins/Process/elf-core RegisterContextPOSIXCore_riscv32.h RegisterContextPOSIXCore_riscv32.cpp

[lldb][RISCV] Construct CSR information dynamically (#203234)

Custom RISC-V extensions may define control and status registers (CSRs)
with overlapping addresses. Therefore, when performing postmortem debug
of 32-bit RISC-V core dump images, dynamically construct CSR information
based on the set of enabled extensions.

Assisted-by: OpenAI GPT-5
DeltaFile
+375-4,097lldb/source/Plugins/Process/Utility/RegisterInfos_riscv32.h
+66-66lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
+78-0lldb/source/Plugins/Process/Utility/RegisterInfoPOSIXDynamic_riscv32.cpp
+52-4lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv32.cpp
+22-0lldb/source/Plugins/Process/Utility/RegisterInfoPOSIXDynamic_riscv32.h
+5-1lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv32.h
+598-4,1686 files

LLVM/project 1204e6fclang/test/CodeGenHLSL/builtins lerp-builtin.hlsl lerp.hlsl, clang/test/SemaHLSL/BuiltIns lerp-errors.hlsl

[HLSL] Move `lerp` implementation to header files (#215692)

Closes #213097.

This PR replaces the previous implementation of `lerp` with a new one
inside the header files. It also cleans up the tests to use 3 distinct
parameters (x, y, s) for consistency with other similar tests.
The SPIRV intrinsic (`int_spv_lerp`) and its lowering are intentionally
kept, since a follow-up will pattern match `X + S * (Y - X)` back to the
extended instruction and needs the SPIRV intrinsic to do so.

Assisted-by: Claude Opus 4.8
DeltaFile
+160-96clang/test/CodeGenHLSL/builtins/lerp-overloads.hlsl
+0-130clang/test/SemaHLSL/BuiltIns/lerp-errors.hlsl
+49-48clang/test/CodeGenHLSL/builtins/lerp.hlsl
+0-56llvm/test/CodeGen/DirectX/lerp.ll
+0-14llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+0-12clang/test/CodeGenHLSL/builtins/lerp-builtin.hlsl
+209-3567 files not shown
+215-38913 files

LLVM/project 27a40cfllvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.h, llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.cpp

[SandboxVectorizer] Extract LoadStoreVec::vectorizeStores from runOnRegion

Move runOnRegion()'s body -- the store-chain legality checks, operand
classification, vector value construction, and profitability decision
-- into a new vectorizeStores(Bndl, Rgn, Sched, A) method. runOnRegion()
now only builds the initial bundle from the region's Aux and calls
vectorizeStores() once. Also extract the cost-check tail into
acceptIfProfitable(), a small helper worth having on its own. NFC.
DeltaFile
+30-18llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+5-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
+35-182 files

LLVM/project c1dc946clang/test/CodeGenHLSL/builtins radians-builtin.hlsl radians.hlsl, clang/test/SemaHLSL/BuiltIns radians-errors.hlsl

[HLSL] Move `radians` implementation to header files (#215379)

Closes #213095.

This PR replaces the previous implementation of `radians` with a new one
inside the header files.
The SPIRV intrinsic (`int_spv_radians`) and its lowering are
intentionally kept, since a follow-up will pattern-match `Val *
(pi/180)` back to the extended instruction and needs the SPIRV intrinsic
to do so.

Assisted-by: Claude Opus 4.8
DeltaFile
+85-66clang/test/CodeGenHLSL/builtins/radians-overloads.hlsl
+0-78llvm/test/CodeGen/DirectX/radians.ll
+26-52clang/test/CodeGenHLSL/builtins/radians.hlsl
+0-27clang/test/SemaHLSL/BuiltIns/radians-errors.hlsl
+0-16clang/test/CodeGenHLSL/builtins/radians-builtin.hlsl
+0-12llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+111-2519 files not shown
+119-27115 files

LLVM/project f2c1710flang/test/Fir struct-passing-aarch64-indirect.fir

review comments, add test
DeltaFile
+27-0flang/test/Fir/struct-passing-aarch64-indirect.fir
+27-01 files

LLVM/project 5f4fba9llvm/lib/CodeGen/SelectionDAG LegalizeTypes.h LegalizeFloatTypes.cpp, llvm/test/CodeGen/X86 xrint-no-libcall-error.ll

DAG: Gracefully diagnose missing lrint/lround float-operand libcalls (#215064)

I believe this is my 9000th commit, merged during the solar eclipse 

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+32-36llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+12-0llvm/test/CodeGen/X86/xrint-no-libcall-error.ll
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+45-363 files

LLVM/project 3e1bb94llvm/test/CodeGen/AMDGPU/GlobalISel mul-known-bits.i128.ll

Apply suggestion from @chinmaydd
DeltaFile
+1-1llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i128.ll
+1-11 files

LLVM/project 3b18dedllvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel mul-known-bits.i128.ll

[AMDGPU][GlobalISel] Fix wide multiply with known-zero parts

Materialize a zero accumulator when all partial products for a destination part are skipped, avoiding an invalid null register during legalization.

Change-Id: I05294cf68ddd4363ccb20df7159981280e7c9c4e
DeltaFile
+26-0llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i128.ll
+6-0llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+32-02 files

LLVM/project 09aa4cdllvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel mul-known-bits.i128.ll

incorp changes

Change-Id: I1b052b9e3bfe10698f2e4d52ffc53dddc7ace71e
DeltaFile
+23-0llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i128.ll
+5-0llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+28-02 files

LLVM/project 75c74f6utils/bazel/llvm-project-overlay/compiler-rt BUILD.bazel

Exclude more libc math C++ builtins from compiler-rt Bazel overlay (#214779)

Building on work in https://github.com/llvm/llvm-project/pull/208861,
adds recently-added additional libc math C++ builtins from the
compiler-rt Bazel overlay.
DeltaFile
+21-0utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
+21-01 files

LLVM/project 9a78a6fflang/lib/Semantics check-omp-loop.cpp, flang/test/Semantics/OpenMP unroll-clauses.f90

[flang][OpenMP] Support the FULL clause on the UNROLL construct (#214115)

`!$omp unroll full` is parsed and then aborts in lowering with
`not yet implemented: Unhandled clause FULL in UNROLL construct`. This
implements it. Fixes #214114.

`partial` landed in #206642 and bare `unroll` in #144785, so `full` is
the remaining clause on the
construct. clang already supports `#pragma omp unroll full`, and
`OpenMPIRBuilder::unrollLoopFull` already exists, so the work is the
MLIR op, its translation, and
the flang lowering.

### MLIR

Adds `omp.unroll_full`, mirroring `omp.unroll_heuristic`: one applyee,
no generatee, since no loop
remains after full unrolling. The name is the one already used as an
example in `CanonicalLoopOp`'s

    [66 lines not shown]
DeltaFile
+73-0flang/test/Semantics/OpenMP/unroll-clauses.f90
+68-0mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+48-0mlir/test/Target/LLVMIR/openmp-unroll-full02.mlir
+41-0mlir/test/Dialect/OpenMP/invalid-unroll.mlir
+35-0flang/lib/Semantics/check-omp-loop.cpp
+35-0mlir/test/Dialect/OpenMP/cli-unroll-full.mlir
+300-011 files not shown
+445-517 files

LLVM/project 22ff2ballvm/lib/Target/AMDGPU AMDGPU.td

fix indent

Change-Id: I5ff36bf0554c82de1d1d9462e92ee15c6d015b46
DeltaFile
+14-23llvm/lib/Target/AMDGPU/AMDGPU.td
+14-231 files

LLVM/project 37b3167flang/test/Lower/OpenMP declare-mapper-iterator.f90 motion-iterator.f90

Verify 2-D iterator dimension associations

Bind each two-dimensional iterator range and trace its induction
variable to the corresponding map bound and array extent in target update
and declare mapper lowering tests.

This makes range, induction-variable, bound, and dimension swaps observable.
DeltaFile
+54-18flang/test/Lower/OpenMP/motion-iterator.f90
+54-4flang/test/Lower/OpenMP/declare-mapper-iterator.f90
+108-222 files

LLVM/project 2ea42bcllvm/lib/CodeGen MachineBasicBlock.cpp, llvm/lib/CodeGen/MIRParser MILexer.cpp

[MIR] Quote basic block names that are not plain identifiers (#214054)

`MachineBasicBlock::printName` writes the IR basic-block name after
`bb.<N>.` unquoted, and the
MIR lexer reads it back with `isIdentifierChar` only. If the name
contains anything else -- a
comma, say -- the name is cut short on the way in and the remainder is
treated as syntax, so `llc`
cannot parse the MIR that `llc` just wrote:

```console
$ llc -mcpu=gfx90a -stop-before=greedy bb-comma-name.ll -o out.mir
$ llc -mcpu=gfx90a -x mir -start-before=greedy out.mir -o /dev/null
error: out.mir:170:8: expected ':'
```

because the printer emitted

```

    [46 lines not shown]
DeltaFile
+27-0llvm/test/CodeGen/MIR/AMDGPU/bb-name-needs-quotes.ll
+17-0llvm/lib/CodeGen/MIRParser/MILexer.cpp
+5-2llvm/lib/CodeGen/MachineBasicBlock.cpp
+49-23 files

LLVM/project 3f92be2llvm/lib/Analysis AssumptionCache.cpp, llvm/test/Analysis/AssumptionCache remove-from-stale-cache.ll

[AssumptionCache] Remove incorrect assertion from `removeAffectedValues()` (#214524)

The assertion in `removeAffectedValues()` is trying to enforce that,
when we come to remove the affected values of a live assume call, each
affected value has a corresponding line in the cache. This may not be
the case if the assume call has been modified via a call to
`Use::set()`, as our value handles are only notified on deletion and
RAUW. We're not worried about this, though, as the cache is
conservative.

Remove this assertion and add a comment explaining why we may fail to
find.
DeltaFile
+9-36llvm/lib/Analysis/AssumptionCache.cpp
+42-0llvm/test/Analysis/AssumptionCache/remove-from-stale-cache.ll
+51-362 files

LLVM/project 4b44e8fflang/lib/Lower/OpenMP Utils.h Utils.cpp, flang/test/Lower/OpenMP/Todo declare-mapper-iterator-coarray.f90 map-iterator-array-derived-member.f90

Handle unsupported iterator locators without crashing

Analyze iterator map locators without using getBaseObject, whose coarray
case is intentionally unreachable. Share the analysis with map-info
generation so rootedness and lowering agree on supported shapes.

Preserve specific diagnostics for external coarrays and array-element
members, with regressions for both cases.
DeltaFile
+24-48flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+36-0flang/lib/Lower/OpenMP/Utils.cpp
+15-0flang/test/Lower/OpenMP/Todo/map-iterator-array-derived-member.f90
+14-0flang/test/Lower/OpenMP/Todo/declare-mapper-iterator-coarray.f90
+11-0flang/lib/Lower/OpenMP/Utils.h
+100-485 files

LLVM/project b8004ddllvm/lib/Transforms/IPO WholeProgramDevirt.cpp LowerTypeTests.cpp, llvm/test/ThinLTO/X86 devirt_function_alias2.ll

[CFI] Create an external linkage alias instead of promoting internals
DeltaFile
+19-32llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
+35-0llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+29-0llvm/test/Transforms/LowerTypeTests/promoted-internal.ll
+20-5llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+10-7llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
+6-4llvm/test/ThinLTO/X86/devirt_function_alias2.ll
+119-484 files not shown
+130-5610 files

LLVM/project bef86c3libcxx/include/__optional optional_ref.h

[libc++] Collapse `optional<T&>` inheritance hierarchy (#215286)

Resolves #215185

- Since `optional<T>` and `optional<T&>` are decoupled, there wasn't
much reason to have a base class for `optional<T&>`, so we can simplify
it by inlining all of the base members and private functions into it
directly.
- This leaves us with the iterator base which now only exposes the
`iterator` type, since we can also directly inline `begin()` and
`end()`.

---------

Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
DeltaFile
+60-85libcxx/include/__optional/optional_ref.h
+60-851 files

LLVM/project 942ed07clang/lib/Driver/ToolChains Clang.cpp, clang/test/Driver hip-device-libs-llvm-env.hip

[Clang] Include libc wrappers for LLVM environment CUDA / HIP (#208084)

Summary:
These wrappers (although they are empty right now) are used to inform
the offloading runtime of the supported libc / libm functions available
on the device. We do not include these for the standard HIP path because
they conflict with the alreaedy present utilities, but with the
LLVM-only route we should be able to use them.
DeltaFile
+8-6clang/lib/Driver/ToolChains/Clang.cpp
+2-0clang/test/Driver/hip-device-libs-llvm-env.hip
+10-62 files

LLVM/project fae0fc7llvm/include module.modulemap

[modulemap] Exclude the z/OS string.h wrapper from LLVM_Utils (#215800)

8fce476c8122 (https://github.com/llvm/llvm-project/pull/167703) replaced
`llvm/Support/SystemZ/zOSSupport.h` with
`llvm/Support/SystemZ/zos_wrappers/string.h`, a wrapper that pulls in
the system header via `#include_next` and then redeclares `strsignal`
and `strnlen` with `asm` labels. It is only meant to be reachable on
z/OS, and `llvm/CMakeLists.txt` adds the directory to the include path
solely when `CMAKE_SYSTEM_NAME` matches OS390.

The header was never excluded from the module map, though.
`LLVM_Utils.Support` is an umbrella over `llvm/Support`, so building
that module textually includes the wrapper on every host. This surfaced
building the Swift compiler on Windows, where `<string.h>` resolves to
the UCRT header that already declares `strnlen` as `_ACRTIMP`, i.e.
`__declspec(dllimport)`:

```
error: cannot apply asm label to function after its first use

    [11 lines not shown]
DeltaFile
+3-0llvm/include/module.modulemap
+3-01 files

LLVM/project a713c17llvm/lib/Target/AMDGPU GCNSubtarget.cpp AMDGPUTargetParser.td, llvm/test/TableGen AMDGPUTargetDefErrors.td

incorporate comments

Change-Id: If727a9eb8459825d555c8784b5d23771312d51ed
DeltaFile
+65-18llvm/lib/Target/AMDGPU/AMDGPU.td
+0-71llvm/lib/Target/AMDGPU/GCNProcessors.td
+34-3llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+0-18llvm/test/TableGen/AMDGPUTargetDefErrors.td
+0-11llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+7-3llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+106-1246 files not shown
+125-14012 files

LLVM/project 6748b36mlir/lib/ExecutionEngine RocmRuntimeWrappers.cpp

[MLIR][ROCm] Export runtime wrappers on Windows (#213046)

Export the ROCm runtime wrapper entry points when building
`mlir_rocm_runtime` as a Windows DLL.

Use `__attribute__((visibility("default")))` on other platforms.

## Motivation

`extern "C"` prevents C++ name mangling, but it does not add symbols to
a
Windows DLL export table. Consequently, `mlir-runner` can load
`mlir_rocm_runtime.dll`, but ORC cannot resolve its `mgpu*` entry
points.

CUDA, SYCL, Vulkan, and SPIR-V runtime wrappers already use explicit
Windows
export annotations. This applies the same approach to the ROCm runtime.


    [24 lines not shown]
DeltaFile
+51-37mlir/lib/ExecutionEngine/RocmRuntimeWrappers.cpp
+51-371 files

LLVM/project 61f2d6cclang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c, llvm/test/tools/llvm-mca/AArch64/Cortex C1Nano-basic-instructions.s C1Nano-neon-instructions.s

Rebase

Created using spr 1.3.7
DeltaFile
+13,767-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+6,347-3,146llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+5,067-2,506llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
+6,869-0llvm/test/tools/llvm-mca/AArch64/HiSilicon/hip12-sve-instructions.s
+2,728-2,728clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+2,724-2,724clang/test/CodeGen/LoongArch/lasx/builtin.c
+37,502-17,9603,084 files not shown
+178,677-78,2383,090 files

LLVM/project 8fda9eeclang/lib/CodeGen CGHLSLRuntime.h CGHLSLRuntime.cpp, clang/test/CodeGenHLSL/semantics semantic.output.hlsl semantic.input.hlsl

Revert "[HLSL] Generate semantic signature metadata" (#215844)

Reverts llvm/llvm-project#212892

Build dependency for `DXILResource.h` was not updated. I will reland
with the corrected dependency.
DeltaFile
+43-145clang/lib/CodeGen/CGHLSLRuntime.cpp
+44-17llvm/unittests/Frontend/HLSLSemanticSignatureMetadataTest.cpp
+18-28clang/lib/CodeGen/CGHLSLRuntime.h
+0-11clang/test/CodeGenHLSL/semantics/semantic.output.hlsl
+0-11clang/test/CodeGenHLSL/semantics/semantic.input.hlsl
+0-10llvm/include/llvm/Frontend/HLSL/SemanticSignatures.h
+105-2223 files not shown
+106-2339 files

LLVM/project e48e4e9libcxx/test/benchmarks/containers string.bench.cpp, libcxx/test/benchmarks/containers/associative associative_container_benchmarks.h

[libc++] Guard container benchmarks on library availability (#215408)

Instead of using TEST_STD_VER, use FTMs or requires clauses to enable
benchmarks for some recent features like `append_range`. This is needed
since older versions of the library don't provide these features, so the
container benchmarks as a whole would fail to compile instead of just a
few methods being disabled.
DeltaFile
+1-1libcxx/test/benchmarks/containers/string.bench.cpp
+1-1libcxx/test/benchmarks/containers/sequence/sequence_container_benchmarks.h
+1-1libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
+3-33 files