[mlir][emitc] Deferred emission as expressions (#159975)
The translator currently implements deferred emission for certain ops.
Like expressions, these ops are emitted as part of their users but
unlike expressions, this is mandatory. Besides complicating the code
with a second inlining mechanism, deferred emission's inlining is
limited as it's not recursive.
This patch extends EmitC's expressions to deferred emission ops by (a)
marking them as CExpressions, (b) extending expression interface to mark
ops as always-inline and (c) support inlining of always-inline
CExpressions even when not packed of an `emitc.expression` op, retaining
current behavior.
[Flang][OpenMP] Add -fdo-concurrent alias for -fdo-concurrent-to-openmp
Adds the shorter -fdo-concurrent alias to map DO CONCURRENT loops to
OpenMP.
Co-authored-by: Gemini 3.1 Pro
[flang] Remove `do concurrent` mapping experimental warning
Removes the warning downstream for now since the pass has been validated
on both CPUs and to a lesser extent on GPUs.
[CIR][AMDGPU] Adds amdgcn logb and scalebn builtins (#191344)
Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2065
Support for lowering of `__builtin_amdgcn_logb` and `scalebn` for AMDGPU
builtins to clangIR.
Followed similar lowering from clang->llvmir:
`clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp`.
[CIR] Add calling_conv attribute to FuncOp with lowering support (#189345)
Adds `calling_conv` attribute to `FuncOp` with support
(`cc(amdgpu_kernel)` syntax) and LLVM lowering.
Continuation of #188715 and a partial upstreaming of
[clangir#760](https://github.com/llvm/clangir/pull/760/).
[clang][bytecode] Only revisit C variables with valid initializers (#194881)
We don't mark them as constexpr-unknown, so check that the initializer
can be evaluated.
[mlir][python] expose remaining Location inspection API (#192630)
Addresses #53169. Mirrors the Python bindings pattern used for Attribute
subclasses so that Location discrimination uses `isinstance`, and fills
two small gaps at the same time.
### Approach
Previously `Location` was a single nanobind class with `is_a_file`,
`is_a_name`, etc. predicates, plus field accessors for every kind
defined on the base class. This PR introduces a `PyConcreteLocation<T>`
CRTP template (parallel to `PyConcreteAttribute<T>`) and registers one
subclass per `LocationAttr` kind: `UnknownLoc`, `FileLineColLoc`,
`NameLoc`, `CallSiteLoc`, `FusedLoc`.
TypeID-based downcasting is implemented in `PyLocation::maybeDownCast`
(using `mlirAttributeGetTypeID(mlirLocationGetAttribute(...))`) and
called at the boundaries that return Location objects: `op.location`,
`value.location`, `Location.from_attr`, and the subclass getters
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[LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (#193727)
This patch introduces LASX only legalization and instruction patterns
for vector sign and zero extension operations, which is basically copy
from the https://github.com/llvm/llvm-project/pull/160810 with some
minor change (e.g. deleted unused tablegen pattern).
[orc-rt] Add NativeDylibManager. (#194792)
NativeDylibManager is an orc_rt::Service that supports loading,
unloading, and lookup of symbols via the system dynamic loader's native
APIs.
The current implementation only supports the POSIX dlfcn.h APIs (dlopen,
dlclose, dlsym), but it should be straightforward to extend to Windows.
[WebAssembly] Remove WasmEHFuncInfo (NFC) (#194972)
This removes `WasmEHFuncInfo` class.
This class was created to maintain the information of, "If an exception
is not caught by EHPad A, what is its next unwind destination?". Turns
out this information is already in the CFG.
After #130374, we use the common `findUnwindDestination`:
https://github.com/llvm/llvm-project/blob/113479d119a997e4c4c3eae63e087588c9662121/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp#L2107-L2164
Note that in case of `catchswitch`, we follow its unwind destination
chain and add all of them to the invoke BB's successors until it meets a
`cleanuppad`, which always catches an exception. And the order of the
successor is the order of the unwind destination chain. So an invoke
BB's successor list would be like: [normal destination, unwind EHPad 1,
unwind EHPad 2, unwind EHPad 3, ...] where EHPad 2 is the next unwind
destination if EHPad 1 does not catch an exception and so on. So if we
want to know what the current EHPad's next unwind destination is, we can
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[RISCV] Remove isAsmParserOnly from isPseudo instructions. NFC (#194958)
isAsmParserOnly is only used to suppress DecoderEmiter, but that's
already supressed by isPseudo. The real usage for this should be for
instructions that have encoding information but we don't want to
disassemble.
Many of these pseudos are emitted from codegen meaning they aren't
really assembler only. So you can't argue this flag is good for
documentation either.
[RISCV] Remove isAsmParserOnly from LongBccPseudo and LongBcciPseudo. NFC (#194949)
These instructions are created by assembler relaxation. They aren't
"parsed.". isAsmParserOnly suppresses the disassembler for these, but
that was already suppressed by isPseudo and isCodeGenOnly.
IR: Introduce !elf_section_properties for setting section properties.
This new metadata type may be used to set sh_type and sh_entsize on a
global's section. The intent is that it will be used to mark up
CFI jump table sections.
Reviewers: fmayer, MaskRay, nikic, efriedma-quic
Reviewed By: fmayer
Pull Request: https://github.com/llvm/llvm-project/pull/149260
