[X86][llvm-exegesis] fix LNLP performance counter binding issue (#146348)
We added LNLP sched model recently, PFM counter bounding names needs to
match cpu string.
llvm-exegesis wont produce results without correct naming.
Co-authored-by: mattarde <mattarde at intel.com>
CodeView: Move MCCVDefRangeFragment storage to MCContext/MCFragment. NFC (#146462)
so that ~MCCVInlineLineTableFragment will become trivial when we
make ~MCEncodedFragment trivial (#146307).
[lldb][Mach-O] Fix several bugs in x86_64 Mach-O corefile (#146460)
reading, and one bug in the new RegisterContextUnifiedCore class.
The PR I landed a few days ago to allow Mach-O corefiles to augment
their registers with additional per-thread registers in metadata exposed
a few bugs in the x86_64 corefile reader when running under different CI
environments. It also showed a bug in my RegisterContextUnifiedCore
class where I wasn't properly handling lookups of unknown registers
(e.g. the LLDB_GENERIC_RA when debugging an intel target).
The Mach-O x86_64 corefile support would say that it had fpu & exc
registers available in every corefile, regardless of whether they were
actually present. It would only read the bytes for the first register
flavor in the LC_THREAD, the GPRs, but it read them incorrectly, so
sometimes you got more register context than you'd expect. The LC_THREAD
register context specifies a flavor and the number of uint32_t words;
the ObjectFileMachO method would read that number of uint64_t's,
exceeding the GPR register space, but it was followed by FPU and then
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[mlir][Vector] Add constant folding for vector.from_elements operation (#145849)
### Summary
This PR adds a new folding pattern for **vector.from_elements** that
canonicalizes it to **arith.constant** when all input operands are
constants.
### Implementation Details
**Leverages FoldAdaptor capabilities**: Uses adaptor.getElements() to
access **pre-computed** constant attributes, avoiding redundant pattern
matching on operands.
### Example Transformation
```
Before:
%c0_i32 = arith.constant 0 : i32
%c1_i32 = arith.constant 1 : i32
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[NFC][IR2Vec] Remove unreachable code and simplify invalid mode test (#146459)
The code following `llvm_unreachable` is optimized out in Release builds. In this case, `Embedder::create` do not seem to return `nullptr` causing `CreateInvalidMode` test to break. Hence removing `llvm_unreachable`.
[Analysis] Fix a warning
This patch fixes:
llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp:132:12:
error: moving a local object in a return statement prevents copy
elision [-Werror,-Wpessimizing-move]
[IR2Vec] Simplifying creation of Embedder (#143999)
This change simplifies the API by removing the error handling complexity.
- Changed `Embedder::create()` to return `std::unique_ptr<Embedder>` directly instead of `Expected<std::unique_ptr<Embedder>>`
- Updated documentation and tests to reflect the new API
- Added death test for invalid IR2Vec kind in debug mode
- In release mode, simply returns nullptr for invalid kinds instead of creating an error
(Tracking issue - #141817)
[LLD][ELF] Skip non-SHF_ALLOC sections when checking max VA and max VA difference in relaxOnce() (#145863)
For non-SHF_ALLOC sections, sh_addr is set to 0.
Skip sections without SHF_ALLOC flag, so `minVA` will not be set to 0
with non-SHF_ALLOC sections, and the size of non-SHF_ALLOC sections will
not contribute to `maxVA`.
[RISCV] Add LLVM IR intrinsicis vrgatherei16/vslideup/vslidedown support for Zvfbfmin (#146312)
This patch add LLVM IR intrinsicis vrgatherei16/vslideup/vslidedown
support for Zvfbfmin.
[MLGO] Fix feature iteration using FeatureMap.size() instead of NumberOfFeatures (#146436)
Due to the changes made in #143479, size of `FeatureMap` reflects the number of features used. Hence replacing `NumberOfFeatures` with `FeatureMap.size()` in the `DevelopmentModeInlineAdvisor`.
[Clang][LoongArch] Fixed incorrect _BitInt(N>64) alignment (#145297)
This patch makes determining alignment and width of BitInt to be target
ABI specific and makes it consistent with [Procedure Call Standard for
the LoongArch™ Architecture] for LoongArch target
(https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc).