LLVM/project 689040c — llvm/include/llvm/CodeGen TargetLoweringObjectFileImpl.h, llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp

CodeGen: Remove shadowing TargetMachine members from COFF and M68k TLOFs (#226769)

TargetLoweringObjectFile::Initialize already records the TargetMachine
in a base class field.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+0-3llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
+0-2llvm/lib/Target/M68k/M68kTargetObjectFile.h
+0-1llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+0-1llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+0-74 files

LLVM/project e9072bd — llvm/include/llvm/TargetParser Triple.h, llvm/lib/Target/ARM ARMTargetMachine.cpp

ARM: Move abi name implied float abi to TargetParser

ARMTargetMachine overrode the default float abi based on the abi name.
Move this logic to TargetParser so the ABI will be computable without
depending on codegen.

Co-Authored-By: Claude Sonnet 5 <noreply at anthropic.com>
DeltaFile
+6-4llvm/lib/TargetParser/Triple.cpp
+1-8llvm/lib/Target/ARM/ARMTargetMachine.cpp
+4-2llvm/include/llvm/TargetParser/Triple.h
+11-143 files

LLVM/project 42240ff — llvm/include/llvm/CodeGen TargetLoweringObjectFileImpl.h, llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp

CodeGen: Remove shadowing TargetMachine members from COFF and M68k TLOFs

TargetLoweringObjectFile::Initialize already records the TargetMachine in a
base class field.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+0-3llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
+0-2llvm/lib/Target/M68k/M68kTargetObjectFile.h
+0-1llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+0-1llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
+0-74 files

LLVM/project 144fc4b — llvm/include/llvm/IR Constant.h, llvm/lib/IR Constants.cpp

fixup! [ValueTracking] Support Array and Structure in contains* check
DeltaFile
+14-10llvm/include/llvm/IR/Constant.h
+1-1llvm/lib/IR/Constants.cpp
+15-112 files

LLVM/project 396de6b — clang/cmake/modules ClangConfig.cmake.in CMakeLists.txt

[CMake] Link MLIR if CLANG_ENABLE_CIR

CIR requires MLIR to build. However, MLIR doesn't have a separate
config file; it dependencies are checked by ClangTarget.cmake without
linking the MLIR library. Link against MLIR in ClangCOnfig.cmake when
CIR is enabled.
DeltaFile
+19-0clang/cmake/modules/CMakeLists.txt
+2-0clang/cmake/modules/ClangConfig.cmake.in
+21-02 files

LLVM/project 57721b7 — orc-rt/include CMakeLists.txt, orc-rt/include/orc-rt-c config.h.in

[orc-rt] Move ORC_RT_LOG_ENABLED out of config.h; catch typos. (#226751)

Move ORC_RT_LOG_ENABLED to orc-rt-c/support/LogLevel.h so that config.h
is kept for build options only.

Switch to using function-like macros so that typos in level-names become
compilation errors.
DeltaFile
+37-0orc-rt/include/orc-rt-c/support/LogLevel.h
+0-32orc-rt/include/orc-rt-c/config.h.in
+2-1orc-rt/include/orc-rt-c/support/Logging.h
+1-0orc-rt/include/orc-rt/bedrock/Session.h
+1-0orc-rt/include/CMakeLists.txt
+41-335 files

LLVM/project 220b5f5 — clang/test/SemaCXX new-nothrow-by-value.cpp

fixup! [Clang][ExprConst] Accept prvalue for nothrow new
DeltaFile
+2-2clang/test/SemaCXX/new-nothrow-by-value.cpp
+2-21 files

LLVM/project c514037 — clang/test/SemaCXX new-nothrow-by-value.cpp

fixup! [Clang][ExprConst] Accept prvalue for nothrow new
DeltaFile
+1-0clang/test/SemaCXX/new-nothrow-by-value.cpp
+1-01 files

LLVM/project a7bae76 — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering unlowered-address-spaces.cir

[CIR] Reject language address spaces in DirectToLLVM pointer conversion

Reject unlowered language address spaces in pointer types when bypassing TargetLowering. Guard pointer-producing lowerings, including generated patterns, so failed conversions report legalization failures instead of silently selecting address space zero or constructing invalid LLVM operations.

Assisted-by: Codex / GPT-6
DeltaFile
+545-0clang/test/CIR/Lowering/unlowered-address-spaces.cir
+64-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+2-0clang/utils/TableGen/CIRLoweringEmitter.cpp
+611-03 files

LLVM/project ff0e4e8 — clang/include/clang/CIR LoweringHelpers.h, clang/include/clang/CIR/Dialect/IR CIROps.td

[CIR] Propagate initializer type adjustment failures

Reject initializers whose active members have no LLVM representation, including when an enclosing union's storage type is convertible. Propagate recursive adjustment failures before querying data layout or constructing LLVM operations.

Assisted-by: Codex / GPT-6
DeltaFile
+66-0clang/test/CIR/Lowering/unsupported-initializer-types.cir
+13-2clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+12-0clang/lib/CIR/Lowering/LoweringHelpers.cpp
+2-1clang/include/clang/CIR/LoweringHelpers.h
+1-1clang/include/clang/CIR/Dialect/IR/CIROps.td
+94-45 files

LLVM/project 9a0bb94 — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.h LowerToLLVM.cpp, clang/test/CIR/Lowering unsupported-type-conversions.cir

[CIR] Propagate type conversion failures in DirectToLLVM

Propagate failed type and constant conversions through DirectToLLVM so unsupported types produce legalization failures instead of invalid LLVM operations or a void function result.

Assisted-by: Codex / GPT-6
DeltaFile
+178-0clang/test/CIR/Lowering/unsupported-type-conversions.cir
+49-13clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+4-3clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
+231-163 files

LLVM/project 126dbd9 — clang/test/CodeGen/RISCV lto-module-asm-abi.c

[Clang][RISC-V] Fix lto-module-asm-abi.c on non-asserts/no-lld builds (#226752)

Pass `-fno-discard-value-names` so the `entry:` label is preserved in
non-asserts builds, and drop `-fuse-ld=lld` so the driver check succeeds
on bots that do not have `ld.lld` installed.

Fixes: bf529329b5ce ("[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)")
Pull-Request: https://github.com/llvm/llvm-project/pull/226752
DeltaFile
+3-3clang/test/CodeGen/RISCV/lto-module-asm-abi.c
+3-31 files

LLVM/project dbea9bd — bolt/docs conf.py

[docs][bolt] Remove Markdown enum (#226411)

Remove use of Markdown enum from the bolt docs. Related to #223829.

This should fix our ATfL build
[failure](https://github.com/arm/arm-toolchain/actions/runs/36103090912/job/107969633028#step:7:22533)
```
Traceback (most recent call last):
  File "/workspace/python/.venv/lib/python3.12/site-packages/sphinx/config.py", line 529, in eval_config_file
    exec(code, namespace)  # NoQA: S102
    ^^^^^^^^^^^^^^^^^^^^^
  File "/workspace/src/bolt/docs/conf.py", line 18, in <module>
    globals().update(common_conf(tags, markdown=Markdown.NEVER))
                                                ^^^^^^^^
NameError: name 'Markdown' is not defined
```
DeltaFile
+1-1bolt/docs/conf.py
+1-11 files

LLVM/project 4c85cbe — clang/docs SafeBuffers.md LanguageExtensions.md, clang/docs/analyzer checkers.md

[docs] Replace clang.llvm.org/docs links with Sphinx links (#222507)

Use Sphinx document and option roles or project-relative links for links
within the Clang documentation. Repair stale generated-document
fragments found while validating the replacements. This ensures that
standalone documentation builds are self-contained, although
cross-project links (Clang->LLVM) typically go via absolute llvm.org
hrefs.

Part of #214861

Assisted-by: Codex
DeltaFile
+6-6clang/docs/LifetimeSafety.md
+5-5clang/docs/LanguageExtensions.md
+4-4clang/docs/analyzer/checkers.md
+3-4clang/docs/SafeBuffers.md
+3-3clang/docs/analyzer/user-docs/Annotations.md
+5-0utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md
+26-2215 files not shown
+46-4121 files

LLVM/project ef60af8 — clang/test/SemaCXX new-nothrow-by-value.cpp

fixup! [Clang][ExprConst] Accept prvalue for nothrow new
DeltaFile
+1-0clang/test/SemaCXX/new-nothrow-by-value.cpp
+1-01 files

LLVM/project 991285a — llvm/test/CodeGen/AMDGPU bitinsert-bitextract.ll, llvm/test/CodeGen/ARM bitinsert-bitextract-fp.ll bitinsert-bitextract.ll

Merge branch 'main' into users/aokblast/clang/nothrow_new_prvalue
DeltaFile
+6,086-6,026llvm/test/CodeGen/RISCV/rvv/expandload.ll
+4,294-0llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
+3,321-0llvm/test/CodeGen/ARM/bitinsert-bitextract.ll
+1,989-0llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
+1,976-0llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
+1,552-0llvm/test/CodeGen/ARM/bitinsert-bitextract-fp.ll
+19,218-6,0261,125 files not shown
+55,449-20,1781,131 files

LLVM/project 50f8025 — clang/include/clang/AST APValue.h, clang/lib/AST ExprConstant.cpp

[clang][AST] Mark APValue as LLVM_ATTRIBUTE_WARN_UNUSED (#226632)
DeltaFile
+1-2clang/lib/AST/ExprConstant.cpp
+2-1clang/include/clang/AST/APValue.h
+3-32 files

LLVM/project b3b1a5f — llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/test/MC/AMDGPU reloc-operands-vopd.s

[AMDGPU][MC] Fixed an issue where VOPD instruction doesn't accept a relocatable symbol

Fixes LCOMPILER-2797.
DeltaFile
+21-0llvm/test/MC/AMDGPU/reloc-operands-vopd.s
+8-2llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+29-22 files

LLVM/project ff5453f — clang/lib/AST ExprConstant.cpp, clang/test/SemaCXX new-nothrow-by-value.cpp

[Clang][ExprConst] Accept prvalue for nothrow new

A user defined operator new can accept prvalue for nothrow. There is
no guarantee in spec that it should be lvalue. Relax the check with
side effect only.
DeltaFile
+18-0clang/test/SemaCXX/new-nothrow-by-value.cpp
+5-2clang/lib/AST/ExprConstant.cpp
+23-22 files

LLVM/project 0905c19 — clang/test/CodeGen/RISCV lto-module-asm-abi.c

[Clang][RISC-V] Fix lto-module-asm-abi.c on non-asserts/no-lld builds

Pass `-fno-discard-value-names` so the `entry:` label is preserved in
non-asserts builds, and drop `-fuse-ld=lld` so the driver check succeeds
on bots that do not have `ld.lld` installed.

Fixes: bf529329b5ce ("[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)")
DeltaFile
+3-3clang/test/CodeGen/RISCV/lto-module-asm-abi.c
+3-31 files

LLVM/project 32ee4f7 — llvm/include/llvm/CodeGen SDPatternMatch.h

[SDPatternMatch] Simplify EffectiveOperands and drop the template specialization. NFC (#226036)

The chain and glue operands are in fixed locations, we don't need a loop
to find them.

Use the template parameter to skip the constructor body instead of using
template specialization.
DeltaFile
+9-18llvm/include/llvm/CodeGen/SDPatternMatch.h
+9-181 files

LLVM/project e54a8d1 — llvm/cmake/modules GetLibraryName.cmake

[cmake][Windows] Fix CMake variable (#226745)

As a follow-up fix to #226635, the variable is `WIN32` not `Win32`.
DeltaFile
+1-1llvm/cmake/modules/GetLibraryName.cmake
+1-11 files

LLVM/project fb9596b — mlir/lib/Target/LLVMIR/Dialect/LLVMIR LLVMToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR llvmir.mlir

[MLIR][LLVM] Produce canonical const GEP in convertGEPOp (#226699)

The DataLayout overload of ConstantExpr::getGetElementPtr is the form
that replaces typed constant GEPs. Use it for inrange GEPs and fail
translation when the indices cannot be reduced to a byte offset.

This resolves
https://github.com/llvm/llvm-project/pull/220424#discussion_r4092337505

Assisted-by: grok-4.7
Signed-off-by: Letu Ren <fantasquex at gmail.com>
DeltaFile
+6-1mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
+1-1mlir/test/Target/LLVMIR/llvmir.mlir
+7-22 files

LLVM/project b380036 — .github/workflows docs.yml

[Github] Build BOLT docs on changes (#226747)

We were already set up to build the BOLT docs, but the workflow did not
actually trigger on changes to the BOLT docs specifically. This change
fixes that.
DeltaFile
+2-0.github/workflows/docs.yml
+2-01 files

LLVM/project 39e419c — llvm/lib/Analysis ValueTracking.cpp, llvm/lib/IR Constants.cpp

[ValueTracking] Support Array and Structure in contains* check

Support Vector and Structure in containsUndefinedElement,
containsUndefOrPoisonElement, and containsConstantExpression. This is
achieved by using containsMatchingElement helper function, which
checks type recursively as Structure and Array are aggregates, which
can contain basically anything inside. This allows InstCombine to
fold these two types correctly.
DeltaFile
+82-0llvm/test/Transforms/InstCombine/freeze.ll
+34-9llvm/lib/IR/Constants.cpp
+5-5llvm/test/Transforms/Attributor/nofpclass.ll
+1-1llvm/lib/Analysis/ValueTracking.cpp
+122-154 files

LLVM/project 621339c — llvm/lib/Target/AMDGPU GCNSubtarget.h, llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

[AMDGPU] Remove BaseInfo duplicates of TargetParser APIs

Use TargetParser for LDS sizes and VGPR hardware limits, retaining the
backend handling of dynamic VGPR allocation and architectural VGPRs on
targets with a unified register file.

Remove the TargetID factory wrapper and redundant type and SGPR constant
aliases. Update the subtarget, assembler, disassembler, target streamer,
and occupancy calculator callers.

Cover physical LDS allocation boundaries across GPU generations and
full/half-SIMD modes in the assembler tests.

Change-Id: Iacae35d939d8bc1d5d78ad9e545c6f1eb5cd38fe
DeltaFile
+9-86llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+1-23llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+15-0llvm/test/MC/AMDGPU/elf-lds-size.s
+6-1llvm/lib/Target/AMDGPU/GCNSubtarget.h
+4-2llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+3-2llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+38-1144 files not shown
+46-12210 files

LLVM/project 0e2ebe7 — llvm/lib/Target/RISCV RISCVAsmPrinter.cpp, llvm/test/CodeGen/RISCV module-asm-features.ll riscv-func-target-feature.ll

[RISC-V] Update streamer ArchString in emitTargetFeaturePush() (#225133)

Previously, RISCVAsmPrinter::emitTargetFeaturePush() only emitted `.option push`
and `.option arch` without updating the streamer's active ArchString. When
emitting an ELF object file directly (`-filetype=obj`),
RISCVTargetELFStreamer::emitDirectiveOptionArch() is a no-op while
emitTargetFeaturePop() resets ArchString back to the pushed ArchString, so
module-level inline assembly and functions with custom `target-features` failed
to emit updated `$x<arch>` mapping symbols.

Call RTS.setArchString() with the parsed ISA string in emitTargetFeaturePush()
so `-filetype=obj` records the active `$x<arch>` mapping symbol alongside
`.option arch`.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225133
DeltaFile
+2-5llvm/test/CodeGen/RISCV/module-asm-features.ll
+4-3llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
+2-0llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+8-83 files

LLVM/project 6eeb3b4 — cross-project-tests/riscv lto-inline-asm-abi.c, llvm/lib/Target/RISCV/MCTargetDesc RISCVTargetStreamer.h RISCVTargetStreamer.cpp

[RISC-V][MC] Update ELF streamer ArchString in setFlagsFromFeatures() (#225140)

During LTO, the TargetMachine subtarget is initialized with the linker's
default CPU (e.g. `generic-rv64`, `rv64i2p1`), while
RISCVAsmPrinter::emitStartOfAsmFile() reconstructs the module's actual ISA from
the `riscv-isa` module flag and calls RISCVTargetStreamer::setFlagsFromFeatures()
and RISCVTargetStreamer::emitTargetAttributes(). Because
RISCVTargetELFStreamer previously only initialized InitialArchString and
ArchString in its constructor rather than in setFlagsFromFeatures(), direct
object emission bypassed the update and tagged `.text` with `$xrv64i2p1`
instead of the module's full architecture string.

Move the InitialArchString and ArchString initialization into
RISCVTargetELFStreamer::setFlagsFromFeatures() and also call setArchString()
alongside emitTextAttribute(RISCVAttrs::ARCH, ...) in
RISCVTargetStreamer::emitTargetAttributes().

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225140
DeltaFile
+17-12llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
+8-11cross-project-tests/riscv/lto-inline-asm-abi.c
+3-2llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
+3-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+1-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
+32-275 files

LLVM/project 0ab3502 — llvm/lib/Target/RISCV/MCTargetDesc RISCVELFStreamer.cpp, llvm/test/MC/RISCV mapping-across-sections.s

[RISC-V][MC] Fix mapping symbol section tracking on popSection() (#225131)

Previously, RISCVELFStreamer::changeSection() saved LastEMS and LastEmittedArch
under getPreviousSection().first instead of getCurrentSection().first. When
MCStreamer::popSection() switches back to a previous section,
getPreviousSection() already points to the destination section being restored
rather than the section being exited. This clobbered the destination section's
saved mapping symbol state and caused duplicate `$x<arch>` mapping symbols to
be emitted whenever returning to `.text`.

Use getCurrentSection().first instead, matching AArch64ELFStreamer and
ARMELFStreamer.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225131
DeltaFile
+1-6llvm/test/MC/RISCV/mapping-across-sections.s
+3-3llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
+4-92 files

LLVM/project 22d3ccc — cross-project-tests/riscv lto-inline-asm-abi.c, llvm/lib/LTO LTO.cpp

[LTO] Preserve module inline asm target properties for .lto_discard and symvers (#225130)

Previously, LTO::addRegularLTO() and IRLinker::run() called
prependModuleInlineAsm() and appendModuleInlineAsm() with a plain string when
synthesizing `.lto_discard` and imported `.symver` directives, creating a new
GlobalAsmFragment with empty TargetCPU and TargetFeatures instead of preserving
the existing module inline asm's properties. Copy the front fragment's Props so
these synthesized directives are merged into the module's inline asm with the
same target features.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225130
DeltaFile
+2-5cross-project-tests/riscv/lto-inline-asm-abi.c
+1-4llvm/test/LTO/RISCV/module-asm.ll
+2-1llvm/lib/Linker/IRMover.cpp
+1-1llvm/lib/LTO/LTO.cpp
+6-114 files