LLVM/project 2952243libc/src/__support/OSUtil/linux/x86_64 syscall.h

[libc] Force to inline syscall_impl on x86_64 (#178153)

With currently only LIBC_INLINE, we just hint the compiler to inline the
function which however in practice is not always the case.

This is in preparation for adding SHSTK support which requires the
system call enabling it to be inlined into do_start().
DeltaFile
+17-12libc/src/__support/OSUtil/linux/x86_64/syscall.h
+17-121 files

LLVM/project 18b70ce.github/workflows libcxx-build-and-test.yaml, libcxx/test/libcxx/gdb gdb_pretty_printer_test.sh.cpp

[libc++] Switch to the new docker image in the CI (#185843)

This also simplifies the workflow file a bit and removes a redundant
`generic-cxx26` configuration in stage 3.
DeltaFile
+8-18.github/workflows/libcxx-build-and-test.yaml
+1-1libcxx/test/libcxx/gdb/gdb_pretty_printer_test.sh.cpp
+9-192 files

LLVM/project a5aa136llvm/lib/Target/AMDGPU AMDGPU.td SIInstrInfo.cpp, llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp

[AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (#185878)
DeltaFile
+13-10llvm/lib/Target/AMDGPU/AMDGPU.td
+3-2llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+3-1llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+0-4llvm/lib/Target/AMDGPU/GCNSubtarget.h
+0-4llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+2-2llvm/lib/Target/AMDGPU/VOP3Instructions.td
+21-232 files not shown
+21-268 files

LLVM/project 2f5d9b6llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp InstructionCombining.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-phi.ll simplify-demanded-fpclass.ll

InstCombine: Support basic phis in SimplifyDemandedFPClass (#184124)

Some complex function edge case epilogs are only handled under
some control flow paths (e.g. lgamma and erfcinv).
DeltaFile
+102-45llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+20-37llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-phi.ll
+3-5llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+2-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+1-1llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+128-895 files

LLVM/project 0195511llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine select-and-or.ll

[InstCombine] Fix profile metadata propagation in InstCombine select folding (#179743)

Propagate profile metadata when canonicalizing SPF and drop it when
folding select instructions with logical AND/OR conditions. This fixes
profile verification failures in Transforms/InstCombine/select-and-or.ll.


 1. Select Pattern Factor (SPF) Canonicalization
When canonicalizing SPF patterns (like umax/umin), InstCombine
transforms sequences like select i1 %cond,(select i1 %cmp, %x, %y), %z
into intrinsic calls wrapped in a new select. The new outer select
directly replaces the original select instruction, and its condition
(%cond) remains structurally identical. Because the condition and its
evaluated true/false semantics are unchanged, it is ok to copy the
original !prof branch weight metadata to the newly created select.

2. Logical Boolean Folds (foldSelectOfBools)
For logical boolean folds (e.g., transforming select (~a | c), a, b into
select a, (select c, true, b), false), InstCombine restructures complex

    [3 lines not shown]
DeltaFile
+37-25llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+21-20llvm/test/Transforms/InstCombine/select-and-or.ll
+0-1llvm/utils/profcheck-xfail.txt
+58-463 files

LLVM/project 79d2444llvm/test/TableGen ArtificialSubregs.td ArtificialRegs.td, llvm/utils/TableGen RegisterInfoEmitter.cpp

[TableGen] Let -register-info-debug dump the Artificial flag (#185899)

Dump the Artificial flag for RegisterClasses, SubRegIndices and
Registers. To avoid clutter it is only dumped when the flag is set (has
value 1).
DeltaFile
+10-0llvm/test/TableGen/ArtificialSubregs.td
+7-0llvm/test/TableGen/ArtificialRegs.td
+6-0llvm/utils/TableGen/RegisterInfoEmitter.cpp
+23-03 files

LLVM/project 5842a0fmlir/lib/Dialect/Affine/Transforms SuperVectorize.cpp, mlir/test/Dialect/Affine/SuperVectorize vectorize_unsupported.mlir

[mlir][affine] Bail out when store permutation map has broadcast dimensions (#184618)

When the vectorized loop is an outer loop and the store index uses an
inner loop's IV (which is invariant w.r.t. the outer loop),
makePermutationMap
produces a broadcast map (e.g. (d0) -> (0)). A vector.transfer_write
with
broadcast dimensions is invalid, causing a verifier error.

Fix: check for AffineConstantExpr results in the store permutation map
and
bail out of vectorization, preserving the scalar loop nest.

Fixes #131135

Assisted-by: Claude Code
DeltaFile
+25-0mlir/test/Dialect/Affine/SuperVectorize/vectorize_unsupported.mlir
+9-0mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
+34-02 files

LLVM/project b1bc05dllvm/docs LangRef.rst, llvm/include/llvm/IR DataLayout.h

[DataLayout] Add a specifier for element-aligned vectors (#180617)

This adds the "ve" specifier to Data Layout, which says that vectors are
element-aligned by default for a target.

Note that we also remove the default vector specs for 64 and 128 bit
vectors - these match the natural alignment of those vectors, so they
didn't actually have any functional effect.
DeltaFile
+49-8llvm/unittests/IR/DataLayoutTest.cpp
+11-6llvm/lib/IR/DataLayout.cpp
+4-0llvm/include/llvm/IR/DataLayout.h
+3-0llvm/docs/LangRef.rst
+67-144 files

LLVM/project fd742dcutils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel][mlir] Remove non-existent file mlir/run_lit.sh (#185729)

This file does not exist. Surprisingly, it's not a fatal error to have
it in the list, as long as you don't explicitly reference it.
DeltaFile
+0-1utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+0-11 files

LLVM/project 6fc6de0llvm/lib/Target/DirectX DXILResourceAccess.cpp, llvm/test/CodeGen/DirectX/ResourceAccess load-rawbuffer-wide.ll store-rawbuffer-wide.ll

[DirectX] Split long vectors in DXILResourceAccess (#184732)

If a vector has more than 4 elements, the `resource.load` and
`resource.store`
intrinsics aren't able to handle it. Split these into multiple calls.

Fixes #167542
DeltaFile
+89-34llvm/lib/Target/DirectX/DXILResourceAccess.cpp
+71-0llvm/test/CodeGen/DirectX/ResourceAccess/load-rawbuffer-wide.ll
+58-0llvm/test/CodeGen/DirectX/ResourceAccess/store-rawbuffer-wide.ll
+218-343 files

LLVM/project 2242ee2clang/include/clang/Basic DiagnosticDriverKinds.td, clang/include/clang/Options Options.td

[Metal][HLSL] Add support for dumping reflection (#185444)

The Metal Shader converter can output shader reflection information into
a JSON file. This connects the -Fre flag (DXC's flag for reflection) to
the Metal Shader Converter tool step to produce the JSON file. As a
temporary state the -Fre flag will error when used without the -metal
flag.

This is required to address
https://github.com/llvm/offload-test-suite/issues/452

Re-land #181258
DeltaFile
+22-0clang/lib/Driver/ToolChains/HLSL.cpp
+10-0clang/test/Driver/HLSL/metal-converter.hlsl
+8-0clang/test/Driver/HLSL/fre-errors.hlsl
+2-0clang/include/clang/Basic/DiagnosticDriverKinds.td
+2-0clang/include/clang/Options/Options.td
+44-05 files

LLVM/project d6b32e7cross-project-tests/debuginfo-tests/dexter/dex/debugger/lldb LLDB.py

[Dexter] Add missing calls to SBDebugger::{Initialize,Terminate} (#185535)

When using LLDB, the first and last call should be
SBDebugger::Initialize and SBDebugger::Terminate respectively.

While we're resilient against mistakes, I'm adding an assert (#185162)
to debug builds to catch those mistakes in-tree as they have the
potential to leak resources. The assert was tripped by Dexter.

This PR adds the missing calls to SBDebugger::{Initialize,Terminate},
and while I was at it, I also added a missing call to
SBDebugger::Destroy. With that, the Dexter tests pass locally with the
assert enabled.
DeltaFile
+10-2cross-project-tests/debuginfo-tests/dexter/dex/debugger/lldb/LLDB.py
+10-21 files

LLVM/project f58cffblldb/source/Core Debugger.cpp, lldb/test/Shell/Settings TestTestingSettings.test

[lldb][Debugger] Register 'testing.XXX' settings with Debugger (#185897)

The `testing.XXX` settings (added in
https://github.com/llvm/llvm-project/pull/177279 and currently just
`testing.inject-variable-location-error`) are supposed to only exist in
asserts builds. However, we never added it as a global property to the
`Debugger`, so the setting wasn't actually usable, in any build.

The one test that did use it [skipped the test on
error](https://github.com/llvm/llvm-project/blob/230e4656170e3764db28b54d91153a1117290171/lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py#L286-L288)
as a way to mimick "only run test in asserts mode". However, this just
meant the test never ran.

This patch registers the property and adds a test that ensures an
asserts-LLDB does allow access to it from the CLI.
DeltaFile
+7-0lldb/test/Shell/Settings/TestTestingSettings.test
+6-0lldb/source/Core/Debugger.cpp
+13-02 files

LLVM/project a9006adclang-tools-extra/clang-doc JSONGenerator.cpp, clang-tools-extra/clang-doc/assets enum-template.mustache clang-doc-mustache.css

[Clang-doc] Display enum comments in HTML (#183085)

Currently comments of enum variables are not displayed in HTML.
Add support to display the comments.
DeltaFile
+201-0clang-tools-extra/test/clang-doc/json/enum.cpp
+128-15clang-tools-extra/test/clang-doc/enum.cpp
+38-20clang-tools-extra/clang-doc/JSONGenerator.cpp
+22-0clang-tools-extra/clang-doc/assets/enum-template.mustache
+9-1clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
+398-365 files

LLVM/project 3a8a43fllvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/test/CodeGen/AArch64/GlobalISel combine-use-vector-truncate-order.mir

[AArch64][GlobalISel] Fix matchUseVectorTruncate to check element order before folding (#185834)

matchUseVectorTruncate incorrectly folded a
G_UNMERGE_VALUES + G_TRUNC + G_BUILD_VECTOR sequence into a single
vector G_TRUNC even when the BUILD_VECTOR operand order did not match
the UNMERGE_VALUES result order. This silently dropped element
reordering, producing a miscompile.

Add an element-ordering check: BUILD_VECTOR position I must use
UNMERGE_VALUES result I, otherwise the fold is rejected.
DeltaFile
+58-0llvm/test/CodeGen/AArch64/GlobalISel/combine-use-vector-truncate-order.mir
+9-2llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+67-22 files

LLVM/project 30b0600llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp InstructionCombining.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-phi.ll simplify-demanded-fpclass.ll

InstCombine: Support basic phis in SimplifyDemandedFPClass

Some complex function edge case epilogs are only handled under
some control flow paths (e.g. lgamma and erfcinv).
DeltaFile
+102-45llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+20-37llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-phi.ll
+3-5llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+2-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+1-1llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+128-895 files

LLVM/project b2a3c22llvm/test/Transforms/InstCombine simplify-demanded-fpclass-phi.ll

InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (#184123)
DeltaFile
+661-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-phi.ll
+661-01 files

LLVM/project 61978b6clang/lib/Lex InitHeaderSearch.cpp

[Hexagon] Disable implicit system include paths (#185456)

Hexagon toolchains are almost always cross-compiling and using system
include paths is virtually always an error. In general, adding implicit
paths is confusing as they are not shown in the `-###` output. The
comment in `InitHeaderSearch::AddDefaultIncludePaths()` suggests that
"this code path is going away" and the proper place for path selection
is in the driver. The current logic for adding implicit paths in the
preprocessor is on the opt-out basis, but it looks like almost all
majors OSes are explictly excluded.

Disable implicit system include paths for Hexagon targets.


Disable implicit system include paths for Hexagon targets.
DeltaFile
+4-0clang/lib/Lex/InitHeaderSearch.cpp
+4-01 files

LLVM/project 6d362a9mlir/include/mlir/Dialect/XeGPU/Transforms Passes.td XeGPULayoutImpl.h, mlir/lib/Dialect/GPU/Pipelines GPUToXeVMPipeline.cpp

[MLIR][XeGPU] Handle `index` element type in the layout propagation (#184322)
DeltaFile
+10-7mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+5-1mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
+2-1mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
+1-1mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp
+1-0mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
+19-105 files

LLVM/project dc7f744mlir/include/mlir/Dialect/SPIRV/IR SPIRVTosaOps.td, mlir/test/Dialect/SPIRV/IR tosa-ops-verification.mlir tosa-ops.mlir

[mlir][spirv] Add first 7 elementwise unary ops in TOSA Ext Inst Set (#185885)

This patch introduces the following elementwise unary operators:

    spirv.Tosa.Abs
    spirv.Tosa.BitwiseNot
    spirv.Tosa.Ceil
    spirv.Tosa.Clz
    spirv.Tosa.Cos
    spirv.Tosa.Exp
    spirv.Tosa.Floor

Also dialect and serialization round-trip tests have been added.

Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
DeltaFile
+196-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+152-0mlir/test/Target/SPIRV/tosa-ops.mlir
+106-0mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+88-0mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
+542-04 files

LLVM/project 9348026clang/test/Tooling clang-linker-wrapper-spirv-elf.cpp, clang/tools/clang-linker-wrapper ClangLinkerWrapper.cpp

[llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (#185413)

Change SPIRV wrapping done in clang-linker-wrapper from custom ELF to
OffloadBinary.

Depends on:
- #185404 (Accept OffloadBinary in liboffload & L0 plugin)

Follow-up PRs:
- #185425 (Adjusts llvm-objdump)
- #184774 (Adjusts llvm-offload-binary)

---------

Co-authored-by: Yury Plyakhin <yury.plyakhin at intel.com>
DeltaFile
+39-73llvm/lib/Frontend/Offloading/Utility.cpp
+27-4llvm/include/llvm/Frontend/Offloading/Utility.h
+0-22clang/test/Tooling/clang-linker-wrapper-spirv-elf.cpp
+1-1clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
+67-1004 files

LLVM/project 4f76d16libc/include wctype.yaml, libc/src/wctype iswgraph.h iswgraph.cpp

[libc] Implement iswgraph entrypoint (#185339)

part of https://github.com/llvm/llvm-project/issues/185136;

This PR adds public entrypoints for the wide character classification
function iswgraph in LLVM libc, using the same pattern as the existing
iswalpha entrypoint.

using bellow cmd to test:

```shell
ninja libc.test.src.wctype.iswgraph_test.__unit__
```
DeltaFile
+25-0libc/test/src/wctype/iswgraph_test.cpp
+21-0libc/src/wctype/iswgraph.h
+21-0libc/src/wctype/iswgraph.cpp
+12-0libc/src/wctype/CMakeLists.txt
+10-0libc/test/src/wctype/CMakeLists.txt
+6-0libc/include/wctype.yaml
+95-08 files not shown
+103-014 files

LLVM/project 7fed2b1llvm/test/tools/llubi freeze.ll, llvm/tools/llubi/lib Context.cpp Interpreter.cpp

[llubi] Add support for freeze (#185718)

The main logic is implemented in `Context` as the RNG is not exposed
outside the `Context` class.
DeltaFile
+44-0llvm/tools/llubi/lib/Context.cpp
+34-0llvm/test/tools/llubi/freeze.ll
+6-0llvm/tools/llubi/lib/Interpreter.cpp
+3-0llvm/tools/llubi/lib/Context.h
+87-04 files

LLVM/project 6e51372cmake/Modules GetToolchainDirs.cmake

Address some of @petrhosek's review remarks
DeltaFile
+8-8cmake/Modules/GetToolchainDirs.cmake
+8-81 files

LLVM/project 850b2bfllvm/lib/CodeGen MIRPrinter.cpp, llvm/lib/CodeGen/MIRParser MIParser.cpp

[MIR] Support symbolic inline asm operands

Support parsing and printing inline assembly operands in MIR
using the symbolic form instead of numeric register class IDs,
thus removing the need to update tests when the numbers change.

The numeric form remains supported.

Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+109-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+16-16llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir
+25-0llvm/lib/CodeGen/MIRPrinter.cpp
+150-163 files

LLVM/project 230e465mlir/include/mlir/Dialect/SPIRV/IR SPIRVMatrixOps.td

[mlir][spirv][nfc] Remove duplicated availability in MatrixTimesScalar op (#185838)
DeltaFile
+0-7mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMatrixOps.td
+0-71 files

LLVM/project 7d77662clang/test/Driver spirv-tools-err.c

[clang][lit] Fix spirv-tools-err.c when LIT_USE_INTERNAL_SHELL=0 (#185876)

Only the internal shell parser is able to process an operator in the
middle of a command. For the other shells, the operator must appear in
the beginning of the line.
DeltaFile
+1-1clang/test/Driver/spirv-tools-err.c
+1-11 files

LLVM/project b3f56ebllvm/lib/Target/SPIRV SPIRVEmitIntrinsics.cpp, llvm/test/CodeGen/SPIRV alloca-aggregate-type.ll

[SPIRV] fix `alloca` -> `OpVariable` lowering (#164175)

fixes #163777

Test was written with help from Copilot

---------

Co-authored-by: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
DeltaFile
+33-0llvm/test/CodeGen/SPIRV/alloca-aggregate-type.ll
+12-9llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_const.ll
+2-1llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+47-103 files

LLVM/project 44fa337llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV clmul.ll

Merge branch 'main' into users/meinersbur/runtimes_resource-dir
DeltaFile
+74,260-82,978llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+26,713-30,857llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+56,025-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+25,051-14,920llvm/test/CodeGen/RISCV/clmul.ll
+9,044-11,203llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+14,154-5,110llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+205,247-145,0689,779 files not shown
+843,605-385,3319,785 files

LLVM/project ea9f8b7libc/include/llvm-libc-macros cfloat128-macros.h

[libc] Fix detection of cfloat128 (#185486)

Building compiler-rt with aarch64-buildroot-linux-gnu-gcc 15.2 causes a
build error:
```
compiler-rt-22.1.0/cmake/Modules/../../libc/src/__support/CPP/type_traits/is_complex.h:44:31:
 error: 'cfloat128' was not declared in this scope; did you mean 'float128'? [-Wtemplate-body]
```
According to
https://gcc.gnu.org/onlinedocs/gcc-15.2.0/gcc/Floating-Types.html
__float128 is not available on aarch64.

Analyzing the gcc defines for aarch64 seems to prove it:
```
$ aarch64-buildroot-linux-gnu-gcc -v
Target: aarch64-buildroot-linux-gnu
gcc version 15.2.0 (Buildroot 2026.02-114-gdadec9da56)

$ echo | aarch64-buildroot-linux-gnu-gcc -dM -E - | grep __GCC_IEC_559_COMPLEX

    [26 lines not shown]
DeltaFile
+1-1libc/include/llvm-libc-macros/cfloat128-macros.h
+1-11 files