LLVM/project f3d4409mlir/include/mlir-c Diagnostics.h, mlir/lib/CAPI/IR Diagnostics.cpp

[mlir-c] Add mlirEmitWarning and mlirEmitRemark (#206542)

Adds C API entry points for emitting warning and remark diagnostics, complementing the existing `mlirEmitError`.

Assisted by: Claude
DeltaFile
+34-0mlir/test/CAPI/ir.c
+10-0mlir/include/mlir-c/Diagnostics.h
+8-0mlir/lib/CAPI/IR/Diagnostics.cpp
+52-03 files

LLVM/project 2481e34llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sme-za-non-sibling-tailcall.ll sme-za-tailcall-fpdiff-align.ll

[AArch64][SME] Drop ZA marker on tail calls and lower as sibling calls

A tail call from a function with live ZA state was previously prevented
from being lowered as a sibling call to have a CALLSEQ_START to glue
INOUT_ZA_USE to. This led to bogus stack restores.

We now drop the INOUT_ZA_USE marker on tail calls and can thus lower as
sibling calls if needed to take advantage of the existing correct stack
restore behavior.

This is safe to do since tail calls use TCRETURN and the MachineSMEABI
pass requires live ZA state to stay live across returns anyway.
DeltaFile
+13-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-4llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
+0-1llvm/test/CodeGen/AArch64/sme-za-non-sibling-tailcall.ll
+15-53 files

LLVM/project 9343035llvm/test/CodeGen/AArch64 sme-za-non-sibling-tailcall.ll

Add test showing wrong stack restore
DeltaFile
+55-0llvm/test/CodeGen/AArch64/sme-za-non-sibling-tailcall.ll
+55-01 files

LLVM/project d4afedallvm/include/llvm/ADT DepthFirstIterator.h

[ADT] Add back load bearing <vector> include (#225872)

This should fix the build failures reported in
https://lab.llvm.org/buildbot/#/builders/25/builds/19816, looks like
other places were relying on it transitively
DeltaFile
+1-0llvm/include/llvm/ADT/DepthFirstIterator.h
+1-01 files

LLVM/project 2c80b3dclang/test/Driver darwin-static-lib-universal.c

[Clang] Restrict darwin-static-lib-universal.c in cross-builds (#225447)

A new test was added in 841dbaab188ecfa756d4c946f33b58758d34d339 which
will fail when run on macOS if macOS is not set as the default target.
This has previously been solved in other tests by further restricting
the REQUIRES line to also check the target.
DeltaFile
+1-1clang/test/Driver/darwin-static-lib-universal.c
+1-11 files

LLVM/project 5eea521lldb/test/API/api/multithreaded TestMultithreaded.py

[lldb][Windows] skip TestMultithreaded.SBBreakpointCallbackCase.test_python_stop_hook (#225862)

The test is failing in pre-merge testing on Windows.
DeltaFile
+1-0lldb/test/API/api/multithreaded/TestMultithreaded.py
+1-01 files

LLVM/project 36e1dfdlldb/source/Plugins/SymbolFile/NativePDB SymbolFileNativePDB.cpp, lldb/test/Shell/SymbolFile/NativePDB public-symbol-offset-past-section-end.cpp

[lldb][NativePDB] don't assert when a public symbol sits past its section (#225734)

Fix an assertion failure in `SymbolFileNativePDB::AddSymbols` when a
public symbol's offset doesn't agree with its section's size (happens
with real-world PDBs after incremental linking). Instead of asserting,
we now log and skip the size estimate for that symbol.

Also adds a regression test that crafts such a PDB and checks lldb
doesn't crash.

This fixes crashes in swiftlang.
DeltaFile
+30-0lldb/test/Shell/SymbolFile/NativePDB/Inputs/corrupt-public-offset.py
+23-0lldb/test/Shell/SymbolFile/NativePDB/public-symbol-offset-past-section-end.cpp
+16-3lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
+69-33 files

LLVM/project 877e3c8.github/workflows libc-overlay-tests.yml compiler-rt-libc-builtins-tests.yml

[Github] Update remaining libc workflows to Ubuntu 26.04 (#225850)

Some workflows that I missed when trying to do the upgrade previously.
DeltaFile
+2-2.github/workflows/libc-overlay-tests.yml
+3-1.github/workflows/compiler-rt-libc-builtins-tests.yml
+5-32 files

LLVM/project 99492a2llvm/lib/CodeGen PHIElimination.cpp, llvm/test/CodeGen/X86 phi-elimination-dead-def.mir

CodeGen: Mark dead PHI destination copies dead in the LiveIntervals path

When PHIElimination lowers a PHI whose destination is dead, it records a
dead def in LiveIntervals but did not set the dead flag on the lowered copy's
def operand. The LiveVariables path set this via addVirtualRegisterDead.

Avoids "Instruction ending live segment on dead slot has no dead flag" verifier
errors once LiveVariables is removed.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+57-0llvm/test/CodeGen/X86/phi-elimination-dead-def.mir
+5-0llvm/lib/CodeGen/PHIElimination.cpp
+62-02 files

LLVM/project 8913fccllvm/lib/Target/AMDGPU SIRegisterInfo.td, llvm/test/CodeGen/AMDGPU materialize-frame-index-sgpr.ll true16-fold.mir

Reapply "[AMDGPU] Remove definition of hi16 for scalar registers (#197467)" (#201552)

This reapplies #197467. The regression uncovered by this PR has been
fixed in #223653 and a test was added to verify that
`llvm/test/CodeGen/AMDGPU/issue197467-virt-reg-rewrite-failure.mir`.
DeltaFile
+66-54llvm/lib/Target/AMDGPU/SIRegisterInfo.td
+83-0llvm/test/CodeGen/AMDGPU/issue197467-virt-reg-rewrite-failure.mir
+0-57llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
+16-16llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
+0-18llvm/test/CodeGen/AMDGPU/true16-fold.mir
+8-6llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
+173-15113 files not shown
+199-18419 files

LLVM/project 4f22636llvm/include/llvm/CodeGen SDPatternMatch.h, llvm/test/CodeGen/AArch64 abds.ll

[DAG] Don't detect flippable signs in MinMax matchers (#220527)

The Min/MaxLike pattern matchers are the only pattern matchers that use
computeKnownBits. They're used to match a smax as a umax if the operands
are known positive and so forth.

However in practice it has no affect on real-world codegen as correlated
value propagation already does this transform earlier in the pipeline,
including for all the tests changed in this PR:
https://llvm.godbolt.org/z/Pr4Ec1xrv

Nothing in the backends will emit a min/max that needs re-transformed in
this way as far as I'm aware.

Removing computeKnownBits from these matchers allows us to remove the
match context in #218372, and saves some compilation time at O3
https://llvm-compile-time-tracker.com/compare.php?from=2f2aa940de68abcdfe4959ddd3b9a0741a7c2a16&to=b771556fb2a7e9c2cb0c853a4a71ea9641e5ede0&stat=instructions:u
DeltaFile
+0-106llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
+12-12llvm/test/CodeGen/AArch64/abds.ll
+4-16llvm/include/llvm/CodeGen/SDPatternMatch.h
+16-1343 files

LLVM/project 7a7e8bblld/ELF SyntheticSections.h SyntheticSections.cpp, lld/test/ELF ppc64-long-branch-rel14.s systemz-gotent-relax-align.s

[ELF] Retain relocation sections for GOT entries added by relaxOnce (#225594)

x86-64 and SystemZ relax GOTPCRELX/GOTENT and, in relaxOnce, revert
relaxations that turn out to be out of range or misaligned. The reverted
relocation needs a GOT entry, which in -pie/-shared needs a relative
relocation. If .rela.dyn (or .relr.dyn) was empty, it has already been
removed by removeUnusedSyntheticSections, triggering an assertion
failure.

Retain the section that will receive the relative relocations when
relaxOnce may add GOT entries, and recompute .dynamic in each iteration.
This also fixes a truncated .dynamic when PPC64 PI long-branch thunks
add the first relative relocations to .rela.dyn.

LLM-aided. Fixes #224011
DeltaFile
+17-12lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
+16-0lld/test/ELF/systemz-gotent-relax-align.s
+7-1lld/ELF/Writer.cpp
+5-1lld/test/ELF/ppc64-long-branch-rel14.s
+2-1lld/ELF/SyntheticSections.cpp
+2-0lld/ELF/SyntheticSections.h
+49-151 files not shown
+50-167 files

LLVM/project 9baa7efllvm/include/llvm/Support AutoConvert.h

Fix syntax of default parameters
DeltaFile
+3-3llvm/include/llvm/Support/AutoConvert.h
+3-31 files

LLVM/project 7c0029dclang/docs ReleaseNotes.md, clang/lib/AST Expr.cpp

[Clang] Fix integer promotion of bit-fields in statement expressions (#225597)

`Expr::getSourceBitField()` now looks through the final expression of a
statement expression to preserve the bit-field information. This allows
the existing integer promotion rules to correctly promote the bit-field
to `int`.

Also added a regression test for the issue.

Fixes #221542
DeltaFile
+15-0clang/test/Sema/stmtexprs.c
+7-0clang/lib/AST/Expr.cpp
+4-1clang/docs/ReleaseNotes.md
+26-13 files

LLVM/project bb28f52flang/lib/Semantics resolve-names.cpp, flang/test/Semantics enumeration-type-explicit-value.f90 enumeration-type-component-offset.f90

- Added additional tests to fully cover feature semantics.
- Corrected bug detected by those tests that allowed duplicate
  enumerator names.
DeltaFile
+52-0flang/test/Semantics/enumeration-type-misc.f90
+36-0flang/test/Semantics/enumeration-type-declarations.f90
+23-0flang/test/Semantics/enumeration-type-component-usage.f90
+21-0flang/test/Semantics/enumeration-type-component-offset.f90
+12-0flang/test/Semantics/enumeration-type-explicit-value.f90
+8-1flang/lib/Semantics/resolve-names.cpp
+152-16 files

LLVM/project 9c3693bflang/test/Lower io-implied-do-collapse.f90, llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp

Merge branch 'main' into users/adams381/cir-callconv-nonbyval-param-noload
DeltaFile
+548-554llvm/test/CodeGen/X86/load-combine.ll
+575-0llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
+248-296llvm/test/CodeGen/MLRegAlloc/Inputs/reference-log-noml.txt
+482-54llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+523-0flang/test/Lower/io-implied-do-collapse.f90
+389-0llvm/test/ExecutionEngine/JITLink/AArch64/ELF_relocations_be.s
+2,765-904224 files not shown
+8,548-1,824230 files

LLVM/project 6f8bca0llvm/lib/Target/DirectX DXILShaderFlags.cpp, llvm/test/CodeGen/DirectX/ShaderFlags typed-srv-load.ll typed-uav-load-additional-formats.ll

[DirectX] Set TypedUAVLoadAdditionalFormats on UAV texture loads (#225484)

Fixes https://github.com/llvm/llvm-project/issues/225147

This PR makes the `TypedUAVLoadAdditionalFormats` shader flag get set on
UAV texture loads.

Assisted by: GPT 5.6 Sol
DeltaFile
+30-0llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
+10-0llvm/test/CodeGen/DirectX/ShaderFlags/typed-srv-load.ll
+3-1llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+43-13 files

LLVM/project 680fb32llvm/test/CodeGen/X86 load-combine.ll

[X86] load-combine.ll - cleanup check prefixes and don't scrub stack math (#225762)

Ensure all stack addresses are visible
DeltaFile
+548-554llvm/test/CodeGen/X86/load-combine.ll
+548-5541 files

LLVM/project 59e62a9llvm/lib/ProfileData InstrProfWriter.cpp InstrProfReader.cpp, llvm/test/tools/llvm-profdata merge-filter.test text-zero-bitmap.test

[InstrProf] Disambiguate zero bitmaps in text profiles (#213906)
DeltaFile
+51-0llvm/test/tools/llvm-profdata/text-zero-bitmap.test
+6-2llvm/lib/ProfileData/InstrProfReader.cpp
+6-1llvm/test/tools/llvm-profdata/merge-filter.test
+6-0llvm/test/tools/llvm-profdata/Inputs/instr-remap.expected
+2-2llvm/lib/ProfileData/InstrProfWriter.cpp
+2-0llvm/test/tools/llvm-profdata/Inputs/cs.proftext
+73-52 files not shown
+77-58 files

LLVM/project 50b8b5allvm/docs CommandLine.md, llvm/lib/Support CommandLine.cpp

[Support] Remove cl::DefaultOption (#225609)

https://reviews.llvm.org/D59746 added cl::DefaultOption so that the
built-in -h could be overridden by llvm-objdump and llvm-readobj, which
have since moved to OptTable. The remaining overrides just call
PrintHelpMessage, so remove them along with the flag. -h and --help
keep working in every tool.

LLM-aided
DeltaFile
+0-62llvm/unittests/Support/CommandLineTest.cpp
+2-24llvm/lib/Support/CommandLine.cpp
+0-10mlir/lib/Tools/mlir-query/MlirQueryMain.cpp
+0-9mlir/lib/Tools/mlir-reduce/MlirReduceMain.cpp
+0-8llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
+0-8llvm/docs/CommandLine.md
+2-1217 files not shown
+3-15813 files

LLVM/project b07f149clang/docs ConcurrencySanitizer.md

Update ConcurrencySanitizer.md
DeltaFile
+1-1clang/docs/ConcurrencySanitizer.md
+1-11 files

LLVM/project e1125b3llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Run cannotHoistOrSinkRecipe after cheap checks. NFC (#225797)

cannotHoistOrSinkRecipe traverses blocks in the aliasing checks so can
be expensive. We can save some compile time by deferring it after we do
the cheaper checks.

https://llvm-compile-time-tracker.com/compare.php?from=5bb2e21c30de31871dd01279c13abcfa2c06e75f&to=caeacf1cabb08be3608bd02a9b0e683111ab2c6a&stat=instructions:u
DeltaFile
+19-17llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+19-171 files

LLVM/project e840c45compiler-rt/lib/sanitizer_common/symbolizer/scripts global_symbols.txt

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-0compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
+1-01 files

LLVM/project aced947llvm/lib/Target/SPIRV SPIRVLegalizeResourceBinding.cpp, llvm/test/CodeGen/SPIRV/hlsl-resources HeapBinding-uav-counter.ll HeapBinding-texture-sampler.ll

[SPIRV] Add support for dynamic/heap resources (#224488)

Extends the `SPIRVLegalizeImplicitBinding` pass to support heap
resources and renames it to `SPIRVLegalizeImplicitAndHeapBinding`.

The pass scans the module for calls to
`llvm.spv.resource.handlefromheap` and groups them into CBV/SRV/UAV
resources and samplers. Calls to
`llvm.spv.resource.counterhandlefromheap` form a third group.

The SPIR-V backend represents descriptor heaps as unbounded resource
arrays. After resolving implicit bindings, the pass assigns the first
available binding to each heap group in the following order: CBV/SRV/UAV
resources, samplers, and counters.

For each group, the pass will replace the heap intrinsic calls with the
explicit `llvm.spv.resource.handlefrombinding` equivalents using the
assigned binding. The pass does not actually need to create the
unbounded resource-array globals itself. It only needs to assign a

    [10 lines not shown]
DeltaFile
+201-12llvm/lib/Target/SPIRV/SPIRVLegalizeResourceBinding.cpp
+79-0llvm/test/CodeGen/SPIRV/hlsl-resources/HeapBinding-cvb-srv-uav.ll
+68-0llvm/test/CodeGen/SPIRV/hlsl-resources/HeapBinding-texture-sampler.ll
+60-0llvm/test/CodeGen/SPIRV/hlsl-resources/HeapBinding-uav-counter.ll
+44-0llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeRegisterBinding-Heap.ll
+26-0llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeRegisterBinding-Heap2.ll
+478-121 files not shown
+487-127 files

LLVM/project fc7aa5fllvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec ptr_diff.ll

[SandboxVec][NFC] Precommit test (#225221)

This is a test for a follow-up patch that improves pointer the diff
calculation.
DeltaFile
+39-0llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/ptr_diff.ll
+39-01 files

LLVM/project fdb7f68clang/docs ConcurrencySanitizer.md, compiler-rt/lib/csan csan_report.cpp csan.cpp

[compiler-rt] Add 'csan' library for the concurrency sanitizer

Summary:
Adds the runtime for the concurrency sanitizer, both CPU and GPU.
Fundamentally, this works using the following pseudocode:

```c
static u64 watchpoints[N]; // Hash-indexed, zero is empty.

// Emitted before the access, so we never trip on our own write.
void check_access(volatile void *addr, u32 size, u32 type) {
    // Every access probes. A read conflicts only with a watched write, a
    // write conflicts with either.
    if (u64 *wp = find_watchpoint(addr, size, type))
        consume(wp, this_pc()); // Hand our location to the owner.

    if (!should_sample()) // Wave-uniform, 1-in-N chance.
        return;


    [17 lines not shown]
DeltaFile
+456-0compiler-rt/lib/csan/csan_gpu.cpp
+370-0compiler-rt/lib/csan/offload/csan_offload_hsa_interceptors.cpp
+334-0compiler-rt/lib/csan/csan.cpp
+279-0compiler-rt/lib/csan/csan_report.cpp
+212-0clang/docs/ConcurrencySanitizer.md
+184-0compiler-rt/lib/csan/offload/csan_offload_report.cpp
+1,835-052 files not shown
+3,244-558 files

LLVM/project 8b23ce8clang/lib/CodeGen BackendUtil.cpp CodeGenFunction.cpp, clang/lib/Driver SanitizerArgs.cpp

[Clang] Add support for the `-fsanitize=concurrency` runtime

Summary:
Add the frontend sanitizer kind, function attributes, pass pipeline
integration, predefined macro, and driver handling for
ConcurrencySanitizer.
DeltaFile
+82-0clang/test/CodeGen/sanitize-concurrency.c
+31-7clang/lib/Driver/ToolChains/CommonArgs.cpp
+15-0clang/test/Driver/fsanitize.c
+10-4clang/lib/Driver/SanitizerArgs.cpp
+10-3clang/lib/CodeGen/CodeGenFunction.cpp
+7-0clang/lib/CodeGen/BackendUtil.cpp
+155-149 files not shown
+177-1515 files

LLVM/project b33ddc8llvm/test/Transforms/SLPVectorizer/AArch64 fsub-chain-reduction-unpaired-signs.ll

[SLP][NFC]Add a test with the regressed vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/225846
DeltaFile
+67-0llvm/test/Transforms/SLPVectorizer/AArch64/fsub-chain-reduction-unpaired-signs.ll
+67-01 files

LLVM/project 04fe618lldb/unittests/Interpreter CMakeLists.txt, lldb/unittests/Platform CMakeLists.txt

[lldb] Add Options to LINK_COMPONENTS (#225684)

This fixes shared library build of lldb:
```
/usr/bin/ld: lib/liblldbPluginPlatformMacOSX.a(PlatformDarwin.cpp.o): undefined reference to symbol '_ZNK4llvm3opt8OptTable9getOptionENS0_12OptSpecifierE'
/usr/bin/ld: /work/kparzysz/git/llvm.org/b/x86/lib/libLLVMOption.so.24.0git: error adding symbols: DSO missing from command line
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```

And several other cases in unittests.
DeltaFile
+2-0lldb/unittests/Process/CMakeLists.txt
+2-0lldb/unittests/Interpreter/CMakeLists.txt
+1-0lldb/unittests/Target/CMakeLists.txt
+1-0lldb/unittests/Protocol/CMakeLists.txt
+1-0lldb/unittests/Process/gdb-remote/CMakeLists.txt
+1-0lldb/unittests/Platform/CMakeLists.txt
+8-03 files not shown
+11-09 files

LLVM/project 79934b7llvm/test/CodeGen/AMDGPU amdgcn.bitcast.960bit.ll amdgcn.bitcast.256bit.ll

AMDGPU: Preserve dead carry-out when shrinking adds in SIFoldOperands

The VOP3 form of add/sub with carry out are sometimes shrunk to the VOPC
form when the carry out is dead. Preserve this information by setting the
dead flag on the new instruction. This alleviates some implicit dependence
on LiveVariables' later recomputation of dead flags.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+4,860-4,866llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,684-1,713llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+772-790llvm/test/CodeGen/AMDGPU/scratch-simple.ll
+398-401llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+226-247llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+210-221llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+8,150-8,23834 files not shown
+9,629-9,94040 files