[CIR] Use the global address space for the VTT parameter (#240548)
Match classic CodeGen, which types the VTT as a pointer into the target
global address space
Let cir.vtt.address_point carry that address space
[lld] Replace PointerUnion::dyn_cast with llvm::dyn_cast_if_present (NFC) (#240739)
PointerUnion::dyn_cast has been soft-deprecated in favor of
llvm::dyn_cast and llvm::dyn_cast_if_present. This patch replaces
PointerUnion::dyn_cast with llvm::dyn_cast_if_present at the remaining
call sites under lld/MachO/.
Note that Relocation::referent can be null under certain conditions, as
confirmed with local testing.
This patch completes the migration away from PointerUnion::dyn_cast
under lld/.
Assisted-by: Antigravity
[ADT] Add LLVM_ATTRIBUTE_WARN_UNUSED to BitVector (#240738)
This patch adds LLVM_ATTRIBUTE_WARN_UNUSED to BitVector so that
compilers can diagnose unused BitVector variables even though BitVector
has a non-trivial constructor and destructor.
This patch also cleans up two existing warnings uncovered by the
attribute:
- StokeInfo::checkInstr in BOLT had an unused local variable RegV, which
this patch removes.
- BitVectorTest.EmptyVector declared TypeParam F while mistakenly
calling reset and testEmpty on E instead of F, which this patch fixes.
Assisted-by: Antigravity
[SystemZ][z/OS] Don't pad the PPA1 name when it is already word aligned (#240707)
The padding after the PPA1 function name was 4 - (2 + len) % 4, so a
name where 2 + len is already a multiple of 4 got a whole extra word of
zeros. LE Vendor Interfaces (SA38-0688) wants zero to three bytes so the
next optional field starts on a word boundary, so use offsetToAlignment.
zos-section-1.ll moves because its function `me` is the aligned case.
[SandboxVec][LoadStoreVec] Avoid redundant canVectorize() check (NFC) (#237339)
We used to call canVectorize() twice when vectorizing loads because of
the canVectorize() call in createVectorLoad().
This patch moves the canVectorize() check out of createVectorLoad().
Should be an NFC.
[CIR] Let llvmOp lowering forward properties to the LLVM op (#240540)
Lowering patterns generated from `llvmOp` build the LLVM op with default
properties, so every CIR op whose flags map to an LLVM property needed a
hand-written pattern. The new `llvmOpProps` field names the CIR
arguments to forward, e.g. `(ins $overflow_flags)`. The emitter derives
the CIR getter and the LLVM setter from that name, a string gives the
LLVM name when it differs (`(ins "is_zero_poison":$poison_zero)`), and
the value is converted by the `convertToLLVMProperty` overload for its
C++ type. This removes 14 hand-written patterns: `cir.add`/`sub`/`mul`,
the FP vector reductions, `cir.clz`, `cir.ctz`, `cir.abs` and
`cir.is_fp_class` use `llvmOpProps`, and `cir.popcount`,
`cir.vec.extract` and `cir.vec.insert` need only `llvmOp`.
Ops whose LLVM properties come from types or constants, or that
synthesize operands, still lower by hand.
Assisted-by: Claude Code (Claude Opus 5.5).
Attributor: Get the associated value of a call site argument from its use
IRPosition::getAssociatedValue computed the argument number of a call site
argument from its use to look up the argument operand, which is the value
of the use. NFC.
CTMark instructions:u with -attributor-enable=light changes by O3 -0.19%,
ThinLTO -0.20%. The attributor-light pass itself is 2.1-4.2% faster
(callgrind), and 1.2-1.6% faster with the other pending Attributor
compile-time changes applied.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Attributor: Only look for callback arguments of call site arguments
IRPosition::getArgNo called getAssociatedArgument for any position when
asked for the callee argument number, e.g., for the attribute index of
every argument position, although only call site arguments can be
associated with a different argument. NFC.
Exact instructions (callgrind) on pre-optimization CTMark bitcode, on top
of the other Attributor compile-time changes:
light module light CGSCC module CGSCC
sqlite3 -0.32% -0.28% -0.10% -0.13%
kimwitu++ k.cc -0.44% -0.36% -0.23% -0.24%
SPASS cnf.c -0.30% -0.27% -0.13% -0.37%
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[InstCombine] Fix demanded classes for fptrunc/fptrunc_round (#240523)
Fixes `simplifyDemandedUseFPClassFPTrunc` so that `bf16 = fptrunc(f32)`
and `f80 = fptrunc(f128)` both demand a `fcSubnormal` source for a
`fcNormal` result. This is because `bf16 =
fptrunc(float32-max-subnormal)` rounds up to `bfloat16-min-normal`.
This PR also adds non-trivial test coverage for `fptrunc.round`.
AI Disclosure:
I used Claude Opus 5 to help write the tests.
[InstCombine] Correctly handle input denormal modes for roundToIntegral subnormal folds (#238204)
Fixes https://github.com/llvm/llvm-project/issues/237855
Corrects input denormal handling for the subnormal and copysign folds
for the `roundToIntegral` family of functions. Also adds test coverage
for these folds.
[CIR] Do not assume function aliases are dso_local under PIC (#234753)
For PIC code that is not a PIE, shouldAssumeDSOLocal marks a function
dso_local when it can use a local alias, as classic codegen does.
Classic applies that only to real functions, never to aliases. CIR
represents a function alias as a FuncOp with an aliasee, so the check
now skips aliases. The flag does not reach LLVM IR yet, because MLIR's
translation drops dso_local on aliases. #234012 fixes that.
Assisted-by: Cursor / claude-opus-5.5
[clang][Builtins] West Const (#240926)
Make these more consistent with the rest of the code base, despite not
documenting the preference in the style guide. The builtins emitter
needs an update as a result.
Link:
https://github.com/llvm/llvm-project/pull/231696#discussion_r4492428422
Attributor: Query the memory effects of a call site once (#240725)
Instead of separately checking mayRead / mayWrite, directly compute
the full memory effects.
attributor-light is 0.1-0.25% faster (callgrind).
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[Mips] Update newpm-pipeline.ll after #235051 (#240924)
#235051 dropped the emit-debug-entry-values parameter from the printed
live-debug-values pass and updated the X86 and RISC-V pipeline tests,
but the Mips NewPM pipeline test had gained checks for it in the
meantime, so it fails on main.
Assisted-by: Claude Opus 5.5
[AMDGPU] Reduce resource align when shrinking buffer loads
Since the `align` on buffer intrinsics includes the offset argument,
the demand, `simplifyAMDGCNMemoryIntrinsicDemanded` needs to account
for the value added to that offset, which might reduce the alignment
of the load.
AI disclosure: Claude wrote the code, I looked at it and wrote the
commit message.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[mlir][mem2reg] Allow memory operations to own wrapped blocking uses (#233705)
Allow PromotableMemOpInterface operations to own blocking uses of a
wrapped memory access, enabling Mem2Reg to promote loads and stores
through the wrapper. Add Test dialect coverage for supported and
rejected cases.
This is to extend mem2reg mechanism to handle masked
trasnfer_read/write, where mask op uses region just to embed one op. See
follow-up PR for the interface usage:
https://github.com/llvm/llvm-project/pull/234251
assisted-by-claude
---------
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
[AMDGPU] Pre-commit tests for buffer load shrinking with align
Buffer load demanded elements analysis isn't shrinking the `align`
annotated on the intrinsic correctly.
AI disclosure: Claude wrote these, I wrote this message
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[mlir][flang][OpenMP] Honor inclusive iterator bounds in translation
Translation of omp.iterator ignored the `inclusive` flag and always treated
the upper bound as inclusive, so `(%c1 to %c5 step %c1)` produced five
iterations instead of four.
Compute each range's trip count according to the flag, and document that a
range excludes its upper bound unless `inclusive` is specified. Flang now
marks the iterators it creates as `inclusive`, so its DEPEND and AFFINITY
lists are unchanged.
Translation flattens all ranges into one loop and recovers each iterator
value by dividing by its range's trip count. An empty range makes the loop
run zero times, but with constant bounds the body still contained a division
by zero. Divide by one in that case; the body only runs when every trip
count is nonzero, so results are unchanged. Equal bounds now form an empty
range unless `inclusive` is set, which makes this case more common.
Assisted with Claude Opus 5.5.
[libc][test][NFC] Align typed test macros and names with GoogleTest (#240608)
LibcTest's typed test support used 3-argument TYPED_TEST and
TYPED_TEST_F
macros, testing::TypeList, ParamType, and manual REGISTER_TYPE_NAME
specializations. GoogleTest instead uses testing::Types,
TYPED_TEST_SUITE,
and a 2-argument TYPED_TEST macro that exposes TypeParam.
Align LibcTest and its typed unit tests with GoogleTest's macro
signatures
and type names so typed tests compile unchanged against either backend.
Naming the GetTypeName template parameter TypeParam produces
"[TypeParam = ...]" directly from __PRETTY_FUNCTION__ without
<typeinfo>,
making the unused REGISTER_TYPE_NAME macro unnecessary.
Part of #91630
Assisted-by: Gemini
Attributor: Test the allowed kinds of abstract attributes with a bit mask (#240914)
The set of enabled AAs was previously a dense set of the attribute ID
pointers which were constructed every run and have many hash table
collisions. Replace it with a compile time bitmask and array. The
kinds declared in Attributor.h are tested with a compile-time computed
bitmask and other kinds declared in AMDGPUAttributor use the array.
CTMark instructions:u with -attributor-enable=light changes by O3
-0.07%,
ThinLTO -0.09%. attributor-light is 0.7-4.4% faster (callgrind).
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[AMDGPU] Fold shift-add with zero addend to a shift (#234631)
Fold `V_LSHL_ADD_U32_e64` with a zero addend into `V_LSHLREV_B32_e64` in
`SIFoldOperands`. Handle both immediate and materialized zero addends.
This allows subsequent instruction shrinking to select the 32-bit
encoding when the operands permit it. This pattern occurs in vLLM
UltraQuant attention and TurboQuant cache-store kernels on gfx950,
saving four bytes in each tested specialization.
Add tests for immediate and materialized zero, scalar data, dynamic
shift amounts, and a nonzero addend.
