AMDGPU: Migrate assembler tests to subarch triples with error changes
Since these cases dropped the -mcpu argument, the error messages changed
to use the canonical name.
[AMDGPU] Fix SIPreAllocateWWMRegs to reserve AV-class WWM defs (#211560)
isVGPR() rejects the unified VGPR+AGPR register class used on gfx90A+,
so strict-WWM defs allocated to an AV-class register were left out of
WWMReservedRegs and could be clobbered by the post-WWM allocator
[AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (#207896)
v32f16 was marked Custom but omitted from the handler split-list, so it
fell through to selection and failed with "Cannot select"
The dead v16bf16 branch (never marked Custom) is dropped in the same
change
AMDGPU: Use llvm-mc -triple= arguments instead of space separator (#211510)
-triple=amdgcn... is the dominant form over -triple amdgcn. Convert
the outliers for easier subarch triple conversion.
[HIP][Driver] Use alternative `/lib64` if `/lib` doesn't exist
On non-standard ROCm installations, `libamdhsa64.so` may be under `/lib64`
instead of `/lib`. To accomodate for these, if `/lib` does not exists
and `/lib64` does, use the later.
If both exist `/lib` is preferred.
By default we conservatively use `/lib`.
[mlir] Handle null region in LoopLikeOpInterface::isDefinedOutsideOfLoop (#204521)
Fixes #203860
In LoopLikeOpInterface::isDefinedOutsideOfLoop default implementation,
value.getParentRegion() can return null during signature conversion
rollbacks when blocks/ops are unlinked. Check for null region to avoid a
segmentation fault.
Also, add a regression test for convert-func-to-llvm with
index-bitwidth=32 on functions with affine.for loops.
[LVI] Infer ranges from mul nuw square conditions (#173127)
A non-poison comparison involving `mul nuw X, X` implies that the
multiplication does not overflow. This bounds X by:
X <= floor(sqrt(2^bitwidth(X) - 1)) (e.g., i16: X <= 255)
An unsigned constant comparison can tighten the bound, e.g.,
`X * X <= 120` implies `X <= 10`.
Fixes https://github.com/llvm/llvm-project/issues/122412
[AMDGPU] Consult AA for non-atomic clobbers in isReallyAClobber
isReallyAClobber (used by AMDGPUAnnotateUniformValues to decide whether a uniform
load may be marked !amdgpu.noclobber) only queried alias analysis for atomics;
every other memory-writing MemoryDef (plain stores, memory intrinsics, calls)
fell through to an unconditional "return true", declaring it a clobber without
asking AA.
As a result a uniform, read-only load is denied !amdgpu.noclobber whenever
MemorySSA's clobber walk surfaces such a def through a loop MemoryPhi, even when
AA can trivially prove NoAlias (e.g. an LDS/addrspace(3) write vs a
global/addrspace(1) load). Without noclobber the load is selected as a vector
GLOBAL_LOAD instead of a scalar s_load, adding a v_readfirstlane round-trip when
the value feeds a scalar operand.
Query AA generally via getModRefInfo for the fall-through case, while keeping the
fence/barrier whitelist and the pointer-level atomic special case (getModRefInfo
over-reports Mod for an atomic's ordering effects). The load's MemoryLocation is
threaded through so addressing/size precision applies.
[Clang][Sema] Don't delay the access check when computing implicit deletion (#210254)
Sema::isMemberAccessibleForDeletion treats AR_delayed as unreachable,
but CheckAccess returns AR_delayed whenever it runs inside an enclosing
delayed-diagnostics scope. That happens when deletion checking runs
synchronously while parsing a later declaration -- e.g. while explaining
why a defaulted operator<=> is deleted for an expression in that
declaration's initializer. The caller cannot consume a delayed
diagnostic, so letting CheckAccess delay always hits
llvm_unreachable("cannot delay =delete computation") and crashes.
Force an immediate answer by wrapping the CheckAccess call in
DelayedDiagnostics.pushUndelayed()/popUndelayed() via llvm::scope_exit,
mirroring the existing Sema::CheckEnableIf pattern in SemaOverload.cpp.
Fixes https://github.com/llvm/llvm-project/issues/210692
Co-authored-by: Claude-Sonnet
[mlir][vector] Make CompressstoreOp + ExpandloadOp support scalable vectors (#210288)
Extends `vector.compressstore` + `vector.expandload` to support scalable
vectors and updates relevant tests.
An e2e test for `vector.compressstore` is added. For
`vector.expandload`, we need to wait for QEMU support:
https://github.com/llvm/llvm-project/issues/210942.
[IR] Slightly optimize getElementAsInteger() (#211550)
This regressed with the introduction of the byte type, because
getElementPointer() calls getElementByteSize() calls
getPrimitiveSizeInBits(), but the switch used getScalarTypeInBits(),
which means we need to do two separate calls for the element size. Use
getElementByteSize() in both places so these can be CSEd.
[mlir][sparse] Avoid vectorizing non-contiguous COO coordinate loads (#211004)
`SparseVectorization` assumes direct loop accesses (`a[lo:hi]`) are
contiguous and vectorizes them with `vector.maskedload/maskedstore`.
This is false for `sparse_tensor.coordinates` of a level inside a
trailing AoS COO region, whose buffer is interleaved with other levels:
a silent miscompile.
The true stride is already known from the tensor's encoding, even though
the memref type is still dynamic at this point. Use it to fall back to a
scalar loop when the stride is provably non-unit.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
[RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (#210868)
RISCVISelDAGToDAG's lowering of RISCVISD::LPAD_CALL / LPAD_CALL_INDIRECT
to PseudoCALLLpadAlign / PseudoCALLIndirectLpadAlign (introduced in
#177515) only copied the callee, lpad label, chain, and glue operands,
dropping the argument-register and register-mask operands in between.
Without the register-mask operand, the register allocator treats these
calls as clobbering nothing but ra, so values live across the call are
not spilled/reloaded even though the callee is free to clobber
caller-saved registers. This caused a miscompile where a pointer held
live across a call to getcontext() (a returns_twice function) was
corrupted after the call returned, leading to a SIGSEGV in
llvm-test-suite's siod test.
Fix the operand copy to include the argument-register and register-mask
operands, matching the pseudo-instruction operands of a regular
PseudoCALL/PseudoCALLIndirect.
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