[mlir][Tosa] Use split discardable/inherent attribute APIs (#218912)
Use typed operation accessors and explicit discardable attribute APIs in
the Tosa dialect, conversions, target handling, and validation.
Assisted-by: Codex
[SCEV] Fix dead CHECK lines in ptrtoint.ll (NFC) (#218932)
There is no CHECK prefix; remove and regenerate with X32/X86 check
lines.
As suggested in https://github.com/llvm/llvm-project/pull/217378.
[MergeFunctions] Fix merging functions with different KCFI type identifiers (#217665)
MergeFunctions currently merges functions with identical bodies even
when
their function-level !kcfi_type metadata contains different type
identifiers.
This can redirect calls or function pointers to a function with a
mismatched
KCFI type identifier, potentially causing KCFI checks to fail at
runtime.
Compare function-level !kcfi_type metadata in FunctionComparator so that
functions with different KCFI type identifiers are not merged.
Add a minimal regression test covering two identical functions with
different
KCFI type identifiers.
Fixes #217629
[AArch64] Suboptimal assembly for u128 x * x (#214796)
This PR optimizes the AArch64 backend for 128-bit integer squaring
(`u128 x * x`).
It updates the instruction selection logic to combine `(A + B) + B` into
`A + (B << 1)`. This allows the compiler to emit a single, optimal `add
... lsl #1` instruction instead of multiple separate `add` instructions.
A baseline test was added in the first commit, and the optimization is
provided in the second commit to clearly highlight the codegen
improvements.
Fixes #213775
[MLIR][X86] Track shuffled write operand updates (#218936)
Notify pattern rewrite listeners while replacing the operands of both
write-like users after accumulator shuffling.
Add focused coverage that does not depend on the separate accumulator
rewrite.
Assisted-by: Codex
[mlir][OpenACC][OpenMP] Migrate to use explicit discardable/inherent attribute APIs (#218901)
Use discardable attribute APIs and typed operation accessors throughout
the OpenACC and OpenMP dialects, conversions, translation, utilities,
and tests.
Keep ComputeRegionOp inherent properties in the property dictionary and
discardable attributes in the attribute dictionary.
Assisted-by: Codex
[SelectionDAG] Legalize non-divisible scalable vector widening (#218777)
Enable DAGTypeLegalizer::ModifyToType to widen scalable vectors whose
element counts are not integer multiples. Split the source and
destination into their largest common scalable subvector type, extract
the source parts, append poison or zero fill parts, and concatenate
them.
[LLVM][SVE] Add dedicated intrinsics to cast between svcount_t and svbool_t. (#218667)
This makes the casting behaviour more explicit:
> to/from_svbool : lane-count changing casts
> to/from_svcount : reinterpretation casts
[libc] Enable bare-metal hermetic tests on Arm (#207361)
This provides missing components required to run LLVM libc hermetic
tests, for example, with QEMU:
- Redirect of output, time and exit to semihosting.
- Linker script.
- Extra LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY setting for
LIBC_CONF_MATH_OPTIMIZATIONS to make hardfp tests pass.
[CIR] Drop the callconv opt-out from 4 more CIR tests (#218785)
These four CIR tests now compile and check clean with x86_64
calling-convention lowering on, unblocked by the packed-record (#218505)
and vptr-record (#218457) work. Stripping the flag moved zero CHECK
lines: the output the pass produces for these four is exactly what was
already pinned.
Assisted-by: Cursor / claude-opus-5
[MachinePipeliner] Increase the default maximum MII to 256
The pipeliner rejects a loop whose minimum initiation interval exceeds
-pipeliner-max-mii. Its default of 27 suits targets with short instruction
latencies, but is too small for others: on AMDGPU a couple of MFMA
instructions already push the MII past it, so the loop never pipelines.
Increase the default limit from 27 to 256. An explicit -pipeliner-max-mii
still overrides the default.
[AMDGPU] Configure the software pipeliner policy (#212539)
```
[AMDGPU] Configure the software pipeliner policy
Set the pipeliner policy in overridePipelinerPolicy() to opt into the generic
register-pressure detector.
Schedules exceeding the target-provided pressure-set limits are rejected and
retried at a higher II.
```
[libc++][NFC] Refactor new.ipp so the _impl functions take a failure mode argument (#218648)
This avoids duplicating the failure path everywhere we use these
functions. It also makes it more explicit what the intended failure path
is.
[CIR] Regenerate CHECK lines for 8 more callconv opt-out tests
These 8 CIR tests compile clean with x86_64 calling-convention lowering
on, but their CHECK lines still pinned the pre-coercion CIR: raw record
types in signatures, plain by-value loads for temporaries with a
non-trivial destructor, and matching store/load pairs for empty
records. The pass now emits the ABI-correct shape instead: sret return
parameters, a dropped or byref-marked argument for records that carry
no data or that need pass-by-reference, and a `#cir.poison` placeholder
where a value the pass ignores used to be stored.
Assisted-by: Cursor / claude-opus-5
[AMDGPU] Make LowerModuleLDS a noop on an already lowered module (#217075)
Full LTO reruns the pass on each codegen partition, where it matched its
own lowered structs and re-expanded their constexpr uses
[libc] Slight optimization for small send_n / recv_n buffers (#218551)
Summary:
Adds a convergent short-circuit condition that lets the compiler
optimize out this loop better in cases where the size is known. Without
this sometimes the compiler could not figure out that a constant size
did not need the extra loop and the backedges would remain.
[Clang][AIX] Error on -mloadtime-comment-vars in cc1 for non-AIX targets
The driver continues to warn and drop the option for unsupported targets;
cc1, reachable directly or via -Xclang, now rejects it with
err_drv_unsupported_opt_for_target, mirroring the -mabi=quadword-atomics
and -mxcoff-roptr checks.
AMDGPU: Touch up gfx1250-strict definition details
Rename the subarch triple enum for consistency, and place
it next to 1250. Add expanded test coverage.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
MachineLICM: Fix preheader insertion point with SUCC_ARGS
Hoist loop-invariant instructions to getBlockEndInsertPt() instead of
getFirstTerminator(), so they land before the SUCC_ARGS cluster rather
than inside it.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8)
