LLVM/project db5b56fllvm/test/CodeGen/AMDGPU/GlobalISel andn2.ll

Remove whitespace

Co-authored-by: Petar Avramovic <Petar.Avramovic at amd.com>
DeltaFile
+0-1llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
+0-11 files

LLVM/project a57049allvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-constant.mir

[AMDGPU][True16] Upstream GlobalISel True16 tests/run lines (#200288)

All of these tests do not require functional changes to go with them
DeltaFile
+10,469-10llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+2,465-1llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
+2,428-2llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
+846-485llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
+734-417llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+574-249llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
+17,516-1,16437 files not shown
+21,453-2,58443 files

LLVM/project fa6f742clang/docs ClangSYCLLinker.rst, clang/test/Driver link-device-code.test

[clang-sycl-linker] Decouple link step from SYCL; adopt -L / --bc-library options (#199777)

The bitcode link phase in `clang-sycl-linker` is not SYCL-specific — it
  links input bitcode, then links library bitcode with `LinkOnlyNeeded`.
  This PR makes the implementation reflect that and aligns the option
  surface with `clang-nvlink-wrapper`.

  - Rename `linkDeviceCode` / `getSYCLDeviceLibs` and strip SYCL/device
    wording from verbose output, errors, and doc-comments. The
    `runSYCLLink` doc-comment is expanded to describe the full
    link → split → codegen → AOT → pack pipeline it actually drives.
  - Replace `--device-libs=a.bc,b.bc` with repeatable `--bc-library`,
    resolved against `-L` search paths. `-L` becomes the canonical form;
    `--library-path` / `--library-path=` are kept as hidden aliases and
    now accumulate (previously last-wins).
  - Consolidate the four `Inputs/SYCL/*.ll` fixtures and
`link-device-code.test` into one `split-file`-based `link.ll`; refresh
    affected check prefixes. New checks cover `-L` joined form,
    multi-`-L` fall-through, and first-match-wins ordering.

    [8 lines not shown]
DeltaFile
+76-61clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
+95-0clang/test/OffloadTools/clang-sycl-linker/link.ll
+39-11clang/test/OffloadTools/clang-sycl-linker/basic.ll
+16-22clang/docs/ClangSYCLLinker.rst
+0-25clang/test/Driver/link-device-code.test
+0-20clang/test/Driver/Inputs/SYCL/foo.ll
+226-1396 files not shown
+243-18812 files

LLVM/project 74e92cfllvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp AArch64InstPrinter.h

[AArch64][llvm] Simplify and dedupe hint alias parsing code (NFC)

The code which handles instructions that are aliased in the `HINT`
encoding space is very similar and repetitive.

Move common code into templated functions, so that it's consistent and
simpler, whilst still remaining readable.

This also means any future instructions added in the `HINT` space will
be simpler to implement. Net removal of ~86 lines of code.

NFC, apart from a word change in the `tsb csync` error diagnostic
DeltaFile
+99-195llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+44-43llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+9-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+3-3llvm/test/MC/AArch64/armv8.4a-trace-error.s
+155-2414 files

LLVM/project 08a1febllvm/test/MC/AArch64 armv9.7a-memsys.s basic-a64-instructions.s

fixup! Add testcases for all missing HINTs
DeltaFile
+13-1llvm/test/MC/AArch64/armv9.7a-memsys.s
+12-0llvm/test/MC/AArch64/basic-a64-instructions.s
+9-1llvm/test/MC/AArch64/armv9.6a-pcdphint.s
+8-0llvm/test/MC/AArch64/armv8.4a-trace.s
+6-0llvm/test/MC/AArch64/armv9.5a-pauthlr.s
+3-0llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s
+51-22 files not shown
+56-28 files

LLVM/project da2e21dllvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Some instructions should be `HINT` aliases (NFC)

Implement the following instructions as a `HINT` alias instead of a
dedicated instruction in separate classes:
  * `stshh`
  * `stcph`
  * `shuh`
  * `tsb`

Updated all their helper methods too, and updated the `stshh` pseudo
expansion for the intrinsic to emit `HINT #0x30 | policy`.

Code in AArch64AsmPrinter::emitInstruction identified an initial BTI using a
broad bitmask on the HINT immediate, which also matched shuh/stcph (50..52)
This could move the patchable entry label after a non-BTI instruction.
Replaced it with an exact BTI check using the BTI HINT range (32..63) and
AArch64BTIHint::lookupBTIByEncoding(Imm ^ 32).

A following change will remove duplicated code and simplify.

    [2 lines not shown]
DeltaFile
+115-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+41-40llvm/lib/Target/AArch64/AArch64InstrFormats.td
+22-3llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+5-14llvm/lib/Target/AArch64/AArch64InstrInfo.td
+5-10llvm/lib/Target/AArch64/AArch64SystemOperands.td
+4-2llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+192-692 files not shown
+199-708 files

LLVM/project 2d2f3d6llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/test/MC/AArch64 arm-poe2.s

[AArch64][llvm] POE2: remove TPMAXn_ELn/TPMINn_ELn and create TPCRn_ELn registers

Some POE2 system registers have been removed/created:

  * `TPMAXn_ELn`/`TPMINn_ELn` system registers are now removed
  * these encodings are reused in new `TPCRn_ELn` system registers

Adjusted testcases as appropriate.
DeltaFile
+48-128llvm/test/MC/AArch64/arm-poe2.s
+4-9llvm/lib/Target/AArch64/AArch64SystemOperands.td
+52-1372 files

LLVM/project 00062edllvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstructionSelector.cpp

Revert "[NFC][AMDGPU] Introduce AMDGPU::FlatVariant enum to replace uint64_t FLAT discriminant" (#200420)

Reverts llvm/llvm-project#200396

Build failure
DeltaFile
+16-22llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+12-13llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+8-10llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-5llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+5-5llvm/lib/Target/AMDGPU/SIInstrInfo.h
+4-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+50-605 files not shown
+57-7411 files

LLVM/project 8d4e7d9llvm/utils profcheck-xfail.txt

Add new coro test to profcheck-xfail.txt (coro aren't yet profcheck ready (#200422)
DeltaFile
+1-0llvm/utils/profcheck-xfail.txt
+1-01 files

LLVM/project 7aa76e1llvm/include/llvm/ADT DenseMap.h, llvm/lib/IR Value.cpp

Revert "[DenseMap] Replace tombstone deletion with TAOCP 6.4 Algorithm R (#19…"

This reverts commit c4d820ce311b74acf70e52ec04856fc89b503ab9.
DeltaFile
+119-91llvm/include/llvm/ADT/DenseMap.h
+1-4llvm/lib/IR/Value.cpp
+2-1llvm/unittests/ADT/BitVectorTest.cpp
+122-963 files

LLVM/project 08a7337llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstructionSelector.cpp

Revert "[NFC][AMDGPU] Introduce AMDGPU::FlatVariant enum to replace uint64_t …"

This reverts commit 170bdf55faef8000f8abe8eb97472b3c3bab91c5.
DeltaFile
+16-22llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+12-13llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+8-10llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-5llvm/lib/Target/AMDGPU/SIInstrInfo.h
+5-5llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+4-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+50-605 files not shown
+57-7411 files

LLVM/project 8d39c52llvm/include/llvm/IR Instruction.h

clang-format

Created using spr 1.3.8-wip
DeltaFile
+1-3llvm/include/llvm/IR/Instruction.h
+1-31 files

LLVM/project 3ab9a0ellvm/include/llvm/IR Value.h Instruction.h

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+4-14llvm/include/llvm/IR/Value.h
+5-0llvm/include/llvm/IR/Instruction.h
+1-4llvm/include/llvm/IR/FMF.h
+2-0llvm/include/llvm/IR/Operator.h
+12-184 files

LLVM/project 4ac9738llvm/docs AMDGPUUsage.rst

Introduce a new "Unsupported IR Constructs" section and move the point about unsupported atomics there.
DeltaFile
+12-3llvm/docs/AMDGPUUsage.rst
+12-31 files

LLVM/project 528a482llvm/docs AMDGPUUsage.rst

[AMDGPU] Document that only naturally aligned atomics of up to 64 bits are supported by the AMDGPU backend

We get an error from AtomicExpandPass if those constraints are not satisfied.
The 64-bit limit is set [here, in AMDGPUISelLowering.cpp](https://github.com/llvm/llvm-project/blob/5cac2751fb9cf3112d16717b278e40d07dd6cfdc/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp#L645).
DeltaFile
+3-0llvm/docs/AMDGPUUsage.rst
+3-01 files

LLVM/project c4a6fe7lld/ELF/Arch LoongArch.cpp, lld/test/ELF loongarch-tls-dtprel.s

[lld][LoongArch] Handle DTPREL relocations in debug sections (#199327)

Teach the LoongArch lld backend to classify R_LARCH_TLS_DTPREL32 and
R_LARCH_TLS_DTPREL64 as R_DTPREL.

This allows linker processing of TLS debug info references emitted into
.debug_info via .dtprelword/.dtpreldword. Add 32-bit and 64-bit tests
that assemble objects with DTPREL relocations in debug sections.
DeltaFile
+26-0lld/test/ELF/loongarch-tls-dtprel.s
+3-0lld/ELF/Arch/LoongArch.cpp
+29-02 files

LLVM/project 170bdf5llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstructionSelector.cpp

[NFC][AMDGPU] Introduce AMDGPU::FlatVariant enum to replace uint64_t FLAT discriminant (#200396)

Replace the uint64_t parameter used as a FLAT address-space segment
discriminant in isLegalFLATOffset, splitFlatOffset,
allowNegativeFlatOffset with a typed enum class to prevent usage of raw
TSFlags.

Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
DeltaFile
+22-16llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+13-12llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+10-8llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-5llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+5-5llvm/lib/Target/AMDGPU/SIInstrInfo.h
+5-4llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+60-505 files not shown
+74-5711 files

LLVM/project bdcce4allvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 avx512-mask-op.ll fold-select.ll

[X86] combineMaskBitOp - fold vXi1 logicop(truncate(N0),truncate(N1)) -> truncate(logicop(X,Y)) (#200385)

Replace costly predicate logic when possible - generic 128/256/512 vector types are always cheaper

Part of #198162
DeltaFile
+39-92llvm/test/CodeGen/X86/avx512-mask-op.ll
+44-0llvm/lib/Target/X86/X86ISelLowering.cpp
+2-7llvm/test/CodeGen/X86/fold-select.ll
+85-993 files

LLVM/project 4db74c0llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

[NFC][AMDGPU] Replace uint64_t SDWA inst-type discriminant with typed enum (#200388)

cvtSDWA() previously took a uint64_t BasicInstType parameter and callers
passed raw TSFlag bit values (SIInstrFlags::VOP1/VOP2/VOPC) as a
discriminant. Introduce a private AMDGPUAsmParser::SDWAInstType enum
class to remove the raw-flag dependency.

---------

Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
DeltaFile
+15-17llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+15-171 files

LLVM/project 3e4226acompiler-rt/lib/builtins/arm floatunsdidf.S floatundidf.S

Use the proper libgcc spelling for the function names
DeltaFile
+0-184compiler-rt/lib/builtins/arm/floatunsdidf.S
+184-0compiler-rt/lib/builtins/arm/floatundidf.S
+0-103compiler-rt/lib/builtins/arm/floatunssisf.S
+103-0compiler-rt/lib/builtins/arm/floatunsisf.S
+64-0compiler-rt/lib/builtins/arm/floatunsidf.S
+0-64compiler-rt/lib/builtins/arm/floatunssidf.S
+351-35110 files not shown
+563-56316 files

LLVM/project a8a91c0clang/lib/Driver/ToolChains Clang.cpp Linux.cpp, clang/test/Driver sycl-offload-jit-unix.cpp sycl-offload-jit.cpp

[SYCL] Fix -nolibsycl and spurious spirv-link flags for SYCL offloading (#200252)

Two related driver fixes for SYCL offloading on Linux:

1. Honor -nolibsycl during linking: the SYCL runtime library
(libLLVMSYCL.so) was unconditionally added to the link line even when
-nolibsycl was passed. The flag was recognized but silently ignored at
the point where the library path is emitted.

2. Do not forward spirv-link flags to clang-sycl-linker: the driver was
passing --allow-partial-linkage and --create-library to
clang-sycl-linker for all SPIR-V offload targets, but these flags are
only meaningful to the out-of-tree spirv-link tool used by OpenMP. SYCL
uses clang-sycl-linker which does not accept them, causing a link
failure. The flags are now restricted to non-SYCL SPIR-V offload kinds.

---------

Co-authored-by: Claude Sonnet 4.6 <noreply at anthropic.com>
DeltaFile
+8-0clang/test/Driver/sycl-offload-jit-unix.cpp
+7-0clang/test/Driver/sycl-offload-jit.cpp
+5-0clang/test/Driver/sycl-windows.cpp
+3-2clang/lib/Driver/ToolChains/Clang.cpp
+2-1clang/lib/Driver/ToolChains/Linux.cpp
+25-35 files

LLVM/project afe6165clang/docs ReleaseNotes.rst, clang/lib/Sema SemaChecking.cpp

[Clang][Sema] Fix crash when calling EvaluateForOverflow for UnaryOpe… (#200317)

…rator that can not overflow

A while ago I added checking for overflow in unary operators during
constant evaluation:

https://reviews.llvm.org/D142867

This created some new bug opportunities. I am now checking if the
UnaryOperator can overflow before calling EvaluateForOverflow in
Sema::CheckForIntOverflow.

Fixes: https://github.com/llvm/llvm-project/issues/170072
DeltaFile
+8-0clang/test/Sema/gh170072.c
+2-1clang/lib/Sema/SemaChecking.cpp
+1-0clang/docs/ReleaseNotes.rst
+11-13 files

LLVM/project 3791c8bflang/lib/Optimizer/Transforms FIRToMemRef.cpp, flang/test/Transforms/FIRToMemRef slice-projected.mlir

[flang][FIRToMemRef] Non-box complex slices use shapeVec strides, not `fir.box_dims` (#200285)

FIRToMemRef now lowers `fir.array_coor` on projected complex %re / %im
when the base is a contiguous `!fir.ref` with `fir.shape` (e.g. a static
component array in a derived type), without calling `fir.box_dims` on
the ref and with strides that match the memref<…×2×T> view.

Previously, any projected slice is lowered through the descriptor path
and produced invalid `fir.box_dims` on a ref. Fixed to take descriptor
strides only when the coor base is actually a box. For ref + shape, it
keeps the synthesized row-major layout and scales array strides by two
scalar slots per complex, with a re/im dimension (extent 2, stride 1).
DeltaFile
+46-0flang/test/Transforms/FIRToMemRef/slice-projected.mlir
+26-7flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
+72-72 files

LLVM/project 6f5c584llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.h, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-merge-values-build-vector-s16.mir true16-merge-values-s16.ll

PR feedback
DeltaFile
+0-149llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values-build-vector-s16.mir
+61-0llvm/test/CodeGen/AMDGPU/GlobalISel/true16-merge-values-s16.ll
+14-16llvm/test/CodeGen/AMDGPU/GlobalISel/select-merge-values-build-vector-s16.mir
+1-2llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+76-1674 files

LLVM/project 409361cllvm/lib/Transforms/Scalar LoopBoundSplit.cpp

Revert "[LoopBoundSplit] Fix edge connections during transformation (#192106)"

This reverts commit fa44ca8e5ef6f57c03ba55a4c7b944c9a3ee633e.
DeltaFile
+11-25llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
+11-251 files

LLVM/project 33cd157clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,139-433openmp/runtime/src/kmp_tasking.cpp
+865-222clang/lib/CodeGen/CGOpenMPRuntime.cpp
+199-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+199-3clang/include/clang/AST/OpenMPClause.h
+5,535-952120 files not shown
+11,144-1,436126 files

LLVM/project 6b8386cclang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,139-433openmp/runtime/src/kmp_tasking.cpp
+865-222clang/lib/CodeGen/CGOpenMPRuntime.cpp
+199-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+199-3clang/include/clang/AST/OpenMPClause.h
+5,535-952122 files not shown
+11,253-1,436128 files

LLVM/project ff9aba2clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,139-433openmp/runtime/src/kmp_tasking.cpp
+865-222clang/lib/CodeGen/CGOpenMPRuntime.cpp
+199-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+199-3clang/include/clang/AST/OpenMPClause.h
+5,535-952120 files not shown
+11,144-1,436126 files

LLVM/project 34edf39clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,094-431openmp/runtime/src/kmp_tasking.cpp
+755-217clang/lib/CodeGen/CGOpenMPRuntime.cpp
+198-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+199-3clang/include/clang/AST/OpenMPClause.h
+5,379-945116 files not shown
+10,510-1,429122 files

LLVM/project 58b51f9clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,094-431openmp/runtime/src/kmp_tasking.cpp
+755-217clang/lib/CodeGen/CGOpenMPRuntime.cpp
+198-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+199-3clang/include/clang/AST/OpenMPClause.h
+5,379-945116 files not shown
+10,510-1,429122 files