[libc++] Resolve LWG4439 and LWG4300 (#174257)
Resolves #171340 implemented in #155202
Resolves #171402 implemented in #155202
- Add `swap` test for `optional<T&>` to ensure an ADL-found swap isn't
selected.
- Drive-by: Update documentation for LWG4300 since it's already
completed
[LowerAllowCheck] Add llvm.allow.sanitize.* intrinsics (#172029)
Add new intrinsics:
- llvm.allow.sanitize.address
- llvm.allow.sanitize.thread
- llvm.allow.sanitize.memory
- llvm.allow.sanitize.hwaddress
These intrinsics return true if the corresponding sanitizer is enabled
for the function, and false otherwise. They are lowered by
LowerAllowCheckPass to constant booleans based on the corresponding
sanitize_* function attributes. LowerAllowCheckPass is now "required" to
run on functions with optnone to ensure correct lowering at O0.
The LowerAllowCheckPass already performs similar duties for
@llvm.allow.runtime.check and @llvm.allow.ubsan.check, although with
subtly different semantics (based on profiles and/or sampling). In this
case, we want to make the true/false decision based on if any one of
address/memory/thread sanitization is enabled.
[libc++] Make sure `flat_{multi}map::key_compare` handle `boolean-testable` correctly (#132621)
This is sibling of
[#69378](https://github.com/llvm/llvm-project/pull/69378).
---------
Co-authored-by: Hui Xie <hui.xie1990 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
[libc++] Make sure `flat_set::key_compare` handle `boolean-testable` correctly (#132622)
Also add test for `flat_multiset` to avoid regression.
---------
Co-authored-by: Hui Xie <hui.xie1990 at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
[X86] Cleanup uses of "(BW-1) - LOG2(C)" --> "CLZ(C)" instead. NFC. (#174167)
We know in both cases that the value `C` is a power-of-2 constant, so we
know the "(BW-1) - LOG2(C)" can be more obviously represented as
"CLZ(C)".
In both places it occurs it also makes it much easier to understand
what's being done: shift the single masked bit up to the MSB and then
use SRA to splat it to all bits.
[CloneFunction] Fix non-deterministic PHI cleanup using PHINode::removeIncomingValueIf() (#173975)
Previously, we use `std::map<BasicBlock *, unsigned> PredCount` to track
excess incoming blocks and removed them one by one using
`removeIncomingValue`.
Since `PredCount` use `BasicBlock *` as key, the iteration order depends
on the memory addresses of the blocks. With
`PHINode::removeIncomingValue()` changed to use the swapping strategy,
the order in which operands are removed affects the final order of the
remaining operands in the PHI node. This will cause non-determinism in
compiles.
This patch uses `PHINode::removeIncomingValueIf()` to remove invalid
incoming blocks that no longer go to `NewBB` block, fixes the
non-determinism.
[libc++] LWG3627: Inconsistent specifications for `std::make_optional` overloads (#173466)
It should be sufficient to use `is_constructible_v<decay_t<T>, T>` in
the constraints, because the `const optional<U>&`/`optional<U>&&`
constructors are sufficiently constrained.
Drive-by: Refactor
`libcxx/test/std/utilities/optional/optional.specalg/make_optional.pass.cpp`
to run more cases during constant evaluation.
InstCombine: Positive normal exp results imply possible negative normal inputs (#174273)
Fix mishandling exp where the result is known to only be a negative
normal.
[LV][doc] Update and extend the docs on floating-point reduction vectorization (#172809)
The docs for reduction vectorization currently say that
> We support floating point reduction operations when -ffast-math is
used.
This is outdated, as there are now cases where floating-point reductions
are vectorized even without -ffast-math, through ordered reduction.
This PR updates the documentation for reduction vectorization, noting
that that AArch64 and RISC-V default to ordered FP reductions being
permitted. Furthermore, an explanation of why the vectorization of FP
reduction is such a special case is added to the docs.
---------
Co-authored-by: GYT <tiborgyri at gmail.com>
Co-authored-by: Florian Hahn <flo at fhahn.com>
ValueTracking: Improve handling of fadd in computeKnownFPClass. (#174123)
This already recognized that if both inputs are positive, the
result is positive. Extend this to the mirror situation with
negative inputs.
Also special case fadd x, x. Canonically, fmul x, 2 is fadd x, x.
We can tell the sign bit won't change, and 0 will propagate.
InstCombine: Positive normal exp results imply possible negative normal inputs
Fix mishandling exp where the result is known to only be a positive normal,
but the input is only known to be negative.
Verifier: Fix duplicated test with asserts and !asserts (#174271)
The same test content was duplicated for asserts and !asserts
builds, but the behavior is the same either way.
Verifier: Fix duplicated test with asserts and !asserts
The same test content was duplicated for asserts and !asserts
builds, but the behavior is the same either way.
ValueTracking: Improve handling of fadd in computeKnownFPClass.
This already recognized that if both inputs are positive, the
result is positive. Extend this to the mirror situation with
negative inputs.
Also special case fadd x, x. Canonically, fmul x, 2 is fadd x, x.
We can tell the sign bit won't change, and 0 will propagate.
ValueTracking: Add more baseline tests for computeKnownPPClass of fadd (#174122)
Test cases with fadd x, x. Also test cases where both inputs are known
negative.
[X86] combinePTESTCC - always prefer TESTPS/D to PTEST on AVX (#174097)
If the elements are sign-bit splats AVX targets can always use TESTPS/D directly, potentially allowing further simplification.
Many Intel targets have slightly lower tp/uops requirements for TESTPS/D vs PTEST - AMD is neutral.
Fixes the AVX1 `testz(ashr(X,bw-1),-1)` codegen for the `okD` testcase from #156233
