LLVM/project c8f4fe3clang/lib/Basic/Targets SPIR.cpp, clang/test/Preprocessor predefined-macros.c

[Clang] Add macro for `__VULKAN__` environment (#196103)

Summary:
Adds a macro like for `__LINUX__` or `__WIN32`. The intention here is to
let code differentiate between vulkan variants or not.
DeltaFile
+7-0clang/test/Preprocessor/predefined-macros.c
+2-0clang/lib/Basic/Targets/SPIR.cpp
+9-02 files

LLVM/project de66623llvm/lib/Target/AArch64 AArch64Combine.td, llvm/lib/Target/AArch64/GISel AArch64PostLegalizerLowering.cpp AArch64RegisterBankInfo.cpp

[AArch64][GlobalISel] Remove fconstant_to_constant, moving it to reg-bank-select. (#194778)

This removes the fconstant_to_constant post-legalizer lowering combine,
moving it to where it belongs in reg bank select. The result should be
mostly be no change in generated code.
DeltaFile
+0-80llvm/test/CodeGen/AArch64/GlobalISel/combine-fconstant.mir
+0-26llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+8-0llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+1-7llvm/lib/Target/AArch64/AArch64Combine.td
+1-0llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
+10-1135 files

LLVM/project 7ad5936llvm/lib/Target/AMDGPU SIInstructions.td AMDGPUInstructions.td, llvm/test/CodeGen/AMDGPU andorn2.ll

[AMDGPU] add v2i32 V_BFI combines for andn2 and orn2
DeltaFile
+32-0llvm/lib/Target/AMDGPU/SIInstructions.td
+32-0llvm/test/CodeGen/AMDGPU/andorn2.ll
+1-0llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+65-03 files

LLVM/project 2a1368allvm/lib/Target/AMDGPU SIInstructions.td AMDGPUInstructions.td, llvm/test/CodeGen/AMDGPU andorn2.ll

[AMDGPU] add v2i32 V_BFI combines for andn2 and orn2
DeltaFile
+32-0llvm/lib/Target/AMDGPU/SIInstructions.td
+31-0llvm/test/CodeGen/AMDGPU/andorn2.ll
+1-0llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
+64-03 files

LLVM/project f803432llvm/lib/Target/AMDGPU AMDGPU.td VOP3Instructions.td

[AMDGPU] Add subtarget features for MAD NC and 64-bit MIN/MAX instructions
DeltaFile
+10-0llvm/lib/Target/AMDGPU/AMDGPU.td
+3-3llvm/lib/Target/AMDGPU/VOP3Instructions.td
+13-32 files

LLVM/project 19bc7aclibc/utils/wctype_utils gen.py

reduce Cling flags
DeltaFile
+2-1libc/utils/wctype_utils/gen.py
+2-11 files

LLVM/project ffa6ab7libc/src/__support/wctype perfect_hash_map.h

address nits
DeltaFile
+33-41libc/src/__support/wctype/perfect_hash_map.h
+33-411 files

LLVM/project 82058f9utils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel][libc] Port d24638888a16010c79bf7c45174b6afcc5b51671 (#196320)
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

LLVM/project c510ee5llvm/test/CodeGen/AMDGPU maximumnum.bf16.ll minimumnum.bf16.ll

[AMDGPU] VOPD: AllowSameVGPR on GFX12 (#196198)

The hardware allows this.
DeltaFile
+175-185llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
+175-185llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
+151-93llvm/test/CodeGen/AMDGPU/vopd-combine.mir
+80-80llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
+80-80llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
+80-80llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+741-7036 files not shown
+1,010-97812 files

LLVM/project 96aef1amlir/lib/Dialect/Linalg/Transforms FoldAddIntoDest.cpp, mlir/test/Dialect/Linalg fold-add-into-dest.mlir

[mlir][linalg] Fix crash in FoldAddIntoDest on block-arg operands (#195150)

`isDefinedAsZero` was vulnerable to a classic "passing an unchecked
`Operation *` to `TypeSwitch`".
DeltaFile
+27-0mlir/test/Dialect/Linalg/fold-add-into-dest.mlir
+6-3mlir/lib/Dialect/Linalg/Transforms/FoldAddIntoDest.cpp
+33-32 files

LLVM/project 82eb831llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp AArch64InstPrinter.h

[AArch64][llvm] Simplify and dedupe hint alias parsing code (NFC)

The code which handles instructions that are aliased in the `HINT`
encoding space is very similar and repetitive.

Move common code into templated functions, so that it's consistent and
simpler, whilst still remaining readable.

This also means any future instructions added in the `HINT` space will
be simpler to implement. Net removal of ~86 lines of code.

NFC, apart from a word change in the `tsb csync` error diagnostic
DeltaFile
+99-195llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+44-43llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+9-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+3-3llvm/test/MC/AArch64/armv8.4a-trace-error.s
+155-2414 files

LLVM/project a8e787eclang/lib/Basic Targets.cpp, clang/lib/Basic/Targets SPIR.h

[Clang] Permit `vulkan` as an OS for the SPIRV target architecture (#196101)

Summary:
This is currently rejected in two places, the toolchain creation and the
target itself. For the target we just permit it in the same way we alloe
things like 'amdhsa'. For the driver, the current handling just assumed
everything with 'vulkan' was HLSL. This shouldn't be true so we check
the source file type, and only push through actual HLSL files.

This is intended to more canonically support the 'CLSPV' target that
google has.
DeltaFile
+7-6clang/lib/Basic/Targets.cpp
+6-4clang/lib/Basic/Targets/SPIR.h
+6-1clang/lib/Driver/Driver.cpp
+5-0clang/test/Driver/spirv-toolchain.cl
+4-0clang/test/CodeGen/target-data.c
+28-115 files

LLVM/project 7554007libc/docs CMakeLists.txt, libc/include byteswap.yaml CMakeLists.txt

[libc] Add byteswap.h header with bswap_16/bswap_32/bswap_64 (#196278)

Added the Linux byteswap.h header providing bswap_16, bswap_32, and
bswap_64 as macros expanding to __builtin_bswap{16,32,64}. These are
always inlined by the compiler to single instructions.

Follows the existing endian.h / endian-macros.h pattern.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+21-0libc/include/llvm-libc-macros/byteswap-macros.h
+14-0libc/include/byteswap.yaml
+9-0libc/include/CMakeLists.txt
+8-0libc/utils/docgen/byteswap.yaml
+6-0libc/include/llvm-libc-macros/CMakeLists.txt
+1-0libc/docs/CMakeLists.txt
+59-01 files not shown
+60-07 files

LLVM/project 37f826amlir/lib/Dialect/Arith/Transforms ReifyValueBounds.cpp, mlir/lib/Interfaces ValueBoundsOpInterface.cpp

[mlir][Interfaces] Fix -Wunused-function (#196314)

These functions are only used inside assert statements, so mark them
[[maybe_unused]] to prevent -Wunused-function when they are used in a
non-asserts build.
DeltaFile
+3-2mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
+2-1mlir/lib/Dialect/Arith/Transforms/ReifyValueBounds.cpp
+5-32 files

LLVM/project 8fe742fllvm/lib/Target/AMDGPU AMDGPU.td GCNSubtarget.h, llvm/test/CodeGen/AMDGPU wait.ll mubuf.ll

[AMDGPU] Add subtarget features for MTBUF and formatted MUBUF instructions.
DeltaFile
+20-13llvm/lib/Target/AMDGPU/AMDGPU.td
+2-2llvm/test/CodeGen/AMDGPU/wait.ll
+0-4llvm/lib/Target/AMDGPU/GCNSubtarget.h
+1-1llvm/test/CodeGen/AMDGPU/mubuf.ll
+1-1llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
+1-1llvm/test/CodeGen/AMDGPU/load-local-redundant-copies.ll
+25-221 files not shown
+26-237 files

LLVM/project 540859cclang-tools-extra/clangd ClangdLSPServer.cpp, clang-tools-extra/clangd/unittests ClangdLSPServerTests.cpp

[clangd] Fix crash on completion with out-of-range position (#196112)

shouldRunCompletion() checked the Expected<> from positionToOffset() via
operator!() but never consumed the error with takeError(). This caused
an assertion failure when a TriggerCharacter completion request had a
position beyond the document bounds.

LLM was used to generate the unit test.

Fixes: #196072
DeltaFile
+20-0clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
+3-3clang-tools-extra/clangd/ClangdLSPServer.cpp
+23-32 files

LLVM/project 3ebc9abclang/docs ReleaseNotes.rst, clang/include/clang/Options Options.td

Revert "[clang] Don't omit null pointer checks with -fms-kernel (#196307)

This reverts commit a4ddeba8daff36c8e6285fa3603185b4c9b41718, which
raised concerns, see:
https://github.com/llvm/llvm-project/pull/193800
DeltaFile
+0-16clang/test/CodeGen/MSKernel/null-deref.c
+2-2clang/include/clang/Options/Options.td
+0-2clang/docs/ReleaseNotes.rst
+2-203 files

LLVM/project a1323d2libcxx/include string

[libcxx] Remove _LIBCPP_STRING_INTERNAL_MEMORY_ACCESS (#196141)

This was only necessary for ASan container annotations for short
strings. Remove it now that we do not support ASan container annotations
on short strings to:
1. Not suppress Asan on other violations, e.g. std::string::size() on
dead object.
2. Make the code a bit more clean.

Short string annotations were removed in
https://github.com/llvm/llvm-project/pull/194208.
DeltaFile
+12-36libcxx/include/string
+12-361 files

LLVM/project aa1be07lldb/include/lldb/Host/posix HostThreadPosix.h, lldb/source/Host/common MonitoringProcessLauncher.cpp

[lldb] Revert recent changes to HostThreadPosix::Reset (#196306)

These are suspected to have caused instability in CI testing
https://github.com/llvm/llvm-project/issues/191372.

This reverts commits 4c225918a9e78463c9bf9cc0a26be5ae2ed1c827 and
d7fac0f42a3a8a6d6cf827d1f8b38663f872fe0f (#179470 and #177572).

The second change could technically stay in, but it was using the first
change to fix a bug in lldb-server. So I think it's better to revert
both so we don't mistakenly think the bug is still fixed.
DeltaFile
+8-4lldb/source/Host/posix/HostThreadPosix.cpp
+3-8lldb/source/Host/common/MonitoringProcessLauncher.cpp
+1-1lldb/include/lldb/Host/posix/HostThreadPosix.h
+12-133 files

LLVM/project 45d94f6llvm/include/llvm/Analysis ScalarEvolution.h, llvm/lib/Analysis ScalarEvolution.cpp

Revert "[SCEV] Introduce loop-uniform SCEV classification." (#196297)

Reverts llvm/llvm-project#194304, as it caused failed asserts - see that
PR for reproducers.
DeltaFile
+12-12llvm/test/Analysis/ScalarEvolution/max-expr-cache.ll
+0-24llvm/include/llvm/Analysis/ScalarEvolution.h
+2-20llvm/lib/Analysis/ScalarEvolution.cpp
+9-9llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
+7-7llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
+6-6llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
+36-7810 files not shown
+61-10316 files

LLVM/project ce16067compiler-rt CMakeLists.txt, compiler-rt/cmake config-ix.cmake base-config-ix.cmake

[compiler-rt] Enable ubsan_minimal runtime for SPIR-V (#196149)

The SPIR-V target support for UBSan Minimal Runtime is added to provide
basic undefined behavior detection capabilities for SPIR-V based
devices.

Currently, only the `spirv64` target is supported.
DeltaFile
+8-2compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
+8-1compiler-rt/lib/sanitizer_common/sanitizer_platform.h
+2-2compiler-rt/CMakeLists.txt
+2-1compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
+1-1compiler-rt/cmake/config-ix.cmake
+2-0compiler-rt/cmake/base-config-ix.cmake
+23-76 files

LLVM/project eb40b69clang/lib/Parse ParseExpr.cpp

[clang] [NFC] Comment fix in ParseExpr.cpp (#195750)

Update hanging reference of ParseBinaryExpression to
ParseRHSOfBinaryExpression

Fixes #195747
DeltaFile
+2-2clang/lib/Parse/ParseExpr.cpp
+2-21 files

LLVM/project 3da4923lldb/test/API/lang/cpp/char1632_t main.cpp

[lldb][test] Add missing include to char16/32_t test (#196300)

Fixes 605feeda1e50aa0064947e64d66d3351b9f9693e / #195514. Failed to
build on AArch64 Linux without it.
DeltaFile
+1-0lldb/test/API/lang/cpp/char1632_t/main.cpp
+1-01 files

LLVM/project dba9696clang/docs ReleaseNotes.rst, clang/include/clang/Analysis/Analyses ThreadSafetyTraverse.h

Thread Safety Analysis: Fix implicit member access in attributes (#194457)

SExprBuilder previously translated DeclRefExprs referring to FieldDecls
as plain global references (til::LiteralPtr), ignoring the base object.
This caused false positives when members were accessed implicitly (such
as in C, or parameter attributes in C++) because the context of the
parent object was lost.

Fix this by using translateCXXThisExpr() to evaluate SelfArg into a base
expression when translating a DeclRefExpr to a FieldDecl. This makes the
analysis behave correctly for implicit member accesses in attributes.

Assisted-by: Gemini 3 (for debugging and review)
DeltaFile
+36-22clang/lib/Analysis/ThreadSafetyCommon.cpp
+20-5clang/test/Sema/warn-thread-safety-analysis.c
+16-8clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+5-0clang/include/clang/Analysis/Analyses/ThreadSafetyTraverse.h
+4-0clang/docs/ReleaseNotes.rst
+81-355 files

LLVM/project 37a093fllvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/test/MC/AArch64 armv8.7a-ls64.s

[AArch64][llvm] Add missing form for `LD64B`/`ST64B` instructions

`LD64B` and `ST64B` should be defined as follows[1]:
```
   LD64B <Xt>, [<Xn|SP> {,#0}]
```

but they're missing the form that allows a zero immediate offset,
for example:
```
  ld64b x2, [x13, #0]
  st64b x16, [x13, #0]
```

Add support for zero immediate offsets for these instructions.

[1] https://developer.arm.com/documentation/ddi0602/2022-09/Base-Instructions/LD64B--Single-copy-Atomic-64-byte-Load-
DeltaFile
+14-4llvm/test/MC/AArch64/armv8.7a-ls64.s
+10-0llvm/lib/Target/AArch64/AArch64InstrFormats.td
+4-6llvm/lib/Target/AArch64/AArch64InstrInfo.td
+28-103 files

LLVM/project 92fac7ellvm/include/llvm/Analysis ScalarEvolution.h, llvm/lib/Analysis ScalarEvolution.cpp

Revert "[SCEV] Introduce loop-uniform SCEV classification. (#194304)"

This reverts commit a257e2aa4eb47ad340915136228cd28d918e8dc2.
DeltaFile
+12-12llvm/test/Analysis/ScalarEvolution/max-expr-cache.ll
+0-24llvm/include/llvm/Analysis/ScalarEvolution.h
+2-20llvm/lib/Analysis/ScalarEvolution.cpp
+9-9llvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
+7-7llvm/test/Analysis/ScalarEvolution/different-loops-recs.ll
+6-6llvm/test/Analysis/ScalarEvolution/exit-count-select-safe.ll
+36-7810 files not shown
+61-10316 files

LLVM/project 866c49ellvm/test/MC/AArch64 armv9.7a-memsys.s basic-a64-instructions.s

fixup! Add testcases for all missing HINTs
DeltaFile
+13-1llvm/test/MC/AArch64/armv9.7a-memsys.s
+12-0llvm/test/MC/AArch64/basic-a64-instructions.s
+9-1llvm/test/MC/AArch64/armv9.6a-pcdphint.s
+8-0llvm/test/MC/AArch64/armv8.4a-trace.s
+6-0llvm/test/MC/AArch64/armv9.5a-pauthlr.s
+3-0llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s
+51-22 files not shown
+56-28 files

LLVM/project a2b54d1llvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Some instructions should be `HINT` aliases (NFC)

Implement the following instructions as a `HINT` alias instead of a
dedicated instruction in separate classes:
  * `stshh`
  * `stcph`
  * `shuh`
  * `tsb`

Updated all their helper methods too, and updated the `stshh` pseudo
expansion for the intrinsic to emit `HINT #0x30 | policy`.

Code in AArch64AsmPrinter::emitInstruction identified an initial BTI using a
broad bitmask on the HINT immediate, which also matched shuh/stcph (50..52)
This could move the patchable entry label after a non-BTI instruction.
Replaced it with an exact BTI check using the BTI HINT range (32..63) and
AArch64BTIHint::lookupBTIByEncoding(Imm ^ 32).

A following change will remove duplicated code and simplify.

    [2 lines not shown]
DeltaFile
+115-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+41-39llvm/lib/Target/AArch64/AArch64InstrFormats.td
+22-3llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+5-14llvm/lib/Target/AArch64/AArch64InstrInfo.td
+5-10llvm/lib/Target/AArch64/AArch64SystemOperands.td
+4-2llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+192-682 files not shown
+199-698 files

LLVM/project aac5d99clang/lib/Sema SemaDeclAttr.cpp

[NFC][BoundsSafety] Fold a dyn_cast + assert, and sink to first use (#194847)
DeltaFile
+1-3clang/lib/Sema/SemaDeclAttr.cpp
+1-31 files

LLVM/project 081a5e6libcxx/include/__configuration abi.h

[libc++][NFC] Remove unused #define (#195831)

We've removed the use of
`_LIBCPP_ABI_BAD_FUNCTION_CALL_GOOD_WHAT_MESSAGE` a while ago, but
didn't remove the `#define` for it.
DeltaFile
+0-6libcxx/include/__configuration/abi.h
+0-61 files