LLVM/project 0c8394dutils/bazel MODULE.bazel MODULE.bazel.lock, utils/bazel/llvm-project-overlay/llvm config.bzl

[bazel] Use new rules_cc API to determine musl targeting (#223549)

This avoids requiring hermetic-llvm in the public BUILD file API.
Downstream users need to update to this version of rules_cc
DeltaFile
+131-22utils/bazel/MODULE.bazel.lock
+2-2utils/bazel/llvm-project-overlay/llvm/config.bzl
+2-2utils/bazel/MODULE.bazel
+135-263 files

LLVM/project b19fbd2offload/include device.h, offload/libompaccsupport PluginManager.cpp device.cpp

[offload][omp] Move OpenMP KLE to libomptarget

Move preparations related to OpenMP KLE and
dynamicCGroupMem fallback out of the plugins and
into libomptarget.

Resructure Device::launch as it grew too large.
DeltaFile
+290-60offload/libompaccsupport/device.cpp
+2-144offload/plugins-nextgen/common/src/PluginInterface.cpp
+5-50offload/plugins-nextgen/common/include/PluginInterface.h
+1-1offload/plugins-nextgen/common/src/RecordReplay.cpp
+1-0offload/libompaccsupport/PluginManager.cpp
+1-0offload/include/device.h
+300-2556 files

LLVM/project db6aed4llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/lib/Target/X86 X86ISelLowering.cpp

[DAG][X86] Do not narrow trunc(select) to a type undesirable for SELECT

DAGCombiner rewrites trunc(select c, a, b) as select c, (trunc a), (trunc b)
whenever truncating is free. On X86 that fires for i8, and where CMOV is
available there is no 8-bit form of it, so LowerSELECT widens the narrow select
back to i32 through ANY_EXTENDs, which lower to MOVZX. The narrowing then only
buys a byte ALU chain plus a MOVZX for each operand that became an i8 op:

  orb     $64, %al        orl     $64, %eax
  movzbl  %al, %eax       cmovneq %rcx, %rax
  cmovnel %ecx, %eax

Gate the fold on isTypeDesirableForOp(ISD::SELECT, VT) and let X86 report i8 as
undesirable when it can use CMOV. Without CMOV the select lowers to a branch
instead, where i8 operands are fine, so narrowing stays enabled there. The hook
defaults to isTypeLegal(VT), so guarded by isTypeLegal it is a no-op for every
target that does not override it. A select of two constants stays exempt: it
introduces no truncate of a computed value, so the narrow form is never worse.

Assisted-by: Claude Code
DeltaFile
+68-55llvm/test/CodeGen/X86/bit-manip-i128.ll
+15-20llvm/test/CodeGen/X86/trunc-select-narrowing.ll
+10-11llvm/test/CodeGen/X86/freeze.ll
+8-8llvm/test/CodeGen/X86/lea-opt2.ll
+8-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-0llvm/lib/Target/X86/X86ISelLowering.cpp
+117-952 files not shown
+121-998 files

LLVM/project e694143llvm/test/CodeGen/X86 trunc-select-narrowing.ll

[X86][NFC] Pre-commit tests for trunc(select) narrowing

DAGCombiner narrows trunc(select c, a, b) to the truncated type. On X86 that
gives an i8 select, which is widened back to i32 wherever CMOV is available,
so the narrowing only adds a byte ALU chain and a MOVZX.

Assisted-by: Claude Code
DeltaFile
+239-0llvm/test/CodeGen/X86/trunc-select-narrowing.ll
+239-01 files

LLVM/project b623a0cclang/lib/CIR/CodeGen CIRGenExprConstant.cpp, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR] Support pointer-to-int global initializers (#220643)

This allows CIR to emit global initializers where a constant address is
cast to an integer.

This fixes compound literals like `unsigned long addr = (unsigned
long)(int[]){1, 2, 3}` and also handles global variable, array element
and function addresses cast to integers.

Fixes #216618
DeltaFile
+24-11clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
+22-0clang/test/CIR/CodeGen/global-address-to-int.c
+5-8clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+6-0clang/test/CIR/CodeGen/compound_literal.c
+57-194 files

LLVM/project f5c30f9llvm/test/TableGen RuntimeLibcallEmitter-variant-beats-exclusion.td, llvm/utils/TableGen/Basic RuntimeLibcallsEmitter.cpp

RuntimeLibcallsEmitter: Let a consumer's own library variant beat its exclusion

A target can pull a shared library via LibraryRef<Lib, [impls]> to drop some
impls, then re-add its own versions through a same-name library variant guarded
on that target. Previously the exclusion's setUnavailable calls were emitted at
the end of setAvailableLibFuncs_<name>, after every variant, so they clobbered
the target's own re-adds.

Defer emitting a variant until after the exclusions when it re-adds an impl its
own consumer excludes (same predicates), so the target's re-add wins while
the exclusion still suppresses every other variant's contribution.

This is yet unused infrastructure for future changes.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+70-26llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+55-0llvm/test/TableGen/RuntimeLibcallEmitter-variant-beats-exclusion.td
+125-262 files

LLVM/project cd86ae7llvm/test/TableGen RuntimeLibcallEmitter-library-default-cc.td, llvm/utils/TableGen/Basic RuntimeLibcallsEmitter.cpp

RuntimeLibcallsEmitter: Handle calling conv in per-library functions

Pull handling of the default calling convention into the
setAvailableLibFuncs_<name> functions, so the library logic will be
fully contained.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+80-5llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+50-0llvm/test/TableGen/RuntimeLibcallEmitter-library-default-cc.td
+130-52 files

LLVM/project b2175eaclang/lib/CIR/CodeGen CIRGenExprAggregate.cpp, clang/test/CIR/CodeGen non-type-template-param.cpp

[CIR] Support SubstNonTypeTemplateParmExpr for aggregates (#223603)

Lower `SubstNonTypeTemplateParmExpr` in `AggExprEmitter` by visiting its
replacement expression, matching classic Clang codegen (`CGExprAgg.cpp`)
and existing scalar (#146751), complex (#146755), and lvalue (#182920)
implementations.

The missing aggregate NTTP gap was analyzed with LLM assistance.

Fixes #223533
DeltaFile
+47-27clang/test/CIR/CodeGen/non-type-template-param.cpp
+1-2clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
+48-292 files

LLVM/project 95bcf5dlldb/include/lldb/ValueObject ValueObjectRegister.h, lldb/source/ValueObject ValueObjectRegister.cpp

[lldb] Compare registers by LLDB register number (#223704)

Fix `GetIndexOfChildWithName`/`GetChildMemberWithName` on `Windows
x86_64` (Release builds), where comparing registers by RegisterInfo
pointer identity could spuriously fail to find sp/rsp in the GPR set.

Compare by `eRegisterKindLLDB` number instead.

Failing bot: https://ci-external.swift.org/job/lldb-windows/job/main
DeltaFile
+6-1lldb/source/ValueObject/ValueObjectRegister.cpp
+2-0lldb/include/lldb/ValueObject/ValueObjectRegister.h
+8-12 files

LLVM/project 3cbae16mlir/lib/Dialect/SparseTensor/Pipelines SparseTensorPipelines.cpp, mlir/test/Dialect/SparseTensor sparsifier_lower_affine.mlir

[mlir][sparse] Lower affine before SCF to CF in sparsifier (#219860)

Fix the lowering order in the sparsifier pipeline by running
`convert-scf-to-cf` after `lower-affine`.

Previously, `convert-scf-to-cf` ran while Affine control-flow operations
could still be present. For example, lowering an `scf.if` nested inside
an `affine.for` introduces multiple blocks into the loop body, violating
`affine.for`'s single-block region requirement and causing verification
to fail.

Running `lower-affine` first converts Affine control flow to SCF. The
subsequent `convert-scf-to-cf` pass can then lower both the existing SCF
operations and those introduced by Affine lowering to CFG-based control
flow.

Fixes #217895
DeltaFile
+20-0mlir/test/Dialect/SparseTensor/sparsifier_lower_affine.mlir
+1-1mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
+21-12 files

LLVM/project a949919llvm/lib/Transforms/AggressiveInstCombine CMakeLists.txt

[AggressiveInstCombine] Fix shared libraries build (#223756)

Broken by #223728 by depending upon a function in ProfileData. Add that
as a dependency to fix the build.
DeltaFile
+1-0llvm/lib/Transforms/AggressiveInstCombine/CMakeLists.txt
+1-01 files

LLVM/project be5f7cblldb/source/Plugins/Process/Windows/Common NativeProcessWindows.h NativeProcessWindows.cpp, lldb/unittests/Process CMakeLists.txt

[lldb][Windows] Key lldb-server's loaded-module list by base address (#223445)

`NativeProcessWindows` keys `m_loaded_modules` by `FileSpec`, so a
second mapping of an already-loaded DLL overwrites the first one's base
address, and `OnUnloadDll` then erases by address. The wrong mapping
gets dropped.

This reproduces reliably in swiftlang where `swiftCore.dll` is loaded
twice.

This patch maps by base address instead (the identity `UNLOAD_DLL`
carries), so an unload resolves to the right file and only retires the
reported entry when it is that file's last mapping.
It introduces the `LoadedModuleList` class to key the modules correctly
and 9 regression unit tests.

---------

Co-authored-by: Nerixyz <nero.9 at hotmail.de>
DeltaFile
+104-0lldb/unittests/Process/Windows/LoadedModuleListTest.cpp
+84-0lldb/source/Plugins/Process/Windows/Common/LoadedModuleList.h
+16-27lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
+6-0lldb/unittests/Process/Windows/CMakeLists.txt
+3-1lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
+3-0lldb/unittests/Process/CMakeLists.txt
+216-286 files

LLVM/project 54a2f1cllvm/test/TableGen RuntimeLibcallEmitter-library-ref.td

RuntimeLibcalls: Update library-ref test for removed EABIVersion parameter

This test was added on main after the parent commit was written, so its
CHECK lines still expect EABIVersion in the generated dispatcher calls.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+2-2llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
+2-21 files

LLVM/project 8aa00e2llvm/test/CodeGen/AArch64 shift-mod.ll

[AArch64][GlobalISel] Add GISel test coverage for shift-mod.ll. NFC (#223753)
DeltaFile
+73-31llvm/test/CodeGen/AArch64/shift-mod.ll
+73-311 files

LLVM/project f1dac28llvm/test/CodeGen/Mips divrem.ll, llvm/test/CodeGen/PowerPC urem-vector-lkk.ll srem-vector-lkk.ll

[DAGCombiner] Port custom DAG combine for `rem` from NVPTX (#210344)

Part of #116695
Supersedes #167147

Port NVPTX combine for `rem` to DAGCombine. Folds `Num % Den -> Num -
(Num / Den) * Den` if `DIVREM` is not supported by the backend.
DeltaFile
+152-189llvm/test/CodeGen/PowerPC/srem-vector-lkk.ll
+88-125llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
+56-52llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
+56-52llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
+44-32llvm/test/CodeGen/X86/divrem.ll
+28-35llvm/test/CodeGen/Mips/divrem.ll
+424-4859 files not shown
+541-62515 files

LLVM/project cdd5291llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination induction-relational-predicate-latch.ll add-nsw.ll

[ConstraintElim] Unify no-wrap queries. (#223537)

Unify no-wrap queries in new isKnownNoWrap helper, which checks both
wrap flags on instructions and query-based reasoning in a single place.
Checks signed/unsigned wrap depending on a flag.

Update both decompose and tryToStrengthenFlags to use shared helper.

This improves results in a number of cases, because some rules were only
implemented for tryToStrengthenFlags and others in decompose:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1313

Note that there are 2-3 small regressions due added flags/removed
branches pessimizing other parts of the pipeline.

Compile-time impact in the noise for geomean. Notable individual changes
is mafft -0.05% in stage1-ReleaseThinLTO, and lencod +0.05% for
stage2-O3.


    [2 lines not shown]
DeltaFile
+154-190llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+145-0llvm/test/Transforms/ConstraintElimination/decompose-signed-preconditions.ll
+84-0llvm/test/Transforms/ConstraintElimination/decompose-unsigned-preconditions.ll
+46-5llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-postinc.ll
+23-23llvm/test/Transforms/ConstraintElimination/add-nsw.ll
+13-13llvm/test/Transforms/ConstraintElimination/induction-relational-predicate-latch.ll
+465-23113 files not shown
+495-26619 files

LLVM/project 0f4f7afclang/docs ReleaseNotes.md, clang/include/clang/Basic DiagnosticSemaKinds.td

[Clang][Sema] Add Diagnostic for using matrix logical on non HLSL targets (#223252)

Make Clang emit an error message instead of crashing when using matrix
logical operations on non-HLSL targets.

Issue #222381
DeltaFile
+6-0clang/test/SemaCXX/matrix-type.cpp
+3-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+1-1clang/lib/Sema/SemaExpr.cpp
+2-0clang/docs/ReleaseNotes.md
+12-14 files

LLVM/project 336e8a7libcxxabi/src private_typeinfo.cpp, llvm/test/Analysis/CostModel/ARM shuffle.ll

Merge branch 'main' into users/adams381/cir-callconv-vaarg-x86-64
DeltaFile
+4,864-0llvm/test/CodeGen/RISCV/smulh.ll
+4,319-0llvm/test/CodeGen/RISCV/umulh.ll
+868-1,017libcxxabi/src/private_typeinfo.cpp
+752-318llvm/test/Analysis/CostModel/ARM/shuffle.ll
+851-0llvm/test/CodeGen/X86/smulh.ll
+746-0llvm/test/CodeGen/X86/umulh.ll
+12,400-1,335421 files not shown
+29,907-6,788427 files

LLVM/project f02c864clang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp, clang/test/CIR/CodeGen var-arg-vector.c var_arg.c

[CIR] Take the va_arg register demand from the classifier

rewriteVAArg rebuilt how many registers of each class the fetched type
needs by inspecting that type.  ArgInfo and ArgClassification now carry
the demand the x86-64 classifier already computes.

The register arm also has to copy into a full-size temp whenever the
registers carry less than the whole result, not only when the value
starts at a byte offset.  A record whose tail holds no field took the
neighbouring slot as part of its value.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+77-98clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+168-0clang/test/CIR/CodeGen/var-arg-direct-offset.cpp
+88-12clang/test/CIR/CodeGen/var-arg-aggregate.c
+80-6clang/test/CIR/CodeGen/var_arg.c
+50-7clang/test/CIR/CodeGen/var-arg-vector.c
+22-13mlir/include/mlir/ABI/ABIRewriteContext.h
+485-1366 files not shown
+545-14612 files

LLVM/project 8e39842llvm/lib/Transforms/AggressiveInstCombine AggressiveInstCombine.cpp, llvm/test/Transforms/AggressiveInstCombine memset.ll

[AggressiveInstCombine] Preserve Profile Info for [0,1] Memset Guard (#223728)

This showed up as a profcheck failure from #213240. If the memset has
profile information, we can use that to synthesize appropriate branch
weights.
DeltaFile
+92-3llvm/test/Transforms/AggressiveInstCombine/memset.ll
+32-0llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+0-1llvm/utils/profcheck-xfail.txt
+124-43 files

LLVM/project 1dd934dllvm/test/TableGen RuntimeLibcallEmitter.td, llvm/utils/TableGen/Basic RuntimeLibcalls.h RuntimeLibcalls.cpp

RuntimeLibcalls: Remove the dead IsDefault emitter machinery (#219947)

The IsDefault bit on RuntimeLibcallImpl fed a LibCallToDefaultImpl map
in the TableGen backend that was populated but never read.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-7llvm/test/TableGen/RuntimeLibcallEmitter.td
+0-8llvm/utils/TableGen/Basic/RuntimeLibcalls.cpp
+0-5llvm/utils/TableGen/Basic/RuntimeLibcalls.h
+4-203 files

LLVM/project 7d003d1llvm/lib/Target/AMDGPU AMDGPUAtomicOptimizer.cpp, llvm/test/CodeGen/AMDGPU atomic-optimizer-uniform-vector.ll

[AMDGPU] Skip vector atomicrmw operands in AtomicOptimizer (#223309)

A uniform `<2 x i32>` `atomicrmw add` reaches a scalar-to-vector
lane-count cast and asserts in AMDGPUAtomicOptimizer. 
The divergent-value path rejects types in `isLegalCrossLaneType`, 
but the uniform-value path does not.

Returned vectors also enter scalar result construction.

Reject vector types in `visitAtomicRMWInst` and `visitIntrinsicInst`
before either value path. The regression covers unused 
global `add`, returned LDS `and`,
and a uniform scalar `i16` control that must still optimize, using DPP 
and iterative strategies on wave64 and wave32 subtargets.
DeltaFile
+65-0llvm/test/CodeGen/AMDGPU/atomic-optimizer-uniform-vector.ll
+6-0llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+71-02 files

LLVM/project 277099fllvm/lib/Transforms/Utils LowerAtomic.cpp, llvm/test/Transforms/AtomicExpand/ARM thread-model-single.ll

[LowerAtomic] Mark cmpxchg select with unknown branch weights (#223736)

LowerAtomic in cmpxchg lowering creates a select to figure out what to
store. This is conditioned on whether or not the compare value is equal
to the value in memory, which we currently have no way of knowing the
probability of. So mark the branch weights explicitly unknown.

It seems like we were lacking coverage of this case before #223157,
which made this test pop up on the profcheck bot.
DeltaFile
+7-3llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
+5-1llvm/lib/Transforms/Utils/LowerAtomic.cpp
+0-1llvm/utils/profcheck-xfail.txt
+12-53 files

LLVM/project d0fb035clang/lib/Driver/ToolChains/Arch ARM.cpp, clang/test/Driver eabi.c

CodeGen: Remove TargetOptions::EABIVersion

The field's only effect was gating the __aeabi_mem*[4|8] libcalls via the
IsEABI4/IsEABI5 predicates. That distinction is derivable from the triple's
environment, so replace the two predicates with a single
triple-derived IsEABIVersion and delete the field.

The clang -meabi option and clang::TargetOptions::EABIVersion are
retained (now codegen-inert); the llc/opt -meabi flag is removed. -meabi
now only takes effect on triples with a bare-EABI/GNU environment pair
(arm-none-eabi <-> gnueabi), which is the only case with a triple
representation.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+32-0clang/lib/Driver/ToolChains/Arch/ARM.cpp
+4-21llvm/test/CodeGen/ARM/arm-eabi.ll
+13-6clang/test/Driver/eabi.c
+7-11llvm/include/llvm/IR/RuntimeLibcalls.h
+0-17llvm/lib/Target/ARM/ARMTargetMachine.cpp
+7-7llvm/lib/IR/RuntimeLibcalls.cpp
+63-6231 files not shown
+121-14737 files

LLVM/project 116f171libc/test/src/math/exhaustive cos.wc sin.wc, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.896bit.ll amdgcn.bitcast.960bit.ll

comment

Created using spr 1.3.7
DeltaFile
+1,091,085-0libc/test/src/math/exhaustive/sin.wc
+1,090,178-0libc/test/src/math/exhaustive/cos.wc
+62,525-61,390llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+9,388-9,578llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,656-7,977llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+4,566-6,726llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+2,263,398-85,6716,026 files not shown
+2,589,381-258,1676,032 files

LLVM/project ed75a54libc/test/src/math/exhaustive cos.wc sin.wc, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.896bit.ll amdgcn.bitcast.960bit.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1,091,085-0libc/test/src/math/exhaustive/sin.wc
+1,090,178-0libc/test/src/math/exhaustive/cos.wc
+62,525-61,390llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+9,388-9,578llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,656-7,977llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+4,566-6,726llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+2,263,398-85,6716,025 files not shown
+2,589,376-258,1656,031 files

LLVM/project ad41389llvm/include/llvm/IR RuntimeLibcalls.h RuntimeLibcallsImpl.td, llvm/test/TableGen RuntimeLibcallEmitter-library-ref.td

RuntimeLibcalls: Add LibraryRef for dispatch-with-exclusion (#218869)

Let a SystemRuntimeLibrary dispatch a shared provider library while
dropping the impls the target replaces, since a library reference cannot nest 
inside (sub ...). This is a compromise from the ideal of explicitly listing all calls, 
but getting to that point is prooving to be difficult.

The opt-out is emitted inside setAvailableLibFuncs_<lib>, so the single library's
logic is self contained.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+89-19llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+53-0llvm/test/TableGen/RuntimeLibcallEmitter-library-ref.td
+8-0llvm/include/llvm/IR/RuntimeLibcallsImpl.td
+4-0llvm/include/llvm/IR/RuntimeLibcalls.h
+154-194 files

LLVM/project 43b287eclang/include/clang/AST Decl.h DeclBase.h, clang/lib/AST DeclCXX.cpp DeclObjC.cpp

Cache DeclContext-to-Decl conversions

Store the owning Decl pointer when constructing each DeclContext and route
parent traversal and generic casts through it. This avoids a lazy lookup and
does not imply support for concurrent AST traversal.

CTMark O0 (three alternating matched-build samples, CPU 6): 28.990700 s ->
28.702600 s (-0.9938%). Peak build RSS: 258016 -> 259276 KiB (+0.4883%).
All 632 normalized objects matched in each pair.

MLIR build-time medians (three alternating matched-build samples, CPU 6):
- `mlir/lib/RegisterAllDialects.cpp`: 2.8115% fewer retired instructions,
  0.7353% less user CPU, 0.1972% less wall time, and 7144 KiB (+0.5257%)
  peak RSS.
- `mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp`: 1.5841% fewer retired
  instructions, 1.1120% less user CPU, 0.9893% less wall time, and 912 KiB
  (+0.0795%) peak RSS.

All MLIR outputs matched after removing only `.comment`; each concurrency

    [3 lines not shown]
DeltaFile
+3-19clang/lib/AST/DeclBase.cpp
+5-17clang/include/clang/AST/DeclBase.h
+10-8clang/lib/AST/Decl.cpp
+5-4clang/include/clang/AST/Decl.h
+3-3clang/lib/AST/DeclObjC.cpp
+2-2clang/lib/AST/DeclCXX.cpp
+28-534 files not shown
+33-5710 files

LLVM/project 408a094llvm/lib/CodeGen MachinePipeliner.cpp, llvm/test/CodeGen/PowerPC sms-regpress.mir

[MachinePipeliner] Use VirtRegOrUnit instead of Register appropriately (#177535)

Resolve the FIXMEs in MachinePipeliner added in #167730, primarily by
replacing `Register` with `VirtRegOrUnit` where necessary to remove
invalid `static_cast`s. Based on my local testing, there was no
noticeable performance impact.

---------

Co-authored-by: Harsha Jagasia <harsha.jagasia at amd.com>
DeltaFile
+32-56llvm/lib/CodeGen/MachinePipeliner.cpp
+8-1llvm/test/CodeGen/PowerPC/sms-regpress.mir
+40-572 files

LLVM/project 1f83538clang/lib/AST/ByteCode Opcodes.td Compiler.cpp, clang/test/AST/ByteCode c.c builtin-object-size-codegen.c

[clang][bytecode] Apply pointer casts to opaque pointers (#223607)

For `((char *)&sqlite3Prepare_sParse) + 4`, the final byte offset should
be `4`, not `4 * sizeof(sqlite3Prepare_sParse)`. To handle that, we need
to actually pass the cast along to the opaque pointer.
DeltaFile
+56-6clang/lib/AST/ByteCode/Interp.cpp
+2-34clang/lib/AST/ByteCode/Interp.h
+12-0clang/test/AST/ByteCode/c.c
+12-0clang/test/AST/ByteCode/builtin-object-size-codegen.c
+2-1clang/lib/AST/ByteCode/Compiler.cpp
+1-1clang/lib/AST/ByteCode/Opcodes.td
+85-426 files