LLVM/project c254a1elibcxx/include/__vector vector.h

[libc++][NFC] Remove vector::__base_destruct_at_end (#217631)

We can just inline `__base_destruct_at_end` into `__destruct_at_end`.
The only other place where `__base_destruct_at_end` was used is
`clear()`, but that has basically the same code as `__destruct_at_end`,
so we can use `__destruct_at_end` instead.
DeltaFile
+4-11libcxx/include/__vector/vector.h
+4-111 files

LLVM/project 1769f04llvm/test/Transforms/LoopVectorize select-folds.ll

[VPlan] Add test for miscompile due to select VPlan fold (NFC). (#218516)
DeltaFile
+53-0llvm/test/Transforms/LoopVectorize/select-folds.ll
+53-01 files

LLVM/project a6eb1e1llvm/lib/Target/X86 X86ISelLowering.cpp

[X86] LowerAVXCONCAT_VECTORS - fix some clang-format messiness. NFC. (#218504)

Bad indentation and missing braces

Pulled out of #218381 to simplify functional diff
DeltaFile
+11-12llvm/lib/Target/X86/X86ISelLowering.cpp
+11-121 files

LLVM/project e625da3mlir/include/mlir/Dialect/Tensor/IR Tensor.h TensorOps.td, mlir/lib/Dialect/Linalg/Transforms DropUnitDims.cpp

[mlir][Tensor] Preserve correct rank expansions in InsertSlice canonicalizer (#217361)

Inferring the source type of an `insert_slice` with constant-folded
arguments "canonically", i.e. by dropping off unit dimensions from the
front of the constant-folded destination shape, is not guaranteed to
match the actual rank transformation of the original `insert_slice` op.
I've encountered this as a loop peeling bug, where materializing
constant slice sizes for the peeled iteration would create the following
sequence:
```
// Before fold
%12 = arith.constant 2 : index
%13 = arith.constant 2 : index // Materialized peel iteration sizes
...
%inserted_slice_13 = tensor.insert_slice %conv into %extracted_slice_9[0, 0, 0, 0] [1, %12, 1, %13] [1, 1, 1, 1] : tensor<1x?x?xf32> into tensor<1x?x1x?xf32>
%inserted_slice_14 = tensor.insert_slice %inserted_slice_13 into %arg13[0, 0, 0, 0] [1, %12, 1, %13] [1, 1, 1, 1] : tensor<1x?x1x?xf32> into tensor<1x?x1x?xf32>

// After a series of incorrect folds
%cast = tensor.cast %conv : tensor<1x2x2xf32> to tensor<1x?x2xf32>

    [19 lines not shown]
DeltaFile
+29-71mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
+78-2mlir/test/Dialect/Tensor/canonicalize.mlir
+2-19mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
+18-0mlir/include/mlir/Dialect/Tensor/IR/Tensor.h
+8-3mlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
+135-955 files

LLVM/project 05f7078mlir/lib/Dialect/SCF/Transforms ParallelLoopFusion.cpp, mlir/test/Dialect/SCF parallel-loop-fusion.mlir

[mlir][scf] Fuse parallel loops with equal constant bounds (#218450)

Two `scf.parallel` loops that run over the same range were not being
fused if
their bounds came from different `arith.constant` ops.

Both loops here go from 0 to 16 by 1, so they should fuse, but they do
not:

```mlir
%c0 = arith.constant 0 : index
%c16 = arith.constant 16 : index
%c1 = arith.constant 1 : index
scf.parallel (%i) = (%c0) to (%c16) step (%c1) { ... }

%c0_0 = arith.constant 0 : index
%c16_1 = arith.constant 16 : index
%c1_2 = arith.constant 1 : index
scf.parallel (%i) = (%c0_0) to (%c16_1) step (%c1_2) { ... }

    [33 lines not shown]
DeltaFile
+118-0mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
+16-2mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
+134-22 files

LLVM/project 4161217mlir/include/mlir/Interfaces ValueBoundsOpInterface.h, mlir/lib/Interfaces ValueBoundsOpInterface.cpp

[MLIR] fix: ValueBoundsConstraintSet invalidates queue (#218612)

populateConstraints(AffineMap, ValueDimList) updates positionToValueDim,
changing the meaning of all elements in the worklist. In order to
preserve the correct mapping, I've changed the element type to ValueDim.
The new lit tests show the example where the issue happened.

Assisted-by: Cursor / Grok 4.6
DeltaFile
+55-0mlir/test/Dialect/Affine/value-bounds-op-interface-impl.mlir
+4-5mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
+4-1mlir/include/mlir/Interfaces/ValueBoundsOpInterface.h
+63-63 files

LLVM/project c0ed6dcclang/test/Analysis/Scalable/source-edit-generation write-failure.cpp happy-path.cpp

Followup for #218572 broken build bots (#218617)

The PR intended to workaround some failing internal build bots tracked
as rdar://185749574

However, this (7c9ba667766060d112e5851879c305a45d035034) itself caused
upstream build bots to fail:
https://lab.llvm.org/buildbot/#/builders/225/builds/16454
https://lab.llvm.org/buildbot/#/builders/144/builds/63036
https://lab.llvm.org/buildbot/#/builders/27/builds/4103
https://lab.llvm.org/buildbot/#/builders/65/builds/39394
https://lab.llvm.org/buildbot/#/builders/190/builds/48503
https://lab.llvm.org/buildbot/#/builders/154/builds/35610
https://lab.llvm.org/buildbot/#/builders/174/builds/40232

For example:
```
XPASS: Clang :: Analysis/Scalable/source-edit-generation/happy-path.cpp (2274 of 111631)
******************** TEST 'Clang :: Analysis/Scalable/source-edit-generation/happy-path.cpp' FAILED ********************

    [8 lines not shown]
DeltaFile
+1-1clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
+1-1clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
+1-1clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
+3-33 files

LLVM/project 32226callvm/include/llvm/CodeGen ValueTypes.td, llvm/test/TableGen CPtrWildcard.td

[CodeGen] Adding v1024i16 and v2048i16 (#216118)

Filling in obviously missing ValueTypes v1024i16, v2048i16 and v1024bf16.
DeltaFile
+2-2llvm/test/TableGen/CPtrWildcard.td
+3-0llvm/include/llvm/CodeGen/ValueTypes.td
+5-22 files

LLVM/project b750282flang/test/Driver tco-test-gen.fir, mlir/test/Conversion/GPUCommon memory-attrbution.mlir

minor test fixes
DeltaFile
+0-2flang/test/Driver/tco-test-gen.fir
+1-1mlir/test/Dialect/X86/AMX/legalize-for-llvm.mlir
+1-1mlir/test/Conversion/GPUToLLVMSPV/gpu-to-llvm-spv.mlir
+1-1mlir/test/Conversion/GPUCommon/memory-attrbution.mlir
+3-54 files

LLVM/project 23c88e8llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

[AArch64][SDAG][NFC] Use CNTP intrinsic for compressstore lowering (#218353)

Currently, when lowering compressstore the process is to Zero Extend,
VECREDUCE_ADD and then Zero Extend the result for types that are not
i64. This for i8/i16 types does not work as AArch64 cannot zero extend
these types to i64. Instead, use the CNTP intrinsic to combine the
values before storing them.
DeltaFile
+4-9llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+4-91 files

LLVM/project c6dba93llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination constraint-overflow.ll

[ConstraintElim] Avoid overflow when negating offsets (#218580)

This patch fixes a miscompilation in ConstraintElimination caused by
negating an INT64_MIN offset while constructing a constraint.

Use MulOverflow when negating the decomposed offset and skip constraint
construction if the negation overflows.

Fixes: #218569.
DeltaFile
+22-0llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
+2-1llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+24-12 files

LLVM/project 2e7fff9llvm/include/llvm/CodeGen SlotIndexes.h

[CodeGen] Speed up instruction insertion with debug info (NFCI) (#218373)

Debug instructions don't have slot indexes, so no need to look them up
when searching for the nearest indexed instruction.

This avoids unnecessary lookups (that would all fail) in functions with
a lot of debug info.
DeltaFile
+4-0llvm/include/llvm/CodeGen/SlotIndexes.h
+4-01 files

LLVM/project 2c4d1dfllvm/include/llvm/ExecutionEngine/Orc SimpleRemoteEPC.h, llvm/include/llvm/ExecutionEngine/Orc/Shared SimpleRemoteEPCUtils.h

[ORC] Harmonize the SimpleRemoteEPC hangup protocol (#218586)

A Hangup message now always carries a serialized Error saying why the
session is ending -- success for an orderly disconnect, otherwise the
reason -- encoded and decoded through shared helpers so the two ends of
the protocol cannot drift apart. SimpleRemoteEPC::disconnect sends one,
and SimpleRemoteEPCServer decodes the payload it previously discarded.

Both ends now also report an error when the transport disconnects
without either side having announced a hangup. Previously the executor
exited successfully whether the controller hung up or vanished, so a
crashed controller was indistinguishable from a clean run. The cause of
such a disconnection isn't knowable, so the error states what was
observed rather than attributing it.

This aligns SimpleRemoteEPC/SimpleRemoteEPCServer with upcoming ORC
runtime patches that will introduce a SimpleRemoteEPCServer-compatible
ControllerAccess implementation.
DeltaFile
+47-12llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
+28-2llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
+24-0llvm/lib/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.cpp
+21-0llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
+16-0llvm/include/llvm/ExecutionEngine/Orc/Shared/SimpleRemoteEPCUtils.h
+6-0llvm/include/llvm/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.h
+142-146 files

LLVM/project 4a1c146llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 fminimumnum-fmaximumnum.ll

[X86] Fix NaN handling in minimumnum/maximumnum zero fixup (#217420)

Fix the X86 lowering of `minimumnum`/`maximumnum` when the first operand
is NaN and signed-zero handling is required.

`PSEUDO_FMIN`/`PSEUDO_FMAX` already select the numeric second operand
when the first operand is NaN. However, the subsequent signed-zero fixup can
modify that numeric result using the sign bit of the first operand.

For example, `minimumnum(-qNaN, +1.0)` can therefore turn the correctly
selected `+1.0` into `-1.0`.

Restore the second operand when the first operand is NaN after the
signed-zero fixup. The additional check is restricted to numeric min/max
operations where NaNs cannot be ignored and the first operand is not
already known to be non-NaN.

The existing handling for a NaN second operand remains unchanged.


    [11 lines not shown]
DeltaFile
+763-189llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
+7-0llvm/lib/Target/X86/X86ISelLowering.cpp
+770-1892 files

LLVM/project 65d6b72llvm/test/Transforms/LoopVectorize/VPlan/AArch64 vplan-memory-op-decisions.ll

[VPlan] Add tests for consecutive memory ops not widened in VPlan (NFC). (#218501)

Add VPlan printing tests for unit-stride consecutive accesses whose
address VPlan's SCEV construction cannot handle yet, so widening is left
to the legacy cost model.
DeltaFile
+542-0llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
+542-01 files

LLVM/project 525dff6llvm/lib/Transforms/InstCombine InstCombineCompares.cpp

[InstCombine] Add comment on multi-use for indexed compare fold (NFC) (#218434)

From the experiment in https://github.com/llvm/llvm-project/pull/151524,
restricting the fold to one-use does not appear to be beneficial in
practice. Leave a comment mentioning this.
DeltaFile
+5-0llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+5-01 files

LLVM/project e6a74b5clang/test/CodeGen cx-complex-range.c, clang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c

[Clang] Mark indirect arguments as nofreeobj instead of nofree (#218404)

For indirect arguments, we know that the underlying object cannot be
freed during the execution of the function, through any pointer, not
just that specific pointer. As such, we can use the stronger nofreeobj
attribute. Unlike nofree, it is useful without noalias.
DeltaFile
+733-733clang/test/CodeGen/LoongArch/lasx/builtin.c
+733-733clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+56-56clang/test/OpenMP/target_teams_distribute_parallel_for_simd_firstprivate_codegen.cpp
+56-56clang/test/OpenMP/target_teams_distribute_parallel_for_firstprivate_codegen.cpp
+46-46clang/test/CodeGen/SystemZ/systemz-abi-vector.c
+44-44clang/test/CodeGen/cx-complex-range.c
+1,668-1,668129 files not shown
+2,414-2,414135 files

LLVM/project add5d15llvm/include/llvm/Analysis Loads.h, llvm/lib/Analysis Loads.cpp

[Loads] Migrate isSafeToLoadUnconditionally() to SimplifyQuery (#218424)

isDereferenceablePointer() was changed to use SimplifyQuery some time
ago, do the same for isSafeToLoadUnconditionally().
DeltaFile
+17-26llvm/lib/Analysis/Loads.cpp
+11-14llvm/include/llvm/Analysis/Loads.h
+6-6llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+6-6llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-3llvm/lib/Transforms/Scalar/SROA.cpp
+2-2llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+46-573 files not shown
+49-619 files

LLVM/project cd93122flang/test/Fir convert-to-llvm-openmp-and-fir.fir, mlir/test/Conversion/MemRefToLLVM convert-static-memref-ops.mlir convert-dynamic-memref-ops.mlir

[mlir] Build llvm.mlir.constant attributes from the result type

Many conversion patterns created `llvm.mlir.constant` with a value attribute
whose type does not match the result type. The most common case was pairing an
`index`-typed attribute with the converted index type:

  llvm.mlir.constant(1 : index) : i64

but there were also plain width and signedness mismatches, e.g. NVGPU's
`makeI64Const` built `i64` constants from `i32` attributes, and the NVVM
`fdiv` expansion used `ui32` attributes on `i32` values.

Translation to LLVM IR ignores the attribute type and uses the result type, so
the emitted IR was correct, but the attribute type is meaningless in this state
and anything that reads it back sees the wrong type. Derive the attribute from
the result type in every case; where the result is the converted index type the
existing `createIndexAttrConstant` helper does this already, so use it. In
`ArithToLLVM`, retype the value attribute when the type converter maps `index`
to a different integer type, and fail the match rather than reinterpret a

    [5 lines not shown]
DeltaFile
+63-63mlir/test/Target/LLVMIR/llvmir.mlir
+58-58mlir/test/Conversion/MemRefToLLVM/memref-to-llvm.mlir
+55-55mlir/test/Conversion/MemRefToLLVM/expand-then-convert-to-llvm.mlir
+49-43flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
+45-45mlir/test/Conversion/MemRefToLLVM/convert-dynamic-memref-ops.mlir
+43-43mlir/test/Conversion/MemRefToLLVM/convert-static-memref-ops.mlir
+313-307105 files not shown
+962-892111 files

LLVM/project eb4f417flang/lib/Optimizer/CodeGen CodeGen.cpp, flang/test/Fir tbaa.fir convert-to-llvm.fir

[flang][CodeGen] Use a signless attribute for the addendum flag masks

The descriptor addendum flag masks were built as `ui8` attributes but attached
to `i8` constants:

  llvm.mlir.constant(254 : ui8) : i8

The LLVM dialect only models signless integers, so the attribute type and the
result type disagree. Use the signless `i8` type for the attribute as well; the
bit patterns are unchanged, only their printed form is (`254 : ui8` becomes
`-2 : i8`).

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+2-2flang/test/Fir/convert-to-llvm.fir
+2-2flang/lib/Optimizer/CodeGen/CodeGen.cpp
+1-1flang/test/Fir/tbaa.fir
+5-53 files

LLVM/project d03786eutils/bazel/llvm-project-overlay/mlir BUILD.bazel

[Bazel] Fixes d93b383 (#218593)

This fixes d93b3836429c810681f34785bb1463198c80c749 (#218394).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=d93b3836429c810681f34785bb1463198c80c749

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+1-01 files

LLVM/project dad2928clang/docs HIPSupport.md, clang/lib/AST ExprConstant.cpp

[clang][HIP] Do not treat address of managed variable as a constant expression (#217047)

According to CUDA programming guide, the address of a __managed__
variable is not a constant expression, so it should not be accepted
where a constant expression is expected, i.e. NTTP, constexpr variable
initializers etc. Right now because addresses of managed variables are
assumed to be constexpr, crashes in clang's codegen happen during
replacement of uses of managed variables with loads from transformed
managed variables. It is not expected that a use of a managed variable
can be `llvm::ConstantExpr` which clang creates due to assumption that
address of a managed variable is a constant expression.

Fixes https://github.com/llvm/llvm-project/issues/198079

Assisted-by: claude in documentation writing
DeltaFile
+58-0clang/docs/HIPSupport.md
+52-0clang/test/SemaCUDA/managed-var.cu
+19-0clang/lib/Sema/SemaCUDA.cpp
+18-0clang/test/CodeGenCUDA/managed-var.cu
+4-5clang/test/SemaCUDA/constexpr-var.cu
+5-2clang/lib/AST/ExprConstant.cpp
+156-73 files not shown
+163-109 files

LLVM/project c6c5541llvm/docs/CommandGuide llc.rst, llvm/test/Other codegen-plugin-loading.ll

[PluginLoader] Drop legacy -load option from llc (#217860)

Loading of legacy Codegen pass plugins is the last remaining use-case
for the `-load` option in llc. We can drop it, if we switch the
respective test to `-load-pass-plugin`. We use the option only to load
the plugin shared-lib.
DeltaFile
+10-0llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
+0-6llvm/docs/CommandGuide/llc.rst
+1-1llvm/test/Other/codegen-plugin-loading.ll
+0-1llvm/tools/llc/llc.cpp
+11-84 files

LLVM/project e04b7cellvm/lib/Target/X86 X86.td, llvm/test/CodeGen/X86 pr77459.ll

[X86] Remove TuningFastVariableCrossLaneShuffle from X86_64V4Tuning (#212178)

## 1. Background

This flag pushes the compiler toward a shuffle variant that pulls its
permutation pattern from memory, even when that pattern is a
compile-time constant that could just be baked straight into the
instruction. Skipping the load shows gains whenever the pattern is fixed
like that.

We propose dropping it from the `x86-64-v4` tuning list as both SPEC and
the microbenchmark below show a real improvement in runtime in both
Intel and AMD machines.

## 2. SPEC impact

We ran SPEC CPU2017 `base` tuning, `refrate`. No regressions observed in
any of the other benchmarks in the suite, and **noticable gains were
observed in 557.xz_r**

    [137 lines not shown]
DeltaFile
+2-2llvm/test/CodeGen/X86/pr77459.ll
+0-1llvm/lib/Target/X86/X86.td
+2-32 files

LLVM/project 69e8298llvm/lib/MC/MCParser AsmParser.cpp, llvm/test/MC/AsmParser block-comment.s

[MC] eatToEndOfStatement: eat trailing EOL with Lex() (#218590)

eatToEndOfStatement() advances the lexer with Lexer.Lex(), which neither
filters comment tokens nor pops the include stack at Eof. It therefore
leaves the token after the newline unfiltered, and leads to a spurious
error:

```
.extern foo
/* comment */
nop

error: unexpected token at start of statement
```

Fix with Lex(). Loosely take and clean up tests from #218456
DeltaFile
+65-0llvm/test/MC/AsmParser/block-comment.s
+2-2llvm/lib/MC/MCParser/AsmParser.cpp
+67-22 files

LLVM/project 38419e4llvm/include/llvm/IR RuntimeLibcalls.td, llvm/test/CodeGen/X86 fp128-powi-strict.ll fp128-libcalls-strict.ll

RuntimeLibcalls: Stop providing __powitf2 on MSVCRT (#216987)

MSVCRT does not provide the powi helpers, so gate the fp128 __powitf2 on
isNotOSMSVCRT alongside the f32/f64 __powisf2/__powidf2, instead of
adding it unconditionally. The unconditional add was a hack to satisfy a test
that expected a wrongly-typed powi call on windows-msvc.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+21-133llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
+67-0llvm/test/CodeGen/X86/fp128-powi-strict.ll
+2-4llvm/include/llvm/IR/RuntimeLibcalls.td
+90-1373 files

LLVM/project fb8f0e6llvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/test/CodeGen/AArch64 optimize-cond-branch-undef.mir

AArch64: Fix assert on fold of undef operand

Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8)
DeltaFile
+104-0llvm/test/CodeGen/AArch64/optimize-cond-branch-undef.mir
+4-3llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+108-32 files

LLVM/project fcd34f4llvm/test/CodeGen/AMDGPU redundant-ballot-reads.ll, llvm/test/CodeGen/X86 finite-libcalls.ll fp80-math-libcalls.ll

Merge branch 'main' into users/rampitec/gfx1250-strict
DeltaFile
+448-0llvm/test/CodeGen/AMDGPU/redundant-ballot-reads.ll
+411-0mlir/test/Dialect/Linalg/fusion-elementwise-ops-with-concat.mlir
+374-0llvm/test/CodeGen/X86/fp80-math-libcalls.ll
+0-359llvm/test/CodeGen/X86/finite-libcalls.ll
+298-0llvm/test/tools/dsymutil/X86/DWARFLinkerParallel/odr-shared-subtree-demotion.s
+292-0mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
+1,823-35977 files not shown
+4,334-92583 files

LLVM/project 7c9ba66clang/test/Analysis/Scalable/source-edit-generation write-failure.cpp coexistence.cpp

[Clang][Analyzer] XFAIL tests failing after revert (#218572)

rdar://185749574

Co-authored-by: Mariusz Borsa <m_borsa at apple.com>
DeltaFile
+3-0clang/test/Analysis/Scalable/source-edit-generation/happy-path.cpp
+2-0clang/test/Analysis/Scalable/source-edit-generation/write-failure.cpp
+2-0clang/test/Analysis/Scalable/source-edit-generation/coexistence.cpp
+7-03 files

LLVM/project 5721f97libcxx/test/std/ranges/range.adaptors/range.enumerate/sentinel ctor.convert.pass.cpp

[libc++][ranges][enumerate_view] Fix sentinel converting constructor test (#217365)

Completes the `[range.enumerate.sentinel]` converting constructor test
by addressing the review comment
https://github.com/llvm/llvm-project/pull/73617#discussion_r1416643142
from the original implementation.

---------

Co-authored-by: Hristo Hristov <zingam at outlook.com>
DeltaFile
+73-10libcxx/test/std/ranges/range.adaptors/range.enumerate/sentinel/ctor.convert.pass.cpp
+73-101 files