LLVM/project bfbd191mlir/include/mlir/IR PDLPatternMatch.h.inc, mlir/lib/Rewrite ByteCode.cpp ByteCode.h

[mlir] Replace `llvm::OwningArrayRef` with `std::vector` (#168803)

There are several places where we use `llvm::OwningArrayRef`. The
interface to this requires us to first construct temporary storage, then
allocate space and set the allocated memory to 0, then copy the values
we actually want into that memory, then move the array into place.
Instead we can just do it all inline in a single pass by using
`std::vector`. In one case we actually allocate a completely separate
container and then allocate + copy the data over because
`llvm::OwningArrayRef` does not (and can't) support `push_back`.

Note that `llvm::SmallVector` is not a suitable replacement here because
we rely on reference stability on move construction: when the outer
container reallocates, we need the the contents of the inner containers
to be fixed in memory, and `llvm::SmallVector` does not give us that
guarantee.
DeltaFile
+26-34mlir/lib/Rewrite/ByteCode.cpp
+4-8mlir/include/mlir/IR/PDLPatternMatch.h.inc
+3-4mlir/lib/Rewrite/ByteCode.h
+33-463 files

LLVM/project 01e5e4fllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[DAGCombiner] Remove unneeded m_BitReverse from visitBITREVERSE. NFC (#168918)

We already know we're looking at BITREVERSE, we can match on the source
operand.
DeltaFile
+2-2llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-21 files

LLVM/project 6d52efc.github/workflows bazel-checks.yml

[Github] Error on HTTP 4xx Errors (#168919)

When downloading bazelisk/buildifier, we use curl, which still returns
exit code zero on HTTP 4xx errors unless we pass --fail. This patch adds
--fail flags so that error messages are more clear.
DeltaFile
+2-2.github/workflows/bazel-checks.yml
+2-21 files

LLVM/project e79c7c1llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU invariant-load-no-alias-store.ll

AMDGPU: Handle invariant loads when considering if a load can be scalar (#168787)

DeltaFile
+14-1llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
+2-1llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+16-22 files

LLVM/project 62deee4lldb/bindings/interface SBFrameExtensions.i

[LLDB] Add a child property to compliment the existing parent property (#168619)

I've been working on some scripts that evaluate the parent and child
frame. It's been very annoying that the parent frame has a property but
not the child. So I've added this to the extensions, I would've
preferred to return None, but because the existing impl returns an
invalid SBFrame, so I'm conforming to that API.

```
(lldb) script
Python Interactive Interpreter. To exit, type 'quit()', 'exit()' or Ctrl-D.
>>> lldb.frame
frame #0: 0x0000555555555200 fib.out`main
>>> lldb.frame.parent
frame #1: 0x00007ffff782a610 libc.so.6`__libc_start_call_main + 128
>>> lldb.frame.parent.child
frame #0: 0x0000555555555200 fib.out`main
```
DeltaFile
+8-0lldb/bindings/interface/SBFrameExtensions.i
+8-01 files

LLVM/project f163081llvm/test/tools/dsymutil/AArch64 stmt-seq-macho.test dwarf5-str-offsets-base-strx.test, llvm/test/tools/dsymutil/ARM stmt-seq-macho.test dwarf5-str-offsets-base-strx.test

[llvm][dsymutil][test] Create dedicated AArch64 directory (#168895)

Currently the tests for LLVM targets `AArch64` and `ARM` were in the
same directory. But if you only configured LLVM for one target (e.g.,
just `AArch64`, which is how I ran into this), then all tests under the
ARM directory are marked `UNSUPPORTED`.

This patch moves all the tests that are capable of running on
`AArch64`-only targets into a dedicated `AArch64` directory. The tests
that expected a plain `ARM` target were kept in the `ARM` directory.

Drive-by:
* Rename the `dummy-debug-map-amr64.map` to `dummy-debug-map-arm64.map`
(note the typo in `amr64`)
DeltaFile
+2,069-0llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
+0-2,069llvm/test/tools/dsymutil/ARM/stmt-seq-macho.test
+433-0llvm/test/tools/dsymutil/AArch64/dwarf5-str-offsets-base-strx.test
+0-433llvm/test/tools/dsymutil/ARM/dwarf5-str-offsets-base-strx.test
+236-0llvm/test/tools/dsymutil/AArch64/dwarf5-dwarf4-combination-macho.test
+0-236llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
+2,738-2,73853 files not shown
+3,803-3,79359 files

LLVM/project e96cc99cross-project-tests/debuginfo-tests/clang_llvm_roundtrip simplified_template_names.test, llvm/include/llvm/DebugInfo/DWARF DWARFTypePrinter.h

[llvm][DebugInfo] Unwrap template parameters that are typedefs when reconstructing DIE names (#168734)

Depends on: 
* https://github.com/llvm/llvm-project/pull/168725

When compiling with `-glldb`, we repoint the `DW_AT_type` of a DIE to be
a typedef that refers to the `preferred_name`. I.e.,:
```
template <typename T> structure t7;
using t7i = t7<int>;
template <typename T> struct __attribute__((__preferred_name__(t7i))) t7 {};
template <typename... Ts> void f1()

int main() { f1<t7i>(); }
```
would produce following (minified) DWARF:
```
DW_TAG_subprogram
  DW_AT_name      ("_STN|f1|<t7<int> >")

    [21 lines not shown]
DeltaFile
+19-3llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h
+0-1cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/simplified_template_names.test
+19-42 files

LLVM/project ccdb719lldb/test/API/functionalities/breakpoint/hardware_breakpoints/simple_hw_breakpoints TestSimpleHWBreakpoints.py

[lldb] Fix a test if hardware breakpoints are not supported (#168813)

If `HardwareBreakpointTestBase.supports_hw_breakpoints()` returns False,
`SimpleHWBreakpointTest.does_not_support_hw_breakpoints()` returns None,
so the test runs and fails. However, it should be skipped instead.

The test was added in #146602, while `supports_hw_breakpoints()` was
changed in #146609, which was landed earlier despite having a bigger
number.
DeltaFile
+10-19lldb/test/API/functionalities/breakpoint/hardware_breakpoints/simple_hw_breakpoints/TestSimpleHWBreakpoints.py
+10-191 files

LLVM/project f914426clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

lifetime-safety-multi-origin
DeltaFile
+217-96clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+94-53clang/lib/Analysis/LifetimeSafety/Origins.cpp
+104-23clang/test/Sema/warn-lifetime-safety.cpp
+86-19clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+19-50clang/lib/Sema/CheckExprLifetime.cpp
+31-0clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
+551-24111 files not shown
+605-28317 files

LLVM/project 66ddc9boffload/include/Shared Debug.h, offload/libomptarget OffloadRTL.cpp PluginManager.cpp

[OFFLOAD] Add support for more fine grained debug messages control (#165416)

This PR introduces new debug macros that allow a more fined control of
which debug message to output and introduce C++ stream style for debug
messages.

Changing existing messages (except a few that I changed for testing)
will come in subsequent PRs.

I also think that we should make debug enabling OpenMP agnostic but, for
now, I prioritized maintaing the current libomptarget behavior for now,
and we might need more changes further down the line as we we decouple
libomptarget.
DeltaFile
+281-0offload/include/Shared/Debug.h
+1-1offload/libomptarget/OffloadRTL.cpp
+1-1offload/libomptarget/PluginManager.cpp
+2-0offload/plugins-nextgen/host/src/rtl.cpp
+285-24 files

LLVM/project ba69569llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel irtranslator-amdgpu_kernel.ll regbankselect-widen-scalar-loads.mir

AMDGPU: Use ConstantPool as source value for DAG lowered kernarg loads

This isn't quite a constant pool, but probably close enough for this
purpose. We just need some known invariant value address. The aliasing
queries against the real kernarg base pointer will falsely report
no aliasing, but for invariant memory it probably doesn't matter.
DeltaFile
+216-216llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+76-76llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-widen-scalar-loads.mir
+73-73llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-load.mir
+22-9llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+20-7llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+8-8llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
+415-3894 files not shown
+433-39110 files

LLVM/project a406bd2llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU load-global-invariant.ll

AMDGPU: Handle invariant when lowering global loads

Global with invariant should be treated identically to
constant.
DeltaFile
+15-8llvm/test/CodeGen/AMDGPU/load-global-invariant.ll
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+16-92 files

LLVM/project a070240utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel][LoongArch] Port #168129: tablegen for sdnode (#168907)

DeltaFile
+4-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-01 files

LLVM/project 4aee501llvm/utils/gn/secondary/llvm/include/llvm/Analysis BUILD.gn, llvm/utils/gn/secondary/llvm/lib/Analysis BUILD.gn

[gn] port c9f573463ebd (TargetLibraryInfo.inc)
DeltaFile
+5-0llvm/utils/gn/secondary/llvm/include/llvm/Analysis/BUILD.gn
+3-0llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
+9-03 files

LLVM/project dd3f339llvm/test/CodeGen/AMDGPU load-global-invariant.ll

AMDGPU: Add baseline test for split/widen invariant loads
DeltaFile
+70-0llvm/test/CodeGen/AMDGPU/load-global-invariant.ll
+70-01 files

LLVM/project 34253e8llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU invariant-load-no-alias-store.ll

AMDGPU: Handle invariant loads when considering if a load can be scalar

Doesn't touch the globalisel version because the handling
there looks a bit broken.
DeltaFile
+14-1llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
+2-1llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+16-22 files

LLVM/project 0e1cb2dllvm/test/CodeGen/AMDGPU load-select-ptr.ll select-vectors.ll, llvm/test/CodeGen/NVPTX i1-select.ll fast-math.ll

Reapply "DAG: Allow select ptr combine for non-0 address spaces" (#168292) (#168786)

This reverts commit 6d5f87fc4284c4c22512778afaf7f2ba9326ba7b.

Previously this failed due to treating the unknown MachineMemOperand
value as known uniform.
DeltaFile
+71-76llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
+43-34llvm/test/CodeGen/NVPTX/i1-select.ll
+36-28llvm/test/CodeGen/NVPTX/fast-math.ll
+34-29llvm/test/CodeGen/AMDGPU/select-vectors.ll
+19-38llvm/test/CodeGen/NVPTX/lower-byval-args.ll
+15-12llvm/test/CodeGen/AMDGPU/select-load-to-load-select-ptr-combine.ll
+218-2176 files not shown
+260-24912 files

LLVM/project 4d92961flang/lib/Semantics check-omp-structure.cpp check-omp-structure.h

Remove invalidState_
DeltaFile
+0-4flang/lib/Semantics/check-omp-structure.cpp
+0-1flang/lib/Semantics/check-omp-structure.h
+0-52 files

LLVM/project 1c46492openmp/runtime/test/api omp_device_uid.f90

push forgotten test
DeltaFile
+65-0openmp/runtime/test/api/omp_device_uid.f90
+65-01 files

LLVM/project 7ca737dflang/test/Lower select-case-statement.f90

[flang] Switch select-case-statement.f90 to new lowering (#168754)

test/Lower/select-case-statement.f90 was still using the old lowering.
Modified the test with FIR generated using the new lowering. Changed the
test to use flang_fc1 instead of bbc and added testing for -O0 and -O1,
since character comparison lowering is done differently at -O0 (uses
runtime function) and -O1 (inlines some cases). Use different FileCheck
prefixes for different optimization levels (CHECK-O0 for -O0, CHECK-O1
for -O1, CHECK for both).
DeltaFile
+152-188flang/test/Lower/select-case-statement.f90
+152-1881 files

LLVM/project 602fa0cllvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp LegalizeIntegerTypes.cpp

[SDAG] Fix whitespace errors (NFC) (#168897)

To make life easier for future contributors. Note that formatting
changes are due to git clang-format on the touched whitespace-error
lines.
DeltaFile
+16-16llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-1llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+17-172 files

LLVM/project 6ce4794llvm/test/CodeGen/AMDGPU fp_to_sint.ll fp_to_uint.ll

[AMDGPU] Precommit tests for V_CVT_PK_[IU]16_F32 (#168893)

DeltaFile
+565-0llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
+460-0llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
+22-4llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll
+1,047-43 files

LLVM/project 1a7ca4cllvm/include/llvm/Analysis TargetTransformInfo.h, llvm/lib/Analysis UniformityAnalysis.cpp TargetTransformInfo.cpp

add target hook getInstructionUniformity
DeltaFile
+12-5llvm/lib/Analysis/UniformityAnalysis.cpp
+8-5llvm/lib/CodeGen/MachineUniformityAnalysis.cpp
+11-0llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+10-0llvm/include/llvm/Analysis/TargetTransformInfo.h
+8-0llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
+5-0llvm/lib/Analysis/TargetTransformInfo.cpp
+54-103 files not shown
+62-109 files

LLVM/project 6c79cc7llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 ldexp-avx512.ll fold-int-pow2-with-fmul-or-fdiv.ll

[X86] Lower mathlib call ldexp into scalef when avx512 is enabled  (#166839)

Resolves #165694
DeltaFile
+200-1,637llvm/test/CodeGen/X86/ldexp-avx512.ll
+53-105llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll
+73-2llvm/lib/Target/X86/X86ISelLowering.cpp
+326-1,7443 files

LLVM/project b9d9811llvm/lib/Transforms/Utils ProfileVerify.cpp, llvm/test/Transforms/PGOProfile profcheck-exclusions.ll

[profcheck] Exclude `naked`, asm-only functions from profcheck (#168447)

We can't do anything meaningful to such functions: they aren't optimizable, and even if inlined, they would bring no code open to optimization.
DeltaFile
+19-0llvm/lib/Transforms/Utils/ProfileVerify.cpp
+10-0llvm/test/Transforms/PGOProfile/profcheck-exclusions.ll
+29-02 files

LLVM/project 5b8656cclang/lib/CIR/CodeGen CIRGenExpr.cpp, clang/test/CIR/CodeGen vector-ext-element.cpp

[CIR] ExtVectorElementExpr with rvalue base (#168260)

Upstream ExtVectorElementExpr with rvalue base
DeltaFile
+144-0clang/test/CIR/CodeGen/vector-ext-element.cpp
+14-3clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+158-32 files

LLVM/project cd38396llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU invariant-load-no-alias-store.ll

AMDGPU: Handle invariant loads when considering if a load can be scalar

Doesn't touch the globalisel version because the handling
there looks a bit broken.
DeltaFile
+14-1llvm/test/CodeGen/AMDGPU/invariant-load-no-alias-store.ll
+2-1llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+16-22 files

LLVM/project e2c7ac8llvm/test/CodeGen/AMDGPU load-select-ptr.ll select-vectors.ll, llvm/test/CodeGen/NVPTX i1-select.ll fast-math.ll

Reapply "DAG: Allow select ptr combine for non-0 address spaces" (#168292)

This reverts commit 6d5f87fc4284c4c22512778afaf7f2ba9326ba7b.

Previously this failed due to treating the unknown MachineMemOperand
value as known uniform.
DeltaFile
+71-76llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
+43-34llvm/test/CodeGen/NVPTX/i1-select.ll
+36-28llvm/test/CodeGen/NVPTX/fast-math.ll
+34-29llvm/test/CodeGen/AMDGPU/select-vectors.ll
+19-38llvm/test/CodeGen/NVPTX/lower-byval-args.ll
+15-12llvm/test/CodeGen/AMDGPU/select-load-to-load-select-ptr-combine.ll
+218-2176 files not shown
+260-24912 files

LLVM/project d3c3c6bllvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstrInfo.cpp, llvm/test/CodeGen/AMDGPU load-select-ptr.ll

AMDGPU: Fix treating divergent loads as uniform (#168785)

Avoids regression which caused the revert 6d5f87fc42.

This is a hack on a hack. We currently have isUniformMMO,
which improperly treats unknown source value as known uniform.
This is hack from before we had divergence information in the
DAG, and should be removed. This is the minimum change to avoid
the regression; removing the aggressive handling of the unknown
case (or dropping isUniformMMO entirely) are more involved fixes.
DeltaFile
+84-0llvm/test/CodeGen/AMDGPU/load-select-ptr.ll
+11-3llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+1-0llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
+96-33 files

LLVM/project 53b2697llvm/test/CodeGen/RISCV cfi-multiple-locations.mir

[RISCV] Do not write .s file in a test (#168865)

DeltaFile
+2-1llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
+2-11 files