LLVM/project 8042e61llvm/lib/Transforms/InstCombine InstCombineCasts.cpp, llvm/test/Transforms/InstCombine trunc.ll

[InstCombine] Fold trunc nuw/nsw (shr exact %x, %y) to i1 -> icmp ne %x, 0 (#210499)

Proof: https://alive2.llvm.org/ce/z/de6gru
DeltaFile
+108-0llvm/test/Transforms/InstCombine/trunc.ll
+5-1llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+113-12 files

LLVM/project ee62806clang/include/clang/AST OpenMPClause.h, clang/lib/Parse ParseOpenMP.cpp

[Clang][OpenMP] Add parsing/sema for dims modifier in num_teams and thread_limit (#206412)

Add parsing and sema support for `dims` modifier (OpenMP 6.1) in `num_teams` and
`thread_limit` clauses. Example:

```cpp
constexpr int N = 2;
#pragma omp teams num_teams(dims(3): x, y, z) thread_limit(dims(N): a, b)
{ ... }
```
DeltaFile
+231-78clang/lib/Sema/SemaOpenMP.cpp
+222-0clang/test/OpenMP/dims_modifier_messages.cpp
+68-21clang/lib/Parse/ParseOpenMP.cpp
+72-10clang/include/clang/AST/OpenMPClause.h
+40-0clang/test/OpenMP/dims_modifier_ast_print.cpp
+23-11clang/lib/Sema/TreeTransform.h
+656-12017 files not shown
+782-16223 files

LLVM/project 4a1c004llvm/include/llvm/MC MCSchedule.h, llvm/test/TableGen CompressWriteLatencyEntry.td

[MC] Pack scheduling class entry counts (#202649)

Generated scheduling classes currently use at most 20 write-resource
entries and 35 write-latency entries, while read-advance counts reach
504. Narrow the two write counts to `uint8_t`, order the three table
indices before the three counts, and emit target-specific compile-time
bounds assertions in generated subtarget source.

This reduces `sizeof(MCSchedClassDesc)` from 14 to 12 bytes in release
builds and from 20 to 16 bytes with debug fields. Fully stripped arm64
`llvm-mca` decreases by 544,896 bytes (1.49%), and the stripped
all-tools multicall binary decreases by 528,376 bytes (0.368%).

Work towards #202616

AI tool disclosure: Co-authored with OpenAI Codex.
DeltaFile
+20-6llvm/utils/TableGen/SubtargetEmitter.cpp
+12-3llvm/include/llvm/MC/MCSchedule.h
+6-3llvm/test/TableGen/CompressWriteLatencyEntry.td
+38-123 files

LLVM/project d4a08d3clang/test/Analysis/Scalable/TypeConstrainedPointers unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp unsafe-buffer-reachable-excludes-type-constrained-main.cpp

fix tests
DeltaFile
+23-9clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp
+12-1clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-main.cpp
+35-102 files

LLVM/project f3528f8clang/test/CodeGenCoroutines gh188230-coro-await-elidable-suspend-never-final.cpp, llvm/include/llvm/Transforms/Coroutines CoroShape.h

[Coroutines] Use destroy slot for CoroElide resume fallthrough

Fixes https://github.com/llvm/llvm-project/issues/188230

A switch coroutine with a CoroElide noalloc variant uses the frame destroy slot as a runtime discriminator: heap-allocated frames store the destroy clone, while allocation-elided frames store the cleanup clone. Its resume clone can reach a fallthrough coro.end after the final suspend.

The coroutine body can invoke a continuation before reaching that coro.end. A suspend_never continuation can complete and free its frame before control returns. When the callee frame was elided into that caller allocation, loading the destroy slot at coro.end reads freed storage, which AddressSanitizer reports as a use-after-free.

Load and cache the destroy function in the switch-resume entry block before executing the resume body, then tail-call the cached value at fallthrough coro.end. The cache retains the frame slot as the allocation discriminator without dereferencing an elided frame after the continuation returns.

Add a C++ CodeGen regression for the original suspend_never final-suspend shape and update CoroSplit tests to require the entry load.

Assisted-By: Codex GPT 5.5
DeltaFile
+83-0llvm/test/Transforms/Coroutines/coro-split-resume-fallthrough-destroy-slot.ll
+76-0clang/test/CodeGenCoroutines/gh188230-coro-await-elidable-suspend-never-final.cpp
+46-6llvm/lib/Transforms/Coroutines/CoroSplit.cpp
+4-1llvm/test/Transforms/Coroutines/coro-split-00.ll
+4-1llvm/test/Transforms/Coroutines/coro-split-addrspace.ll
+1-0llvm/include/llvm/Transforms/Coroutines/CoroShape.h
+214-81 files not shown
+215-87 files

LLVM/project f988efbllvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU print-pipeline-passes.ll

[AMDGPU] Run early-cse<memssa> at the end of the full-LTO pipeline (#208461)

The regular (non-LTO) and ThinLTO function simplification pipelines run
an
EarlyCSE-with-MemorySSA pass near the start of the function pass
sequence, but
the full-LTO postlink pipeline does not. Without it, a redundant
load/store
round-trip can survive all the way to codegen; the later GVN/DSE in the
LTO
pipeline do not catch this particular pattern. 
    
Rather than touch the target-independent LTO pipeline, register
early-cse<memssa> through the AMDGPU FullLinkTimeOptimizationLast
extension
point, so it runs at the end of the full-LTO middle-end (before codegen)
only
for AMDGPU.
    
    Assisted-by: Claude Opus
DeltaFile
+7-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+1-3llvm/test/Transforms/PhaseOrdering/AMDGPU/infer-address-space.ll
+2-0llvm/test/CodeGen/AMDGPU/print-pipeline-passes.ll
+10-33 files

LLVM/project 7908826polly/include/polly DependenceInfo.h, polly/lib/Analysis DependenceInfo.cpp

[Polly] Guard ISL ast gen compute out (#201859)

Bounds the maximum ISL operations allowed for ISL AST Generation.

Fixes: https://github.com/llvm/llvm-project/issues/201801
DeltaFile
+130-0polly/test/IstAstInfo/AstGenComputeOut.ll
+34-27polly/lib/Analysis/DependenceInfo.cpp
+35-13polly/lib/CodeGen/IslAst.cpp
+7-5polly/include/polly/DependenceInfo.h
+206-454 files

LLVM/project c216b84clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp, clang/test/Analysis/Scalable/TypeConstrainedPointers unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp unsafe-buffer-reachable-excludes-type-constrained-main.cpp

address comments
DeltaFile
+48-29clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+44-20clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp
+13-4clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-main.cpp
+105-533 files

LLVM/project 446a84aopenmp/runtime/src kmp_i18n.cpp

[OpenMP] Simplify GNU strerror_r check for Android (#148990)

Android 6 is the baseline so simplify the Android check.
DeltaFile
+1-3openmp/runtime/src/kmp_i18n.cpp
+1-31 files

LLVM/project 8043ceblibc/cmake/modules LLVMLibCCompileOptionRules.cmake

[libc] Omit -fpie from the full build (#208343)

We shouldn't unconditionally set -fpie, users should be able to control
this with CMAKE_POSITION_INDEPENDENT_CODE.
DeltaFile
+0-2libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
+0-21 files

LLVM/project 81ed4d0llvm/include/llvm/ADT GenericUniformityImpl.h

[UniformityAnalysis] Replace DenseMap with SmallVector indexed by block number. NFC (#210564)
DeltaFile
+14-6llvm/include/llvm/ADT/GenericUniformityImpl.h
+14-61 files

LLVM/project f05a649libc/shared/math lgammaf16.h, libc/src/__support/math lgammaf16.h

[libc][math] Implement half precision lgamma function (#192834)

The implementation uses three distinct paths based on $|x|$:

- Small ($|x| < 0.66$): Fits a degree-12 Chebyshev for $h(t) =
\frac{\text{lgamma}(t) + \log(t)}{t}$, recovering $\text{lgamma}(t) = t
\cdot h - \log(t)$.

- Medium ($|x| \in [0.66, 3.37]$): Fits a degree-20 Chebyshev for $g(t)
= \frac{\text{lgamma}(t)}{(t-1)(t-2)}$
- Stirling ($|x| > 3.37$): Uses $(x-0.5) \cdot \log(x) - x +
\frac{\log(2\pi)}{2}$ plus 1/2/4/8-term Bernoulli corrections by
sub-range.


Special cases: NaN, +/-Inf -> +Inf, +/-0 pole, negative integer pole,
lgamma(1) = lgamma(2) = 0 exactly, overflow for large positive x.

Exhaustive tests pass in all 4 rounding modes.

    [6 lines not shown]
DeltaFile
+308-0libc/src/__support/math/lgammaf16.h
+61-0libc/test/src/math/smoke/lgammaf16_test.cpp
+42-0libc/test/src/math/lgammaf16_test.cpp
+29-0libc/shared/math/lgammaf16.h
+23-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+21-0libc/src/math/lgammaf16.h
+484-024 files not shown
+590-130 files

LLVM/project 617e4f5clang/lib/Interpreter Interpreter.cpp

[Clang][Interpreter] Don't pass -fPIC on MSVC (#210507)
DeltaFile
+8-2clang/lib/Interpreter/Interpreter.cpp
+8-21 files

LLVM/project 14bf60dllvm/include/llvm/ADT GenericCycleImpl.h

[CycleInfo] Deduplicate getExitBlocks with a set. NFC (#210557)

Fix the O(exit_blocks^2) hazard.
DeltaFile
+6-20llvm/include/llvm/ADT/GenericCycleImpl.h
+6-201 files

LLVM/project 84b9da6.github/workflows/containers/libc Dockerfile

[Github] Install `llvm-tools` in libc container (#210414)

Currently, the libc container doesn't contain `llvm-tools`. we need to
use them in #200196 because we are not able to use `llvm-lit` without
building clang from source
DeltaFile
+6-0.github/workflows/containers/libc/Dockerfile
+6-01 files

LLVM/project 70c26a9llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

fix

Created using spr 1.3.7
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+1,267-0llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
+12,975-8,564784 files not shown
+48,700-26,645790 files

LLVM/project e974403llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+1,267-0llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
+12,975-8,564783 files not shown
+48,699-26,644789 files

LLVM/project 0e3d17allvm/lib/Target/WebAssembly WebAssemblyReplacePhysRegs.cpp WebAssembly.h

[WebAssembly] Port WebAssemblyReplacePhysRegsPass

Standard NewPM pass porting.

Reviewers: dschuff, aheejin, sbc100

Pull Request: https://github.com/llvm/llvm-project/pull/209957
DeltaFile
+26-10llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
+9-2llvm/lib/Target/WebAssembly/WebAssembly.h
+2-2llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+1-1llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+1-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+39-155 files

LLVM/project add2af6llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+1,267-0llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-xchg.ll
+12,975-8,564783 files not shown
+48,699-26,644789 files

LLVM/project f5c4f39llvm/lib/Target/WebAssembly WebAssemblyLateEHPrepare.cpp WebAssembly.h

[WebAssembly] Port WebAssemblyLateEHPreparePass

Standard NewPM pass porting.

Reviewers: aheejin, sbc100, dschuff

Pull Request: https://github.com/llvm/llvm-project/pull/209956
DeltaFile
+46-21llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
+10-2llvm/lib/Target/WebAssembly/WebAssembly.h
+2-3llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+2-2llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+1-0llvm/lib/Target/WebAssembly/WebAssemblyPassRegistry.def
+61-285 files

LLVM/project 1bfeb2fllvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

rebase

Created using spr 1.3.5-bogner
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+3,624-0mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+15,332-8,5644,684 files not shown
+126,127-64,3784,690 files

LLVM/project b9ebe54llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5-bogner

[skip ci]
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+3,624-0mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+15,332-8,5644,684 files not shown
+126,127-64,3784,690 files

LLVM/project 54b3fd0llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

remove getThreadIndex()

Created using spr 1.3.5-bogner
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+3,624-0mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+15,332-8,5644,684 files not shown
+126,127-64,3784,690 files

LLVM/project bcb4e7dllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fdiv.ll

[InstCombine] Fix 0.0 / x -> 0 folds when the divisor may be zero (#202482)

SimplifyDemandedUseFPClass folded 0/x to a signed zero, guarded only on
the divisor being non-NaN. But when x==0, the result is is NaN, not 0!

Require the divisor to be never (logical) zero, unless a NaN result
isn't demanded.
DeltaFile
+105-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
+12-5llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+117-52 files

LLVM/project 220e827llvm/include/llvm/IR PassManagerInternal.h, llvm/unittests/IR PassManagerTest.cpp

[IR][NFC] Avoid unneccessary move of analysis results (#210540)

While benchmarking CycleAnalysis, I noticed that each analysis result is
constructed on the stack first and then moved to its final place on the
heap. This is unnecessary -- directly construct the analysis result in
its final place. Consequently, analysis results can be immovable.
DeltaFile
+12-33llvm/include/llvm/IR/PassManagerInternal.h
+5-0llvm/unittests/IR/PassManagerTest.cpp
+17-332 files

LLVM/project b0be6ecllvm/include/llvm/IR PassManagerInternal.h, llvm/unittests/IR PassManagerTest.cpp

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+12-33llvm/include/llvm/IR/PassManagerInternal.h
+5-0llvm/unittests/IR/PassManagerTest.cpp
+17-332 files

LLVM/project 24c0027llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

[AMDGPU] Enabled GCNTrackers in GCNMaxOccupancySchedStrategy.

https://github.com/llvm/llvm-project/pull/169616 introduced scheduling
strategy specific GCNTrackers. This PR follows that template and
enables GCNTrackers for the max-occupancy strategy.

Depends on https://github.com/llvm/llvm-project/pull/184275.

Assisted-by: Cursor/Claude Opus
DeltaFile
+73,543-73,116llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+13,031-13,122llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+3,785-3,654llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+3,696-3,670llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+3,193-3,014llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+2,690-2,887llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+99,938-99,463132 files not shown
+139,455-136,476138 files

LLVM/project d89537dllvm/lib/Target/DirectX DXContainerGlobals.cpp, llvm/lib/Target/DirectX/DXILWriter DXILWriterPass.cpp

[DirectX] Fix `--dx-embed-debug` flag dependency (#210513)

This patch moves the definition of `cl::opt<std::string> PdbDebugPath`
from `DXContainerGlobals.cpp` to `DXILWriter/DXILWriterPass.cpp`,
reversing the dependency.
Fixes the layering violation in #204166.
DeltaFile
+1-5llvm/lib/Target/DirectX/DXContainerGlobals.cpp
+5-1llvm/lib/Target/DirectX/DXILWriter/DXILWriterPass.cpp
+6-62 files

LLVM/project 5c30a1emlir/include/mlir-c Rewrite.h, mlir/lib/CAPI/Transforms Rewrite.cpp

[mlir-c] Expose hard-failure state in 1:N type conversion callback

The 1:N conversion callback returned MlirLogicalResult, which the binding
could only map to success or nullopt (try-another), leaving the C++
failure() state (fail without trying another conversion) unreachable.

Return a MlirTypeConverterConversionStatus enum instead, with Success,
Failure, and Declined states mapped to success(), failure(), and
std::nullopt respectively. Add a test covering the hard-failure path.
DeltaFile
+99-12mlir/test/CAPI/rewrite.c
+18-6mlir/include/mlir-c/Rewrite.h
+12-3mlir/lib/CAPI/Transforms/Rewrite.cpp
+129-213 files

LLVM/project 2e42e0cmlir/include/mlir-c Rewrite.h, mlir/lib/CAPI/Transforms Rewrite.cpp

[mlir-c] Expose hard-failure state in 1:N type conversion callback

The 1:N conversion callback returned MlirLogicalResult, which the binding
could only map to success or nullopt (try-another), leaving the C++
failure() state (fail without trying another conversion) unreachable.

Return a MlirTypeConverterConversionStatus enum instead, with Success,
Failure, and Declined states mapped to success(), failure(), and
std::nullopt respectively. Add a test covering the hard-failure path.
DeltaFile
+99-12mlir/test/CAPI/rewrite.c
+11-6mlir/include/mlir-c/Rewrite.h
+12-3mlir/lib/CAPI/Transforms/Rewrite.cpp
+122-213 files