[orc-rt] Reorganize regression tests, add JIT'd code support (#226356)
Reorganize orc-rt/test/regression so that tests are placed by the
question they ask, rather than by the kind of input they use:
jit-free-foundations/ Tests of runtime facilities that can be
exercised without JIT'd code: ogre's command
line, process info, logging, and (in future)
connection lifecycle.
languages/<language>/ Tests that source-language constructs behave
correctly when JIT'd under the ORC runtime.
object-formats/<format>/<arch>/
Tests that object format features (e.g.
relocations, sections, and directives) are
handled correctly, written in assembly.
A README.md describes where tests should go, and the conventions for
writing them. Existing tests move into jit-free-foundations/, and
init.test is renamed to ogre-help.test to describe what it tests. The
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[orc-rt] Reject non-socket descriptors in socket:adopt (#226354)
The socket connector now checks with getsockopt(SO_TYPE) that the
descriptor named by a socket:adopt spec is a socket before wrapping it
in a SocketHandle. Non-sockets (pipes, files, etc.) are rejected with an
error and left open. Sockets are claimed after verification so that they
can be closed on error paths (e.g. if GetAttachInfo fails).
Adds SocketConnectorTest.
[lldb] Index Wasm data segment names by their entry's index (#226302)
ParseNames bounds-checked each data segment name entry's index but wrote
the name to the slot of the loop counter. A name subsection with more
entries than segments wrote past the end of the segment vector, and
entries listed out of order named the wrong segment.
rdar://186890690
[libcxx][locale] Refactor strtonum functions using __str_to_float_c_locale<FloatT> (#222081)
Replace the 3 separate functions `__strtof`, `__strtod` and `__strtold`
with a single template `__str_to_float_c_locale<FloatT>` across
locale_base_api and all platform support headers. Since
`__str_to_float_c_locale<FloatT>` now does not need `__get_c_locale`
argument we can directly call it instead of `__do_strtod`.
This removes `__setAndRestore` from `aix.h` entirely as `__locale_guard`
is now used directly in the template specialisations to switch locales.
`num.h` is updated to call `__locale::__str_to_float_c_locale<T>`
uniformly across the 3 separate `__do_strtod` specialisation calls.
Additionally,
- linux.h, bsd_like.h, newlib.h delegate to the platform's native
`strtof_l`/`strtod_l`/`strtold_l`.
- openbsd.h, no_locale/strtonum.h call bare `strtof`, `strtod` and
`strtold` (no locale needed).
- windows.h, locale_win32.cpp's MSVCRT path inlines the 3 functions and
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[RISCV] Remove getInstSizeVerifyMode override (#226241)
Now that we generate the correct instruction sizes for the compressed
instructions we can remove this function override.
[AMDGPU] Apply occupancy-aware register allocation anti-hints (#218074)
This PR overrides applyRegAllocationAntiHints in the SIRegisterInfo so
anti-hints
try to protect against occupancy regression. Changing of the allocation
order is
confined to the vgpr budget of the current occupancy. Reordering is
skipped when
the allocation is near the budget (80% of the target-occupancy vgpr
limit or 95%
of the current occupancy vgpr limit). Below this, the anti-hinted
registers are
moved behind the non-anti-hinted ones within the budget.
## Stack
PR **3/4**. Depends on #218073. Next: Add anti-hints in
GCNPreRAOptimizatioins #218075.
[GlobalISel] Fix segment size when narrowing G_INSERT (#226275)
When an inserted value starts inside a destination piece, bound the
overlap by the size of the inserted value. Including the offset from the
start of the piece can produce an extract wider than its source.
---------
Co-authored-by: Hongyu Chen <hongchen at nvidia.com>
[SandboxVec][LoadStoreVec][NFC] Tighten bundle element types
Use Instruction*/Constant* for LoadStoreVec APIs where that is what
callers hold, and template getCombinedVectorTypeFor so BndlRef is not
forced through a non-covariant Value* conversion.
Co-authored-by: Cursor <cursoragent at cursor.com>
[Support] Remove cl::Grouping (#224958)
This feature emulates POSIX's grouped short options in a non-perfect
way. https://reviews.llvm.org/D61270 made every single-character
cl::option implicitly group, leading to weird error message for `opt
-foo=bar`: `opt: for the -o option: may not occur within a group!`
Every tool (primarily binutils-style tools) has since migrated to
OptTable,
with llvm-cov gcov the last (#224955).
Delete this feature, which would block TableGen based representation.
LLM-aided
[BOLT,test] Add missing pipe in dwarf5-debug-names-skip-forward-decl.s (#226338)
With cl::Grouping, --check-prefix=POSTCHECK parses as -c -h..., so
llvm-dwarfdump prints --help and exits 0, and the checks never run.
[libc++] Run the PR benchmarking tooling from main (#226278)
Previously, we'd use the workflow file and machines.json from the main
branch, but the rest of the tools (e.g. build-at-commit) would be taken
from the PR head. This patch switches to using the tools from main and
only using the PR head's content for the actual code and benchmarks.
This should make it easier to evolve the tools and the workflow files
without breaking PR benchmarking for people who submit PRs from slightly
outdated bases.
[RISCV] Support frame pointers in SiFive CLIC preemptible handlers (#221318)
This commit adds frame-pointer support for SiFive CLIC preemptible
handlers by using t0 to save mcause and mepc to dedicated stack slots in
both cases.
[CIR] Update the fastmath contract lowering test
cir-to-llvm now requires a module triple, and the LLVM dialect prints
fastmath flags as fastmath<contract> rather than an attribute dictionary.
Co-authored-by: Cursor <cursoragent at cursor.com>
[AMDGPU][InstCombine] Fold zero dot operands to accumulator
Fold AMDGPU dot intrinsics when either operand is zero.
`dot(a, 0) = 0` and `dot(0, b) = 0`, so replace the intrinsic with its accumulator.
This avoids unrelated clamp and add/sub reassociation cases.
[libc++] Take the benchmark testing configuration from the test suite (#226267)
Previously, we'd use the testing configuration (the .cfg.in file) from
the checked out test suite for the PR benchmarking, but we'd use the one
from `main` for the historical benchmarking. Since the config file is
logically part of the test suite (just like the rest of the Lit setup),
it makes more sense to take it from the checked-out test suite version.
[SelectionDAG][AMDGPU] Fold mul24 with an AND operand whose low bits are zero
Use SimplifyMultipleUseDemandedBits to simplify AND operands based on the
low 24 bits consumed by mul24.
Fold the multiply to zero when the simplified operand is zero.
This folds cases such as:
mul24(x & 0xff000000, y) -> 0
[AMDGPU] Fold 24 bit multiply with zero low bits
Fold `MUL_I24` and `MUL_U24` to zero when either operand has known zero
low 24 bits.
For example:
```
llvm.amdgcn.mul.i24(x, 0x01000000) -> 0
```
[SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits
Replace a non-zero constant with zero when none of its set bits are
demanded.
This allows users of `SimplifyMultipleUseDemandedBits` to eliminate
irrelevant constant bits while preserving the convention that a null
SDValue indicates no simplification.
[AMDGPU] Fold a constant add/sub into the sudot4/sudot8 accumulator (#225322)
Fold a constant add into the accumulator operand of sudot4 and sudot8
when
clamping is disabled:
```
sudot(a, b, C1, false) + C2 -> sudot(a, b, C1 + C2, false)
```
Subtraction by a constant is canonicalized to addition of its negation.
[HLSL] Add support for dynamic resources (#221103)
Adds support for dynamic resources, also known as bindless or directly
indexed resources. The design is described in
https://github.com/llvm/wg-hlsl/issues/204.
The change adds:
- The `ResourceDescriptorHeap` and `SamplerDescriptorHeap` global
symbols, which expose the Shader Model 6.6 descriptor heaps.
- Internal `hlsl::__detail::heap_resource_info` and
`hlsl::__detail::heap_sampler_info` types, which are produced by
indexing the corresponding descriptor heap. HLSL resource and sampler
types can be implicitly constructed from these values.
- Constructors that accept the corresponding internal heap info type for
all currently implemented resource classes.
- Clang builtins `__builtin_hlsl_resource_handlefromheap` and
`__builtin_hlsl_resource_counterhandlefromheap` for creating resource
and counter handles from descriptor heap indices.
- Sema validation and return-type handling for the new builtins.
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[MIR][AMDGPU] Serialize register allocation anti-hints (#218073)
This PR adds MIR print and parse support for the register allocation
anti-hints through
a per vreg anti-hints: [ .. ] field in the registers: section. The
printer only emits
the anti-hint registers only when the it is non-empty to keep existing
tests unchanged.
## Stack
PR **2/4**. Depends on #218071. Next: Apply Occupancy-Aware allocation
anti-hints #218074.
[AMDGPU] Track allocator-reserved register pressure separately
GCNRegPressure counts a tuple at its live lane count, but the excess and
critical limits the scheduler compares against are expressed in
allocatable registers. A tuple is reserved at its full class width for
its whole live range, so lanes that are dead at a given point are still
unavailable to any other value, and the live lane count underestimates
what the allocator has to set aside.
Track a third set of per-kind values recording the reserved width, and
use it for the pressure the GCN trackers hand to the scheduling
heuristics.
Also add -amdgpu-trackers-compare-rp to print the GCN tracker and the
generic tracker pressure side by side for every candidate, which is what
the discrepancy was found with.
WIP
AI-Assisted
[WebKit Checkers] Add alpha.webkit.UnborrowedLambdaCapturesChecker (#226288)
Like alpha.webkit.UnborrowedLocalVarsChecker, but for lambda captures.
This checker is pretty restrictive because, unlike a refcounted object,
a lifetime-dependent pointer/reference/view cannot be captured in an
escaping closure at all. Still, we permit capturing in a NOESCAPE
closure.
[CIR] Record -ffp-contract=fast as a per-op contract flag
Classic CodeGen stamps contract on floating-point instructions so a later
Standard-fusion backend can still form an FMA. CIR only fused within a
statement via cir.fmuladd, which dropped FFMA on the CUDA device default.
Co-authored-by: Cursor <cursoragent at cursor.com>
[clang][DepScan] Disable relocation checks (#225563)
This internally broke an incremental build. Disable while it gets
investigated.
This is partial revert of cf8597bd3b87
resolves: rdar://188026923
