[RISC-V] Reject invalid/unversioned extensions in parseNormalizedArchString (#233683)
RISCVISAInfo::parseNormalizedArchString only checked that the first
character after 'rv32'/'rv64' was 'i' or 'e'. This allowed strings like
rv32im2p0 (missing the version number for i) to be misparsed as enabling
the "im" extension. It also allowed strings that contained both 'i' and 'e',
which should not be allowed. Fix this to reject single-letter extensions
without a version number and any conflicting base ISAs appearing later in
the normalized arch string.
Reported-By: Jessica Clarke in PR #227865
Assisted-by: AI tooling (added more tests)
Pull-Request: https://github.com/llvm/llvm-project/pull/233683
[SystemZ][z/OS] Turn on auto-conversion for captured steams in googletest (#233829)
This patch uses fcntl to turn on auto-conversion for captured streams in
googletest to fix the encoding issues seen when running the clang/llvm
unittests on the z/OS staging buildbot
[AArch64] Address review feedback on UEFI dynamic stack allocation
Include UEFI in the MachineSMEABI lazy ZA save assertion message and add
an -O0 run line for aarch64-unknown-uefi in win-alloca.ll to exercise the
GlobalISel dynamic alloca fallback.
Assisted-by: Claude
[BOLT] Update BOLT README (#233376)
This patch makes minor changes to the main BOLT README, adding alerts to
make notes, tips and important information more clear to a reader.
[AMDGPU] Test LDS atomic fadd with GlobalISel
Follow-up to #233930. The LDS atomicrmw fadd expansion is decided in
AtomicExpand, ahead of both instruction selectors, but
local-atomicrmw-fadd.ll only covered SelectionDAG. Add GlobalISel run
lines for gfx13, gfx12 and gfx942, sharing check prefixes between the
two selectors.
Change-Id: I6569643bd018869c8120459b4beeda40f3f2d2db
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[AMDGPU] Fix LDS f64 atomic fadd on gfx1310 (#233930)
gfx1310 has `GFX1250Insts` but no `ds_add_f64`, so `AtomicExpand` left
LDS `atomicrmw fadd double` unexpanded and instruction selection failed.
Query the `lds-atomic-add-f64` feature instead, which already guards the
`DS_ADD_F64` patterns and the GlobalISel legalizer. gfx1310 now expands
to a `ds_cmpstore_rtn_b64 loop`.
[lldb-dap] Document lldb-dap extensions (#233529)
lldb-dap extensions to the protocol has increased, there is no way to
know about this extensions without reading the source code or looking at
the adapter logs.
Add documentation specifying the requests and the additional properties
lldb-dap adds to standard DAP messages.
feat(gisel): Mirror trunc/xor/select demanded bits
Extend scalar demanded-bits simplification to G_TRUNC, G_XOR, and
G_SELECT, following SelectionDAG traversal, known-bit propagation,
shared-use handling, and final folds. Honor GISel legality and target
profitability when rewriting or narrowing operations.
Share AArch64's logical-immediate search through a narrow XOR hook and
adapt XOR/shift profitability queries for both selectors. Preserve
SelectionDAG's constant-shrinking interface and node construction.
Share shift-amount validation in CodeGenCommonISel using templated
callbacks for selector-specific lane access and KnownBits queries.
Preserve recursive constant bypasses and use-specific rewrites of shared
producers. Recognize constants at the analysis depth limit, matching
SelectionDAG, and retain KnownBits-based bypasses as a fallback.
Cover AArch64 and AMDGPU with focused MIR and codegen tests, including
shared mask chains, SELECT arms, and depth-limited XOR bypasses.
[libcxx][libc] add missing flag to libc config (#233935)
Under some configs I was getting errors from missing the flag to not
build scudo standalone as a shared library. Add that flag.
[AMDGPU] Test LDS atomic fadd with GlobalISel
Follow-up to #233930. The LDS atomicrmw fadd expansion is decided in
AtomicExpand, ahead of both instruction selectors, but
local-atomicrmw-fadd.ll only covered SelectionDAG. Add GlobalISel run
lines for gfx13, gfx12 and gfx942, sharing check prefixes between the
two selectors.
Change-Id: I6569643bd018869c8120459b4beeda40f3f2d2db
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[clang-format] Fix InsertBraces inserting braces around directives (#224947)
Skip brace insertion when the pair would enclose preprocessor
directives, avoiding unmatched braces across conditional branches.
This also leaves bodies containing balanced directives unbraced, even
where insertion previously produced valid code, consistent with the
documented behavior.
Fixes #224942.
[CIR] Admit only CIR types as nested CIR types
FuncType::verify required every type reachable from a signature to be a
CIR type, and proved it with a deep walk on every !cir.func construction.
#232863 memoized the walk in the dialect behind a mutex, but a record
that is still incomplete cannot be cached, and during CIRGen most of them
are.
The walk was needed because !cir.ptr, !cir.array, !cir.data_member,
!cir.bitfield and the record types took unconstrained mlir::Type
parameters. Constrain them to CIR types instead. Each type then checks
only its own parameters, a CIR type holds only CIR types at any depth,
and FuncType::verify checks only its inputs and result. The walk, the
cache and the mutex go away.
- Pointee, array element and data member types use a new
CIR_DialectType constraint.
- Bit-field storage, record members and union padding are checked in
their verifiers.
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[CIR] Cast address spaces in pointer bitcasts (#233828)
Casts between function and object pointers failed CIR verification on
targets with a separate program address space, like spirv64-intel
[Mips] Split memory operands into base registers and offsets (#228738)
Mips memory instructions have accumulated many custom decoders to unpack
base registers and offsets, handle scaling, and account for instruction
variants. Treating the address as one compound operand duplicates work
that TableGen can generate from separate fields and spreads special
cases across the parser, encoder, decoder, and printer.
Parse memory offsets and parenthesized base registers as separate
operands and describe their encoding fields independently in TableGen.
Replace packed memory encoders, decoders, and printers with
operand-level helpers, including support for scaled offsets and variable
register lists.
Keep compound address operands for la/dla and use the common expression
parser for memory offsets. This is largely NFC, with fixes to expression
evaluation order reflected in the updated tests and slightly improved
error messages.
Assisted-by: OpenAI Codex
ProcessImplicitDefs: Erase physreg implicit_def with no live out use (#233910)
Instead of setting the dead flag, just erase the instruction. Also
stop doing this if !tracksRegLiveness, though I don't really
understand this option.
[extract_symbols] Cap worker pool size on Windows (#233608)
On Windows with >61 cores (Python <= 3.11), multiprocessing.Pool()
exceeds the 63-handle limit in _winapi.WaitForMultipleObjects (N worker
handles + 2 internal pipe handles). This crashes Pool._handle_workers
with ValueError before it sends the termination sentinel to taskqueue,
causing Pool._terminate_pool to deadlock in task_handler.join() at exit.
Cap the worker count to at most 60 on Windows and at most len(libs) on
all platforms, and join the pool after collecting results.
[AMDGPU] Fix LDS f64 atomic fadd on gfx1310
hasLDSFPAtomicAddF64() keyed on GFX90AInsts or GFX1250Insts. gfx1310
has GFX1250Insts but no ds_add_f64, so AtomicExpand left LDS
atomicrmw fadd double unexpanded and instruction selection failed.
Query the lds-atomic-add-f64 feature instead, which already guards the
DS_ADD_F64 patterns and the GlobalISel legalizer. gfx1310 now expands
to a ds_cmpstore_rtn_b64 loop.
Change-Id: I891ff50e648ac5305cd7a594ea3fcce5e3411df4
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[clang][OpenMP] Emit host diagnostics that were deferred and never flushed (#220316)
Fixes #147515.
Please review commit by commit. The last three commits only regenerate
`threadprivate_codegen.cpp`, `single_codegen.cpp` and
`target_parallel_generic_loop_codegen-1.cpp` for the new emission order.
They are about
3,700 of the 4,300 changed lines.
## The bug
```c++
// t.cpp
void foo();
int f() {
try {
foo();
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Add a three-way runtime condition tie to the tests
The first WHEN clause is a strict subset of the third, which ties with the
second. Clause order then tests `b` first, and TASKYIELD is never
selected.
Compare the condition of an unguarded match_any candidate
A match_any WHEN clause with a runtime condition also gets a candidate
without the condition, since its other traits can still match. That
candidate has no condition trait, so isStrictSubset skipped the key
check, and it became a subset of a WHEN clause with a different
condition. The key is now compared whenever it is set.
[flang][OpenMP] Don't treat different runtime conditions as subsets
When two METADIRECTIVE candidates have the same score and one selector is
a strict subset of the other, the superset wins. Flang ranks every
runtime condition with the same property, so isStrictSubset saw
different conditions as the same:
!$omp metadirective &
!$omp& when(user={condition(a)}, &
!$omp& implementation={vendor(score(4): llvm)}: taskyield) &
!$omp& when(user={condition(b)}, device={kind(host)}, &
!$omp& implementation={vendor(score(3): llvm)}: taskwait)
Both candidates score 5, and `b` was tested first, so TASKWAIT ran when
both conditions were true. Neither selector is a subset of the other, so
clause order should decide.
This patch adds a UserCondition key to VariantMatchInfo, and
isStrictSubset requires equal keys when the first selector has a
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ARM, X86: Test code after noreturn calls against the exception model (#232334)
Add ARM and X86 versions of the AArch64 windows-trap-unreachable test
from #229681
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Attributor: Deduce noundef returns if poison-generating attributes hold
Instead of giving up on noundef for returns with poison-generating
attributes, check that the attributes are assumed to hold for all
returned values. This uses the Attributor's own deductions for the
returned values (AANonNull, AAAlign, AAValueConstantRange and
AANoFPClass), so e.g. a range only known from a callee is enough.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
