LLVM/project 84e8274llvm/lib/Target/X86 X86PfmCounters.td

[X86][llvm-exegesis] fix LNLP performance counter binding issue (#146348)

We added LNLP sched model recently, PFM counter bounding names needs to
match cpu string.
llvm-exegesis wont produce results without correct naming.

Co-authored-by: mattarde <mattarde at intel.com>
DeltaFile
+1-1llvm/lib/Target/X86/X86PfmCounters.td
+1-11 files

LLVM/project 1e062fcclang/test/CodeGen/AArch64 neon-intrinsics.c, llvm/include/llvm/MC MCSection.h MCFragment.h

rebase .comments

Created using spr 1.3.5-bogner
DeltaFile
+1,982-1,978llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-writeback.s
+44-887llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
+53-728llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
+568-1llvm/include/llvm/MC/MCSection.h
+0-554llvm/include/llvm/MC/MCFragment.h
+389-0clang/test/CodeGen/AArch64/neon-intrinsics.c
+3,036-4,148790 files not shown
+16,320-8,817796 files

LLVM/project 393aebfllvm/include/llvm/MC MCSection.h MCCodeView.h, llvm/lib/MC MCCodeView.cpp

CodeView: Move MCCVDefRangeFragment storage to MCContext/MCFragment. NFC (#146462)

so that ~MCCVInlineLineTableFragment will become trivial when we
make ~MCEncodedFragment trivial (#146307).
DeltaFile
+5-2llvm/lib/MC/MCCodeView.cpp
+3-3llvm/include/llvm/MC/MCSection.h
+5-0llvm/include/llvm/MC/MCCodeView.h
+13-53 files

LLVM/project 67b740bllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 pr43157.ll

[X86] Add diagnostic for fp128 inline assemble for 32-bit (#146458)

Suggested by Craig from #146259
DeltaFile
+3-0llvm/lib/Target/X86/X86ISelLowering.cpp
+2-1llvm/test/CodeGen/X86/pr43157.ll
+5-12 files

LLVM/project e94c609lldb/source/Plugins/ObjectFile/Mach-O ObjectFileMachO.cpp, lldb/source/Plugins/Process/mach-core RegisterContextUnifiedCore.cpp

[lldb][Mach-O] Fix several bugs in x86_64 Mach-O corefile (#146460)

reading, and one bug in the new RegisterContextUnifiedCore class.

The PR I landed a few days ago to allow Mach-O corefiles to augment
their registers with additional per-thread registers in metadata exposed
a few bugs in the x86_64 corefile reader when running under different CI
environments. It also showed a bug in my RegisterContextUnifiedCore
class where I wasn't properly handling lookups of unknown registers
(e.g. the LLDB_GENERIC_RA when debugging an intel target).

The Mach-O x86_64 corefile support would say that it had fpu & exc
registers available in every corefile, regardless of whether they were
actually present. It would only read the bytes for the first register
flavor in the LC_THREAD, the GPRs, but it read them incorrectly, so
sometimes you got more register context than you'd expect. The LC_THREAD
register context specifies a flavor and the number of uint32_t words;
the ObjectFileMachO method would read that number of uint64_t's,
exceeding the GPR register space, but it was followed by FPU and then

    [3 lines not shown]
DeltaFile
+26-40lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+6-2lldb/source/Plugins/Process/mach-core/RegisterContextUnifiedCore.cpp
+32-422 files

LLVM/project ce159d2clang/test/Driver/print-enabled-extensions riscv-andes-a45.c riscv-andes-a25.c

[RISCV] Put REQUIRES: riscv-registered-target in the first line of the file. NFC.

To be more consistent with other files.
DeltaFile
+1-1clang/test/Driver/print-enabled-extensions/riscv-andes-a45.c
+1-1clang/test/Driver/print-enabled-extensions/riscv-andes-a25.c
+1-1clang/test/Driver/print-enabled-extensions/riscv-andes-ax25.c
+1-1clang/test/Driver/print-enabled-extensions/riscv-andes-ax45.c
+1-1clang/test/Driver/print-enabled-extensions/riscv-andes-ax45mpv.c
+1-1clang/test/Driver/print-enabled-extensions/riscv-andes-n45.c
+6-63 files not shown
+9-99 files

LLVM/project eb36104llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/tools/llvm-mca/AArch64/Neoverse N2-writeback.s

Merge branch 'main' into users/zyin/prototype-push-down-unpack-with-empty
DeltaFile
+25,082-25,087llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+2,276-2,325llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+1,982-1,978llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-writeback.s
+1,652-1,633llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+1,491-1,450llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+1,184-1,125llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+33,667-33,5981,399 files not shown
+78,058-60,7311,405 files

LLVM/project 393a75emlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector canonicalize.mlir

[mlir][Vector] Add constant folding for vector.from_elements operation (#145849)

### Summary

This PR adds a new folding pattern for **vector.from_elements** that
canonicalizes it to **arith.constant** when all input operands are
constants.

### Implementation Details

**Leverages FoldAdaptor capabilities**: Uses adaptor.getElements() to
access **pre-computed** constant attributes, avoiding redundant pattern
matching on operands.

### Example Transformation
```
Before:
%c0_i32 = arith.constant 0 : i32
%c1_i32 = arith.constant 1 : i32

    [10 lines not shown]
DeltaFile
+42-12mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+27-0mlir/test/Dialect/Vector/canonicalize.mlir
+69-122 files

LLVM/project 0a69c83llvm/lib/Analysis IR2Vec.cpp, llvm/unittests/Analysis IR2VecTest.cpp

[NFC][IR2Vec] Remove unreachable code and simplify invalid mode test (#146459)

The code following `llvm_unreachable`  is optimized out in Release builds. In this case, `Embedder::create` do not seem to return `nullptr` causing `CreateInvalidMode` test to break. Hence removing `llvm_unreachable`.
DeltaFile
+1-8llvm/unittests/Analysis/IR2VecTest.cpp
+0-1llvm/lib/Analysis/IR2Vec.cpp
+1-92 files

LLVM/project aab3feellvm/lib/Target/LoongArch LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lsx/ir-instruction insert-extract-element.ll

use vextrins instruction
DeltaFile
+47-4llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+6-12llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-extract-element.ll
+53-162 files

LLVM/project 6664ef0llvm/lib/Target/LoongArch LoongArchLASXInstrInfo.td LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx/ir-instruction fix-xvshuf.ll insert-extract-element.ll

[LoongArch] Optimize inserting extracted elements
DeltaFile
+8-5llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+2-10llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fix-xvshuf.ll
+2-4llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-extract-element.ll
+4-1llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+0-4llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
+16-245 files

LLVM/project 66cc167llvm/test/CodeGen/LoongArch/lasx/ir-instruction insert-extract-element.ll, llvm/test/CodeGen/LoongArch/lsx/ir-instruction insert-extract-element.ll

[LoongArch] Add tests for inserting extracted integer elements. NFC
DeltaFile
+68-0llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insert-extract-element.ll
+48-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insert-extract-element.ll
+116-02 files

LLVM/project 8cf3b98llvm/unittests/Analysis FunctionPropertiesAnalysisTest.cpp

[Analysis] Fix a warning

This patch fixes:

  llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp:132:12:
  error: moving a local object in a return statement prevents copy
  elision [-Werror,-Wpessimizing-move]
DeltaFile
+1-1llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp
+1-11 files

LLVM/project 2cd113ellvm/include/llvm/Analysis IR2Vec.h, llvm/lib/Analysis IR2Vec.cpp

Vocab Changes
DeltaFile
+258-104llvm/lib/Analysis/IR2Vec.cpp
+147-79llvm/unittests/Analysis/IR2VecTest.cpp
+64-64llvm/lib/Analysis/models/seedEmbeddingVocab75D.json
+85-40llvm/include/llvm/Analysis/IR2Vec.h
+67-45llvm/test/Analysis/IR2Vec/basic.ll
+92-0llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
+713-33213 files not shown
+1,292-40419 files

LLVM/project 06d0a11llvm/include/llvm/Analysis IR2Vec.h, llvm/lib/Analysis IR2Vec.cpp

Overloading operator+ for Embeddngs
DeltaFile
+18-0llvm/unittests/Analysis/IR2VecTest.cpp
+8-0llvm/lib/Analysis/IR2Vec.cpp
+4-3llvm/include/llvm/Analysis/IR2Vec.h
+30-33 files

LLVM/project 7b65f4cllvm/include/llvm/Support Path.h

Formatting

Created using spr 1.3.6-beta.1
DeltaFile
+2-1llvm/include/llvm/Support/Path.h
+2-11 files

LLVM/project 7516580llvm/include/llvm/Analysis IR2Vec.h, llvm/unittests/Analysis IR2VecTest.cpp

Increasing tolerance in ApproximatelyEquals
DeltaFile
+2-2llvm/unittests/Analysis/IR2VecTest.cpp
+2-1llvm/include/llvm/Analysis/IR2Vec.h
+4-32 files

LLVM/project a2dc64cllvm/docs MLGO.rst

[NFC][MLGO] Convert notes to proper RST note directives in MLGO.rst (#146450)

DeltaFile
+21-13llvm/docs/MLGO.rst
+21-131 files

LLVM/project 9438048llvm/docs MLGO.rst, llvm/include/llvm/Analysis IR2Vec.h

[IR2Vec] Simplifying creation of Embedder (#143999)

This change simplifies the API by removing the error handling complexity. 

- Changed `Embedder::create()` to return `std::unique_ptr<Embedder>` directly instead of `Expected<std::unique_ptr<Embedder>>`
- Updated documentation and tests to reflect the new API
- Added death test for invalid IR2Vec kind in debug mode
- In release mode, simply returns nullptr for invalid kinds instead of creating an error

(Tracking issue - #141817)
DeltaFile
+17-27llvm/unittests/Analysis/IR2VecTest.cpp
+7-10llvm/lib/Analysis/IR2Vec.cpp
+3-7llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
+3-4llvm/unittests/Analysis/FunctionPropertiesAnalysisTest.cpp
+1-6llvm/docs/MLGO.rst
+1-1llvm/include/llvm/Analysis/IR2Vec.h
+32-556 files

LLVM/project cab77c6clang/lib/Driver Driver.cpp, llvm/include/llvm/Support Path.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+6-1clang/lib/Driver/Driver.cpp
+1-0llvm/include/llvm/Support/Path.h
+7-12 files

LLVM/project 24c4bbautils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Quick fix for #145584 (Core deps ProfileData/InstrProf.h)
DeltaFile
+2-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+2-01 files

LLVM/project 6323541lld/ELF/Arch X86_64.cpp

[LLD][ELF] Skip non-SHF_ALLOC sections when checking max VA and max VA difference in relaxOnce() (#145863)

For non-SHF_ALLOC sections, sh_addr is set to 0.
Skip sections without SHF_ALLOC flag, so `minVA` will not be set to 0
with non-SHF_ALLOC sections, and the size of non-SHF_ALLOC sections will
not contribute to `maxVA`.
DeltaFile
+2-0lld/ELF/Arch/X86_64.cpp
+2-01 files

LLVM/project 19f5d9cllvm/include/llvm/Analysis BranchProbabilityInfo.h, llvm/lib/Analysis BranchProbabilityInfo.cpp

[nfc] Rename API with typo in BranchProbabilityInfo
DeltaFile
+4-3llvm/lib/Analysis/BranchProbabilityInfo.cpp
+2-2llvm/include/llvm/Analysis/BranchProbabilityInfo.h
+6-52 files

LLVM/project 6620db5llvm/docs MLGO.rst

[NFC][MLGO] Fix indentation in MLGO.rst (#146444)

DeltaFile
+3-3llvm/docs/MLGO.rst
+3-31 files

LLVM/project 70db191llvm/lib/Target/RISCV RISCVInstrInfoVPseudos.td, llvm/test/CodeGen/RISCV/rvv vslidedown.ll vslideup.ll

[RISCV] Add LLVM IR intrinsicis vrgatherei16/vslideup/vslidedown support for Zvfbfmin (#146312)

This patch add LLVM IR intrinsicis vrgatherei16/vslideup/vslidedown
support for Zvfbfmin.
DeltaFile
+342-2llvm/test/CodeGen/RISCV/rvv/vslidedown.ll
+342-2llvm/test/CodeGen/RISCV/rvv/vslideup.ll
+207-2llvm/test/CodeGen/RISCV/rvv/vrgatherei16.ll
+5-0llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
+896-64 files

LLVM/project a4f637dllvm/lib/Analysis DevelopmentModeInlineAdvisor.cpp

[MLGO] Fix feature iteration using FeatureMap.size() instead of NumberOfFeatures (#146436)

Due to the changes made in #143479, size of `FeatureMap` reflects the number of features used. Hence replacing `NumberOfFeatures` with `FeatureMap.size()` in the `DevelopmentModeInlineAdvisor`.
DeltaFile
+5-5llvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
+5-51 files

LLVM/project 8d9cdb6clang/lib/Basic/Targets LoongArch.h, clang/test/CodeGen ext-int-cc.c

[Clang][LoongArch] Fixed incorrect _BitInt(N>64) alignment (#145297)

This patch makes determining alignment and width of BitInt to be target
ABI specific and makes it consistent with [Procedure Call Standard for
the LoongArch™ Architecture] for LoongArch target
(https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc).
DeltaFile
+38-38clang/test/CodeGen/LoongArch/bitint.c
+6-6clang/test/CodeGen/ext-int-cc.c
+1-0clang/lib/Basic/Targets/LoongArch.h
+45-443 files

LLVM/project 1fee5d2llvm/lib/Transforms/Instrumentation MemorySanitizer.cpp

naming

Created using spr 1.3.4
DeltaFile
+2-2llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+2-21 files

LLVM/project 8870fdallvm/lib/Transforms/Instrumentation MemorySanitizer.cpp

fmt

Created using spr 1.3.4
DeltaFile
+3-3llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+3-31 files

LLVM/project eed0f78llvm/lib/Transforms/Instrumentation MemorySanitizer.cpp, llvm/test/Instrumentation/MemorySanitizer/X86 avx512vl-intrinsics.ll avx512-intrinsics-upgrade.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+275-174llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
+148-112llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+147-111llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics.ll
+131-74llvm/test/Instrumentation/MemorySanitizer/X86/x86-vpermi2.ll
+52-0llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+753-4715 files