[CIR] Split CIR_UnaryOp into individual operations
Split the monolithic cir.unary operation (which dispatched on a
UnaryOpKind enum) into four separate operations: cir.inc, cir.dec,
cir.minus, and cir.not.
This follows the same pattern used when cir.binop was split into
individual binary operations (AddOp, SubOp, etc.).
Changes:
- Add CIR_UnaryOpInterface with getInput()/getResult() methods
- Add CIR_UnaryOp and CIR_UnaryOpWithOverflowFlag base classes
- Define IncOp, DecOp, MinusOp, NotOp with per-op folds
- Add Involution trait to NotOp for not(not(x)) -> x folding
- Replace createUnaryOp() with createInc/Dec/Minus/Not builders
- Split LLVM lowering into four separate patterns
- Split LoweringPrepare complex-type handling per unary op
- Update CIRCanonicalize and CIRSimplify for new op types
- Update all codegen files to use bool params instead of UnaryOpKind
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[LLVM][WebAssembly] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[LLVM][X86] Add f80 support for ct.select
Add special handling for x86_fp80 types in CTSELECT lowering by splitting
them into three 32-bit chunks, performing constant-time selection on each
chunk, and reassembling the result. This fixes crashes when compiling
tests with f80 types.
Also updated ctselect.ll to match current generic fallback implementation.
[LLVM][X86] Add native ct.select support for X86 and i386
Add native X86 implementation with CMOV instructions and comprehensive tests:
- X86 ISelLowering with CMOV for x86_64 and i386
- Fallback bitwise operations for i386 targets without CMOV
- Post-RA expansion for pseudo-instructions
- Comprehensive test coverage:
- Edge cases (zero conditions, large integers)
- i386-specific tests (FP, MMX, non-CMOV fallback)
- Vector operations
- Optimization patterns
The basic test demonstrating fallback is in the core infrastructure PR.
[LLVM][ARM] Add native ct.select support for ARM32 and Thumb
This patch implements architecture-specific lowering for ct.select on ARM
(both ARM32 and Thumb modes) using conditional move instructions and
bitwise operations for constant-time selection.
Implementation details:
- Uses pseudo-instructions that are expanded Post-RA to bitwise operations
- Post-RA expansion in ARMBaseInstrInfo for BUNDLE pseudo-instructions
- Handles scalar integer types, floating-point, and half-precision types
- Handles vector types with NEON when available
- Support for both ARM and Thumb instruction sets (Thumb1 and Thumb2)
- Special handling for Thumb1 which lacks conditional execution
- Comprehensive test coverage including half-precision and vectors
The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- ISelDAGToDAG: Selection of appropriate pseudo-instructions
- BaseInstrInfo: Post-RA expansion of BUNDLE to bitwise instruction sequences
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[LLVM][AArch64] Add native ct.select support for ARM64
This patch implements architecture-specific lowering for ct.select on AArch64
using CSEL (conditional select) instructions for constant-time selection.
Implementation details:
- Uses CSEL family of instructions for scalar integer types
- Uses FCSEL for floating-point types (F16, BF16, F32, F64)
- Post-RA MC lowering to convert pseudo-instructions to real CSEL/FCSEL
- Handles vector types appropriately
- Comprehensive test coverage for AArch64
The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- InstrInfo: Pseudo-instruction definitions and patterns
- MCInstLower: Post-RA lowering of pseudo-instructions to actual CSEL/FCSEL
- Proper handling of condition codes for constant-time guarantees
[LLVM][RISCV] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[ConstantTime][RISCV] Add comprehensive tests for ct.select
Add comprehensive test suite for RISC-V fallback implementation:
- Edge cases (zero conditions, large integers, sign extension)
- Pattern matching (nested selects, chains)
- Vector support with RVV extensions
- Side effects and memory operations
The basic fallback test is in the core infrastructure PR.
[LLVM][MIPS] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[clang-format][NFC] Use the newly added AllowLiteralDigitSeparator (#185165)
Use LangOptions::AllowLiteralDigitSeparator added in #184235 for the
IntegerLiteralSeparator option.
[ConstantTime][RISCV] Add comprehensive tests for ct.select
Add comprehensive test suite for RISC-V fallback implementation:
- Edge cases (zero conditions, large integers, sign extension)
- Pattern matching (nested selects, chains)
- Vector support with RVV extensions
- Side effects and memory operations
The basic fallback test is in the core infrastructure PR.
[LLVM][RISCV] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[ConstantTime] Fix CT_SELECT expansion to preserve constant-time guarantees
Create CT_SELECT nodes for scalar types regardless of target support, so
they survive DAGCombiner (visitCT_SELECT is conservative). Expand to
AND/OR/XOR during operation legalization after SETCC is lowered, preventing
the sext(setcc)->select fold chain that converts constant-time patterns
into data-dependent conditional moves (e.g. movn/movz on MIPS).
The mask uses SUB(0, AND(Cond, 1)) instead of SIGN_EXTEND because type
legalization already promoted i1 to the SetCC result type, making
SIGN_EXTEND a no-op for same-width types.
[LLDB] Move Itanium language runtime to C++ language runtime (#169225)
In order to support the Microsoft ABI alongside the Itanium one in the
same process from different DLLs, this moves the Itanium ABI runtime
plugin to the C++ language runtime (see
https://github.com/llvm/llvm-project/pull/168941#discussion_r2547684264).
Before this PR, the C++ language runtime wasn't a plugin. Instead, its
functionality was provided by the Itanium ABI plugin.
All Itanium specific methods are moved to a new class
`ItaniumABIRuntime`. This includes resolving the dynamic type, setting
exception filters, and getting the exception object.
The other methods were added to `CPPLanguageRuntime`.
`language cplusplus demangle` moved to `CommandObjectCPlusPlus`.
The Clang REPL depended on the C++ runtime. Now that it's a plugin, this
failed the layering check. Since the REPL doesn't use the C++ runtime, I
removed the dependency.
build: add `LINKER:` modifier to `/DELAYLOAD:` options (#185086)
When building with the GNU driver, we would pass in `/DELAYLOAD:...`
without indicating that this is a linker flag. `clang` does not
implictly forward non-consumed options to the linker like `cl` does, and
this would cause the build to fail.
[bazel] Disable parse_headers on gtest headers (#185138)
One of the headers has a circular dependency issue that makes it not
isolated
```
.../googletest/include/gtest/internal/custom/gtest-printers.h:53:12: error: no member named 'testing' in the global namespace
53 | *OS << ::testing::PrintToString(S.str());
| ~~^
```
libclc: Move subgroup functions into clc
It turns out there was a generic implementation of the id and sizes.
The practice of splitting every single function into its own file is
kind of a pain here, so introduce a utility header for amdgpu.
[SLP]Fix the matching of the nodes with the same scalars, but reused
If the scalars are reused and the ReuseShuffleIndices is set, we may
miss matching for the buildvector/gather nodes and add an extra cost
