LLVM/project 6cfc8bf — llvm/lib/Target/AMDGPU AMDGPUAttributor.cpp

by Shilei Tian on ⎇
[NFC][AMDGPU][Attributor] Remove unused code
DeltaFile
+0-9llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+0-91 files

LLVM/project 18307bf — clang/lib/CodeGen CGCoroutine.cpp, clang/test/CodeGenCoroutines coro-gro.cpp

by Weibo He via GitHub on ⎇
[clang][CodeGen] Remove redundant bitcast(NFC) (#173809)

Since opaque pointers have been adopted for years, this bitcast is no
longer necessary.
DeltaFile
+1-4clang/lib/CodeGen/CGCoroutine.cpp
+2-2clang/test/CodeGenCoroutines/coro-gro.cpp
+3-62 files

LLVM/project 2c72af8 — llvm CMakeLists.txt

by Aiden Grossman on ⎇
[CMake] Error when specifying pstl in LLVM_ENABLE_PROJECTS

f59d270867ccd4f8f34b32e7f144519df332f4d2 originally added this logic to
pacify buildbots, particularly the premerge-monolithic-linux bot. This
was fixed soon after the fact in
https://github.com/llvm/llvm-zorg/pull/485, and the premerge bots are
only connected to staging right now using the upstream scripts anyways.
DeltaFile
+0-7llvm/CMakeLists.txt
+0-71 files

LLVM/project 7de0804 — llvm/lib/Transforms/Vectorize VPlanPatternMatch.h VPlanUtils.cpp

by Florian Hahn on ⎇
[VPlan] Handle min/max intrinsics in getSCEVExprForVPValue (NFCI)

Use m_Intrinsic to handle min/max intrinsics in getSCEVExprForVPValue.
This also extends Argument_match and IntrinsicID_match to VPInstruction
for completeness, and unifies the handling to avoid looking up functions
from the underlying IR instruction.

Tested via the VPlan-based cost-model, but same costs should be
computed.

As part of the extension, fix a bug in Argument_match that had an
incorrect offset for the operands of VPReplicateRecipe; the function is
the last argument.
DeltaFile
+20-5llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+20-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+40-52 files

LLVM/project 00d7fff — llvm/lib/Target/X86 X86FlagsCopyLowering.cpp X86FixupLEAs.cpp, llvm/test/CodeGen/X86 leaFixup64.mir leaFixup32.mir

by Aiden Grossman on ⎇
formatting

Created using spr 1.3.7
DeltaFile
+2-1llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+3-0llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
+1-1llvm/test/CodeGen/X86/leaFixup64.mir
+1-1llvm/lib/Target/X86/X86FixupLEAs.cpp
+1-1llvm/test/CodeGen/X86/leaFixup32.mir
+1-0llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
+9-46 files

LLVM/project 91340ee — llvm/lib/Target/X86 X86FixupLEAs.cpp, llvm/test/CodeGen/X86 leaFixup64.mir leaFixup32.mir

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+3-0llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
+1-1llvm/lib/Target/X86/X86FixupLEAs.cpp
+1-1llvm/test/CodeGen/X86/leaFixup64.mir
+1-1llvm/test/CodeGen/X86/leaFixup32.mir
+1-0llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
+7-35 files

LLVM/project e23b473 — lldb/tools/lldb-dap/Handler StackTraceRequestHandler.cpp, llvm/lib/Target/AVR AVRInstrInfo.td

by Aiden Grossman on ⎇
feedback

Created using spr 1.3.7
DeltaFile
+126-129lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+245-0mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
+224-0mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+189-0llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
+177-0llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
+1,090-250253 files not shown
+4,787-1,785259 files

LLVM/project 6c8a2ee — lldb/tools/lldb-dap/Handler StackTraceRequestHandler.cpp, llvm/lib/Target/AVR AVRInstrInfo.td

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+126-129lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+245-0mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
+224-0mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+189-0llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
+177-0llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
+1,090-250248 files not shown
+4,780-1,782254 files

LLVM/project 97a93fc — lldb/tools/lldb-dap/Handler StackTraceRequestHandler.cpp, llvm/lib/Target/AVR AVRInstrInfo.td

by Aiden Grossman on ⎇
feedback

Created using spr 1.3.7
DeltaFile
+126-129lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+245-0mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
+224-0mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+189-0llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
+177-0llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
+1,090-250249 files not shown
+4,781-1,783255 files

LLVM/project a1f1c26 — lldb/tools/lldb-dap/Handler StackTraceRequestHandler.cpp, llvm/lib/Target/AVR AVRInstrInfo.td

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+126-129lldb/tools/lldb-dap/Handler/StackTraceRequestHandler.cpp
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+245-0mlir/lib/Dialect/OpenACC/Transforms/ACCIfClauseLowering.cpp
+224-0mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+189-0llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
+177-0llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
+1,090-250248 files not shown
+4,780-1,782254 files

LLVM/project ab45059 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer test_intermediate_dual_use.ll

by Alexey Bataev on ⎇
[SLP]Do not swap RHS, if it is used in bool op, used as a second operand in a reduction

If the RHS operand is used as a first operand in the bool reduction op,
used as a second operand in the reduction ops, still need to use this
RHS as RHS, not as LHS

https://alive2.llvm.org/ce/z/pmc2YJ

Fixes #173796
DeltaFile
+10-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-1llvm/test/Transforms/SLPVectorizer/test_intermediate_dual_use.ll
+11-32 files

LLVM/project 3c5f206 — llvm/lib/Target/X86 X86OptimizeLEAs.cpp X86.h, llvm/test/CodeGen/X86 pr57673.ll pr57673.mir

by Aiden Grossman via GitHub on ⎇
[X86][NewPM] Port x86-optimize-leas to the new pass manager

Title. Test coverage also added.

Reviewers: arsenm, phoebewang, paperchalice, topperc, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/173760
DeltaFile
+83-47llvm/lib/Target/X86/X86OptimizeLEAs.cpp
+8-2llvm/lib/Target/X86/X86.h
+2-2llvm/test/CodeGen/X86/pr57673.ll
+2-2llvm/lib/Target/X86/X86TargetMachine.cpp
+2-1llvm/test/CodeGen/X86/pr57673.mir
+1-1llvm/lib/Target/X86/X86PassRegistry.def
+98-556 files

LLVM/project b4382ca — clang/test/CIR/CodeGenBuiltins/X86 avx512dq-builtins.c, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

by Aiden Grossman on ⎇
rebase

Created using spr 1.3.7
DeltaFile
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+177-0llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
+78-55llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+69-0llvm/test/Transforms/InstCombine/X86/blend_x86.ll
+51-4clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
+51-1mlir/lib/Dialect/SCF/IR/SCF.cpp
+555-18152 files not shown
+1,120-40458 files

LLVM/project 2a00589 — llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp SILowerI1Copies.cpp

by Aiden Grossman via GitHub on ⎇
[AMDGPU][NewPM] Consistently preserve IR analyses in MF passes

These three passes were not doing so, unlike all the other passes.

Reviewers: vikramRH, cdevadas, paperchalice, arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/173758
DeltaFile
+1-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+1-3llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
+3-73 files

LLVM/project 6584284 — clang/test/CIR/CodeGenBuiltins/X86 avx512dq-builtins.c, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+177-0llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp
+78-55llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+69-0llvm/test/Transforms/InstCombine/X86/blend_x86.ll
+51-4clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
+51-1mlir/lib/Dialect/SCF/IR/SCF.cpp
+555-18152 files not shown
+1,120-40458 files

LLVM/project 540ea69 — llvm/lib/CodeGen MachineInstrBundle.cpp

by Aiden Grossman via GitHub on ⎇
[CodeGen][NewPM] Consistently preserve IR analyses in MF passes

This was the only pass that did not do this in the generic codegen
infra. Update it to be consistent.

Reviewers: optimisan, paperchalice, arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/173757
DeltaFile
+1-1llvm/lib/CodeGen/MachineInstrBundle.cpp
+1-11 files

LLVM/project 08e052e — utils/bazel/llvm-project-overlay/llvm BUILD.bazel

by Aiden Grossman via GitHub on ⎇
Fix Bazel build for 05a34dd (#173798)

Co-authored-by: Pranav Kant <prka at google.com>
DeltaFile
+7-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+7-01 files

LLVM/project 25d2a5b — llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

by Mikołaj Piróg via GitHub on ⎇
[NFC] Rename variables to FPOp (#173792)

In my earlier PR (https://github.com/llvm/llvm-project/pull/167574),
I've named a variable in fpext function wrong. I've changed the name in
both functions to generic FPOp
DeltaFile
+4-4llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+4-41 files

LLVM/project 1d57752 — clang/test/CIR/CodeGenBuiltins/X86 avx512dq-builtins.c avx512vldq-builtins.c

by Thibault Monnier via GitHub on ⎇
[CIR] Add CIR x86 codegen builtins tests (#173726)

Some of the tests I added in previous PRs seems to have unintentionally
been removed by #171694. I am adding them back here.
DeltaFile
+51-4clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
+34-10clang/test/CIR/CodeGenBuiltins/X86/avx512vldq-builtins.c
+85-142 files

LLVM/project c7d373a — llvm/test/Transforms/SLPVectorizer test_intermediate_dual_use.ll

by Alexey Bataev on ⎇
[SLP][NFC]Add a test with the incorrect transformation result, NFC
DeltaFile
+43-0llvm/test/Transforms/SLPVectorizer/test_intermediate_dual_use.ll
+43-01 files

LLVM/project 73c080f — mlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

by Matthias Springer on ⎇
tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+203-313mlir/lib/Transforms/RemoveDeadValues.cpp
+110-45mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+324-3584 files

LLVM/project d9ce80d — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer boolean-op-with-poisons.ll

by Alexey Bataev on ⎇
[SLP]FIx order of bool logical ops, if the right op is used in the first reduction operarion

If the LHS of the first reduction op is not a first operand, but RHS is,
and RHS is the second operand of the first reductoin op, still need to
emit RHS as a second reduction operand, though without freeze of the
LHS operand

https://alive2.llvm.org/ce/z/2_JLBu

Fixes #173784
DeltaFile
+11-3llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-1llvm/test/Transforms/SLPVectorizer/boolean-op-with-poisons.ll
+12-42 files

LLVM/project 03266d5 — mlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

by Matthias Springer on ⎇
tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+203-313mlir/lib/Transforms/RemoveDeadValues.cpp
+109-44mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+323-3574 files

LLVM/project ed836e5 — mlir/lib/Transforms RemoveDeadValues.cpp, mlir/test/Transforms remove-dead-values.mlir

by Matthias Springer on ⎇
tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+183-313mlir/lib/Transforms/RemoveDeadValues.cpp
+109-44mlir/test/Transforms/remove-dead-values.mlir
+292-3572 files

LLVM/project 1963313 — mlir/lib/Transforms RemoveDeadValues.cpp

by Matthias Springer on ⎇
[mlir][Transforms][NFC] `remove-dead-values`: Simplify dropped value handling
DeltaFile
+7-14mlir/lib/Transforms/RemoveDeadValues.cpp
+7-141 files

LLVM/project 5f5560f — mlir/lib/Dialect/SCF/IR SCF.cpp, mlir/test/Dialect/SCF canonicalize.mlir

by Matthias Springer via GitHub on ⎇
[mlir][SCF] Fold unused `index_switch` results (#173560)

Add a canonicalization pattern to fold unused `scf.index_switch`
results.
DeltaFile
+51-1mlir/lib/Dialect/SCF/IR/SCF.cpp
+31-0mlir/test/Dialect/SCF/canonicalize.mlir
+82-12 files

LLVM/project 7ceecfa — llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp DAGCombiner.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

by Islam Imad via GitHub on ⎇
[CodeGen] Fix EVT::changeVectorElementType assertion on simple-to-extended fallback (#173413)

Fixes #171608
DeltaFile
+78-55llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+20-25llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+15-27llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+17-17llvm/lib/Target/X86/X86ISelLowering.cpp
+9-11llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+10-9llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+149-14412 files not shown
+196-19218 files

LLVM/project 06e8230 — llvm/test/Transforms/SLPVectorizer boolean-op-with-poisons.ll

by Alexey Bataev on ⎇
[SLP][NFC]Add a test with the miscompilation after SLP vectorizer, NFC

https://alive2.llvm.org/ce/z/oE2h69
DeltaFile
+22-0llvm/test/Transforms/SLPVectorizer/boolean-op-with-poisons.ll
+22-01 files

LLVM/project cd480a2 — mlir/lib/Dialect/SCF/IR SCF.cpp, mlir/test/Dialect/SCF canonicalize.mlir

by Matthias Springer on ⎇
[mlir][SCF] Fold unused `index_switch` results
DeltaFile
+51-1mlir/lib/Dialect/SCF/IR/SCF.cpp
+31-0mlir/test/Dialect/SCF/canonicalize.mlir
+82-12 files

LLVM/project 9bef674 — mlir/lib/Dialect/SCF/IR SCF.cpp

by Matthias Springer via GitHub on ⎇
Apply suggestions from code review

Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Co-authored-by: lonely eagle <2020382038 at qq.com>
DeltaFile
+2-2mlir/lib/Dialect/SCF/IR/SCF.cpp
+2-21 files