LLVM/project bd69a84clang/lib/Format WhitespaceManager.cpp, clang/unittests/Format FormatTestComments.cpp

[clang-format] Fix OverEmptyLines aligning trailing comments across block boundaries (#208324)

Fix `AlignTrailingComments` with `OverEmptyLines` aligning trailing
comments across block boundaries (e.g., between two functions or
structs). The alignment sequence now breaks at block-type braces
(`BK_Block`).

This is an `OverEmptyLines` bug exposed by
bae9ddca423145baf0c35e31898b723aa273f85c (#206393).
Fixes https://github.com/llvm/llvm-project/issues/208266
(https://github.com/llvm/llvm-project/issues/208266).

Commit created with the help of kiro-cli.

Co-authored-by: Vladislav Aranov <vladislav.aranov at ericsson.com>
DeltaFile
+36-0clang/unittests/Format/FormatTestComments.cpp
+8-0clang/lib/Format/WhitespaceManager.cpp
+44-02 files

LLVM/project 617dd98utils/bazel/llvm-project-overlay/mlir/test BUILD.bazel

[bazel] fix #212406 (#212585)
DeltaFile
+4-4utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
+4-41 files

LLVM/project ab5f244llvm/include/llvm/Support CodeGen.h, llvm/include/llvm/TargetParser Triple.h

Triple: Add query for the default long double format (#211239)

The long double format changes the library call info, which needs
to be computed independently of codegen. Implement this based on the
clang target code.

---------

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+161-0llvm/unittests/TargetParser/TripleTest.cpp
+58-0llvm/lib/TargetParser/Triple.cpp
+9-0llvm/include/llvm/Support/CodeGen.h
+4-0llvm/include/llvm/TargetParser/Triple.h
+232-04 files

LLVM/project 531445cmlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp, mlir/test/Conversion/SPIRVToLLVM arithmetic-ops-to-llvm.mlir

[mlir][SPIR-V] Add SPIRVToLLVM conversions for IAddCarry and ISubBorrow (#203605)
DeltaFile
+60-0mlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
+45-0mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+105-02 files

LLVM/project 7ae8353llvm/lib/Target/AMDGPU AMDGPURemoveIncompatibleFunctions.cpp AMDGPU.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

AMDGPU: Add dedicated features for wavesize support (#212581)

Previously we had features for which wavesize is active,
and unstructured checks for which targets support which
wavesize.

One assembler test changes because it was artificially
forcing wave64 on gfx1250 for test simplification, and
the supportsWave32 helper function was buggy.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+164-81llvm/test/MC/AMDGPU/vop3-literal.s
+16-0llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
+10-4llvm/lib/Target/AMDGPU/AMDGPU.td
+5-3llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
+4-3llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
+0-4llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+199-952 files not shown
+200-1008 files

LLVM/project ed591ccllvm/utils/lit CMakeLists.txt, llvm/utils/lit/tests lit.site.cfg.in

[lit] Switch tests to using path function (#212381)

All the other test suites use the PATHS option to configure_lit_site_cfg
and the path() function in lit.site.cfg to make the site configs
relocatable. Apply the same pattern to lit's own suite as well.
DeltaFile
+6-5llvm/utils/lit/tests/lit.site.cfg.in
+5-0llvm/utils/lit/CMakeLists.txt
+11-52 files

LLVM/project 34e0403llvm/docs LangRef.md, llvm/lib/IR Verifier.cpp

 IR: Accept x86_fp80 and float as a long-double-type value (#210818)

Prepare to emit long-double-type for all targets. x86 obviously needs
x87, and AVR uses float.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+12-0llvm/test/Assembler/module-flags-long-double-type.ll
+6-0llvm/docs/LangRef.md
+3-1llvm/lib/IR/Verifier.cpp
+21-13 files

LLVM/project 7c513f7llvm/docs WritingAnLLVMBackend.md

[LLVM][docs] Small updates to Writing an Backend

- Methods `eliminateCallFramePseudoInstr`, `emitPrologue`, `emitEpilogue` have to be implemented in subclass of `TargetFrameLowering`
- Method `hasFP` was renamed to `hasFPImpl`, and also belongs into subclass of `TargetFrameLowering`
- Give path to the `TargetInfo` class
- Fix parameters of `RegisterTarget`
- Fix path to `TargetRegistry.h`

Assisted by IBM Bob
DeltaFile
+23-11llvm/docs/WritingAnLLVMBackend.md
+23-111 files

LLVM/project e146c04llvm/docs AMDGPUUsage.rst, llvm/include/llvm/TargetParser AMDGPUTargetParser.def

[AMDGPU] Add SRAMECC to feature list for gfx12-5-generic (#212573)
DeltaFile
+16-0llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
+3-3llvm/docs/AMDGPUUsage.rst
+1-1llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
+2-0llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
+22-44 files

LLVM/project 85305ballvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.ballot.i32.wave64.err.ll

[AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (#211493)

Before wave mask was emitted directly in the requested return type,
which failed to select for i32 ballots on wave64 (and vice versa)

Compute the mask at the wavefront width and then zext or trunc it to the
result type
DeltaFile
+15-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.wave64.err.ll
+9-2llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+9-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+33-23 files

LLVM/project 8cfddf1llvm/lib/Target/AMDGPU AMDGPURemoveIncompatibleFunctions.cpp AMDGPU.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

AMDGPU: Add dedicated features for wavesize support

Previously we had features for which wavesize is active,
and unstructured checks for which targets support which
wavesize.

One assembler test changes because it was artificially
forcing wave64 on gfx1250 for test simplification, and
the supportsWave32 helper function was buggy.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+164-81llvm/test/MC/AMDGPU/vop3-literal.s
+16-0llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
+10-4llvm/lib/Target/AMDGPU/AMDGPU.td
+5-3llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
+4-3llvm/test/MC/Disassembler/AMDGPU/gfx1250_wave64_feature.s
+0-4llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+199-952 files not shown
+200-1008 files

LLVM/project 8673d9bllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/X86 avg.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+301-85llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+145-94llvm/test/Transforms/PhaseOrdering/X86/avg.ll
+33-66llvm/test/Transforms/SLPVectorizer/X86/intrinsic.ll
+49-30llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
+48-30llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
+35-36llvm/test/Transforms/SLPVectorizer/X86/reused-mask-with-poison-index.ll
+611-34133 files not shown
+944-66939 files

LLVM/project 07d4a2fllvm/include/llvm/Support CodeGen.h, llvm/include/llvm/TargetParser Triple.h

Triple: Add query for the default long double format

The long double format changes the library call info, which needs
to be computed independently of codegen. Implement this based on the
clang target code.
DeltaFile
+161-0llvm/unittests/TargetParser/TripleTest.cpp
+58-0llvm/lib/TargetParser/Triple.cpp
+9-0llvm/include/llvm/Support/CodeGen.h
+4-0llvm/include/llvm/TargetParser/Triple.h
+232-04 files

LLVM/project a28f195clang/lib/CodeGen CodeGenModule.cpp, clang/lib/CodeGen/Targets PPC.cpp

clang: Emit "long-double-type" module flag generically

Move emission of the "long-double-type" module flag out of PowerPC
and into generic code, so it describes the long double format for all
targets.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+26-0clang/lib/CodeGen/CodeGenModule.cpp
+0-23clang/lib/CodeGen/Targets/PPC.cpp
+23-0clang/test/CodeGen/long-double-type-module-flag.c
+0-17clang/test/CodeGen/ppc64-long-double-type-attr.c
+49-404 files

LLVM/project b63c704llvm/test/MC/AMDGPU isa-version-unk.s isa-version-pal.s

AMDGPU: Migrate target ID diagnostic tests to subarch triples
DeltaFile
+29-6llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+20-13llvm/test/MC/AMDGPU/hsa-diag-v4.s
+11-11llvm/test/MC/AMDGPU/isa-version-unk.s
+11-11llvm/test/MC/AMDGPU/isa-version-pal.s
+71-414 files

LLVM/project b8aa248llvm/docs LangRef.md, llvm/lib/IR Verifier.cpp

IR: Accept x86_fp80 and float as a long-double-type value

Prepare to emit long-double-type for all targets.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+12-0llvm/test/Assembler/module-flags-long-double-type.ll
+6-0llvm/docs/LangRef.md
+3-1llvm/lib/IR/Verifier.cpp
+21-13 files

LLVM/project 26643a8clang/lib/Headers ptrauth.h

[PAC][Headers] Fix incorrect comment in ptrauth.h (#207265)

The discriminator which is used to sign pointers to v-tables
is not always zero.
DeltaFile
+1-2clang/lib/Headers/ptrauth.h
+1-21 files

LLVM/project c05dc39clang/lib/CodeGen CGOpenMPRuntime.cpp, clang/test/OpenMP target_map_nested_ptr_member_mapper_codegen.cpp

[OpenMP] Propagate PRESENT to pointee entries in mapper codegen

Extend map-type-modifier propagation in emitUserDefinedMapper to the PRESENT
modifier, but only for entries that have an attach ptr (the pointee data, whose
storage differs from the struct's own). A present modifier on the outer clause
must require that pointee to be present on the device.

This is gated on a new PropagatePresentToPointee argument, which Clang sets from
CGM.getLangOpts().OpenMP >= 60. Before 6.0 the present modifier is treated as
not applying to the pointee: the spec committee confirmed the divergence
between the present motion modifier (to/from) and the present map-type modifier
(map) was unintentional, to be fixed as an OpenMP 6.0 erratum. Only propagation
is gated; present written directly in a mapper's own clause applies at all
versions.

A TODO notes PRESENT should also propagate to the struct's own members, which
is blocked while pointer members use PTR_AND_OBJ.

Update the present-check tests to their final 6.0-gated behavior.

    [2 lines not shown]
DeltaFile
+36-11llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+10-17offload/test/mapping/mapper_target_update_present_ptee.c
+14-13offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
+13-4llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+6-9clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+12-3clang/lib/CodeGen/CGOpenMPRuntime.cpp
+91-576 files

LLVM/project c3f2950clang/lib/CodeGen CGOpenMPRuntime.cpp, clang/test/OpenMP declare_mapper_codegen.cpp target_map_nested_ptr_member_mapper_codegen.cpp

[OpenMP][Clang] Enable ATTACH-style maps for mappers.

Track per-entry attach-ptr info (HasAttachPtr) through mapper codegen so that
emitUserDefinedMapper does not add a new outer MEMBER_OF to pointee/combined
entries (which occupy different storage than the struct) or to ATTACH entries.
Clang and the MLIR translator populate the per-entry array in parallel with the
other MapInfosTy arrays.

Address review:
  - Rename MapSkipMemberOfArrayTy to MapHasAttachPtrArrayTy to match the
    HasAttachPtr field it backs.
  - Restructure the emitUserDefinedMapper comment into a bulleted (*)/(**)/(***)
    list keyed to the example entries.
  - Reword the Clang comments: HasAttachPtr marks pointee entries that have a
    base attach-ptr; a combined entry has a base attach-ptr if its constituents
    do; cross-reference emitUserDefinedMapper for the MEMBER_OF rationale.
  - Update the moved present-check tests to their now-correct behavior (the
    attach-style maps make the inbounds present checks pass and remove the
    "explicit extension" errors).

    [2 lines not shown]
DeltaFile
+196-160clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+68-60clang/test/OpenMP/declare_mapper_codegen.cpp
+56-15llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+65-5clang/lib/CodeGen/CGOpenMPRuntime.cpp
+18-24offload/test/mapping/mapper_enter_data_always_present_ptee.c
+18-22offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
+421-28611 files not shown
+493-36117 files

LLVM/project 3ad2d8bclang/test/OpenMP declare_mapper_codegen.cpp target_map_array_section_of_structs_with_nested_mapper_codegen.cpp, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[OpenMP] Propagate ALWAYS/DELETE/CLOSE map-type modifiers to mapper entries

When a map clause uses a user-defined mapper, the map-type-modifying bits
(ALWAYS, DELETE, CLOSE) on the outer clause must apply to each map the mapper
inserts (OpenMP 6.0:281:34). Propagate them in emitUserDefinedMapper by OR-ing
the imported modifier bits into each pushed component, except ATTACH entries
(ATTACH|ALWAYS is reserved for attach(always) and the other bits are
meaningless for ATTACH).

PRESENT is intentionally not propagated here yet (a TODO notes it is handled in
a follow-on, since it requires distinguishing pointee entries from the struct's
own storage).

Update the offload always-propagation tests to their now-correct behavior:
ALWAYS forces a member transfer that the ref count would otherwise suppress, so
mapper_map_always_from.c reads s.y back as 111, and the enter-data variants
(C and Fortran) see 111 in the device copy (all were 0 before this change).
Since emitUserDefinedMapper is shared between clang and flang, the Fortran test
covers the flang path as well.

    [2 lines not shown]
DeltaFile
+152-136clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+87-77clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
+87-77clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
+38-2llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+27-9clang/test/OpenMP/declare_mapper_codegen.cpp
+11-17offload/test/offloading/fortran/mapper-map-always-to-enter-data.f90
+402-3187 files not shown
+443-37013 files

LLVM/project 6bf2f46llvm/lib/CodeGen MIR2Vec.cpp, llvm/test/CodeGen/MIR2Vec empty-machine-function.mir

[MIR2Vec] Handle machine functions with no basic blocks (#212294)

depth_first() asserts on an empty MachineFunction, since getEntryNode()
dereferences the block list sentinel via front(). Return the zero vector
instead, as IR2Vec does for declarations.
DeltaFile
+37-0llvm/test/CodeGen/MIR2Vec/empty-machine-function.mir
+3-0llvm/lib/CodeGen/MIR2Vec.cpp
+40-02 files

LLVM/project 8aceb2fclang/include/clang/Basic Builtins.td, clang/lib/Sema SemaHLSL.cpp

[HLSL] Implement HLSL InterlockedXor (#209254)

Follows existing HLSL InterlockedOp implementations to provide
InterlockedXor in HLSL, with DirectX and SPIRV support.

https://github.com/llvm/llvm-project/issues/99127
DeltaFile
+100-0clang/test/SemaHLSL/BuiltIns/InterlockedXor-errors.hlsl
+62-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedXor.hlsl
+59-0clang/test/CodeGenHLSL/builtins/InterlockedXor.hlsl
+45-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedXor.hlsl
+4-3clang/lib/Sema/SemaHLSL.cpp
+6-0clang/include/clang/Basic/Builtins.td
+276-34 files not shown
+291-310 files

LLVM/project 16f45b7flang/include/flang/Optimizer/Transforms Passes.td, flang/lib/Optimizer/Transforms/CUDA CUFAddConstructor.cpp

[flang][cuda] Add option to set priority to the CUDA Fortran constructor (#212561)
DeltaFile
+4-1flang/include/flang/Optimizer/Transforms/Passes.td
+5-0flang/test/Fir/CUDA/cuda-constructor.f90
+1-1flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
+10-23 files

LLVM/project 1a2691cclang/test/OpenMP target_map_nested_ptr_member_mapper_codegen.cpp, offload/test/mapping mapper_enter_data_always_present_ptee.c mapper_map_ptee_only_always_array.c

[NFC][OpenMP] Add mapper-specific tests exercising pointee section mapping. (#204269)

* Add a few tests for when a mapper does something like `map(s.p[0:10])`
where `p` is a pointer.
* Add a few tests that require propagation of bits like `present/always`
into a mapper.
* Fix a few tests that were expecting `p` to be mapped when the mapper
only said `map(s.p[0:10])`.

The output of a few tests is different from what we expect. They have
been annotated with FIXMEs, and the expected output for when the
follow-up changes in this stack to propagate the map-type-modifier bits
and using attach-style mapping for mappers get merged.

---------

Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
DeltaFile
+392-0clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+93-0offload/test/mapping/mapper_map_ptee_only_2_ptr_indirections_array.c
+84-0offload/test/mapping/mapper_target_update_present_ptee.c
+82-0offload/test/mapping/mapper_map_ptee_only_2ndlevel_array.c
+78-0offload/test/mapping/mapper_map_ptee_only_always_array.c
+76-0offload/test/mapping/mapper_enter_data_always_present_ptee.c
+805-019 files not shown
+1,591-725 files

LLVM/project 0d444d9llvm/docs AMDGPUUsage.rst, llvm/include/llvm/TargetParser AMDGPUTargetParser.def

[AMDGPU] Add SRAMECC to feature list for gfx12-5-generic

Change-Id: Ib08bed407fde6daaa8ee6e48a3af2992324ab095
DeltaFile
+16-0llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
+3-3llvm/docs/AMDGPUUsage.rst
+1-1llvm/include/llvm/TargetParser/AMDGPUTargetParser.def
+2-0llvm/test/CodeGen/AMDGPU/sramecc-subtarget-feature-any.ll
+22-44 files

LLVM/project 3919897clang/lib/Driver/ToolChains SYCL.cpp, clang/test/Driver sycl-device-lib-spirv64.cpp sycl-windows.cpp

Revert "[Driver][SYCL] Add compile-time device library linking for SPIR-V targets" (#212550)

Reverts llvm/llvm-project#196656
The CI does not yet build compiler-rt with SPIR-V support, so
libclang_rt.builtins.bc is absent on that bot. This change made the
missing file a hard error, breaking all libsycl functional tests that
compile with -fsycl.

Re-landing after CI is updated to build compiler-rt for SPIR-V.
DeltaFile
+0-32compiler-rt/lib/builtins/CMakeLists.txt
+0-30clang/lib/Driver/ToolChains/SYCL.cpp
+12-18clang/test/Driver/sycl-offload-jit.cpp
+15-15clang/test/Driver/sycl.cpp
+0-28clang/test/Driver/sycl-device-lib-spirv64.cpp
+14-14clang/test/Driver/sycl-windows.cpp
+41-1378 files not shown
+54-16614 files

LLVM/project 9d4eb0allvm/docs LangRef.md, llvm/lib/IR AutoUpgrade.cpp

PowerPC: Rename "float-abi" module flag to "long-double-type" (#210817)

PPC was emitting a "float-abi" module flag for indicating the type of
long double. The "float ABI" naming is already widely taken by soft vs. 
hard float controls (e.g., the clang flag is called -mfloat-abi), so this 
shouldn't have  taken it. This should also not be PPC specific; x86 has 
the same problem. Rename  the flag to the more specific 
long-double-type,  and  add appropriate verification and documentation 
(which was also missing).  Also  changes the value names to match the IR 
type names.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+45-0llvm/test/Bitcode/upgrade-ppc-float-abi.ll
+28-11llvm/test/CodeGen/PowerPC/gnu-attribute.ll
+37-0llvm/test/Verifier/module-flags-long-double-type.ll
+31-0llvm/test/Linker/module-flags-long-double-type.ll
+30-0llvm/docs/LangRef.md
+20-0llvm/lib/IR/AutoUpgrade.cpp
+191-116 files not shown
+254-4212 files

LLVM/project 6d59a24llvm/lib/Target/AMDGPU SIFoldOperands.cpp, llvm/test/CodeGen/AMDGPU mad-mix-bf16.ll packed-fp32.ll

[AMDGPU] Generate literal32 operand for packed fp32 instructions (#212530)

Literal32 operand is supported for gfx1250+ for v_pk_*_f32
DeltaFile
+296-99llvm/test/CodeGen/AMDGPU/packed-fp32.ll
+12-0llvm/test/MC/AMDGPU/gfx1250_asm_vop3p.s
+9-0llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3p.txt
+2-3llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
+1-0llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+320-1025 files

LLVM/project 0db9525clang/test/ClangScanDeps logging-two-threads.c

[clang][ClangScanDeps] Relax logging-two-threads for duplicate module validation (#210587)

`ClangScanDeps/logging-two-threads.c` is flaky. It asserts each module's
timestamp is written exactly once, but under
`-fmodules-validate-once-per-build-session` two workers scanning
different TUs can both notice the shared module is unvalidated this
session and each validate and record it before the other's write lands,
so its timestamp is written once or twice depending on the interleaving.

The double write is harmless: the timestamp field is atomic and both
workers store the same session time. Only the exact-count assertion was
wrong.

Relax the test to the real invariant: the shared module A is written
once or twice and the single-TU module B exactly once. Module compile
and pcm write stay exactly once (the in-memory cache builds each module
once) and the per-module event ordering is still checked by the sequence
blocks.


    [4 lines not shown]
DeltaFile
+12-4clang/test/ClangScanDeps/logging-two-threads.c
+12-41 files

LLVM/project b0960bdllvm/lib/CodeGen MachinePipeliner.cpp MachineScheduler.cpp, llvm/lib/Target/AMDGPU R600Packetizer.cpp R600OptimizeVectorRegisters.cpp

[CodeGen] Stop requiring analyses that no pass reads (#212430)

Remove analysis requirements whose pass never calls getAnalysis for
them, and MachineSchedContext::MDT, which no scheduler reads. Also remove
addPreserved calls subsumed by setPreservesCFG (MachineDominatorTree and
MachineLoopInfo are CFG-only analyses) and a now-unpaired INITIALIZE_PASS_DEPENDENCY.

The PowerPC, Hexagon and R600 pipelines each drop a MachineDominatorTree
construction.

Aided by Claude Opus 5
DeltaFile
+2-12llvm/lib/CodeGen/MachineScheduler.cpp
+0-5llvm/lib/CodeGen/MachinePipeliner.cpp
+0-4llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
+1-3llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
+0-3llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
+0-3llvm/lib/Target/AMDGPU/R600Packetizer.cpp
+3-3018 files not shown
+3-5624 files