LLVM/project 67e6f30.github/workflows release-binaries.yml llvm-abi-tests.yml, .github/workflows/get-llvm-version action.yml

workflows/get-llvm-version: Make this action standalone (#218223)

You can use this action now without first checking out the llvm-project
source code.
DeltaFile
+11-2.github/workflows/get-llvm-version/action.yml
+1-7.github/workflows/llvm-abi-tests.yml
+1-7.github/workflows/libclang-abi-tests.yml
+1-6.github/workflows/release-binaries.yml
+14-224 files

LLVM/project dc2b952clang/lib/AST ASTContext.cpp, clang/test/SemaObjC gc-attributes.m

[ObjC] Fix Assertion failure when merging declarations with different lifetime qualifiers (#203272)

Fixes #150403
DeltaFile
+12-0clang/test/SemaObjC/gc-attributes.m
+6-5clang/lib/AST/ASTContext.cpp
+18-52 files

LLVM/project 57bec9dclang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-packed.c

[CIR] Accept packed records in x86_64 callconv lowering

isSupportedType turned down any record CIR marks packed, so a signature
carrying one failed the pass.  The reject predates the bridge reading field
offsets.  RecordType::getElementOffset and the record's size already account
for packing, so the reject has nothing left to guard.

Delete it, with one exception.  mapCIRType drops a zero-sized member before
classification, so a trailing zero-length array in a packed record passed in
a register where classic uses byval.  That gets a narrower reject naming it.

A polymorphic class stays NYI for want of a vptr mapping, and a padded record
reached through a named bit-field access unit stays NYI on the existing
unit-width gap.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+154-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-packed.c
+90-0clang/test/CIR/Transforms/abi-lowering/x86_64-record-packed.cir
+27-13clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
+22-14clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+293-274 files

LLVM/project fab9d86offload/languages/kernel/src LanguageRuntime.cpp, offload/test/offloading/CUDA devicesync_streams.cu

add proper deviceSync
DeltaFile
+98-0offload/test/offloading/CUDA/devicesync_streams.cu
+97-0offload/test/offloading/HIP/devicesync_streams.hip
+13-7offload/languages/kernel/src/LanguageRuntime.cpp
+1-1offload/test/offloading/HIP/launch_tu.hip
+1-1offload/test/offloading/HIP/basic_launch_multi_arg.hip
+1-1offload/test/offloading/HIP/basic_launch_blocks_and_threads.hip
+211-107 files not shown
+218-1313 files

LLVM/project d61e867flang/include/flang/Optimizer/Transforms Passes.td, flang/lib/Optimizer/Transforms LoopInvariantCodeMotion.cpp

[flang] Extend LICM cheap nested hoisting to scalar loads (#217616)

Admit fir.address_of and scalar loads in the "cheap" nested-region
hoisting mode, which previously admitted only fir.convert. Loads are
limited to trivial non-vector types and to descriptors of known rank,
since vector loads may be wide and an assumed-rank descriptor load
becomes a runtime-sized descriptor copy. This is a cost heuristic change; both
modes share `shouldMoveFromNestedRegion`, so the safety conditions are

Admit fir.address_of and loads of trivial and descriptor types in the
"cheap" nested-region hoisting mode, which previously admitted only
fir.convert. This is a cost heuristic change; both modes share
`shouldMoveFromNestedRegion`, so the safety conditions are unchanged.

Test added to `flang/test/Transforms/licm.fir` cover the newly added
cases (scalar, global scalar, descriptor) and the boundary: derived-type
and vector loads are not hoisted, a volatile scalar load stays
conditional, and a global scalar read inside an OpenMP worksharing
region moves out of the inner serial loop while remaining inside

    [4 lines not shown]
DeltaFile
+237-0flang/test/Transforms/licm.fir
+24-4flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
+3-1flang/include/flang/Optimizer/Transforms/Passes.td
+264-53 files

LLVM/project c8da491offload/languages/kernel/include State.h Stream.h, offload/languages/kernel/src State.cpp LanguageRuntime.cpp

add event cleanup
DeltaFile
+85-0offload/languages/kernel/src/Stream.cpp
+38-21offload/languages/kernel/include/LanguageUtils.h
+15-13offload/languages/kernel/src/LanguageRuntime.cpp
+19-0offload/languages/kernel/include/Stream.h
+6-2offload/languages/kernel/src/State.cpp
+2-1offload/languages/kernel/include/State.h
+165-372 files not shown
+168-378 files

LLVM/project 516ee5dlldb/include/lldb/Target PathMappingList.h, lldb/source/Target PathMappingList.cpp

[lldb][NFC] Remove unused overload for PathMappingList::FindIteratorForPath (#218481)
DeltaFile
+0-14lldb/source/Target/PathMappingList.cpp
+0-2lldb/include/lldb/Target/PathMappingList.h
+0-162 files

LLVM/project ff3d2c5offload/plugins-nextgen/amdgpu/src rtl.cpp, offload/plugins-nextgen/common/include PluginInterface.h

[offload] Use pinned memory for KLE

Reduce kernel launch latency by using the fast path "pinned host memory
-> device memory" for submitting the kernel launch environment to the
device.

Claude assisted with this patch.
DeltaFile
+71-0offload/test/offloading/kernel_launch_environment.c
+47-2offload/plugins-nextgen/common/src/PluginInterface.cpp
+14-0offload/plugins-nextgen/common/include/PluginInterface.h
+2-0offload/plugins-nextgen/amdgpu/src/rtl.cpp
+134-24 files

LLVM/project 6cd7853offload/plugins-nextgen/common/src PluginInterface.cpp

[offload] Adapt comment in queryAsync
DeltaFile
+2-3offload/plugins-nextgen/common/src/PluginInterface.cpp
+2-31 files

LLVM/project b041404llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU AMDGPUTargetParser.td

AMDGPU: Add SubArchSpelling override to the TargetParser TableGen

Add an optional SubArchSpelling field for targets where the subarch name isn't
trivially derivable from it's gfxNMK name.

Co-Authored-By: Claude <noreply at anthropic.com>
DeltaFile
+64-23llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+44-0llvm/test/TableGen/AMDGPUTargetDefSubArchSpelling.td
+6-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+4-0llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+4-0llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+122-235 files

LLVM/project 5f98333llvm/include/llvm/Analysis TargetTransformInfo.h, llvm/lib/Transforms/Scalar IndVarSimplify.cpp LowerMatrixIntrinsics.cpp

[NFC][TTI] Remove default CostKind from TTI::getArithmeticInstrCost (#218465)

Addresses #135598.

---------

Co-authored-by: Nikita Popov <github at npopov.com>
DeltaFile
+10-7llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
+5-4llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
+1-2llvm/include/llvm/Analysis/TargetTransformInfo.h
+16-133 files

LLVM/project 80a79ballvm/lib/Target/DirectX DXILIntrinsicExpansion.cpp, llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

[DirectX][SPIR-V] Fix `copysign` backend lowering (#217421)

Fixes #216826.

Adds `copysign` DirectX backend lowering and fixes the SPIR-V backend
lowering. Both lower with the bit manipulation `copysign(magnitude,
sign) = bitcast((bitcast(magnitude) & ~signBit) | (bitcast(sign) &
signBit))`, except the OpenCL path, which still emits `OpExtInst ...
copysign`.

Assisted-by: Claude Opus 4.8
DeltaFile
+82-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/copysign.ll
+63-0llvm/test/CodeGen/DirectX/copysign.ll
+53-1llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+50-0llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
+248-14 files

LLVM/project ea9e86allvm/tools/llvm-profdata llvm-profdata.cpp

deprecate -memprof-random-hotness-seed
DeltaFile
+4-4llvm/tools/llvm-profdata/llvm-profdata.cpp
+4-41 files

LLVM/project 87623fclldb/source/ValueObject DILEval.cpp, lldb/test/API/commands/frame/var-dil/expr/Assignment TestFrameVarDILAssign.py

[LLDB] Update DIL assignment to respect ValueObject::CanSetValue (#217960)

This will prevent DIL from allowing users to try to assign new values in
cases where that could lead to incorrect behavior.
DeltaFile
+4-0lldb/source/ValueObject/DILEval.cpp
+1-1lldb/test/API/commands/frame/var-dil/expr/Assignment/TestFrameVarDILAssign.py
+5-12 files

LLVM/project b99e0b5llvm/tools/llvm-profdata llvm-profdata.cpp

Update flag description
DeltaFile
+5-4llvm/tools/llvm-profdata/llvm-profdata.cpp
+5-41 files

LLVM/project cb4e817llvm CMakeLists.txt, llvm/cmake/modules TensorFlowCompile.cmake

[MLGO][CMake] Scope TensorFlow-AOT include usage (#218033)

## Summary

`TENSORFLOW_AOT_PATH` currently adds TensorFlow's include directory with
directory-wide `include_directories()`. This exposes TensorFlow's
bundled third-party headers to unrelated LLVM targets.

One concrete failure occurs when remote clangd is enabled: TensorFlow's
bundled Protobuf headers can shadow the Protobuf installation selected
for clangd's generated remote-index sources.

Replace the directory-wide include with a usage requirement on
`tf_xla_runtime`. Make the runtime dependency private to MLGO-owning
libraries, so those owners retain the TensorFlow headers they need while
unrelated targets do not inherit them. The runtime remains a link-only
dependency for final static linkers.

Fixes #218032.

    [24 lines not shown]
DeltaFile
+2-1llvm/CMakeLists.txt
+1-1llvm/cmake/modules/TensorFlowCompile.cmake
+3-22 files

LLVM/project 2ed0f89clang/lib/Interpreter Interpreter.cpp, clang/test/Interpreter stale-pch.cpp

[clang-repl] Stop interpreter init on action failure (#217147)

`clang::Interpreter` previously ignored the result of its initial
`CompilerInstance::ExecuteAction()` call and always constructed the
`IncrementalParser`. When the initial action failed, the parser could be
created from an invalid compiler state.

In practice, this failure happens if the incremental PCH included has
expired, due to system headers changing. This happens quite regularly,
after system updates, and is affecting jank users.

To fix this, the `Interpreter` now returns an error immediately when the
initial action fails or records a diagnostic error. This allows jank to
add a diagnostic consumer to detect PCH-related errors and rebuild the
PCH as needed.

----
I used Github copilot to help me diagnose and fix the issue. I have
manually reviewed the code, manually executed the test, and have
verified that the fix works locally for jank. I understand the change
completely.
DeltaFile
+23-0clang/test/Interpreter/stale-pch.cpp
+15-2clang/lib/Interpreter/Interpreter.cpp
+38-22 files

LLVM/project 4a6f8e1clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp

[CIR] Track the vtable pointer address-space gap with an assert

Andy pointed out on #218457 that "a vtable pointer is always the default
address space" is an implementation gap dressed up as an ABI fact:
cir::VPtrType has no address-space parameter, so a non-default address
space is unmodeled rather than impossible.  Matches the assert already on
VPtrType's case in LowerToLLVM.cpp.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+9-5clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+9-51 files

LLVM/project f008148llvm/lib/Target/AMDGPU SIOptimizeVGPRLiveRange.cpp, llvm/test/CodeGen/AMDGPU si-opt-vgpr-liverange-undef-use-livevars.mir

[AMDGPU] Fix undef uses miscounted as kills in SIOptimizeVGPRLiveRange (#218342)
DeltaFile
+2-1llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+1-1llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
+3-22 files

LLVM/project ede2b5fmlir/lib/Dialect/Linalg/Transforms Transforms.cpp, mlir/test/Dialect/Linalg decompose-pack.mlir

[MLIR][Linalg] Fix crash decomposing padded pack with non-unit un-tiled outer dim (#218141)

DecomposeOuterUnitDimsPackOpPattern only checked that the *tiled* outer
dims of a linalg.pack are all 1. When the op has a padding value,
getPackOpSourceOrPaddedSource additionally requires every outer dim
(including un-tiled ones) to be 1 and asserts otherwise. A pack with a
non-unit un-tiled outer dim therefore passed the guard but tripped the
assertion, crashing the compiler.

Bail out of the pattern via notifyMatchFailure when a padding value is
set and any outer dim is not 1, turning the crash into a graceful
no-match.

Fixes #218109.
DeltaFile
+19-0mlir/test/Dialect/Linalg/decompose-pack.mlir
+13-0mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
+32-02 files

LLVM/project 139601cmlir/lib/Target/MIR AArch64MIRLowering.inc MIRExport.cpp, mlir/tools/mlir-tblgen MIRGenericOpGen.cpp MIRTargetOpGen.cpp

MLIR: Fix CI: use OpTy::create, clang-format, exempt generated table

- MIRImport: replace deprecated builder.create<OpTy>() with OpTy::create(...)
  (the -Werror -Wdeprecated-declarations build failed on the old form).
- Run clang-format over the hand-written translation and tblgen sources.
- Wrap the generated AArch64MIRLowering.inc in a clang-format off region so the
  data table is exempt from formatting.
DeltaFile
+20-16mlir/tools/mlir-tblgen/MIRTargetOpGen.cpp
+10-7mlir/tools/mlir-tblgen/MIRGenericOpGen.cpp
+8-7mlir/lib/Target/MIR/MIRImport.cpp
+4-5mlir/lib/Target/MIR/MIRExport.cpp
+1-0mlir/lib/Target/MIR/AArch64MIRLowering.inc
+43-355 files

LLVM/project b1277e4llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/AArch64 induction-costs-sve.ll

[AArch64] Don't add runtime SCEV checks from containsDecreasingPointers. (#216961)

containsDecreasingPointers is a heuristic query, called from
preferPredicateOverEpilogue to decide whether tail-folding needs
TailFoldingOpts::Reverse. It only guides tail-folding decision, but
permanently added predicates, which may not even be used later.

Request the predicates explicitly and discard them instead. They are not
needed for correctness; the vectorizer has to add all predicates needed
for correctness independent of TTI.

PR: https://github.com/llvm/llvm-project/pull/216961
DeltaFile
+9-61llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
+5-1llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+14-622 files

LLVM/project 7cfdb80clang/test/CIR/CodeGen non-odr-use-const-bool.cpp mem-expr-fn.cpp, clang/test/CIR/CodeGenCoroutines coro-exceptions.cpp

[CIR] Drop the callconv opt-out from seven more CIR tests (#218275)

Following #216396, seven more tests carried
`-fno-clangir-call-conv-lowering` with a TODO waiting on parameters of
an empty or tag class. `coro-exceptions.cpp` also named a bare-variadic
declaration with no named parameter. #214742 lowers all seven now, so
the opt-out and its TODO go and the tests exercise the pass.

No CHECK line moves, so the IR these tests already pinned is what the
pass produces.

Assisted by: Cursor / claude-opus-5
DeltaFile
+2-4clang/test/CIR/CodeGen/non-odr-use-const-bool.cpp
+2-4clang/test/CIR/CodeGen/mem-expr-fn.cpp
+2-4clang/test/CIR/CodeGen/cxx2b-static-call-operator.cpp
+2-4clang/test/CIR/CodeGen/cxx23-explicit-object-member.cpp
+1-4clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
+1-3clang/test/CIR/CodeGenOpenACC/routine-bind.cpp
+10-231 files not shown
+11-267 files

LLVM/project 5e1bcd6mlir/lib/Dialect/Vector/Transforms VectorUnroll.cpp, mlir/test/Dialect/Vector vector-unroll-options.mlir

[mlir][vector] Fix multi-reduction unrolling with a lower rank target shape (#216799)

Fixes #216640

`mlir-opt -test-vector-unrolling-patterns` crashes on a rank 3
`vector.multi_reduction`:

```
Assertion `offsets.size() == sizes.size() && offsets.size() == strides.size()' failed.
```

The unroll target shape is allowed to have fewer dimensions than the
vector being unrolled, in which case it applies to the trailing
dimensions. `computeShapeRatio` accepts that, and
`UnrollElementwisePattern` handles it by padding the shape with leading
unit dimensions.

`UnrollMultiReductionPattern` used the target shape as it is, both for
the size of the slice taken from the source and to index the dimensions

    [24 lines not shown]
DeltaFile
+24-0mlir/test/Dialect/Vector/vector-unroll-options.mlir
+12-6mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp
+36-62 files

LLVM/project 3f638d1clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-padded.c call-conv-lowering-x86_64-zero-width-bitfield.c

[CIR] Classify around padding and zero-width bit-fields on x86_64 (#217517)

The bridge turns down any struct whose CIR type has a pad member, which
is every over-aligned struct and every struct with a gap between two
members. The ABI library could have handled these all along, since it
reads each field's offset and treats a gap as holding nothing. However,
we were handing the library the padding as though it were a field, so it
saw data where there was none. Now the pass gives the library only the
members that hold data.

A zero-width bit-field has no member at all, so CIRGen emits one for it,
marked `bitfield` and typed as a zero-length array of the bit-field's
declared type, for the pass to read back.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+212-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-zero-width-bitfield.c
+153-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-padded.c
+153-0clang/test/CIR/Transforms/abi-lowering/x86_64-struct-padded.cir
+74-43clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
+102-0clang/unittests/CIR/RecordMemberKindTest.cpp
+77-21clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+771-6410 files not shown
+968-9816 files

LLVM/project e3ad238llvm/utils/gn/secondary/llvm/lib/Target/RISCV BUILD.gn

[gn build] Port ea3bbd57e9c1 (#218488)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+1-01 files

LLVM/project 80bfef1llvm/utils/gn/secondary/llvm/lib/Target/RISCV BUILD.gn

[gn build] Port ce0be69f0ad8 (#218486)
DeltaFile
+4-3llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+4-31 files

LLVM/project ed6231allvm/utils/gn/secondary/clang-tools-extra/clang-tidy/llvm BUILD.gn

[gn build] Port 43329df78005 (#218484)
DeltaFile
+1-0llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/llvm/BUILD.gn
+1-01 files

LLVM/project f2aaf97llvm/utils/gn/secondary/llvm/lib/Frontend/OpenMP BUILD.gn

[gn build] Port 7d1bd911e621 (#218485)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Frontend/OpenMP/BUILD.gn
+1-01 files

LLVM/project 41004ballvm/utils/gn/secondary/clang/lib/AST BUILD.gn

[gn build] Port 3ff8254afdb2 (#218483)
DeltaFile
+1-0llvm/utils/gn/secondary/clang/lib/AST/BUILD.gn
+1-01 files