LLVM/project 0563360llvm/include/llvm/Passes TargetPassRegistry.inc, llvm/test/CodeGen/AMDGPU new-pm-machine-analysis.mir

[NewPM] Teach llc -passes to handle target machine analysis (#191704)
DeltaFile
+23-0llvm/include/llvm/Passes/TargetPassRegistry.inc
+13-0llvm/test/CodeGen/AMDGPU/new-pm-machine-analysis.mir
+36-02 files

LLVM/project 3cc9f63clang-tools-extra/docs/clang-tidy/checks list.rst

[clang-tidy][NFC] Mark cert-err33-c as alias in check list (#192224)
DeltaFile
+1-1clang-tools-extra/docs/clang-tidy/checks/list.rst
+1-11 files

LLVM/project ca867c7llvm/lib/Target/SPIRV SPIRVBuiltins.cpp, llvm/test/CodeGen/SPIRV/transcoding OpAllAny.ll

[SPIR-V] Convert integer vector to bool vector for OpAny/OpAll (#191804)

OpenCL any()/all() builtins receive integer vectors, but OpAny/OpAll
require boolean vector inputs per the SPIR-V spec

related to https://github.com/llvm/llvm-project/issues/190736
DeltaFile
+24-1llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+11-1llvm/test/CodeGen/SPIRV/transcoding/OpAllAny.ll
+35-22 files

LLVM/project b05b77allvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fsub.ll llvm.amdgcn.reduce.fadd.ll

[AMDGPU] DPP wave reduction for double types - 2 (#189391)

Supported Ops: `fadd` and `fsub`
DeltaFile
+1,030-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+1,008-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+20-15llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,058-2753 files

LLVM/project bc54a63llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fmax.ll llvm.amdgcn.reduce.fmin.ll

[AMDGPU] DPP wave reduction for double types - 1 (#189390)

Supported Ops: `fmin` and `fmax`
DeltaFile
+1,112-234llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+1,112-234llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+27-13llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,251-4813 files

LLVM/project ed1199allvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.xor.ll llvm.amdgcn.reduce.and.ll

[AMDGPU] DPP wave reduction for long types - 3 (#189226)

Supported Ops: `and`, `or`, `xor`
DeltaFile
+984-132llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+960-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+960-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+12-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,916-3494 files

LLVM/project 66b946dllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] DPP wave reduction for long types - 2 (#189225)

Supported Ops: `add`, `sub`
DeltaFile
+1,113-146llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+1,079-142llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+73-20llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,265-3083 files

LLVM/project 42ce9dbllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] DPP wave reduction for long types - 2

Supported Ops: `add`, `sub`
DeltaFile
+1,113-146llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+1,079-142llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+73-20llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,265-3083 files

LLVM/project e27bc38llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fsub.ll llvm.amdgcn.reduce.fadd.ll

[AMDGPU] DPP wave reduction for double types - 2

Supported Ops: `fadd` and `fsub`
DeltaFile
+1,030-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+1,008-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+20-15llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,058-2753 files

LLVM/project 1bdb9c9llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fmax.ll llvm.amdgcn.reduce.fmin.ll

[AMDGPU] DPP wave reduction for double types - 1

Supported Ops: `fmin` and `fmax`
DeltaFile
+1,112-234llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+1,112-234llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+27-13llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,251-4813 files

LLVM/project d98d274llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.xor.ll llvm.amdgcn.reduce.and.ll

[AMDGPU] DPP wave reduction for long types - 3

Supported Ops: `and`, `or`, `xor`
DeltaFile
+984-132llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+960-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.and.ll
+960-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.or.ll
+12-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,916-3494 files

LLVM/project 15ce7e1llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.max.ll llvm.amdgcn.reduce.min.ll

[AMDGPU] DPP wave reduction for long types - 1 (#189224)

Supported Ops: `min`, `max`, `umin`, `umax`
DeltaFile
+1,084-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+1,084-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+1,044-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+1,044-108llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
+187-42llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+4,443-4745 files

LLVM/project ef36f92llvm/test/Transforms/LoopVectorize pr31190.ll optsize.ll, llvm/test/Transforms/LoopVectorize/AArch64 sve2-histcnt-epilogue.ll

[LV][NFC] Remove "REQUIRES: asserts" line from some tests (#191795)

Several tests seemed to require asserts despite not testing any debug
output so I have removed the line.
DeltaFile
+31-4llvm/test/Transforms/LoopVectorize/pr31190.ll
+2-2llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
+0-1llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll
+0-1llvm/test/Transforms/LoopVectorize/optsize.ll
+0-1llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
+0-1llvm/test/Transforms/LoopVectorize/tripcount.ll
+33-106 files

LLVM/project cee66b7llvm/lib/Target/AMDGPU SIISelLowering.cpp

[AMDGPU]Refactor `lowerWaveReduce` for maintainability (#189223)

The function to lower wave reduce pseudos is already quite
large ,and there are yet a few more operations to support.
Refactoring some of the code to make it more manageable.
Summary of changes:
1. Moved the expansion for `V_CNDMASK_B64_PSEUDO` to a
separate function. It's needed for 64 bit dpp operations.

2. Collapsed `getIdentityValueFor32BitWaveReduction` and
`getIdentityValueFor64BitWaveReduction` into a single
function which returns a 64 bit unsigned value.

3. Modified `getDPPOpcForWaveReduction` to also return
the `Clamp` opcode.

4. Added a lambda: `BuildRegSequence` and a static function
`ExtractSubRegs` as those code blocks are repeated with
little variation.

    [2 lines not shown]
DeltaFile
+196-216llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+196-2161 files

LLVM/project 120cbbdllvm/lib/Transforms/InstCombine InstCombineCompares.cpp, llvm/test/Transforms/InstCombine fold-fcmp-trunc.ll known-never-nan.ll

[InstCombine] Fold `fptrunc(x) ord/uno [ C | fptrunc(y) ]` to `x ord/uno [ C | y ]` (#185844)

Recognize TWO new patterns and fold them as follows:
```
fptrunc(x) ord/uno C           -->  x ord/uno 0
fptrunc(x) ord/uno fptrunc(y)  -->  x ord/uno y
```

Fixes #185698
Alive2: https://alive2.llvm.org/ce/z/YvXnBJ
IR diff: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3551
CompTime impact: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3552
DeltaFile
+48-3llvm/test/Transforms/InstCombine/fold-fcmp-trunc.ll
+28-9llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+1-2llvm/test/Transforms/InstCombine/known-never-nan.ll
+77-143 files

LLVM/project 49d7237llvm/lib/Target/LoongArch LoongArchLSXInstrInfo.td LoongArchLASXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx ctpop-ctlz.ll

[LoongArch] Select `V{AND,OR,XOR,NOR}I.B` for bitwise with byte splat immediates

The `V{AND,OR,XOR,NOR}I.B` instructions operate on byte elements and accept
an 8-bit immediate. However, when the same byte splat constant is used with
wider vector element types (e.g. v8i16, v4i32, v2i64), instruction selection
currently falls back to materializing the constant in a temporary register.

```
vrepli.b  -1
vxor.v
```

even though the immediate form is available:

```
vxori.b 255
```

This happens because selectVSplatImm requires the splat bit width to match

    [11 lines not shown]
DeltaFile
+29-2llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+24-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+3-6llvm/test/CodeGen/LoongArch/lasx/ir-instruction/xor.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/ctpop-ctlz.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/ir-instruction/and.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
+65-2614 files not shown
+102-8520 files

LLVM/project 522de78llvm/test/CodeGen/LoongArch/lasx/ir-instruction nor.ll or.ll, llvm/test/CodeGen/LoongArch/lsx/ir-instruction nor.ll and.ll

[LoongArch][NFC] Add tests for bitwise with byte splat immediates
DeltaFile
+36-0llvm/test/CodeGen/LoongArch/lasx/ir-instruction/nor.ll
+36-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/nor.ll
+33-0llvm/test/CodeGen/LoongArch/lasx/ir-instruction/or.ll
+33-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/and.ll
+33-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/or.ll
+33-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/xor.ll
+204-02 files not shown
+270-08 files

LLVM/project 257aa19lldb/source/Plugins/Process/FreeBSD-Kernel-Core RegisterContextFreeBSDKernelCore_x86_64.cpp

[lldb][FreeBSDKernel] Supply values for CS/SS registers (#192207)

These two values ensure that CPU was in kernel privilege at the time of
crash. This change is from KGDB's `amd64fbsd-kern.c`.

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+9-2lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_x86_64.cpp
+9-21 files

LLVM/project bb7b3d9llvm/lib/Target/AMDGPU SIISelLowering.cpp

Add comment for final sub reduction
DeltaFile
+3-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+3-01 files

LLVM/project 72e666dllvm/docs ReleaseNotes.md

[lldb][FreeBSDKernel] Add release notes for refresh-threads (#191399)

Fixes: 9116344c02bf0b9ec037451d12935d7539c48679 (#188692)

Assisted-by: Claude

---------

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+3-0llvm/docs/ReleaseNotes.md
+3-01 files

LLVM/project 789f30cllvm/lib/HTTP HTTPClient.cpp HTTPServer.cpp, llvm/lib/Support/HTTP HTTPClient.cpp HTTPServer.cpp

[llvm] Move libSupportHTTP to top-level libHTTP (NFC) (#191202)

The HTTP implementation depends on CURL and would preferably not be part
of the LLVM dylib. This was not possible as a nested library under
libSupport, because libSupport itself is part of the LLVM dylib. This
patch moves the HTTP code into a separate top-level library that is
independent from libSupport and excluded from the LLVM dylib.
DeltaFile
+0-398llvm/lib/Support/HTTP/HTTPClient.cpp
+398-0llvm/lib/HTTP/HTTPClient.cpp
+0-310llvm/unittests/Support/HTTP/HTTPServerTests.cpp
+310-0llvm/unittests/HTTP/HTTPServerTests.cpp
+0-195llvm/lib/Support/HTTP/HTTPServer.cpp
+195-0llvm/lib/HTTP/HTTPServer.cpp
+903-90337 files not shown
+1,267-1,28243 files

LLVM/project 738ead2lldb/source/Plugins/Process/FreeBSD NativeProcessFreeBSD.cpp, lldb/source/Plugins/Process/NetBSD NativeProcessNetBSD.cpp

[lldb] Fix FreeBSD/NetBSD plugin build after AsCString API change (#192110)

The argument to `AsCString` was made explicit in
116b045b1e2bff462afff0dc0b06218e6074f427.

```
/home/ewilde/llvm-project/freebsd-lldb-build/lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp:754:48: error: too few arguments to function call, single argument 'value_if_empty' was not specified
  754 |       module_file_spec.GetFilename().AsCString());
      |       ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^
/home/ewilde/llvm-project/freebsd-lldb-build/lldb/include/lldb/Utility/ConstString.h:183:15: note: 'AsCString' declared here
  183 |   const char *AsCString(const char *value_if_empty) const {
      |               ^         ~~~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
```

Not all use-sites were updated to pass an argument resulting in build
failures. I'm updating the errors in the FreeBSD and NetBSD plugins to
use formatv instead of expanding the C String, like what is done on
Linux, avoiding the issue entirely.

rdar://174675042
DeltaFile
+3-3lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
+3-3lldb/source/Plugins/Process/NetBSD/NativeProcessNetBSD.cpp
+6-62 files

LLVM/project 7145f89clang-tools-extra/clang-tidy/performance PreferSingleCharOverloadsCheck.cpp, clang-tools-extra/test/clang-tidy/checkers/performance prefer-single-char-overloads-alias.cpp

[clang-tidy] Emit deprecation warning for preformance-faster-string-find (#191922)

Related discussion in:
https://github.com/llvm/llvm-project/pull/186946#discussion_r2983649044
DeltaFile
+15-1clang-tools-extra/clang-tidy/performance/PreferSingleCharOverloadsCheck.cpp
+11-0clang-tools-extra/test/clang-tidy/checkers/performance/prefer-single-char-overloads-alias.cpp
+26-12 files

LLVM/project 7ae5fe6compiler-rt/lib/sanitizer_common sanitizer_linux.cpp

[sanitizer] Use close_range on Linux to close FDs in StartSubprocess (#191450)

Enable the close_range syscall on Linux when __NR_close_range is
available in kernel headers (Linux 5.9+). On older kernels, the
syscall returns ENOSYS and callers fall back gracefully.

This fixes the slow FD closing loop in StartSubprocess when
RLIMIT_NOFILE is high (e.g. 1B in Docker environments).

Fixes https://github.com/llvm/llvm-project/issues/63297.
Fixes https://github.com/llvm/llvm-project/issues/152459.
DeltaFile
+2-2compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
+2-21 files

LLVM/project 2acf879llvm/lib/DebugInfo/DWARF DWARFContext.cpp

[llvm][DebugInfo] formatv in DWARFContext (#191983)

This relates to #35980.

Co-authored-by: Sergei Barannikov <barannikov88 at gmail.com>
DeltaFile
+11-9llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
+11-91 files

LLVM/project 63febe0llvm/lib/CodeGen/GlobalISel CallLowering.cpp

[GISel][CallLowering] Improve arg flags setting compile-time (#191761)

addFlagsUsingAttrFn is hot and showing up in compile-time profiles via
llvm::CallLowering::lowerCall. The culprit is std::function callback.
Switching to set flags based on AttributeSet directly is a -0.25%
compile-time improvement on CTMark AArch64 O0.

https://llvm-compile-time-tracker.com/compare.php?from=d35cd21a3757ab6028024f0b47bc9d802d06eae6&to=e717c7017faf2cb386f0d02715fb55d252b3ae42&stat=instructions%3Au
DeltaFile
+26-26llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
+26-261 files

LLVM/project 4720d95clang-tools-extra/clang-tidy/bugprone UncheckedOptionalAccessCheck.cpp, clang-tools-extra/test/clang-tidy/checkers/bugprone unchecked-optional-access.cpp

Fix registered matcher for bugprone-unchecked-optional-access (recent changes to libcxx) (#191681)

Further fix for #187788. Previous attempt in PR #188044 only updated the
model and model tests, but forgot to update the registered matcher.
DeltaFile
+28-11clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/unchecked-optional-access/std/types/optional.h
+28-6clang-tools-extra/test/clang-tidy/checkers/bugprone/unchecked-optional-access.cpp
+8-3clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
+3-2clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
+3-2clang-tools-extra/clang-tidy/bugprone/UncheckedOptionalAccessCheck.cpp
+70-245 files

LLVM/project 3ecf872clang/lib/Format Format.cpp, clang/unittests/Format FormatTest.cpp

[clang-format] Detect language for file templates (#191502)

Fixes #191295.
DeltaFile
+9-1clang/lib/Format/Format.cpp
+4-0clang/unittests/Format/FormatTest.cpp
+13-12 files

LLVM/project 73c7a61clang/lib/Driver/ToolChains Hexagon.cpp, clang/test/Driver hexagon-toolchain-linux.c hexagon-toolchain-elf.c

[Hexagon] Add LTO options to Hexagon driver link args (#191336)

The Hexagon driver's constructHexagonLinkArgs() was not calling
addLTOOptions(). This meant that LTO plugin options weren't forwarded to
the linker.

This caused a crash when using ThinLTO with -fenable-matrix on
llvm-test-suite/SingleSource/UnitTests/matrix-types-spec.cpp:
LowerMatrixIntrinsicsPass did not run in the LTO backend because
-enable-matrix was not forwarded via -plugin-opt.

Add the addLTOOptions() call to both the musl and bare-metal code paths
in constructHexagonLinkArgs().
DeltaFile
+13-0clang/test/Driver/hexagon-toolchain-linux.c
+12-0clang/test/Driver/hexagon-toolchain-elf.c
+8-0clang/lib/Driver/ToolChains/Hexagon.cpp
+33-03 files

LLVM/project 4b2030fllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fsub.ll llvm.amdgcn.reduce.fadd.ll

[AMDGPU] DPP wave reduction for double types - 2

Supported Ops: `fadd` and `fsub`
DeltaFile
+1,030-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+1,008-130llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+12-10llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2,050-2703 files