CodeGen: Remove shadowing TargetMachine members from COFF and M68k TLOFs (#226769)
TargetLoweringObjectFile::Initialize already records the TargetMachine
in a base class field.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
ARM: Move abi name implied float abi to TargetParser
ARMTargetMachine overrode the default float abi based on the abi name.
Move this logic to TargetParser so the ABI will be computable without
depending on codegen.
Co-Authored-By: Claude Sonnet 5 <noreply at anthropic.com>
CodeGen: Remove shadowing TargetMachine members from COFF and M68k TLOFs
TargetLoweringObjectFile::Initialize already records the TargetMachine in a
base class field.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
[CMake] Link MLIR if CLANG_ENABLE_CIR
CIR requires MLIR to build. However, MLIR doesn't have a separate
config file; it dependencies are checked by ClangTarget.cmake without
linking the MLIR library. Link against MLIR in ClangCOnfig.cmake when
CIR is enabled.
[orc-rt] Move ORC_RT_LOG_ENABLED out of config.h; catch typos. (#226751)
Move ORC_RT_LOG_ENABLED to orc-rt-c/support/LogLevel.h so that config.h
is kept for build options only.
Switch to using function-like macros so that typos in level-names become
compilation errors.
[CIR] Reject language address spaces in DirectToLLVM pointer conversion
Reject unlowered language address spaces in pointer types when bypassing TargetLowering. Guard pointer-producing lowerings, including generated patterns, so failed conversions report legalization failures instead of silently selecting address space zero or constructing invalid LLVM operations.
Assisted-by: Codex / GPT-6
[CIR] Propagate initializer type adjustment failures
Reject initializers whose active members have no LLVM representation, including when an enclosing union's storage type is convertible. Propagate recursive adjustment failures before querying data layout or constructing LLVM operations.
Assisted-by: Codex / GPT-6
[CIR] Propagate type conversion failures in DirectToLLVM
Propagate failed type and constant conversions through DirectToLLVM so unsupported types produce legalization failures instead of invalid LLVM operations or a void function result.
Assisted-by: Codex / GPT-6
[Clang][RISC-V] Fix lto-module-asm-abi.c on non-asserts/no-lld builds (#226752)
Pass `-fno-discard-value-names` so the `entry:` label is preserved in
non-asserts builds, and drop `-fuse-ld=lld` so the driver check succeeds
on bots that do not have `ld.lld` installed.
Fixes: bf529329b5ce ("[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)")
Pull-Request: https://github.com/llvm/llvm-project/pull/226752
[docs][bolt] Remove Markdown enum (#226411)
Remove use of Markdown enum from the bolt docs. Related to #223829.
This should fix our ATfL build
[failure](https://github.com/arm/arm-toolchain/actions/runs/36103090912/job/107969633028#step:7:22533)
```
Traceback (most recent call last):
File "/workspace/python/.venv/lib/python3.12/site-packages/sphinx/config.py", line 529, in eval_config_file
exec(code, namespace) # NoQA: S102
^^^^^^^^^^^^^^^^^^^^^
File "/workspace/src/bolt/docs/conf.py", line 18, in <module>
globals().update(common_conf(tags, markdown=Markdown.NEVER))
^^^^^^^^
NameError: name 'Markdown' is not defined
```
[docs] Replace clang.llvm.org/docs links with Sphinx links (#222507)
Use Sphinx document and option roles or project-relative links for links
within the Clang documentation. Repair stale generated-document
fragments found while validating the replacements. This ensures that
standalone documentation builds are self-contained, although
cross-project links (Clang->LLVM) typically go via absolute llvm.org
hrefs.
Part of #214861
Assisted-by: Codex
[Clang][ExprConst] Accept prvalue for nothrow new
A user defined operator new can accept prvalue for nothrow. There is
no guarantee in spec that it should be lvalue. Relax the check with
side effect only.
[Clang][RISC-V] Fix lto-module-asm-abi.c on non-asserts/no-lld builds
Pass `-fno-discard-value-names` so the `entry:` label is preserved in
non-asserts builds, and drop `-fuse-ld=lld` so the driver check succeeds
on bots that do not have `ld.lld` installed.
Fixes: bf529329b5ce ("[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)")
[SDPatternMatch] Simplify EffectiveOperands and drop the template specialization. NFC (#226036)
The chain and glue operands are in fixed locations, we don't need a loop
to find them.
Use the template parameter to skip the constructor body instead of using
template specialization.
[MLIR][LLVM] Produce canonical const GEP in convertGEPOp (#226699)
The DataLayout overload of ConstantExpr::getGetElementPtr is the form
that replaces typed constant GEPs. Use it for inrange GEPs and fail
translation when the indices cannot be reduced to a byte offset.
This resolves
https://github.com/llvm/llvm-project/pull/220424#discussion_r4092337505
Assisted-by: grok-4.7
Signed-off-by: Letu Ren <fantasquex at gmail.com>
[Github] Build BOLT docs on changes (#226747)
We were already set up to build the BOLT docs, but the workflow did not
actually trigger on changes to the BOLT docs specifically. This change
fixes that.
[ValueTracking] Support Array and Structure in contains* check
Support Vector and Structure in containsUndefinedElement,
containsUndefOrPoisonElement, and containsConstantExpression. This is
achieved by using containsMatchingElement helper function, which
checks type recursively as Structure and Array are aggregates, which
can contain basically anything inside. This allows InstCombine to
fold these two types correctly.
[AMDGPU] Remove BaseInfo duplicates of TargetParser APIs
Use TargetParser for LDS sizes and VGPR hardware limits, retaining the
backend handling of dynamic VGPR allocation and architectural VGPRs on
targets with a unified register file.
Remove the TargetID factory wrapper and redundant type and SGPR constant
aliases. Update the subtarget, assembler, disassembler, target streamer,
and occupancy calculator callers.
Cover physical LDS allocation boundaries across GPU generations and
full/half-SIMD modes in the assembler tests.
Change-Id: Iacae35d939d8bc1d5d78ad9e545c6f1eb5cd38fe
[RISC-V] Update streamer ArchString in emitTargetFeaturePush() (#225133)
Previously, RISCVAsmPrinter::emitTargetFeaturePush() only emitted `.option push`
and `.option arch` without updating the streamer's active ArchString. When
emitting an ELF object file directly (`-filetype=obj`),
RISCVTargetELFStreamer::emitDirectiveOptionArch() is a no-op while
emitTargetFeaturePop() resets ArchString back to the pushed ArchString, so
module-level inline assembly and functions with custom `target-features` failed
to emit updated `$x<arch>` mapping symbols.
Call RTS.setArchString() with the parsed ISA string in emitTargetFeaturePush()
so `-filetype=obj` records the active `$x<arch>` mapping symbol alongside
`.option arch`.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225133
[RISC-V][MC] Update ELF streamer ArchString in setFlagsFromFeatures() (#225140)
During LTO, the TargetMachine subtarget is initialized with the linker's
default CPU (e.g. `generic-rv64`, `rv64i2p1`), while
RISCVAsmPrinter::emitStartOfAsmFile() reconstructs the module's actual ISA from
the `riscv-isa` module flag and calls RISCVTargetStreamer::setFlagsFromFeatures()
and RISCVTargetStreamer::emitTargetAttributes(). Because
RISCVTargetELFStreamer previously only initialized InitialArchString and
ArchString in its constructor rather than in setFlagsFromFeatures(), direct
object emission bypassed the update and tagged `.text` with `$xrv64i2p1`
instead of the module's full architecture string.
Move the InitialArchString and ArchString initialization into
RISCVTargetELFStreamer::setFlagsFromFeatures() and also call setArchString()
alongside emitTextAttribute(RISCVAttrs::ARCH, ...) in
RISCVTargetStreamer::emitTargetAttributes().
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225140
[RISC-V][MC] Fix mapping symbol section tracking on popSection() (#225131)
Previously, RISCVELFStreamer::changeSection() saved LastEMS and LastEmittedArch
under getPreviousSection().first instead of getCurrentSection().first. When
MCStreamer::popSection() switches back to a previous section,
getPreviousSection() already points to the destination section being restored
rather than the section being exited. This clobbered the destination section's
saved mapping symbol state and caused duplicate `$x<arch>` mapping symbols to
be emitted whenever returning to `.text`.
Use getCurrentSection().first instead, matching AArch64ELFStreamer and
ARMELFStreamer.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225131
[LTO] Preserve module inline asm target properties for .lto_discard and symvers (#225130)
Previously, LTO::addRegularLTO() and IRLinker::run() called
prependModuleInlineAsm() and appendModuleInlineAsm() with a plain string when
synthesizing `.lto_discard` and imported `.symver` directives, creating a new
GlobalAsmFragment with empty TargetCPU and TargetFeatures instead of preserving
the existing module inline asm's properties. Copy the front fragment's Props so
these synthesized directives are merged into the module's inline asm with the
same target features.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225130
