[X86] Tidyup atom fpu->gpr costs (#214454)
These had matching high latency and throughput numbers, which suggest
they hadn't been updated since the itinerary conversion.
Confirmed with Agner, uops.info and instlatx64 which report a consistent
throughput of 2cy, latency seems to be about 4cy (uops.info just says <=
6cy)
Noticed while trying to confirm #214191 vector reduction costs for atom
type cpus, and llvm-mca was reporting some very odd numbers for bonnell.
[PAC][ELF] Make non-preemptible IFUNC GOT assertion an error and extend
Support for R_AARCH64_AUTH_IRELATIVE is not yet present in LLD, but we
accept various input that would give rise to needing it. For the direct
reloc case, replaceWithDefined asserts (rather than give an error
message) this was not requested, whilst for the non-direct reloc case it
silently ignores which GOT type was requested. In the latter case, and
the former when assertions are disabled, this results in mis-linking the
object, producing one with a non-AUTH GOT entry, that would presumably
then fail the AUTDA operation in any user of it (aside from the IPLT
entry generated by LLD).
Fixes: 417d2d7ce694 ("[PAC][lld][AArch64][ELF] Support signed GOT (#113815)")
[flang][debug] Emit debug info for named constants (#213974)
Fixes https://github.com/llvm/llvm-project/issues/213966.
Only globals whose uniqued name deconstructs to `NameKind::VARIABLE`
were described. A Fortran named constant (PARAMETER) is mangled with EC
and deconstructs to `NameKind::CONSTANT`, so it got no debug info at all
and a debugger could not evaluate one, whether it was declared in a
module or inside a procedure.
A module constant is described the way a module variable already is,
with a `DIGlobalVariable` scoped to the `DIModule`. A constant local to
a procedure is described in the scope of that procedure.
Two related fixes for entities whose global has internal linkage, which
covers both a procedure local constant and a procedure local SAVE
variable that was already being described:
- `isLocalToUnit` was hardcoded to false, so these were marked
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[mlir][vector] Disallow vector broadcast along scalable dim (#212197)
Broadcasts from vectors to higher rank vectors get lowered recursively
by iterating over leading dimensions to create "size(dimension)" insert
ops. This cannot be done for scalable dimensions whose size is unknown.
This PR prevents such transforms from occurring by stopping if the
leading dimension is scalable.
[AArch64] Fix wrong comment on TTI(NFC) (#213743)
The Apple runtime unroll preference in context only accepts single BB
loops by `if (Header == Latch)`
[VPlan]: During VPRegionBlock::clone, sync the NUW of CanIVInfo (#212266)
VPRegionBlock::clone() creates the cloned loop region's canonical IV
info via createLoopRegion(), which always starts with NUW set. If the
original region's canonical IV had already had its NUW flag cleared the
clone did not carry that over, leaving the cloned region's CanIVInfo
inconsistent with the original. Propagate the cleared NUW flag to the
clone so both regions agree on whether the canonical IV is NUW.
[MLIR][OpenMP] Ensure -fopenmp-force-usm doesn't override requirements
The `mlir::omp::setOffloadModuleInterfaceAttributes` utility function
can currently override any pre-existing OpenMP `requires` clauses in the
module. This doesn't cause any problems at the moment because all calls to
this function happen before any other `requires` are processed. However,
it's safer to make sure it never deletes pre-existing flags in case the
same function is reused in a different context.
[MLIR][OpenMP] Refactor omp dialect utils headers, NFC
This patch implements some non-functional refactoring changes:
- It consolidates the two existing "utils" headers into one.
- It renames fields and arguments to the `OffloadModuleOpts` structure
to follow the MLIR style guide and more closely match the
corresponding `OffloadModuleInterface` attributes.
- It removes comments in OpenMP-to-LLVMIR translation referring to Flang
frontend options associated to the `OffloadModuleInterface`.
[lldb-dap] Merge parent and user defined env when spawning server. (#213679)
The DAP server was spawned using only the user defined `options.env`,
which dropped the parent process's environment (e.g. PATH). Merge the
two, giving user-defined values priority on conflicts.
Fixes #159498
[mlir][ArmNeon] Reject masked contractions in `I8MM/BFMMLA` lowering patterns (#213698)
`LowerContractionToNeonI8MMPattern` and
`LowerContractionToNeonBFMMLAPattern` rewrite a `vector.contract` into
several ops (multiple `arm_neon.intr.smmla`/`bfmmla` calls plus
`extract/insert/shape_cast` scaffolding).
When the matched `vector.contract` sits inside a `vector.mask` (e.g.,
from vectorizing a matmul with dynamically-shaped operands), this
in-place multi-op rewrite violates `vector.mask`'s invariant that its
region contain exactly **one** operation, and the verifier rejects the
result: _error: 'vector.mask' op expects only one operation to mask_.
Neither pattern checked for masking, unlike the generic
contraction-lowering
patterns. To fix the problem, we bail out via `notifyMatchFailure` when
the contraction is masked, so it falls through to a different lowering
path instead of producing invalid IR.
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[CodeGen] Add initial multi-def rematerialization support (#197580)
This significantly improves support for rematerializing registers with
more than one definition. In particular, this includes cases where
different lanes of a register are defined over multiple instructions.
There are still a few restrictions that can hopefully be relaxed in the
future.
- All defining instructions must be part of the same rematerialization
region.
- No pure user of the register (i.e., an MI that doesn't also defined a
part of the register) must read the register before its last definition.
These constraints ensure that the underlying DAG representation
maintained by the rematerializer is still valid, making this a
relatively incremental improvement.
[lldb] Refactor RegisterTypeBuilder
This prepares it for emitting union types. Major changes:
* Entry function is now a dispatcher to builder functions for each type.
* Name mangling is standardised.
* The register name parameter is no longer needed and so was removed.
[lldb] Make RegisterFlagsDetector into RegisterTypesDetector
In future it may be generating things other than flags. Functionality
is the same, but the interface changes to use RegisterType.
[lldb] Store all XML register types in a single string map
We are assuming that their ID's are unique, so there's no need to keep
separate maps. We can do basic type checking by checking the kind of
the type pointed to.
A few more methods were added to the base RegisterType. GetSize()
returns 0 for enums because enums don't have a size until they are
used by a register. This is not ideal but it works for now.
[lldb] Convert uses of RegisterTypeFlags into RegisterType (#213886)
So we are using the generic interface that will work with
all future RegisterType derived classes.
Right now we'll only be asked to print RegisterTypeFlags, so
there's a few dyn_cast to that. Later we will switch on the
kind, and support rendering more types.
[Clang][AIX] Error on -mloadtime-comment-vars in cc1 for non-AIX targets
The driver continues to warn and drop the option for unsupported targets;
cc1, reachable directly or via -Xclang, now rejects it with
err_drv_unsupported_opt_for_target, mirroring the -mabi=quadword-atomics
and -mxcoff-roptr checks.
