LLVM/project c048396cross-project-tests/amdgpu builtins-amdgcn-swmmac-w64.cl builtins-amdgcn-gfx12-wmma-w32.cl

cross-project-tests: Migrate amdgpu tests to use subarch triples
DeltaFile
+1-1cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w64.cl
+1-1cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w32.cl
+1-1cross-project-tests/amdgpu/builtins-amdgcn-gfx12-wmma-w64.cl
+1-1cross-project-tests/amdgpu/builtins-amdgcn-wmma-w64.cl
+1-1cross-project-tests/amdgpu/builtins-amdgcn-wmma-w32.cl
+1-1cross-project-tests/amdgpu/builtins-amdgcn-swmmac-w32.cl
+6-66 files

LLVM/project 4180e2bllvm/include/llvm/ADT GenericUniformityImpl.h

[UniformityAnalysis] Make divergent-exit cycle print order deterministic (#210107)

Once the set spills to the heap its iteration order follows allocation
addresses, so the printed order is nondeterministic.

Fix https://reviews.llvm.org/D130746 ("RFC: Uniformity Analysis for
Irreducible Control Flow")
DeltaFile
+3-2llvm/include/llvm/ADT/GenericUniformityImpl.h
+3-21 files

LLVM/project 49744c0flang/lib/Parser openacc-parsers.cpp, flang/test/Parser acc-unparse.f90

[flang][OpenACC] Allow blanks around ':' in a gang-arg (#210089)

The parsers for the STATIC, DIM, and NUM forms of an OpenACC gang-arg
used the token strings "STATIC: ", "DIM: ", and "NUM: ", none of which
permit a blank between the keyword and the ':' separator. A space in a
TokenStringMatch pattern is the only place a blank is accepted in the
source (outside the leading/trailing skip), so a directive such as

    !$acc loop gang(static : 1)

was rejected with "expected end of OpenACC directive", even though
free-form Fortran allows optional blanks around the separator.

Move the blank in each token string to before the ':' ("STATIC :", etc.)
so zero or more blanks are accepted on either side of the separator. The
_tok form keeps the blank optional, so the no-space spelling still
parses without a warning.

Add parser/unparse coverage for the spaced spellings of the static, dim,
and num gang arguments.
DeltaFile
+31-0flang/test/Parser/acc-unparse.f90
+3-3flang/lib/Parser/openacc-parsers.cpp
+34-32 files

LLVM/project 7ee5025lld/test/ELF amdgpu-tid.s emulation-amdgpu.s, lld/test/ELF/lto amdgpu.ll amdgcn-oses.ll

lld: Migrate amdgpu tests to use subarch triples
DeltaFile
+14-14lld/test/ELF/amdgpu-tid.s
+12-0lld/test/ELF/lto/amdgpu.ll
+4-3lld/test/ELF/emulation-amdgpu.s
+3-3lld/test/ELF/lto/amdgcn-oses.ll
+3-3lld/test/ELF/amdgpu-duplicate-sym.s
+2-2lld/test/ELF/amdgpu-elf-flags-err.s
+38-256 files not shown
+47-3412 files

LLVM/project 9d66f40llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

AMDGPU: Migrate more tests to amdgpu triples

These were missed in previous conversions for whatever reason.
Some are new tests added after I did the bulk migration, some
are special cases.
DeltaFile
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+57-57llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-unoptimized-debug-data.ll
+50-56llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
+30-57llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-constants.ll
+14-14llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-control-flow.ll
+456-489174 files not shown
+734-796180 files

LLVM/project 2fc864bllvm/unittests/Frontend OpenMPIRBuilderTest.cpp, llvm/unittests/Target/AMDGPU AMDGPUUnitTests.cpp DwarfRegMappings.cpp

AMDGPU: Use subarch triples in more unit tests (#210011)

Avoid looking up the target by the cpu name with the legacy
amdgcn name.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+38-32llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
+8-6llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
+2-3llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
+2-2llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+2-1llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.h
+1-1llvm/unittests/Target/AMDGPU/CSETest.cpp
+53-455 files not shown
+58-5011 files

LLVM/project 4a578bellvm/lib/Target/PowerPC PPCTargetTransformInfo.cpp

PPC: Avoid constructing TargetTransformInfo in isHardwareLoopProfitable (#209972)

PPCTTIImpl::isHardwareLoopProfitable constructed a throwaway
TargetTransformInfo only to call CodeMetrics::analyzeBasicBlock. TTI
may contain pipeline configuration state, and should only be queried
from the PassManager. It was also particularly ugly to construct one
here given that we're inside a TTIImpl.

Most of what analyzeBasicBlock computes was not used here. Directly
sum the instruction code size costs, which was the only used component
of the analysis.

Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
DeltaFile
+10-8llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+10-81 files

LLVM/project 0d37efallvm/lib/Target/SPIRV SPIRVPrepareFunctions.cpp

SPIRV: Fix constructing temporary TTI in SPIRVPrepareFunctions (#209977)

Passes should obtain TargetTransformInfo from the analysis manager
and never construct one. It may contain pipeline configuration state
(e.g., TargetLibraryInfo).

Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
DeltaFile
+29-6llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
+29-61 files

LLVM/project ab5e015llvm/include/llvm/ADT GenericCycleInfo.h GenericUniformityImpl.h, llvm/lib/CodeGen MachineSink.cpp

[CycleInfo] Move cycle accessors to GenericCycleInfo. NFC (#209990)

Move member functions off GenericCycle onto GenericCycleInfo.
GenericCycle now holds only data and the child-iterator type, and all
cycle queries go through GenericCycleInfo. This prepares replacing the
GenericCycle pointer with an opaque handle.

Aided by Claude Opus 4.8
DeltaFile
+35-69llvm/include/llvm/ADT/GenericCycleInfo.h
+43-40llvm/include/llvm/ADT/GenericUniformityImpl.h
+29-29llvm/include/llvm/ADT/GenericCycleImpl.h
+8-8llvm/lib/Transforms/Utils/FixIrreducible.cpp
+6-5llvm/lib/CodeGen/MachineSink.cpp
+4-3llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
+125-1545 files not shown
+134-16311 files

LLVM/project 3736a7blldb/docs dil-expr-lang.ebnf, lldb/source/ValueObject DILEval.cpp

[lldb] Add `nullptr` literal to DIL (#208831)

DIL will first attempt resolving `nullptr` as a variable, and if there
is none, `nullptr` will be resolved as a null pointer.
DeltaFile
+24-0lldb/test/API/commands/frame/var-dil/expr/NullptrVar/TestFrameVarDILNullptrVar.py
+15-0lldb/source/ValueObject/DILEval.cpp
+8-1lldb/test/API/commands/frame/var-dil/expr/Literals/TestFrameVarDILLiterals.py
+7-0lldb/test/API/commands/frame/var-dil/expr/NullptrVar/main.c
+4-1lldb/docs/dil-expr-lang.ebnf
+4-0lldb/test/API/commands/frame/var-dil/expr/NullptrVar/Makefile
+62-21 files not shown
+65-37 files

LLVM/project be1728cclang/include/clang/CIR/Dialect/IR CIRStdOps.td CIRAttrs.td, clang/lib/CIR/Dialect/Transforms IdiomRecognizer.cpp

[CIR] Add support for the IdiomRecognizer pass (#208854)

This patch adds the `IdiomRecognizer` pass, which raises calls to known
standard library functions into dedicated operations that later passes
can optimize. The implementation follows the ClangIR incubator, and
upstream had only the pass skeleton and the frontend wiring.

The pass recognizes the standard find algorithm and raises it to the new
operation `cir.std.find`. A call is raised when its callee carries the
matching identity tag, the argument count and the types line up, the
callee is not variadic, and the call is not `musttail`. LoweringPrepare
lowers the operation back to the original call with its attributes, so
behavior never changes when no transform fires.

The tag is the new `func_identity` form under the `func_info` union on
`cir.func`. It holds one entry from an enum naming the entities the
recognizer knows, so the tag itself carries no names. `CIRGen` attaches
it by the plain name, the std membership with inline namespaces looked
through, and whether the function is free, so members, static members,

    [5 lines not shown]
DeltaFile
+72-42clang/lib/CIR/Dialect/Transforms/IdiomRecognizer.cpp
+67-0clang/test/CIR/Transforms/idiom-recognizer-guards.cpp
+56-0clang/test/CIR/Transforms/idiom-recognizer.cpp
+53-0clang/include/clang/CIR/Dialect/IR/CIRStdOps.td
+46-1clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+39-0clang/test/CIR/CodeGen/func-identity-attr.cpp
+333-4315 files not shown
+492-5821 files

LLVM/project 1339ccelibc/test/src/mathvec CMakeLists.txt, llvm/test/CodeGen/RISCV short-forward-branch-opt-zibi.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5-bogner

[skip ci]
DeltaFile
+852-327llvm/test/Transforms/LoopIdiom/cyclic-redundancy-check.ll
+761-0llvm/test/Transforms/LoopIdiom/RISCV/cyclic-redundancy-check.ll
+707-0llvm/test/Transforms/LoopIdiom/AArch64/cyclic-redundancy-check.ll
+707-0llvm/test/Transforms/LoopIdiom/X86/cyclic-redundancy-check.ll
+550-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-zibi.ll
+531-0libc/test/src/mathvec/CMakeLists.txt
+4,108-327509 files not shown
+16,746-2,460515 files

LLVM/project 5c6cc0fclang/include/clang/Basic DiagnosticParseKinds.td

move diagnostic to the top
DeltaFile
+3-1clang/include/clang/Basic/DiagnosticParseKinds.td
+3-11 files

LLVM/project 16c6374.github/workflows llvm-abi-tests.yml

workflows/llvm-abi-tests: Fix typo (#209917)

Introduced by 9bd8bbb2b76c55ca83ddb6e0aa8a3a79b65706d4.
DeltaFile
+1-1.github/workflows/llvm-abi-tests.yml
+1-11 files

LLVM/project 694c561llvm/include/llvm/ADT GenericCycleImpl.h GenericCycleInfo.h, llvm/lib/Transforms/Utils FixIrreducible.cpp

[CycleInfo] Store cycles in a flat preorder array. NFC (#209981)

Store cycles by value in one array in cycle-forest preorder, each cycle
immediately followed by its descendants, instead of heap-allocating each
cycle and holding its children in a std::vector<std::unique_ptr<>>.
Child and top-level iteration become pointer arithmetic that skips a
subtree via a new NumDescendants count, and sizeof(GenericCycle) drops
from 72 to 48. GenericCycleInfoCompute builds the forest with temporary
nodes, then flatten() moves it into the array.

GenericCycle still exposes raw pointers into this array. The eventual
goal is to replace them with an opaque handle, so all access goes
through GenericCycleInfo and the storage stays an implementation detail.

Aided by Fable 5
DeltaFile
+98-111llvm/include/llvm/ADT/GenericCycleImpl.h
+52-71llvm/include/llvm/ADT/GenericCycleInfo.h
+2-9llvm/lib/Transforms/Utils/FixIrreducible.cpp
+152-1913 files

LLVM/project d76f524lldb/tools/lldb-server lldb-gdbserver.cpp

[lldb][Windows] Don't let the inferior inherit the --pipe handle (#207024)

`lldb-server` writes its listening socket id to the `--pipe` handle and
then closes it. The parent process that spawned it reads the pipe until
EOF purely as a synchronization point (`"the server is now listening"`).

On Windows the inferior is launched with `bInheritHandles=TRUE` (it
needs the ConPTY handles), so it also inherited the pipe's write end.
That kept the write end open after `lldb-server` closed its own handle,
so the parent never saw EOF: it blocked until its read timeout and the
client's connection handshake timed out first.

This patch clears `HANDLE_FLAG_INHERIT` on the `--pipe` handle so the
inferior cannot keep the write end open, while leaving it valid for
lldb-server's own use.

rdar://180736036
DeltaFile
+13-1lldb/tools/lldb-server/lldb-gdbserver.cpp
+13-11 files

LLVM/project 71956dcllvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG/AMDGPU convergent-jump-threading.ll

[SimplifyCFG] Do not thread branches into uncontrolled convergent regions

SimplifyCFG's foldCondBranchOnValueKnownInPredecessor can thread an edge past
a block that acts as a reconvergence point. If the threaded destination reaches
an uncontrolled convergent operation before returning to the threaded-through
block, the transform can change which dynamic instance of the convergent
operation is executed.

Add a conservative destination scan for this fold and skip the threading
candidate when it can reach an uncontrolled convergent call before returning
to the original block. Controlled convergent operations using convergence
control tokens are left alone.

Fixes ROCM-26496.
DeltaFile
+68-6llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+53-4llvm/test/Transforms/SimplifyCFG/AMDGPU/convergent-jump-threading.ll
+121-102 files

LLVM/project c78de0bllvm/test/Transforms/SimplifyCFG/AMDGPU convergent-jump-threading.ll

[NFC] Pre-commit a test case for a SimplifyCFG issue
DeltaFile
+94-0llvm/test/Transforms/SimplifyCFG/AMDGPU/convergent-jump-threading.ll
+94-01 files

LLVM/project 66ec277llvm/lib/Target/RISCV RISCVRegisterInfo.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.8-beta.1-arichardson
DeltaFile
+6-6llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+6-61 files

LLVM/project c728067clang/lib/AST ExprConstant.cpp, clang/lib/Sema SemaExprCXX.cpp

Fix references to complete types in attribute references (#209537)

This is a regression from #197215.

Attributes are not REALLY in the body of a function (though the name of
said function is... awkwardly inaccurate at best), but still need to pay
attention to the completeness of their references. As a result, we
weren't marking the expression as invalid, but were also trying to
evaluate it.

This patch fixes this in 2 ways. First, we re-add the
CXXThisTypeOverride check, but except constant substitution, since that
has some additional 'this' behavior from #197215. x

Secondly, we also make the constant evaluator give up on incomplete
types when handling an L value member. This stops us from trying to
evaluate the value if it is incomplete during template instantiation,
when the type is incomplete. We don't diagnose, since it is still
potentially a constant expression, but isn't currently one.

    [3 lines not shown]
DeltaFile
+39-0clang/test/SemaCXX/enable_if.cpp
+11-2clang/lib/AST/ExprConstant.cpp
+8-0clang/lib/Sema/SemaExprCXX.cpp
+58-23 files

LLVM/project 88c69e5llvm/lib/Object GOFFObjectFile.cpp

[Object][GOFF] Recognize RLD and LEN records (#207118)

This patch adds explicit cases for RT_RLD and RT_LEN records when
parsing GOFF objects. These record types are not handled yet, but
recognizing them allows us to diagnose them and avoids teating them as
unexpected records.

(cherry picked from commit c40401dd8d28e88519433531c041b0b7e5ada8a9)
DeltaFile
+10-1llvm/lib/Object/GOFFObjectFile.cpp
+10-11 files

LLVM/project 23780dfpolly/lib/CodeGen IslNodeBuilder.cpp BlockGenerators.cpp, polly/test/CodeGen issue205732.ll

[Polly] Fix codegen assertions to account for DefinedBehaviorContext (#209188)

DeLICM may produce new read access relations whose domain is restricted
to the DefinedBehaviorContext (e.g., only valid when a parameter ensures
no UB). The validation in setNewAccessRelation already accounts for
this, but the debug assertions in createNewAccesses and
generateScalarLoads did not, causing false assertion failures during
code generation.

Intersect the checked domains with getBestKnownDefinedBehaviorContext()
to match the contract that DeLICM relies on.

Fixes #205732

(cherry picked from commit ea612545644d1e3f238ac4cd053758f569f9bf3b)
DeltaFile
+40-0polly/test/CodeGen/issue205732.ll
+10-2polly/lib/CodeGen/IslNodeBuilder.cpp
+5-0polly/lib/CodeGen/BlockGenerators.cpp
+55-23 files

LLVM/project a2520c9polly/include/polly/CodeGen LoopGenerators.h, polly/lib/CodeGen IslNodeBuilder.cpp LoopGenerators.cpp

[Polly] Skip vectorize.enable for FP loops with dist=1 dependences (#205756)

When -polly-annotate-metadata-vectorize is active, Polly marks its
generated loops with llvm.loop.vectorize.enable=true. This is harmful
for loops with a loop-carried dependence of distance 1 that involve
floating-point operations: the Loop Vectorizer reorders FP operations
(e.g. scalar reduction like q = factor*q), producing results that differ
from the sequential scalar reference and causing correctness failures.

Two changes are made:

1. IslAst.cpp: add PollyVectorizeMetadata to the PerformParallelTest
gate so that dependence-distance computation is performed whenever
-polly-annotate-metadata-vectorize is passed, not only when
-polly-parallel or a vectorizer is active.

2. IslNodeBuilder.cpp / LoopGenerators.cpp: when a loop has a dist=1
dependence involving FP operations, omit the vectorize.enable annotation
entirely. This lets the Loop Vectorizer apply its own cost model and

    [3 lines not shown]
DeltaFile
+56-0polly/test/CodeGen/Metadata/skip_vec_annotate_fp_dist1.ll
+45-2polly/lib/CodeGen/IslNodeBuilder.cpp
+6-6polly/lib/CodeGen/LoopGenerators.cpp
+5-1polly/include/polly/CodeGen/LoopGenerators.h
+4-1polly/lib/CodeGen/IslAst.cpp
+2-2polly/test/CodeGen/Metadata/basic_vec_annotate.ll
+118-126 files

LLVM/project 53dae32libsycl/include/sycl/__impl queue.hpp

[libsycl] fix nd_range template resolution (#210081)

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+4-3libsycl/include/sycl/__impl/queue.hpp
+4-31 files

LLVM/project 8568b08llvm/lib/Target/AMDGPU AMDGPURegBankCombiner.cpp, llvm/test/CodeGen/AMDGPU global-saddr-load.ll

AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load
DeltaFile
+14-1llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+2-2llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
+16-32 files

LLVM/project 1a46ea2llvm/test/CodeGen/AMDGPU llvm.log10.ll llvm.log.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fpow.ll

AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper

Here we also had to change comparisons to extended LLTs to avoid
matching bfloats. In the old scalar version, before the switch to extended
LLTs, s16 was treated as f16 and bf16 was combined as if it were f16.
DeltaFile
+3,598-1,588llvm/test/CodeGen/AMDGPU/llvm.log10.ll
+3,598-1,588llvm/test/CodeGen/AMDGPU/llvm.log.ll
+2,760-1,251llvm/test/CodeGen/AMDGPU/llvm.log2.ll
+912-86llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
+536-218llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
+290-131llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
+11,694-4,8624 files not shown
+12,158-5,07110 files

LLVM/project d44f464llvm/lib/Target/AMDGPU AMDGPUPreLegalizerCombiner.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel combine-short-clamp.ll

AMDGPU/GlobalISel: Use integers for clamp i64 to i16 prelegalizer combine
DeltaFile
+26-46llvm/test/CodeGen/AMDGPU/GlobalISel/combine-short-clamp.ll
+6-6llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
+32-522 files

LLVM/project 6fb39c6llvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/test/CodeGen/AMDGPU codegen-prepare-addrspacecast-non-null.ll

GlobalISel: Use extended LLTs in extract lowering
DeltaFile
+60-29llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
+12-12llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/global-value.ll
+2-2llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir
+1-1llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+79-485 files

LLVM/project 5b85ddcllvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/test/CodeGen/AMDGPU fptrunc.f16.ll fptrunc.ll

GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering
DeltaFile
+1,282-1,453llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
+264-432llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.ll
+364-243llvm/test/CodeGen/AMDGPU/fptrunc.ll
+238-239llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptrunc.mir
+176-91llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
+47-47llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+2,371-2,5056 files

LLVM/project a5b7090llvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp SIISelLowering.cpp

[AMDGPU] Guard more intrinsics with target features (#203956)
DeltaFile
+1-51llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+0-42llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+16-17llvm/lib/Target/AMDGPU/AMDGPU.td
+17-14llvm/test/CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll
+0-24llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+15-2llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+49-15024 files not shown
+109-20230 files