[llvm] Show triple in no targets error message (#236053)
Was:
"Unable to find target for this triple (no targets are registered)"
I need to enable some target in my build.
Print the triple being asked for so I can
figure out which one.
Recommit "[libc] Remove full header dependencies from proxy header targets" (#235752)
Reverts llvm/llvm-project#234668, reapplying #234150. The intermittent
gcc build error has been fixed by #234150.
The original commit message was:
In full-build mode, the proxy headers in libc/hdr/types/ only include
the granular type headers (include/llvm-libc-types/*.h), not the top-
level public headers (which are only included in overlay mode). Having
FULL_BUILD_DEPENDS point at libc.include was unnecessary and forced full
header generation before building internal targets that only needed a
single type.
Similarly, the function proxy headers in libc/hdr/func/ only include
include/__llvm-libc-common.h in full-build mode, so I've replaced their
dependency on libc.include.stdlib with libc.include.llvm_libc_common_h.
Removing these uncovered a few missing or broken dependencies that were
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[CIR][CUDA] Attach kernel names only to stub definitions (#234911)
CIR currently attaches `cu.kernel_name` to kernel declarations and
launch-site calls, although the attribute describes the device-side name
associated with a host stub definition.
Move `cu.kernel_name` creation to `emitDeviceStub`. This enforces the
attribute's documented placement and matches conventional CodeGen's
emitted-kernel tracking. The definition checks added by #231390 remain
as defensive guards.
Update the CUDA and HIP coverage to verify that the attribute appears on
emitted stub definitions, not declarations or calls.
Reapply "[InstCombine] Merge consecutive assumes", round 3 (#225380)
This patch was reverted due to triggering another bug. That bug should
be fixed now, so this should be ready to land again.
Original commit message:
This should make assumes a bit more efficient, since it removes a few
instructions. This should also help with optimizations that are limited
in how many instructions they step through.
This reverts commit 630125ac5be7dab26fcfba8918ee091588616f21.
[IR][GC] Remove leftover typed pointer handling for gc.relocate (#235783)
There is various handling for pointer bitcasts of the result, which can
be dropped now that we have opaque pointers and the verifier ensures
that the return type of gc.relocate returns the same type as the derived
pointer. The verifier is adjusted to check that explicitly -- the
previous check incorrectly allowed the types to differ in element count.
LLM generated patch.
[Clang][ABI][X86] Don't extend _BitInt returns to 64-bits (#234872)
For X86, _BitInt(N) with N <= 32 is passed iN, while for 32 < N <= 64
it's passed as i64. I don't think there is any good reason for this
difference in behavior, and we should always use iN.
Nominally, this does not change the ABI. The previous Direct pass as i64
implied that the high bits are unspecified. In practice, the callee
zero-extended the value (independent of _BitInt signedness), but the
caller did not rely on that zero-extension. With CIR it was zero or sign
extended, depending on signedness. Both are ultimately correct (because
the high bits are unspecified).
This still leaves behind a peculiarity for 64 < N < 128, which gets
returned as `{ i64, i64 }`, until we reach N=128, when it switches to
`i128`. I believe all of those should also use iN, but I'll leave that
for a separate change. I'm also not changing argument passing here.
Followup to https://github.com/llvm/llvm-project/pull/232729.
[mlir][NFC] Fix some different sign comparison warnings (#234999)
I saw these doing a build on Arm 32-bit, but I don't think they're
specific to it.
* OperationSupport.h: std::distance returns a signed type but
kSmallAttributeList is unsigned. I assume first is always before last,
so it's safe to cast std::distance to size_t.
* In MemRefOps.cpp: srcStaticCount is created using llvm::count_if, but
the type is changed. Then later compared to another llvm::count_if.
Fixed that by using auto to keep the same type.
* ModuleTranslation.cpp: numArguments is unsigned, and by using
llvm::range_size we get a size_t we can compare to.
[AMDGPU] Update check lines with extra text at the start or end. NFC. (#236029)
This comes from re-autogenerating the checks, but only committing a
specific kind of change where the check line gets extra text at the
start or end. These are cases where the existing check line only worked
because it did not have {{^}} or {{$}} anchors.
[mlir][tosa] Move ResizeOp shape checks from verifier to tosa-validate (#234101)
Part of #233457.
`ResizeOp::verify()` reads `scale`/`offset`/`border` from their
`tosa.const_shape` producers and checks their values. That is not local
to the
operation, so these `ERROR_IF` conditions move to `tosa-validate`.
Changes:
- `ResizeOp::verify()`: drop the constant-value checks (non-positive
scale,
output size divisibility / calculated size); keep only the local check
that
block-scaled input requires `NEAREST_NEIGHBOR` mode.
- `checkErrorIfResize()`: add the missing `scale > 0` check.
- `levelCheckResize()` and `ResizeOp::inferReturnTypeComponents()`: bail
out on
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[ARM] Don't map ISD::STRICT_FRINT to vector VRINTX (#234644)
The VRINTX instruction on a scalar float respects the rounding mode in
FPSCR, but on a vector of floats, it rounds to nearest always. That
makes it the wrong choice for ISD::STRICT_FRINT, which must use the
dynamic rounding mode. It's only acceptable for ISD::FRINT.
This applies to both MVE and NEON. (The latter only for Armv8 and above:
Armv7 NEON doesn't have that instruction in the first place).
[OpenMP][offload] Trade threads for blocks in Generic-SPMD kernels (#234191)
For Generic-SPMD mode, the trip count refers to the outer distribute
loop, the per-iteration cost is unknown. So, prefer more blocks and less
threads for this exec mode. This prevents large blocks with only few
active threads.
This is an upstream port of the corresponding downstream.
Claude assisted with this patch.
[CODEOWNERS] Drop all notifications (#236030)
The author would like to drop all CODEOWNERS notifications added in
c4e40dc23 ([CODEOWNERS] Request notifications, #227742) as they have
realized a sharp downside: it is impossible to distinguish cases where
their review was explicitly requested.
See also: #228086.
[InstCombine] Remove redundant separate_storage assumes (#233736)
When it can already be proven that two pointers don't alias without the
`separate_storage` assume there is no point in keeping
`separate_storage` assumptions around.
[AMDGPU] Restore gfx90a predicate on V_MUL_LEGACY_F32_e64_gfx90a. NFCI. (#232035)
#116288 removed both the AssemblerPredicate and SubtargetPredicate of
isGFX90APlus that applied to V_MUL_LEGACY_F32_e64_gfx90a, leaving it
with no predicates at all. Since it has a different encoding from the
GFX6-GFX10 versions of v_mul_legacy_f32_e64, this meant that the asm
matcher could have selected the wrong encoding on those targets. It
only selected the right one because V_MUL_LEGACY_F32_e64_gfx90a is
defined last.
Restore an AssemblerPredicate of isGFX90APlus on just this instruction,
and fix the stale closing comment on the let block that used to set it
for all of the gfx90a multiclasses.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
use getDeviceBlockLimit instead of OMP_NUM_TEAMS
Trade threads for blocks only while the doubled number of blocks stays within
the device's block limit, which OMP_NUM_TEAMS may lower, instead of not trading
at all if OMP_NUM_TEAMS is set. This keeps every trade a pure one and leaves
getDeviceBlockLimit as it was.
Claude assisted with this patch.
[flang][MIF] Adding lowering for EVENT POST/WAIT statements (#210283)
Add lowering of EVENT POST and EVENT WAIT statements to the MIF dialect
(mif.event_post / mif.event_wait), and lowering of coarray references in
hlfir.designate.
- The event variable is passed to PRIF together with the byte offset of
the event inside its coarray, computed in MIFOpConversion
- The default initialization of event_type coarrays after
prif_allocate_coarray.
- Add lowering tests for EVENT POST / WAIT.
Nonallocatable coarrays are allocated by PRIF, so their storage is on
the heap. This
patch lowers them like allocatable variables:
- `ConvertTyp`e: the type of a coarray is now a !fir.box<!fir.heap<...>,
corank:N> so every descriptor for coarrays carries
CFI_attribute_allocatable.
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