LLVM/project 6b3f5c7llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU uaddsat.ll

[AMDGPU] Lower uniform uaddsat.i16 to SALU instructions

Promote uniform i16 uadd.sat to i32 in promoteUniformOpToI32 so it
lowers to SALU (s_add_i32 + s_min_u32) instead of VALU + readfirstlane.
The saturating add on zero-extended operands reduces to
umin(add(lhs, rhs), 0xffff).

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+64-60llvm/test/CodeGen/AMDGPU/uaddsat.ll
+10-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+75-623 files

LLVM/project c63286cllvm/test/CodeGen/AMDGPU uaddsat.ll

[AMDGPU] Add tests for uniform uaddsat.i16 (NFC)

Precommit tests covering uniform (SALU) uadd.sat for i16 and vector
i16 (v2i16, v3i16, v4i16) using the amdgpu_ps calling convention so
results are returned in SGPRs. These currently lower to VALU
(v_add_u16 clamp / v_pk_add_u16 clamp + v_readfirstlane).

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+239-0llvm/test/CodeGen/AMDGPU/uaddsat.ll
+239-01 files

LLVM/project ff6d537llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV fp128.ll

[RISCV] Pick correct lround libcall for fp128 (#213220)

**LROUND** with an i32 result on rv64 chose the libcall as `f64 ?
LROUND_F64 : LROUND_F32`, so **fp128** fell through to the f32 libcall
(lroundf) and lost precision. Use `RTLIB::getLROUND`, which maps
**fp128** to lroundl.
DeltaFile
+127-0llvm/test/CodeGen/RISCV/fp128.ll
+2-2llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+129-22 files

LLVM/project 8f82ba2clang/include/clang/Basic TargetID.h, clang/lib/Basic TargetID.cpp

Revert "clang: Use TargetID parsing from AMDGPUTargetParser" (#213824)

Reverts llvm/llvm-project#209845

verified by local reverting

unblock bots: 
https://lab.llvm.org/buildbot/#/builders/234/builds/1391
https://lab.llvm.org/buildbot/#/builders/10/builds/33193
DeltaFile
+165-29clang/lib/Basic/TargetID.cpp
+47-45clang/lib/Driver/ToolChains/AMDGPU.cpp
+42-39clang/lib/Driver/OffloadBundler.cpp
+34-10clang/include/clang/Basic/TargetID.h
+18-25clang/lib/Basic/Targets/AMDGPU.cpp
+14-18clang/lib/Basic/Targets/AMDGPU.h
+320-1667 files not shown
+356-22413 files

LLVM/project eb50d87llvm/utils/lit/lit ShellEnvironment.py TestRunner.py, llvm/utils/lit/lit/builtin_commands diff.py

[lit] Run builtin cat / diff in-process instead of spawning (#208024)

cat and diff are the only two builtins that still spawn a subprocess:
every cat/diff on a RUN line spawns a fresh Python interpreter, which
dominates wall time given how small lit's typical inputs are. Run them
in-process instead.

The spawned-script path stays as a fallback for now. Removing it
entirely is a follow-up PR. Output is byte-identical to the spawn path
either way.
DeltaFile
+323-3llvm/utils/lit/lit/TestRunner.py
+65-0llvm/utils/lit/lit/ShellEnvironment.py
+4-14llvm/utils/lit/lit/builtin_commands/diff.py
+392-173 files

LLVM/project 04a123bclang/lib/CodeGen CGOpenMPRuntime.cpp, clang/test/OpenMP declare_mapper_codegen.cpp target_map_nested_ptr_member_mapper_codegen.cpp

[OpenMP][Clang] Enable `ATTACH`-style maps for mappers. (#210213)

This is a follow-up to #153683 to support OpenMP compliant
pointer-attachment
in `declare_mappers` via `ATTACH`-style maps.

In addition to enabling attach-style maps, we also need to propagate
information about
which map entries are for "pointee" data, i.e. have an "attach-ptr", and
thus occupy a different storage block than the base variable for which
the mapper is being generated. e.g.

```c

S sa[10];
#pragma omp declare_mapper (default: S s) map (s.x, s.p[0:10])

#pragma omp target_enter_data map(sa)
```

    [18 lines not shown]
DeltaFile
+196-160clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+68-60clang/test/OpenMP/declare_mapper_codegen.cpp
+68-15llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+65-5clang/lib/CodeGen/CGOpenMPRuntime.cpp
+18-24offload/test/mapping/mapper_enter_data_always_present_ptee.c
+18-22offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
+433-28611 files not shown
+525-36117 files

LLVM/project 0dde5f2offload/test/mapping mapper_target_update_present_ptee.c mapper_map_mbr_then_present_mbr_ptee.c

[OpenMP][NFC] Drop `omptarget` prefix from CHECK lines in mapper present tests

Upstream 58f386207ac8 ("[offload] Remove `omptarget` references from
tests") made offload test CHECK lines generic so libomptarget components
can be moved/renamed -- some debug prints will come from `ompaccsupport`
rather than `omptarget`.

The two tests updated here re-add CHECK lines to files whose other
`omptarget`-prefixed lines that commit had already rewritten, so they
merged cleanly while reintroducing the old prefix. Match the convention
used by every other offload test. The address/size captures are
unchanged; only the component prefix is dropped.
DeltaFile
+2-2offload/test/mapping/mapper_target_update_present_ptee.c
+2-2offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
+4-42 files

LLVM/project 38146e8flang/lib/Optimizer/Transforms/CUDA CUFAddConstructor.cpp, flang/test/Fir/CUDA cuda-constructor-2.f90

[flang][cuda] Only register module variables defined in the current translation unit (#213720)

CUFAddConstructor registered every CUF module variable mirrored in the
GPU module, including variables brought in with USE from another
translation unit. Without relocatable device code each translation unit
has its own device module, so registering a declaration binds the host
address to a module that does not contain the symbol, and a later
cudaGetSymbolAddress fails with cudaErrorInvalidSymbol or
cudaErrorSymbolNotFound. Under unified memory the same declaration is
registered as host memory, overriding the defining unit's device
registration.

Skip globals that have no initializer and no body. Non-allocatable
managed globals still register, since they go through a companion
pointer local to the translation unit.
DeltaFile
+40-0flang/test/Fir/CUDA/cuda-constructor-2.f90
+18-0flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
+58-02 files

LLVM/project 275c9efllvm/tools/llvm-gpu-loader llvm-gpu-loader.cpp

[Offload] Add `--kernel <name>` command to `llvm-gpu-loader` (#213738)

Summary:
This makes it easier to test a single function without opting-in to the
whole `crt1.o` infra for `libc` that was originally intended to test
existing CPU tests. Good for possible future unit tests, cheap tool that
can launch a kernel. Only provides `foo(void)` kernels for now, can be
improved.
DeltaFile
+22-9llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
+22-91 files

LLVM/project 1d3ea0fllvm/include/llvm/ADT Hashing.h

[ADT] Fix - gcc warning: buf may be used uninitialized [-Werror=maybe-uninitialized] (#213578)

When compiled with `gcc`, the uninitialized `buf` triggers a warning.
Since some external projects (e.g., `TPP-MLIR`) treat warnings as
errors, the build fails. This patch initializes `buf` to eliminate the
warning and prevent those build failures
DeltaFile
+1-1llvm/include/llvm/ADT/Hashing.h
+1-11 files

LLVM/project 3cdc913llvm/utils/gn/secondary/lldb/source/Utility BUILD.gn

[gn build] Port f84bacf82a15 (#213804)
DeltaFile
+1-0llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
+1-01 files

LLVM/project d667528llvm/utils/gn/secondary/llvm/lib/Transforms/Utils BUILD.gn

[gn build] Port 2354dce21ab1 (#213803)
DeltaFile
+2-0llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
+2-01 files

LLVM/project f67bc3bllvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG/AMDGPU convergent-jump-threading.ll

[SimplifyCFG] Do not thread branches into uncontrolled convergent regions

SimplifyCFG's foldCondBranchOnValueKnownInPredecessor can thread an edge past
a block that acts as a reconvergence point. If the threaded destination reaches
an uncontrolled convergent operation before returning to the threaded-through
block, the transform can change which dynamic instance of the convergent
operation is executed.

Add a conservative destination scan for this fold and skip the threading
candidate when it can reach an uncontrolled convergent call before returning
to the original block. Controlled convergent operations using convergence
control tokens are left alone.

Fixes ROCM-26496.
DeltaFile
+78-6llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+52-3llvm/test/Transforms/SimplifyCFG/AMDGPU/convergent-jump-threading.ll
+130-92 files

LLVM/project cd0c60ellvm/test/Transforms/SimplifyCFG/AMDGPU convergent-jump-threading.ll

[NFC] Pre-commit a test case for a SimplifyCFG issue
DeltaFile
+94-0llvm/test/Transforms/SimplifyCFG/AMDGPU/convergent-jump-threading.ll
+94-01 files

LLVM/project b010a18mlir/docs/Rationale SideEffectsAndSpeculation.md, mlir/include/mlir/Interfaces SideEffectInterfaceBase.td

[mlir][ODS] Allow parameters on side-effect resources (#213792)

Assisted-by: OpenAI Codex

---------

Co-authored-by: jeffniu-openai <jeffniu at openai.com>
DeltaFile
+13-9mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+15-0mlir/test/mlir-tblgen/op-side-effects.td
+7-1mlir/include/mlir/Interfaces/SideEffectInterfaceBase.td
+7-0mlir/test/lib/Dialect/Test/TestOps.td
+6-0mlir/test/IR/test-side-effects.mlir
+4-0mlir/docs/Rationale/SideEffectsAndSpeculation.md
+52-103 files not shown
+61-109 files

LLVM/project a7e25e4llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmax.ll buffer-fat-pointer-atomicrmw-fadd.ll

Merge commit '2a302f87f0f1' into add-data-motion-map-type-bit
DeltaFile
+3,809-3,814llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,809-3,814llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,465-3,511llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,465-3,511llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,299-3,240llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,594-2,524llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+20,441-20,4141,228 files not shown
+116,705-76,0231,234 files

LLVM/project f7b7ec8llvm/docs AlignedBundling.rst, llvm/lib/MC MCELFStreamer.cpp MCAssembler.cpp

[MC][X86] Reintroduce aligned instruction bundling (#175830)

Aligned bundling partitions instructions into fixed-size, naturally
aligned groups called bundles and guarantees that no instruction
crosses a bundle boundary, giving the instruction stream a single
canonical decoding. It is a building block for software-based fault
isolation: control flow cannot jump into the middle of an instruction
to manufacture a different, unchecked sequence, and when combined with
masking of indirect branch targets it constrains control flow to a
statically verifiable set of locations.

The previous target-independent implementation was removed in #148781,
which simplified MC by eliminating per-fragment BundlePadding, the
virtual emitInstToData, and BundleGroupBeforeFirstInst. This change
reimplements the feature in the X86 backend on top of the existing
MCBoundaryAlignFragment infrastructure added for branch alignment,
keeping the generic MC surface smaller:

* AsmParser parses .bundle_align_mode, .bundle_lock and .bundle_unlock

    [36 lines not shown]
DeltaFile
+208-22llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+165-0llvm/test/MC/X86/AlignedBundling/prefix-padding.s
+151-0llvm/test/MC/X86/AlignedBundling/bundle-errors.s
+106-0llvm/docs/AlignedBundling.rst
+63-31llvm/lib/MC/MCAssembler.cpp
+92-0llvm/lib/MC/MCELFStreamer.cpp
+785-5321 files not shown
+1,418-6027 files

LLVM/project c25617cmlir/docs/Rationale SideEffectsAndSpeculation.md, mlir/include/mlir/Interfaces SideEffectInterfaceBase.td

[mlir][ODS] Simplify effect-parameter documentation and tests

Assisted-by: OpenAI Codex
DeltaFile
+5-26mlir/test/mlir-tblgen/op-side-effects.td
+3-16mlir/docs/Rationale/SideEffectsAndSpeculation.md
+2-2mlir/include/mlir/Interfaces/SideEffectInterfaceBase.td
+1-1mlir/include/mlir/TableGen/SideEffects.h
+11-454 files

LLVM/project 2a302f8llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmax.ll buffer-fat-pointer-atomicrmw-fadd.ll

Merge remote-tracking branch 'upstream/main' into propagate-map-type-modifiers-to-mappers

# Conflicts:
#       offload/test/mapping/mapper_map_mbr_ptee_then_present_mbr_ptee.c
#       offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
#       offload/test/mapping/mapper_map_present_ptee.c
DeltaFile
+3,809-3,814llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,809-3,814llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,465-3,511llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,465-3,511llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,299-3,240llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,594-2,524llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+20,441-20,4141,228 files not shown
+116,705-76,0231,234 files

LLVM/project a805dd6llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[Flang][OpenMP][OpenMPIRBuilder] Implement module scope declare target use rewrite mechanism (#212920)

During lowering of declare target'd variables we generate new global
variables for device that replace the use of the pre-existing global
variable. In Flang we currently rewrite this for each target region, but
that's not enough to cover indirect use cases inside of declare target
functions which can be imported into the module and utilised inside of a
target region. This PR tries to extend the scope of the rewriting to the
module than a per target region rewrite.

It does so by creating a mechanism where we can register globals for
replacement which will trigger on finalization of the OMPIRBuilder. This
is required as due to the ordering of lowering for MLIR, where we
generate the replacement global at the beginning of the module before
any uses have been generated, effectively meaning we cannot replace the
uses at that point. So, we defer the replacement to the OMPIRBuilder as
there is no deferral mechanism directly in the OpenMP MLIR lowering.

The alternative might be to rebind the global maps in ModuleTranslation

    [7 lines not shown]
DeltaFile
+270-0mlir/test/Target/LLVMIR/omptarget-declare-target-module-rewrite-device.mlir
+103-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+14-74mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+37-0llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+36-0llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+460-745 files

LLVM/project 7a0afd3clang/lib/CIR/Dialect/IR CIRTypes.cpp, clang/test/CIR/CodeGen empty-union.cpp

[CIR] Fix record layout for a union with no storage type (#213591)

A union whose CIR type ends up with no members keeps its whole size in
its
padding field, and `UnionType::getTypeSizeInBits` returned early in
exactly that
case, before reaching the padding. A union need not look empty in the
source to
land there: a lone zero-length bitfield is dropped during lowering,
leaving the
same no-storage state.

A record embedding such a union was then laid out wrong. In an unpacked
record
`insertPadding` pads whenever the end of the members placed so far,
rounded up
to the next member's alignment, falls short of that member's offset, so
a union
measuring zero earns a pad the AST layout does not have.  In C++,

    [22 lines not shown]
DeltaFile
+151-19clang/test/CIR/CodeGen/empty-union.cpp
+6-9clang/lib/CIR/Dialect/IR/CIRTypes.cpp
+157-282 files

LLVM/project 1f22cc1llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-setcc-select.ll

[DAGCombine] Fold (select_cc (select cond, x, y), x, a, b, eq) to (select cond, a, b) (#199688)

(select_cc (select cond, x, y), x, a, b, eq) which could be simplified
to (select cond, a, b)
DeltaFile
+78-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+11-15llvm/test/CodeGen/X86/zext-sext.ll
+4-4llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
+93-193 files

LLVM/project e91d4c7llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPCompatibilityAnalysis.cpp SLPCompatibilityAnalysis.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+62-73llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-fadd.ll
+65-44llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+22-13llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
+26-6llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
+175-1364 files

LLVM/project cb8a602clang/lib/CodeGen CodeGenFunction.h CGExpr.cpp, clang/test/CodeGen attr-sized-by-for-pointers.c attr-counted-by-or-null-for-pointers.c

[CodeGen] Fix -fsanitize=array-bounds for __sized_by / _or_null pointers

`EmitCountedByBoundsChecking()` assumed a CountAttributedType is always
a __counted_by pointer. That isn't true, there are four versions of the
attribute:

* `__counted_by`: Already handled correctly.
* `__counted_by_or_null`: Incorectly handled.
* `__sized_by`: Incorreclty handled.
* `__sized_by_or_null`: Incorreclty handled.

In particular:

* __sized_by / __sized_by_or_null: the loaded bound is a byte count, but the
  element index was compared against it directly, so an access was only
  flagged once the index exceeded the byte count -- missing out-of-bounds
  accesses for a pointee larger than one byte. Scale the index to bytes
  ('index * sizeof(element)') before comparing. counted_by counts elements
  and is unchanged; a void (or otherwise zero-sized) pointee uses the GNU

    [13 lines not shown]
DeltaFile
+396-173clang/test/CodeGen/attr-sized-by-or-null-for-pointers.c
+295-98clang/test/CodeGen/attr-counted-by-or-null-for-pointers.c
+291-81clang/test/CodeGen/attr-sized-by-for-pointers.c
+43-9clang/lib/CodeGen/CGExpr.cpp
+2-1clang/lib/CodeGen/CodeGenFunction.h
+1,027-3625 files

LLVM/project 14cb4c0clang/lib/CodeGen CGBuiltin.cpp, clang/test/CodeGen attr-counted-by-for-pointers.c attr-sized-by-for-pointers.c

[CodeGen] Fix __builtin_dynamic_object_size for __sized_by / _or_null pointers

`emitCountedByPointerSize()` assumed a CountAttributedType is always
a __counted_by pointer. That isn't true, there are four versions of the
attribute:

* `__counted_by`: Already handled correctly.
* `__counted_by_or_null`: Incorectly handled.
* `__sized_by`: Incorreclty handled.
* `__sized_by_or_null`: Incorreclty handled.

In particular:

* __sized_by / __sized_by_or_null: the attribute argument is a byte count,
  but the object size was computed as count * sizeof(*ptr), over-reporting by
  the element size for any pointee larger than one byte. Use the count
  directly for the byte-counting variants.

* __counted_by_or_null / __sized_by_or_null: a null pointer describes no

    [20 lines not shown]
DeltaFile
+655-0clang/test/CodeGen/attr-sized-by-or-null-for-pointers.c
+514-0clang/test/CodeGen/attr-counted-by-or-null-for-pointers.c
+401-2clang/test/CodeGen/attr-sized-by-for-pointers.c
+169-5clang/test/CodeGen/attr-counted-by-for-pointers.c
+98-43clang/lib/CodeGen/CGBuiltin.cpp
+1,837-505 files

LLVM/project f24f86cllvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp SIInstructions.td

Set up M0 for VGPR-memory accesses in finalizeLowering instead of a separate pass
DeltaFile
+0-110llvm/lib/Target/AMDGPU/AMDGPUAssignIdxToM0.cpp
+34-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+6-5llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+0-10llvm/lib/Target/AMDGPU/AMDGPU.h
+0-9llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+7-2llvm/lib/Target/AMDGPU/SIInstructions.td
+47-1364 files not shown
+47-14610 files

LLVM/project a56d758clang/include/clang/Basic TargetID.h, clang/lib/Basic TargetID.cpp

clang: Use TargetID parsing from AMDGPUTargetParser (#209845)

We had grown 2 parallel parsing implementations for
triple+gpu name+feature flag target ID strings. Mostly
eliminate the redundant clang version.

Co-authored-by: Claude (Opus 4.8)
DeltaFile
+29-165clang/lib/Basic/TargetID.cpp
+48-50clang/lib/Driver/ToolChains/AMDGPU.cpp
+39-42clang/lib/Driver/OffloadBundler.cpp
+10-34clang/include/clang/Basic/TargetID.h
+25-18clang/lib/Basic/Targets/AMDGPU.cpp
+18-14clang/lib/Basic/Targets/AMDGPU.h
+169-3237 files not shown
+227-35913 files

LLVM/project f306c27clang/test/CodeGen attr-sized-by-for-pointers.c attr-counted-by-for-pointers.c

[CodeGen][NFC] Split __sized_by tests into their own file and rename test cases

In future patches the coverage of the __counted_by family attributes is
going to be increased. To help with this patch refactors the existing
test file.

1. Split `__sized_by` tests into their own file. In later commits files
   will be added for each attribute so it makes sense for each attribute
   to have its own file.
2. Replace `testN` test case names with human readable descriptions. Not
   all test cases that will be added in the future will apply to all
   attributes. If we kept on using the `testN` naming convention it
   would leave odd gaps in the test numbering because we try to keep
   what a test case tests consistent between files (i.e. `testN` would
   roughly test the same thing but with a different attribute). Using
   named test cases completely avoids this.
DeltaFile
+150-287clang/test/CodeGen/attr-counted-by-for-pointers.c
+158-0clang/test/CodeGen/attr-sized-by-for-pointers.c
+308-2872 files

LLVM/project db4690ellvm/test/Transforms/SLPVectorizer/X86 fmuladd-copyable-fadd.ll

[SLP][NFC]Add a test for fadd conversion to fmuladd, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213781
DeltaFile
+479-0llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-fadd.ll
+479-01 files

LLVM/project a5f7de0clang/lib/Driver/ToolChains Clang.cpp, clang/test/Driver openmp-target-fast-flag.c

Revert "[OpenMP] target-fast implies teams/threads oversubscription" (#213769)

Reverts llvm/llvm-project#205775

breaks no-loop-4 no-loop-7 downstream

take a look please
DeltaFile
+7-15clang/test/Driver/openmp-target-fast-flag.c
+2-2clang/lib/Driver/ToolChains/Clang.cpp
+9-172 files