LLVM/project bec9ce9 — mlir/test/Conversion/VectorToSPIRV vector-to-spirv.mlir

[mlir][SPIR-V] Test oversized vector.load/store alignment (#240455)

Follow-up to https://github.com/llvm/llvm-project/pull/214200 post-merge
review
DeltaFile
+16-0mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir
+16-01 files

LLVM/project 6002854 — llvm/lib/Target/AMDGPU SIInstrInfo.h SIShrinkInstructions.cpp, llvm/test/CodeGen/AMDGPU shrink-instructions-fold-imm-subreg.mir

AMDGPU: Fold global address into subregister use with lo/hi relocation (#237041)

Split 64-bit relocations into the 32-bit halves when applying a
subregister extract, similar to how immediates are modified when
folding. The same split is applied when 64-bit mov pseudos are
expanded.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+64-42llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+14-9llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+5-8llvm/test/CodeGen/AMDGPU/shrink-instructions-fold-imm-subreg.mir
+9-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+92-594 files

LLVM/project 8ca72f1 — llvm/lib/Transforms/Utils SimplifyLibCalls.cpp, llvm/test/Transforms/InstCombine wcslen-6.ll wcslen-3.ll

[SimplifyLibCalls] Annotate wcslen pointer argument if folding fails (#240333)

Following `optimizeStrLen`. The call reads at least the terminating wide
character, so the dereferenceable size is the size of wchar_t.

Assisted-by: Claude
DeltaFile
+12-12llvm/test/Transforms/InstCombine/wcslen-1.ll
+7-7llvm/test/Transforms/InstCombine/wcslen-5.ll
+9-4llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+3-3llvm/test/Transforms/InstCombine/wcslen-3.ll
+2-2llvm/test/Transforms/InstCombine/wcslen-6.ll
+33-285 files

LLVM/project 74f6cbe — bolt/lib/Core BinaryFunction.cpp, bolt/test/AArch64 pcrel-patch-ignored-after-disasm.s pcrel-patch-ldr-literal.s

[BOLT][AArch64] Don't patch short-range PC-relative refs in un-emitted code (#221344)

scanExternalRefs() updates references in functions that BOLT does not
emit by creating instruction patches. For a bare PC-relative reference,
such as ADR or LDR (literal), the patch cannot be encoded once the
referenced function is moved: both forms reach only +/-1MB, while the
new code is typically several MB away. JITLink then reports the fixup as
out of range and BOLT fails, e.g.:

BOLT-ERROR: JITLink failed: In graph in-memory object file, section
.local.text.__BP_0: relocation target 0x400014
(<anonymous symbol>:0x400000 + 0x14) is out of range of ADRLiteral21
fixup at address 0x400000 (__BP_0, 0x10230 + 0x0)

There is an existing check for this, but it only runs when the
instruction has a relocation. For a local symbol in the same section the
assembler resolves the reference itself, in which case the reference is
created by the symbolizer from the instruction's immediate and
getRelocationAt() returns nothing.

    [12 lines not shown]
DeltaFile
+126-0bolt/test/AArch64/pcrel-patch-special-symbol.s
+49-26bolt/lib/Core/BinaryFunction.cpp
+74-0bolt/test/AArch64/pcrel-patch-recursive-scan.s
+70-0bolt/test/AArch64/pcrel-patch-skipped-func.s
+63-0bolt/test/AArch64/pcrel-patch-ldr-literal.s
+59-0bolt/test/AArch64/pcrel-patch-ignored-after-disasm.s
+441-265 files not shown
+679-2611 files

LLVM/project d1bf25b — mlir/lib/Dialect/Arith/IR InferIntDivisibilityOpInterfaceImpl.cpp, mlir/test/Analysis/DataFlow integer-divisibility.mlir

[mlir][arith] Fix division by zero in divui divisibility inference (#240106)

DivUIOp::inferResultDivisibility divides by a constant right-hand side
without checking for zero, so a zero divisor raises SIGFPE. Bail out
instead, since arith.divui by zero is undefined and there is nothing to
infer.

Fixes #239604
DeltaFile
+26-0mlir/test/Analysis/DataFlow/integer-divisibility.mlir
+4-0mlir/lib/Dialect/Arith/IR/InferIntDivisibilityOpInterfaceImpl.cpp
+30-02 files

LLVM/project a2ad0f6 — mlir/docs/DefiningDialects Operations.md, mlir/include/mlir/Dialect/LLVMIR LLVMEnums.td

[mlir][ODS] Add DefaultValuedEnumProp (#240360)

Giving an enum property a default currently means subclassing `EnumProp`
and spelling the default as `Enum.cppType # "::Case"`, or wrapping it in
`DefaultValuedProp` with the same hand-written string.
`DefaultValuedEnumProp<Enum, Case>` takes the `EnumInfo` and one of its
`EnumCase` defs, mirroring `DefaultValuedEnumAttr`, and asserts at
TableGen time that the case belongs to the enum. `GEPNoWrapFlagsProp`
and the test dialect's default-valued enum props switch to it.

Assisted-by: Claude Code (Claude Fable 5.1).
DeltaFile
+10-0mlir/include/mlir/IR/EnumAttr.td
+9-0mlir/test/mlir-tblgen/op-format.mlir
+9-0mlir/test/mlir-tblgen/default-valued-enum-prop-error.td
+7-0mlir/test/lib/Dialect/Test/TestOpsSyntax.td
+1-3mlir/include/mlir/Dialect/LLVMIR/LLVMEnums.td
+3-0mlir/docs/DefiningDialects/Operations.md
+39-36 files

LLVM/project 1972210 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 select-scalable-cmp-cond.ll

[SLP]Do not match the scalable compare for the select conditions

The select conditions cannot be all lanes of a scalable vector compare,
which number is unknown.

Fixes #240459

Assisted-by: Cursor

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/240483
DeltaFile
+24-0llvm/test/Transforms/SLPVectorizer/AArch64/select-scalable-cmp-cond.ll
+2-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+26-12 files

LLVM/project 7e9d0ca — lldb/tools/lldb-dap/extension/src index.d.ts debug-session-tracker.ts, lldb/tools/lldb-dap/extension/src/protocol dap.ts

[lldb-dap][ext][NFC] Use one `dap` module for protocol types (#240443)

Have only one module for the DAP types. This prevents creating new
LLDBXXXX classes when extending one of the DAP types.
DeltaFile
+56-0lldb/tools/lldb-dap/extension/src/protocol/dap.ts
+13-22lldb/tools/lldb-dap/extension/src/debug-session-tracker.ts
+11-10lldb/tools/lldb-dap/extension/src/ui/symbols-provider.ts
+0-14lldb/tools/lldb-dap/extension/src/index.d.ts
+6-6lldb/tools/lldb-dap/extension/src/ui/modules-data-provider.ts
+3-6lldb/tools/lldb-dap/extension/src/ui/stack-frames-tracker.ts
+89-583 files not shown
+96-639 files

LLVM/project 0a8663b — llvm/lib/DWARFLinker/Parallel DWARFLinkerCompileUnit.cpp, llvm/test/tools/dsymutil/X86 recloned-unit-str-offsets.s

[DWARFLinker][Determinism] Clear the string offsets map of a unit that is cloned again (#240432)

While trying to optimize the parallel linker, I found that the output
wasn't always deterministic. Tracking it down with an agent, I found
this edge case where maybeResetToLoadedStage() doesn't clear the
.debug_str_offsets.

Context from agent:

When the parallel linker finds that an already cloned compile unit is
referenced by another unit, it resets the unit with
maybeResetToLoadedStage() and clones it again. The reset cleared the
abbreviations, the address index map and the output sections, but not
the map from strings to their .debug_str_offsets indexes. The second
cloning therefore kept the indexes assigned by the first one, and those
depend on whether, and how far, the unit had been cloned when it was
found to be referenced. With DWARF 5 inputs, the DW_FORM_strx indexes,
the .debug_str_offsets contents and the order of .debug_str could change
from one run to the next.

    [7 lines not shown]
DeltaFile
+197-0llvm/test/tools/dsymutil/X86/recloned-unit-str-offsets.s
+1-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
+198-02 files

LLVM/project 3eeb933 — llvm/test/CodeGen/X86 vector-shuffle-var-legalize.ll masked_compressstore_bf16.ll, llvm/test/Transforms/SimplifyCFG large-switch.ll

Merge branch 'main' into users/aokblast/gvnhoist/redo_aa_query
DeltaFile
+16-1,151llvm/test/CodeGen/X86/masked_expandload_f16.ll
+16-1,055llvm/test/CodeGen/X86/masked_expandload_bf16.ll
+14-1,013llvm/test/CodeGen/X86/masked_compressstore_f16.ll
+14-899llvm/test/CodeGen/X86/masked_compressstore_bf16.ll
+382-398llvm/test/CodeGen/X86/vector-shuffle-var-legalize.ll
+675-0llvm/test/Transforms/SimplifyCFG/large-switch.ll
+1,117-4,516710 files not shown
+15,079-10,334716 files

LLVM/project 83d1c64 — clang/lib/CIR/Dialect/IR CIROpsBuiltins.cpp CIROpsCore.cpp

[CIR] Shard the dialect naturally along op partitions

Replace the count-based `-op-shard-count=8` sharding of CIROps.td with the
op partitions introduced by the ODS natural sharding (llvm/llvm-project
PR 239254). Each of the eleven partitions (Core, Symbols, ControlFlow,
Arith, Builtins, Math, Coroutine, EH, VectorMatrix, Complex, ClassMembers)
is generated into its own CIROps<Partition>.{h,cpp}.inc, declared by its own
CIROps<Partition>.h on top of the new CIRDialectBase.h (the dialect,
attributes, types and interfaces without any op), and compiled in its own
CIROps<Partition>.cpp together with the hand-written op code that used to
live in CIRDialect.cpp. CIRDialect.h becomes an umbrella over the
partition headers, so existing includers are unchanged; files that use no
op switch to CIRDialectBase.h.

Assisted-by: Claude Code (Fable 5.1).
DeltaFile
+5-5,557clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+1,536-0clang/lib/CIR/Dialect/IR/CIROpsSymbols.cpp
+905-0clang/lib/CIR/Dialect/IR/CIROpsControlFlow.cpp
+706-0clang/lib/CIR/Dialect/IR/CIROpsEH.cpp
+660-0clang/lib/CIR/Dialect/IR/CIROpsCore.cpp
+483-0clang/lib/CIR/Dialect/IR/CIROpsBuiltins.cpp
+4,295-5,55745 files not shown
+6,475-5,73151 files

LLVM/project 4db65fa — llvm/lib/Transforms/Scalar GVNHoist.cpp

fixup! [GVNHoist] Propogate getClobberingMemoryAccess after moveToPlace
DeltaFile
+0-4llvm/lib/Transforms/Scalar/GVNHoist.cpp
+0-41 files

LLVM/project f99a279 — llvm/lib/Transforms/InstCombine InstCombineCompares.cpp, llvm/test/Transforms/InstCombine ptr-minmax-null.ll

[InstCombine] Canonicalize null checks of pointer umax selects (#233501)

Decompose an unsigned pointer maximum compared equal to null into a
logical AND of input null comparisons when the null representation is
all-zero. Require both the select and its condition to have one use to
avoid increasing the instruction count.

Fixes #199402

Proof: https://alive2.llvm.org/ce/z/CTUdtN
Assisted-by: GPT 6
DeltaFile
+372-0llvm/test/Transforms/InstCombine/ptr-minmax-null.ll
+35-0llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+33-0llvm/test/Transforms/PhaseOrdering/ptr-umax-null.ll
+440-03 files

LLVM/project 5968662 — utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel][ARM] Pass -gisel-extended-llt for ARMGenGlobalISel.inc (#240461)

Updates bazel overlay to fix build after commit cd67cba050a8.
DeltaFile
+4-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-11 files

LLVM/project 40b8404 — llvm/lib/Target/AMDGPU SIMemoryLegalizer.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.load.monitor.gfx1250.ll memory-legalizer-cfs-policy.ll

[AMDGPU] Finalize atomic loads before inserting waits after them (#239590)

In SIMemoryLegalizer::expandLoad, finalizeLoad and setCFS were called
after the acquire/seq_cst waits had been inserted. Inserting a wait
after
the load moves MI to point at the new wait instruction, so these calls
operated on the wait instead of the load:

- load_monitor instructions with acquire or seq_cst ordering at a scope
  that maps to SCOPE_CU (e.g. workgroup) were not raised to SCOPE_SE.
- Acquire and seq_cst atomic loads lost their !amdgpu.cfs cache fill
  size.

Call them before inserting the waits instead.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+36-0llvm/test/CodeGen/AMDGPU/memory-legalizer-cfs-policy.ll
+3-3llvm/test/CodeGen/AMDGPU/llvm.amdgcn.load.monitor.gfx1250.ll
+3-2llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+42-53 files

LLVM/project b00e085 — mlir/docs SPIRVToLLVMDialectConversion.md, mlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp

[mlir][SPIR-V] Add SPIRVToLLVM conversion for InBoundsAccessChain (#238743)

Integration/GPU/SPIRV tests fail to legalize since #216984 started
emitting this op
DeltaFile
+21-14mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+26-0mlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
+4-2mlir/docs/SPIRVToLLVMDialectConversion.md
+51-163 files

LLVM/project 8c49083 — mlir/lib/Conversion/VectorToSPIRV VectorToSPIRV.cpp

[mlir][SPIR-V] Use getElementTypeOrSelf in calculateMemoryRequirements (#239295)

Follow-up to #214200 post-merge review
DeltaFile
+1-3mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
+1-31 files

LLVM/project d31efc8 — offload/include/Shared Debug.h

feeback function overload
DeltaFile
+8-14offload/include/Shared/Debug.h
+8-141 files

LLVM/project 8ef3e3f — llvm/include/llvm/TargetParser NVPTXTargetParser.h

[clang][NVPTX] Init GPU_LAST via NVPTXTargetParser.def (#240417)

In #213362, the GK_LAST sentinal was added to the GPUKind enum by
manually defining it as GK_SM_121f.

To avoid manually assigning GK_LAST, instead count the rows in
`NVPTXTargetParser.def` via a macro. This keeps the alias correct when
architectures are added without having to manually update this enum.
DeltaFile
+5-3llvm/include/llvm/TargetParser/NVPTXTargetParser.h
+5-31 files

LLVM/project 107d507 — clang/docs ReleaseNotes.md, clang/include/clang/Basic OpenMPKinds.h

[Clang][OpenMP] Fix crash on `cancel taskgroup` inside `masked taskloop` (#240335)

Fixes #154552

`#pragma omp cancel taskgroup` inside a `masked taskloop` asserted in
`getOMPCancelDestination`. The cancel is emitted in the outlined task
function, whose exit target came from a list of directive kinds that
stopped at `master taskloop`, so `OMPD_masked_taskloop` fell through to
the worksharing assertion. `parallel masked taskloop` and `cancellation
point taskgroup` hit it too.

Pick the target with `isOpenMPTaskingDirective`, so every task-based
region returns from its outlined function, and read `HasCancel` from the
masked `taskloop` directives like the master ones.

AI Aided!
DeltaFile
+110-0clang/test/OpenMP/GH154552.cpp
+28-0clang/test/OpenMP/Inputs/nesting_of_regions.cpp
+2-3clang/lib/CodeGen/CGStmtOpenMP.cpp
+2-3clang/include/clang/Basic/OpenMPKinds.h
+4-0clang/lib/CodeGen/CGOpenMPRuntime.cpp
+1-0clang/docs/ReleaseNotes.md
+147-66 files

LLVM/project c51311d — llvm/lib/CodeGen/GlobalISel IRTranslator.cpp, llvm/test/CodeGen/AArch64 bitinsert-bitextract-vector.ll

[GlobalISel] Lower vector `bitinsert` and `bitextract`
DeltaFile
+143-66llvm/test/CodeGen/AArch64/bitinsert-bitextract-vector.ll
+14-12llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+157-782 files

LLVM/project df74b06 — clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

[clang][CIR][AMDGPU] Parse AMDGPU syncscope without a triple (#237228)
DeltaFile
+26-14llvm/include/llvm/TargetParser/AtomicScope.h
+1-4clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+1-2clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+28-203 files

LLVM/project e7f3098 — llvm/test/CodeGen/AArch64 sve-bitinsert-bitextract.ll bitinsert-bitextract-vector.ll, llvm/test/CodeGen/AMDGPU bitinsert-bitextract-vector.ll

[SelectionDAG] Lower vector `bitinsert` and `bitextract`
DeltaFile
+476-0llvm/test/CodeGen/X86/bitinsert-bitextract-vector.ll
+344-0llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-vector.ll
+145-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitinsert-bitextract.ll
+141-0llvm/test/CodeGen/AArch64/bitinsert-bitextract-vector.ll
+33-0llvm/test/CodeGen/RISCV/rvv/bitinsert-bitextract.ll
+27-0llvm/test/CodeGen/AArch64/sve-bitinsert-bitextract.ll
+1,166-01 files not shown
+1,168-27 files

LLVM/project cd02db0 — llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp

[AMDGPU] Register async barrier warning option during parser initialization

Keep the warning flag in constant-initialized storage and register its
command-line option in LLVMInitializeAMDGPUAsmParser. This avoids a
file-scope cl::opt destructor rejected by -Werror=global-constructors
while retaining the default warning and explicit opt-out.
DeltaFile
+7-5llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+7-51 files

LLVM/project e75a546 — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[clang][CIR][NFC] Explicitly cast values to avoid narrowing implicit conversion (#239951)

Use `static_cast` to explicitly convert the 64 bit int values to the
expected `int32_t` type to avoid narrowing implicit conversions from 64
bit int to 32 bit int values.

Signed-off-by: Hardik Kumar <hardikxk at gmail.com>
DeltaFile
+5-3clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+5-31 files

LLVM/project 2027a96 — llvm/lib/Target/SystemZ SystemZTargetMachine.cpp SystemZCodeGenPassBuilder.cpp, llvm/test/CodeGen/SystemZ newpm-pipeline.ll

[SystemZ] Port AlignGlobals to NewPM

Standard NewPM pass porting.

Reviewers: uweigand, JonPsson1

Pull Request: https://github.com/llvm/llvm-project/pull/240270
DeltaFile
+19-7llvm/lib/Target/SystemZ/SystemZAlignGlobals.cpp
+11-2llvm/lib/Target/SystemZ/SystemZ.h
+6-0llvm/lib/Target/SystemZ/SystemZPassRegistry.def
+2-1llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+2-1llvm/lib/Target/SystemZ/SystemZCodeGenPassBuilder.cpp
+2-0llvm/test/CodeGen/SystemZ/newpm-pipeline.ll
+42-116 files

LLVM/project bff8793 — llvm/lib/Target/SystemZ CMakeLists.txt SystemZTargetMachine.cpp, llvm/test/CodeGen/SystemZ newpm-pipeline.ll

[SystemZ] Introduce SystemZCodeGenPassBuilder

Standard NewPM CodeGenPassBuilder implementation. Tries to mirror the
existing SystemZTargetPassConfig as much as possible.

Reviewers: JonPsson1, uweigand

Pull Request: https://github.com/llvm/llvm-project/pull/240268
DeltaFile
+174-0llvm/lib/Target/SystemZ/SystemZCodeGenPassBuilder.cpp
+139-0llvm/test/CodeGen/SystemZ/newpm-pipeline.ll
+20-0llvm/lib/Target/SystemZ/SystemZPassRegistry.def
+4-4llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+8-0llvm/lib/Target/SystemZ/SystemZTargetMachine.h
+2-0llvm/lib/Target/SystemZ/CMakeLists.txt
+347-46 files

LLVM/project 8738855 — llvm/lib/Target/SystemZ SystemZTargetMachine.cpp SystemZ.h

[SystemZ] Port SelectionDAG to NewPm

Standard NewPM pass porting.

Reviewers: uweigand, JonPsson1

Pull Request: https://github.com/llvm/llvm-project/pull/240265
DeltaFile
+9-2llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+8-2llvm/lib/Target/SystemZ/SystemZ.h
+2-1llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
+19-53 files

LLVM/project d8ad9d0 — .github/workflows libcxx-pr-check-generated-files.yml, libcxx/docs/Status Cxx29Papers.csv

[libc++] Add a target to validate the conformance status CSV files (#238977)

This adds a libcxx-validate-conformance-csvs target which runs
`libcxx/utils/conformance csv validate` on all the status CSV files, to
make sure they don't get broken. Also add to the CI jobs.
DeltaFile
+11-1.github/workflows/libcxx-pr-check-generated-files.yml
+7-0libcxx/utils/CMakeLists.txt
+3-0libcxx/utils/ci/run-buildbot
+1-1libcxx/docs/Status/Cxx29Papers.csv
+22-24 files

LLVM/project ae0eb49 — libc/src/__support/math sinhf16.h, libc/test/src/math/smoke atanbf16_test.cpp exp2m1f16_test.cpp

[libc][math] Fix low-precision range reporting and rounding (#236472)

Group five related fixes that share implementation or test-registration
files:
- Raise overflow/inexact for directed finite exponential overflow
results.
- Avoid intermediate range exceptions in atanbf16, expbf16 and exp2bf16,
  and correct expbf16 underflow rounding.
- Correct sinhf16 subnormal rounding/reporting and exp2m1f16 at 0x8461.

Finite-overflow errno choices are unchanged. The exp2m1f16 correction
uses
the accurate pass. The expm1f16 subnormal fix in #236310 is not
included.

Tests: 38 smoke configurations per compiler with GCC 13 and Clang 18 on
x86-64 Linux. MPFR 4.2.1 value checks cover five functions' finite
domains
in all four rounding modes; exception/errno checks cover scoped inputs.

    [5 lines not shown]
DeltaFile
+67-0libc/test/src/math/smoke/sinhf16_test.cpp
+62-0libc/test/src/math/smoke/exp2bf16_test.cpp
+55-0libc/test/src/math/smoke/expbf16_test.cpp
+47-0libc/test/src/math/smoke/exp2m1f16_test.cpp
+46-0libc/test/src/math/smoke/atanbf16_test.cpp
+20-3libc/src/__support/math/sinhf16.h
+297-311 files not shown
+469-817 files