LLVM/project 5a924bfclang/lib/CIR/CodeGen TargetInfo.cpp CIRGenCUDANV.cpp, clang/lib/CIR/CodeGen/Targets NVPTX.cpp

[CIR][CUDA] Support built-in CUDA surface type (#196079)

Related: #179278

This patch adds initial support for CUDA built-in surface types in CIR
for device-side compilation.

CUDA surface references are lowered to the NVPTX device-handle
representation (`i64`), matching existing Clang CodeGen behavior.

Changes
* Add `getCUDADeviceBuiltinSurfaceDeviceType()` target hook to
`TargetCIRGenInfo`
* Implement NVPTX surface lowering in `NVPTXTargetCIRGenInfo`
* Handle CUDA built-in surface types in `CIRGenTypes::convertType`
* Add CIR CUDA test coverage for device-side surface lowering

Notes


    [8 lines not shown]
DeltaFile
+87-0clang/lib/CIR/CodeGen/Targets/NVPTX.cpp
+0-59clang/lib/CIR/CodeGen/TargetInfo.cpp
+27-5clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
+25-0clang/test/CIR/CodeGenCUDA/surface.cu
+11-0clang/lib/CIR/CodeGen/CIRGenTypes.cpp
+4-0clang/lib/CIR/CodeGen/TargetInfo.h
+154-642 files not shown
+156-648 files

LLVM/project 63122f5lld/ELF SyntheticSections.cpp SyntheticSections.h

[NFC][ELF] Don't reimplement addReloc in MipsGotSection::addConstant (#208130)

This is a repeat of d48eb719d240 ("[NFC][ELF] Don't reimplement addReloc
in GotSection::addConstant") but for MipsGotSection. Unfortunately,
9fb61d972213 ("[NFCI][ELF][Mips] Refactor MipsGotSection to avoid
explicit writes (#178561)") was put up for review before, and was landed
after, that commit, and I did not think to update it, so it ended up
copying the old GotSection code. Although there's no motivation to
support CHERI in this code (even though CHERI-MIPS existed it never used
the highly-specialised MipsGotSection to hold capabilities), it's still
better to use our own abstractions, and to be consistent.

Fixes: 9fb61d972213 ("[NFCI][ELF][Mips] Refactor MipsGotSection to avoid
explicit writes (#178561)")
DeltaFile
+0-4lld/ELF/SyntheticSections.cpp
+1-1lld/ELF/SyntheticSections.h
+1-52 files

LLVM/project 4708581llvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx xvexth.ll

[LoongArch] Add DAG combines for vector widening extends (#207316)

Lower:

```
  SEXT/ZEXT(High-Half-128-Bit-Lanes(vec))
```

to:

```
  LSX:  VEXTH.H.B, VEXTH.W.H, VEXTH.D.W
        VEXTH.HU.BU, VEXTH.WU.HU, VEXTH.DU.WU

  LASX: XVEXTH.H.B, XVEXTH.W.H, XVEXTH.D.W
        XVEXTH.HU.BU, XVEXTH.WU.HU, XVEXTH.DU.WU
```
DeltaFile
+12-228llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+12-30llvm/test/CodeGen/LoongArch/lsx/vexth.ll
+25-12llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+29-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+24-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+102-2705 files

LLVM/project e60dc90llvm/lib/Target/Hexagon HexagonFrameLowering.cpp, llvm/test/CodeGen/Hexagon shadow-call-stack.ll

[Hexagon] Disable restore stubs when ShadowCallStack is active (#206302)

The returning restore stubs (e.g.
__restore_r16_through_r17_and_deallocframe) perform deallocframe+jumpr
r31 internally, returning via the on-stack return address. This is
incompatible with ShadowCallStack, which must restore r31 from the
shadow stack before returning.

Fix by having useRestoreFunction() return false when the ShadowCallStack
attribute is present, forcing inline callee-saved restores so the SCS
epilogue is properly emitted.
DeltaFile
+69-0llvm/test/CodeGen/Hexagon/shadow-call-stack.ll
+3-0llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+72-02 files

LLVM/project ddca532llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx xvexth.ll

Address wanglei's comments
DeltaFile
+6-106llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+5-3llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+11-1092 files

LLVM/project 73fe022llvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx xvexth.ll

[LoongArch] Add DAG combines for vector widening extends

Lower:

```
  SEXT/ZEXT(High-Half-128-Bit-Lanes(vec))
```

to:

```
  LSX:  VEXTH.H.B, VEXTH.W.H, VEXTH.D.W
        VEXTH.HU.BU, VEXTH.WU.HU, VEXTH.DU.WU

  LASX: XVEXTH.H.B, XVEXTH.W.H, XVEXTH.D.W
        XVEXTH.HU.BU, XVEXTH.WU.HU, XVEXTH.DU.WU
```
DeltaFile
+6-122llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+12-30llvm/test/CodeGen/LoongArch/lsx/vexth.ll
+23-12llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+29-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+24-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+94-1645 files

LLVM/project 478bbbellvm/test/CodeGen/LoongArch/lasx xvexth.ll, llvm/test/CodeGen/LoongArch/lsx vexth.ll

[LoongArch][NFC] Add vector widening extends tests (#207315)
DeltaFile
+415-0llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+205-0llvm/test/CodeGen/LoongArch/lsx/vexth.ll
+620-02 files

LLVM/project d6c0a0alibc/config/gpu/amdgpu entrypoints.txt, libc/config/gpu/nvptx entrypoints.txt

[libc][complex] Add basic complex ops including carg/cabs for GPU (#207887)

This PR adds carg and cabs for AMD GPU and also add all other basic
complex ops for NV GPU.

Signed-off-by: jinge90 <ge.jin at intel.com>
DeltaFile
+18-0libc/config/gpu/nvptx/entrypoints.txt
+4-0libc/config/gpu/amdgpu/entrypoints.txt
+22-02 files

LLVM/project aaeac36flang/lib/Optimizer/CodeGen TargetRewrite.cpp, flang/test/Fir target-rewrite-arg-position.fir

[flang][TargetRewrite] Keep argument attributes consistent after ABI arg shift (#208124)

When target-rewrite expands an argument into several arguments
(for example splitting a complex value into two scalars),
the arguments after it shift to the right.
Argument attributes were only moved for a shift introduced
by result lowering, so an attribute on a later argument
(e.g. fir.host_assoc) could stay on its old index and end up
on an unrelated argument. Remap every saved argument
attribute to the new index of its argument.

This is a consistency fix and may not cause a miscompile today.
DeltaFile
+17-13flang/lib/Optimizer/CodeGen/TargetRewrite.cpp
+14-0flang/test/Fir/target-rewrite-arg-position.fir
+31-132 files

LLVM/project 3f913cfllvm/lib/Target/AMDGPU SIInstrInfo.h SIInstrInfo.cpp

More documentation

Change-Id: I65ff1a1b605796d21a52766dcf04c64bc64aaa4e
DeltaFile
+21-6llvm/lib/Target/AMDGPU/SIInstrInfo.h
+1-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+22-72 files

LLVM/project d1ad52fflang/include/flang/Lower DirectivesCommon.h, flang/lib/Lower Runtime.cpp

[flang][NFC] Remove unnecessary #include directives across flang (#207640)

Audit of every #include directive in flang/lib/ and
flang/include/flang/:

- Remove 423 #include directives (293 from lib/ translation units, 23
from lib-private headers, 107 from public headers) that are not needed:
no entity declared by the removed header is used - directly or in any
conditional-compilation branch (Windows, macOS, ARM/PowerPC,
REAL(16)/REAL(2) configuration macros) - in the including file, and for
headers no consumer in flang/lib, flang/tools, flang/unittests, or
flang-rt relies on the include as a re-export. Load-bearing includes
were examined and retained: textual .inc/.def expansions, tablegen
pass-header declaration/definition pairings, dialect headers carrying
generated-op interface dependencies, config-macro providers (e.g.
float128.h ahead of matmul-instances.inc guards), and ADL formatting
machinery (Evaluate/formatting.h).

- Add 5 missing direct #includes in lib translation units that used

    [5 lines not shown]
DeltaFile
+0-14flang/lib/Optimizer/Transforms/VScaleAttr.cpp
+0-8flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
+0-6flang/lib/Lower/Runtime.cpp
+0-6flang/lib/Semantics/check-data.h
+0-6flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
+0-5flang/include/flang/Lower/DirectivesCommon.h
+0-45217 files not shown
+6-425223 files

LLVM/project cc27a24lldb/include/lldb/Target Process.h, lldb/include/lldb/Utility Policy.h

[lldb] Push ExpressionEvaluation policy and remove identity check fallbacks (#195775)

Push `PolicyStack::Get().PushPublicStateRunningExpression()` at all
three expression evaluation entry points
(`LLVMUserExpression::DoExecute`, `FunctionCaller::ExecuteFunction`,
`IRInterpreter`). This policy sets `can_run_breakpoint_actions=false`,
preventing recursive breakpoint callback execution during expression
eval.

Push `PolicyStack::Get().PushPrivateState()` unconditionally for all
PSTs in `RunPrivateStateThread` (not just overrides), giving every PST
the private view while keeping frame providers and recognizers enabled
for normal stop processing. Override PSTs use
`PushPrivateStateRunningExpression()` which additionally disables
providers and recognizers.

With all PSTs and expression eval sites now covered by the policy,
remove all host thread identity check fallbacks:
  - `CurrentThreadPosesAsPrivateStateThread()` in `Process::GetState()`

    [21 lines not shown]
DeltaFile
+18-30lldb/source/Target/Process.cpp
+16-9lldb/include/lldb/Target/Process.h
+20-5lldb/unittests/Utility/PolicyTest.cpp
+12-8lldb/source/Target/Thread.cpp
+16-3lldb/include/lldb/Utility/Policy.h
+9-3lldb/source/Utility/Policy.cpp
+91-586 files not shown
+109-7012 files

LLVM/project 2a8e0e1llvm/test/Transforms/SLPVectorizer/X86 reassociate-ops.ll

[SLP][NFC]Add tests with some preferred reassociation, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/208118
DeltaFile
+218-0llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
+218-01 files

LLVM/project 39dcb0fllvm/include/llvm/IR GlobalValue.h, llvm/include/llvm/Transforms/Utils AssignGUID.h

Reland "Compute GUIDs once and store in metadata" (#184065)  (#201849)

This reverts #201194, thus relanding @orodley's PR #184065 (and
#200323):

> This allows us to keep GUIDs consistent across compilation phases
which may change the name or linkage type.
> See
https://discourse.llvm.org/t/rfc-keep-globalvalue-guids-stable/84801

The CFI issues that triggered the original revert are fixed by #201370,
together with the addressing of the TODOs in `LowerTypeTests.cpp` left
in the latter. The [graphite
diff](https://app.graphite.com/github/pr/llvm/llvm-project/201849/Reland-%23184065)
between this change's V1 and V2 shows what's been added:

- the `TODO`s from #201370 are done
- in LowerTypeTests.cpp, passing `!guid` when creating a new declaration
and when converting a definition to a declaration.

    [34 lines not shown]
DeltaFile
+61-17llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+45-30llvm/lib/LTO/LTO.cpp
+64-2llvm/lib/IR/Globals.cpp
+49-3llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+45-5llvm/include/llvm/IR/GlobalValue.h
+49-0llvm/include/llvm/Transforms/Utils/AssignGUID.h
+313-57120 files not shown
+872-416126 files

LLVM/project 8b93782llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md

Add explicit anchors to deep headers for AMD DWARF ext doc (#208110)

Anchors get auto-generated only upto level 6, and
https://github.com/llvm/llvm-project/pull/208103 added another level,
causing sphinx to complain about no targets for these anchors.
DeltaFile
+7-0llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
+7-01 files

LLVM/project 73867dcclang/lib/Driver Driver.cpp Action.cpp, clang/lib/Driver/ToolChains MSVC.cpp MSVC.h

[clang][ARM64X] Support compiling both native and EC objects with -marm64x (#207612)

When -marm64x is used during the assembly phase, construct jobs for both
native and EC targets and merge their outputs using llvm-objcopy.

Allow passing ArchName to computeTargetTriple on non-Darwin targets to
enable BindArchAction on other platforms. Additionally, allow passing
multiple inputs to ObjcopyJobAction and use this capability to construct
ARM64X merge jobs.
DeltaFile
+36-0clang/lib/Driver/ToolChains/MSVC.cpp
+24-9clang/lib/Driver/Driver.cpp
+16-0clang/lib/Driver/ToolChains/MSVC.h
+8-0clang/test/Driver/arm64x.c
+4-0clang/lib/Driver/ToolChains/MinGW.cpp
+2-2clang/lib/Driver/Action.cpp
+90-114 files not shown
+95-1410 files

LLVM/project 448b57dllvm/test/CodeGen/X86 vector-trunc.ll

[X86] vector-trunc.ll - regenerate checks to add missing ADD constant pool comments (#207827)
DeltaFile
+2-2llvm/test/CodeGen/X86/vector-trunc.ll
+2-21 files

LLVM/project 72a8152llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

Merge branch 'main' into users/ziqingluo/PR-179151541
DeltaFile
+24,053-23,916llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,520-21,720llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+13,779-6,871llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-instructions.s
+10,260-9,388llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
+7,929-6,787llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,374-4,577llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+83,915-73,2596,721 files not shown
+490,610-258,5626,727 files

LLVM/project 4c93275libc/src/__support/CPP string.h, libc/test/src/__support/CPP string_test.cpp

[libc][cpp::string] Fix off-by-one bug in resize and a memory leak (#208077)

AFAICT, `cpp::string` is only used in tests, so these bugs were mostly
inconsequential.
DeltaFile
+9-1libc/src/__support/CPP/string.h
+9-0libc/test/src/__support/CPP/string_test.cpp
+18-12 files

LLVM/project d288889llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md

Update AMD DWARF ext doc headers to only have a single title-level header (#208103)

This ensures no leakage of individual headings on the page to the global
TOC, see https://github.com/llvm/llvm-project/pull/184440
DeltaFile
+85-85llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
+85-851 files

LLVM/project 8fbf94aclang/lib/Lex LiteralSupport.cpp

Silence a signed/unsigned mismatch diagnostic; NFC (#208088)
DeltaFile
+2-1clang/lib/Lex/LiteralSupport.cpp
+2-11 files

LLVM/project c7d45callvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/ARM unaligned_load_store_no_aeabi.ll

[ARM] Don't try to emit AEABI libcalls for non-AEABI targets (#207813)

PR #172672 added ARMTargetLowering::LowerAEABIUnalignedLoad/Store which
lowers some of the unaligned i32/i64 stores to
__aeabi_u{read,write}{4,8}. The libcall is emitted unconditionally, with
no check whether the target environment actually has these AEABI
helpers.

We don't have it for Apple/MachO which leads to a compiler crash.

rdar://175136625
DeltaFile
+83-0llvm/test/CodeGen/ARM/unaligned_load_store_no_aeabi.ll
+6-9llvm/lib/Target/ARM/ARMISelLowering.cpp
+1-0llvm/utils/UpdateTestChecks/asm.py
+90-93 files

LLVM/project ee74507lldb/source/Plugins/Process/wasm UnwindWasm.cpp, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

[lldb] Give Wasm stack frames a synthetic call frame address (#208061)

UnwindWasm reported a call frame address of zero for every Wasm frame.
StackID orders frames by their CFA, assuming the stack grows downward so
that a younger frame compares below its caller. With every CFA equal to
zero that ordering collapsed, and CompareCurrentFrameToStartFrame
treated a step into a function as a step out, which silently disabled
step-in avoid-regexp and confused other thread plans.

WebAssembly keeps its call stack inside the engine and exposes no
linear-memory frame address, so synthesize a CFA from each frame's
distance to the outermost frame. That distance is invariant as frames
are pushed and popped above it, so a given frame keeps a stable, ordered
CFA across steps.
DeltaFile
+12-1lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
+9-0lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+21-12 files

LLVM/project f336f82llvm/include/llvm/MC MCSectionGOFF.h, llvm/test/CodeGen/SystemZ zos-align.ll zos-section-1.ll

[SystemZ][z/OS] Honor alignment of global data

The alignment of sections is set after the section are created.
Thus, the ED structure set at object construction time is updated
with the current section alignment. This only applies to ED type
section. As result, the alignment of global data is correctly set.
DeltaFile
+28-0llvm/test/CodeGen/SystemZ/zos-align.ll
+10-2llvm/include/llvm/MC/MCSectionGOFF.h
+1-1llvm/test/CodeGen/SystemZ/zos-section-1.ll
+39-33 files

LLVM/project ad516f3mlir/lib/Dialect/OpenACC/Transforms ACCSpecializeForDevice.cpp, mlir/test/Dialect/OpenACC acc-specialize-for-device.mlir

[acc] Specialize acc.on_device with constant arg for device

Fold known result acc.on_device to a constant on device-side code.
DeltaFile
+49-0mlir/test/Dialect/OpenACC/acc-specialize-for-device.mlir
+44-0mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForDevice.cpp
+93-02 files

LLVM/project 363035cmlir/include/mlir/Dialect/OpenACC OpenACCOps.td, mlir/test/Dialect/OpenACC ops.mlir

[mlir][acc] Add acc.on_device op

Add an operation to represent the runtime call to acc_on_device.

This runtime call is important to fold early in the compilation pipeline
and having an operation allows us to easily recognize it when emitted by
frontends.
DeltaFile
+27-0mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+8-0mlir/test/Dialect/OpenACC/ops.mlir
+35-02 files

LLVM/project af33f79flang/include/flang/Optimizer/Builder OpenACCIntrinsicCall.h IntrinsicCall.h, flang/lib/Lower ConvertCall.cpp

[flang][acc] Emit acc.on_device operation for acc_on_device call

It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
DeltaFile
+51-0flang/lib/Optimizer/Builder/OpenACCIntrinsicCall.cpp
+23-19flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+32-0flang/include/flang/Optimizer/Builder/OpenACCIntrinsicCall.h
+5-15flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
+15-1flang/include/flang/Optimizer/Builder/IntrinsicCall.h
+8-7flang/lib/Lower/ConvertCall.cpp
+134-425 files not shown
+158-4511 files

LLVM/project c8a2c24llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Extend wave reduction intrinsics to Pre-gfx8

Add support for gfx6/7 families.
DeltaFile
+666-58llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+627-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+576-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+520-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+3,377-824 files not shown
+4,875-9010 files

LLVM/project 6d34e50lldb/source/Utility FileSpec.cpp FileSpecList.cpp

[lldb] Remove uses of ConstString in FileSpec methods (#206851)

After this, FileSpec only uses ConstString for storage. In a subsequent
commit, I will change FileSpec's storage.
DeltaFile
+18-6lldb/source/Utility/FileSpec.cpp
+0-1lldb/source/Utility/FileSpecList.cpp
+18-72 files

LLVM/project 9ff1d7allvm/lib/Transforms/Utils CallPromotionUtils.cpp, llvm/test/Transforms/SampleProfile icp_target_feature.ll

Revert "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#208079)

Reverts llvm/llvm-project#192142

Now that https://github.com/llvm/llvm-project/pull/205113 has landed, we
will not inline functions with incompatible target features, even if the
callee is marked `alwaysinline`, so we can promote calls to such
functions while also removing the extra complexity from ICP.
DeltaFile
+0-61llvm/test/Transforms/SampleProfile/icp_target_feature.ll
+0-21llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
+0-822 files