LLVM/project ef54099 — llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination sadd-with-overflow.ll minmax.ll

[ConstraintElim] Split signed min/max across their operands when checking a compare

The existing constraint systems only record the bounds that hold for both
operands of a min/max (smax(a, b) >= a and >= b, smin(a, b) <= a and <= b). The
other direction is a disjunction, which cannot be recorded as a fact. When a
compare of signed decompositions involves a min/max result, split it into its
operands: the decomposition is monotonic in that result, so it is the max or min
of its values on each side, and the relation holds for all or for either side
respectively.

https://alive2.llvm.org/ce/z/zsGkJ-
DeltaFile
+366-3llvm/test/Transforms/ConstraintElimination/minmax.ll
+111-0llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+4-8llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
+481-113 files

LLVM/project d4fe279 — llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination ssub-with-overflow.ll sadd-with-overflow.ll

[ConstraintElim] Prove sadd/ssub.with.overflow cannot overflow from the exact sum

Decompose the operands and show that the sum lies in the range of the type. This
handles patterns like A + (B - A), as well as sums involving signed min/max
results, which are split across their respective operands using monotonicity
(for example start + smax(end - start - 1, 0) <= end).

https://alive2.llvm.org/ce/z/ze8LCk
DeltaFile
+571-0llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
+159-3llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+100-0llvm/test/Transforms/ConstraintElimination/ssub-with-overflow.ll
+830-33 files

LLVM/project 7801496 — llvm/lib/Transforms/Scalar ConstraintElimination.cpp

clang-format
DeltaFile
+12-6llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+12-61 files

LLVM/project d63e64d — llvm/test/Transforms/SLPVectorizer/X86 traverse-down-cmp-chain.ll

[SLP][NFC] Pre-commit tests for compare chains feeding heterogeneous sinks (#240778)

Add tests covering compares that feed a uniform single-use chain whose
sinks are heterogeneous. vectorizeCmpInsts() roots the SLP tree at the
compares, so today only the compares are vectorized and the chain they
feed is left scalar, with one extract per lane.

No functional change.

Co-authored-by: Balakrishna Bandlapalli <bbandlap at gmail.com>
DeltaFile
+160-0llvm/test/Transforms/SLPVectorizer/X86/traverse-down-cmp-chain.ll
+160-01 files

LLVM/project b4f4419 — llvm/test/CodeGen/RISCV machine-copyprop-simplifyinstruction.mir, llvm/test/CodeGen/RISCV/GlobalISel/legalizer legalize-div-rv64.mir legalize-icmp-rv32.mir

[RISCV](NFC) Set accurate liveness information on all MIR tests (#241339)
DeltaFile
+284-142llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv64.mir
+244-123llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-icmp-rv32.mir
+185-171llvm/test/CodeGen/RISCV/rvv/zvlsseg-copy.mir
+204-125llvm/test/CodeGen/RISCV/machine-copyprop-simplifyinstruction.mir
+54-223llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.mir
+98-44llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
+1,069-82876 files not shown
+3,085-1,93882 files

LLVM/project 66e6ede — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 reduce-or-bitpack.ll

[SLP]Fix bit pack lane cost for interchangeable lanes

A lane like add %x, 0 in the shl node is an interchangeable shl, so
check the op it matches instead of its own opcode.

Fixes #241471

Pull-request: https://github.com/llvm/llvm-project/pull/241485
DeltaFile
+26-0llvm/test/Transforms/SLPVectorizer/X86/reduce-or-bitpack.ll
+3-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+29-12 files

LLVM/project 6141ce1 — lldb/test/Shell CMakeLists.txt, lldb/test/Shell/helper toolchain.py

[lldb][test] Write the Shell tests' lit-lldb-init files from lit (#236887)

The %lldb substitutions source lit-lldb-init-quiet from the test
execution root, and CMake wrote that file and lit-lldb-init into the
build directory. Write them from the lit config instead, when the
substitutions are set up. The test execution root is where lit already
writes test outputs, so this works for any build system that can run lit
with a writable execution root, including ones that cannot add generated
files to it ahead of time, like Bazel.
DeltaFile
+29-0lldb/test/Shell/helper/toolchain.py
+0-6lldb/test/Shell/CMakeLists.txt
+29-62 files

LLVM/project c76f759 — llvm/unittests/TargetParser TripleTest.cpp

Update TripleTest (and fix typo in test name)
DeltaFile
+4-4llvm/unittests/TargetParser/TripleTest.cpp
+4-41 files

LLVM/project cc6fe60 — clang/test/CodeGenCXX module-funcs-from-imports.cppm

[NFC][test] AIX: Skip Clang IR steps in module-funcs-from-imports.cppm (#241451)

The Clang IR steps encounter:
```
error: C++ ABI 'xl' is not yet supported by CIR
```

Tracking issue: https://github.com/llvm/llvm-project/issues/241433

Resolves CI failure from
https://github.com/llvm/llvm-project/pull/239686.

Co-authored-by: Hubert Tong <hstong at ca.ibm.com>
DeltaFile
+4-2clang/test/CodeGenCXX/module-funcs-from-imports.cppm
+4-21 files

LLVM/project 4a6c93c — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 sad.ll

[X86] combineBasicSADPattern - incorrect vector element count (#240005)

Ensure we determine the vector element count from the reduction ROOT,
not the first vector in the chain - to correctly handle cases where the
ROOT is split during reduction

Fixes #239204
DeltaFile
+5-5llvm/lib/Target/X86/X86ISelLowering.cpp
+6-2llvm/test/CodeGen/X86/sad.ll
+11-72 files

LLVM/project fadf32a — llvm/test/MachineVerifier/AMDGPU verify-scale-offset.mir

[AMDGPU] Add tests for scale_offset machine verifier. NFC
DeltaFile
+23-0llvm/test/MachineVerifier/AMDGPU/verify-scale-offset.mir
+23-01 files

LLVM/project c4fb621 — mlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector invalid.mlir

[mlir][vector] Reject `vector.mask` on Xfer ops that have a mask operand (#240797)

`vector.transfer_{read,write}` already have a _mask operand_, so
wrapping them in `vector.mask` gives two ways to express the same thing
and risks double masking. This PR makes `vector.mask` reject a masked
Xfer op that already has a mask operand.

Changes:
- Add a check to `MaskOp::verify` that fails if the op has a mask
operand.
- Add two _negative_ tests for `vector.transfer_{read,write}`.

Part of #239511.

RFC:
https://discourse.llvm.org/t/rfc-unify-masking-in-the-vector-dialect/92675

---------

Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
DeltaFile
+20-0mlir/test/Dialect/Vector/invalid.mlir
+7-0mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+27-02 files

LLVM/project 16137bc — .github/workflows/containers/libc Dockerfile

[GitHub][libc] Bump LLVM to 24 in container image (#241368)

Otherwise we get errors about having an out of date clang (e.g., CMake
error in libc-fullbuild on AMDGPU).
DeltaFile
+6-4.github/workflows/containers/libc/Dockerfile
+6-41 files

LLVM/project a75ed02 — clang/test/CIR/CodeGenSYCL sycl-kernel-entry-point-exceptions.cpp, libc/test/src/time time_utils_test.cpp

Merge branch 'users/topperc/extract-nsrl' into users/topperc/insert-subvector
DeltaFile
+482-0llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ve.ll
+222-0llvm/test/Transforms/SLPVectorizer/AMDGPU/latency-bound-data-movement.ll
+197-0libc/test/src/time/time_utils_test.cpp
+196-0llvm/test/Transforms/Attributor/musttail-function-info.ll
+162-8llvm/test/CodeGen/AMDGPU/waitcnt-vavdst-ordered-xdl.mir
+158-0clang/test/CIR/CodeGenSYCL/sycl-kernel-entry-point-exceptions.cpp
+1,417-8139 files not shown
+3,695-1,078145 files

LLVM/project 44e0567 — llvm/test/CodeGen/AArch64 arm64-fcopysign.ll, llvm/test/CodeGen/PowerPC copysignl.ll

DAG: Remove special case copysign libcall recognition (#241440)

InstCombine already turns this into the copysign intrinsic. There's
also trivially no errno concern contrary to the comment. Clean up
redundant functions where both libcall and intrinsic were tested.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+0-85llvm/test/CodeGen/X86/sse-fcopysign.ll
+2-35llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
+9-13llvm/test/CodeGen/SystemZ/fp-copysign-01.ll
+8-10llvm/test/CodeGen/X86/copysign-constant-magnitude.ll
+5-9llvm/test/CodeGen/SystemZ/fp-copysign-02.ll
+6-8llvm/test/CodeGen/PowerPC/copysignl.ll
+30-16011 files not shown
+50-20917 files

LLVM/project fbd4bd3 — llvm/test/CodeGen/AArch64 ldexp.ll, llvm/test/CodeGen/PowerPC ldexp-libcall.ll

DAG: Remove special case ldexp libcall recognition

InstCombine now turns the eligible cases into the intrinsic.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+2-74llvm/test/CodeGen/AArch64/ldexp.ll
+0-54llvm/test/CodeGen/X86/ldexp-wrong-signature.ll
+0-50llvm/test/CodeGen/X86/ldexp-not-readonly.ll
+9-41llvm/test/CodeGen/X86/ldexp-libcall.ll
+0-49llvm/test/CodeGen/X86/ldexp-wrong-signature2.ll
+3-9llvm/test/CodeGen/PowerPC/ldexp-libcall.ll
+14-2772 files not shown
+16-2878 files

LLVM/project bdaaad8 — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU store.ll load.ll

[AMDGPU] Price misaligned flat and LDS accesses with the LDS misaligned bug

In WGP mode on subtargets with the LDS misaligned bug, a flat access is
split into pieces no wider than its alignment and no narrower than 4
bytes, and an LDS access aligned below 4 bytes uses 8-byte pieces as one
aligned to 4 does.
DeltaFile
+121-60llvm/test/Analysis/CostModel/AMDGPU/store.ll
+121-60llvm/test/Analysis/CostModel/AMDGPU/load.ll
+4-1llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+246-1213 files

LLVM/project 29bda31 — llvm/lib/Target/AMDGPU GCNSubtarget.cpp AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU store.ll load.ll

[AMDGPU] Price buffer fat pointer memory operations (#238842)

Price buffer fat pointer accesses as global accesses, except that an
aligned load is not widened and a vector of odd width elements is not
split element by element. Without relaxed buffer bounds checking, a
vector of elements that are a multiple of 32 bits wide is accessed in
pieces no wider than its alignment and no narrower than 4 bytes, and a
vector of other byte-sized or power of 2 wide elements in pieces of the
largest power of 2 bytes that divides the element size. The width comes
from buffer fat pointer lowering, which now exposes it. When the pointer
is a buffer resource plus a constant offset, the offset and a constant
number of records give the same bounds facts lowering uses to access it
in wider pieces.

Assisted-By: Claude Code Opus 5
DeltaFile
+354-0llvm/test/Analysis/CostModel/AMDGPU/buffer-fat-pointer-oob-mode.ll
+71-20llvm/test/Analysis/CostModel/AMDGPU/store.ll
+71-20llvm/test/Analysis/CostModel/AMDGPU/load.ll
+6-70llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+60-14llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+42-0llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+604-1241 files not shown
+632-1247 files

LLVM/project 94d0466 — llvm/test/CodeGen/X86 vector-deinterleave7-i16.ll vector-deinterleave8-i64.ll

Rebase, address comments

Created using spr 2.0.0-beta.1
DeltaFile
+29,293-0llvm/test/CodeGen/X86/vector-interleave7-i16.ll
+29,228-0llvm/test/CodeGen/X86/vector-interleaved7-i8.ll
+27,225-0llvm/test/CodeGen/X86/vector-interleave7-i32.ll
+26,140-0llvm/test/CodeGen/X86/vector-deinterleave7-i8.ll
+25,861-0llvm/test/CodeGen/X86/vector-deinterleave8-i64.ll
+25,769-0llvm/test/CodeGen/X86/vector-deinterleave7-i16.ll
+163,516-012,300 files not shown
+1,122,276-162,33412,306 files

LLVM/project 4f28d96 — lldb/source/Plugins/SymbolFile/DWARF SymbolFileDWARF.h SymbolFileDWARF.cpp, lldb/test/API/python_api/symbol-context/standalone-debug-line main.s TestStandaloneDebugLine.py

[lldb][DWARF] Support standalone line tables (#217932)

Some ELF binaries, including NVIDIA CUDA images, contain `.debug_line`
without `.debug_info`. LLDB currently ignores these standalone line
tables because SymbolFileDWARF only recognizes `.debug_line` when
`.debug_info` is present.

## Summary

- recognize and parse standalone DWARF `.debug_line` sections when
`.debug_info` is absent
- synthesize compile units, line tables, and address ranges for
address-to-source and source-to-address lookup
- Added methods to DWARFDebugLine to parse sequence ranges without
keeping all the rows in memory.

## Testing

- added a one-object SBAPI test for `.debug_line` + `.symtab` without

    [5 lines not shown]
DeltaFile
+282-35lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
+196-0lldb/test/Shell/SymbolFile/DWARF/x86/standalone-debug-line.s
+63-0lldb/test/API/python_api/symbol-context/standalone-debug-line/TestStandaloneDebugLine.py
+14-0lldb/test/API/python_api/symbol-context/standalone-debug-line/main.s
+12-0lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
+567-355 files

LLVM/project 7e03463 — llvm/lib/Transforms/Scalar ConstraintElimination.cpp

fold isKnownNonPositive into getKnownSign
DeltaFile
+14-23llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+14-231 files

LLVM/project a61f276 — libc/src/__support/fixed_point sqrt.h fx_bits.h, libc/src/stdfix exphk.cpp CMakeLists.txt

[libc][stdfix][NFC] Clean up include paths and CMake dependencies (#241414)

Use paths relative to libc/ and match direct includes with CMake
DEPENDS.

Follows
https://github.com/llvm/llvm-project/pull/240631#discussion_r4532148128.
Follows
https://github.com/llvm/llvm-project/pull/240253#issuecomment-6741353320.

LLM assisted.
DeltaFile
+26-30libc/test/src/stdfix/CMakeLists.txt
+11-7libc/src/__support/fixed_point/CMakeLists.txt
+12-3libc/src/stdfix/CMakeLists.txt
+2-4libc/src/__support/fixed_point/fx_bits.h
+2-3libc/src/__support/fixed_point/sqrt.h
+3-2libc/src/stdfix/exphk.cpp
+56-49200 files not shown
+338-312206 files

LLVM/project c6083a7 — llvm/include/llvm/Transforms/IPO Attributor.h, llvm/lib/Transforms/IPO Attributor.cpp

Attributor: Collect the values only used by assumes on demand

initializeInformationCache tracked the uses of the operands of every
llvm.assume to find the values only used by assumes, but only a few
abstract attributes and OpenMPOpt ask for them, none of which run in
attributor-light. Collect them for a function when they are first asked
for.

Instruction counts (callgrind) of the light passes in the ThinLTO
backend of tramp3d-v4: -5.8%.
CTMark (-attributor-enable=light): O3 -0.03%, ThinLTO -0.02%.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+38-26llvm/lib/Transforms/IPO/Attributor.cpp
+13-1llvm/include/llvm/Transforms/IPO/Attributor.h
+51-272 files

LLVM/project 9dce18f — clang/lib/CIR/CodeGen CIRGenModule.cpp

[CIR] Prune CIR type subtrees when collecting symbol uses (#234811)

applyReplacements builds a symbol user map over the whole module to find
the users of replaced functions, and the generic walk descends into
every nested record of every function signature even though no symbol
reference can hide in a CIR type. Collect only the users of the
functions being replaced, in one pre-order walk that skips CIR type
subtrees, and keep chained replacements working by merging the old users
into the new symbol's set.

On SemaExpr.cpp, applyReplacements drops from 1.7% to 0.4% of compile
samples (perf, cycles).
DeltaFile
+48-12clang/lib/CIR/CodeGen/CIRGenModule.cpp
+48-121 files

LLVM/project 8a166cd — mlir/include/mlir/Dialect/LLVMIR LLVMInterfaces.td LLVMAttrDefs.td, mlir/lib/Target/LLVMIR ModuleImport.cpp

[mlir][llvm] Add tbaa_struct field attrs to the LLVM dialect (#238991)

The LLVM dialect models `!tbaa` access tags but has no representation
for `!tbaa.struct`, so aggregate copies with struct TBAA lose that
metadata in both directions: export drops it, import warns unhandled
metadata.

This PR adds the missing pieces.

The importer declines nodes it cannot model (null tags, empty nodes)
rather than representing them (warning on unhandled metadata), the
MLIR-side verification of LLVM's non-decreasing-offset rule is left out.
DeltaFile
+76-0mlir/test/Target/LLVMIR/Import/metadata-tbaa-struct.ll
+60-0mlir/lib/Target/LLVMIR/ModuleImport.cpp
+50-0mlir/test/Dialect/LLVMIR/invalid.mlir
+37-0mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
+37-0mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
+35-0mlir/test/Target/LLVMIR/Import/import-failure.ll
+295-011 files not shown
+461-817 files

LLVM/project 8cd8d4c — clang/test/CodeGen memprof-pgho.cpp memprof-mempgo.cpp, clang/test/CodeGen/distributed-thin-lto memprof-pgho.cpp memprof-mempgo.cpp

[MemProf][NFC] Standardize on MemPGO terminology and expand docs (#241353)

Documentation, option help strings, header comments, and tests have
referred to LLVM's memory profile-guided optimization framework
inconsistently as "profile guided heap optimization" (PGHO),
"profile-guided memory optimization", and "MemProf". Because the
compiler pipeline optimizes both dynamic heap allocations and static
data layout using profiles from the MemProf instrumentation and runtime,
standardize on "profile-guided memory optimization (MemPGO)" for the
overall optimization framework while reserving "MemProf" for the
profiler, runtime, and profile format.

Updates and expands documentation that was in MemProf.md (now moved to
MemPGO.md with a redirect stub in the old file) to describe more details
about how allocation contexts are classified, the hint values used, and
how matching and LTO whole-program context disambiguation work.

Assisted-by: Gemini
DeltaFile
+297-0llvm/docs/MemPGO.md
+4-286llvm/docs/MemProf.md
+0-69clang/test/CodeGen/distributed-thin-lto/memprof-pgho.cpp
+69-0clang/test/CodeGen/distributed-thin-lto/memprof-mempgo.cpp
+0-61clang/test/CodeGen/memprof-pgho.cpp
+61-0clang/test/CodeGen/memprof-mempgo.cpp
+431-41610 files not shown
+456-43616 files

LLVM/project baa0934 — llvm/lib/Transforms/Utils SimplifyLibCalls.cpp, llvm/test/Transforms/InstCombine ldexp-libcall-to-intrinsic.ll

InstCombine: Fold readnone ldexp libcalls to llvm.ldexp

This was already done for the equivalent scalbn.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+150-0llvm/test/Transforms/InstCombine/ldexp-libcall-to-intrinsic.ll
+3-0llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+153-02 files

LLVM/project d8a278f — llvm/lib/Target/AMDGPU GCNHazardRecognizer.cpp, llvm/test/CodeGen/AMDGPU fdiv.bf16.ll llvm.log2.bf16.ll

[AMDGPU] Mitigate TRANS f16 to partial VGPR write WAW hazard

Fixes: ROCM-33929
DeltaFile
+175-0llvm/test/CodeGen/AMDGPU/hazard-partial-trans-f16-write.mir
+113-0llvm/test/CodeGen/AMDGPU/hazard-partial-trans-f16-write-fake16.mir
+91-0llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+29-16llvm/test/CodeGen/AMDGPU/llvm.exp2.bf16.ll
+24-13llvm/test/CodeGen/AMDGPU/llvm.log2.bf16.ll
+10-7llvm/test/CodeGen/AMDGPU/fdiv.bf16.ll
+442-365 files not shown
+459-4011 files

LLVM/project 6fba582 — llvm/lib/Target/AMDGPU AMDGPUInstCombineIntrinsic.cpp

[AMDGPU] Fix MSVC C4334 warnings (#241389)

Fix warnings C4334 for AMDGPUInstCombineIntrinsic.cpp.
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+1-11 files

LLVM/project 534fa07 — llvm/lib/Transforms/IPO FunctionImport.cpp, llvm/test/ThinLTO/X86 cache-import-order.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+67-0llvm/test/ThinLTO/X86/cache-import-order.ll
+10-1llvm/lib/Transforms/IPO/FunctionImport.cpp
+77-12 files