634,429 commits found in 6 milliseconds
LLVM /project cf91088 — llvm/test/CodeGen/RISCV machine-pipeliner.ll branch-on-zero.ll, llvm/test/CodeGen/RISCV/rvv vandn-sdnode.ll pr95865.ll RISCV: Enable terminal rule (#165961)
AMDGPU: Add med3 tests from minimum/maximum
LLVM /project 8cbe92a — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
LLVM /project b116081 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s rebase
Created using spr 1.3.7
LLVM /project 9220153 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s rebase
Created using spr 1.3.7
LLVM /project a2c76b1 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
LLVM /project eaf9e63 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s rebase
Created using spr 1.3.7
LLVM /project c3c6686 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
LLVM /project 14e8aab — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s rebase
Created using spr 1.3.7
LLVM /project c85da0e — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
LLVM /project 14b24b5 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
LLVM /project 77dc14c — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s rebase
Created using spr 1.3.7
LLVM /project 8a436a3 — bolt/lib/Rewrite DWARFRewriter.cpp, bolt/test/X86/Inputs dwarf5-str-split-dwarf.s dwarf4-str-split-dwarf.s rebase
Created using spr 1.3.7
LLVM /project fc69bfb — llvm/lib/Target/Hexagon HexagonSubtarget.h, llvm/test/CodeGen/Hexagon late_instr.ll swp-carried-1.ll Hexagon: Enable terminal rule (#165960)
I had to hack many hexagon tests to disable the rule. I have
no idea how to update these tests. They appear to be testing specific
scheduling and packet formation of later machine passes, so any change
in the incoming mir is likely hiding whatever was originally intended.
I'll open an issue to fixup these tests once this lands. LLVM /project 2818824 — llvm/include/llvm/Support SpecialCaseList.h, llvm/lib/Support SpecialCaseList.cpp update
Created using spr 1.3.7
LLVM /project dee0afa — bolt/include/bolt/Core DebugData.h, bolt/lib/Rewrite DWARFRewriter.cpp [BOLT][DWARF] Slice .debug_str from the DWP for each CU (#159540)
Slice .debug_str from the DWP for each CU using .debug_str_offsets and
emit it, instead of directly copying the global .debug_str, in order to
address the bloat issue of DWO after updates. (more details here -
#155766 ) remove redundunt methods
Created using spr 1.3.7
AMDGPU: Replace some uses of getOpRegClass with getRegClass
These cases should not depend on an unknown register constraint.
LLVM /project ae50366 — clang/test/OpenMP force-usm.c, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp [OMPIRBuilder] Use AS 0 for internal variables for AMDGPU (#167377)
We see some libomptarget test failures if we use the default global AS.
See https://github.com/llvm/llvm-project/pull/166459 for more info.
Signed-off-by: Nick Sarnie <nick.sarnie at intel.com> LLVM /project e5ed62a — clang/lib/CodeGen CGClass.cpp, llvm/include/llvm/Analysis IndirectCallVisitor.h emit instr intrinsic
LLVM /project 3618ed1 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/RISCV sra-xor-sra.ll [DAGCombiner] Add sra-xor-sra pattern fold (#166777)
Add `fold (sra (xor (sra x, c1), -1), c2) -> (sra (xor x, -1), c3)`
The IR like this:
```
%a = ashr i8 %x, 6
%n = xor i8 %a, -1
%s = sext i8 %n to i16
%r = and i16 %s, %y
ret i16 %r
```
llvm will produce:
```
slli a0, a0, 56
srai a0, a0, 56
not a0, a0
srai a0, a0, 6
[10 lines not shown ] LLVM /project 19d472f — llvm/test/CodeGen/AArch64 ptrauth-call-rv-marker.ll aarch64-reassociate-accumulators.ll AArch64: Convert tests to opaque pointers (#167442)
LLVM /project bdf37f4 — llvm/unittests/Analysis LazyCallGraphTest.cpp AssumeBundleQueriesTest.cpp, llvm/unittests/Transforms/Utils CodeMoverUtilsTest.cpp CodeExtractorTest.cpp unittests: Convert some tests to opaque pointers (#167443)
LLVM /project 499bb27 — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td rebase
Created using spr 1.3.7
Delta File +9,644 -0 clang/include/clang/Options/Options.td +0 -9,644 clang/include/clang/Driver/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,079 files not shown +48,599 -33,793 1,085 files
LLVM /project f6da24d — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +0 -9,644 clang/include/clang/Driver/Options.td +9,644 -0 clang/include/clang/Options/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,079 files not shown +48,599 -33,793 1,085 files
LLVM /project 296e2dc — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td rebase
Created using spr 1.3.7
Delta File +0 -9,644 clang/include/clang/Driver/Options.td +9,644 -0 clang/include/clang/Options/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,079 files not shown +48,599 -33,793 1,085 files
LLVM /project beda066 — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +0 -9,644 clang/include/clang/Driver/Options.td +9,644 -0 clang/include/clang/Options/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,079 files not shown +48,599 -33,793 1,085 files
LLVM /project 08f8ffd — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td rebase
Created using spr 1.3.7
Delta File +9,644 -0 clang/include/clang/Options/Options.td +0 -9,644 clang/include/clang/Driver/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,080 files not shown +48,618 -33,806 1,086 files
LLVM /project 76b1056 — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +9,644 -0 clang/include/clang/Options/Options.td +0 -9,644 clang/include/clang/Driver/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,080 files not shown +48,618 -33,806 1,086 files
LLVM /project 82ac59b — clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td rebase
Created using spr 1.3.7
Delta File +0 -9,644 clang/include/clang/Driver/Options.td +9,644 -0 clang/include/clang/Options/Options.td +3,123 -3,158 llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll +3,106 -0 llvm/test/CodeGen/LoongArch/expandmemcmp.ll +2,633 -0 clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp +1,220 -1,178 llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll +19,726 -13,980 1,080 files not shown +48,618 -33,806 1,086 files
