[git-clang-format] Don't format the line preceding a deletion (#215946)
`git diff -U0` renders a pure deletion as `@@ -3,3 +2,0 @@`: no new
lines,
anchored at the preceding line. extract_lines coerces that zero count to
one, so clang-format reformats a line the deletion never touched.
Skip such hunks, matching clang-format-diff.py. start_line is 0 only for
deletions at the start of a file, so that check goes away as well.
Aided by Claude Opus 5
(cherry picked from commit fe0143b1a97484e10bc11b012ceb2c1ecd8bc38c)
Add option to format a whole file using git-clang-format (#204336)
Today, git-clang-format will only format lines which have been modified.
However, in some cases, that's not sufficient to get a "clean" file
which would be unmodified by running `clang-format` manually.
I've got a minimal repro using the default clang-format rules. Setup a
new git repository and create a commit with an empty file:
```
mkdir /tmp/bla
cd /tmp/bla
git init
touch t.cpp
git add t.cpp
git commit -m "V1"
```
Add a line to that file containing a comment:
[30 lines not shown]
workflows/release-binaries: Smaller WiX installer on Windows (#219858)
Reduce WiX installer size by using LZX compression instead of MSZIP
previously. Tested on `release/23.x` at commit
fdf0409c656cc66c61b14d71c831f2b453c13e19 targetting Win64:
- MSZIP: 779 MiB
- LZX: 613 MiB
(cherry picked from commit dee1f43598034a63b3de521032bb894b33152b1c)
[C++20] [Modules] Handling merging predefined decls from std (#219151)
Close https://github.com/llvm/llvm-project/issues/218152
This was only reported in windows as MSSTL chose to implement std module
by wrapping the STL into extern "C++", which is different from libstdc++
and libc++.
But technically this is not specific to windows and we're able to
preoduce it in linux although we won't face it in linux.
(cherry picked from commit 52774473867e49b5891ab9381accf4e5a3ce0024)
[orc-rt] Move connection state and teardown to SimpleRemoteCA (#220188)
Shares the connection-state and teardown logic between transports.
SimpleRemoteCA now tracks connection state, so disconnect,
callController and sendWrapperResult are final. A controller call either
registers under the same lock that publishes the state, or is failed
inline on the caller's stack, so it can never be left pending with no
result to come. Teardown funnels through finishTeardown, which drains
pending calls and then notifies the Session exactly once, however
teardown began. registerPendingCall and failAllPendingCalls become
private.
Subclasses implement connect plus two hooks. The base calls sendMessage
with an opcode, sequence number, tag and payload for the transport to
frame and send; it runs with no lock held, so framing stays off the
critical section, and is best-effort, so a transport that has gone away
can drop the message. beginTeardown stops the transport, sending an
orderly hang-up first, and calls finishTeardown once it is done.
[4 lines not shown]
[AArch64][PAC] Emit tail calls more efficiently
It may be required to insert explicit checks that LR was authenticated
successfully before performing a tail call. Previously, such checks were
inserted when expanding the TCRETURN pseudo instructions, if the stack
frame was created by the particular function. This did not take into
account the shrink-wrapping optimization, though.
This commit introduces a separate `PAUTH_CHECK_LR` pseudo instruction.
A conservative heuristic is implemented that drops the completely useless
checks. Furthermore, it moves the remaining checks to the shrink-wrapping
epilogue (if any), but only if that doesn't hurt any regular return code
paths.
[libc++][docs][NFC] Remove Format and Parallelism TS status pages (#220021)
Removes the last meta-status pages in favor of GitHub meta-issues.
Co-authored-by: Hristo Hristov <zingam at outlook.com>
[libc++][ranges][enumerate_view] Update iterator `iter_move` test (#219474)
Completes the [range.enumerate.iterator] `iter_move` test by addressing
the review comment
https://github.com/llvm/llvm-project/pull/73617#discussion_r1416642892
from the original implementation.
---------
Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: Hristo Hristov <hghristov.rmm at gmail.com>
Co-authored-by: A. Jiang <de34 at live.cn>
[AArch64][PAC] Prevent PAUTH_EPILOGUE from overwriting live registers
With shrink-wrapping, it is possible for PAUTH_EPILOGUE to be inserted
in the middle of the function where X15/X16/X17 may be alive and must
not be clobbered.
This commit implements ad-hoc spilling of the scratch registers used by
PAUTH_EPILOGUE to other GPRs. If no such registers is available at the
insertion point, an explicit compiler error is triggered.
[AArch64][PAC] Precommit tests on efficient LR checks before tail calls
When performing a tail call with pac-ret hardening enabled, depending on
the performance vs. security trade-off, it may be required to insert an
explicit check that the LR register contains a valid address (that is,
the authentication succeeded), as unlike a regular call, a tail call does
not dereference LR right away.
When shrink-wrapping optimization is in effect, this might be expensive
both in terms of time complexity and code size. This commit adds several
tests demonstrating the existing codegen behavior.
[AArch64][PAC] Fix the list of registers clobbered by PAUTH_EPILOGUE
When SP adjustment might be needed, whether X15 scratch register can be used
by PAUTH_EPILOGUE or not depends on PAuth LR hardening being requested for
the particular function, not the availability of `FEAT_PAuth_LR`.
[Mips] Select GPR register class based on requested type size (#220012)
In MipsTargetLowering::getRegisterByName(), the register class was
previously selected solely based on Subtarget.isGP64bit(), ignoring the
requested value type size (VT).
When compiling for a 64-bit MIPS CPU with the 32-bit o32 ABI (such as
-mcpu=mips3 -target-abi=o32), Subtarget.isGP64bit() is true even though
32-bit registers are expected. Reading a 32-bit named register like $gp
(e.g., via llvm.read_register.i32) returned a 64-bit register ($gp_64).
This resulted in a cross-register-class copy from GPR64 to GPR32 that
MipsSEInstrInfo::copyPhysReg() could not lower. In builds without
assertions, this constructed an invalid TargetOpcode::PHI (opcode 0)
instruction and caused a crash in MipsMCCodeEmitter during object file
emission.
Inspect VT.getSizeInBits() in getRegisterByName() to select
GPR32RegClassID for 32-bit types and GPR64RegClassID for 64-bit types
when supported by the subtarget, reporting an error for invalid types.
[3 lines not shown]
[llvm-mc] Propagate invalid-token errors from byteArrayFromString (#217533)
byteArrayFromString always returned false after skipping an invalid
non-hex token, so llvm-mc exited 0 despite printing errors. Track
whether an error occurred so the process status matches.
[mlir] [linalg] Fold reduce(broadcast(x)) max/min (#213190)
This patch tries to implement the optimization for
```
max(broadcast(x)) -> x # (or replace min)
```
We can extend the optimization to other reduce op like add, mul, and,
or, xor ... in the future. This patch tries to be small by implementing
the simplest case.
AI assisted.
---------
Co-authored-by: yedeng.yd <yedeng.yd at alibaba-inc.com>
[SLP][NFC] Pre-commit test for AArch64 store-to-load forwarding bail-out (#218116)
Add an AArch64 SLP test that locks in the current (pre-feature)
vectorization of a widened backward load that aliases a widened store,
plus a narrow-load control case that never straddles two widened stores.
The follow-up patch adding the store-to-load forwarding cost-model
bail-out will update these checks, making its effect visible as a diff
on a non-X86 target.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
[SandboxVec][LoadStoreVec] Extract LoadStoreVec::vectorizeStores from runOnRegion
Move runOnRegion()'s body -- the store-chain legality checks, operand
classification, vector value construction, and profitability decision
-- into a new vectorizeStores(Bndl, Rgn, Sched, A) method. runOnRegion()
now only builds the initial bundle from the region's Aux and calls
vectorizeStores() once.
Snapshot the region's cost in saveIR() and decide accept vs revert in
acceptOrRevert(), so vectorizeStores() does not thread ScoreBoard or
CostBefore through the profitability check. NFC.
Co-authored-by: Cursor <cursoragent at cursor.com>
AMDGPU: Lowercase the unsupported fence sync scope diagnostic (#220081)
Error messages should start with a lowercase letter per the diagnostic
policy.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
clang/AMDGPU: Diagnose invalid fence sync scope (#220077)
Reject an unrecognized synchronization scope string passed to
__builtin_amdgcn_fence during semantic analysis instead of relying on
the backend to report it during codegen.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[MC,test] Use # comments in llvm-mc --disassemble inputs (#220163)
llvm-mc --disassemble recognizes only # as a comment marker; `//` lead
to invalid-token errors, which will change the exit status after an
upcoming llvm-mc change.
X86: Pass instruction to inline asm register printing helpers (#219473)
printAsmMRegister and printAsmVRegister only used the operand to recover
its parent instruction's inline asm dialect. Pass the containing instruction
directly so they no longer depend on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[LoongArch][Disassembler] Add symbolic operands for decoded immediates (#217971)
Symbolize operands for decoded immediates when possible. This gives
`LoongArchDisassembler` non-raw immediate capabilities similar to that
of `{X86,RISCV}Disassembler`. See also #217550 for similar work on
RISC-V.
This is part of the preparatory work for a future port of BOLT to
LoongArch.
[LAA][NFC] Factor out MemoryDepChecker::isStoreLoadForwardingConflict (#212085)
Extract the store-to-load forwarding conflict predicate used inside
MemoryDepChecker::couldPreventStoreLoadForward into a static helper so
it
can be shared with other consumers (e.g. the SLP vectorizer's STLF cost
model).
The helper takes an optional LoadElementSize so callers that know the
load
width can ask whether the load actually straddles two widened stores:
(a) a misaligned load that starts R = Distance % VectorStoreSize bytes
below a widened-store boundary overruns into the next store only if it
is wider than those R bytes (LoadElementSize > R), and
(b) an aligned load (R == 0) overruns only if it is itself wider than
the
widened store window (LoadElementSize > VectorStoreSize).
LoadElementSize defaults to 0 (unknown width, both terms disabled).
couldPreventStoreLoadForward passes VF as the load width, so (a) reduces
[9 lines not shown]
[GlobalISel] Use integer as the fallback type for getLLTForType. (#218148)
In the test cases this comes up from struct types with a known size,
from an invoke instruction. Using integer as the fallback type for it
seems to work fine.
[clang][bytecode] Allocate functions via Program allocator (#219994)
They have the same lifetime as `Program`, so use the allocator we're
already carrying around.
[X86] Fix ADOX miscompile by restricting COND_O optimization when EFLAGS are used (#220117)
This patch fixes a miscompile where the X86 DAGCombiner aggressively
folds an `ADD` node into an `ADOX` instruction even when the Zero Flag
(ZF) produced by the `ADD` is used by a subsequent branch (e.g., `je`).
