LLVM/project dbd6db4mlir/include/mlir/Interfaces CallInterfaces.td, mlir/lib/Dialect/LLVMIR/IR LLVMDialect.cpp

[mlir][Interfaces] `CallOpInterface`: Model forwarded result + improve verification
DeltaFile
+186-0mlir/test/Interfaces/CallInterfaces/verify-call-op-interface.mlir
+97-1mlir/include/mlir/Interfaces/CallInterfaces.td
+58-34mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+68-0mlir/lib/Interfaces/CallInterfaces.cpp
+64-0mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+41-0mlir/test/lib/Dialect/Test/TestOps.td
+514-3517 files not shown
+680-11623 files

LLVM/project 3779bcblibcxx/test/libcxx/diagnostics unused_variables.verify.cpp, libcxx/test/selftest/pass.cpp werror.pass.cpp

[libc++] Switch the enable_warnings Lit parameter to enable_werror (#214113)

Our enable_warnings=False parameter in the test suite was basically not
working as intended. Instead of disabling warnings, it would disable all
warning-related flags, including flags that are required for the test
suite to pass (e.g. -Wno-user-defined-literals). As a result, it
couldn't be turned off.

Remove enable_warnings and introduce enable_werror instead. That way, we
can disable -Werror in the test suite but the warnings (and -Wno-foo)
are always used, which is necessary for the test suite to function.

Note that the ability to run the test suite without -Werror is necessary
in order to test against other implementations, including older versions
of libc++ itself.
DeltaFile
+0-23libcxx/test/selftest/sh.cpp/werror.sh.cpp
+0-23libcxx/test/selftest/pass.cpp/werror.pass.cpp
+5-6libcxx/utils/libcxx/test/params.py
+1-0libcxx/test/libcxx/diagnostics/unused_variables.verify.cpp
+6-524 files

LLVM/project aa14e4bllvm/test/Transforms/VectorCombine/X86 binop-of-shuffles.ll

[VectorCombine] binop-of-shuffles.ll - add infinite loop regression test from #211530 (#214702)

Prep work before reapplying #211530 with a fix
DeltaFile
+30-0llvm/test/Transforms/VectorCombine/X86/binop-of-shuffles.ll
+30-01 files

LLVM/project e732ce4clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp, clang/test/Analysis/Scalable/PointerFlow multi-dim-pointer-flow-constraint.test multi-decl-contributor.cpp

[SSAF] Close unsafe-buffer reachability over override families

An unsafe pointer reaching one override's parameter is equally unsafe in every
sibling and base override of that method, because the call site picks the
target dynamically. Without closing over the families, reachability depended
on which override the extractor happened to see the flow through, so a fix
suggested for the base could be contradicted by a derived override.

Mirroring is level-preserving: families relate slot entities, so a reachable
EPL propagates only to the same pointer level on its family members.

The closure runs after the pointer-flow DFS has converged and does not feed
its own output back in, so a flow edge out of a newly discovered EPL is still
missed. FamilyClosureDoesNotRerunDFS pins that gap.

§4 of rdar://179151603
DeltaFile
+320-7clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
+92-6clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+1-1clang/test/Analysis/Scalable/PointerFlow/multi-dim-pointer-flow-constraint.test
+1-1clang/test/Analysis/Scalable/PointerFlow/multi-decl-contributor.cpp
+1-1clang/test/Analysis/Scalable/PointerFlow/lref-to-rref-cast.test
+1-1clang/test/Analysis/Scalable/PointerFlow/external-inline-function-in-multi-tu.test
+416-176 files

LLVM/project 8ad180bclang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily VirtualMethodFamily.h, clang/lib/ScalableStaticAnalysis/Analyses CMakeLists.txt

[SSAF] Serialize virtual method summaries and families

Per-TU summaries and whole-program results cross process boundaries, and the
JSON layer refuses to write a summary kind it has no format for. Register both
sides so --ssaf-extract-summaries=VirtualMethod becomes usable and the family
result survives a round trip.

Deserialization tolerates a missing override list, since a root virtual method
legitimately has none.

§3 of rdar://179151603
DeltaFile
+390-0clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/VirtualMethodFamilyFormatTest.cpp
+192-0clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyFormat.cpp
+22-0clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
+5-0clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
+1-0clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
+1-0clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
+611-01 files not shown
+612-07 files

LLVM/project 35e38fbclang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily VirtualMethodFamily.h, clang/include/clang/ScalableStaticAnalysis/Core/Model EntityId.h

[SSAF] Group virtual method slots into override families

A virtual call site can dispatch to any override, so the parameter and return
slots that occupy the same vtable slot across an override chain are
indistinguishable to a caller. Whole-program consumers therefore have to treat
them as one unit or they will reason about a slot that a call never actually
reaches.

Compute those units up front, keyed per slot, so consumers only need a map
lookup rather than their own traversal of the override relation. Overloads
occupy distinct vtable slots and stay in distinct families.

The family representative is the smallest EntityId in the class, which keeps
the result stable across runs.

§2 of rdar://179151603
DeltaFile
+336-0clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysisTest.cpp
+201-0clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
+46-0clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
+11-0clang/include/clang/ScalableStaticAnalysis/Core/Model/EntityId.h
+1-0clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
+1-0clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
+596-01 files not shown
+597-07 files

LLVM/project be7988cclang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily VirtualMethodFamily.h, clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily VirtualMethodEntityExtractor.cpp

[SSAF] Extract the virtual method override relation per TU

A virtual call may dispatch to any override of its callee, so a whole-program
analysis cannot reason about a method's parameters and return value in
isolation. It needs to know which method overrides which, and which slots
that relates. Collect this per TU, so a later pass can join the related
slots into families.

JSON serialization lands separately, so the summary is not writable via
--ssaf-extract-summaries yet.

§1 of rdar://179151603
DeltaFile
+228-0clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyExtractorTest.cpp
+155-0clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyTestSupport.h
+145-0clang/unittests/ScalableStaticAnalysis/ParsedAST.h
+92-0clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodEntityExtractor.cpp
+51-0clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
+1-0clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
+672-02 files not shown
+674-08 files

LLVM/project 5e98d1aclang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily VirtualMethodFamilyExtractorTest.cpp

tmp - Test that three-level chain records only direct override edges

`overridden_methods()` is not transitive. This means that it describes
the directly overridden methods - which is usually a single method
(unless it overrides the same function from multiple parents).

This test case demonstrates that A::f overrides B::f which overrides C::f.
And that it's not that A::f overrides C::f without overriding B::f first.

Assisted-By: claude
DeltaFile
+36-0clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyExtractorTest.cpp
+36-01 files

LLVM/project a982c8fmlir/include/mlir/Interfaces CallInterfaces.td, mlir/lib/Dialect/LLVMIR/IR LLVMDialect.cpp

[mlir][Interfaces] `CallOpInterface`: Model forwarded result + improve verification
DeltaFile
+198-0mlir/test/Interfaces/CallInterfaces/verify-call-op-interface.mlir
+97-1mlir/include/mlir/Interfaces/CallInterfaces.td
+60-35mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+95-0mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+86-0mlir/lib/Interfaces/CallInterfaces.cpp
+62-0mlir/test/lib/Dialect/Test/TestOps.td
+598-3617 files not shown
+788-11723 files

LLVM/project b2f1380lldb/test/API/python_api/value TestValueAPI.py Makefile, lldb/test/API/python_api/value/change_values TestChangeValueAPI.py main.c

[lldb][Windows] Fix value API tests (#214237)

This removes the XFAILs for the value API tests.

- For `lldb/test/API/python_api/value/TestValueAPI.py`, we need to pass
`/debug:symtab` to the linker to get a symbol table. Symbols are
"hidden" by default. PDB works around this in the publics stream. For
DWARF, we need `/debug:symtab`. An alternative is to use `/debug:dwarf`
which also enables this.
- For
`lldb/test/API/python_api/value/change_values/TestChangeValueAPI.py`
there were two issues. First, the stdout wasn't available when we
stopped at a breakpoint. Adding a `fflush(stdout)` fixes this.
Secondly, the breakpoint was created where the inputs to `printf` were
already evaluated. I added another assignment where we set the
breakpoint.

The added `fflush` might also help with this being flakey on Linux
(#26026).

Closes #25146
DeltaFile
+5-0lldb/test/API/python_api/value/Makefile
+3-0lldb/test/API/python_api/value/change_values/main.c
+0-1lldb/test/API/python_api/value/change_values/TestChangeValueAPI.py
+0-1lldb/test/API/python_api/value/TestValueAPI.py
+8-24 files

LLVM/project 21b86ecllvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp, llvm/test/CodeGen/AArch64 neon-shift-left-long.ll

[LLVM][CodeGen][AArch64] Increase opportunities to fold shift-of-extend into sshll/ushll. (#213989)

Add PreprocessISelDAG logic to undo mul-of-shl to shl-of-mul
canonicalisation when either operand is sign/zero extended because the
extension can be folded into the shift.
DeltaFile
+123-0llvm/test/CodeGen/AArch64/neon-shift-left-long.ll
+20-0llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+143-02 files

LLVM/project c45e6b9clang/lib/CIR/CodeGen CIRGenCall.cpp, clang/test/CIR/CodeGenCUDA kernel-call.cu uniform-work-group-size.cu

[CIR] Implement "uniform_work_group_size" func attribute.
DeltaFile
+84-0clang/test/CIR/CodeGenCUDA/uniform-work-group-size.cu
+27-0mlir/test/Target/LLVMIR/llvmir.mlir
+8-8clang/test/CIR/CodeGenCUDA/kernel-call.cu
+12-0mlir/test/Target/LLVMIR/Import/instructions.ll
+9-2clang/lib/CIR/CodeGen/CIRGenCall.cpp
+6-0mlir/test/Target/LLVMIR/Import/function-attributes.ll
+146-108 files not shown
+172-1014 files

LLVM/project 1533fd9clang-tools-extra/clang-tidy/readability MakeMemberFunctionConstCheck.cpp RedundantStringInitCheck.cpp, clang-tools-extra/clang-tidy/utils IncludeSorter.cpp ASTUtils.cpp

[clang-tidy][NFC] Apply readability-redundant-nested-if 3/N (#214693)
DeltaFile
+51-56clang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp
+16-21clang-tools-extra/clang-tidy/utils/ExceptionAnalyzer.cpp
+11-11clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
+10-11clang-tools-extra/clang-tidy/utils/ASTUtils.cpp
+9-11clang-tools-extra/clang-tidy/utils/IncludeSorter.cpp
+6-7clang-tools-extra/clang-tidy/readability/MakeMemberFunctionConstCheck.cpp
+103-11713 files not shown
+160-18019 files

LLVM/project b23965bclang-tools-extra/clang-tidy/google GlobalNamesInHeadersCheck.cpp, clang-tools-extra/clang-tidy/misc ConstCorrectnessCheck.cpp

[clang-tidy][NFC] Apply readability-redundant-nested-if 2/N (#213959)
DeltaFile
+38-38clang-tools-extra/clang-tidy/modernize/LoopConvertUtils.cpp
+18-17clang-tools-extra/clang-tidy/modernize/LoopConvertCheck.cpp
+13-15clang-tools-extra/clang-tidy/google/GlobalNamesInHeadersCheck.cpp
+11-11clang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
+10-11clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
+9-10clang-tools-extra/clang-tidy/modernize/AvoidCStyleCastCheck.cpp
+99-10214 files not shown
+171-18220 files

LLVM/project 14f8ac9clang-tools-extra/clang-tidy/bugprone SuspiciousMemoryComparisonCheck.cpp SizeofExpressionCheck.cpp

[clang-tidy][NFC] Apply readability-redundant-nested-if 1/N (#213939)
DeltaFile
+27-30clang-tools-extra/clang-tidy/bugprone/NotNullTerminatedResultCheck.cpp
+16-17clang-tools-extra/clang-tidy/bugprone/ArgumentCommentCheck.cpp
+15-16clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
+10-11clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.cpp
+8-9clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
+7-8clang-tools-extra/clang-tidy/bugprone/SuspiciousMemoryComparisonCheck.cpp
+83-9114 files not shown
+138-15020 files

LLVM/project bc495dallvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/RISCV/rvv partial-reduction-add.ll

[SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (#210351)

This PR implements constant folding for `ISD::PARTIAL_REDUCE_SMLA`,
`ISD::PARTIAL_REDUCE_UMLA`, and `ISD::PARTIAL_REDUCE_SUMLA` when their
operands are constant `BUILD_VECTOR`s. The fold computes the partial
reduction using `APInt` arithmetic and returns a folded `BUILD_VECTOR`.

Input constants are truncated to their logical element width before
being sign- or zero-extended as required by each opcode. Input lane `I`
is accumulated into result lane `I % NumAccElts`, matching
`TargetLowering::expandPartialReduceMLA`. The reduction order is
deliberately unspecified, so this mapping is a valid refinement.

Poison is propagated only to the affected result lanes. Folding is
skipped for undef and opaque constants. Unsupported operand forms return
early because partial-reduce nodes have no scalar form and must not fall
through to generic per-element folding. After type legalization, when
the accumulator element type is not a legal scalar type, the folded
constants are created in the promoted legal type (matching the generic

    [13 lines not shown]
DeltaFile
+120-1llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
+82-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+73-0llvm/test/CodeGen/RISCV/rvv/partial-reduction-add.ll
+275-13 files

LLVM/project b6746a3clang-tools-extra/docs/clang-tidy/checks/fuchsia virtual-inheritance.md trailing-return.rst

[clang-tidy][docs] Normalize fuchsia check documentation links (#214697)

Use stable fuchsia.dev URLs without `?hl=en` and add the missing
reference on `fuchsia-temporary-objects`.

Fixes #62334
DeltaFile
+1-1clang-tools-extra/docs/clang-tidy/checks/fuchsia/virtual-inheritance.md
+1-1clang-tools-extra/docs/clang-tidy/checks/fuchsia/trailing-return.rst
+1-1clang-tools-extra/docs/clang-tidy/checks/fuchsia/statically-constructed-objects.rst
+1-1clang-tools-extra/docs/clang-tidy/checks/fuchsia/overloaded-operator.md
+1-1clang-tools-extra/docs/clang-tidy/checks/fuchsia/multiple-inheritance.md
+2-0clang-tools-extra/docs/clang-tidy/checks/fuchsia/temporary-objects.rst
+7-52 files not shown
+9-78 files

LLVM/project 25e2c68llvm/lib/Transforms/Vectorize VPlanAnalysis.cpp, llvm/test/Transforms/LoopVectorize revec-reg-usage.ll

[LV][REVEC] Correctly compute register usage

For REVEC, the initial types might already be vectors, so make sure the
right register class is picked.
DeltaFile
+39-0llvm/test/Transforms/LoopVectorize/revec-reg-usage.ll
+17-12llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+56-122 files

LLVM/project 31ba2c4llvm/test/Transforms/LoopVectorize revec-unroll.ll

Update test after rebase
DeltaFile
+1-1llvm/test/Transforms/LoopVectorize/revec-unroll.ll
+1-11 files

LLVM/project c7eb31ellvm/lib/Transforms/Vectorize VPlanRecipes.cpp

Restore type checks in computeScalarTypeForInstruction()
DeltaFile
+7-0llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+7-01 files

LLVM/project 61f1220llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.cpp, llvm/test/Transforms/LoopVectorize revec-maximize-bandwidth.ll

Revert REVEC-specific useMaxBandwidth() change and add tests
DeltaFile
+50-0llvm/test/Transforms/LoopVectorize/AArch64/revec-maximize-bandwidth.ll
+45-0llvm/test/Transforms/LoopVectorize/revec-maximize-bandwidth.ll
+1-3llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
+96-33 files

LLVM/project 6184586llvm/lib/Target/AArch64 AArch64TargetTransformInfo.h, llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.cpp LoopVectorizationLegality.cpp

Stop using isElementTypeLegalForScalableVector as type check for REVEC
DeltaFile
+5-10llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+0-9llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
+2-7llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
+7-263 files

LLVM/project 629ececllvm/lib/Transforms/Vectorize VPlan.h VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize revec-liveout.ll

Test get(VPV, LaneIdx) for "vector lanes"

This requires a slight adjustment to type asserts in
VPInstruction::execute to be safe for REVEC.
DeltaFile
+77-0llvm/test/Transforms/LoopVectorize/revec-liveout.ll
+8-4llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+2-1llvm/lib/Transforms/Vectorize/VPlan.h
+87-53 files

LLVM/project 384387bllvm/test/Transforms/LoopVectorize/AArch64 revec-memory-interleaved.ll revec-memory-contiguous.ll

[LV][REVEC][AArch64] Proof of concept for re-vectorisation

This shows the changes required to enable basic re-vectorisation support in LoopVectorizer. Most of the diff comes from the added tests, the changes to LoopVectorizer files are rather minimal. This proof-of-concept has obvious limitations and only represents the first building block.

My hope is that this helps discussions and complements the RFC at https://discourse.llvm.org/t/rfc-re-vectorisation-to-wider-vectors-in-loopvectorizer/91071.

Support for re-vectorisation is hidden behind a -vectorize-vector-loops flag and LV will bail out if it encounters constructs that are not yet supported. For example:
 - shufflevectors
 - gather/scatter and interleaved accesses
 - target intrinsics
 - reductions
 - if-conversion or tail folding
DeltaFile
+293-0llvm/test/Transforms/LoopVectorize/AArch64/revec-select.ll
+118-0llvm/test/Transforms/LoopVectorize/AArch64/revec-memory-gather-scatter.ll
+102-0llvm/test/Transforms/LoopVectorize/AArch64/revec-predication.ll
+100-0llvm/test/Transforms/LoopVectorize/AArch64/revec-unroll.ll
+90-0llvm/test/Transforms/LoopVectorize/AArch64/revec-memory-contiguous.ll
+89-0llvm/test/Transforms/LoopVectorize/AArch64/revec-memory-interleaved.ll
+792-013 files not shown
+1,170-4119 files

LLVM/project 44640dallvm/test/Transforms/LoopVectorize revec-predication.ll revec-memory-gather-scatter.ll, llvm/test/Transforms/LoopVectorize/AArch64 revec-predication.ll revec-memory-gather-scatter.ll

Remove aarch64 triple and move tests out of AArch64/
DeltaFile
+0-293llvm/test/Transforms/LoopVectorize/AArch64/revec-select.ll
+293-0llvm/test/Transforms/LoopVectorize/revec-select.ll
+119-0llvm/test/Transforms/LoopVectorize/revec-memory-gather-scatter.ll
+0-118llvm/test/Transforms/LoopVectorize/AArch64/revec-memory-gather-scatter.ll
+103-0llvm/test/Transforms/LoopVectorize/revec-predication.ll
+0-102llvm/test/Transforms/LoopVectorize/AArch64/revec-predication.ll
+515-51312 files not shown
+962-95918 files

LLVM/project 59040f8llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

Support expansion to shufflevector
DeltaFile
+68-0llvm/test/CodeGen/AArch64/vector-broadcast.ll
+19-0llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+3-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+90-03 files

LLVM/project d717b71llvm/docs LangRef.md

Update LangRef
DeltaFile
+26-0llvm/docs/LangRef.md
+26-01 files

LLVM/project f399c1cllvm/lib/CodeGen/SelectionDAG LegalizeTypes.h LegalizeVectorTypes.cpp, llvm/test/CodeGen/AArch64 sve-vector-broadcast.ll

Support splitting results
DeltaFile
+51-0llvm/test/CodeGen/AArch64/sve-vector-broadcast.ll
+46-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+98-03 files

LLVM/project eaa9029llvm/include/llvm/IR Intrinsics.td, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp LegalizeIntegerTypes.cpp

[IR] Define llvm.vector.broadcast intrinsic

This is used broadcast a smaller vector into a wider one. The patch adds
basic legalisation support and ISel for AArch64.
DeltaFile
+318-0llvm/test/CodeGen/AArch64/sve-vector-broadcast.ll
+36-6llvm/lib/Target/AArch64/SVEInstrFormats.td
+30-0llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+12-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+9-0llvm/test/CodeGen/AArch64/sve-vector-broadcast-unsupported.ll
+7-0llvm/include/llvm/IR/Intrinsics.td
+412-65 files not shown
+430-611 files

LLVM/project 62537bellvm/test/Transforms/LoopVectorize compress-store-vec-epilogue.ll compress-idioms.ll

Rebase fixups
DeltaFile
+8-8llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+3-3llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
+11-112 files