[orc-rt] Reorder wrapper-fn args to trailing-callback style. (#212243)
Bring the wrapper-function call and return prototypes into line with the
convention adopted for orc_rt_Session_callController: the session handle
comes first, then the payload buffer, then the completion callback
immediately followed by its threaded token, with the token last.
orc_rt_WrapperFunctionReturn: (S, CallId, ResultBytes)
-> (S, ResultBytes, CallId)
orc_rt_WrapperFunction: (S, CallId, Return, ArgBytes)
-> (S, ArgBytes, Return, CallId)
The C++ adapters that mirror these signatures are updated to match --
WrapperFunction::handle, SPSWrapperFunction::handle, the
ORC_RT_SPS_WRAPPER macro, and StructuredYield -- along with the Session
dispatch path and the affected unit tests. No functional change beyond
argument order.
[MLIR][LLVM] Preserve default function attributes on invokes (#212263)
Represent `default_func_attrs` on `LLVM::InvokeOp` and translate the
collection onto the generated LLVM invoke instruction. Preserve default
call-site attributes when throwing calls are lowered through the LLVM
dialect, including CIR `try_call` operations.
[InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (#212101)
Followup of #211991. icmp ptrtoint, ptrtoint cannot be folded away for
non-integral pointers, this is only possible with ptrtoaddr.
For consistency, this also restricts the inttoptr direction, which
causes the change in the phase ordering test. (Note that in this
particular case, not doing the folding is actualle beneficial, as it
keeps the inttoptr-inttoptr comparison outside the loop avoiding one
comparison inside the loop. I wouldn't expect any practical impact,
though.)
AMDGPU: Fix missing extended-image-insts missing from feature map
Unsurprisingly, this manually maintained table is buggy.
fillAMDGCNFeatureMap never set extended-image-insts, so clang's builtin
feature check rejected every case. The tests were working around this with
manually specified -target-features flags.
Co-authored-by: Claude (Claude-Opus-4.8)
[RISCV][P-Ext] Unify pncvt(h) intrinsics between RV32 and RV64. (#210996)
Use __builtin_convertvector for pncvt and __builtin_shufflevector for
pncvth.
Alternatively we could use shift+__builtin_convertvector for pncvth but
that requires combining psrl+unzip(8/16)p to unzip(8/16)hp. I'm not sure
which is better right now.
[RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (#210429)
`CLMUL` and `CLMULH` currently expand for fixed vector types on RISC-V,
even if `Zvbc` and/or `Zvbc32e` are available. Add custom lowering to
convert to scalable vector operations according to extension
availability.
Assisted-by: Claude Opus 4.8
[flang][NFC] Extract StackArrays analysis and rewrite into a header - memory passes unification [1/5] (#210721)
Move InsertionPoint, StackArraysAnalysisWrapper, and AllocMemConversion
out of the anonymous namespace in StackArrays.cpp into a new
StackArrays.h header (in namespace fir), so the "which fir.allocmem can
be safely moved to the stack, and where" analysis and the heap-to-stack
rewrite pattern can be reused by other passes.
The dataflow internals (AllocationState, LatticePoint,
AllocationAnalysis), the command-line options, and all method
definitions remain in the .cpp. No functional change intended.
RFC:
https://discourse.llvm.org/t/rfc-flang-improving-temporary-and-local-array-allocations-unify-stackarray-memoryallocation/91353
Assisted-by: AI
[DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR (#210905)
The `insert_vector_elt -> build_vector` fold requires the source
`BUILD_VECTOR` to have a single use, to avoid duplicating it. Allow it
for a multi-use base when the target sets
`aggressivelyPreferBuildVectorSources`: a `BUILD_VECTOR` is just glue
there (e.g. `REG_SEQUENCE` on AMDGPU), so rebuilding re-references the
base's existing scalar operands and adds no real work. This un-shares a
CSE-shared base produced by `insertelement` on a poison vector, so each
derived vector is built from scalars independently, as GlobalISel
already does.
The gate mirrors the sibling `extract_vector_elt` fold: `hasOneUse() ||
TLI.aggressivelyPreferBuildVectorSources(VT)`.
Split out from #199631 per review. Opted-in targets are AMDGPU, NVPTX,
and AArch64: AMDGPU and NVPTX improve, AArch64 is unchanged; non-opted
targets are unaffected. Affected AMDGPU and NVPTX tests are regenerated.
[2 lines not shown]
[libc] Fix atexit_test in hermetic mode (#210656)
We never unlocked the ThreadAtExit mutex, which meant the second call to
exit deadlocked. This was detected in the unit tests as they were
calling __cxa_thread_atexit from the system C library.
[ASan] Instrument ptrtoaddr as pointer difference (#211988)
We want to emit ptrtoaddr instead of ptrtoint for pointer differences to
not expose the provenance. Adjust ASan instrumentation to handle this
case as well.
[SampleProfile] Fix symbol partitioning in Eytzinger name table (#211906)
This patch fixes the symbol partitioning between context-sensitive
and flat profiles in writeEytzingerNameTableSection.
In split-layout profiles, top-level symbols in the Eytzinger name
table are partitioned into two bins -- context-sensitive and flat keys
-- so that they form parallel arrays with function offsets.
Without this patch, writeEytzingerNameTableSection uses:
if (Ctx.hasContext())
to decide which bin to use even though splitProfileMapToTwo uses:
if (!I.second.getCallsiteSamples().empty())
to partition the profile. This difference causes certain symbols to
be classified into FlatKeys in the name table but into
[13 lines not shown]
[libc++] Implement P0528R3 `std::atomic` CAS for types with padding (#76180)
Fixes #99984
Implement P0528R3 The Curious Case of Padding Bits, Featuring Atomic
Compare-and-Exchange
The unit test padding.pass.cpp is assisted by Cursor. However, all tests
have been modified to test what I wanted to test
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
[CIR][OpenCL] Attach kernel argument metadata to CIR functions
Emit the CIR OpenCL kernel argument metadata attribute for kernel functions. Preserve CIR language address-space kinds until lowering and include argument names only when `-cl-kernel-arg-info` is enabled.
AMDGPU: Declare FeatureDPP with AMDGPUSubtargetFeature (#212408)
All other features were defined using the AMDGPUSubtargetFeature
subclass of SubtargetFeature, so fix the odd one out.
[Clang] Implement P3658R1 (#212131)
As a DR in all C++ language modes.
Because we already supported the feature this is only modifying the
extensions warnings.
AMDGPU: Declare FeatureDPP with AMDGPUSubtargetFeature
All other features were defined using the AMDGPUSubtargetFeature subclass
of SubtargetFeature, so fix the odd one out.
Revert "[RISCV] Add TuneNoDefaultUnroll to generic CPUs (#135318)" (#212400)
This reverts commit 9c5858eb699390c2cac5f7f032279be275fa6aef which
causes some regressions.
AMDGPU: Handle more TargetParser queries in tablegen
Previously we had various enum switches. Start generated tables
indexed by enums. Avoid some special cases by defining the dummy
"generic" and "generic-hsa" targets as real processors.
Co-authored-by: Claude (Claude-Opus-4.8)
AMDGPU: Generate TargetParser table from TableGen
Migrate .def file to tablegen. The initial TargetParser
AMDGPU backend only handled R600. Extend to modern targets.
Stub out some tablegen definitions which will be used in future
changes.
Co-authored-by: Claude (Claude-Opus-4.8)
[mlir][OpenACC] Lower single-block thread-only array reductions (#212369)
Example:
```fortran
!$acc parallel loop vector reduction(+:b)
do i = 1, n
b(i) = i
end do
```
In this code the array reduction is thread(vector)-only with no
gang/block launch dim, so a within-block `all_reduce` is a complete
reduction. ACCCGToGPU still rejected it as NYI because the accumulate
had no block context.
Fix: keep the NYI only when the region actually launches block
dimensions; allow the existing per-element `all_reduce` path for
single-block thread-only array accumulates.
[NVPTX] Emit some more PTX directives through target streamer (#212070)
Move `.branchtargets`, `.reg`, `.local`, `.alias`, `.pragma`, and the
empty `.debug_macinfo` section out of hand-built strings in
`NVPTXAsmPrinter` and into `NVPTXTargetStreamer` hooks.
Opportunistically pulled at a few other threads that could use cleanup
as well.
Three behavior changes:
1. Jump table labels now come from `MachineFunction::getJTISymbol`, so
`$L_brx_<idx>` becomes `JTI<func>_<idx>` and is no longer shared across
functions
2. `.alias` names its aliasee by mangled symbol rather than raw IR name,
fixing `.alias a, ;` for an unnamed aliasee.
3. The rest of the test diff is a duplicated blank line that functions
with no register declarations no longer emit.
Co-Authored by Opus 5
