LLVM/project a91e271llvm/test/CodeGen/X86 madd.ll

[X86] madd.ll - add additional tests for matchPMADDWD folds that fail with larger source types (#205362)

matchPMADDWD handles sext/shl cases as well which don't fold either on SSE/AVX512 targets
DeltaFile
+130-26llvm/test/CodeGen/X86/madd.ll
+130-261 files

LLVM/project b31886alibcxx/test/std/ranges/range.adaptors/range.drop ctor.view.pass.cpp, libcxx/test/std/ranges/range.adaptors/range.drop.while ctor.view.pass.cpp

[libc++][ranges] Backport P2711R1: Making multi-param constructors of views explicit (#190513)

As discussed in https://gcc.gnu.org/PR114298 - GCC and MSVC STL
implemented P2711R1 as a DR. This PR does the same for libc++.

Co-authored-by: A. Jiang <de34 at live.cn>
DeltaFile
+1-23libcxx/test/std/ranges/range.factories/range.iota.view/ctor.first.last.pass.cpp
+1-22libcxx/test/std/ranges/range.factories/range.iota.view/ctor.value.bound.pass.cpp
+1-11libcxx/test/std/ranges/range.adaptors/range.split/ctor.range.pass.cpp
+1-11libcxx/test/std/ranges/range.adaptors/range.lazy.split/ctor.range.pass.cpp
+1-10libcxx/test/std/ranges/range.adaptors/range.drop.while/ctor.view.pass.cpp
+1-10libcxx/test/std/ranges/range.adaptors/range.drop/ctor.view.pass.cpp
+6-8717 files not shown
+28-17223 files

LLVM/project db31a66llvm/docs Docker.rst

[docs] Fix typo in Docker.rst (#205346)

Small typo fix in the Docker documentation: Debian8 -> Debian12.

Signed-off-by: Felipe Novais <contact at felipenovais.com>
DeltaFile
+1-1llvm/docs/Docker.rst
+1-11 files

LLVM/project 83528baclang-tools-extra/clangd/unittests CodeCompleteTests.cpp, clang/docs ReleaseNotes.rst

[clangd] fix preprocessor caching-lexer state tracking (#203716)

Fix `recomputeCurLexerKind` to avoid default fallback to
`CurLexerCallback = CLK_CachingLexer;`.

This prevents code-completion EOF handling from accidentally restoring
CLK_CachingLexer while a tentative parse is still active, which could
trigger a caching lexer re-entry assertion in clangd signature help.

Fixes https://github.com/llvm/llvm-project/issues/200677

---------

Signed-off-by: yronglin <yronglin777 at gmail.com>
DeltaFile
+17-0clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
+4-2clang/lib/Lex/Preprocessor.cpp
+1-5clang/include/clang/Lex/Preprocessor.h
+2-4clang/lib/Lex/PPCaching.cpp
+3-0clang/docs/ReleaseNotes.rst
+1-1clang/lib/Lex/PPLexerChange.cpp
+28-126 files

LLVM/project 62c9839llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp, llvm/test/CodeGen/RISCV/rvv vp-splice-mask-vectors.ll vp-splice.ll

[LegalizeTypes] Fix incorrect EVL1 clip in SplitVecRes_VP_SPLICE. (#205021)

We were incorrectly clipping EVL1 to be a valid index for the VT, in the
range [0, VT.getNumVectorElements() - 1]. It is legal for EVL1 to be
equal to VT.getNumVectorElements() here so that was incorrect.

In case it isn't clear, the clip is necessary to prevent turning poison
into UB by accessing outside the temporary stack object.
DeltaFile
+176-188llvm/test/CodeGen/RISCV/rvv/vp-splice-mask-vectors.ll
+73-77llvm/test/CodeGen/RISCV/rvv/vp-splice.ll
+8-1llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+257-2663 files

LLVM/project fdb70dfllvm/lib/Target/RISCV RISCVMoveMerger.cpp RISCVInstrInfo.cpp, llvm/test/CodeGen/RISCV rv32p.ll rv32-merge-non-arg-reg.mir

[RISCV][P-ext] Add mvd alias for padd.dw rd, zero, rs. Use for copy idiom. (#205223)

See https://github.com/riscv/riscv-p-spec/pull/304

I've refactored the MoveMerge code to use copyPhysReg to avoid duplication.
DeltaFile
+6-22llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
+7-7llvm/test/CodeGen/RISCV/rv32p.ll
+2-2llvm/test/CodeGen/RISCV/rv32-merge-non-arg-reg.mir
+2-2llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+4-0llvm/test/MC/RISCV/rv32p-aliases-valid.s
+1-1llvm/test/CodeGen/RISCV/rv32-move-merge.ll
+22-345 files not shown
+28-3811 files

LLVM/project 0ce76c7clang/lib/Format CMakeLists.txt

[clang-format] Don't check the format if diff is unavailable (#205036)
DeltaFile
+21-15clang/lib/Format/CMakeLists.txt
+21-151 files

LLVM/project 820314fclang/lib/Tooling DependencyScanningTool.cpp, clang/test/ClangScanDeps modules-full-by-mult-mod-names-diagnostics.c

[clang][Dependency Scanning] Fix the Input File for By-Name Lookup's Input CC1 Command Line (#205214)

When the command line is a CC1 command, the scanner does not append the
fake input file to the command line when initializing the compiler
instance. This PR fixes that by passing the compiler instance
initialization the correct modified command line. Without specifying the
fake input file, clang picks up `-` as its input.

An observable behavior is that the diagnostics are pointing to incorrect
files for cc1 commands, hence a test is added to check the diagnostics
messages contain the correct file name.
DeltaFile
+14-0clang/test/ClangScanDeps/modules-full-by-mult-mod-names-diagnostics.c
+3-2clang/lib/Tooling/DependencyScanningTool.cpp
+17-22 files

LLVM/project 7befba8llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp

Silence conversion warning; NFC (#205357)

This was triggering a conversion warning in MSVC.
DeltaFile
+1-1llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+1-11 files

LLVM/project dc658f1libc/src/libgen dirname.cpp basename.cpp, libc/test/src/libgen dirname_test.cpp basename_test.cpp

Reland "[libc] Implement basename and dirname in libgen.h #204554" (#205352)

Added the POSIX standard functions basename and dirname under a new libgen.h header. The implementations modify the input path in-place using cpp::string_view to determine boundaries safely.

Added find_last_not_of to cpp::string_view to support trailing slash removal.

Implemented:

libc/include/libgen.yaml, libgen.h.def: Public API definitions.
libc/src/libgen/basename.cpp, dirname.cpp: Generic implementations.
libc/test/src/libgen/: Unit and hermetic tests.
Registered the new entrypoints for all active Linux targets (x86_64, aarch64, arm, riscv) and added docgen configuration.

The tests are skipped when using ASan because death tests do not currently work with them.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+74-0libc/test/src/libgen/dirname_test.cpp
+62-0libc/test/src/libgen/basename_test.cpp
+48-0libc/src/libgen/dirname.cpp
+45-0libc/test/src/libgen/CMakeLists.txt
+42-0libc/src/libgen/basename.cpp
+30-0libc/src/libgen/dirname.h
+301-016 files not shown
+460-022 files

LLVM/project 34b6e1cmlir/include/mlir/Dialect/Arith/IR ArithOps.td, mlir/lib/Dialect/Arith/IR ArithOps.cpp

[mlir][arith] Reject signful integer element types in `arith.constant` (#204937)

Update arith.constant verification to reject integer constants with
signed and unsigned element types including shaped constants like
tensors and vectors, as the arith dialect does not support
signed/unsigned types.

This incidentally address cases where further lowering would crash (e.g.
SPIR-V constant lowering used IntegerAttr::getInt() on an unsigned
integer attribute from tensor<2xui8>)

Fixes #204911
DeltaFile
+16-0mlir/test/Dialect/Arith/invalid.mlir
+6-6mlir/test/Dialect/common_folders.mlir
+2-6mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+0-8mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
+2-2mlir/test/lib/Dialect/Test/TestOps.td
+2-2mlir/lib/Dialect/Arith/IR/ArithOps.cpp
+28-246 files

LLVM/project f8aa5f6llvm/lib/Target/Hexagon HexagonAsmPrinter.cpp HexagonISelLowering.cpp, llvm/test/CodeGen/Hexagon kcfi.ll

[Hexagon] Add KCFI support for forward-edge control flow integrity (#191746)

Add KCFI support for Hexagon. KCFI provides lightweight forward-edge CFI
for indirect calls by embedding a type hash before each function and
checking it before indirect calls, without requiring LTO.
DeltaFile
+191-0llvm/test/CodeGen/Hexagon/kcfi.ll
+109-0llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
+27-0llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+10-0llvm/lib/Target/Hexagon/HexagonPseudo.td
+6-0llvm/lib/Target/Hexagon/HexagonISelLowering.h
+4-0llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
+347-02 files not shown
+354-08 files

LLVM/project 7337fe1clang/lib/Basic Builtins.cpp, clang/test/AST builtin-name-registration.c

[clang] Avoid per-builtin std::string allocation in initializeBuiltins (#205162)

`initializeBuiltins()` previously registered every builtin through an
allocated std::string every time a `CompilerInstance` initialized. This
was hot for module-heavy builds, where each built module re-registered
the full set.

Add `getBuiltinNameInto()`, which writes the name into a caller-provided
buffer and returns a `StringRef`, with no allocation when the shard has
no prefix (the common case). `Info::getName` now delegates to it so the
two cannot diverge. This change is output behavior-preserving.

Resolves: rdar://178672190
DeltaFile
+19-4clang/lib/Basic/Builtins.cpp
+12-0clang/test/AST/builtin-name-registration.c
+31-42 files

LLVM/project a4a59dellvm/test/Transforms/LoopVectorize/AArch64 interleave-with-gaps.ll

[LV][NFC] Add SVE tests for masked interleaved accesses with gaps (#205330)
DeltaFile
+1,325-168llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
+1,325-1681 files

LLVM/project 9698d0blibc/src/stdlib qsort_s.cpp qsort_s.h, libc/test/src/stdlib qsort_s_test.cpp

Address comments
DeltaFile
+14-7libc/test/src/stdlib/qsort_s_test.cpp
+8-5libc/src/stdlib/qsort_s.cpp
+7-2libc/src/stdlib/qsort_s.h
+29-143 files

LLVM/project 3f52675clang/test/CXX/drs cwg5xx.cpp, clang/www cxx_dr_status.html

[clang] Update C++ DR status page (#205342)

The post-Brno draft will not be out for three more weeks, but Brno
updates for Core issues statuses are already trickling in.

Notably, [CWG507](https://cplusplus.github.io/CWG/issues/507.html)
"Ambiguity with built-in binary operator candidates for class object
convertible to built-in type", which used to be marked as a duplicate of
[CWG260](https://cplusplus.github.io/CWG/issues/260.html) "User-defined
conversions and built-in `operator=`", is open again, presumably because
it contains an example that goes beyond the scope of CWG260. Relatively
recent CWG thread that might be related (WG21 access required):
[link](https://lists.isocpp.org/core/2025/08/18478.php).
DeltaFile
+75-33clang/www/cxx_dr_status.html
+0-3clang/test/CXX/drs/cwg5xx.cpp
+75-362 files

LLVM/project 8ea065borc-rt/include/orc-rt SPSAllocAction.h, orc-rt/unittests SPSAllocActionTest.cpp

[orc-rt] Add ORC_RT_SPS_ALLOC_ACTION helper macro. (#205339)

ORC_RT_SPS_ALLOC_ACTION(Name, SPSArgs, Handle) is shorthand for defining
an allocation-action wrapper function whose arguments are SPS-encoded.
It expands to:

    static orc_rt_WrapperFunctionBuffer Name(const char *ArgData,
                                             size_t ArgSize);

with a body that deserializes ArgData via
SPSAllocActionFunction<SPSArgs...> and forwards the decoded arguments to
Handle.

SPSArgs is given as a parenthesized comma-separated list of SPS argument
types — e.g. (int32_t, int32_t) — stripped at expansion time via
ORC_RT_DEPAREN.
DeltaFile
+24-0orc-rt/unittests/SPSAllocActionTest.cpp
+19-0orc-rt/include/orc-rt/SPSAllocAction.h
+43-02 files

LLVM/project 86d380elibc/include sched.yaml, libc/src/sched sched_clrcpuset.h CMakeLists.txt

[libc] Add CPU_CLR(_S) macros (#204590)

This patch implements CPU_CLR and CPU_CLR_S macros following the
existing CPU_SET pattern. The macro just forwards to an internal entry
point.

Assisted by Gemini.
DeltaFile
+36-0libc/src/sched/linux/sched_clrcpuset.cpp
+28-0libc/src/sched/sched_clrcpuset.h
+15-0libc/src/sched/linux/CMakeLists.txt
+9-0libc/test/src/sched/cpu_count_test.cpp
+8-0libc/include/sched.yaml
+7-0libc/src/sched/CMakeLists.txt
+103-05 files not shown
+109-011 files

LLVM/project d957d2fclang/include/clang/StaticAnalyzer/Core/PathSensitive SVals.h

[analyzer] Allow SVals as llvm::Immutable{Map,Set} keys (#205319)

This will allow maps and sets being declared:
```
REGISTER_MAP_WITH_PROGRAMSTATE(MyMap, SVal, SVal)
REGISTER_SET_WITH_PROGRAMSTATE(MySet, SVal)
```
DeltaFile
+30-1clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h
+30-11 files

LLVM/project 60b3b30clang/utils/TableGen CIRLoweringEmitter.cpp

[CIR][NFC] Rename zero result flag variable (#205242)

###summary

This is a follow up of https://github.com/llvm/llvm-project/pull/202273

Just a light patch for renaming the zero result flag variable.
DeltaFile
+2-2clang/utils/TableGen/CIRLoweringEmitter.cpp
+2-21 files

LLVM/project 2b22c80libcxx/test/std/utilities/expected/expected.expected/observers has_error.pass.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

Merge branch 'main' into users/usx95/06-23-make_liveness_more_precise
DeltaFile
+130-50llvm/test/CodeGen/ARM/vcombine.ll
+174-0llvm/test/CodeGen/AMDGPU/usubo.ll
+164-0llvm/test/CodeGen/AMDGPU/uaddo.ll
+57-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+47-7llvm/test/CodeGen/AArch64/arm64-fpenv.ll
+42-0libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
+614-5768 files not shown
+1,002-17174 files

LLVM/project ab1ef45clang/test/SemaCXX warn-memset-bad-sizeof.cpp

[Clang][Test] Fix warn-memset-bad-sizeof.cpp after #183004 (#205201)

The new `-Wstringop-overread` warning (added in #183004) fires on the
SemaCXX test warn-memset-bad-sizeof.cpp. This happens on targets where
unsigned matches size_t, such as 32-bit ARM, because clang will match
the declaration with the builtin prototype (specifically, argument
`unsigned n`).

Suppress the warning since this test is exercising
`-Wsizeof-pointer-memaccess`, not source buffer overreads.

Fixes:
- https://lab.llvm.org/buildbot/#/builders/154/builds/32985
- https://lab.llvm.org/buildbot/#/builders/135/builds/3888
- https://lab.llvm.org/buildbot/#/builders/38/builds/9363
DeltaFile
+1-1clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
+1-11 files

LLVM/project 45a65bblibcxx/include version, libcxx/include/__expected expected.h

[libc++]  P3798R1: The unexpected in std::expected (#204826)

Closes #204394

Implements P3798 and related tests.

Applies the paper as a Defect Report per https://wg21.link/P3798/github.
DeltaFile
+42-0libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
+42-0libcxx/test/std/utilities/expected/expected.void/observers/has_error.pass.cpp
+4-4libcxx/test/std/language.support/support.limits/support.limits.general/expected.version.compile.pass.cpp
+4-4libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
+4-0libcxx/include/__expected/expected.h
+2-2libcxx/include/version
+98-105 files not shown
+104-1311 files

LLVM/project 58b0681clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

LifetimeCaptureByAttr
DeltaFile
+6-4clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+6-41 files

LLVM/project 1416b5fllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/lib/Target/AMDGPU SIISelLowering.cpp SIISelLowering.h

[AMDGPU][DAGCombiner] Fix UADDO/USUBO_CARRY carry-out miscompile and remove redundant AMDGPU combine (#204362)

performAddCarrySubCarryCombine in SIISelLowering folded:
    
  uaddo_carry((x+y), 0, cc) -> uaddo_carry(x, y, cc)
  usubo_carry((x-y), 0, cc) -> usubo_carry(x, y, cc)
    
Both produce the same value but differ in carry-out when x+y (or x-y)
wraps. The fold was missing a !N->hasAnyUseOfValue(1) guard, giving
wrong carry values to consumers. E.g. x=0xFFFFFFFF, y=1, cc=0:
  original: ((x+y) mod 2^32 + cc) >= 2^32 = 0  (correct)
  folded:   (x+y+cc) >= 2^32 = 1  (wrong)
    
The generic visitUADDO_CARRY (DAGCombiner.cpp) already handles
the UADDO_CARRY/ADD fold with the correct guard. Since target combines
fire before generic ones, the AMDGPU ADD arm was a buggy duplicate.
    
The USUBO_CARRY/SUB arm is produced by AMDGPU's performAddCombine
which converts add(sub(v,a), sext(cmp)) -> usubo_carry(sub(v,a), 0,

    [12 lines not shown]
DeltaFile
+174-0llvm/test/CodeGen/AMDGPU/usubo.ll
+164-0llvm/test/CodeGen/AMDGPU/uaddo.ll
+0-30llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+7-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+0-1llvm/lib/Target/AMDGPU/SIISelLowering.h
+345-315 files

LLVM/project f17453emlir/lib/Dialect/MemRef/Transforms RuntimeOpVerification.cpp, mlir/test/Dialect/MemRef runtime-verification.mlir

[mlir][memref] Add SCFDialect dependency to RuntimeOpVerification (#205241)

Explicitly load SCFDialect as a dependent dialect in
RuntimeOpVerification to avoid unregistered dialect errors when
generating `scf.if`/`scf.yield` ops. Fixes #204295.
DeltaFile
+14-1mlir/test/Dialect/MemRef/runtime-verification.mlir
+1-1mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
+15-22 files

LLVM/project 7a0829ellvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU GCNProcessors.td AMDGPU.td

[AMDGPU] Define new target gfx1154 (#204816)
DeltaFile
+11-6llvm/docs/AMDGPUUsage.rst
+7-2llvm/lib/Target/AMDGPU/GCNProcessors.td
+9-0llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
+7-0llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
+5-0llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+0-4llvm/lib/Target/AMDGPU/AMDGPU.td
+39-1214 files not shown
+57-1220 files

LLVM/project 81f0636orc-rt/include CMakeLists.txt, orc-rt/include/orc-rt MacroUtils.h

[orc-rt] Add MacroUtils.h header for general purpose macros. (#205337)

For now just contains ORC_RT_DEPAREN, a macro for stripping parentheses
from its argument. This will be used in an upcoming commit.
DeltaFile
+42-0orc-rt/unittests/MacroUtilsTest.cpp
+31-0orc-rt/include/orc-rt/MacroUtils.h
+1-0orc-rt/include/CMakeLists.txt
+1-0orc-rt/unittests/CMakeLists.txt
+75-04 files

LLVM/project 592e9d3clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary TUSummaryBuilder.h TUSummaryExtractor.h, clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary TUSummaryExtractor.cpp

Reland "[clang][ssaf][NFC] Make SSAFOptions available in Builders and Extractors" (#205334)

The original version of this was reverted part of #205279 because I
didn't know if this or the other patch caused the Windows build
failures. It turns out this patch is fine. I'm relating this now.

---

Now that we have SSAFOptions, it would make it a lot more ergonomic if
it was accessible from builders and extractors.
This PR does exactly that.

Part of rdar://179151023

Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
DeltaFile
+7-3clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
+6-3clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
+7-1clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
+4-0clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
+3-1clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+4-0clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.h
+31-84 files not shown
+41-1310 files

LLVM/project a06ac5dllvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 arm64-fpenv.ll

[AArch64] Add flag to conditionally write FPMR (#203911)

Add a AArch64 codegen flag to make llvm.aarch64.set.fpmr avoid writing
FPMR when it already contains the requested value.

By default, llvm.aarch64.set.fpmr continues to lower directly to an MSR
FPMR instruction. With -aarch64-conditional-fpmr-write, the backend
lowers the intrinsic to an MRS/MSR conditional branch sequence.

This is based on the initial implementation from:
https://github.com/llvm/llvm-project/pull/114248

However this PR keeps the conditional FPMR write sequence behind a
codegen flag. One reason to change the codegen lowering is because GCC
emits the conditional branch sequence unconditionally. LLVM preserves
the existing direct MSR lowering by default.
DeltaFile
+57-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+47-7llvm/test/CodeGen/AArch64/arm64-fpenv.ll
+1-2llvm/lib/Target/AArch64/AArch64InstrInfo.td
+3-0llvm/lib/Target/AArch64/AArch64ISelLowering.h
+108-94 files