LLVM/project 9063ad1clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

rebase

Created using spr 1.3.7
DeltaFile
+0-9,644clang/include/clang/Driver/Options.td
+9,644-0clang/include/clang/Options/Options.td
+3,123-3,158llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
+3,106-0llvm/test/CodeGen/LoongArch/expandmemcmp.ll
+2,633-0clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
+1,220-1,178llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+19,726-13,980909 files not shown
+46,417-32,670915 files

LLVM/project 87dbc93clang/test/Analysis analyzeOneFunction.cpp

[clang][test] Fix test issue under LLVM_REVERSE_ITERATION

The order of these items may not be the same if reverse iteration is
enabled. From what I can tell this is related to visitation order, and I
don't see an easy way to handle that using the typical solutions, like
MapVector, etc. For now, just use CHECK-DAG to get the test into a
passing state.

Fixes #167057
DeltaFile
+3-3clang/test/Analysis/analyzeOneFunction.cpp
+3-31 files

LLVM/project b44fc4dllvm/include/llvm/Support SpecialCaseList.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+3-3llvm/include/llvm/Support/SpecialCaseList.h
+3-31 files

LLVM/project fb2fa21llvm/lib/Target/AMDGPU AMDGPUResourceUsageAnalysis.cpp, llvm/test/CodeGen/AMDGPU cc-entry.ll

[AMDGPU] Remove calling conv check on entry function (#162080)

It is undefined behavior to call a function with a mismatched calling
convention. Rather than crash on this behavior, it should compile.

This LLVM defect was identified via the AMD Fuzzing project.
DeltaFile
+69-0llvm/test/CodeGen/AMDGPU/cc-entry.ll
+0-7llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+69-72 files

LLVM/project 20e1a12lldb/test/Shell/helper build.py

[LLDB] Fix (more) darwin shell tests under ASAN
DeltaFile
+12-0lldb/test/Shell/helper/build.py
+12-01 files

LLVM/project 0c2a8d3llvm/lib/Target/AMDGPU AMDGPURegisterBankInfo.cpp

AMDGPU/GlobalISel: Fix AGPR regbank check for mfma_scale

Fixes regressions with #159493 after 476a6ea9575
DeltaFile
+6-6llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+6-61 files

LLVM/project 0062013clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

Merge remote-tracking branch 'upstream/main' into users/kevinsala/omp-dyn-groupprivate-rt-pr
DeltaFile
+9,644-0clang/include/clang/Options/Options.td
+0-9,644clang/include/clang/Driver/Options.td
+3,123-3,158llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
+3,106-0llvm/test/CodeGen/LoongArch/expandmemcmp.ll
+1,220-1,178llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+2,239-0llvm/test/CodeGen/LoongArch/expandmemcmp-optsize.ll
+19,332-13,980901 files not shown
+43,628-32,620907 files

LLVM/project cdf4af1flang/lib/Lower/OpenMP Utils.cpp ClauseProcessor.cpp, flang/lib/Optimizer/OpenMP MapInfoFinalization.cpp

[OpenMP][Flang] Emit default declare mappers implicitly for derived types

This patch adds support to emit default declare mappers for implicit mapping of derived types when not supplied by user. This especially helps tackle mapping of allocatables of derived types.
This supports nested derived types as well.
DeltaFile
+144-0flang/lib/Lower/OpenMP/Utils.cpp
+99-22flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+40-12flang/lib/Lower/OpenMP/OpenMP.cpp
+21-0flang/test/Lower/OpenMP/derived-type-map.f90
+11-10flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
+8-0flang/lib/Lower/OpenMP/Utils.h
+323-442 files not shown
+325-468 files

LLVM/project 540250cclang/lib/CodeGen CGOpenMPRuntime.cpp, clang/test/OpenMP target_dyn_groupprivate_codegen.cpp

[OpenMP][Clang] Add codegen support for dyn_groupprivate clause (#152830)

This adds the codegen support for the dyn_groupprivate clause.
DeltaFile
+2,633-0clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
+37-12clang/lib/CodeGen/CGOpenMPRuntime.cpp
+20-10llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+17-6llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+10-0llvm/include/llvm/Frontend/OpenMP/OMPConstants.h
+2,717-285 files

LLVM/project b4a6151clang/test/CIR/CodeGen complex.cpp

[CIR][NFC] Re-land: Add test for Complex imag literal GNU extension (#167383)

Re-land: Add test for Complex imag literal GNU extension after updating
the name
DeltaFile
+39-0clang/test/CIR/CodeGen/complex.cpp
+39-01 files

LLVM/project a37c4e0clang/lib/Basic SanitizerSpecialCaseList.cpp ProfileList.cpp, llvm/include/llvm/Support SpecialCaseList.h

[NFC][SpecialCaseList] Hide Section internals in private section (#167276)

Preparing to moving most of implementation out of the header file.

* https://github.com/llvm/llvm-project/pull/167280

---------

Co-authored-by: Naveen Seth Hanig <naveen.hanig at outlook.com>
Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
DeltaFile
+18-5llvm/include/llvm/Support/SpecialCaseList.h
+8-0llvm/lib/Support/SpecialCaseList.cpp
+2-2clang/lib/Basic/SanitizerSpecialCaseList.cpp
+1-1clang/lib/Basic/ProfileList.cpp
+1-1clang/lib/Basic/Diagnostic.cpp
+30-95 files

LLVM/project 17e2641utils/bazel/llvm-project-overlay/clang BUILD.bazel

[bazel][clang] Port #167374: split clang options/driver (#167387)

DeltaFile
+20-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+20-01 files

LLVM/project 826caddllvm/test/CodeGen/Hexagon instrprof-custom.ll

[Hexagon] Clean-up Instrprof test (#166990)

DeltaFile
+2-5llvm/test/CodeGen/Hexagon/instrprof-custom.ll
+2-51 files

LLVM/project 067f155llvm/test/MC/AMDGPU gfx1250_asm_vop3_from_vop1_dpp16.s gfx1250_asm_vop3_from_vop1_dpp8-fake16.s, llvm/test/MC/Disassembler/AMDGPU gfx1250_dasm_vop3_from_vop1.txt gfx1250_dasm_vop3_from_vop1_dpp8.txt

[AMDGPU] remove clamp and omod for trans bf16 insts (#165819)

trans bf16 insts do not support clamp and omod
DeltaFile
+0-96llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1.txt
+0-96llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp8.txt
+0-96llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3_from_vop1_dpp16.txt
+0-96llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp16.s
+0-96llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8-fake16.s
+0-96llvm/test/MC/AMDGPU/gfx1250_asm_vop3_from_vop1_dpp8.s
+0-5767 files not shown
+121-82713 files

LLVM/project 2aa629dllvm/test/CodeGen/AArch64 zext-to-tbl.ll sme-pstate-sm-changing-call-disable-coalescing.ll

AArch64: Enable terminal rule (#165959)

DeltaFile
+46-46llvm/test/CodeGen/AArch64/zext-to-tbl.ll
+34-51llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
+38-38llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
+16-25llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll
+20-19llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
+6-6llvm/test/CodeGen/AArch64/sve-extract-fixed-from-scalable-vector.ll
+160-1856 files not shown
+180-20712 files

LLVM/project f8e9723llvm/test/CodeGen/Thumb2 mve-float32regloops.ll mve-gather-scatter-optimisation.ll, llvm/test/CodeGen/Thumb2/LowOverheadLoops while-loops.ll varying-outer-2d-reduction.ll

ARM: Enable terminal rule (#165958)

DeltaFile
+102-109llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
+45-46llvm/test/CodeGen/Thumb2/LowOverheadLoops/while-loops.ll
+45-45llvm/test/CodeGen/Thumb2/mve-gather-scatter-optimisation.ll
+26-26llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
+16-18llvm/test/CodeGen/Thumb2/LowOverheadLoops/varying-outer-2d-reduction.ll
+12-12llvm/test/CodeGen/Thumb2/mve-gather-increment.ll
+246-2568 files not shown
+302-30914 files

LLVM/project 2fc2e1flldb/test/Shell/helper toolchain.py

[LLDB] Fix darwin shell tests under ASAN
DeltaFile
+9-0lldb/test/Shell/helper/toolchain.py
+9-01 files

LLVM/project 793ab6allvm/test/CodeGen/X86 wide-scalar-shift-by-byte-multiple-legalization.ll wide-scalar-shift-legalization.ll

X86: Enable terminal rule (#165957)

DeltaFile
+3,123-3,158llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
+695-703llvm/test/CodeGen/X86/wide-scalar-shift-legalization.ll
+166-164llvm/test/CodeGen/X86/widen-load-of-small-alloca-with-zero-upper-half.ll
+107-104llvm/test/CodeGen/X86/optimize-max-0.ll
+105-105llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
+92-96llvm/test/CodeGen/X86/i128-mul.ll
+4,288-4,33032 files not shown
+4,863-4,89738 files

LLVM/project e14e851llvm/include/llvm/Support SpecialCaseList.h

Update llvm/include/llvm/Support/SpecialCaseList.h

Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
DeltaFile
+1-1llvm/include/llvm/Support/SpecialCaseList.h
+1-11 files

LLVM/project 454a5e6llvm/include/llvm/Support SpecialCaseList.h

Update llvm/include/llvm/Support/SpecialCaseList.h

Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
DeltaFile
+1-1llvm/include/llvm/Support/SpecialCaseList.h
+1-11 files

LLVM/project 4ae7348llvm/lib/Target/DirectX DXILResourceAccess.cpp, llvm/test/CodeGen/DirectX/ResourceAccess load-cbuffer-arrays.ll load-cbuffer-vectors.ll

[DirectX] Teach DXILResourceAccess about cbuffers (#164554)

This isn't reachable today but will come into play once we reorder
passes for #147352 and #147351.

Note that the `CBufferRowIntrin` helper struct is copied from the
`DXILCBufferAccess` pass, but it will be removed from there when we
simplify that pass in #147351
DeltaFile
+146-10llvm/lib/Target/DirectX/DXILResourceAccess.cpp
+145-0llvm/test/CodeGen/DirectX/ResourceAccess/load-cbuffer-arrays.ll
+121-0llvm/test/CodeGen/DirectX/ResourceAccess/load-cbuffer-vectors.ll
+101-0llvm/test/CodeGen/DirectX/ResourceAccess/load-cbuffer-scalars.ll
+64-0llvm/test/CodeGen/DirectX/ResourceAccess/load-cbuffer-dynamic-struct.ll
+59-0llvm/test/CodeGen/DirectX/ResourceAccess/load-cbuffer-array-of-struct.ll
+636-103 files not shown
+761-109 files

LLVM/project 6c66b10clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

rebase

Created using spr 1.3.7
DeltaFile
+0-9,644clang/include/clang/Driver/Options.td
+9,644-0clang/include/clang/Options/Options.td
+3,106-0llvm/test/CodeGen/LoongArch/expandmemcmp.ll
+1,220-1,178llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+2,239-0llvm/test/CodeGen/LoongArch/expandmemcmp-optsize.ll
+1,067-1,039llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
+17,276-11,861814 files not shown
+37,411-26,423820 files

LLVM/project 0cd6e84clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-9,644clang/include/clang/Driver/Options.td
+9,644-0clang/include/clang/Options/Options.td
+3,106-0llvm/test/CodeGen/LoongArch/expandmemcmp.ll
+1,220-1,178llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+2,239-0llvm/test/CodeGen/LoongArch/expandmemcmp-optsize.ll
+1,067-1,039llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
+17,276-11,861814 files not shown
+37,411-26,423820 files

LLVM/project f63d33dclang/include/clang/Driver Options.td OptionUtils.h, clang/include/clang/Options Options.td OptionUtils.h

Reland "[clang] Refactor option-related code from clangDriver into new clangOptions library" (#167374)

This relands #167348.

The original PR was reverted due to a reported build failure, which was
later diagnosed as a local issue in the developer’s checkout or build
state. See discussion here:
https://github.com/llvm/llvm-project/pull/163659#discussion_r2511546964

No additional changes have been made in this reland.
DeltaFile
+9,644-0clang/include/clang/Options/Options.td
+0-9,644clang/include/clang/Driver/Options.td
+256-291flang/lib/Frontend/CompilerInvocation.cpp
+0-58clang/include/clang/Driver/OptionUtils.h
+58-0clang/include/clang/Options/OptionUtils.h
+0-57clang/include/clang/Driver/Options.h
+9,958-10,050119 files not shown
+10,464-10,484125 files

LLVM/project a991261clang/lib/Frontend CompilerInstance.cpp

fix CI
DeltaFile
+2-2clang/lib/Frontend/CompilerInstance.cpp
+2-21 files

LLVM/project e9b729bllvm/lib/Transforms/IPO LowerTypeTests.cpp, llvm/test/Transforms/LowerTypeTests section.ll

[LTT][profcheck] Set branch weights for complex llvm.type.test lowering
DeltaFile
+38-11llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+21-2llvm/test/Transforms/LowerTypeTests/section.ll
+59-132 files

LLVM/project f2f04c3llvm/include/llvm/IR RuntimeLibcalls.td, llvm/lib/IR RuntimeLibcalls.cpp

RuntimeLibcalls: Add call entries for sincos sleef and armpl libcalls (#166983)

These are the tested set of libcalls used for codegen of llvm.sincos
and are needed to get the legalization to follow standard procedure.
DeltaFile
+32-4llvm/lib/IR/RuntimeLibcalls.cpp
+11-3llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sleef.ll
+11-2llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
+13-0llvm/include/llvm/IR/RuntimeLibcalls.td
+67-94 files

LLVM/project eae817d.ci all_requirements.txt premerge_advisor_explain.py, .github/workflows premerge.yaml

Reapply "[CI] Make premerge_advisor_explain write comments" (#167198)

This reverts commit c0e4bced616cffe01dd6816638355ae14ced528a.

This was causing issues on older python versions. They are fixed in the
reland and have been tested as working.
DeltaFile
+192-2.ci/all_requirements.txt
+97-3.ci/premerge_advisor_explain.py
+5-4.ci/utils.sh
+6-0.github/workflows/premerge.yaml
+1-0.ci/requirements.txt
+301-95 files

LLVM/project 68599dallvm/test/CodeGen/NVPTX atomics-b128.ll atomics-sm70.ll, llvm/test/CodeGen/PowerPC licm-xxsplti.ll sms-phi-2.ll

CodeGen: Remove target hook for terminal rule

Enables the terminal rule for remaining targets
DeltaFile
+75-75llvm/test/CodeGen/NVPTX/atomics-b128.ll
+28-28llvm/test/CodeGen/PowerPC/licm-xxsplti.ll
+21-22llvm/test/CodeGen/PowerPC/sms-phi-2.ll
+20-20llvm/test/CodeGen/NVPTX/atomics-sm70.ll
+20-20llvm/test/CodeGen/NVPTX/atomics-sm90.ll
+6-8llvm/test/CodeGen/WebAssembly/simd-shift-in-loop.ll
+170-17316 files not shown
+208-22722 files

LLVM/project adefc21llvm/test/CodeGen/AArch64 zext-to-tbl.ll sme-pstate-sm-changing-call-disable-coalescing.ll

AArch64: Enable terminal rule
DeltaFile
+46-46llvm/test/CodeGen/AArch64/zext-to-tbl.ll
+34-51llvm/test/CodeGen/AArch64/sme-pstate-sm-changing-call-disable-coalescing.ll
+38-38llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll
+16-25llvm/test/CodeGen/AArch64/machine-licm-sink-instr.ll
+20-19llvm/test/CodeGen/AArch64/sve-extract-fixed-vector.ll
+6-6llvm/test/CodeGen/AArch64/sve-fixed-length-reshuffle.ll
+160-1856 files not shown
+180-20712 files