635,443 commits found in 84 milliseconds
LLVM /project e02fdf0 — clang/lib/CIR/CodeGen CIRGenBuiltinX86.cpp CIRGenExprScalar.cpp, clang/test/CIR/CodeGen/X86 sse2-builtins.c [CIR] Upstream CIR codegen for vec_ext x86 builtins (#167942)
This PR upstreams the codegen for the x86 vec_ext builtins from the
incubator. It is part of #167752. [ProfCheck] Refactor Select Instrumentation to use Early Exits (#168086)
I think this is quite a bit more readable than the nested conditionals.
From review feedback that was not addressed precommitn in #167973. LLVM /project e8cc0d2 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 non-inst-abs-sub-copyable-value.ll Revert "[SLP]Check if the copyable element is a sub instruciton with abs in isCommutable"
This reverts commit ddf5bb0a2e2d2dd77bce66173387d62ab7174d9f to fix
buildbots https://lab.llvm.org/buildbot/#/builders/11/builds/28083.
[lldb] Diagnose unsupported configurations when targeting the Limited C API (#168145)
Diagnose unsupported configurations when targeting the Python Limited C
API. I used SEND_ERROR so that if there's multiple issues, you don't
need to keep reconfiguring. LLVM /project 3e2bb7b — clang-tools-extra/clang-doc HTMLMustacheGenerator.cpp Generators.cpp MustacheGenerator inherits from Generator, use generateDocumentation as base
LLVM /project e7fe8a7 — llvm/include/llvm/Transforms/Instrumentation UbsanMinimalHandlers.inc fix
Created using spr 1.3.7
LLVM /project f2bd5c6 — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/MC/AArch64 arm-poe2.s rebase
Created using spr 1.3.7
Delta File +13,141 -11,946 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +4,719 -5,242 llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt +4,062 -3,678 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +2,042 -2,017 llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll +3,263 -0 llvm/test/MC/AArch64/arm-poe2.s +1,555 -1,504 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll +28,782 -24,387 3,662 files not shown +137,540 -88,385 3,668 files
LLVM /project ff5162f — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/MC/AArch64 arm-poe2.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +13,141 -11,946 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +4,719 -5,242 llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt +4,062 -3,678 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +2,042 -2,017 llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll +3,263 -0 llvm/test/MC/AArch64/arm-poe2.s +1,555 -1,504 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll +28,782 -24,387 3,662 files not shown +137,540 -88,385 3,668 files
LLVM /project ddf5bb0 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 non-inst-abs-sub-copyable-value.ll [SLP]Check if the copyable element is a sub instruciton with abs in isCommutable
Need to check if the non-copyable element is an instruction before actually
trying to check its NSW attribute.
LLVM /project 72a6ae6 — llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp, llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250.mir vgpr-lowering-gfx1250-t16.mir [AMDGPU] Fix wrong MSB encoding for V_FMAMK instructions (#168107)
These instructions use `src0`, `imm`, `src1` as operand.
Fixes SWDEV-566579. LLVM /project 47f0408 — compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp UbsanMinimalHandlers.inc [𝘀𝗽𝗿] changes to main this commit is based on
Created using spr 1.3.7
[skip ci]
LLVM /project 2792d1a — compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp UbsanMinimalHandlers.inc, llvm/include/llvm/Analysis TargetLibraryInfo.def [𝘀𝗽𝗿] initial version
Created using spr 1.3.7
LLVM /project 07235f2 — compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp UbsanMinimalHandlers.inc [𝘀𝗽𝗿] changes to main this commit is based on
Created using spr 1.3.7
[skip ci]
LLVM /project 5a737e0 — compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp UbsanMinimalHandlers.inc [𝘀𝗽𝗿] initial version
Created using spr 1.3.7
LLVM /project f2ad485 — compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp UbsanMinimalHandlers.inc [𝘀𝗽𝗿] initial version
Created using spr 1.3.7
LLVM /project 6dad2c2 — lldb/test/API/python_api/command_script_output TestCommandScriptOutput.py [lldb] Add a test for capturing stdout/stderr from Python commands (#168138)
LLVM /project 825ebef — llvm/include/llvm/Support SpecialCaseList.h, llvm/lib/Support SpecialCaseList.cpp [NFC][Support] Remove unused getLongestMatch from SpecialCaseList (#167193)
This method is not used anywhere. Remove it. Fix commit message and simplify change
Created using spr 1.3.6-beta.1
[mlir][bazel] Add apfloat test library (#168115)
The apfloat code was added in #167848, and some bazel was added
in #167916 but the runtime library for test-apfloat-emulation.mlir was
missed. This patch adds the appropriate target. LLVM /project e645aa1 — llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250.mir vgpr-lowering-gfx1250-t16.mir more tests
use `AMDGPU::OpName::NUM_OPERAND_NAMES` replace `AMDGPU::OpName::imm`
LLVM /project 08bb907 — llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp, llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250-t16.mir add t16
LLVM /project caf99af — llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp, llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250.mir [AMDGPU] Fix wrong MSB encoding for V_FMAMK instructions
These instructions use `src0`, `imm`, `src1` as operand.
Fixes SWDEV-566579.
LLVM /project 8d5f216 — llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp, llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250-t16.mir add t16 test
LLVM /project 944278f — clang/lib/Sema SemaOpenMP.cpp, clang/test/OpenMP parallel_default_variableCategory_codegen.cpp Revert "[Clang][OpenMP] Bug fix Default clause variable category" (#168130)
Reverts llvm/llvm-project#168112 Don't check frame base as varies if registers are available from targets. (#168124)
Fixes a buildbot issue stemming from
https://github.com/llvm/llvm-project/pull/167986 [VE] TableGen-erate SDNode descriptions (#168120)
This allows SDNodes to be validated against their expected type profiles
and reduces the number of changes required to add a new node.
There is a couple of nodes that are missing description and one node
that fails validation.
Part of #119709.
Pull Request: https://github.com/llvm/llvm-project/pull/168120 LLVM /project 87625dd — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/MC/AArch64 arm-poe2.s rebase
Created using spr 1.3.7
Delta File +13,141 -11,946 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +4,719 -5,242 llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt +4,062 -3,678 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +2,042 -2,017 llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll +3,263 -0 llvm/test/MC/AArch64/arm-poe2.s +1,555 -1,504 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll +28,782 -24,387 3,649 files not shown +137,330 -88,282 3,655 files
LLVM /project 1721e1f — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/MC/AArch64 arm-poe2.s [𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Delta File +13,141 -11,946 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll +4,719 -5,242 llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt +4,062 -3,678 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll +2,042 -2,017 llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll +3,263 -0 llvm/test/MC/AArch64/arm-poe2.s +1,555 -1,504 llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll +28,782 -24,387 3,649 files not shown +137,330 -88,282 3,655 files
LLVM /project ab08fbd — clang/docs WarningSuppressionMappings.rst ReleaseNotes.rst, clang/include/clang/Basic Diagnostic.h [clang] Switch warning suppression multi-match rule to "last match takes precedence"
The current "longest match takes precedence" rule
for warning suppression mappings can be confusing,
especially in long suppression files where
tracking the length relationship between globs is
difficult.
For example, with the following rules, it's not
immediately obvious why the first one should
currently take precedence:
```
src:*test/*
src:*lld/*=emit
```
This commit changes the multi-match behavior so
the last match takes precedence. This rule is
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