LLVM/project e803f21clang/include/clang/Basic DiagnosticGroups.td

[LifetimeSafety] Make `strict` a superset of `permissive` (#195068)
DeltaFile
+3-4clang/include/clang/Basic/DiagnosticGroups.td
+3-41 files

LLVM/project 54388f4mlir/include/mlir/Dialect/SPIRV/IR SPIRVBase.td

[mlir][SPIR-V] Rename SPV_INTEL_long_constant_composite to SPV_INTEL_long_composites (#195062)
DeltaFile
+5-5mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+5-51 files

LLVM/project 8dfe85bflang/lib/Optimizer/CodeGen CodeGen.cpp, flang/test/Fir convert-memref-codegen.mlir

[flang][fir] Support memref to memref fir.convert (#194954)

fir.convert of memref to memref can potentially arise due to a chain of
fir.convert between fir pointer types which get collapsed into a memref
to memref cast. Handle this as if we first convert to a pointer and then
convert the pointer to a memref.
DeltaFile
+89-28flang/test/Fir/convert-memref-codegen.mlir
+34-22flang/lib/Optimizer/CodeGen/CodeGen.cpp
+123-502 files

LLVM/project aae871bllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 cgp-usubo.ll

[DAGCombiner] Reconstruct borrow chain from icmp pattern for USUBO_CARRY (#193707)

DAG-level alternative to #189018 (CGP): match the canonical icmp form
  carry_out = or(icmp ult A, B, and(icmp eq A, B, carry_in))
in visitOR and rewrite to USUBO_CARRY so the backend can chain the
borrow through sbb/sbcs.

Gated on USUBO_CARRY being legal/custom at the type the integer
legalizes to, so targets without hardware carry-flag support are
unaffected. For oversize integers (e.g. i128 on x86_64/aarch64) type
legalization then expands one USUBO_CARRY into a chain of
register-width USUBO_CARRYs, which gives strictly better code than the
CGP-level reconstruction.

Fixes #106118.
DeltaFile
+165-27llvm/test/CodeGen/X86/subcarry.ll
+131-5llvm/test/CodeGen/AArch64/cgp-usubo.ll
+30-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+326-323 files

LLVM/project cf96c9aclang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,066-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,141-94686 files not shown
+8,167-1,40692 files

LLVM/project a823dc8clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,066-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,141-94685 files not shown
+8,116-1,40691 files

LLVM/project 8b14e42clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,057-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,132-94685 files not shown
+8,107-1,40691 files

LLVM/project 2587dd2clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,066-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,141-94685 files not shown
+8,116-1,40691 files

LLVM/project c5a881eclang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,057-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,132-94681 files not shown
+7,894-1,40687 files

LLVM/project 19a9232clang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,057-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,132-94685 files not shown
+8,107-1,40691 files

LLVM/project 0e998bbclang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+953-444openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+195-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,022-95881 files not shown
+7,784-1,41887 files

LLVM/project 63e1d6fclang/include/clang/AST OpenMPClause.h, clang/lib/CodeGen CGOpenMPRuntime.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+2,900-220openmp/runtime/src/kmp_taskdeps.cpp
+1,057-432openmp/runtime/src/kmp_tasking.cpp
+577-220clang/lib/CodeGen/CGOpenMPRuntime.cpp
+201-74openmp/runtime/src/kmp.h
+233-0clang/test/OpenMP/replayable_ast_print.cpp
+164-0clang/include/clang/AST/OpenMPClause.h
+5,132-94681 files not shown
+7,894-1,40687 files

LLVM/project 75e8549llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project b46caf1llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project 93be9c0llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project 8242839llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project b7b7969llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project fe780b3llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project bbdc7b8llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project 8aa307dllvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project 33882f6llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,562-46,6112,477 files

LLVM/project 1f3057fllvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
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+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,560-46,6082,477 files

LLVM/project 352f983llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,560-46,6082,477 files

LLVM/project cb280a4llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,560-46,6082,477 files

LLVM/project 4d1bfaallvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,559-46,6032,477 files

LLVM/project 9a50256llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
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+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,559-46,6032,477 files

LLVM/project c31c0e3llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,559-46,6032,477 files

LLVM/project 75b8417llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,559-46,6032,477 files

LLVM/project f1d2763llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

rebase

Created using spr 1.3.5
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+4,652-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1,519-1,501llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,433-1,387llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+15,535-9,7772,471 files not shown
+100,559-46,6032,477 files

LLVM/project 2f3dedcllvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
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