LLVM/project b8060efllvm/utils/gn/secondary/llvm/lib/TargetParser BUILD.gn

[gn build] Port d005cb2953bd
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
+1-01 files

LLVM/project 39dba7blibcxx/include/__algorithm unwrap_range.h

[libc++] Fix module builds for `<__algorithm/unwrap_range.h>` (#179887)

3a653afd45709432181952c0ffdb53eceb0939ae removed the inclusion of
`<__utility/declval.h>` from `<__algorithm/unwrap_range.h>`. However,
`unwrap_range.h` still needs to use `std::declval`. So we should restore
the inclusion.

The building failure with Clang modules was already caught by CI.
DeltaFile
+1-0libcxx/include/__algorithm/unwrap_range.h
+1-01 files

LLVM/project 1ad20b9llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp RISCVInstrInfoP.td

[RISCV] Rename RISCVISD::PPACK_DH->PPAIRE_DB. NFC (#180089)

The instruction was renamed, but we hadn't renamed the ISD opcode.
DeltaFile
+6-6llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+3-3llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+1-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+10-103 files

LLVM/project 313d9acllvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rv32p.ll

[RISCV] Add wmul(u) codegen for RV32+P (#180032)

mulh tests are to make sure we continue to use mulh when only the
upper half is used.
DeltaFile
+51-1llvm/test/CodeGen/RISCV/rv32p.ll
+20-0llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+8-3llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+79-43 files

LLVM/project 6c37aa8llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp

[RISCV] Remove P from RISCVISD::PASUB(U)/PMULHSU/PMULHR(U)/PMULHRSU. NFC (#180064)

There's a good chance we'll want to use these for scalar too.

Drop vector type from SDTypeProfile. Remove PMULHSU since we already
have RISCVISD::MULHSU for scalars in the base ISA.
DeltaFile
+22-24llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+18-18llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+40-422 files

LLVM/project 41cc71elldb/test/API/python_api/process/cancel_attach TestCancelAttach.py

Disable TestCancelAttach.py for linux -> linux remote (#180092)

This test was already disabled going from windows -> linux because it
was timing out there.

The PR: https://github.com/llvm/llvm-project/pull/179799 seems to have
exacerbated whatever this stall was, and now we're seeing it when
debugging from a linux host to a remote linux as well.

The native local host tests works correctly on all the bots that we
have, however. So I'm disabling the remote test till we can figure out
why this is problematic.
DeltaFile
+1-1lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
+1-11 files

LLVM/project b4a32dbclang/lib/Analysis UnsafeBufferUsage.cpp

[NFC][Clang][unsafe-buffer-usage] Simplify isPtrBufferSafe with helper. (#178768)

Also change parameter type to a reference since it's assumed to be
nonnull.
DeltaFile
+45-52clang/lib/Analysis/UnsafeBufferUsage.cpp
+45-521 files

LLVM/project d005cb2llvm/include/llvm/TargetParser AVRTargetParser.h Triple.h, llvm/lib/TargetParser AVRTargetParser.cpp

[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (#174731)

This PR updates llvm-objdump to detect the specific AVR architecture
from the ELF header flags when no specific CPU is provided.

Fixes: #146451

---------

Signed-off-by: RuoyuQiu <cabbaken at outlook.com>
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Co-authored-by: qiuruoyu <qiuruoyu at hygon.cn>
DeltaFile
+55-0llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
+50-0llvm/lib/TargetParser/AVRTargetParser.cpp
+30-0llvm/include/llvm/TargetParser/AVRTargetParser.h
+16-0llvm/tools/llvm-objdump/llvm-objdump.cpp
+2-0llvm/include/llvm/TargetParser/Triple.h
+2-0llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
+155-01 files not shown
+156-07 files

LLVM/project 5090843.github/workflows commit-access-review.py

Try to optimize
DeltaFile
+37-3.github/workflows/commit-access-review.py
+37-31 files

LLVM/project 6d53558llvm/utils/gn/secondary/llvm/lib/Target/X86 BUILD.gn

[gn build] Port eb9e98f62e0c
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
+1-01 files

LLVM/project c3db527llvm/lib/MC MCWasmStreamer.cpp, llvm/lib/Target/WebAssembly WebAssemblyAsmPrinter.cpp

[MC][Wasm] Emit useful error message when encountering common symbols (#179586)

We don't currently support common symbols for Wasm, and we currently
emit a generic error with a backtrace. Instead, don't crash, and report
the names of the offending symbols.
DeltaFile
+8-2llvm/lib/MC/MCWasmStreamer.cpp
+7-0llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+6-0llvm/test/MC/WebAssembly/common-error.s
+6-0llvm/test/CodeGen/WebAssembly/common-error.ll
+27-24 files

LLVM/project 2302355clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+483-0clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+483-01 files

LLVM/project 1d3f347clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+532-0clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+532-01 files

LLVM/project b03496a.github/workflows commit-access-review.py

More debug
DeltaFile
+2-0.github/workflows/commit-access-review.py
+2-01 files

LLVM/project eb9e98fllvm/lib/Target/X86 X86CleanupLocalDynamicTLS.cpp X86InstrInfo.cpp

[NewPM] Port x86-cleanup-local-dynamic-tls (#179864)

Port x86-cleanup-local-dynamic-tls to the new pass manager.
I moved LDTLSCleanup to a new
llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp file and renamed it to
X86CleanupLocalDynamicTLSPass. Then I renamed the legacy pass, and
adding a NewPM wrapper around the impl.

No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.
DeltaFile
+165-0llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp
+0-113llvm/lib/Target/X86/X86InstrInfo.cpp
+9-1llvm/lib/Target/X86/X86.h
+1-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1-1llvm/lib/Target/X86/X86PassRegistry.def
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+177-1182 files not shown
+179-1188 files

LLVM/project 1f26c39flang/include/flang/Optimizer/Dialect FIROps.td, flang/lib/Optimizer/Dialect FIROps.cpp

[flang] Allow fir.field_index and fir.coordinate_of speculation. (#179785)

This change makes `fir.field_index` a Pure operation, and
add support of `ConditionallySpeculatable` interface for
`fir.coordinate_of`. The test demonstrates how this affects
Flang LICM.
DeltaFile
+48-0flang/test/Transforms/licm.fir
+9-0flang/lib/Optimizer/Dialect/FIROps.cpp
+5-2flang/include/flang/Optimizer/Dialect/FIROps.td
+62-23 files

LLVM/project 3bbb997flang/lib/Optimizer/Analysis AliasAnalysis.cpp, flang/test/Analysis/AliasAnalysis alias-analysis-cray-pointers.fir ptr-component.fir

[flang] Disambiguate descriptor and data addresses in FIR AA. (#179774)

This change basically treats the descriptors' and data loads
as non-aliasing (with one exception) same way as we do it
for the purpose of the TBAA tags generation for LLVM
to do better optimizations. This change enables more LICM in Flang MLIR.
DeltaFile
+155-19flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
+32-0flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
+15-12flang/test/Analysis/AliasAnalysis/ptr-component.fir
+2-4flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
+204-354 files

LLVM/project 1ef499bllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.struct.buffer.store.format.f16.ll llvm.amdgcn.raw.tbuffer.store.f16.ll

AMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (#179994)

Enable commented out D16 v3f16 tests.
DeltaFile
+63-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
+57-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
+44-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
+40-5llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
+2-7llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+206-275 files

LLVM/project 6299a53openmp/runtime CMakeLists.txt

Revert "openmp: add atomic to SANITIZER_COMMON_LINK_LIBS for MIPS (#179933)"

This reverts commit 74e9bc6cb93964edfcb3761623a43d1e55aceb2a.
DeltaFile
+0-4openmp/runtime/CMakeLists.txt
+0-41 files

LLVM/project 74e9bc6openmp/runtime CMakeLists.txt

openmp: add atomic to SANITIZER_COMMON_LINK_LIBS for MIPS (#179933)

atomic is needed explicitly for MIPS.
DeltaFile
+4-0openmp/runtime/CMakeLists.txt
+4-01 files

LLVM/project 2b3d97aclang/lib/Analysis UnsafeBufferUsage.cpp

[NFC][Clang][UnsafeBufferUsage] Remove unnecessary struct. (#178801)

The struct has no members and has a surrounding namespace that can be
used for disambiguating names. This was also mentioned in a previous PR
review:
https://github.com/llvm/llvm-project/pull/101583/changes#r1737089937
DeltaFile
+33-41clang/lib/Analysis/UnsafeBufferUsage.cpp
+33-411 files

LLVM/project c7e3bddllvm/lib/Target/Mips MipsSEInstrInfo.cpp, llvm/test/CodeGen/MIR/Mips mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir

MIPS: readsWritesFloatRegister, inc Idx for continue (#179932)

Otherwise, the input register will also be treat as write.
DeltaFile
+18-0llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
+2-2llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+20-22 files

LLVM/project a034419clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project 3a17d41clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project 78ad54eclang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project 22e5d42clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project 3b035b3clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project 0fc1996clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project dea1e6eclang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-17clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-171 files

LLVM/project 2adb6b8clang/lib/CIR/CodeGen CIRGenExprCXX.cpp CIRGenExprConstant.cpp, clang/test/CIR/CodeGen new.cpp

[CIR] Upstream support for variable sized array new (#179798)

This adds CIR support for calling array new with a variable size.
DeltaFile
+277-0clang/test/CIR/CodeGen/new.cpp
+118-4clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+6-0clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
+2-0clang/lib/CIR/CodeGen/CIRGenConstantEmitter.h
+403-44 files