[lldb][NFC] Replace const std::vector& with ArrayRef in APIs (#170834)
Inside the LLVM codebase, const vector& should just be ArrayRef, as this
more general API works both with vectors, SmallVectors and
SmallVectorImpl, as well as with single elements.
This commit replaces two uses introduced in
https://github.com/llvm/llvm-project/pull/168797 .
[clang-repl] Skip CodeGen for top-level decls when diagnostics report errors (#169989)
We can see the following while running clang-repl in C mode
```
anutosh491 at vv-nuc:/build/anutosh491/llvm-project/build/bin$ ./clang-repl --Xcc=-x --Xcc=c --Xcc=-std=c23
clang-repl> printf("hi\n");
In file included from <<< inputs >>>:1:
input_line_1:1:1: error: call to undeclared library function 'printf' with type 'int (const char *, ...)'; ISO C99 and
later do not support implicit function declarations [-Wimplicit-function-declaration]
1 | printf("hi\n");
| ^
input_line_1:1:1: note: include the header <stdio.h> or explicitly provide a declaration for 'printf'
error: Parsing failed.
clang-repl> #include <stdio.h>
hi
```
In debug mode while dumping the generated Module, i see this
```
[65 lines not shown]
Revert "[mlir] Fix '-Wtemplate-id-cdtor'. NFC"
This reverts commit fccb65ef8f0faf40ca5dfaaa0ef70821f8843821.
It breaks pre-merge CI:
```
2025-12-08T16:35:11.7239054Z /home/gha/actions-runner/_work/llvm-project/llvm-project/mlir/lib/Pass/PassRegistry.cpp:439:37: error: ISO C++ requires the name after '::~' to be found in the same scope as the name before '::~' [-Werror,-Wdtor-name]
2025-12-08T16:35:11.7240458Z 439 | llvm::cl::OptionValue<OpPassManager>::~OptionValue() = default;
2025-12-08T16:35:11.7241014Z | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
2025-12-08T16:35:11.7241494Z | ::OptionValue
2025-12-08T16:35:11.7241903Z 1 error generated.
```
[libc] move abs_timesout and monotonicity out of linux dir (#167719)
This patch moves abs_timeout and monotonicity out of the linux dir into
common. Both of these functions depend on clock_gettime which is the
actual os-dependent component. As other features in `__support/threads`
may want to use these, it's better to share it in common.
[mlir][OpenMP] Fix crash in MapInfoOp conversion when type conversion fails (#171045)
Check the result of `convertType` before calling `TypeAttr::get`. This
prevents a crash on unsupported types (e.g. `tensor`) by ensuring the
pattern fails gracefully.
Added regression test: map-info-type-conversion-fail.mlir
Fixes: #108159
[Clang][OpenCL][AMDGPU] Allow _Float16 and half vector type compatibility (#170605)
## Summary
Allowing implicit compatibility between `_Float16` vector types and
`half` vector types in OpenCL mode. This enables AMDGPU builtins to work
correctly across OpenCL, HIP, and C++ without requiring separate builtin
definitions.
## Problem Statement
When using AMDGPU image builtins that return half-precision vectors in
OpenCL, users encounter type incompatibility errors:
**Builtin Definition:**
`TARGET_BUILTIN(__builtin_amdgcn_image_load_1d_v4f16_i32, "V4xiiQtii",
"nc", "image-insts")`
**Test Case:**
```
typedef half half4 __attribute__((ext_vector_type(4)));
half4 test_builtin_image_load_1d_2(half4 v4f16, int i32, __amdgpu_texture_t tex) {
return __builtin_amdgcn_image_load_1d_v4f16_i32(100, i32, tex, 120, i32);
[11 lines not shown]
Fix [PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong MachineOperand mutator"' failed. (#170548)
Fixed issue
[[PowerPC] llc crashed at -O1/O2/O3: Assertion `isImm() && "Wrong
MachineOperand mutator"'
failed.](https://github.com/llvm/llvm-project/issues/167672)
the root cause of the crash, the IMM operand is in different operand num
of the instruction PPC::XXSPLTW and PPC::XXSPLTB/PPC::XXSPLTH.
and the patch also fix a potential bug that the new element index of
PPC::XXSPLTB/PPC::XXSPLTH/XXSPLTW use the same logic. It should be
different .We need to convert the element index into the proper unit
(byte for VSPLTB, halfword for VSPLTH, word for VSPLTW) because
PPC::XXSLDWI interprets its ShiftImm in 32-bit word units.
[MLIR][XeGPU][XeVM] create_nd_tdesc: use correct pitch from strides. (#170384)
Base memory pitch should be derived from base stride, not base width.
Remove offset fields from tensor descriptor payload and add pitch field.
[MLIR][XeVM] gpu.printf test: use correct runtime. (#170754)
gpu printf test was not using the runtime required by lit.local.cfg
All other tests in the directory are correctly using level zero runtime.
But gpu printf test is using sycl runtime.
[X86] Handle X86ISD::EXPAND/COMPRESS nodes as target shuffles (#171119)
Allows for shuffle simplification
Required a minor fix to the overly reduced compress-undef-float-passthrough.ll regression test
[VPlan] Use nuw when computing {VF,VScale}xUF (#170710)
These quantities should never unsigned-wrap. This matches the behavior
if only VFxUF is used (and not VF): when computing both VF and VFxUF,
nuw should hold for each step separately.
[ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC)
Replace the code along these lines
BitVector Tmp = LHS;
Tmp &= RHS;
return Tmp.any();
and
BitVector Tmp = LHS;
Tmp.reset(RHS);
return Tmp.none();
with `LHS.anyCommon(RHS)` and `LHS.subsetOf(RHS)`, correspondingly, which
do not require creating temporary BitVector and can return early.
