[GlobalISel][AMDGPU] Expand `isKnownNeverZero` for vector instructions (#211149)
A followup PR about adding some vector instruction patterns to
`isKnownNeverZero`, which firstly added in
https://github.com/llvm/llvm-project/pull/198438
The following instructions are added:
* `G_BUILD_VECTOR`
* `G_EXTRACT_VECTOR_ELT`
* `G_SHUFFLE_VECTOR`
[AMDGPU] Reschedule loads in clauses to improve throughput (#102595)
After clauses are formed their internal loads can be reordered to
facilitate some additional opportunities for overlapping computation.
This late stage rescheduling causes no change in register pressure.
[LoongArch] Use unsigned vector extract for zero extension (#214120)
Add patterns to select VPICKVE2GR_BU/HU and [X]VPICKVE2GR_WU for vector
extraction followed by zero extension, eliminating redundant masking
instructions.
[RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (#183158)
Fixes #182047
**Issue:** Compiling floating-point vector selects (e.g., `<2 x float>`)
on RISC-V targets that only support integer vectors (like `zve32x`)
causes a compiler crash in the Loop Vectorizer (`emitInvalidCostRemarks`
unhandled `TypeSwitch`).
**Root Cause:** The Type Legalizer correctly scalarizes the unsupported
FP vector into `f32` operations. However,
`RISCVTTIImpl::getCmpSelInstrCost` attempted to cost
`Instruction::Select` natively without verifying floating-point vector
hardware support. It passed the scalarized type to
`getRISCVInstructionCost` to price a native vector merge instruction,
which returned `InstructionCost::getInvalid()`.
**Fix:** Added hardware support checks (`hasVInstructionsF16/32/64()`)
for floating-point types in the `Instruction::Select` block. If the
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[Clang][CodeGen] Respect FP pragma options for fneg and calls (#212141)
Apply expression-specific floating-point options when emitting fneg and
call instructions.
This prevents these instructions from retaining fast-math flags disabled
by local FP pragmas, such as #pragma clang fp reassociate(off).
Fixes #51905
[Docs][AMDGPU] fully specify volatile accesses in the memory model (#214168)
A non-atomic volatile access on AMDGPU includes store-available or
load-visible
semantics at the widest scope supported by its address space:
- system scope for global/generic,
- workgroup scope for local (LDS)
An atomic volatile access has the same availability and visibility as
its atomic
non-volatile variant.
Previous Reference: 2f499b9
This fully specifies the behavior that the LLVM memory model leaves
target-dependent, matching the implementation in SIMemoryLegalizer.
Assisted-By: Claude Opus 4.8
[LoongArch] Use unsigned vector extract for zero extension
Add patterns to select VPICKVE2GR_BU/HU and [X]VPICKVE2GR_WU for vector
extraction followed by zero extension, eliminating redundant masking
instructions.
[BOLT] Support runtime libraries built as thin archives (#214292)
In some configurations, BOLT runtime libraries may be built as thin
archive. Use the more generic `Archive::create` to handle these.
[docs][clang-format] Migrate generated clang-format docs to markdown (#211398)
Tracking issue: #201242
See the [migration guide] for more information.
This is a stacked PR based on #211397 , which will be a standalone
commit that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
First, the generator was updated to generate markdown constructs, and
then the Doxygen comments in `Format.h` and `IncludeStyle.h` were also
modified to use markdown constructs. Mostly this means using single
backticks instead of double backticks, which is the Doxygen-native way
of expressing code font blocks anyway, so that's good.
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[DAG] Change `isExtractSubvectorCheap` into `getExtractSubvectorCost` (#213614)
This changes `isExtractSubvectorCheap` into `getExtractSubvectorCost`.
This is preparing for #201056 in order to remove `isNarrowingProfitable`
bail out for `narrowInsertExtractVectorBinOp`.
The reason is `isNarrowingProfitable` should be applying on scalar
variable instead of vectors.
---------
Co-authored-by: shore <shorshen at amd.com>
Revert "[SCEV] Speed up forgetLoop by avoiding def-use walk for loop-header PHIs" (#212485)
Reverts https://github.com/llvm/llvm-project/pull/201572
Multiple miscompilations are reported, see
https://github.com/llvm/llvm-project/issues/207744,https://github.com/llvm/llvm-project/issues/212027
That commit made forgetLoop() rely on LoopUsers[L] and stop walking the
def-use chain of the loop-header PHIs. This is insufficient, because
some cached data is derived from the underlying IR of SCEVUnknown, it is
not reachable from LoopUsers[L].
After that commit, forgetLoop() no longer invalidated them, so stale
UnsignedRanges / SignedRanges, ConstantMultipleCache, ValuesAtScopes
cause miscompilations.
[NFC][AMDGPU] Let IR level callers query the FMA/FMAD predicates (#213310)
isFMADLegal and isFMAFasterThanFMulAndFAdd read the denormal mode out of
the MachineFunction, so nothing before instruction selection can ask
them whether an fmul/fadd pair will be fused. Take an explicit
DenormalFPEnv instead, and make the existing MachineFunction /
SelectionDAG / MachineInstr entry points thin wrappers over it.
Also override the IR level isFMAFasterThanFMulAndFAdd hook. The two
views agree by construction, since SIModeRegisterDefaults copies its
denormal fields out of getDenormalFPEnv.
isFMADLegal uses VT as written and does not look through vectors, so a
vector type reports false, as in the SelectionDAG overload it was
extracted from.
The patch is preparation for querying these from getArithmeticInstrCost
and a revived isProfitableToSinkOperands.
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[AMDGPU] Fix sign of zero in fpround(fmul) -> V_{MAD,FMA}_MIX{LO,HI} (#214544)
The isel patterns lowering `fptrunc (fmul float %a, %b)` to a mix
instruction passed +0.0 as the FMA addend. Under round-to-nearest fma(a,
b, +0.0) is +0.0 whenever a * b is -0.0, so the sign of zero was lost:
on gfx90a, `(half)(-1.0f * 0.0f)` returned +0.0.
Use a -0.0 addend instead, which is the correct multiplicative identity
for an FMA and is what the f32 sibling pattern in MadFmaMixFP32Pats has
always done.
Verified on gfx90a: (half)(-1.0f * 0.0f) now returns 0x8000.
[gsymutil] Add `--statistics` option (#186495)
# Motiviation
Currently, if one wants to know the size of the sections in a gSYM (e.g.
to check if they exceed 4GB), they have to dump the whole gSYM in the
text form, then process that huge text to get the sizes.
# New option `--statistics[=<format>]`
This patch adds a `llvm-gsymutil --statistics[=<format>]` option to
print the size info for all sections. It supports three formats:
* `text`: Default.
* `json`: Dense JSON.
* `pretty-json`: Pretty-printed JSON.
See example output below.
# Examples
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[docs][clang-format] Migrate generated clang-format docs to markdown
The challenge here is that the documentation is generated from Doxygen
comments in headers, `Format.h` and `IncludeStyle.h`.
First, the generator was updated to generate markdown constructs, and
then the Doxygen comments were also modified to use markdown constructs.
Mostly this means using single backticks instead of double backticks,
which is the Doxygen-native way of expressing code font blocks anyway,
so that's good.
To validate, I built the Sphinx docs and the doxygen, and I confirmed
that the generator script is idempotent, meaning it doesn't change the
markdown output. When I add a new option to clang-format, it shows up in
the help text block, so it works.
Before/after validation links:
| Source file | Before HTML | After HTML |
| --- | --- | --- |
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Fix dump_format_style.py blank lines and trailing whitespace, regenerate
The reindent_fenced_blocks() change in the previous commit introduced two
output issues when regenerating ClangFormatStyleOptions.md:
1. Empty lines inside code blocks got an indentation prefix added, producing
trailing whitespace. Fix by skipping the prefix for whitespace-only lines.
2. The blank line that separates a description sentence from the following
code fence was lost. This blank line is necessary for correct CommonMark
loose-list rendering. Fix by inserting a blank line before any opening
code fence (triple-backtick with a lang word, or ::: with a directive)
that immediately follows a non-blank line.
Regenerate ClangFormatStyleOptions.md with the corrected generator.
[docs][clang-format] Rename clang-format docs *.rst -> *.md, update refs (#211397)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
---------
Co-authored-by: owenca <owenpiano at gmail.com>
[NVPTX] Fix broken cache hint metadata lit tests (#214600)
I just merged https://github.com/llvm/llvm-project/pull/204067 and
unfortunately forgot to locally compile all the PTX I was generating
from cache hint metadata in lit tests.
- I didn't know that .L2::cache_hint isn't valid on PTX volatile loads.
We need to drop the metadata then for volatile loads. I'll put this up
in a PR later, but for now just delete the lit test that generates the
invalid PTX. I'll add it back in the follow up.
- I forgot to provide SM version and PTX version when invoking ptxas for
the lit tests.
[include-cleaner] Ensure receiver headers are kept when accessing ObjC properties (#212633)
When accessing Objective-C properties via dot-notation (e.g., obj.foo),
include-cleaner was previously only recording the usage of the property
itself or its underlying getter/setter methods. This could lead to cases
where the header declaring the receiver's type (Interface or Protocol)
was incorrectly flagged as unused if no other standard methods were
invoked on it.
