LLVM/project 1efef76mlir/include/mlir/Dialect/ControlFlow/IR ControlFlowOps.td, mlir/include/mlir/Interfaces ControlFlowInterfaces.td

Revert "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface" (#189150)

Reverts llvm/llvm-project#187864, because it is causing same build bot
failures. See https://lab.llvm.org/buildbot/#/builders/138/builds/27662
and
https://lab.llvm.org/buildbot/#/builders/169/builds/21376/steps/11/logs/stdio
for memory leak issues.
DeltaFile
+0-115mlir/lib/Reducer/ReductionTreePass.cpp
+0-66mlir/test/mlir-reduce/reduction-tree.mlir
+0-24mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
+0-10mlir/lib/Reducer/ReductionNode.cpp
+4-6mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
+0-9mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+4-2301 files not shown
+4-2337 files

LLVM/project 4be3696mlir/include/mlir/Dialect/ControlFlow/IR ControlFlowOps.td, mlir/include/mlir/Interfaces ControlFlowInterfaces.td

Revert "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForw…"

This reverts commit eb53972051f175224569ebc28e8dafbf73930b4d.
DeltaFile
+0-115mlir/lib/Reducer/ReductionTreePass.cpp
+0-66mlir/test/mlir-reduce/reduction-tree.mlir
+0-24mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
+0-10mlir/lib/Reducer/ReductionNode.cpp
+4-6mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
+0-9mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+4-2301 files not shown
+4-2337 files

LLVM/project 5ae2fe7mlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector invalid.mlir

[mlir][vector] Reject alignment attribute on tensor-level gather/scatter (#188924)
DeltaFile
+18-0mlir/test/Dialect/Vector/invalid.mlir
+8-0mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+26-02 files

LLVM/project ad91a2fclang-tools-extra/clang-tidy/cppcoreguidelines RvalueReferenceParamNotMovedCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix rvalue-reference-param-not-moved FP on implicit functions (#189113)

Fixes https://github.com/llvm/llvm-project/issues/187716.
DeltaFile
+61-0clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/rvalue-reference-param-not-moved.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+1-0clang-tools-extra/clang-tidy/cppcoreguidelines/RvalueReferenceParamNotMovedCheck.cpp
+67-03 files

LLVM/project eb53972mlir/include/mlir/Dialect/ControlFlow/IR ControlFlowOps.td, mlir/include/mlir/Interfaces ControlFlowInterfaces.td

[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface (#187864)

To simplify the output of the reduction-tree pass, this PR introduces
the eraseRedundantBlocksInRegion. For regions containing multiple
execution paths, this functionality selects the shortest 'interesting'
path. Additionally, this PR adds the getSuccessorForwardOperands API to
BranchOpInterface. This allows us to extract the ForwardOperands for a
specific path chosen from multiple alternatives, enabling the creation
of a cf.br operation for the redirected jump.
DeltaFile
+115-0mlir/lib/Reducer/ReductionTreePass.cpp
+66-0mlir/test/mlir-reduce/reduction-tree.mlir
+24-0mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
+10-0mlir/lib/Reducer/ReductionNode.cpp
+6-4mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+230-41 files not shown
+233-47 files

LLVM/project 097abb3clang/lib/AST/ByteCode InterpBuiltin.cpp, clang/test/AST/ByteCode builtins.c

[clang][bytecode] Handle strcmp() not pointing to primitive arrays (#188917)
DeltaFile
+12-0clang/test/AST/ByteCode/builtins.c
+3-0clang/lib/AST/ByteCode/InterpBuiltin.cpp
+15-02 files

LLVM/project cb8b65eclang/lib/AST/ByteCode Compiler.cpp Compiler.h, clang/test/CodeGenObjC no-nsconstant-literals.m objc2-constant-collection-literals.m

[clang][bytecode] Add support for objc array- and dictionary literals (#189058)
DeltaFile
+15-0clang/lib/AST/ByteCode/Compiler.cpp
+6-0clang/test/CodeGenObjC/no-nsconstant-literals.m
+6-0clang/test/CodeGenObjC/objc2-constant-collection-literals.m
+2-0clang/lib/AST/ByteCode/Compiler.h
+29-04 files

LLVM/project b9ca7e4llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

WIP
DeltaFile
+185-47mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+65-62llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+92-0mlir/test/Target/LLVMIR/openmp-iterator.mlir
+57-0mlir/test/Target/LLVMIR/omptarget-depend-iterator.mlir
+34-9llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+15-2llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+448-1202 files not shown
+462-1258 files

LLVM/project fb09449clang/lib/AST/ByteCode Compiler.cpp EvalEmitter.cpp, clang/test/CodeGenCXX reference-temporary-subobject.cpp static-local-in-local-class.cpp

[clang][bytecode] Skip rvalue subobject adjustments for global temporaries (#189044)

We only did this for local variables but were were missing it for
globals.
DeltaFile
+35-22clang/lib/AST/ByteCode/Compiler.cpp
+8-3clang/lib/AST/ByteCode/EvalEmitter.cpp
+2-3clang/lib/AST/ByteCode/Program.cpp
+1-1clang/lib/AST/ByteCode/Program.h
+2-0clang/test/CodeGenCXX/reference-temporary-subobject.cpp
+1-0clang/test/CodeGenCXX/static-local-in-local-class.cpp
+49-296 files

LLVM/project 7f48eadclang/lib/Driver Driver.cpp, clang/test/Driver hip-phases.hip

[Driver][HIP] Fix bundled -S emitting bitcode instead of assembly for device (#189140)

[Driver][HIP] Fix bundled -S emitting bitcode instead of assembly for
device

PR #188262 added support for bundling HIP -S output under the new
offload driver, but the device backend still entered the
bitcode-emitting path in ConstructPhaseAction. The condition at the
Backend phase checked for the new offload driver and directed device
code to emit TY_LLVM_BC, without excluding the -S case. This caused
the device section in the bundled .s to contain LLVM bitcode instead
of textual AMDGPU assembly.

This broke the HIP UT CheckCodeObjAttr test which greps
copyKernel.s for "uniform_work_group_size" — a string that only
appears in textual assembly, not in bitcode.

Fix by excluding -S (without -emit-llvm) from the new-driver
bitcode path, so the device backend falls through to emit TY_PP_Asm

    [3 lines not shown]
DeltaFile
+2-0clang/lib/Driver/Driver.cpp
+1-0clang/test/Driver/hip-phases.hip
+3-02 files

LLVM/project a6d6fd7flang-rt/lib/runtime CMakeLists.txt

Post-merge fixes
DeltaFile
+5-4flang-rt/lib/runtime/CMakeLists.txt
+5-41 files

LLVM/project 5d9301dlibclc/clc/lib/generic/math clc_erfc.cl clc_erf.cl, llvm/test/CodeGen/AMDGPU memmove-param-combinations.ll ctls.ll

Merge commit 'cfeee082b671e2ac6ee6c24babddf5dc89dd264c' into HEAD
DeltaFile
+601-1,016llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
+290-378llvm/test/CodeGen/X86/srem-vector-lkk.ll
+624-0llvm/test/CodeGen/AMDGPU/ctls.ll
+5-507libclc/clc/lib/generic/math/clc_erfc.cl
+5-496libclc/clc/lib/generic/math/clc_erf.cl
+334-131llvm/test/CodeGen/RISCV/memmove.ll
+1,859-2,528779 files not shown
+18,823-10,796785 files

LLVM/project cfeee08libclc/clc/lib/generic/math clc_erfc.cl clc_erf.cl, llvm/test/CodeGen/AMDGPU memmove-param-combinations.ll ctls.ll

Merge commit '6854802a3dc90c8344e64bfa03dff6e839c8c59f' into HEAD
DeltaFile
+601-1,016llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
+290-378llvm/test/CodeGen/X86/srem-vector-lkk.ll
+624-0llvm/test/CodeGen/AMDGPU/ctls.ll
+5-507libclc/clc/lib/generic/math/clc_erfc.cl
+5-496libclc/clc/lib/generic/math/clc_erf.cl
+334-131llvm/test/CodeGen/RISCV/memmove.ll
+1,859-2,528779 files not shown
+18,820-10,792785 files

LLVM/project 6854802libclc/clc/lib/generic/math clc_erfc.cl clc_erf.cl, llvm/test/CodeGen/AMDGPU memmove-param-combinations.ll ctls.ll

Merge commit 'b164e7c61020aa40995779574bb7e8064f165a09' into HEAD
DeltaFile
+601-1,016llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
+290-378llvm/test/CodeGen/X86/srem-vector-lkk.ll
+624-0llvm/test/CodeGen/AMDGPU/ctls.ll
+5-507libclc/clc/lib/generic/math/clc_erfc.cl
+5-496libclc/clc/lib/generic/math/clc_erf.cl
+334-131llvm/test/CodeGen/RISCV/memmove.ll
+1,859-2,528779 files not shown
+18,820-10,792785 files

LLVM/project 8e59c3amlir/lib/Conversion/XeVMToLLVM XeVMToLLVM.cpp

[XeVM] Fix the cache-control metadata string generation. (#187591)

Previously, it generated extra `single` quote marks around the outer
braces (i.e., `'{'` `6442:\220,1\22` `'}'`). SPIR-V backend does not
expect that. It expects `{6442:\220,1\22}`.
DeltaFile
+4-4mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
+4-41 files

LLVM/project c6fa976llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU promote-alloca-proper-value-replacement.ll

AMDGPU: Make VarIndex WeakTrackingVH in AMDGPUPromoteAlloca (#188921)

The test used to look all good, but actually not. The WeakVH just make
itself null after the pointed value being replaced. So a zero value was
used because VarIndex become null. The test checks looks all good.

Actually only the WeakTrackingVH have the ability to be updated to new
value.

Change the test slightly to make that using zero index is wrong.
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/promote-alloca-proper-value-replacement.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+4-42 files

LLVM/project bc12c38clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/lib/CodeGen CGDebugInfo.cpp

[Clang] remove redundant uses of dyn_cast (NFC) (#189106)

This removes dyn_cast invocations where the argument is already of the
target type (including through subtyping). This was created by adding a
static assert in dyn_cast and letting an LLM iterate until the code base
compiled. I then went through each example and cleaned it up. This does
not commit the static assert in dyn_cast, because it would prevent a lot
of uses in templated code. To prevent backsliding we should instead add
an LLVM aware version of
https://clang.llvm.org/extra/clang-tidy/checks/readability/redundant-casting.html
(or expand the existing one).
DeltaFile
+12-16clang/lib/Sema/Sema.cpp
+8-9clang/lib/CodeGen/CGDebugInfo.cpp
+4-6clang/tools/driver/cc1gen_reproducer_main.cpp
+4-6clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+5-5clang/lib/Frontend/InterfaceStubFunctionsConsumer.cpp
+3-4clang/lib/Sema/SemaFunctionEffects.cpp
+36-469 files not shown
+48-6315 files

LLVM/project 5bb4eeallvm/test/CodeGen/Hexagon constext-store-imm.ll target-objfile-sdata.ll

[Hexagon] Add coverage tests for AsmPrinter and misc CodeGen (#183953)

Add tests targeting assembly printing and miscellaneous CodeGen areas
with low coverage:

- asm-printer-cpool.ll: HexagonAsmPrinter exercising constant pool entry
emission.

- asm-operand-modifiers.ll: Inline asm operand modifier printing paths
(lo/hi/mem).

- target-objfile-sdata.ll, split-double-volatile.ll, reg-info-types.ll:
Miscellaneous CodeGen coverage for HexagonTargetObjectFile small data
classification, HexagonSplitDouble volatile load handling, and
HexagonRegisterInfo register class queries.

- constext-store-imm.ll: HexagonConstExtenders store-immediate
optimization paths.
DeltaFile
+56-0llvm/test/CodeGen/Hexagon/constext-store-imm.ll
+40-0llvm/test/CodeGen/Hexagon/target-objfile-sdata.ll
+33-0llvm/test/CodeGen/Hexagon/asm-printer-cpool.ll
+31-0llvm/test/CodeGen/Hexagon/reg-info-types.ll
+31-0llvm/test/CodeGen/Hexagon/asm-operand-modifiers.ll
+31-0llvm/test/CodeGen/Hexagon/split-double-volatile.ll
+222-06 files

LLVM/project 9be0cc1llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Skip last corrections and scaling for afn llvm.sqrt.f64 (#183697)

Device libs has a fast sqrt macro implemented this way.
DeltaFile
+240-652llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+140-602llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+23-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+22-17llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+425-1,2884 files

LLVM/project 1264ffcclang/lib/CodeGen/Targets RISCV.cpp, clang/test/CodeGen/RISCV riscv-fpcc-struct.c riscv64-abi.c

[clang][RISC-V] fixed fp calling convention for fpcc eligible structs for risc-v (#110690)

The code generated for calls with FPCC eligible structs as arguments
doesn't consider the bitfield, which results in a store crossing the
boundary of the memory allocated using alloca, e.g.
For the code:
```
struct __attribute__((packed, aligned(1))) S {
   const float  f0;
   unsigned f1 : 1;
};
unsigned  func(struct S  arg)
{
    return arg.f1;
} 
```
The generated IR is:
```
 define dso_local signext i32 @func(

    [29 lines not shown]
DeltaFile
+28-0clang/test/CodeGen/RISCV/riscv-fpcc-struct.c
+7-0clang/lib/CodeGen/Targets/RISCV.cpp
+2-2clang/test/CodeGen/RISCV/riscv64-abi.c
+37-23 files

LLVM/project 7b2b252llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Parse instructions in AArch64AsmParser.cpp
DeltaFile
+87-5llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+0-14llvm/lib/Target/AArch64/AArch64InstrInfo.td
+87-192 files

LLVM/project 2528d2cllvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fsqrt.f64.ll rsq.f64.ll

AMDGPU: Skip last corrections and scaling for afn llvm.sqrt.f64

Device libs has a fast sqrt macro implemented this way.
DeltaFile
+240-652llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
+140-602llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+23-17llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+22-17llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+425-1,2884 files

LLVM/project c4847d2clang/cmake/caches Fuchsia-stage2.cmake

[Fuchsia] Set LIBCXX_ABI_UNSTABLE instead of LIBCXX_ABI_VERSION (#189123)

Use the generic switch rather than encoding the version number it
currently corresponds to.
DeltaFile
+6-6clang/cmake/caches/Fuchsia-stage2.cmake
+6-61 files

LLVM/project a5fa4dbcompiler-rt/lib/asan asan_malloc_linux.cpp asan_allocator.cpp, compiler-rt/lib/hwasan hwasan_allocation_functions.cpp

[compiler-rt] Add interceptors for free_[aligned_]sized for asan+hwasan (#189109)
DeltaFile
+32-0compiler-rt/lib/hwasan/hwasan_allocation_functions.cpp
+22-0compiler-rt/lib/asan/asan_malloc_linux.cpp
+13-0compiler-rt/lib/asan/asan_allocator.cpp
+3-0compiler-rt/lib/asan/asan_allocator.h
+1-1compiler-rt/test/sanitizer_common/TestCases/Linux/free_aligned_sized.c
+1-1compiler-rt/test/sanitizer_common/TestCases/Linux/free_sized.c
+72-26 files

LLVM/project 15bc5b0libclc/clc/lib/generic/math clc_fract.inc

libclc: Simplify fract implementation (#189080)
DeltaFile
+2-2libclc/clc/lib/generic/math/clc_fract.inc
+2-21 files

LLVM/project ae0b107flang/lib/Lower/OpenMP ClauseProcessor.cpp, flang/test/Lower/OpenMP depend-iterator.f90

[Flang][OpenMP] Support iterator modifier in depend clause

This patch depend on #189090 and is part of feature work for #188061

Assisted with copilot
DeltaFile
+198-0flang/test/Lower/OpenMP/depend-iterator.f90
+63-14flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+0-10flang/test/Lower/OpenMP/Todo/depend-clause.f90
+261-243 files

LLVM/project ae63230libc/include stdint.yaml float.yaml, libc/include/sys stat.yaml epoll.yaml

[libc] Remove more header template files (#189066)

Get rid of several .h.def files which were used to ensure that the
macro definitions from llvm-libc-macro would be included in the public
header. Replace this logic with YAML instead - add entries to the
"macros" list that point to the correct "macro_header" to ensure it
would be included.

For C standard library headers, list several standard-define macros
to document their availability. For POSIX/Linux headers, only reference
a handful of macro, since more planning is needed to decide how to
represent platform-specific macro in YAML.
DeltaFile
+123-2libc/include/stdint.yaml
+17-68utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+81-2libc/include/float.yaml
+36-4libc/include/endian.yaml
+5-20libc/include/sys/stat.yaml
+5-14libc/include/sys/epoll.yaml
+267-11028 files not shown
+321-43934 files

LLVM/project 7be9972libclc CMakeLists.txt, libclc/cmake/modules AddLibclc.cmake

[libclc] Fix llvm-spirv dependency when llvm-spirv is built in-tree (#188896)

When SPIRV-LLVM-Translator is built in-tree (i.e., placed in
llvm/projects folder), llvm-spirv target exists.

Drop legacy llvm-spirv_target dependency (was for non-runtime build) and
add llvm-spirv to runtimes dependencies.
DeltaFile
+1-1libclc/cmake/modules/AddLibclc.cmake
+1-1llvm/runtimes/CMakeLists.txt
+0-1libclc/CMakeLists.txt
+2-33 files

LLVM/project 89ae675llvm/lib/Target/SPIRV SPIRVLegalizePointerCast.cpp, llvm/test/CodeGen/SPIRV/pointers store-array-of-vectors-to-vector.ll

[SPIRV][Matrix] Legalize store of matrix to array of vector memory layout (#188139)

fixes #188131

This change address stylistic changes @bogners requested in
https://github.com/llvm/llvm-project/pull/186215/ It also adds the
`storeMatrixArrayFromVector`. to
SPIRVLegalizePointerCast.cpp when we detect the matrix array of vector
memory layout
Changes to storeArrayFromVector were cleanup

Assisted-by Github Copilot for test case check lines
DeltaFile
+67-43llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
+107-0llvm/test/CodeGen/SPIRV/pointers/store-array-of-vectors-to-vector.ll
+174-432 files

LLVM/project 1128d74lld/docs/ELF linker_script.rst

[LLD][skip ci] Fix typo in linker_script.rst (#148867)
DeltaFile
+1-1lld/docs/ELF/linker_script.rst
+1-11 files