LLVM/project d2bd3fbllvm/include/llvm/IR RuntimeLibcalls.h RuntimeLibcalls.td, llvm/lib/IR RuntimeLibcalls.cpp

RuntimeLibcalls: Only provide fp128 long double libcalls when long double is fp128

The l-suffixed long double math functions (e.g, acosl, sqrtl, ...) are fp128 only
when the target's long double is fp128. The default set provided them on every
target that was not x87 or ppc_fp128, so targets using double as long
double wrongly reported the fp128 l-suffixed functions.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+22-3llvm/include/llvm/IR/RuntimeLibcalls.td
+10-6llvm/lib/IR/RuntimeLibcalls.cpp
+4-2llvm/include/llvm/IR/RuntimeLibcalls.h
+1-1llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+1-1llvm/test/TableGen/RuntimeLibcallEmitter.td
+1-1llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
+39-146 files

LLVM/project 5e30da9lldb/source/Plugins/LanguageRuntime/CPlusPlus CommonABIRuntime.h

[lldb] Remove duplicate declarations after merge (#214949)

I'm not sure why Git decided to add two duplicate declarations when
merging #212015, but this removes the duplicate ones.
DeltaFile
+0-5lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.h
+0-51 files

LLVM/project 6685d79lldb/source/Plugins/LanguageRuntime/CPlusPlus CPPLanguageRuntime.h ItaniumABIRuntime.cpp

[lldb] Allow multiple ABI runtimes for C++ (#212015)

This allows `CPPLanguageRuntime` to contain more than one ABI runtime.
For dynamic types, we ask each runtime if it knows how to deal with a
vtable symbol. For exception breakpoints, we will create all
breakpoints. Note that the MS ABI will only be added on Windows targets.
So the MS ABI will not be added to `m_abi_runtimes` on other targets.
DeltaFile
+36-16lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
+31-0lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.h
+8-6lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.h
+5-2lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
+3-2lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
+83-265 files

LLVM/project b9d5b85clang/docs/CIR index.md

[clang][CIR][docs] Fix invalid MyST toctree 'numbered' option (#213898)

Similar to #207217

The RST-to-Markdown migration (#206181) converted the RST flag
`:numbered:` into `:numbered: true`.

MyST parses the toctree `numbered` option as `int_or_nothing`, so the
string `true` fails with:

```
'toctree': Invalid option value for 'numbered': true:
invalid literal for int() with base 10: 'true'
```

This breaks the `-W` (warnings-as-errors) `docs-clang-html` build. Make
`numbered` a valueless flag, which MyST accepts (equivalent to the
original RST behavior of numbering all levels).
DeltaFile
+1-1clang/docs/CIR/index.md
+1-11 files

LLVM/project 9ee9cedllvm/unittests/IR ModuleTest.cpp

drop unit test
DeltaFile
+0-24llvm/unittests/IR/ModuleTest.cpp
+0-241 files

LLVM/project ecfb690clang/lib/CodeGen CodeGenModule.cpp

Use helper in clang
DeltaFile
+2-6clang/lib/CodeGen/CodeGenModule.cpp
+2-61 files

LLVM/project e4b9301lldb/source/Plugins/LanguageRuntime/CPlusPlus ItaniumABIRuntime.h CommonABIRuntime.h

[lldb] Move dynamic type cache to common ABI runtime (#212014)

Both the Itanium and the MS ABI want some cache for dynamic types. This
moves the functionality from the Itanium ABI to the base class.
DeltaFile
+0-16lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
+16-0lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.cpp
+11-0lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.h
+0-9lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.h
+27-254 files

LLVM/project e416b09llvm/lib/IR Instructions.cpp

[IR] Set Number of Hungoff Uses after allocation (#213304)

If allocation of the Use[] in allocHungoffUses fails (e.g. due to OOM),
it may happen that the destructor of User is called with NumUserOperands
> 0. Then `Use::zap` tries to destruct Uses that were not constructed in
the first place.

Example scenario for SwitchInst:
`SwitchInst::init()` is called, which means the constructor of the
parent class User went through successfully, which means the destructor
of User will be called eventually. If now `SwitchInst::init()` calls
first `setNumHungOffUseOperands(2)` and then `allocHungoffUses()` and
the allocation there fails, `~User()` is called and tries to destruct 2
Uses, which can lead to problems.

This patch consequently ensures that first the allocation happens and
then NumUserOperands is set accordingly, so that this problem is
prevented.
DeltaFile
+8-8llvm/lib/IR/Instructions.cpp
+8-81 files

LLVM/project 21bcdabllvm/test/Analysis/CostModel/X86 reduce-xor.ll reduce-or.ll, llvm/test/Transforms/PhaseOrdering/X86 avg.ll

[CostModel][X86] Update logic vector reduction costs to match llvm-mca estimates (#214191)

Replaces the olds costs which were just instruction counts

Still working on the bool reduction costs - these will be handled in a followup
DeltaFile
+146-155llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
+102-84llvm/test/Analysis/CostModel/X86/reduce-xor.ll
+102-84llvm/test/Analysis/CostModel/X86/reduce-or.ll
+102-84llvm/test/Analysis/CostModel/X86/reduce-and.ll
+34-122llvm/test/Transforms/PhaseOrdering/X86/avg.ll
+69-57llvm/test/Transforms/VectorCombine/X86/fold-reduction-zero-test.ll
+555-58610 files not shown
+731-73216 files

LLVM/project bc529d7libc/test/src/__support/FPUtil float80_test.cpp

clang-format
DeltaFile
+1-4libc/test/src/__support/FPUtil/float80_test.cpp
+1-41 files

LLVM/project acc96e6libc/test/src/__support/FPUtil float80_test.cpp

add edge cases test
DeltaFile
+39-1libc/test/src/__support/FPUtil/float80_test.cpp
+39-11 files

LLVM/project 1838717llvm/include/llvm/IR IntrinsicsNVVM.td, llvm/lib/IR AutoUpgrade.cpp

[NVPTX] Add Rubin extensions to tcgen05.commit (#211577)

The Rubin architecture extends `tcgen05.commit` operations with two
additional features: support for 32-bit CTA multicast masks and the
ability to track completion of Matrix A reads from shared memory for all
prior `tcgen05.mma` operations.

This change adds support for these features to the `tcgen05.commit`
intrinsics. In addition, it also replaces generic/shared variants with
overloaded intrinsics.
DeltaFile
+438-0llvm/test/CodeGen/NVPTX/tcgen05-commit-sm107.ll
+31-12llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
+35-0llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
+35-0llvm/lib/IR/AutoUpgrade.cpp
+16-16llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
+10-18llvm/include/llvm/IR/IntrinsicsNVVM.td
+565-465 files not shown
+600-7211 files

LLVM/project 2f9775amlir/include/mlir/Dialect/WasmSSA/IR WasmSSAOps.td, mlir/include/mlir/Target/Wasm WasmBinaryEncoding.h

[mlir][wasm] Support for saturating FP truncations (#212709)

Add support for saturate truncation of float to int operations.

This also requires the support of parser with sub-opcodes.
This is handled by supporting parser with extra argument for sub-opcode.

---------

Co-authored-by: Ferdinand Lemaire <ferdinand.lemaire at woven-planet.global>
DeltaFile
+344-262mlir/lib/Target/Wasm/TranslateFromWasm.cpp
+94-0mlir/test/Target/Wasm/trunc_sat.mlir
+69-0mlir/test/Target/Wasm/inputs/trunc_sat.yaml.wasm
+30-0mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAOps.td
+2-0mlir/include/mlir/Target/Wasm/WasmBinaryEncoding.h
+539-2625 files

LLVM/project b9d5c24llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp

[AMDGPU] Check operand for split barrier in both assembler and disassembler (#214916)

Fixes #214910.
DeltaFile
+10-10llvm/test/MC/AMDGPU/gfx13_asm_sop1.s
+12-0llvm/test/MC/AMDGPU/gfx12_err.s
+10-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+8-1llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+9-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+49-115 files

LLVM/project 4525940flang/docs FAQ.md ReleaseNotesTemplate.txt, lldb/docs/use aarch64-linux.md

[docs] Use colon fences in LLDB and Flang docs
DeltaFile
+4-4flang/docs/ReleaseNotesTemplate.txt
+4-4flang/docs/ReleaseNotes.md
+4-4flang/docs/GettingStarted.md
+2-2lldb/docs/use/aarch64-linux.md
+2-2flang/docs/FAQ.md
+16-165 files

LLVM/project 90cc2a4llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.h AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU decode-err.txt

[AMDGPU] Fix an AMDGPU disassembler crash (#214914)

Fixes #214909.
DeltaFile
+6-3llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+5-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+1-1llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
+12-43 files

LLVM/project 0d465dellvm/docs SourceLevelDebugging.md GitHub.md

[docs] Use colon fences for rich MyST directives
DeltaFile
+34-34llvm/docs/Remarks.md
+22-22llvm/docs/LangRef.md
+16-16llvm/docs/InstrProfileFormat.md
+14-14llvm/docs/CodeGenerator.md
+12-12llvm/docs/SourceLevelDebugging.md
+12-12llvm/docs/GitHub.md
+110-11035 files not shown
+264-26241 files

LLVM/project 3bdc678llvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp

[AMDGPU] Check operand for split barrier in both assembler and disassembler

Fixes #214910.
DeltaFile
+10-10llvm/test/MC/AMDGPU/gfx13_asm_sop1.s
+12-0llvm/test/MC/AMDGPU/gfx12_err.s
+11-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+8-1llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+9-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+50-115 files

LLVM/project b9f4d1dllvm/docs SphinxQuickstartTemplate.md

[docs] Recommend colon fences for rich MyST directives
DeltaFile
+23-0llvm/docs/SphinxQuickstartTemplate.md
+23-01 files

LLVM/project f041dd4llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.h AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU decode-err.txt

[AMDGPU] Fix an AMDGPU disassembler crash

Fixes #214909.
DeltaFile
+6-3llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+5-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+1-1llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
+12-43 files

LLVM/project 756e26alibclc/test lit.cfg.py, libclc/test/conformance work_group_reduce.cl conformance.h

[libclc] Add math smoke test for cos special values (#214786)

Summary:
Basic math version of unit tests used to give reference for how these
can test the known special values. SImilar to LLVM libc's smoke math
tests on the GPU. More can be added later,
DeltaFile
+88-0libclc/test/conformance/math/cos.cl
+57-0libclc/test/conformance/conformance.h
+0-12libclc/test/conformance/work_group_reduce.cl
+12-0libclc/test/conformance/workgroups/work_group_reduce.cl
+3-1libclc/test/lit.cfg.py
+160-135 files

LLVM/project 20667a6libcxx/include optional, libcxx/test/std/iterators/iterator.range mandatory_inclusions.gen.py

[libc++] Include range access headers in `<optional>` only since C++26 (#214688)

Inclusions of internal range access headers address LWG4131 which
patches P3168R2 "Give `std::optional` Range Support". As P3168R2 is
certainly a new feature in C++26, these includes are unnecessary in old
modes.

It was reported that these increased the size of `<optional>` by ~8%, so
probably it is better to avoid such cost in old modes.
DeltaFile
+7-5libcxx/include/optional
+10-0libcxx/test/std/iterators/iterator.range/mandatory_inclusions.gen.py
+17-52 files

LLVM/project 8221a85llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp, llvm/test/CodeGen/NVPTX cache-hint-load-store.ll

[NVPTX] Drop cache hints on volatile loads/stores (#214830)

https://github.com/llvm/llvm-project/pull/204067 added cache hint
metadata support for NVPTX. I forgot to handle volatile loads/stores
correctly. Volatile loads only support .level::prefetch_size and
volatile stores don't support any cache hints. This PR drops unsupported
metadata for volatile loads/stores.
DeltaFile
+27-23llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+25-0llvm/test/CodeGen/NVPTX/cache-hint-load-store.ll
+52-232 files

LLVM/project db116a9libclc/test/math cos.cl

[libclc][test] Update cos.cl checks after fneg FP-options fix (#214906)

ceaff22ed2c3 ([Clang][CodeGen] Respect FP pragma options for fneg and
calls) scopes fneg's fast-math flags to the expression's own FPOptions
instead of the ambient IRBuilder state, so one fneg in cos.cl's
generated IR no longer carries contract. Regenerate check.

Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
DeltaFile
+1-1libclc/test/math/cos.cl
+1-11 files

LLVM/project a44318bclang/include/clang/Driver SanitizerArgs.h, clang/lib/Driver SanitizerArgs.cpp

[Driver][KCFI] Forward -fsanitize-kcfi-hash= to cc1 (#214827)

-fsanitize-kcfi-hash= is a CC1Option that selects the hash algorithm
used to derive KCFI type IDs (xxHash64 or FNV-1a), but the driver never
claimed or forwarded it. As a result, invocations like

  clang -fsanitize=kcfi -fsanitize-kcfi-hash=FNV-1a foo.c

silently dropped the flag with an "argument unused during compilation"
warning; users had to route it through -Xclang to reach cc1. This is
particularly awkward for build systems (e.g. the Linux kernel) that want
to select FNV-1a for -fsanitize=kcfi builds.

Handle the option in SanitizerArgs alongside -fsanitize-kcfi-arity:
capture the last-specified value when KCFI is enabled and forward it to
cc1 as -fsanitize-kcfi-hash=<value>. Values are still validated by cc1's
tablegen-driven Values<"xxHash64,FNV-1a"> checker, so bad values produce
the usual "invalid value" diagnostic. When -fsanitize=kcfi is not
specified, the flag remains unclaimed and triggers

    [9 lines not shown]
DeltaFile
+32-0clang/test/Driver/fsanitize-cfi.c
+6-0clang/lib/Driver/SanitizerArgs.cpp
+2-0clang/include/clang/Driver/SanitizerArgs.h
+40-03 files

LLVM/project 49deb52llvm/lib/MC MCPseudoProbe.cpp, llvm/test/MC/ELF pseudoprobe-order.s

[MC] Make pseudo-probe divisions ordering stable (#214803)

**Problem**

`MCPseudoProbeSections::emit` sorts probe divisions only by section
ordinal.

Functions sharing a section will have a nondeterministic `unordered_map`
iteration order, producing *different .pseudo_probe bytes for identical
inputs.*

**Solution**


Use the function symbol name as a stable tie-breaker when section
ordinals match.

Add an MC regression test that reverses pseudo-probe insertion order and
requires byte-identical object files.

    [4 lines not shown]
DeltaFile
+31-0llvm/test/MC/ELF/pseudoprobe-order.s
+5-3llvm/lib/MC/MCPseudoProbe.cpp
+36-32 files

LLVM/project 12336bbllvm/lib/Target/RISCV RISCVInstrInfoZilsd.td RISCVInstrInfoF.td, llvm/lib/Target/RISCV/AsmParser RISCVAsmParser.cpp

[RISC-V] Use an optional offset operand instead of zero-offset InstAliases

Introduce OptionalMemOffsetAsmOperand, which wraps a memory-offset
operand class into a variant with `IsOptional` set so that a memory
operand written without an offset, e.g. "lb a0, (a1)", parses with a
default offset of 0, and use it for a simm12_lo_optional operand. This
replaces the hand-written "(${rs1})" zero-offset InstAlias that every
load/store-style instruction needed (scalar and FP loads/stores, Zilsd,
jr/jalr and the .insn_i/.insn_s memory forms).

OptionalMemOffsetAsmOperand is somewhat complicated, but this makes it
easier to replace all the other optional zero memory operands which I
will do in follow-up commits, removing all the InstAlias duplication.

This change was assisted by AI.

Pull Request: https://github.com/llvm/llvm-project/pull/210901
DeltaFile
+47-50llvm/lib/Target/RISCV/RISCVInstrInfo.td
+20-13llvm/test/MC/RISCV/tlsdesc.s
+2-23llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+19-0llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+2-5llvm/lib/Target/RISCV/RISCVInstrInfoZilsd.td
+2-5llvm/lib/Target/RISCV/RISCVInstrInfoF.td
+92-964 files not shown
+94-11010 files

LLVM/project f5f3c6abolt/include/bolt/Utils Utils.h, bolt/lib/Core BinaryContext.cpp

[BOLT] Page out .dwo files

Split-DWARF inputs at big binaries scale ship 100+ GiB of .dwo
files. BOLT opened a fair number of them during readDebugInfo, putting
a lot of pressure on the OS memory management: mmap'd reads always
populate the page cache; with every .dwo mapped at once those pages
accumulated, refaulted, and registered as memory pressure that got the
process oomd-killed.

Now, .dwo page-cache pages are reclaimed as soon as BOLT is done with
each file: madvise(MADV_PAGEOUT) on the live mapping, then
posix_fadvise(POSIX_FADV_DONTNEED) once it is unmapped. Controlled by
-drop-dwo-page-cache, OFF by default, as it is unlikely upstream
will be processing gigantic sets of dwo files.
DeltaFile
+68-2bolt/lib/Core/BinaryContext.cpp
+37-0bolt/lib/Utils/Utils.cpp
+11-0bolt/include/bolt/Utils/Utils.h
+116-23 files

LLVM/project 76e43e0bolt/include/bolt/Core BinaryContext.h, bolt/lib/Core BinaryContext.cpp

[BOLT] Create and release .dwo DWARF contexts incrementally

BOLT opened a DWARFContext for every .dwo during
readDebugInfo and kept them all alive until teardown. On large
split-DWARF targets that is tens of GiB held resident through
emission, the point of peak RSS.

Make the DWOCUs map a lazily-populated cache instead:

 * Use the newly added DWARFUnit::clearDWO()/hasDWO() to directly
   manage DWARFUnit's DIE caching mechanism.
 * BinaryContext::getDWOCU() opens a context on demand (keyed off a
   stable DWOId -> skeleton CU map).
 * Release contexts as soon as they are done with: all of them at the
   end of readDebugInfo, and per-bucket at the DWARF rewrite merge
   point.
 * Remove DWOCUs map, which became redundant and whose purpose can
   now be served by the new id-to-skeleton map, and then fetching
   the split CU from the skeleton via getNonSkeletonUnitDIE().

    [5 lines not shown]
DeltaFile
+110-52bolt/lib/Core/BinaryContext.cpp
+31-10bolt/include/bolt/Core/BinaryContext.h
+9-14bolt/lib/Rewrite/DWARFRewriter.cpp
+2-0bolt/lib/Rewrite/RewriteInstance.cpp
+152-764 files

LLVM/project 92d70d9llvm/lib/Target/DirectX DXILShaderFlags.cpp DXIL.td, llvm/test/CodeGen/DirectX WaveGetLaneCount.ll

[HLSL][DirectX] Implement WaveGetLaneCount lowering (#156338)

Fixes #99159

---------

Co-authored-by: Justin Bogner <mail at justinbogner.com>
DeltaFile
+13-0llvm/test/CodeGen/DirectX/WaveGetLaneCount.ll
+9-0llvm/lib/Target/DirectX/DXIL.td
+7-0llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
+1-1llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+30-14 files