LLVM/project f8e3228 — llvm/lib/Target/X86 X86PreTileConfig.cpp, llvm/test/CodeGen/X86/AMX amx-fastconfig.mir amx-fastconfig-spill.mir

X86: Mark the tile register defs of PLDTILECFGV dead (#227602)

ldtilecfg invalidates all tile registers, which the pseudo models by
listing them in Defs. Nothing reads them from the configuration
instruction itself, so mark them dead where the pseudo is built instead
of leaving it to be re-inferred.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+11-11llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
+5-5llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
+4-4llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
+4-4llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
+3-3llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
+2-1llvm/lib/Target/X86/X86PreTileConfig.cpp
+29-282 files not shown
+31-298 files

LLVM/project 6247c91 — llvm/include/llvm/CodeGen SjLjEHPrepare.h, llvm/include/llvm/Target TargetMachine.h

Triple: Move getSjLjDataSize off TargetMachine

This eliminates the TargetMachine dependence of SjLjEHPrepare.
The pass had the questionable behavior of just proceeding with the
default size without a TargetMachine. VE is the only user and changes
the integer bitwidth used, and this doesn't seem worthwhile of a
virtual function. Move to the triple in keeping with migrating
ABI parameters out of codegen.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+5-11llvm/lib/CodeGen/SjLjEHPrepare.cpp
+6-0llvm/lib/TargetParser/Triple.cpp
+0-5llvm/include/llvm/CodeGen/SjLjEHPrepare.h
+0-4llvm/include/llvm/Target/TargetMachine.h
+4-0llvm/include/llvm/TargetParser/Triple.h
+0-2llvm/lib/Target/VE/VETargetMachine.h
+15-224 files not shown
+19-2610 files

LLVM/project 02ff559 — llvm/lib/Target/PowerPC PPCInstrVSX.td PPCInstrInfo.td

[PowerPC] Correct the SDTypeProfile for VECSHL and FP_EXTEND_HALF. (#228341)

These used SDTCisPtrTy, but the operand is always created with i32 type.
DeltaFile
+1-1llvm/lib/Target/PowerPC/PPCInstrVSX.td
+1-1llvm/lib/Target/PowerPC/PPCInstrInfo.td
+2-22 files

LLVM/project db412aa — llvm/lib/Target/Mips MipsSEISelLowering.cpp

[Mips] Convert index to pointer type in lowerMSACopyIntr. (#228332)

The MipsISD::VEXTRACT_[SZ]EXT_ELT nodes expect a pointer sized index.

Found while trying to implement SDTCisPtrTy checking in verifySDNode.
DeltaFile
+3-1llvm/lib/Target/Mips/MipsSEISelLowering.cpp
+3-11 files

LLVM/project 9bb435a — llvm/bindings/ocaml/llvm llvm_ocaml.c, llvm/bindings/ocaml/target target_ocaml.c

[llvm-c][ocaml] Move DataLayout bindings from Target to Core/IR (#227714)

DataLayout is part of IR (or "Core" in C API terminology), so bindings
for it should be defined there as well. They were part of Target for
historical reasons.

This is to avoid any layering issues with referencing DataLayout from IR
APIs.
DeltaFile
+6-126llvm/include/llvm-c/Target.h
+129-0llvm/include/llvm-c/Core.h
+0-117llvm/bindings/ocaml/target/target_ocaml.c
+114-0llvm/bindings/ocaml/llvm/llvm_ocaml.c
+0-97llvm/lib/Target/Target.cpp
+94-0llvm/lib/IR/Core.cpp
+343-34015 files not shown
+481-46521 files

LLVM/project 4c53405 — llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU optimize-compare.mir

[AMDGPU] Generalize deletion of redundant s_or_b32 of a 64-bit select (#228034)

When deleting s_or_b32 of the two halves of a 64-bit S_CSELECT, use
getSelectConstants instead of foldableSelect. This handles materialized
constants, and a select whose true value is 0 by inverting the SCC uses.

Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+129-0llvm/test/CodeGen/AMDGPU/optimize-compare.mir
+10-16llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+139-162 files

LLVM/project 45000a5 —

[AArch64] Add test for shuffle into zero lane of zero. NFC (#228347)
DeltaFile
+0-00 files

LLVM/project cc2227d — llvm/test/CodeGen/AMDGPU branch-relaxation-gfx1250.ll

[AMDGPU] Remove unused prefix from branch relaxation test (#228344)

This was added spuriously in #175644.
DeltaFile
+0-364llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
+0-3641 files

LLVM/project ce4bf0f — llvm/lib/Target/X86 X86ISelLowering.cpp

[X86] Use integer VT for second argument of X86ISD::VPERMILPV in combineConcatVectorOps. (#228257)

Found by adding SDTCisInt support to verifySDNode

Assisted-by: Claude
DeltaFile
+5-4llvm/lib/Target/X86/X86ISelLowering.cpp
+5-41 files

LLVM/project e895b5c — orc-rt/test/unit/bedrock/sps CallSPSCITest.cpp

[orc-rt] Use the Error matchers in CallSPSCITest (#228353)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in CallSPSCITest.
DeltaFile
+5-6orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
+5-61 files

LLVM/project 08795f5 — llvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/lib/Target/Hexagon HexagonHardwareLoops.cpp HexagonOptAddrMode.cpp

Targets: Remove redundant TRI arguments from InstrInfo helpers

This is directly available in TargetInstrInfo.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+9-8llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+7-8llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
+6-8llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+4-6llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+3-3llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
+2-2llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
+31-358 files not shown
+41-5014 files

LLVM/project 0d12d6e — llvm/include/llvm/CodeGen MachineScheduler.h, llvm/lib/CodeGen MachineScheduler.cpp

Fix unused variables
DeltaFile
+11-19llvm/lib/CodeGen/MachineScheduler.cpp
+4-4llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-5llvm/include/llvm/CodeGen/MachineScheduler.h
+1-1llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
+0-1llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
+18-305 files

LLVM/project 7a0d631 — llvm/lib/Transforms/IPO AttributorAttributes.cpp, llvm/test/Transforms/Attributor callees-metadata-escape.ll

[Attributor] Treat a use by an externally visible global as an escape (#228283)

AAGlobalValueInfo collects the in-module uses of a local function, and
AAIndirectCallInfo uses them to drop !callees targets whose address
cannot reach the call. It follows uses through global initializers
without checking whether the global is visible outside the module, so it
misses an address that escapes that way.

For an internal function whose address is stored in an external global
and that is called through a pointer argument, the Attributor drops the
only !callees target and replaces the call with unreachable. This
happens in the module pass, in the CGSCC pass when the function and the
caller are in one SCC, and in OpenMPOpt, which runs the Attributor on
OpenMP device code at -O1 and above.

Treat a use by a global without local linkage as an escape unless the
module is a closed world.
DeltaFile
+89-0llvm/test/Transforms/Attributor/callees-metadata-escape.ll
+5-0llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+94-02 files

LLVM/project 298d3ac — lldb/bindings/interface SBProcessDocstrings.i, lldb/bindings/python python-typemaps.swig

[lldb] Decode debuggee bytes to Python str with "replace" (#224010)

Reading a C string that is not valid UTF-8 raises `SystemError`, even
though
the read succeeded and the `SBError` reports success:

```
(lldb) script
>>> process.ReadCStringFromMemory(addr, 2048, lldb.SBError())
SystemError: <built-in function SBProcess_ReadCStringFromMemory> returned
NULL without setting an exception
```

The `argout` typemap built the result with `PythonString`, which
requires
valid UTF-8. On failure `PythonString::SetString` consumes the error,
and
`PythonException`'s constructor has already called `PyErr_Clear()`, so
the

    [18 lines not shown]
DeltaFile
+16-0lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
+5-6lldb/bindings/python/python-typemaps.swig
+2-1lldb/bindings/interface/SBProcessDocstrings.i
+3-0lldb/test/API/python_api/process/read-mem-cstring/main.c
+26-74 files

LLVM/project 1d034aa — llvm/include/llvm/CodeGen TargetPassConfig.h, llvm/include/llvm/Support CodeGen.h

Replace the machine verify bools with a MachineVerifierMode enum
DeltaFile
+15-5llvm/lib/CodeGen/TargetPassConfig.cpp
+10-0llvm/include/llvm/Support/CodeGen.h
+3-3llvm/include/llvm/CodeGen/TargetPassConfig.h
+2-2llvm/tools/llc/lib/NewPMDriver.cpp
+2-2llvm/include/llvm/Target/CGPassBuilderOption.h
+1-2llvm/tools/llc/lib/llcdriver.cpp
+33-142 files not shown
+35-178 files

LLVM/project c69706d — llvm/lib/Passes CodeGenPassBuilder.cpp

Use unnegated PrintAsm for the verifier condition
DeltaFile
+2-2llvm/lib/Passes/CodeGenPassBuilder.cpp
+2-21 files

LLVM/project 6818493 — llvm/test/CodeGen/AArch64 shuffle-insert-zero.ll

[AArch64] Add test for shuffle into zero lane of zero. NFC (#228347)
DeltaFile
+494-0llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
+494-01 files

LLVM/project 4172fa0 — orc-rt/test/unit/bedrock SimpleSymbolTableTest.cpp

[orc-rt] Use the Error matchers in SimpleSymbolTableTest (#228343)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleSymbolTableTest.

The isA<StringError>() checks become Failed<StringError>(), with the
message checks folded in as a Property matcher on StringError::toString
so that both the type and the message are still verified.
DeltaFile
+27-25orc-rt/test/unit/bedrock/SimpleSymbolTableTest.cpp
+27-251 files

LLVM/project fb21c44 —

[lldb] Step through inlined code when stepping out of inline frame N > 0 (#226910)

To step out of an inline frame N > 0, ThreadPlanStepOut first steps out
to frame N, then queues a plan that steps through the inlined block. Due
to a bug, ShouldStop marks the plan complete right after it queues that
plan, so the thread stops as soon as it reaches frame N, with no stop
reason.

In fact, the comment next to that code describes the intended behavior
while implementing something different: only call the StepOut plan done
if the "step out from line" plan cannot be queued.

For example, consider this backtrace:
```
  frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
  frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
  frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
  frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
  frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]

    [8 lines not shown]
DeltaFile
+0-00 files

LLVM/project c834457 — lldb/source/Target ThreadPlanStepOut.cpp, lldb/test/API/functionalities/thread/step_out_inline Makefile main.c

[lldb] Step through inlined code when stepping out of inline frame N > 0 (#226910)

To step out of an inline frame N > 0, ThreadPlanStepOut first steps out
to frame N, then queues a plan that steps through the inlined block. Due
to a bug, ShouldStop marks the plan complete right after it queues that
plan, so the thread stops as soon as it reaches frame N, with no stop
reason.

In fact, the comment next to that code describes the intended behavior
while implementing something different: only call the StepOut plan done
if the "step out from line" plan cannot be queued.

For example, consider this backtrace:
```
  frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
  frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
  frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
  frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
  frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]

    [8 lines not shown]
DeltaFile
+30-0lldb/test/API/functionalities/thread/step_out_inline/TestThreadStepOutInline.py
+18-0lldb/test/API/functionalities/thread/step_out_inline/main.c
+5-7lldb/source/Target/ThreadPlanStepOut.cpp
+3-0lldb/test/API/functionalities/thread/step_out_inline/Makefile
+56-74 files

LLVM/project 2901c5a — llvm/lib/Target/RISCV RISCVRedundantCopyElimination.cpp, llvm/test/CodeGen/RISCV xandesperf-redundant-copy-elim.ll redundant-copy-elim.ll

[RISCV] Eliminate redundant materializations after register comparison (#227673)

`RISCVRedundantCopyElimination` can eliminate redundant immediate
materializations when a branch establishes a known immediate value, but
does not handle register-register `BEQ`/`BNE` when one operand is a
non-zero immediate materialized in a register.

Extend the pass to recognize `ADDI` from `X0` and `QC_LI`
materializations before the branch. On the equality edge, reuse that
known immediate so an identical materialization in the successor can be
removed. `X0` is excluded as a target register because writes to it are
discarded.

Tests cover `BEQ`/`BNE`, both operand orders, clobbers, `X0`, RV32/RV64,
and the relevant Xqci and XAndes variants.

AI tool usage: OpenAI Codex assisted with this contribution. I reviewed
and take responsibility for the final changes.

Assisted-by: OpenAI Codex
DeltaFile
+336-0llvm/test/CodeGen/RISCV/redundant-copy-elim-reg-imm.mir
+59-6llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
+6-10llvm/test/CodeGen/RISCV/xqcibi-redundant-copy-elim.ll
+3-6llvm/test/CodeGen/RISCV/xandesperf-redundant-copy-elim.ll
+3-6llvm/test/CodeGen/RISCV/redundant-copy-elim.ll
+407-285 files

LLVM/project d3e9891 — clang/lib/Interpreter InterpreterValuePrinter.cpp, clang/test/Interpreter pretty-print.cpp

[clang-repl] Evaluate a void expression that has no trailing semicolon (#228334)

An expression statement without a semicolon at the end of an input is
replaced by a call to `__clang_Interpreter_SetValueNoAlloc` that
captures its value. For an expression of type `void`, the expression was
not an argument of that call and was dropped, so `f()` did not call `f`.

Build `(E, __clang_Interpreter_SetValueNoAlloc(...))` instead.

Fixes #219800.

Assisted-by: Claude Opus 5.5
DeltaFile
+15-0clang/unittests/Interpreter/InterpreterTest.cpp
+11-0clang/test/Interpreter/pretty-print.cpp
+7-3clang/lib/Interpreter/InterpreterValuePrinter.cpp
+33-33 files

LLVM/project 63ba944 — orc-rt/test/unit/bedrock SimpleNativeMemoryMapTest.cpp

[orc-rt] Use the Error matchers in SimpleNativeMemoryMapTest (#228335)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleNativeMemoryMapTest.
DeltaFile
+64-52orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
+64-521 files

LLVM/project d950230 — llvm/lib/ExecutionEngine/Orc/TargetProcess RegisterEHFrames.cpp

Revert "[ORC] Use __unw_add_dynamic_eh_frame_section/__unw_remove_dyn… (#227894)

…amic_eh_ frame_section in RegisterEHFrames.cpp (#212260)"

Revert commit d49626c811c304c047e028a80cedc0d377f49dfb due to link
failures on some platforms (see discussion in PR).
DeltaFile
+1-26llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
+1-261 files

LLVM/project f0d14b7 — llvm/test/Analysis/CostModel/AMDGPU cmp-select.ll select.ll, llvm/test/Transforms/LoopUnroll/AMDGPU unroll-cost-cmp-select.ll

[AMDGPU] Add getCmpSelInstrCost override to re-enable SimplifyCFG speculation for vector types (#208043)

Commit ["[CostModel] Handle all cost kinds in
getCmpSelInstrCost"](https://github.com/llvm/llvm-project/commit/0967957d7a94e1b5c749c6e963bdca25f3c6d749)
changed the base cost model to consider the type in the costs for
non-throughput cost kinds. This caused SimplifyCFG to stop folding
branches to selects on AMDGPU, since
vector selects now report higher costs that exceed the folding
threshold.

Add an getCmpSelInstrCost override for AMDGPU to partially restore the
old behavior by returning a constant unit cost for cost kind
`TCK_SizeAndLatency`. This affects speculative execution in SimplifyCFG
and SpeculativeExecution.
DeltaFile
+446-0llvm/test/Analysis/CostModel/AMDGPU/cmp.ll
+367-0llvm/test/Analysis/CostModel/AMDGPU/select.ll
+193-0llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block-regpressure.ll
+178-0llvm/test/Analysis/CostModel/AMDGPU/cmp-select.ll
+58-0llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-cmp-select.ll
+29-0llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block.ll
+1,271-02 files not shown
+1,291-08 files

LLVM/project ee54351 — orc-rt/include/orc-rt/bedrock SocketConnector.h VettedPeer.h, orc-rt/include/orc-rt/bedrock/sps SimpleRemoteCAOverSocket.h

[orc-rt] Add VettedPeer, require it for the socket transport (#228336)

The controller at the other end of a channel can make the executor run
arbitrary code, so attaching to it is a trust decision.
VettedPeer<ChannelT> makes that decision explicit: it can only be made
through one of three named factories -- inherited, checked or unchecked
-- each naming the reason the peer is trusted.
createSimpleRemoteCAOverSocket now takes a VettedPeer<SocketHandle>
rather than a bare SocketHandle.

VettedPeer neither verifies nor records the reason. The factories exist
so that the decision can't be skipped by omission, and so that every
choice is visible in the source.

The socket:adopt connector trusts its socket as inherited, and documents
the resulting precondition on its callers.

Assisted-by: Claude
DeltaFile
+68-0orc-rt/include/orc-rt/bedrock/VettedPeer.h
+44-0orc-rt/test/unit/bedrock/VettedPeerTest.cpp
+8-4orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
+10-2orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
+5-0orc-rt/include/orc-rt/bedrock/SocketConnector.h
+2-2orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
+137-83 files not shown
+142-99 files

LLVM/project 8c48360 — clang/cmake/caches Fuchsia.cmake Fuchsia-stage2-instrumented.cmake

[Fuchsia] Escape ';' in STAGE2_ CMake variables (#228272)

When forwarding STAGE2_* variables to EXTRA_ARGS in Fuchsia.cmake and
Fuchsia-stage2-instrumented.cmake, semicolons in list values must be
replaced with '|' to match the LIST_SEPARATOR of ExternalProject_Add.

In 70cf616b331c, 'list(APPEND EXTRA_ARGS "-D${variableName}=...")' was
added using the raw '${${variableName}}' before replacing ';' with '|',
and Fuchsia-stage2-instrumented.cmake similarly omitted the ';' to '|'
replacement.

When a list variable like STAGE2_CROSS_TOOLCHAIN_FLAGS_NATIVE contains
semicolon-separated '-D...' flags (such as CMAKE_EXE_LINKER_FLAGS),
appending it without escaping splits it into separate top-level CMake
arguments for stage2. Because STAGE2_CROSS_TOOLCHAIN_FLAGS_NATIVE sorts
alphabetically after STAGE2_CMAKE_*_LINKER_FLAGS, its split flags
overwrite the stage2 linker flags with the stage0 toolchain's libc++.a,
causing stage2 link failures on macOS.
DeltaFile
+2-1clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
+1-1clang/cmake/caches/Fuchsia.cmake
+3-22 files

LLVM/project 0ff9f92 — llvm/tools/llvm-profdata llvm-profdata.cpp

[llvm-profdata] Propagate Error in loadInput and mergeWriterContexts (#228158)

[llvm-profdata] Propagate Error in loadInput and mergeWriterContexts

Propagate Error from loadInput and mergeWriterContexts in
mergeInstrProfile,
supplementInstrProfile, and overlapInstrProfile. In mergeInstrProfile's
ThreadPool, catch errors from worker threads, stop scheduling new jobs,
and return the first encountered fatal error.

Ensure ~WriterContext() consumes any pending unhandled errors in
WriterContext::Errors upon destruction.

Not NFC as destructors are run on the stack and ThreadPool workers exit
earlier on error.

With all subcommands propagating llvm::Error to main, exitWithError,
exitWithErrorCode, and the LSan leak suppression workaround are no
longer needed.

Assisted-by: Gemini
DeltaFile
+64-41llvm/tools/llvm-profdata/llvm-profdata.cpp
+64-411 files

LLVM/project 7ff7598 — orc-rt/test/unit/bedrock SessionTest.cpp

[orc-rt] Use the Error matchers in SessionTest (#228331)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SessionTest.
DeltaFile
+43-29orc-rt/test/unit/bedrock/SessionTest.cpp
+43-291 files

LLVM/project 013fb4f — compiler-rt/test/msan release_origin.c

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+7-7compiler-rt/test/msan/release_origin.c
+7-71 files