LLVM/project a8a36f1llvm/lib/Transforms/Vectorize VPlan.cpp VPlanHelpers.h

[LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (#212063)

Hoist the header-phi backedge fixup loop at the end of VPlan::execute
into a helper VPTransformState::fixupHeaderPhiBackedges.
DeltaFile
+22-18llvm/lib/Transforms/Vectorize/VPlan.cpp
+5-0llvm/lib/Transforms/Vectorize/VPlanHelpers.h
+27-182 files

LLVM/project 0a7d5c7llvm/test/CodeGen/Hexagon swp-epilog-phi12.mir

[Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (#212062)
DeltaFile
+1-0llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
+1-01 files

LLVM/project 01e63aaclang/test/OffloadTools/clang-linker-wrapper linker-wrapper.c linker-wrapper-hip-no-rdc.c, clang/test/OffloadTools/clang-offload-bundler basic.c zlib.c

clang/AMDGPU: Migrate clang-linker-wrapper tests to amdgpu triples (15)

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+59-59clang/test/OffloadTools/clang-offload-bundler/basic.c
+33-33clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
+21-21clang/test/OffloadTools/clang-offload-bundler/zlib.c
+16-16clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
+13-13clang/test/OffloadTools/clang-offload-bundler/zstd.c
+8-8clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
+150-1504 files not shown
+158-15810 files

LLVM/project 1c7cd7fclang/test/CodeGen link-builtin-bitcode.c, clang/test/CodeGenCUDA link-builtin-bitcode-denormal-fp-mode.cu

clang/AMDGPU: Rename amdgcn triples to amdgpu in cc1 tests (14)

Replace the legacy amdgcn architecture name with amdgpu in various
test triples. This set of updates covers cases that did not have
a set -target-cpu.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+12-21clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
+11-11clang/test/Misc/amdgcn.languageOptsOpenCL.cl
+10-10clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
+10-10clang/test/CodeGen/link-builtin-bitcode.c
+8-8clang/test/CodeGenOpenCL/sqrt-fpmath.cl
+8-8clang/test/Headers/openmp_device_math_isnan.cpp
+59-68261 files not shown
+485-495267 files

LLVM/project 8f4b357llvm/include/llvm/CodeGen SelectionDAG.h, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp DAGCombiner.cpp

DAG: Use poison in getLoad/getStore for offsets

The painful part of this is due to a few unfortunate things.

1. poison is legalized to undef
2. Non-indexed load/store encode the offset as an undef (which is
   not like a TargetConstant, and does get legalized)
3. 2 asserts in DAGCombiner expect identical load/store nodes,
   which assumes the offset will be preserved and not converted
   between poison and undef
4. The getLoad/getStore overloads are a mess, and a path was missing
   to recreate the store case with the original offset.
DeltaFile
+36-20llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+9-8llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+7-7llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+12-0llvm/include/llvm/CodeGen/SelectionDAG.h
+4-4llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+70-412 files not shown
+72-438 files

LLVM/project 2f3f97fclang/test/CodeGenCUDA struct-mangling-number.cu builtin-mangled-name.cu, clang/test/CodeGenHIP hip_weak_alias.cpp

clang/AMDGPU: Migrate -aux-triple amdgcn in cc1 tests to amdgpu (13) (#212052)

Update to the new architecture name.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+4-4clang/test/CodeGenCUDA/struct-mangling-number.cu
+3-3clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
+2-2clang/test/CodeGenHIP/hip_weak_alias.cpp
+2-2clang/test/CodeGenCUDA/builtin-mangled-name.cu
+2-2clang/test/CodeGenCUDA/device-stub.cu
+2-2clang/test/CodeGenCUDA/unnamed-types.cu
+15-1527 files not shown
+43-4333 files

LLVM/project f704f39clang/test/OpenMP declare_variant_construct_codegen_1.c amdgpu_exceptions.cpp

clang/AMDGPU: Migrate OpenMP cc1 tests to amdgpu triples (12) (#212051)

Migrate the OpenMP offload cc1 tests to the new amdgpu triple scheme:

* -fopenmp-targets=amdgcn-amd-amdhsa ->
-fopenmp-targets=amdgpu-amd-amdhsa
    (the offload toolchain triple, the generic amdgpu arch).
  * The device -triple amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa, or to the
specific subarch triple (dropping -target-cpu) where a -target-cpu was
    present.

Autogenerated CHECK lines are regenerated, and the few -Wopenmp-target-
exception diagnostics that embed the triple string are updated. Tests
that
intentionally assert the "target-cpu" function attribute are left
unchanged.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+24-24clang/test/OpenMP/declare_variant_construct_codegen_1.c
+11-11clang/test/OpenMP/amdgpu_exceptions.cpp
+10-10clang/test/OpenMP/amdgpu_throw.cpp
+10-10clang/test/OpenMP/amdgpu_try_catch.cpp
+8-8clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
+6-6clang/test/OpenMP/target_parallel_num_threads_strict_messages.cpp
+69-6948 files not shown
+173-17554 files

LLVM/project 96a8547llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlan.h

[VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (#212060)

Add an accessor returning the VPBranchOnMaskRecipe guarding a replicate
region, i.e. the sole recipe of the region's entry block.
DeltaFile
+2-13llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+8-0llvm/lib/Transforms/Vectorize/VPlan.h
+7-0llvm/lib/Transforms/Vectorize/VPlan.cpp
+17-133 files

LLVM/project 353729bllvm/lib/Target/AMDGPU SIInstrInfo.h SIInstrInfo.cpp

[AMDGPU] Avoid quadratic erase in SIInstrWorklist (#211801)
DeltaFile
+10-8llvm/lib/Target/AMDGPU/SIInstrInfo.h
+2-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+12-92 files

LLVM/project 56f4b9cclang/test/CodeGenOpenCL builtins-amdgcn-s-buffer-load.cl builtins-amdgcn-gfx1250-load-monitor.cl

clang/AMDGPU: Migrate cc1 tests to subarch triples (11) (#211956)

Rewrite the second half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+97-97clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
+9-15clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
+9-8clang/test/CodeGenOpenCL/amdgpu-features-default-delta.cl
+5-5clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
+5-5clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
+4-4clang/test/CodeGenOpenCL/builtins-amdgcn-wave64.cl
+129-13444 files not shown
+205-21050 files

LLVM/project 6b0a469libunwind/src UnwindRegistersSave.S

[libunwind][PPC64] Fix unw_getcontext corrupting callee-saved VSX registers on LE (#198371)

This is the first of two independent fixes for libunwind on ppc64le
(ELFv2 ABI, little-endian), where two separate bugs together cause
SIGSEGV during backtracing. This commit addresses the VSX register
corruption; the TOC-restore fault is handled in a follow-up. Both
were discovered while debugging lang/rust build failures with
RUST_BACKTRACE=1 on FreeBSD/powerpc64le (IBM POWER9).

On ppc64le, `unw_getcontext` saves each VS register with an in-place
`xxswapd n, n` followed by `stxvd2x`. The swap is needed because
`stxvd2x` stores doublewords in the wrong order on LE. However, the
macro never applies a second `xxswapd` to restore the register after
the store, so all 64 VS registers are permanently corrupted on return
from `unw_getcontext`.

This affects every callee-saved VSX register: f14-f31 (VSR14-VSR31)
and VR20-VR31 (VSR52-VSR63). After `_Unwind_Backtrace` returns, any
code that uses these registers sees wrong values. In practice this

    [6 lines not shown]
DeltaFile
+4-0libunwind/src/UnwindRegistersSave.S
+4-01 files

LLVM/project 890d133clang/lib CMakeLists.txt

[Clang] Don't build static analyzer if disabled (#212024)

Even if the static analyzer is disabled, it still gets built into the
dylib. Unit tests and tools already get disables, so also stop building
the library. This reduces the time needed to build a dylib clang by
8-9%.
DeltaFile
+3-1clang/lib/CMakeLists.txt
+3-11 files

LLVM/project 23c1083clang/test/OffloadTools/clang-linker-wrapper linker-wrapper.c linker-wrapper-hip-no-rdc.c, clang/test/OffloadTools/clang-offload-bundler basic.c zlib.c

clang/AMDGPU: Migrate clang-linker-wrapper tests to amdgpu triples (15)

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+59-59clang/test/OffloadTools/clang-offload-bundler/basic.c
+33-33clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
+21-21clang/test/OffloadTools/clang-offload-bundler/zlib.c
+16-16clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-hip-no-rdc.c
+13-13clang/test/OffloadTools/clang-offload-bundler/zstd.c
+8-8clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
+150-1504 files not shown
+158-15810 files

LLVM/project efcc94cclang/test/CodeGen link-builtin-bitcode.c, clang/test/CodeGenCUDA link-builtin-bitcode-denormal-fp-mode.cu

clang/AMDGPU: Rename amdgcn triples to amdgpu in cc1 tests (14)

Replace the legacy amdgcn architecture name with amdgpu in various
test triples. This set of updates covers cases that did not have
a set -target-cpu.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+12-21clang/test/CodeGenCUDA/link-builtin-bitcode-denormal-fp-mode.cu
+11-11clang/test/Misc/amdgcn.languageOptsOpenCL.cl
+10-10clang/test/CodeGenOpenCL/amdgpu-sizeof-alignof.cl
+10-10clang/test/CodeGen/link-builtin-bitcode.c
+9-9clang/test/CodeGenOpenCL/address-spaces.cl
+8-8clang/test/CodeGenOpenCL/sqrt-fpmath.cl
+60-69261 files not shown
+487-497267 files

LLVM/project def032eclang/test/CodeGenCUDA struct-mangling-number.cu unnamed-types.cu, clang/test/CodeGenHIP hip_weak_alias.cpp

clang/AMDGPU: Migrate -aux-triple amdgcn in cc1 tests to amdgpu (13)

Update to the new architecture name.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+4-4clang/test/CodeGenCUDA/struct-mangling-number.cu
+3-3clang/test/SemaHIP/amdgpu-feature-builtins-cant-jump.hip
+2-2clang/test/CodeGenCUDA/unnamed-types.cu
+2-2clang/test/CodeGenHIP/hip_weak_alias.cpp
+2-2clang/test/CodeGenCUDA/kernel-stub-name.cu
+2-2clang/test/CodeGenCUDA/device-stub.cu
+15-1527 files not shown
+43-4333 files

LLVM/project 4cbc68cclang/test/OpenMP declare_variant_construct_codegen_1.c amdgpu_exceptions.cpp

clang/AMDGPU: Migrate OpenMP cc1 tests to amdgpu triples (12)

Migrate the OpenMP offload cc1 tests to the new amdgpu triple scheme:

  * -fopenmp-targets=amdgcn-amd-amdhsa -> -fopenmp-targets=amdgpu-amd-amdhsa
    (the offload toolchain triple, the generic amdgpu arch).
  * The device -triple amdgcn-amd-amdhsa -> amdgpu-amd-amdhsa, or to the
    specific subarch triple (dropping -target-cpu) where a -target-cpu was
    present.

Autogenerated CHECK lines are regenerated, and the few -Wopenmp-target-
exception diagnostics that embed the triple string are updated. Tests that
intentionally assert the "target-cpu" function attribute are left unchanged.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+24-24clang/test/OpenMP/declare_variant_construct_codegen_1.c
+11-11clang/test/OpenMP/amdgpu_exceptions.cpp
+10-10clang/test/OpenMP/amdgpu_throw.cpp
+10-10clang/test/OpenMP/amdgpu_try_catch.cpp
+8-8clang/test/OpenMP/amdgpu-unsafe-fp-atomics.cpp
+6-6clang/test/OpenMP/target_parallel_num_threads_strict_messages.cpp
+69-6948 files not shown
+173-17554 files

LLVM/project 9077c43clang/test/CodeGenOpenCL builtins-amdgcn-s-buffer-load.cl builtins-amdgcn-gfx1250-load-monitor.cl

clang/AMDGPU: Migrate cc1 tests to subarch triples (11)

Rewrite the second half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+97-97clang/test/CodeGenOpenCL/builtins-amdgcn-s-buffer-load.cl
+9-15clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-load-monitor.cl
+9-8clang/test/CodeGenOpenCL/amdgpu-features-default-delta.cl
+5-5clang/test/CodeGenOpenCL/amdgpu-xnack-any-only.cl
+5-5clang/test/CodeGenOpenCL/builtins-amdgcn-global-load-store.cl
+4-4clang/test/CodeGenOpenCL/builtins-amdgcn-fp8.cl
+129-13444 files not shown
+205-21050 files

LLVM/project d1af60fllvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/lib/Target/RISCV RISCVISelLowering.cpp

DAG: Stop legalizing poison to undef (#211890)

Previously all targets would expand poison to undef, which was a
shortcut taken when poison was introduced.

Introduces a new dedicated poison matcher in tablegen; this avoids
multiple opcode changes, and avoids some problematic contexts that
couldn't deal with PatFrags.

This probably should be legal by default for all legal types.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+11-7llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+16-0llvm/utils/TableGen/DAGISelMatcher.h
+8-8llvm/test/CodeGen/X86/vselect-avx.ll
+14-0llvm/utils/TableGen/DAGISelMatcher.cpp
+0-13llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+4-4llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests.ll
+53-3215 files not shown
+89-4721 files

LLVM/project 197cf54clang/test/CodeGenOpenCL amdgpu-enqueue-kernel.cl builtins-amdgcn-gfx11.cl

clang/AMDGPU: Migrate cc1 tests to subarch triples (10) (#211955)

Rewrite the first half of CodeGenOpenCL cc1 test RUN lines to the new
subarch triple form, dropping the redundant -target-cpu.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+20-12clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
+12-12clang/test/CodeGenOpenCL/builtins-amdgcn-gfx11.cl
+8-8clang/test/CodeGenOpenCL/builtins-amdgcn-gws-insts.cl
+6-6clang/test/CodeGenOpenCL/amdgpu-features-illegal.cl
+4-4clang/test/CodeGenOpenCL/builtins-amdgcn-workgroup-size.cl
+4-4clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
+54-4644 files not shown
+122-11450 files

LLVM/project 191c60fclang/lib/Analysis ThreadSafety.cpp

[ThreadSafety] Fix C++20 build (#212042)

In C++20 (P1008R1 https://wg21.link/p1008r1), aggregates are prohibited
from having any user-declared constructors, even if they are = delete or
= default.
DeltaFile
+6-2clang/lib/Analysis/ThreadSafety.cpp
+6-21 files

LLVM/project ca5ea41clang/test/CodeGenOpenCL builtins-amdgcn-asyncmark-errs.cl

fix test

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+1-1clang/test/CodeGenOpenCL/builtins-amdgcn-asyncmark-errs.cl
+1-11 files

LLVM/project b071e92llvm/include/llvm/Support GenericDomTree.h GenericDomTreeConstruction.h

[DomTree] Remove support for unnumbered graphs (#212026)

After VPlan, all our in-tree users of the dominator tree have numbered
nodes. Remove the support for unnumbered graphs.

Also slightly simplify the numbering for pre-dominator trees to avoid an
extra +1 on every node number.
DeltaFile
+33-70llvm/include/llvm/Support/GenericDomTree.h
+9-20llvm/include/llvm/Support/GenericDomTreeConstruction.h
+42-902 files

LLVM/project 026a34bllvm/lib/Transforms/Utils SimplifyCFG.cpp

[SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (#212030)

When there is no edge to the original default destination BB, also
remove the edge in DT.

This issue cannot be reproduced via
-simplifycfg-require-and-preserve-domtree=1. I just found it by checking
DT in requestResimplify (will be added after fixing all existing
issues). The following test covers this case:

https://github.com/llvm/llvm-project/blob/5bc304c65494702d9d4928ff6cb369e6e6496e53/llvm/test/Transforms/SimplifyCFG/switch-simplify-default.ll#L172-L214
DeltaFile
+5-7llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+5-71 files

LLVM/project 4c3a4f1llvm/include/llvm/Analysis ScalarEvolution.h, llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Use DenseMap for constant lookup, bypassing FoldingSet (NFC) (#212022)

Looking up/contructing SCEVConstants is a very frequent operation, with
a notable amount of compile-time spent in SCEV.

Add a new DenseMap, mapping IR constants to SCEVConstant. Constants are
already uniqued, so the pointer based lookup is notably faster than the
folding-set lookup.

The cache is used as fast early-exit, and the SCEVConstants are still
added to the folding set for completeness.

Compile-time impact
 * stage1-O3: -0.23%
 * stage1-ReleaseThinLTO: -0.21%
 * stage1-ReleaseLTO-g: -0.19%
 * stage1-aarch64-O3: -0.20%
 * stage2-O3: -0.10%


    [3 lines not shown]
DeltaFile
+11-3llvm/lib/Analysis/ScalarEvolution.cpp
+5-0llvm/include/llvm/Analysis/ScalarEvolution.h
+16-32 files

LLVM/project a434fe8libcxx/include/__functional function_ref_impl.h, libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor constant_wrapper_ref.pass.cpp constant_wrapper_ptr.pass.cpp

[libc++] Implement  `std::function_ref` (#186692)

Papers:
- P0792R14: function_ref: a type-erased callable reference
- P3948R1 constant_wrapper is the only tool needed for passing constant
expressions via function arguments
- P3961R1 Less double indirection in function_ref (RU-220)

LWG issues:
- LWG4256: Incorrect constraints for function_ref constructors from
nontype_t
- LWG4425: CTAD function_ref of data member pointer should produce
noexcept signature

Fixes #189606
Fixes #105376
Fixes #189604
Fixes #171321
Fixes #171387

    [4 lines not shown]
DeltaFile
+524-0libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.inv/invoke.pass.cpp
+428-0libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ref.pass.cpp
+407-0libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/constant_wrapper_ptr.pass.cpp
+368-0libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/ref.pass.cpp
+201-0libcxx/include/__functional/function_ref_impl.h
+199-0libcxx/test/std/utilities/function.objects/func.wrap/func.wrap.ref/func.wrap.ref.ctor/copy_assign.pass.cpp
+2,127-026 files not shown
+3,356-3232 files

LLVM/project 2ab167bclang-tools-extra/docs ReleaseNotes.rst

[clangd] Add clangd 23 release notes
DeltaFile
+108-11clang-tools-extra/docs/ReleaseNotes.rst
+108-111 files

LLVM/project 3b484a3llvm/docs LangRef.md, llvm/test/Assembler invalid-atomicrmw-elementwise.ll atomic.ll

port
DeltaFile
+25-3llvm/docs/LangRef.md
+25-0llvm/unittests/IR/VerifierTest.cpp
+8-0llvm/test/Assembler/invalid-atomicrmw-elementwise.ll
+2-2llvm/test/Assembler/atomic.ll
+2-2llvm/test/Bitcode/atomicrmw-elementwise.ll
+2-2llvm/test/Bitcode/compatibility.ll
+64-92 files not shown
+68-98 files

LLVM/project 461ec35clang/lib/AST Decl.cpp, clang/lib/Sema SemaDecl.cpp

[Sema] Skip expansion statements when determing local extern context (#210512) (#211745)

This bug showed up as a failed assertion that was asserting that if
not in a function or method context we should be in the global/file
context.

The root cause is that when determining the linkage context for a
decl we were failing to account for the existence of expansion
contexts. Ignoring the assertion failure, the functional effect of
this is that we would fail to detect incorrect local extern
declarations inside expansion contexts. The fix here is to make
sure that we use `getEnclosingNonExpansionStatementContext()` to
find the true DeclContext for the current scope.

The initial report only identified local extern function declarations
but the same bug occurred with extern var decls, but the path did
not lead to an assertion firing, just incorrect behaviour.

Thanks to Sirraide for explaining why this was going wrong, and

    [5 lines not shown]
DeltaFile
+73-0clang/test/SemaCXX/expansion-statements-local-extern-decls.cpp
+3-1clang/lib/AST/Decl.cpp
+1-1clang/lib/Sema/SemaDecl.cpp
+77-23 files

LLVM/project d4d778bllvm/lib/CodeGen/AsmPrinter DwarfExpression.cpp, llvm/lib/Target/WebAssembly WebAssemblyFrameLowering.cpp

[DebugInfo][WebAssembly] Anchor stack locals to the frame base (#211826)

WebAssembly's stack pointer is not a register that can be described in
DWARF. When a function has no virtual frame base, because its stack
pointer is never explicitly referenced (e.g. a function whose only local
is dead), the frame base falls back to the __stack_pointer global and
the frame register is the physical SP.

addMachineReg failed for that register, so addMachineRegExpression
dropped the base and the caller emitted the frame offset with nothing
under it: a bare DW_OP_plus_uconst that underflows the DWARF stack when
the location is evaluated.

```
  DW_AT_frame_base (DW_OP_WASM_location 0x3 0x0, DW_OP_stack_value)
    DW_AT_location  (DW_OP_plus_uconst 0xc)   ;; before
    DW_AT_location  (DW_OP_fbreg +12)         ;; after
```


    [13 lines not shown]
DeltaFile
+39-0llvm/test/DebugInfo/WebAssembly/dbg-fbreg-global-frame-base.ll
+7-0llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
+3-2llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp
+49-23 files

LLVM/project d6d9072llvm/include/llvm/CodeGen ModuloSchedule.h, llvm/lib/CodeGen ModuloSchedule.cpp

[Pipeliner] Use VRMapPhi to generate phi in epilog (#211723)

When generating a phi in the epilog block corresponding to an existing
phi in the loop, the loop value should come from the new phi generated
in the kernel block (for a non-phi instruction in the loop) rather than
directly from the value map of the previous stage.

The new phis generated by generatePhis for non-phi instructions are
stored in VRMapPhi. Thread VRMapPhi through generateExistingPhis and add
a helper getMapPhiReg that returns the phi-generated register when
available, falling back to VRMap otherwise.

Without this fix, the epilog can pick up the initial prolog value of a
loop-carried register instead of the last kernel-iteration value,
producing incorrect results for pipelined loops with two or more stages
that carry values across iterations. This has been observed on Hexagon
with the modulo scheduled epilog of a right-shift-with-carry loop after
loop unrolling.


    [3 lines not shown]
DeltaFile
+190-0llvm/test/CodeGen/Hexagon/swp-epilog-carry.ll
+148-0llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
+16-12llvm/lib/CodeGen/ModuloSchedule.cpp
+13-3llvm/include/llvm/CodeGen/ModuloSchedule.h
+367-154 files