LLVM/project 49230ebllvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPUAsmPrinter.cpp

[AMDGPU] Add `.amdgpu.info` section for per-function metadata

AMDGPU object linking requires the linker to propagate resource usage
(registers, stack, LDS) across translation units. To support this, the compiler
must emit per-function metadata and call graph edges in the relocatable object
so the linker can compute whole-program resource requirements.

This PR introduces a `.amdgpu.info` ELF section using a tagged, length-prefixed
binary format: each entry is encoded as:

```
[kind: u8] [len: u8] [payload: <len> bytes]
```

A function scope is opened by an `INFO_FUNC` entry (containing a symbol
reference), followed by per-function attributes (register counts, flags, private
segment size) and relational edges (direct calls, LDS uses, indirect call
signatures). String data such as function type signatures is stored in a
companion `.amdgpu.strtab` section.

    [4 lines not shown]
DeltaFile
+198-0llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp
+171-2llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+115-0llvm/test/MC/AMDGPU/amdgpu-info-roundtrip.s
+111-0llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+110-0llvm/docs/AMDGPUUsage.rst
+83-0llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-typeid.ll
+788-211 files not shown
+1,199-1417 files

LLVM/project 2cf7c97llvm/lib/Target/AMDGPU AMDGPUAsmPrinter.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU lds-link-time-codegen.ll lds-link-time-codegen-named-barrier.ll

[AMDGPU] Emit the relocation symbol for LDS and named barrier when object linking is enabled
DeltaFile
+50-0llvm/test/CodeGen/AMDGPU/lds-link-time-codegen.ll
+35-0llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
+12-3llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+12-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+109-34 files

LLVM/project 04a502dflang/include/flang/Evaluate tools.h, flang/lib/Evaluate tools.cpp

[flang][cuda] Avoid false positive on multi device symbol with components (#192513)

Semantic was wrongly flagging derived-type components as two device
resident object. Update how we collect symbols and count the number of
device resident object.
DeltaFile
+51-0flang/test/Lower/CUDA/cuda-data-transfer.cuf
+34-0flang/lib/Evaluate/tools.cpp
+10-0flang/include/flang/Evaluate/tools.h
+1-1flang/lib/Semantics/check-cuda.cpp
+96-14 files

LLVM/project b3cbad3mlir/include/mlir/Dialect/Transform/IR TransformDialect.td, mlir/include/mlir/Dialect/Transform/Interfaces TransformInterfaces.td

[mlir] transform dialect; add pre/post-condition type (#191813)

Add a transform dialect type denoting additional invariants on payload
IR usable for pre/post-conditions of a transformation. The invariants
are defined as a list of attributes in the type parameter, where the
attribute implements the interface for invariant-checking. This allows
clients to factor out, explicify and deduplicate precondition
verification logic.

This required adding support for Transform dialect extensions injecting
attributes into the dialects similarly to how they already do this for
operations and types.

Co-authored-by: Tim Gymnich <tim at gymni.ch>
Co-authored-by: Martin Lücke <martin.luecke at amd.com>
Assisted-by: Claude Opus 4.3 / Cursor

Co-authored-by: Tim Gymnich <tim at gymni.ch>
Co-authored-by: Martin Lücke <martin.luecke at amd.com>
DeltaFile
+82-0mlir/test/Dialect/Transform/normal-forms.mlir
+46-3mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
+48-0mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
+33-7mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
+39-0mlir/lib/Dialect/Transform/IR/TransformTypes.cpp
+34-0mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.td
+282-1010 files not shown
+406-1016 files

LLVM/project 3aeb33dmlir/include/mlir/Dialect/Transform/IR TransformDialect.td, mlir/include/mlir/Dialect/Transform/Interfaces TransformInterfaces.td

[mlir] transform dialect; add pre/post-condition type

Add a transform dialect type denoting additional invariants on payload
IR usable for pre/post-conditions of a transformation. The invariants
are defined as a list of attributes in the type parameter, where the
attribute implements the interface for invariant-checking. This allows
clients to factor out, explicify and deduplicate precondition
verification logic.

This required adding support for Transform dialect extensions injecting
attributes into the dialects similarly to how they already do this for
operations and types.

Co-authored-by: Tim Gymnich <tim at gymni.ch>
Co-authored-by: Martin Lücke <martin.luecke at amd.com>
Assisted-by: Claude Opus 4.3 / Cursor
DeltaFile
+82-0mlir/test/Dialect/Transform/normal-forms.mlir
+46-3mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
+48-0mlir/test/lib/Dialect/Transform/TestTransformDialectExtension.cpp
+33-7mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
+39-0mlir/lib/Dialect/Transform/IR/TransformTypes.cpp
+34-0mlir/include/mlir/Dialect/Transform/Interfaces/TransformInterfaces.td
+282-1010 files not shown
+406-1016 files

LLVM/project 9de9414llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

[SLP][NFC]Use find instead of lookup for using ArrayRef instead of SmallVector



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/192540
DeltaFile
+4-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-11 files

LLVM/project 9d51c89llvm/lib/Target/BPF BPFAsmPrinter.cpp BPFISelLowering.h, llvm/test/CodeGen/BPF cleanup-section.ll cleanup-reject-typed-catch.ll

[BPF] Add exception handling support with .bpf_cleanup section (#192164)

Add support for invoke/landingpad/resume instructions in the BPF backend
so that Rust programs compiled with panic=unwind can run cleanup code
(Drop implementations) when bpf_throw fires.

Changes:

1. BPFISelLowering: Define exception pointer and selector registers
(both R0) so SelectionDAG can lower landingpad instructions.

2. BPFAsmPrinter::emitFunctionBodyEnd: Emit a .bpf_cleanup section with
a flat table of (begin, end, landing_pad) triples using
R_BPF_64_NODYLD32 relocations.

The .bpf_cleanup section layout (12 bytes per entry):

  u32 begin         // start of the invoke region
  u32 end           // end of the invoke region

    [22 lines not shown]
DeltaFile
+160-0llvm/test/CodeGen/BPF/cleanup-section.ll
+57-0llvm/lib/Target/BPF/BPFAsmPrinter.cpp
+25-0llvm/test/CodeGen/BPF/cleanup-reject-typed-catch.ll
+8-0llvm/lib/Target/BPF/BPFISelLowering.h
+1-0llvm/lib/Target/BPF/BPFAsmPrinter.h
+251-05 files

LLVM/project db4dfdclibcxx/utils/ci BOT_OWNERS.txt

[libc++] Update Android CI owners (#192511)

Add nickdesaulniers as an owner for Android libc++ CI
DeltaFile
+2-2libcxx/utils/ci/BOT_OWNERS.txt
+2-21 files

LLVM/project dd81356clang/include/clang/AST PrettyPrinter.h, clang/lib/AST ExprConstant.cpp StmtPrinter.cpp

Suppress printing lambda body for constexpr diagnostics (#185800)

closes #125914

Introduce `SupressLambdaBody` `PrintingPolicy` that is used only for
constexpr diagnostics. This ensures `--print-ast` still works the same.
I also considered other approaches such as modifying the
`PrintingPolicy` in the current `AstContext`, but that might cause
unexpected changes.

Add two tests:
1. To ast-printer-lambda to ensure `--print-ast` works the same.
2. Ensure lambda body is not printed for constexpr diagnostics.
DeltaFile
+43-0clang/test/AST/constexpr-lambda-diagnostic.cpp
+7-5clang/lib/AST/ExprConstant.cpp
+9-1clang/test/AST/ast-printer-lambda.cpp
+5-3clang/lib/AST/ByteCode/InterpFrame.cpp
+5-1clang/include/clang/AST/PrettyPrinter.h
+1-1clang/lib/AST/StmtPrinter.cpp
+70-111 files not shown
+71-117 files

LLVM/project 59c6862clang/test/CodeGen asm.c

[Clang] Refactor the tests to be more uniform (#191944)

- Add missing "CHECK:" lines to testcases.
- Improve checking to be a bit more readable.
- Move "rm" testcases to the bottom in anticipation of
  future refactoring.
DeltaFile
+192-151clang/test/CodeGen/asm.c
+192-1511 files

LLVM/project b104dabclang/docs ReleaseNotes.rst, clang/include/clang/Basic DiagnosticLexKinds.td

Revert "[Clang] Implement P2843R3 - Preprocessing is never undefined" (#192532)

Reverts llvm/llvm-project#192073 

Reason for revert: This change caused build failures on Windows when
compiling libcxx.
DeltaFile
+0-48clang/test/Preprocessor/p2843r3.cpp
+8-12clang/test/Lexer/cxx-features.cpp
+1-9clang/www/cxx_status.html
+0-6clang/docs/ReleaseNotes.rst
+1-3clang/lib/Lex/PPExpressions.cpp
+0-2clang/include/clang/Basic/DiagnosticLexKinds.td
+10-806 files

LLVM/project c88d891clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-intrinsics.c

[CIR][AArch64] Upstream pairwise-minimum NEON builtins (#191759)

Related to https://github.com/llvm/llvm-project/issues/185382


CIR lowering for pairwise-minimum intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#pairwise-minimum)

Port tests from `clang/test/CodeGen/AArch64/neon_intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/intrinsics.c`
DeltaFile
+320-0clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-288clang/test/CodeGen/AArch64/neon-intrinsics.c
+18-0clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+338-2883 files

LLVM/project 76563f7llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

rebase

Created using spr 1.3.6-beta.1
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+84,299-78,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+25,754-24,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+653,808-132,66318,267 files not shown
+2,675,496-977,57818,273 files

LLVM/project 9fad61dllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+84,299-78,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+25,754-24,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+653,808-132,66318,267 files not shown
+2,675,495-977,57718,273 files

LLVM/project 07b3e5allvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

rebase

Created using spr 1.3.6-beta.1
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+84,299-78,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+25,754-24,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+653,808-132,66318,267 files not shown
+2,675,495-977,57718,273 files

LLVM/project b35a5c6llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+84,299-78,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+25,754-24,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+653,808-132,66318,267 files not shown
+2,675,493-977,57618,273 files

LLVM/project f026b52llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

rebase

Created using spr 1.3.6-beta.1
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+84,299-78,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+25,754-24,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+653,808-132,66318,267 files not shown
+2,675,493-977,57618,273 files

LLVM/project 5585a7bllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+84,299-78,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+25,754-24,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+653,808-132,66318,267 files not shown
+2,675,491-977,57618,273 files

LLVM/project b2e0403libc/src/ucontext getcontext.h, libc/src/ucontext/x86_64 getcontext.cpp setcontext.cpp

[libc] Implement getcontext and setcontext for x86_64 (#192343)

Implemented getcontext and setcontext for x86_64 architecture in LLVM
libc. These functions use inline assembly with naked attributes to
capture and restore the exact register state.

Added:
* src/ucontext/getcontext.h and setcontext.h
* src/ucontext/x86_64/getcontext.cpp and setcontext.cpp
* Hermetic integration test for register preservation.
* Unit tests for basic functionality and signal mask preservation.

Updated entrypoints for x86_64 Linux.
DeltaFile
+182-0libc/test/integration/src/ucontext/ucontext_test.cpp
+98-0libc/src/ucontext/x86_64/getcontext.cpp
+97-0libc/src/ucontext/x86_64/setcontext.cpp
+79-0libc/test/src/ucontext/ucontext_test.cpp
+28-0libc/src/ucontext/x86_64/CMakeLists.txt
+21-0libc/src/ucontext/getcontext.h
+505-09 files not shown
+584-415 files

LLVM/project 046fd10clang/test/DebugInfo/Generic cfi-icall-normalize2-debuginfo.c cfi-icall-generalize-debuginfo.c

UBSan: Use ubsan_interface.h for synthetic debug info (#171929)

Before the patch, even with the same synthetic function name, they
counted as different functions, because the file name was different.

This makes it easier to analyze data in performance profiles.

`pprof -lines -top <somefile> | grep __ubsan_check_pointer_overflow`

Before:
```
60368049443  6.26%  6.26% 60383492016  6.26%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/TSVC/tsc.inc (inline)
43746146224  4.53% 10.79% 43763767409  4.54%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/SparseCompRow.c (inline)
11670846196  1.21% 26.03% 11673592781  1.21%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/AMGmk/csr_matvec.c (inline)
7948730683  0.82% 29.07% 7949496154  0.82%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/IRSmk/rmatmult3.c (inline)
7442972883  0.77% 30.62% 7447647795  0.77%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/mafft/Galign11.c (inline)
7181873035  0.74% 32.88% 7182846509  0.74%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/ASC_Sequoia/AMGmk/relax.c (inline)
7086681860  0.73% 33.61% 7086681860  0.73%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/SciMark2-C/FFT.c (inline)
6634628163  0.69% 35.03% 6644529197  0.69%  __ubsan_check_pointer_overflow test-suite/MultiSource/Benchmarks/Olden/em3d/make_graph.c (inline)

    [13 lines not shown]
DeltaFile
+89-88clang/test/DebugInfo/Generic/cfi-icall-normalize2-debuginfo.c
+88-86clang/test/DebugInfo/Generic/cfi-icall-generalize-debuginfo.c
+50-49clang/test/DebugInfo/Generic/ubsan-function-debuginfo.c
+30-28clang/test/DebugInfo/Generic/bounds-checking-debuginfo.c
+29-28clang/test/DebugInfo/Generic/cfi-check-fail-debuginfo.c
+19-18clang/test/DebugInfo/Generic/unsigned-promotion-debuginfo.c
+305-2972 files not shown
+334-3078 files

LLVM/project 51c6b68clang/lib/ScalableStaticAnalysisFramework/Analyses SSAFAnalysesCommon.cpp SSAFAnalysesCommon.h

move ASTContext include to the header
DeltaFile
+0-1clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.cpp
+1-0clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
+1-12 files

LLVM/project b644c8dclang/lib/ScalableStaticAnalysisFramework/Analyses SSAFAnalysesCommon.h

fix linux build fail
DeltaFile
+1-0clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
+1-01 files

LLVM/project 3cd2f6fclang/lib/ScalableStaticAnalysisFramework/Analyses SSAFAnalysesCommon.cpp

fix linux build fail
DeltaFile
+1-0clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.cpp
+1-01 files

LLVM/project 2c56a63bolt/lib/Passes Instrumentation.cpp

[BOLT][Passes] switch remaining Instrumentation containers to ADT. (#192525)

Follow-up to #192289. Swap the remaining `std::unordered_set`/
`std::unordered_map` containers in `Instrumentation.cpp` for `DenseSet`/
`DenseMap`: the `BBToSkip` param and `Visited` local in
`hasAArch64ExclusiveMemop`, and `BBToSkip`, `BBToID`, `VisitedSet` in
`instrumentFunction`. Drop the now-unused `<unordered_set>` include.

The swap removes per-element heap allocations on the hot path, stops
inserting empty buckets on probes where a miss is possible, and replaces
hashed-bucket traversal over node-based storage with lookups over inline
`DenseMap` storage. `BBToID` reads keep `operator[]` since the map is
pre-populated for every basic block of the function, so no
default-construct path is ever taken. NFC.

Measured on `llvm-bolt -instrument` against a relocations-linked
clang-23: -1.3% instrumentation-pass wall time, peak RSS unchanged
(dominated by instrumentation output size).
DeltaFile
+7-8bolt/lib/Passes/Instrumentation.cpp
+7-81 files

LLVM/project a8f1f38mlir/unittests/Dialect/OpenACC OpenACCCGOpsTest.cpp

[mlir][acc] Fix OpenACCCGOpsTest ValueRange construction (#192529)

Ensure that `Value`s are used in the `ValueRange` construction to avoid
failure:
`error: call of overloaded ValueRange(mlir::acc::ParWidthOp&) is
ambiguous`
DeltaFile
+3-3mlir/unittests/Dialect/OpenACC/OpenACCCGOpsTest.cpp
+3-31 files

LLVM/project 6a202b8clang/docs ReleaseNotes.rst, clang/include/clang/Basic DiagnosticLexKinds.td

Revert "[Clang] Implement P2843R3 - Preprocessing is never undefined (#192073)"

This reverts commit 42e0cdf2fcc3455d95be7d875302a0f7cb7c592d.
DeltaFile
+0-48clang/test/Preprocessor/p2843r3.cpp
+8-12clang/test/Lexer/cxx-features.cpp
+1-9clang/www/cxx_status.html
+0-6clang/docs/ReleaseNotes.rst
+1-3clang/lib/Lex/PPExpressions.cpp
+0-2clang/include/clang/Basic/DiagnosticLexKinds.td
+10-806 files

LLVM/project 2581cc8clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp ItaniumMangle.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.

This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+889-175clang/lib/AST/ASTContext.cpp
+312-12clang/test/SemaTemplate/instantiation-dependence.cpp
+151-93clang/lib/AST/ItaniumMangle.cpp
+76-68clang/lib/AST/Type.cpp
+76-48clang/lib/Sema/SemaTemplate.cpp
+93-16clang/include/clang/AST/ASTContext.h
+1,597-41282 files not shown
+2,352-77588 files

LLVM/project 6ff9ca2llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp

[RISCV] Don't check isApplicableToPLI for simm12 constants. (#192522)

It won't match except when the constant is -1, which we should use li
for. This avoids an unecessary call for hasAllWUsers in that case.
DeltaFile
+2-2llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+2-21 files

LLVM/project ce02e11llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

rebase

Created using spr 1.3.7
DeltaFile
+160,429-171,418llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+54,182-54,736llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+92,827-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+769,567-268,50232,932 files not shown
+5,732,585-2,797,52232,938 files

LLVM/project c195385utils/bazel MODULE.bazel.lock MODULE.bazel

[bazel] Update rules_python (#192518)

This pulls in this fix
https://github.com/bazel-contrib/rules_python/pull/3420
DeltaFile
+5-5utils/bazel/MODULE.bazel.lock
+1-1utils/bazel/MODULE.bazel
+6-62 files