LLVM/project d9a65b4 — clang/lib/Driver SanitizerArgs.cpp, clang/test/Driver fsanitize-undefined.c

[Driver] Remove -mcmodel=small restriction for -fsanitize=function (#238028)

Since https://reviews.llvm.org/D148785, -fsanitize=function no longer
uses RTTI pointers or relocations in the function prefix, so it can now
be used with medium and large code models.
DeltaFile
+0-12clang/lib/Driver/SanitizerArgs.cpp
+2-3clang/test/Driver/fsanitize-undefined.c
+2-152 files

LLVM/project 2ebe99c — llvm/test/CodeGen/AArch64 arm64-storebytesmerge.ll

[AArch64] arm64-storebytesmerge.ll - regenerate test checks (#237958)
DeltaFile
+14-7llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
+14-71 files

LLVM/project c744694 — utils/bazel/llvm-project-overlay/libc BUILD.bazel

[Bazel][libc] Add kill syscall wrapper target (#238035)

Fixes Bazel build after c7d0351b066cf2770ce2110c616c4e60b847ca79
(#237798), which refactored the Linux `kill` syscall into
`src/__support/OSUtil/linux/syscall_wrappers/kill.h`.
DeltaFile
+17-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+17-11 files

LLVM/project 7073bdc — llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 shuffle-insert-zero.ll

[AArch64][DAG] Improve codegen for clearing upper vector lanes

Add patterns that use scalar fmov instruction to clear the upper lanes of a vector
DeltaFile
+227-406llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
+49-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+276-4062 files

LLVM/project 6f8bbb3 — llvm/test/CodeGen/AArch64 build-vector-extract.ll shuffle-insert-zero.ll

Update Test Checks
DeltaFile
+644-665llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+13-17llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
+2-8llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
+1-3llvm/test/CodeGen/AArch64/build-vector-extract.ll
+660-6934 files

LLVM/project a740dfa — llvm/lib/Transforms/InstCombine InstCombineVectorOps.cpp, llvm/test/Transforms/InstCombine vec_shuffle.ll

[InstCombine] Canonicalise Vector Shuffle that clears upper bits

Currently, shuffle vectors that are equivalent to preserving lane 0 and clearing the uppers lanes of a vector result in different shuffle vectors and masks

Recognise and canonicalise the shuffleVectors to the same form allowing for easier recognition in the backend
DeltaFile
+57-0llvm/test/Transforms/InstCombine/vec_shuffle.ll
+47-0llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
+104-02 files

LLVM/project 58cd51c — llvm/test/Transforms/InstCombine insert-element-shuffle-vector-debugloc.ll vec_shuffle.ll

Update test checks
DeltaFile
+5-5llvm/test/Transforms/InstCombine/insert-extract-shuffle.ll
+3-3llvm/test/Transforms/InstCombine/vec_shuffle.ll
+1-1llvm/test/Transforms/InstCombine/insert-element-shuffle-vector-debugloc.ll
+9-93 files

LLVM/project ca82459 — llvm/lib/Target/SPIRV SPIRVCodeGenPassBuilder.cpp

[SPIR-V][NewPM] Force AsmPrinter begin/end passes (#238020)

Without Force, -start-after drops them and SPIRVAsmPrinterPass crashes
on a missing AsmPrinter

This matches other targets
DeltaFile
+2-2llvm/lib/Target/SPIRV/SPIRVCodeGenPassBuilder.cpp
+2-21 files

LLVM/project b42d6f6 — llvm/include/llvm/CodeGenTypes MachineValueType.h, llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

[SelectionDAG] Provide context for vector count / type mismatch (#175433)

This now gives better details about what the mismatch is in the error
message:

subprocess.CalledProcessError: Command '/usr/local/bin/llc
-mtriple=amdgcn -mcpu=tahiti' returned non-zero exit status 134.
LLVM ERROR: Part count doesn't match vector breakdown! 6 registers, 6
parts, i32 RegisterVT, f32 PartVT
PLEASE submit a bug report to
https://github.com/llvm/llvm-project/issues/ and include the crash
backtrace and instructions to reproduce the bug.
DeltaFile
+15-7llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+8-0llvm/include/llvm/CodeGenTypes/MachineValueType.h
+23-72 files

LLVM/project 0ba7c3a — llvm/lib/Target/AArch64 AArch64SVEInstrInfo.td, llvm/test/CodeGen/AArch64 zeroing-forms-counts-not.ll sve-intrinsics-logical.ll

[AArch64][llvm] Ensure svnot_u32_x() intrinsic is optimised to subr (#237251)

All-active SVE NOT intrinsics, such as `svnot_u32_x(svptrue_b32(), x)`
currently generate `ptrue` followed by predicated `not`. Optimise this
to subr `z0.b, z0.b, #255`, which subtracts each byte from 255 and
therefore flips every bit. This implements bitwise `not` for vectors
of 8, 16, 32, or 64-bit elements. Test all these four widths.
DeltaFile
+8-16llvm/test/CodeGen/AArch64/zeroing-forms-counts-not.ll
+8-16llvm/test/CodeGen/AArch64/sve-intrinsics-logical.ll
+11-0llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+27-323 files

LLVM/project 5ed7f1f — llvm/test/CodeGen/AArch64 sve-intrinsics-logical.ll

[AArch64][llvm] Add pre-commit tests for all-active SVE not intrinsics (#237250)

Cover all four integer widths with undefined and merging passthroughs,
plus a partially active predicate that must preserve inactive lanes.
DeltaFile
+102-0llvm/test/CodeGen/AArch64/sve-intrinsics-logical.ll
+102-01 files

LLVM/project 28b4a20 — llvm/lib/Target/BPF BPFAdjustOpt.cpp, llvm/test/CodeGen/BPF loop-exit-cond.ll global-func-unused-arg.ll

[BPF] Mark global functions noipa (#237690)

The BPF verifier checks every argument of a call to a global function
against the BTF type of the function, whether the function uses the
argument or not. For a non-local function, DeadArgumentElimination
replaces an argument that the body does not use with poison at the
call sites, and since #235216 ("[BPF] Select undef and poison as zero")
the backend selects that poison as zero.

The Linux kernel BPF selftest progs/test_global_func8.c has
```
  __noinline int foo(struct __sk_buff *skb)
  {
    return bpf_get_prandom_u32();
  }

  SEC("cgroup_skb/ingress")
  __success
  int global_func8(struct __sk_buff *skb)

    [54 lines not shown]
DeltaFile
+42-0llvm/test/CodeGen/BPF/adjust-opt-noipa.ll
+32-0llvm/test/CodeGen/BPF/global-func-unused-arg.ll
+9-0llvm/lib/Target/BPF/BPFAdjustOpt.cpp
+2-2llvm/test/CodeGen/BPF/loop-exit-cond.ll
+0-2llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
+0-2llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
+85-66 files

LLVM/project 4e7821e — llvm/lib/Transforms/Utils Local.cpp PromoteMemoryToRegister.cpp, llvm/test/DebugInfo/Generic mem2reg-promote-alloca-3.ll

[DebugInfo][Mem2Reg] Convert existing #dbg_value records with a deref in the single block case (#237347)

Each live #dbg_value record is cloned with its deref stripped at each
store, taking the value being stored. This creates a debug record at
each update point: each existing record for the variable is kept or
rewritten to use the stored value as its location, and each store to an
alloca that had an associated debug record also receives a debug record
for the update.

Fixes https://github.com/llvm/llvm-project/issues/229454

Assisted-by: Claude
DeltaFile
+290-0llvm/test/Transforms/Mem2Reg/dbg-value-deref-single-block.ll
+127-4llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
+10-4llvm/test/DebugInfo/Generic/mem2reg-promote-alloca-3.ll
+3-0llvm/lib/Transforms/Utils/Local.cpp
+430-84 files

LLVM/project d4dd2ec — clang/test/CodeGen lto-newpm-pipeline.c, llvm/lib/Passes PassBuilderPipelines.cpp

Revert "Disable pre-link LTO vectorisation and loop unroll for at O2 and O3 optimisation levels (#195886)" (#238029)

There's test failure for the added NewPM Test which sometimes outputs
"FunctionAnalysisManager" and sometimes
"AnalysisManager<Function>" (they are aliases).

This reverts commit e3c929c8f1bca3e96dcb3c3b1886f25f8244bb5d.
DeltaFile
+0-224llvm/test/Other/new-pm-pre-link.ll
+22-22llvm/test/Other/new-pm-defaults.ll
+4-8llvm/lib/Passes/PassBuilderPipelines.cpp
+0-4llvm/test/Other/new-pm-lto-defaults.ll
+1-0clang/test/CodeGen/lto-newpm-pipeline.c
+27-2585 files

LLVM/project 4331e91 — utils/bazel MODULE.bazel MODULE.bazel.lock

[bazel] Update dependencies to account for rules_cc_autoconf updates (#236893)

We're able to drop the explicit `rules_cc_autoconf` pin as new `gmp` and
`mpfr` `*.bcr.*` versions pull in a new version and account for updates
in that module.
DeltaFile
+13-18utils/bazel/MODULE.bazel.lock
+3-6utils/bazel/MODULE.bazel
+16-242 files

LLVM/project 5ea9b6a — clang/test/CodeGen lto-newpm-pipeline.c, llvm/lib/Passes PassBuilderPipelines.cpp

Revert "Disable pre-link LTO vectorisation and loop unroll for at O2 and O3 o…"

This reverts commit e3c929c8f1bca3e96dcb3c3b1886f25f8244bb5d.
DeltaFile
+0-224llvm/test/Other/new-pm-pre-link.ll
+22-22llvm/test/Other/new-pm-defaults.ll
+4-8llvm/lib/Passes/PassBuilderPipelines.cpp
+0-4llvm/test/Other/new-pm-lto-defaults.ll
+1-0clang/test/CodeGen/lto-newpm-pipeline.c
+27-2585 files

LLVM/project 44b3a00 — llvm Maintainers.md

[LFI] Add ourselves as Maintainers for LFI (#236634)

LFI has already been landing changes so explicitly stating who is
maintaining the LFI targets for both AArch64 and x86-64 based on the
past RFC
(https://discourse.llvm.org/t/rfc-lightweight-fault-isolation-lfi-efficient-native-code-sandboxing-upstream-lfi-target-and-compiler-changes/88380
and
https://discourse.llvm.org/t/rfc-lightweight-fault-isolation-lfi-target-for-x86-64/90774)
DeltaFile
+9-0llvm/Maintainers.md
+9-01 files

LLVM/project df73624 — clang/lib/AST/ByteCode InterpHelpers.h, clang/test/AST/ByteCode new-delete.cpp

[clang][bytecode] Check allocation size for numbers (#237852)

If the size isn't a number, we can't convert it to a numeric value.
DeltaFile
+11-0clang/test/AST/ByteCode/new-delete.cpp
+3-0clang/lib/AST/ByteCode/InterpHelpers.h
+14-02 files

LLVM/project 406a0be — utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel, utils/bazel/llvm-project-overlay/lldb/unittests BUILD.bazel

[bazel][lldb] Add unit tests for lldb's process and platform plugins (#237739)

Follow up to #236847. Adds the unit tests for lldb's process and
platform plugins: AdbClientTests, LLDBMinidumpTests, LLDBPlatformTests,
PlatformGdbRemoteTests, ProcessElfCoreTests, ProcessGdbRemoteTests,
ProcessLinuxTests, ProcessPOSIXTests, ProcessUtilityTests,
RegisterSupportTests and ScriptInterpreterNoneTests.

As before, names and dependencies follow CMake, plus the direct
dependencies layering_check requires, and //lldb:Interpreter and
//lldb:Breakpoint wherever a test needs what CMake gets through
lldbCore. LLDBMinidumpTests stages its Inputs/ like the other tests. As
in CMake, the elf-core, Linux and POSIX tests are Linux-only,
PlatformAppleSimulatorTest.cpp is macOS-only, and RegisterSupportTests
leaves out the FreeBSD and NetBSD register context tests that CMake only
adds on those systems.

ProcessLinuxTests includes the plugin's headers without the
Plugins/Process/Linux/ prefix, which CMake allows through

    [6 lines not shown]
DeltaFile
+247-0utils/bazel/llvm-project-overlay/lldb/unittests/BUILD.bazel
+26-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+273-02 files

LLVM/project 8c88556 — mlir/include/mlir/Dialect/X86 Transforms.h, mlir/include/mlir/Dialect/X86/TransformOps X86TransformOps.td

[mlir][X86] Prepare contract interleave (#236750)

Follow-up to #232800, which folds transpose + shape_cast unpacking of a
VNNI-packed RHS. Some frontends instead unpack by splitting the source
into VNNI lanes, transposing each lane, and joining the lanes back.
triton-cpu does this with deinterleave/interleave, and cutile-cpu with
transpose + extract and insert_strided_slice. Neither form was matched,
so the contraction never reached AMX lowering.

This matches both forms. For i8, factor 4 can be expressed as two binary
levels or a single 4-way step. We only fold when every lane comes from
the same source in VNNI order.

Also simplifying checks and hardening integration tests.

Assisted by AI.
DeltaFile
+406-140mlir/test/Dialect/X86/vector-contract-prepare-loops.mlir
+270-65mlir/lib/Dialect/X86/Transforms/PrepareVectorContractLoops.cpp
+186-48mlir/test/Integration/Dialect/Vector/CPU/X86/prepare-contract-loops.mlir
+6-1mlir/include/mlir/Dialect/X86/TransformOps/X86TransformOps.td
+2-2mlir/include/mlir/Dialect/X86/Transforms.h
+870-2565 files

LLVM/project c1367ba — llvm/lib/Analysis ValueTracking.cpp, llvm/test/Analysis/ValueTracking known-bits.ll

[ValueTracking] Infer a zero low bit for `shl X, X` (#237567)

Teach `computeKnownBits` that `shl X, X` has its low bit clear: for a
defined shift, `X` is either zero or shifts by at least one bit. This
lets `InstSimplify` and `InstCombine` fold comparisons and sign
extensions of the low bit.

---------

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+51-0llvm/test/Analysis/ValueTracking/known-bits.ll
+7-0llvm/lib/Analysis/ValueTracking.cpp
+58-02 files

LLVM/project d45bfc6 — clang/lib/AST/ByteCode Pointer.cpp Interp.cpp

[clang][bytecode] Use `Type::castAsCXXRecordDecl()` where appropriate (#237950)
DeltaFile
+9-11clang/lib/AST/ByteCode/Compiler.cpp
+2-2clang/lib/AST/ByteCode/Interp.cpp
+2-2clang/lib/AST/ByteCode/Context.cpp
+1-1clang/lib/AST/ByteCode/Pointer.cpp
+14-164 files

LLVM/project 57aaf66 — flang/lib/Semantics check-omp-structure.cpp, flang/test/Lower/OpenMP reduction-task-combined.f90

[flang][OpenMP] Check task reduction modifier on compound constructs (#237932)

Check the constituent constructs when validating a task reduction
modifier. The compound directive name previously rejected legal parallel
do, parallel sections, and target parallel reductions before lowering
could assign the modifier to their accepting leaf.

Assisted-by: Codex
DeltaFile
+52-0flang/test/Semantics/OpenMP/reduction-task-combined.f90
+37-0flang/test/Lower/OpenMP/reduction-task-combined.f90
+17-2flang/lib/Semantics/check-omp-structure.cpp
+106-23 files

LLVM/project 3e0eaa9 — llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp

[RISCV][P-ext] Combine RISCVISD::PMULH_H_B0/PMULH_W_H0/MULH_H0 into a single ISD opcode. NFC (#237807)

This matches how MHACC_HALF opcodes are implemented.

I adjusted the type profile for MHACC_HALF for consistency.
DeltaFile
+27-64llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+30-39llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+57-1032 files

LLVM/project 9706c43 — clang/test/CodeGen lto-newpm-pipeline.c, llvm/lib/Passes PassBuilderPipelines.cpp

Revert "Disable pre-link LTO vectorisation and loop unroll for at O2 and O3 optimisation levels (#195886)"

There's test failure for the addeda NerPM Test which sometimes
outputs "FunctionAnalysisManager" and sometimes
"AnalysisManager<Function>" (they are aliases).

This reverts commit e3c929c8f1bca3e96dcb3c3b1886f25f8244bb5d.
DeltaFile
+0-224llvm/test/Other/new-pm-pre-link.ll
+22-22llvm/test/Other/new-pm-defaults.ll
+4-8llvm/lib/Passes/PassBuilderPipelines.cpp
+0-4llvm/test/Other/new-pm-lto-defaults.ll
+1-0clang/test/CodeGen/lto-newpm-pipeline.c
+27-2585 files

LLVM/project 4994a95 — mlir/include/mlir/IR AttrTypeSubElements.h, mlir/unittests/IR AttrTypeReplacerTest.cpp

[mlir] Fix detection of default sub-element handlers

`has_default_sub_element_handler_t` was defined as
`decltype(T::DefaultHandlerTag)`. `DefaultHandlerTag` is a type alias, not
a value, and it is a member of `AttrTypeSubElementHandler<T>`, not of the
parameter type `T`. The expression was therefore never well-formed, and
`has_sub_attr_or_type_v` evaluated to true for every non-empty pack.

Every parametric attribute and type thus instantiated the full sub-element
walk/replace machinery, even when none of its parameters can contain an
attribute or type.

Query the handler instead. Keys without attribute or type parameters now
skip walking and return the original instance on replacement. In a
synthetic benchmark of 100 types with `unsigned` and `ArrayRef<int64_t>`
parameters, this lowers the peak compiler memory per type by 14-21% and
object size per type by 11-16% (GCC 13 and Clang 20, -O0/-O2 with -g).
DeltaFile
+12-0mlir/unittests/IR/AttrTypeReplacerTest.cpp
+2-1mlir/include/mlir/IR/AttrTypeSubElements.h
+14-12 files

LLVM/project 02d4bb5 — .github/workflows libcxx-benchmark-cron.yml libcxx-lnt-refine-commits.yml, libcxx/utils/ci/lnt machines.json README.md

[libc++] Only refine benchmark changes of at least 10% (#238012)

This will greatly reduce the number of commits we end up refining and we
should still get most of the value. This can be tweaked per machine in
case we have machines with more or less noise on them.

Assisted by Claude
DeltaFile
+8-2.github/workflows/libcxx-lnt-refine-commits.yml
+5-4libcxx/utils/ci/lnt/README.md
+3-3libcxx/utils/ci/lnt/machines.json
+1-0.github/workflows/libcxx-benchmark-cron.yml
+17-94 files

LLVM/project d18a34b — utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[Bazel] Define MLIR Arith, Linalg, and Tosa extension libraries (#238021)

Fixes Bazel build after ef1b20bebe2cb17a02c18a25b863db75d40a3d91
(#237987), which moved Arith, Linalg, and Tosa sharding interface
implementations into separate extension libraries (`ArithExtensions`,
`LinalgExtensions`, and `TosaExtensions`) registered by
`RegisterAllExtensions`.
DeltaFile
+55-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+55-01 files

LLVM/project ac45796 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize early-exit-tail-folding.ll

[VPlan] Remove header masks whose tail lanes aren't used

Replace a use of header-mask && x with x if the user, transitively
through freeze, logical-and, not and mask.beforefirst(freeze ...), only
reaches masks that are and'ed with the header mask again. The header
mask is a prefix and lane i of mask.beforefirst only depends on lanes
0..i, so the lanes outside of the header mask are never used.

This avoids the i1 vp.merge that EVL tail folding needs for the inner
header mask, e.g. in the early exit mask.beforefirst(freeze(header-mask
&& c)) and in switch default edges.
DeltaFile
+39-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+2-4llvm/test/Transforms/LoopVectorize/early-exit-tail-folding.ll
+1-2llvm/test/Transforms/LoopVectorize/RISCV/zvl1024b-crash.ll
+42-63 files

LLVM/project 96bcc54 — llvm/lib/Transforms/Vectorize VPlanTransforms.h LoopVectorizationLegality.cpp, llvm/test/Transforms/LoopVectorize early_exit_store_legality.ll early-exit-tail-folding.ll

[VPlan] Allow tail folding early exits with side effects
DeltaFile
+18-35llvm/test/Transforms/LoopVectorize/RISCV/early-exit.ll
+16-25llvm/test/Transforms/LoopVectorize/early-exit-tail-folding.ll
+24-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+0-7llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+2-2llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
+2-1llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+62-701 files not shown
+63-717 files