[offload][sycl] add context parameter to olCreateProgram (#218387)
This patch is the 3rd patch in the context patch series. This change is
relatively simple compared to the others: we just introduce context to
the create program API and pass it down through the plugin interface to
the plugins.
AMDGPU: Add visible features for aperture regs, doorbell ID and AGPR alloc
These fields are needed to migrate AMDGPUAttributor to using TargetParser
information instead of subtarget features.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[InstCombine] Do not apply unsigned sub identities when flipping icmp strictness in `foldICmpBinOp` (#219904)
Folding `icmp ult A -nuw B, Op1 -> icmp ule A, Op1` may be unsound for
unsigned predicates with negative B, when the subtraction appears as a
`or disjoint`, previously matched as `add nuw`. nuw in `A + (-B)`
ensures that `A <u B` does not wrap unsigned, though the identity would
require proving `A >=u B` for the subtraction not to wrap. As the fold
relies on `NoOp0WrapProblem`, which proves the opposite of the latter,
simply avoid performing such an optimization.
Fixes: https://github.com/llvm/llvm-project/issues/218540.
Remove two declarations without definitions (#219511)
Commit 3dc4fd6d removed the definitions of struct_scc_modem_sz and
struct_scc_stat_sz, but left the declarations in a header. This patch
removes the leftovers.
[Clang] Enable UBSan for AMDGPU device offload
Summary:
This enables the device UBSan runtime for AMDGPU decides. Primarily this
required modifications to the `addSanitizerRuntime` interface so we can
query the compilation's offload status. Also need to forward it through
the linker wrapper interface. Works on all AMDGPU offload, slight hacks
around the other targets as they do not advertise sanitizer
runtimes properly.
This is linked in via a new `-u __ubsan_device_initialize` hook to pull
in the side library. This is standard behavior and keeps the core logic
mostly unchanged and re-used.
[compiler-rt] Add AMDGPU Device UndefinedBehaviorSanitizer runtime
Summary:
This adds support for full UBSan on the AMDGPU target. The GPU build of
`compiler-rt` will now build `libclang_rt.ubsan_standalone.a` and the
host build will now provide `libclang_rt.ubsan_device.a` for the
host-side formatting.
The **core** approach is to simply gather arguments from the device and
replay them on the host. The RPC interface acts as the narrow shim to
pass data between the CPU and GPU.
The changes to the core runtime are kept minimal, only exposing a few
needed hooks to re-run and symbolize reports coming from an external
caller. The device archive is a side-library which will only be present
for GPU offloading builds.
Putting this in `compiler-rt` via interceptors avoids an ABI edge
between many consumers, (OpenMP, HIP, Pytorch, etc). The runtime code is
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workflows/release-binaries: Smaller WiX installer on Windows (#219858)
Reduce WiX installer size by using LZX compression instead of MSZIP
previously. Tested on `release/23.x` at commit
fdf0409c656cc66c61b14d71c831f2b453c13e19 targetting Win64:
- MSZIP: 779 MiB
- LZX: 613 MiB
workflows/release-binaries: Ignore flaky test on Windows (#219859)
Skip a flaky test when building the Win64 LLVM package on Windows.
A popular security/antimalware solution is preventing this test from
completing correctly.
[OpenMP] Make OpenMP version have separate type
It's unsigned now. Giving it a separate type would make the code clearer,
and it would make it easier to change the effective type if it's ever
needed.
[compiler-rt] Add AMDGPU Device UndefinedBehaviorSanitizer runtime
Summary:
This adds support for full UBSan on the AMDGPU target. The GPU build of
`compiler-rt` will now build `libclang_rt.ubsan_standalone.a` and the
host build will now provide `libclang_rt.ubsan_device.a` for the
host-side formatting.
The **core** approach is to simply gather arguments from the device and
replay them on the host. The RPC interface acts as the narrow shim to
pass data between the CPU and GPU.
The changes to the core runtime are kept minimal, only exposing a few
needed hooks to re-run and symbolize reports coming from an external
caller. The device archive is a side-library which will only be present
for GPU offloading builds.
Putting this in `compiler-rt` via interceptors avoids an ABI edge
between many consumers, (OpenMP, HIP, Pytorch, etc). The runtime code is
[42 lines not shown]
[Clang] Enable UBSan for AMDGPU device offload
Summary:
This enables the device UBSan runtime for AMDGPU decides. Primarily this
required modifications to the `addSanitizerRuntime` interface so we can
query the compilation's offload status. Also need to forward it through
the linker wrapper interface. Works on all AMDGPU offload, slight hacks
around the other targets as they do not advertise sanitizer
runtimes properly.
This is linked in via a new `-u __ubsan_device_initialize` hook to pull
in the side library. This is standard behavior and keeps the core logic
mostly unchanged and re-used.
clang/AMDGPU: Accept subarch names in --offload-arch (#219963)
Accept the triple subarch names as aliases. e.g.,
--offload=arch=amdgpu9.50 is equivalent to --offload-arch=gfx950
CodeGen: Use use_instructions in changeDebugValuesDefReg
The loop only inspects the using instruction, so iterate instructions
directly instead of operands and their parents.
Co-authored-by: Claude (Claude-Opus-4.8)
CodeGen: Pass instruction and operand index to isIgnorableUse
Replace the MachineOperand argument to the TargetInstrInfo::isIgnorableUse
hook with the containing instruction and operand index. The AMDGPU
implementation only used the operand to recover its parent instruction, so
this drops the dependence on MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
MachinePipeliner: Pass instruction to findLoopIncrementValue
The helper recovered the loop block from the operand's parent instruction.
Pass the containing instruction directly so it no longer depends on
MachineOperand::getParent().
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
clang/AMDGPU: Stop passing redundant -target-cpu to cc1 (#206483)
Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
[clang] Delay dependent co_return promise calls (#218779)
Avoiding selection of return_value or return_void while building
co_return whose operand is type-dependent and keeping it unset until
template init rebuild for a type allows dependent operations like
co_return ctx.f(v) to use promise.return_void() instead of needing
promise.return_value().
Fixes #218368
[clang-format] Keep empty Java interface/record body on one line (#219910)
`AllowShortRecordOnASingleLine` (introduced for C++ records) made
`LineJoiner::tryFitMultipleLinesInOne` route Java `TT_RecordLBrace`
lines to `tryMergeRecord`, which only handles C++ class/struct/union
records. Empty Java `interface` and `record` bodies were therefore no
longer merged onto a single line, regressing the behavior that
`BraceWrapping.SplitEmptyRecord: false` previously provided.
Handle Java records separately and restore the pre-existing
`SplitEmptyRecord`-based merge.
Fixes #219711
clang/AMDGPU: Accept subarch names in --offload-arch
Accept the triple subarch names as aliases. e.g.,
--offload=arch=amdgpu9.50 is equivalent to --offload-arch=gfx950
[MIR] Round-trip all machine metadata nodes (#219612)
MIR only emitted definitions for a subset of metadata referenced by
machine
functions. Other nodes were printed as pointer values and could not be
parsed
back.
Collect metadata referenced by machine instructions, memory operands,
and
variable debug information. Keep debug locations inline so the output
remains
readable.
Parse each machine metadata item with LLVM IR's metadata parser while
preserving the YAML item boundaries. This supports specialized nodes,
cycles,
and forward references without accepting definitions split across list
items,
and removes the old tuple-only parser.
[docs] Remove stale FIXMEs in LibASTMatchers.md (#219741)
Replace the stale "Introduce link to ASTMatchersTutorial.html" FIXMEs
with a link to the existing LibASTMatchersTutorial, drop the
ASTMatchersCookbook FIXMEs (no cookbook exists), and fix the "macros
(see below)" reference which should point to the AST_MATCHER_P section
above.
[AMDGPU] Reject image load merges with mismatched dim (#219923)
dim was missing from the operand equality check, so loads with different
dim could wrongly get merged into one