LLVM/project 9b0295cclang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c, llvm/test/CodeGen/RISCV determine-callee-saves-gpr.mir

rebase

Created using spr 1.3.8-wip
DeltaFile
+733-733clang/test/CodeGen/LoongArch/lasx/builtin.c
+733-733clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+42-1,387llvm/test/CodeGen/X86/haddsub-2.ll
+1,283-0llvm/test/CodeGen/RISCV/determine-callee-saves-gpr.mir
+1,030-14llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
+959-12llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
+4,780-2,879532 files not shown
+24,456-12,093538 files

LLVM/project cc62255clang/test/CodeGen/LoongArch/lasx builtin-alias.c builtin.c, llvm/test/CodeGen/RISCV determine-callee-saves-gpr.mir

[spr] changes introduced through rebase

Created using spr 1.3.8-wip

[skip ci]
DeltaFile
+733-733clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+733-733clang/test/CodeGen/LoongArch/lasx/builtin.c
+42-1,387llvm/test/CodeGen/X86/haddsub-2.ll
+1,283-0llvm/test/CodeGen/RISCV/determine-callee-saves-gpr.mir
+1,030-14llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
+959-12llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
+4,780-2,879532 files not shown
+24,456-12,093538 files

LLVM/project ac05f72llvm/include/llvm/CodeGen TargetRegisterInfo.h, llvm/include/llvm/MC MCRegisterInfo.h

[CodeGen] Merge TargetRegClass into MCRegClass (#207168)

Both data types store primitive information only and TargetRegisterClass
doesn't reference target-specific data structures. TargetRegisterClass,
however, freqeuently refers to MCRegisterClass through a pointer, which
prevents moving the large TargetRegisterClass instances to .rodata.

Therefore, merge the fields of TargetRegisterClass into MCRegisterClass
and adjust the remaining fields to use the existing storage mechanism
for pointer-free storage. To avoid invasive code changes, keep
TargetRegisterClass as alias for MCRegisterClass.

This reduces the size of .data.rel.ro by ~122 kiB in an all-target
build while growing .rodata by just 92 kiB. Further size improvements
are possible in future by reordering struct fields and deduplicating
masks/register lists/register class lists.

Pull Request: https://github.com/llvm/llvm-project/pull/207168
DeltaFile
+146-126llvm/utils/TableGen/RegisterInfoEmitter.cpp
+4-157llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+109-1llvm/include/llvm/MC/MCRegisterInfo.h
+5-14llvm/test/TableGen/RegisterInfoEmitter-inherit-properties.td
+4-8llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+5-4llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+273-31042 files not shown
+359-36748 files

LLVM/project d3b6ad1mlir/include/mlir-c Rewrite.h, mlir/lib/CAPI/Transforms Rewrite.cpp

[mlir-c] Reapply Add ConversionTarget dynamic legality C API (#207104) (#207253)

Fixes LeakSanitizer failure from #206161 (reverted in #207104);
`mlirFreezeRewritePattern` moves contents out of the `RewritePatternSet`
but does not free the container (passed by value in the C API), so the
allocation from `mlirRewritePatternSetCreate` was never freed (add
`mlirRewritePatternSetDestroy(patterns)` after freezing).
DeltaFile
+181-0mlir/test/CAPI/rewrite.c
+60-0mlir/lib/CAPI/Transforms/Rewrite.cpp
+44-0mlir/include/mlir-c/Rewrite.h
+285-03 files

LLVM/project e49c8a0libcxx/include string, libcxx/include/__cxx03 string

[libc++] Base string's alignment on __STDCPP_DEFAULT_NEW_ALIGNMENT__ (#171785)

This allows users to influence how much we overalign `string`s
allocations and tune it to the new/delete implementation via
`-fnew-alignment`. If we don't have `__STDCPP_DEFAULT_NEW_ALGINMENT__`
or we're not using `std::allocator`, we default to an alignment of
`sizeof(void*)`.
DeltaFile
+30-0libcxx/test/libcxx/strings/basic.string/new_alignment.sh.cpp
+15-9libcxx/test/libcxx/strings/basic.string/string.capacity/allocation_size.pass.cpp
+12-1libcxx/include/__cxx03/string
+11-1libcxx/include/string
+2-7libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp
+5-2libcxx/test/libcxx-03/strings/basic.string/string.capacity/allocation_size.pass.cpp
+75-203 files not shown
+88-239 files

LLVM/project 1030639lld/ELF LinkerScript.cpp

[ELF] Precompute orphan output section names in parallel. NFC (#207321)

addOrphanSections computes getOutputSectionName serially for every live
orphan section. Without --emit-relocs/-r, the name is a pure function of
the section: precompute the names with a parallelFor.
DeltaFile
+16-4lld/ELF/LinkerScript.cpp
+16-41 files

LLVM/project 3d54bedllvm/include/llvm/IR IRBuilder.h, llvm/lib/CodeGen AtomicExpandPass.cpp

Update for comments
DeltaFile
+9-13llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+14-0llvm/include/llvm/IR/IRBuilder.h
+4-6llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+2-4llvm/lib/CodeGen/AtomicExpandPass.cpp
+29-234 files

LLVM/project 7c0b1d3clang/include/clang/AST OpenMPClause.h, clang/lib/Parse ParseOpenMP.cpp

[Clang][OpenMP] Add parsing for dims modifier in num_teams and thread_limit
DeltaFile
+132-24clang/lib/Sema/SemaOpenMP.cpp
+129-0clang/test/OpenMP/dims_modifier_messages.cpp
+63-21clang/lib/Parse/ParseOpenMP.cpp
+72-10clang/include/clang/AST/OpenMPClause.h
+40-0clang/test/OpenMP/dims_modifier_ast_print.cpp
+23-11clang/lib/Sema/TreeTransform.h
+459-6614 files not shown
+577-10720 files

LLVM/project 16a6b51clang/lib/Sema SemaOpenMP.cpp

[NFC][Clang][OpenMP] Simplify checks for num_teams and thread_limit expressions (#207305)

Prepare changes for #206412
DeltaFile
+61-57clang/lib/Sema/SemaOpenMP.cpp
+61-571 files

LLVM/project 602897fllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 vecreduce-add.ll vecreduce-fadd.ll

[DAGCombiner] Reassociate chains of vector reductions (#206471)

`DAGCombiner::reassociateReduction` already folds a single
`add(vecreduce(x), vecreduce(y)) -> vecreduce(add(x, y))`, and the
balanced-tree form `add(add(vecreduce(a), b), add(vecreduce(c), d))`.
It does not, however, handle a linear chain of reductions like the one
SLP emits for x264's SAD:

```
add(reduce(X0), add(reduce(X1), add(reduce(X2), acc)))
```

Only the innermost pair can ever be merged; the cascade breaks and every
reduction survives to lowering, giving one `vredsum` (or one `uadalp` step,
etc.) per term.

This PR adds a third form to `reassociateReduction`:

```

    [17 lines not shown]
DeltaFile
+74-82llvm/test/CodeGen/RISCV/rvv/fixed-vectors-sad.ll
+136-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-zvdot4a8i.ll
+97-0llvm/test/CodeGen/RISCV/rvv/zvdot4a8i-sdnode.ll
+36-35llvm/test/CodeGen/AArch64/vecreduce-add.ll
+36-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+17-9llvm/test/CodeGen/AArch64/vecreduce-fadd.ll
+396-1261 files not shown
+399-1327 files

LLVM/project 70f945fllvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx vexth.ll

[LoongArch] Add DAG combines for vector widening extends

Lower:

```
  SEXT/ZEXT(High-Half-128-Bit-Lanes(vec))
```

to:

```
  LSX:  VEXTH.H.B, VEXTH.W.H, VEXTH.D.W
        VEXTH.HU.BU, VEXTH.WU.HU, VEXTH.DU.WU

  LASX: XVEXTH.H.B, XVEXTH.W.H, XVEXTH.D.W
        XVEXTH.HU.BU, XVEXTH.WU.HU, XVEXTH.DU.WU
```
DeltaFile
+4-54llvm/test/CodeGen/LoongArch/lasx/vexth.ll
+23-12llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+29-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+24-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+6-15llvm/test/CodeGen/LoongArch/lsx/vexth.ll
+86-815 files

LLVM/project d0733c1llvm/test/CodeGen/LoongArch/lasx vexth.ll, llvm/test/CodeGen/LoongArch/lsx vexth.ll

[LoongArch][NFC] Add vector widening extends tests
DeltaFile
+217-0llvm/test/CodeGen/LoongArch/lasx/vexth.ll
+104-0llvm/test/CodeGen/LoongArch/lsx/vexth.ll
+321-02 files

LLVM/project e69038fclang/include/clang/ScalableStaticAnalysis/Core/EntityLinker MultiArchSharedLibrary.h, clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat MultiArchSharedLibrary.cpp

[clang][ssaf] Add `MultiArchSharedLibrary` data structure (#206854)

This change introduces `MultiArchSharedLibrary` data structure that wraps per-architecture `LUSummaryEncoding` members. This is the SSAF analogue of a fat shared library. The overall design mirrors the existing `MultiArchStaticLibrary` design: each member identifies the same logical library built for a different target triple. Support for constructing and consuming this object will be added in a future PR.

rdar://181164537
DeltaFile
+163-0clang/lib/ScalableStaticAnalysis/Core/Serialization/JSONFormat/MultiArchSharedLibrary.cpp
+105-0clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/top-level.test
+79-0clang/test/Analysis/Scalable/ssaf-format/Artifact/Inputs/rt-multi-arch-shared-library-nonempty.json
+79-0clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/Inputs/rt-nonempty-members.json
+74-0clang/include/clang/ScalableStaticAnalysis/Core/EntityLinker/MultiArchSharedLibrary.h
+55-0clang/test/Analysis/Scalable/ssaf-format/MultiArchSharedLibrary/round-trip.test
+555-041 files not shown
+1,210-3147 files

LLVM/project 5467f71clang/lib/Sema SemaOpenMP.cpp

Fix format
DeltaFile
+2-3clang/lib/Sema/SemaOpenMP.cpp
+2-31 files

LLVM/project 98e8ac7clang/lib/Sema SemaOpenMP.cpp

Fix review comment
DeltaFile
+1-1clang/lib/Sema/SemaOpenMP.cpp
+1-11 files

LLVM/project 8aaa28ellvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/RISCV interleaved-cost.ll

[RISCV] Cost legal interleaved memory ops correctly for code size (#207162)

This doesn't yet handle interleaved memory ops with a factor > 8 or with
a gap mask, that still needs to be handled below.
DeltaFile
+85-0llvm/test/Transforms/LoopVectorize/RISCV/interleaved-cost.ll
+3-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+88-02 files

LLVM/project c671e80lld/ELF Writer.cpp

[ELF] Parallelize demoteSymbolsAndComputeIsPreemptible (#207310)

Each symbol's demotion and isPreemptible bit is independent.
Linking clang release is 1.02x as fast on an x86-64 machine.
DeltaFile
+23-17lld/ELF/Writer.cpp
+23-171 files

LLVM/project b4e651bllvm/utils/lit/lit util.py InprocBuiltins.py

lit: improve long path support on Windows (#207250)

This pull request improves Windows path handling in the
`llvm/utils/lit/lit` utilities by introducing and applying an `extended`
function to correctly format file paths for Windows APIs, especially for
long paths and UNC paths. The changes ensure that file operations such
as removal and redirection work reliably on Windows systems.

**Windows path handling improvements:**

* Added an `extended` function in both `InprocBuiltins.py` and
`ShellEnvironment.py` to convert paths to the extended-length format
required by Windows, handling both regular and UNC paths.
[[1]](diffhunk://#diff-7b75d403cff61cebbd12ef3915054dee6a887deaa2300fbc73a33f64ce2d1255R179-R186)
[[2]](diffhunk://#diff-31c539a1c64eb53261e543eeda1966733230d2b7613f5d500deed3f2f1ce2baeR121-R128)
* Applied the `extended` function to file removal operations in
`InprocBuiltins.py`, ensuring paths are properly formatted before
deletion, which helps avoid issues with long or special Windows paths.
* Used the `extended` function for redirected file paths in
`ShellEnvironment.py`, ensuring that redirections to files handle
Windows path limitations correctly.
DeltaFile
+25-0llvm/utils/lit/lit/util.py
+1-0llvm/utils/lit/lit/InprocBuiltins.py
+1-0llvm/utils/lit/lit/ShellEnvironment.py
+27-03 files

LLVM/project 1bddfa5llvm/test/CodeGen/RISCV/rvv fixed-vectors-lmul-max.ll

[RISCV] Fix multiline RUN line in fixed-vectors-lmul-max.ll. NFC (#207309)

llvm-lit failed to parse the RUN line because we were missing a \ and a
second
RUN on the line below. The codegen has changed in the meantime but
because it
never parsed, llvm-lit always treated this test as passing.
DeltaFile
+18-14llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lmul-max.ll
+18-141 files

LLVM/project 760bb06llvm/include/llvm/IR ModuleSummaryIndex.h ModuleSummaryIndexYAML.h, llvm/lib/Bitcode/Writer BitcodeWriter.cpp

[ThinLTO] Change GlobalValueSummaryMapTy from std::map to DenseMap+deque (#157839)

Replace GlobalValueSummaryMapTy with a custom container using DenseMap
for O(1) lookup and std::deque for storage with pointer stability. Sort
by GUID at serialization points to preserve deterministic output order.

RFC:
https://discourse.llvm.org/t/rfc-change-globalvaluesummarymapty-from-std-map-to-llvm-densemap-for-thin-linking-performance/88191
DeltaFile
+95-8llvm/include/llvm/IR/ModuleSummaryIndex.h
+7-3llvm/lib/IR/AsmWriter.cpp
+6-3llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+5-1llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
+2-1llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
+115-165 files

LLVM/project 4fad93blibcxx/include/__vector layout.h

[libc++] Use _LIBCPP_NO_UNIQUE_ADDRESS for the new vector layout (#207149)

We use `_LIBCPP_NO_UNIQUE_ADDRESS`, since a plain
`[[no_unique_address]]` doesn't work on Windows.
DeltaFile
+1-1libcxx/include/__vector/layout.h
+1-11 files

LLVM/project 94acbb7clang/lib/Sema SemaOpenMP.cpp

[NFC][Clang][OpenMP] Simplify checks for num_teams and thread_limit expressions
DeltaFile
+62-57clang/lib/Sema/SemaOpenMP.cpp
+62-571 files

LLVM/project 3c0f9cbclang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c, llvm/test/CodeGen/RISCV determine-callee-saves-gpr.mir

Merge branch 'main' into users/c8ef/assert_test_string
DeltaFile
+733-733clang/test/CodeGen/LoongArch/lasx/builtin.c
+733-733clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+42-1,387llvm/test/CodeGen/X86/haddsub-2.ll
+1,283-0llvm/test/CodeGen/RISCV/determine-callee-saves-gpr.mir
+1,030-14llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
+959-12llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
+4,780-2,879465 files not shown
+22,434-11,843471 files

LLVM/project 53af7edclang/lib/Sema SemaOpenMP.cpp

[NFC][Clang][OpenMP] Simplify checks for num_teams and thread_limit expressions
DeltaFile
+62-57clang/lib/Sema/SemaOpenMP.cpp
+62-571 files

LLVM/project 2cf5b7bllvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp, llvm/test/CodeGen/RISCV/rvv vector-deinterleave.ll

[LegalizeType] Fix VECTOR_DEINTERLEAVE widening with incorrect insert_subvector (#207245)

Partially address #207136 

There are really two parts in the associated issue: (1) incorrect type
widening logics that `insert_subvector` with indices that are not a
multiple of the sub-vector's minimum number of elements, and (2)
incorrect RISC-V lowering logics when it comes to fixed vector.

This PR addresses the first part: It turns out in order to have a
widened, packed concat vector, we don't need to use any insert_subvector
that involves widened operands -- just `concat_vectors` on the
_original_ (narrow) operands (before adjusting to the size of the
desired widened concat vector)
DeltaFile
+32-0llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
+7-10llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+39-102 files

LLVM/project be1d8d4llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 cttz-of-bool-vector-bitcast.ll

[AArch64] Lower cttz(bitcast <Nxi1> to iN) with shrn-based compressed movemask (#199081)

The existing lowering in vectorToScalarBitmask() creates a 1 bit per
lane movemask using a powers of 2 reduction (and+addv with a constant
pool entry).

This patch adds a DAG combine on ISD::CTTZ that recognizes cttz(bitcast
<N x i1> to iN) and produces a compressed movemask with shrn (for i8
lanes) or xtn (for wider lanes) then runs scalar cttz on a 64- or
128-bit value. Dividing by bits per lane gives the lane index.

Supports lane counts {2, 4, 8, 16, 32} (one or two NEON registers)

For the example in the issue (`<16 x i8> -> i16`):

Before:
```asm
adrp x8, .LCPI0_0
cmlt v0.16b, v0.16b, #0

    [34 lines not shown]
DeltaFile
+940-0llvm/test/CodeGen/AArch64/cttz-of-bool-vector-bitcast.ll
+132-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1,072-02 files

LLVM/project 604db5fcompiler-rt/lib/profile InstrProfilingPlatformROCm.cpp

[PGO][HIP][NFC] Fix hipModuleGetGlobal -Wunused-function warning (#207293)

The functions trigger the warning on Windows (without elf.h) and is
fatal under -Werror.
Fix by adding [[maybe_unused]]. Alternatively it could be moved inside
the existing __has_include(<elf.h>) block,; however that would trigger
-Wunused-but-set-global on pHipModuleGetGlobal.
Current fix is minimal and can be removed once hipModuleGetGlobal is
supported without elf.h.
DeltaFile
+1-0compiler-rt/lib/profile/InstrProfilingPlatformROCm.cpp
+1-01 files

LLVM/project 247a272clang/lib/Sema SemaDecl.cpp, clang/test/SemaCXX injected-class-name-crash.cpp

[clang] fix redeclarations of the injected class name

The declaration used to represent an injected class name should never
be part of any redeclaration chain.

This is a regression since Clang 22, and this will be backported, so no release notes.

Fixes #202320
DeltaFile
+14-11clang/lib/Sema/SemaDecl.cpp
+7-0clang/test/SemaCXX/injected-class-name-crash.cpp
+21-112 files

LLVM/project d7cd957clang-tools-extra/clangd ModulesBuilder.cpp Preamble.cpp, clang-tools-extra/clangd/unittests PrerequisiteModulesTest.cpp

[clangd] Invalidate preamble when new module imports are added (#199460)

When using `SkipPreambleBuild`, adding a new `import` statement to a
file did
not invalidate the existing preamble because `isPreambleCompatible` only
checked whether existing prerequisite modules were up-to-date, not
whether
the set of required modules itself had changed.

Fixes: #199389
Partially addresses: #126350
DeltaFile
+56-0clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
+24-0clang-tools-extra/clangd/ModulesBuilder.cpp
+16-1clang-tools-extra/clangd/Preamble.cpp
+7-0clang-tools-extra/clangd/ModulesBuilder.h
+103-14 files

LLVM/project 9d103e0llvm/lib/FileCheck FileCheckImpl.h

Rename printVariables to printVariableDefAttempts
DeltaFile
+2-2llvm/lib/FileCheck/FileCheckImpl.h
+2-21 files