LLVM/project 6befe13 — cross-project-tests lit.cfg.py CMakeLists.txt

by Stephen Tozer via GitHub on ⎇
[Dexter] Require lldb-dap for Dexter and log when Dexter is disabled (#206734)

For some time, Dexter tests have been run using lldb-dap when it is
available rather than just lldb/lldb-server. However, the cross project
test dependencies have not been updated since then, meaning that
lldb-dap is not automatically built by check-cross-project. The
Dexter-specific lit config then skips the Dexter tests if lldb-dap is
unavailable, which leads to some check-cross-project builds never
running the Dexter tests. This patch adds lldb-dap to the build
dependencies, and also adds a small log message to inform when the
Dexter tests are skipped; most cases where we skip the Dexter test were
already logged, and this addition expands that to cover all cases.
DeltaFile
+5-0cross-project-tests/lit.cfg.py
+1-1cross-project-tests/CMakeLists.txt
+6-12 files

LLVM/project f0ca72c — llvm/test/CodeGen/X86 vector-fshr-rot-256.ll vector-fshl-rot-256.ll

by Vachan via GitHub on ⎇
[X86] Lower vector 8-bit `rotl(x, 1)` to `(x + x) - (x < 0)` pattern (#206221)

Fixes #198059
DeltaFile
+44-48llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
+35-37llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
+28-33llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
+22-24llvm/test/CodeGen/X86/vector-rotate-256.ll
+18-22llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
+16-19llvm/test/CodeGen/X86/vector-rotate-128.ll
+163-1831 files not shown
+172-1837 files

LLVM/project b4ba747 — llvm/utils profcheck-xfail.txt

by Aiden Grossman via GitHub on ⎇
[ProfCheck] Exclude FixIrreducible Test (#206731)

From #206057. We have not gotten to fixing FixIrreducible yet, so
exclude the test for now.
DeltaFile
+1-0llvm/utils/profcheck-xfail.txt
+1-01 files

LLVM/project 8e61b6a — llvm/lib/ProfileData InstrProf.cpp

by Yaxun (Sam) Liu via GitHub on ⎇
[PGO][NFC] Avoid floating-point block uniformity check (#206547)

Use an integer threshold when deciding whether a block is mostly
uniform.

This keeps the 90% rule exact and avoids relying on floating-point
arithmetic in profile merging.
DeltaFile
+2-2llvm/lib/ProfileData/InstrProf.cpp
+2-21 files

LLVM/project f74bff2 — clang/docs LanguageExtensions.rst, clang/include/clang/Options Options.td

by Abhina Sreeskantharajan on ⎇
Enable driver changes for fexec-charset
DeltaFile
+14-6clang/lib/Driver/ToolChains/Clang.cpp
+14-4clang/include/clang/Options/Options.td
+11-3clang/test/Driver/clang_f_opts.c
+10-0llvm/lib/Support/TextEncoding.cpp
+4-3clang/test/Driver/cl-options.c
+3-3clang/docs/LanguageExtensions.rst
+56-193 files not shown
+60-199 files

LLVM/project 2b60f6f — clang/include/clang/Options Options.td, clang/lib/Driver/ToolChains Clang.cpp

by Abhina Sreeskantharajan on ⎇
address comments
DeltaFile
+3-3clang/include/clang/Options/Options.td
+1-1clang/lib/Driver/ToolChains/Clang.cpp
+4-42 files

LLVM/project d1a4ea5 — clang/lib/AST ASTContext.cpp, clang/lib/Lex TextEncoding.cpp

by Abhina Sreeskantharajan on ⎇
Convert the key before cache lookup to prevent encoding differences
DeltaFile
+9-9clang/lib/AST/ASTContext.cpp
+2-2clang/lib/Lex/TextEncoding.cpp
+11-112 files

LLVM/project 9644d95 — clang/include/clang/Basic TargetInfo.h, clang/lib/AST ASTContext.cpp

by Abhina Sreeskantharajan on ⎇
convert to exec-charset inside getPredefinedStringLiteralFromCache, test __builtin_FILE()
DeltaFile
+10-0clang/lib/AST/ASTContext.cpp
+4-0clang/test/CodeGen/systemz-charset.cpp
+3-0clang/lib/Basic/TargetInfo.cpp
+2-1clang/lib/Lex/TextEncoding.cpp
+2-0clang/include/clang/Basic/TargetInfo.h
+21-15 files

LLVM/project 635c84e — clang/lib/Lex TextEncoding.cpp, clang/lib/Sema SemaChecking.cpp

by Abhina Sreeskantharajan on ⎇
do not convert character by character
DeltaFile
+6-4clang/lib/Sema/SemaChecking.cpp
+1-1clang/lib/Lex/TextEncoding.cpp
+7-52 files

LLVM/project 4f335be — clang/include/clang/Lex TextEncoding.h, clang/lib/Lex TextEncoding.cpp

by Abhina Sreeskantharajan on ⎇
fix CI
DeltaFile
+2-2clang/lib/Lex/TextEncoding.cpp
+1-0clang/include/clang/Lex/TextEncoding.h
+3-22 files

LLVM/project 23c7a50 — clang/lib/AST PrintfFormatString.cpp FormatString.cpp, clang/lib/Sema SemaChecking.cpp

by Abhina Sreeskantharajan on ⎇
Add format string handling
DeltaFile
+58-31clang/lib/AST/PrintfFormatString.cpp
+46-40clang/lib/AST/FormatString.cpp
+33-21clang/lib/Sema/SemaChecking.cpp
+25-11clang/lib/AST/FormatStringParsing.h
+15-8clang/lib/AST/ScanfFormatString.cpp
+19-0llvm/lib/Support/TextEncoding.cpp
+196-1117 files not shown
+233-12013 files

LLVM/project af9c7c5 — clang/include/clang/Sema Sema.h

by Abhina Sreeskantharajan on ⎇
Fix build failure
DeltaFile
+1-0clang/include/clang/Sema/Sema.h
+1-01 files

LLVM/project 0db480e — clang/include/clang/Sema Sema.h

by Abhina Sreeskantharajan on ⎇
Remove old include
DeltaFile
+0-1clang/include/clang/Sema/Sema.h
+0-11 files

LLVM/project 016cb73 — clang/include/clang/Sema Sema.h, clang/lib/Parse Parser.cpp ParseDecl.cpp

by Abhina Sreeskantharajan on ⎇
fix CI
DeltaFile
+0-7clang/test/CodeGen/systemz-charset.c
+2-2clang/include/clang/Sema/Sema.h
+1-1clang/lib/Parse/Parser.cpp
+0-1clang/lib/Parse/ParseDecl.cpp
+3-114 files

LLVM/project 4c9f944 — clang/test/CodeGen systemz-charset.c

by Abhina Sreeskantharajan on ⎇
fix CI
DeltaFile
+2-0clang/test/CodeGen/systemz-charset.c
+2-01 files

LLVM/project 39f1cf1 — clang/lib/Parse ParseDecl.cpp ParseExpr.cpp, clang/lib/Sema SemaExpr.cpp

by Abhina Sreeskantharajan on ⎇
add ParserConversionAction, do not translate unevaluated strings
DeltaFile
+6-6clang/lib/Sema/SemaExpr.cpp
+10-0clang/lib/Parse/ParseDecl.cpp
+8-0clang/test/CodeGen/systemz-charset-diag.cpp
+3-3clang/lib/Parse/ParseExpr.cpp
+5-0clang/test/CodeGen/systemz-charset.c
+4-0clang/lib/Parse/Parser.cpp
+36-93 files not shown
+42-109 files

LLVM/project c49e076 — clang/lib/Lex TextEncoding.cpp

by Abhina Sreeskantharajan on ⎇
formatting
DeltaFile
+5-5clang/lib/Lex/TextEncoding.cpp
+5-51 files

LLVM/project 1196e27 — llvm/lib/Target/AMDGPU SIPostRABundler.cpp AMDGPUInsertDelayAlu.cpp

by Valery Pykhtin via GitHub on ⎇
[NFC][AMDGPU] Use SIInstrFlags predicates in CodeGen passes (#204829)

Replace raw TSFlags accesses with SIInstrFlags predicate calls.

Part of a series following the introduction of SIInstrFlags predicates.
DeltaFile
+23-13llvm/lib/Target/AMDGPU/SIPostRABundler.cpp
+5-7llvm/lib/Target/AMDGPU/AMDGPUInsertDelayAlu.cpp
+4-6llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+2-2llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+3-0llvm/lib/Target/AMDGPU/SIDefines.h
+37-285 files

LLVM/project 221936b — mlir/include/mlir/Dialect/Tosa/IR TosaOps.td, mlir/test/Dialect/Tosa availability.mlir

by Luke Hutton via GitHub on ⎇
[mlir][tosa] Add missing int16 extension for row_gather (#206687)

Updates "availability" to include int16 extension to avoid assertion.
DeltaFile
+1-1mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
+1-1mlir/test/Dialect/Tosa/availability.mlir
+2-22 files

LLVM/project 00617c9 — compiler-rt/lib/tsan/rtl tsan_interceptors_libdispatch.cpp, compiler-rt/test/tsan/Darwin dispatch_apply.mm

by Dan Blackwell via GitHub on ⎇
[Darwin][TSan] Fix false positive race report when using dispatch_apply (#204866)

Currently I have seen some false positive race reports caused by
instrumented block copy code that writes after the release-annotation.
When the block runs on another thread and reads the copied data, it
incorrectly reports this as a race.

This patch casts the block to a `void *` in order to avoid the block
copy - thus avoiding the reported race. This is safe because
`dispatch_apply` runs synchronously, so the block lives beyond all
invocations.

rdar://92286127
DeltaFile
+30-0compiler-rt/test/tsan/Darwin/dispatch_apply.mm
+17-1compiler-rt/lib/tsan/rtl/tsan_interceptors_libdispatch.cpp
+47-12 files

LLVM/project e5418e8 — llvm/utils/lit/lit/builtin_commands diff.py

by Prasoon Kumar via GitHub on ⎇
[lit] Fix builtin diff importing system lit.util in subprocess mode (#206723)

'import lit.util' silently picks up a system-installed lit package
instead of the local one, which may lack abs_path_preserve_drive.

Switch to 'from .. import util': in subprocess mode __package__ is None,
so the relative import raises ImportError and the fallback correctly
picks up the local util.py via PYTHONPATH

Signed-off-by: Prasoon Kumar <prasoonkumar054 at gmail.com>
DeltaFile
+9-10llvm/utils/lit/lit/builtin_commands/diff.py
+9-101 files

LLVM/project d53a1a1 — llvm/test/Transforms/LoopInterchange dependency-all-eq.ll

by Ryotaro Kasuga via GitHub on ⎇
[LoopInterchange] Add test with dependency `[* =]` and `[= *]` (NFC) (#193479)

Add test cases that are legal to interchange but currently cannot be
interchanged due to restrictions in the legality check.
DeltaFile
+117-0llvm/test/Transforms/LoopInterchange/dependency-all-eq.ll
+117-01 files

LLVM/project 732900a — llvm/lib/Target/AArch64 AArch64RegisterInfo.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

by Jonathan Thackray on ⎇
fixup! Address Marian's comments
DeltaFile
+20-19llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+7-1llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+4-2llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+3-2llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+1-1llvm/lib/Target/AArch64/AArch64InstrInfo.td
+35-255 files

LLVM/project bc5e47f — clang/lib/AST/ByteCode Pointer.cpp, clang/test/AST/ByteCode codegen.cpp

by Timm Baeder via GitHub on ⎇
[clang][bytecode] Check pointer types in ::toRValue() (#206712)

Now that we let more reinterpret_casts through, we need to check we have
the proper type here, too. We already did that for some of the types but
not for records and arrays.
DeltaFile
+14-10clang/lib/AST/ByteCode/Pointer.cpp
+9-0clang/test/AST/ByteCode/codegen.cpp
+23-102 files

LLVM/project 2eb6379 — libc/startup/baremetal/aarch64 start.cpp, libc/startup/baremetal/arm start.cpp

by Simi Pallipurath via GitHub on ⎇
[LIBC][ARM] Enable MMU setup and alignment fault handling during startup. (#204803)

This change adds MMU initialisation for Arm targets and configures
alignment fault behaviour.

This patch:
1. Add MMU setup for AArch64 startup.
  - Create a minimal flat-mapped translation table.
  - Configure TTBR0_EL1, MAIR_EL1, and TCR_EL1.
  - Mark stack/heap memory as execute-never (XN) when possible.
  - Enable the MMU and configure alignment checking through SCTLR_EL1.

2. Add MMU setup for ARMA startup:
  - Create a flat 1 MB section mapping covering the address space.
  - Configure DACR, TTBCR, and TTBR0.
  - Enable MMU, instruction cache, and data cache.
  - Configure alignment fault handling through SCTLR.
  
3. Enable unaligned access trapping on Arm M-profile targets when

    [7 lines not shown]
DeltaFile
+84-0libc/startup/baremetal/aarch64/start.cpp
+66-0libc/startup/baremetal/arm/start.cpp
+150-02 files

LLVM/project 34b3299 — llvm/lib/Target/AMDGPU SIISelLowering.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fmin.ll llvm.amdgcn.reduce.fmax.ll

by Aaditya via GitHub on ⎇
[AMDGPU] Support Wave Reduction intrinsics for half types (#202916)

Supported Ops: `fmin`, `fmax`, `fadd`, `fsub`.
DeltaFile
+941-264llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+941-264llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+902-160llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+899-160llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+18-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+15-3llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+3,716-8566 files

LLVM/project 4da31b4 — llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/utils/TableGen/Basic ARMTargetDefEmitter.cpp

by Jonathan Thackray on ⎇
fixup! Address Carol's comments
DeltaFile
+8-0llvm/utils/TableGen/Basic/ARMTargetDefEmitter.cpp
+2-2llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+10-22 files

LLVM/project e1c9446 — llvm/utils/TableGen/Basic ARMTargetDefEmitter.cpp

by Jonathan Thackray on ⎇
fixup! Use SmallDenseSet<> for quick lookup
DeltaFile
+30-28llvm/utils/TableGen/Basic/ARMTargetDefEmitter.cpp
+30-281 files

LLVM/project c3d9f88 — llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/test/MC/AArch64 arm-poe2.s

by Jonathan Thackray on ⎇
[AArch64][llvm] POE2: remove TPMAXn_ELn/TPMINn_ELn and create TPCRn_ELn registers

Some POE2 system registers have been removed/created:

  * `TPMAXn_ELn`/`TPMINn_ELn` system registers are now removed
  * these encodings are reused in new `TPCRn_ELn` system registers

Adjusted testcases as appropriate.
DeltaFile
+48-128llvm/test/MC/AArch64/arm-poe2.s
+4-9llvm/lib/Target/AArch64/AArch64SystemOperands.td
+52-1372 files

LLVM/project 73e07f8 — llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/utils/TableGen/Basic ARMTargetDefEmitter.cpp

by Jonathan Thackray on ⎇
[AArch64][llvm] Generate asm parser extension map from TableGen (NFC)

Modify ARMTargetDefEmitter to emit the assembly parser `ExtensionMap[]`
and replace the hand-written table in AArch64AsmParser.cpp with the
generated one.

Keep the assembly parser-only quirks in the emitter: the directive
denylist, the legacy primary spellings for `mte` and `compnum`, and the
extra bits needed for the `sve2-*` shorthand extensions.

This removes the duplicate manual table while preserving existing
directive parsing and required-feature diagnostics.
DeltaFile
+11-141llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+97-0llvm/utils/TableGen/Basic/ARMTargetDefEmitter.cpp
+108-1412 files