[ELF] MarkLive: Walk each level depth-first with work sharing on idle. NFC (#242181)
markParallel (#189321) visits each queued section's subtree to depth 3.
On deep narrow graphs the level barrier overhead is large.
Adopt the approach of #240243 (lld/MachO): each worker claims chunks of
a level and walks depth-first on its own stack. Once another worker is
idle, try donating the stack to the next level, but only after 256
visits in this level to avoid barrier overhead due to entering the next
level.
[RISCV][P-ext] Add the missing zext_invec pattern (#242288)
Fixes #242268. We mark `v2i32 zext_invec` as legal, but we missed the
pattern `v8i8 -> v2i32`.
[CodeGen] Declare most CommandFlags options in TableGen (#242159)
Move the 34 RegisterCodeGenFlags options that only
codegen::getTargetOptions and codegen::setFunctionAttributes read into a
private CodeGenToolOptions struct, which codegen::getToolOptions adds to
the tool options, and remove their getters from CommandFlags.h.
getNumOccurrences checks become optional fields.
Like other tool options, these are listed only by -help-hidden.
clang-linker-wrapper, which does not pass the tool options, now rejects
them in -mllvm and --offload-opt.
LLM-aided
[flang] Classify IEEE_ARITHMETIC subroutines as SIMPLE and fix DO CONCURRENT checks (#232479)
Mark IEEE rounding and underflow mode subroutines as `SIMPLE` per F2023.
Fix intrinsic-module provenance checking for C1145/C1146, update the
prohibited procedure list, and add regression tests.
F2023 C1145 no longer prohibits `IEEE_SET_FLAG` inside `DO CONCURRENT`,
so these calls are now accepted.
Fixes #231858
[RegisterCoalescer] Keep endpoints of lane-carrying IMPLICIT_DEF (#230141)
Since #196895, pruneValues discards the endpoints of a value copied from
an erasable IMPLICIT_DEF. A partial IMPLICIT_DEF without `<read-undef>`
carries other lanes those endpoints may read, so discarding them leaves
a hole in the live range. Keep them unless the source has no ValidLanes.
Assisted-by: Claude Opus 5.5
Attributor: Volatile calls may access inaccessible memory (#239071)
AAMemoryLocation only used the callee's memory locations for calls, so
a function doing a volatile memcpy between its arguments was
memory(argmem: readwrite). Add inaccessible memory for volatile calls,
as CallBase::getMemoryEffects does.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
ARM: Use inline register class syntax in MIR tests (#242053)
Delete the registers section when unnecessary.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[Offload][Cuda] make getAllocInfo report not found on host ptr (#242363)
On some newer CUDA stacks getAllocInfo returns success on host pointers
even it doesn't provide information. Make the call return `NOT_FOUND` in
this situation as other plugins.
Fixes regression from #241895
Bug analysis and solution provided by Claude.
---------
Co-authored-by: Ivan R. Ivanov <iivanov at nvidia.com>
[libc] Update minimum clang version for cfloat128. (#242396)
This fixes a build issue caused by #241999, which updated the minimum
version for using `__float128`.
A follow-up will move LIBC_TYPES_HAS_FLOAT128 from
llvm-libc-types/float128.h to llvm-libc-macros/ so it can be used in
cfloat128-macros.h.
[CIR] Lower get_element's leading zero with the index's type
The GEP that cir.get_element lowers to starts with a zero index. It was
a raw constant, which MLIR's translation always emits as i32, so CIR
produced `getelementptr [N x T], ptr %p, i32 0, i64 %i` where classic
codegen produces `i64 0, i64 %i`. The zero is now a constant of the
index operand's type, so the two match on x86_64 and on AMDGPU for flat,
global and constant pointers.
In AMDGPU's 32-bit private and local address spaces, the lowering
truncates the index to i32 before the GEP, so both indices are i32 there
while classic codegen keeps them i64.
Assisted-by: Cursor / Claude Opus 5.5
[MSP430] Use INSERT_SUBREG of IMPLICIT_DEF for anyext. NFC (#242305)
SUBREG_TO_REG means that the instruction defining the subregister also
defined the other bits of the register, which is not true in general
for the i8 operand of an anyext. The high byte of an anyext is
undefined,
which is what INSERT_SUBREG into an IMPLICIT_DEF expresses.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[MSP430] Fix zext of i8 values not defined by a byte instruction (#242304)
A byte instruction that writes a register clears the high byte of the
register, so a zext of its result can be selected to SUBREG_TO_REG. The
def8 predicate that checks for this excluded a few nodes that are known
not to be selected to such an instruction, but allowed everything else.
This included select and variable shifts, which are expanded into
control flow with a PHI, so the high byte was not cleared on some paths:
```
bit #1, r12
jne .LBB1_2
mov.b r14, r13
.LBB1_2:
mov r13, r12 ; high byte of %x is not cleared
```
Change def8 to only allow nodes that are always selected to a single
byte instruction that writes a register.
[9 lines not shown]
[MSP430] Precommit tests for zext of i8 select and variable shift. NFC (#242303)
These are currently miscompiled: the zext of an i8 value is assumed to
be
free because byte instructions that write a register clear its high
byte, but select and variable shifts are expanded into control flow with
a PHI, so on some paths no byte instruction clears the high byte.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[mlir][NVVM] Partition the NVVM dialect ops
Including `NVVMDialect.h` is expensive. The header declares all 219 ops of the dialect regardless of how many ops are being used by an includer.
The dialect library pays the same price: each of its 12 TUs includes all op declarations through a precompiled `NVVMDialect.h`, including the 8 TUs that each define an eighth of the ops and `NVVMDialect.cpp`, which implements all of them.
This patch replaces the index sharding with op partitions ("logical sharding", #239254). The ops are grouped by topic into 10 partitions.
Every partition has its own header, which declares the ops of the partition, and its own source file, which defines them together with their hand-written implementations (verifiers, parsers, printers, builders, intrinsic lowerings, etc.).
`NVVMDialect.h` stays as an umbrella header that includes all partition headers, but its use is discouraged. Its includers in MLIR and flang now include what they use instead unless they require the majority of the headers.
Measurements where "Memory" is the sum of the max RSS of every TU, and the users are the TUs in MLIR outside the dialect library that include NVVM dialect headers:
| TUs | Compiler | Wall time (s) | CPU time (s) | Total memory (GiB) |
|------------------------------|----------|---------------------|--------------------|---------------------|
| `MLIRNVVMDialect` (12 -> 14) | clang | 22.3 -> 20.1 (-10%) | 208 -> 193 (-7%) | 9.1 -> 8.6 (-5%) |
| `MLIRNVVMDialect` (12 -> 14) | clang -g | 26.4 -> 24.8 (-6%) | 241 -> 234 (-3%) | 9.7 -> 9.1 (-6%) |
| `MLIRNVVMDialect` (12 -> 14) | gcc | 25.3 -> 21.9 (-13%) | 222 -> 198 (-11%) | 14.9 -> 14.0 (-6%) |
| `MLIRNVVMDialect` (12 -> 14) | gcc -g | 36.8 -> 33.4 (-9%) | 324 -> 296 (-9%) | 21.0 -> 18.8 (-10%) |
| Users (10) | clang | 27.8 -> 24.3 (-13%) | 176 -> 149 (-15%) | 9.3 -> 8.0 (-14%) |
[3 lines not shown]
[HLSL][202x][0010] Update auto keyword to be an HLSL 202x extension instead of 202y (#242101)
Create a 202x diag group. Update the HLSL auto warning to be in the 202x
diag group instead of 202y. Emit the warning if the HLSL version is
below 202x instead of 202y. Add a new test which checks for the warning,
and update existing tests.
Closes #240492
[Flang][OpenMP] Fix non-contiguous and empty target updates (#240503)
Fix compiler lowering and runtime handling of non-contiguous `target
update` operations so multidimensional Fortran sections transfer only
the selected elements.
Preserve physical source strides and scalar-subscript shape, normalize
character bounds and strides, and retain descriptor storage for deferred
`nowait` updates. In libomptarget, merge only consecutive innermost
contiguous dimensions, skip empty updates before presence checks and
transfers, and use 64-bit traversal counts.
Add Flang/MLIR and C/C++/Fortran offload regression coverage for both
transfer directions, multidimensional gaps, empty and `present` updates,
wide characters, and `nowait`.
Includes https://github.com/llvm/llvm-project/pull/235006.
Fixes:
[3 lines not shown]
[SLP]Pack repeated freezes before the vector freeze
The lanes of a vector freeze are frozen independently, so a freeze
repeated in several lanes may get different values. Do not keep the
original lanes with duplicates for freeze nodes, pack the unique values
and reshuffle them.
Pull-request: https://github.com/llvm/llvm-project/pull/242377
[libc] Enable -Werror in baremetal_common.cmake cache file (#241983)
After recent fixes, all the warnings are gone in baremetal builds.
Enable -Werror again so that we can catch warnings as they come.