LLVM/project 24076e7lldb/include/lldb/Utility StringExtractorGDBRemote.h, lldb/packages/Python/lldbsuite/test/tools/lldb-server gdbremote_testcase.py

[lldb-server] Implement support for MultiBreakpoint packet

This is fairly straightforward, thanks to the helper functions created
in the previous commit.

https://github.com/llvm/llvm-project/pull/192910
DeltaFile
+66-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+2-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
+2-0lldb/source/Utility/StringExtractorGDBRemote.cpp
+1-0lldb/include/lldb/Utility/StringExtractorGDBRemote.h
+1-0lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
+0-1lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
+72-16 files

LLVM/project 796d2ecllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/LoongArch/lasx vxi1-masks.ll

[DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (#193987)

See if we can fold all elements of an AND of buildvectors: AND(-1,X) -> X, AND(0,X) -> 0, etc.

Companion to ##183032
DeltaFile
+32-36llvm/test/CodeGen/PowerPC/masked-srem.ll
+30-34llvm/test/CodeGen/PowerPC/masked-udiv.ll
+30-34llvm/test/CodeGen/PowerPC/masked-urem.ll
+30-34llvm/test/CodeGen/PowerPC/masked-sdiv.ll
+10-35llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
+34-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+166-1735 files not shown
+195-25111 files

LLVM/project 1de9889lldb/include/lldb/Utility GDBRemote.h, lldb/source/Plugins/Process/gdb-remote ProcessGDBRemote.cpp ProcessGDBRemote.h

[lldb] Override UpdateBreakpointSites in ProcessGDBRemote to use MultiBreakpoint

This concludes the implementation of MultiBreakpoint by actually using
the new packet to batch breakpoint requests.

https://github.com/llvm/llvm-project/pull/192910
DeltaFile
+192-0lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+8-0lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
+4-0lldb/source/Utility/GDBRemote.cpp
+3-0lldb/include/lldb/Utility/GDBRemote.h
+207-04 files

LLVM/project 84d12c8lldb/include/lldb/Target Process.h, lldb/source/Plugins/Process/Utility StopInfoMachException.cpp

[lldb] Implement delayed breakpoints

This patch changes the Process class so that it delays *physically*
enabling/disabling breakpoints until the process is about to
resume/detach/be destroyed, potentially reducing the packets transmitted
by batching all breakpoints together.

Most classes only need to know whether a breakpoint is "logically"
enabled, as opposed to "physically" enabled (i.e. the remote server has
actually enabled the breakpoint). However, lower level classes like
derived Process classes, or StopInfo may actually need to know whether
the breakpoint was physically enabled. As such, this commit also adds a
"IsPhysicallyEnabled" API.

https://github.com/llvm/llvm-project/pull/192910
DeltaFile
+95-8lldb/source/Target/Process.cpp
+30-1lldb/include/lldb/Target/Process.h
+6-6lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+5-3lldb/source/Plugins/Process/Utility/StopInfoMachException.cpp
+4-2lldb/source/Target/ThreadPlanStepOverBreakpoint.cpp
+5-0lldb/source/Target/TargetProperties.td
+145-203 files not shown
+149-249 files

LLVM/project 3794843lldb/include/lldb/Breakpoint BreakpointSite.h, lldb/include/lldb/Target Process.h

[lldb][NFC] Move BreakpointSite::IsEnabled/SetEnabled into Process

The Process class is the one responsible for managing the state of a
BreakpointSite inside the process. As such, it should be the one
answering questions about the state of the site.

https://github.com/llvm/llvm-project/pull/192910
DeltaFile
+23-29lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+16-7lldb/source/Target/Process.cpp
+6-14lldb/include/lldb/Breakpoint/BreakpointSite.h
+10-0lldb/include/lldb/Target/Process.h
+5-5lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
+8-0lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
+68-555 files not shown
+76-6411 files

LLVM/project 79bc169lldb/source/Plugins/Process/gdb-remote GDBRemoteCommunicationClient.cpp GDBRemoteCommunicationClient.h, lldb/unittests/Process/gdb-remote GDBRemoteCommunicationClientTest.cpp

[lldb][GDBRemote] Parse MultiBreakpoint+ capability
DeltaFile
+22-0lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
+10-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+3-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
+35-03 files

LLVM/project c8107a2lldb/source/Plugins/Process/gdb-remote GDBRemoteCommunicationClient.cpp GDBRemoteCommunicationClient.h, lldb/unittests/Process/gdb-remote GDBRemoteCommunicationClientTest.cpp

[lldb][GDBRemote] Parse MultiBreakpoint+ capability
DeltaFile
+22-0lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
+10-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+3-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
+35-03 files

LLVM/project 13e98d8llvm/lib/CodeGen MachineVerifier.cpp, llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

[MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (#194280)

Both MCContext::MCContext and TargetMachine::getMCAsmInfo treat
MCAsmInfo as a pointer that must be non-null. Make the contract
explicit:

* MCContext's constructor takes `const MCAsmInfo &MAI`.
* TargetMachine::getMCAsmInfo returns `const MCAsmInfo &`.

Make this change now since the MCContext ctor has recently been updated.
DeltaFile
+6-6llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+6-6llvm/lib/Target/X86/X86FrameLowering.cpp
+5-5llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+5-5llvm/lib/Target/ARM/ARMFrameLowering.cpp
+4-4llvm/unittests/CodeGen/MachineInstrTest.cpp
+3-4llvm/lib/CodeGen/MachineVerifier.cpp
+29-3086 files not shown
+144-15392 files

LLVM/project f57f184flang/include/flang/Lower PFTBuilder.h, flang/include/flang/Semantics tools.h

[flang] only instantiate required symbols from parent modules (#193689)

Currently lowering is instantiating (creating
fir.address_of/hlfir.declare) for all module variables from host module
and submodules (for instance, in the new
host_module_variable_instantiation.f90 test, a fir.address_of was
generated the unused var2 inside the procedure foo).

This created a lot of noise (and in the worst cases, compile time
performance issues), and also some extra complexity at least for OpenACC
where the IR acc routine ended up referencing globals that are no
actually needed, creating the need to copy them on the GPU or to have
custom logic to ignore the globals.

This patch addresses this by doing a visit of the parse tree to detect
the required symbols and only instantiate those.
DeltaFile
+69-0flang/lib/Lower/PFTBuilder.cpp
+36-0flang/test/Lower/host_module_variable_instantiation.f90
+33-0flang/test/Lower/proc_pointer_hidden_by_generic.f90
+15-12flang/lib/Lower/Bridge.cpp
+7-0flang/include/flang/Lower/PFTBuilder.h
+3-0flang/include/flang/Semantics/tools.h
+163-123 files not shown
+165-169 files

LLVM/project 8119f18libcxxabi/src cxa_personality.cpp

libcxxabi: declare __gnu_unwind_frame in cxa_personality (#189787)

ARM EHABI builds of libcxxabi fail with clang-22+ because
cxa_personality.cpp calls __gnu_unwind_frame without a visible
declaration, triggering:

  error: use of undeclared identifier '__gnu_unwind_frame'

Add an extern "C" forward declaration before the EHABI unwind helper so
the source compiles correctly.

Signed-off-by: Khem Raj <khem.raj at oss.qualcomm.com>
DeltaFile
+2-0libcxxabi/src/cxa_personality.cpp
+2-01 files

LLVM/project df05297lldb/include/lldb/Utility StringExtractorGDBRemote.h, lldb/packages/Python/lldbsuite/test/tools/lldb-server gdbremote_testcase.py

[lldb-server] Implement support for MultiBreakpoint packet

This is fairly straightforward, thanks to the helper functions created
in the previous commit.

https://github.com/llvm/llvm-project/pull/192910
DeltaFile
+63-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
+2-0lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
+2-0lldb/source/Utility/StringExtractorGDBRemote.cpp
+1-0lldb/include/lldb/Utility/StringExtractorGDBRemote.h
+1-0lldb/packages/Python/lldbsuite/test/tools/lldb-server/gdbremote_testcase.py
+0-1lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
+69-16 files

LLVM/project 21e253cflang/lib/Lower/OpenMP Utils.cpp OpenMP.cpp, flang/test/Lower/OpenMP metadirective-device-isa.f90 metadirective-implementation.f90

[flang][OpenMP] Support lowering of metadirective (part 1)

This patch implements following feature in metadirective:
- implementation={vendor(...)}
- device={kind(...), isa(...), arch(...)}
- user={condition(<constant-expr>)}
- construct={parallel, target, teams}
- default, nothing, and otherwise clause

Dynamic user conditions, target_device, and loop-associated
variants are deferred to follow-up patches.

This patch is part of the feature work for #188820.

Assisted with copilot and GPT-5.4
DeltaFile
+213-0flang/test/Lower/OpenMP/metadirective-device-isa.f90
+210-0flang/lib/Lower/OpenMP/Utils.cpp
+186-1flang/lib/Lower/OpenMP/OpenMP.cpp
+121-0flang/test/Lower/OpenMP/metadirective-implementation.f90
+33-0flang/test/Lower/OpenMP/metadirective-user.f90
+30-0flang/test/Lower/OpenMP/metadirective-construct.f90
+793-17 files not shown
+860-1913 files

LLVM/project 58f2c18llvm/lib/Transforms/InstCombine InstCombineShifts.cpp, llvm/test/Transforms/InstCombine shift-sub.ll

[InstCombine] Fold shift of a constant into a reverse shift (#192982)

    C1 << (C2 - X) -> (C1 << C2) >> X
    C1 << (C2 ^ X) -> (C1 << C2) >> X (if equivalent to the above)
    C1 >> (C2 - X) -> (C1 >> C2) << X (right shift modes match)
    C1 >> (C2 ^ X) -> (C1 >> C2) << X (if equivalent to the above)

Proof: https://alive2.llvm.org/ce/z/q-4soi
DeltaFile
+513-0llvm/test/Transforms/InstCombine/shift-sub.ll
+66-31llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+579-312 files

LLVM/project 9b78781clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Add lowering for amdgcn_div_scale builtins (#192931)

Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2050

This PR adds support for lowering of _builtin_amdgcn_div_scale* amdgpu
builtins to clangIR.
Followed similar lowering from reference clang->llvmir in
clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp.
DeltaFile
+49-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+27-4clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+76-42 files

LLVM/project 30c5cfdllvm/lib/CodeGen ExpandVectorPredication.cpp, llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVTargetTransformInfo.h

[RISCV] Remove codegen for vp_is_fpclass (#193222)

Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999

This splits off vp_is_fpclass from #179622.
DeltaFile
+51-58llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass-vp.ll
+23-39llvm/test/CodeGen/RISCV/rvv/vfclass-vp.ll
+1-15llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+3-1llvm/lib/CodeGen/ExpandVectorPredication.cpp
+0-1llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+78-1145 files

LLVM/project 48fc5a0flang/lib/Lower/OpenMP Utils.cpp OpenMP.cpp, flang/test/Lower/OpenMP metadirective-device-isa.f90 metadirective-implementation.f90

[flang][OpenMP] Support lowering of metadirective (part 1)

This patch implements following feature in metadirective:
- implementation={vendor(...)}
- device={kind(...), isa(...), arch(...)}
- user={condition(<constant-expr>)}
- construct={parallel, target, teams}
- default, nothing, and otherwise clause

Dynamic user conditions and loop-associated variants are deferred
to follow-up patches.

This patch is part of the feature work for #188820.

Assisted with copilot and GPT-5.4
DeltaFile
+204-0flang/lib/Lower/OpenMP/Utils.cpp
+180-1flang/lib/Lower/OpenMP/OpenMP.cpp
+162-0flang/test/Lower/OpenMP/metadirective-device-isa.f90
+121-0flang/test/Lower/OpenMP/metadirective-implementation.f90
+33-0flang/test/Lower/OpenMP/metadirective-static.f90
+30-0flang/test/Lower/OpenMP/metadirective-construct.f90
+730-16 files not shown
+786-1912 files

LLVM/project fda7c9fllvm/unittests/Frontend OpenMPIRBuilderTest.cpp

Try to fix unit tests
DeltaFile
+33-0llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+33-01 files

LLVM/project bee932fllvm/lib/Target/NVPTX NVPTXISelLowering.cpp NVPTXAsmPrinter.cpp, llvm/test/CodeGen/NVPTX unknown-intrinsic.ll

[NVPTX] Improve error diagnostic when handling unknown intrinsics (#191194)

Following up on #146726, it may be desirable to gracefully fail the
compilation in the presence of unknown NVVM intrinsics, which
cannot be lowered by the NVPTX backend, rather than silently
emitting invalid PTX.
DeltaFile
+15-10llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+12-0llvm/test/CodeGen/NVPTX/unknown-intrinsic.ll
+9-0llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+36-103 files

LLVM/project 4ab33dcllvm/test/CodeGen/RISCV/rvv vselect-vp.ll fixed-vectors-vmacc-vp.ll

[RISCV] Remove codegen for vp_select (#194199)

Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999

This splits off vp.select from #179622
DeltaFile
+94-199llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll
+123-162llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
+123-162llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
+96-129llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll
+52-52llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
+52-52llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
+540-75613 files not shown
+872-1,09919 files

LLVM/project 4d2d6a0llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch vector-fp-imm.ll

[LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (#164943)

On 64-bit targets the generic legalize will use an i64 load and a
scalar_to_vector for us. But on 32-bit targets, i64 isn't legal, and the
generic legalizer will end up emitting two 32-bit loads. This patch uses
f64 to avoid the splitting entirely and the redundant int->fp
conversion.
DeltaFile
+26-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+8-18llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fpext.ll
+1-2llvm/test/CodeGen/LoongArch/vector-fp-imm.ll
+35-203 files

LLVM/project be68b10llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[MLIR][OpenMP] Post-translate declare-target USM indirection in OpenMPIRBuilder

When lowering OpenMP to LLVM IR for the target device, record pairs of the
`declare target` device global and the OMPIRBuilder "ref" pointer global
(used for unified shared memory) via `OpenMPIRBuilder`. During the
`OpenMPIRBuilder::finalize` pass, run a postpass that rewrites remaining uses of the
original global to load from the ref global and adjust the pointer (shared
path for `ConstantExpr` addrspace/bitcast chains and for direct
instruction uses).

This follows what is done by clang for similar cases:
https://reviews.llvm.org/D63108.

Co-authored-by: Composer
Co-authored-by: Gemini Pro
DeltaFile
+68-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+39-0offload/test/offloading/fortran/declare-target-usm-ref-ptr.f90
+24-0mlir/test/Target/LLVMIR/omptarget-declare-target-usm-ref-ptr.mlir
+20-0llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+11-3mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+162-35 files

LLVM/project 68e6968flang/lib/Optimizer/OpenMP MapInfoFinalization.cpp, flang/test/Transforms omp-map-info-finalization-usm.fir

[Flang][OpenMP] Clear close on descriptor members for box parents in USM

Extend the MapInfoFinalization walk introduced in #185330 so
parent/member close consistency is enforced whenever
unified_shared_memory is in effect, not only when the parent map's
variable is a fir.RecordType. Allocatable (box) roots expand to member
maps the same way as derived-type instances; getDescriptorMapType may
add OMP_MAP_CLOSE to implicit descriptor members while the parent map
does not set close, which led to bad device behavior under
-fopenmp-force-usm with multiple mapped allocatables.

Co-authored-by: Composer (Cursor) <ai at cursor.com>
DeltaFile
+49-0offload/test/offloading/fortran/usm-box-parent-descriptor-close.f90
+12-12flang/test/Transforms/omp-map-info-finalization-usm.fir
+6-12flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
+67-243 files

LLVM/project 1f9c611llvm/test/Transforms/LoopFusion triple_loop_nest_inner_guard.ll double_loop_nest_inner_guard.ll

[LoopFusion][NFC] UTC gen some tests (#193755)

Some variables need rename as UTC normalizes IR value names. Also,
remove dead variable `%M` and `%N` from
`double_loop_nest_inner_guard.ll`
DeltaFile
+68-51llvm/test/Transforms/LoopFusion/triple_loop_nest_inner_guard.ll
+50-37llvm/test/Transforms/LoopFusion/double_loop_nest_inner_guard.ll
+118-882 files

LLVM/project f115551llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[MLIR][OpenMP] Post-translate declare-target USM indirection in OpenMPIRBuilder

When lowering OpenMP to LLVM IR for the target device, record pairs of the
`declare target` device global and the OMPIRBuilder "ref" pointer global
(used for unified shared memory) via `OpenMPIRBuilder`. During the
`OpenMPIRBuilder::finalize` pass, run a postpass that rewrites remaining uses of the
original global to load from the ref global and adjust the pointer (shared
path for `ConstantExpr` addrspace/bitcast chains and for direct
instruction uses).

This follows what is done by clang for similar cases:
https://reviews.llvm.org/D63108.

Co-authored-by: Composer
Co-authored-by: Gemini Pro
DeltaFile
+68-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+39-0offload/test/offloading/fortran/declare-target-usm-ref-ptr.f90
+24-0mlir/test/Target/LLVMIR/omptarget-declare-target-usm-ref-ptr.mlir
+20-0llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+11-3mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+162-35 files

LLVM/project 504930bllvm/test/CodeGen/X86 machine-block-hash.mir

[X86] Remove update_mir_test_checks.py NOTE (#194278)

The test checks printer output, not MIR.
It was probably copy-pasted in #193107 from other test.
DeltaFile
+0-1llvm/test/CodeGen/X86/machine-block-hash.mir
+0-11 files

LLVM/project 5c77411flang/lib/Optimizer/OpenMP MapInfoFinalization.cpp, flang/test/Transforms omp-map-info-finalization-usm.fir

[Flang][OpenMP] Clear close on descriptor members for box parents in USM

Extend the MapInfoFinalization walk introduced in #185330 so
parent/member close consistency is enforced whenever
unified_shared_memory is in effect, not only when the parent map's
variable is a fir.RecordType. Allocatable (box) roots expand to member
maps the same way as derived-type instances; getDescriptorMapType may
add OMP_MAP_CLOSE to implicit descriptor members while the parent map
does not set close, which led to bad device behavior under
-fopenmp-force-usm with multiple mapped allocatables.

Co-authored-by: Composer (Cursor) <ai at cursor.com>
DeltaFile
+49-0offload/test/offloading/fortran/usm-box-parent-descriptor-close.f90
+12-12flang/test/Transforms/omp-map-info-finalization-usm.fir
+6-12flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
+67-243 files

LLVM/project 2a09db4llvm/lib/Target/AMDGPU SIWholeQuadMode.cpp, llvm/test/CodeGen/AMDGPU wqm-propagate-for-execz-side-effect.mir

AMDGPU: Back-propagate wqm for sources of side-effect instruction (#193395)

For readfirstlane instruction, as it would get undefined value if exec
is zero. To handle the case that only helper lanes execute the parent
block, we let the readfirstlane to execute under wqm. But this is not
enough. If the parent block was also executed by non-helper lanes, we
also need to make sure its sources were calculated under wqm. Otherwise,
if the instruction that generate the source of readfirstlane was
executed under exact mode, the value would contain garbage data in help
lane. The garbage data in helper lane maybe returned by the
readfirstlane running under wqm.

To fix this issue, we need to enforce the back-propagation of wqm for
instructions like readfirstlane. This was only done if the instruction
was possibly in the middle of wqm region (by checking OutNeeds).
DeltaFile
+35-4llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
+1-1llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
+36-52 files

LLVM/project 4bf5bcbllvm/unittests/ADT StableHashingTest.cpp CMakeLists.txt

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+44-0llvm/unittests/ADT/StableHashingTest.cpp
+1-0llvm/unittests/ADT/CMakeLists.txt
+45-02 files

LLVM/project 75f6489llvm/test/CodeGen/RISCV/rvv fixed-vectors-vmacc-vp.ll fixed-vectors-vnmsac-vp.ll

rebase

Created using spr 1.3.7
DeltaFile
+438-234llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
+438-234llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
+241-326llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
+201-265llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
+175-179llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
+141-166llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
+1,634-1,40428 files not shown
+2,855-2,13734 files

LLVM/project 9cbf724llvm/lib/TargetParser TargetDataLayout.cpp

clang-format

Created using spr 1.3.8-beta.1
DeltaFile
+2-1llvm/lib/TargetParser/TargetDataLayout.cpp
+2-11 files