[OpenMP] Restore loop variable values after loop-tranformation constructs. (#208533)
This patch fixes loop variable finalization for OpenMP 6.0
loop-transformations constructs: `tile`, `stripe`, `reverse`,
`interchange` and `fuse` to comply with spec requirement page 371, lines
19-21. The spec requires that "After the execution of the
loop-transforming construct, the loop-iteration variables of any of its
transformation-affected loops have the values that they would have
without the loop-transforming directive".
[AMDGPU] Improve MemorySSA walking in isClobberedInFunction (#211817)
Consistently call the two argument overload
`MemorySSAWalker::getClobberingMemoryAccess(MemoryAccess,
MemoryLocation)` to get a clobbering def (according to the AliasAnalysis
used by MSSA) before applying the special cases in `isReallyAClobber`.
This has the effect of marking more loads as `amdgpu-noclobber` and
selecting SMEM load instructions for them.
Fixes: ROCM-28492
[clang-format] Add Natural option for SortIncludes (#210788)
`SortIncludes` currently orders includes lexicographically with the
option to ignore case or extension. This adds another option, `Natural`,
that compares embedded runs of digits as numbers rather than sequences
of characters, matching the "natural sort" behaviour found in most file
managers and tools like `sort` when called with the `-V` option.
**Disclaimer**
AI assistance was used in initial exploration and review but the code is
"hand generated".
[AMDGPU] Retain subreg when legalising generic operand (#212636)
When building a `COPY` to legalise a generic operand whose register
class does not match what is expected, the subregister is not retained
in the copy, and is not dropped from the newly created virtual
destination register.
[AArch64] Remove GPR64arg register class (#212457)
GPR64arg was added in fcbec02ea6fb to describe X0-X7 for the reserved
argument-register check. It is an ABI register set rather than an
allocation constraint and should not be used for register allocation.
Given it has a single use that only cares about the number of registers,
a register class isn't necessary.
This exposes that GlobalISel recomputes the minimal register class when
a matching inline asm input is tied to a fixed physical-register output.
For X2 that class was GPR64arg, getRegistersForValue already asks the
target which class implements the output constraint. Retain that class
and reuse it for the matching input.
Assisted-by: codex
Reland [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (#212565)
1. reland the patch https://github.com/llvm/llvm-project/pull/204170
2. and fix the regression caused by above patch.
[Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (#208585)
fixes #208437
From LangRef for intrinsic convert_from_arbitrary_fp ,
"Normal finite values are converted exactly. NaN values follow LLVM’s
standard NaN rules; the NaN representation is preserved... and the NaN
payload may be truncated or extended..."
-> if src has Nan -> preserve nan
"If a value exceeds the representable range of the target type (for
example, converting Float8E8M0FNU with large exponents to half), the
result is converted to infinity with the appropriate sign."
[mlir][tosa] Extend cancelling block-scaled cast optimisation to bf16 (#212517)
The CancellingBlockScaledCastsOptimization optimises away sequences
where a block-scaled tensor is cast to fp32 and then cast back to its
original block-scaled type.
This patch extends it to also cover cases where the intermediate type is
bf16, since the 7 bits of mantissa and 8 bits in the exponent are
sufficient to encode any `element * scale` product with valid
block-scaled type combinations.
---------
Signed-off-by: Ian Tayler Lessa <ian.taylerlessa at arm.com>
[flang] Drop nuw on XArrayCoor for non-positive slice steps (#212639)
Example:
```fortran
z(:, 3:2:-1) = z(:, 1:2)
```
In this code, reverse-section indexing lowers `idx*step` / `diff+adj`
with `nuw`. A negative step can make the product negative, so `nuw` is
invalid and LLVM `-O2` can drop the stores.
Fix: keep `nsw|nuw` only for known positive steps; otherwise keep `nsw`
and drop `nuw` (negative, zero, or unknown).
[mlir][affine] Add useExpensiveMath option to AffineLoopNormalize pass (#211989)
This PR integrates constant bound inference into the existing
`AffineLoopNormalize` pass under a new `useExpensiveMath` option. When
`useExpensiveMath` is enabled (disabled by default due to potential
compilation time overhead), the pass leverages
`ValueBoundsConstraintSet` (uss presburger) analysis to refine dynamic
`affine.for` loop bounds into compile-time constant bounds. RFC:
https://discourse.llvm.org/t/rfc-mlir-enable-dynamic-and-tighter-affine-unrolling-via-valueboundsconstraintset/91055/2
---------
Co-authored-by: Oleksandr "Alex" Zinenko <azinenko at amd.com>
[CopyProf] Add CopyProf instrumentation passes. (#207385)
This patch introduces the instrumentation passes and corresponding tests
for CopyProf, a profiling tool designed to identify unnecessary object
copies in C++ applications.
RFC at
https://discourse.llvm.org/t/rfc-copysanitizer-csan-detecting-unneccessary-object-copies-at-runtime/91038.
Three passes are added:
- CopyProfPass inserts enter/exit callback around special member
functions.
- CopyPRofStoresPass instruments store instructions to track memory
modifications.
- ModuleCopyProfPass inserts a module constructor to initialize the
CopyProf runtime at program startup (will be added later).
[OpenMP] Split UPDATE clause into two: for ATOMIC and for DEPOBJ (#212270)
The UPDATE clause has the same spelling on both of these directives, but
functionally it's two different clauses. Split them into "update", and
"update_depend_objects" to be able to tie their properties to their enum
ids.
This should make it easier to implement auto-generating of clause
properties in the future by avoiding spelling conflicts.
---------
Co-authored-by: Alexey Bataev <a.bataev at outlook.com>
[CodeGen][ARM] Add regression tests for #202263 (#202599)
The underlying issue—RegisterCoalescer eliminating an undef COPY and
leaving a partial subregister redef that reads a value that no longer
exists—was fixed in #204039.
This PR adds the regression coverage originally developed alongside the
fix attempt, so the pattern remains covered:
- an end-to-end IR test that checks the generated assembly with
FileCheck;
- a focused single-pass `-run-pass=register-coalescer` MIR test using
`-verify-coalescing`, which reproduces the "Instruction is reading
nonexistent value" verifier error from #202263 when #204039 is reverted,
and passes with the fix applied.
Fixes #202263
[analyzer] Prune infeasible states related to concrete ints early to fix a crash (#210912)
RangedConstraintManager discards a simplified symbol if it reduces to a
concrete integer. This leads to delayed realization that some state
might be infeasible (because the concrete integer does not fit in the
assumed range), which might produce unexpected null pointers on the
following state splits.
PthreadLockChecker has fallen just into this trap. It assumes
`pthread_mutex_lock` is always called in a feasible state, which is was
not true.
In particular, in ZFS the analyzer crashes when runs in CTU mode because
it reaches `pthread_mutex_lock()` in over-constraint state (see the
reduced example in the first commit).
Checkers rely on the invariant that a state split can never result in
both `StateRef`s being null. To fix this violation of the invariant,
this patch helps RangedConstraintManager to realize a state is
infeasible and abort its exploration early so no follow-up state split
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[Docs][AMDGPU] Explain completion of async operations
This improves the somewhat hand-wavey "memory model" currently described for
async operations. While this version is also not complete, it prepares for the
more complete memory model being written down.
[MIPS][clang] make `_Complex` ABI match GCC (#212119)
fixes https://github.com/llvm/llvm-project/issues/212109
From the edits to the release notes:
- On MIPS, a `_Complex` value with an integer element type is now
returned packed
into a single integer register when it fits in one, matching GCC. A
`_Complex char` or
`_Complex short`, and on N32/N64 also a `_Complex int`, is no longer
returned
with one part per register. `-fclang-abi-compat=23` restores the
previous
behavior. (#GH212109)
- On MIPS N32/N64, a `_Complex float` or `_Complex double` argument is
now packed
into integer registers, or onto the stack, once there is no longer room
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[AArch64] NFC: simplify isCopyInstrImpl expression (#212487)
To something more intuitive by applying the following logic:
* `!isVirtual()` -> `isPhysical()`
* `!isPhysical()` -> `isVirtual()`
* `(a || b) && (!a || c)` -> `(!a && b) || (a && c)`
[libc++][NFC] Clean up atomic_support.h (#212464)
We don't support any compilers which don't have the atomic builtins, so
we don't need to check whether they exist. There is also no need for an
anonymous namespace, since all the functions are inline.
[mlir][toy] Fix Ch6/Ch7 llvm-lowering tests (#212118)
Add missing `| FileCheck %s` to `RUN` lines so `CHECK` lines can be
verified. Also correct the expected result from `30` to `36`. The result
should be `6*6=36`.
The example in the tutorial is correct (`3.600000e+01`).
https://mlir.llvm.org/docs/Tutorials/Toy/Ch-6/
Signed-off-by: Felix Ye <felixyjs at gmail.com>
