LLVM/project afb5a58llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 6b0f475llvm/test/MC/AMDGPU gfx11_asm_vopc.s gfx11_asm_vop3_from_vopc.s, llvm/test/MC/Disassembler/AMDGPU gfx12_dasm_vop3_dpp16.txt gfx12_dasm_vop3.txt

[AMDGPU] Regenerate all MC checks after #164424 (#175156)

Includes one manual fix to add -filetype=null to a RUN line in
test/MC/AMDGPU/gfx1250_asm_sop1.s. Everything else is autogenerated.
DeltaFile
+1,768-1,768llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_dpp16.txt
+1,530-1,530llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
+1,502-1,502llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3.txt
+1,343-1,343llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
+1,290-1,290llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3.txt
+1,276-1,276llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
+8,709-8,709110 files not shown
+39,664-39,664116 files

LLVM/project 5deefd0flang/lib/Lower/Support ReductionProcessor.cpp, flang/lib/Optimizer/OpenMP FunctionFiltering.cpp

[OpenMP][flang] Move `todo` for checking reduction support status on the GPU

Moves a `todo` to check for the current level of support for by-ref
reductions to the `FunctionFiltering` pass. This guarantees that the
check does not trigger when the same module is compiled twice: on the
CPU and on the GPU.
DeltaFile
+24-0flang/lib/Optimizer/OpenMP/FunctionFiltering.cpp
+0-20flang/lib/Lower/Support/ReductionProcessor.cpp
+24-202 files

LLVM/project 7f5dbbcllvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs amdgpu_asm.s.expected amdgpu_asm.s, llvm/utils update_mc_test_checks.py

[Utils][update_mc_test_checks] Handle double quotes in asm source (#175161)

DeltaFile
+3-0llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s.expected
+2-0llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s
+1-0llvm/utils/update_mc_test_checks.py
+6-03 files

LLVM/project 4db9be8llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 6a5c894mlir/lib/Analysis SliceWalk.cpp

[mlir][Analysis][NFC] Improve `RegionBranchOpInterface` API usage (#173983)

Remove a helper function and query the `RegionBranchOpInterface`
instead. (Which does the same thing.) Also add a TODO for a bug in the
implementation of `SliceWalk.cpp`. (The bug is not fixed yet.)
DeltaFile
+10-50mlir/lib/Analysis/SliceWalk.cpp
+10-501 files

LLVM/project 9c5ae9allvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 7eae17eclang/include/clang/Parse Parser.h, clang/lib/Parse ParseDecl.cpp

[clang] Fix string literal parsing on some attributes (#171017)

At the time ParseAttributeArgumentList is called, the first argument
of an attribute may have already been parsed. We need to take this into
account when accessing ParsedAttributeArgumentsProperties mask, which
specifies which of the attribute arguments are string literals.

Pull Request: https://github.com/llvm/llvm-project/pull/171017
DeltaFile
+8-4clang/include/clang/Parse/Parser.h
+3-3clang/lib/Parse/ParseDecl.cpp
+3-0clang/test/Sema/attr-modular-format.c
+14-73 files

LLVM/project 82353b5llvm/lib/CodeGen ReachingDefAnalysis.cpp

[CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (#175074)

Reorder some code to make it less confusing.
DeltaFile
+5-5llvm/lib/CodeGen/ReachingDefAnalysis.cpp
+5-51 files

LLVM/project 19425b3mlir/lib/Analysis SliceWalk.cpp

[mlir][Analysis] Improve `RegionBranchOpInterface` API usage
DeltaFile
+10-50mlir/lib/Analysis/SliceWalk.cpp
+10-501 files

LLVM/project f4a089allvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 4772815clang/include/clang/AST TypeBase.h

[NFC][clang] Fix a typo in Typebase.h (#175163)

This was introduced since 7c402b8b81
DeltaFile
+2-2clang/include/clang/AST/TypeBase.h
+2-21 files

LLVM/project 75fefa3mlir/lib/Dialect/Quant/IR QuantOps.cpp, mlir/test/Dialect/Quant inlining.mlir

[MLIR][Quant] Add DialectInlinerInterface to QuantDialect (#172509)

Signed-off-by: Jonas Rickert <jonas.rickert at amd.com>
DeltaFile
+47-0mlir/test/Dialect/Quant/inlining.mlir
+10-0mlir/lib/Dialect/Quant/IR/QuantOps.cpp
+57-02 files

LLVM/project 8a922e8flang-rt/lib/runtime extensions.cpp

[flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (#174915)

When building the flang-rt project with the g++ compiler on Linux-X86_64
machine, the compiler gives the following warning:

```
llvm-project/flang-rt/lib/runtime/extensions.cpp:455:26: warning: left shift count is negative [-Wshift-count-negative]
   455 |     mask = ~(unsigned)0u << ((8 - digits) * 4 + 1);
       |            ~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~

```

All the discussion records see:
https://github.com/llvm/llvm-project/pull/173955

Co-authored-by: liao jun <liaojun at ultrarisc.com>
DeltaFile
+1-3flang-rt/lib/runtime/extensions.cpp
+1-31 files

LLVM/project 00840dfllvm/include/llvm/Transforms/Scalar NaryReassociate.h, llvm/lib/Transforms/Scalar NaryReassociate.cpp

teach nary about uniformity
DeltaFile
+222-0llvm/test/Transforms/NaryReassociate/AMDGPU/nary-add-uniform.ll
+117-26llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+3-1llvm/include/llvm/Transforms/Scalar/NaryReassociate.h
+342-273 files

LLVM/project 1eeecc7llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 687eb2cllvm/lib/Transforms/Instrumentation AllocToken.cpp

[AllocToken] Fix attribute mismatch in AllocTokenPass (#174959)

Fixes an attribute mismatch error in `AllocTokenPass` that occurs during
ThinLTO builds at OptimizationLevel::O0.

The `getTokenAllocFunction` in `AllocTokenPass` was incorrectly copying
attributes from the instrumented function (`Callee`) to an *existing*
`void()` alloc-token function retrieved by `Mod.getOrInsertFunction`.
This resulted in arg attributes being added to a function with no
parameters, causing `VerifyPass` to fail with "Attribute after last
parameter!".

The fix modifies `getTokenAllocFunction` to pass the `Callee`'s
attributes directly to the `Mod.getOrInsertFunction` overload. This
ensures attributes are only applied when the alloc-token function is
*newly inserted*, preventing unintended attribute modifications on
already existing function declarations.

See https://g-issues.chromium.org/issues/474289092 for detailed

    [2 lines not shown]
DeltaFile
+3-3llvm/lib/Transforms/Instrumentation/AllocToken.cpp
+3-31 files

LLVM/project 95dabd4llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 6cdcce5mlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/test/Dialect/LLVMIR nvvm-target-invalid.mlir

[MLIR][NVVM] Fix crash on invalid optimization level in NVVMTargetAttr (#173280)

Update `NVVMTargetAttr` builder in `NVVMOps.td` to use `$_get` instead
of `Base::get`.

Now the auto-generated parser calls `getChecked`, allowing graceful
error handling for invalid parameters (e.g., `O=4`) instead of crashing
with an assertion failure.

Add a regression test in
`mlir/test/Dialect/LLVMIR/nvvm-target-invalid.mlir`.

Fixes: https://github.com/llvm/llvm-project/issues/130014
DeltaFile
+15-7mlir/test/Dialect/LLVMIR/nvvm-target-invalid.mlir
+1-1mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+16-82 files

LLVM/project 8b0e951llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 9cad651mlir/include/mlir/Dialect/SCF/IR SCFOps.td, mlir/lib/Dialect/SCF/IR SCF.cpp

Implement RegionBranchTerminatorOpInterface for scf.forall.in_parallel
DeltaFile
+18-12mlir/lib/Dialect/SCF/IR/SCF.cpp
+1-7mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
+19-192 files

LLVM/project 6395afaflang/lib/Semantics resolve-names.cpp

[flang] Fix homonymous interface and procedure warning (#171696)

When emitting an homonymous generic interface and procedure warning,
the source locations of the interface and the procedure were being
compared to find the one that occurred later in the source file.

The problem is that they could be in different source/module files,
which makes the comparison invalid.

Fix it by using parser::AllCookedSources::Precedes() instead, that
correctly handle names in different source files.
DeltaFile
+3-2flang/lib/Semantics/resolve-names.cpp
+3-21 files

LLVM/project 30c88f7llvm/test/CodeGen/X86 commute-pclmul.ll commute-clmul.ll

[X86] Rename commute-clmul.ll -> commute-pclmul.ll (#175157)

Avoid confusion with upcoming generic clmul intrinsic handling
DeltaFile
+66-0llvm/test/CodeGen/X86/commute-pclmul.ll
+0-66llvm/test/CodeGen/X86/commute-clmul.ll
+66-662 files

LLVM/project f14c7c1mlir/include/mlir/Dialect/SCF/IR SCFOps.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir][SCF] Remove `RegionBranchOpInterface` from `scf.forall`
DeltaFile
+0-16mlir/lib/Dialect/SCF/IR/SCF.cpp
+1-1mlir/test/Analysis/DataFlow/test-liveness-analysis.mlir
+0-1mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
+1-183 files

LLVM/project 7787a1dmlir/include/mlir/Interfaces ControlFlowInterfaces.td

[mlir][Interfaces] Document that `RegionBranchTerminatorOpInterface` is mandatory
DeltaFile
+20-3mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+20-31 files

LLVM/project b28eeb2llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen TargetLoweringBase.cpp

[CodeGen] Generalise Hexagon flags for memop inline thresholds (#172829)

Generalise the Hexagon cmdline options to control if memset, memcpy or memmove intrinsics should be inlined versus calling library functions, so they can be used by all backends:

        •       -max-store-memset
        •       -max-store-memcpy
        •       -max-store-memmove

These flags override the target-specific defaults set in TargetLowering (e.g., MaxStoresPerMemcpy) and allow fine-tuning of the inlining threshold for performance analysis and optimization.

The optsize variants (-max-store-memset-Os, -max-store-memcpy-Os, max-store-memmove-Os) from the Hexagon backend were removed, and now the above options control both.

The threshold is specified as a number of store operations, which is backend-specific. Operations requiring more stores than the threshold will call the corresponding library function instead of being inlined.
DeltaFile
+501-0llvm/test/CodeGen/AArch64/max-stores-per-mem-ops.ll
+39-0llvm/lib/CodeGen/TargetLoweringBase.cpp
+6-31llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+3-9llvm/include/llvm/CodeGen/TargetLowering.h
+549-404 files

LLVM/project 781677ecompiler-rt/test/orc/TestCases/Linux/ppc64 trivial-tls.S trivial-cxa-atexit.S

[PPC] Disable some ORC-powerpc64le-linux tests. (#175100)

Tests fail to link when using LLVM C++ library. Disabling the tests
until they can be investigated and the underlying cause identified and
fixed.
DeltaFile
+4-1compiler-rt/test/orc/TestCases/Linux/ppc64/trivial-tls.S
+4-1compiler-rt/test/orc/TestCases/Linux/ppc64/trivial-cxa-atexit.S
+4-0compiler-rt/test/orc/TestCases/Linux/ppc64/trivial-static-initializer.S
+3-0compiler-rt/test/orc/TestCases/Linux/ppc64/lljit-initialize-deinitialize.ll
+3-0compiler-rt/test/orc/TestCases/Linux/ppc64/ehframe-default.cpp
+3-0compiler-rt/test/orc/TestCases/Linux/ppc64/lljit-ehframe.cpp
+21-22 files not shown
+27-28 files

LLVM/project 804aa88mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp, mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

[MLIR][OpenMP] Support cancel taskgroup inside of taskloop (#174815)

Implementation follows exactly what is done for omp.wsloop and omp.task.
See #137841.

The change to the operation verifier is to allow a taskgroup
cancellation point inside of a taskloop. This was already allowed for
omp.cancel.
DeltaFile
+419-0mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
+280-0mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
+12-20mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+2-1mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+713-214 files

LLVM/project 7289e06llvm/lib/Target/X86 X86InstCombineIntrinsic.cpp, llvm/test/Transforms/InstCombine/X86 x86-maxmin.ll

[X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (#174806)

Fixes #173270

For x86 SSE/AVX floating point MAX/MIN intrinsics, attempt to generalize
them down into `Intrinsic::maxnum` and `Intrinsic::minnum` given that we
can verify that the inputs are either (PosNormal, NegNormal, PosZero).
This PR uses the `llvm::computeKnownFPClass` to generate the FPClass
bitset to verify if the inputs are of the other FP types (NaN, Inf,
Subnormal, NegZero).
DeltaFile
+187-0llvm/test/Transforms/InstCombine/X86/x86-maxmin.ll
+49-0llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
+236-02 files

LLVM/project 5ae7bffllvm/test/tools/llvm-exegesis/AArch64 setReg_init_check.s

[llvm-exegesis] Fix intermittent failure in setReg_init_check.s (#175148)

Test is failing intermittently after #174944. The issue this time is the
`WSeqPair`/`XSeqPair` tests fail if the same pair is used as there's
fewer MOVs.

The test was expecting:
```
  0000000000000000 <foo>:
         0: f81e0ffb      str     x27, [sp, #-0x20]!
         4: a90163fa      stp     x26, x24, [sp, #0x10]
         8: d2800006      mov     x6, #0x0                // =0
         c: d2800007      mov     x7, #0x0                // =0
        10: d280001a      mov     x26, #0x0               // =0
        14: d280001b      mov     x27, #0x0               // =0
        18: d2800018      mov     x24, #0x0               // =0
        1c: 48267f1a      casp    x6, x7, x26, x27, [x24]
```
but this can occur:

    [8 lines not shown]
DeltaFile
+0-4llvm/test/tools/llvm-exegesis/AArch64/setReg_init_check.s
+0-41 files