LLVM/project 2519f59llvm/lib/Target/SPIRV SPIRVStructurizer.cpp

[NFC][SPIR-V] Fuse redundant full-traversal loops in SPIRVStructurizer (#215491)

Split out of #211299 per review. getHeaderBlocks, getMergeBlocks and
getContinueBlocks each did their own full scan of F even though they
classify the same instructions; merge them into a single
getHeaderMergeContinueBlocks scan.
DeltaFile
+35-45llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
+35-451 files

LLVM/project 7036500llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AArch64 fshr.ll arith.ll

[AArch64] Fix cost of vector shifts with non-uniform constant amounts (#214206)

Non-uniform constants use variable shifts and require materializing the
shift vector. Account for a shift and materialization per legalized vector.
DeltaFile
+54-54llvm/test/Analysis/CostModel/AArch64/div.ll
+36-36llvm/test/Analysis/CostModel/AArch64/rem.ll
+31-0llvm/test/Analysis/CostModel/AArch64/arith.ll
+17-3llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+8-8llvm/test/Analysis/CostModel/AArch64/fshr.ll
+10-6llvm/test/Transforms/SLPVectorizer/AArch64/unique_values.ll
+156-1072 files not shown
+172-1208 files

LLVM/project 870e689lldb/packages/Python/lldbsuite/test configuration.py dotest_args.py, lldb/test/API lldbtest.py

[lldb][Windows] Dump thread stacks before lit's timeout kills a test (#213239)

On Windows, when a test hits a timeout, we currently don't get a
stacktrace. dotest solves this on POSIX: it registers a SIGTERM handler,
so a killed test prints its stack. The handler does not run on Windows
however because `faulthandler.register` doesn't exist there, and lit
terminates the process instead of signalling it (no signals on Windows).

This patch adds `faulthandler.dump_traceback_later()` with a default
timeout value of 300s. That's longer than the longest test in CI (~150s)
and does not kill the test. It simply dumps the stacktrace at a point
where the test is very likely stuck.

# Before

```
TIMEOUT: lldb-api :: types/TestFloatTypesExpr.py (2698 of 2698)
******************** TEST 'lldb-api :: types/TestFloatTypesExpr.py' FAILED ********************
Exit Code: 15

    [15 lines not shown]
DeltaFile
+13-0lldb/packages/Python/lldbsuite/test/dotest.py
+8-0lldb/packages/Python/lldbsuite/test/dotest_args.py
+4-0lldb/packages/Python/lldbsuite/test/configuration.py
+3-0lldb/test/API/lldbtest.py
+28-04 files

LLVM/project 1109d68llvm/test/CodeGen/AMDGPU flat-saddr-atomics.ll llvm.amdgcn.wmma.imm.gfx1250.w32.ll

[AMDGPU] Use another sequence for initial unclaused vmem (#215450)
DeltaFile
+500-250llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
+464-232llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+392-196llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
+366-183llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+348-174llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
+332-166llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+2,402-1,201205 files not shown
+12,910-6,461211 files

LLVM/project e6e359dllvm/include/llvm/Transforms/Vectorize LoopVectorizationLegality.h, llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPRecipeBuilder.h

Fixups
DeltaFile
+112-118llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+47-32llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+18-8llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+13-3llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
+5-0llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
+4-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+199-1616 files

LLVM/project ab2c034llvm/test/Transforms/LoopVectorize compress-idioms.ll

Test uncond increment
DeltaFile
+96-2llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+96-21 files

LLVM/project 09f1255llvm/test/Transforms/LoopVectorize compress-store-vec-epilogue.ll compress-idioms.ll

Rebase fixups
DeltaFile
+8-8llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+3-3llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
+11-112 files

LLVM/project da568abllvm/lib/Transforms/Vectorize VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize compress-idioms-negative-tests.ll compress-idioms.ll

Move negative tests to new file
DeltaFile
+0-105llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+94-0llvm/test/Transforms/LoopVectorize/compress-idioms-negative-tests.ll
+0-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+94-1063 files

LLVM/project b0bfcb5llvm/lib/Transforms/Vectorize VPlanConstruction.cpp VPlan.h

Don't allow null phi
DeltaFile
+4-6llvm/lib/Transforms/Vectorize/VPlan.h
+1-1llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+5-72 files

LLVM/project 70e348allvm/lib/Transforms/Vectorize VPlan.h VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize compress-idioms.ll

[LoopVectorize] Support vectorization of compressing patterns in VPlan

RFC link: https://discourse.llvm.org/t/rfc-loop-vectorization-of-compress-store-expand-load-patterns/86442

This adds loop vectorizer support for "compressing" patterns,
for example:

```
int dst_idx = 0;
for (int i = 0; i < n; i++) {
  if (cond[i])
    dst[dst_idx++] = src[i];
}
```

Can be vectorized with a `llvm.masked.compressstore` as:

```
int dst_idx = 0;

    [52 lines not shown]
DeltaFile
+424-0llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+157-0llvm/test/Transforms/LoopVectorize/VPlan/compress-idioms.ll
+132-0llvm/test/Transforms/LoopVectorize/AArch64/compress-idioms.ll
+111-14llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+70-4llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+60-4llvm/lib/Transforms/Vectorize/VPlan.h
+954-2213 files not shown
+1,096-2719 files

LLVM/project 79e0dfcllvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlan.h, llvm/test/Transforms/LoopVectorize compress-store-vec-epilogue.ll

Fix epilogue resume handling
DeltaFile
+98-0llvm/test/Transforms/LoopVectorize/compress-store-vec-epilogue.ll
+5-5llvm/lib/Transforms/Vectorize/VPlan.h
+2-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+105-63 files

LLVM/project 42c7647llvm/include/llvm/Analysis IVDescriptors.h, llvm/lib/Analysis IVDescriptors.cpp

Fixups
DeltaFile
+29-16llvm/lib/Analysis/IVDescriptors.cpp
+6-0llvm/include/llvm/Analysis/IVDescriptors.h
+35-162 files

LLVM/project 69a4d9dllvm/include/llvm/Analysis IVDescriptors.h, llvm/lib/Analysis IVDescriptors.cpp

Fixups
DeltaFile
+5-4llvm/include/llvm/Analysis/IVDescriptors.h
+2-1llvm/lib/Analysis/IVDescriptors.cpp
+7-52 files

LLVM/project efde37ellvm/lib/Analysis IVDescriptors.cpp

remove ;
DeltaFile
+1-1llvm/lib/Analysis/IVDescriptors.cpp
+1-11 files

LLVM/project 35d96f8llvm/include/llvm/Analysis IVDescriptors.h

Add docs
DeltaFile
+27-4llvm/include/llvm/Analysis/IVDescriptors.h
+27-41 files

LLVM/project e9b20a7llvm/include/llvm/Analysis IVDescriptors.h, llvm/lib/Analysis IVDescriptors.cpp

[IVDescriptors] Implement MonotonicDescriptor

RFC link: https://discourse.llvm.org/t/rfc-loop-vectorization-of-compress-store-expand-load-patterns/86442

"Monotonic" variable is similar to induction variable, but its value is updated under some condition, e.g.:
```
int idx = 0;
for(int i = 0; i < n; ++i) {
  // some uses of idx
  if (cond)
    ++idx;
}
```
In this example, `i` is induction variable and `idx` is monotonic variable: it's updated only when cond == true. In LLVM IR, this looks like:
```
loop_header:
  %monotonic_phi = [%start, %prehader], [ %chain_phi0, %latch]

step_bb:

    [26 lines not shown]
DeltaFile
+153-0llvm/unittests/Analysis/IVDescriptorsTest.cpp
+121-0llvm/lib/Analysis/IVDescriptors.cpp
+39-0llvm/include/llvm/Analysis/IVDescriptors.h
+313-03 files

LLVM/project 23a601dclang/lib/CodeGen BackendUtil.cpp, clang/test/CodeGen kcfi-hexagon.c

[clang][KCFI] Skip the KCFIPass on Hexagon (#211716)

Hexagon implements KCFI operand-bundle lowering in the back end
HexagonTargetLowering::EmitKCFICheck emits a KCFI_CHECK pseudo, which
HexagonAsmPrinter::LowerKCFI_CHECK expands into a type-hash check and a
trap - like PS_crash.

Hexagon was never added to the list in addKCFIPass() of targets whose
back end lowers the bundles, so Clang kept running the middle-end
KCFIPass for it.

Add Hexagon to the addKCFIPass() early-return so the "kcfi" bundles
reach the back end, which then emits the trapping load that actually
blocks the call.
DeltaFile
+14-0clang/test/CodeGen/kcfi-hexagon.c
+2-1clang/lib/CodeGen/BackendUtil.cpp
+16-12 files

LLVM/project 3e7c8b9llvm/test/Transforms/SLPVectorizer/X86 reduction-ordered-fadd.ll reduction-fadd-reassoc.ll

[SLP][NFC]Add tests for fptrunc-fpext-based reductions, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/215534
DeltaFile
+332-0llvm/test/Transforms/SLPVectorizer/X86/reduction-fadd-reassoc.ll
+243-0llvm/test/Transforms/SLPVectorizer/X86/reduction-ordered-fadd.ll
+575-02 files

LLVM/project 87644e2clang/lib/AST/ByteCode Compiler.cpp Compiler.h, clang/test/AST/ByteCode records.cpp

[clang][bytecode] Fix initializing bases via DefaultInitExpr (#215499)

We can't just ignore the base initializer here, we need to get the base
pointer and everything else should work just fine.
DeltaFile
+12-6clang/lib/AST/ByteCode/Compiler.h
+10-0clang/test/AST/ByteCode/records.cpp
+10-0clang/lib/AST/ByteCode/Compiler.cpp
+32-63 files

LLVM/project 4c6fa6cmlir/include/mlir/Dialect/Async Passes.td, mlir/include/mlir/Dialect/Linalg Passes.td

[MLIR] Remove redundant dialect dependencies (#213022)

Conservatively remove redundant self-dependencies from transform passes
in Affine, ArmSME, Async, Bufferization, EmitC, GPU, Linalg, Math,
OpenACC, OpenMP, Shard, SparseTensor, Tensor, TOSA, Quant, and XeGPU.
Each affected pass either matches existing entities from its own dialect
or requires values, types, attributes, interfaces, or enclosing
operations that already ensure the dialect is loaded.

For `FormExpressionsPass`, the TableGen dependency is kept and the
duplicate C++ registration is removed. `Partition` no longer redundantly
inserts `ShardDialect` neither from TableGen or its C++
`getDependentDialects()` override.

## Motivation
A dialect is already loaded when the input IR contains registered
operations, types, or attributes from that dialect. Therefore, passes
that match such existing IR do not need to list their own dialect in
`dependentDialects`.

    [12 lines not shown]
DeltaFile
+7-19mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
+8-9mlir/include/mlir/Dialect/XeGPU/Transforms/Passes.td
+7-7mlir/include/mlir/Dialect/MemRef/Transforms/Passes.td
+1-10mlir/include/mlir/Dialect/Shard/Transforms/Passes.td
+4-7mlir/include/mlir/Dialect/Linalg/Passes.td
+2-8mlir/include/mlir/Dialect/Async/Passes.td
+29-6013 files not shown
+40-9719 files

LLVM/project 748d575mlir/include/mlir/Dialect/MemRef/IR MemRefOps.td

[MemRef] Document `reinterpret_cast` verifiers (#214505)

Make the loose semantics assumed by `memref.reinterpret_cast` explicit
via documentation.
DeltaFile
+6-0mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
+6-01 files

LLVM/project 1a51bb2flang/test/Integration/PowerPC ppc-vec-convert.f90 ppc-vec-shift-be-le.f90, flang/test/Lower/PowerPC ppc-vec-convert.f90 ppc-vec-shift-be-le.f90

[Flang] Move integration Lit tests to the right directory, NFC

Flang unit tests that involve multiple stages of the compiler are
intended to be placed in flang/test/Integration. However, many existing
unit tests meeting this condition are currently located in the Lower
subdirectory.

This patch moves all tests in Lower that emit LLVM IR from Fortran or
run the FIR MLIR lowering pipeline via `tco` to Integration, and adds the
corresponding notice at the top of each file.

Assisted-by: Claude Opus 4.8.
DeltaFile
+1,709-0flang/test/Integration/PowerPC/ppc-mma-outer-product-1.f90
+0-1,701flang/test/Lower/PowerPC/ppc-mma-outer-product-1.f90
+1,420-0flang/test/Integration/PowerPC/ppc-vec-shift-be-le.f90
+0-1,412flang/test/Lower/PowerPC/ppc-vec-shift-be-le.f90
+1,349-0flang/test/Integration/PowerPC/ppc-vec-convert.f90
+0-1,342flang/test/Lower/PowerPC/ppc-vec-convert.f90
+4,478-4,455138 files not shown
+17,677-17,107144 files

LLVM/project 0435777clang-tools-extra/docs/clang-tidy/checks/bugprone unused-return-value.md unhandled-self-assignment.md

[clang-tidy][docs] Rewrite bugprone check docs to Markdown [4/4]
DeltaFile
+216-214clang-tools-extra/docs/clang-tidy/checks/bugprone/tagged-union-member-count.md
+196-219clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.md
+155-165clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.md
+152-153clang-tools-extra/docs/clang-tidy/checks/bugprone/unsafe-functions.md
+81-83clang-tools-extra/docs/clang-tidy/checks/bugprone/unhandled-self-assignment.md
+55-56clang-tools-extra/docs/clang-tidy/checks/bugprone/unused-return-value.md
+855-89016 files not shown
+1,333-1,37422 files

LLVM/project 6722331bolt/lib/Target/RISCV RISCVMCPlusBuilder.cpp, bolt/test/runtime/RISCV basic-instrumentation.s

[BOLT][RISCV] Fix atomic-add operand order (#215493)

https://github.com/llvm/llvm-project/pull/162411 had changed AMO operand
order to rd, rs2 (value), rs1 (address).

same as https://github.com/llvm/llvm-project/pull/171580, the test are
different.
DeltaFile
+2-2bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
+3-0bolt/test/runtime/RISCV/basic-instrumentation.s
+5-22 files

LLVM/project a44befcclang/lib/StaticAnalyzer/Checkers LifetimeModeling.cpp, clang/test/Analysis dangling-ptr-deref.cpp

Include ReportedDeadRegions in printState.
DeltaFile
+17-9clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
+1-1clang/test/Analysis/dangling-ptr-deref.cpp
+18-102 files

LLVM/project c39c86ellvm/include/llvm/ExecutionEngine/Orc/RTBridge CallProxies.h Proxy.h, llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS CallProxySpecs.h ProxySpec.h

[ORC] Split RTBridge Proxy headers by operation family (NFC) (#215467)

Break the monolithic RTBridge/Proxy.h and RTBridge/SPS/ProxySpecs.h into
a core header plus per-family sibling headers, so a client pays only for
the proxy families it uses. In particular Proxy.h no longer pulls in
TargetProcessControlTypes.h -- that was needed only by the memory-access
alias set -- so consumers of the core Proxy class (e.g. clients that
define their own proxies) no longer depend on it transitively.

Layout:

* RTBridge/Proxy.h -- core only: ProxyBase, Proxy, proxyInit,
buildProxies.
* RTBridge/CallProxies.h, RTBridge/MemoryAccessProxies.h -- the named
proxy alias sets.
* RTBridge/SPS/ProxySpec.h -- the SPS ProxySpec template.
* RTBridge/SPS/CallProxySpecs.h, RTBridge/SPS/MemoryAccessProxySpecs.h
-- the SPS signatures, controller-interface names, and specs.
DeltaFile
+0-210llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS/ProxySpecs.h
+123-0llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS/MemoryAccessProxySpecs.h
+77-0llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS/ProxySpec.h
+4-59llvm/include/llvm/ExecutionEngine/Orc/RTBridge/Proxy.h
+58-0llvm/include/llvm/ExecutionEngine/Orc/RTBridge/SPS/CallProxySpecs.h
+57-0llvm/include/llvm/ExecutionEngine/Orc/RTBridge/CallProxies.h
+319-26910 files not shown
+381-27916 files

LLVM/project e252d0cllvm/test/Transforms/LoopVectorize/RISCV partial-reduce-dot-product-i64.ll

Format test

Created using spr 1.3.6-beta.1
DeltaFile
+5-5llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product-i64.ll
+5-51 files

LLVM/project 2eca7a2llvm/lib/CodeGen MachineScheduler.cpp, llvm/test/CodeGen/AArch64 misched-fusion-fmin-fmax-pre-ra.mir misched-fusion-fmin-fmax-post-ra.mir

[MISched] Dump region header under -misched-print-dags (#215090)

To simplify testing and do not require a secondary output flag like
`-debug` or `-print-before=machine-scheduler` just to FileCheck against
function name boundaries. Motivating example:
https://github.com/llvm/llvm-project/pull/213950
DeltaFile
+25-25llvm/test/CodeGen/AArch64/misched-fusion-aes-pre-ra.mir
+25-25llvm/test/CodeGen/AArch64/misched-fusion-aes-post-ra.mir
+14-7llvm/lib/CodeGen/MachineScheduler.cpp
+5-5llvm/test/CodeGen/AArch64/misched-fusion-apple-sme-compute.mir
+4-4llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-pre-ra.mir
+4-4llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-post-ra.mir
+77-703 files not shown
+86-799 files

LLVM/project 54adf10llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv zvdot4a8i-i64-sdnode.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+264-679llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
+250-0llvm/test/CodeGen/RISCV/rvv/zvdot4a8i-i64-sdnode.ll
+117-0llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product-predicated.ll
+106-0llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product-i64.ll
+46-4llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+26-5llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+809-6881 files not shown
+820-6977 files

LLVM/project fe48849llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/RISCV partial-reduce-dot-product-predicated.ll partial-reduce-dot-product.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+264-679llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product.ll
+117-0llvm/test/Transforms/LoopVectorize/RISCV/partial-reduce-dot-product-predicated.ll
+11-9llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+392-6883 files