LLVM/project c12a0d2mlir/include/mlir/IR OpImplementation.h, mlir/lib/IR OperationSupport.cpp

[mlir][ODS] Share optional operand and type parser logic (NFC) (#226066)

Move repeated optional operand and type parsing into out-of-line
helpers.

Generated parsers now reuse those helpers across operations.

This improves MLIR build time by avoid redundant compilation of these
helpers.

Assisted-by: Codex
DeltaFile
+5-21mlir/tools/mlir-tblgen/OpFormatGen.cpp
+26-0mlir/lib/IR/OperationSupport.cpp
+9-0mlir/include/mlir/IR/OpImplementation.h
+1-1mlir/test/mlir-tblgen/op-format.td
+41-224 files

LLVM/project 303cf70llvm/include/llvm/Analysis TargetFolder.h, llvm/test/Transforms/SLPVectorizer/RISCV revec.ll

[TargetFolder] Use getGetElementPtr() overload accepting DataLayout (#226068)

To directly construct the constant GEP in canonical ptradd form.

The test change is because this ends up canonicalizing the vector
GEP case as well, rather than just the scalar cases.
DeltaFile
+5-1llvm/include/llvm/Analysis/TargetFolder.h
+1-1llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
+6-22 files

LLVM/project 43a0a95llvm/lib/Target/WebAssembly WebAssemblyCFGStackify.cpp, llvm/test/CodeGen/WebAssembly cfg-stackify-eh-legacy.mir exception-legacy.mir

[WebAssembly] Remove per-invoke EH_LABEL handling (#226053)

Per-invoke `EH_LABEL`s are no longer emitted after #225903. This removes
code that handles per-invoke `EH-LABEL`s and removes them from mir
tests.
DeltaFile
+7-31llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+2-9llvm/test/CodeGen/WebAssembly/exception-legacy.mir
+0-6llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
+9-463 files

LLVM/project 1087708flang/lib/Semantics resolve-directives.cpp, flang/test/Semantics/OpenMP defaultmap-clause-none.f90

[flang][OpenMP] Fix crash in defaultmap(none) on structure constructors (#220994)

Fixes :
[https://github.com/llvm/llvm-project/issues/218929](https://github.com/llvm/llvm-project/issues/218929)
Flang was crashing when a target defaultmap(none:...) region contained a
structure constructor, like this:
```
program p
  type t
  end type
  type(t) :: x

  !$omp target defaultmap(none:aggregate)
  x = t()
  !$omp end target
end
```
The problem is in `IsOpenMPAggregate` and `IsOpenMPScalar`. When the
OpenMP attribute visitor walks the names in the region, it hits the t in

    [7 lines not shown]
DeltaFile
+14-0flang/test/Semantics/OpenMP/defaultmap-clause-none.f90
+6-0flang/lib/Semantics/resolve-directives.cpp
+20-02 files

LLVM/project 65d651bllvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.set.rounding.ll readlane-known-bits.ll

[AMDGPU] Look through readfirstlane/readlane in computeKnownBitsForTargetInstr. (#224275)

Currently, `computeKnownBitsForTargetInstr` in GISel and
`computeKnownBitsForTargetNode` in SDAG treats
`amdgcn.readfirstlane/readlane` as fully unknown, even though both just
return the data operand's value from some lane. This patch teaches it to
recurse into the data operand (operand 2) and reuse its known bits.

Thus, it unblocks known-bits combines (e.g. redundant_and) that see
these intrinsics while still generic.
DeltaFile
+89-0llvm/test/CodeGen/AMDGPU/readlane-known-bits.ll
+52-0llvm/test/CodeGen/AMDGPU/GlobalISel/known-bits-readlane.mir
+50-0llvm/test/CodeGen/AMDGPU/GlobalISel/combine-readlane-redundant-and.mir
+8-24llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
+7-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+5-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+211-241 files not shown
+211-257 files

LLVM/project 2347fc7flang/include/flang/Lower PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Detect loops whose branching is confined to their body

A DO loop is classified as either structured or unstructured, and a single
raw branch anywhere in its body forces the loop -- and every construct
enclosing it -- onto the unstructured path.

That is stronger than necessary. A loop keeps its structured control flow
as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.

This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
DeltaFile
+191-23flang/lib/Lower/PFTBuilder.cpp
+137-0flang/test/Lower/pre-fir-tree-unstructured-internals.f90
+51-6flang/include/flang/Lower/PFTBuilder.h
+9-6flang/test/Lower/trailing-cycle.f90
+388-354 files

LLVM/project e1c829aflang/include/flang/Lower PFTBuilder.h

[flang][NFC] Say which control successors are not incoming branches

The map records branches, not every control successor: a construct
transferring control between its own statements is not a branch
(F2023 11.2.1 p1), so the successors analyzeBranches sets directly are
absent from it. Say so, rather than calling the map a plain inverse.
DeltaFile
+4-2flang/include/flang/Lower/PFTBuilder.h
+4-21 files

LLVM/project cbe5b43flang/include/flang/Lower PFTDefs.h PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Record the evaluations that branch to each evaluation

The PFT records where each branch goes, but not where it comes from, so
asking whether anything branches into a construct means walking the whole
procedure.

Record the reverse edges beside the forward ones, and print them in PFT
dumps so both directions of the branch graph are visible.
DeltaFile
+68-0flang/test/Lower/pre-fir-tree-incoming-branches.f90
+20-0flang/lib/Lower/PFTBuilder.cpp
+8-8flang/test/Lower/assigned-goto-labeled-end.f90
+3-3flang/test/Lower/trailing-cycle.f90
+3-0flang/include/flang/Lower/PFTDefs.h
+3-0flang/include/flang/Lower/PFTBuilder.h
+105-111 files not shown
+106-127 files

LLVM/project 6cf36fdlibcxx/docs/Status Cxx17Issues.csv

[libc++][docs] Mark LWG2727 Complete in LLVM 24 (#225606)

In 9853cb54d9d2684b27f0d0db89c00c2da7e31b88 and
672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d, we implemented parallel
versions of `std::min_element`, `std::max_element`, and
`std::minmax_element` without adding incorrect `constexpr`. This
essentially implemented the resolution of LWG2727.
DeltaFile
+1-1libcxx/docs/Status/Cxx17Issues.csv
+1-11 files

LLVM/project b8f452eflang/lib/Lower Bridge.cpp, flang/test/Lower do-loop-branch-to-loop-header.f90 do_loop_unstructured.f90

[flang] Lower loops whose branching is confined to their body structurally

Such a loop was classified separately by a previous change but still
lowered as a raw CFG, so its structured form was lost.

Lower it structurally instead, with its body folded into a region that can
hold the branching. The loop keeps its bounds on the op, so it remains
available to whatever transforms or parallelizes it. Only the body is
folded: the loop control statements are emitted as they are for any
structured loop, since a branch from outside may target either of them.

Loops an OpenACC or OpenMP directive owns are lowered the same way, so
they keep their form too.
DeltaFile
+20-134flang/test/Lower/do_loop_unstructured.f90
+119-11flang/lib/Lower/Bridge.cpp
+73-0flang/test/Lower/OpenACC/acc-unstructured-internals.f90
+34-28flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
+55-0flang/test/Lower/do-loop-branch-to-loop-header.f90
+50-0flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
+351-17310 files not shown
+453-24116 files

LLVM/project 4e323a6flang/include/flang/Lower PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Detect loops whose branching is confined to their body

A DO loop is classified as either structured or unstructured, and a single
raw branch anywhere in its body forces the loop -- and every construct
enclosing it -- onto the unstructured path.

That is stronger than necessary. A loop keeps its structured control flow
as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.

This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
DeltaFile
+191-23flang/lib/Lower/PFTBuilder.cpp
+137-0flang/test/Lower/pre-fir-tree-unstructured-internals.f90
+51-6flang/include/flang/Lower/PFTBuilder.h
+9-6flang/test/Lower/trailing-cycle.f90
+388-354 files

LLVM/project d5c01b4flang/include/flang/Lower PFTBuilder.h

[flang][NFC] Say which control successors are not incoming branches

The map records branches, not every control successor: a construct
transferring control between its own statements is not a branch
(F2023 11.2.1 p1), so the successors analyzeBranches sets directly are
absent from it. Say so, rather than calling the map a plain inverse.
DeltaFile
+4-2flang/include/flang/Lower/PFTBuilder.h
+4-21 files

LLVM/project 84afb5aflang/lib/Optimizer/CodeGen CodeGen.cpp CodeGenOpenMP.cpp, flang/lib/Optimizer/Dialect FIROps.cpp

[flang] Stop using Operation::getAttrs (NFC) (#223049)

Migrate FIR attribute copying and printing to the explicit inherent and
discardable attribute APIs.

Also upgrade the textual assembly to stop mixing inherent and
discardable attributes in the same dictionary.

This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475

Assisted-by: Codex
DeltaFile
+143-59flang/lib/Optimizer/Dialect/FIROps.cpp
+77-77flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
+41-41flang/test/Lower/OpenACC/acc-reduction.f90
+37-37flang/test/Transforms/tbaa2.fir
+30-24flang/lib/Optimizer/CodeGen/CodeGen.cpp
+26-26flang/test/Lower/OpenMP/implicit-dsa.f90
+354-264522 files not shown
+2,413-2,299528 files

LLVM/project 27cddfellvm/lib/Target/Mips MipsInstrInfo.td, llvm/test/MC/Mips/mips32r6 valid.s

[Mips] Add sync instruction aliases (#225866)

These aliases are documented in the MIPS ISA Reference Manual. These
also exist in binutils and are declared to be part of the MIPS32R2 ISA.
DeltaFile
+6-0llvm/lib/Target/Mips/MipsInstrInfo.td
+5-0llvm/test/MC/Mips/mips64r6/valid.s
+5-0llvm/test/MC/Mips/mips64r5/valid.s
+5-0llvm/test/MC/Mips/mips64r3/valid.s
+5-0llvm/test/MC/Mips/mips64r2/valid.s
+5-0llvm/test/MC/Mips/mips32r6/valid.s
+31-05 files not shown
+48-211 files

LLVM/project e26fb78mlir/test/mlir-tblgen op-decl-and-defs.td op-operand.td, mlir/tools/mlir-tblgen OpDefinitionsGen.cpp

[mlir][ODS] Reuse collective builders for zero-result ops (NFC) (#226059)

Forward the no-result separate-argument builder to its collective
counterpart instead of generating the same operand, attribute, and
region construction twice. This cuts OpenMPDialect.cpp build time by
1.5% and its machine-code text by about 71 KB.

Assisted-by: Codex
DeltaFile
+7-4mlir/test/mlir-tblgen/op-attribute.td
+9-0mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+6-2mlir/test/mlir-tblgen/op-operand.td
+2-0mlir/test/mlir-tblgen/op-decl-and-defs.td
+24-64 files

LLVM/project 07fbbacmlir/include/mlir/IR Diagnostics.h, mlir/lib/IR Diagnostics.cpp

[mlir] Reduce Diagnostic storage across standard library debug modes (NFC) (#226070)

The multi-part diagnostic support added a SmallVector of part boundaries
to Diagnostic. With libstdc++'s _GLIBCXX_DEBUG enabled, the two
std::vector members also grow substantially: sizeof(Diagnostic) reaches
288 bytes. This exceeds the 256-byte limit for default
SmallVector<Diagnostic> and breaks Transform dialect builds that use
that type.

Use zero-inline SmallVectors for the owned string buffers and attached
notes. Both collections already allocated when populated, while their
empty representation no longer grows under _GLIBCXX_DEBUG. Give the
part-boundary vector zero inline elements as well: ordinary diagnostics
have a single part and never populate it. Keep the four inline argument
slots, so common diagnostic assembly retains its existing allocation
behavior. Splitting a diagnostic now allocates boundary storage.

On this 64-bit checkout, sizeof(Diagnostic) falls from 224 to 192 bytes
normally and from 288 to 192 bytes with _GLIBCXX_DEBUG.

Assisted-by: Codex
DeltaFile
+4-3mlir/include/mlir/IR/Diagnostics.h
+3-2mlir/lib/IR/Diagnostics.cpp
+7-52 files

LLVM/project 7942551offload/libompaccsupport AsyncInfo.cpp, offload/libomptarget CMakeLists.txt omptarget.cpp

[offload][nfc] Move AsyncInfoTy's definitions to libompaccsupport (#220991)

AsyncInfoTy will be used by both OpenMP and OpenACC. Extract its
implementation from `omptarget.cpp` into `libompaccsupport` so that it
can also be compiled independently by libacctarget.
DeltaFile
+69-0offload/libompaccsupport/AsyncInfo.cpp
+0-52offload/libomptarget/omptarget.cpp
+1-0offload/libomptarget/CMakeLists.txt
+70-523 files

LLVM/project e3eee4dllvm/lib/CodeGen/SelectionDAG LegalizeTypes.h LegalizeIntegerTypes.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

Comments
DeltaFile
+3-4llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+3-4llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+1-1llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+9-114 files

LLVM/project ee5e889clang/test/CodeGenOpenCL builtins-amdgcn-gfx13.cl, clang/test/SemaOpenCL builtins-amdgcn-gfx13-exclusive-scan-types.cl

[AMDGPU] Add intrinsics and builtins for gfx13 exclusive scan
DeltaFile
+1,594-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exclusive.scan.ll
+260-0clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
+67-0llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+42-0clang/test/SemaOpenCL/builtins-amdgcn-gfx13-exclusive-scan-types.cl
+20-18llvm/lib/Target/AMDGPU/VOP3Instructions.td
+21-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+2,004-185 files not shown
+2,075-1911 files

LLVM/project 4c9931dllvm/lib/CodeGen SjLjEHPrepare.cpp, llvm/test/Transforms/SjLjEHPrepare respect-exception-model-flag.ll

CodeGen: Respect the exception-model module flag in SjLjEHPrepare (#225726)

Teach SjLjEHPrepare to consult the "exception-model" module flag and
only prepare when the module selects the SjLj model. When the flag is absent
the pass runs as before, implicitly relying on the pass config not running
the pass.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+60-0llvm/test/Transforms/SjLjEHPrepare/respect-exception-model-flag.ll
+9-0llvm/lib/CodeGen/SjLjEHPrepare.cpp
+69-02 files

LLVM/project f5d74f5llvm/lib/Target/AMDGPU VOP2Instructions.td SIISelLowering.cpp

[AMDGPU] Remove unneeded usesCustomInserter on some opcodes. NFC. (#226055)
DeltaFile
+0-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-1llvm/lib/Target/AMDGPU/VOP2Instructions.td
+1-62 files

LLVM/project 187e1e3flang/include/flang/Lower PFTDefs.h PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Record the evaluations that branch to each evaluation

The PFT records where each branch goes, but not where it comes from, so
asking whether anything branches into a construct means walking the whole
procedure.

Record the reverse edges beside the forward ones, and print them in PFT
dumps so both directions of the branch graph are visible.
DeltaFile
+68-0flang/test/Lower/pre-fir-tree-incoming-branches.f90
+20-0flang/lib/Lower/PFTBuilder.cpp
+8-8flang/test/Lower/assigned-goto-labeled-end.f90
+3-3flang/test/Lower/trailing-cycle.f90
+3-0flang/include/flang/Lower/PFTDefs.h
+3-0flang/include/flang/Lower/PFTBuilder.h
+105-111 files not shown
+106-127 files

LLVM/project f4eb722llvm/lib/CodeGen WinEHPrepare.cpp, llvm/lib/Passes PassBuilder.cpp PassRegistry.def

CodeGen: Derive WinEHPrepare PHI demotion from the personality (#225676)

Previously WinEHPrepare had a catchswitch-only pass option which was
set based on the exception model in the pass config. The only special
case using it was for Wasm EH, which reuses the Windows EH instruction but
does not outline funclets so only needs the catchwitch dispatch phi handling.
Instead check the properties of the personality function inside the pass, so the
pass config is less dependent on knowing the exception model.

Also, make sure the pass is a nop for dwarf EH which appears to be untested.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+111-0llvm/test/CodeGen/WebAssembly/wineh-prepare-wasm-personality.ll
+54-0llvm/test/CodeGen/X86/wineh-prepare-dwarf-personality.ll
+12-20llvm/lib/CodeGen/WinEHPrepare.cpp
+4-4llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
+1-6llvm/lib/Passes/PassRegistry.def
+0-5llvm/lib/Passes/PassBuilder.cpp
+182-354 files not shown
+188-4310 files

LLVM/project 022fdfallvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU move-to-valu-absdiff.mir

AMDGPU: Mark the carry-out of the scalar abs expansion dead (#226046)
DeltaFile
+20-11llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+24-2llvm/test/CodeGen/AMDGPU/move-to-valu-absdiff.mir
+44-132 files

LLVM/project a73d995clang/docs ReleaseNotes.md

[Clang] Add fixes to padding clearing logic to the release notes (#225340)
DeltaFile
+3-2clang/docs/ReleaseNotes.md
+3-21 files

LLVM/project f05c3d5lldb/tools/lldb-fuzzer CMakeLists.txt, lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer CMakeLists.txt corefile.dict

[lldb] Add a corefile fuzzer (#225103)

Fuzzes the metadata parser when LLDB opens a corefile for Mach-O
and ELF.

The fuzzer writes input data to a tempfile and loads it through
`Process::LoadCore()`, the same way `target create --core` does.
It initializes both the macOS and Linux host platforms so the
core-load path runs regardless of which of the two OSes the fuzzer
itself is built on.

`lldb-target-fuzzer` does not reach any of this. It only calls
`SBDebugger::CreateTarget`, which builds a Target and its executable
Module; identifying that module parses the Mach-O/ELF header and
load/section commands, but never calls `Process::LoadCore`.

---------

Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
DeltaFile
+118-0lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/lldb-corefile-fuzzer.cpp
+51-0lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/corefile.dict
+43-0lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/CMakeLists.txt
+1-0lldb/tools/lldb-fuzzer/CMakeLists.txt
+213-04 files

LLVM/project 27a8d87llvm/lib/Target/AMDGPU AMDGPU.td VOP3Instructions.td, llvm/test/MC/AMDGPU gfx13_asm_vop3_from_vop1_err.s gfx13_asm_vop3_from_vop1_err-fake16.s

[AMDGPU] Add gfx13 MC support for exclusive scan instructions
DeltaFile
+603-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+592-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+230-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err.s
+230-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err-fake16.s
+54-0llvm/lib/Target/AMDGPU/VOP3Instructions.td
+5-0llvm/lib/Target/AMDGPU/AMDGPU.td
+1,714-01 files not shown
+1,715-07 files

LLVM/project bc83777mlir/include/mlir/IR OperationSupport.h, mlir/lib/IR OperationSupport.cpp

[mlir][ODS] Share generated attribute property conversion (NFC) (#226057)

Move repeated attribute-backed property assignment and dictionary entry
construction into common helpers. This reduces MLIR build time by saving
optimizer work in large generated dialect translation units while
preserving diagnostics and conversion behavior.

Assisted-by: Codex
DeltaFile
+7-19mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+25-0mlir/include/mlir/IR/OperationSupport.h
+7-0mlir/lib/IR/OperationSupport.cpp
+4-0mlir/test/mlir-tblgen/op-decl-and-defs.td
+43-194 files

LLVM/project cc5f53amlir/test/mlir-tblgen op-decl-and-defs.td op-attribute.td, mlir/tools/mlir-tblgen OpDefinitionsGen.cpp

[mlir][ODS] Reuse property storage in generated builders (NFC) (#226061)

Retrieve operation properties once in each generated builder that writes
them, then use the same reference for segment sizes, properties, and
attributes. This improved MLIR build time by avoiding repeated storage
lookup, e.g. cuts OpenMPDialect.cpp compiler instructions by 1.2%.

Assisted-by: Codex
DeltaFile
+16-14mlir/test/mlir-tblgen/op-attribute.td
+16-8mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+3-0mlir/test/mlir-tblgen/op-decl-and-defs.td
+35-223 files

LLVM/project b899756llvm/lib/Target/Mips MipsCallLowering.cpp, llvm/test/CodeGen/Mips/GlobalISel/irtranslator float_args.ll

[Mips][GlobalISel] Keep split double arguments live across calls (#225879)

Mark both GPRs assigned by custom f64 argument lowering as implicit uses
of the call. Without these uses, dead machine instruction elimination
can remove the copies that pass the argument.

Check call operands after IR translation and optimized FPR-to-GPR
argument passing with FP32 and FP64 register modes.
DeltaFile
+43-2llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
+3-0llvm/lib/Target/Mips/MipsCallLowering.cpp
+46-22 files