LLVM/project 7812fefllvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rvp-widening-convert-isel.ll

[RISCV][P-ext] Add RISCVISD::PWZIP for RV32. (#210134)

This node takes 2 32-bit vector inputs and produces a 64-bit vector
result. By extracting the subvector during lowering, we expose more
opportunities for optimizations.
DeltaFile
+67-0llvm/test/CodeGen/RISCV/rvp-widening-convert-isel.ll
+18-5llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+9-8llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+94-133 files

LLVM/project 0acbbccclang/lib/Driver/ToolChains Linux.cpp Clang.cpp, clang/test/Driver linux-ld.c aarch64-fmv.c

[Android] Drop workarounds for older Android API levels pre 23 (#161893)

Drop workarounds for Android API levels pre 23.

The minimum Android API currently supported by the LTS NDK is 23.
DeltaFile
+3-19clang/test/Driver/linux-ld.c
+2-10clang/test/Driver/aarch64-fmv.c
+2-4clang/lib/Driver/ToolChains/Linux.cpp
+1-5clang/test/Driver/aarch64-features.c
+0-1clang/lib/Driver/ToolChains/Clang.cpp
+8-395 files

LLVM/project c6324dcclang/include/clang/Serialization ASTReader.h, clang/lib/Basic Diagnostic.cpp SourceManager.cpp

[clang] Harden module SLoc deduplication
DeltaFile
+33-0clang/test/Modules/cxx20-hu-sloc-dedup-info.cpp
+20-2clang/lib/Serialization/ASTReader.cpp
+14-8clang/lib/Basic/Diagnostic.cpp
+11-4clang/lib/Serialization/ASTWriter.cpp
+9-4clang/include/clang/Serialization/ASTReader.h
+5-2clang/lib/Basic/SourceManager.cpp
+92-201 files not shown
+96-227 files

LLVM/project 95ff1fallvm/lib/Target/AMDGPU SOPInstructions.td, llvm/test/CodeGen/AMDGPU uaddsat.ll add-max.ll

[AMDGPU] Lower uniform uaddsat.i32 to SALU insts (#210168)

Map uaddsat.i32(i32 %a, i32 %b) to the following:

```
s_not_b32 s4, s17          ; s17 = %b
s_min_u32 s4, s16, s4      ; s16 = %a
s_add_u32 s4, s4, s17
```

Co-authored-by: Shilei Tian <i at tianshilei.me>
DeltaFile
+51-0llvm/test/CodeGen/AMDGPU/uaddsat.ll
+7-3llvm/test/CodeGen/AMDGPU/add-max.ll
+4-0llvm/lib/Target/AMDGPU/SOPInstructions.td
+62-33 files

LLVM/project 68f703fclang/docs UsersManual.md, clang/test/CodeGen/AArch64 sign-return-address.c

[AArch64][COFF] Branch-protection=standard/pac-ret means "b-key" on Windows (#203989)

On AArch64 Windows the `B-key` is the only supported key for userspace,
let's make "standard" and "pac-ret" options generate "b-key".

Fixes: #203852
DeltaFile
+11-60llvm/test/CodeGen/AArch64/sign-return-address.ll
+30-0clang/docs/UsersManual.md
+15-0clang/test/CodeGen/AArch64/sign-return-address.c
+11-0llvm/test/CodeGen/AArch64/windows-pac-invalid-a-key.ll
+7-1llvm/lib/TargetParser/ARMTargetParserCommon.cpp
+7-0llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
+81-6111 files not shown
+113-6617 files

LLVM/project aaa4ebdclang/docs ReleaseNotes.md, clang/lib/Sema SemaChecking.cpp

[Clang][Sema] Reland -Wstringop-overread with computeDependence fix (#208012)

Reland #183004 and follow-up #205201 (reverted in #207840) which adds `-Wstringop-overread` to warn when memory functions `memcpy`, `memmove`, `memcmp`, and other related builtins read more bytes than the source buffer size.

The revert was due to a crash when a memory function is called on `&x` where `x` is a static constexpr local inside a template. The original PR exposed a bug in `computeDependence(UnaryOperator*)` where only the value-dependence bit is set for this case, when the instantiation-dependence bit should also be set. This is the root cause behind the crash.

Fix `computeDependence` to properly set both value and instantiation-dependence bits, and add a regression for this crash via `warn-stringop-overread.c`.
DeltaFile
+163-82clang/lib/Sema/SemaChecking.cpp
+211-0clang/test/Sema/warn-stringop-overread.c
+166-0clang/docs/ReleaseNotes.md
+29-0clang/test/Sema/warn-stringop-overread-fortify.c
+10-10clang/test/AST/ByteCode/builtin-functions.cpp
+5-3clang/test/Sema/warn-fortify-source.c
+584-959 files not shown
+600-10115 files

LLVM/project de0eb50llvm/include/llvm/CodeGen LibcallLoweringInfo.h, llvm/lib/CodeGen PreISelIntrinsicLowering.cpp AtomicExpandPass.cpp

CodeGen: Rename LibcallLoweringModuleAnalysisResult to ModuleLibcallLoweringInfo

Avoid putting pass manager flavored naming in this class. This is analagous to
TargetLibraryInfo's TargetLibraryInfoImpl.

Co-authored-by: Claude (Claude Opus 4.8) <noreply at anthropic.com>
DeltaFile
+9-10llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp
+7-7llvm/include/llvm/CodeGen/LibcallLoweringInfo.h
+6-7llvm/lib/CodeGen/AtomicExpandPass.cpp
+2-2llvm/lib/CodeGen/LibcallLoweringInfo.cpp
+1-1llvm/lib/CodeGen/DwarfEHPrepare.cpp
+1-1llvm/lib/CodeGen/SafeStack.cpp
+26-285 files not shown
+31-3311 files

LLVM/project f6f08faflang/lib/Semantics resolve-names.cpp, flang/test/Lower/CUDA cuda-implicit-managed-alloc.cuf

[flang][cuda] Use managed allocation for saved locals (#210133)

Example:
```fortran
subroutine work
  real, allocatable, save :: q(:)
  allocate(q(10))
end
```

`SAVE` gives the local allocatable descriptor static storage. Implicitly
attributing it as Unified causes allocation to look it up as a
registered CUDA global, but no device symbol is registered for the
descriptor.

Fix: use Managed attribution for saved subprogram-local allocatables and
pointers, avoiding the invalid CUDA symbol lookup.
DeltaFile
+18-0flang/test/Lower/CUDA/cuda-implicit-managed-alloc.cuf
+3-1flang/lib/Semantics/resolve-names.cpp
+21-12 files

LLVM/project 7cfe30dllvm/docs ReleaseNotes.md, llvm/docs/TableGen ProgRef.rst

[TableGen] Short-circuit !cond operator (#208942)

Fixes #163213 

TableGen `!cond` operator currently resolves all subsequent conditions
and values even if it already found a condition that resolves to `true`.
This change short-circuits on the first `true` resolution found
iterating from left to right. It folds a new `CondOpInit` with only the
conditions and values that have already been resolved, including the
current condition and value.
DeltaFile
+11-2llvm/test/TableGen/true-false.td
+10-0llvm/lib/TableGen/Record.cpp
+4-0llvm/docs/TableGen/ProgRef.rst
+4-0llvm/docs/ReleaseNotes.md
+29-24 files

LLVM/project 58db4cellvm/test/Transforms/SLPVectorizer/X86 masked-blended-loads.ll

[SLP][NFC]Add a test with GEPs under the same select condition, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/210173
DeltaFile
+187-0llvm/test/Transforms/SLPVectorizer/X86/masked-blended-loads.ll
+187-01 files

LLVM/project c96a176compiler-rt/lib/tsan/rtl tsan_interface.h

[tsan] Enable __TSAN_HAS_INT128 on s390x and mips64 (#197319)

The s390x exclusion was added in
https://github.com/llvm/llvm-project/commit/b17673816d7f65e07015489993b22049e36b04db
(https://reviews.llvm.org/D105629)
citing lack of hardware 128-bit atomics. s390x does have the CDSG
instruction,
but `alignof(__int128) == 8` on the s390x psABI while CDSG requires
16-byte
alignment, so Clang does not define
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16` for
this target. The mips64 exclusion has been present since
`__TSAN_HAS_INT128` was
introduced in
https://github.com/llvm/llvm-project/commit/06bbca9ec4bbc5a103c94c4973797ea4ddf944b5
(https://reviews.llvm.org/D18543) with no documented
rationale. Clang similarly does not define
`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16`
for mips64.

    [18 lines not shown]
DeltaFile
+2-3compiler-rt/lib/tsan/rtl/tsan_interface.h
+2-31 files

LLVM/project fe616e4libc/include alloca.yaml CMakeLists.txt, libc/include/llvm-libc-macros alloca-macros.h CMakeLists.txt

[libc] Implement alloca.h header (#210150)

Implemented the alloca.h header for LLVM libc.

* libc/include/llvm-libc-macros/alloca-macros.h: Defined alloca macro
using __builtin_alloca.
* libc/include/alloca.yaml: Added header specification.
* libc/include/CMakeLists.txt,
libc/include/llvm-libc-macros/CMakeLists.txt: Registered the new header
and macro targets.
* libc/config/linux/*/headers.txt: Enabled the header for Linux targets
(x86_64, aarch64, arm, i386, riscv).
* libc/test/include/alloca_test.cpp, libc/test/include/CMakeLists.txt:
Added and registered functional unit tests.

Tested by running the new unit and hermetic tests.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+37-0libc/test/include/alloca_test.cpp
+19-0libc/include/llvm-libc-macros/alloca-macros.h
+11-0libc/include/alloca.yaml
+10-0libc/include/CMakeLists.txt
+10-0libc/test/include/CMakeLists.txt
+6-0libc/include/llvm-libc-macros/CMakeLists.txt
+93-05 files not shown
+98-011 files

LLVM/project d493074flang/lib/Optimizer/Transforms/CUDA CUFAddConstructor.cpp, flang/test/Fir/CUDA cuda-constructor-2.f90

[flang][cuda] Register allocator when cuf.allocate or cuf.deallocate are present (#210147)
DeltaFile
+21-8flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
+17-0flang/test/Fir/CUDA/cuda-constructor-2.f90
+38-82 files

LLVM/project 6940231llvm/lib/Target/AMDGPU SOPInstructions.td, llvm/test/CodeGen/AMDGPU uaddsat.ll add-max.ll

[AMDGPU] Lower uniform uaddsat.i32 to SALU insts

Map uaddsat.i32(i32 %a, i32 %b) to the following:

```
s_not_b32 s4, s17          ; s17 = %b
s_min_u32 s4, s16, s4      ; s16 = %a
s_add_u32 s4, s4, s17
```
DeltaFile
+51-0llvm/test/CodeGen/AMDGPU/uaddsat.ll
+7-3llvm/test/CodeGen/AMDGPU/add-max.ll
+4-0llvm/lib/Target/AMDGPU/SOPInstructions.td
+62-33 files

LLVM/project ab35099lld/docs WebAssembly.md index.md, lld/docs/ELF linker_script.md warn_backrefs.md

[docs] Rewrite LLD docs to Markdown (#209897)

Tracking issue: #201242
This is a stacked PR based on #209894 , which will be a standalone
commit that renames *.rst -> *.md before this PR lands for history
preservation purposes. See the [migration guide] for more information.

[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines

This was prepared with rst2myst plus LLM-assisted cleanup. I paged
through all the generated HTML looking for migration artifacts, and all
of the differences I could find appear to be formatting error
corrections. Please spot check my work and approve if it looks good.
DeltaFile
+153-166lld/docs/WebAssembly.md
+122-135lld/docs/ELF/linker_script.md
+50-64lld/docs/index.md
+54-53lld/docs/ELF/warn_backrefs.md
+45-51lld/docs/windows_support.md
+44-52lld/docs/NewLLD.md
+468-5219 files not shown
+716-76015 files

LLVM/project fb9362aclang/include/clang/Sema TemplateInstCallback.h, clang/lib/Frontend FrontendActions.cpp

[clang] remove templight support

Removed as unmaintained, per discussions in https://discourse.llvm.org/t/rfc-removing-templight-support/90777
DeltaFile
+0-345clang/test/Templight/templight-empty-entries-fix.cpp
+0-262clang/lib/Frontend/FrontendActions.cpp
+0-174clang/test/Templight/templight-nested-memoization.cpp
+0-85clang/test/Templight/templight-prior-template-arg.cpp
+0-84clang/test/Templight/templight-nested-template-instantiation.cpp
+0-82clang/include/clang/Sema/TemplateInstCallback.h
+0-1,03221 files not shown
+4-1,55127 files

LLVM/project 723414dlibunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+198-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,709-6134 files not shown
+2,037-6940 files

LLVM/project bf58bb3libunwind/test ra_sign_state.pass.cpp, llvm/lib/Target/AArch64 AArch64PointerAuth.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+848-35llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+198-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+48-24llvm/test/CodeGen/AArch64/pauth-lr-tail-call-fpdiff.ll
+1,747-11938 files not shown
+2,176-17544 files

LLVM/project f184554libunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+164-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,675-6128 files not shown
+1,950-6834 files

LLVM/project 68d4221libunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+198-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,709-6134 files not shown
+2,037-6940 files

LLVM/project ec3069blibunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+84-59llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+262-644 files

LLVM/project f5cbb45libunwind/test ra_sign_state.pass.cpp, llvm/include/llvm/MC MCDwarf.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+813-0llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+346-0llvm/test/CodeGen/AArch64/sign-return-address.ll
+165-60llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+164-0libunwind/test/ra_sign_state.pass.cpp
+142-0llvm/test/MC/AArch64/cfi_set_ra_state-shrinkwrap.s
+45-1llvm/include/llvm/MC/MCDwarf.h
+1,675-6128 files not shown
+1,950-6834 files

LLVM/project 101fffalibunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+178-53 files

LLVM/project 89bc929libunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+84-59llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+262-644 files

LLVM/project 288543dlibunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+178-53 files

LLVM/project f8107f6clang/lib/Sema HLSLExternalSemaSource.cpp, clang/test/AST/HLSL Textures-AST.hlsl

[HLSL] Implement RWTexture2DArray (#208725)

Add front-end support for RWTexture2DArray, and update related tests to
include coverage of this resource.

Fixes #194947

---------

Co-authored-by: Tim Corringham <tcorring at amd.com>
DeltaFile
+20-0clang/lib/Sema/HLSLExternalSemaSource.cpp
+4-0clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+3-1clang/test/CodeGenHLSL/resources/Textures-GetDimensions.hlsl
+1-0clang/test/AST/HLSL/Textures-AST.hlsl
+1-0clang/test/SemaHLSL/Resources/RWTexture2D-mips-errors.hlsl
+1-0clang/test/SemaHLSL/Resources/RWTexture2D-unsupported-methods-errors.hlsl
+30-12 files not shown
+32-18 files

LLVM/project c9a9737lld/docs NewLLD.md NewLLD.rst, lld/docs/ELF linker_script.md linker_script.rst

[docs] Rename LLD docs to Markdown (#209894)

Tracking issue: https://github.com/llvm/llvm-project/issues/201242
Migration guide docs:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
RFC:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840

This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
DeltaFile
+317-0lld/docs/NewLLD.md
+0-317lld/docs/NewLLD.rst
+268-0lld/docs/ELF/linker_script.md
+0-268lld/docs/ELF/linker_script.rst
+0-264lld/docs/WebAssembly.rst
+264-0lld/docs/WebAssembly.md
+849-84922 files not shown
+1,695-1,69528 files

LLVM/project 5b46dcfllvm/include/llvm/DWP DWP.h, llvm/lib/DWP DWP.cpp

[llvm-dwp] Fix endianness issues (#203424)

llvm-dwp fails on SystemZ, which is big-endian, as follows:

    $ cat min.c
    int main() {}
    $ clang -g -O0 -gsplit-dwarf min.c -o min
    $ llvm-dwp -e min -o min.dwp
error: compile unit exceeds .debug_info section range: 905969668 >= 58

This is because it hardcodes IsLittleEndian=true in multiple places. Fix
by forwarding endianness of the current object file.

Add a SystemZ-specific test.

Add proper big-endian support to X86/compress.test and add an
explanation regarding what the hardcoded blobs are and how they are
generated.
DeltaFile
+206-0llvm/test/tools/llvm-dwp/SystemZ/big_endian_info_v5.s
+71-7llvm/test/tools/llvm-dwp/X86/compress.test
+39-25llvm/lib/DWP/DWP.cpp
+13-4llvm/include/llvm/DWP/DWP.h
+329-364 files

LLVM/project b74a97clldb/source/Expression DWARFExpression.cpp, lldb/unittests/Expression DWARFExpressionTest.cpp

[lldb] Produce generic results for DWARF relational operations (#210122)

DWARF relational operations produce a generic result, whose width is the
target address size. LLDB currently assigns the C++ `bool` comparison
result directly to `Scalar`; because `Scalar` has no `bool` constructor,
this creates a 32-bit integer even on 64-bit targets.

The stricter binary operand checks added in #201288 exposed this in
x86-64 `_sigtramp` CFI. A later `DW_OP_plus` combines a 64-bit generic
address with the 32-bit relational result, so evaluation fails and
signal-frame unwinding stops. The generic-operand relaxation in #209641
does not cover this case because the relational result is narrower than
the address size.

Convert the results of `DW_OP_eq`, `DW_OP_ge`, `DW_OP_gt`, `DW_OP_le`,
`DW_OP_lt`, and `DW_OP_ne` through the existing `to_generic` helper.

## Testing

Add a unit test that evaluates each relational opcode with an 8-byte
address size and then consumes its result with `DW_OP_plus`.
DeltaFile
+33-0lldb/unittests/Expression/DWARFExpressionTest.cpp
+12-6lldb/source/Expression/DWARFExpression.cpp
+45-62 files

LLVM/project 44e3f3cclang/lib/CIR/CodeGen CIRGenExprScalar.cpp, clang/test/CIR/CodeGen ternary-throw.cpp

[CIR] Fix use-after-free when emitting ternary with a throw-expression arm (#208850)

Fixes #208848.

When a conditional operator arm is a noreturn expression, such as
`throw`, `VisitAbstractConditionalOperator` saved an insertion point in
the empty dead-code block created after the expression. The intent was
to insert a `cir.yield` later, once the types of both arms were known.
However, `LexicalScope::cleanup()` removes that empty block when the
arm’s scope exits, leaving the deferred insertion point with a dangling
block pointer.

Avoid saving the insertion point for noreturn arms. These regions
already terminate with `cir.unreachable` and do not require a
`cir.yield`. The CIR verifier accepts ternary regions that terminate
with `cir.unreachable`.

Extended `ternary-throw.cpp` with scalar-rvalue cases covering `throw`
in either arm and in both arms. The existing tests only covered glvalue
conditionals, which take the LValue emission path and never reach this
code.
DeltaFile
+89-0clang/test/CIR/CodeGen/ternary-throw.cpp
+21-37clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+110-372 files