[NFC] Remove dead code to fix build (#207753)
LLVM changed the interfaces around inline assembly, and while we could
have updated this code, in practice DXIL doesn't allow inline assembly
so I removed it.
[SystemZ][z/OS] Remove temporary gnu as output on z/OS (#181906)
On z/OS, there is only HLASM as system assembler available. Since all
LIT tests are migrated, the temporary option can now be removed.
[clang-scan-deps] Migrate more tests through scan-deps-filter (#207283)
Migrate tests that would otherwise fail when the `-emit-visible-modules`
flag is removed.
* The tests now include a `scan-deps-filter` invocation that maintains
the same fields that are already checked, so there is no test coverage
lost.
* Also remove `command-line` fields that were not actually checked in
tests.
Assisted-by: Claude Opus 4.8
[flang][cuda] Make the second LAUNCH_BOUNDS() operand optional (#207273)
The minimum-blocks-per-multiprocessor (second) and maximum-blocks-per-cluster
(third) operands of the CUDA Fortran `LAUNCH_BOUNDS()` prefix are optional, as in
CUDA C++ `__launch_bounds__`. A single-operand `LAUNCH_BOUNDS(N)` is now accepted;
1, 2, or 3 integer constants are valid.
Previously `LAUNCH_BOUNDS(N)` with a single operand was rejected, and the
diagnostic path dereferenced an empty `std::optional` (`currStmtSource()`). That
handler runs during the direct statement walk in `ResolveSpecificationParts`,
where the statement source is not set, so the dereference aborted the compiler.
The diagnostic source is now derived from the prefix, and the same fix is applied
to every diagnostic in the `LAUNCH_BOUNDS()` and `CLUSTER_DIMS()` handlers.
When only the maximum-threads-per-block operand is present, the
`cuf.launch_bounds` attribute omits `minBPM` (now an optional parameter) and no
`nvvm.minctasm` attribute is generated.
Assisted-by: AI
[LoopInfo] Reuse DomTree's own DFS numbering in analyze() (#207650)
analyze() discovers loop headers with a post_order(DomRoot) walk, then
tests each back-edge candidate with DomTree.dominates(). Initial queries
use `dominatedBySlowTreeWalk` and then switch to `updateDFSNumbers`
(Euler tour technique), requiring two tree walks in total.
Optimize this with an upfront updateDFSNumbers to avoid the post-order
walk. Both post-order and reverse pre-order satisfy the
child-before-parent (bottom-up) property. This does change the order in
which siblings are visited (reverse preorder visits the last child
first; post-order visits it last), but that has no observable effect:
the sub-loop and block vectors are only populated by the separate
PopulateLoopsDFS traversal afterward, not by discovery order.
`post_order` (and `depth_first`) are also inefficient for tree
traversals:
DomTreeNodeBase doesn't expose graph numbers, so they fall back to
tracking visited nodes in a SmallPtrSet. For a tree this bookkeeping is
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[flang][OpenMP] Lower target in_reduction for host fallback
Enable host-fallback lowering for target in_reduction in Flang and MLIR OpenMP translation.
Model target in_reduction through the matching map entry, force address-preserving implicit mapping for Flang in_reduction list items, and emit the host-side task-reduction lookup with __kmpc_task_reduction_get_th_data. The runtime entry point takes and returns a generic, default-address-space pointer, so normalize a non-default-address-space captured pointer to the generic address space before the call and cast the returned private pointer back to the map block argument's address space, mirroring the in_reduction handling on omp.taskloop. Unsupported device/offload-entry and richer reduction forms remain diagnosed.
Add Flang lowering, MLIR verifier/translation, and LLVM IR tests for the supported host-fallback path, including a non-default-address-space case, and the remaining unsupported cases.
[AMDGPU] Unroll illegal vector TRUNCATE after legalization
`performShlCombine` introduced a `v2i32 truncate x:v2i64`. This
pattern is not legal, and is normally expanded by the legalizer.
However, since the combine is done after legalization the illegal
pattern remains.
This happens on gfx1251 since it has legal `shl v2i64` instructions.
[Clang] Add constant evaluation support for x86 psadbw (#169253)
This patch adds constant evaluation support for the x86 PSADBW and PSADBW128 intrinsics in Clang’s constexpr interpreter.
[ClangLinkerWrapper] Use discrete steps in verbose mode (#204186)
Summary:
One persistent problem with the linker wrapper flow is that it was more
difficult to reuse as a script than the previous flow. This is because
it did a lot of work internally. In the past we moved al ot of this into
dedicated LLVM tools, so now it's possible to simply use these tools
instead.
This PR changes the verbose mode handling to defer steps to tools rather
than doing it internally. This allows users to use verbose printing and
can copy/paste the results to re-run the steps.
[ELF] Reuse SHT_GROUP selection verdicts in initializeSections. NFC (#207437)
For each SHT_GROUP section, the parallel initializeSections re-derives
what the serial parse() already decided
(https://reviews.llvm.org/D130810).
Record the kept group section indices during parse() so that we can save
the work (xxh3 string hash and DenseMap lookup) in the parallel
initializeSections().
In a clang-relassert --threads=8 benchmark, "Initialize sections"
decreases from 39.0 to 30.6.
[CIR] Fix lit tests after explicit target feature for module asm (#207741)
- Fix lit tests after the module-level inline assembly is enhanced to
support specifying target features explicitly in
fcfc9167b628a2fae8fe1d662989ff7752d905ad.
[FIRToMemRef] Fix wrong-code for array_coor over sliced fir.embox
FIRToMemRef::convertArrayCoorOp routes through getMemrefIndices, which
only folds the first `rank` triples of sliceInfo.sliceVec into the memref
indices (i.e. the array_coor's own slice); the embox's slice triples --
which sit at [rank*3 .. 2*rank*3-1] when both are present -- were dropped.
Three consequences, three fixes here:
1. Non-collapsed embox slice lbs contribute (lb - 1) per Fortran dim to
each memref index. Fold them in in memref order (reversed Fortran
order) so the reinterpret_cast view lands at the right column.
2. The shapeVec-else stride path used shapeVec[0..rank-1] to build the
outer strides. With both slices present, that's the box's (slice's)
extents. Use shapeVec[rank..2*rank-1] instead -- the parent's extents
-- so the outer stride is the parent's leading dim rather than the
slice's own size.
3. Rank-reducing embox slices (undef ub/step triples) have no memref
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[clang][AST] Inline StmtVisitor fallback methods (#203125)
Mark the trivial `StmtVisitorBase` fallback methods `always_inline` so
each `VisitFoo`-to-`VisitParent` delegation is folded into its caller
instead of retained as an out-of-line template thunk.
In matched Release assertions-off Darwin arm64 builds, stripped clang
decreased by 266,656 bytes, stripped clangd decreased by 232,912 bytes,
and the stripped upstream `llvm-driver` multicall decreased by 266,336
bytes.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Co-authored-by: OpenAI Codex <noreply at openai.com>
[clang][Frontend] Batch LangOptions context hashing (#203162)
`CompilerInvocation::computeContextHash` currently expands 269
non-benign `LangOptions` into individual `HashBuilder::add` calls. This
collects the values in an `unsigned` array and passes the array to
`HashBuilder::addRangeElements`, which preserves the ordered
native-endian bytes without adding an element count.
In a Release arm64 build, clangd decreases by 16,528 bytes unstripped
and 16,544 bytes stripped.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
clang: Remove useFP16ConversionIntrinsics target option
Follow up to #174494. Remove the remnants of the control to
use llvm.convert.to.fp16/llvm.convert.from.fp16. Prefer
directly using the IR half type, unless the value is used
in an ABI context where it needs to remain as i16.
I did the first 80% of this a long time ago, and AI finished
the last bit and handled the recent rebases and test updates.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Reapply "runtimes: Pass CMAKE_SYSTEM_NAME based on target triple" (#205133)
This reverts commit 08c728e8528c9584bc1fe0f46bbdd657e368be91.
Reapply after runtimes build fixes on platforms without shared libraries.
[Hexagon] Add XQFloat post-RA compliance checker (#207082)
Introduce XqfPostRADiagnosis to verify qf use-def correctness after
register allocation. Acts as a diagnostic/debugger for XQFloat
implementation. Off by default, enabled with -enable-postra-xqf-check.
Co-authored-by: Santanu Das <quic_santdas at quicinc.com>
