LLVM/project cbd8145mlir/include/mlir/Dialect/LLVMIR LLVMAttrDefs.td, mlir/lib/Dialect/LLVMIR/IR LLVMAttrs.cpp

[MLIR][LLVM] Preserve pointer-valued metadata operands on import (#215743)

convertMetadataToAttrImpl only modelled ConstantInt operands wrapped in
a ConstantAsMetadata, so any metadata node containing a pointer constant
could not be represented and the whole node was rejected.

Add #llvm.md_null and #llvm.md_addrspacecast to model
ConstantPointerNull and addrspacecast constant expressions, keeping the
address space so that `ptr null` and `ptr addrspace(1) null` stay
distinct. MDAddrSpaceCastAttr verifies that its operand is itself
pointer-valued metadata.

Global values are constants, so ValueAsMetadata::get wraps them in a
ConstantAsMetadata and they never reached the ValueAsMetadata case.
Match them in the ConstantAsMetadata case instead, which also
generalizes the existing function-only handling to any named global
value and makes the addrspacecast operand representable.

Mirror both attributes in ModuleTranslation::convertMetadataAttr so the

    [6 lines not shown]
DeltaFile
+70-0mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
+42-3mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
+22-6mlir/lib/Target/LLVMIR/ModuleImport.cpp
+17-0mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+16-0mlir/test/Dialect/LLVMIR/invalid.mlir
+16-0mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
+183-92 files not shown
+203-98 files

LLVM/project 97ef3d4llvm/lib/Transforms/InstCombine InstCombineShifts.cpp, llvm/test/Transforms/InstCombine shift-cttz-ctlz.ll shift.ll

[InstCombine] Fold shl of constant by cttz into multiply of lowest set bit (#214517)

Currently, `C << cttz(X, true)` generates a DeBruijn lookup table on
RV64I (13 instructions).
And this patch adds a fold in InstCombine:
  `C << cttz(X, true)  -->  (-X & X) * C`
This reduces the instruction count from 13 to 3 on RV64I.
The fold requires that cttz has a single use (to avoid increasing
instruction count)

Alive2 proof: https://alive2.llvm.org/ce/z/TmWxrT
DeltaFile
+82-2llvm/test/Transforms/InstCombine/shift.ll
+11-0llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+6-4llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
+99-63 files

LLVM/project 4d18b27clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver cuda-flush-denormals-to-zero.cu amdgpu-xnack-sramecc-flags.c

clang/AMDGPU: Stop passing redundant -target-cpu to cc1

Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
DeltaFile
+62-62clang/test/Driver/amdgpu-mcpu.cl
+26-26clang/test/Driver/hip-sanitize-options.hip
+12-16clang/test/Driver/hip-rdc-device-only.hip
+19-7clang/lib/Driver/ToolChains/CommonArgs.cpp
+10-10clang/test/Driver/amdgpu-xnack-sramecc-flags.c
+6-6clang/test/Driver/cuda-flush-denormals-to-zero.cu
+135-12726 files not shown
+189-20832 files

LLVM/project 74c1dccllvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU AMDGPUTargetParser.td GCNProcessors.td

AMDGPU: Start using subarch in attributor instead of subtarget

Avoid querying the subtarget for functions when the relevant
properties are known from the triple. The various subtarget
group size functions should also be decoupled from the subtarget,
but those are trickier to untangle.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+26-18llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+9-9llvm/lib/Target/AMDGPU/GCNProcessors.td
+15-1llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+10-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+62-285 files

LLVM/project 75e3236clang/lib/Driver Driver.cpp, clang/lib/Driver/ToolChains CommonArgs.cpp

clang: Start using new amdgpu subarch triples

Fixup invocations using --target=amdgcn + -mcpu to introduce
the subarch in the triple.

For offload toolchains, a single toolchain is constructed for the
top level amdgpu architecture, and the effective triple is used for
target specific tool invocations.

The specifics of the resource directory layout are tbd. This does
try to find resources in the subarch named directory. The paths
are searched at toolchain creation time, so that does not work
when there are multiple subarches.

Fixes #154925
DeltaFile
+59-59clang/test/Driver/offload-arch-translation-amdgpu.cu
+43-43clang/test/Driver/hip-phases.hip
+33-33clang/test/Driver/hip-binding.hip
+48-14clang/lib/Driver/ToolChains/CommonArgs.cpp
+43-12clang/lib/Driver/Driver.cpp
+54-0clang/test/CodeGen/amdgpu-builtin-processor-is-subarch.c
+280-161104 files not shown
+992-497110 files

LLVM/project 57a04e1clang/lib/Sema SemaTemplateDeduction.cpp SemaTemplateInstantiateDecl.cpp, clang/test/CXX/temp/temp.decls/temp.friend p5.cpp

Revert "[Clang] Support friend declarations with a dependent nested-name-spec…"

This reverts commit 0b672437c396b700fdb94bd64b176b33f084053b.
DeltaFile
+13-1,089clang/test/CXX/temp/temp.decls/temp.friend/p5.cpp
+105-685clang/lib/Sema/SemaAccess.cpp
+122-298clang/lib/Sema/SemaDeclCXX.cpp
+74-336clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+0-263clang/test/SemaTemplate/dependent-friend-constraints.cpp
+37-191clang/lib/Sema/SemaTemplateDeduction.cpp
+351-2,86258 files not shown
+743-3,98564 files

LLVM/project 0b67243clang/lib/Sema SemaTemplateDeduction.cpp SemaTemplateInstantiateDecl.cpp, clang/test/CXX/temp/temp.decls/temp.friend p5.cpp

[Clang] Support friend declarations with a dependent nested-name-specifier (#208345)

Fixes https://github.com/llvm/llvm-project/issues/104057

---

This patch adds support for friend declarations with a dependent NNS
DeltaFile
+1,089-13clang/test/CXX/temp/temp.decls/temp.friend/p5.cpp
+685-105clang/lib/Sema/SemaAccess.cpp
+299-123clang/lib/Sema/SemaDeclCXX.cpp
+334-72clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+263-0clang/test/SemaTemplate/dependent-friend-constraints.cpp
+191-37clang/lib/Sema/SemaTemplateDeduction.cpp
+2,861-35058 files not shown
+3,985-74364 files

LLVM/project d0b3f80llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU AMDGPUTargetParser.td GCNProcessors.td

AMDGPU: Start using subarch in attributor instead of subtarget

Avoid querying the subtarget for functions when the relevant
properties are known from the triple. The various subtarget
group size functions should also be decoupled from the subtarget,
but those are trickier to untangle.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+26-18llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+9-9llvm/lib/Target/AMDGPU/GCNProcessors.td
+15-1llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+10-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+62-285 files

LLVM/project e45007cclang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver cuda-flush-denormals-to-zero.cu amdgpu-xnack-sramecc-flags.c

clang/AMDGPU: Stop passing redundant -target-cpu to cc1

Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
DeltaFile
+62-62clang/test/Driver/amdgpu-mcpu.cl
+26-26clang/test/Driver/hip-sanitize-options.hip
+12-16clang/test/Driver/hip-rdc-device-only.hip
+19-7clang/lib/Driver/ToolChains/CommonArgs.cpp
+10-10clang/test/Driver/amdgpu-xnack-sramecc-flags.c
+6-6clang/test/Driver/cuda-flush-denormals-to-zero.cu
+135-12726 files not shown
+189-20832 files

LLVM/project 0315632clang/lib/Driver Driver.cpp, clang/lib/Driver/ToolChains CommonArgs.cpp

clang: Start using new amdgpu subarch triples

Fixup invocations using --target=amdgcn + -mcpu to introduce
the subarch in the triple.

For offload toolchains, a single toolchain is constructed for the
top level amdgpu architecture, and the effective triple is used for
target specific tool invocations.

The specifics of the resource directory layout are tbd. This does
try to find resources in the subarch named directory. The paths
are searched at toolchain creation time, so that does not work
when there are multiple subarches.

Fixes #154925
DeltaFile
+59-59clang/test/Driver/offload-arch-translation-amdgpu.cu
+43-43clang/test/Driver/hip-phases.hip
+33-33clang/test/Driver/hip-binding.hip
+48-14clang/lib/Driver/ToolChains/CommonArgs.cpp
+43-12clang/lib/Driver/Driver.cpp
+27-27clang/test/Driver/hip-options.hip
+253-188104 files not shown
+989-497110 files

LLVM/project b4c2e90llvm/include/llvm/CodeGen/GlobalISel MIPatternMatch.h, llvm/lib/Target/AArch64/GISel AArch64PostLegalizerCombiner.cpp

AArch64: Use MIPatternMatch in PostLegalizerCombiner ext checks (#216512)

Replace the getVRegDef + opcode-check idiom with mi_match. Add an
m_GSExtInReg matcher for G_SEXT_INREG, which has an extra immediate
operand and so does not fit the plain unary-op matcher shape.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+21-0llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+3-3llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
+24-32 files

LLVM/project de0f427llvm/lib/CodeGen/GlobalISel Utils.cpp LegalizerHelper.cpp

GlobalISel: Use m_GImplicitDef instead of getVRegDef opcode checks (#216513)

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+1-2llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+1-1llvm/lib/CodeGen/GlobalISel/Utils.cpp
+2-32 files

LLVM/project 48030bdllvm/lib/Target/RISCV/GISel RISCVLegalizerInfo.cpp

RISCV: Use m_GImplicitDef instead of getVRegDef + opcode check (#216514)

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+3-2llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+3-21 files

LLVM/project 1d1a003llvm/lib/Target/X86 X86InstrInfo.cpp, llvm/test/CodeGen/X86 optimize-compare-undef.mir

X86: Fix optimizeCompareInstr crash on a compare from an undef register

getVRegDef returns null for undef sources, so the assert would fire.
Found by AI while working on other stuff.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+23-0llvm/test/CodeGen/X86/optimize-compare-undef.mir
+2-1llvm/lib/Target/X86/X86InstrInfo.cpp
+25-12 files

LLVM/project d25587allvm/lib/CodeGen PeepholeOptimizer.cpp, llvm/test/CodeGen/X86 peephole-valuetracker-undef.mir

PeepholeOpt: Fix crash on copy from an undef register

Fix ValueTracker looking at the def chain of an undef subregister.
Found by AI while working on something else.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+17-0llvm/test/CodeGen/X86/peephole-valuetracker-undef.mir
+5-2llvm/lib/CodeGen/PeepholeOptimizer.cpp
+22-22 files

LLVM/project bfb662bcompiler-rt/test/asan lit.cfg.py

[ASan] Register assert lit feature in `lit.cfg.py` (#216529)

Add this feature to test a functional change related to asserts, see
https://github.com/llvm/llvm-project/pull/213546#discussion_r3790705838.

And this will allow other people to add `// REQUIRES: asserts` in
testcases in the future too.

I follow the same pattern already used in `flang/test/lit.cfg.py` and
other configs.
DeltaFile
+2-0compiler-rt/test/asan/lit.cfg.py
+2-01 files

LLVM/project be5ecb9llvm/utils/gn/secondary/llvm/lib/ABI BUILD.gn, llvm/utils/gn/secondary/llvm/unittests BUILD.gn

[gn] port 5f491a454cb8 (ABITests) (#216527)
DeltaFile
+10-0llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/unittests/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/lib/ABI/BUILD.gn
+12-03 files

LLVM/project a5d0398clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp, clang/test/Analysis/Scalable/TypeConstrainedPointers unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp unsafe-buffer-reachable-excludes-type-constrained-main.cpp

[SSAF][UnsafeBufferAnalysis] Address follow up questions after the approval of #209354

- The analysis should not create entries for empty contributors, which otherwise is non-empty in the serialized format.
- use std IO instead of a tmp file for regex-ing FileCheck queries.

rdar://179151541 & rdar://179151882
DeltaFile
+3-8clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-main.cpp
+3-2clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+1-2clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp
+7-123 files

LLVM/project 503c01allvm/include/llvm/Transforms/Utils Local.h, llvm/lib/Transforms/Utils Local.cpp

 [DebugInfo][NFC] Refactor debug record salvage (#215971)

Split address and variable-location salvage into helpers so the ordering
and the kill fallback stay visible in salvageDebugInfoForDbgValues, with the
variable-location helper returning whether it processed the record.
Rename the locals and parameters the move touches to say what they hold, and use
isAddressOfVariable() for the two #dbg_declare tests, which is the same
comparison.

Replace the address helper's single-use template with DbgVariableRecord
and pass it the instruction the caller already checked, rather than
recovering it with a dyn_cast the caller's check already covers.

Add a unit test for the dbg.assign address path.

No regressions on check-llvm or check-lldb; ran about 80 auto-generated C tests with 225ish locations and no differences in DW_AT_location on aarch64 at O2.

Assisted by AI.
DeltaFile
+85-77llvm/lib/Transforms/Utils/Local.cpp
+68-0llvm/unittests/Transforms/Utils/LocalTest.cpp
+2-2llvm/include/llvm/Transforms/Utils/Local.h
+155-793 files

LLVM/project 59d202cclang/lib/CIR/CodeGen CIRGenFunction.h CIRGenFunction.cpp, clang/test/CIR/CodeGenSYCL kernel-caller-entry-point.cpp

[CIR][SYCL] Device kernel caller (#213771)

During device compilation, emit a SYCL kernel caller offload entry point
in
place of each function declared with the sycl_kernel_entry_point
attribute,
mirroring classic CodeGen's `CodeGenModule::EmitSYCLKernelCaller`.

Depends on #213728
DeltaFile
+113-0clang/lib/CIR/CodeGen/CIRGenSYCL.cpp
+63-8clang/test/CIR/CodeGenSYCL/kernel-caller-entry-point.cpp
+15-0clang/lib/CIR/CodeGen/CIRGenTypes.cpp
+7-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+6-3clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+8-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+212-144 files not shown
+234-1410 files

LLVM/project 1c66431clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp, clang/test/Analysis/Scalable/TypeConstrainedPointers unsafe-buffer-reachable-excludes-type-constrained-main.cpp

address final comments after approval
DeltaFile
+3-8clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-main.cpp
+3-2clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+6-102 files

LLVM/project cbb5626clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp, clang/test/Analysis/Scalable/PointerFlow multi-dim-pointer-flow-constraint.test multi-decl-contributor.cpp

[SSAF][UnsafeBufferAnalysis] Filter out type-constrained pointers from reachable unsafe pointers (#209354)

Integrate the TypeConstrainedPointers analysis results into
UnsafeBufferReachableAnalysis. The final result is filtered to exclude
type-constrained pointers.

The pointer flow graph is untouched. Removing type-constrained pointers
from the graph would introduce unsoundness.

Final step for rdar://179151541 and rdar://179151882
DeltaFile
+112-0clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-new-delete.cpp
+68-18clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+60-0clang/test/Analysis/Scalable/TypeConstrainedPointers/unsafe-buffer-reachable-excludes-type-constrained-main.cpp
+26-0clang/test/Analysis/Scalable/ssaf-analyzer/Outputs/empty-pairs.json
+1-1clang/test/Analysis/Scalable/PointerFlow/multi-dim-pointer-flow-constraint.test
+1-1clang/test/Analysis/Scalable/PointerFlow/multi-decl-contributor.cpp
+268-202 files not shown
+270-228 files

LLVM/project 16d1129llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/lib/Support APFloat.cpp

[APFloat][SelectionDAG] Support Float8E5M3FNU in convert.{to,from}.arbitrary.fp

Float8E5M3FNU was already accepted by the IR verifier, because
isValidArbitraryFPFormat is defined in terms of
getArbitraryFPFormatSizeInBits and that table covers it. It was missing
from getArbitraryFPSemantics, so SelectionDAGBuilder rejected
it with "not implemented format" and the verifier-clean IR failed to
compile. Add the mapping and the corresponding entries in the
expandCONVERT_{TO,FROM}_ARBITRARY_FP format allowlists.

Unlike every other format the expansions handle so far, Float8E5M3FNU is
unsigned: it has no sign bit, so all 8 bits go to a 5-bit exponent and a
3-bit significand.

Since an unsigned format cannot represent a negative value, a negative
input now saturates to zero when the saturate flag is set, and is poison
otherwise. -0.0 is excluded from that and still converts to +0, and the
check is ordered before the NaN case so a negative NaN still produces the
NaN encoding. APFloat treats constructing a negative value in an unsigned

    [3 lines not shown]
DeltaFile
+263-0llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-e5m3fnu.ll
+189-0llvm/test/CodeGen/X86/float-to-arbitrary-fp.ll
+37-11llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+2-2llvm/lib/Support/APFloat.cpp
+2-1llvm/unittests/ADT/APFloatTest.cpp
+493-145 files

LLVM/project ca01779llvm/unittests/ADT APFloatTest.cpp

[APFloat][NFC] Add unit test coverage for `getArbitraryFPSemantics` (#216501)

`isValidArbitraryFPFormat` and `getArbitraryFPFormatSizeInBits` have
unit tests, but `getArbitraryFPSemantics`, the mapping the conversion
intrinsics actually lower through, had none. Cover the formats it
supports, the valid formats it does not support yet, and invalid format
strings, and check that the two tables agree on the size of every format
with lowerable semantics.

Also add the missing Float8E5M3FNU case to the
`getArbitraryFPFormatSizeInBits` test.
DeltaFile
+45-0llvm/unittests/ADT/APFloatTest.cpp
+45-01 files

LLVM/project 2393da9llvm/lib/Target/AArch64/GISel AArch64PostLegalizerLowering.cpp, llvm/test/CodeGen/AArch64/GlobalISel arm64-atomic.ll

[AArch64][GlobalISel] Do not create atomic truncstore (#216522)

After #213935 the i64->i32 truncstore was failing to create a COPY
correctly.
We do not have tablegen patterns, so mirror what SDAG does and do not
create
atomic truncstore.
DeltaFile
+2,202-1,876llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
+2-0llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+2,204-1,8762 files

LLVM/project 86502ddllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 reduction-vals-used-as-load-indices.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+27-30llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+36-19llvm/test/Transforms/SLPVectorizer/X86/reduction-vals-used-as-load-indices.ll
+63-492 files

LLVM/project b8afe9fllvm/test/Transforms/SLPVectorizer/X86 reduction-vals-used-as-load-indices.ll

[SLP][NFC]Add a test with non-profitable vectorization for GEPs external users, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/216518
DeltaFile
+202-0llvm/test/Transforms/SLPVectorizer/X86/reduction-vals-used-as-load-indices.ll
+202-01 files

LLVM/project e1ece3dclang/test/CodeGen/Mips variadic-aggregate.c

[MIPS][NFC] test mips variadic aggregate handling (#216509)

mips64 has some bugs here that I'll address in a followup. The problem
is that we get `inreg {float}` items in the variable argument list. That
breaks for aggregates like `_Complex long double` or just `struct { long
double a; b }`.
DeltaFile
+2,162-0clang/test/CodeGen/Mips/variadic-aggregate.c
+2,162-01 files

LLVM/project 85cffe6llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp

AMDGPU: Use m_GTrunc in selector def check (#216511)

Prefer mi_match over raw getVRegDef + opcode checks.
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+1-11 files

LLVM/project 6d9a775utils/bazel/llvm-project-overlay/libc BUILD.bazel, utils/bazel/llvm-project-overlay/libc/test/src/math BUILD.bazel

[libc][bazel] Update bazel overlay for ceilf128 emulated float128 changes (#216515)

This updates the Bazel overlay following commit
e5174fe683e882f6bbd2ef023c9c9e293b273a98:

- Remove `:llvm_libc_types_float128` from `__support_math_ceilf128` deps
as `include/llvm-libc-types/float128.h` is no longer included.
- Add `:__support_cpp_bit` to `ceilf128` additional_deps for `bit_cast`.
- Add `ceilf128` math MPFR test target in
`libc/test/src/math/BUILD.bazel`.
DeltaFile
+5-0utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
+1-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+6-12 files