LLVM/project 7028c00llvm/utils/gn/secondary/llvm/lib/ProfileData BUILD.gn, llvm/utils/gn/secondary/llvm/unittests/ProfileData BUILD.gn

[gn build] Port f3f28323adbb
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/ProfileData/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/unittests/ProfileData/BUILD.gn
+2-02 files

LLVM/project f63fea6llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

run 'git merge main'
DeltaFile
+179,544-46,253llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+65,516-15,998llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+44,078-14,302llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+40,683-13,196llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+37,403-12,067llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+34,106-10,852llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+401,330-112,6684,374 files not shown
+892,081-272,4824,380 files

LLVM/project dae5c4ellvm/test/CodeGen/RISCV mul-expand.ll ctz_zero_return_test.ll

[RISCV] Expand constant multiplication for targets without M extension (#137195)

Closes #137023

On RISC-V machines without a native multiply instruction (e.g., `rv32i`
base), multiplying a variable by a constant integer often compiles to a
call to a library routine like `__mul{s,d}i3`.

```assembly
        .globl __mulxi3
        .type  __mulxi3, @function
__mulxi3:
        mv     a2, a0
        mv     a0, zero
.L1:
        andi   a3, a1, 1
        beqz   a3, .L2
        add    a0, a0, a2
.L2:

    [15 lines not shown]
DeltaFile
+411-93llvm/test/CodeGen/RISCV/mul-expand.ll
+224-136llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
+196-150llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
+234-62llvm/test/CodeGen/RISCV/mul.ll
+155-76llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
+103-57llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
+1,323-5746 files not shown
+1,537-66912 files

LLVM/project 8d63afbllvm/include/llvm/BinaryFormat DXContainer.h, llvm/include/llvm/MC DXContainerRootSignature.h

[NFC] Refactoring MCDXBC to support out of order storage of root parameters (#137284)

This PR refactors mcdxbc data structure for root signatures to support
out of order storage of in memory root signature data.
closes: #139585

---------

Co-authored-by: joaosaffran <joao.saffran at microsoft.com>
DeltaFile
+63-6llvm/include/llvm/MC/DXContainerRootSignature.h
+35-25llvm/lib/Target/DirectX/DXILRootSignature.cpp
+23-17llvm/lib/MC/DXContainerRootSignature.cpp
+18-12llvm/lib/ObjectYAML/DXContainerEmitter.cpp
+1-1llvm/include/llvm/BinaryFormat/DXContainer.h
+140-615 files

LLVM/project f3f2832llvm/include/llvm/ProfileData DataAccessProf.h InstrProf.h, llvm/lib/ProfileData DataAccessProf.cpp InstrProf.cpp

[StaticDataLayout][PGO] Add profile format for static data layout, and the classes to operate on the profiles. (#138170)

Context: For
https://discourse.llvm.org/t/rfc-profile-guided-static-data-partitioning/83744#p-336543-background-3,
we propose to profile memory loads and stores via hardware events,
symbolize the addresses of binary static data sections and feed the
profile back into compiler for data partitioning.

This change adds the profile format for static data layout, and the
classes to operate on it.

The profile and its format
1. Conceptually, a piece of data (call it a symbol) is represented by
its symbol name or its content hash. The former applies to majority of
data whose mangled name remains relatively stable over binary releases,
and the latter applies to string literals (with name patterns like
`.str.<N>[.llvm.<hash>]`.
- The symbols with samples are hot data. The number of hot symbols is
small relative to all symbols. The profile tracks its sampled counts and

    [22 lines not shown]
DeltaFile
+265-0llvm/lib/ProfileData/DataAccessProf.cpp
+214-0llvm/include/llvm/ProfileData/DataAccessProf.h
+182-0llvm/unittests/ProfileData/DataAccessProfTest.cpp
+12-5llvm/include/llvm/ProfileData/InstrProf.h
+2-6llvm/lib/ProfileData/InstrProf.cpp
+1-0llvm/lib/ProfileData/CMakeLists.txt
+676-111 files not shown
+677-117 files

LLVM/project 97ad399llvm/lib/MC/MCParser AsmParser.cpp, llvm/lib/Target/Hexagon/AsmParser HexagonAsmParser.cpp

MCParser: Move LCurly/RCurly testing into tokenIsStartOfStatement

Commit 8a0453e23abf27433b7539b2da2060d2df9fb39c (2015) added LCurly and
RCurly cases for Hexagon instruction bundles. While gas x86 also adopted
`{` in 2017 for pseudo prefixes (see `tc_symbol_chars`), `{` remains
uncommon among targets. Move `{` and `}` parsing into the newly
introduced `tokenIsStartOfStatement` hook (#137997).

Pull Request: https://github.com/llvm/llvm-project/pull/140101
DeltaFile
+0-9llvm/lib/MC/MCParser/AsmParser.cpp
+7-0llvm/test/MC/AsmParser/token.s
+5-0llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+4-0llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+16-94 files

LLVM/project e9a9dbcllvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV mul.ll

Address review comments
DeltaFile
+45-45llvm/test/CodeGen/RISCV/mul.ll
+11-15llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+56-602 files

LLVM/project c74da90llvm/include/llvm/Demangle ItaniumDemangle.h, llvm/include/llvm/IR User.h

add preferred type annotations i inexplicably didn't add earlier and remove the MathExtras.h noise
DeltaFile
+0-5llvm/include/llvm/Support/MathExtras.h
+1-1llvm/include/llvm/Demangle/ItaniumDemangle.h
+2-0llvm/include/llvm/IR/User.h
+3-63 files

LLVM/project 56aa935flang-rt/include/flang-rt/runtime emit-encoded.h, flang-rt/lib/runtime edit-input.cpp

[flang-rt] Fix warnings

This patch fixes:

  flang-rt/include/flang-rt/runtime/emit-encoded.h:67:27: error:
  implicit conversion from 'const char16_t' to 'char32_t' may change
  the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]

  flang-rt/lib/runtime/edit-input.cpp:1114:18: error: implicit
  conversion from 'char32_t' to 'char16_t' may lose precision and
  change the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]

  flang-rt/lib/runtime/edit-input.cpp:1133:18: error: implicit
  conversion from 'char32_t' to 'char16_t' may lose precision and
  change the meaning of the represented code unit
  [-Werror,-Wcharacter-conversion]


    [9 lines not shown]
DeltaFile
+4-4flang-rt/lib/runtime/edit-input.cpp
+1-1flang-rt/include/flang-rt/runtime/emit-encoded.h
+5-52 files

LLVM/project 8d3a707mlir/include/mlir/Target/LLVMIR ModuleImport.h, mlir/lib/Target/LLVMIR ModuleImport.cpp

[MLIR][LLVM] Improve inline asm importer (#139989)

Add support for importing more information into InlineAsmOp:
elementtype, side effects, align stack, asm dialect and operand attrs.
DeltaFile
+43-2mlir/test/Target/LLVMIR/Import/instructions.ll
+40-3mlir/lib/Target/LLVMIR/ModuleImport.cpp
+23-1mlir/test/Target/LLVMIR/llvmir.mlir
+3-0mlir/include/mlir/Target/LLVMIR/ModuleImport.h
+2-0mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
+111-65 files

LLVM/project f73da9ellvm/test/CodeGen/RISCV mul-expand.ll ctz_zero_return_test.ll

[RISCV] Expand constant multiplication for targets without M extension
DeltaFile
+278-93llvm/test/CodeGen/RISCV/mul-expand.ll
+224-136llvm/test/CodeGen/RISCV/ctz_zero_return_test.ll
+253-97llvm/test/CodeGen/RISCV/mul.ll
+191-151llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
+157-70llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
+103-57llvm/test/CodeGen/RISCV/rv64xtheadbb.ll
+1,206-6046 files not shown
+1,491-70012 files

LLVM/project 605f1a4llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV mul-expand.ll mul.ll

Address review comments
DeltaFile
+321-188llvm/test/CodeGen/RISCV/mul-expand.ll
+138-122llvm/test/CodeGen/RISCV/mul.ll
+89-83llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
+15-81llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+44-52llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
+607-5265 files

LLVM/project de0bcd0llvm/lib/Target/RISCV RISCVRegisterInfo.cpp, llvm/test/CodeGen/RISCV stack-offset.ll

[RISCV] Use QC_E_ADDI while eliminating the frameindex (#139515)

The QC_E_ADDI instruction from the Xqcilia extension takes a signed
26-bit immediate and can be used instead of splitting the offset across
two ADDI's while eliminating the frameindex.
DeltaFile
+196-0llvm/test/CodeGen/RISCV/stack-offset.ll
+24-0llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+220-02 files

LLVM/project 980a6faclang/include/clang/Basic DiagnosticCategories.h, clang/lib/Basic DiagnosticIDs.cpp

More changes to make things better, for a given value of better
DeltaFile
+8-4llvm/include/llvm/Bitstream/BitCodes.h
+4-5llvm/include/llvm/Demangle/ItaniumDemangle.h
+4-0clang/lib/Basic/DiagnosticIDs.cpp
+1-1clang/include/clang/Basic/DiagnosticCategories.h
+17-104 files

LLVM/project 5c25061.github new-prs-labeler.yml

[MLGO]{Github] Add MLGO docs page to the MLGO PR subscriber group

This ensures that the MLGO PR subscriber team gets pinged if the document gets
modified which makes sense given it is MLGO specific.
DeltaFile
+1-0.github/new-prs-labeler.yml
+1-01 files

LLVM/project b07e19fclang/lib/CodeGen CGClass.cpp

[NFCI][cfi] Refactor into 'SanitizerInfoFromCFICheckKind' (#140117)

This refactors existing code into a 'SanitizerInfoFromCFICheckKind'
helper function. This will be useful in future work to annotate CFI
checks with debug info
(https://github.com/llvm/llvm-project/pull/139809).
DeltaFile
+24-24clang/lib/CodeGen/CGClass.cpp
+24-241 files

LLVM/project 2ecc621llvm/include/llvm/ProfileData DataAccessProf.h

move type comment before  statement
DeltaFile
+2-2llvm/include/llvm/ProfileData/DataAccessProf.h
+2-21 files

LLVM/project 6ec3604mlir/lib/Dialect/XeGPU/Transforms XeGPUInstructionlize.cpp, mlir/lib/Dialect/XeGPU/Utils XeGPUUtils.cpp

cleanup layout attr
DeltaFile
+46-26mlir/lib/Dialect/XeGPU/Transforms/XeGPUInstructionlize.cpp
+4-2mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
+50-282 files

LLVM/project a29291ellvm/lib/Target/AMDGPU SIInstrInfo.td VOP1Instructions.td

[AMDGPU] Automate creation of byte_sel dags. NFCI.
DeltaFile
+20-7llvm/lib/Target/AMDGPU/SIInstrInfo.td
+0-11llvm/lib/Target/AMDGPU/VOP1Instructions.td
+1-10llvm/lib/Target/AMDGPU/VOP3Instructions.td
+21-283 files

LLVM/project 6d7b5c3clang/test/CIR/CodeGenOpenACC data.c kernels.c

[OpenACC][CIR] Update tests after #140122

Patch #140122 changed the format of OpenACC 'async', without changing
the clang tests.  This patch updates the test.
DeltaFile
+8-8clang/test/CIR/CodeGenOpenACC/data.c
+8-8clang/test/CIR/CodeGenOpenACC/kernels.c
+8-8clang/test/CIR/CodeGenOpenACC/parallel.c
+8-8clang/test/CIR/CodeGenOpenACC/serial.c
+3-3clang/test/CIR/CodeGenOpenACC/wait.c
+35-355 files

LLVM/project 642d5d7llvm/utils/gn/secondary/clang/unittests/CIR BUILD.gn

[gn] "port" fc7857ca95bb (CIRUnitTests)

CIRUnitTests depends on mlir, so create a dummy target to make
the sync script happy. (This is behind CLANG_ENABLE_CIR in cmake.)
DeltaFile
+5-0llvm/utils/gn/secondary/clang/unittests/CIR/BUILD.gn
+5-01 files

LLVM/project 6ab87b2llvm/lib/Passes PassRegistry.def

order

Created using spr 1.3.4
DeltaFile
+1-1llvm/lib/Passes/PassRegistry.def
+1-11 files

LLVM/project 136f2baclang/docs ReleaseNotes.rst, clang/lib/AST ExprConstant.cpp

[Clang][AST] Fix HandleLValueBase to deal with references (#140105)

Since P2280R4 Unknown references and pointers was implemented,
HandleLValueBase now has to deal with referneces:

D.MostDerivedType->getAsCXXRecordDecl()

will return a nullptr if D.MostDerivedType is a ReferenceType. The fix
is to use getNonReferenceType() to obtain the Pointee Type if we have a
reference.

Fixes: https://github.com/llvm/llvm-project/issues/139452
DeltaFile
+21-0clang/test/SemaCXX/constant-expression-p2280r4.cpp
+5-1clang/lib/AST/ExprConstant.cpp
+2-0clang/docs/ReleaseNotes.rst
+28-13 files

LLVM/project f113cabllvm/lib/Target/AMDGPU VOPInstructions.td SIInstrInfo.td

[AMDGPU] Cleanup bytesel variables. NFC. (#140131)

Somehow we ended up with 2 sets of td variables: Is...ByteSel and
Has...ByteSel. Keep only Has... form.
DeltaFile
+8-8llvm/lib/Target/AMDGPU/VOPInstructions.td
+3-4llvm/lib/Target/AMDGPU/SIInstrInfo.td
+1-1llvm/lib/Target/AMDGPU/VOP1Instructions.td
+0-1llvm/lib/Target/AMDGPU/VOP3Instructions.td
+12-144 files

LLVM/project 071898bllvm/lib/Target/AMDGPU SIInstrInfo.td VOP1Instructions.td

[AMDGPU] Automate creation of byte_sel dags. NFCI.
DeltaFile
+15-6llvm/lib/Target/AMDGPU/SIInstrInfo.td
+0-11llvm/lib/Target/AMDGPU/VOP1Instructions.td
+1-10llvm/lib/Target/AMDGPU/VOP3Instructions.td
+16-273 files

LLVM/project 8e53e3bllvm/include/llvm/CodeGen MachineOperand.h

Fix comment mentioning nonexistent parameter (#140138)

Don't mention nonexistent parameter in comment. The parameter was
removed in https://github.com/llvm/llvm-project/pull/126003 .
DeltaFile
+4-6llvm/include/llvm/CodeGen/MachineOperand.h
+4-61 files

LLVM/project 0bc316abolt/lib/Profile Heatmap.cpp

drop alignTo

Created using spr 1.3.4
DeltaFile
+1-1bolt/lib/Profile/Heatmap.cpp
+1-11 files

LLVM/project 1e1ef44bolt/include/bolt/Profile Heatmap.h, bolt/lib/Profile DataAggregator.cpp Heatmap.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+15-0bolt/lib/Profile/DataAggregator.cpp
+14-1bolt/lib/Profile/Heatmap.cpp
+13-1bolt/test/X86/heatmap-preagg.test
+3-0bolt/include/bolt/Profile/Heatmap.h
+45-24 files

LLVM/project a3c4a5cllvm/docs MLGO.rst

[MLGO][Docs] Add documentation on corpus tooling (#139362)

This adds some documentation on the three corpus tools, some examples,
and fixes the TODO telling me to get this done.
DeltaFile
+174-2llvm/docs/MLGO.rst
+174-21 files

LLVM/project f01f082llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU fptrunc.v2f16.no.fast.math.ll fptrunc.v2f16.no.fast.path.ll

AMDGPU: Make v2f32 -> v2f16 legal when target supports v_cvt_pk_f16_f32 (#139956)

If targets support v_cvt_pk_f16_f32 instruction, v2f32 -> v2f16 should
be legal. However, SelectionDAG does not allow us to specify the source
type in the legalization rules. To workaround this, we make FP_ROUND
Custom for v2f16 then set up v2f32 -> v2f16 to be legal during custom
lowering.

Fixes: SWDEV-532608 -- expected v_cvt_pk_f16_f32 was not generated.
DeltaFile
+207-0llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.math.ll
+0-193llvm/test/CodeGen/AMDGPU/fptrunc.v2f16.no.fast.path.ll
+10-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+217-1943 files