[WebKit Checkers] Add built-in recognition for standard view types (#226350)
libc++ doesn't fully annotate `[[clang::lifetimebound]]` for all view
types. This results in false negatives in borrow checking.
Ultimately we need to fix this in libc++, but for now we can work around
the most common / most important false negatives. For example, borrow
checking can now check
for (auto& x : vector | std::views::reverse) { ... }
Assisted-by: Claude
[libc++] Add static_assert diagnostics for LWG3133 named requirements (#212360)
Add a static_assert to both std::complex<T> and std::valarray<T>
requiring that T be a cv-unqualified object type that satisfies the
Cpp17DefaultConstructible, Cpp17CopyConstructible, Cpp17CopyAssignable,
and Cpp17Destructible named requirements, per the revised wording in
[numeric.requirements]. This mirrors the existing pattern already used
by std::optional<T>.
Non-_v (class-style) trait forms are used throughout so that the
assertion is well-formed even when <complex>/<valarray> are included in
C++03/11/14 mode.
Test coverage:
- A .verify.cpp for complex<T> and one for valarray<T>, each covering
six failure modes: cv-qualified types, and one type violating each of
the four named requirements individually.
Follows-up e062a29cf865bb7cadea6cb605c9f3515e5b883f.
[Transforms] Remove unused functions (NFC) (#226655)
createAnyOfReduction:
The last caller was removed on January 18, 2026 in commit
ae1bd068db293c494c4c6314da3b9d138706460d.
canHaveUnrollRemainder:
The last caller, in an assert, was removed on May 1, 2026 in commit
316f0d3bfeaf7eee7b6d4ae60d357a8216ec5264.
Assisted-by: Antigravity
[VPlan] Mark default value or ExtractLastActive as only first lane used. (#226153)
The default value (operand 0) of ExtractLastActive is the scalar value
of @llvm.experimental.vector.extract.last.active. Only the first lane is
used, mark accordingly.
PR: https://github.com/llvm/llvm-project/pull/226153
[lld][LoongArch] Prevent relaxation oscillation for PCHi20 and CALL
Relaxation of pcalau12i+addi (relaxPCHi20Lo12, isInt<22>) and
call36/call30 (relaxMediumCall, isInt<28>) can oscillate: shrinking
one section moves a symbol, which flips isInt<N> for other sites and
changes bytesDropped again. In large programs (e.g. Rust) the PC of
a site can stabilize while Dest jitter near the range limit, so
remove keeps alternating between 0 and 4 and relaxOnce never settles.
Follow the same approach as RISCV::relaxCall: after a few passes, do
not allow remove to increase beyond the previous pass's value
(cur - delta). Pass that cap as prevRemove into the two helpers;
range checks may still clear remove (0) when the target goes out of
range.
No reduced in-tree stress test: the failure is layout- and
input-order-sensitive and was validated against a fixed response-file
reproduction in the bug issue.
[CodeGen] Keep wave-profiled spill frequencies positive
SpillPlacement expects positive block weights, but a valid wave profile can
record zero executions for a CFG-reachable block. Giving such a block zero
spill cost can make the allocator choose a very different placement.
Clamp every accepted wave-derived frequency to at least one, as we already
do for nonzero counts that round down to zero. Unmeasured or rejected blocks
still use their existing MBFI frequency. Add a focused MIR test for a valid
zero-wave record.
This pattern arose in a profiled Composable Kernel convolution case. With
the separate spill correctness fixes and partial spilling enabled, the
zero-cost policy failed two CPU-reference checks; the positive floor passed
both. The test checks the cost directly; the application result was checked
separately on gfx950.
[Clang][OpenMP] Optimize `collapse` IV bit-width precision expression (#225612)
`collapse` used to build both a 32-bit and a 64-bit trip-count, then
keep one.
This patch does the same in `checkOpenMPLoop`:
If we know 32-bit is enough, build only 32-bit.
Else build 64-bit first.
Build 32-bit only when the product is a compile-time constant and fits.
Origin: `flatten` already builds only the width it keeps.
[CIR][CUDA] Read fat binary in CIRGen and store its bytes on the module (#225971)
Two problems with the current implementation of GPU CIR:
1. `LoweringPrepare` read the fat binary from disk, via
`astCtx->getSourceManager().getFileManager().getVirtualFileSystem()`. A
transform pass should not do I/O, and this is one of the `ASTContext`
dependencies that keeps the post-CIRGen pipeline from being IR-to-IR.
Some of the related discussion on this has been done
[here](https://discourse.llvm.org/t/rfc-clangir-making-cir-pipeline-boundaries-first-class-driver-artifacts/90998)
and PR: #219048
2. `#cir.cu.binary_handle` stored the *file path*. That's a build input,
not a
property of the program: it bakes one machine's directory layout into a
`.cir`.
The PR removes the file path and adds an attribute
CIRGen now reads the file in and records the contents
as `#cir.cu.device_binary`, a `StringAttr` of raw bytes. The
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[NFC][SLP][AMDGPU] Precommit a cross-block fmul fadd contraction test (#226609)
Two contract fmuls feed contract fadds in different successors. AMDGPU
sinks such an fmul into the block of its user and fuses the pair, so the
scalar form is one fma per path. Record the current behaviour, the pair
is kept scalar when the fmul is operand 0 of the fadd and paired when it
is operand 1.
[SSAF] Close unsafe-buffer reachability over override families
An unsafe pointer reaching one override's parameter is equally unsafe in every
sibling and base override of that method, because the call site picks the
target dynamically. Without closing over the families, reachability depended
on which override the extractor happened to see the flow through, so a fix
suggested for the base could be contradicted by a derived override.
- Mirroring is level-preserving: families relate slot entities, so a reachable
EPL propagates only to the same pointer level on its family members.
- Mirroring happens inside the pointer-flow search, so flows out of a mirrored
EPL are followed too.
- Type-constrained slots are never mirrored onto, so C3 still holds.
§4 of rdar://179151603
Assisted-By: claude
[SSAF] Serialize virtual method summaries and families
Per-TU summaries and whole-program results cross process boundaries, and the
JSON layer refuses to write a summary kind it has no format for. Register both
sides so --ssaf-extract-summaries=VirtualMethod becomes usable and the family
result survives a round trip.
Deserialization tolerates a missing override list, since a root virtual method
legitimately has none.
§3 of rdar://179151603
[SSAF] Drop the unused OwnerMethodId from method families
The only consumer, the unsafe-buffer reachability closure, needs just the family
a slot belongs to.
- Recording the owning method cost a map per analysis and a field per slot for
nothing.
- With only the family left, the per-slot `Data` collapses into a plain
slot-to-family map.
Assisted-By: claude
[SSAF] Drop the dead MethodFamilyUnionFind::seed overloads
Nothing calls either overload; they are scaffolding left over from the
prototype this analysis was extracted from.
- `Roots` is populated entirely by the lazy self-rooting in `find()`,
reached via `unionSets()`.
- `seed(E, Owner)` ignored `Owner` altogether. The parameter only existed
because `seed(Owner, S)` was copy-pasted from
`Owners::recordOwner(Owner, S)`, which does need it.
- Where the prototype did call `seed`, it ran immediately above
`unionSets()` over the same entities, so it was a no-op there too.
Also document that a virtual method with no override relation contributes
no entries, so the omission reads as deliberate rather than as a gap.
Assisted-By: claude
[SSAF] Group virtual method slots into override families
A virtual call site can dispatch to any override, so the parameter and return
slots that occupy the same vtable slot across an override chain are
indistinguishable to a caller. Whole-program consumers therefore have to treat
them as one unit or they will reason about a slot that a call never actually
reaches.
Compute those units up front, keyed per slot, so consumers only need a map
lookup rather than their own traversal of the override relation. Overloads
occupy distinct vtable slots and stay in distinct families.
The family representative is the smallest EntityId in the class, which keeps
the result stable across runs.
§2 of rdar://179151603
[SSAF] Extract the virtual method override relation per TU (#213316)
A virtual call may dispatch to any override of its callee, so a whole-program
analysis cannot reason about a method's parameters and return value in
isolation. It needs to know which method overrides which, and which slots
that relates. Collect this per TU, so a later pass can join the related
slots into families.
JSON serialization lands separately, so the summary is not writable via
`--ssaf-extract-summaries` yet.
§1 of rdar://179151603
Assisted-By: claude
[SLP]Do not reuse transformed nodes in gathers emitted before their user
Gathers of the users with all scalars used outside the block are emitted
before the user, while the transformed nodes are emitted with the user.
Reusing such a transformed node postponed the gather and moved only the
last instruction of the transformed node buildvector, breaking dominance.
Fixes #226674
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226687
[mlir] Avoid rewriting unreachable blocks in the greedy driver
A rewrite can disconnect a block after the iteration's initial CFG sweep.
Track reachability through rewriter notifications and skip worklist
operations in unreachable blocks until the next iteration removes them.
Cache reachability per region and compare final successors after each
rewrite. Preserve the cache for successor-equivalent changes, added edges,
and block merges that keep surviving blocks reachable. Recompute for other
CFG changes, including entry changes and cross-region block moves.
Keep cache updates separate from reachability queries, returning failure
when a full traversal is required. Collect each successor set once for
validation and retain compact vector snapshots in the cache. Check
containing blocks when querying operations in nested regions, caching the
ancestor result until listener notifications invalidate it.
Cover inserted and redirected blocks, blocks connected before rewrite
completion, nested regions, block moves and merges, and explicit op lists.
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[mlir] Enable strict properties in assembly formats by default (#225742)
Make strict property assembly formats the default and remove redundant
per-dialect settings. Keep legacy test fixtures explicitly opted out and
update the documentation.
Downstream can opt out for now using `let
useStrictPropertiesInAssemblyFormat = 0;` ; This will be removed in a
future release.
Part of #155475
Assisted-by: Codex
[mlir] Avoid rewriting unreachable blocks in the greedy driver
A rewrite can disconnect a block after the iteration's initial CFG sweep.
Track reachability through rewriter notifications and skip worklist
operations in unreachable blocks until the next iteration removes them.
Cache reachability per region and compare final successors after each
rewrite. Preserve the cache for successor-equivalent changes, added edges,
and block merges that keep surviving blocks reachable. Recompute for other
CFG changes, including entry changes and cross-region block moves.
Keep cache updates separate from reachability queries, returning failure
when a full traversal is required. Collect each successor set once for
validation and retain compact vector snapshots in the cache. Check
containing blocks when querying operations in nested regions.
Cover inserted and redirected blocks, blocks connected before rewrite
completion, nested regions, block moves and merges, and explicit op lists.
Use observer diagnostics to check whether affected operations are processed
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[orc-rt] SimpleRemoteCAOverSocket: require a stream socket. (#226676)
SimpleRemote framing reads each message in as many parts as the socket
delivers it, which a socket that preserves message boundaries (datagram,
seqpacket) would truncate. Check SO_TYPE up front and reject anything
but SOCK_STREAM; the socket is owned by then, so it is closed on
failure.
Assisted-by: Claude
[AArch64] Use SVE rev for full reverse shuffles with SVE128 (#224589)
When the vscale_range is always 1, we can make use of the SVE rev
instruction to perform a full 128bit vector reverse.
Sidesteps #223597 for SVE128
[SSAF] Close unsafe-buffer reachability over override families
An unsafe pointer reaching one override's parameter is equally unsafe in every
sibling and base override of that method, because the call site picks the
target dynamically. Without closing over the families, reachability depended
on which override the extractor happened to see the flow through, so a fix
suggested for the base could be contradicted by a derived override.
- Mirroring is level-preserving: families relate slot entities, so a reachable
EPL propagates only to the same pointer level on its family members.
- Mirroring happens inside the pointer-flow search, so flows out of a mirrored
EPL are followed too.
- Type-constrained slots are never mirrored onto, so C3 still holds.
§4 of rdar://179151603
Assisted-By: claude
[MLIR][IRDL] Instantiate "." in IRDL-defined names as nested namespaces (#207035)
In PR #187911, it was revealed that the constraints on IRDL op names
placed by irdl-to-cpp were too restrictive.
This PR will address that by allowing "." in operation names to denote
nested namespaces, but not "$".
To discuss:
- ops like `wmma.f16.16x16x64.bf8_bf` cannot be registered as C++
identifiers cannot begin with a number. In discussions, we have opted to
prefix the generated namespaces with _.
Codex was used to generate the lit tests.
Close #187911.
Assisted-by: OpenAI Codex (GPT-5 and 6)
[SSAF] Serialize virtual method summaries and families
Per-TU summaries and whole-program results cross process boundaries, and the
JSON layer refuses to write a summary kind it has no format for. Register both
sides so --ssaf-extract-summaries=VirtualMethod becomes usable and the family
result survives a round trip.
Deserialization tolerates a missing override list, since a root virtual method
legitimately has none.
§3 of rdar://179151603
