[libc][cmake] Respect the configured optimization level for memory functions (#233920)
`add_implementation` unconditionally passes `${libc_opt_high_flag}`
(`-O3`) to the memory functions (`memcpy`, `memmove`, `memset`,
`memcmp`, `bcmp`, `bzero`), overriding `-Os` in `MinSizeRel` builds.
Drop the override so these functions respect the optimization level
configured by CMake like the rest of the library.
[AArch64] Test the i32 preserve_none argument registers on Windows (#234019)
CC_AArch64_Preserve_None excludes X15 from the argument registers on
Windows, where it is used for stack allocation, but only the i64 case
was covered by preserve_nonecc_call.ll. Add the i32 counterpart: the 24th
i32 argument is passed in w15 on AAPCS and Darwin targets and on the stack
on Windows.
Assisted-by: Claude
[mlir] Respect unknown memory effects in LICM and dead alloc erasure (#233939)
affine-loop-invariant-code-motion and memref::eraseDeadAllocAndStores
used hasEffect<...>, which returns false for ops that do not implement
MemoryEffectOpInterface (e.g. func.call). As a result, affine LICM
hoisted a load above a call that writes the same memref, and
eraseDeadAllocAndStores erased a call that reads the buffer together
with the alloc and its stores.
We can use mightHaveEffect<...> instead, which returns true for ops with
unknown effects.
Fixes #233733
Assisted-by: Opus 5.5
[mlir][OpenACC] Decouple frontend support from GPU operations (#233103)
Allow clients such as CIR to use OpenACC frontend IR without linking the
full GPU operation implementation and its Math dependencies.
Provide MLIRGPUBase for GPU representations and expose OpenACC's GPU,
LLVM and MemRef external interface models through separate extension
libraries. Keep GPU type and attribute ownership and parsing in the GPU
dialect, and retain all OpenACC operations in MLIROpenACCDialect.
Register the extensions through MLIR's default extension registration,
OpenACC passes and Flang. Preserve the C API's automatic registration
and CIR's pointer models, and explicitly load Arith for CIR's OpenACC
lowering.
Save >4MB in clang+CIR build.
Assisted-by: Codex
[SimplifyCFG] Fix unknown profiles in performBranchToCommonDestFolding (#233328)
performBranchToCommonDestFolding preserves profiles when branch weights
are available, but does not mark things as explicitly unknown when it
cannot preserve them, which fails profcheck.
This was exposed by 299c65b98b0248d0dabf19f0c5126b69eae7f7e4 which tried
to mark more branch weights unknown which then got folded here into
select/conditional branch instructions with no metadata attached.
[clang][SPIR-V][NFC] Remove dead argument classification loop (#233605)
I basically delete this part:
```cpp
for (auto &&[ArgumentsCount, I] : llvm::enumerate(FI.arguments()))
I.info = ArgumentsCount < FI.getNumRequiredArgs()
? classifyArgumentType(I.type)
: ABIArgInfo::getDirect();
```
Cause on SPIR-V it is followed by the
kernel/non-kernel loop, which unconditionally reassigns `I.info` for
every
argument, so the results of the first loop are never observed.
[CodeGen] Drop dead SlotIndexes before allocation
SlotIndexes keeps the index list entry of an erased instruction and only
clears its instruction pointer. Live range sizes are measured in slot
indexes and greedy ranks ranges by size, so the leftovers inflate some
ranges more than others and reorder allocation, spilling heavily on
register-starved functions.
Add SlotIndexes::compactIndexes() to erase them. Erased entries are
unlinked, so holding an index to one is now a bug; linkedEntry() asserts
on it. The one analysis that did was LiveIntervals, so add
removeUnreferencedIntervals() to retire the intervals responsible.
Off by default behind -greedy-compact-slot-indexes, since it changes
allocation across much of the test suite.
[AMDGPU] Use ds_append and ds_consume for unused LDS counter atomics
An LDS `atomicrmw add i32 1` or `add i32 -1` with a uniform address and
an unused result only moves a counter by the number of active lanes.
`ds_append` and `ds_consume` do exactly that in one instruction, so the
ballot, wave reduction and single lane branch are no longer needed. The
intrinsics carry no memory ordering, which is fine for `monotonic`
because a monotonic LDS RMW needs no extra waits or fences.
```llvm
; before
%unused = atomicrmw add ptr addrspace(3) %counter, i32 1 syncscope("agent") monotonic, align 4
; after
%0 = call i32 @llvm.amdgcn.ds.append.p3(ptr addrspace(3) %counter, i1 false)
```
In pixel shaders the call is guarded by `llvm.amdgcn.ps.live` so helper
lanes are not counted. Volatile, unaligned, i64 and stronger than
monotonic atomics are left to the existing path, and `sub` is expected
to be canonicalized to `add` beforehand.
[AMDGPU] Add tests for unused LDS counter atomics. NFC
An unused uniform LDS atomicrmw add of one or minus one can become
ds_append or ds_consume, which move the counter by the active lane count.
Cover both directions, a divergent branch, Wave32, Wave64, large LDS
targets and negative cases.
[InstCombine] Canonicalize atomicrmw sub of a constant to add (#232626)
Rewrite `atomicrmw sub ptr, C` as `atomicrmw add ptr, -C`. This
matches the canonical form InstCombine already uses for plain `sub`.
In wrapping arithmetic $old - C = old + (-C)$, so both the stored
value and the returned old value stay the same, including when C is
`INT_MIN`. Ordering, syncscope and metadata are kept.
```llvm
; before
%old = atomicrmw sub ptr %p, i32 1 syncscope("agent") monotonic
; after
%old = atomicrmw add ptr %p, i32 -1 syncscope("agent") monotonic
```
This benefits AMDGPU, for example: https://godbolt.org/z/fa9n1rPfq
[AArch64] Test the i32 preserve_none argument registers on Windows
CC_AArch64_Preserve_None excludes X15 from the argument registers on
Windows, where it is used for stack allocation, but only the i64 case was
covered by preserve_nonecc_call.ll. Add the i32 counterpart: the 24th i32
argument is passed in w15 on AAPCS and Darwin targets and on the stack on
Windows.
Assisted-by: Claude
[mlir][CIR] Separate OpenMP LLVM conversion helpers from the pass (NFC) (#232766)
Move the standalone OpenMP-to-LLVM pass to its own translation unit.
Keep MLIROpenMPToLLVM as the complete public conversion target, and
provide patterns, legality, and dialect-interface registration through
MLIROpenMPToLLVMConversion.
Use the helper target in CIR lowering and Flang code generation, and
remove the unused conversion dependency from FIRDialect. This breaks the
CIR link path through MemRef conversion and utilities to Affine without
splitting MemRef utilities or moving IR-dependent constraint analysis.
Assisted-by: Codex
[clang][Driver] Use the Windows ARM64 defaults for aarch64-unknown-uefi (#232706)
Match the Windows ARM64 driver defaults for aarch64-unknown-uefi, which
follows the same ABI:
* char is signed, so do not pass -fno-signed-char,
* the frame chain must stay valid even when frame pointers are omitted,
so -fomit-frame-pointer yields -mframe-pointer=reserved rather than
none, as the backend reserves the frame pointer for UEFI as well,
* -msign-return-address selects the B key, the only one the backend
accepts for Windows and UEFI.
Tested with the full `check-llvm` / `check-clang` suites and by building
Fuchsia's arm64 EFI binaries (physboot EFI shim, boot tests, gigaboot)
with
a toolchain built from this series.
Assisted-by: Claude
[clang] Add aarch64-unknown-uefi target (#232705)
Add the aarch64-unknown-uefi target to clang, building on the backend
support added in the preceding patches. Like x86_64-unknown-uefi it
follows the Microsoft ABI conventions, matching the Windows ARM64 target
which is the only way EFI applications for AArch64 can be built with
Clang/LLVM today:
* add UEFIAArch64TargetInfo: LLP64 types, Microsoft C++ ABI, char*
based va_list and the Win64 calling convention kind,
* use the Windows AArch64 ABI info in CodeGen for UEFI,
* accept aarch64 for *-uefi triples in the driver.
The UEFI toolchain already handles the linker invocation (lld-link with
/subsystem:efi_application), so no further driver changes are needed.
Tested with the full `check-llvm` / `check-clang` suites and by building
Fuchsia's arm64 EFI binaries (physboot EFI shim, boot tests, gigaboot)
with
[2 lines not shown]
[AArch64] Apply the Windows SEH and CRT codegen constraints to UEFI (#232704)
aarch64-unknown-uefi uses SEH unwind information and has no C runtime
library, so the remaining Windows specific codegen decisions that follow
from this apply to it too:
* do not align loops or basic blocks, since SEH unwind info generation
needs the exact function layout before alignment padding is inserted,
* sign return addresses with the B key by default and reject A key
signing, matching the pac_sign_lr unwind code used by the unwinder;
the branch protection parser defaults to the B key for UEFI as well,
so that -mbranch-protection=pac-ret keeps working,
* do not lower wide shifts to libcalls at -Oz, as those helpers are not
available.
The corresponding Windows tests gain aarch64-unknown-uefi run lines and
the LLVM release notes announce the new target, which completes the
backend side of aarch64-unknown-uefi support.
[5 lines not shown]
[AArch64] Classify global references on UEFI like Windows COFF (#232703)
Apply the Windows COFF rules for global references to
aarch64-unknown-uefi, which produces the same PE/COFF images:
* classify dllimport and non-dso-local globals with MO_DLLIMPORT /
MO_COFFSTUB, so extern_weak symbols are referenced through a stub that
can be resolved to zero by the linker,
* keep the existing SelectionDAG, FastISel and GlobalISel handling of
calls and tail calls to extern_weak functions in sync with that,
* default to the PIC relocation model, so jump tables and other
references stay position independent in relocatable PE images,
* lower ifuncs on UEFI as COFF has no support for them.
The extern weak and jump table tests gain aarch64-unknown-uefi run
lines,
and a new test checks that the default pipelines lower ifuncs for both
Windows and UEFI.
[5 lines not shown]
[AArch64] Probe large stack frames with __chkstk on UEFI (#233642)
Like Windows, aarch64-unknown-uefi has no guard page handling of its
own, so frames larger than the probe size are probed with __chkstk
instead of inline probing, and "no-stack-arg-probe" disables it.
Tests: chkstk.ll, no-stack-arg-probe.ll and
win-alloca-no-stack-probe.ll.
Assisted-by: Claude
[AArch64] Reserve x18 as the platform register on UEFI (#232701)
Both the Windows ARM64 ABI, which UEFI follows, and the firmware
ecosystem (EDK2 builds AArch64 with -ffixed-x18) treat x18 as a reserved
platform register. Reserve it by default for aarch64-unknown-uefi, as is
already done for Windows, Darwin, Android, Fuchsia and OHOS.
Tested with the full `check-llvm` / `check-clang` suites and by building
Fuchsia's arm64 EFI binaries (physboot EFI shim, boot tests, gigaboot)
with
a toolchain built from this series.
Assisted-by: Claude
[AArch64] Use __chkstk for dynamic stack allocation on UEFI (#232702)
Register the Windows __chkstk stack probe helper for
aarch64-unknown-uefi
and lower dynamic stack allocations through it, including the SME ZA
buffer allocation in LowerFormalArguments. GlobalISel falls back to
SelectionDAG for dynamic allocas on UEFI as it does on Windows.
Tests: win-alloca.ll, the vla in win64_vararg.ll (which now runs in full
on UEFI) and sme-lazy-save-windows.ll.
Assisted-by: Claude
[AArch64] Treat the Win64 calling convention as native on UEFI (#233641)
Functions using the Win64 calling convention on a non-Windows target
back up x18 and are excluded from tail call optimization, because x18
is the platform register there. On UEFI the Win64 convention is the
native one, so apply the Windows behaviour.
Tests: win64cc-backup-x18.ll gains Windows and UEFI run lines showing
that neither backs up x18 and both tail call.
Assisted-by: Claude
[AArch64] Use the Win64 calling convention and va_list on UEFI (#233640)
UEFI follows the Windows ARM64 procedure call standard, as
x86_64-unknown-uefi already follows the Win64 one. Use it for C, Fast
and Swift calls on aarch64-unknown-uefi: the Win64 variadic convention
(all remaining argument registers are homed and floating point variadic
arguments travel in GPRs), the char* va_list for va_copy, and the
preserve_none variant that follows the Win64 rules.
LowerVACOPY and the GlobalISel va_copy legalization used to re-derive
sizeof(va_list) and the pointer size from target-triple conditionals,
duplicating AArch64TargetLowering::getVaListSizeInBits. They now use the
DataLayout pointer size and getVaListSizeInBits, so the
Darwin/Windows/UEFI vs. AAPCS decision lives in one function. This also
fixes getVaListSizeInBits for ILP32, which returned 256 bits instead of
160.
Tests: win64_vararg_float.ll (SelectionDAG, FastISel and GlobalISel),
win64_vacopy.ll (SelectionDAG and GlobalISel va_copy),
[10 lines not shown]
[AArch64] Use the Windows callee saved registers and frame chain on UEFI (#232700)
aarch64-unknown-uefi already emits Windows (SEH) unwind info, but
CodeGen
still used the AAPCS callee saved register order, which produces
non-consecutive save_regp pairs and trips the "Non-consecutive registers
not allowed for save_regp" assertion for any function with a frame
record. Introduce AArch64Subtarget::isTargetUEFI() and
isTargetWindowsOrUEFI() and use the latter for the Windows callee saved
register list, the matching frame record pairing rules, and the
requirement that the frame chain stays valid in every function.
Tests: uefi-frame-record-pairing.ll (prologue pairing and the object
file) and regress-w29-reserved-with-fp.ll (x29 reserved by default).
Assisted-by: Claude
[AArch64] Use the Microsoft COFF MCAsmInfo for UEFI targets (#232699)
This is the first in a series of patches adding aarch64-unknown-uefi
support to the AArch64 backend and clang.
UEFI follows the MSVC toolchain conventions and lld-link is used to
produce the PE/COFF images, so aarch64-unknown-uefi should use the
Microsoft COFF MCAsmInfo like the X86 backend already does for
x86_64-unknown-uefi, rather than the GNU (MinGW) flavour it currently
gets by virtue of being a non-MSVC COFF triple. This enables associative
COMDATs and COMDAT constant pool entries (which AsmPrinter already
expects for UEFI, see GetCPISymbol).
Also relax the AArch64MCInstLower assertion that only Windows COFF
targets exist.
Tested with the full `check-llvm` / `check-clang` suites and by building
Fuchsia's arm64 EFI binaries (physboot EFI shim, boot tests, gigaboot)
with
[2 lines not shown]
[JumpThreading] Propagate unknown profiles (#234022)
Otherwise if a previous pass creates an unknown profile we never mark
the new branch which causes a verification failure.
[mlir] Place MathToFuncs helpers in the nearest symbol table (#232582)
The MathToFuncs pass previously inserted every outlined ipowi, fpowi,
and ctlz helper into the top-level builtin.module. Calls rewritten
inside a gpu.module could not resolve those helpers because the
declarations were outside the nearest symbol table.
Create each helper in the symbol table nearest to its source operation.
Include that symbol table in the implementation cache key, and use the
same key when looking up helpers during conversion. This preserves reuse
for repeated calls in one module without sharing a definition across
distinct gpu.modules or the host module.
AI assistance: Portions of this patch and its regression test were
developed with assistance from OpenAI Codex. I have reviewed and
understand the submitted changes, and I take responsibility for them.
[lldb] List registered extensions in `help scripting-extension` (#232891)
`help scripting-extension` only printed a one-line description, while
tab completion for the same argument offered every registered scripted
extension. Help and completion come from separate parts of the argument
table: completion queries PluginManager at runtime, but help only
printed the entry's static text.
This PR changes the argument table entry for ScriptedExtension to add a
help callback that lists the registered extensions along with the
description each interface registered with. The list is built from the
plugin registry rather than a static enum table because not every
lldb::ScriptedExtension value has a registered interface (e.g.
ParsedCommand), and a static table would advertise names that completion
never offers.
This also refactors the registry walk into a single
`PluginManager::ForEachScriptedExtension` so completion and help share
it.
[3 lines not shown]
[libc] implement popen/pclose (#232846)
This is a deceptively complex set of functions. They need to have
their own FILE subclass to track the PID of the child process and a list
of other open files specifically for popen. I also ended up refactoring
`system` since it shares the fork-and-shell mechanism. The POSIX
definition is here:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/popen.html
Assisted-by: Automated tooling, human reviewed.