LLVM/project dbefa87clang/include/clang/Basic OffloadArch.h, clang/lib/Basic Cuda.cpp

clang: Replace Is*OffloadArch free functions with OffloadArch methods

Drop the IsNVIDIAOffloadArch/IsAMDOffloadArch/IsIntel*OffloadArch free
functions in favor of the OffloadArch member predicate functions.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+29-19clang/unittests/Basic/OffloadArchTest.cpp
+6-6clang/lib/Driver/Driver.cpp
+0-9clang/include/clang/Basic/OffloadArch.h
+4-4clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
+2-2clang/lib/Basic/Cuda.cpp
+1-1clang/lib/Driver/ToolChains/Clang.cpp
+42-411 files not shown
+43-427 files

LLVM/project 60be55cclang/include/clang/Basic OffloadArch.h, clang/lib/Basic Cuda.cpp OffloadArch.cpp

clang: Store vendor GPU kinds in OffloadArch instead of re-listing GPUs

OffloadArch was a flat enum that hand-duplicated every AMDGPU and NVPTX
targets, plus a few edge cases. This was yet another place that needed
updating every time a new target is added, which should now be avoided.
Replace with a tagged union-like scheme.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+103-143clang/include/clang/Basic/OffloadArch.h
+73-136clang/lib/Basic/OffloadArch.cpp
+42-19clang/unittests/Basic/OffloadArchTest.cpp
+12-28clang/lib/Basic/Cuda.cpp
+27-10clang/test/Misc/target-invalid-cpu-note/nvptx.c
+12-14clang/lib/Driver/Driver.cpp
+269-3508 files not shown
+304-38114 files

LLVM/project 9a15298lldb/test/API/functionalities/json/symbol-file TestSymbolFileJSON.py

[lldb][test] Skip the JSON symbol file test on WebAssembly (#213407)

A JSON symbol file requires the UUID of the module it describes, and a
WebAssembly module carries no UUID.
DeltaFile
+1-0lldb/test/API/functionalities/json/symbol-file/TestSymbolFileJSON.py
+1-01 files

LLVM/project e89830dclang/tools/clang-format git-clang-format

Add option to format a whole file using git-clang-format (#204336)

Today, git-clang-format will only format lines which have been modified.
However, in some cases, that's not sufficient to get a "clean" file
which would be unmodified by running `clang-format` manually.

I've got a minimal repro using the default clang-format rules. Setup a
new git repository and create a commit with an empty file:

```
mkdir /tmp/bla
cd /tmp/bla
git init
touch t.cpp
git add t.cpp
git commit -m "V1"
```

Add a line to that file containing a comment:

    [27 lines not shown]
DeltaFile
+29-16clang/tools/clang-format/git-clang-format
+29-161 files

LLVM/project d857103flang/lib/Lower ConvertExpr.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.512bit.ll bf16.ll

rebase, fix commit message

Created using spr 1.3.8-beta.1-arichardson
DeltaFile
+9,385-9,006llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+5,575-5,393llvm/test/CodeGen/AMDGPU/maximumnum.ll
+5,454-5,259llvm/test/CodeGen/AMDGPU/minimumnum.ll
+4,728-4,968llvm/test/CodeGen/AMDGPU/bf16.ll
+3,972-3,823llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+0-7,750flang/lib/Lower/ConvertExpr.cpp
+29,114-36,1998,245 files not shown
+332,421-267,9648,251 files

LLVM/project 7f07052llvm/docs LangRef.rst, llvm/lib/Support UnicodeNameToCodepointGenerated.cpp

rebase after change to no longer allow direct access to the regclass

Created using spr 1.3.8-beta.1-arichardson
DeltaFile
+46,326-45,879llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,784-36,416llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+24,053-23,916llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+27,856-11,102llvm/test/CodeGen/RISCV/clmul.ll
+12,227-23,140llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+0-33,097llvm/docs/LangRef.rst
+136,246-173,55027,760 files not shown
+1,812,315-1,188,72527,766 files

LLVM/project e4d410ellvm/docs LangRef.rst, llvm/lib/Support UnicodeNameToCodepointGenerated.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1-arichardson

[skip ci]
DeltaFile
+46,326-45,879llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,784-36,416llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+24,053-23,916llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+27,856-11,102llvm/test/CodeGen/RISCV/clmul.ll
+12,227-23,140llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+0-33,097llvm/docs/LangRef.rst
+136,246-173,55027,759 files not shown
+1,812,303-1,188,71227,765 files

LLVM/project 56eb9ablldb/source/Plugins/Process/wasm UnwindWasm.h UnwindWasm.cpp, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

[lldb] Bound a WebAssembly backtrace by the target's maximum depth (#213397)

Only UnwindLLDB honored target.process.thread.max-backtrace-depth, so
UnwindWasm reported every frame the stub sent and a stack that recursed
without end was walked to its end.

Bound the frame count by the depth on every query rather than dropping
the frames that exceed it. A Wasm call stack arrives whole on the first
query, so a depth lowered after that has to still apply, which is when a
user reaches for it. The synthetic call frame addresses stay derived
from the whole stack, so the order of the frames does not depend on the
depth.
DeltaFile
+39-0lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+12-3lldb/source/Plugins/Process/wasm/UnwindWasm.cpp
+4-0lldb/source/Plugins/Process/wasm/UnwindWasm.h
+55-33 files

LLVM/project 9466be2llvm/lib/Target/X86 X86WinEHUnwindV3.cpp, llvm/test/CodeGen/X86 win64-eh-unwindv3-egpr-funclet.ll win64-eh-unwindv3-egpr-per-function.ll

[X86][APX] Fix per-function V3 unwind for EGPR functions on Windows x64 (#212924)

A function that saves a callee-saved EGPR (R16-R31) cannot be encoded with V1/V2 unwind info, so it must use V3 even when the module default stays on V1/V2 (e.g. an APX clone created by auto-dispatch alongside a baseline generic clone). The previous code rejected such functions with a recoverable backend diagnostic ("EGPR (R16-R31) requires V3 unwind info on Windows x64") instead of emitting valid V3 unwind info.

Introduce a single shared predicate, requiresWinX64UnwindV3(MF), that returns true when the whole module is in V3 mode, or when the function needs an unwind table and may use EGPR. It is consumed by X86FrameLowering (SEH prolog/epilog layout), the X86WinEHUnwindV2 pass (which skips such functions), and the X86WinEHUnwindV3 pass (which stamps a per-function .seh_unwindversion 3 on every WinEH frame -- the entry block and each funclet). Also widen the SEH_UnwindVersion pseudo operand from i1imm to i8imm since it holds 1, 2 or 3.
DeltaFile
+53-0llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-version-switch-v1.ll
+30-21llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
+47-0llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-version-switch.ll
+39-0llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-v2-module.ll
+32-0llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-per-function.ll
+31-0llvm/test/CodeGen/X86/win64-eh-unwindv3-egpr-funclet.ll
+232-216 files not shown
+284-4712 files

LLVM/project caaad6bllvm/test/Transforms/LoopVectorize simplify-logic.ll

[VPlan] Fix comments on logical-and/or combines. NFC (#213406)

The ordering needs to be adjusted to preserve poison blocking behaviour.
DeltaFile
+2-2llvm/test/Transforms/LoopVectorize/simplify-logic.ll
+2-21 files

LLVM/project 4d8c8ffllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize simplify-logic.ll

Revert "[VPlan] Remove redundant x && (y && x) -> x && y combine (#213219)" (#213405)

This reverts commit 8db13de265a5f12d49147930da6d16a3ad7b40e3.

Logical ands block poison, and commuting the operands doesn't preserve
it
DeltaFile
+10-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-2llvm/test/Transforms/LoopVectorize/simplify-logic.ll
+11-62 files

LLVM/project cfb2eabllvm/test/Transforms/LoopVectorize simplify-logic.ll

[VPlan] Add tests for logical and and logical or combines. NFC (#213402)
DeltaFile
+481-0llvm/test/Transforms/LoopVectorize/simplify-logic.ll
+481-01 files

LLVM/project d9d0d66mlir/include/mlir-c IR.h, mlir/lib/CAPI/IR IR.cpp

[mlir-c] Add mlirValueReplaceUsesWithIf (#206544)

Exposes `Value::replaceUsesWithIf` through the MLIR C API, allowing callers to replace only a subset of a value's uses based on a predicate.

Assisted by: Claude
DeltaFile
+93-0mlir/test/CAPI/ir.c
+15-0mlir/include/mlir-c/IR.h
+10-0mlir/lib/CAPI/IR/IR.cpp
+118-03 files

LLVM/project 037a0f4clang/test/Preprocessor riscv-target-features.c, llvm/lib/Target/RISCV RISCVInstrInfoSmcsps.td

[RISCV][MC] Add experimental Smcsps and Sscsps support (#211712)

Add experimental v0.19 support for the `Smcsps` and `Sscsps` conditional
stack pointer swap extensions.
DeltaFile
+31-0llvm/test/MC/RISCV/smcsps-invalid.s
+30-0llvm/test/MC/RISCV/smcsps-valid.s
+24-0llvm/lib/Target/RISCV/RISCVInstrInfoSmcsps.td
+19-0clang/test/Preprocessor/riscv-target-features.c
+14-0llvm/test/MC/RISCV/supervisor-csr-names.s
+14-0llvm/test/MC/RISCV/machine-csr-names.s
+132-011 files not shown
+184-117 files

LLVM/project 1e03575llvm/lib/Transforms/Scalar LowerAtomicPass.cpp, llvm/test/Transforms/LowerAtomic atomic-load-store-elementwise.ll

[LowerAtomic] Clear elementwise flag when lowering atomic load
DeltaFile
+12-0llvm/test/Transforms/LowerAtomic/atomic-load-store-elementwise.ll
+1-0llvm/lib/Transforms/Scalar/LowerAtomicPass.cpp
+13-02 files

LLVM/project 54d05e9llvm/lib/Target/Sparc/AsmParser SparcAsmParser.cpp, llvm/lib/Target/Sparc/MCTargetDesc SparcMCAsmInfo.h SparcMCExpr.cpp

[SPARC] Parse %r_disp32 in data directives (#213398)

commit fd5c1f9497ed (2014) emits %r_disp32 for pc_rel entries in
.gcc_except_table and .eh_frame, but the specifier is only recognized in
instruction operands, so llvm-mc cannot reassemble llc output.

Implement parseDataExpr with a data specifier table holding just
%r_disp32, and reject %r_disp32 outside a .word directive and in
instruction operands.

Supersedes #208933.
DeltaFile
+39-0llvm/test/MC/Sparc/Relocations/data-directive-specifier.s
+28-0llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+10-7llvm/lib/Target/Sparc/MCTargetDesc/SparcELFObjectWriter.cpp
+6-1llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
+1-0llvm/lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
+84-85 files

LLVM/project ef19256mlir/lib/Conversion/ShardToMPI ShardToMPI.cpp, mlir/test/Conversion/ShardToMPI convert-shard-to-mpi-invalid.mlir

[mlir][Shard] Propagate failures in ConvertShardToMPI (#211713)

This PR fixes a crash in ConvertShardToMPI caused by ignoring a failed partial conversion and continuing to apply folding patterns to partially converted IR.

Assisted-by: codex

---------

Co-authored-by: Maksim Levental <maksim.levental at gmail.com>
DeltaFile
+24-0mlir/test/Conversion/ShardToMPI/convert-shard-to-mpi-invalid.mlir
+6-2mlir/lib/Conversion/ShardToMPI/ShardToMPI.cpp
+30-22 files

LLVM/project 2e81492llvm/include/llvm/Analysis BlockFrequencyInfoImpl.h, llvm/lib/Analysis BlockFrequencyInfoImpl.cpp

[BFI] Simplify irreducible header discovery. NFC (#213213)

IrreducibleGraph is the explicit graph of a region -- a loop, or the
whole function -- that BFI searches for irreducible SCCs. It maintains
predecessor lists only so findIrreducibleHeaders can ask of each node
whether a predecessor lies outside its SCC (an entry), and whether a
non-entry in the same SCC reaches it via a backedge (an extra header).

Answer both from the successor lists instead; IrrNode then needs only a
successor vector. findIrreducibleHeaders is left partitioning the SCC
its sole caller is packaging, so fold it into createIrreducibleLoop.
Headers and members are sorted, so the changed iteration order does not
affect output.

Once BFI uses CycleInfo, a region's irreducible SCCs are its
non-reducible child cycles, which should let IrreducibleGraph go away
entirely. That removal has no predecessor lists to walk and
getResolvedNode has no inverse, so it must sweep successors regardless;
settling the formulation here leaves it changing only the graph.

Aided by Claude Opus 5
DeltaFile
+63-88llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
+7-7llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
+70-952 files

LLVM/project 476b87fmlir/include/mlir-c IR.h, mlir/lib/CAPI/IR IR.cpp

[mlir-c] Add mlirValueReplaceUsesWithIf
DeltaFile
+52-0mlir/test/CAPI/ir.c
+14-0mlir/include/mlir-c/IR.h
+10-0mlir/lib/CAPI/IR/IR.cpp
+76-03 files

LLVM/project df921dcmlir/include/mlir-c IR.h, mlir/test/CAPI ir.c

Address review: exercise operand number/value filtering, userData, and no-use case
DeltaFile
+41-0mlir/test/CAPI/ir.c
+2-1mlir/include/mlir-c/IR.h
+43-12 files

LLVM/project cc7d719lldb/source/Plugins/Platform/WebAssembly PlatformWasm.cpp

[lldb] Launch the Wasm runtime with the file the target has (#213384)

PlatformWasm hands the runtime the module to run as a path on the host
it launches the runtime on. It takes that path from the launch info,
whose executable is the name the module goes by on the platform. That
name is whatever a stub reported the module under, which need not be a
path that resolves on this host, so a relaunch runs a file that does not
exist:

```
(lldb) run
error: WebAssembly runtime exited with exit code 255
```

Run the file the target has instead. Only a runtime launched on this
host is affected, since a connection to a remote Wasm platform delegates
the launch to that platform.
DeltaFile
+14-1lldb/source/Plugins/Platform/WebAssembly/PlatformWasm.cpp
+14-11 files

LLVM/project 6c82ca1mlir/include/mlir-c Rewrite.h, mlir/lib/CAPI/Transforms Rewrite.cpp

[mlir-c] Add RewriterBase insertion point save/restore (#206531)

Exposes `OpBuilder::saveInsertionPoint` / `restoreInsertionPoint` through the MLIR C API for `MlirRewriterBase`, continuing the buildout of the rewrite/conversion C bindings.

Assisted by: Claude
DeltaFile
+77-0mlir/test/CAPI/rewrite.c
+26-0mlir/lib/CAPI/Transforms/Rewrite.cpp
+21-2mlir/include/mlir-c/Rewrite.h
+124-23 files

LLVM/project fd999b4lldb/include/lldb/Interpreter/Interfaces ScriptedInterface.h, lldb/source/Plugins/Process/scripted ScriptedThread.cpp ScriptedProcess.cpp

[lldb/Interpreter] Surface Python exceptions from scripted extensions (#198153)
DeltaFile
+325-0lldb/test/API/functionalities/scripted_extensions/malformed_scripted_extensions.py
+227-0lldb/test/API/functionalities/scripted_extensions/TestScriptedExtensionsDiagnostics.py
+75-21lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
+47-9lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
+14-12lldb/include/lldb/Interpreter/Interfaces/ScriptedInterface.h
+11-12lldb/source/Plugins/Process/scripted/ScriptedThread.cpp
+699-5420 files not shown
+840-6826 files

LLVM/project 956e241lldb/test/API/commands/register/register_command TestRegisters.py

Disable this test on Darwin to give the author a chance to fix it. (#213388)

The test is passing elsewhere.

I filed:

https://github.com/llvm/llvm-project/issues/213386

to cover fixing the issue and re-enabling the tests.
DeltaFile
+1-0lldb/test/API/commands/register/register_command/TestRegisters.py
+1-01 files

LLVM/project eda2fb2llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU fcanonicalize.f16.ll

[AMDGPU] Fix canonicalization of undef in v2f16 (#213373)

When processing canonicalization with an undef in v2f16,
1. If the other element is constant, create a splat vector
2. Otherwise, convert undef to 0.0.

Update comment to make this behavior clear. Do not imply that a v2f16
with two undef's should be unconverted. Do not state that conversion of
undef to qNan is normal. `ConstantFoldScalarCall1` in
`llvm/lib/Analysis/ConstantFolding.cpp` already canonicalizes an undef
to 0.0.

Previous code only converted element 0 if element 1 was a constant.

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+6-7llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+4-2llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
+10-92 files

LLVM/project 83eec36llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp

[AArch64][GlobalISel] Replace uses of getRegBank(GPRRegBankID) with GPRRegBank. NFC (#213387)
DeltaFile
+6-7llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+6-71 files

LLVM/project 35a8074lldb/test/API/functionalities/plugins/python_os_plugin/os_plugin_in_dsym TestOSIndSYM.py

Disable the tests in TestOSIndSYM.py (#213382)

I filed:  github.com/llvm/llvm-project/issues/213380

to cover this issue.  I'm disabling this one test till that is fixed.
DeltaFile
+2-0lldb/test/API/functionalities/plugins/python_os_plugin/os_plugin_in_dsym/TestOSIndSYM.py
+2-01 files

LLVM/project c3b2b42llvm/test/CodeGen/AMDGPU llvm.log10.ll llvm.log.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fexp.mir legalize-intrinsic-round.mir

AMDGPU/GlobalISel: Switch more FP opcodes to extended LLTs (part 4) (#213353)

Migrate G_FFREXP, G_FMODF, rounding operations, and the LOG/EXP families
to extended LLTs.

Remove f64 for G_FLOG and G_FLOG10 since there is no custom lowering for
them. Adjust G_AND masking for LOG/EXP using extended LLTs.

Update the relevant MIR tests and *.ll tests.
DeltaFile
+1,103-888llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
+1,087-533llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
+1,087-533llvm/test/CodeGen/AMDGPU/llvm.exp.ll
+894-561llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fexp.mir
+776-376llvm/test/CodeGen/AMDGPU/llvm.log10.ll
+776-376llvm/test/CodeGen/AMDGPU/llvm.log.ll
+5,723-3,2677 files not shown
+6,742-4,27913 files

LLVM/project 9001032libc/hdr elf_proxy.h CMakeLists.txt, libc/include CMakeLists.txt elf.yaml

[libc] Move generated elf header to include (#211428)

The fact that `hdr/elf_proxy.h` was generated with headergen was causing
dependency issues. This shouldn't be necessary, and this PR moves it out
into `include` to avoid needing headergen for an overlay build.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+667-0libc/include/llvm-libc-proxy/elf_proxy.yaml
+2-664libc/include/elf.yaml
+59-0libc/include/llvm-libc-proxy/CMakeLists.txt
+4-52libc/hdr/CMakeLists.txt
+5-47libc/include/CMakeLists.txt
+27-0libc/hdr/elf_proxy.h
+764-7633 files not shown
+773-7779 files

LLVM/project 0973493.github/workflows llvm-abi-tests.yml

workflows/llvm-abi-tests: Cache the baseline abi (#211968)

This way we don't need to recompute it for every workflow.
DeltaFile
+23-0.github/workflows/llvm-abi-tests.yml
+23-01 files