[RISCV][Disassembler] Symbolize UImm20 and SImm12Lo operands (#217550)
he RISC-V disassembler currently decodes operands represented by
`UImm20OperandMaybeSym` and `Simm12LoOp` directly into immediate
operands. As a result, an installed `MCSymbolizer` has no opportunity to
recover relocation-backed symbolic expressions for these operands.
Enable `MCSymbolizer` handling for RISC-V `UImm20` and `SImm12Lo`
operands. Fall back to the original immediate when symbolization is not
available. `SImm12Lo` values are sign-extended, while `UImm20` values
remain unchanged.
This enables clients such as BOLT to reconstruct symbolic operands for
HI20/LO12, PC-relative, and GOT relocations during instruction decoding.
This change only adds symbolizer hooks for these operands; the actual
symbolization is delegated to the installed `MCSymbolizer`. When no
symbolizer is installed, the existing immediate-based disassembly
behavior is preserved. Test coverage may need to be added after
RISCVMCSymbolizer is implemented in BOLT.
RuntimeLibcalls: Describe register-returning divmod libcall ABIs
Teach RuntimeLibcallsInfo::getFunctionTy about the ARM AEABI
(__aeabi_*divmod) and Windows (__rt_*div*) divmod sigantures. Currently
the custom lowering to these calls hardcodes the call signature information,
but in the future this should be automatically handled.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[CodeGen] Fix -fsanitize=array-bounds for __sized_by / _or_null pointers
`EmitCountedByBoundsChecking()` assumed a CountAttributedType is always
a __counted_by pointer. That isn't true, there are four versions of the
attribute:
* `__counted_by`: Already handled correctly.
* `__counted_by_or_null`: Incorectly handled.
* `__sized_by`: Incorreclty handled.
* `__sized_by_or_null`: Incorreclty handled.
In particular:
* __sized_by / __sized_by_or_null: the loaded bound is a byte count, but the
element index was compared against it directly, so an access was only
flagged once the index exceeded the byte count -- missing out-of-bounds
accesses for a pointee larger than one byte. Scale the index to bytes
('index * sizeof(element)') before comparing. counted_by counts elements
and is unchanged; a void (or otherwise zero-sized) pointee uses the GNU
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[CodeGen] Fix __builtin_dynamic_object_size for __sized_by / _or_null pointers (#213794)
`emitCountedByPointerSize()` assumed a CountAttributedType is always
a __counted_by pointer. That isn't true, there are four versions of the
attribute:
* `__counted_by`: Already handled correctly.
* `__counted_by_or_null`: Incorectly handled.
* `__sized_by`: Incorreclty handled.
* `__sized_by_or_null`: Incorreclty handled.
In particular:
* __sized_by / __sized_by_or_null: the attribute argument is a byte count, but
the object size was computed as count * sizeof(*ptr), over-reporting by the
element size for any pointee larger than one byte. Use the count directly for
the byte-counting variants.
* __counted_by_or_null / __sized_by_or_null: a null pointer describes no
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[AMDGPU] Update the comment regarding opsel[0] for v_cvt_sr_fp8/bf8_f16, NFC (#217796)
To be consistent with the actual implementation, OPSEL[0] can be
non-zero to select high 16-bit of src0.
[VPlan] Append recipes created via builder to worklist
The previous PR appended the top most created recipe to the worklist, and this PR extends it to any other nested recipes that were created, similar to InstCombine.
This removes the header mask in a good few more places on RISC-V as measured on SPEC CPU 2017, e.g. for the following loop:
```c
long f(const int *p, const int *q, long n) {
long a = 0, b = 0;
for (long i = 0;; i++) {
if (p[i] && q[i]) { a += i; b += i; }
if (i + 1 == n) break;
}
return a + b;
}
```
Before:
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[VPlan] Make simplifyRecipe more like InstCombine
Most combines in simplifyRecipe RAUW a value, but not all of them erase the old recipe.
Unify them and bring it in line with InstCombine by having it return a VPValue, which simplifyRecipes can then call RAUW with, and automatically erase the old recipe.
Similarly to InstCombine, combines that modify a recipe should return the same recipe.
[VPlan] Process simplifyRecipes in a worklist
This brings simplifyRecipes further in line with InstCombine, and asides from unlocking more simplifications it also helps avoid spurious test churn whenever passes are moved around simplifyRecipes.
For now just push the new recipe onto the worklist, not its users.
This uses a post order traversal so we maintain the same simplification order as before.
I've gone through and checked every simplification we do is a canonicalisation that converges, and I checked on llvm-test-suite + SPEC CPU 2017 in various configurations that we don't hit any cycles.
[VPlan] Make simplifyRecipe more like InstCombine
Most combines in simplifyRecipe RAUW a value, but not all of them erase the old recipe.
Unify them and bring it in line with InstCombine by having it return a VPValue, which simplifyRecipes can then call RAUW with, and automatically erase the old recipe.
Similarly to InstCombine, combines that modify a recipe should return the same recipe.
[lldb] Support i386 Linux TLS thread pointers (DW_OP_form_tls_address) (#216463)
Fixes #211473.
On i386 Linux, `gs` contains a segment selector rather than the
thread-pointer address. LLDB's i386 native register context did not
expose `LLDB_REGNUM_GENERIC_TP`, so
`DynamicLoaderPOSIXDYLD::GetThreadLocalData` could not locate the
current thread's DTV and module TLS block. As a result, valid
`DW_OP_form_tls_address` and `DW_OP_GNU_push_tls_address` expressions
failed to evaluate.
Mapping the existing `gs` register to the generic thread pointer would
be incorrect because it would expose the selector as an address. The
selector's GDT entry must instead be resolved by the Linux process
tracing the inferior.
## Fix
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[docs] Address PDB and DirectX migration review
Fix MyST cross-references and emphasis in the PDB documentation. Replace all DirectX DXContainer and DXILResources reST list-tables with native MyST list-tables, preserve local external-link definitions, and format the nested Root Signature table for source readability.
Validation:
- ninja -C build docs-llvm-html
- validate_rst_md_html_ids.py on the four touched documents (stable IDs preserved; existing MyST heading permalink context noise remains)
- check_markdown_html_render.py on the four touched documents
- git diff --check
- scanned touched files for internal-only markers
[RISCV] Remove experimental from Zicfiss. (#217794)
Use zimop in test command lines were possible.
At this point9, no code checks Zicfiss being enabled. Everything is
based on Zimop. I don't know for sure if shadow stack support is
complete at this point, but the extension being marked experimental
isn't enough to warn users.
[AMDGPU][True16] Improve 16-bit argument handling
This PR adds an extra fixup in PostprocessISelDAG for 16-bit VGPR arguments to
indicate that only the lower 16 bits are used. This can improve code quality in
some cases and save a VGPR. Even if we support true16 in our ABI in the future,
this might still be useful when two 16-bit arguments aren't adjacent.
[RISCV] Fix stage2 bootstrap crash caused by f6ea145aa8e89631ae04f72df32580b20256d40c (#217809)
It's not possible to compute an allocation granule for an unsized type.
