LLVM/project b952185flang/lib/Semantics resolve-directives.cpp

[flang] clang-format flang/lib/Semantics/resolve-directives.cpp

The changes are only on 5 lines, but now the entire file is invariant
under clang-format.
DeltaFile
+5-5flang/lib/Semantics/resolve-directives.cpp
+5-51 files

LLVM/project 0c0ae37clang/lib/Format FormatToken.cpp

[clang-format] Update QtPropertyKeywords to Qt 6.11 documentation (#190543)

Qt 6.11 added `OVERRIDE` and `VIRTUAL` keywords to the [property
system](https://doc.qt.io/qt-6.11/properties.html).
DeltaFile
+4-4clang/lib/Format/FormatToken.cpp
+4-41 files

LLVM/project ed395c8llvm/test/CodeGen/AMDGPU freeze.ll load-global-i16.ll

[AMDGPU] Use value's DebugLoc for bitcast in performStoreCombine (#186766)

## Description

When `AMDGPUTargetLowering::performStoreCombine` inserts a synthetic
bitcast to convert vector types (e.g. `<1 x float>` → `i32`) for stores,
the bitcast inherits the **store's** SDLoc. When
`DAGCombiner::visitBITCAST` later folds `bitcast(load)` → `load`, the
resulting load loses its original debug location.

## Analysis

The bitcast is **not** present in the initial SelectionDAG — it is
inserted during DAGCombine by
`AMDGPUTargetLowering::performStoreCombine`. This can be observed with
`-debug-only=isel,dagcombine`:

```
Initial selection DAG: no bitcast, load is v1f32 directly used by store

    [59 lines not shown]
DeltaFile
+2,253-17llvm/test/CodeGen/AMDGPU/freeze.ll
+140-150llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+88-146llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
+94-94llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+83-83llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+70-75llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
+2,728-5657 files not shown
+2,819-63013 files

LLVM/project c382b58llvm/include/llvm/CodeGen AsmPrinterAnalysis.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[AsmPrinter] Use AsmPrinterAnalysis to hold AsmPrinter

AsmPrinter needs to hold state between doInitialization,
runOnMachineFunction, and doFinalization, which are all separate passes
in the NewPM. Storing this state externally somewhere like
MachineModuleInfo or a new analysis is possible, but a bit messy given
some state, particularly EHHandler objects, has backreferences into the
AsmPrinter and assumes there is a single AsmPrinter throughout the
entire compilation. So instead, store AsmPrinter in an analysis that
stays constant throughout compilation which solves all these problems.
This also means we can also just let AsmPrinter continue to own the
MCStreamer, which means object file emission should work after this as
well.

This does require passing the ModuleAnalysisManager into
buildCodeGenPipeline to register the AsmPrinterAnalysis, but that seems
pretty reasonable to do.

Reviewers: paperchalice, RKSimon, arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/191535
DeltaFile
+53-0llvm/include/llvm/CodeGen/AsmPrinterAnalysis.h
+25-22llvm/include/llvm/Passes/CodeGenPassBuilder.h
+13-19llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+10-15llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+0-21llvm/lib/Target/X86/X86AsmPrinter.h
+10-11llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+111-887 files not shown
+135-11313 files

LLVM/project f6b0083llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/Target/X86 X86CodeGenPassBuilder.cpp

feedback

Created using spr 1.3.7
DeltaFile
+1-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1-1llvm/include/llvm/Passes/CodeGenPassBuilder.h
+2-32 files

LLVM/project a804948clang/lib/CodeGen BackendUtil.cpp, llvm/include/llvm/Passes CodeGenPassBuilder.h

feedback

Created using spr 1.3.7
DeltaFile
+4-1clang/lib/CodeGen/BackendUtil.cpp
+1-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1-1llvm/include/llvm/Passes/CodeGenPassBuilder.h
+6-43 files

LLVM/project 3f644d0llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/lib/Target/X86 X86CodeGenPassBuilder.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1-1llvm/include/llvm/Passes/CodeGenPassBuilder.h
+2-32 files

LLVM/project f428a30clang-tools-extra/test/clang-tidy/infrastructure custom-query-check.cpp

add compile_commands.json instead

Created using spr 1.3.8-wip
DeltaFile
+2-2clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
+2-21 files

LLVM/project fde16a1clang-tools-extra/clang-doc Representation.cpp

fix formatting
DeltaFile
+21-13clang-tools-extra/clang-doc/Representation.cpp
+21-131 files

LLVM/project 6956789llvm/lib/Target/AMDGPU AMDGPULowerModuleLDSPass.cpp, llvm/test/CodeGen/AMDGPU lower-module-lds-link-time-classify.ll lower-module-lds-link-time-multi-kernel.ll

[AMDGPU] Add object linking support for LDS and named barrier lowering in the middle end

This is the first patch in a series introducing object linking support for
AMDGPU.

This PR adds the -amdgpu-enable-object-linking flag to enable object linking in
the backend. It also updates the AMDGPULowerModuleLDSPass and
AMDGPULowerExecSync passes to support lowering LDS and named barrier globals
when object linking is enabled.
DeltaFile
+164-0llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+73-0llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-classify.ll
+62-0llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-multi-kernel.ll
+52-0llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-multi-lds-per-func.ll
+50-0llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-internal-multi-user.ll
+50-0llvm/test/CodeGen/AMDGPU/lower-module-lds-link-time-transitive.ll
+451-06 files not shown
+620-012 files

LLVM/project 2a54bf5llvm/lib/Target/AMDGPU AMDGPULowerModuleLDSPass.cpp

[NFC][AMDGPU] clang-format llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp (#191647)
DeltaFile
+2-2llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+2-21 files

LLVM/project 0fd821dclang/lib/Sema SemaConcept.cpp SemaTemplateInstantiate.cpp, clang/test/SemaCXX cxx2c-fold-exprs.cpp

[Clang] Track constraint's SubstIndex only if it contains outer parameter packs (#191484)

I believe that is the intent of SubstIndex in AssociatedConstraint.
So this enforces the checking explicitly, in case nested SubstIndexes
confuses our poor constraint evaluator.

I reverted the previous fix 257cc5ad89840cdfba4affcc8fe62cf9d02d9017
because that was wrong.
As a drive-by fix, this also removes an strange assertion and an
unnecessary
SubstIndex setup in nested requirement transform.

No release note because this is a regression fix.

Fixes https://github.com/llvm/llvm-project/issues/188505
Fixes https://github.com/llvm/llvm-project/issues/190169
DeltaFile
+76-0clang/test/SemaCXX/cxx2c-fold-exprs.cpp
+11-20clang/lib/Sema/SemaConcept.cpp
+9-3clang/lib/Sema/SemaTemplateInstantiate.cpp
+4-1clang/lib/Sema/TreeTransform.h
+100-244 files

LLVM/project 3a1266fclang-tools-extra/clang-doc Representation.cpp Representation.h

[clang-doc] Avoid merging into default Info types

When merging into arenas, the code assumed that all using a default
constructed info would be safe, since in the merge we replace any
differing data. However, that appears to be a risky assumption, due
to default initialized members participating in comparisons, and
other operations, leading the program to read garbage data in some
cases. Earlier patches added default initializers to these fields,
but we should prefer (which the old code used to do) to just start
with properly initialized and complete data from the start.

This patch updates the remaining Info types to have copy constructors
that support choosing the arena to allocate into. This is already the
strategy used in several places to avoid use after free bugs. Since
the handling is now uniform, we can simplify things a bit at the same
time and extract the cloning operation into a helper, making the logic
very clear.

This should avoid any potential pitfalls or missed cases that resulted
in the errors discover after landing #190054.
DeltaFile
+87-29clang-tools-extra/clang-doc/Representation.cpp
+6-0clang-tools-extra/clang-doc/Representation.h
+93-292 files

LLVM/project 155b9b3clang-tools-extra/clang-doc Representation.h

[clang-doc][nfc] Default initialize all StringRef members (#191641)

Ensure all StringRef members are default initialized to avoid potential
bugs.
DeltaFile
+5-5clang-tools-extra/clang-doc/Representation.h
+5-51 files

LLVM/project 814fcfallvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Simplifications, fixes

Created using spr 1.3.7
DeltaFile
+5-4llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+5-41 files

LLVM/project 0311157lldb/source/Plugins/Platform/MacOSX PlatformDarwin.cpp, lldb/source/Target Platform.cpp

[lldb][Platform] Use the module's FileSpec instead of the script's FileSpec when checking LoadScriptFromSymFile setting (#191473)

We were incorrectly passing the script's `FileSpec` into
`GetScriptLoadStyleForModule`. Meaning if a script name wasn't actually
the same as the module name, the `target.auto-load-scripts-for-modules`
didn't take effect.

This patch passes the module's `FileSpec` instead. For `dSYM`s we save
the original `FileSpec` because the loop tries to strip extensions until
it finds a script. But we still want to use the module's name.

**AI Usage**:
- Used Claude to write the unit-test skeletons. Then reviewed/adjusted
them manually
DeltaFile
+52-0lldb/unittests/Platform/PlatformTest.cpp
+49-0lldb/unittests/Platform/PlatformDarwinTest.cpp
+2-1lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+1-1lldb/source/Target/Platform.cpp
+104-24 files

LLVM/project bc87c8bclang-tools-extra/clang-doc Representation.h

[clang-doc][nfc] Default initialize all StringRef members
DeltaFile
+5-5clang-tools-extra/clang-doc/Representation.h
+5-51 files

LLVM/project ccd7eb4llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Simplifications, fixes

Created using spr 1.3.7
DeltaFile
+5-4llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+5-41 files

LLVM/project 4c2848fllvm/lib/Target/AMDGPU GCNSchedStrategy.cpp GCNSchedStrategy.h, llvm/test/CodeGen/AMDGPU sched_mfma_rewrite_copies.mir misched-remat-revert.ll

[AMDGPU][Scheduler] Use MIR-level rematerializer in rematerialization stage

This makes the scheduler's rematerialization stage use the
target-independent rematerializer. Previosuly duplicate logic is
deleted, and restrictions are put in place in the stage so that the
same cosntraints as before apply on rematerializable registers (as the
rematerializer is able to expose many more rematerialization
opportunities than what the stage can track at the moment).
Consequently it is not expected that this change improves performance
overall, but it is a first step toward being able to use the
rematerializer's more advanced capabilities during scheduling.

This is *not* a NFC for 2 reasons.

- Score equalities between two rematerialization candidates with
  otherwise equivalent score are decided by their corresponding
  register's index handle in the rematerializer (previously the pointer
  to their state object's value). This is determined by the
  rematerializer's register collection order, which is different from

    [10 lines not shown]
DeltaFile
+551-551llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir
+0-577llvm/test/CodeGen/AMDGPU/misched-remat-revert.ll
+108-294llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+49-73llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+36-36llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir
+19-19llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats-attr.mir
+763-1,5502 files not shown
+786-1,5738 files

LLVM/project d35cd21llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoZvfbf.td

[RISCV] Consistently use hasVInstructionsF16/BF16(). NFC (#191592)
DeltaFile
+7-6llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+4-4llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
+0-3llvm/lib/Target/RISCV/RISCVFeatures.td
+11-133 files

LLVM/project 489dab3clang-tools-extra/clang-doc Representation.h

[clang-doc] Initialize StringRef members in Info types (#191637)

We had a report of some assertion failures in

https://github.com/llvm/llvm-project/pull/190054#issuecomment-4228893309,
and some msan failures in
https://github.com/llvm/llvm-project/pull/190056.

These appear to be due to default constructed StringRef's being used in
some cases. To address, we can provide default initializers that should
prevent such cases from causing further problems.
DeltaFile
+17-17clang-tools-extra/clang-doc/Representation.h
+17-171 files

LLVM/project 9ab2c57llvm/lib/Target/RISCV RISCVInstrInfoVVLPatterns.td, llvm/test/CodeGen/RISCV/rvv fixed-vectors-fp-buildvec-bf16.ll

[RISCV] Add missing Zvfbfa isel patterns for VFSLIDE1UP/DOWN. (#191578)
DeltaFile
+53-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
+4-2llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
+57-22 files

LLVM/project 42127fallvm/lib/Target/AMDGPU GCNSchedStrategy.cpp GCNSchedStrategy.h

[AMDGPU][Scheduler] Prepare remat stage for rematerializer integration (NFC) (#189489)

This NFC prepares the scheduler's rematerialization stage for
integration with the target-independent rematerializer. It brings
various small design changes and optimizations to the stage's internal
state to make the not-exactly-NFC rematerializer integration as small as
possible.

The main changes are, in no particular order:

- Sort and pick useful rematerialization candidates by their index in
the vector of candidates instead of directly sorting objects within the
candidate vector. This reduces the amount of data movement and
simplifies the candidate selection logic.
- Move some data members from `PreRARematStage::RematReg` to
`PreRARematStage::ScoredRemat`. This makes the former a simplified
version of the rematerializer's own internal register representation
(`Rematerializer::Reg`), which can be cleanly deleted during
integration.

    [7 lines not shown]
DeltaFile
+157-138llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+58-52llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+13-0llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+4-0llvm/lib/Target/AMDGPU/GCNRegPressure.h
+232-1904 files

LLVM/project 17258afclang-tools-extra/test/clang-tidy/infrastructure custom-query-check.cpp

lit syntax...

Created using spr 1.3.8-wip
DeltaFile
+1-1clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
+1-11 files

LLVM/project 76584a8lldb/source/Interpreter CommandInterpreter.cpp, lldb/test/API/commands/help TestHelp.py

[lldb] Fix output of `help format` (#190409)

The output currently contains
```
            "unicode32"
            'u' or "unsigned decimal"
            'p' or
            "pointer"
            "char[]"
            "int8_t[]"
```
The 'p' and "pointer" are supposed to appear on the same line. When
we're about to print "pointer," we check whether it would exceed the
column limit (in which case, we insert a line feed). This check only
checks for spaces as separators, but in this case, "words" may be
separated by newlines as well. Look for them too.
DeltaFile
+30-15lldb/source/Interpreter/CommandInterpreter.cpp
+13-3lldb/test/API/commands/help/TestHelp.py
+43-182 files

LLVM/project aab3e26clang-tools-extra/clang-doc Representation.h

fix formatting
DeltaFile
+5-5clang-tools-extra/clang-doc/Representation.h
+5-51 files

LLVM/project 8eced21clang-tools-extra/clang-doc Representation.h

[clang-doc] Initialize StringRef members in Info types

We had a report of some assertion failures in
https://github.com/llvm/llvm-project/pull/190054#issuecomment-4228893309,
and some msan failures in
https://github.com/llvm/llvm-project/pull/190056.

These appear to be due to default constructed StringRef's being used in
some cases. To address, we can provide default initializers that should
prevent such cases from causing further problems.
DeltaFile
+17-17clang-tools-extra/clang-doc/Representation.h
+17-171 files

LLVM/project 7daf52cclang-tools-extra/test/clang-tidy/infrastructure custom-query-check.cpp

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+2-0clang-tools-extra/test/clang-tidy/infrastructure/custom-query-check.cpp
+2-01 files

LLVM/project eda97ddlibcxx/include mdspan, libcxx/include/__mdspan mdspan.h layout_left.h

[libc++][NFC] Sync `<mdspan>` synopsis and remove redundant `typename`s (#191621)
DeltaFile
+38-41libcxx/include/mdspan
+6-6libcxx/include/__mdspan/mdspan.h
+3-3libcxx/include/__mdspan/layout_left.h
+3-3libcxx/include/__mdspan/layout_right.h
+3-3libcxx/include/__mdspan/layout_stride.h
+53-565 files

LLVM/project df1113fllvm/lib/Target/AMDGPU GCNSchedStrategy.cpp

Merge asserts
DeltaFile
+4-4llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+4-41 files