[analyzer] Clean up evalBind, fix bad logic (#196313)
This commit refactors `ExprEngine::evalBind` to eliminate the use of a
`NodeBuilder` and fix incorrect logic that was apparently introduced
because the `NodeBuilder` had obfuscated the underlying set operations.
In the special case when the engine is binding to an `Unknown` or
`Undefined` memory location, with the old code on each execution path
_either_ only the `check::Bind` checkers _or_ only the pointer escape
checkers were invoked. This commit ensures that on each execution path
_both_ the `check::Bind` checkers _and then_ the pointer escape checkers
get a chance to activate.
I'm pretty sure that the bad logic did not cause incorrect behavior of
the analyzer, because there are no `checkBind` checkers that generate
non-sink transitions when the location is `Unknown` or `Undefined`.
I also added an assertion that the location argument of `evalBind`
cannot be a `NonLoc`, because this is a common sense precondition, seems
to be actually true and makes it easier to reason about the behavior of
this function.
Reapply "[lldb] Do not refcount breakpoints in lldb-server" (#195858) (#196891)
This reapplies #195858 with a fix for 32-bit arm (and generally, any
architecture that uses software single-stepping). The problem was that
the temporary breakpoints used for single-stepping were interfering with
the breakpoints set by the client.
The fix is to check for existing breakpoints before setting the
temporary ones. To achieve this, I've separated the notion of "next PC
candidates for a thread" from "step breakpoints we've actually set".
The freebsd code had some software single stepping code, but:
- this was [introduced](https://reviews.llvm.org/D95802) for mips64
support, which was
[removed](https://github.com/llvm/llvm-project/pull/179582) earlier this
year
- AFAICT, this never worked since the original patch only checked
`m_threads_stepping_with_breakpoint`, but never set it to anything.
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[libc] Add some types to netinet/in.h (#196932)
Not including more types because I need to fix in_addr definition first.
This exposes stdint macros and types through the header, but POSIX
permits that behavior (and explicitly requires that we define uint8_t
and uint32_t).
No test as this is just adding a typedef, and I don't *think* we have
tests for that, but I can add a "check that type is defined" test if
that is desirable.
[GlobalISel] Recursively Optimise MatchTable Matchers
The core of this change is the additional call to `Matcher::optimize()` in the `optimizeRules` function,
which enables the match table optimization logic to recurse on the children of every GroupMatcher, forming
additional groups (which hoist more common predicates into a shared group).
To enable that, I had to update the `getFirstConditionAsRootType` implementation to support `GroupMatcher`.
I also included a small refactoring of the match table optimization pipeline that was identical between the
GlobalISel and GlobalISelCombiner emitters.
The results of this change are up to a 25% size reduction for GlobalISel match tables.
There is a tiny increase (a few bytes) in a combiner table because we now create new groups
(which need up to 3 additional opcodes because of the new `Try` and `Reject` required) to hoist one predicate for only 2 rules, which
result in a small net negative change (one or two more ops).
I used a small bash script to compare all relevant files, this is the before/after:
```
FILE OLD NEW DIFF% SAME?
---- ------- ------- ----- -----
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[GlobalISel][AMDGPU][AArch64] Fix GlobalISel copy propagation (#188781)
Disallow propagation of sub-registers after GlobalISel, as the current
code is blindly dropping any sub-register information. This also fixes
bugs in AArch64 and AMDGPU back-end that rely on the incorrect behavior
and would fail with the fix:
* Update `selectG_UNMERGE_VALUES` in AMDGPU so instead of generating
`hi16` for SGPR it shifts higher bits into the destination register
using `lshr`.
* Prevent AArch64 back-end from generating spurious `sub_32:gpr32all`
when selecting copy.
* Test changes: `fpto[s/u]i-sat-vector.ll`: The correct number of
conversions is now generated as higher 16-bits are handled correctly;
however, it introduces `lshr` instructions. This should be resolved in
#188287 by enabling `s_cvt_hi_*`.
[TableGen] Add submulticlass typechecking to template arg values (#197128)
Some typechecking was missing when parsing a submulticlass reference.
Add the CheckTemplateArgValues call in ParseSubMultiClassReference.
Resolves https://github.com/llvm/llvm-project/issues/84910.
[LifetimeSafety] Diagnose invalidated-field (#196680)
Teach lifetime safety invalidation diagnostics to handle origins that
escape through fields before the referenced object is invalidated.
Previously they were skipped.
Partially addresses https://github.com/llvm/llvm-project/issues/195706
[InstCombine] Relax the requirements for (X ^ C2) + C -> (C2 + C) - X (#196897)
If (C2 - X) has no borrow between bits, it is equivalent to (X ^ C2).
A borrow would occur when c2_bit=0 and x_bit=1.
It follows that c2_bit=1 or x_bit=0 means no borrow.
Remove an artificial condition that C2 must be a low bits mask.
Proof: https://alive2.llvm.org/ce/z/uNMsg_
[lld] Remove unused argument of DataExtractor constructor (NFC) (#196361)
`AddressSize` parameter is not used by `DataExtractor` and will be
removed in the future. See #190519 for more context.
[AArch64] Guard against vector invalidation in EmitAArch64CpuSupports. (#196909)
This prevents the Vector from being invalidated whilst iterator over it.
As far as I can tell we were adding elements twice.
Fixes #196789
[ValueTracking] Handle sext, zext in computeConstantRange
Propagate constant ranges through sign extension, zero extension.
Extends the existing handling for truncations.
[MachineBlockPlacement] Fix use-after-erase (#197109)
`ComputedEdges.erase(FoundEdge)` invalidates `FoundEdge`, but the
function then returns `FoundEdge->second`. Read the bucket value into
a local before erasing.
[AA] Respect potential synchronization effects of inline asm (#196965)
Respect potential synchronization effects of inline assembly calls on
not-yet-escaped memory.
We only do this if the call is both non-nosync and ModRefs "other"
memory. This is consistent with the atomic memory effects established in
https://github.com/llvm/llvm-project/pull/193768 and makes sure that
things like readonly/argmemonly continue to work as expected even for
frontends that do not emit nosync (which, right now, is all of them).
The limitation to inline asm should not actually exist: The issue
applies to all calls. This just fixes a particularly important case in a
targeted way. (The fact that inline asm memory barrier do not work as
expected is a problem for making optimizations of monotonic accesses
more aggressive, e.g. it caused issues for
https://github.com/llvm/llvm-project/pull/195015.)
The ability of inline asm (with a `~{memory}` clobber) to synchronize
was explicitly specified in
https://github.com/llvm/llvm-project/pull/150191.
[PowerPC] Fix types when emitting ppc_altivec_vupklsw (#187789)
When lowering BUILD_VECTOR, we produce this intrinsic node, but fail to
adjust the input/output types to ensure ISel works.
This patch simply adds the necessary bitcasts.
Fixes: https://github.com/llvm/llvm-project/issues/175297
[clang][bytecode] Pass correct QualType to getFixedPointSemantics() (#196952)
The expression type might be different, so pass the QualType we have at
hand.
[AArch64] Add a regression test for Apple tuning features(NFC) (#196792)
This patch adds a TableGen regression test that directly checks complete
featrure lists per generation for Apple CPUs, to guard against changes
that can break the <CPU,features> association if we lack indirect
coverage.
A followup patch should introduce generational delta encoding for Apple
tuning features that this test should help verify.
