LLVM/project c56410fllvm/test/Transforms/SLPVectorizer/RISCV basic-strided-stores.ll

[SLP] Pre-commit tests for constant strided stores (#185990)

Tests for #185964
DeltaFile
+879-0llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-stores.ll
+879-01 files

LLVM/project 472c8f8llvm/lib/Target/Mips MipsSetMachineRegisterFlags.cpp MipsSEInstrInfo.cpp, llvm/test/CodeGen/MIR/Mips mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir

MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (#185820)

There may be some BB to COPY fgr64cc register, and the fgr64cc register
is set by the previous BB.
We add a new pass called MipsSetMachineRegisterFlags, in which we set

We introduce a new pass called MipsSetMachineRegisterFlags, in which we
set NoSWrap flag for all instructions that works with fgr64cc registers.

And in copyPhyRegister, we allow the COPY instruction with NoSignWrap
from the double float registers to gpr32.
DeltaFile
+111-0llvm/lib/Target/Mips/MipsSetMachineRegisterFlags.cpp
+16-5llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
+2-1llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+2-0llvm/lib/Target/Mips/MipsTargetMachine.cpp
+2-0llvm/lib/Target/Mips/Mips.h
+1-0llvm/lib/Target/Mips/CMakeLists.txt
+134-66 files

LLVM/project 92623c5flang/lib/Parser expr-parsers.cpp, flang/test/Parser bug2364.f90

[flang] Improve error message for missing primary expression (#185484)

Don't mention the possible expectation that the extension %LOC() could
appear when emitting the error messages for a completely missing primary
expression; it's just confusing.
DeltaFile
+7-4flang/lib/Parser/expr-parsers.cpp
+8-0flang/test/Parser/bug2364.f90
+15-42 files

LLVM/project 79026d2flang/lib/Semantics mod-file.cpp, flang/test/Semantics modfile55.cuf

[flang][cuda] Emit CUDA attributes in type declarations in mod files (#185462)

The compiler implements CUDA object entity attributes in module files by
emitting "attributes()" statements after the type declaration statement
for the object. This works fine for variables, but not at all for
derived type components -- the "attributes()" statement is not allowed
in a derived type definition, and the module file isn't readable later
when USE'd. The fix is to emit the attribute as part of the type
declaration statement or component declaration statement instead.
DeltaFile
+15-15flang/test/Semantics/modfile55.cuf
+5-4flang/lib/Semantics/mod-file.cpp
+20-192 files

LLVM/project 6c217bblldb/test/API/functionalities/process_crash_info TestProcessCrashInfo.py

[lldb] Update TestProcessCrashInfo for MTE (#185808)

With MTE, the issue is caught by hardware and libmalloc records a
different message: "BUG IN CLIENT OF LIBMALLOC: MTE tag mismatch
(probable double-free)". Update the test accordingly.
DeltaFile
+1-0lldb/test/API/functionalities/process_crash_info/TestProcessCrashInfo.py
+1-01 files

LLVM/project c30e11clldb/source/Commands CommandObjectMemory.cpp

[lldb] Use raw address in "memory history" command (#185812)

The `memory history` command was using `ToAddress` for its address
argument, which strips non-addressable bits (including MTE tag bits) via
`FixAnyAddress`. This caused us to pass a stripped address to
`__asan_get_alloc_stack`/`__asan_get_free_stack`, which is incorrect.
Switch to `ToRawAddress` to preserve the complete address, including the
MTE tag, so we can look up the correct address.
DeltaFile
+1-1lldb/source/Commands/CommandObjectMemory.cpp
+1-11 files

LLVM/project 85bdc27lldb/test/API/python_api/find_in_memory address_ranges_helper.py

[lldb] Use SBProcess.FixAddress in address_ranges_helper.py (#185802)

Use `SBProcess.FixAddress` in `address_ranges_helper.py` to support
arm64e and ARM's Memory Tagging Extension (MTE) which rely on TBI to
encode data in the top byte, which in this mode is ignored by the HW.

This fixes TestFindInMemory.py and TestFindRangesInMemory.py when
running the LLDB test suite with MTE.
DeltaFile
+6-6lldb/test/API/python_api/find_in_memory/address_ranges_helper.py
+6-61 files

LLVM/project 2b6ca07clang/lib/CodeGen CodeGenModule.cpp, clang/lib/Sema SemaPPC.cpp

diagnose non-cpu strings in target_clones in Sema
DeltaFile
+3-5clang/lib/Sema/SemaPPC.cpp
+1-1clang/lib/CodeGen/CodeGenModule.cpp
+4-62 files

LLVM/project b2c5e6fclang/test/CodeGen scoped-atomic-ops.c, llvm/test/CodeGen/AArch64 clmul-fixed.ll

Merge branch 'main' into users/kparzysz/e05-intervening-code
DeltaFile
+853-1,663llvm/test/CodeGen/AArch64/clmul-fixed.ll
+927-1,424llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
+706-1,470llvm/test/CodeGen/X86/funnel-shift-i512.ll
+1,769-0llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
+1,189-529llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+1,419-130clang/test/CodeGen/scoped-atomic-ops.c
+6,863-5,2162,130 files not shown
+79,062-28,3022,136 files

LLVM/project 6c30fe3flang/lib/Semantics openmp-utils.cpp

Fix/add comments
DeltaFile
+12-4flang/lib/Semantics/openmp-utils.cpp
+12-41 files

LLVM/project f0cba9dclang/lib/CodeGen CGOpenMPRuntime.cpp, llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h

[mlir][OpenMP] Translate omp.declare_simd to LLVM IR

This mod aim to generate same vector ABI [1] for declare simd as Clang
and reuse function paramater mangling and codegen logic authored by
@alexey-bataev in [2].
Codegen for AArch64 is not included in this patch.

For each omp.declare_simd, lowering computes:

ParamAttrs: one entry per function argument, classifying it as
Vector / Uniform / Linear (+ step or var-stride) / Aligned.
Branch kind: Undefined / Inbranch / Notinbranch.
VLEN: either from simdlen(...) or derived from the CDT size.
llvm then emits x86 declare-simd variants by attaching mangled
function attributes of the form:

_ZGV _

where:

    [11 lines not shown]
DeltaFile
+205-0mlir/test/Target/LLVMIR/openmp-declare-simd-x86.mlir
+174-0mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+57-104clang/lib/CodeGen/CGOpenMPRuntime.cpp
+160-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+66-0llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+662-1045 files

LLVM/project 49a8f37clang/lib/CIR/Dialect/Transforms FlattenCFG.cpp, clang/test/CIR/CodeGen invoke-attrs.cpp try-catch.cpp

[CIR] Preserve attributes when converting call to try_call (#185782)

This adds code to preserve any attributes, including parameter and
return value attributes, that were present on a call operation that is
being replaced with a try_call operation.
DeltaFile
+129-0clang/test/CIR/Transforms/flatten-preserve-attrs.cir
+77-0clang/test/CIR/CodeGen/invoke-attrs.cpp
+22-1clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
+8-8clang/test/CIR/CodeGen/try-catch.cpp
+3-3clang/test/CIR/CodeGen/new-delete.cpp
+2-2clang/test/CIR/CodeGen/virtual-fn-calls-eh.cpp
+241-146 files

LLVM/project 6e93c4aclang/test/CodeGenHLSL ArrayAssignable.hlsl, clang/test/CodeGenHLSL/resources MatrixElement_cbuffer.hlsl CBufferMatrixSingleSubscriptSwizzle.hlsl

[DirectX] Specify element-aligned vectors (#180622)

Use the new "ve" Data Layout specifier to indicate that vectors are
element-aligned for the target.

Part of #123968
DeltaFile
+20-20llvm/test/CodeGen/DirectX/MemIntrinsics/memcpy-pointee.ll
+16-16clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
+8-8llvm/test/CodeGen/DirectX/MemIntrinsics/memcpy-struct.ll
+8-8clang/test/CodeGenHLSL/resources/CBufferMatrixSingleSubscriptSwizzle.hlsl
+5-5clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
+4-4clang/test/CodeGenHLSL/ArrayAssignable.hlsl
+61-6111 files not shown
+77-8117 files

LLVM/project eae80c6llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV][P-ext] Remove unncessary patterns for setgt/setugt. NFC (#185971)

We mark these CondCodes as Expand so LegalizeDAG will turn them into
setlt/setult.
DeltaFile
+0-5llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+0-51 files

LLVM/project 6903a58lldb/examples/python formatter_bytecode.py, lldb/test/Shell/ScriptInterpreter/Python python-bytecode.test

[lldb][bytecode] Add swift output to Python->bytecode compiler (#185773)

For swift projects using the compiler, having a swift output option will
make it easier to integrate bytecode formatters into the build.
DeltaFile
+100-33lldb/examples/python/formatter_bytecode.py
+38-0lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterC.txt
+0-38lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatter.txt
+36-0lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
+4-2lldb/test/Shell/ScriptInterpreter/Python/python-bytecode.test
+178-735 files

LLVM/project 7c134b4lldb/source/ValueObject ValueObject.cpp

[LLDB] Fix null pointer dereference. (#185985)

The code was declaring a shared poiner and then immediately trying to
dereference it to initialize it's contents, but the dereference was
giving a seg fault. This fixes that issue.
DeltaFile
+3-4lldb/source/ValueObject/ValueObject.cpp
+3-41 files

LLVM/project 0779914clang/include/clang/Options Options.td, clang/lib/CodeGen CGObjCMac.cpp

[ObjC] Emit class msgSend stub calls (#183923)

Instead of translating class messages to `objc_msgSend` calls, clang now
emits calls to stub functions that are synthesized by the linker. Each
stub loads the class reference and the selector name and forwards them
to `objc_msgSend`.

The stub function is named using the following format:
`objc_msgSendClass$selName$_OBJC_CLASS_$_className`

Note that the optimization is disabled in the following cases:
- When the class name is unknown at compile time (e.g, `[id
classMethod]`).
- The selector name contains a `$`, which serves as the delimiter in
stub
   function names.
- The class is annotated with either `objc_class_stub` or
  `objc_runtime_visible`.


    [14 lines not shown]
DeltaFile
+125-12clang/test/CodeGenObjC/method-selector-stub.m
+51-13clang/lib/CodeGen/CGObjCMac.cpp
+31-8clang/test/Driver/darwin-objc-selector-stubs.m
+9-0clang/lib/Driver/ToolChains/Darwin.cpp
+6-1clang/lib/Driver/ToolChains/Clang.cpp
+4-0clang/include/clang/Options/Options.td
+226-341 files not shown
+227-347 files

LLVM/project eeef27elibclc/clc/lib/generic/conversion clc_convert_int2float.cl, libclc/clc/lib/generic/math clc_lgamma_r.cl clc_atan2pi.cl

Revert "[libclc][NFC] Change include style from <...> to "..."" (#185888)

Reverts llvm/llvm-project#185788. This change is causing test
regressions in libclc, so it's definitely not "NFC", and with its size
it's hard to figure out what exactly went wrong.
DeltaFile
+26-26libclc/clc/lib/generic/conversion/clc_convert_int2float.cl
+17-17libclc/clc/lib/generic/math/clc_lgamma_r.cl
+17-17libclc/clc/lib/generic/math/clc_atan2pi.cl
+17-17libclc/clc/lib/generic/math/clc_atan2.cl
+16-16libclc/clc/lib/generic/math/clc_sincos_helpers.cl
+16-16libclc/clc/lib/generic/math/clc_remainder.cl
+109-109679 files not shown
+2,412-2,417685 files

LLVM/project 65e3b86clang/test/CIR/CodeGen string-literals.cpp

[CIR] Upstream test to lower string from incubator (#185956)

Upstreaming test from
[here](https://github.com/llvm/clangir/blob/main/clang/test/CIR/Lowering/str.c).

Partially address: https://github.com/llvm/llvm-project/issues/156747

---------

Signed-off-by: ZakyHermawan <zaky.hermawan9615 at gmail.com>
DeltaFile
+10-0clang/test/CIR/CodeGen/string-literals.cpp
+10-01 files

LLVM/project 91b08f8mlir/python/mlir ir.py

[MLIR] [Python] Fixed the return type of `loc_traceback` (#185976)

Older type checkers do not support single-type-argument `Generator`.
DeltaFile
+1-1mlir/python/mlir/ir.py
+1-11 files

LLVM/project b5fc8a1llvm/lib/Target/AMDGPU/MCTargetDesc AMDGPUMCTargetDesc.cpp AMDGPUMCTargetDesc.h, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp AMDGPUBaseInfo.h

[AMDGPU] Recover high VGPRs from S_SETREG_IMM32_B32 in disasm (#185968)
DeltaFile
+27-0llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+20-7llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+9-2llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+3-2llvm/tools/llvm-objdump/llvm-objdump.cpp
+2-1llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h
+67-124 files not shown
+74-1610 files

LLVM/project b7631bdclang/lib/CIR/CodeGen CIRGenExprCXX.cpp, clang/lib/CIR/Dialect/Transforms CXXABILowering.cpp

[CIR] Add support for size parameter with array delete (#185768)

This implements reading the array cookie and passing a size parameter to
the array delete operator for simple cases that require a size
parameter.
DeltaFile
+54-0clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
+40-11clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
+49-0clang/test/CIR/CodeGen/delete-array.cpp
+37-0clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.cpp
+34-0clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
+4-5clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+218-166 files

LLVM/project a17bcc5llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV] Use PatGprGpr and PatGprImm to simplify P extension patterns. NFC (#185965)

Add space to "def:" in the remaining patterns.
DeltaFile
+144-162llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+144-1621 files

LLVM/project dd76cf6llvm/lib/Target/RISCV RISCVISelDAGToDAG.h RISCVInstrInfo.td

[RISCV] Make selectShiftMask32/selectShiftMask64 a template function. NFC (#185957)

I may need selectShiftMask16 and selectShiftMask8 for P extension shift
instructions.
DeltaFile
+2-5llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
+1-1llvm/lib/Target/RISCV/RISCVInstrInfo.td
+1-1llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+4-73 files

LLVM/project 49d9ba9libc/include wctype.yaml, libc/src/wctype iswxdigit.cpp iswxdigit.h

[libc] Add entrypoint for iswxdigit (#185574)

This PR intends to add entrypoints and some smoke tests for `iswxdigit`
function

Changes made are :-
- Added entrypoint for `iswxdigit` in wctype.yaml
- Added CMake entrypoint object for `iswxdigit`
- Added Header and implementation in `iswxdigit.h` and `iswxdigit.cpp`
- Added test for `iswxdigit` in iswxdigit_test.cpp
- Added `iswxdigit` in entrypoints.txt for available platforms 

Tested using = `ninja libc.test.src.wctype.iswxdigit_test.__unit__`
passes all tests

part of #185136
DeltaFile
+25-0libc/test/src/wctype/iswxdigit_test.cpp
+21-0libc/src/wctype/iswxdigit.cpp
+21-0libc/src/wctype/iswxdigit.h
+11-0libc/src/wctype/CMakeLists.txt
+10-0libc/test/src/wctype/CMakeLists.txt
+6-0libc/include/wctype.yaml
+94-08 files not shown
+102-014 files

LLVM/project 9480187llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.cvt.pkrtz.ll llvm.amdgcn.cvt.pk.i16.ll

AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (#185534)

There are regressions that can be seen in pkrtz test regarding undefs
and fneg folding when swapping to GlobalISel with new register bank
select. Hopefully these can be cleaned up in a later patch.
DeltaFile
+1,189-529llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+373-25llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.i16.ll
+373-25llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pk.u16.ll
+10-10llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir
+5-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+1,950-5895 files

LLVM/project f88c812llvm/include/llvm/MC MCInstrAnalysis.h, llvm/lib/Target/AMDGPU/MCTargetDesc AMDGPUMCTargetDesc.cpp

[AMDGPU] Recover high VGPRs from S_SETREG_IMM32_B32 in disasm
DeltaFile
+20-7llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+27-0llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+9-2llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+3-2llvm/tools/llvm-objdump/llvm-objdump.cpp
+2-1llvm/include/llvm/MC/MCInstrAnalysis.h
+67-124 files not shown
+74-1610 files

LLVM/project a89c152mlir/include/mlir/Dialect/SPIRV/IR SPIRVMatrixOps.td SPIRVBase.td, mlir/test/Dialect/SPIRV/IR matrix-ops.mlir

[mlir][spirv] Add OpOuterProduct operation (#185959)

This should be the last operation enabled by the `Matrix` capability.

Assisted-by: Codex
DeltaFile
+51-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMatrixOps.td
+31-0mlir/test/Dialect/SPIRV/IR/matrix-ops.mlir
+7-0mlir/test/Target/SPIRV/matrix.mlir
+3-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+92-14 files

LLVM/project bf2e458lldb/source/Core PluginManager.cpp

[lldb] Reinstate ~PluginInstances assertion (#185537)

This re-enables the assertion in the PluginInstances destructor that
catches plugins that were not unregistered in their Terminate method. It
also adds a helpful message to quickly identify the plugin.
DeltaFile
+9-1lldb/source/Core/PluginManager.cpp
+9-11 files

LLVM/project fdd62dellvm/utils lldbDataFormatters.py

[lldb] Add types to function signatures in lldbDataFormatters (#185940)
DeltaFile
+52-26llvm/utils/lldbDataFormatters.py
+52-261 files