[KnownFPClass] Restrict KnownFPClass::bitcast/toKnownBits deductions to verified FP semantics (#221133)
`KnownFPClass::bitcast` and `KnownFPClass::toKnownBits` previously made
deductions for floating-point semantics whose bit representations had
not been verified.
I have made it so `KnownFPClass::bitcast` and
`KnownFPClass::toKnownBits` return `fcAllFlags`/unknown for any
`APFloat` semantics we have not verified. Currently, this prevents
potentially invalid deductions for `PPCDoubleDouble` (mostly in regards
to the signbit and endianess). It also allows these functions to be
"safely" used with the 4/6/8 bit floating point types since we
conservatively return unknown.
Currently the list of supported/verified semantics for both `bitcast`
and `toKnownBits` are:
```
IEEEhalf
BFloat
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[SSAF][clang-reforge] Retrofit expressions after CppBoundedBuffers decl rewrites
PR #210457 introduces declaration rewriting. When CppBoundedBuffers
rewrites a declaration or return type to a bounded_ptr/bounded_array,
some of the existing uses of that entity needs retrofit.
This commit creates expression rewrites for the following patterns:
- Append '.data()' to call arguments when necessary parameter is not
transformed but argument is transformed.
- Append '.as_bounded<T>()' to call arguments when both parameter and
argument are transformed but element types are not identical.
- Rewrite '&e[i]' to '(e + i)' and '&*e'/'&(*e)' to 'e', if 'e' is
transformed.
- Rewrite '(T*)e', 'static_cast<T*>(e)', and 'reinterpret_cast<T*>(e)'
to 'e.as_bounded<T>()', if 'e' is transformed.
The 3rd step of
rdar://187125348
[AMDGPU] Add getLDSAllocGranule to TargetParser
Expose the LDS allocation granule from GPUKind and subarch without an
MCSubtargetInfo. Use the dedicated granularity features and consolidate
backend users on the byte-valued query.
Change-Id: Ic0c9345e7657ec3c6978a646628598cb7608b390
[AMDGPU] Model LDS allocation granularity with subtarget features
Add numeric LDS allocation granularity features, expose them through the TargetParser feature bitset, and use them in the existing backend query.
Generic targets select the largest covered allocation granularity so their resource calculations remain conservative.
Change-Id: Icdd501d008c9d3cd566bdc8bde4a75d566ecb90a
[AMDGPU] Validate generic-target addressable local memory size
Apply the generic numeric at-most comparison to addressable LDS size. A
generic target must not advertise more local memory than any GPU it covers.
Keep the backend fallback of 32768 bytes and add integration tests using
the real LDS features for valid coverage, over-advertised capacity, and
conflicting feature values.
Change-Id: I9fffbe532b8b5bc8875f20f394f29e2e6899f52e
[AMDGPU] Generalize generic-target numeric property validation
Describe numeric properties with a field name, fallback value, and an
at-least, at-most, or equal comparison against each covered GPU. Keep exact
feature-record matching for unannotated frontend capabilities.
Share numeric evaluation and metadata defaults with table emission, while
rejecting conflicting values within a GPU. Reuse feature closures during
validation and emission.
Cover comparison policies, defaults, implied features, and malformed
metadata with synthetic TableGen tests.
Change-Id: I287dd5211ab542a7e8d03bd4a9eca4ac6460f588
[SLP] Fix dep accounting when cancelling a bundle with copyable elements
Restore the parent-edge copyable data as a user of the instruction only
if the cancelled element displaced it at creation (chained copyable
self-use); otherwise the extra user dependency is never released and
scheduling asserts.
Fixes #223139
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/223174
CodeGen: Clear physreg ranges after SplitCriticalEdge
After critical edge spliting replaces a terminator, clear referenced
physreg ranges. The block's terminators may be replaced, and may
reference physical registers (e.g. WebAssebly's ARGUMENTS. When
LiveIntervals is available, repairIntervalsInRange only repairs virtual
registers, so the tracked physreg units were stale.
It feels like a bug that repairIntervalsInRange doesn't touch physregs,
but I've left that for a future change.
Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
[clang][ARM] Use sponentry for setjmp on Windows ARM32 (#222366)
On Windows, _setjmp and _setjmpex take a second argument, the frame,
which the CRT stores in the jmp_buf and which longjmp later hands to
RtlUnwindEx as the frame to unwind. On aarch64, this is the stack pointer
on entry to the function, while x86_64 takes the function frame address.
ARM expects the same as aarch64 here, the stack pointer on entry.
Assisted-by: Claude Opus 5 (Anthropic)
[SSAF][clang-reforge] Retrofit expressions after CppBoundedBuffers decl rewrites
PR #210457 introduces declaration rewriting. When CppBoundedBuffers
rewrites a declaration or return type to a bounded_ptr/bounded_array,
some of the existing uses of that entity needs retrofit.
This commit creates expression rewrites for the following patterns:
- Append '.data()' to call arguments when necessary parameter is not
transformed but argument is transformed.
- Append '.as_bounded<T>()' to call arguments when both parameter and
argument are transformed but element types are not identical.
- Rewrite '&e[i]' to '(e + i)' and '&*e'/'&(*e)' to 'e', if 'e' is
transformed.
- Rewrite '(T*)e', 'static_cast<T*>(e)', and 'reinterpret_cast<T*>(e)'
to 'e.as_bounded<T>()', if 'e' is transformed.
The 3rd step of
rdar://187125348
[AMDGPU] Add getLocalMemorySize to TargetParser
Add getLocalMemorySize and getAddressableLocalMemorySize, both taking a
GPUKind or a Triple::SubArchType, so the LDS a work-group gets can be
queried from a GPU name alone without an MCSubtargetInfo. The first
returns the physical block available in the current mode, the second
caps it at what one work-group can address, mirroring the IsaInfo pair.
The number of SIMDs a work-group runs on is a per-kernel mode rather
than a property of the GPU, so it stays a parameter. GCNSubtarget
initializes its cached sizes from the new entry points. There is no
functional change.
Change-Id: Ib71428b66032a231ed491d6294122b359abfe7e2
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[SelectionDAG] Remove dead functions and declarations (NFC) (#223126)
SelectionDAG::getStore (with Offset): Added on July 31, 2026 in commit
c57b2b6103cb4bb6c4c2bee901c1eee2b966e5f0 without a definition or any
callers.
SelectionDAG::getIndexedLoadVP, SelectionDAG::getIndexedStoreVP: Added
on August 31, 2021 in commit 524ded7d01a700aa6473d09a877be13fe45b85a3
without any callers.
SelectionDAG::getTruncStridedStoreVP: Added on March 10, 2022 in commit
28cfa764c2e3d36b856b3e70d49f17088b90c1f5 without any callers.
Assisted-by: Antigravity
[LV] Add test for cost of widened pointer induction (NFC). (#223153)
Add a cost test where the pointer induction is used as a value and
remains a VPWidenPointerInductionRecipe.
PR: https://github.com/llvm/llvm-project/pull/223153
[SCEV] Directly form add recurrences for simple pointer IVs. (#222915)
Add support for PN = PHI(Start, gep Self, LoopInvariant) to
createSimpleAffineAddRec.
This allows to handle simple pointer IVs without going through the more
expensive createAddRecFromPHI machinery in many cases.
This is not completely NFC: previously we created SCEVUnknown for a
trivial AddRec with step 0, now we return the start value.
This gives a modest geomean compile-time decrease
* stage1-O3: -0.05%
* stage1-ReleaseThinLTO: -0.06%
* stage1-ReleaseLTO-g: -0.06%
* stage1-aarch64-O3: -0.07%
* stage2-O3: -0.05%
* clang build: -0.08%
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