LLVM/project 3ccfbc8lldb/source/Core Debugger.cpp, lldb/test/API/functionalities/statusline TestStatusline.py

[lldb] Make sure changing the separator takes immediate effect (#136779)

The setter is only used when changing the setting programmatically. When
using the settings command, we need to monitor SetPropertyValue.
DeltaFile
+3-1lldb/source/Core/Debugger.cpp
+3-1lldb/test/API/functionalities/statusline/TestStatusline.py
+6-22 files

LLVM/project 439f16autils/bazel/llvm-project-overlay/mlir BUILD.bazel

[mlir][bazel] Port e112dccc8ba49425c575a6b15325f2cbeef5c606.
DeltaFile
+2-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+2-01 files

LLVM/project 7547ad3libc/src/math/generic expm1f.cpp

[libc][math] Skip checking for exceptional values in expm1f when LIBC_MATH_SKIP_ACCURATE_PASS is set. (#130968)

DeltaFile
+2-1libc/src/math/generic/expm1f.cpp
+2-11 files

LLVM/project 141c14cllvm/test/CodeGen/LoongArch/lasx widen-shuffle-mask.ll, llvm/test/CodeGen/LoongArch/lsx widen-shuffle-mask.ll

[LoongArch] Pre-commit for widen shuffle mask (#136544)

DeltaFile
+137-0llvm/test/CodeGen/LoongArch/lasx/widen-shuffle-mask.ll
+137-0llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
+274-02 files

LLVM/project 34a4c58clang/include/clang/AST Type.h, clang/lib/AST Type.cpp

[clang] Rework `hasBooleanRepresentation`. (#136038)

This is a follow-up of 13aac46332f607a38067b5ddd466071683b8c255.
This commit adjusts the implementation of `hasBooleanRepresentation` to
be somewhat aligned to `hasIntegerRepresentation`.
In particular vector of booleans should be handled in
`hasBooleanRepresentation`, while `_Atomic(bool)` should not.
DeltaFile
+13-7clang/lib/CodeGen/CGExpr.cpp
+9-10clang/lib/AST/Type.cpp
+3-2clang/include/clang/AST/Type.h
+25-193 files

LLVM/project 68d89e9llvm/lib/TargetParser RISCVISAInfo.cpp

[RISCV] Remove stale comment. NFC
DeltaFile
+0-1llvm/lib/TargetParser/RISCVISAInfo.cpp
+0-11 files

LLVM/project afc030dclang/unittests/Format FormatTestJS.cpp

[clang-format] Don't test stability if JS format test fails (#136662)

DeltaFile
+10-6clang/unittests/Format/FormatTestJS.cpp
+10-61 files

LLVM/project 037657dclang/lib/Format TokenAnnotator.cpp, clang/unittests/Format TokenAnnotatorTest.cpp

[clang-format] Correctly annotate kw_operator in using decls (#136545)

Fix #136541
DeltaFile
+4-2clang/lib/Format/TokenAnnotator.cpp
+5-0clang/unittests/Format/TokenAnnotatorTest.cpp
+9-22 files

LLVM/project 9efabbbclang/lib/Format FormatTokenLexer.cpp FormatTokenLexer.h, clang/unittests/Format TokenAnnotatorTest.cpp

[clang-format] Fix a bug in lexing C++ UDL ending in $ (#136476)

Fix #61612
DeltaFile
+29-0clang/lib/Format/FormatTokenLexer.cpp
+6-0clang/unittests/Format/TokenAnnotatorTest.cpp
+1-0clang/lib/Format/FormatTokenLexer.h
+36-03 files

LLVM/project 4f71655clang/lib/Format UnwrappedLineParser.cpp, clang/unittests/Format TokenAnnotatorTest.cpp

[clang-format] Fix a bug in parsing C-style cast of lambdas (#136099)

Fix #135959
DeltaFile
+18-6clang/lib/Format/UnwrappedLineParser.cpp
+10-0clang/unittests/Format/TokenAnnotatorTest.cpp
+28-62 files

LLVM/project b7fbe09clang/lib/CodeGen CodeGenModule.cpp CGCall.cpp

Address review comments.

Created using spr 1.3.6-beta.1
DeltaFile
+5-5clang/lib/CodeGen/CodeGenModule.cpp
+4-4clang/lib/CodeGen/CGCall.cpp
+2-2clang/lib/CodeGen/CodeGenModule.h
+11-113 files

LLVM/project f2327fallvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+3-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+3-01 files

LLVM/project b9cf383llvm/lib/CodeGen LiveRangeShrink.cpp, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+12-3llvm/lib/CodeGen/LiveRangeShrink.cpp
+3-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+15-32 files

LLVM/project 1e3181cllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+3-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+3-01 files

LLVM/project 11c0913clang/lib/CodeGen CodeGenModule.cpp, llvm/include/llvm/IR Metadata.h

Address review comments.

Created using spr 1.3.6-beta.1
DeltaFile
+34-0llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
+6-13llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+6-10clang/lib/CodeGen/CodeGenModule.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+1-1llvm/test/CodeGen/X86/call-graph-section.ll
+54-266 files

LLVM/project 82f8060llvm/include/llvm/IR Metadata.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+34-0llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
+6-13llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+1-1llvm/test/CodeGen/X86/call-graph-section.ll
+48-165 files

LLVM/project 89c896bllvm/include/llvm/IR Metadata.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

Rebase on parent llvm change.

Created using spr 1.3.6-beta.1
DeltaFile
+34-0llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
+6-13llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+1-1llvm/test/CodeGen/X86/call-graph-section.ll
+48-165 files

LLVM/project 7a1c8fbllvm/include/llvm/IR Metadata.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+34-0llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
+6-13llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+1-1llvm/test/CodeGen/X86/call-graph-section.ll
+48-165 files

LLVM/project 80df0c0llvm/include/llvm/IR Metadata.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

Address review comments.

Created using spr 1.3.6-beta.1
DeltaFile
+34-0llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
+6-13llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+1-1llvm/test/CodeGen/X86/call-graph-section.ll
+48-165 files

LLVM/project 4b04333llvm/include/llvm/IR Metadata.h, llvm/lib/IR Verifier.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+7-22 files

LLVM/project 4724c6ellvm/include/llvm/IR Metadata.h, llvm/lib/IR Verifier.cpp

Move verifier down to parent change.

Created using spr 1.3.6-beta.1
DeltaFile
+6-0llvm/include/llvm/IR/Metadata.h
+1-2llvm/lib/IR/Verifier.cpp
+7-22 files

LLVM/project 175b5f1llvm/include/llvm/IR Metadata.h, llvm/lib/IR Verifier.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+18-0llvm/lib/IR/Verifier.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+24-02 files

LLVM/project 8e67a0ellvm/include/llvm/IR Metadata.h, llvm/lib/IR Verifier.cpp

Rebase on parent change.

Created using spr 1.3.6-beta.1
DeltaFile
+18-0llvm/lib/IR/Verifier.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+24-02 files

LLVM/project 8c7b1abllvm/include/llvm/IR Metadata.h, llvm/lib/IR Verifier.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+18-0llvm/lib/IR/Verifier.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+24-02 files

LLVM/project fdf6a1cllvm/include/llvm/IR Metadata.h, llvm/lib/IR Verifier.cpp

Verifier changes.

Created using spr 1.3.6-beta.1
DeltaFile
+18-0llvm/lib/IR/Verifier.cpp
+6-0llvm/include/llvm/IR/Metadata.h
+24-02 files

LLVM/project 122e515llvm/utils/gn/secondary/clang/lib/Sema BUILD.gn

gn build: Port d1cce66469d0 more
DeltaFile
+1-0llvm/utils/gn/secondary/clang/lib/Sema/BUILD.gn
+1-01 files

LLVM/project 2484060llvm/lib/Target/RISCV RISCVFoldMemOffset.cpp, llvm/test/CodeGen/RISCV fold-mem-offset.mir

[RISCV] Clear kill flags after replaceRegWith in RISCVFoldMemOffset. (#136762)

Any kill flags that were present for the old register are not valid for
the replacement and the replacement may have extended the live range of
the replacement register.
DeltaFile
+43-0llvm/test/CodeGen/RISCV/fold-mem-offset.mir
+1-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+44-02 files

LLVM/project 4e679eamlir/python/mlir/_mlir_libs/_mlir ir.pyi

[MLIR] [python] Fixed the signature of `_OperationBase.get_asm` (#136676)

It claimed to return an `io.StringIO` or an `io.BytesIO`, but it did in
fact return `str` or `bytes`.
DeltaFile
+19-12mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
+19-121 files

LLVM/project fb9ba07llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/Transforms/InferAddressSpaces/AMDGPU alloca-as0.ll

[AMDGPU] Make `AllocaInst` return AS5 in `getAssumedAddrSpace`
DeltaFile
+35-0llvm/test/Transforms/InferAddressSpaces/AMDGPU/alloca-as0.ll
+3-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+38-02 files

LLVM/project ae09399llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU alloca-as0.ll assert-wrong-alloca-addrspace.ll

[AMDGPU] Support alloca in AS0

This PR lowers an alloca in AS0 to an alloca in AS5 followed by an addrspacecast
back to AS0.
DeltaFile
+417-0llvm/test/CodeGen/AMDGPU/alloca-as0.ll
+31-2llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+28-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+0-16llvm/test/CodeGen/AMDGPU/assert-wrong-alloca-addrspace.ll
+5-0llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
+3-0llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+484-191 files not shown
+485-197 files