LLVM/project e90b123llvm/test/Analysis/LoopAccessAnalysis retry-runtime-checks-after-dependence-analysis-forked-pointers.ll all-ones-null-pointer.ll

[LAA] Add additional tests for incorrect negative stride handling (NFC) (#218376)
DeltaFile
+182-0llvm/test/Analysis/LoopAccessAnalysis/evaluate-at-symbolic-max-backedge-taken-count-may-wrap.ll
+49-0llvm/test/Analysis/LoopAccessAnalysis/all-ones-null-pointer.ll
+40-0llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
+271-03 files

LLVM/project 4e7f3f4clang/docs BoundsSafetyImplPlans.rst, clang/include/clang/Basic Attr.td AttrDocs.td

[NFC][BoundsSafety] Give `counted_by_or_null`, `sized_by`, and `sized_by_or_null` their own documentation (#212877)

Previously the `counted_by`, `counted_by_or_null`, `sized_by`, and
`sized_by_or_null` attributes all pointed at a single `Documentation`
object (`CountedByDocs`). The generated `AttributeReference.rst`
therefore folded all four into one entry whose text described only
`counted_by` used on a C99 flexible array member.

This was misleading because the attributes differ in important ways that
went undocumented:

* `counted_by` counts *elements* whereas `sized_by` counts *bytes*.
* `counted_by` and `sized_by` require a null pointer to have a zero
count/size, while the `_or_null` variants allow a null pointer
regardless of the count or size.
* `counted_by` may be applied to a flexible array member, but
`sized_by`, `counted_by_or_null`, and `sized_by_or_null` apply to
pointers only.


    [34 lines not shown]
DeltaFile
+225-6clang/include/clang/Basic/AttrDocs.td
+9-0clang/docs/BoundsSafetyImplPlans.rst
+3-3clang/include/clang/Basic/Attr.td
+237-93 files

LLVM/project d1dd066llvm/lib/Target/AArch64 AArch64MIPeepholeOpt.cpp, llvm/test/CodeGen/AArch64 mipeephole-undef-operand.mir

AArch64: Fix MIPeepholeOpt null dereference on undef source operands (#218291)
DeltaFile
+57-0llvm/test/CodeGen/AArch64/mipeephole-undef-operand.mir
+6-4llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+63-42 files

LLVM/project 22ac1fdoffload/plugins-nextgen/amdgpu/src rtl.cpp, offload/plugins-nextgen/common/include PluginInterface.h

[offload] Use pinned memory for KLE

Reduce kernel launch latency by using the fast path "pinned host memory
-> device memory" for submitting the kernel launch environment to the
device.

Claude assisted with this patch.
DeltaFile
+71-0offload/test/offloading/kernel_launch_environment.c
+47-2offload/plugins-nextgen/common/src/PluginInterface.cpp
+14-0offload/plugins-nextgen/common/include/PluginInterface.h
+2-0offload/plugins-nextgen/amdgpu/src/rtl.cpp
+134-24 files

LLVM/project 9d2b075offload/include/Shared APITypes.h, offload/plugins-nextgen/common/include PluginInterface.h

[offload] Thread allocation kind through async info

Claude assisted with this patch.
DeltaFile
+37-7offload/plugins-nextgen/common/src/PluginInterface.cpp
+5-2offload/include/Shared/APITypes.h
+2-2offload/plugins-nextgen/common/include/PluginInterface.h
+44-113 files

LLVM/project a79b74doffload/plugins-nextgen/amdgpu/src rtl.cpp, offload/plugins-nextgen/common/include MemoryManager.h PluginInterface.h

[offload] Pool host and shared allocations (#214754)

Route them through a memory manager, like the device allocations. Also,
move the registration as pinned memory to the plugin site since only the
plugin knows if the corresponding host/shared memory is pinned. Improves
performance of affected allocations by ballpark 1,000x.
DeltaFile
+29-40offload/plugins-nextgen/common/src/PluginInterface.cpp
+14-6offload/plugins-nextgen/common/include/MemoryManager.h
+19-1offload/plugins-nextgen/common/include/PluginInterface.h
+12-0offload/plugins-nextgen/amdgpu/src/rtl.cpp
+6-5openmp/docs/design/Runtimes.rst
+80-525 files

LLVM/project 0d9f87ellvm/lib/Transforms/Scalar GVN.cpp, llvm/test/Transforms/GVN mssa-reach-block-limit.ll

[GVN] Limit MemorySSA reaching-value block scans (#217945)

Cap expensive non-local MemorySSA queries at the same 200-block limit
used by MemDep. On an internal workload, this closes the majority of the
compile-time gap between the MemorySSA and MemDep GVN paths.
Runtime remains almost flat.
DeltaFile
+47-0llvm/test/Transforms/GVN/mssa-reach-block-limit.ll
+8-0llvm/lib/Transforms/Scalar/GVN.cpp
+55-02 files

LLVM/project c0bda58llvm/lib/IR Verifier.cpp, llvm/test/Verifier DILocalScope-non-local-parent.ll

[Verifier] Diagnose local scope chains that miss their DISubprogram

DILocalScope::getSubprogram() casts every parent to DILocalScope, so a
DILexicalBlock parented to a non-local scope such as a DIFile makes the
verifier abort on that cast before visitDILexicalBlockBase can report
"invalid local scope".
DeltaFile
+32-30llvm/lib/IR/Verifier.cpp
+28-0llvm/test/Verifier/DILocalScope-non-local-parent.ll
+60-302 files

LLVM/project 4edb703flang/test/Fir omp-declare-target-data.fir, flang/test/Lower/OpenMP declare-target-func-and-subr.f90

[MLIR][OpenMP] DeclareTargetInterface and DeclareTargetAttr cleanup, NFCI

The changes introduced by this patch are intended to avoid triggering
multiple by name lookups to the "omp.declare_target" attribute every
time any data from the `DeclareTargetInterface` is queried, remove the
need for keeping multiple default values for the same data, clean up
the assembly format and generally improve the usage of the interface.

List of changes:
- `DeclareTargetInterface` only provides `setDeclareTarget` and
  `getDeclareTarget` methods to handle the "omp.declare_target"
  attribute, maintaining a single canonical way of accessing it.
- `DeclareTargetAttr` provides direct access to the capture clause and
  device type enums, rather than wrapping them into an `Attribute`.
  These are now mandatory as well. Both changes together make accessing
  them more straightforward and simplify the attribute representation.
DeltaFile
+44-44mlir/test/Dialect/OpenMP/mark-declare-target.mlir
+15-60mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
+30-30mlir/test/Dialect/OpenMP/attr.mlir
+23-23flang/test/Lower/OpenMP/declare-target-func-and-subr.f90
+22-22flang/test/Fir/omp-declare-target-data.fir
+25-19mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+159-19857 files not shown
+411-43263 files

LLVM/project 771bdfdmlir/include/mlir/Dialect/OpenMP OpenMPDialect.td, mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

[MLIR][OpenMP] Add verification for DeclareTargetInterface (#217294)

This patch introduces checks to ensure the "omp.declare_target"
attribute is only attached to `DeclareTargetInterface` operations, it is
always the right type attribute and its properties do not conflict with
the operation they are attached to.
DeltaFile
+42-0mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+28-0mlir/test/Dialect/OpenMP/invalid-interface.mlir
+0-18mlir/test/Dialect/OpenMP/attr.mlir
+1-0mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.td
+71-184 files

LLVM/project 08ef7a0flang/test/Fir omp-declare-target-data.fir, flang/test/Lower/OpenMP declare-target-func-and-subr.f90

[MLIR][OpenMP] DeclareTargetInterface and DeclareTargetAttr cleanup, NFCI

The changes introduced by this patch are intended to avoid triggering
multiple by name lookups to the "omp.declare_target" attribute every
time any data from the `DeclareTargetInterface` is queried, remove the
need for keeping multiple default values for the same data, clean up
the assembly format and generally improve the usage of the interface.

List of changes:
- `DeclareTargetInterface` only provides `setDeclareTarget` and
  `getDeclareTarget` methods to handle the "omp.declare_target"
  attribute, maintaining a single canonical way of accessing it.
- `DeclareTargetAttr` provides direct access to the capture clause and
  device type enums, rather than wrapping them into an `Attribute`.
  These are now mandatory as well. Both changes together make accessing
  them more straightforward and simplify the attribute representation.
DeltaFile
+44-44mlir/test/Dialect/OpenMP/mark-declare-target.mlir
+15-60mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
+30-30mlir/test/Dialect/OpenMP/attr.mlir
+23-23flang/test/Lower/OpenMP/declare-target-func-and-subr.f90
+22-22flang/test/Fir/omp-declare-target-data.fir
+25-19mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+159-19857 files not shown
+411-43263 files

LLVM/project 3f93b16mlir/include/mlir/Dialect/OpenMP OpenMPDialect.td, mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

[MLIR][OpenMP] Add verification for DeclareTargetInterface

This patch introduces checks to ensure the "omp.declare_target"
attribute is only attached to `DeclareTargetInterface` operations, it is
always the right type attribute and its properties do not conflict with
the operation they are attached to.
DeltaFile
+42-0mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+28-0mlir/test/Dialect/OpenMP/invalid-interface.mlir
+0-18mlir/test/Dialect/OpenMP/attr.mlir
+1-0mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.td
+71-184 files

LLVM/project 8fd10b8llvm/lib/Target/AMDGPU SILowerI1Copies.cpp, llvm/test/CodeGen/AMDGPU uniform-inside-divergent-cfg.ll

[AMDGPU] Handle uniform control flow inside divergent (#217977)

Fix PhiIncomingAnalysis::analyze. When it detected an incoming block
that started divergent control flow ending at DefBlock, it tried to add
all blocks in that divergent region to ReachableMap. But the propagation
could be stopped by other blocks (those that did not start divergent
control flow) that were already in ReachableMap. Fix this by doing the
propagation first, before adding the remaining incoming blocks.
DeltaFile
+163-0llvm/test/CodeGen/AMDGPU/uniform-inside-divergent-cfg.ll
+7-3llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+170-32 files

LLVM/project 69f80aalibsycl/include/sycl/__impl nd_range.hpp

[libsycl][NFC] Fix struct declared as class warning (#217698)
DeltaFile
+2-2libsycl/include/sycl/__impl/nd_range.hpp
+2-21 files

LLVM/project 183a4f4libsycl/unittests/mock helpers.cpp

[libsycl][Unit][NFC] Fix unused function warning (#217697)
DeltaFile
+0-4libsycl/unittests/mock/helpers.cpp
+0-41 files

LLVM/project 5c2719allvm/lib/IR Verifier.cpp, llvm/test/Transforms/Coroutines coro-debug-O2.ll coro-debug-coro-frame.ll

[Verifier] Reject cyclic DIScope parent chains

A DIScope parent chain must be acyclic. Diagnose cycles so later
walks of getScope() cannot loop.
DeltaFile
+69-1llvm/lib/IR/Verifier.cpp
+32-0llvm/test/Verifier/DIScope-cycle.ll
+27-0llvm/test/Verifier/DILocalScope-cycle.ll
+2-2llvm/test/Transforms/Coroutines/coro-debug-coro-frame.ll
+1-1llvm/test/Transforms/Coroutines/coro-debug-O2.ll
+131-45 files

LLVM/project 39fa42allvm/include/llvm/IR VPIntrinsics.def, llvm/lib/CodeGen/SelectionDAG LegalizeIntegerTypes.cpp TargetLowering.cpp

Merge commit '83ac049911444eeb400e53c07979fbb2f352f881' into HEAD
DeltaFile
+1,629-90llvm/test/CodeGen/AArch64/early-ifcvt-load-to-cond-br.mir
+80-283llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-340llvm/include/llvm/IR/VPIntrinsics.def
+6-336llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+336-0llvm/test/Transforms/SLPVectorizer/X86/splat-gather-operands.ll
+47-282llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+2,101-1,331103 files not shown
+5,590-2,875109 files

LLVM/project 83ac049flang/include/flang/Common uint128.h

clang-cl build fix
DeltaFile
+33-54flang/include/flang/Common/uint128.h
+33-541 files

LLVM/project 934ce33llvm/include/llvm/IR VPIntrinsics.def, llvm/lib/CodeGen/SelectionDAG LegalizeIntegerTypes.cpp TargetLowering.cpp

Merge commit '8eec4ed9a304cbfb610eac52463edbef8eaeef02' into HEAD
DeltaFile
+1,629-90llvm/test/CodeGen/AArch64/early-ifcvt-load-to-cond-br.mir
+80-283llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-340llvm/include/llvm/IR/VPIntrinsics.def
+6-336llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+336-0llvm/test/Transforms/SLPVectorizer/X86/splat-gather-operands.ll
+47-282llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+2,101-1,331102 files not shown
+5,557-2,821108 files

LLVM/project 8eec4edllvm/include/llvm/IR VPIntrinsics.def, llvm/lib/CodeGen/SelectionDAG LegalizeIntegerTypes.cpp TargetLowering.cpp

Merge commit '37a8aae89609ee64d4f307bd54facdf7f6c37ef0' into HEAD
DeltaFile
+1,629-90llvm/test/CodeGen/AArch64/early-ifcvt-load-to-cond-br.mir
+80-283llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-340llvm/include/llvm/IR/VPIntrinsics.def
+6-336llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+336-0llvm/test/Transforms/SLPVectorizer/X86/splat-gather-operands.ll
+47-282llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+2,101-1,331102 files not shown
+5,557-2,821108 files

LLVM/project d66354fllvm/lib/Target/AArch64 AArch64ISelLowering.cpp

Fix comments placement
DeltaFile
+4-4llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+4-41 files

LLVM/project 8113346llvm/lib/Target/RISCV RISCVVectorPeephole.cpp, llvm/test/CodeGen/RISCV/rvv fixed-vectors-reduction-int-vp.ll vmand-to-masked-compare.ll

[RISCV] Fold vmand of mask comparisons into a masked comparison (#216264)

Fold `vmand(vmsxx(a, b), vmsxx(c, d))` into a single mask-undisturbed
masked comparison in RISCVVectorPeephole:
    
```
vmsxx ma, va, vb
vmsxx mb, vc, vd
vmand v0, ma, mb
->
vmsxx.vv v0, va, vb
vmsxx.vv v0, vc, vd, v0.t
```
    
The fold is guarded for correctness and profitability:
   
- Only comparisons are folded, identified as masked-pseudo-table entries
  whose unmasked form has no passthru or policy operand. Mask-dependent
  ops like vmsbf.m/viota.m share that shape but are excluded via

    [11 lines not shown]
DeltaFile
+362-0llvm/test/CodeGen/RISCV/rvv/vmand-to-masked-compare.mir
+153-0llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+48-54llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
+40-41llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
+50-0llvm/test/CodeGen/RISCV/rvv/vmand-to-masked-compare.ll
+12-18llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
+665-1134 files not shown
+690-13210 files

LLVM/project f3fd5b2clang/lib/Sema TreeTransform.h, clang/test/SemaCXX cxx2c-fold-exprs.cpp

[Clang] Clear outer SubstIndex when normalizing PackIndexingType (#218257)

When we instantiate a fold-expression concept we expand the template
arguments outside of the TreeTransform. However a PackIndexingType
should gain its own index from the index expression, not the outer
SubstIndex.

The bug occurs because we don't support rewrite of PackIndexingType,
which the default transform unexpectedly expands the pattern in the
normalization so that the instantiation picks up the outer SubstIndex
that is set up for a fold expression.

This is identical to 410d6350ed, and in fact
we're unnecessarily transforming the pattern of PackIndexingType
repeatedly.

This is a regression since #161671, so no release note for backporting.

Fixes #218035
DeltaFile
+12-0clang/test/SemaCXX/cxx2c-fold-exprs.cpp
+4-0clang/lib/Sema/TreeTransform.h
+16-02 files

LLVM/project b1e8a77llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp

Tidy up buildSplitVectorBroadcast

This is used in two cases:
 - Split the source operand, but keeping the output VT as is
 - Split the output VT as well as the source VT
DeltaFile
+19-10llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+19-101 files

LLVM/project 43329dfclang-tools-extra/clang-tidy/llvm LLVMTidyModule.cpp InvalidRegexPatternCheck.h, clang-tools-extra/docs ReleaseNotes.md

[clang-tidy] Add llvm-regex check (#207407)

This patch adds a new clang-tidy check, `llvm-regex`, which detects
malformed regular expression patterns passed to `llvm::Regex` when the
pattern can be resolved from a string literal at compile time.

The check validates regex patterns using `llvm::Regex::isValid()` and
emits a diagnostic when an invalid pattern is detected.

It currently handles patterns provided directly as string literals, as
well as string literals stored in immutable, or expected to be used as
such, string-like values such as:
- `const std::string`
- `const char *`
- `const llvm::StringRef`
- `std::string_view`

It also supports detecting invalid patterns stored in class members of
the same types with in-class initializers.

    [9 lines not shown]
DeltaFile
+145-0clang-tools-extra/test/clang-tidy/checkers/llvm/invalid-regex-pattern.cpp
+77-0clang-tools-extra/clang-tidy/llvm/InvalidRegexPatternCheck.cpp
+36-0clang-tools-extra/docs/clang-tidy/checks/llvm/invalid-regex-pattern.md
+33-0clang-tools-extra/clang-tidy/llvm/InvalidRegexPatternCheck.h
+5-0clang-tools-extra/docs/ReleaseNotes.md
+3-0clang-tools-extra/clang-tidy/llvm/LLVMTidyModule.cpp
+299-02 files not shown
+301-08 files

LLVM/project 1774a54llvm/lib/Target/NVPTX NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX atomicrmw-ignore-denormal-mode.ll

[NVPTX] Honor !atomic.ignore.denormal.mode on atomicrmw fadd

PTX atom.add has a fixed denormal behavior that the program cannot
control: atom.add.f32 flushes denormals on global memory but not on
shared, and atom.add.f16 never flushes. When that disagrees with the
function's denormal mode, the backend expands the atomic into a CAS loop
so the denormal behavior is preserved.

!atomic.ignore.denormal.mode says the denormal behavior of this
particular atomic does not matter, so use the native instruction even
when it disagrees. This is the same thing -nvptx-allow-ftz-atomics does,
except per-instruction instead of per-compilation, which lets a frontend
opt in only the operations it knows about -- notably CUDA's atomicAdd(),
which is defined in terms of atom.add.

Note that -nvptx-allow-ftz-atomics defaults to true, so the new behavior
is only observable with -nvptx-allow-ftz-atomics=false.

Co-authored-by: Artem Belevich <tra at google.com>
DeltaFile
+258-0llvm/test/CodeGen/NVPTX/atomicrmw-ignore-denormal-mode.ll
+11-3llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+269-32 files

LLVM/project 7c7705bclang/lib/CodeGen TargetInfo.cpp TargetInfo.h, clang/lib/CodeGen/TargetBuiltins NVPTX.cpp

[clang][NVPTX] Emit !atomic.ignore.denormal.mode for CUDA atomics

CUDA's atomicAdd() family is defined in terms of PTX atom.add, whose
denormal behavior is fixed by the hardware. Without any annotation the
backend has to assume the function's denormal mode must be honored and
expands these into CAS loops whenever the two disagree. Mark them with
!atomic.ignore.denormal.mode so the native instruction is used.

That covers the __nvvm_atom_*_add_gen_f builtins that atomicAdd(),
atomicAdd_block() and atomicAdd_system() are written in terms of, plus
C11/C++11 atomics under -fatomic-ignore-denormal-mode and the
[[clang::atomic(ignore_denormal_mode)]] attribute, which requires
teaching the NVPTX target about AtomicOptions.

The condition for when the metadata is meaningful is now shared with the
AMDGPU and SPIR-V targets in addAtomicIgnoreDenormalModeMetadata(). It
takes an AllowHalf flag because whether f16 denormals are observable is
target specific: PTX exposes no FTZ control for f16 operations, so
atom.add.f16 never flushes and the opt-in is meaningful there, whereas

    [3 lines not shown]
DeltaFile
+321-0clang/test/CodeGenCUDA/atomic-ignore-denormal-mode-nvptx.cu
+19-4clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
+18-0clang/lib/CodeGen/TargetInfo.h
+15-0clang/lib/CodeGen/TargetInfo.cpp
+12-0clang/lib/CodeGen/Targets/NVPTX.cpp
+2-4clang/lib/CodeGen/Targets/SPIR.cpp
+387-85 files not shown
+402-1711 files

LLVM/project cdec519mlir/include/mlir/Dialect/LLVMIR LLVMOpBase.td LLVMOps.td, mlir/lib/Dialect/LLVMIR/IR LLVMDialect.cpp

[mlir][LLVM] Add ignore_denormal_mode UnitAttr to LLVM::AtomicRMWOp
DeltaFile
+22-5mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
+8-7mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+8-0mlir/test/Dialect/LLVMIR/invalid.mlir
+7-0mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
+0-6mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
+4-0mlir/test/Target/LLVMIR/Import/instructions.ll
+49-184 files not shown
+56-2210 files

LLVM/project 0479ccdllvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-v2f16-agent.ll expand-atomic-f64-system.ll

[IR] Generalize !amdgpu.ignore.denormal.mode into !atomic.ignore.denormal.mode

The !amdgpu.ignore.denormal.mode metadata tells the backend that an
atomicrmw fadd need not honor the function's denormal mode, so a native
atomic instruction whose denormal behavior is fixed in hardware may be
used instead of a CAS loop. Nothing about that is AMDGPU specific: NVPTX
has exactly the same problem with atom.add, whose FTZ behavior depends on
the address space and cannot be controlled.

Promote it to a target independent fixed metadata kind,
!atomic.ignore.denormal.mode, and switch the AMDGPU, SPIR-V and OpenMP
producers and consumers over to it. Document it in LangRef, and point
AMDGPUUsage at that description rather than duplicating it.

Existing IR keeps working: AutoUpgrade renames the metadata on atomicrmw
instructions when parsing textual IR and when materializing bitcode. The
upgrade is deliberately scoped to atomicrmw rather than being applied to
every attachment of that name, since that is the only place the metadata
was ever meaningful. Because bitcode can be materialized one function at

    [6 lines not shown]
DeltaFile
+84-84llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
+78-78llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
+44-44llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
+43-43llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-rmw-fadd.ll
+41-41llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
+34-34llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
+324-32467 files not shown
+868-64873 files

LLVM/project a375339clang/lib/Sema Sema.cpp, clang/test/CodeGenCXX module-initializer-elision.cpp

[C++20] [Modules] Do not generate call to module initialization for const init (#218346)

Close https://github.com/llvm/llvm-project/issues/218305
DeltaFile
+94-0clang/test/CodeGenCXX/module-initializer-elision.cpp
+12-2clang/lib/Sema/Sema.cpp
+106-22 files