[clang] fix warning (#174587)
```shell
input_line_0:10:30: warning: comparison of integers of different signs: 'int' and 'unsigned long' [-Wsign-compare]
```
[PowerPC] Optimize not equal compares against zero vectors (#150422)
This patch is for special cases involving 0 vectors. During the
comparison of vector operands, current code generation checks with
`vcmpequh (vector compare equal unsigned halfword)` followed by a
negation `xxlnor (VSX Vector Logical NOR XX3-form)`.
This means that for the special case, instead of using `vcmpequh` and
then negating the result, we can directly use `vcmpgtuh (vector compare
greater than unsigned halfword)`.
As a result the negation is avoided since the only condition where this
will be false is for 0 as it is an `unsigned halfword`.
---------
Co-authored-by: himadhith <himadhith.v at ibm.com>
[RISCV][llvm] Support logical comparison codegen for P extension (#174626)
Result type of P extension's comparison instructions is same as operands
and the result bits are all 1s or 0s so we need to set
ZeroOrNegativeOneBooleanContent to make sext(setcc) auto combined.
[llvm-jitlink] Remove redundant ExecutorAddr constructor calls. NFCI. (#175488)
These ExecutorAddr calls were legacy from pre-ExecutorSymbolDef code.
The getAddress method already returns an ExecutorAddr, so there's no
need for them anymore.
[LoongArch] Disable strict node mutation to fix strict FP lowering crash
The patch disables strict node mutation for LoongArch by setting
IsStrictFPEnabled to true.
This change fixes the current strict FP lowering crash only.
ISD::STRICT_FSETCC and ISD::STRICT_FSETCCS can be further improved.
[RISCV] Schedule RVV instructions with compatible vtype/vl first
This can reduce some vsetvli toggles.
This can be done in pre-ra scheduling as we have moved insertion of
vsetvli after the first RA.
Currently, we override `tryCandidate` and add a new heuristic based
on comparison of `vtype`/`vl`.
Reviewers: asb, preames, topperc, lukel97, mshockwave, BeMg
Reviewed By: mshockwave, lukel97
Pull Request: https://github.com/llvm/llvm-project/pull/95924
[RISCV] Add a custom pre-ra scheduler
Currently we do nothing RISC-V specific in this scheduler.
This is a part of vtype-based scheduling.
Reviewers: BeMg, mshockwave, lukel97, preames, topperc
Pull Request: https://github.com/llvm/llvm-project/pull/172613
[Clang][X86] Remove useless `extractvalue` on aesencwide/aesdecwide builtin CodeGen (#175113)
This is a pre-commit of CIR codegen for `aesencwide/aesdecwide` builtin,
remove useless `extractvalue` on clang CodeGen for this builtin.
[PseudoProbe] Add switch to control illegal guid warnings (#174927)
Do not verify GUID existence in pseudo probe desc by default since it
generates false positive warnings with ThinLTO.
User can use -pseudo-probe-verify-guid-existence-in-desc to verify it
explicitly.
[ORC][JITLink] Fix unitialised JIT dump header (#175204)
When trying to perf inject JIT dump generatd through the perf plugin,
perf fails with the following error:
```
jitdump file contains invalid or unsupported flags 0xf5880666c26c
0x2b750 [0xa8]: failed to process type: 10 [Operation not permitted]
```
It turns out that Header's Flags field was never initialized, so the
value could be random.
This patch fixes the issue by initialising all Header's fields.
Co-authored-by: Lang Hames <lhames at gmail.com>
[RuntimeDyld][MIPS] Use AT for stub function instead of T9 (#174354)
The stub function is generated for R_MIPS_26 relocation, which could be
used for local jumping inside a function, and do not expect any
temporary register to be clobbered.
Use AT instead of T9 for the stub function, otherwise functions using T9
will be messed up.
Signed-off-by: Icenowy Zheng <uwu at icenowy.me>
[LV] Simplify extract-lane with scalar operand to the scalar value itself. (#174534)
This patch simplifies extract-lane(%lane_num, %X) to %X when %X is a
scalar value. Extracting from a scalar is redundant since there is only
one value to extract.
[libclc] Remove llvm-link --override flag and make implementation self-contained (#175134)
Revert --override flag added in 28d9255aa7c0 and avoid defining the same
symbol across multiple files of a target, simplifying the build and
easing the transition to CMake add_library for libclc.
amdgcn ldexp now uses __builtin_elementwise_ldexp.
No functional changes to clc_sqrt or clc_rsqrt.
Reapply "[ORC] Add utilities for limited symbolication of JIT backtra… (#175469)
…ces"
This reapplies 906b48616c03948a4df62a5a144f7108f3c455e8, which was
reverted in c11df52f9b847170b766fb71defd2a9222d95a8d due to bot
failures.
The testcase has been dropped from this recommit as it failed on several
bots (possbly due to differing backtrace formats or failure modes). I'll
re-introduce the testcase in a follow-up commit so that it cane be
iterated on (and re-reverted if necessary) without affecting the options
introduced by this commit. (Since these options are best-effort
debugging tools it's ok if they live in-tree without a test for now).
[RISCV] Add support for QC.E.LI in RISCVMergeBaseOffset (#175310)
When we have `Xqcili` enabled and it is the `small code model`, we use
the `QC.E.LI` instruction to materialize addresses. Add support for
`QC.E.LI` in the `RISCVMergeBaseOffset` pass to merge the offset of the
address calculation into the offset field in a global address lowering
sequence.
[ORC] Fixed incorrect additional header dirs (#175193)
The CMake ADDITIONAL_HEADER_DIRS directive for two Orc libraries,
specifically Shared and TargetProcess, used incorrect values that
pointed to its parent library include directory instead of its own. This
is now fixed.
