LLVM/project c8a2c24llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Extend wave reduction intrinsics to Pre-gfx8

Add support for gfx6/7 families.
DeltaFile
+666-58llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+627-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+576-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+520-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+3,377-824 files not shown
+4,875-9010 files

LLVM/project 6d34e50lldb/source/Utility FileSpec.cpp FileSpecList.cpp

[lldb] Remove uses of ConstString in FileSpec methods (#206851)

After this, FileSpec only uses ConstString for storage. In a subsequent
commit, I will change FileSpec's storage.
DeltaFile
+18-6lldb/source/Utility/FileSpec.cpp
+0-1lldb/source/Utility/FileSpecList.cpp
+18-72 files

LLVM/project 9ff1d7allvm/lib/Transforms/Utils CallPromotionUtils.cpp, llvm/test/Transforms/SampleProfile icp_target_feature.ll

Revert "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#208079)

Reverts llvm/llvm-project#192142

Now that https://github.com/llvm/llvm-project/pull/205113 has landed, we
will not inline functions with incompatible target features, even if the
callee is marked `alwaysinline`, so we can promote calls to such
functions while also removing the extra complexity from ICP.
DeltaFile
+0-61llvm/test/Transforms/SampleProfile/icp_target_feature.ll
+0-21llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
+0-822 files

LLVM/project 9a1f5b7flang/lib/Optimizer/OpenACC/Analysis FIROpenACCSupportAnalysis.cpp, flang/unittests/Optimizer/OpenACC FIROpenACCSupportAnalysisTest.cpp

[mlir][acc][flang] Add type sizing utilities (#208074)

Add a general acc utility for computing the size and alignment of a
type. It works for simple scalar types as well as nested and aggregate
types like arrays, tuples, and structures.

Because some types come from other dialects, the utility can hand those
off to a specialized helper that understands them. This lets sizing work
seamlessly even for mixed types, such as an aggregate whose members come
from a different dialect.

Add a Fortran-specific helper so Fortran types are sized correctly,
falling back to the general utility for everything else.

Include unit tests covering a range of scenarios, including scalars,
arrays, aggregates, and mixed-dialect types.
DeltaFile
+147-0flang/unittests/Optimizer/OpenACC/FIROpenACCSupportAnalysisTest.cpp
+92-0mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsType.cpp
+83-0mlir/unittests/Dialect/OpenACC/OpenACCUtilsTypeTest.cpp
+56-0mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsType.h
+38-0flang/lib/Optimizer/OpenACC/Analysis/FIROpenACCSupportAnalysis.cpp
+36-0mlir/include/mlir/Dialect/OpenACC/Analysis/OpenACCSupport.h
+452-06 files not shown
+465-012 files

LLVM/project eba2fdellvm/docs LFI.rst, llvm/lib/Target/X86/MCTargetDesc X86MCLFIRewriter.cpp X86MCLFIRewriter.h

Reland: [LFI][X86] Add X86 LFI target and system instruction rewrites (#207892)

Reintroduction of #189569 using the MCRegisterClass accessor API, which
was recently modified and caused a build error when the previous PR
was merged since it was not rebased onto the latest commit.
DeltaFile
+248-0llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
+120-9llvm/docs/LFI.rst
+96-0llvm/test/MC/X86/LFI/thread-pointer.s
+54-0llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
+21-0llvm/test/CodeGen/X86/lfi-sibcall.ll
+19-0llvm/test/MC/X86/LFI/thread-pointer-errors.s
+558-912 files not shown
+638-1218 files

LLVM/project c098e41llvm/unittests/Transforms/Vectorize VPlanTest.cpp VPDomTreeTest.cpp

[VPlan] Use StepVector without operands, VPBuilder in C++ tests (NFC) (#208075)

Update unit tests construction VScale for VPInstructions without
operands to use StepVector where possible. When VScale is needed,
construct with VPBuilder. Also update constructing other recipes in same
function to use VPBuilder, for consistency.

Split off from approved https://github.com/llvm/llvm-project/pull/207541
DeltaFile
+32-28llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+6-6llvm/unittests/Transforms/Vectorize/VPDomTreeTest.cpp
+38-342 files

LLVM/project d8f56aflldb/source/Plugins/Language/CPlusPlus CPlusPlusNameParser.cpp, lldb/unittests/Language/CPlusPlus CPlusPlusLanguageTest.cpp

[lldb] Support MS style `struct`/`class` in C++ name parser (#196525)

If a type is declared as a `class` or a `struct` is part of the mangled
name in the Microsoft ABI. This is also reflected in the demangled name.
There, it shows up before the qualified name. For example, you could
have `class ns1::ns2::MyClass`. It will show up like this in return
types and function/template arguments.

This adds a check in `CPlusPlusNameParser::ParseFullNameImpl` for these
cases.
DeltaFile
+18-0lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
+17-0lldb/source/Plugins/Language/CPlusPlus/CPlusPlusNameParser.cpp
+35-02 files

LLVM/project 585f04fllvm/lib/Support CrashRecoveryContext.cpp

[Support] Add missing include for MacOS defines (#208065)

https://github.com/llvm/llvm-project/pull/142733 removed several
includes, including
llvm/Support/ProgramStack.h. This was indirectly including headers that
defined
PRIO_DARWIN_THREAD and PRIO_DARWIN_BG.

Add back sys/resource.h to define them locally.
DeltaFile
+3-0llvm/lib/Support/CrashRecoveryContext.cpp
+3-01 files

LLVM/project 7134829llvm/lib/Transforms/Utils CallPromotionUtils.cpp, llvm/test/Transforms/SampleProfile icp_target_feature.ll

Revert "[PGO][ICP] Prevent indirect call promotion to functions with incompat…"

This reverts commit 58d9781e8433878444d7b7873e75f7e2c2fd8f50.
DeltaFile
+0-61llvm/test/Transforms/SampleProfile/icp_target_feature.ll
+0-21llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
+0-822 files

LLVM/project 6d1566cclang/include/clang/AST DeclTemplate.h, clang/lib/AST DeclTemplate.cpp

Revert "[clang] Reland: fix getTemplateInstantiationArgs" (#208064)

Reverts llvm/llvm-project#207825 since it's causing a crash in Clang.
DeltaFile
+429-194clang/lib/Sema/SemaTemplateInstantiate.cpp
+165-291clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+146-150clang/lib/Sema/SemaTemplate.cpp
+95-96clang/include/clang/AST/DeclTemplate.h
+129-59clang/lib/Sema/SemaConcept.cpp
+92-60clang/lib/AST/DeclTemplate.cpp
+1,056-85062 files not shown
+1,729-1,55668 files

LLVM/project 29495e1.github/workflows libcxx-pr-benchmark.yml libcxx-run-benchmarks.yml

[libc++][NFC] Rename workflow file for libc++ A/B performance comparisons (#208070)

I want to introduce another workflow that allows running benchmarks on
historical commits of libc++ for LNT submission, so having an
unambiguous name is desirable.
DeltaFile
+207-0.github/workflows/libcxx-pr-benchmark.yml
+0-207.github/workflows/libcxx-run-benchmarks.yml
+207-2072 files

LLVM/project 78cfc6dllvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Extend wave reduction intrinsics to Pre-gfx8

Add support for gfx6/7 families.
DeltaFile
+666-58llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+627-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+576-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+520-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+3,377-824 files not shown
+4,875-9010 files

LLVM/project 136b8b5flang/lib/Lower/OpenMP OpenMP.cpp DataSharingProcessor.cpp, flang/test/Lower/OpenMP metadirective-loop.f90

[flang][OpenMP] Support lowering of metadirective (part 3)

Enable lowering of metadirectives that resolve to a loop-associated
variant such as `do`, `simd`, `parallel do`, and `do simd`. The
associated DO construct is made available to the selected variant so the
existing OpenMP loop lowering can process it. A standalone metadirective
uses the following sibling DO, and a begin/end metadirective uses the
first substantive evaluation nested in its block.

For example, when the `vendor(llvm)` selector matches, the `parallel do`
variant is lowered together with the DO loop that follows it:

```fortran
!$omp metadirective when(implementation={vendor(llvm)}: parallel do)
do i = 1, n
  y(i) = a*x(i) + y(i)
end do
```


    [33 lines not shown]
DeltaFile
+476-0flang/test/Lower/OpenMP/metadirective-loop.f90
+243-8flang/lib/Lower/OpenMP/OpenMP.cpp
+88-2flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
+28-4flang/lib/Lower/OpenMP/Utils.cpp
+15-0flang/test/Lower/OpenMP/Todo/metadirective-target-loop.f90
+0-12flang/test/Lower/OpenMP/Todo/metadirective-loop.f90
+850-262 files not shown
+863-268 files

LLVM/project 679f63bllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

Rebase

Created using spr 1.3.7
DeltaFile
+2,553-2,687llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+3,280-0llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+0-2,870llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,886-936llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+1,542-724llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+1,542-724llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+10,803-7,9411,500 files not shown
+60,749-34,9611,506 files

LLVM/project eeceaccllvm/lib/Target/AArch64 AArch64SchedC1Nano.td, llvm/test/CodeGen/AArch64 shuffle-tbl34.ll insert-subvector.ll

Rebase

Created using spr 1.3.7
DeltaFile
+2,553-2,687llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,268-939llvm/lib/Target/AArch64/AArch64SchedC1Nano.td
+1,002-1,066llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+735-454llvm/test/CodeGen/AArch64/shuffle-tbl34.ll
+548-592llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+782-283llvm/test/CodeGen/AArch64/insert-subvector.ll
+6,888-6,0211,260 files not shown
+40,792-27,3131,266 files

LLVM/project df4c88allvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.sub.ll llvm.amdgcn.reduce.add.ll

[AMDGPU] Extend wave reduction intrinsics to Pre-gfx8

Add support for gfx6/7 families.
DeltaFile
+666-58llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.sub.ll
+627-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.add.ll
+576-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.xor.ll
+520-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.max.ll
+494-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.min.ll
+3,377-824 files not shown
+4,875-9010 files

LLVM/project caec75cllvm/lib/Target/SystemZ SystemZAsmPrinter.cpp SystemZFrameLowering.cpp, llvm/test/CodeGen/SystemZ call-zos-01.ll zos-ppa1.ll

[SystemZ][z/OS] Emit prolog length

The PPA1 contains fields recording the length of the prolog and the offset
to the instruction updating the stack pointer register. The implementation
consists of the following parts:
- the end of the prolog is marked with a FENCE instruction which prevents
  scheduling from moving instructions across the barrier.
- when emitting the PPA1, the FENCE instruction along with other stack
  update instructions are used to calculate the length and the offset.

Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
DeltaFile
+215-64llvm/test/CodeGen/SystemZ/call-zos-01.ll
+204-48llvm/test/CodeGen/SystemZ/zos-ppa1.ll
+73-41llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
+113-0llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+39-0llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
+11-0llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
+655-15311 files not shown
+698-16417 files

LLVM/project 6f47064llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll

Merge branch 'main' into users/aokblast/libcxx/ci/bump_to_15.1
DeltaFile
+24,053-23,916llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,520-21,720llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+13,779-6,871llvm/test/tools/llvm-mca/AArch64/Cortex/C1Ultra-sve-instructions.s
+10,260-9,388llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
+12,991-3,310llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+11,856-3,719llvm/test/MC/AMDGPU/gfx12_asm_vop3_dpp16.s
+95,459-68,92410,955 files not shown
+708,363-423,05610,961 files

LLVM/project 179fa39.github/workflows libcxx-run-benchmarks.yml, flang/include/flang/Semantics openmp-dsa.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+16-7.github/workflows/libcxx-run-benchmarks.yml
+17-5flang/lib/Semantics/openmp-dsa.cpp
+1-14flang/lib/Semantics/resolve-directives.cpp
+4-0flang/include/flang/Semantics/openmp-dsa.h
+2-1lldb/include/lldb/Target/DynamicRegisterInfo.h
+1-2lldb/source/Target/DynamicRegisterInfo.cpp
+41-296 files

LLVM/project 37a3333.github/workflows libcxx-run-benchmarks.yml, flang/include/flang/Semantics openmp-dsa.h

Rebase

Created using spr 1.3.7
DeltaFile
+16-7.github/workflows/libcxx-run-benchmarks.yml
+17-5flang/lib/Semantics/openmp-dsa.cpp
+1-14flang/lib/Semantics/resolve-directives.cpp
+4-0flang/include/flang/Semantics/openmp-dsa.h
+2-1lldb/include/lldb/Target/DynamicRegisterInfo.h
+1-2lldb/source/Target/DynamicRegisterInfo.cpp
+41-296 files

LLVM/project a83c194llvm/lib/Target/SystemZ SystemZAsmPrinter.cpp SystemZFrameLowering.cpp, llvm/test/CodeGen/SystemZ call-zos-01.ll zos-ppa1.ll

[SystemZ][z/OS] Emit prolog length

The PPA1 contains fields recording the length of the prolog and the offset
to the instruction updating the stack pointer register. The implementation
consists of the following parts:
- the end of the prolog is marked with a FENCE instruction which prevents
  scheduling from moving instructions across the barrier.
- when emitting the PPA1, the FENCE instruction along with other stack
  update instructions are used to calculate the length and the offset.

Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
DeltaFile
+215-64llvm/test/CodeGen/SystemZ/call-zos-01.ll
+204-48llvm/test/CodeGen/SystemZ/zos-ppa1.ll
+73-41llvm/test/CodeGen/SystemZ/zos-prologue-epilog.ll
+113-0llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+39-0llvm/test/CodeGen/SystemZ/call-zos-vararg.ll
+11-0llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
+655-15311 files not shown
+700-15817 files

LLVM/project d264120clang/include/clang/AST DeclTemplate.h, clang/lib/AST DeclTemplate.cpp

Revert "[clang] Reland: fix getTemplateInstantiationArgs (#207825)"

This reverts commit ff11bbce9e87ab4ef59a789cff1c9b9d771adc1e.
DeltaFile
+429-194clang/lib/Sema/SemaTemplateInstantiate.cpp
+165-291clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+146-150clang/lib/Sema/SemaTemplate.cpp
+95-96clang/include/clang/AST/DeclTemplate.h
+129-59clang/lib/Sema/SemaConcept.cpp
+92-60clang/lib/AST/DeclTemplate.cpp
+1,056-85062 files not shown
+1,729-1,55668 files

LLVM/project 5da6b3clldb/include/lldb/Target DynamicRegisterInfo.h, lldb/source/Target DynamicRegisterInfo.cpp

[lldb] DynamicRegisterInfo::Dump should take a Stream argument (#207863)

Otherwise, it creates its own Stream dumping to stdout.
DeltaFile
+2-1lldb/include/lldb/Target/DynamicRegisterInfo.h
+1-2lldb/source/Target/DynamicRegisterInfo.cpp
+3-32 files

LLVM/project 100a1fbflang/include/flang/Semantics openmp-dsa.h, flang/lib/Semantics openmp-dsa.cpp resolve-directives.cpp

[flang][OpenMP][NFC] Share SetSymbolDSA between semantics and lowering (#207826)

Move the DSA helper from the private OmpAttributeVisitor::SetSymbolDSA
into the public openmp-dsa header next to GetSymbolDSA, and share the
DSA flag set through a single GetDataSharingAttributeFlags().

This lets an upcoming metadirective lowering change reuse the helper to
set the predetermined DSA of the loop induction variables of a selected
variant. A loop-associated variant is resolved during lowering, so the
usual semantic DSA resolution never runs on its loop nest and lowering
must set those flags itself.

Assisted with Copilot.
DeltaFile
+17-5flang/lib/Semantics/openmp-dsa.cpp
+1-14flang/lib/Semantics/resolve-directives.cpp
+4-0flang/include/flang/Semantics/openmp-dsa.h
+22-193 files

LLVM/project e8402ddlibc/src/__support/CPP string.h, libc/test/src/__support/CPP string_test.cpp

[libc][cpp::string] Fix off-by-one bug in resize and a memory leak
DeltaFile
+9-1libc/src/__support/CPP/string.h
+9-0libc/test/src/__support/CPP/string_test.cpp
+18-12 files

LLVM/project f3f427fllvm/lib/Transforms/IPO AttributorAttributes.cpp, llvm/test/Transforms/Attributor AddrSpaceIndirect.ll

[Attributor] AAAddressSpace should use the AA for recursive lookups

If we stripped some values, we can use the AAAddressSpace again for
an optimistic AS value. If we didn't strip any value, we can still use
the TLI.
DeltaFile
+171-0llvm/test/Transforms/Attributor/AddrSpaceIndirect.ll
+10-4llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+181-42 files

LLVM/project 0fba09cllvm/test/Transforms/SLPVectorizer/X86 ashr-main-opcode-copyables.ll

[SLP][NFC]Add an extra test with ashr vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/208057
DeltaFile
+65-0llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
+65-01 files

LLVM/project dda9dc5.github/workflows libcxx-run-benchmarks.yml

[libc++] Use a median-of-3 for the A/B comparison benchmarking job (#208023)

After a bit of testing, I think this provides a good tradeoff between
resource utilization and noise reduction. Furthermore, the comparison
script (which produces the output) will be augmented to surface the
variability of the results in a separate PR.
DeltaFile
+16-7.github/workflows/libcxx-run-benchmarks.yml
+16-71 files

LLVM/project d0b4540

Rebase

Created using spr 1.3.7
DeltaFile
+0-00 files

LLVM/project 7e85d7ellvm/test/Transforms/SLPVectorizer/X86 ashr-main-opcode-copyables.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+65-0llvm/test/Transforms/SLPVectorizer/X86/ashr-main-opcode-copyables.ll
+65-01 files