LLVM/project 1662c20llvm/lib/Passes PassBuilderPipelines.cpp, llvm/lib/Transforms/Scalar LoopRotation.cpp

[Passes][LoopRotate] Move minsize handling fully into pass (#189956)

Make this dependent only on the minsize attribute and drop the pipeline
handling.

Rename the enable-loop-header-duplication option to
enable-loop-header-duplication-at-minsize to clarify that it controls
header duplication at minsize only (in other cases it is enabled by
default, independently of this option).
DeltaFile
+29-10llvm/test/Transforms/LoopRotate/oz-disable.ll
+6-20llvm/lib/Passes/PassBuilderPipelines.cpp
+15-5llvm/lib/Transforms/Scalar/LoopRotation.cpp
+8-9llvm/test/Transforms/PhaseOrdering/enable-loop-header-duplication-oz.ll
+58-444 files

LLVM/project 51fc1ffclang/lib/CIR/Dialect/Transforms/TargetLowering LowerModule.cpp TargetLoweringInfo.h, clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets NVPTX.cpp

[CIR][NVPTX] NVPTX lowering info skeleton and target AS mapping
DeltaFile
+30-17clang/test/CIR/CodeGenCUDA/address-spaces.cu
+39-0clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
+3-0clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
+2-0clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
+1-0clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
+75-175 files

LLVM/project 40e7fa6llvm/lib/Passes PassBuilderPipelines.cpp, llvm/lib/Transforms/IPO FunctionSpecialization.cpp

[Passes][FuncSpec] Move optsize/minsize handling into pass (#189952)

Instead of using the Os/Oz level during pass pipeline construction,
query the optsize/minsize attribute on the function to determine whether
specialization is allowed to take place. This ensures consistent
behavior for per-function attributes.

It's worth noting that FuncSpec *already* checks for minsize, but at the
call-site level.
DeltaFile
+39-0llvm/test/Transforms/FunctionSpecialization/function-specialization-optsize.ll
+3-8llvm/lib/Passes/PassBuilderPipelines.cpp
+3-0llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
+45-83 files

LLVM/project 3b81be8llvm/lib/Transforms/IPO WholeProgramDevirt.cpp, llvm/test/Transforms/WholeProgramDevirt import.ll export-vcp.ll

WholeProgramDevirt: Import/export the CVP byte directly in the summary (#188979)

rather than using absolute symbol constants on ELF/x86.

This leads to better codegen as the absolute symbol constants were not
resolved until link time (see bug for example).

Fixes #188470
DeltaFile
+6-13llvm/test/Transforms/WholeProgramDevirt/import.ll
+2-4llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
+2-4llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+10-213 files

LLVM/project 29810d7clang/lib/CIR/CodeGen CIRGenModule.cpp, clang/test/CIR/CodeGen attr-retain.c attr-used.c

add gv section attribute
DeltaFile
+1-5clang/lib/CIR/CodeGen/CIRGenModule.cpp
+2-2clang/test/CIR/CodeGen/attr-retain.c
+1-1clang/test/CIR/CodeGen/attr-used.c
+1-1clang/test/CIR/CodeGen/keep-persistent-storage-variables.cpp
+1-1clang/test/CIR/CodeGen/keep-static-consts.cpp
+6-105 files

LLVM/project 0981c88clang/test/CIR/CodeGen keep-persistent-storage-variables.cpp keep-static-consts.cpp

add tests persistent-storage-variables and keep-static-consts
DeltaFile
+20-0clang/test/CIR/CodeGen/keep-persistent-storage-variables.cpp
+11-0clang/test/CIR/CodeGen/keep-static-consts.cpp
+31-02 files

LLVM/project 30fefdbclang/lib/CIR/CodeGen CIRGenModule.cpp CIRGenModule.h, clang/test/CIR/CodeGen attr-retain.c attr-used.c

use CIRGlobalValueInterface
DeltaFile
+30-29clang/lib/CIR/CodeGen/CIRGenModule.cpp
+18-0clang/test/CIR/CodeGen/attr-retain.c
+7-7clang/lib/CIR/CodeGen/CIRGenModule.h
+14-0clang/test/CIR/CodeGen/attr-used.c
+69-364 files

LLVM/project 0f80a8aclang/lib/CIR/CodeGen CIRGenModule.cpp CIRGenModule.h, clang/test/CIR/CodeGenHIP hip-cuid.hip

[CIR] Add addLLVMUsed and addLLVMCompilerUsed methods to CIRGenModule
DeltaFile
+100-2clang/lib/CIR/CodeGen/CIRGenModule.cpp
+27-0clang/test/CIR/CodeGenHIP/hip-cuid.hip
+19-0clang/lib/CIR/CodeGen/CIRGenModule.h
+146-23 files

LLVM/project 4250a0fllvm/lib/Target/RISCV RISCVAsmPrinter.cpp, llvm/test/CodeGen/RISCV rv64-stackmap-nops.ll

[RISCV] Fix stackmap shadow trimming NOP size for compressed targets (#189774)

The shadow trimming loop in LowerSTACKMAP hardcoded a 4-byte decrement
per instruction, but when Zca is enabled NOPs are 2 bytes. Use NOPBytes
instead of the hardcoded 4 so the shadow is correctly trimmed on
compressed targets.

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
(cherry picked from commit 3d7eedce5658c41a1b22775938359bfafac47fc9)
DeltaFile
+14-2llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
+1-1llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+15-32 files

LLVM/project da8a5b9flang/docs Extensions.md

[flang] Update Flang Extension doc to reflect previous change (#188088)

Update Flang Extension doc to remove note about a warning that was
removed in a previous PR (PR #178088). It is an oversight that this doc
change was not made in that previous PR. The oversight was only recently
discovered and has led to this PR.

(cherry picked from commit 45b932a2d452c997d98b57e1aa31bc4951c5e9f4)
DeltaFile
+0-5flang/docs/Extensions.md
+0-51 files

LLVM/project e3cbd99clang/lib/CIR/CodeGen TargetInfo.cpp, clang/lib/CIR/Dialect/Transforms TargetLowering.cpp

[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target (#179084)
DeltaFile
+261-1clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+66-0clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
+59-0clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
+47-0clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/AMDGPU.cpp
+0-46clang/test/CIR/Lowering/global-address-space.cir
+31-1clang/lib/CIR/CodeGen/TargetInfo.cpp
+464-486 files not shown
+516-5912 files

LLVM/project 13fd079clang/include/clang/AST DeclCXX.h, clang/lib/AST DeclCXX.cpp

[CIR] Implement isMemcpyEquivalentSpecialMember for trivial copy/move ctors
DeltaFile
+41-0clang/test/CIR/CodeGen/copy-constructor-memcpy.cpp
+7-33clang/lib/CodeGen/CGClass.cpp
+34-0clang/lib/AST/DeclCXX.cpp
+16-7clang/lib/CIR/CodeGen/CIRGenClass.cpp
+13-0clang/include/clang/AST/DeclCXX.h
+6-5clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
+117-456 files not shown
+130-5012 files

LLVM/project 6f9646alld/ELF MarkLive.cpp

[ELF] Parallelize --gc-sections mark phase (#189321)

Add `markParallel` using level-synchronized `parallelFor`. Each BFS
level is processed in parallel; newly discovered sections are collected
in per-thread queues and merged for the next level.

The parallel path is used when `!TrackWhyLive && partitions.size()==1`.
`parallelFor` naturally degrades to serial when `--threads=1`.

Uses depth-limited inline recursion (depth<3) and optimistic
load-then-exchange dedup for best performance.

Linking a Release+Asserts clang (--gc-sections, --time-trace) on an old
x86-64:

8 threads: markLive 315ms -> 82ms (-234ms). Total 1562ms -> 1350ms
(1.16x).
16 threads: markLive 199ms -> 50ms (-149ms). Total 1017ms -> 862ms
(1.18x).

    [2 lines not shown]
DeltaFile
+101-3lld/ELF/MarkLive.cpp
+101-31 files

LLVM/project 083f9c1llvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[AArch64][GISel] Widen non-power2 element sizes for ctlz. (#189371)

This addresses an illegal mutation kind, where gisel would hit an
assert. It expands vector elements for non-power2 elements or elements
less that i8 to a power of 2.

A fix to handle vector types correctly was needed in LegalizerHandler.

Fixes #185411
DeltaFile
+13-0llvm/test/CodeGen/AArch64/ctlz.ll
+4-3llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+1-0llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+18-33 files

LLVM/project 120f71bclang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel EntityPointerLevel.cpp

clean up
DeltaFile
+10-22clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
+10-221 files

LLVM/project 6a87416lld/ELF Symbols.h Writer.cpp, lld/ELF/Arch Hexagon.cpp

[ELF] Move Symbol::used to atomic flags field (#190117)

Move the `used` bitfield into the existing `std::atomic<uint16_t>
flags`,
making it safe for concurrent access from parallel GC mark (#189321).
DeltaFile
+11-14lld/ELF/Symbols.h
+5-5lld/ELF/Writer.cpp
+2-2lld/ELF/MarkLive.cpp
+1-2lld/ELF/Arch/Hexagon.cpp
+19-234 files

LLVM/project 802d463clang-tools-extra/clang-doc Representation.cpp JSONGenerator.cpp

[clang-doc] Update lookup routines for consistency (#190043)

When filtering is enabled, its possible an Info doesn't have a 
Parent USR. Use `find()` to safely handle that case.

Additionally, I noticed the comparison code for the index
poorly reimplemented the existing comparison from StringRef.
We can just use the one from ADT.
DeltaFile
+10-16clang-tools-extra/clang-doc/Representation.cpp
+6-1clang-tools-extra/clang-doc/JSONGenerator.cpp
+16-172 files

LLVM/project 68cbcf7llvm/lib/Target/RISCV RISCVInsertVSETVLI.cpp, llvm/test/CodeGen/RISCV/rvv vsetvli-insert-whole-reg-move.ll

[RISCV] Check EnsureWholeVectorRegisterMoveValidVTYPE in RISCVInsertVSETVLI::transferBefore. (#190022)

Fixes #189786
DeltaFile
+27-0llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-whole-reg-move.ll
+2-1llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+29-12 files

LLVM/project 91d8b51clang/lib/CIR/CodeGen TargetInfo.cpp, clang/test/CIR/CodeGen amdgpu-address-spaces.cpp

proper amdgpu constant AS encoding
DeltaFile
+3-4clang/lib/CIR/CodeGen/TargetInfo.cpp
+2-2clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
+5-62 files

LLVM/project 22e003dclang/lib/CIR/Dialect/IR CIRDialect.cpp

fix code dup rebase bug
DeltaFile
+0-4clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+0-41 files

LLVM/project 55e5c5cclang/lib/CIR/Dialect/Transforms/TargetLowering/Targets AMDGPU.cpp

Add table-based CIR -> Target AS mapping
DeltaFile
+17-18clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/AMDGPU.cpp
+17-181 files

LLVM/project f4af65eclang/test/CIR/CodeGenCUDA address-spaces.cu

add ogcg cuda checks and todo on nptx lowering
DeltaFile
+11-9clang/test/CIR/CodeGenCUDA/address-spaces.cu
+11-91 files

LLVM/project 1fb915dclang/lib/CIR/Dialect/Transforms TargetLowering.cpp, clang/test/CIR/CodeGen amdgpu-target-lowering-as.cpp

Coverage for AS target lowering and fix generic lowering conversion pattern on alloca types.
DeltaFile
+66-0clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
+14-1clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+80-12 files

LLVM/project 89077b2clang/lib/CIR/CodeGen TargetInfo.cpp CIRGenModule.cpp, clang/test/CIR/CodeGen amdgpu-address-spaces.cpp

fix tests to represent pre-target lowering state of AS
DeltaFile
+0-85clang/test/CIR/Lowering/global-address-space.cir
+15-30clang/lib/CIR/CodeGen/TargetInfo.cpp
+24-2clang/test/CIR/CodeGenCUDA/address-spaces.cu
+14-6clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
+2-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+55-1265 files

LLVM/project 87d1f69clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets AMDGPU.cpp

Use AMDGPU enums to map CIR AS
DeltaFile
+7-6clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/AMDGPU.cpp
+7-61 files

LLVM/project e5bcc3dclang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

fix fmt
DeltaFile
+4-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+4-01 files

LLVM/project 23500dfclang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

more fmt
DeltaFile
+2-2clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+2-21 files

LLVM/project 47085b1clang/lib/CIR/CodeGen TargetInfo.cpp, clang/lib/CIR/Dialect/Transforms TargetLowering.cpp

[CIR][AMDGPU] Lower Language specific address spaces and implement AMDGPU target
DeltaFile
+252-1clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+48-9clang/test/CIR/Lowering/global-address-space.cir
+51-0clang/test/CIR/CodeGen/amdgpu-address-spaces.cpp
+47-0clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/AMDGPU.cpp
+46-0clang/lib/CIR/CodeGen/TargetInfo.cpp
+9-2clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
+453-124 files not shown
+470-1810 files

LLVM/project 78dbe05clang/lib/CIR/Dialect/Transforms TargetLowering.cpp

handle formatting
DeltaFile
+38-42clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+38-421 files

LLVM/project 01c49dfclang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

more fmt yo
DeltaFile
+0-4clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+0-41 files