[llvm] Prefer the unknown vendor for SerenityOS triples (#185026)
No functional change. This patch updates the target-triple unit tests to
use the ones that we care about.
[libclc] Add custom CMake language handling for OpenCL files (#185243)
Summary:
The current handling of `libclc` is to use custom clang jobs to compile
source files. This is the way we used to compile GPU libraries, but we
have largely moved away from this. The eventual goal is to simple be
able to use `clang` like a normal project. One barrier to this is the
lack of language support for OpenCL in CMake.
This PR uses CMake's custom language support to define a minimal OpenCL
language, largely just a wrapper around `clang -x cl`. This does
nothing, just enables the support. Future PRs will need to untangle the
mess of dependencies.
The 'link+opt' steps that we now do should be able to simply be done as
a custom `llvm-link` and `opt` job on the library, which isn't ideal but
it still better than the current state.
[HLSL] Add Texture load to texture2d.
[SPIRV] Add the load level intrinsic to the spirv backend.
[HLSL] Implement operator[] for Texture2D
This change adds support for the subscript operator on Texture2D resources
in HLSL. The operator returns a pointer to the resource element using the
intrinsic, matching the implementation for Buffer and RWBuffer.
Key changes:
- Updated and intrinsics
to accept any coordinate type (allowing vector indices).
- Implemented Sema checks to verify that coordinate dimensions match the
resource type (e.g., int2 for Texture2D).
- Fixed a bug where the attribute was not being correctly
applied to .
- Refactored to improve parameter handling and
address a TODO.
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[ORC] Further simplify ContainerElementsMap::hoistDeps. NFCI. (#185242)
At the one call-site where the result of hoistDeps is used,
self-dependencies will already have been eliminated. That means we can
use the "deps changed" property that we're already computing rather than
tracking "deps graph changed" separately.
[libc++][NFC] Simplify `optional::iterator` (#183230)
- Rename `__optional_iterator` into `__optional_iterator_base` and make
it part of the `__optional_{meow}_base` inheritance chain. This allows
us to get rid of a sketchy-looking downcast and shorten some code.
[libc++] Support build failures when running LNT benchmarks (#185234)
It's rare but possible for the codebase not to build. When that happens,
we should carry on and still submit an empty LNT report for that order,
otherwise we'll get stuck thinking that order hasn't been benchmarked
yet.
[CIR] Change CmpOp assembly format to use bare keyword style
Update the assembly format of cir.cmp from the parenthesized style
cir.cmp(gt, %a, %b) : !s32i, !cir.bool
to the bare keyword style used by other CIR ops like cir.cast:
cir.cmp gt %a, %b : !s32i
The result type (!cir.bool) is now automatically inferred as it is
always cir::BoolType.
[CIR] Split CIR_UnaryOp into individual operations
Split the monolithic cir.unary operation (which dispatched on a
UnaryOpKind enum) into four separate operations: cir.inc, cir.dec,
cir.minus, and cir.not.
This follows the same pattern used when cir.binop was split into
individual binary operations (AddOp, SubOp, etc.).
Changes:
- Add CIR_UnaryOpInterface with getInput()/getResult() methods
- Add CIR_UnaryOp and CIR_UnaryOpWithOverflowFlag base classes
- Define IncOp, DecOp, MinusOp, NotOp with per-op folds
- Add Involution trait to NotOp for not(not(x)) -> x folding
- Replace createUnaryOp() with createInc/Dec/Minus/Not builders
- Split LLVM lowering into four separate patterns
- Split LoweringPrepare complex-type handling per unary op
- Update CIRCanonicalize and CIRSimplify for new op types
- Update all codegen files to use bool params instead of UnaryOpKind
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[LLVM][WebAssembly] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[LLVM][X86] Add f80 support for ct.select
Add special handling for x86_fp80 types in CTSELECT lowering by splitting
them into three 32-bit chunks, performing constant-time selection on each
chunk, and reassembling the result. This fixes crashes when compiling
tests with f80 types.
Also updated ctselect.ll to match current generic fallback implementation.
[LLVM][X86] Add native ct.select support for X86 and i386
Add native X86 implementation with CMOV instructions and comprehensive tests:
- X86 ISelLowering with CMOV for x86_64 and i386
- Fallback bitwise operations for i386 targets without CMOV
- Post-RA expansion for pseudo-instructions
- Comprehensive test coverage:
- Edge cases (zero conditions, large integers)
- i386-specific tests (FP, MMX, non-CMOV fallback)
- Vector operations
- Optimization patterns
The basic test demonstrating fallback is in the core infrastructure PR.
[LLVM][ARM] Add native ct.select support for ARM32 and Thumb
This patch implements architecture-specific lowering for ct.select on ARM
(both ARM32 and Thumb modes) using conditional move instructions and
bitwise operations for constant-time selection.
Implementation details:
- Uses pseudo-instructions that are expanded Post-RA to bitwise operations
- Post-RA expansion in ARMBaseInstrInfo for BUNDLE pseudo-instructions
- Handles scalar integer types, floating-point, and half-precision types
- Handles vector types with NEON when available
- Support for both ARM and Thumb instruction sets (Thumb1 and Thumb2)
- Special handling for Thumb1 which lacks conditional execution
- Comprehensive test coverage including half-precision and vectors
The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- ISelDAGToDAG: Selection of appropriate pseudo-instructions
- BaseInstrInfo: Post-RA expansion of BUNDLE to bitwise instruction sequences
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[LLVM][AArch64] Add native ct.select support for ARM64
This patch implements architecture-specific lowering for ct.select on AArch64
using CSEL (conditional select) instructions for constant-time selection.
Implementation details:
- Uses CSEL family of instructions for scalar integer types
- Uses FCSEL for floating-point types (F16, BF16, F32, F64)
- Post-RA MC lowering to convert pseudo-instructions to real CSEL/FCSEL
- Handles vector types appropriately
- Comprehensive test coverage for AArch64
The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- InstrInfo: Pseudo-instruction definitions and patterns
- MCInstLower: Post-RA lowering of pseudo-instructions to actual CSEL/FCSEL
- Proper handling of condition codes for constant-time guarantees
[LLVM][RISCV] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[ConstantTime][RISCV] Add comprehensive tests for ct.select
Add comprehensive test suite for RISC-V fallback implementation:
- Edge cases (zero conditions, large integers, sign extension)
- Pattern matching (nested selects, chains)
- Vector support with RVV extensions
- Side effects and memory operations
The basic fallback test is in the core infrastructure PR.
[LLVM][MIPS] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[clang-format][NFC] Use the newly added AllowLiteralDigitSeparator (#185165)
Use LangOptions::AllowLiteralDigitSeparator added in #184235 for the
IntegerLiteralSeparator option.
[ConstantTime][RISCV] Add comprehensive tests for ct.select
Add comprehensive test suite for RISC-V fallback implementation:
- Edge cases (zero conditions, large integers, sign extension)
- Pattern matching (nested selects, chains)
- Vector support with RVV extensions
- Side effects and memory operations
The basic fallback test is in the core infrastructure PR.
[LLVM][RISCV] Regenerate ct.select test CHECK lines
Update CHECK lines to match the new constant-time AND/OR/XOR expansion
from the CT_SELECT legalization fix.
[ConstantTime] Fix CT_SELECT expansion to preserve constant-time guarantees
Create CT_SELECT nodes for scalar types regardless of target support, so
they survive DAGCombiner (visitCT_SELECT is conservative). Expand to
AND/OR/XOR during operation legalization after SETCC is lowered, preventing
the sext(setcc)->select fold chain that converts constant-time patterns
into data-dependent conditional moves (e.g. movn/movz on MIPS).
The mask uses SUB(0, AND(Cond, 1)) instead of SIGN_EXTEND because type
legalization already promoted i1 to the SetCC result type, making
SIGN_EXTEND a no-op for same-width types.
