1,106,912 commits found in 61 milliseconds
LLVM /project 789327c — llvm/lib/DebugInfo/DWARF DWARFDie.cpp, llvm/tools/llvm-dwarfdump llvm-dwarfdump.cpp Address review comments: avoid needless copies
LLVM /project 6d20ac1 — llvm/include/llvm/DebugInfo DIContext.h, llvm/lib/DebugInfo/DWARF DWARFDie.cpp Print symbolic names for DW_AT_LLVM_address_space
LLVM /project 3ff11b2 — compiler-rt/lib/fuzzer FuzzerLoop.cpp, compiler-rt/test/fuzzer fuzzer-finalstats.test [libFuzzer] Don't count leak-verification re-executions towards `-runs` (#221036)
Fixes #66331. Stop countring the verification run in
TryDetectingAMemoryLeak() as part of TotalNumberOfRuns, as the number of
executed units could exceed -runs=N. LLVM /project 1daadb8 — clang/lib/Frontend CompilerInvocation.cpp, llvm/include/llvm/TargetParser Triple.h [Triple] Sink clang's DebugEntryValueArchs list into Triple (#222136)
So that other frontends can use it.
Assisted-by: claude
rdar://186478816 [nfc][ProfileData] Fix -Wrange-loop-construct in SampleProfileWriter (#220726)
Fixes warnings:
```
SampleProfWriter.cpp:804:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
804 | for (const auto [TypeName, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
SampleProfWriter.cpp:829:12: note: use reference type 'std::pair<llvm::sampleprof::FunctionId, unsigned long> const &' to prevent copying
829 | for (const auto [TypeId, Count] : *Map) {
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
| &
``` [CIR] Fix OpenACC tests by adding a triple. (#222344)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that. [CIR] Fix OpenMP tests by adding a triple. (#222345)
Now that we're trying to build by default, we actually have to be able
to build on other buildbots! But since we still don't have the
ABI/target stuff for non linux, we need to make sure our tests don't hit
that. LLVM /project 836b5a4 — llvm/lib/IR Instruction.cpp Metadata.cpp, llvm/lib/Transforms/Utils IntegerDivision.cpp [IR] Remove ProfcheckDisableMetadataFixes checks
Our internal ablation study on the set of checks up to 2-11-2026 has
finished, so we can remove any fixes that are older than that.
Also remove some calls to applyProfMetadataIfEnabled that were added
before the cutoff date. Leave the rest that were added afterwards.
Reviewers: mtrofin, nikic
Pull Request: https://github.com/llvm/llvm-project/pull/222425 LLVM /project e623633 — llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-promote.ll Count the intrinsics that really become calls when refusing promotion
LLVM /project 66a9120 — llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-promote.ll Refuse promotion only when the object is live across a call
LLVM /project 1151f32 — llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-promote.ll Carry null operands and intrinsic names across when promoting to VGPRs
LLVM /project 3945335 — llvm/lib/Target/AMDGPU AMDGPUMemoryUtils.cpp AMDGPUMemoryUtils.h, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-promote.ll Promote private objects into the VGPR address space via flag
LLVM /project 2e7199e — llvm/lib/Target/AMDGPU AMDGPUPrivateObjectVGPRs.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-asm-clobber.ll Diagnose inline asm that clobbers a VGPR-memory object's registers
LLVM /project 09d368f — llvm/lib/Target/AMDGPU AMDGPUPrivateObjectVGPRs.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-private-object-vgprs.mir Propagate object liveness to every changed successor, not only back edges
LLVM /project 3f757f1 — llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp AMDGPUPrivateObjectVGPRs.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-across-call.ll as-vgpr-private-object-vgprs.mir Allocate and reserve registers for address space 13 objects
LLVM /project d8a2ce3 — llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-budget.ll Diagnose an object that does not fit the function's register budget
LLVM /project 1a5c11c — llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-allocate.ll as-vgpr-across-call.ll Do not add a second lifetime start when allocating VGPRs again
Pin the width guard that keeps sub-dword accesses out of aliasing decisions
LLVM /project 40b7afa — llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-divergent.ll Treat a sub-dword VGPR-memory load as divergent too
LLVM /project 347a396 — llvm/lib/Target/AMDGPU SIInstructions.td SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-lower-idx-ops.mir Inherit the M0 operand when expanding the sub-dword VGPR-memory pseudos
LLVM /project d31fd6a — llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-bits-encoding.ll as-vgpr-bits.ll Regenerate the sub-dword expectations for the M0 setup change
LLVM /project 4c3f286 — llvm/lib/Target/AMDGPU SIInstructions.td, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-verifier.mir as-vgpr-lower-idx-ops.mir Adopt subarch triples in the sub-dword tests and drop the redundant VALU
LLVM /project d244ea9 — llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-index-demanded-bits.ll Regenerate the demanded-bits expectations for the gfx1250 entry sequence
LLVM /project a795865 — llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-bits-control-flow.ll Test sub-dword VGPR-memory accesses across control flow
NFC: track the downstream implementation more closely
LLVM /project 37bfdab — llvm/lib/Target/AMDGPU AMDGPULowerIdxOps.cpp SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-lower-idx-ops.mir as-vgpr-verifier.mir Check the encodings of the sub-dword VGPR-memory accesses
Do not describe sub-dword VGPR-memory accesses by index and width
LLVM /project 299fb69 — llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp Document the sub-dword access rules for the VGPR address space
LLVM /project c4c4a51 — llvm/test/CodeGen/AMDGPU/AddressSpaceVGPR as-vgpr-bits.ll as-vgpr-index-demanded-bits.ll Fix tests
Cover the remaining VGPR-memory operand invariants
