LLVM/project ecb7f5amlir/include/mlir/Dialect/Linalg/IR LinalgStructuredOps.td

[mlir][linalg] Update docs for `linalg.generic`(NFC) (#127178)

The mixed tensor/buffer semantics has been disallowed in #80660. Closes
#124090.
DeltaFile
+0-13mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
+0-131 files

LLVM/project fd189adclang-tools-extra/clangd ClangdServer.h Compiler.h

[clangd] Enable parsing of forwarding functions in the preamble by default

Fixes https://github.com/clangd/clangd/issues/2324
DeltaFile
+2-2clang-tools-extra/clangd/ClangdServer.h
+1-1clang-tools-extra/clangd/Compiler.h
+3-32 files

LLVM/project 2e45964llvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/ARM tail-call-stack-args.ll ehabi.ll

[ARM] Skip storing of stack arguments when lowering tail calls
DeltaFile
+63-0llvm/test/CodeGen/ARM/tail-call-stack-args.ll
+46-0llvm/lib/Target/ARM/ARMISelLowering.cpp
+0-6llvm/test/CodeGen/Thumb2/mve-be.ll
+3-3llvm/test/CodeGen/ARM/ehabi.ll
+1-5llvm/test/CodeGen/ARM/fp16-vector-argument.ll
+2-2llvm/test/CodeGen/ARM/debug-frame.ll
+115-166 files

LLVM/project c234686llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-fixed-length-frame-offests-crash.ll tail-call-stack-args.ll

[AArch64] Skip storing of stack arguments when lowering tail calls

When possible, do not emit trivial load and stores to the same offset on
the stack.
DeltaFile
+51-52llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests-crash.ll
+59-0llvm/test/CodeGen/AArch64/tail-call-stack-args.ll
+45-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-2llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
+1-1llvm/test/CodeGen/AArch64/scavenge-large-call.ll
+158-575 files

LLVM/project 9a6844cllvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/ARM tail-call-stack-args.ll ehabi.ll

[ARM] Skip storing of stack arguments when lowering tail calls
DeltaFile
+63-0llvm/test/CodeGen/ARM/tail-call-stack-args.ll
+46-0llvm/lib/Target/ARM/ARMISelLowering.cpp
+3-3llvm/test/CodeGen/ARM/ehabi.ll
+1-5llvm/test/CodeGen/ARM/fp16-vector-argument.ll
+2-2llvm/test/CodeGen/ARM/debug-frame.ll
+115-105 files

LLVM/project 71d8b22llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-fixed-length-frame-offests-crash.ll tail-call-stack-args.ll

[AArch64] Skip storing of stack arguments when lowering tail calls

When possible, do not emit trivial load and stores to the same offset on
the stack.
DeltaFile
+51-52llvm/test/CodeGen/AArch64/sve-fixed-length-frame-offests-crash.ll
+59-0llvm/test/CodeGen/AArch64/tail-call-stack-args.ll
+45-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-2llvm/test/CodeGen/AArch64/darwinpcs-tail.ll
+1-1llvm/test/CodeGen/AArch64/scavenge-large-call.ll
+158-575 files

LLVM/project a7a0208flang/include/flang/Support LangOptions.h

[flang] Assert the Options fit into the storage bits (#126169)

DeltaFile
+4-1flang/include/flang/Support/LangOptions.h
+4-11 files

LLVM/project d150101llvm/lib/Target/Hexagon HexagonAsmPrinter.cpp HexagonCopyToCombine.cpp

[Hexagon] Use MCRegister. NFC
DeltaFile
+8-8llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
+2-2llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
+10-102 files

LLVM/project 26fc2e9llvm/lib/Target/Mips/AsmParser MipsAsmParser.cpp

[Mips] Use MCRegisterClass::getRegister() instead of begin()+RegNo. NFC
DeltaFile
+1-1llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+1-11 files

LLVM/project 01b7e65clang/lib/Driver/ToolChains FreeBSD.cpp

[FreeBSD] Fix comparison in f75126eeabba13ce2aab53c2e4296fca12b9da0d

We have to compare the string contents and not the const char* pointer.
This happened to work in my testing but is not reliable.

DeltaFile
+3-2clang/lib/Driver/ToolChains/FreeBSD.cpp
+3-21 files

LLVM/project 7817045llvm/lib/Target/RISCV RISCVSystemOperands.td, llvm/test/MC/RISCV rv32-hypervisor-csr-names.s rv32-machine-csr-names.s

[RISCV] Support [mh]edelegh CSRs (#121634)

These RV32-only CSRs are defined in privileged spec v1.13.
DeltaFile
+18-0llvm/test/MC/RISCV/rv32-hypervisor-csr-names.s
+14-0llvm/test/MC/RISCV/rv32-machine-csr-names.s
+5-1llvm/lib/Target/RISCV/RISCVSystemOperands.td
+4-0llvm/test/MC/RISCV/rv32-only-csr-names.s
+41-14 files

LLVM/project f75126eclang/lib/Driver/ToolChains FreeBSD.cpp, clang/test/Driver freebsd.cpp experimental-library-flag.cpp

[FreeBSD] Support -stdlib=libstdc++

The experimental-library-flag.cpp test was failing on FreeBSD builders,
which turned to be caused by missing support for -stdlib=libcstdc++ (and
just using a hardcoded libc++ in all cases).
Simplify FreeBSD::AddCXXStdlibLibArgs() by deferring to the parent class
and dealing with the FreeSBD < 14 profiling support as a special case.

While touching the test file also drop the unnecessary `-o %t.o`. This is
not needed since the RUN lines use -### and don't produce any output.

Reviewed By: DimitryAndric, MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/126302
DeltaFile
+11-7clang/test/Driver/freebsd.cpp
+5-5clang/lib/Driver/ToolChains/FreeBSD.cpp
+5-0clang/test/Driver/experimental-library-flag.cpp
+21-123 files

LLVM/project b4f91b0llvm/lib/Transforms/Vectorize LoopVectorize.cpp

[LV] Use IRBuilder::insert to insert VPWidenRecipe (NFC).
DeltaFile
+1-4llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+1-41 files

LLVM/project 6273877lld CMakeLists.txt, lld/cmake/modules AddLLD.cmake

[lld] enable installing lld headers and libraries as part of distribution (#127123)

This patch allows `lld-headers` and `lld-libraries` in
`LLVM_DISTRIBUTION_COMPONENTS` to be specified and thus enable piecewise
installation of `lld/**/*.h` headers and/or lld libraries (both in
shared and static builds).
This is similar to use cases such as
`clang;clang-headers;clang-libraries`. Note when `lld-libraries` is
present, `llvm-libraries` must be present as well because various lld
libraries depend on various llvm libraries.
DeltaFile
+37-8lld/CMakeLists.txt
+3-2lld/cmake/modules/AddLLD.cmake
+40-102 files

LLVM/project c22d84flld/ELF Writer.cpp Symbols.cpp, lld/test/ELF/lto devirt_vcall_vis_export_dynamic.ll

[ELF] Refine ctx.arg.exportDynamic condition

--export-dynamic should be a no-op when ctx.hasDynsym is false.

* Drop unneeded ctx.hasDynsym checks.
* Static linking with --export-dynamic does not prevent devirtualization.
DeltaFile
+8-3lld/test/ELF/lto/devirt_vcall_vis_export_dynamic.ll
+3-5lld/ELF/Writer.cpp
+1-4lld/ELF/Symbols.cpp
+2-2lld/ELF/Driver.cpp
+14-144 files

LLVM/project f5d63ccllvm/test/Transforms/LICM hoist-speculatable-load.ll

[LICM] Add test with deref assumption of GEP.
DeltaFile
+56-0llvm/test/Transforms/LICM/hoist-speculatable-load.ll
+56-01 files

LLVM/project e080366llvm/lib/Analysis LoopAccessAnalysis.cpp, llvm/test/Analysis/LoopAccessAnalysis retry-runtime-checks-after-dependence-analysis-forked-pointers.ll

[LAA] Inline hasComputableBounds in only caller, simplify isNoWrap.

Inline hasComputableBounds into createCheckForAccess. This removes a
level of indirection and allows for passing the AddRec directly to
isNoWrap, removing the need to retrieve the AddRec for the pointer
again.

The early continue for invariant SCEVs now also applies to forked
pointers (i.e. when there's more than one entry in TranslatedPtrs) when
ShouldCheckWrap is true, as those trivially won't wrap.

The change is NFC otherwise. replaceSymbolicStrideSCEV is now called
earlier.
DeltaFile
+20-39llvm/lib/Analysis/LoopAccessAnalysis.cpp
+43-1llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis-forked-pointers.ll
+63-402 files

LLVM/project 6e94007llvm/test/CodeGen/AArch64 tail-call-unused-zext.ll br-to-eh-lpad.ll, llvm/test/CodeGen/AMDGPU cgp-bitfield-extract.ll

[llvm] Remove `br i1 undef` in some `llvm/test/CodeGen` tests (#127368)

This PR replaces some instances of `br i1 undef` with function argument
value in several tests under `llvm/test/CodeGen/ `directory. This PR is
a continuation of PR #125460
DeltaFile
+10-10llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
+4-4llvm/test/CodeGen/AArch64/tail-call-unused-zext.ll
+3-3llvm/test/CodeGen/AArch64/br-to-eh-lpad.ll
+2-2llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
+2-2llvm/test/CodeGen/AArch64/gep-nullptr.ll
+2-2llvm/test/CodeGen/AArch64/machine-sink-getmemoperandwithoffset.mir
+23-236 files not shown
+32-3212 files

LLVM/project 6812fc0mlir/include/mlir/Dialect/Affine Passes.h Passes.td, mlir/lib/Dialect/Affine/Transforms LoopUnrollAndJam.cpp

[mlir][affine] make affine-loop-unroll-jam interface pass (#127402)

Made affine-loop-unroll-jam an interface pass, so it can run on the gpu
module.
DeltaFile
+43-2mlir/test/Dialect/Affine/unroll-jam.mlir
+1-1mlir/include/mlir/Dialect/Affine/Passes.h
+1-1mlir/include/mlir/Dialect/Affine/Passes.td
+1-1mlir/lib/Dialect/Affine/Transforms/LoopUnrollAndJam.cpp
+46-54 files

LLVM/project d235b72clang/lib/AST ParentMap.cpp, clang/lib/Analysis CFG.cpp ReachableCode.cpp

Reapply "[Analyzer][CFG] Correctly handle rebuilt default arg and default init expression" (#127338)

This PR reapply https://github.com/llvm/llvm-project/pull/117437.
The issue has been fixed by the 2nd commit, we need to ignore parens in
CXXDefaultArgExpr when build CFG, because CXXDefaultArgExpr::getExpr
stripped off the top level FullExpr and ConstantExpr, ParenExpr may
occurres in the top level.

---------

Signed-off-by: yronglin <yronglin777 at gmail.com>
DeltaFile
+75-0clang/test/SemaCXX/warn-unreachable.cpp
+45-9clang/lib/Analysis/CFG.cpp
+33-21clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
+19-18clang/lib/Analysis/ReachableCode.cpp
+17-0clang/lib/AST/ParentMap.cpp
+6-3clang/lib/Sema/SemaExpr.cpp
+195-514 files not shown
+207-6010 files

LLVM/project ec880b1llvm/lib/Target/X86 X86LowerAMXType.cpp

[X86] Avoid repeated map lookups (NFC) (#127374)

DeltaFile
+2-2llvm/lib/Target/X86/X86LowerAMXType.cpp
+2-21 files

LLVM/project e81f7callvm/utils/TableGen AsmMatcherEmitter.cpp

[TableGen] Avoid repeated hash lookups (NFC) (#127373)

DeltaFile
+3-3llvm/utils/TableGen/AsmMatcherEmitter.cpp
+3-31 files

LLVM/project 0323554llvm/lib/CodeGen/GlobalISel LegacyLegalizerInfo.cpp

[GlobalISel] Avoid repeated hash lookups (NFC) (#127372)

DeltaFile
+4-4llvm/lib/CodeGen/GlobalISel/LegacyLegalizerInfo.cpp
+4-41 files

LLVM/project 8d75246llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp

[AMDGPU] Avoid repeated hash lookups (NFC) (#127371)

DeltaFile
+3-2llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+3-21 files

LLVM/project 0bae0bfclang-tools-extra/clang-tidy/bugprone VirtualNearMissCheck.cpp

[clang-tidy] Avoid repeated hash lookups (NFC) (#127370)

DeltaFile
+3-3clang-tools-extra/clang-tidy/bugprone/VirtualNearMissCheck.cpp
+3-31 files

LLVM/project 1c87e47clang/lib/AST ExternalASTMerger.cpp

[AST] Avoid repeated map lookups (NFC) (#127369)

DeltaFile
+7-9clang/lib/AST/ExternalASTMerger.cpp
+7-91 files

LLVM/project 9f6b7b4clang/lib/StaticAnalyzer/Checkers StackAddrEscapeChecker.cpp, clang/test/Analysis stack-addr-ps.cpp stackaddrleak.c

[analyzer] StackAddrEscapeChecker: also check return for child stack frames (#126986)

Fixes #123459.

This changes checking of the returned expr to also look for memory
regions whose stack frame context was a child of the current stack frame
context, e.g., for cases like this given in #123459:

```
struct S { int *p; };
S f() {
  S s;
  {
    int a = 1;
    s.p = &a;
  }
  return s;
}
```
DeltaFile
+45-0clang/test/Analysis/stack-addr-ps.cpp
+22-0clang/test/Analysis/stackaddrleak.c
+7-1clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
+74-13 files

LLVM/project 8822e34llvm/include/llvm/ObjectYAML CovMap.h, llvm/lib/ObjectYAML CovMap.cpp

Introduce CovMap in ObjectYAML
DeltaFile
+977-0llvm/lib/ObjectYAML/CovMap.cpp
+467-94llvm/test/tools/llvm-cov/Inputs/branch-c-general-single.yaml
+385-0llvm/include/llvm/ObjectYAML/CovMap.h
+211-31llvm/test/tools/llvm-cov/Inputs/branch-macros-single.yaml
+160-0llvm/test/tools/obj2yaml/ELF/covmap.yaml
+121-24llvm/test/tools/llvm-cov/Inputs/branch-logical-mixed-single.yaml
+2,321-14914 files not shown
+2,609-21220 files

LLVM/project b55f751flang-rt CMakeLists.txt LICENSE.TXT, flang-rt/cmake/modules AddFlangRT.cmake

[Flang] LLVM_ENABLE_RUNTIMES=flang-rt (#110217)

Extract Flang's runtime library to use the LLVM_ENABLE_RUNTIME
mechanism. It will only become active when
`LLVM_ENABLE_RUNTIMES=flang-rt` is used, which also changes the
`FLANG_INCLUDE_RUNTIME` to `OFF` so the old runtime build rules do not
conflict. This also means that unless `LLVM_ENABLE_RUNTIMES=flang-rt` is
passed, nothing changes with the current build process.

Motivation:
* Consistency with LLVM's other runtime libraries (compiler-rt, libc,
libcxx, openmp offload, ...)
* Allows compiling the runtime for multiple targets at once using the
LLVM_RUNTIME_TARGETS configuration options
* Installs the runtime into the compiler's per-target resource directory
so it can be automatically found even when cross-compiling

Also see RFC discussion at
https://discourse.llvm.org/t/rfc-use-llvm-enable-runtimes-for-flangs-runtime/80826
DeltaFile
+261-0flang-rt/CMakeLists.txt
+234-0flang-rt/LICENSE.TXT
+215-0flang-rt/lib/runtime/CMakeLists.txt
+199-0flang-rt/cmake/modules/AddFlangRT.cmake
+188-0flang-rt/README.md
+136-0flang-rt/lib/quadmath/CMakeLists.txt
+1,233-035 files not shown
+2,207-14041 files

LLVM/project 17d508fllvm/test/Transforms/InstCombine select-icmp-and.ll

[InstCombine] Test foldSelectICmpAnd with cast. (NFC)
DeltaFile
+46-0llvm/test/Transforms/InstCombine/select-icmp-and.ll
+46-01 files