LLVM/project 22ee97ellvm/docs LangRef.md LangRef.rst, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.512bit.ll amdgcn.bitcast.1024bit.ll

Merge branch 'main' into users/jebyrnes/RepeatRateSearchable
DeltaFile
+29,629-30,274llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+0-33,206llvm/docs/LangRef.rst
+30,491-0llvm/docs/LangRef.md
+28,897-12llvm/test/CodeGen/RISCV/clmul.ll
+11,567-11,387llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+8,990-9,348llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+109,574-84,22723,327 files not shown
+1,259,187-779,50723,333 files

LLVM/project 0b12400libcxx/test/support test_allocator.h min_allocator.h, libcxx/test/support/test.support test_allocators.pass.cpp

[libc++][test] Fix construction and comparison for testing allocators (#212702)

Previously, there were several issues in the allocators provided by
`min_allocator.h` and `test_allocator.h`.

1. Some allocators did not support heterogenous rebinding construction,
and thus failed to meet the Cpp17Allocator named requirements.
2. Some allocators only had `operator==`. This was fine since C++20 but
not in C++17 where there were no rewritten candidates of `!=`.
3. Many equality operators were non-template and homogeneous. This
caused ambiguity since C++20 due to rewritten candidates.

This patch fixes these issues by
- adding missing constructors,
- adding missing `operator!=` (in pre-C++20 modes), and
- making `operator==` and some `operator!=` templates.

Note that it is intended that `operator==`'s for `test_allocator`
perform seemingly redundant constructions (via `static_cast<const

    [3 lines not shown]
DeltaFile
+224-0libcxx/test/support/test.support/test_allocators.pass.cpp
+80-18libcxx/test/support/min_allocator.h
+46-8libcxx/test/support/test_allocator.h
+350-263 files

LLVM/project 2114567libcxx/include module.modulemap.in CMakeLists.txt, libcxx/include/__cmath lerp.h

[libc++] Move lerp to its own header instead of <cmath> (#213111)

This moves <cmath> towards an umbrella header.

Co-authored-by: A. Jiang <de34 at live.cn>
DeltaFile
+64-0libcxx/include/__cmath/lerp.h
+1-40libcxx/include/cmath
+5-0libcxx/include/complex
+1-0libcxx/include/module.modulemap.in
+1-0libcxx/include/CMakeLists.txt
+72-405 files

LLVM/project 057cc9dlibcxx/docs TestingLibcxx.rst, libcxx/test/libcxx/assertions/semantics override_with_ignore_semantic.pass.cpp override_with_observe_semantic.pass.cpp

[libc++] Refactor the conditions for enabling assertion tests (#213294)

Every hardening assertion test used to repeat a hand-rolled set of Lit
conditions like `has-unix-headers` and a bunch of others. Instead,
define a single Lit feature to handle all of them.

Assisted by Claude

Fixes #213148
DeltaFile
+113-0libcxx/utils/libcxx/test/features/hardening.py
+19-22libcxx/docs/TestingLibcxx.rst
+1-20libcxx/utils/libcxx/test/features/libcxx_macros.py
+5-6libcxx/test/libcxx/assertions/semantics/override_with_observe_semantic.pass.cpp
+4-5libcxx/test/libcxx/assertions/semantics/override_with_ignore_semantic.pass.cpp
+2-5libcxx/test/libcxx/time/time.zone/time.zone.timezone/time.zone.members/assert.to_sys_choose.pass.cpp
+144-58220 files not shown
+393-793226 files

LLVM/project 3214218libcxx/test/std/utilities/charconv/charconv.msvc test.cpp, libcxx/test/std/utilities/memory/allocator.uses/allocator.uses.construction uses_allocator_construction_args.pass.cpp uninitialized_construct_using_allocator.pass.cpp

[libc++] Add missing return 0 to main functions in tests (#214190)

The libc++ test suite requires main() to explicitly return a value,
since freestanding support requires it.
DeltaFile
+2-0libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.verify.cpp
+2-0libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ref_t.pass.cpp
+2-0libcxx/test/std/utilities/memory/allocator.uses/allocator.uses.construction/uses_allocator_construction_args.pass.cpp
+2-0libcxx/test/std/utilities/memory/allocator.uses/allocator.uses.construction/uninitialized_construct_using_allocator.pass.cpp
+2-0libcxx/test/std/utilities/memory/allocator.uses/allocator.uses.construction/make_obj_using_allocator.pass.cpp
+2-0libcxx/test/std/utilities/charconv/charconv.msvc/test.cpp
+12-055 files not shown
+121-061 files

LLVM/project 5dc3fcdllvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp, llvm/test/CodeGen/ARM execute-only.ll

[AsmPrinter] Emit STT_OBJECT type and size for jump tables (#214170)

Before this change, jump tables placed in a separate section were
emitted with no symbol type, leaving them STT_NOTYPE, and with no size
in their ELF file.

This change annotates the jump tables with object type and a size when
the target supports type/size directives. Jump tables inlined into the
function's own section are already covered by that function's symbol, so
they are left as-is.

This helps when disassembling a file, to understand that the jump table
is a single complete object, rather than the symbol being purely a
location. I think this reflects the ELF semantics better.
DeltaFile
+58-0llvm/test/CodeGen/RISCV/jumptable-sizes.ll
+7-0llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+1-0llvm/test/CodeGen/X86/pic.ll
+1-0llvm/test/CodeGen/ARM/execute-only.ll
+67-04 files

LLVM/project dd15c77llvm/test/CodeGen/AMDGPU/GlobalISel regbankcombiner-merge-readanylane.mir

[AMDGPU][GlobalISel] Pre-commit tests for readanylane merge regbank combine (NFC)

Add regbank-combiner tests covering a copy to vgpr whose source is a
merge or build_vector of G_AMDGPU_READANYLANE results and uniform
values. These currently keep the round trip through sgprs, and also
cover the cases where the merge has another user and where all merge
sources are uniform.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+103-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankcombiner-merge-readanylane.mir
+103-01 files

LLVM/project c2f17bellvm/include/llvm/ExecutionEngine/Orc Core.h

[ORC] Make ExecutionSession non-copyable / non-moveable. (#214231)

Many ORC classes capture references to the ExecutionSession -- it is not
intended to be moved or copied.
DeltaFile
+5-0llvm/include/llvm/ExecutionEngine/Orc/Core.h
+5-01 files

LLVM/project 239cbf5flang/lib/Optimizer/Transforms/CUDA CUFAllocDelay.cpp, flang/test/Transforms/CUF cuf-alloc-delay.fir

[flang][cuda] Delay box cuf.alloc past host association captures (#214347)

CUFAllocDelay treated the store of a descriptor into a host association
tuple as a use, so a device allocatable captured by an internal
procedure kept its descriptor allocation in the prologue. That allocates
managed memory before the program can call cudaSetDevice, binding a CUDA
context to the wrong device.

The store now sinks together with the allocation, constrained by the
tuple's readers, and the group is placed at the nearest common dominator
of all uses so it can sink into a later block.
DeltaFile
+160-9flang/test/Transforms/CUF/cuf-alloc-delay.fir
+112-51flang/lib/Optimizer/Transforms/CUDA/CUFAllocDelay.cpp
+272-602 files

LLVM/project a27b1d9clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-intrinsics.c

[CIR][AArch64] Upstream saturating-addition NEON builtins (#213755)

Related to https://github.com/llvm/llvm-project/issues/185382

CIR lowering for saturating-addition intrinsics
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#saturating-addition)

Port tests from `clang/test/CodeGen/AArch64/neon-intrinsics.c` to
`clang/test/CodeGen/AArch64/neon/add.c`
DeltaFile
+0-626clang/test/CodeGen/AArch64/neon-intrinsics.c
+557-0clang/test/CodeGen/AArch64/neon/add.c
+38-1clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+595-6273 files

LLVM/project 3c8a11cclang/cmake/caches Fuchsia.cmake

[Fuchsia] Disable per-target runtime directories for Darwin (#214382)

This applies #214307 to the first stage as well.
DeltaFile
+2-1clang/cmake/caches/Fuchsia.cmake
+2-11 files

LLVM/project 7e3ae4allvm/lib/Target/PISA PISAInstructionSelector.cpp

Add getAPFloatFromSize helper
DeltaFile
+14-0llvm/lib/Target/PISA/PISAInstructionSelector.cpp
+14-01 files

LLVM/project 8ba3d8fclang/lib/CIR/CodeGen CIRGenStmt.cpp CIRGenFunction.h, clang/test/CIR/CodeGenSYCL kernel-caller-entry-point.cpp kernel-call-stmt.cpp

[CIR][SYCL] Support SYCL kernel call statement in host codegen (#213728)

Add CIRGen support for lowering SYCLKernelCallStmt during host
compilation, emitting the kernel launch statement in place of the
`sycl_kernel_entry_point` function body (mirroring classic CodeGen). 

Device compilation, were the offload kernel caller entry point
is emitted instead, is future work and thus marked as NIY.
DeltaFile
+45-0clang/test/CIR/CodeGenSYCL/kernel-call-stmt.cpp
+35-0clang/lib/CIR/CodeGen/CIRGenSYCL.cpp
+23-0clang/test/CIR/CodeGenSYCL/kernel-caller-entry-point.cpp
+17-0clang/lib/CIR/CodeGen/CIRGenModule.cpp
+6-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+3-1clang/lib/CIR/CodeGen/CIRGenStmt.cpp
+129-11 files not shown
+130-17 files

LLVM/project e063f1fllvm/include/llvm/CodeGen RemoveRedundantDebugValues.h LiveDebugValuesPass.h, llvm/include/llvm/Transforms/Scalar ScalarizeMaskedMemIntrin.h

[NPM] Make few more passes required - 2 (#213608)

as discussed in https://github.com/llvm/llvm-project/pull/203511, few of
these should not really be required (such as sink) with O0/opt-none, yet
we require this for consistency between legacy and NPM. We need to look
at the passes separately and selectively make strictly optimizing passes
optional.
DeltaFile
+1-1llvm/include/llvm/Transforms/Utils/LowerInvoke.h
+1-1llvm/include/llvm/Transforms/Utils/FixIrreducible.h
+1-1llvm/include/llvm/Transforms/Scalar/ScalarizeMaskedMemIntrin.h
+1-1llvm/include/llvm/CodeGen/RemoveRedundantDebugValues.h
+1-1llvm/include/llvm/CodeGen/LiveDebugValuesPass.h
+1-1llvm/include/llvm/CodeGen/ExpandReductions.h
+6-63 files not shown
+9-99 files

LLVM/project d77dfe7llvm/test/CodeGen/AMDGPU llvm.amdgcn.tanh.ll llvm.amdgcn.permlane.ptr.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fcopysign.mir

rebase

Created using spr 1.3.7
DeltaFile
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+868-0llvm/test/Transforms/LoopInterchange/freeze.ll
+629-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+570-31llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
+7,383-4,646325 files not shown
+19,626-7,339331 files

LLVM/project 05366e1llvm/test/CodeGen/AMDGPU llvm.amdgcn.tanh.ll llvm.amdgcn.permlane.ptr.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fcopysign.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+868-0llvm/test/Transforms/LoopInterchange/freeze.ll
+629-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+570-31llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
+7,383-4,646325 files not shown
+19,626-7,339331 files

LLVM/project c63ab73llvm/test/CodeGen/AMDGPU llvm.amdgcn.tanh.ll llvm.amdgcn.permlane.ptr.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fcopysign.mir

rebase

Created using spr 1.3.7
DeltaFile
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+868-0llvm/test/Transforms/LoopInterchange/freeze.ll
+629-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+570-31llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
+7,383-4,646325 files not shown
+19,626-7,339331 files

LLVM/project 2ac39dbllvm/test/CodeGen/AMDGPU llvm.amdgcn.tanh.ll llvm.amdgcn.permlane.ptr.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fcopysign.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+868-0llvm/test/Transforms/LoopInterchange/freeze.ll
+629-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+570-31llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
+7,383-4,646325 files not shown
+19,626-7,339331 files

LLVM/project ae61335llvm/test/CodeGen/AMDGPU llvm.amdgcn.tanh.ll llvm.amdgcn.permlane.ptr.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-fcopysign.mir

rebase

Created using spr 1.3.7
DeltaFile
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+868-0llvm/test/Transforms/LoopInterchange/freeze.ll
+629-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ptr.ll
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+570-31llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tanh.ll
+7,383-4,646325 files not shown
+19,626-7,339331 files

LLVM/project 219524bllvm/docs WritingAnLLVMPass.md Passes.md

[LLVM][Docs] Remove bugpoint references

Bugpoint was removed in 9d5574dda60151dcd1eb6f315c20e4d9120596f9.

Reviewers: rnk, arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/214251
DeltaFile
+5-15llvm/docs/HowToSubmitABug.rst
+4-7llvm/docs/OptBisect.rst
+3-5llvm/docs/Passes.md
+1-1llvm/docs/WritingAnLLVMPass.md
+13-284 files

LLVM/project 9d72ffdlld/ELF InputFiles.cpp, lld/test/ELF aarch64-build-attributes-private-subsection.s

[ELF][AArch64] Do not treat missing build attributes as defined (#213600)

Even if an AArch64 build attributes section contains only private
subsections and does not define feature flags or PAuth information,
`lld` still checks the values defined in the GNU Program Properties
section against the build attribute defaults, producing warnings and
errors. The patch adjusts the handling of build attributes so that only
the existing attributes are used.

---
* https://github.com/ARM-software/abi-aa/blob/main/buildattr64/buildattr64.rst
DeltaFile
+55-0lld/test/ELF/aarch64-build-attributes-private-subsection.s
+13-10lld/ELF/InputFiles.cpp
+68-102 files

LLVM/project c965558llvm/lib/Target/LoongArch/MCTargetDesc LoongArchAsmBackend.h LoongArchELFStreamer.h

[LoongArch][MC] Pre-mark align fragments as linker-relaxable (#213582)

Extract `shouldRelaxAlign` from `relaxAlign` and call it during
`emitCodeAlignment` to eagerly set the linker-relaxable flag on align
fragments. This ensures `isRangeRelaxable` returns correct results
before the layout phase.
DeltaFile
+23-20llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp
+12-9llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.cpp
+11-0llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchELFStreamer.h
+3-0llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h
+49-294 files

LLVM/project fdf8b84.github/workflows/upload-release-artifact action.yml

workflows/upload-release-artifact: Make this action self-contained (#213828)

The action now checks out its own files so calling workflows don't need
to do this.  This helps prevent mistakes where the calling workflow
does not checkout the right files causing this action to fail.

(cherry picked from commit 4e725a2c756f32c4fe7512d9b30c6bf831e4d4a5)
DeltaFile
+20-9.github/workflows/upload-release-artifact/action.yml
+20-91 files

LLVM/project b56b506clang/test/AST/HLSL ConstantBuffers-AST.hlsl StructuredBuffers-AST.hlsl, clang/test/ParserHLSL hlsl_resource_class_attr.hlsl

[HLSL] Consistently quote resource attribute args (#214106)

The `hlsl::resource_class` and `hlsl::dimension` attributes both take a
single argument from a set of choices, but resource_class expects an
unevaluated identifier and dimension expects a string literal.
Consistently require the literal for both, and fix up the AST printers
to match.
DeltaFile
+72-72clang/test/AST/HLSL/Textures-vector-AST.hlsl
+72-72clang/test/AST/HLSL/Textures-scalar-AST.hlsl
+19-19clang/test/AST/HLSL/Textures-AST.hlsl
+14-14clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
+13-13clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
+11-11clang/test/AST/HLSL/ConstantBuffers-AST.hlsl
+201-20126 files not shown
+336-34332 files

LLVM/project 121d539llvm/lib/Target/AArch64 AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 swift-async-context-seh.ll win-sve.ll

[AArch64][Windows] Fix swift async context slot placement (#212922)

Swift async functions can miscompile on Windows ARM64 at `-O2`, when
there's enough register pressure that a local gets scavenged into the
callee-save area: the local ends up sharing an address with the saved
caller x29, so the epilogue restores a value the function has already
overwritten. swiftlang/swift#90920 has a reduced repro.

`assignCalleeSavedSpillSlots` creates the swift async context object
before the callee-save loop instead of inside it next to the FP slot.
MachineFrameInfo ends up with it above the frame record while the
prologue stores it below at FP-8, and the 8 byte disagreement leaves a
hole in the middle of the callee-save area. PEI's scavenger hands that
hole to the local. Only reproduces at -O2 and up since scavenging is
gated on the opt level.

```
        sub     sp, sp, #112
        str     x19, [sp, #16]                  // 8-byte Spill

    [25 lines not shown]
DeltaFile
+38-0llvm/test/CodeGen/AArch64/swift-async-context-frame-record-win.ll
+10-7llvm/test/CodeGen/AArch64/swift-async-context-slot-offset-win.ll
+6-8llvm/test/CodeGen/AArch64/swift-async-win.ll
+1-8llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+0-3llvm/test/CodeGen/AArch64/win-sve.ll
+1-1llvm/test/CodeGen/AArch64/swift-async-context-seh.ll
+56-276 files

LLVM/project e710fbbclang/test/CodeGen/Sparc sparc-complex-abi.c, libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy pstl.destroy_n.pass.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1,025-625llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fcopysign.mir
+311-303llvm/unittests/Object/GOFFObjectFileTest.cpp
+585-0clang/test/CodeGen/Sparc/sparc-complex-abi.c
+17-323llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+305-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
+150-0libcxx/test/std/utilities/memory/specialized.algorithms/specialized.destroy/pstl.destroy_n.pass.cpp
+2,393-1,25191 files not shown
+3,624-1,68997 files

LLVM/project fd71684.github/workflows zizmor.yml

workflows/zizmor: Update to latest version (#213922)

This is required to handle the new import syntax for same-repository
actions:

https://github.blog/changelog/2026-07-30-reference-same-repository-actions-with-self-repository-syntax/
(cherry picked from commit da2a4685fe5c23f90c8357c2d6732396adbe74be)
DeltaFile
+1-1.github/workflows/zizmor.yml
+1-11 files

LLVM/project 7db2e33clang/docs ReleaseNotes.md, clang/lib/Frontend InitPreprocessor.cpp

[Clang] Define `__SIG_ATOMIC_TYPE__` macro (#213934)

Define `__SIG_ATOMIC_TYPE__` for compatibility with GCC.

This fixes `riscv32-netbsd` and `riscv64-netbsd` system headers that
define `sig_atomic_t` using this macro.

Reference:
https://gcc.gnu.org/onlinedocs/gcc-16.1.0/cpp/Common-Predefined-Macros.html

Follow up of #199678, Closes #213895

(cherry picked from commit c08ed4c1ab086aad6f22cfc499e74d92953045ae)
DeltaFile
+2-0clang/test/Preprocessor/init.c
+1-0clang/test/Preprocessor/init-riscv.c
+1-0clang/test/Preprocessor/init-aarch64.c
+1-0clang/lib/Frontend/InitPreprocessor.cpp
+1-0clang/docs/ReleaseNotes.md
+6-05 files

LLVM/project 81fba7amlir/lib/Conversion/NVGPUToNVVM NVGPUToNVVM.cpp

[mlir] fix builders by moving var into assert (#209494)

non-asserts builders are failing since `vecTy` is unused aside from this
one assertion: https://lab.llvm.org/buildbot/#/builders/228/builds/4754

Since side-effects here are uninteresting, move the entire expr into the
assert, per CodingStandards.md

Fix-forward for #199700

(cherry picked from commit e217dcb8de5dd83b307fe8b95b43de11a7d894ab)
DeltaFile
+2-2mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
+2-21 files

LLVM/project 8557e5bllvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange freeze.ll

[LoopInterchange] Reject interchange when a freeze would move or be cloned

Loop interchange moves four blocks to a different loop depth: the outer loop
header and latch, and the inner loop preheader and exit block. It also splits
the inner loop latch and clones the instructions that compute the latch branch
condition and induction variable updates into the new latch block.

LangRef guarantees that all uses of the value returned by one execution of a
`freeze` observe that same value. The guarantee does not extend across
executions, so one `freeze` may yield a different value each time it runs.
Different `freeze` instructions may also yield different values for the same
`undef` or poison operand. Both steps above can therefore change which value a
use observes.

Moving a `freeze` to a different loop depth changes which loop iterations share
one dynamic result. Uses that observed a single frozen value in the original
nest can observe values from separate executions after interchange. Cloning a
`freeze` creates a second, independent instruction, so the original and clone
can yield different values for the same operand.

    [8 lines not shown]
DeltaFile
+868-0llvm/test/Transforms/LoopInterchange/freeze.ll
+75-0llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+943-02 files