LLVM/project e265316.github/workflows release-binaries.yml

workflows/release-binaries: Remove template expansion (#215405)

https://github.com/llvm/llvm-project/security/code-scanning/1699
DeltaFile
+2-1.github/workflows/release-binaries.yml
+2-11 files

LLVM/project 0212289libc/config/linux/aarch64 entrypoints.txt, libc/config/linux/riscv entrypoints.txt

Revert "Revert "[libc] Add realpath to linux entrypoints" (#215156)"

This reverts commit efe96c53557041be11e7fb4d43e6448cc09f6062.
DeltaFile
+1-4libc/config/linux/x86_64/entrypoints.txt
+1-4libc/config/linux/riscv/entrypoints.txt
+1-0libc/config/linux/aarch64/entrypoints.txt
+3-83 files

LLVM/project 14c5af0clang/lib/AST DeclTemplate.cpp, clang/lib/Sema SemaTemplateInstantiate.cpp HLSLExternalSemaSource.cpp

[clang][HLSL] Complete the pattern an instantiation is built from, not the primary template (#216388)

Fixes https://github.com/llvm/llvm-project/issues/212575

When an external AST source lazily supplies class template patterns,
Clang stopped asking it for definitions once the primary pattern had
been completed. A partial specialization declared after that point is
then instantiated from a pattern that had never been defined, failing
with `err_template_instantiate_undefined`.
So whether a declaration compiled depended on what had been declared
before it (as seen in https://hlsl.godbolt.org/z/vW3xGY6sW).

The problem Is that `ClassTemplateSpecializationDecl::Create` copies the
`hasExternalLexicalStorage()` flag only from the primary template, and
only while the primary template was still incomplete. Partial
specializations therefore failed when the primary template was
completed, hence exhibiting the aforementioned
`err_template_instantiate_undefined` error behavior when the primary
template was completed.

    [14 lines not shown]
DeltaFile
+103-8clang/unittests/AST/ExternalASTSourceTest.cpp
+48-0clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
+1-26clang/lib/Sema/HLSLExternalSemaSource.cpp
+0-8clang/lib/AST/DeclTemplate.cpp
+7-0clang/lib/Sema/SemaTemplateInstantiate.cpp
+159-425 files

LLVM/project 8baae02libc/test/src/stdlib CMakeLists.txt realpath_test.cpp, utils/bazel/llvm-project-overlay/libc/test/src/stdlib BUILD.bazel

[libc][realpath][test] Allow test directory to contain symlinks (#216828)

CI for https://github.com/llvm/llvm-project/pull/212925 failed because
the `libc-riscv32-qemu-yocto-fullbuild-dbg` buildbot on Yocto uses a
symlink for `/tmp` to `/var/volatile/tmp`
([source](https://github.com/openembedded/openembedded-core/blob/07a342aa80c7349dd014f743a695a5e006add8df/meta/recipes-core/initscripts/initscripts-1.0/volatiles#L32)).
It's fair enough that a system may define `/tmp` as a symlink, so this
PR updates the realpath tests to call `realpath` on the test directory
to resolve symlinks.

This PR also updates the test to use `libc_make_test_file_path` instead
of `/tmp`. Previously, the tests used `/tmp` because
`libc_make_test_file_path` might have symlinks in it. Since we fully
resolve symlinks now, we can use the more standard approach now.
DeltaFile
+13-3libc/test/src/stdlib/realpath_test.cpp
+1-0utils/bazel/llvm-project-overlay/libc/test/src/stdlib/BUILD.bazel
+1-0libc/test/src/stdlib/CMakeLists.txt
+15-33 files

LLVM/project ff94736.github/workflows new-prs.yml

workflows/new-prs: Limit token to current repository (#215406)

The token had access to all llvm repositories which was unnecessary
since it was only used for llvm-project.

https://github.com/llvm/llvm-project/security/code-scanning/1863
DeltaFile
+1-0.github/workflows/new-prs.yml
+1-01 files

LLVM/project 65f31e5llvm/lib/Target/NVPTX NVPTX.h CMakeLists.txt, llvm/test/CodeGen/NVPTX llc-pipeline-npm.ll

[NVPTX] Add NewPM codegen pipeline (#215712)

This exactly mirrors the LegacyPM implementation and produces identical
PTX for all lit tests. Right now this is opt-in with `-enable-new-pm`
for llc and clang.
DeltaFile
+357-0llvm/lib/Target/NVPTX/NVPTXCodeGenPassBuilder.cpp
+177-0llvm/test/CodeGen/NVPTX/llc-pipeline-npm.ll
+10-60llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+6-0llvm/lib/Target/NVPTX/NVPTXTargetMachine.h
+1-0llvm/lib/Target/NVPTX/NVPTX.h
+1-0llvm/lib/Target/NVPTX/CMakeLists.txt
+552-606 files

LLVM/project 2b0ea6cllvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-spill-joint-dom-mir.mir

[AMDGPU] Fix MIR test by adding stackPtrOffsetReg.
DeltaFile
+2-0llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom-mir.mir
+2-01 files

LLVM/project 54ea3e2mlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/lib/Dialect/LLVMIR/IR NVVMDialect.cpp

[MLIR][NVVM] Spell strict assembly properties directly

Bind every NVVM inherent property in its operation assembly format and
re-enable strict property parsing for the dialect. Use direct named clauses
for declarative formats and custom MMA parsers while retaining dictionaries
for discardable attributes.

Assisted-by: Codex
DeltaFile
+619-5mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+355-158mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+144-144mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-tensor.mlir
+144-144mlir/test/Target/LLVMIR/nvvm/tcgen05-mma-sp-tensor.mlir
+128-128mlir/test/Target/LLVMIR/nvvm/tma_store_reduce.mlir
+29-203mlir/test/Dialect/LLVMIR/nvvm-mma-sparse-blockscale.mlir
+1,419-782113 files not shown
+3,744-4,052119 files

LLVM/project 5639cbaflang/lib/Semantics check-call.cpp, flang/test/Semantics/CUDA cuf23.cuf

[flang][cuda] Allow call to len intrinsic on host with device argument (#216846)

This is fine to call `len` intrinsic on the host with a device actual
argument since the descriptor is allocated in managed memory.
DeltaFile
+7-0flang/test/Semantics/CUDA/cuf23.cuf
+2-2flang/lib/Semantics/check-call.cpp
+9-22 files

LLVM/project 3154c97clang/include/clang/Basic AttrDocs.td, clang/test/CodeGen/LoongArch/lasx builtin.c builtin-alias.c

Merge remote-tracking branch 'origin/main' into vplan-based-stride-mv-rt-guard

# Conflicts:
#       llvm/lib/Transforms/Vectorize/VPlanTransforms.h
#       llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv-btc.ll
#       llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
DeltaFile
+13,767-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+6,347-3,146llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+4,432-4,282clang/include/clang/Basic/AttrDocs.td
+5,067-2,506llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
+2,728-2,728clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
+2,724-2,724clang/test/CodeGen/LoongArch/lasx/builtin.c
+35,065-22,2425,190 files not shown
+249,433-130,5035,196 files

LLVM/project 9f101f3libc/test/src/stdlib realpath_test.cpp

Fix typo
DeltaFile
+3-3libc/test/src/stdlib/realpath_test.cpp
+3-31 files

LLVM/project b29815eclang/test/CodeGen memprof.cpp

[NFC][MemProf] Replace memprofraw with YAML in memprof.cpp test
DeltaFile
+25-11clang/test/CodeGen/memprof.cpp
+25-111 files

LLVM/project 8734e07llvm/lib/Target/RISCV RISCVInstrInfoZibi.td RISCVInstrInfo.td

[RISCV] Simplify the SelectCompressOpt patterns. NFC (#216819)

Use a PatLeaf and a predicate to check the condition code instead of
having a SETEQ and SETNE pattern. CCtoRISCVCC will take care of
converting the condition code.
DeltaFile
+11-10llvm/lib/Target/RISCV/RISCVInstrInfo.td
+1-7llvm/lib/Target/RISCV/RISCVInstrInfoZibi.td
+12-172 files

LLVM/project b02b100clang/include/clang/CIR/Dialect/IR CIRTypes.td, clang/lib/CIR/CodeGen CIRGenRecordLayoutBuilder.cpp

[CIR] Mark bit-field access units as their own member kinds

A bit-field access unit is only as wide as the compiler needs it to be,
which can be narrower than the type the bit-fields were declared with.
Nothing in the record type says so. The unit just gets `data`, or
`empty` when none of its bit-fields are named, and an ordinary field
gets those same marks.

That makes `struct { long long x : 32; }` and `struct { unsigned x; }`
look identical here. Classic CodeGen tells them apart and coerces the
first to `i64`, the second to `i32`. It reads the declared type, where
the bit-field still leaves user data past bit 32.

The fix is to give a unit its own marks, `bitfield` and
`empty_bitfield`. Nothing reads them yet, and no record's emptiness
answer changes. The next PR records a zero-width bit-field, which the
marks miss too, and pad-aware classification can then use both.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+82-0clang/test/CIR/CodeGen/no-unique-address.cpp
+34-12clang/test/CIR/CodeGen/record-member-kinds.c
+30-15clang/include/clang/CIR/Dialect/IR/CIRTypes.td
+26-17clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+41-0clang/unittests/CIR/RecordMemberKindTest.cpp
+19-17clang/test/CIR/CodeGen/record-member-kinds.cpp
+232-6114 files not shown
+307-9420 files

LLVM/project 1e127fallvm/lib/Transforms/Vectorize VPlan.h VPlanTransforms.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

[VPlan] Verify VPIRFlags when creating VPWidenRecipe. (#213039)

VPWidenRecipe's constructor didn't check its flags at all, unlike
VPInstruction and VPWidenCastRecipe. Add checks and fix remaining
violations.

PR: https://github.com/llvm/llvm-project/pull/213039
DeltaFile
+7-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+5-3llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+6-1llvm/lib/Transforms/Vectorize/VPlan.h
+18-83 files

LLVM/project 11e3015clang/test/Driver/flang lit.local.cfg

To fix test failures. (#216763)

This PR is to fix test failure in the AIX buildbot.
Flang supports 64-bit mode only. Add a config file to set OBJECT_MODE.
DeltaFile
+3-0clang/test/Driver/flang/lit.local.cfg
+3-01 files

LLVM/project 3db5d1fmlir/lib/Dialect/SCF/IR SCF.cpp, mlir/test/Dialect/SCF for-loop-peeling.mlir

[MLIR][SCF] Prioritize single-iteration loop inlining (#188986)

Loops with a statically known trip count of one expose a single acyclic
path and can be handled by the existing region branch op inliner.

Give that rewrite a higher benefit than the generic region branch op
canonicalizations. This ensures that the loop is inlined before dead
successor inputs can be removed independently and temporarily invalidate
the op under expensive pattern API checks.

This fixes some tests with MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS
enabled.

Assisted-by: Codex
DeltaFile
+8-2mlir/lib/Dialect/SCF/IR/SCF.cpp
+0-2mlir/test/Dialect/SCF/for-loop-peeling.mlir
+0-1mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_strided_conv_2d_nhwc_hwcf.mlir
+0-1mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_pooling_nhwc.mlir
+0-1mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_dilated_conv_2d_nhwc_hwcf.mlir
+0-1mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_conversion_block.mlir
+8-821 files not shown
+8-2927 files

LLVM/project 6cae380clang/include/clang/Basic AttrDocs.td, lldb/source/Plugins/Process/Utility RegisterInfos_riscv32.h

Merge branch 'main' into users/ellishg/fix-memprofmissingfunc-test
DeltaFile
+13,767-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+6,347-3,146llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+4,432-4,282clang/include/clang/Basic/AttrDocs.td
+5,067-2,506llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-basic-instructions.s
+375-4,097lldb/source/Plugins/Process/Utility/RegisterInfos_riscv32.h
+2,202-1,876llvm/test/CodeGen/AArch64/GlobalISel/arm64-atomic.ll
+32,190-22,7634,811 files not shown
+224,985-115,3944,817 files

LLVM/project 32518a0llvm/lib/Target/ARM ARMInstrThumb2.td ARMInstrThumb.td, llvm/test/CodeGen/ARM v8m-tail-call-macho.ll

[ARM] Allow tTAILJMPd on v8-M Baseline

a1189106d5a1 added B.W to v8-M Baseline, relaxing t2B, tCBZ and tCBNZ
from Requires<[IsThumb2]> to Requires<[IsThumb, HasV8MBaseline]>, and
enabled tail calls for it. It missed tTAILJMPd, which expands to t2B
but still required IsThumb2, so emitting a tail call for a Thumb1 MachO
target failed:

  LLVM ERROR: Attempting to emit tTAILJMPd instruction but the
  Feature_IsThumb2 predicate(s) are not met
DeltaFile
+5-0llvm/test/CodeGen/ARM/v8m-tail-call-macho.ll
+2-2llvm/lib/Target/ARM/ARMInstrThumb.td
+1-1llvm/lib/Target/ARM/ARMInstrThumb2.td
+8-33 files

LLVM/project f53e41fllvm/test/CodeGen/ARM v8m-tail-call-macho.ll

[ARM][NFC] Add a MachO Thumb tail call test
DeltaFile
+12-0llvm/test/CodeGen/ARM/v8m-tail-call-macho.ll
+12-01 files

LLVM/project 9cb7626llvm/test/Transforms/PGOProfile memprofmissingfunc.ll

[NFC][MemProf] Replace memprofraw with YAML in memprofmissingfunc.ll test

Use split-file to create a basic `.memprofdata` file to be used in the test.  This also allows us to remove the REQUIRES because we are no longer reading a binary file.
DeltaFile
+12-10llvm/test/Transforms/PGOProfile/memprofmissingfunc.ll
+12-101 files

LLVM/project 91ba38dlldb/bindings/interface SBValueExtensions.i, lldb/test/API/python_api/value main.c TestValueAPI.py

[lldb] Fix SBValue.format property (#216802)

lldb.SBValue.format should map to GetFormat instead of GetName
DeltaFile
+16-0lldb/test/API/python_api/value/TestValueAPI.py
+1-1lldb/bindings/interface/SBValueExtensions.i
+1-0lldb/test/API/python_api/value/main.c
+18-13 files

LLVM/project 9c13902compiler-rt/test/asan/TestCases invalid-pointer-pairs-vector-extract.cpp

[asan][test] Fix invalid-pointer-pairs-vector-extract.cpp breakage after #210729 (#216827)

compiler-rt/test/asan/TestCases/invalid-pointer-pairs-vector-extract.cpp
(introduced in #216532) started failing (or rather, unexpectedly
passing) after #210729 (e.g.,
https://lab.llvm.org/buildbot/#/builders/66/builds/35645,
https://lab.llvm.org/buildbot/#/builders/51/builds/42365), because it
changes the codegen for pointer subtraction if -fwrapv-pointer is not
set.

This patch fixes the test case by adding -fwrapv-pointer.
DeltaFile
+1-1compiler-rt/test/asan/TestCases/invalid-pointer-pairs-vector-extract.cpp
+1-11 files

LLVM/project a89ce98llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Rebase, address comment

Created using spr 1.3.7
DeltaFile
+7-5llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+7-51 files

LLVM/project 3ec64ddclang/docs ReleaseNotes.md ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

[clang-format] Add support for additional C++ declaration specifiers in QualifierOrder (#160853)

Fixes #60866

This PR extends clang-formats `QualifierOrder` option to support
additional C++ declaration specifiers, addressing the limitation where
many common qualifiers were not recognized.

## Problem

Previously, `QualifierOrder` only supported a limited subset of C++
declaration specifiers:
- `const`, `volatile`, `static`, `inline`, `constexpr`, `restrict`,
`friend`

This meant that many common C++ qualifiers like `extern`, `mutable`,
`typedef`, `unsigned`, etc. were not recognized and could not be
properly reordered, limiting the usefulness of the feature.


    [17 lines not shown]
DeltaFile
+156-33clang/unittests/Format/QualifierFixerTest.cpp
+62-15clang/lib/Format/QualifierAlignmentFixer.cpp
+14-0clang/include/clang/Format/Format.h
+14-0clang/docs/ClangFormatStyleOptions.md
+4-0clang/docs/ReleaseNotes.md
+250-485 files

LLVM/project b04bfb5llvm/lib/Target/AMDGPU AMDGPUGlobalISelUtils.cpp

AMDGPU: Capture G_PTR_ADD flags via m_MIFlags in getBaseWithConstantOffset (#216809)

Read the nuw flag from the m_GPtrAdd match itself instead of a redundant
getVRegDef of the pointer register. NFC.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+4-2llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.cpp
+4-21 files

LLVM/project bf8c3e1llvm/lib/Target/AMDGPU AMDGPURegBankLegalize.cpp

AMDGPU: Use mi_match for G_BITCAST check in RegBankLegalize (#216808)

Replace the getVRegDef + G_BITCAST opcode check in
tryEliminateReadAnyLane
with m_GBitcast. NFC.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+2-4llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+2-41 files

LLVM/project 1e1b092llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

AArch64: Guard optimizeCondBranch against a physical copy source (#216699)

optimizeCondBranch walks COPY chains from the branch condition register,
calling getVRegDef on each copy's source operand. A COPY source can be a
physical register which doesn't make sense to pass to getVRegDef.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+2-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+2-01 files

LLVM/project 5a42ba2clang/lib/CodeGen CodeGenModule.cpp, clang/test/CodeGen/AArch64 abi-classify-return-types.c

[LLVMABI][AARCH64] Add support for simple direct return case (#216437)

This adds LLVM ABI library support for AArch64 return type
classification for scalar and matrix types that are classified as
Direct. Other types and all arguments are now reported as not yet
implemented.

This also introduces the hook in Clang to use the ABI library for
non-Windows AArch64 targets when `-fexperimental-abi-lowering` is passed
and adds a test for the ABI handling of types which are handled by the
library.

Assisted-by: Cursor / various models
DeltaFile
+86-34llvm/unittests/ABI/AArch64TargetInfoTest.cpp
+69-5llvm/lib/ABI/Targets/AArch64.cpp
+62-0clang/test/CodeGen/AArch64/abi-classify-return-types.c
+25-5clang/lib/CodeGen/CodeGenModule.cpp
+1-19llvm/lib/ABI/Targets/X86.cpp
+20-0llvm/lib/ABI/TargetInfo.cpp
+263-631 files not shown
+266-637 files

LLVM/project e3eee24llvm/lib/Analysis IVDescriptors.cpp

Fixups
DeltaFile
+1-1llvm/lib/Analysis/IVDescriptors.cpp
+1-11 files