LLVM/project 782f1a0llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc BUILD.gn

[gn build] Port e5f169f91a86
DeltaFile
+0-1llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
+0-11 files

LLVM/project e5f169fclang/lib/Interpreter IncrementalExecutor.cpp, llvm/include/llvm/ExecutionEngine/Orc DebuggerSupport.h LLJIT.h

Revert "[ORC][LLJIT] Move enable-debugger-support utility out of LLJITBuilder."

This reverts commit e1a5bb59b91d60c0d87feb78f0e0614589a4c927 while I
investigate the bot failure at
https://lab.llvm.org/buildbot/#/builders/168/builds/15831
DeltaFile
+0-61llvm/lib/ExecutionEngine/Orc/DebuggerSupport.cpp
+54-2llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
+0-28llvm/include/llvm/ExecutionEngine/Orc/DebuggerSupport.h
+3-15llvm/tools/lli/lli.cpp
+2-8clang/lib/Interpreter/IncrementalExecutor.cpp
+7-0llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
+66-1144 files not shown
+75-11810 files

LLVM/project bcc5b48llvm/lib/Target/AArch64 AArch64LoadStoreOptimizer.cpp AArch64InstrInfo.cpp, llvm/test/CodeGen/AArch64 ldrpre-ldr-merge.mir

Reapply "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"

This reverts commit 0def4e6b0f638b97a73bd4674365961d8fabda28, applies a
quick fix that disallows merging two pre-indexed loads, and adds MIR
regression tests.

Differential Revision: https://reviews.llvm.org/D152407
DeltaFile
+64-8llvm/test/CodeGen/AArch64/ldrpre-ldr-merge.mir
+11-1llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
+6-1llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+81-103 files

LLVM/project b8b4ee6llvm/include/llvm/Support Endian.h

[Support] Add [[nodiscard]] (NFC)
DeltaFile
+32-26llvm/include/llvm/Support/Endian.h
+32-261 files

LLVM/project d9a0163llvm/lib/Target/NVPTX NVPTXInstrInfo.td NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX i16x2-instructions.ll

Revert "[NVPTX] Improve lowering of v2i16 logical ops. (#67073)"

This reverts commit 648579006234b7608549cf708c07aac4d6283a1f.

Caused xla/tests:float8_test_gpu to fail
```
LLVM ERROR: Cannot select: t118: v2i16 = or t375, t401
  t375: v2i16 = BUILD_VECTOR t374, t372
    t374: i16 = select t247, Constant:i16<8960>, t360
      t247: i1 = setcc t199, Constant:i16<7>, seteq:ch
        t199: i16 = extract_vector_elt t187, Constant:i64<0>
          t187: v2i16 = and t183, t410
            t183: v2i16 = BUILD_VECTOR t383, t384
            ...
```

Acked by author to revert
DeltaFile
+0-64llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
+0-11llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+4-3llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+4-783 files

LLVM/project d230bf3mlir/lib/Conversion/ComplexToStandard ComplexToStandard.cpp, mlir/test/Conversion/ComplexToStandard convert-to-standard.mlir

[mlir][complex] Support Fastmath flag in the conversion of exp,expm1 (#67001)

See:

https://discourse.llvm.org/t/rfc-fastmath-flags-support-in-complex-dialect/71981
DeltaFile
+41-0mlir/test/Conversion/ComplexToStandard/convert-to-standard.mlir
+11-7mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
+52-72 files

LLVM/project 5ba239flldb/test/API/commands/watchpoints/step_over_watchpoint TestStepOverWatchpoint.py

Remove expected-fail for Linux on TestStepOverWatchpoint.py

With my previous fix, this test now passes on
Linux.
DeltaFile
+0-6lldb/test/API/commands/watchpoints/step_over_watchpoint/TestStepOverWatchpoint.py
+0-61 files

LLVM/project 4a43ee0lldb/test/API/commands/watchpoints/step_over_watchpoint TestStepOverWatchpoint.py main.c

Re-enable StepOverWatchpoint test, make it more focused

This is my second recent change to TestStepOverWatchpoint.py,
the first was to change the two global variables it is watching
from 'char' to 'long' so they're more likely to be on separate
words/doublewords of memory that can be watched indepdently.

I believe this removes the need for the MIPS and S390X skips.

The test was testing a combination of read and write watchpoints,
stepping over a function that hits them, and then instruction stepping
over a source line which hits them.  But previously it was
always starting with the read watchpoint in both of them, it
didn't test the instruction-stepping for the read watchpoint.

I now have to tests in TestStepOverWatchpoint.py, one which
runs to the read-watchpoint function, sets that watchpoint,
steps over another function which reads from that global, then
instruction steps over a source line that reads from that global.

    [9 lines not shown]
DeltaFile
+37-28lldb/test/API/commands/watchpoints/step_over_watchpoint/TestStepOverWatchpoint.py
+13-7lldb/test/API/commands/watchpoints/step_over_watchpoint/main.c
+50-352 files

LLVM/project e749757llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

[Vectorize] Use range-based for loops (NFC)
DeltaFile
+13-24llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+13-241 files

LLVM/project aaa79a5clang/docs ReleaseNotes.rst

[release notes] Add forgotten case to list of changed manglings.
DeltaFile
+2-0clang/docs/ReleaseNotes.rst
+2-01 files

LLVM/project ce8c228clang/lib/AST TextNodeDumper.cpp, llvm/lib/CodeGen MachineCopyPropagation.cpp

Use llvm::drop_begin and llvm::drop_end (NFC)
DeltaFile
+3-5llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+2-2llvm/lib/CodeGen/MachineCopyPropagation.cpp
+1-2clang/lib/AST/TextNodeDumper.cpp
+1-2llvm/lib/MCA/Stages/EntryStage.cpp
+1-1llvm/lib/CodeGen/GlobalISel/Utils.cpp
+1-1llvm/lib/IR/Instructions.cpp
+9-136 files

LLVM/project 3bca659clang/lib/Sema SemaOpenMP.cpp, mlir/lib/Dialect/Linalg/Transforms Vectorization.cpp

Use llvm::is_contained (NFC)
DeltaFile
+2-2mlir/lib/Dialect/NVGPU/IR/NVGPUDialect.cpp
+1-3clang/lib/Sema/SemaOpenMP.cpp
+1-2mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+4-73 files

LLVM/project 8a7f4eellvm/lib/ExecutionEngine/JITLink ELF_riscv.cpp, llvm/lib/Target/AArch64 AArch64ExpandPseudoInsts.cpp

[llvm] Use llvm::is_contained (NFC)
DeltaFile
+2-4llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+2-3llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+1-3llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
+1-2llvm/lib/Transforms/Scalar/SROA.cpp
+1-2llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp
+7-145 files

LLVM/project 972df2cllvm/lib/Target/RISCV/GISel RISCVInstructionSelector.cpp, llvm/test/CodeGen/RISCV/GlobalISel alu-roundtrip.ll

[RISCV][GISel] Emit G_CONSTANT 0 as a copy from X0. (#67202)

We need to use a COPY so the register coalescer can replace reads
of the register we copy to with X0. This is needed so that we use
X0 on instructions that don't have an immediate form.

This was reviewed as #67202.
DeltaFile
+9-7llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+6-10llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
+4-4llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant64.mir
+2-2llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/constant32.mir
+21-234 files

LLVM/project 7cd01afllvm/test/CodeGen/RISCV/GlobalISel alu-roundtrip.ll

[RISCV][GISel] Add test showing missed opportunity to use X0 for the LHS of sub for negate.

I had to disable the late copy propagation pass that can see through
the ADDI we were previously emitting. We really want to get this
in the register coalescer if not even earlier.
DeltaFile
+40-2llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
+40-21 files

LLVM/project 12ee3a6mlir/include/mlir/Dialect/SparseTensor/IR SparseTensorAttrDefs.td

[mlir][sparse] make high and 2:4 a level format, not a level property (#67206)

After some internal discussion, we decided that these features were best
represented as a separate format, and not a property.
DeltaFile
+12-8mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
+12-81 files

LLVM/project e5026f0llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/lib/IR AutoUpgrade.cpp

[llvm] Remove uses of Type::getPointerTo() (NFC)

Partial progress towards removing in-tree uses of `getPointerTo()`,
by employing the following options:

* Drop the call entirely if the sole purpose of it is to support a no-op
  bitcast (remove the no-op bitcast as well).

* Replace with `PointerType::get()`/`PointerType::getUnqual()`

This is a NFC cleanup effort.

Reviewed By: barannikov88

Differential Revision: https://reviews.llvm.org/D155232
DeltaFile
+3-3llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+1-3llvm/lib/IR/AutoUpgrade.cpp
+2-2llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+1-3llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+2-1llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
+2-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+11-131 files not shown
+13-147 files

LLVM/project 193c67cllvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc BUILD.gn

[gn build] Port e1a5bb59b91d
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
+1-01 files

LLVM/project e1a5bb5clang/lib/Interpreter IncrementalExecutor.cpp, llvm/include/llvm/ExecutionEngine/Orc DebuggerSupport.h LLJIT.h

[ORC][LLJIT] Move enable-debugger-support utility out of LLJITBuilder.

This change means that debugger support only needs to be linked in if it's
used. The code size of debugger support is expected to increase as we improve
it (e.g. pulling in DWARF parsing), so making it an optional extra is useful
for controlling final binary sizes.
DeltaFile
+61-0llvm/lib/ExecutionEngine/Orc/DebuggerSupport.cpp
+2-54llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
+28-0llvm/include/llvm/ExecutionEngine/Orc/DebuggerSupport.h
+15-3llvm/tools/lli/lli.cpp
+8-2clang/lib/Interpreter/IncrementalExecutor.cpp
+0-7llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
+114-664 files not shown
+118-7510 files

LLVM/project ab78962libunwind/test forceunwind.pass.cpp

[libunwind] Relax a REQUIRES on a test that passes on FreeBSD
DeltaFile
+1-1libunwind/test/forceunwind.pass.cpp
+1-11 files

LLVM/project d4addecllvm/lib/ExecutionEngine/Orc LLJIT.cpp

[ORC][LLJIT] Fix typo in assert message.
DeltaFile
+1-1llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
+1-11 files

LLVM/project b0818dfllvm/include/llvm/ExecutionEngine/Orc LLJIT.h, llvm/lib/ExecutionEngine/Orc LLJIT.cpp

[ORC][LLJIT] Add a Pre-PlatformSetup-Setup function.

This function will be run prior to platform setup to provide LLJIT clients with
a chance to customize the LLJIT instance (e.g. install plugins) before the JIT
runtime is loaded.

The motivating use-case is debugger support: We want to install the debugger
plugin before the runtime is loaded (during platform setup) so that the runtime
itself can be debugged. A patch to do this will be committed shortly.
DeltaFile
+14-0llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
+7-0llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
+21-02 files

LLVM/project 836411bmlir/include/mlir-c/Dialect SparseTensor.h, mlir/include/mlir/Dialect/SparseTensor/IR SparseTensorType.h SparseTensorAttrDefs.td

[mlir][sparse] add lvlToDim field to sparse tensor encoding (#67194)

Note the new surface syntax allows for defining a dimToLvl and lvlToDim
map at once (where usually the latter can be inferred from the former,
but not always). This revision adds storage for the latter, together
with some intial boilerplate. The actual support (inference, validation,
printing, etc.) is still TBD of course.
DeltaFile
+22-12mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
+8-3mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorType.h
+8-2mlir/lib/CAPI/Dialect/SparseTensor.cpp
+7-2mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
+6-0mlir/include/mlir-c/Dialect/SparseTensor.h
+1-2mlir/test/CAPI/sparse_tensor.c
+52-212 files not shown
+54-228 files

LLVM/project 8ea7430clang/lib/Driver/ToolChains Haiku.cpp Haiku.h, clang/test/Driver haiku.c haiku.cpp

[Driver] Implement ToolChain on Haiku (#66038)

Instead of passing everything off to GCC, add a ToolChain for Haiku to allow Clang to properly link things on its own.

Co-authored-by: X512 <danger_mail at list.ru>
Co-authored-by: David Karoly <david.karoly at outlook.com>
DeltaFile
+124-5clang/lib/Driver/ToolChains/Haiku.cpp
+29-0clang/test/Driver/haiku.c
+26-3clang/lib/Driver/ToolChains/Haiku.h
+6-0clang/lib/Driver/ToolChains/Gnu.cpp
+2-1clang/test/Driver/haiku.cpp
+0-0clang/test/Driver/Inputs/haiku_x86_64_tree/boot/system/develop/lib/init_term_dyn.o
+187-98 files not shown
+187-914 files

LLVM/project 11b9ec5compiler-rt/test/sanitizer_common/TestCases demangle_internal.cpp, compiler-rt/test/sanitizer_common/TestCases/Linux internal_symbolizer.cpp

[sanitizer] Add more internal symbolizer tests

And merge them with demangle_internal.cpp.
DeltaFile
+142-0compiler-rt/test/sanitizer_common/TestCases/Linux/internal_symbolizer.cpp
+0-22compiler-rt/test/sanitizer_common/TestCases/demangle_internal.cpp
+142-222 files

LLVM/project 71f9e76clang/include/clang/Basic Attr.td, clang/lib/AST RecordLayoutBuilder.cpp Decl.cpp

Revert "Implement [[msvc::no_unique_address]] (#65675)" (#67198)

This reverts commit 4a55d426967b9c70f5dea7b3a389e11393a4f4c4.

Reverting because this breaks sphinx documentation, and even with it
fixed the format of the attribute makes the no_unique_address
documentation show up twice.
DeltaFile
+0-381clang/test/Layout/ms-no-unique-address.cpp
+8-45clang/lib/AST/RecordLayoutBuilder.cpp
+0-19clang/test/SemaCXX/cxx2a-ms-no-unique-address.cpp
+3-16clang/include/clang/Basic/Attr.td
+3-8clang/lib/AST/Decl.cpp
+0-10clang/lib/Sema/SemaDeclAttr.cpp
+14-4793 files not shown
+16-4899 files

LLVM/project 9779a73mlir/include/mlir/Dialect/LLVMIR NVVMDialect.h ROCDLDialect.h, mlir/lib/Dialect/LLVMIR CMakeLists.txt

[mlir] Fix some cmake dependencies in LLVMIR Dialect (#66956)

While looking into reducing needless interdependencies between upstream
MLIR dialects and passes, I discovered that the ROCDL Dialect
redundantely uses links in `VectorToLLVM` conversion pass when it
actually requires just the LLVM Dialect. Furthermore, after a build
failure, I ran `ninja -t missingdeps` which revealed that the NVVM
Dialect depends on headers of the GPU dialect
(https://github.com/llvm/llvm-project/blob/211c9752c8200fbb3ff7be1f6aa98037901758ce/mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h#L18)
without stating so in CMake.
This causes flaky builds as it is not guaranteed that the header exists
prior to the dialect being compiled.
DeltaFile
+3-1mlir/lib/Dialect/LLVMIR/CMakeLists.txt
+1-1mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+1-1mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
+0-1mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.h
+0-1mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.h
+5-55 files

LLVM/project 4139f0dllvm/docs Coroutines.rst

coroutines doc: fix a RST critical

```
/build/source/llvm/docs/Coroutines.rst:1781: CRITICAL: Title level inconsistent:

'``coro.outside.frame``' Metadata
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
```
DeltaFile
+1-1llvm/docs/Coroutines.rst
+1-11 files

LLVM/project e9cb582mlir/include/mlir/Interfaces InferTypeOpInterface.td, mlir/lib/Dialect/Tosa/Transforms TosaInferShapes.cpp

[mlir][TOSA] Fix shape inference when operand was inferred (#66906)

https://github.com/llvm/llvm-project/commit/057fc8e7d8a3593f98930b8b91f80b9dd9b5fd4a
Introduces a bug in the `TosaInferShapesPass` when an operand type was
already inferred.
https://github.com/llvm/llvm-project/blob/f7bfa583b7a5ff0e9954d2810006b7a71123be88/mlir/include/mlir/Interfaces/InferTypeOpInterface.td#L248
interprets the `ValueShapeRange` as a normal `ValueRange` and looses the
information of the inference.

This PR changes the logic of the shape inference a bit. Instead of
saving the type information in a `DenseMap` and updating the types after
the whole analysis for a region, it now updates the types directly in
each iteration. That way the operands always have the inferred type.
DeltaFile
+15-41mlir/lib/Dialect/Tosa/Transforms/TosaInferShapes.cpp
+13-0mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
+1-1mlir/include/mlir/Interfaces/InferTypeOpInterface.td
+29-423 files

LLVM/project 2d27bf2clang/include/clang/Basic Attr.td

Revert "Fix attr docs from previous no-unique-adderss change (#67195)"

This reverts commit 44f2db7493454b41d2f5c81b76bd30f2f035ed31.

It caused
```
error: Record `NoUniqueAddress', field `Documentation' exists but does not have a list value
```
DeltaFile
+1-0clang/include/clang/Basic/Attr.td
+1-01 files