[DDG][NFC] Colorize DDG dot graph (#181618)
All blocks and edges are currently colored black which makes it
difficult to distinguish while looking at huge graph.
This simple patch implements the following colorization to make it
visually more distinguishable.
1. Pi-blocks - styled to rounded, filled, light-yellow fill, dark orange
border
2. Multi-instruction blocks - Light cyan fill
3. MemoryDependence edges are now colored red.
4. Register def-use edges are now colored blue.
This patch implements `getNodeAttributes()` to return the string of
attributes to apply to the node.
[RISCV] Remove VMConstraint from VAESKF1_VI/VAESKF2_VI. (#181887)
These instructions don't have a VM operand. If these instructions use a
V0 destination, the VMConstraint code calls getReg() on the the last
operand which is an immediate. This triggers an assertion. Not sure
what happens on a release build. It probably treats the immediate as a
value in the RISCV register info enum.
[clang][deps] Ensure the service outlives async module compiles (#181772)
This PR fixes a race condition discovered by thread sanitizer in the
asynchronous dependency scanner implementaion.
The implementation assumed that whenever a new thread is spawned to
compile a module, the primary scanning thread must wait for it to finish
to read the PCM it produces. This is not true - it's possible for the
implicit build on the primary thread to decide to compile the same
module too, leaving the asynchronous thread running without any kind of
synchronization. This means the TU scan may return, the service may get
destroyed, but the asynchronous thread continues running with the VFS
caches and module cache implementation destroyed, leading to crashes.
This PR fixes this by awaiting all asynchronous threads at the end of a
TU scan.
[VPlan] Remove VPDerivedIVRecipe and VPScalarIVStepsRecipe from VPHeaderPHIRecipe doc comment. NFC (#181862)
These aren't subclasses of VPHeaderPHIRecipe, I'm not sure if the class
hierarchy changed or not.
Also add the other subclasses to the list.
[ProfCheck][Matrix] Add profile data where relevant
This patch tackles two cases:
1. Checks around aliasing/overlapping ranges. This is runtime dependent
on the pointer values passed in, which we have no way of knowing
without additional profiling.
2. Loop backedges. For these we also have an associated trip count, so
we set up the branch weights to represent this.
Tests updated/profcheck-xfail.txt updated.
Reviewers: alanzhao1, fhahn, mtrofin, snehasish
Pull Request: https://github.com/llvm/llvm-project/pull/181292
[NFC][Matrix] Make CreateLoop take ConstantInt for Bound/Step
These should always be constants (unless someday we add support for
scalable matrices and then we can revisit). Explicitly pass them as
ConstantInt so we can avoid needing to downcast in a future PR that will
calculate appropriate branch weights using these values.
Reviewers: fhahn, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/181291
[ProfCheck][Matrix] Propagate profile information for selects
LowerMatrixIntrinsics creates new selects in the process of lowering
matrix intrinsics. The condition of such selects remains the same as
before. Because of this, we can directly propagate the profile
information for all selects on scalar conditions.
Reviewers: mtrofin, snehasish, fhahn, alanzhao1
Pull Request: https://github.com/llvm/llvm-project/pull/181248
[LangRef][ConstantTime] Add documentation for llvm.ct.select.* constant-time intrinsics (#181042)
This PR introduces and documents the llvm.ct.select.* constant-time
intrinsics, providing timing-independent selection operations for
security-sensitive code. The LangRef is updated with syntax, semantics,
supported types, and usage guidance.
Additionally, test coverage is extended with a new <8 x float> variant
(llvm.ct.select.v8f32) and corresponding X86 codegen tests to ensure
correct lowering on both x64 and x32 targets.
[CIR] Implement shouldCreateMemCpyFromGlobal in LoweringPrepare (#181276)
CIRGen emits cir.const + cir.store for aggregate initialization, keeping
closer to source-level semantics. LoweringPrepare transforms stores of
constant aggregates (arrays, records) into cir.global + cir.get_global +
cir.copy, matching OG codegen's shouldCreateMemCpyFromGlobal
optimization.
The transform only applies to stores targeting cir.alloca (local
variables inside cir.func). Stores in other contexts (e.g. OpenACC
reduction recipe init blocks, base class initialization) are left as
cir.const + cir.store.
Also fixes CopyOp lowering to use i64 for the memcpy length instead of
i32, matching OG codegen behavior.
[LLVM][Utils] Fix automerge in git-llvm-push (#181766)
Enabling automerge can only be done using the GraphQL API. Add in some
basic GraphQL infrastructure and update the enable_automerge method to
call the GraphQL API to enable automerge for a PR.
Tested locally on #181762.
Closes #181634.
[AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions
A recent specification update has removed FEAT_XS gating for `tlbip *nxs`
instructions. It remains gated on FEAT_XS for `tlbi *nxs` instructions.
[AArch64][llvm] Gate some `tlbip` insns with +tlbid or +d128
Change the gating of `tlbip` instructions containing `*E1IS*`, `*E1OS*`,
`*E2IS*` or `*E2OS*` to be used with `+tlbid` or `+d128`. This is because
the 2025 Armv9.7-A MemSys specification says:
```
All TLBIP *E1IS*, TLBIP*E1OS*, TLBIP*E2IS* and TLBIP*E2OS* instructions
that are currently dependent on FEAT_D128 are updated to be dependent
on FEAT_D128 or FEAT_TLBID
```
[lldb] Revert scripted symbol locator (#181945)
This revert #181334 and its follow-up PRs (including #181488, #181492,
#181493, #181494 and #181498) as well as Ismail's documentation changes
(#181594, #181717). The original commit causes a test failure in CI
(https://github.com/llvm/llvm-project/issues/181938) but the more I look
at the patch, the more I'm convinced it was not ready to land. It will
be easier to iterate on the feedback by re-landing this than by using
post-commit review.
[RISCV] Check the error location in xsfvcp-invalid.s. NFC (#181929)
Check that the error location points to the destination operand.
I'm planning to rewrite the code that generates that error, and I want
to make sure I get the location right.
[TableGen] Rename TheMatcher->TheMatcherList. NFC (#181942)
After 8d971c0360f91729cc5120ffd361f7b55e97f2ab, there is a linked list
container object called MatcherList. We no long hold a pointer directly
to the first Matcher in the list.
Rename the variables to make this clearer.
[CIR] Add verifier for CIR try op (#181419)
This adds a verifier to enforce the requirement that every catch handler
in a cir.try operation must begin with a cir.catch_param operation.
