[Driver] Switch clang++ to default Solaris 11.4 compilation environment (#201063)
`clang++` has long followed `g++`'s lead predefining `_XOPEN_SOURCE=600`
on Solaris. As detailed in [Switch g++ to default Solaris 11.4
compilation
environment](https://gcc.gnu.org/pipermail/gcc-patches/2026-May/716990.html),
this is no longer necessary in Solaris 11.4.
Tested on `amd64-pc-solaris2.11` and `sparcv9-sun-solaris2.11`.
[Flang][OpenMP] Declare Target fixes for USM and declare target to (#200248)
Currently declare target enter would fall through the if statement even
though it's a synonym of declare target to, so fix this via adding a
simpler and more readable check for link clause instead.
USM declare target to works a little differently to regular link cases,
where the type is actually converted into a pointer, rather than a
global of the original typing. So, add a caveat where we convert the
type to a pointer if requires usm has been triggered. This gets the
correct behaviour in USM mode on USM devices.
[AIX][LLVM] Update the default code model for 64-bit (#199301)
This changes the default code model on 64-bit AIX to large.
For many applications, the existing small code model is simply
inadequate to build. Users often then end up relying on expensive linker
fixups (i.e. -Wl,-bigtoc) to work around the issue when they would have
been better served by moving to the larger code model. Our analysis and
benchmarking leads us to believe this's generally a net benefit to
users.
(Assisted by AI)
[ADT] Remove unused DenseMapInfo::getTombstoneKey (#200959)
#200595 changed DenseMap to no longer create tombstone buckets, so
DenseMapInfo<T>::getTombstoneKey() is never called. Remove dead
definitions and dead tombstone branches.
Reland [LLVM] Add flags to crash the opt/codegen pipeline (#201146)
Will be used for testing crash reduction.
Reland of #200967. Test needs `REQUIRES: backtrace`.
[AMDGPU] Add IGLP mutations to CoexecSched (#200981)
Adds IGLP mutations support to CoexecSched -- regular handling of this
mutation in GCNSchedStage is implemented in GCNSchedStrategy.cpp
[clang][NFC] Bump the maximum number of Sema diagnostics (#200948)
The number of Sema diagnostics in DiagnosticSemaKinds.td has reached the
5000 limit. This PR increases the max limit to 6000.
[flang][OpenMP] Add structure checks for DECLARE VARIANT (#198799)
This PR adds declare-variant structure checking. Following checks are
added:
- Validate [base:]variant arguments (including implicit base for
single-name form).
- Require exactly one MATCH clause; reject a second MATCH on the same
directive.
- Reject duplicate (base, variant) across multiple declare variant
directives.
- Reject clauses not allowed on declare variant.
- Apply shared context-selector checks to MATCH (reuse metadirective
logic).
- Require constant user conditions in MATCH for declare variant (dynamic
selectors deferred).
Refactor metadirective support:
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[PseudoProbe] Preserve pseudoprobe for tailcall pseudo instrs (#197246)
Preserve probes for tail call pseudo instructions.
On AArch64, X86, and other platforms, the lowering of tail calls
requires a pseudo instruction like `TCRETURNdi`. It is often the case
that `TCRETURNdi` is within its own MBB, and the direct call probe
associated with that tail call is considered dangling and removed. This
patch tries to preserve that.
[CI] install packaging before running lldb tests on Windows (#201112)
https://ci-external.swift.org/job/lldb-windows/job/main/ is failing
because lldb API tests require the `packaging` module.
This patch installs it before running the `check-lldb` target.
[AMDGPU] Fix LowerDIVREM24 lowering for the unsigned case
The code was not properly checking that the operands were
24-bit integers for the unsigned case.
[llvm][RISCV][MC] Fix arithmetic error in pseudo parsing (#200217)
When arithmetic was used in RISCV pseudo instructions, like lla, the
custom parsing breaks the associativity of the operators by parsing the
entire remainder of an expression. This would lead to scenarios where we
would parse `top - 0x100 -0x10` as `top - (0x100 -0x10)` and yield the
wrong offset (`0xF0`(wrong) vs. `0x110`(correct)).
Instead, don't advance the parser and just examine the token to
determine if it's an identifier and if we should handle this case or
bail out. In cases we do handle, just use `parseExpression()`, which
will handle this correctly.
[LifetimeSafety] Refactor buildOriginFlowChain to use PImpl pattern (#201071)
Move `buildOriginFlowChain` into `AnalysisImpl`, removing `FactManager`
parameter
[OFFLOAD][L0] Move dataFence logic to L0Queue (#201046)
The dataFence device operation logic was still on L0Device. With this all the operations working on command lists have their logic consolidated in L0Queue.
[VectorUtils] Replace maskIsAll{Zero,One}OrUndef with PatternMatch (#200040)
As part of the ongoing effort to deprecate UndefValue, and also to take
better advantage of pattern matching, eliminate the VectorUtils
functions `maskIsAllZeroOrUndef`/`maskIsAllOneOrUndef` and replace them
with new matchers `m_ZeroOrPoison` and `m_AllOnesOrPoison`.
The new matchers are simply `m_CombineOr` on `m_Zero`/`m_AllOnes` and
`m_Poison`. `m_Zero` and `m_AllOnes` already match vectors where some
(but not all) elements are poison, so these matchers were created to
also match the case where all elements are poison.
This affects InstCombine/InstSimplify with a mask containing `undef` for
the intrinsics `llvm.masked.load`, `llvm.masked.store`,
`llvm.masked.gather`, and `llvm.masked.scatter`.
Some relevant tests were altered to use poison instead of undef, and
test coverage for masked loads/stores with poison was increased.
[AMDGPU] RewriteMFMAFormStage: fix SpillCost early-return missing reset (#199708)
Extract resetRewriteCandsToVGPR() to consolidate the logic that restores
MFMA candidates from AGPR form back to VGPR form after cost analysis.
getRewriteCost() returned early when SpillCost > 0 without resetting the
AGPR-form register classes set by initHeuristics(), leaving MRI in a
corrupted state. Call resetRewriteCandsToVGPR() on both the early-return
path and the normal exit path to fix this.
Also change getRewriteCost() and rewrite() to take ArrayRef instead of
const std::vector& for cleaner API.
---------
Co-authored-by: Claude Sonnet 4 (1M context) <noreply at anthropic.com>
[X86] Merge BT with a matching BTR/BTS/BTC (#193612)
Fixes #165291.
BTR/BTS/BTC set CF from the pre-operation bit value, so a subsequent BT
on the same source and bit index produces the same CF and is redundant.
We were emitting both.
```ll
define i1 @btr_eq_i32(ptr %word, i32 %position) nounwind {
%ofs = and i32 %position, 31
%bit = shl nuw i32 1, %ofs
%mask = xor i32 %bit, -1
%ld = load i32, ptr %word
%test = and i32 %ld, %bit
%res = and i32 %ld, %mask
%cmp = icmp eq i32 %test, 0
store i32 %res, ptr %word
ret i1 %cmp
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[SPIR-V] Select int-to-int convert opcode from source signedness (#201116)
OpSConvert/OpUConvert sext/zext is determined by the source operand, not
the destination type. Discovered in
https://github.com/llvm/llvm-project/pull/200791/changes#r3341230426
Fix a regression caused by #200791
