LLVM/project 7cb1fc5 — llvm/test/CodeGen/SPIRV fembed-bitcode.ll

by Juan Manuel Martinez Caamaño via GitHub on ⎇
Add missing . to comment and embeded->embedded

Thanks !

Co-authored-by: Marcos Maronas <marcos.maronas at intel.com>
DeltaFile
+1-1llvm/test/CodeGen/SPIRV/fembed-bitcode.ll
+1-11 files

LLVM/project 4d9159a — llvm/test/CodeGen/SPIRV fembed-bitcode-marker.ll

by Juan Manuel Martinez Caamaño via GitHub on ⎇
Add missing . to comment

Co-authored-by: Marcos Maronas <marcos.maronas at intel.com>
DeltaFile
+1-1llvm/test/CodeGen/SPIRV/fembed-bitcode-marker.ll
+1-11 files

LLVM/project 68a4af6 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/RISCV divrem.ll

by Mel Chen via GitHub on ⎇
[LV][EVL] Replace VPInstruction::Select with vp.merge for predicated div/rem (#154072)

Since div/rem operations don’t support a mask operand, the lanes of the
divisor that are masked out are currently replaced with 1 using
VPInstruction::Select before the predicated div/rem operation.
This patch replaces
```
  VPInstruction::Select(logical_and(header_mask, conditional_mask), LHS, RHS)
```
with
```
  vp.merge(conditional_mask, LHS, RHS, EVL)
```
so that the header mask can be replaced by EVL in this usage scenario
when tail folding with EVL.
DeltaFile
+3-18llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+6-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-182 files

LLVM/project 9be980c — mlir/lib/Target/Cpp TranslateToCpp.cpp

by Gil Rapaport via GitHub on ⎇
[mlir][emitc] Unify API for deferred emission (#167532)

This patch adds `printOperation()` functions for deferred emission ops
in order to unify the API used for emitting operations.
No functional change intended.
DeltaFile
+59-30mlir/lib/Target/Cpp/TranslateToCpp.cpp
+59-301 files

LLVM/project 8742747 — clang/include/clang/Basic BuiltinsAMDGPU.def, clang/test/SemaOpenCL builtins-extended-image-param-gfx1100-err.cl builtins-extended-image-param-gfx942-err.cl

by ranapratap55 on ⎇
[AMDGPU] Modifies builtin def to take _Float16('x') for both HIP/C++ and for OpenCL
DeltaFile
+17-17clang/include/clang/Basic/BuiltinsAMDGPU.def
+1-1clang/test/SemaOpenCL/builtins-extended-image-param-gfx1100-err.cl
+1-1clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
+19-193 files

LLVM/project da9015a — clang-tools-extra/clang-tidy/google AvoidCStyleCastsCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

by Christian Kandeler via GitHub on ⎇
[clang-tidy] Provide fix-its for downcasts in google-readability-casting (#165411)
DeltaFile
+4-2clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
+6-0clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
+4-0clang-tools-extra/docs/ReleaseNotes.rst
+14-23 files

LLVM/project 9dfd14a — .github/workflows release-binaries.yml

by Tom Stellard via GitHub on ⎇
workflows/release-binaries: Drop use of setup-windows action (#167440)

We don't actually support Windows builds at this time, so this is not
needed. I plan to add a different implementation once the
release-binaries workflow supports Windows again.
DeltaFile
+0-6.github/workflows/release-binaries.yml
+0-61 files

LLVM/project b1eb7fa — llvm/lib/Target/PowerPC/MCTargetDesc PPCMCTargetDesc.h PPCInstPrinter.cpp

by Craig Topper via GitHub on ⎇
[PowerPC] Use MCRegister instead of unsigned. NFC (#167602)

I'm considering a operator>(MCRegister, unsigned) and
operator<(MCRegister, unsigned) so I have not updated those lines. Such
comparisons are common on MCRegister.
DeltaFile
+2-2llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
+2-2llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
+1-1llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
+5-53 files

LLVM/project 124bfdf — libc/src/__support str_to_integer.h wctype_utils.h, libc/src/wctype iswalpha.cpp

by Alexey Samsonov via GitHub on ⎇
[libc] Use function overloads to make string parsing code more generic. (#167417)

ctype_utils/wctype_utils were chaged in
120689e46679c6db37cd9e839ec0721e80a22d4f and
e7f7973899f76773ae6e9a6b1e8c7e9f9cc5cb56, respectively to operate on
char/wchar_t. Now we can switch to the overloaded names (e.g. have noth
`isspace(char` and `isspace(wchar_t)`) to simplify the templatized
strtointeger implementation from
315dfe5865962d8a3d60e21d1fffce5214fe54ef and make it easier to
potentially add templatized strtofloat implementation.
DeltaFile
+15-43libc/src/__support/str_to_integer.h
+17-10libc/src/__support/wctype_utils.h
+7-0libc/src/__support/ctype_utils.h
+1-1libc/src/wctype/iswalpha.cpp
+40-544 files

LLVM/project 81bdf89 — clang/test/Sema/AArch64 arm_sve_feature_dependent_sve___sme.c, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

by Amir Ayupov on ⎇
added test

Created using spr 1.3.4
DeltaFile
+35,814-29,261llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+19,255-3,889llvm/test/CodeGen/RISCV/atomic-rmw.ll
+10,669-9,023llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+19,470-0clang/test/Sema/AArch64/arm_sve_feature_dependent_sve___sme.c
+10,289-0llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
+10,287-0llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-sve-instructions.s
+105,784-42,17313,937 files not shown
+1,172,725-311,87113,943 files

LLVM/project 8d065ad — clang/test/Sema/AArch64 arm_sve_feature_dependent_sve___sme.c, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

by Amir Ayupov on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+35,814-29,261llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+19,255-3,889llvm/test/CodeGen/RISCV/atomic-rmw.ll
+10,669-9,023llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+19,470-0clang/test/Sema/AArch64/arm_sve_feature_dependent_sve___sme.c
+10,289-0llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-sve-instructions.s
+10,287-0llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-sve-instructions.s
+105,784-42,17313,933 files not shown
+1,169,683-311,86113,939 files

LLVM/project d04d291 — llvm/lib/Target/RISCV/AsmParser RISCVAsmParser.cpp, llvm/lib/Target/RISCV/MCTargetDesc RISCVMCCodeEmitter.cpp RISCVBaseInfo.h

by Craig Topper via GitHub on ⎇
[RISCV] Remove implicit conversions of MCRegister to unsigned. NFC (#167588)

Rename RegNum to Reg.
DeltaFile
+23-27llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+1-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+1-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+25-293 files

LLVM/project bb37959 — mlir/lib/Conversion/ArithToAPFloat ArithToAPFloat.cpp

by makslevental on ⎇
move operation out of ArithToAPFloatConversionPass to try to fix LinkageInfo clang::LinkageComputer fail
DeltaFile
+29-27mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+29-271 files

LLVM/project ae2b303 — clang/lib/Serialization ASTReader.cpp ASTWriter.cpp, clang/test/Modules pr166068.cppm

by Chuanqi Xu via GitHub on ⎇
[C++20] [Modules] Don't import initializer/pending implicit instantiations from other named module (#167468)

Close https://github.com/llvm/llvm-project/issues/166068

The cause of the problem is that we would import initializers and
pending implicit instantiations from other named module. This is very
bad and it may waste a lot of time.

And we didn't observe it as the weak symbols can live together and the
strong symbols would be removed by other mechanism. So we didn't observe
the bad behavior for a long time. But it indeeds waste compilation time.
DeltaFile
+38-0clang/test/Modules/pr166068.cppm
+15-8clang/lib/Serialization/ASTReader.cpp
+12-10clang/lib/Serialization/ASTWriter.cpp
+65-183 files

LLVM/project a7ceeff — orc-rt/include/orc-rt Session.h

by Lang Hames via GitHub on ⎇
[orc-rt] Make Session explicitly immovable. (#167640)

NFCI -- the deleted copy constructor already made this immovable. The
explicit operations just make clear that this was intentional.
DeltaFile
+2-0orc-rt/include/orc-rt/Session.h
+2-01 files

LLVM/project c1cce45 — clang/test/Driver hip-temps-linux.hip hip-temps-windows.hip

by Matt Arsenault on ⎇
UNSUPPORTED: system-windows for now
DeltaFile
+1-0clang/test/Driver/hip-temps-linux.hip
+1-0clang/test/Driver/hip-temps-windows.hip
+2-02 files

LLVM/project f893f72 — clang/test/Driver hip-temps-linux.hip hip-temps-windows.hip

by Matt Arsenault on ⎇
Revert "try unquoting and repeat env"

This reverts commit 9aa8b8e20f9b0912b10194d5aae89c42e4437fae.
DeltaFile
+1-1clang/test/Driver/hip-temps-linux.hip
+1-1clang/test/Driver/hip-temps-windows.hip
+2-22 files

LLVM/project 7641ed2 — clang/test/Driver hip-temps-linux.hip hip-temps-windows.hip

by Matt Arsenault on ⎇
Revert "try not using \ to break long run lines"

This reverts commit ac138ba8e5a9861e7dda74ee102575f1c5cfeb3b.
DeltaFile
+4-1clang/test/Driver/hip-temps-linux.hip
+4-1clang/test/Driver/hip-temps-windows.hip
+8-22 files

LLVM/project 7d9b7e8 — llvm/test/CodeGen/PowerPC llvm.sincospi.ppcfp128.ll

by Matt Arsenault via GitHub on ⎇
PPC: Mark xfailed sincospi test as unsupported with EXPENSIVE_CHECKS (#167639)
DeltaFile
+1-0llvm/test/CodeGen/PowerPC/llvm.sincospi.ppcfp128.ll
+1-01 files

LLVM/project a664cad — llvm/lib/CodeGen WasmEHPrepare.cpp

by Matt Arsenault via GitHub on ⎇
Wasm: Fix hardcoding _Unwind_CallPersonality function name (#167612)
DeltaFile
+7-1llvm/lib/CodeGen/WasmEHPrepare.cpp
+7-11 files

LLVM/project f4ee03f — llvm/lib/CodeGen/AsmPrinter CodeViewDebug.cpp CodeViewDebug.h

by Matt Arsenault on ⎇
Store TheCU
DeltaFile
+6-11llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
+2-0llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.h
+8-112 files

LLVM/project ce32b73 — orc-rt/include/orc-rt Session.h

by Lang Hames via GitHub on ⎇
Orc rt session wrap unwrap (#167635)
DeltaFile
+10-0orc-rt/include/orc-rt/Session.h
+10-01 files

LLVM/project ce7449e — llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp AMDGPULowerExecSync.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline.ll

by skc7 on ⎇
Update description of pass
DeltaFile
+5-5llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+4-4llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+2-2llvm/lib/Target/AMDGPU/AMDGPULowerExecSync.cpp
+11-113 files

LLVM/project ac138ba — clang/test/Driver hip-temps-linux.hip hip-temps-windows.hip

by Matt Arsenault on ⎇
try not using \ to break long run lines
DeltaFile
+1-4clang/test/Driver/hip-temps-linux.hip
+1-4clang/test/Driver/hip-temps-windows.hip
+2-82 files

LLVM/project f7bca05 — llvm/lib/Target/AMDGPU AMDGPULowerModuleLDSPass.cpp

by skc7 on ⎇
[AMDGPU] Remove lowering named-barrier LDS logci from amdgpu-lower-module-lds
DeltaFile
+0-126llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+0-1261 files

LLVM/project e140a57 — llvm/test/CodeGen/PowerPC llvm.sincospi.ppcfp128.ll

by Matt Arsenault on ⎇
PPC: Mark xfailed sincospi test as unsupported with EXPENSIVE_CHECKS
DeltaFile
+1-0llvm/test/CodeGen/PowerPC/llvm.sincospi.ppcfp128.ll
+1-01 files

LLVM/project 4f23b5c — llvm/lib/Target/AMDGPU AMDGPULowerModuleLDSPass.cpp AMDGPUSwLowerLDS.cpp

by skc7 on ⎇
remove changes from prior LDS lowerin passes
DeltaFile
+126-0llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+2-2llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+128-22 files

LLVM/project 57d8bea — llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU amdgpu-lower-exec-sync-and-module-lds.ll amdgpu-lower-special-lds-and-module-lds.ll

by skc7 on ⎇
update names
DeltaFile
+122-0llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll
+0-122llvm/test/CodeGen/AMDGPU/amdgpu-lower-special-lds-and-module-lds.ll
+73-0llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll
+0-73llvm/test/CodeGen/AMDGPU/amdgpu-lower-special-lds-and-sw-lds.ll
+9-9llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+5-5llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+209-2092 files not shown
+213-2138 files

LLVM/project ad3a6a5 — llvm/test/CodeGen/AMDGPU amdgpu-lower-exec-sync.ll

by skc7 on ⎇
Update amdgpu-lower-exec-sync.ll test with llc RUN line
DeltaFile
+1-0llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync.ll
+1-01 files

LLVM/project 6ccff9e — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp, llvm/test/CodeGen/AMDGPU amdgpu-lower-special-lds-and-sw-lds.ll amdgpu-lower-special-lds-and-module-lds.ll

by skc7 on ⎇
Fix tests
DeltaFile
+22-35llvm/test/CodeGen/AMDGPU/amdgpu-lower-special-lds-and-sw-lds.ll
+2-3llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+3-0llvm/test/CodeGen/AMDGPU/amdgpu-lower-special-lds-and-module-lds.ll
+27-383 files