LLVM / project / 35fdf99 / [𝘀𝗽𝗿] changes introduced through rebase

LLVM/project 35fdf99 — .ci generate-buildkite-pipeline-premerge monolithic-linux.sh, .github CODEOWNERS new-prs-labeler.yml

Apr 29, 2024 by Craig Topper via Andrés Villegas on ⎇

users/avillega/main.gsymdwarf-include-end_sequence-debug_line-rows-when-looking-up-addr-ranges

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5

[skip ci]

Delta		File
+3,617	-0	llvm/test/Instrumentation/MemorySanitizer/X86/mmx-intrinsics.ll
+2,473	-0	lldb/docs/resources/lldbgdbremote.md
+0	-2,286	lldb/docs/lldb-gdb-remote.txt
+3	-1,676	llvm/lib/Target/ARM/ARM.td
+4	-1,659	llvm/lib/Target/AArch64/AArch64.td
+737	-915	libcxx/include/__format/escaped_output_table.h
+0	-1,451	llvm/lib/Support/RISCVISAInfo.cpp
+1,035	-0	llvm/lib/TargetParser/RISCVISAInfo.cpp
+513	-513	llvm/test/MC/RISCV/rvv/zvlsseg.s
+976	-0	llvm/lib/Target/AArch64/AArch64Processors.td
+0	-928	llvm/unittests/Support/RISCVISAInfoTest.cpp
+924	-0	llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+921	-0	llvm/test/CodeGen/LoongArch/sextw-removal.ll
+916	-0	llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
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+862	-0	llvm/test/CodeGen/X86/combine-or-shuffle.ll
+857	-0	llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+438	-413	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+847	-0	llvm/test/CodeGen/PowerPC/fminimum-fmaximum.ll
+824	-0	llvm/test/CodeGen/RISCV/rvv/commutable.ll
+753	-0	llvm/lib/Target/ARM/ARMFeatures.td
+752	-0	llvm/lib/Target/AArch64/AArch64Features.td
+741	-0	llvm/test/CodeGen/AArch64/sve2-intrinsics-while-reversed.ll
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+723	-0	clang/test/Sema/constant_builtins_vector.cpp
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+344	-344	llvm/test/Analysis/CostModel/AArch64/sve-intrinsics.ll
+312	-336	llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
+623	-0	mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir
+347	-260	mlir/test/Dialect/OpenMP/ops.mlir
+138	-468	llvm/test/CodeGen/X86/combine-or.ll
+577	-0	llvm/lib/Target/ARM/ARMProcessors.td
+182	-388	llvm/test/CodeGen/X86/cmp.ll
+166	-401	clang/test/ExtractAPI/anonymous_record_no_typedef.c
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+259	-281	llvm/test/TableGen/GlobalISelEmitter.td
+298	-236	clang/lib/AST/Interp/ByteCodeExprGen.cpp
+269	-264	llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
+92	-437	clang/test/ExtractAPI/availability.c
+522	-0	clang/test/CodeGenCXX/control-flow-in-stmt-expr.cpp
+501	-0	llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
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+473	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg8e16ff.c
+456	-0	mlir/test/Examples/NVGPU/tools/nvdsl.py
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+0	-451	lldb/docs/lldb-platform-packets.txt
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+434	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg4e16ff.c
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+419	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg2e16ff.c
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+405	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg7e16ff.c
+401	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vlseg6e16ff.c
+393	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg4e16ff.c
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+196	-196	llvm/test/Analysis/CostModel/RISCV/splice.ll
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+0	-352	flang/test/Lower/OpenMP/FIR/copyin.f90
+346	-1	mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
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+341	-0	llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
+340	-0	llvm/lib/Target/ARM/ARMArchitectures.td
+159	-174	clang/test/Driver/fast-math.c
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+333	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/non-overloaded/bfloat16/vlseg5e16ff.c
+333	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/non-policy/overloaded/bfloat16/vget.c
+325	-0	llvm/test/Transforms/InstCombine/icmp-of-trunc-ext.ll
+323	-0	mlir/test/Examples/NVGPU/Ch4.py
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+321	-0	mlir/test/Examples/NVGPU/Ch5.py
+314	-0	llvm/include/llvm/BinaryFormat/Dwarf.h
+156	-154	flang/lib/Optimizer/Dialect/FIROps.cpp
+306	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vloxseg2ei16.c
+306	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/policy/overloaded/bfloat16/vluxseg2ei16.c
+305	-0	clang-tools-extra/test/clang-tidy/checkers/modernize/min-max-use-initializer-list.cpp
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+295	-7	llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
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+150	-150	llvm/test/MC/AArch64/SME2p1/fmla.s
+146	-153	llvm/lib/Target/X86/X86ISelLowering.cpp
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+281	-15	mlir/include/mlir/Dialect/Polynomial/IR/Polynomial.td
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+271	-0	clang-tools-extra/clang-tidy/modernize/MinMaxUseInitializerListCheck.cpp
+269	-0	clang/include/clang/AST/Expr.h
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