LLVM/project 178dd48 — llvm/lib/Target/AMDGPU AMDGPUCallingConv.td, llvm/test/CodeGen/AMDGPU global_atomics_scan_fadd.ll global_atomics_scan_fsub.ll

by Shilei Tian on ⎇
[AMDGPU] Change SGPR layout to striped caller/callee saved

This PR updates the SGPR layout to a striped caller/callee-saved design, similar
to the VGPR layout. The stripe width is set to 8.

Fixes #113782.
DeltaFile
+1,830-1,830llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+1,830-1,830llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,554-1,554llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+1,554-1,554llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+1,256-1,256llvm/test/CodeGen/AMDGPU/call-argument-types.ll
+788-1,549llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
+672-1,568llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+416-1,095llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
+492-748llvm/test/CodeGen/AMDGPU/indirect-call.ll
+68-774llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
+223-223llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
+136-291llvm/test/CodeGen/AMDGPU/bf16.ll
+202-200llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
+132-264llvm/test/CodeGen/AMDGPU/spill_more_than_wavesize_csr_sgprs.ll
+112-240llvm/test/CodeGen/AMDGPU/vgpr-large-tuple-alloc-error.ll
+189-144llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
+160-160llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
+145-145llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
+80-208llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+120-120llvm/test/CodeGen/AMDGPU/sibling-call.ll
+73-140llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll
+106-106llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
+119-85llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
+107-93llvm/test/CodeGen/AMDGPU/splitkit-copy-bundle.mir
+55-91llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
+64-62llvm/test/CodeGen/AMDGPU/greedy-alloc-fail-sgpr1024-spill.mir
+28-58llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-carry-out.mir
+18-63llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
+18-63llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
+25-51llvm/test/CodeGen/AMDGPU/use_restore_frame_reg.mir
+36-36llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+66-2llvm/test/CodeGen/AMDGPU/gfx-call-non-gfx-func.ll
+32-32llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
+17-39llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr-gfx9.mir
+38-17llvm/test/CodeGen/AMDGPU/snippet-copy-bundle-regression.mir
+26-27llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-mov-b32.mir
+24-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.pops.exiting.wave.id.ll
+6-39llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
+6-39llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
+21-21llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
+11-27llvm/test/CodeGen/AMDGPU/spill-sgpr-to-virtual-vgpr.mir
+18-18llvm/test/CodeGen/AMDGPU/ds_read2.ll
+20-14llvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
+9-21llvm/test/CodeGen/AMDGPU/pei-scavenge-sgpr.mir
+13-13llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
+11-11llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
+11-11llvm/test/CodeGen/AMDGPU/unallocatable-bundle-regression.mir
+7-13llvm/test/CodeGen/AMDGPU/stack-realign.ll
+8-8llvm/test/CodeGen/AMDGPU/sgpr-spill-update-only-slot-indexes.ll
+2-13llvm/test/CodeGen/AMDGPU/select.f16.ll
+6-6llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
+3-8llvm/test/CodeGen/AMDGPU/spill-sgpr-used-for-exec-copy.mir
+4-6llvm/test/CodeGen/AMDGPU/csr-sgpr-spill-live-ins.mir
+5-5llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
+4-4llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll
+5-1llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
+2-2llvm/test/CodeGen/AMDGPU/function-args-inreg.ll
+2-2llvm/test/CodeGen/AMDGPU/call-args-inreg-no-sgpr-for-csrspill-xfail.ll
+1-2llvm/test/CodeGen/MIR/AMDGPU/spill-phys-vgprs.mir
+1-1llvm/test/CodeGen/AMDGPU/issue48473.mir
+12,987-17,02760 files

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