LLVM/project 6086175llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fmul.ll

InstCombine: Consider not-inf/nan context when simplifying fmul

Consider if the result can be nan, or if the inputs cannot
be infinity from the flag when trying to simplify fmul into
copysign.
DeltaFile
+18-12llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fmul.ll
+12-6llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+30-182 files

LLVM/project 25118cemlir/include/mlir/Bindings/Python IRCore.h, mlir/lib/Bindings/Python IRAffine.cpp

[mlir][py] ability to downcast AffineExpr after #172892

AffineExpr is a separate hierarchy of LLVM-style nested classes that doesn't
rely on TypeID and is not extensible. We need the ability to downcast the
Python equivalent of those to a specific subclass that was seemingly lost in
PR #172892. Bring it back by having an explicit cast. We don't really need
user-defined type casters here since AffineExpr is entirely closed and not
typed, unlike values.
DeltaFile
+26-4mlir/lib/Bindings/Python/IRAffine.cpp
+11-0mlir/test/python/ir/affine_expr.py
+2-0mlir/include/mlir/Bindings/Python/IRCore.h
+39-43 files

FreeNAS/freenas 5d708e8src/middlewared/middlewared/plugins smb.py

Fix
DeltaFile
+0-3src/middlewared/middlewared/plugins/smb.py
+0-31 files

LLVM/project 5fb4383flang/docs OpenMPSupport.md, flang/test/Lower/OpenMP target-spmd.f90 target.f90

[mlir][OpenMP] Lower device clause for target data/enter/exit/update (#174665)

Extend OpenMP device clause lowering for target data, target enter data,
target exit data, and target update to accept non-constant values.
Previously, only constant device IDs could be lowered to LLVM IR.

Add Flang tests to validate device clause handling and mark the feature
as supported in the OpenMPSupport documentation. New tests cover:
- target teams
- target teams distribute
- target teams distribute parallel do
- target teams distribute parallel do simd
- target data

Tests for target update and target enter/exit were
already present in Flang.
DeltaFile
+210-4mlir/test/Target/LLVMIR/omptarget-device.mlir
+211-0flang/test/Lower/OpenMP/target-spmd.f90
+21-31mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+44-1flang/test/Lower/OpenMP/target.f90
+6-6flang/docs/OpenMPSupport.md
+4-2mlir/test/Target/LLVMIR/omptarget-llvm.mlir
+496-446 files

LLVM/project 8a3039fclang/include/clang/Basic CodeGenOptions.def, clang/include/clang/Options Options.td

[Clang] Add clang driver option -fpartition-static-data-sections  (#124991)

DeltaFile
+16-0clang/test/Driver/fpartition-static-data-sections.c
+16-0clang/lib/Driver/ToolChains/Clang.cpp
+9-0clang/lib/Driver/ToolChains/CommonArgs.cpp
+6-0clang/include/clang/Options/Options.td
+2-0clang/lib/CodeGen/BackendUtil.cpp
+1-0clang/include/clang/Basic/CodeGenOptions.def
+50-06 files

LLVM/project 523ea45llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fmul.ll

InstCombine: Handle fmul by -0 case in SimplifyDemandedFPClass

The fmul visitor handles this case as copysign and fneg.
DeltaFile
+20-2llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+4-2llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fmul.ll
+24-42 files

LLVM/project 94d4e3alibcxx/include semaphore, libcxx/include/__atomic atomic_sync.h

[libc++] Refactor poll_with_backoff (#173184)

This patch gets rid of bool result values which were confusing, and
instead replaces them with enum class values describing the meaning of
each return value.
DeltaFile
+27-8libcxx/include/__thread/poll_with_backoff.h
+7-7libcxx/include/__atomic/atomic_sync.h
+3-2libcxx/include/__thread/timed_backoff_policy.h
+2-1libcxx/include/semaphore
+39-184 files

LLVM/project 4d8ad18flang/lib/Optimizer/Transforms CUFOpConversion.cpp, flang/lib/Optimizer/Transforms/CUDA CUFOpConversion.cpp

Merge branch 'main' into users/arsenm/instcombine/add-baseline-tests-simplifydemandedfpclass-minimum-maximum
DeltaFile
+1,300-0llvm/test/CodeGen/X86/avgceils.ll
+1,196-0llvm/test/CodeGen/X86/scmp.ll
+1,073-3llvm/test/CodeGen/X86/avgceilu.ll
+764-0llvm/test/CodeGen/X86/fast-isel-fcmp.ll
+613-0flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
+0-613flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
+4,946-616489 files not shown
+23,005-9,310495 files

LLVM/project ece7e71flang/lib/Optimizer/Transforms CUFOpConversion.cpp, flang/lib/Optimizer/Transforms/CUDA CUFOpConversion.cpp

Merge branch 'main' into users/arsenm/instcombine/add-baseline-test-simplifydemandedfpclass-log
DeltaFile
+1,300-0llvm/test/CodeGen/X86/avgceils.ll
+1,196-0llvm/test/CodeGen/X86/scmp.ll
+1,073-3llvm/test/CodeGen/X86/avgceilu.ll
+764-0llvm/test/CodeGen/X86/fast-isel-fcmp.ll
+0-613flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
+613-0flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
+4,946-616489 files not shown
+23,005-9,310495 files

FreeBSD/src 9fc7fe6usr.sbin/bhyve/aarch64 bhyverun_machdep.c

bhyve: improve console error reporting on arm64

Currently, on arm64, if bhyve fails to initialize the console,
it falls into assert(), which does not look particularly pretty
for users.

Replace the assert with proper error handling so bhyve prints
a meaningful error message and exits with status code 4 (error).
That matches the behavior on amd64.

Approved by:            markj
Reviewed by:            markj
Differential Revision:  https://reviews.freebsd.org/D54504
DeltaFile
+8-5usr.sbin/bhyve/aarch64/bhyverun_machdep.c
+8-51 files

LLVM/project 8ada2afmlir/include/mlir/Interfaces ControlFlowInterfaces.td ControlFlowInterfaces.h, mlir/lib/Interfaces ControlFlowInterfaces.cpp

[mlir][Interfaces] Simplify and improve errors of `RegionBranchOpInterface` verifier
DeltaFile
+63-106mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+8-4mlir/test/Dialect/SCF/invalid.mlir
+1-1mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+1-1mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+73-1124 files

FreeNAS/freenas 458f871src/middlewared/middlewared/plugins/smb_ util_smbconf.py

NAS-139203 / 26.04 / Disable SMB3 unix extensions by default (#17971)

This commit disables the SMB3 unix extensions by default. They will be
exposed as a configurable option in a future PR.
DeltaFile
+1-0src/middlewared/middlewared/plugins/smb_/util_smbconf.py
+1-01 files

LLVM/project 6e4eba1llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass-fma.ll

ValueTracking: Check if x is undef for fma(x, x, y) analysis
DeltaFile
+42-12llvm/test/Transforms/Attributor/nofpclass-fma.ll
+3-3llvm/test/Transforms/InstCombine/fabs.ll
+3-1llvm/lib/Analysis/ValueTracking.cpp
+48-163 files

OPNSense/core 7390956src/opnsense/mvc/app/controllers/OPNsense/Firewall MigrationController.php, src/opnsense/mvc/app/models/OPNsense/Base/Menu MenuSystem.php

Firewall: Rules:  Migration assistant - add export option and guidance for migrations to the new mvc system.
DeltaFile
+77-0src/opnsense/scripts/filter/list_legacy_rules.php
+54-0src/opnsense/mvc/app/views/OPNsense/Firewall/firewall_migration.volt
+36-0src/opnsense/mvc/app/controllers/OPNsense/Firewall/MigrationController.php
+6-1src/opnsense/mvc/app/models/OPNsense/Base/Menu/MenuSystem.php
+173-14 files

LLVM/project 75ec177llvm/lib/Target/SPIRV SPIRVLegalizeZeroSizeArrays.cpp SPIRVLegalizeZeroSizeArrays.h, llvm/test/CodeGen/SPIRV legalize-zero-size-arrays-insertvalue.ll legalize-zero-size-arrays-alloca.ll

[SPIRV] Add legalization pass for zero-size arrays (#172367)

This adds a legalization pass to convert zero size arrays to legal types
for common cases. It doesn't handle all cases, but if we see real use
cases for other cases, we can add them in the future.

For globals, and their initializers, we generally replace `[0 x T]` with
`ptr`.

For instructions, we either replace `[0 x T]` with `poision`, for
`alloca` we just allocate `T`.

This is motivated by IR generated by the OpenMP front end.

Issue: https://github.com/llvm/llvm-project/issues/170150

---------

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
DeltaFile
+359-0llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.cpp
+29-0llvm/lib/Target/SPIRV/SPIRVLegalizeZeroSizeArrays.h
+19-0llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-insertvalue.ll
+14-0llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-alloca.ll
+13-0llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-extractvalue.ll
+13-0llvm/test/CodeGen/SPIRV/legalize-zero-size-arrays-store.ll
+447-014 files not shown
+547-620 files

NetBSD/src 6rSzPIxlib/libc Makefile.inc

   Build with -std=gnu2x to fix the static_assert without message warning from
   clang.
VersionDeltaFile
1.24+3-1lib/libc/Makefile.inc
+3-11 files

LLVM/project 88788dcclang/lib/CodeGen CGExpr.cpp CGValue.h, clang/test/CodeGenHLSL/BasicFeatures MatrixSingleSubscriptDynamicSwizzle.hlsl

[HLSL][Matrix] Implement dynamic single subscript swizzle (#173201)

fixes #170777

If we don't use vector type and instead continue to pass on the matrix
type when we enter `EmitExtVectorElementExpr` Then we don't need to
store the row and column length on the LValue.

Using the Matrix type means we can reuse the isMatrixRow() cases in
EmitLoadOfLValue and EmitStoreThroughLValue and not have to support a
new lValue that is a hybrid between the ExtVectorElt and MatrixRow
cases.

All we need to do to support this is pass the list of column indices as
a `ConstantDataVector` and check the size of this Vector to know how
many column iterations we need to do. Further just index into the vector
to fetch the right encoded element index value.
DeltaFile
+144-2clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptDynamicSwizzle.hlsl
+46-14clang/lib/CodeGen/CGExpr.cpp
+22-12clang/lib/CodeGen/CGValue.h
+4-0clang/test/SemaHLSL/matrix_single_subscript_errors.hlsl
+216-284 files

FreeBSD/src 0a1fbf4. configure pcap-linux.c

Import libpcap 1.10.6
DeltaFile
+361-360configure
+566-102pcap-linux.c
+404-50nametoaddr.c
+225-123pcap-dlpi.c
+245-101gencode.c
+250-0instrument-functions.c
+2,051-73663 files not shown
+3,222-1,40669 files

NetBSD/src jNwdi2tshare/mk sys.mk

   filter out -std=gnu2x from CXXFLAGS
VersionDeltaFile
1.151+2-2share/mk/sys.mk
+2-21 files

LLVM/project 971b823mlir/include/mlir/Dialect/SPIRV/IR SPIRVControlFlowOps.td SPIRVStructureOps.td

[mlir][spirv][nfc] Escape < and > with ` in description and summary (#174786)

Not escaping < and > was causing the text not to get displayed in the
documentation.
DeltaFile
+6-6mlir/include/mlir/Dialect/SPIRV/IR/SPIRVControlFlowOps.td
+3-3mlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
+2-2mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
+1-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td
+1-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+13-135 files

LLVM/project 57b0d83llvm/lib/Target/DirectX DXILResourceAccess.cpp, llvm/test/CodeGen/DirectX/ResourceAccess load-cbuffer-vectors.ll

[DirectX] Account for GlobalOffset in CurrentIndex calculation for cbuffer loads with GEPs in DXILResourceAccess pass (#174666)

Fixes #174656

---------

Co-authored-by: Alex Sepkowski <alexsepkowski at gmail.com>
DeltaFile
+28-7llvm/test/CodeGen/DirectX/ResourceAccess/load-cbuffer-vectors.ll
+3-4llvm/lib/Target/DirectX/DXILResourceAccess.cpp
+31-112 files

OpenBSD/ports ECtw6Hdnet/wget2 Makefile distinfo, net/wget2/patches patch-lib_fseeko_c

   update to wget2-2.2.1

   there is an ABI break (major shlib bump), but as nothing depends on the
   library in ports, let's just roll with it as suggested by jca.
VersionDeltaFile
1.1.2.1+3-13net/wget2/patches/patch-lib_fseeko_c
1.3.4.1+2-6net/wget2/Makefile
1.2.4.1+2-2net/wget2/distinfo
1.2.4.1+1-0net/wget2/pkg/PLIST
+8-214 files

LLVM/project c6e0e7dclang/lib/Serialization ASTReader.cpp ASTWriter.cpp, clang/unittests/Serialization NamespaceLookupTest.cpp CMakeLists.txt

Revert "[C++20][Modules] Improve namespace look-up performance for modules. (#171769)" (#174783)

This reverts commit 1928c1ea9b57e9c44325d436bc7bb2f4585031f3.

We have at least one repro, but I won't be able to work on this until
next week. Also with Clang 22 cut upcoming, we probably need to revert
for now.
DeltaFile
+0-247clang/unittests/Serialization/NamespaceLookupTest.cpp
+11-47clang/lib/Serialization/ASTReader.cpp
+5-23clang/lib/Serialization/ASTWriter.cpp
+0-1clang/unittests/Serialization/CMakeLists.txt
+16-3184 files

LLVM/project 28de3c1llvm/include/llvm/Support KnownFPClass.h, llvm/lib/Analysis ValueTracking.cpp

InstCombine: Handle fmul in SimplifyDemandedFPClass (#173872)

DeltaFile
+152-44llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fmul.ll
+138-1llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+18-63llvm/lib/Analysis/ValueTracking.cpp
+53-0llvm/lib/Support/KnownFPClass.cpp
+34-3llvm/include/llvm/Support/KnownFPClass.h
+1-2llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+396-1136 files

LLVM/project d34e08clibc/src/__support/wctype/conversion/utils utils.h CMakeLists.txt

[libc][wctype] Upstream common utils header file from PtrHash-cc prototype to LLVM libc
DeltaFile
+212-0libc/src/__support/wctype/conversion/utils/utils.h
+12-0libc/src/__support/wctype/conversion/utils/CMakeLists.txt
+224-02 files

LLVM/project 52f85b0clang-tools-extra/docs/clang-tidy/checks list.rst

[docs] [clang-tidy] add abseil-unchecked-statusor-access to list (#174796)

DeltaFile
+1-0clang-tools-extra/docs/clang-tidy/checks/list.rst
+1-01 files

LLVM/project 8fb7ed7cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb CMakeLists.txt

[cross-project-tests][formatters] Factor out setting the LLDB test options into helper function
DeltaFile
+11-5cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/CMakeLists.txt
+11-51 files

FreeBSD/ports e1232ccwww/freenginx-devel distinfo Makefile.extmod

www/freenginx-devel: update third-party cache_purge module to v2.5.5
DeltaFile
+3-3www/freenginx-devel/distinfo
+1-1www/freenginx-devel/Makefile.extmod
+1-1www/freenginx-devel/Makefile
+5-53 files

LLVM/project 7490901clang/lib/AST/ByteCode InterpBuiltin.cpp

[ByteCode] InterpBuiltin.cpp - consistently use castAs<> if dereferencing the result (#174781)

castAs<> will at least assert the cast is valid while getAs<> will always just return nullptr and then explode
DeltaFile
+3-3clang/lib/AST/ByteCode/InterpBuiltin.cpp
+3-31 files

LLVM/project a23f7efclang-tools-extra/docs ReleaseNotes.rst

[clang-tidy][NFC] Improve readabilty of Release Notes (#174686)

Instead of long text, use bullet points for readability.
DeltaFile
+81-48clang-tools-extra/docs/ReleaseNotes.rst
+81-481 files