[Analysis] Use usub_sat during SCEV expansion in some cases (#216975)
When expanding code in visitAddExpr we can look for the pattern
-C + umax(X, C)
and transform this into
--> usub.sat(X, C)
which simplifies the IR in some tests.
Please see https://github.com/llvm/llvm-project/pull/118195 for the
original instcombine that this PR copies from. It contains the alive
link: https://alive2.llvm.org/ce/z/oSWe5S
[AArch64][GlobalISel] Select integer vector reductions into GPRs (#212976)
Prototyping a new minimal type-based approach to RegBankSelect (#199040)
for compile-time purposes exposed various gaps in instruction selection
when not using the existing RegBankSelect pass. These manifested as new
fallbacks when compiling CTMark and the IR dataset from [1].
Imported patterns require an FPR result. This patch teaches instruction
selection to handle vector reductions with GPR results by using a
temporary FPR and inserting a cross-bank copy.
Assisted-by: codex
[1] https://davemgreen.github.io/gisel.html
[clang][AST] Add ASTContext::hasLayout() (#216541)
Whenever we add a new call to e.g. `ASTContext::getASTRecordLayout()`,
we inevitably cause a problem because that function has quite a few
prerequisites:
```c++
D = D->getDefinition();
assert(D && "Cannot get layout of forward declarations!");
assert(!D->isInvalidDecl() && "Cannot get layout of invalid decl!");
assert(D->isCompleteDefinition() && "Cannot layout type before complete!");
```
Add a function to check whether a record decl can be pased to
`getASTRecordLayout()` and update a few callers.
[ELF] Emit synthetic local in symbol table for non-preemptible IFUNC (#210616)
Currently we create an internal alias of the original symbol and then
rewrite the latter to point to the IPLT entry, which means we lose
symbol table information for the actual resolver. In practice compilers
also emit a normal function symbol for the resolver due to how IFUNCs
are represented in GNU C so that at least shows up, but we shouldn't be
relying on it. By emitting a synthetic local we can keep having a symbol
for the resolver whilst still redirecting references to the IPLT entry.
[NFC][ELF] Remove Symbol's unused copy constructor (#210615)
Now that we are no longer copying symbols via the copy constructor we
can remove it. Given we track symbol pointers in various data structures
it can be dangerous to have multiple objects for the same symbol that
would risk being viewed inconsistently, or even moved and the original
lost, though no such cases exist upstream that I'm aware of.
Copying a symbol entirely is also a weird thing to do, and can be
inefficient, so when copies are being made it's best to be explicit
about the members to copy. This also makes it clearer to understand what
members are relevant, rather than implicitly copying all the members,
most of which aren't relevant in practice.
Whilst the copy/move constructors/assignment operators are currently
implicitly deleted due to the atomic flags member, explicitly delete
them all so they remain deleted in case that ever changes.
[NFC][ELF] Only create alias in handleNonPreemptibleIfunc if needed (#210613)
In the no direct relocations case, the original IFUNC symbol keeps its
value, and so there's no need to create a separate alias; it's only
needed when the original symbol is being redirected to the IPLT as a
normal function symbol.
This change also shifts the isInIplt assignment to be explicit and
mirror the allocateAux/pltIdx uses, rather than relying on makeDefined
copying it, and to be clear that this is in fact deliberately and
consistently being copied like them.
A future commit will also change the exact way in which we create this
alias, and will rely on it only existing for the direct relocations
case.
[NFC][ELF] Create fresh alias in handleNonPreemptibleIfunc (#210614)
We don't need to copy the full symbol here, we just want an internal
alias to use for the IPLT and IGOTPLT entries and IRELATIVE relocation's
addend.
tests/frontend: store musl fixture as .binin
musl.bin was committed directly instead of as musl.binin like every
other ELF fixture, so it was missing from out-of-tree builds and the
abi:elfparse / create-parsebin tests failed.
[DAG] Expand vp.*rem and vp.cttz.elts with non-vp nodes.
Trivial VP SDNodes will be removed in an upcoming patch. The division is still predicated so we avoid UB.
[DAG] Remove trivial VP SDNodes. NFC
This removes the codegen parts of the trivial VP intrinsics. It's quite far reaching, but the general categories of code removed are:
- Removing definitions from VPIntrinsics.def
- Legalization and expansion code
- MatchContext used to match over both VP and non-VP nodes
- Some dead DAGCombines and folds in SelectionDAGBuilder
There are still more things to be cleaned up after this, e.g. removing more of the VPIntrinsic class hierarchy, removing ExpandVectorPredication/moving expansion into other places, removing MatchContext from SDPatternMatch
[IR] Remove VPIntrinsic::getFor{Opcode,Intrinsic}. NFC
These convert from non-VP to VP opcodes, which is only used by
LoopUtils for creating predicated reductions. This inlines it to make
removing the intrinsics easier in an upcoming patch.
[VectorCombine] Remove scalarizeVPIntrinsic
After #212490 all bin op VP intrinsics are upgraded to non-VP intrinsics, so this is now dead.
The one exception is div/rem VP intrinsics which aren't upgraded, but the loop vectorizer will never emit a VP div/rem of this form if the operands are scalar, and will emit a scalar replication instead.
[IR] Remove trivial VP intrinsics. NFC
Trivial VP intrinsics are now all autoupgraded to their non-VP counterparts, so the intrinsics themselves are dead.
This removes the intrinsics and their corresponding LangRef definitions, as well as the VPIntrinsic subclasses and some methods in ExpandVectorPredication which are now dead. Removing the SDNodes is deferred to a separate patch.
[AMDGPU] Fix matchPERM infinite loop on sub-dword vector sources (#217813)
getDWordFromOffset rebuilt these as a BUILD_VECTOR, which legalization
turns back into the same OR pattern matchPERM matched, so DAGCombine
looped forever
Bitcast to a dword vector and extract instead
[CodeGen] Fix crash matching a negated implicit complex multiply (#217650)
identifyNodeWithImplicitAdd used Op after checking I0 with isNeg(),
which does not populate Op. When no earlier matcher initialized Op,
subsequent matching could dereference an invalid Value pointer and crash
the compiler.
[flang] Do not branch to a FORMAT statement from an assigned GO TO
Label analysis already classifies which labeled statements may be named by
a statement that branches. Record the positions of those statements in the
semantics context and consult it when lowering records the targets of an
assigned GO TO, so that a FORMAT statement is not given a target block.
A GO TO whose variable holds only a format label now reaches the run-time
error instead of branching into the FORMAT statement.
The label analysis is built once and shared: AnalyzeLabels() runs the
constraint checks first and records the branch targets only if they pass,
since a program with fatal errors is not lowered.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[flang] Record the position of a labeled program-unit END statement
The END statement of a program unit is visited in advance, before the
statement visitor has moved its current position onto it, so the position
recorded for a label on that statement was whatever statement came last --
a null source position for the first program unit in a file, and the
preceding unit's position for the others. Pass the statement position to
AddTargetLabelDefinition explicitly instead of reading it from the visitor.
A diagnostic anchored on such a label had no location to report:
subroutine s(j)
integer :: j
write(*,fmt=40)
go to j
40 end subroutine
before:
[11 lines not shown]
[MLIR][LLVM] Preserve unknown function metadata on import (#203022)
Import representable non-debug function metadata without a kind-specific
dialect conversion into `LLVMFuncOp` `function_metadata`. Preserve
repeated metadata kinds through the generic carrier so LLVM IR import
and export can round-trip the supported generic metadata subset.
Warn and drop attachments outside that subset while continuing to import
the function.
[AArch64][GlobalISel] Select unmerging s128 FPR value into two s64 GPR values (#215995)
RegBankSelect treats s128s like vectors when unmerging and assigns the
s64 results to FPR. Prototyping an alternative type-based RBS (#199040)
that assigns 64-bit scalar values to GPR exposed a gap in the
instruction selector.
Select the two s64 results directly with UMOVvi64.
Assisted-by: codex
