LLVM/project 16c0893llvm/test/CodeGen/AMDGPU half.ll fcopysign.f16.ll

[AMDGPU][True16] remove pack32 pattern from true16 mode (#171756)

Remove pack32 so that isel use reg_sequence in true16 mode for
build_vector. This generates better code
DeltaFile
+46-67llvm/test/CodeGen/AMDGPU/half.ll
+34-50llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
+28-44llvm/test/CodeGen/AMDGPU/llvm.frexp.ll
+28-42llvm/test/CodeGen/AMDGPU/fmul-to-ldexp.ll
+28-40llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
+28-36llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
+192-27935 files not shown
+383-71641 files

FreeNAS/freenas eb9f31dsrc/middlewared/middlewared/common/attachment __init__.py

Add type hints
DeltaFile
+1-1src/middlewared/middlewared/common/attachment/__init__.py
+1-11 files

NetBSD/pkgsrc rPSLpvIdevel/lazygit distinfo go-modules.mk

   lazygit: updated to 0.57.0

   0.57.0

   Enhancements

   Open pull requests in browser with extra leading slashes removed
   Allow using SelectedSubmodule in CustomCommands
   Don't allow empty input in most prompts
   Suppress output from background fetch (unless there were errors)
   feat: add fork remote command
   Trigger immediate background fetch when switching repos

   Fixes

   Keep cursor at top/bottom when navigating by page
   Switch to branches view when checking out a commit
   Fix deleting a remote tag when a remote branch with the same name exists, or vice versa
   Show fixup base commits in correct order in ctrl-f error message

    [25 lines not shown]
VersionDeltaFile
1.16+40-52devel/lazygit/distinfo
1.12+12-16devel/lazygit/go-modules.mk
1.62+10-11devel/lazygit/Makefile
+62-793 files

LLVM/project 7f248a6llvm/lib/Target/X86 X86ISelLowering.cpp X86ISelLowering.h, llvm/test/CodeGen/X86 ptest.ll

[X86] mayFoldIntoVector - relax load alignment requirements (#171830)

If we're trying to move big integers to vector types, relax the SSE alignment requirements - unlike regular uses of mayFoldLoad, we're not testing to confirm every load will fold into a vector op, just that it can move to the FPU.

Fixes #144861
DeltaFile
+122-68llvm/test/CodeGen/X86/ptest.ll
+6-4llvm/lib/Target/X86/X86ISelLowering.cpp
+2-1llvm/lib/Target/X86/X86ISelLowering.h
+130-733 files

LLVM/project e348eb9flang/include/flang/Parser openmp-utils.h, flang/lib/Parser openmp-utils.cpp

Define postfix --/++
DeltaFile
+14-0flang/lib/Parser/openmp-utils.cpp
+2-2flang/include/flang/Parser/openmp-utils.h
+16-22 files

LLVM/project 8e08295flang/include/flang/Parser openmp-utils.h

Declare explicit instantiations
DeltaFile
+3-0flang/include/flang/Parser/openmp-utils.h
+3-01 files

LLVM/project 496a450llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-rsq.ll

ValueTracking: Handle amdgcn.rsq intrinsic in computeKnownFPClass

We have other target intrinsics already in ValueTracking functions,
and no access to TTI.
DeltaFile
+42-42llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-rsq.ll
+31-0llvm/lib/Analysis/ValueTracking.cpp
+73-422 files

LLVM/project aa828ccllvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-rsq.ll

ValueTracking: Add baseline test for fpclass handling of amdgcn.rsq
DeltaFile
+220-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-rsq.ll
+220-01 files

LLVM/project 85fafd5llvm/include/llvm/Transforms/Utils ScalarEvolutionExpander.h, llvm/lib/CodeGen HardwareLoops.cpp

[SCEVExp] Get DL from SE, strip constructor arg (NFC) (#171823)

DeltaFile
+15-25llvm/lib/CodeGen/HardwareLoops.cpp
+15-15llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
+6-6llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
+6-6polly/lib/Support/ScopHelper.cpp
+5-5llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+4-5llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
+51-6219 files not shown
+78-10725 files

LLVM/project 8689282llvm/lib/Target/AMDGPU SIInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU insert_vector_dynelt.ll extract_vector_dynelt.ll

Reapply "[AMDGPU][SDAG] Add missing cases for SI_INDIRECT_SRC/DST (#170323)"

This reverts commit 4f94941dc101b5d45b53c3efe361cd7b4b916517.
DeltaFile
+5,963-0llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
+3,310-0llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+9,297-04 files

FreeBSD/ports eef56dcgraphics/drm-515-kmod Makefile

graphics/drm-515-kmod: Disable for 16.0-CURRENT

People who still uses this one should migrate to 61 or 66.

Sponsored by:   Beckhoff Automation GmbH & Co. KG
DeltaFile
+2-2graphics/drm-515-kmod/Makefile
+2-21 files

FreeBSD/ports 9e5e0c5graphics/drm-61-kmod distinfo, graphics/drm-66-kmod distinfo Makefile.version

graphics/drm-6{1,6}-kmod: Fix build on current

Update the port to have code dealing with change in BUS_ALLOC_RESOURCE

Sponsored by:   Beckhoff Automation GMbH & Co. KG
DeltaFile
+3-3graphics/nvidia-drm-66-kmod/distinfo
+3-3graphics/drm-61-kmod/distinfo
+3-3graphics/drm-66-kmod/distinfo
+3-3graphics/nvidia-drm-61-kmod/distinfo
+1-1graphics/drm-66-kmod/Makefile.version
+1-1graphics/nvidia-drm-66-kmod/Makefile
+14-144 files not shown
+18-1810 files

LLVM/project c1ef7c7llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU/GlobalISel inst-select-insert-vector-elt.mir inst-select-extract-vector-elt.mir

[AMDGPU] Add missing cases for V_INDIRECT_REG_{READ/WRITE}_GPR_IDX and V/S_INDIRECT_REG_WRITE_MOVREL

A buildbot failure in https://github.com/llvm/llvm-project/pull/170323
when expensive checks were used highlighted that some of these patterns
were missing.

This patch adds V_INDIRECT_REG_{READ/WRITE}_GPR_IDX and
V/S_INDIRECT_REG_WRITE_MOVREL for V6 and V7 vector sizes
DeltaFile
+139-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
+126-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
+24-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+8-0llvm/lib/Target/AMDGPU/SIInstructions.td
+297-04 files

pkgng/pkgng 7e14700external/curl RELEASE-NOTES configure, external/curl/lib socks.c

curl: update to 8.17.0
DeltaFile
+7,096-6,888external/curl/src/tool_hugehelp.c
+987-844external/curl/lib/socks.c
+940-572external/curl/RELEASE-NOTES
+809-582external/curl/configure
+0-1,225external/curl/lib/vssh/wolfssh.c
+671-450external/curl/lib/vtls/openssl.c
+10,503-10,5612,303 files not shown
+51,303-50,4522,309 files

pkgng/pkgng 0701df5external/sqlite sqlite3.c shell.c

sqlite: update to 3.51.1
DeltaFile
+4,361-1,352external/sqlite/sqlite3.c
+1,200-1,331external/sqlite/shell.c
+304-111external/sqlite/sqlite3.h
+5,865-2,7943 files

pkgng/pkgng 1d3cc9alibpkg pkg_ports.c

register: set a sans default value for directory permissions
DeltaFile
+2-1libpkg/pkg_ports.c
+2-11 files

FreeBSD/ports dad29a7x11-themes/plasma6-breeze distinfo, x11/plasma6-plasma-activities distinfo

KDE: Update KDE Plasma to 6.5.4

Announcement: https://kde.org/announcements/plasma/6/6.5.4/
DeltaFile
+3-7x11-themes/plasma6-breeze/distinfo
+7-0x11/plasma6-plasma-workspace/pkg-plist
+3-3x11/plasma6-plasma-workspace/distinfo
+3-3x11/plasma6-plasma-integration/distinfo
+3-3x11/plasma6-plasma-desktop/distinfo
+3-3x11/plasma6-plasma-activities/distinfo
+22-1956 files not shown
+175-16562 files

LLVM/project 36fff3cllvm/test/tools/sancov diff-different-bitness.test union-different-bitness.test, llvm/test/tools/sancov/Inputs dummy-32bits.0.sancov

[Review] Update RawCoverage so it keeps track of their source bitness.

In this way, we can properly warn about possible data loss.
DeltaFile
+39-50llvm/tools/sancov/sancov.cpp
+6-0llvm/test/tools/sancov/diff-different-bitness.test
+6-0llvm/test/tools/sancov/union-different-bitness.test
+0-0llvm/test/tools/sancov/Inputs/dummy-32bits.0.sancov
+51-504 files

LLVM/project 2705ba1offload/libomptarget PluginManager.cpp, offload/libomptarget/OpenMP Mapping.cpp

Address comments
DeltaFile
+2-2offload/libomptarget/PluginManager.cpp
+1-1offload/libomptarget/OpenMP/Mapping.cpp
+3-32 files

FreeNAS/freenas 1a8b9f9src/middlewared/middlewared main.py, src/middlewared/middlewared/plugins/zfs resource_crud.py mount_unmount_impl.py

Type-safe middleware
DeltaFile
+193-8src/middlewared/middlewared/main.py
+161-28src/middlewared/middlewared/plugins/zfs/resource_crud.py
+80-61src/middlewared/middlewared/plugins/zfs/mount_unmount_impl.py
+50-50src/middlewared/middlewared/plugins/zfs/rename_promote_clone_impl.py
+45-38src/middlewared/middlewared/plugins/zfs/destroy_impl.py
+18-21src/middlewared/middlewared/plugins/zfs/load_unload_impl.py
+547-20626 files not shown
+721-34332 files

NetBSD/pkgsrc CiTZnwgdevel/php-libawl Makefile distinfo, devel/php-libawl/patches patch-inc_AWLUtilities.php.in

   Pull upstream fix for issue #29
   <https://gitlab.com/davical-project/awl/-/issues/29>

   Remove patch leftovers

   Pkglint
VersionDeltaFile
1.1+30-0devel/php-libawl/patches/patch-inc_AWLUtilities.php.in
1.22+5-4devel/php-libawl/Makefile
1.20+2-1devel/php-libawl/distinfo
+37-53 files

OpenBSD/src oFjrO4asys/kern sys_process.c, sys/sys ptrace.h

   Extend ptrace(2) PT_GET_THREAD_* to include thread names.
   Use a new define larger then _MAXCOMLEN to avoid that define from
   propagating to ptrace.h. Ensure that pts_name is large enough with
   a compile time assert.

   okay claudio@ jca@
VersionDeltaFile
1.107+5-2sys/kern/sys_process.c
1.17+4-1sys/sys/ptrace.h
+9-32 files

LLVM/project cdce445llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 single_elt_vector_memory_operation.ll

[X86] isLoadBitCastBeneficial - its only beneficial to bitcast between vector types if the new type is legal (#171813)

Prevents us from attempting to store illegal types like <2 x i128> that will force scalarization/splitting

Noticed while trying to avoid some split stores mentioned in #171616
DeltaFile
+7-12llvm/test/CodeGen/X86/single_elt_vector_memory_operation.ll
+6-4llvm/lib/Target/X86/X86ISelLowering.cpp
+13-162 files

LLVM/project a6b9a93llvm/lib/Target/AMDGPU SIInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU insert_vector_dynelt.ll extract_vector_dynelt.ll

Reapply "[AMDGPU][SDAG] Add missing cases for SI_INDIRECT_SRC/DST (#170323)"

This reverts commit 4f94941dc101b5d45b53c3efe361cd7b4b916517.
DeltaFile
+5,963-0llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
+3,310-0llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+9,297-04 files

LLVM/project f582fc6libcxx/test CMakeLists.txt, libcxxabi/test CMakeLists.txt

[libc++] Simplify how we install test-suite dependencies (#171504)

Based on comments in #171474, it was brought to my attention that we can
modernize and simplify how we perform the test suite installation in
libc++ and libc++abi.
DeltaFile
+15-47libcxxabi/test/CMakeLists.txt
+13-47libcxx/test/CMakeLists.txt
+28-942 files

LLVM/project c8d5ae5llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU/GlobalISel inst-select-insert-vector-elt.mir inst-select-extract-vector-elt.mir

[AMDGPU] Add missing cases for V_INDIRECT_REG_{READ/WRITE}_GPR_IDX and V/S_INDIRECT_REG_WRITE_MOVREL

A buildbot failure in https://github.com/llvm/llvm-project/pull/170323
when expensive checks were used highlighted that some of these patterns
were missing.
DeltaFile
+139-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
+126-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
+24-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+305-04 files

LLVM/project e0387b7.github/workflows libcxx-build-and-test.yaml

[libc++][Github] Move back to main runner set (#171771)

This moves us back to the main runner set so that the next runner set
can be used for upgrading again when we want to do that. This also
captures the Github Runner version upgrade.
DeltaFile
+8-8.github/workflows/libcxx-build-and-test.yaml
+8-81 files

LLVM/project a9fadb3libcxx/modules CMakeLists.txt, libcxx/src CMakeLists.txt

[runtimes] Modernize installation targets (#171677)

This patch moves away from using cmake_install scripts to install the
various targets when building runtimes, since those have been deprecated
by CMake. Instead, we use `cmake --install` which is the prefered
method.

This patch also localizes how we set dependencies on the various
installation targets, allowing the removal of a few global variables
that were used as lists.

Finally, it makes the way we set up installation targets for libc++,
libc++abi and libunwind consistent again.
DeltaFile
+31-36libcxx/src/CMakeLists.txt
+33-32libcxxabi/src/CMakeLists.txt
+26-28libunwind/src/CMakeLists.txt
+2-4libcxxabi/include/CMakeLists.txt
+2-4libcxx/modules/CMakeLists.txt
+2-4libunwind/include/CMakeLists.txt
+96-1081 files not shown
+98-1127 files

LLVM/project dd63dffflang/include/flang/Parser parse-tree.h dump-parse-tree.h, flang/lib/Parser unparse.cpp openmp-parsers.cpp

[flang][OpenMP] Parse OpenMP 6.0 syntax of INIT clause (#171702)

This includes `FR(...)` for foreign runtime identifiers and `ATTR(...)`
for extensions. Do not store string runtime ids as character literals in
the AST. Use parser::Expr instead, since lowering would require
evaluate::Expr for these ids, and we get evaluate::Expr from
parser::Expr automatically.

Use OpenMP 6.0 naming for AST nodes (since it's the "current" one).
DeltaFile
+81-136flang/test/Parser/OpenMP/interop-construct.f90
+41-29flang/lib/Parser/unparse.cpp
+32-14flang/include/flang/Parser/parse-tree.h
+16-16flang/lib/Semantics/openmp-modifiers.cpp
+19-12flang/lib/Parser/openmp-parsers.cpp
+3-2flang/include/flang/Parser/dump-parse-tree.h
+192-2092 files not shown
+196-2128 files

NetBSD/src r7VfHURlib/libc/stdlib getopt.3

   getopt(3): be more explicit about :: extension

   Make it possible to search for literal two colons (::) and actually
   find something.  Make the "x"/"x:"/"x::" examples more explicit and
   more visibile.

   PR lib/59828
VersionDeltaFile
1.37+35-16lib/libc/stdlib/getopt.3
+35-161 files