LLVM/project e1c5ea2clang-tools-extra/docs/clang-tidy/checks/cert err33-c.md, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

rebase

Created using spr 1.3.7
DeltaFile
+0-2,733llvm/docs/LangRef.md
+608-81lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+288-208llvm/test/CodeGen/CSKY/atomic-rmw.ll
+407-0llvm/test/Transforms/Reassociate/fma-pairs.ll
+390-0llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
+187-188clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.md
+1,880-3,210367 files not shown
+9,687-7,394373 files

LLVM/project c352f7dclang-tools-extra/docs/clang-tidy/checks/cert err33-c.md, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-2,733llvm/docs/LangRef.md
+608-81lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+288-208llvm/test/CodeGen/CSKY/atomic-rmw.ll
+407-0llvm/test/Transforms/Reassociate/fma-pairs.ll
+390-0llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
+187-188clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.md
+1,880-3,210367 files not shown
+9,687-7,394373 files

LLVM/project 4c76122llvm/lib/Target/M68k M68kTargetMachine.cpp

[M68k] Pass optLevel to InstructionSelect

This makes it the same as every other in-tree target.

Reviewers: arsenm, mshockwave

Pull Request: https://github.com/llvm/llvm-project/pull/217930
DeltaFile
+1-1llvm/lib/Target/M68k/M68kTargetMachine.cpp
+1-11 files

LLVM/project c058dd2clang-tools-extra/docs/clang-tidy/checks/cert err33-c.md, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-2,733llvm/docs/LangRef.md
+608-81lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+288-208llvm/test/CodeGen/CSKY/atomic-rmw.ll
+407-0llvm/test/Transforms/Reassociate/fma-pairs.ll
+390-0llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
+187-188clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.md
+1,880-3,210366 files not shown
+9,585-7,383372 files

LLVM/project b17bf71llvm/lib/Target/AMDGPU SIFoldOperands.cpp, llvm/test/CodeGen/AMDGPU redundant-and.mir

[AMDGPU] Check register class when folding a redundant AND (#217900)

tryFoldRedundantAND accepts an SALU AND as the parent instruction. The
child
AND can be a VALU instruction, so the fold replaced a VGPR with an SGPR
in
every use of the child result. A use that requires a VGPR, for example
data0
of DS_BPERMUTE_B32, then fails the machine verifier. This aborted a
rocPRIM
build for gfx1010.

Call constrainRegClass on the replacement register with the register
class of
the folded register, and fold only when it succeeds. Every use of the
folded
register accepts its register class, so the constrained replacement
register
is legal in those uses, and no walk over the uses is needed.

    [11 lines not shown]
DeltaFile
+91-10llvm/test/CodeGen/AMDGPU/redundant-and.mir
+13-2llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+104-122 files

LLVM/project f75215doffload/languages/kernel/src LanguageRuntime.cpp, offload/test/offloading/CUDA launch_tu.cu basic_launch_multi_arg.cu

add proper deviceSync
DeltaFile
+98-0offload/test/offloading/CUDA/devicesync_streams.cu
+97-0offload/test/offloading/HIP/devicesync_streams.hip
+13-7offload/languages/kernel/src/LanguageRuntime.cpp
+1-1offload/test/offloading/CUDA/launch_tu.cu
+1-1offload/test/offloading/CUDA/basic_launch_multi_arg.cu
+1-1offload/test/offloading/CUDA/basic_launch_blocks_and_threads.cu
+211-107 files not shown
+218-1313 files

LLVM/project fbae994llvm/lib/Target/SPIRV SPIRVTargetMachine.cpp, llvm/test/CodeGen/SPIRV llc-pipeline.ll

[SPIRV] Pass optLevel to InstructionSelect

Canonical with all other targets (minus m68k which I will fix next).
Seems to have been dropped in eab7d3639b3c6dc9dda9a0ab1643f0e45ad2d9d6
accidentally when introducing the InstructionSelect subclass to avoid
the need for RegBankSelect.

Reviewers: Keenuts, arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/217929
DeltaFile
+0-5llvm/test/CodeGen/SPIRV/llc-pipeline.ll
+1-1llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+1-62 files

LLVM/project 290c07aclang-tools-extra/docs/clang-tidy/checks/cert err33-c.md, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-2,733llvm/docs/LangRef.md
+608-81lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+288-208llvm/test/CodeGen/CSKY/atomic-rmw.ll
+407-0llvm/test/Transforms/Reassociate/fma-pairs.ll
+390-0llvm/test/Transforms/SLPVectorizer/X86/horizontal-fadd-with-sub.ll
+187-188clang-tools-extra/docs/clang-tidy/checks/cert/err33-c.md
+1,880-3,210366 files not shown
+9,585-7,383372 files

LLVM/project da24a7ellvm/include/llvm/CodeGen/GlobalISel InstructionSelect.h, llvm/lib/CodeGen/GlobalISel InstructionSelect.cpp

[GISel] Remove SPIRVInstructionSelect

This subclass only existed to remove the need for MFs to have the
RegBankSelected property coming into InstructionSelect. The NewPM plays
much less nicely with pass inheritance, so change this to an option
specified as a parameter in the InstructionSelect constructor to avoid
inheritance so the future NewPM port can have the ~same API for
creation.

The usage of CodeGenOptLevel::Default matches the existing behavior,
although is probably wrong. That should be fixed in a separate patch
though.

Reviewers: arsenm, Keenuts

Pull Request: https://github.com/llvm/llvm-project/pull/217928
DeltaFile
+3-12llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+7-5llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
+4-2llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+14-193 files

LLVM/project f37c1a8clang/test/Preprocessor riscv-target-features.c, llvm/lib/Target/RISCV RISCVInstrInfoSmip.td RISCVFeatures.td

[RISCV][MC] Add experimental Smip, and Ssip support (#215095)

Add support for version 0.20 of the Smip, and Ssip extensions from the
RISC-V fast interrupt specification. Also bump the existing extensions
of ACLIC to 0.20.
DeltaFile
+39-21clang/test/Preprocessor/riscv-target-features.c
+33-0llvm/test/MC/RISCV/smip-ssip-invalid.s
+20-12llvm/test/CodeGen/RISCV/attributes.ll
+18-12llvm/test/MC/RISCV/attribute-arch.s
+21-6llvm/lib/Target/RISCV/RISCVFeatures.td
+21-0llvm/lib/Target/RISCV/RISCVInstrInfoSmip.td
+152-518 files not shown
+211-6514 files

LLVM/project 4d842ccllvm/lib/CodeGen PeepholeOptimizer.cpp, llvm/test/CodeGen/X86 peephole-compare-load-fold-ext.mir

[PeepholeOpt] Erase optimized compare from LocalMIs earlier (#217848)

We need to drop the compare instruction that was optimized away from
LocalMIs before the LocalMIs-based load folding optimization a few lines
below. Addresses a regression from #194662.

Fixes https://github.com/llvm/llvm-project/issues/208746.

---------

Co-authored-by: woruyu <1214539920 at qq.com>
(cherry picked from commit b26a359753175bd5cc53fb0f2a168d12bb0498c8)
DeltaFile
+40-0llvm/test/CodeGen/X86/peephole-compare-load-fold-ext.mir
+1-1llvm/lib/CodeGen/PeepholeOptimizer.cpp
+41-12 files

LLVM/project f9a8c63offload/languages/kernel/include State.h Stream.h, offload/languages/kernel/src State.cpp LanguageRuntime.cpp

add event cleanup
DeltaFile
+85-0offload/languages/kernel/src/Stream.cpp
+39-21offload/languages/kernel/include/LanguageUtils.h
+14-12offload/languages/kernel/src/LanguageRuntime.cpp
+19-0offload/languages/kernel/include/Stream.h
+6-2offload/languages/kernel/src/State.cpp
+2-1offload/languages/kernel/include/State.h
+165-361 files not shown
+166-367 files

LLVM/project 443af67llvm/lib/Target/Mips Mips64InstrInfo.td, llvm/test/CodeGen/Mips madd-msub.ll sll64_64-is-not-a-copy.mir

[MIPS] Don't mark SLL64_64 as isMoveReg (#214060)

I was running into a Rust miscompilation using pretty standard code (see
bugreport). I had Claude rootcause this to an LLVM bug, where SLL (on 64
bit) is marked as "move", even though it isn't - for full 64-bit values
(with arbitrary upper 32 bits), SLL is not a move as the upper bits get
just sign extended.

The fix itself is tiny and makes sense to me (I know MIPS very well, but
have little LLVM expertise myself). The test for this however is pretty
convoluted as it is quite hard to trigger this bug reliably - it needs
quite some register pressure to actually happen.

On the llvm/test/CodeGen/Mips/madd-msub.ll change: Register indices
changed here as the is the register allocator is now picking a new
independent register instead of reusing an existing one (`sll $4, $4, 0`
changes to `sll $1, $4, 0`). In this particular example that causes
instruction counts to be the same, though in other examples a small
increase is possible (cost of correctness).

    [5 lines not shown]
DeltaFile
+134-0llvm/test/CodeGen/Mips/sll64_64-is-not-a-copy.mir
+42-42llvm/test/CodeGen/Mips/madd-msub.ll
+7-6llvm/lib/Target/Mips/Mips64InstrInfo.td
+183-483 files

LLVM/project 5048f1allvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 psadbw.ll shrink_vmul.ll

[X86] isTargetShuffleEquivalent - only use "known zero" element if its known never poison/undef as well (#217030)

We're starting to hit cases where we've used AND/ANDNP masking to zero
out vector elements, but SimplifyDemandedElts assumes the element is
unused, folds to poison and then later folds AND(poison,0) -> poison.

This needs a more thorough cleanup of a number of x86 folds that do this
(similar to #215538), but that would result in a great deal of churn,
and it looks like a #214388 fix requires backporting to 23.x.

So initially I'm taking the approach that @xyyy1420 found so we can get
this backported and I can then address the issue more thoroughly in
trunk. I'm not convinced that this will address all poison cases, but
I'm reluctant to attempt a larger backport patch.

Fixes #214388

(cherry picked from commit 727136090b77a4c6840283758af4bceb8056dcfc)
DeltaFile
+1,014-1,012llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+122-0llvm/test/CodeGen/X86/pr214388.ll
+41-39llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
+4-12llvm/test/CodeGen/X86/psadbw.ll
+13-3llvm/test/CodeGen/X86/shrink_vmul.ll
+6-2llvm/lib/Target/X86/X86ISelLowering.cpp
+1,200-1,0682 files not shown
+1,205-1,0688 files

LLVM/project 7e1e06coffload/languages/kernel/include LanguageUtils.h, offload/languages/kernel/src LanguageRuntime.cpp LanguageLaunch.cpp

add blocking semantics to LaunchKernel and Memcpy
DeltaFile
+131-0offload/test/offloading/CUDA/blocking_stream_semantics.cu
+125-0offload/test/offloading/HIP/blocking_stream_semantics.hip
+47-4offload/languages/kernel/include/LanguageUtils.h
+17-3offload/languages/kernel/src/LanguageLaunch.cpp
+10-5offload/languages/kernel/src/LanguageRuntime.cpp
+4-2offload/test/offloading/CUDA/stream_api.cu
+334-144 files not shown
+343-1810 files

LLVM/project 18daae2llvm/unittests/Support Path.cpp

[Support][test] Fix OpenDirectoryAsFileForRead test on AIX and z/OS (#216241)

Commit 9c7ba7b1d12e ("[AIX][SystemZ][Support] Check if file is dir on
open instead of read") moved the `fstat`/`EISDIR` check from
`readNativeFile()` to `openNativeFileForRead()` on AIX and z/OS. This
means `openNativeFileForRead()` now returns `EISDIR` immediately on
those
platforms, but the test `FileSystemTest.OpenDirectoryAsFileForRead` was
not updated to match, causing it to fail at the
`ASSERT_THAT_EXPECTED(FD, Succeeded())` assertion.

Add a `#elif defined(_AIX) || defined(__MVS__)` branch to the test that
expects the error to be returned from `openNativeFileForRead()` rather
than from `readNativeFile()`, consistent with the behavior introduced by
that commit.

(cherry picked from commit 828d2d7fb65a9cd5946b347ad5173e3bdb21387d)
DeltaFile
+1-1llvm/unittests/Support/Path.cpp
+1-11 files

FreeBSD/ports 2632867devel/py-immutabledict Makefile distinfo

devel/py-immutabledict: Update to 4.3.1
DeltaFile
+3-3devel/py-immutabledict/distinfo
+2-2devel/py-immutabledict/Makefile
+5-52 files

LLVM/project 0abe817llvm/lib/Transforms/IPO LowerTypeTests.cpp ThinLTOBitcodeWriter.cpp, llvm/test/Transforms/LowerTypeTests promoted-internal.ll

[CFI] Create an external linkage alias instead of promoting internals
DeltaFile
+19-32llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
+35-0llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+29-0llvm/test/Transforms/LowerTypeTests/promoted-internal.ll
+10-7llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
+4-2llvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc-internal.ll
+2-3llvm/test/Transforms/ThinLTOBitcodeWriter/cfi-icall-static-inline-asm.ll
+99-442 files not shown
+104-478 files

LLVM/project 56fcde8llvm/lib/Transforms/IPO WholeProgramDevirt.cpp, llvm/test/ThinLTO/X86 devirt-alias-attributes.ll devirt-alias-cross-module.ll

[WPD] Dereference `GlobalAlias` targets
DeltaFile
+84-0llvm/test/ThinLTO/X86/devirt-alias-cross-module-interposable.ll
+78-0llvm/test/ThinLTO/X86/devirt-alias-attributes-interposable.ll
+61-0llvm/test/ThinLTO/X86/devirt-alias-cross-module.ll
+51-0llvm/test/ThinLTO/X86/devirt-alias-attributes.ll
+37-0llvm/test/Transforms/WholeProgramDevirt/uniform-retval-alias.ll
+11-4llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+322-41 files not shown
+327-77 files

FreeBSD/ports e07b20dmath/py-reals Makefile distinfo

math/py-reals: Update to 0.0.6
DeltaFile
+3-3math/py-reals/distinfo
+2-3math/py-reals/Makefile
+5-62 files

Illumos/gate 4cbfa3dusr/src/uts/common/fs/nfs nfs4x_srv.c

18292 nfs assert panic in rw_exit with concurrent lock and open
Reviewed by: Jason King <jason.brian.king+illumos at gmail.com>
Reviewed by: Matt Barden <mbarden at racktopsystems.com>
Reviewed by: Paul Zuchowski <p.zuchowski98 at gmail.com>
Reviewed by: Gordon Ross <gordon.w.ross at gmail.com>
Reviewed by: Roland Mainz <roland.mainz at nrubsig.org>
Approved by: Robert Mustacchi <rm at fingolfin.org>
DeltaFile
+1-1usr/src/uts/common/fs/nfs/nfs4x_srv.c
+1-11 files

NetBSD/src w30K4vbdistrib/sets/lists/tests mi, tests/lib/libarchive Makefile

   libarchive: Install some missing test data files.

   PR lib/60560: libarchive tests are failing
VersionDeltaFile
1.22+9-2tests/lib/libarchive/Makefile
1.1426+7-1distrib/sets/lists/tests/mi
+16-32 files

NetBSD/src H0WZBG1tests/lib/libarchive Makefile

   libarchive: Avoid collision with LIBARCHIVE variable in makefile.

   It was both the path to the .a file for DPADD, and the path to the
   source directory.  Can't be both, and the source directory is purely
   local while the .a file is used in other makefiles, so let's call the
   source directory LIBARCHIVEDIR instead.

   Found while trying to diagnose:

   PR lib/60560: libarchive tests are failing
VersionDeltaFile
1.21+5-5tests/lib/libarchive/Makefile
+5-51 files

NetBSD/src FgZmh0vexternal/bsd/libarchive/dist/libarchive archive_string.c

   libarchive: Patch iconv() use to handle POSIX semantics.

   Previously it assumed nonstandard GNU semantics, causing tests to
   fail on NetBSD:

   /usr/src/external/bsd/libarchive/dist/libarchive/test/test_archive_string_conversion.c:950:
   -1 != r
         -1=-1 (0xffffffffffffffff, 01777777777777777777777)
         r=0 (0x0, 00)
   /usr/src/external/bsd/libarchive/dist/libarchive/test/test_archive_string_conversion.c:951:
   0 != mstr.aes_set & AES_SET_MBS
         0=0 (0x0, 00)
         mstr.aes_set & AES_SET_MBS=1 (0x1, 01)

   Upstream bug report:
   Issue #3413: test_archive_string_conversion_fail_c failure despite
   correct iconv(3)
   https://github.com/libarchive/libarchive/issues/3413


    [6 lines not shown]
VersionDeltaFile
1.2+4,227-206external/bsd/libarchive/dist/libarchive/archive_string.c
+4,227-2061 files

LLVM/project ca3e661offload/languages/include/kernel DefineLanguageNames.inc UndefineLanguageNames.inc, offload/languages/kernel/src LanguageRuntime.cpp

add StreamCreateWithFlags
DeltaFile
+27-0offload/test/offloading/CUDA/stream_api.cu
+26-0offload/test/offloading/HIP/stream_api.hip
+24-0offload/languages/kernel/src/LanguageRuntime.cpp
+10-1offload/languages/include/kernel/LanguageRuntime.h
+3-1offload/languages/include/kernel/UndefineLanguageNames.inc
+3-0offload/languages/include/kernel/DefineLanguageNames.inc
+93-26 files

LLVM/project acee103llvm/lib/ObjCopy/ELF ELFObject.h ELFObject.cpp, llvm/unittests/ObjCopy ObjCopyTest.cpp

[llvm-objcopy] Stream ELF output to regular files

Write ELF output directly to seekable regular files instead of first allocating a buffer for the entire output. Keep buffered output for stdout and other non-seekable streams.

Use separate buffered and file-backed output implementations. Serialize regenerated metadata sequentially, seeking once per output range, and report sticky file errors after writing finishes. Truncate and extend seekable output up front so unwritten layout gaps read as zero without being materialized; explicitly overwrite only removed section contents within copied segments.

On a synthetic stamping-style ELF containing a 1 GiB payload, three warm-cache no-op copies had median peak RSS of 2,102,916 KiB before and 1,053,844 KiB after (49.9% lower). Median wall time improved from 1.06 s to 0.77 s, and the outputs were byte-identical.

Co-authored-by: Jeremy Braun <jtbraun at meta.com>

Assisted-by: OpenAI Codex
DeltaFile
+277-107llvm/lib/ObjCopy/ELF/ELFObject.cpp
+62-0llvm/unittests/ObjCopy/ObjCopyTest.cpp
+34-9llvm/lib/ObjCopy/ELF/ELFObject.h
+373-1163 files

FreeBSD/ports 38d0dfasysutils/freebsd-rustdate Makefile.crates distinfo

sysutils/freebsd-rustdate: fix the build on RISCV

Patch the port to use a newer version of libc, allowing it to work on
RISCV systems without COMPAT11.

PR:             296820
Sponsored by:   ConnectWise
Approved by:    fullermd at over-yonder.net (maintainer timeout)
DeltaFile
+3-3sysutils/freebsd-rustdate/distinfo
+1-1sysutils/freebsd-rustdate/Makefile.crates
+4-42 files

FreeBSD/ports 4a73468net/wireproxy Makefile distinfo

net/wireproxy: Update to 1.1.3
DeltaFile
+5-5net/wireproxy/distinfo
+3-4net/wireproxy/Makefile
+8-92 files

FreeBSD/doc 0354e5dwebsite/content/en/releases/14.5R schedule.adoc

14.5: On schedule

The 14.5-BETA3 builds started on August 21, 2026.

Approved by:re (implicit)
Sponsored by:OpenSats Initiative
DeltaFile
+1-1website/content/en/releases/14.5R/schedule.adoc
+1-11 files

LLVM/project de5e538lld/test/wasm common.s, lld/wasm Symbols.h Writer.cpp

[WebAssembly] Implement support for Common symbols (#199303)

This patch adds end-to-end support for common symbols (`.comm` /
`-fcommon`)
for the WebAssembly target in LLVM and LLD.

1. Object File and binary format:
- Introduce the `WASM_SYMBOL_BINDING_COMMON` (0x40) symbol flag in
`Wasm.h`.
- Update `WasmObjectWriter` and `WasmObjectFile` to serialize and parse
common
     symbol metadata (size and alignment) in the linking symbol table.
   - Update YAML tooling and `llvm-readobj` to handle common symbols.
2. LLD Support:
   - Introduce `CommonSymbol` representing common data symbols.
   - Implement common symbol resolution in `SymbolTable::addCommon`:
- Multiple common symbols are merged by selecting the maximum size and
alignment.
     - Strong defined symbols override common symbols.

    [12 lines not shown]
DeltaFile
+132-0lld/test/wasm/common.s
+57-0lld/wasm/Writer.cpp
+57-0lld/wasm/SymbolTable.cpp
+25-14llvm/lib/Object/WasmObjectFile.cpp
+31-0llvm/test/MC/WebAssembly/common.s
+26-1lld/wasm/Symbols.h
+328-1521 files not shown
+479-5527 files