LLVM/project 8e2f872clang/lib/CodeGen/Targets SPIR.cpp, clang/test/CodeGenOpenCL ptx-calls.cl

rebased

Created using spr 1.3.7
DeltaFile
+40-0llvm/lib/CodeGen/MachineVerifier.cpp
+37-0llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-invalid-lanemask.mir
+28-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+23-3clang/test/CodeGenOpenCL/ptx-calls.cl
+0-21clang/lib/CodeGen/Targets/SPIR.cpp
+16-3llvm/lib/CodeGen/MachineOperand.cpp
+144-2732 files not shown
+346-5138 files

LLVM/project 8e48ac8clang/lib/CodeGen/Targets SPIR.cpp, clang/test/CodeGenOpenCL ptx-calls.cl

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+40-0llvm/lib/CodeGen/MachineVerifier.cpp
+37-0llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-invalid-lanemask.mir
+28-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+23-3clang/test/CodeGenOpenCL/ptx-calls.cl
+0-21clang/lib/CodeGen/Targets/SPIR.cpp
+16-3llvm/lib/CodeGen/MachineOperand.cpp
+144-2732 files not shown
+346-5138 files

LLVM/project a75ce5fclang/lib/CodeGen/Targets SPIR.cpp, clang/test/CodeGenOpenCL ptx-calls.cl

rebased

Created using spr 1.3.7
DeltaFile
+40-0llvm/lib/CodeGen/MachineVerifier.cpp
+37-0llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-invalid-lanemask.mir
+28-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+23-3clang/test/CodeGenOpenCL/ptx-calls.cl
+0-21clang/lib/CodeGen/Targets/SPIR.cpp
+16-3llvm/lib/CodeGen/MachineOperand.cpp
+144-2732 files not shown
+346-5138 files

LLVM/project 8b7a07alldb/source/Plugins/Language/CPlusPlus CPlusPlusNameParser.cpp, lldb/unittests/Language/CPlusPlus CPlusPlusLanguageTest.cpp

[lldb]  Fix abi_tag parsing for operator<< and operator-named tags (#170224)

The parser now correctly handles:
- abi_tags attached to operator<<: `operator<<[abi:SOMETAG]`
- abi_tags with "operator" as the tag name: `func[abi:operator]`
DeltaFile
+6-5lldb/source/Plugins/Language/CPlusPlus/CPlusPlusNameParser.cpp
+6-0lldb/unittests/Language/CPlusPlus/CPlusPlusLanguageTest.cpp
+12-52 files

LLVM/project 4b0a975clang/lib/CodeGen/Targets SPIR.cpp AMDGPU.cpp, clang/lib/Sema SemaType.cpp

[OpenCL][NVPTX] Don't set calling convention for OpenCL kernel (#170170)

Fixes #154772
We previously set `ptx_kernel` for all kernels. But it's incorrect to
add `ptx_kernel` to the stub version of kernel introduced in #115821.
This patch copies the workaround of AMDGPU.
DeltaFile
+23-3clang/test/CodeGenOpenCL/ptx-calls.cl
+0-21clang/lib/CodeGen/Targets/SPIR.cpp
+1-4clang/lib/CodeGen/Targets/AMDGPU.cpp
+3-1clang/lib/Sema/SemaType.cpp
+0-3clang/lib/CodeGen/Targets/NVPTX.cpp
+1-1clang/test/CodeGenOpenCL/reflect.cl
+28-336 files

LLVM/project 49bc3f0llvm/lib/Transforms/Utils LowerMemIntrinsics.cpp, llvm/test/CodeGen/AMDGPU memset-param-combinations.ll memintrinsic-unroll.ll

[LowerMemIntrinsics] Optimize memset lowering

This patch changes the memset lowering to match the optimized memcpy lowering.
The memset lowering now queries TTI.getMemcpyLoopLoweringType for a preferred
memory access type. If that type is larger than a byte, the memset is lowered
into two loops: a main loop that stores a sufficiently wide vector splat of the
SetValue with the preferred memory access type and a residual loop that covers
the remaining bytes individually. If the memset size is statically known, the
residual loop is replaced by a sequence of stores.

This improves memset performance on gfx1030 (AMDGPU) in microbenchmarks by
around 7-20x.

I'm planning similar treatment for memset.pattern as a follow-up PR.

For SWDEV-543208.
DeltaFile
+1,896-0llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
+1,616-0llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+686-90llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
+218-116llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll
+197-7llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
+103-11llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll
+4,716-22411 files not shown
+4,822-30117 files

LLVM/project 6638d59lldb/source/Plugins/UnwindAssembly/InstEmulation UnwindAssemblyInstEmulation.cpp UnwindAssemblyInstEmulation.h

[lldb][NFC] Rename forward_branch_offset to branch_offset in UnwindAssemblyInstEmulation (#169631)

This will reduce the diff in subsequent patches

Part of a sequence of PRs:
[lldb][NFCI] Rewrite UnwindAssemblyInstEmulation in terms of a CFG visit
#169630
[lldb][NFC] Rename forward_branch_offset to branch_offset in
UnwindAssemblyInstEmulation #169631
[lldb] Add DisassemblerLLVMC::IsBarrier API #169632
[lldb] Handle backwards branches in UnwindAssemblyInstEmulation #169633
commit-id:5e758a22
DeltaFile
+9-10lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.cpp
+2-2lldb/source/Plugins/UnwindAssembly/InstEmulation/UnwindAssemblyInstEmulation.h
+11-122 files

LLVM/project c5ecdeclldb/packages/Python/lldbsuite/test/tools/lldb-dap dap_server.py, lldb/tools/lldb-dap DAP.cpp

[lldb-dap] start all sent protocol message from number one. (#170378)

This aligns with the DAP
[specification](https://microsoft.github.io/debug-adapter-protocol//specification.html#Base_Protocol_ProtocolMessage)

Force it to be an error in test cases.
DeltaFile
+5-2lldb/tools/lldb-dap/DAP.cpp
+2-2lldb/tools/lldb-dap/Protocol/ProtocolBase.h
+1-1lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
+8-53 files

Illumos/gate 5882dd1usr/src/uts/common/fs/zfs dbuf.c

17763 Fix -Wuse-after-free warning in dbuf_destroy()
Reviewed by: Toomas Soome <tsoome at me.com>
Reviewed by: Jason King <jason.brian.king at gmail.com>
Reviewed by: C Fraire <cfraire at me.com>
Approved by: Gordon Ross <gordon.w.ross at gmail.com>
DeltaFile
+3-3usr/src/uts/common/fs/zfs/dbuf.c
+3-31 files

LLVM/project cd86b2allvm/lib/CodeGen MachineVerifier.cpp MachineOperand.cpp, llvm/lib/CodeGen/MIRParser MIParser.cpp

[CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (#151944)

Introduce MO_LaneMask as new machine operand type. This can be used to
hold liveness infomation at sub-register granularity for register-type
operands. We also introduce a new COPY_LANEMASK instruction that uses
MO_lanemask operand to perform partial copy from source register
opernad.

One such use case of MO_LaneMask can be seen in #151123, where it can be
used to store live regUnits information corresponding to the source
register of the COPY instructions, later can be used during CopyPhysReg
expansion.
DeltaFile
+40-0llvm/lib/CodeGen/MachineVerifier.cpp
+37-0llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-invalid-lanemask.mir
+28-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+16-3llvm/lib/CodeGen/MachineOperand.cpp
+19-0llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask-missing-lanemask.mir
+17-0llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand.mir
+157-321 files not shown
+298-827 files

LLVM/project d5ef331lldb/test/API/python_api/sbframe_extensions TestSBFrameExtensions.py, lldb/unittests/SymbolFile/DWARF DWARFASTParserClangTests.cpp

rebased

Created using spr 1.3.7
DeltaFile
+798-831llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+484-484llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+342-204llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+534-0lldb/test/API/python_api/sbframe_extensions/TestSBFrameExtensions.py
+333-168lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
+216-216llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+2,707-1,903488 files not shown
+17,503-9,214494 files

LLVM/project 33766eflldb/test/API/python_api/sbframe_extensions TestSBFrameExtensions.py, lldb/unittests/SymbolFile/DWARF DWARFASTParserClangTests.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+798-831llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+484-484llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+342-204llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+534-0lldb/test/API/python_api/sbframe_extensions/TestSBFrameExtensions.py
+333-168lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
+216-216llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+2,707-1,903488 files not shown
+17,503-9,214494 files

LLVM/project 3c7d1a3lldb/test/API/python_api/sbframe_extensions TestSBFrameExtensions.py, lldb/unittests/SymbolFile/DWARF DWARFASTParserClangTests.cpp

rebased

Created using spr 1.3.7
DeltaFile
+798-831llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+484-484llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+342-204llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+534-0lldb/test/API/python_api/sbframe_extensions/TestSBFrameExtensions.py
+333-168lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
+216-216llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+2,707-1,903488 files not shown
+17,503-9,214494 files

LLVM/project 43c6bfdlldb/test/API/python_api/sbframe_extensions TestSBFrameExtensions.py, lldb/unittests/SymbolFile/DWARF DWARFASTParserClangTests.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+798-831llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+484-484llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll
+342-204llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+534-0lldb/test/API/python_api/sbframe_extensions/TestSBFrameExtensions.py
+333-168lldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
+216-216llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
+2,707-1,903488 files not shown
+17,503-9,214494 files

LLVM/project ae4289fllvm/lib/Target/Hexagon HexagonTargetTransformInfo.cpp HexagonTargetTransformInfo.h

[Hexagon][NFC] Drop no-op getMaskedMemoryOpCost/getGatherScatterOpCost stubs (#170426)

These stubs (from 4bdf1aa416b02) don’t actually override anything.
Removing them eliminates the need for a local getMemIntrinsicCost()
forwarder in #169885.
DeltaFile
+0-12llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
+0-6llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
+0-182 files

LLVM/project 47205d0llvm/lib/Target/SPIRV SPIRVBuiltins.cpp

[Revew] getOpExtCallArguments->getBuiltinCallArguments
DeltaFile
+3-3llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+3-31 files

LLVM/project befa4e8llvm/test/CodeGen/AMDGPU hazard-gfx1250-flat-scr-hi.mir

[AMDGPU] Avoid undefs in hazard-gfx1250-flat-scr-hi.mir. NFC (#170396)

DeltaFile
+57-32llvm/test/CodeGen/AMDGPU/hazard-gfx1250-flat-scr-hi.mir
+57-321 files

OPNSense/core 5100521src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes FilterRuleField.php

firewall: not taking any chances with isset() then via @adschellevis
DeltaFile
+3-1src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes/FilterRuleField.php
+3-11 files

LLVM/project 5ee6cffclang/lib/Serialization ASTReaderDecl.cpp, clang/test/Modules GH170084.cpp

[clang] Propagate definition data to all redecls (#170090)

Fix the propagation added in commit 0d490ae55f to include all redecls,
not only previous ones. This fixes another instance of the assertion
"Cannot get layout of forward declarations" in getASTRecordLayout().

Kudos to Alexander Kornienko for providing an initial version of the
reproducer that I further simplified.

Fixes #170084
DeltaFile
+75-0clang/test/Modules/GH170084.cpp
+2-2clang/lib/Serialization/ASTReaderDecl.cpp
+77-22 files

OPNSense/core c39134asrc/opnsense/mvc/app/controllers/OPNsense/Unbound/Api SettingsController.php

unbound: style
DeltaFile
+0-1src/opnsense/mvc/app/controllers/OPNsense/Unbound/Api/SettingsController.php
+0-11 files

OPNSense/core 37e5056src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes FilterRuleField.php

firewall: make missing interface floating too in FilterRuleField
DeltaFile
+2-3src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes/FilterRuleField.php
+2-31 files

OPNSense/core 344c322src/opnsense/mvc/app/controllers/OPNsense/Unbound/Api SettingsController.php

unbound: overview: fix quick allow/blocklist actions

The quick fix here is to block & allow on every defined policy. Ideally
one should be able to select a policy where an entry should apply
to in the case of a block action, and map back to the policy in case
of an allow action. The latter isn't possible in the current construct
yet as it needs a slight adjustment to the data format.
DeltaFile
+40-34src/opnsense/mvc/app/controllers/OPNsense/Unbound/Api/SettingsController.php
+40-341 files

OpenBSD/ports tpHvnsRtextproc/libxslt Makefile distinfo

   Update to libxslt-1.1.45.
VersionDeltaFile
1.115+4-5textproc/libxslt/Makefile
1.47+2-2textproc/libxslt/distinfo
+6-72 files

OPNSense/core b9620fdsrc/opnsense/mvc/app/controllers/OPNsense/Firewall/Api FilterController.php, src/opnsense/mvc/app/models/OPNsense/Firewall Filter.php

mvc: a bit more of asInt() and friends
DeltaFile
+9-7src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/FilterController.php
+4-6src/opnsense/mvc/app/models/OPNsense/Firewall/Filter.php
+4-4src/opnsense/mvc/app/models/OPNsense/Firewall/FieldTypes/FilterRuleField.php
+1-1src/opnsense/mvc/app/models/OPNsense/Kea/KeaCtrlAgent.php
+1-1src/opnsense/mvc/app/models/OPNsense/TrafficShaper/TrafficShaper.php
+19-195 files

FreeNAS/freenas 61b7e91src/middlewared/middlewared/alembic/versions/26.04 2025-12-02_17-04_webshare_passkey.py, src/middlewared/middlewared/api/v26_04_0 webshare.py

WebShare: Passkey support
DeltaFile
+32-0src/middlewared/middlewared/alembic/versions/26.04/2025-12-02_17-04_webshare_passkey.py
+5-3src/middlewared/middlewared/etc_files/webshare-auth/config.json.py
+4-0src/middlewared/middlewared/api/v26_04_0/webshare.py
+1-0src/middlewared/middlewared/plugins/webshare/config.py
+42-34 files

FreeBSD/ports b71f4b4net-p2p Makefile, net-p2p/datum_gateway Makefile pkg-plist

net-p2p/datuum_gateway: Add new port

Datum Gateway implements lightweight efficient client side decentralized
block template creation for true solo mining.
DeltaFile
+33-0net-p2p/datum_gateway/files/datum_gateway.in
+33-0net-p2p/datum_gateway/Makefile
+8-0net-p2p/datum_gateway/pkg-plist
+3-0net-p2p/datum_gateway/distinfo
+2-0net-p2p/datum_gateway/pkg-descr
+1-0net-p2p/Makefile
+80-06 files

LLVM/project 98182f4clang/lib/CodeGen CodeGenFunction.cpp, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

Move CodeGenFunction::EmitScalarOrConstFoldImmArg; NFC (#170286)

This function is called from various .cpp files under `TargetBuiltins/`,
and was moved unintentionally into `AMDGPU.cpp` in PR #132252. Move it
to a common place.
DeltaFile
+17-0clang/lib/CodeGen/CodeGenFunction.cpp
+0-17clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+17-172 files

LLVM/project 3f9b997llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton_bug.ll OpExtInst_vector_promoton.ll

[Review] Fix the _bug test such that it passes if spirv-tools is not available.
DeltaFile
+4-3llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton_bug.ll
+2-2llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+6-52 files

LLVM/project 03f48dallvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton_bug.ll OpExtInst_vector_promoton.ll

[Review] for clarity, split the test case in two
DeltaFile
+20-0llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton_bug.ll
+1-15llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+21-152 files

LLVM/project 13dca3fllvm/lib/Target/SPIRV SPIRVRegularizer.cpp, llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton.ll

[SPIRV] Remove the vector-scalar min/max/fmin/fmax IR rewriting
DeltaFile
+3-99llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
+84-1llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+87-1002 files