LLVM/project 708a5cfoffload/plugins-nextgen/amdgpu/src rtl.cpp

Fix build with gcc
DeltaFile
+4-1offload/plugins-nextgen/amdgpu/src/rtl.cpp
+4-11 files

FreeNAS/freenas df6df09src/middlewared/middlewared/plugins/system debug.py

Pass caller privilege context to debug generation for correct job visibility

(cherry picked from commit 09c07a4fc6af28e255e2b2ca84b00d7b84f75ece)
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

FreeNAS/freenas 5037274src/middlewared/middlewared/plugins/system debug.py

Pass caller privilege context to debug generation for correct job visibility

(cherry picked from commit 09c07a4fc6af28e255e2b2ca84b00d7b84f75ece)
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

FreeNAS/freenas d021913src/middlewared/middlewared/plugins/system debug.py

NAS-140520 / 27.0.0-BETA.1 / Pass caller privilege context to debug generation for correct job visibility (#18632)

## Problem

When generating a system debug, `jobs.json` contains only 2-3 jobs
instead of the full set. This happens because ixdiagnose was calling
`privilege.become_readonly()` before all API calls to ensure Secret
field redaction in debug output.

The issue is that `become_readonly()` drops the credential from
FULL_ADMIN to READONLY_ADMIN, which has two effects: (1) Secret fields
are redacted in API responses (intended), and (2)
`credential_is_limited_to_own_jobs()` in `core.get_jobs` activates
per-user job filtering (unintended side effect). Since the ixdiagnose
middleware client is a freshly created session that owns no jobs, the
result is nearly empty — only jobs with explicit `read_roles` (like
`replication.run`) survive the filter.

This affects all users regardless of privilege level because ixdiagnose

    [27 lines not shown]
DeltaFile
+19-4src/middlewared/middlewared/plugins/system/debug.py
+19-41 files

LLVM/project 853ea94llvm/include/llvm/Transforms/InstCombine InstCombiner.h, llvm/lib/Transforms/InstCombine InstCombineCasts.cpp

[InstCombine][NFC] Expose isKnownExactCastIntToFP as a public method (#190327)

 
DeltaFile
+6-9llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+4-0llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
+10-92 files

LLVM/project dec90ffclang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenRecordLayoutBuilder.cpp, clang/test/CIR/CodeGen no-unique-address.cpp assign-operator.cpp

[CIR] Fix record layout for [[no_unique_address]] fields (#186701)

Fix two bugs in CIR's handling of `[[no_unique_address]]` fields:

- Record layout: Use the base subobject type (without tail padding)
instead of the complete object type for [[no_unique_address]] fields,
allowing subsequent fields to overlap with tail padding.
- Field access: Insert bitcasts from the base subobject pointer to the
complete object pointer after cir.get_member for potentially-overlapping
fields, so downstream code sees the expected type.
- Zero-sized fields: Handle truly empty [[no_unique_address]] fields by
computing their address via byte offsets rather than cir.get_member,
since they have no entry in the record layout.

A known gap (CIR copies 8 bytes where OG copies 5 via
`ConstructorMemcpyizer`) is noted for follow-up.
DeltaFile
+81-24clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+53-0clang/test/CIR/CodeGen/no-unique-address.cpp
+28-2clang/test/CIR/CodeGen/assign-operator.cpp
+12-6clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+5-2clang/test/CIR/CodeGen/dtors.cpp
+179-345 files

LLVM/project 271a088lldb/source/Core ModuleList.cpp, lldb/source/Host/macosx/objcxx HostInfoMacOSX.mm

[lldb] Load scripts from code signed dSYM bundles (#189444)

LLDB automatically discovers, but doesn't automatically load, scripts in
the dSYM bundle. This is to prevent running untrusted code. Users can
choose to import the script manually or toggle a global setting to
override this policy. This isn't a great user experience: the former
quickly becomes tedious and the latter leads to decreased security.

This PR offers a middle ground that allows LLDB to automatically load
scripts from trusted dSYM bundles. Trusted here means that the bundle
was signed with a certificate trusted by the system. This can be a
locally created certificate (but not an ad-hoc certificate) or a
certificate from a trusted vendor.
DeltaFile
+78-0lldb/test/API/macosx/dsym_codesign/TestdSYMCodesign.py
+35-0lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+28-0lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
+12-6lldb/source/Core/ModuleList.cpp
+6-4lldb/source/Target/TargetProperties.td
+6-0lldb/source/Target/Target.cpp
+165-1010 files not shown
+195-1316 files

LLVM/project 7da3a66bolt/lib/Rewrite RewriteInstance.cpp

[BOLT] Check for write errors before keeping output file (#190359)

Summary:
When the disk runs out of space during output file writing, BOLT would
crash with SIGSEGV/SIGABRT because raw_fd_ostream silently records write
errors and only reports them via abort() in its destructor. This made it
difficult to distinguish real BOLT bugs from infrastructure issues in
production monitoring.

Add an explicit error check on the output stream before calling
Out->keep(), so BOLT exits cleanly with exit code 1 and a clear error
message instead.

Test: manually verified with a full filesystem that BOLT now prints
"BOLT-ERROR: failed to write output file: No space left on device" and
exits with code 1.
DeltaFile
+7-0bolt/lib/Rewrite/RewriteInstance.cpp
+7-01 files

FreeNAS/freenas 325af90src/middlewared/middlewared/plugins/filesystem_ acl_template.py

Fix double-entry
DeltaFile
+10-12src/middlewared/middlewared/plugins/filesystem_/acl_template.py
+10-121 files

LLVM/project 1500421llvm/include/llvm/Target/GlobalISel Combine.td, llvm/test/CodeGen/AArch64 neon-bitwise-instructions.ll

[GlobalISel] Add `sub(-1, x) -> (xor x, -1)` from SelectionDAG (#181014)

This PR adds the pattern `// (sub -1, x) -> (xor x, -1)` to GlobalISel
from SelectionDAG.

Original SelectionDAG rewrite:
https://github.com/llvm/llvm-project/blob/5b4811eddb28264ef1ccacc93c0f7d8cb0da31c8/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4305

---------

Co-authored-by: Jay Foad <jay.foad at gmail.com>
DeltaFile
+46-1llvm/test/CodeGen/AArch64/GlobalISel/combine-sub.mir
+20-0llvm/test/CodeGen/AArch64/GlobalISel/combine-sub.ll
+8-2llvm/include/llvm/Target/GlobalISel/Combine.td
+4-6llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
+78-94 files

FreeNAS/freenas c51e07fsrc/middlewared/middlewared/plugins/enclosure_ nvme2.py

fix R50BM rear nvme drive bays
DeltaFile
+0-9src/middlewared/middlewared/plugins/enclosure_/nvme2.py
+0-91 files

LLVM/project df1e67bllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.s.memtime.ll llvm.amdgcn.s.get.waveid.in.workgroup.ll

AMDGPU/GlobalISel: RegBankLegalize rules for s_memtime, s_get_waveid (#190268)
DeltaFile
+5-4llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.memtime.ll
+2-2llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+1-2llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.memtime.mir
+2-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.get.waveid.in.workgroup.ll
+1-2llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.get.waveid.in.workgroup.mir
+11-115 files

NetBSD/pkgsrc CQfnfHBchat/icb distinfo, chat/icb/patches patch-readline_Make

   build fix
   In NetBSD 11 and possibly also SmartOS the ar 'l' modifier went from
   l   This modifier is accepted but not used.
   to
   l   Specify dependencies of this library.
   so ar clq went to "not working"; remove the l and reorder to
   "command first, modifier after" and it'll build again.
   Test-built on netbsd-11 and netbsd-10
VersionDeltaFile
1.2+10-1chat/icb/patches/patch-readline_Make
1.24+2-2chat/icb/distinfo
+12-32 files

LLVM/project 730a07fllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/AArch64 partial-reduce-no-dotprod.ll partial-reduce-chained.ll

[LV] Only create partial reductions when profitable. (#181706)

We want the LV cost-model to make the best possible decision of VF and
whether or not to use partial reductions. At the moment, when the LV can
use partial reductions for a given VF range, it assumes those are always
preferred. After transforming the plan to use partial reductions, it
then chooses the most profitable VF. It is possible for a different VF
to have been more profitable, if it wouldn't have chosen to use partial
reductions.

This PR changes that, to first decide whether partial reductions are
more profitable for a given chain. If not, then it won't do the
transform.

This causes some regressions for AArch64 which are addressed in a
follow-up PR to keep this one simple.
DeltaFile
+94-82llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-9llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-no-dotprod.ll
+6-8llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-chained.ll
+6-6llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-fdot-product.ll
+4-4llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
+119-1095 files

FreeBSD/ports d7f642fsecurity/vuxml/vuln 2026.xml

security/vuxml: Add mongodb{78}0 vulnerability

 CVSS-B         6.0 MEDIUM
 Vector:        CVSS:4.0/AV:N/AC:H/AT:N/PR:L/UI:N/VC:N/VI:N/VA:H/SC:N/SI:N/SA:N
DeltaFile
+37-0security/vuxml/vuln/2026.xml
+37-01 files

LLVM/project 14baff2clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR] Auto-generate matchAndRewrite for one-to-one CIR-to-LLVM lowerings

When a CIR op specifies a non-empty `llvmOp` field, the lowering
emitter now generates the `matchAndRewrite` body that converts the
result type and forwards all operands to the corresponding LLVM op.
This removes 27 boilerplate lowering patterns from LowerToLLVM.cpp.

Ops needing custom logic (FMaxNumOp/FMinNumOp for FastmathFlags::nsz)
override `llvmOp = ""` to retain hand-written implementations.

Also fixes llvmOp names (TruncOp -> FTruncOp, FloorOp -> FFloorOp)
and adds a diagnostic rejecting conflicting llvmOp + custom constructor.
DeltaFile
+0-255clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+30-5clang/utils/TableGen/CIRLoweringEmitter.cpp
+6-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+36-2623 files

LLVM/project 85e2a36llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Remove dead code from the Weak Crossing SIV test (#190355)

The ConstantRange intersection check can now handle cases where the
condition of this branch is satisfied. The check is performed before
entering this function, so this part is no longer necessary.
DeltaFile
+0-11llvm/lib/Analysis/DependenceAnalysis.cpp
+0-111 files

LLVM/project 7f9e4feclang/include/clang/Serialization ASTWriter.h, clang/lib/Frontend CompilerInstance.cpp FrontendActions.cpp

[clang] Extract in-memory module cache writes from `ASTWriter` (#190062)

This PR extracts the write to the in-memory module cache from within
`ASTWriter` into `CompilerInstance.` This brings it closer to other
module cache manipulations, making the ordering much more clear and
explicit.
DeltaFile
+0-38clang/unittests/Frontend/FrontendActionTest.cpp
+12-0clang/lib/Frontend/CompilerInstance.cpp
+4-8clang/lib/Serialization/GeneratePCH.cpp
+1-7clang/lib/Serialization/ASTWriter.cpp
+2-5clang/lib/Frontend/FrontendActions.cpp
+1-4clang/include/clang/Serialization/ASTWriter.h
+20-621 files not shown
+20-637 files

LLVM/project dc83ad2clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

[CIR] Fix incorrect CIR_GlobalOp.global_visibility assembly format (#189673)

Closes #189666 .

Fix incorrect printing and parsing of `cir.global` if
`global_visibility` attribute is present. Incorrect assembly format
```
(`` $global_visibility^)?
```

Resulted in keyword sticking to previous word and producing incorrect
cir like this:
```
cir.globalhidden external dso_local @hidden_var = #cir.int<10> : !s32i {alignment = 4 : i64} loc(#loc22)
cir.global "private"hidden internal dso_local @hidden_static_var = #cir.int<10> : !s32i {alignment = 4 : i64} loc(#loc24)
```

Using custom parser/printer that is used in `cir.func` parser fixes this
issue and makes printed/parsed attribute for functions and global values

    [2 lines not shown]
DeltaFile
+38-0clang/test/CIR/CodeGen/attribute-visibility.c
+28-0clang/test/CIR/IR/attribute-visibility.cir
+8-1clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+1-1clang/include/clang/CIR/Dialect/IR/CIROps.td
+75-24 files

OpenBSD/ports 0vRQnn4textproc/cookcli distinfo Makefile

   Update to CookCLI 0.27.2.
VersionDeltaFile
1.9+6-6textproc/cookcli/distinfo
1.10+1-1textproc/cookcli/Makefile
1.9+1-1textproc/cookcli/crates.inc
+8-83 files

NetBSD/pkgsrc nVGGXQ4doc CHANGES-2026

   doc: Updated devel/py-mercurial to 7.2.1
VersionDeltaFile
1.2084+2-1doc/CHANGES-2026
+2-11 files

LLVM/project fd68fa9lldb/source/Core Address.cpp, lldb/source/DataFormatters ValueObjectPrinter.cpp

[lldb] Remove unnecessary calls to ConstString::AsCString (NFC) (#190298)

Replace calls to `ConstString::AsCString` with
`ConstString::GetString(Ref)` where appropriate.

Assisted-by: Claude Code
DeltaFile
+6-8lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+5-3lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+3-2lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
+2-2lldb/source/Plugins/SymbolLocator/DebugSymbols/SymbolLocatorDebugSymbols.cpp
+2-2lldb/source/Core/Address.cpp
+2-2lldb/source/DataFormatters/ValueObjectPrinter.cpp
+20-1924 files not shown
+48-4930 files

NetBSD/pkgsrc vweowDidevel/py-mercurial PLIST distinfo

   py-mercurial: update to 7.2.1.

   Mercurial 7.2.1 (2026-04-01)

   A normal bugfix release, fashionably late.

       A bunch of fixes and improvements to the test runner and CI stability

       Fixed a corruption and crash in branchmap v3 (8471e18f1619)

       Backed out making parallel streaming bundle processing the default (64053b131c0b)

       Fixed dirstate backup files being forgotten about (f80ad355012d)

       has-meta-flag: ignore censored revision when importing older bundles (1afb8f260d18)

       Fixed a crash in quickaccess logic when it races with commit (5104190c6e4d)

       Improved support for Python 3.15’s alpha

    [87 lines not shown]
VersionDeltaFile
1.52+136-3devel/py-mercurial/PLIST
1.156+4-4devel/py-mercurial/distinfo
1.112+3-3devel/py-mercurial/Makefile
1.68+2-2devel/py-mercurial/version.mk
+145-124 files

LLVM/project 7edf8a7llvm/lib/Analysis ScalarEvolution.cpp, llvm/lib/Transforms/Utils LoopConstrainer.cpp

[SCEV] Replace some hasFlags calls with hasNo(Un)SignedWrap (NFC). (#190352)

This is slightly more compact and reduces diff when switching to enum
class (https://github.com/llvm/llvm-project/pull/190199).

PR: https://github.com/llvm/llvm-project/pull/190352
DeltaFile
+4-4llvm/lib/Transforms/Utils/LoopConstrainer.cpp
+3-3llvm/lib/Analysis/ScalarEvolution.cpp
+2-2polly/lib/Support/SCEVAffinator.cpp
+9-93 files

FreeNAS/freenas eae2d92src/middlewared/middlewared/plugins/disk_ sed.py, src/middlewared/middlewared/utils/disks_ disk_class.py

fix SED drive initialization
DeltaFile
+39-12src/middlewared/middlewared/utils/disks_/disk_class.py
+16-11src/middlewared/middlewared/plugins/disk_/sed.py
+55-232 files

LLVM/project e556454llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

address final nits
DeltaFile
+3-3llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+3-31 files

FreeBSD/ports e9bcfa3multimedia/ringrtc distinfo Makefile.crates

multimedia/ringrtc: Update to 2.67.0

Drop aarch64 as signal-desktop only builds on amd64
DeltaFile
+41-39multimedia/ringrtc/distinfo
+17-16multimedia/ringrtc/Makefile.crates
+4-5multimedia/ringrtc/Makefile
+1-1multimedia/ringrtc/update.txt
+1-1multimedia/ringrtc/webrtc_fetch.sh
+64-625 files

FreeBSD/ports ef0d2d0net-im/signal-desktop distinfo Makefile, net-im/signal-desktop/files pnpm-lock.yaml patch-package.json

net-im/signal-desktop: Update to 7.84.1

Drop aarch64 as signal-desktop only builds on amd64
DeltaFile
+1,888-2,137net-im/signal-desktop/files/pnpm-lock.yaml
+5-5net-im/signal-desktop/distinfo
+7-3net-im/signal-desktop/files/patch-package.json
+2-3net-im/signal-desktop/Makefile
+1-1net-im/signal-desktop/get_deps.sh
+1,903-2,1495 files

FreeBSD/ports 714dd01net-im/libsignal-node distinfo Makefile

net-im/libsignal-node: Update to 0.89.1

Drop aarch64 as signal-desktop only builds on amd64
DeltaFile
+11-7net-im/libsignal-node/distinfo
+2-3net-im/libsignal-node/Makefile
+3-1net-im/libsignal-node/Makefile.crates
+16-113 files

FreeBSD/ports 01eedd4security/node-sqlcipher Makefile distinfo

security/node-sqlcipher: Update to 3.2.1

Drop aarch64 as signal-desktop only builds on amd64
DeltaFile
+3-16security/node-sqlcipher/Makefile
+5-9security/node-sqlcipher/distinfo
+8-252 files