[Windows] FlushViewOfFile() for sparse files before unmap (#231823)
The issue has been described here
https://github.com/swiftlang/llvm-project/issues/12605 We have
reproduced this issue on x86_64 too running 2000 processes
simultaneously. It is hard to create a stable test for this patch. The
problem is specific to sparse files on NTFS. There is no problem on
ReFS.
I think using sparse files increases fragmentation and reduces
performance. It might be worth considering moving away from sparse
files.
Address feedback
- Use logger.exception for a failed TrueSearch mount check.
- Drop the 5 second reconfigure delay and RECONFIGURE_TIMER. The mount
check already runs once per burst of mounts, so it now reconfigures
TrueSearch directly.
- Cut the new unit tests down to one short test per change and move the
TrueSearch ones into test_truesearch.py.
[flang][OpenMP] Improve diagnosing invalid operators in DECLARE_REDUCTION
Move the check out of the common MakeNameFromOperator function and
into OmpStructureChecker. Remove the no longer needed SemanticsContext
parameter in MakeNameFromOperator.
This will allow reusing at least some parts of the the name-mangling
code in DECLARE_INDUCTION.
[AArch64] Combine non-extending partial.reduce.fadd into fma (#230120)
Using partial reductions as the default (#228481) results in some
regressions, in particular for imagick from spec2017. The cause in that
case is a lack of combining fmul and fadd into fmla, since the fadd was
still part of the intrinsic at that point.
This PR makes sure that the partial_reduce_fmla ISD node is constructed
with the same flags that the intrinsic had, copies flags to the nodes
generating when expanding during vector op legalization, then performs a
target DAG combine for the FADD_P and FMUL_P AArch64ISD nodes.
[Offload] Allow 0 to be returned for `MEMORY_CLOCK_RATE` (#232265)
For integrated Intel GPUs, level zero APIs will return 0. It's not easy
to fetch dram's clock rate, so we just accept 0 as valid result of the
test.
NAS-144534 / 27.0.0 / Fix `test__iscsi_extent__disk_choices` flakiness (by themylogin) (#20023)
udev creates the snapshot device symlink some time after the snapshot is
created. That leads to this test being flaky.
An alternative is to wait for udev to settle after snapshot creation.
IMO it will be useful in a very limited amount of cases, but will
introduce unnecessary latency in the vast majority of cases.
Original PR: https://github.com/truenas/middleware/pull/20022
Co-authored-by: themylogin <themylogin at gmail.com>
AMDGPU: Don't look up ConstantData in the constant access cache (#232283)
AAAMDAttributes checks the constant operands of all instructions for
address space casts and LDS globals that need the queue pointer or
flat scratch initialization, looking each of them up in a cache. Skip
the lookup for trivial constants which have no operands.
Instructions spent in amdgpu-attributor:
rocPRIM test_device_scan, gfx942: 1429M -> 1419M (-0.7%)
Blender Cycles HIP kernel, gfx1100: 507M -> 506M (-0.2%)
rocPRIM 16 tests, full LTO, closed world: 5283M -> 5263M (-0.4%)
The effect is magnified with other pending compile time improvements.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[flang] Move reduction name mangling code to Semantics/tools
Gather all the mangling/demangling code in one place.
Also remove MangledIntrinsicOperatorReductionName that was only there
to expose MakeNameFromOperator, whose declaration was not in include/.
One remaining issue is emitting a diagnostic specific to DECLARE
REDUCTION in MakeNameFromOperator.
tests/sys/kern: stress FP registers across sigreturn on powerpc64
This is the program that found the races fixed in 1f1043d550ea. One
thread keeps a pattern in f14-f31 across a signal, while helpers pinned
to the same CPU keep different patterns in the real registers and get
woken up from another CPU to preempt it at random points. If the kernel
ever hands it somebody else's registers, the pattern doesn't match.
The register loads, the thr_kill() and the handshake with the helper are
in assembly so that nothing touches the FP registers between sigreturn
and the check. It runs for ten seconds and is skipped with fewer than
two CPUs.
Requested by: adrian
Approved by: jhibbits
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D60411
powerpc64: give each CPU its own KDB trap stack
Kernel mode program, trace, breakpoint and machine check exceptions go
through dbtrap, which saves the registers on trapstk and, if KDB doesn't
want the trap, restores them from there and continues with the normal
trap handler. There was just one trapstk for all CPUs, so when two of
them trapped at the same time they overwrote each other's frame and one
of them carried on with the other's registers. DTrace fbt probes are
these traps, so a probe on a function that runs on several CPUs at once
took the kernel down within seconds.
Keep the stack in the pcpu instead. The boot CPU gets a static one,
since it's set up before malloc works, the others allocate theirs in
cpu_pcpu_init() like the Book-E critical interrupt stack.
Approved by: jhibbits
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D60362
[VPlan] Don't fold fcmp uno of different types. (#232324)
The combine (fcmp uno X, X) | (fcmp uno Y, Y) -> fcmp uno X, Y did not
check that X and Y have the same type, e.g. when checking for NaNs in
both a float and a double min/max reduction, creating an invalid fcmp
and crashing. Only apply it if the types match.
DebugInfo: Fix contradictory dead flags in MIR tests (#232326)
Remove the duplicate implicit-def dead $pc from Hexagon L4_return, and
drop the dead flag from sub-register defs that also have a live
super-register implicit-def. These will fail a future verifier rule.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
