LLVM/project e7be7aellvm/lib/Transforms/Vectorize VPlanLowering.cpp

Remove debugloc now that it's a default arg
DeltaFile
+2-2llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
+2-21 files

LLVM/project 821dc0allvm/lib/CodeGen TypePromotion.cpp, llvm/test/Transforms/TypePromotion/ARM casts.ll

[TypePromotion] Drop invalid nsw from promoted trunc-to-i1 conditions (#223637)

Fix a miscompile introduced in #216311. TypePromotion zero-extends the
operand of a trunc to i1. When doing so, drop nsw unless nuw is also
set, as the original operand might be all ones.

Preserve nuw because it remains valid when zero-extending. Preserve nuw
nsw as well, since it implies an all-zero operand when truncating to i1.

Alive2 proofs: https://alive2.llvm.org/ce/z/GHTZXg
DeltaFile
+45-0llvm/test/Transforms/TypePromotion/ARM/casts.ll
+12-2llvm/lib/CodeGen/TypePromotion.cpp
+57-22 files

LLVM/project b35b11fclang/lib/StaticAnalyzer/Checkers NonNullParamChecker.cpp

Rename ArgIdx to NativeIdx.
DeltaFile
+4-4clang/lib/StaticAnalyzer/Checkers/NonNullParamChecker.cpp
+4-41 files

LLVM/project e3cbd83llvm/test/Transforms/LoopVectorize/AArch64 early_exit_costs.ll

Fix early_exit_costs.ll test
DeltaFile
+2-2llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
+2-21 files

LLVM/project 6a8e405llvm/test/Transforms/LoopVectorize predicated-early-exits-interleave.ll predicated-multiple-exits.ll

[VPlan] Use frozen combined condition in early exit first-active-lane

Combined is used both to compute if an early exit was taken via VPInstruction::AnyOf, as well as the index of the early-exited lane in VPInstruction::FirstActiveLane.

Combined can have poison lanes past the exited lane, so the AnyOf uses freeze to prevent branching on poison. However FirstActiveLane on a vector with a poison lane is poison, so we need to also use the frozen version of Combined to prevent poison there.
DeltaFile
+32-32llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
+24-24llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
+14-14llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
+12-12llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
+10-10llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
+6-6llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
+98-9817 files not shown
+144-14223 files

LLVM/project fe32eb6llvm/lib/Transforms/Vectorize VPlanConstruction.cpp, llvm/test/Transforms/LoopVectorize single-early-exit-anyof-fold.ll

Remove FIXME
DeltaFile
+3-6llvm/test/Transforms/LoopVectorize/single-early-exit-anyof-fold.ll
+1-1llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+4-72 files

LLVM/project 9ec45eellvm/test/Transforms/LoopVectorize single-early-exit-anyof-fold.ll

Precommit test
DeltaFile
+54-0llvm/test/Transforms/LoopVectorize/single-early-exit-anyof-fold.ll
+54-01 files

LLVM/project f96a309llvm/test/Transforms/LoopVectorize fcmp-uno-fold-interleave.ll, llvm/test/Transforms/LoopVectorize/AArch64 fmax-without-fast-math-flags.ll cmp_cost.ll

[VPlan] Fix VPInstruction::AnyOf combine undoing freeze

There is an any-of combine for unrolled VPlans which does:

    any-of (fcmp uno A, A), (fcmp uno B, B), ...-> any-of (fcmp uno A, B)

However any-of implicitly freezes each individual operand and this means we go from `freeze (fcmp uno A, A)` to `freeze (fcmp uno A, B)` which isn't sound: alive2.llvm.org/ce/z/UdQM7C

This causes miscompiles today with early exit loops, see the attached test case in single-early-exit-anyof-fold.ll.

This fixes it by explicitly modelling the freeze in VPlan. There are three places where we use AnyOf:

1) early exit loops: the freeze needs to be applied per-lane, so apply it to `(any-of (freeze (combined-conds-to-exit)))`
2) handleMaxMinNumReductions: If any lane of the reduction was poison in the scalar loop, the final result will be poison. We only need to freeze the result of AnyOf to prevent immediate UB when branching. Freezing individual operands blocks the any-of combine otherwise.
3) handleFindLastReductions: we need to freeze Cond itself since it's got multiple uses, but I plan on fixing this in a separate PR
DeltaFile
+51-48llvm/test/Transforms/LoopVectorize/AArch64/cmp_cost.ll
+32-36llvm/test/Transforms/LoopVectorize/fcmp-uno-fold-interleave.ll
+35-31llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
+28-32llvm/test/Transforms/LoopVectorize/AArch64/fmax-without-fast-math-flags.ll
+31-27llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
+30-27llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+207-20120 files not shown
+380-35426 files

LLVM/project 1b8d92cllvm/lib/Transforms/Vectorize LoopVectorize.cpp VPlanUtils.cpp

[VPlan] Rename createScalarFreeze -> createFreeze. NFC

It works for vector operands too. We can also use it in preparePlanForMainVectorLoop
DeltaFile
+3-3llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+2-2llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+2-2llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
+1-2llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+8-94 files

LLVM/project 57c40b7llvm/lib/CodeGen/SelectionDAG LegalizeTypes.h LegalizeFloatTypes.cpp, llvm/test/CodeGen/Mips/msa f16vec-insertelement.ll

[SelectionDAG] Soft promote the element operand of INSERT_VECTOR_ELT (#223612)

When f16/bf16 is soft promoted but a vector of that type is legal,
INSERT_VECTOR_ELT is left with a soft promoted i16 element operand.
SoftPromoteHalfOperand had no case for it and failed with "Do not know
how to soft promote this operator's operand!".

Legalize it like BUILD_VECTOR and the inverse EXTRACT_VECTOR_ELT:
bitcast
the vector to its integer counterpart, insert the promoted element there
and bitcast the result back. This also covers scalable vectors.

This is reachable on MIPS MSA and on RISC-V with Zvfhmin/Zvfbfmin but
without Zfhmin/Zfbfmin. X86, Hexagon and WebAssembly avoid it by custom
lowering INSERT_VECTOR_ELT on the scalar type; that still takes
precedence and can be removed separately.

Fixes https://github.com/llvm/llvm-project/issues/198104.

Assisted-by: Claude Code
DeltaFile
+170-0llvm/test/CodeGen/Mips/msa/f16vec-insertelement.ll
+109-0llvm/test/CodeGen/RISCV/rvv/insertelt-fp-soft-promote.ll
+13-0llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+293-04 files

FreeNAS/freenas aa3be8esrc/middlewared/middlewared/apps file_app.py, src/middlewared/middlewared/plugins/test pipes.py

Report a failed job on `/_download` instead of an empty 200
DeltaFile
+101-0tests/api2/test_download.py
+40-19src/middlewared/middlewared/apps/file_app.py
+25-1src/middlewared/middlewared/plugins/test/pipes.py
+166-203 files

LLVM/project 9b5b5ffcompiler-rt/resources windows_version_resource.rc

[compiler-rt] Set FILEOS and FILETYPE in windows_version_resource.rc (#223387)

This is a follow-up to #216408 which added version info to runtime DLLs.

We have a test (in Crashpad) that expects the FILEOS and FILETYPE to be
set. I suppose it was getting default values from somewhere before, but
after #216408 it fails unless we set them explicitly.
DeltaFile
+3-0compiler-rt/resources/windows_version_resource.rc
+3-01 files

LLVM/project d37cbd4clang/lib/Driver/ToolChains/Arch ARM.cpp, clang/test/Driver eabi.c

CodeGen: Remove TargetOptions::EABIVersion

The field's only effect was gating the __aeabi_mem*[4|8] libcalls via the
IsEABI4/IsEABI5 predicates. That distinction is derivable from the triple's
environment, so replace the two predicates with a single
triple-derived IsEABIVersion and delete the field.

The clang -meabi option and clang::TargetOptions::EABIVersion are
retained (now codegen-inert); the llc/opt -meabi flag is removed. -meabi
now only takes effect on triples with a bare-EABI/GNU environment pair
(arm-none-eabi <-> gnueabi), which is the only case with a triple
representation.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+32-0clang/lib/Driver/ToolChains/Arch/ARM.cpp
+4-21llvm/test/CodeGen/ARM/arm-eabi.ll
+13-6clang/test/Driver/eabi.c
+7-11llvm/include/llvm/IR/RuntimeLibcalls.h
+0-17llvm/lib/Target/ARM/ARMTargetMachine.cpp
+7-7llvm/lib/IR/RuntimeLibcalls.cpp
+63-6231 files not shown
+128-15537 files

LLVM/project 263bbd4clang/lib/Basic/Targets AArch64.cpp ARM.cpp, clang/test/Frontend gnu-mcount.c

clang/ARM: Derive -pg mcount name from the triple environment (#220822)

For a glibc/gnueabi ARM and AArch64 targets, GCC's -pg instrumentation
always calls __gnu_mcount_nc (with the caller pushing LR, per the "nc"
no-LR-clobber ABI). clang only produced this when -meabi=gnu was passed
explicitly; a separate gnueabi triple wrongly called plain "mcount".

On ARM, glibc's EABI profiling entry point is __gnu_mcount_nc
(sysdeps/arm/arm-mcount.S, exported since GLIBC_2.8). It does provide
plain mcount/_mcount, but only as a legacy APCS compat alias
(__mcount_arm_compat, gated on GCC_COMPAT(4,3)/SHLIB_COMPAT) 
that reads an APCS frame-pointer record rather than following the EABI push-LR 
convention. Calling it from EABI -pg code is thus an ABI mismatch, not the intended 
entry point.

Derive the GNU-vs-plain mcount name from the triple environment in
addition to the explicit -meabi=gnu, so a gnueabi target gets the correct
__gnu_mcount_nc call by default, matching GCC:


    [5 lines not shown]
DeltaFile
+8-3clang/test/Frontend/gnu-mcount.c
+5-3clang/lib/Basic/Targets/ARM.cpp
+4-1clang/lib/Basic/Targets/AArch64.cpp
+17-73 files

LLVM/project def6962llvm/test/Transforms/LoopVectorize/AArch64 early_exit_costs.ll

Fix early_exit_costs.ll test
DeltaFile
+2-2llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
+2-21 files

LLVM/project f6f250aclang/lib/AST/ByteCode Compiler.cpp Interp.h

[clang][bytecode] Use opaque pointers for expr-based dummy pointers (#221218)

Similar to https://github.com/llvm/llvm-project/pull/220917, but for
expressions.
DeltaFile
+11-71clang/lib/AST/ByteCode/Interp.cpp
+0-63clang/lib/AST/ByteCode/Program.cpp
+34-23clang/lib/AST/ByteCode/Pointer.cpp
+17-21clang/lib/AST/ByteCode/Pointer.h
+15-20clang/lib/AST/ByteCode/Interp.h
+1-18clang/lib/AST/ByteCode/Compiler.cpp
+78-2169 files not shown
+97-25315 files

LLVM/project 635743dllvm/test/CodeGen/X86 min-legal-vector-width.ll inline-asm-pr76416.ll

RegisterPressure: Remove dead defs correctly

When an instruction has overlapping register defs where only some carry the
dead flag (for example a dead super-register def alongside a live sub-register
def), the collector left the shared register units in both the live and dead def
sets. That produced a PressureDiff decrement with no matching increment and tripped
the "PSet overflow/underflow" assertion in getUpwardPressureDelta.

A register unit is dead if any def covering it is dead, regardless of operand
order. Reconcile by subtracting the dead defs from the live defs instead of the
reverse: removeRegLanes only clears the overlapping units, so a def keeps any
units a dead def does not cover.

Fixes #155807.
Fixes #149144.
Fixes #76416.
Fixes #205272.

Co-authored-by: XChy <xxs_chy at outlook.com>
Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
DeltaFile
+233-216llvm/test/CodeGen/X86/masked-udiv.ll
+106-89llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
+72-60llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+42-40llvm/test/CodeGen/X86/udiv_fix_sat.ll
+75-0llvm/test/CodeGen/X86/inline-asm-pr76416.ll
+35-35llvm/test/CodeGen/X86/min-legal-vector-width.ll
+563-4409 files not shown
+708-47215 files

Illumos/gate 045db04usr/src/lib/libzfs/common libzfs_crypto.c, usr/src/pkg/manifests system-test-zfstest.p5m

18248 libzfs: uri_handlers are maximally confused
Reviewed by: Bill Sommerfeld <sommerfeld at hamachi.org>
Reviewed by: Gordon Ross <Gordon.W.Ross at gmail.com>
Approved by: Robert Mustacchi <rm+illumos at fingolfin.org>
DeltaFile
+83-0usr/src/test/zfs-tests/tests/functional/cli_root/zfs_create/zfs_create_crypt_keyfile_error.ksh
+12-3usr/src/lib/libzfs/common/libzfs_crypto.c
+2-1usr/src/test/zfs-tests/runfiles/common.run
+3-0usr/src/pkg/manifests/system-test-zfstest.p5m
+100-44 files

OPNSense/tools 22383fdconfig/26.7 make.conf

config: add UPNP_NOPPP back due to revert
DeltaFile
+1-1config/26.7/make.conf
+1-11 files

OPNSense/ports b52460aopnsense/miniupnpd distinfo Makefile, opnsense/miniupnpd/files patch-set-pool-af patch-upnp-igdv2-compat.patch

opnsense/miniupnpd: roll back for now
DeltaFile
+75-0opnsense/miniupnpd/files/patch-upnp-igdv2-compat.patch
+9-22opnsense/miniupnpd/Makefile
+29-0opnsense/miniupnpd/files/patch-set-pool-af
+5-19opnsense/miniupnpd/distinfo
+118-414 files

LLVM/project a125e6ellvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/lib/Target/AArch64/GISel AArch64InstructionSelector.cpp

Reland "[AArch64][GlobalISel] Add support for TLS for ELF" (#223443)

This relands #220236.

The original patch missed a case where TLS-related computations could be
localized into the middle of a call-frame adjustment sequence.

The fix prevents TLS variable localization on ELF, in the same way as on
Mach-O (see the second patch in this PR).
DeltaFile
+177-14llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+54-0llvm/test/CodeGen/AArch64/GlobalISel/localizer-tls.ll
+27-22llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+0-48llvm/test/CodeGen/AArch64/GlobalISel/localizer-arm64-tti.ll
+27-2llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll
+12-5llvm/test/CodeGen/AArch64/arm64-tls-dynamics.ll
+297-915 files not shown
+321-10311 files

FreeNAS/freenas 5607af6src/middlewared/middlewared/plugins/snapshot __init__.py

Apply suggestion from @themylogin
DeltaFile
+1-1src/middlewared/middlewared/plugins/snapshot/__init__.py
+1-11 files

LLVM/project f1450b2clang/lib/AST/ByteCode Disasm.cpp Record.cpp

[clang][bytecode] Allocate records fields and bases via Program allocator (#223433)

They have the same lifetime as other things in `Program`. And we know
the number of things to allocate in advance, apart from some small
overallocations with explicitly specified virtual bases.
DeltaFile
+39-10clang/lib/AST/ByteCode/Program.cpp
+10-17clang/lib/AST/ByteCode/Record.h
+4-14clang/lib/AST/ByteCode/Record.cpp
+4-5clang/lib/AST/ByteCode/Disasm.cpp
+57-464 files

OPNSense/ports c312819security/strongswan pkg-plist distinfo, security/strongswan/files patch-conf_Makefile.in patch-conf_plugins_kernel-libipsec.conf

security/strongswan: sync with upstream

Taken from: FreeBSD
DeltaFile
+0-23security/strongswan/files/patch-src_libcharon_plugins_smp_smp.c
+11-0security/strongswan/files/patch-conf_plugins_kernel-libipsec.conf
+3-4security/strongswan/Makefile
+3-3security/strongswan/distinfo
+0-5security/strongswan/pkg-plist
+2-2security/strongswan/files/patch-conf_Makefile.in
+19-376 files

LLVM/project 0df9359llvm/test/Transforms/LoopVectorize predicated-early-exits-interleave.ll predicated-multiple-exits.ll

[VPlan] Use frozen combined condition in early exit first-active-lane

Combined is used both to compute if an early exit was taken via VPInstruction::AnyOf, as well as the index of the early-exited lane in VPInstruction::FirstActiveLane.

Combined can have poison lanes past the exited lane, so the AnyOf uses freeze to prevent branching on poison. However FirstActiveLane on a vector with a poison lane is poison, so we need to also use the frozen version of Combined to prevent poison there.
DeltaFile
+32-32llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
+24-24llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
+14-14llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
+12-12llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
+10-10llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
+6-6llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
+98-9817 files not shown
+144-14223 files

LLVM/project 8f2887allvm/include/llvm/CodeGen SlotIndexes.h, llvm/lib/CodeGen SlotIndexes.cpp

AMDGPU: Maintain LiveIntervals when removing blocks in SILowerControlFlow

removeMBBifRedundant removed a redundant block's instructions from the
LiveIntervals maps but not the block itself, leaving a stale idx2MBBMap entry
that crashed getMBBFromIndex in the verifier.

Add SlotIndexes::removeMBBFromMaps to drop the erased block's slot range, and
recompute the intervals that spanned it.

Co-authored-by: Claude claude-opus-4.8 <noreply at anthropic.com>
DeltaFile
+95-0llvm/test/CodeGen/AMDGPU/si-lower-control-flow-remove-redundant-block-liveintervals.mir
+24-0llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+23-0llvm/lib/CodeGen/SlotIndexes.cpp
+5-0llvm/include/llvm/CodeGen/SlotIndexes.h
+147-04 files

LLVM/project 15016c8llvm/lib/Transforms/Scalar LICM.cpp, llvm/test/Transforms/LICM promote-single-thread.ll

LICM: Drop -licm-force-thread-model-single in favor of the module flag

Now that the threading model is carried by the "thread-model" IR module flag,
the hidden -licm-force-thread-model-single override is redundant: a test can
select the single-threaded model by setting the module flag directly.
isThreadLocalObject reads only Module::getThreadModel.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+1-5llvm/lib/Transforms/Scalar/LICM.cpp
+3-1llvm/test/Transforms/LICM/promote-single-thread.ll
+3-0llvm/test/Transforms/LICM/Inputs/thread-model-single.ll
+7-63 files

LLVM/project e733cebclang/lib/CodeGen BackendUtil.cpp, llvm/lib/CodeGen CommandFlags.cpp AtomicExpandPass.cpp

CodeGen: Replace TargetOptions::ThreadModel with module flag (#223157)

Migrate the threading-model consumers off TargetOptions::ThreadModel and
onto the "thread-model" module flag. The main user was ARM's pass config,
which is moved into AtomicExpand, which now performs the single-thread 
expansion directly.

Few tests use the -thread-model flag, so delete it and migrate those
cases to use the module flag.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+182-0llvm/test/Transforms/AtomicExpand/ARM/thread-model-single.ll
+47-1llvm/lib/CodeGen/AtomicExpandPass.cpp
+13-5llvm/test/CodeGen/ARM/atomic-op.ll
+11-6llvm/lib/Transforms/Scalar/LICM.cpp
+0-11llvm/lib/CodeGen/CommandFlags.cpp
+0-8clang/lib/CodeGen/BackendUtil.cpp
+253-317 files not shown
+254-5413 files

LLVM/project 11576edflang/lib/Lower PFTBuilder.cpp, flang/test/Lower trailing-cycle.f90

[flang] Delete a trailing CYCLE that is the last statement of its DO (#223399)

A CycleStmt at the end of the body of its own DoConstruct is a no-op:
branching to the EndDoStmt and falling through to it are the same thing.
Branch analysis nonetheless marks the DoConstruct unstructured, which
costs the structured form of the loop and the induction variable
semantics that later passes rely on.

Delete such a CycleStmt in the PFT. The statement must be unlabeled, so
that it is not itself a branch target, and it must name either no
construct or this one.
DeltaFile
+141-0flang/test/Lower/trailing-cycle.f90
+54-0flang/lib/Lower/PFTBuilder.cpp
+32-0flang/test/Lower/OpenMP/trailing-cycle.f90
+227-03 files

FreeNAS/freenas 8aecfcfsrc/middlewared/middlewared job.py service_exception.py, src/middlewared/middlewared/plugins zettarepl.py

Make `pool.snapshottask.run` return `EEXIST`  if the snapshot already existed.
DeltaFile
+11-1tests/api2/test_snapshot_task_run.py
+5-5src/middlewared/middlewared/service_exception.py
+5-0src/middlewared/middlewared/job.py
+2-1src/middlewared/middlewared/plugins/zettarepl.py
+2-0src/middlewared/middlewared/plugins/snapshot/__init__.py
+25-75 files