LLVM/project 9208fc3lldb/source/Protocol/MCP Server.cpp, lldb/tools/lldb-mcp lldb-mcp.cpp Multiplexer.cpp

[lldb-mcp] Host managed debug sessions in-process (#210450)

Let a client create and own debug sessions with session_create and
session_close. Rather than spawn a separate lldb per session, lldb-mcp
hosts them in its own process, communicating over a loopback socket to
keep things uniform with external lldb instances.

The benefits of this approach are:

- There is no child-process machinery, so nothing needs to be spawned
and cleaned up.
- It works without the need for an external lldb binary.
- It avoids the deadlock by reading stdin through a raw fd instead of
the FILE* stdio path that previously hung the Debugger constructor
contending on the REPL's stdin lock.
- The architecture stays uniform between in-process and external
sessions.

The trade-off is no isolation, so an LLDB crash takes down lldb-mcp

    [2 lines not shown]
DeltaFile
+94-125lldb/tools/lldb-mcp/lldb-mcp.cpp
+188-7lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
+146-40lldb/tools/lldb-mcp/Multiplexer.cpp
+41-12lldb/tools/lldb-mcp/Multiplexer.h
+16-2lldb/source/Protocol/MCP/Server.cpp
+5-2lldb/tools/lldb-mcp/CMakeLists.txt
+490-1881 files not shown
+494-1887 files

LLVM/project d139c82mlir/include/mlir/Dialect/XeGPU/Transforms XeGPULayoutImpl.h, mlir/lib/Dialect/XeGPU/Transforms XeGPULayoutImpl.cpp XeGPUPropagateLayout.cpp

[MLIR][XeGPU] Add local forward layout propagation (#208932)

Backward layout propagation only assigns layouts to values that are
(transitively) consumed by an anchor op. A value whose only consumer is,
e.g., the next iteration of a loop is left without a layout.

Add a local forward-fill step, run after the backward materialization
walk in propagateLayouts(): it visits ops in producer-first order and,
for any un-laid-out vector result, infers the layout from the op's
already-known operand layouts via a new
inferResultLayoutFromSourceForNonAnchorOp dispatcher (covering
elementwise, transpose, and shape_cast; other ops are left as TODO),
then stamps it with setDistributeLayoutAttr.

---------

Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
DeltaFile
+167-0mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
+50-86mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+53-0mlir/include/mlir/Dialect/XeGPU/Transforms/XeGPULayoutImpl.h
+35-0mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+305-864 files

LLVM/project e38b48bllvm/utils/gn/secondary/compiler-rt/test/hwasan BUILD.gn

Merge branch 'main' into users/jroelofs/spr/mcaarch64-add-cfi_llvm_set_ra_sign_state-for-pauth_lr
DeltaFile
+1-1llvm/utils/gn/secondary/compiler-rt/test/hwasan/BUILD.gn
+1-11 files

LLVM/project b76df57clang/test/CodeGen arm-neon-vst.c, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-ldst-one.c

rebase

Created using spr 1.3.7
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+1,906-2,1968 files not shown
+2,099-2,49314 files

LLVM/project 893767cclang/test/CodeGen arm-neon-vst.c, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-ldst-one.c

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+1,906-2,1968 files not shown
+2,099-2,49314 files

LLVM/project df3c678clang/test/CodeGen arm-neon-vst.c, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-ldst-one.c

rebase

Created using spr 1.3.7
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+1,906-2,1968 files not shown
+2,099-2,49314 files

LLVM/project 19aa2b3clang/test/CodeGen arm-neon-vst.c, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-ldst-one.c

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+1,906-2,1968 files not shown
+2,099-2,49314 files

LLVM/project 95cabd6llvm/utils/gn/secondary/compiler-rt/test/hwasan BUILD.gn

[gn] hwasan follow-up to 1df8a2c9aac26211 (#210781)
DeltaFile
+1-1llvm/utils/gn/secondary/compiler-rt/test/hwasan/BUILD.gn
+1-11 files

LLVM/project 6e8a65aclang/test/CodeGen arm-neon-vst.c, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-ldst-one.c

rebase

Created using spr 1.3.7
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+1,906-2,1968 files not shown
+2,099-2,49314 files

LLVM/project 8971fcbclang/test/CodeGen arm-neon-vst.c, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-ldst-one.c

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+1,906-2,1968 files not shown
+2,099-2,49314 files

LLVM/project 365a64aclang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen arm-neon-vst.c

[CIR][AArch64] Upstream store (vst1_*/vst1q_*) NEON builtins (#209347)

Related to https://github.com/llvm/llvm-project/issues/185382

CIR lowering for store intrinsics (`vst1_*`/`vst1q_*`)
(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#store)

Port tests:
- `clang/test/CodeGen/AArch64/neon-intrinsics.c`
-  `clang/test/CodeGen/AArch64/neon-ldst-one.c`
-  `clang/test/CodeGen/AArch64/poly64.c`
-  `clang/test/CodeGen/arm-neon-vst.c`

to `clang/test/CodeGen/AArch64/neon/store.c`
DeltaFile
+1,486-0clang/test/CodeGen/AArch64/neon/store.c
+4-1,011clang/test/CodeGen/arm-neon-vst.c
+0-660clang/test/CodeGen/AArch64/neon-intrinsics.c
+0-381clang/test/CodeGen/AArch64/neon-ldst-one.c
+61-13clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+0-24clang/test/CodeGen/AArch64/poly64.c
+1,551-2,0896 files

LLVM/project 59e6776llvm/lib/Target/AArch64 AArch64PointerAuth.cpp

[llvm][AArch64] Refactor emitPACCFI into decoratePACWithCFI/emitAUTCFI. NFC (#209948)
DeltaFile
+84-59llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+84-591 files

LLVM/project a8fd451llvm/lib/Transforms/Vectorize LoadStoreVectorizer.cpp, llvm/test/Transforms/LoadStoreVectorizer/NVPTX merge-across-side-effects.ll

[LSV] Don't vectorize load chains across ordered atomics (#208631)

When the LoadStoreVectorizer finds a chain of loads to merge into a
single vectorized load, it hoists all of the constituent loads up to the
location of the first load in the chain.

This is obviously not safe if there are any may-alias stores in the
middle of the chain. But it's *also* not safe if there are `acquire`
*loads* in the middle of the chain.

There's a similar problem with stores. A chain of stores is vectorized
by merging them all into the final store in the chain. This is not safe
if there is an intervening `release` store.
DeltaFile
+353-53llvm/test/Transforms/LoadStoreVectorizer/NVPTX/merge-across-side-effects.ll
+4-2llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp
+357-552 files

LLVM/project 0bb0407flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

rebase

Created using spr 1.3.7
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project ccf3219flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project acfea48flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

rebase

Created using spr 1.3.7
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project 932a9e5flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project 406f2f9flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

rebase

Created using spr 1.3.7
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project 844bf89flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project c9bac2cflang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

rebase

Created using spr 1.3.7
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project ed2a5d5flang/lib/Lower Bridge.cpp, llvm/test/CodeGen/AMDGPU lower-buffer-fat-pointers-contents-legalization.ll lower-buffer-fat-pointers-contents-legalization-alignment.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-428flang/lib/Lower/Bridge.cpp
+176-176llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization.ll
+129-129llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-contents-legalization-alignment.ll
+241-0mlir/lib/Dialect/EmitC/Transforms/MLGOAddReflectionMap.cpp
+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+875-842300 files not shown
+2,988-2,259306 files

LLVM/project 094a727llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU udivrem24.ll div-rem-fast-path.ll

[AMDGPU] Calculate div/rem with frcp more efficiently (#210684)

Integer division q = a/b can be implemented by fp reciprocal with:
fq = fa * recip(fb)
fq is truncated to produce q. Due to fp rounding and reciprocal accuracy
issues fq can be too small and truncation can produce a value too small
by one.

If abs(a)<=0x400000, this underestimate can be guarded more efficiently
by calculating:
fq=fa+1ulp/b
If abs(a)<=0x400000, adding 1 ulp will increase a by at most 0.5, so the
calculated q will be the same. Adding 1ulp can be done with one integer
add.

This change is analogous to the change done in
https://github.com/llvm/llvm-project/pull/204950 but in
AMDGPUISelLowering.cpp.

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+63-91llvm/test/CodeGen/AMDGPU/udivrem24.ll
+51-102llvm/test/CodeGen/AMDGPU/div-rem-fast-path.ll
+31-54llvm/test/CodeGen/AMDGPU/sdiv.ll
+16-51llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+23-38llvm/test/CodeGen/AMDGPU/udiv.ll
+7-13llvm/test/CodeGen/AMDGPU/med3-knownbits.ll
+191-3496 files

LLVM/project 1df8a2cllvm/utils/gn/secondary/compiler-rt/lib BUILD.gn, llvm/utils/gn/secondary/compiler-rt/lib/asan BUILD.gn

[gn] port 83ba8addf6 (sanitizer_ignorelists) (#210776)
DeltaFile
+11-0llvm/utils/gn/secondary/compiler-rt/lib/sanitizer_ignorelists/BUILD.gn
+1-6llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
+0-7llvm/utils/gn/secondary/compiler-rt/lib/cfi/BUILD.gn
+1-2llvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
+0-1llvm/utils/gn/secondary/compiler-rt/test/asan/BUILD.gn
+13-165 files

LLVM/project a01ff35libunwind/src DwarfParser.hpp DwarfInstructions.hpp, libunwind/test ra_sign_state.pass.cpp

[libunwind] Fix exposure of UNW_AARCH64_RA_SIGN_STATE through _Unwind_GetGR (#209947)

The pseudo register was previously hacked in under kRegisterIsUndefined, leaving it in a state that was only accessible from within the unwinder itself.
To fix this, allowing external access to the state (and therefore tests!), we invent a new register location kRegisterIsPseudo to record the additional state that the register has been defined by a .cfi_negate_ra_state opcode having been executed.
DeltaFile
+164-0libunwind/test/ra_sign_state.pass.cpp
+6-5libunwind/src/DwarfParser.hpp
+8-0libunwind/src/DwarfInstructions.hpp
+178-53 files

LLVM/project dd0b48cmlir/lib/Dialect/OpenACC/Utils OpenACCUtilsCG.cpp, mlir/test/Dialect/OpenACC acc-cg-to-gpu-worker-private-foldable-nw.mlir

[OpenACC] Support dynamic worker-private shared memory (#210770)

Use the maximum ThreadY width when the runtime worker count prevents
exact static sizing.
DeltaFile
+30-0mlir/test/Dialect/OpenACC/acc-cg-to-gpu-worker-private-foldable-nw.mlir
+16-9mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
+15-5mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
+1-0mlir/unittests/Dialect/OpenACC/CMakeLists.txt
+62-144 files

OPNSense/core 3086a70src/etc/inc filter.lib.inc filter.inc, src/etc/inc/plugins.inc.d pf.inc openvpn.inc

firewall: pluginify filter_core_get_default_nat_outbound_networks()

With this we can collect all networks eligible for outbound/source
NAT.  The issue, however, is two-fold:

1. On the one hand we need all the internal networks to NAT.
2. On the other hand we need all the external interfaces to NAT over.

The first part is relatively easy, but the second part overloads
the function output.  It would probably be nicer to return a rule
structure, but that would imply moving the rules generation around
a bit, likely inside $fw and then we still have to offer it to
MVC and fix the legacy page to use the same data feed.
DeltaFile
+0-31src/etc/inc/filter.lib.inc
+24-0src/etc/inc/plugins.inc.d/pf.inc
+24-0src/etc/inc/plugins.inc.d/openvpn.inc
+21-0src/etc/inc/plugins.inc.d/ipsec.inc
+2-10src/etc/inc/filter.inc
+2-5src/www/firewall_nat_out.php
+73-466 files

LLVM/project f010423compiler-rt/lib/scudo/standalone combined.h primary64.h, compiler-rt/lib/scudo/standalone/tests combined_test.cpp error_info_test.cpp

[scudo] Remove dead code and other small cleanups. (#210454)

Some dead code from the error info refactor is still around, so delete
that. Also cleanup spelling and spacing.

Modified the tests to use TestOnly functions so it's clear what is
actually used.
DeltaFile
+30-47compiler-rt/lib/scudo/standalone/combined.h
+2-60compiler-rt/lib/scudo/standalone/primary64.h
+12-45compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
+0-9compiler-rt/lib/scudo/standalone/primary32.h
+1-2compiler-rt/lib/scudo/standalone/tests/error_info_test.cpp
+1-1compiler-rt/lib/scudo/standalone/mem_map_linux.cpp
+46-1646 files

FreeBSD/ports 1112f84www/gatus Makefile, www/gatus/files newsyslog.conf gatus.in

www/gatus: Add newsyslog.conf(5) file for log rotation

* To implement log rotation, daemon(8) is configured to accept the
  SIGHUP signal in order to reopen the log file, and the PID of the
  daemon(8) process is recorded in its own PID file so that
  newsyslog(8) can rotate the log.
* Change `-t "${desc}"` to `-t "${name}: ${desc}"` to be more
  descriptive.

PR:             296710
Reported by:    yds at Necessitu.de
DeltaFile
+5-2www/gatus/Makefile
+6-0www/gatus/files/newsyslog.conf
+2-1www/gatus/files/gatus.in
+13-33 files

LLVM/project 69baca1llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

Merge branch 'main' into users/arsenm/runtime-libcalls/composable-predicates
DeltaFile
+9,398-9,218llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+6,993-6,921llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+5,803-5,808llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+3,842-3,722llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
+2,196-5,244llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
+3,572-3,745llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+31,804-34,6581,081 files not shown
+158,623-115,4801,087 files

FreeNAS/freenas 0fcd519src/middlewared/middlewared/plugins/cloud_sync __init__.py

Fix circular import
DeltaFile
+1-1src/middlewared/middlewared/plugins/cloud_sync/__init__.py
+1-11 files