[X86] Make ISD::ROTL/ROTR vector rotates legal on XOP+AVX512 targets (#184587)
Similar to what we did for funnel shifts on #166949 - set vector rotates
as legal on XOP (128-bit ROTL) and AVX512 (vXi32/vXi64 ROTL/ROTR)
targets, and custom fold to X86ISD::VROTLI/VROTRI as a later fixup.
128/256-bit vector widening to 512-bit instructions is already fully
supported + tested on AVX512F-only targets
First part of #184002
py-pallets-sphinx-themes: updated to 2.5.0
Version 2.5.0
- Use Atkinson Hyperlegible font.
- Click theme does not use monospace font for body.
- Use local font files instead of Google Fonts.
Version 2.4.0
- Fix compatibility with Sphinx >= 9.0.
- Require Sphinx >= 7.3.
[AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (#183025)
Use the same VT as the SETcc source, or fall back to using the VT of the
unextended operand of the CTPOP if the element size of the SETcc is too
small to fit the negative popcount.
libtorrent rtorrent: updated to 0.16.7
0.16.7
This release fixes various issues with libcurl and polling, and disables
libcurl connection cache due to insufficient api to strictly handle sockets
events.
riscv: save FPE state in cpu_fork().
Save the Floating Point Extension (FPE) state before copying struct pcb.
Reviewed by: br
Differential Revision: https://reviews.freebsd.org/D53804
[AArch64] Fix SVE cost model for various math intrinsics (#184358)
The implementation of getIntrinsicInstrCost in BasicTTIImpl
assumes that for some intrinsics if we're using custom
lowering for the equivalent DAG node that the cost needs to
be 2, instead of 1 for legal ops. However, even though we
use custom lowering for these scalable vector operations
when SVE is available, we still end up generating the same
efficient codegen as fixed-width. This patch deals with a
few obvious intrinsics that we know get lowered to something
sensible and return the same cost as NEON, i.e. 1.
[llvm-objdump] Default --symbolize-operands for BPF (#184043)
BPF users expect to see basic block labels (e.g. <L0>, <L1>) in
disassembly output
(https://github.com/llvm/llvm-project/pull/95103#issuecomment-3771234810).
Default --symbolize-operands to on for BPF targets when neither
--symbolize-operands nor --no-symbolize-operands is explicitly
specified.
Add --no-symbolize-operands to allow users to opt out.
