OpenBSD/ports SoU3LYYnet/neochat Makefile

   mfc missing dep
VersionDeltaFile
1.33.2.1+3-0net/neochat/Makefile
+3-01 files

OpenBSD/src K3yeuGpusr.sbin/installboot efi_bootmgr.c

   in error message, say what could not be opened
VersionDeltaFile
1.7+2-2usr.sbin/installboot/efi_bootmgr.c
+2-21 files

OpenBSD/ports 5Fyhzr2sysutils/obsdfreqd Makefile distinfo

   update to obsdfreqd-1.2.2 (doc change only)
   from Florian Viehweger (maintainer), tweak by me to use DIST_TUPLE for sr.ht
VersionDeltaFile
1.12+2-5sysutils/obsdfreqd/Makefile
1.6+2-2sysutils/obsdfreqd/distinfo
+4-72 files

LLVM/project 89d1143mlir/include/mlir/Dialect/GPU/Pipelines Passes.h, mlir/lib/Dialect/GPU/Pipelines GPUToXeVMPipeline.cpp CMakeLists.txt

[mlir][gpu]Add GPUToXeVM lowering pipeline pass. (#161216)

It's the default GPU to XeVM lowering pipeline. It starts by lowering
GPU code to the specified compilation target (default is fatbin), then
lowers the host code.
If XeGPU ops are used, it expects the MLIR code to have XeGPU ops
already embedded in gpu code.
DeltaFile
+151-0mlir/test/Integration/Dialect/XeGPU/WG/simple_gemm.mlir
+139-0mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
+121-0mlir/test/Integration/Dialect/XeGPU/LANE/simple_gemm.mlir
+120-0mlir/test/Integration/Dialect/XeGPU/SG/simple_gemm.mlir
+55-2mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
+6-0mlir/lib/Dialect/GPU/Pipelines/CMakeLists.txt
+592-24 files not shown
+605-210 files

FreeNAS/freenas 4767c6ctests/api2 test_audit_sudo.py

Robustize sudo test runargv handling
DeltaFile
+14-6tests/api2/test_audit_sudo.py
+14-61 files

OpenBSD/ports G904F1pnet/neochat Makefile

   Add missing dependency on kf6-prison

   Spotted by Nicholas Schmidt, thanks
VersionDeltaFile
1.34+3-0net/neochat/Makefile
+3-01 files

FreeNAS/freenas cff235csrc/middlewared/middlewared/plugins truesearch.py smb.py, src/middlewared/middlewared/plugins/truecommand update.py

Address review
DeltaFile
+47-26src/middlewared/middlewared/plugins/truesearch.py
+8-2tests/api2/test_truesearch.py
+5-5src/middlewared/middlewared/pytest/unit/plugins/test_truesearch.py
+2-3src/middlewared/middlewared/plugins/smb.py
+2-0src/middlewared/middlewared/plugins/truecommand/update.py
+64-365 files

OpenBSD/ports JTkPxsoshells/dash distinfo Makefile

   Bugfix update to dash-0.5.13.1
VersionDeltaFile
1.14+2-2shells/dash/distinfo
1.20+1-1shells/dash/Makefile
+3-32 files

LLVM/project e6acc3aclang/test/Driver aarch64-v96a.c aarch64-v97a.c, llvm/lib/Target/AArch64 AArch64Features.td

[AArch64][llvm] Relax mandatory features for Armv9.6-A

`FEAT_FPRCVT` is moved from being mandatory in Armv9.6-A to Armv9.7-A
`FEAT_SVE2p2` is removed from being mandatory in Armv9.6-A
DeltaFile
+4-4llvm/lib/Target/AArch64/AArch64Features.td
+2-2clang/test/Driver/aarch64-v96a.c
+2-2clang/test/Driver/aarch64-v97a.c
+8-83 files

LLVM/project 9f3123allvm/lib/Target/AArch64 AArch64InstrInfo.td

(NFC) Tidy up alignment/formatting in AArch64/AArch64InstrInfo.td

It was noted in a code-review for earlier changes in this stack
that some of the new 9.7 entries were mis-aligned. But actually,
many of the entries were, so I've tidied them all up.
DeltaFile
+104-123llvm/lib/Target/AArch64/AArch64InstrInfo.td
+104-1231 files

LLVM/project 66ed4fcllvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/test/MC/AArch64 armv8.4a-mpam.s

[AArch64][llvm] Remove FeatureMPAM guards for parity with gcc

Remove `AArch64::FeatureMPAM` guards from some MPAM system registers,
since these system registers are not any under feature guard for gcc.
DeltaFile
+0-57llvm/test/MC/AArch64/armv8.4a-mpam.s
+18-21llvm/test/MC/Disassembler/AArch64/armv8.4a-mpam.txt
+0-2llvm/lib/Target/AArch64/AArch64SystemOperands.td
+18-803 files

LLVM/project c9a728dllvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations

The code in tryParseVectorList() should only apply to `luti6` instructions
DeltaFile
+7-5llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+7-51 files

LLVM/project d2b43dallvm/lib/Target/AArch64 SMEInstrFormats.td SVEInstrFormats.td, llvm/test/MC/AArch64/SME2p3 luti6.s luti6-diagnostics.s

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations

Add instructions for SVE2p3 LUTI6 operations:
  - LUTI6 (16-bit)
  - LUTI6 (8-bit)
  - LUTI6 (vector, 16-bit)
  - LUTI6 (table, four registers, 8-bit)
  - LUTI6 (table, single, 8-bit)

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
DeltaFile
+472-0llvm/test/MC/AArch64/SME2p3/luti6.s
+176-0llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
+115-0llvm/test/MC/AArch64/SVE2p3/luti6.s
+74-0llvm/lib/Target/AArch64/SMEInstrFormats.td
+70-0llvm/test/MC/AArch64/SVE2p3/luti6-diagnostics.s
+31-4llvm/lib/Target/AArch64/SVEInstrFormats.td
+938-45 files not shown
+977-411 files

LLVM/project 3a2ad10llvm/lib/Target/AArch64 AArch64InstrInfo.td

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations

Fix accidental typo
DeltaFile
+1-1llvm/lib/Target/AArch64/AArch64InstrInfo.td
+1-11 files

LLVM/project 7dbb90bllvm/test/MC/AArch64/SVE2p3 qshrn-diagnostics.s

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 shift operations

Add extra testcases for non-consecutive vectors, and sort out movprfx test
DeltaFile
+41-12llvm/test/MC/AArch64/SVE2p3/qshrn-diagnostics.s
+41-121 files

LLVM/project 45d7147llvm/lib/Target/AArch64 SVEInstrFormats.td AArch64SVEInstrInfo.td, llvm/test/MC/AArch64/SVE2p3 qshrn-diagnostics.s qshrn.s

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 shift operations

Add instructions for SVE2p3 shift operations:
  - SQRSHRN
  - SQRSHRUN
  - SQSHRN
  - SQSHRUN
  - UQRSHRN
  - UQSHRN

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
DeltaFile
+266-0llvm/test/MC/AArch64/SVE2p3/qshrn-diagnostics.s
+255-0llvm/test/MC/AArch64/SVE2p3/qshrn.s
+15-7llvm/lib/Target/AArch64/SVEInstrFormats.td
+14-3llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+550-104 files

LLVM/project 7e8b93ellvm/lib/Target/AArch64 SVEInstrFormats.td AArch64SVEInstrInfo.td, llvm/test/MC/AArch64/SME2p3 luti6-diagnostics.s

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations

Test movprfx properly and remove parameters from sve2_luti6_vector
since it's only used once.
DeltaFile
+8-8llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
+8-8llvm/test/MC/AArch64/SVE2p3/luti6-diagnostics.s
+4-8llvm/lib/Target/AArch64/SVEInstrFormats.td
+1-1llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+21-254 files

LLVM/project bdfa935llvm/test/MC/AArch64/SVE2p3 cvt.s cvt-diagnostics.s

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations

CR suggestions:
  - improve comments
  - combine positive and negative testcases into 2 files
  - add tests for fcvtzsn if Zd is a multiple of 2
DeltaFile
+336-0llvm/test/MC/AArch64/SVE2p3/cvt.s
+193-0llvm/test/MC/AArch64/SVE2p3/cvt-diagnostics.s
+0-165llvm/test/MC/AArch64/SVE2p3/fcvtz.s
+0-93llvm/test/MC/AArch64/SVE2p3/scvtf.s
+0-93llvm/test/MC/AArch64/SVE2p3/ucvtf.s
+0-65llvm/test/MC/AArch64/SVE2p3/ucvtf-diagnostics.s
+529-4163 files not shown
+531-5389 files

LLVM/project 47a0801llvm/lib/Target/AArch64 AArch64InstrFormats.td, llvm/test/MC/AArch64 neon-fdot.s neon-fdot-diagnostics.s

[AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions

Add support for new Advanced SIMD (Neon) instructions:
 - FDOT (half-precision to single-precision, by element)
 - FDOT (half-precision to single-precision, vector)
 - FMMLA (half-precision, non-widening)
 - FMMLA (widening, half-precision to single-precision)

as documented here:

 * https://developer.arm.com/documentation/ddi0602/2025-09/
 * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

Co-authored-by: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Co-authored-by: Virginia Cangelosi <virginia.cangelosi at arm.com>
DeltaFile
+147-0llvm/test/MC/AArch64/neon-fdot.s
+59-0llvm/test/MC/AArch64/neon-fdot-diagnostics.s
+40-2llvm/lib/Target/AArch64/AArch64InstrFormats.td
+37-0llvm/test/MC/AArch64/neon-fmmla-HtoS.s
+37-0llvm/test/MC/AArch64/neon-fmmla.s
+29-3llvm/unittests/TargetParser/TargetParserTest.cpp
+349-57 files not shown
+424-713 files

LLVM/project 26f5cd9llvm/test/MC/AArch64/SVE2p3 fcvtz.s ucvtf.s

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations

Add instructions for SVE2p3 CVT operations:
  - FCVTZSN
  - FCVTZUN
  - SCVTF
  - SCVTFLT
  - UCVTF
  - UCVTFLT

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
DeltaFile
+165-0llvm/test/MC/AArch64/SVE2p3/fcvtz.s
+93-0llvm/test/MC/AArch64/SVE2p3/ucvtf.s
+93-0llvm/test/MC/AArch64/SVE2p3/scvtf.s
+65-0llvm/test/MC/AArch64/SVE2p3/scvtf-diagnostics.s
+65-0llvm/test/MC/AArch64/SVE2p3/ucvtf-diagnostics.s
+55-0llvm/test/MC/AArch64/SVE2p3/fcvtz-diagnostics.s
+536-02 files not shown
+591-08 files

LLVM/project 6f7d623llvm/lib/Target/AArch64 SVEInstrFormats.td, llvm/test/MC/AArch64/SVE2p2 fmmla-diagnostics.s

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations

Remove tests which aren't useful after CR comments
DeltaFile
+0-51llvm/test/MC/AArch64/SVE2p3/dot-diagnostics.s
+0-15llvm/test/MC/AArch64/SVE2p3/bfmmla-diagnostics.s
+0-15llvm/test/MC/AArch64/SVE2p2/fmmla-diagnostics.s
+1-1llvm/lib/Target/AArch64/SVEInstrFormats.td
+1-824 files

LLVM/project dca8753llvm/lib/Target/AArch64 AArch64InstrFormats.td

fixup! [AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions

Remove timm32_1_16 and timm32_1_8, as they're superfluous.
DeltaFile
+0-15llvm/lib/Target/AArch64/AArch64InstrFormats.td
+0-151 files

LLVM/project 3518e53llvm/test/MC/AArch64/SVE2p3 cvt.s

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations

Remove superfluous RUN lines
DeltaFile
+0-15llvm/test/MC/AArch64/SVE2p3/cvt.s
+0-151 files

LLVM/project 7d52040llvm/lib/Target/AArch64 SVEInstrFormats.td, llvm/test/MC/AArch64/SVE2p2 fmmla.s

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations

Add instructions for SVE2p3 DOT and MLA operations:
  - BFMMLA (non-widening)
  - FMMLA (non-widening)
  - SDOT (2-way, vectors)
  - SDOT (2-way, indexed)
  - UDOT (2-way, vectors)
  - UDOT (2-way, indexed)

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
DeltaFile
+188-0llvm/test/MC/AArch64/SVE2p3/dot-diagnostics.s
+173-0llvm/test/MC/AArch64/SVE2p3/dot.s
+45-0llvm/test/MC/AArch64/SVE2p3/bfmmla.s
+45-0llvm/test/MC/AArch64/SVE2p2/fmmla.s
+25-11llvm/lib/Target/AArch64/SVEInstrFormats.td
+34-0llvm/test/MC/AArch64/SVE2p3/bfmmla-diagnostics.s
+510-1112 files not shown
+600-2718 files

LLVM/project 80b1eccllvm/lib/Target/AArch64 SVEInstrFormats.td AArch64SVEInstrInfo.td, llvm/test/MC/AArch64/SVE2p3 arithmetic.s arithmetic-diagnostics.s

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 arithmetic operations

Add instructions for SVE2p3 arithmetic operations:
  - `ADDQP`    (add pairwise within quadword vector segments)
  - `ADDSUBP`  (add subtract pairwise)
  - `SABAL`    (two-way signed absolute difference sum and accumulate long)
  - `SUBP`     (subtract pairwise)
  - `UABAL`    (two-way unsigned absolute difference sum and accumulate long)

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
DeltaFile
+275-0llvm/test/MC/AArch64/SVE2p3/arithmetic.s
+147-0llvm/test/MC/AArch64/SVE2p3/arithmetic-diagnostics.s
+19-13llvm/lib/Target/AArch64/SVEInstrFormats.td
+18-0llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+14-1llvm/unittests/TargetParser/TargetParserTest.cpp
+10-3llvm/lib/Target/AArch64/AArch64.td
+483-178 files not shown
+530-2114 files

LLVM/project 6df6741clang/test/Driver aarch64-v97a.c

fixup! [AArch64][llvm] Armv9.7-A: Add support for GICv5 (FEAT_GCIE)

Move FEAT_GCIE from VFAT
DeltaFile
+3-3clang/test/Driver/aarch64-v97a.c
+3-31 files

LLVM/project a154f34llvm/test/MC/AArch64 arm-mtetc.s armv9.7a-mtetc.s

fixup! [AArch64][llvm] Armv9.7-A: Add support for Virtual Memory Tagging (FEAT_MTETC)

Add llvm/test/MC/AArch64/armv9.7a-mtetc-diagnostics.s
DeltaFile
+0-29llvm/test/MC/AArch64/arm-mtetc.s
+29-0llvm/test/MC/AArch64/armv9.7a-mtetc.s
+16-0llvm/test/MC/AArch64/armv9.7a-mtetc-diagnostics.s
+45-293 files

LLVM/project 7f76075clang/test/Driver aarch64-v97a.c, llvm/lib/Target/AArch64 AArch64SystemOperands.td AArch64Features.td

[AArch64][llvm] Armv9.7-A: Add support for Virtual Memory Tagging (FEAT_MTETC)

Add the following instructions for `FEAT_MTETC`, which is a part of
`FEAT_VMTE` for Virtual Tagging:
  * `DC ZGBVA`
  * `DC GBVA`

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions
DeltaFile
+29-0llvm/test/MC/AArch64/arm-mtetc.s
+6-0llvm/lib/Target/AArch64/AArch64SystemOperands.td
+4-0clang/test/Driver/aarch64-v97a.c
+3-1llvm/unittests/TargetParser/TargetParserTest.cpp
+3-0llvm/lib/Target/AArch64/AArch64Features.td
+2-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+47-12 files not shown
+49-18 files

LLVM/project 6e2cf5cllvm/lib/Target/AArch64/Utils AArch64BaseInfo.cpp

fixup! [AArch64][llvm] Armv9.7-A: Add support for Memory Partitioning and Management (FEAT_MPAMv2)

Remove blank link that trips up git-clang-format
DeltaFile
+0-1llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
+0-11 files

LLVM/project 0510af0llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Armv9.7-A: Add support for Memory Partitioning and Management (FEAT_MPAMv2)

Add new instructions and system registers for `FEAT_MPAMv2`:
  * MLBI ALLE1
  * MLBI VMALLE1
  * MLBI VPIDE1, <Xt>
  * MLBI VPMGE1, <Xt>

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
DeltaFile
+126-0llvm/test/MC/AArch64/armv9.7a-mpamv2.s
+52-7llvm/lib/Target/AArch64/AArch64SystemOperands.td
+2-46llvm/test/MC/AArch64/armv8.4a-mpam.s
+20-13llvm/test/MC/Disassembler/AArch64/armv8.4a-mpam.txt
+21-6llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+11-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+232-728 files not shown
+268-7214 files