BSD Commit Log Search

   mfc missing dep

   in error message, say what could not be opened

   update to obsdfreqd-1.2.2 (doc change only)
   from Florian Viehweger (maintainer), tweak by me to use DIST_TUPLE for sr.ht

[mlir][gpu]Add GPUToXeVM lowering pipeline pass. (#161216)

It's the default GPU to XeVM lowering pipeline. It starts by lowering
GPU code to the specified compilation target (default is fatbin), then
lowers the host code.
If XeGPU ops are used, it expects the MLIR code to have XeGPU ops
already embedded in gpu code.

Robustize sudo test runargv handling

   Add missing dependency on kf6-prison

   Spotted by Nicholas Schmidt, thanks

Address review

   Bugfix update to dash-0.5.13.1

[AArch64][llvm] Relax mandatory features for Armv9.6-A

`FEAT_FPRCVT` is moved from being mandatory in Armv9.6-A to Armv9.7-A
`FEAT_SVE2p2` is removed from being mandatory in Armv9.6-A

(NFC) Tidy up alignment/formatting in AArch64/AArch64InstrInfo.td

It was noted in a code-review for earlier changes in this stack
that some of the new 9.7 entries were mis-aligned. But actually,
many of the entries were, so I've tidied them all up.

[AArch64][llvm] Remove FeatureMPAM guards for parity with gcc

Remove `AArch64::FeatureMPAM` guards from some MPAM system registers,
since these system registers are not any under feature guard for gcc.

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations

The code in tryParseVectorList() should only apply to `luti6` instructions

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations

Add instructions for SVE2p3 LUTI6 operations:
  - LUTI6 (16-bit)
  - LUTI6 (8-bit)
  - LUTI6 (vector, 16-bit)
  - LUTI6 (table, four registers, 8-bit)
  - LUTI6 (table, single, 8-bit)

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations

Fix accidental typo

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 shift operations

Add extra testcases for non-consecutive vectors, and sort out movprfx test

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 shift operations

Add instructions for SVE2p3 shift operations:
  - SQRSHRN
  - SQRSHRUN
  - SQSHRN
  - SQSHRUN
  - UQRSHRN
  - UQSHRN

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 LUTI6 operations

Test movprfx properly and remove parameters from sve2_luti6_vector
since it's only used once.

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations

CR suggestions:
  - improve comments
  - combine positive and negative testcases into 2 files
  - add tests for fcvtzsn if Zd is a multiple of 2

[AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions

Add support for new Advanced SIMD (Neon) instructions:
 - FDOT (half-precision to single-precision, by element)
 - FDOT (half-precision to single-precision, vector)
 - FMMLA (half-precision, non-widening)
 - FMMLA (widening, half-precision to single-precision)

as documented here:

 * https://developer.arm.com/documentation/ddi0602/2025-09/
 * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

Co-authored-by: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Co-authored-by: Virginia Cangelosi <virginia.cangelosi at arm.com>

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations

Add instructions for SVE2p3 CVT operations:
  - FCVTZSN
  - FCVTZUN
  - SCVTF
  - SCVTFLT
  - UCVTF
  - UCVTFLT

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations

Remove tests which aren't useful after CR comments

fixup! [AArch64][llvm] Armv9.7-A: Add support for new Advanced SIMD (Neon) instructions

Remove timm32_1_16 and timm32_1_8, as they're superfluous.

fixup! [AArch64][llvm] Armv9.7-A: Add support for SVE2p3 CVT operations

Remove superfluous RUN lines

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 DOT and MLA operations

Add instructions for SVE2p3 DOT and MLA operations:
  - BFMMLA (non-widening)
  - FMMLA (non-widening)
  - SDOT (2-way, vectors)
  - SDOT (2-way, indexed)
  - UDOT (2-way, vectors)
  - UDOT (2-way, indexed)

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

[AArch64][llvm] Armv9.7-A: Add support for SVE2p3 arithmetic operations

Add instructions for SVE2p3 arithmetic operations:
  - `ADDQP`    (add pairwise within quadword vector segments)
  - `ADDSUBP`  (add subtract pairwise)
  - `SABAL`    (two-way signed absolute difference sum and accumulate long)
  - `SUBP`     (subtract pairwise)
  - `UABAL`    (two-way unsigned absolute difference sum and accumulate long)

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

fixup! [AArch64][llvm] Armv9.7-A: Add support for GICv5 (FEAT_GCIE)

Move FEAT_GCIE from VFAT

fixup! [AArch64][llvm] Armv9.7-A: Add support for Virtual Memory Tagging (FEAT_MTETC)

Add llvm/test/MC/AArch64/armv9.7a-mtetc-diagnostics.s

[AArch64][llvm] Armv9.7-A: Add support for Virtual Memory Tagging (FEAT_MTETC)

Add the following instructions for `FEAT_MTETC`, which is a part of
`FEAT_VMTE` for Virtual Tagging:
  * `DC ZGBVA`
  * `DC GBVA`

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

fixup! [AArch64][llvm] Armv9.7-A: Add support for Memory Partitioning and Management (FEAT_MPAMv2)

Remove blank link that trips up git-clang-format

[AArch64][llvm] Armv9.7-A: Add support for Memory Partitioning and Management (FEAT_MPAMv2)

Add new instructions and system registers for `FEAT_MPAMv2`:
  * MLBI ALLE1
  * MLBI VMALLE1
  * MLBI VPIDE1, <Xt>
  * MLBI VPMGE1, <Xt>

as documented here:

  * https://developer.arm.com/documentation/ddi0602/2025-09/
  * https://developer.arm.com/documentation/109697/2025_09/2025-Architecture-Extensions

Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>