[Headers][X86] __builtin_ia32_pmovwb128_mask is not constexpr (#174985)
Appears to be a copy+paste type - most of the x86 masked truncation intrinsics still can't be made constexpr at this time
Fixes #166814
[SDPatternMatch] Add m_FAbs matcher (#174975)
Adds a pattern matcher for floating-point absolute value (ISD::FABS),
following the same pattern as m_Abs for integer absolute value.
Fixes #174751
[compiler-rt][AArch64] Exit early from __arm_za_disable. (#174942)
Because `__arm_za_disable` is a private-ZA function, it's only ever
entered with ZA state `off` or `dormant`. If the state is `off` then we
can safely return and there is no need to call `__arm_tpidr2_save` or to
explicitly set PSTATE.ZA or TPIDR2_EL0 to zero.
[libc++][NFC] Update <any> to a more modern code style (#174619)
This patch refactors `enable_if`s inside `<any>` to use the `..., int> =
0` variant that we try to use throughout the code base and inlines some
of the functions into the class body to avoid duplicating the
`enable_if`s.
amd64: Remove tpm(4) from GENERIC for now
It breaks suspend/resume and no one has had time to investigate and fix
it.
PR: 291067
Reviewed by: emaste
Fixes: 3deb21f1afd5 ("random: TPM_HARVEST should have been named RANDOM_ENABLE_TPM")
Differential Revision: https://reviews.freebsd.org/D54587
[Clang] expunge `trivially_relocate_if_eligible` (#174344)
In Kona, WG21 decided to revert trivial relocation (P2786).
Keep the notion of relocatability
(used in the wild and likely to come back),
but remove the keyword which is no longer conforming
[mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (#174983)
This is a fix for the asan bot after
https://github.com/llvm/llvm-project/pull/174386
Failing bot: https://lab.llvm.org/buildbot/#/builders/24/builds/16371
This commit undoes a simplification I thought reduced copied+pasted
code. I will merge it like this now to unblock the bot, and then work
separately on a different way to share code between both callbacks.
[AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass
In some cases, the placeholder itself can be used as the value for its corresponding block in `SSAUpdater`, and later used as an incoming value in another block in `GetValueInMiddleOfBlock`. If we erase it too early, this can lead to a use-after-erase. The tricky part is that it may not trigger any error right away, but can cause weird and completely unrelated issues later in the pipeline.
[PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (#152632)
On PowerPC targets, `half` uses the default legalization of promoting to
a `f32`. However, this has some fundamental issues related to inability
to round trip. Resolve this by switching to the soft legalization, which
passes `f16` as an `i16`.
The PowerPC ABI Specification does not define a `_Float16` type, so the
calling convention changes are acceptable.
Fixes the PowerPC part of
https://github.com/llvm/llvm-project/issues/97975
Fixes the PowerPC part of
https://github.com/llvm/llvm-project/issues/97981
[SystemZ][z/OS] Improve use of formatv (#174503)
Using a `raw_svector_ostream` object is not necessary, because this is
hidden in the conversion function. In addition, there is no need to
reason about a zero termination of the string. Declaring the ascii and
ebcdic version of the string variables at the same time makes sure that
both strings are allocated with the same size.
[flang] Check for errors when analyzing array constructors (#173092)
Errors in array constructor values result in the array having
less elements than it should, which can cause other errors that
will confuse the user. Avoid this by not returning an expression
on errors.
Fixes #127425
[AMDGPU] Add intrinsic exposing s_alloc_vgpr
Make it possible to use `s_alloc_vgpr` at the IR level. This is a huge
footgun and use for anything other than compiler internal purposes is
heavily discouraged. The calling code must make sure that it does not
allocate fewer VGPRs than necessary - the intrinsic is NOT a request to
the backend to limit the number of VGPRs it uses (in essence it's not so
different from what we do with the dynamic VGPR flags of the
`amdgcn.cs.chain` intrinsic, it just makes it possible to use this
functionality in other scenarios).
Revert "[BAZEL] Move FuncTransformsPassIncGen to CAPIIR header dep (#174982)"
This reverts commit 46d0862773ac3ac07fd1a8abe76db623b26d7d45.
This previously landed a couple commits ago and now duplicates the dep,
breaking the bazel build.
17762 sfxge: variable dereferenced before check
Reviewed by: Jason King <jason.brian.king at gmail.com>
Reviewed by: Marco van Wieringen <marco.van.wieringen at planets.elm.net>
Approved by: Patrick Mooney <pmooney at pfmooney.com>
[IRCE] Prove predicates with and without loop-guarded SCEVs (#174843)
IRCE may fail to prove predicates when loop bounds are rewritten by
LoopConstrainer::applyLoopGuards(). In such cases, simple predicates
(e.g. %start < %limit) become obscured by strengthened SCEV expressions,
even though they are trivially implied by the guard in the loop
preheader.
See: https://github.com/llvm/llvm-project/issues/167827
This change makes IRCE attempt to prove predicates both on the original
SCEVs and on the guarded SCEVs, preventing incorrect rejection of loops
with safe bounds.
