LLVM/project e5affbd — bolt/lib/Profile DataAggregator.cpp, bolt/test/X86 perf-script-lbr.test

[BOLT] Prevent LBR parsing from crossing entry boundaries (#234216)

#202813 assumed that LBR entries strictly follow the
`FROM/TO/EVENT/INTX/ABORT/CYCLES/TYPE/SPEC` format. But the `TYPE/SPEC`
fields might not exist in older versions. This can cause the parser to
over-read into the next LBR entry, resulting in severely corrupted CFG
flow.

Therefore, this patch isolates and splits a complete LBR entry upfront
before reading its fields sequentially, which prevents parsing
misalignment and improves overall parsing efficiency.
DeltaFile
+58-0bolt/test/X86/perf-script-lbr.test
+19-32bolt/lib/Profile/DataAggregator.cpp
+77-322 files

LLVM/project 3970c05 — clang/docs ReleaseNotes.md, clang/lib/AST ItaniumMangle.cpp

[Clang] Do not assume existing substition for template specialization (#227501)

Mangled symbol is not always available when having template
specialization. For example, a template alias mangled the substituted
type when actually doing substitution. In previous code, B in```
A<B>::foo()``` is always mangled because ```A<B>``` do mangle the name.
When doing substition insides ```A<T>```, B is always available. Alias
is not the case here, B is mangled when reaching A<T> inside.

As now, TemplateName::SubstTemplateTemplateParm might needs to be
resolved further as B is not always defined, we remove it from the
switch case and find recursively like the origianl path.

Assisted-by: Claude # Tests, ReleaseNotes
DeltaFile
+14-11clang/lib/AST/ItaniumMangle.cpp
+19-0clang/test/CodeGenCXX/mangle-template.cpp
+10-0clang/docs/ReleaseNotes.md
+43-113 files

LLVM/project 48d00c6 — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+204-23llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+711-1,7666 files not shown
+772-1,79212 files

LLVM/project f482e2f — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Defer single-lane atomics to type legalization
DeltaFile
+2,376-2,410llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+2,252-2,190llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+882-958llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+57-44llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+38-45llvm/lib/CodeGen/AtomicExpandPass.cpp
+1-81llvm/test/CodeGen/NVPTX/atomicrmw-v1-type-legalization.ll
+5,606-5,7285 files not shown
+5,663-5,85511 files

LLVM/project dcd6b3a — llvm/include/llvm/Transforms/IPO Attributor.h, llvm/lib/Transforms/IPO Attributor.cpp

Attributor: Add only new attributes when manifesting

manifestAttrs collected the attributes to add in an AttrBuilder, then
copied the position's attribute set into another AttrBuilder to merge
them in. Collect them in an array and merge them into the set in one
pass. This requires the attributes passed to manifestAttrs to be sorted
like an attribute set, which all callers already do. The only one
passing more than one attribute is AMDGPUAttributor, whose implicit
argument attributes are sorted.

Instructions spent in amdgpu-attributor:
  rocPRIM test_device_scan, gfx942:          770.2M -> 710.8M (-7.7%)
  Blender Cycles HIP kernel, gfx1100:        380.0M -> 379.5M (-0.1%)
  rocPRIM 16 tests, full LTO, closed world:  3019.8M -> 2855.9M (-5.4%)

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+58-43llvm/lib/Transforms/IPO/Attributor.cpp
+3-1llvm/include/llvm/Transforms/IPO/Attributor.h
+61-442 files

LLVM/project 2a62f36 — llvm/include/llvm/IR Attributes.h, llvm/lib/IR Attributes.cpp

Review comments
DeltaFile
+50-40llvm/lib/IR/Attributes.cpp
+6-5llvm/unittests/IR/AttributesTest.cpp
+2-2llvm/include/llvm/IR/Attributes.h
+58-473 files

LLVM/project dac6fbd — llvm/include/llvm/IR Attributes.h, llvm/lib/IR AttributeImpl.h Attributes.cpp

IR: Add attributes from an array to an attribute set

Add AttributeSet::addAttributes and AttributeList::addAttributesAtIndex
overloads taking an array of attributes sorted like an attribute set,
with distinct kinds. They merge the attributes into the set in one pass,
without first copying the set into an AttrBuilder and adding each
attribute to it.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+45-15llvm/lib/IR/Attributes.cpp
+37-0llvm/unittests/IR/AttributesTest.cpp
+13-0llvm/include/llvm/IR/Attributes.h
+3-2llvm/lib/IR/AttributeImpl.h
+98-174 files

FreeBSD/ports 3ae2665 — security/openssh-portable distinfo Makefile

security/openssh-portable: Update GSSAPI from latest debian patch.

Submitted by:   Garrett Wollman
PR:             298530
DeltaFile
+3-4security/openssh-portable/Makefile
+3-1security/openssh-portable/distinfo
+6-52 files

LLVM/project 5fbf263 — llvm/test/CodeGen/NVPTX atomicrmw-v1-type-legalization.ll, llvm/test/Transforms/AtomicExpand/Mips expand-atomic-rmw-elementwise.ll

[AtomicExpand][NVPTX] Add single-lane atomic RMW coverage

Record current expansion and code generation before changing single-lane RMW legalization. Check the full pipeline separately from direct instruction selection while their output differs.
DeltaFile
+194-0llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-vector.ll
+103-0llvm/test/Transforms/AtomicExpand/Mips/expand-atomic-rmw-elementwise.ll
+81-3llvm/test/CodeGen/NVPTX/atomicrmw-v1-type-legalization.ll
+378-33 files

FreeBSD/ports 7e6315a — www/domoticz-devel pkg-plist distinfo

www/domoticz-devel: update to 2026.4.18490

Update to 2026.4.18490.
Fix stage-qa issues reported.
Update the libwebem dependency
DeltaFile
+8-6www/domoticz-devel/Makefile
+5-5www/domoticz-devel/distinfo
+0-8www/domoticz-devel/pkg-plist
+13-193 files

LLVM/project c5be83f — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+204-23llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+711-1,7666 files not shown
+772-1,79212 files

LLVM/project b35be9d — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Defer single-lane atomics to type legalization
DeltaFile
+2,376-2,410llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+2,252-2,190llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+882-958llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+57-44llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+38-45llvm/lib/CodeGen/AtomicExpandPass.cpp
+1-81llvm/test/CodeGen/NVPTX/atomicrmw-v1-type-legalization.ll
+5,606-5,7285 files not shown
+5,659-5,85911 files

LLVM/project e75d14a — llvm/test/CodeGen/NVPTX atomicrmw-v1-type-legalization.ll, llvm/test/Transforms/AtomicExpand elementwise-single-lane.ll

[AtomicExpand][NVPTX] Add single-lane atomic RMW coverage

Record current expansion and code generation before changing single-lane RMW legalization. Check the full pipeline separately from direct instruction selection while their output differs.
DeltaFile
+194-0llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-vector.ll
+123-0llvm/test/Transforms/AtomicExpand/elementwise-single-lane.ll
+81-3llvm/test/CodeGen/NVPTX/atomicrmw-v1-type-legalization.ll
+398-33 files

LLVM/project bd00b7e — llvm/test/CodeGen/NVPTX load-sm60.ll store-sm90.ll

Merge branch 'main' into users/aokblast/clang/itanium_mangle_fix_alias
DeltaFile
+31,848-0llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+31,310-0llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+22,584-0llvm/test/CodeGen/NVPTX/load-sm90.ll
+22,541-0llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+21,644-0llvm/test/CodeGen/NVPTX/store-sm90.ll
+20,068-0llvm/test/CodeGen/NVPTX/load-sm60.ll
+149,995-07,941 files not shown
+647,172-209,1567,947 files

NetBSD/xsrc czEIHYH — external/mit/xf86-video-intel/dist/src intel_module.c, external/mit/xf86-video-intel/dist/src/sna sna.h sna_accel.c

   Merge xf86-video-intel 2.99.917.20210115
VersionDeltaFile
1.8+263-66external/mit/xf86-video-intel/dist/src/sna/sna_display.c
1.3+101-4external/mit/xf86-video-intel/dist/src/intel_module.c
1.9+54-33external/mit/xf86-video-intel/dist/src/sna/kgem.c
1.4+29-17external/mit/xf86-video-intel/dist/src/sna/sna_dri2.c
1.8+37-8external/mit/xf86-video-intel/dist/src/sna/sna_accel.c
1.5+19-0external/mit/xf86-video-intel/dist/src/sna/sna.h
+503-1288 files not shown
+530-13514 files

LLVM/project 1204f6b — clang/lib/Driver/ToolChains OpenBSD.h OpenBSD.cpp, clang/test/Driver openbsd.cpp

[clang][Driver] Fix libc++ include path on OpenBSD (#212979)

`clang++` defaults to `-stdlib=libc++` on OpenBSD. When building with both
`clang` and `libcxx` included, the freshly built `clang++` uses the system
version of the `libc++` headers. However, this is from the bundled `libc++`
22.1.8, thus inconsistent with the `libc++` being built.

OpenBSD has its own version of addLibCxxIncludePaths which just includes
`/usr/include/c++/v1`.

This patch removes OpenBSD::addLibCxxIncludePaths in favour of the generic
version in `Gnu.cpp`.
DeltaFile
+12-2clang/test/Driver/openbsd.cpp
+0-6clang/lib/Driver/ToolChains/OpenBSD.cpp
+0-3clang/lib/Driver/ToolChains/OpenBSD.h
+12-113 files

LLVM/project 643f151 — utils/bazel/llvm-project-overlay/clang BUILD.bazel

[Bazel] Fixes ea4c43d (#234451)

This fixes ea4c43d796c4e3fc0b51bda6234a7f2feb127c3d (#228096).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ea4c43d796c4e3fc0b51bda6234a7f2feb127c3d

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/clang/BUILD.bazel
+1-01 files

NetBSD/xsrc N9WCnED — external/mit/xf86-video-intel/dist/src intel_module.c i915_pciids.h, external/mit/xf86-video-intel/dist/src/sna gen8_render.c sna_blt.c

   xf86-video-intel 2.99.917.20210115 commitid 31486f40f8e8f8923ca0799aea84b58799754564
VersionDeltaFile
1.1.1.5+263-66external/mit/xf86-video-intel/dist/src/sna/sna_display.c
1.1.1.5+204-61external/mit/xf86-video-intel/dist/src/i915_pciids.h
1.1.1.5+101-4external/mit/xf86-video-intel/dist/src/intel_module.c
1.1.1.5+54-33external/mit/xf86-video-intel/dist/src/sna/kgem.c
1.1.1.5+12-44external/mit/xf86-video-intel/dist/src/sna/sna_blt.c
1.1.1.4+29-20external/mit/xf86-video-intel/dist/src/sna/gen8_render.c
+663-22846 files not shown
+980-44852 files

LLVM/project b01fc4b — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 mask-beforefirst.ll

[X86] Combine mask_beforefirst to (x - 1) & ~x in GPR

EVEX and libc use this pattern in strcpy etc. to set the bits before the lowest set bit. It works correctly for x=0 too, returning an all ones mask.

Because SSE/AVX/AVX2 promote vNi1 types, do this as a DAG combine before type legalization.

We need to restrict it to power of 2 types otherwise we hit a latent crash in combineToExtendBoolVectorInReg.
DeltaFile
+126-212llvm/test/CodeGen/X86/mask-beforefirst.ll
+23-0llvm/lib/Target/X86/X86ISelLowering.cpp
+149-2122 files

LLVM/project e4d92b6 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize early_exit_combined_exits.ll early_exit_with_stores.ll

[VPlan] Use llvm.mask.beforefirst for computing early exit mask

This makes the cost more accurate and improves codegen for RISC-V. The codegen for an early exit loop with side effects then goes from:

    .LBB0_3:                                # %vector.body
                                            # =>This Inner Loop Header: Depth=1
        vl1r.v  v16, (a3)
        vsetvli zero, zero, e8, m1, ta, ma
        vmseq.vi        v16, v16, 0
        vfirst.m        a7, v16
        srli    t0, a7, 63
        czero.nez       a7, a7, t0
        czero.eqz       t0, a1, t0
        or      a7, t0, a7
        vsetvli zero, zero, e64, m8, ta, ma
        vmsltu.vx       v0, v8, a7
        vle8.v  v17, (a5), v0.t
        vcpop.m t1, v16
        vsetvli zero, zero, e8, m1, ta, ma

    [20 lines not shown]
DeltaFile
+55-50llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
+36-36llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+24-16llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
+15-10llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
+7-8llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-6llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
+146-1265 files not shown
+161-13611 files

LLVM/project d0253b9 — llvm/include/llvm/CodeGen BasicTTIImpl.h, llvm/test/Analysis/CostModel/AArch64 mask-beforefirst.ll

[TTI] Add cost for llvm.mask.beforefirst
DeltaFile
+16-16llvm/test/Analysis/CostModel/RISCV/mask-beforefirst.ll
+15-15llvm/test/Analysis/CostModel/AArch64/mask-beforefirst.ll
+23-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+54-313 files

LLVM/project 5dee9b8 — llvm/include/llvm/CodeGen BasicTTIImpl.h, llvm/test/Analysis/CostModel/AArch64 mask-beforefirst.ll

Handle scalarization
DeltaFile
+13-10llvm/test/Analysis/CostModel/AArch64/mask-beforefirst.ll
+6-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+19-102 files

LLVM/project 40226f4 — llvm/test/Analysis/CostModel/AArch64 mask-beforefirst.ll, llvm/test/Analysis/CostModel/RISCV mask-beforefirst.ll

Precommit tests
DeltaFile
+44-0llvm/test/Analysis/CostModel/AArch64/mask-beforefirst.ll
+42-0llvm/test/Analysis/CostModel/RISCV/mask-beforefirst.ll
+86-02 files

LLVM/project f754b7c — llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/InstCombine mask-beforefirst.ll

[ValueTracking] Mark mask.beforefirst as propagating poison

This allows us to combine some logical ands/ors to regular ands/ors.
DeltaFile
+2-2llvm/test/Transforms/InstCombine/mask-beforefirst.ll
+1-0llvm/lib/Analysis/ValueTracking.cpp
+3-22 files

LLVM/project 9ba9843 — llvm/test/Transforms/InstCombine mask-beforefirst.ll

Precommit tests
DeltaFile
+26-0llvm/test/Transforms/InstCombine/mask-beforefirst.ll
+26-01 files

LLVM/project 914c018 — llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify/ConstProp mask-beforefirst.ll

[ConstantFolding] Add constant folding for mask.beforefirst

Poison lanes poison the entire result, and undef elements are ignored

Assisted-by: Opus 5.5
DeltaFile
+8-16llvm/test/Transforms/InstSimplify/ConstProp/mask-beforefirst.ll
+23-0llvm/lib/Analysis/ConstantFolding.cpp
+31-162 files

LLVM/project cda66d3 — llvm/test/Transforms/InstSimplify/ConstProp mask-beforefirst.ll

Precommit tests
DeltaFile
+74-0llvm/test/Transforms/InstSimplify/ConstProp/mask-beforefirst.ll
+74-01 files

LLVM/project 4080662 — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+204-23llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+711-1,7666 files not shown
+772-1,79212 files

LLVM/project caa2840 — llvm/lib/Target/NVPTX NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX atomicrmw-elementwise-sm90.ll atomicrmw-elementwise-sm60.ll

[AtomicExpand][NVPTX] Defer single-lane atomics to type legalization
DeltaFile
+2,376-2,410llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+2,252-2,190llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+882-958llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+162-0llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-vector.ll
+103-0llvm/test/Transforms/AtomicExpand/elementwise-single-lane.ll
+57-44llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+5,832-5,6025 files not shown
+5,892-5,69711 files

FreeBSD/src 9c67d6e — sys/netinet6 in6_pcb.c

inpcb: inp_next() never returns a freed inpcb
DeltaFile
+0-2sys/netinet6/in6_pcb.c
+0-21 files