LLVM/project fab06fallvm/lib/Target/ARM ARMTargetTransformInfo.h ARMTargetTransformInfo.cpp, llvm/test/Transforms/Inline/ARM inline-dotprod.ll

[ARM] Fix inlining issue in ARM (#169337)

There is an issue on ARM where a function wont be inlined due to
mismatching target features between caller and callee.
The caller has `HasV8Ops` and `FeatureDotProd` and the callee does not,
but AFAIK this should not be a problem.
https://godbolt.org/z/f19h3zT66 is an example showing how the call is
not inlined on armv7.
The expected asm output would be something like:
```asm
.fnstart
        vsdot.s8        q0, q1, d4[0]
        bx      lr
.Lfunc_end0:

```
Thanks to @Amichaxx we managed to narrow it down and now can resolve
this problem by adding `ARM::FeatureDotProd, ARM::HasV8Ops` to
InlineFeaturesAllowed in llvm/lib/Target/ARM/ARMTargetTransformInfo.h,

    [7 lines not shown]
DeltaFile
+132-34llvm/lib/Target/ARM/ARMTargetTransformInfo.h
+49-0llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
+35-0llvm/test/Transforms/Inline/ARM/inline-dotprod.ll
+216-343 files

NetBSD/pkgsrc-wip 3d0d94btelegram-desktop TODO

telegram-desktop: Add reference to CVE-2021-47793
DeltaFile
+1-1telegram-desktop/TODO
+1-11 files

NetBSD/pkgsrc-wip 49dbbb4py-keras TODO

py-keras: Add reference to CVE-2026-0897
DeltaFile
+1-1py-keras/TODO
+1-11 files

NetBSD/pkgsrc-wip 8a40e6cplantuml TODO

plantuml: Add reference to CVE-2026-0858
DeltaFile
+1-1plantuml/TODO
+1-11 files

NetBSD/pkgsrc-wip 753ca2fdeno TODO

deno: Add reference to CVE-2026-2286[34]
DeltaFile
+4-0deno/TODO
+4-01 files

LLVM/project c2a28dallvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/test/CodeGen/AMDGPU vgpr-set-msb-coissue.mir

[AMDGPU] Fix hoist location for s_set_vgpr_msb past SALU program state instructions (#176206)

If we exit the loop at a non SALU state instruction we have to return
the next instruction because we will insert before the instruction we
return. The check before the loop already did this for cases we start on
a non SALU state instruction by returning `I`. This is now done
afterwards.
DeltaFile
+23-1llvm/test/CodeGen/AMDGPU/vgpr-set-msb-coissue.mir
+7-11llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+30-122 files

LLVM/project 295256fllvm/lib/Analysis InstructionSimplify.cpp, llvm/test/Transforms/InstSimplify fcmp.ll

[InstSimplify] Fall back to the rest of the logic if folding of the consts isn't successfull when simplifying fcmp (#176159)

Fixes #175949.
DeltaFile
+34-0llvm/test/Transforms/InstSimplify/fcmp.ll
+10-7llvm/lib/Analysis/InstructionSimplify.cpp
+44-72 files

LLVM/project 3fb914dllvm/include/llvm/Analysis ScalarEvolutionExpressions.h, llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Add initial support for ptrtoaddr. (#158032)

Add initial support for PtrToAddr to SCEV, including a new
SCEVPtrToAddrExpr and SCEV expansion support for it.

PR: https://github.com/llvm/llvm-project/pull/158032
DeltaFile
+75-8llvm/lib/Analysis/ScalarEvolution.cpp
+47-0llvm/test/Transforms/LoopVectorize/expand-ptrtoaddr.ll
+24-2llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
+11-0llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
+5-5llvm/test/Analysis/ScalarEvolution/ptrtoaddr-i32-index-width.ll
+5-5llvm/test/Analysis/ScalarEvolution/ptrtoaddr.ll
+167-208 files not shown
+186-2014 files

LLVM/project e83021allvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/lib/Target/X86 X86ISelLowering.cpp

[SelectionDAG][InlineAsm] Check VT isSimple before getSimpleVT (#176323)

Fixes: #170024
DeltaFile
+6-6llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+6-6llvm/lib/Target/X86/X86ISelLowering.cpp
+8-0llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
+20-123 files

LLVM/project e9952a6lld/COFF Writer.cpp

[lld][COFF][NFC] Fix warnings on 32-bit asserts builds (#176178)

Fixes #130934 (Wsign-compare warnings reported for Wasm Emscripten
builds). I ran into this when building for 32-bit RISC-V.
DeltaFile
+5-3lld/COFF/Writer.cpp
+5-31 files

FreeBSD/src 1f5b1desys/netinet6 ip6_output.c

ipv6: account for jumbo payload option

If a jumbo payload option is added, the length of the mbuf chain is
increased by 8 but the actual hop-by-hop extension header with the
jumbo playload option is only inserted in the packet if there are
other options. Therefore, adjust optlen to reflect the actual size
of IPv6 extension headers including the hop-by-hop extension header
containing the jumbo payload option.

Reported by:            syzbot+73fe316271df473230eb at syzkaller.appspotmail.com
Reviewed by:            markj, Timo Voelker
MFC after:              3 days
Differential Revision:  https://reviews.freebsd.org/D54394
DeltaFile
+1-0sys/netinet6/ip6_output.c
+1-01 files

LLVM/project 823f701llvm/utils/gn/secondary/llvm/tools/llvm-dwarfdump BUILD.gn

[gn build] Port c838756e2d63
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/tools/llvm-dwarfdump/BUILD.gn
+1-01 files

LLVM/project c838756llvm/docs/CommandGuide llvm-dwarfdump.rst, llvm/test/tools/llvm-dwarfdump/X86 coverage.test

[llvm-dwarfdump][LineCov 1/3] Add variable coverage metrics (#169646)

Patch 1 of 3 to add to llvm-dwarfdump the ability to measure DWARF
coverage of local variables in terms of source lines, as discussed in
this RFC:

https://discourse.llvm.org/t/rfc-debug-info-coverage-tool-v2/83266)

This patch adds the basic variable coverage implementation. By default,
inlined instances are shown separately (displaying the full inlining
chain). Alternatively, a combined view that averages across all inlined
instances can be returned using `--combine-instances`.

In this patch, we simply print a count of source lines over which each
variable is covered. Later patches in the series will add the comparison
against a baseline.
DeltaFile
+241-0llvm/tools/llvm-dwarfdump/Coverage.cpp
+180-0llvm/test/tools/llvm-dwarfdump/X86/Inputs/coverage.ll
+148-0llvm/test/tools/llvm-dwarfdump/X86/Inputs/coverage-opt.ll
+39-0llvm/docs/CommandGuide/llvm-dwarfdump.rst
+26-0llvm/test/tools/llvm-dwarfdump/X86/coverage.test
+20-1llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
+654-12 files not shown
+657-18 files

LLVM/project 3e286c2llvm/test/CodeGen/X86 clmul-x86.ll

[X86] clmul-x86.ll - add i64 test coverage to check for crashes (#176342)

DeltaFile
+455-1llvm/test/CodeGen/X86/clmul-x86.ll
+455-11 files

LLVM/project 0456bcdllvm/lib/CodeGen CodeGenPrepare.cpp

[CGP] Refactor tail call eligibility checks in `dupRetToEnableTailCallOpts` (NFC)

Tail call eligibility and profitability checks have been combined
into a single helper to reduce code duplication.
DeltaFile
+10-9llvm/lib/CodeGen/CodeGenPrepare.cpp
+10-91 files

LLVM/project 66bf4e0lldb/docs dil-expr-lang.ebnf, lldb/source/ValueObject DILLexer.cpp DILParser.cpp

[lldb] Change bitfield range character from '-' to ':' in DIL (#173410)

Change the bitfield extraction range character from '-' to a more common
':'. Add a deprecation error when '-' is used.
DeltaFile
+22-17lldb/test/API/commands/frame/var-dil/basics/BitFieldExtraction/TestFrameVarDILBitFieldExtraction.py
+6-4lldb/source/ValueObject/DILLexer.cpp
+6-2lldb/source/ValueObject/DILParser.cpp
+2-2lldb/source/ValueObject/DILEval.cpp
+1-1lldb/test/API/commands/frame/var-dil/basics/ArraySubscript/TestFrameVarDILArraySubscript.py
+1-1lldb/docs/dil-expr-lang.ebnf
+38-271 files not shown
+39-277 files

LLVM/project 370eeefllvm/lib/Transforms/Vectorize VPlanPatternMatch.h VPlanUnroll.cpp

[VPlan] Add matchers for reduction result VPInstructions (NFC).

Add dedicated matchers for reduction result VPInstructions, to be
re-used in follow-up patches, including
https://github.com/llvm/llvm-project/pull/167851.
DeltaFile
+22-0llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+5-6llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
+27-62 files

LLVM/project d528686llvm/lib/Transforms/Vectorize VPlanRecipes.cpp VPlanValue.h

[VPlan] Add VPConstantInt for VPIRValues wrapping ConstantInts (NFC) (#175458)

Follow-up to https://github.com/llvm/llvm-project/pull/174282: Introduce
a new VPConstantInt overlay for VPIRValue, to make it easier to check
and access constant int IR values.

PR: https://github.com/llvm/llvm-project/pull/175458
DeltaFile
+12-23llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+24-0llvm/lib/Transforms/Vectorize/VPlanValue.h
+4-12llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+8-4llvm/lib/Transforms/Vectorize/VPlan.h
+2-2llvm/lib/Transforms/Vectorize/VPlanAnalysis.cpp
+1-2llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+51-436 files

LLVM/project fc472ddlibclc/opencl/include/clc/opencl utils.h, libclc/opencl/include/clc/opencl/synchronization utils.h

[libclc][NFC] Don't include 'clc/internal/clc.h' in OpenCL library (#176336)

The file is meant for internal use within the CLC library.
DeltaFile
+1-1libclc/opencl/include/clc/opencl/synchronization/utils.h
+1-1libclc/opencl/include/clc/opencl/utils.h
+2-22 files

LLVM/project 01a1c37llvm/include/llvm/IR RuntimeLibcalls.td, llvm/lib/Target/SystemZ SystemZISelLowering.h

SystemZ: Remove override of insertSSPDeclarations

Remove __stack_chk_guard from the SystemZ system library.
Previously the availability was assumed to match
__stack_chk_fail, but these appear to be differen for SystemZ.
I'm assuming this isn't available for systemz based on the
existing behavior.

Once the runtime library does not add a SYSTEM_CHECK_GUARD
implementation the default will be a no-op if the symbol
isn't added to the system.

Also extend the test to make sure the declaration is not emitted.
DeltaFile
+12-1llvm/test/CodeGen/SystemZ/stack-guard.ll
+5-1llvm/include/llvm/IR/RuntimeLibcalls.td
+0-2llvm/lib/Target/SystemZ/SystemZISelLowering.h
+17-43 files

LLVM/project e515529clang/lib/CIR/CodeGen CIRGenBuiltin.cpp CIRGenExpr.cpp, clang/test/CIR/CodeGen atomic.c

[CIR] Add __sync_<OP>_and_fetch builtins (#168347)

Adds support for several `__sync_<OP>_and_fetch` builtins, and several helper methods for emitting atomic fetch + arithmetic operations.

---------

Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
DeltaFile
+747-0clang/test/CIR/CodeGen/atomic.c
+137-2clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+23-3clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+21-3clang/lib/CIR/CodeGen/Address.h
+4-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+1-0clang/lib/CIR/CodeGen/CIRGenTypes.cpp
+933-86 files

FreeBSD/ports a734626graphics/tulip pkg-plist Makefile, graphics/tulip/files patch-thirdparty_OGDF_src_ogdf_basic_System.cpp patch-thirdparty_OGDF_include_ogdf_basic_System.h

graphics/tulip: Ressurect the port, a GUI for managing and rendering huge graphs
DeltaFile
+792-0graphics/tulip/pkg-plist
+76-0graphics/tulip/files/patch-thirdparty_OGDF_src_ogdf_basic_System.cpp
+33-0graphics/tulip/Makefile
+20-0graphics/tulip/files/patch-thirdparty_OGDF_include_ogdf_basic_System.h
+16-0graphics/tulip/files/patch-software_tulip_CMakeLists.txt
+15-0graphics/tulip/files/patch-thirdparty_OGDF_cmake_compiler-specifics.cmake
+952-04 files not shown
+979-010 files

OPNSense/core ca8447csrc/etc/inc/plugins.inc.d dhcrelay.inc

dhcrelay: change bracing back for clarity

Logic is the same as && takes precedence but let's keep it like
it originally was.
DeltaFile
+3-2src/etc/inc/plugins.inc.d/dhcrelay.inc
+3-21 files

OPNSense/core 6990381src/etc/inc/plugins.inc.d dhcrelay.inc

dhcrelay: relax the check for present addresses #9369

(cherry picked from commit 0dd29398d934338f3326aa03386a62784e52da61)
(cherry picked from commit ce93c8bf05b0753fe51dc57a226a08562b2f7cd5)
(cherry picked from commit dba27bb13902472c664efcb5b3e63e8a274995ce)
(cherry picked from commit 1162de70486aa9e907880507f95c45ae3a110eb6)
DeltaFile
+27-25src/etc/inc/plugins.inc.d/dhcrelay.inc
+27-251 files

OPNSense/core ce93c8bsrc/etc/inc/plugins.inc.d dhcrelay.inc

dhcrelay: invert the logic to make it work as intended; closes #9369
DeltaFile
+2-2src/etc/inc/plugins.inc.d/dhcrelay.inc
+2-21 files

LLVM/project f646b91llvm/utils/git ids-check-helper.py

[ci][ids] Fix pattern prefix check (#176334)

The prefix check did not include the trailing /, so llvm-c headers were
treated like llvm headers, resulting in incorrect suggestions to use
LLVM_ABI where LLVM_C_ABI was already present.

See
https://github.com/llvm/llvm-project/pull/176309#issuecomment-3757987748
for an example.
DeltaFile
+2-2llvm/utils/git/ids-check-helper.py
+2-21 files

FreeBSD/src f8ddf74sys/dev/dwc dwc1000_dma.c

dwc: improve IPv4 transmit checksum offloading

This patch provides two improvements for TCP/IPv4 and UDP/IPv4
transmit checksum offloading:
(1) Use *CIC_SEG instead of *CIC_FULL, since FreeBSD always provides
    a pseudo header checksum.
(2) Don't make transmit IPv4 header checksum offloading a prerequisite
    for TCP/IPv4 or UDP/IPv4 transmit checksum offloading.
This is the root cause of PR 291696, since right now the epair
interface does not support transmit IPv4 header checksum offloading,
but TCP/IPv4 and UDP/IPv4 transmit checksum offloading.

PR:                     291696
Reviewed by:            Timo Voelker
Tested by:              Marek Benc
MFC after:              3 days
Differential Revision:  https://reviews.freebsd.org/D54395
DeltaFile
+7-14sys/dev/dwc/dwc1000_dma.c
+7-141 files

FreeBSD/ports 1c8e159x11-toolkits/qt6-declarative Makefile, x11-toolkits/qt6-declarative/files patch-QTBUG-142514

x11-toolkits/qt6-declarative: backport upstream patch

to fix crash in plasmashell: https://bugs.kde.org/513527
DeltaFile
+122-0x11-toolkits/qt6-declarative/files/patch-QTBUG-142514
+1-1x11-toolkits/qt6-declarative/Makefile
+123-12 files

FreeBSD/ports 2c34494www/qt6-webengine Makefile, www/qt6-webengine/files patch-QTBUG-139335

www/qt6-webengine: backport upstream patch

to fix random crashes at startup:
https://codereview.qt-project.org/c/qt/qtwebengine/+/702860
DeltaFile
+610-0www/qt6-webengine/files/patch-QTBUG-139335
+1-1www/qt6-webengine/Makefile
+611-12 files

LLVM/project 6934c36llvm/include/llvm/Analysis DependenceAnalysis.h, llvm/lib/Analysis DependenceAnalysis.cpp

[DA] Use ScalarEvolution::isKnownPredicate (#170919)

DA uses `DependenceInfo::isKnownPredicate` instead of
`ScalarEvolution::isKnownPredicate` in several places. The former is
intended to be a "wrapper" for the later. Specifically, it performs the
following processes:

- Replace `zext(X) cmp zext(Y)` with `X cmp Y`.
- Replace `X >=s Y` with `X - Y >=s 0`
- Replace `X <=s Y` with `X - Y <=s 0`
- Replace `X >s Y` with `X - Y >s 0`
- Replace `X <s Y` with `X - Y <s 0`

The first one can return an incorrect result when the most significant
bit of `X` and `Y` are different. Everything other than the first one
can be incorrect when `X - Y` overflows. Actually, when a `SCEVUnknown`
is involved (e.g., `%n <s %n + 1` will be `0 <s 1`), this function often
returns a result that ignore the possibility of overflow.


    [4 lines not shown]
DeltaFile
+21-72llvm/lib/Analysis/DependenceAnalysis.cpp
+13-27llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
+7-7llvm/test/Analysis/DependenceAnalysis/SymbolicRDIV.ll
+6-6llvm/test/Analysis/DependenceAnalysis/SymbolicSIV.ll
+0-7llvm/include/llvm/Analysis/DependenceAnalysis.h
+1-4llvm/test/Analysis/DependenceAnalysis/infer_affine_domain_ovlf.ll
+48-1231 files not shown
+50-1257 files