HardenedBSD/ports 6d9f471devel/electron40 distinfo, devel/electron40/files patch-electron_shell_browser_native__window__views.cc patch-electron_shell_browser_api_electron__api__web__contents.cc

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+13-13devel/electron40/files/patch-electron_shell_browser_native__window__views.cc
+13-13devel/electron40/distinfo
+8-8devel/electron40/files/patch-electron_shell_browser_api_electron__api__web__contents.cc
+12-2www/py-fastapi/Makefile
+7-7sysutils/zot/distinfo
+5-5dns/dnscontrol/distinfo
+58-4846 files not shown
+152-14952 files

LLVM/project 7269eb7llvm/lib/Target/AMDGPU GCNSchedStrategy.cpp

Update llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Co-authored-by: Jay Foad <jay.foad at amd.com>
DeltaFile
+1-1llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+1-11 files

LLVM/project 29179d6libclc/clc/lib/amdgpu CMakeLists.txt, libclc/clc/lib/amdgpu/math clc_exp.cl clc_exp10.cl

libclc: Use elementwise exp for exp functions

For amdgpu use the exp intrinisc. Really, this should be
the default generic implementation. But we're stuck in a
mess where essentially nothing works. All of the exp
intrinsics work for AMDGPU, but aren't really implemented
for spirv or nvptx. Ideally the intrinsic and/or libm call
would be the default implementation.
DeltaFile
+15-0libclc/clc/lib/amdgpu/math/clc_exp.cl
+15-0libclc/clc/lib/amdgpu/math/clc_exp10.cl
+15-0libclc/clc/lib/amdgpu/math/clc_exp2.cl
+3-0libclc/clc/lib/amdgpu/CMakeLists.txt
+48-04 files

LLVM/project bc076ddclang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/lib/CodeGen/TargetBuiltins ARM.cpp

[CIR][AArch64] Add support for the remaining `vceqz` builtins

Implement the remaining CIR lowerings for the AdvSIMD (Neon)
`vceqz` intrinsic group (bitwise equal to zero).

Most variants of `vceqz` variant were already supported; this patch
completes the rest of the group [1] that was left as a TODO.

Tests for these intrinsics are moved from:
  * test/CodeGen/AArch64/neon_intrinsics.c
  * test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c

to:
  * test/CodeGen/AArch64/neon/intrinsics.c
  * test/CodeGen/AArch64/neon/fullfp16,

respectively.

The implementation largely mirrors the existing lowering in

    [4 lines not shown]
DeltaFile
+60-16clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-33clang/test/CodeGen/AArch64/neon-intrinsics.c
+20-0clang/test/CodeGen/AArch64/neon/fullfp16.c
+8-4clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+0-8clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
+3-4clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+91-656 files

OPNSense/core 92e0d5asrc/opnsense/scripts/filter read_log.py

firewall: fix SyntaxWarning, perhaps a Python 3.13 side effect

See: https://docs.python.org/3/library/re.html
PR: https://forum.opnsense.org/index.php?topic=51226.0
DeltaFile
+1-1src/opnsense/scripts/filter/read_log.py
+1-11 files

LLVM/project 19398adclang/test/Sema constexpr.c

[Clang] Add additional tests for constexpr initialization (#181965)

Add constexpr initialization tests for 0.0f, 0e0, 0x0p0.
DeltaFile
+6-0clang/test/Sema/constexpr.c
+6-01 files

LLVM/project 2fac7a8clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp

Minor simplification
DeltaFile
+1-2clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+1-21 files

LLVM/project 1aac34alldb/source/Plugins/Platform/MacOSX PlatformDarwin.cpp

[lldb][PlatformDarwin][NFC] Use formatv-style format string in LocateExecutableScriptingResourcesFromDSYM (#185622)

About to make changes in this area and using `formatv` instead of
`printf` style format specifiers makes those easier to follow.
DeltaFile
+7-6lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+7-61 files

NetBSD/pkgsrc-wip 8e6a39blibopeninput distinfo Makefile.common, libopeninput/patches patch-src_wscons.c patch-meson.build

libopeninput: update to 1.30.2
DeltaFile
+15-78libopeninput/patches/patch-src_wscons.c
+39-9libopeninput/patches/patch-meson.build
+2-10libopeninput/patches/patch-src_wscons.h
+6-6libopeninput/distinfo
+3-3libopeninput/Makefile.common
+6-0libopeninput/PLIST
+71-1066 files

NetBSD/pkgsrc-wip 0564515input-headers distinfo

input-headers: update to 1.30.2
DeltaFile
+3-3input-headers/distinfo
+3-31 files

LLVM/project 9b1aaddlibclc/clc/lib/amdgpu CMakeLists.txt, libclc/clc/lib/amdgpu/math clc_sqrt.cl

libclc: Remove amdgpu sqrt override (#185620)

The generic intrinsic should be used. A very long time ago
the sqrt intrinsic did not work for f64, but it's implemented
essentially the same way as this.
DeltaFile
+0-61libclc/clc/lib/amdgpu/math/clc_sqrt.cl
+0-1libclc/clc/lib/amdgpu/CMakeLists.txt
+0-622 files

FreeBSD/src b5e307dsys/compat/freebsd32 freebsd32_systrace_args.c freebsd32_syscall.h, sys/kern systrace_args.c

Regen
DeltaFile
+38-0sys/kern/systrace_args.c
+38-0sys/compat/freebsd32/freebsd32_systrace_args.c
+9-0sys/sys/sysproto.h
+2-1sys/compat/freebsd32/freebsd32_syscall.h
+2-1sys/sys/syscall.h
+2-1sys/sys/syscall.mk
+91-36 files not shown
+99-312 files

FreeBSD/src 3ccc39dlib/libsys rename.2 Makefile.sys

renameat2(2): document

(cherry picked from commit 619e49b2ba58e1ffd2ab111fef6d1e87d77e7391)
DeltaFile
+65-0lib/libsys/rename.2
+2-1lib/libsys/Makefile.sys
+67-12 files

FreeBSD/src 1bb58balib/libsys rename.2

libsys/rename.2: remove commented-out CAVEAT section

(cherry picked from commit 5f911eaba017645487a1eaee3609b26a77f0f174)
DeltaFile
+0-26lib/libsys/rename.2
+0-261 files

FreeBSD/src b2ae957sys/compat/linux linux_file.c

linuxolator: translate LINUX_RENAME_NOREPLACE into our AT_RENAME_NOREPLACE

(cherry picked from commit 8feb8d221cfb842ee11d744d22571baec6c18cd8)
DeltaFile
+23-12sys/compat/linux/linux_file.c
+23-121 files

FreeBSD/src b0ca929sys/amd64/amd64 apic_vector.S, sys/i386/i386 mp_machdep.c apic_vector.S

x86: change signatures of ipi_{bitmap,swi}_handler() to take pointer

(cherry picked from commit fdc1f34506346fd26db8bfb80ba69d1af844c53a)
DeltaFile
+14-0sys/i386/i386/mp_machdep.c
+5-5sys/x86/x86/mp_x86.c
+2-2sys/x86/include/x86_smp.h
+2-2sys/i386/i386/apic_vector.S
+2-2sys/x86/xen/xen_apic.c
+2-0sys/amd64/amd64/apic_vector.S
+27-116 files

FreeBSD/src 72cf8b9sys/contrib/openzfs/include/os/freebsd/zfs/sys zfs_vnops_os.h, sys/contrib/openzfs/module/os/freebsd/zfs zfs_vnops_os.c

zfs: implement AT_RENAME_NOREPLACE

(cherry picked from commit 7a1217ff3bbdd1ef40d1b94170c53611fadeb026)
DeltaFile
+17-8sys/contrib/openzfs/module/os/freebsd/zfs/zfs_vnops_os.c
+2-2sys/contrib/openzfs/include/os/freebsd/zfs/sys/zfs_vnops_os.h
+1-1sys/contrib/openzfs/module/zfs/zfs_replay.c
+20-113 files

FreeBSD/src 45401a4sys/fs/msdosfs msdosfs_vnops.c, sys/fs/nfsclient nfs_clvnops.c

VOP_RENAME(9): add flags argument

(cherry picked from commit e486066cf48a89ba87fab6b3d2b56f271f50439b)
DeltaFile
+6-1sys/fs/unionfs/union_vnops.c
+7-0sys/ufs/ufs/ufs_vnops.c
+6-0sys/fs/nfsclient/nfs_clvnops.c
+5-0sys/fs/smbfs/smbfs_vnops.c
+5-0sys/fs/msdosfs/msdosfs_vnops.c
+5-0sys/fs/tmpfs/tmpfs_vnops.c
+34-17 files not shown
+51-413 files

FreeBSD/src ade7375sys/amd64/amd64 efirt_support.S

amd64: align stack on 16 bytes when calling into a EFIRT method

(cherry picked from commit 347cec10e25eacb2906a0a8105eff036850db766)
DeltaFile
+1-0sys/amd64/amd64/efirt_support.S
+1-01 files

FreeBSD/src 9c37c82sys/fs/msdosfs msdosfs_vnops.c, sys/fs/tmpfs tmpfs_vnops.c

renameat2(2): implement AT_RENAME_NOREPLACE flag

(cherry picked from commit 7aaec5f3faecf98e377c97e24dddb9c65f4b2e75)
DeltaFile
+20-4sys/kern/vfs_syscalls.c
+7-2sys/fs/msdosfs/msdosfs_vnops.c
+7-2sys/fs/tmpfs/tmpfs_vnops.c
+6-1sys/ufs/ufs/ufs_vnops.c
+3-0sys/sys/fcntl.h
+43-95 files

FreeBSD/src bbdf045sys/compat/linux linux_file.c, sys/kern vfs_syscalls.c

kern_renameat(9): add flags argument

(cherry picked from commit 1f3020067ab3f3c5043d01ea1e3a3d2998a39d4a)
DeltaFile
+4-4sys/kern/vfs_syscalls.c
+2-2sys/compat/linux/linux_file.c
+1-1sys/sys/syscallsubr.h
+7-73 files

FreeBSD/src 5061709sys/amd64/amd64 trap.c

amd64: print userspace fsbase and gsbase for uprintf_signal

(cherry picked from commit 272ea451199462dffd55dd580532eb28ddc92174)
DeltaFile
+19-2sys/amd64/amd64/trap.c
+19-21 files

FreeBSD/src 522dbebinclude stdio.h, lib/libsys Symbol.sys.map

sys: add renameat2(2) syscall

(cherry picked from commit 28599a1e5f1b90676a818e0a4818cddd0839ad25)
DeltaFile
+10-0sys/kern/vfs_syscalls.c
+9-1sys/kern/syscalls.master
+1-0lib/libsys/Symbol.sys.map
+1-0include/stdio.h
+21-14 files

FreeBSD/src 0b0bbdasys/contrib/openzfs/module/os/freebsd/zfs zfs_vnops_os.c

zfs rename: properly cleanup on errors occuring before zfs_do_rename()

(cherry picked from commit ed87040311b88e2c95a791aa049f2c37c857f048)
DeltaFile
+16-7sys/contrib/openzfs/module/os/freebsd/zfs/zfs_vnops_os.c
+16-71 files

FreeBSD/src ab2b871sys/amd64/amd64 trap.c

amd64: extract uprintf_signal printing into a helper

(cherry picked from commit 3e8a9995e9541a0bdd707f111e51ef46a544ee3e)
DeltaFile
+25-15sys/amd64/amd64/trap.c
+25-151 files

LLVM/project b0df1daclang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp

[CIR][AArch64] Add lowering for remaining `vabd_*` builtins

Implement the missing CIR lowerings for the AdvSIMD (Neon) `vabd_*`
(absolute difference) intrinsic group.

Most `vabd` variants were already supported (see #183595); this patch
completes the remaining cases listed in [1].

Move the corresponding tests from:
  * clang/test/CodeGen/AArch64/neon_intrinsics.c

to:
  * clang/test/CodeGen/AArch64/neon/intrinsics.c

The implementation mirrors the existing lowering in
CodeGen/TargetBuiltins/ARM.cpp. To support this, add the
`emitCommonNeonSISDBuiltinExpr` helper.

Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#absolute-difference
DeltaFile
+351-2clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+21-3clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-20clang/test/CodeGen/AArch64/neon-intrinsics.c
+0-1clang/include/clang/CIR/MissingFeatures.h
+372-264 files

LLVM/project 859b5d4clang/docs ReleaseNotes.rst, clang/lib/AST RawCommentList.cpp

[clang] Fix crash when @param is attached to invalid nodes (#183274)

To address the issue of clang frontend crashes caused by @param
annotations being attached to unavailable nodes, I modified
RawComment::parse, adding a Decl check to prevent illegal data from
entering ParamVars.

Fixed #182737
DeltaFile
+18-0clang/test/Sema/gh182737.c
+3-0clang/lib/AST/RawCommentList.cpp
+1-0clang/docs/ReleaseNotes.rst
+22-03 files

LLVM/project b68dcf9clang/lib/CodeGen/TargetBuiltins ARM.cpp

[Clang][AArch64] Clarify and simplify SISD intrinsic handling (NFC) (#185285)

Not all AArch64 intrinsics categorized as SISD (Single Instruction
Single Data) are truly SISD. Add comments clarifying this distinction.

Also update EmitCommonNeonSISDBuiltinExpr:
  * Move the assert to the top of the function and add a descriptive
    message to make the assumptions explicit.
  * Remove unnecessary temporary variables (e.g. BuiltinID) and use
    SISDInfo directly.

No functional changes intended.
DeltaFile
+21-13clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+21-131 files

LLVM/project 334c545clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/lib/CodeGen/TargetBuiltins ARM.cpp

[CIR][AArch64] Add support for the remaining `vceqz` builtins

Implement the remaining CIR lowerings for the AdvSIMD (Neon)
`vceqz` intrinsic group (bitwise equal to zero).

Most variants of `vceqz` variant were already supported; this patch
completes the rest of the group [1] that was left as a TODO.

Tests for these intrinsics are moved from:
  * test/CodeGen/AArch64/neon_intrinsics.c
  * test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c

to:
  * test/CodeGen/AArch64/neon/intrinsics.c
  * test/CodeGen/AArch64/neon/fullfp16,

respectively.

The implementation largely mirrors the existing lowering in

    [4 lines not shown]
DeltaFile
+60-16clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-33clang/test/CodeGen/AArch64/neon-intrinsics.c
+20-0clang/test/CodeGen/AArch64/neon/fullfp16.c
+8-4clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+0-8clang/test/CodeGen/AArch64/v8.2a-fp16-intrinsics.c
+3-4clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+91-656 files

LLVM/project 9b5996elibclc/clc/lib/amdgcn/mem_fence clc_mem_fence.cl, libclc/clc/lib/amdgcn/subgroup sub_group_reduce.cl sub_group_broadcast.cl

libclc: Merge amdgpu and amdgcn directories (#185619)

Now that r600 is no longer in the build there is no reason to
keep this split. Consolidate on the amdgpu name.
DeltaFile
+145-0libclc/clc/lib/amdgpu/subgroup/sub_group_reduce.cl
+0-145libclc/clc/lib/amdgcn/subgroup/sub_group_reduce.cl
+0-85libclc/clc/lib/amdgcn/subgroup/sub_group_broadcast.cl
+85-0libclc/clc/lib/amdgpu/subgroup/sub_group_broadcast.cl
+59-0libclc/clc/lib/amdgpu/mem_fence/clc_mem_fence.cl
+0-59libclc/clc/lib/amdgcn/mem_fence/clc_mem_fence.cl
+289-28943 files not shown
+732-73749 files