LLVM/project 7d6dc25llvm/test/MC/RISCV xqcili-relocations.s xqcilb-relocations.s, llvm/test/tools/llvm-objdump/ELF/RISCV riscv-vendor-reloc.s

[RISCV][llvm-readobj,llvm-objdump] Use getRISCVVendorRelocationTypeName for RISCV vendor relocations (#172811)

Use getRISCVVendorRelocationTypeName to resolve RISCV vendor-specific
relocation names (R_RISCV_CUSTOM192-255) when preceded by
R_RISCV_VENDOR.

This improves the output of llvm-readobj and llvm-objdump to show
vendor-specific names like R_RISCV_QC_ABS20_U, R_RISCV_QC_E_BRANCH
(QUALCOMM) and R_RISCV_NDS_BRANCH_10 (ANDES) instead of generic
R_RISCV_CUSTOM* names.

Per RISC-V psABI, R_RISCV_VENDOR must be placed immediately before its
associated vendor-specific relocation, so the vendor symbol is consumed
after one use. Unknown vendors fall back to R_RISCV_CUSTOM*.
DeltaFile
+92-0llvm/test/tools/llvm-objdump/ELF/RISCV/riscv-vendor-reloc.s
+90-0llvm/test/tools/llvm-readobj/ELF/RISCV/riscv-vendor-reloc.s
+63-8llvm/tools/llvm-readobj/ELFDumper.cpp
+56-7llvm/tools/llvm-objdump/llvm-objdump.cpp
+11-11llvm/test/MC/RISCV/xqcili-relocations.s
+10-10llvm/test/MC/RISCV/xqcilb-relocations.s
+322-367 files not shown
+349-6313 files

LLVM/project 00e3a3clibcxx/test/libcxx/algorithms nodiscard.verify.cpp, libcxx/test/libcxx/diagnostics filesystem.nodiscard.verify.cpp algorithm.nodiscard.verify.cpp

[libc++][NFC] Refactor `[[nodiscard]]` tests (#173451)

Originally some `[[nodiscard]]` tests were implemented in
`*/test/libcxx/diagnostics`. The Standard has a library `Diagnostics`
and this folder should be reserved for it by convention. Most newer
tests were added to their respective sub-folders. This patch moves
around the already implemented `[[nodiscard]]` tests to their respective
folders where they belong and standardizes the name to
`nodiscard.verify.cpp` wherever possible.

N.B. This refactors only tests, which were merged. The remaining
(in-progress) ones will be moved in a future patch to reduce merge
conflicts.
DeltaFile
+454-0libcxx/test/libcxx/input.output/filesystems/nodiscard.verify.cpp
+0-454libcxx/test/libcxx/diagnostics/filesystem.nodiscard.verify.cpp
+400-0libcxx/test/libcxx/algorithms/nodiscard.verify.cpp
+0-400libcxx/test/libcxx/diagnostics/algorithm.nodiscard.verify.cpp
+329-0libcxx/test/libcxx/time/nodiscard.verify.cpp
+0-329libcxx/test/libcxx/diagnostics/chrono.nodiscard.verify.cpp
+1,183-1,18370 files not shown
+3,858-3,95076 files

LLVM/project 28ed942clang/lib/Sema SemaAMDGPU.cpp, clang/test/CodeGenOpenCL builtins-amdgcn-gfx1250-wmma-w32.cl

Reapply "[AMDGPU] Rework the clamp support for WMMA instructions" (#174674)

This reverts commit 0b2f3cfb72a76fa90f3ec2a234caabe0d0712590.
DeltaFile
+57-0llvm/lib/IR/AutoUpgrade.cpp
+26-26llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
+20-20llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
+34-0clang/lib/Sema/SemaAMDGPU.cpp
+23-4llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+24-2clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
+184-5212 files not shown
+279-8918 files

LLVM/project afe8257llvm/test/CodeGen/X86 scmp.ll fast-isel-fcmp.ll, llvm/test/CodeGen/X86/apx ccmp.ll ctest.ll

[X86][APX] Emit SetZUCC instead of legacy setcc when ZU is enabled (#173965)

To avoid false dependency.
DeltaFile
+1,196-0llvm/test/CodeGen/X86/scmp.ll
+764-0llvm/test/CodeGen/X86/fast-isel-fcmp.ll
+516-0llvm/test/CodeGen/X86/apx/ccmp.ll
+443-0llvm/test/CodeGen/X86/apx/ctest.ll
+370-0llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
+370-0llvm/test/CodeGen/X86/pr32284.ll
+3,659-09 files not shown
+3,848-6715 files

LLVM/project af8bb1dutils/bazel/llvm-project-overlay/mlir BUILD.bazel

Fix Bazel build for 4dc9a0e (#174691)

DeltaFile
+3-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+3-01 files

LLVM/project 42d8bc9clang-tools-extra/clang-doc/assets comment-template.mustache clang-doc-mustache.css, clang-tools-extra/test/clang-doc basic-project.mustache.test templates.cpp

[clang-doc] Add a border box to comments in HTML (#174541)

Comments weren't very visually distinctive in HTML. They immediately
proceeded the declaration header and didn't have spacing between them.
To visually organize them, they now have a thin border around them.
Different comment types are also now separated by a small gap. This also
allows them to be easily changed in the future. Some extraneous `<div>`
tags are also removed or merged.
DeltaFile
+199-217clang-tools-extra/test/clang-doc/basic-project.mustache.test
+34-26clang-tools-extra/clang-doc/assets/comment-template.mustache
+20-31clang-tools-extra/test/clang-doc/templates.cpp
+17-25clang-tools-extra/test/clang-doc/namespace.cpp
+24-16clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
+18-1clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
+312-3166 files not shown
+326-33512 files

LLVM/project 39d6f10llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize tail-folding-div.ll first-order-recurrence-sink-replicate-region.ll

[LV] Conservatively predicate SDiv/SRem (#170818)

Conservatively predicate sdiv/srem:
- RHS may carry poison in masked‑off lanes.
- RHS could be −1 while LHS has masked‑off lanes (risking INT_MIN/−1
overflow).

We’ll relax this once we can prove non‑wrap/non‑poison conditions.

Fixes #170775.
DeltaFile
+555-0llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
+381-9llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-div.ll
+39-21llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
+29-5llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
+5-2llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+4-2llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+1,013-391 files not shown
+1,015-407 files

LLVM/project 25c7a36clang-tools-extra/clang-doc/assets comment-template.mustache clang-doc-mustache.css, clang-tools-extra/test/clang-doc basic-project.mustache.test templates.cpp

fix conflicts
DeltaFile
+199-217clang-tools-extra/test/clang-doc/basic-project.mustache.test
+34-26clang-tools-extra/clang-doc/assets/comment-template.mustache
+20-31clang-tools-extra/test/clang-doc/templates.cpp
+17-25clang-tools-extra/test/clang-doc/namespace.cpp
+24-16clang-tools-extra/test/clang-doc/json/compound-constraints.cpp
+18-1clang-tools-extra/clang-doc/assets/clang-doc-mustache.css
+312-3166 files not shown
+326-33512 files

LLVM/project 1eb0bbdllvm/lib/Target/RISCV RISCVLoadStoreOptimizer.cpp

[RISCV] Fix typo from 6e86037. NFC (#174679)

DeltaFile
+1-1llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
+1-11 files

FreeBSD/ports 7b2f3c4lang/spidermonkey115 distinfo Makefile

lang/spidermonkey115: update to 115.31.0
DeltaFile
+3-3lang/spidermonkey115/distinfo
+1-2lang/spidermonkey115/Makefile
+4-52 files

FreeBSD/ports 8a23789lang/spidermonkey140 distinfo Makefile

lang/spidermonkey140: update to 140.7.0 (rc1)
DeltaFile
+3-3lang/spidermonkey140/distinfo
+1-2lang/spidermonkey140/Makefile
+4-52 files

OpenBSD/src 7bJmYglsys/arch/amd64/amd64 genassym.cf

   chunk forgotten for previous commit by chris:
   KVA TLB entries can exist under PCID_TEMP after pmap_map_ptes() + interrupts
   so KVA shootdowns must invalidate PCID_TEMP too

   ok deraadt, mlarkin discussion and approval guenther
VersionDeltaFile
1.50+2-1sys/arch/amd64/amd64/genassym.cf
+2-11 files

LLVM/project e8bf7e8clang-tools-extra/clang-tidy/bugprone MacroParenthesesCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] fix false positives for bugprone-macro-parentheses in C++ templates (#174329)

Closes #91155
DeltaFile
+35-0clang-tools-extra/test/clang-tidy/checkers/bugprone/macro-parentheses.cpp
+21-11clang-tools-extra/clang-tidy/bugprone/MacroParenthesesCheck.cpp
+9-5clang-tools-extra/docs/ReleaseNotes.rst
+65-163 files

OpenBSD/ports IPd7kVOdevel/goreleaser distinfo modules.inc

   Update to goreleaser-2.13.2

   From Laurent Cheylus (maintainer)
VersionDeltaFile
1.27+366-466devel/goreleaser/distinfo
1.27+134-155devel/goreleaser/modules.inc
1.32+1-1devel/goreleaser/Makefile
+501-6223 files

LLVM/project c249664llvm/test/CodeGen/AMDGPU carryout-selection.ll llvm.amdgcn.wmma.gfx1250.w32.ll

[AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register

On certain hardware, this instruction clobbers VGPR MSB `bits[12:19]`, so we need to restore the current mode.
DeltaFile
+713-2llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+246-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
+220-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
+212-0llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+174-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
+166-0llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+1,731-2146 files not shown
+6,212-3152 files

FreeBSD/src 5d73fcasys/dev/rge if_rge_microcode.h if_rge_hw.c

if_rge: sync with up to date OpenBSD code

a0b4d9e5bd63984bc3ad25b7f2881741e0d73980
Add support for RTL8126 chip revision 0x64a00000 from Carl Henriksson.
While here, update and add microcode for the RTL8126 chipset variant.

46810ff569a9416642fc5f8e86501028008a2e95
For RTL8125, there's no need to check whether RGE_CMD_STOPREQ has been
completed.  As with other chip variants, RGE_CMD_STOPREQ never acknowledges
completion.

5729fb17b5eeba56781da0b5c0525c198c5c2cd8
remove duplicate RGE_PHYSTAT_5000MBPS test

Reviewed by:    adrian
Differential Revision:  https://reviews.freebsd.org/D54517
Obtained from:  OpenBSD
DeltaFile
+3,506-7,285sys/dev/rge/if_rge_microcode.h
+249-48sys/dev/rge/if_rge_hw.c
+17-14sys/dev/rge/if_rge.c
+5-1sys/dev/rge/if_rgereg.h
+2-1sys/dev/rge/if_rgevar.h
+3,779-7,3495 files

OpenBSD/src sm3VE61sys/arch/amd64/amd64 vector.S pmap.c

   KVA TLB entries can exist under PCID_TEMP after pmap_map_ptes() + interrupts
   so KVA shootdowns must invalidate PCID_TEMP too

   ok deraadt, mlarkin discussion and approval guenther
VersionDeltaFile
1.106+16-1sys/arch/amd64/amd64/vector.S
1.186+8-1sys/arch/amd64/amd64/pmap.c
+24-22 files

LLVM/project 4435d43llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rv64p.ll

[RISCV] Add computeKnownBits for CLSW. (#174636)

DeltaFile
+64-0llvm/test/CodeGen/RISCV/rv64p.ll
+15-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+79-02 files

LLVM/project 6e86037llvm/lib/Target/RISCV RISCVLoadStoreOptimizer.cpp, llvm/test/CodeGen/RISCV xqcilsm-lwmi-swmi.mir

[RISCV] Improve load/store pairing for Xqcilsm instructions in RISCVLoadStoreOptimizer (#174612)

If we did not pair two viable `Xqcilsm` load/store instructions in
`RISCVLoadStoreOptimizer` we iterated over the second instruction when
looking for other pairs to merge. This leads to us missing out on
opportunities where the second instruction could have been the start of
another potential pair that could have been merged.
DeltaFile
+57-0llvm/test/CodeGen/RISCV/xqcilsm-lwmi-swmi.mir
+14-4llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
+71-42 files

FreeBSD/src f441a22include stdbool.h

stdbool.h: Update for C23

When a compiler with C23 or higher is detected, builtin bool, true,
and false are used to conform the C23 standard.

Reviewed by:    imp
Differential Revision: https://reviews.freebsd.org/D44664
DeltaFile
+6-2include/stdbool.h
+6-21 files

LLVM/project 1ec343dlibclc CMakeLists.txt

[libclc] Add support for `nvptx64-nvidia-cuda` triple (#174611)

Summary:
The OS here is the standard CUDA support target, which is the ABI used
for all of the same intrinsics the `nvidiacl` target uses. These can be
aliases asn `cuda` in the triple is the canonical form for most all GPU
compute.
DeltaFile
+5-0libclc/CMakeLists.txt
+5-01 files

LLVM/project 8136cb9lldb/docs index.rst, lldb/docs/resources lldbdap-contributing.md lldbdap.md

[lldb] Update LLDB DAP documentation. (#172580)

This adds a new page to lldb.llvm.org that includes a user guide for
lldb-dap.

The overall structure for documentation:

* https://lldb.llvm.org/resources/lldbdap.html - represents the user
facing documentation for lldb-dap, a high level overview of lldb-dap and
a place we can point users to for basic usage information.
* https://lldb.llvm.org/resources/lldbdap-contributing.html - represents
the contributing documentation for lldb-dap.
* llvm-project/lldb/tools/lldb-dap/README.md - The lldb-dap VSCode
Extension specific documentation.

This is a first pass at the documentation, I expect to expand on it
further as needed.
DeltaFile
+209-0lldb/docs/use/lldbdap.md
+195-0lldb/docs/resources/lldbdap-contributing.md
+0-195lldb/docs/resources/lldbdap.md
+3-1lldb/tools/lldb-dap/README.md
+2-1lldb/docs/index.rst
+409-1975 files

LLVM/project 0b2f3cfclang/lib/Sema SemaAMDGPU.cpp, clang/test/CodeGenOpenCL builtins-amdgcn-gfx1250-wmma-w32.cl

Revert "[AMDGPU] Rework the clamp support for WMMA instructions" (#174674)

Reverts llvm/llvm-project#174310

This change is causing 2 cross-project-test failures on
https://lab.llvm.org/buildbot/#/builders/174/builds/29695
DeltaFile
+0-57llvm/lib/IR/AutoUpgrade.cpp
+26-26llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
+20-20llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
+0-34clang/lib/Sema/SemaAMDGPU.cpp
+4-23llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+2-24clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
+52-18412 files not shown
+90-28018 files

NetBSD/pkgsrc f1wBUYGsecurity/zoneminder/patches patch-src_zm__rtsp__server__fifo__source.cpp patch-src_zm__packetqueue.cpp

   security/zoneminder: Add missing patches, hoping to be before wizd
VersionDeltaFile
1.1+15-0security/zoneminder/patches/patch-src_zm__rtsp__server__fifo__source.cpp
1.1+13-0security/zoneminder/patches/patch-src_zm__packetqueue.cpp
1.1+13-0security/zoneminder/patches/patch-src_zm__regexp.cpp
+41-03 files

NetBSD/pkgsrc yVhtSCBsecurity/zoneminder distinfo, security/zoneminder/patches patch-src_zm__monitor.cpp patch-src_zm__image.cpp

   security/zoneminder: Patch mismatches between format specifier and types

   Variously the issues are time_t, size_t, suseconds_t.

   With this, there are no format warnings on amd64 or i386.
VersionDeltaFile
1.5+73-3security/zoneminder/patches/patch-src_zm__monitor.cpp
1.3+10-12security/zoneminder/patches/patch-src_zm__image.cpp
1.1+20-0security/zoneminder/patches/patch-src_zm__time.h
1.7+16-4security/zoneminder/patches/patch-src_zm__event.cpp
1.28+8-3security/zoneminder/distinfo
+127-225 files

LLVM/project 551d553llvm/lib/Target/RISCV RISCVOptWInstrs.cpp RISCVISelLowering.cpp

[RISCV] Add SimplifyDemandedBits and hasAllNBitUsers support for CLSW. (#174542)

This matches what we do for CLZW and other W instructions.
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+1-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+1-0llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+3-03 files

HardenedBSD/src e0cb64ashare/man/man4 iflib.4 mrsas.4, stand/i386/pxeldr pxeboot.8

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+33-13sys/kern/link_elf.c
+14-0sys/kern/link_elf_obj.c
+10-0share/man/man4/iflib.4
+6-3stand/i386/pxeldr/pxeboot.8
+0-8sys/vm/vm_kern.c
+2-1share/man/man4/mrsas.4
+65-252 files not shown
+68-258 files

HardenedBSD/src 8321ce5share/man/man4 iflib.4 mrsas.4, stand/i386/pxeldr pxeboot.8

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+33-13sys/kern/link_elf.c
+14-0sys/kern/link_elf_obj.c
+10-0share/man/man4/iflib.4
+6-3stand/i386/pxeldr/pxeboot.8
+0-8sys/vm/vm_kern.c
+2-1share/man/man4/mrsas.4
+65-252 files not shown
+68-258 files

HardenedBSD/src 1524f52share/man/man4 mfi.4, sys/dev/mfi mfi_pci.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+3-2sys/vm/vm_object.h
+2-0share/man/man4/mfi.4
+1-0sys/dev/mfi/mfi_pci.c
+6-23 files

OpenBSD/ports 7SVMtnjeditors/novelwriter distinfo Makefile, editors/novelwriter/pkg PLIST

   update to novelwriter 2.8.1; dropped dependency on textproc/py-lxml
VersionDeltaFile
1.12+69-21editors/novelwriter/pkg/PLIST
1.15+2-2editors/novelwriter/distinfo
1.18+1-2editors/novelwriter/Makefile
+72-253 files