[AArch64][GISel][FastISel] Fix Windows "sret inreg". (#225190)
5dc8aeb26d2896c65cbea0d3b87f090241444bb6 added a special case to
SelectionDAG ISel for "sret inreg" parameters: they are copied to x0 on
return. There was a review comment suggesting that GISel and FastISel
also needed fixes, but through some mixup the followup never happened.
Fixes #225060
(cherry picked from commit 8890be35705834c5af8e21424d7900639be03180)
[DAGCombiner] Restrict combineOrOfSetCCToUSUBOCarry to ZeroOrOneBooleanContent. (#224759)
We need to ensure the carry in matches boolean contents. We are checking
MaskedValueIsZero which is only valid for ZeroOrOneBooleanContent.
We could check ComputeNumSignBits for ZeroOrNegativeOneBooleanContent,
but no in tree target supports USUBO_CARRY and
ZeroOrNegativeOneBooleanContent.
This was an oversight in #223396 due to incorrect documentation for
USUBO_CARRY. I will fix that in a separate patch.
(cherry picked from commit 51d290508d4dd980c3ba03bcc873926c41c6e591)
[DAGCombiner] Require a 0/1 carry-in when rebuilding a borrow chain (#223396)
combineOrOfSetCCToUSUBOCarry (aae871ba1224) rewrites
carry_out = (A <u B) | ((A == B) & carry_in)
to USUBO_CARRY(A, B, carry_in), accepting any value as carry_in.
USUBO_CARRY's third operand is specified as "1 if and only if there is
an incoming carry/borrow", so 0 and 1 are its only meaningful values.
Unlike SADDO_CARRY/SSUBO_CARRY it does not fall back to
getBooleanContents for wider types. The matched `and` is bitwise against
a 0/1 setcc, so only bit 0 of carry_in reaches carry_out and nothing
else constrains it; a carry_in with any other bit set is outside the
operand's contract and miscompiles.
Require carry_in to be known 0/1. Check known bits rather than look for
an `and carry_in, 1`: only bit 0 is demanded inside the `and`, so such a
mask is usually folded away before this combine runs. An i1 carry_in,
[6 lines not shown]
[lld] Don't drop RELR relocations for late-added GOT entries (#211911)
In #208959 we started dropping RELR relocations for late-added GOT
entries when reverting x86-64 GOTPCRELX relaxations in
X86_64::relaxOnce.
There is a separate unrelaxation bug where if the object files didn't
have any relocations of a certain type, we'd prune .relr.dyn (or even
.rela.dyn). Will be addressed separately.
Assisted-by: Gemini
(cherry picked from commit 5565740f2367093b89481ba7371adf820971977d)
[mlir] Reduce generated assembly printer compile time
Use fixed arrays for statically elided attributes and combine leading spaces
with literals. Move common operand printing out of generated call sites and
emit sliced operand getters to reduce optimizer work in large printers.
For omp.target, optimized print IR drops from 3,893 to 2,667 instructions.
The printing benchmark is 2.1% slower; check-mlir passes.
Assisted-by: Codex
Revert "[clang][OpenMP] ORDERED clause is allowed on FOR in 4.5+ (#22… (#225669)
…5106)"
This reverts commit b0d31f40189dbdcf8b62e2c6ef79b039c5202aba.
This missed the restriction that ORDERED is not allowed when DISTRIBUTE
is a constituent construct.
AMDGPU: Mark dead carry-out when rewriting scalar carry op to VALU
If an operation is expanded with a dead scc def, the resultant vcc def will
also be dead, so preserve the dead flag. Reduces implicit reliance on
LiveVariables recomputing dead flags later.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[AArch64][PAC] Reset `killed` operand flags in outlined functions
Presently, MachineOutliner does not take `killed` operand flags into
account when merging instruction sequences. While it sounds perfectly
reasonable not to inhibit merging of the instruction sequences that
only differ in `killed` flags (for N flags there is technically 2^N
valid ways to drop some subset of them), copying these flags from
an arbitrarily chosen representative instruction may result in
incorrect codegen of PAuth-related pseudo instructions on AArch64.
To keep `killed` flags conservatively correct as if `OUTLINED_FUNCTION`s
are virtually re-inserted at every call site, this patch takes the
simplest approach of resetting every `killed` flag inside the
outlined functions.
www/immich: Fix immich-admin for any login shell
su -m runs the command in the caller's login shell, so the wrapper
broke wherever root does not use a POSIX shell. chroot(8) drops the
privileges without a shell in between and passes the arguments to
execve(2) unchanged.
Reported by: mfechner
Sponsored by: Netzkommune GmbH
[AArch64] Allow cost-free cast absorption into widening instructions with multiple users (#210460)
Extend getCastInstrCost to recognize cast absorption into widening
instructions (uaddl, saddw, urhadd, etc.) when the cast has multiple
users, not just one.
Previously, the check only looked at a single user (`I->hasOneUser()`),
so a zext/sext feeding more than one widening-eligible instruction was
always costed as non-free, even when every user could individually
absorb it.
This also affected codegen: `optimizeExtendOrTruncateConversion` in
`AArch64ISelLowering.cpp` decides whether to lower a double-widening
zext via tbl shuffles based on whether `getCastInstrCost` reports the
cast as free. With multi-user casts always costed as non-free, this
took the tbl-lowering path in cases where every user could actually
absorb the cast for free, generating unnecessary tbl instructions.
Compiler Explorer:
[14 lines not shown]
pwd(1): De-obfuscate, style(9)
In getcwd_logical(), test for a '.' or '..' component in one of the most
straightforward and intelligible ways possible.
In particular, this removes a superfluous re-test of the the component's
first character being '.' when the first one did not pass and, more
importantly, prevents the second test from relying on a side-effect in
the first.
While here, for better clarity, replace the loop that searches for '/'
with a simple call to strchrnul().
Add high-level comments about what is going on.
While here, test explicitly that pointed 'char' values are not 0 ('\0')
(style(9)).
While here, separate the successive steps of getcwd_logical() with blank
[9 lines not shown]
[compiler-rt][ubsan] Fix ubsan_loop_detect sigaction setup and dynamic symbol list (#225495)
`__ubsan_install_trap_loop_detection` passed an un-initted ` sigaction`
to `sigaction(SIGPROF, ...)`, with garbage in `sa_flags` and `sa_mask`
(such as setting `SA_RESETHAND`, blocking `SIGILL`, and omitting
`SA_SIGINFO`).
This PR fixes it by zero-initialising sigaction
Two other drive-by cleanups:
- set `SA_SIGINFO | SA_RESTART` because ITIMER_PROF fires SIGPROF
periodically. Without SA_RESTART, any blocking syscall (read, write,
waitpid, etc.) interrupted by a periodic SIGPROF tick would spuriously
fail with EINTR instead of transparently resuming after SigprofHandler
returns.
- pass `EXTRA ubsan.syms.extra` to
`add_sanitizer_rt_symbols(clang_rt.ubsan_loop_detect ...)` in
`CMakeLists.txt` so `libclang_rt.ubsan_loop_detect.a.syms` is not
generated as an empty `{ };` dynamic list (which causes a syntax error
with GNU `ld.bfd`).
[mlir][tosa] Add MXFP support for REVERSE (#225058)
Accept the six block-scaled MX types in TOSA 1.1 draft compliance
checks. Preserve REVERSE on constant value splats whose block scales can
differ; reversing a unit dimension remains a no-op.
Cover supported types, version and extension requirements, invalid
shapes and axes, and block-scaled canonicalization.
Signed-off-by: Peng Sun <peng.sun at arm.com>
(cad/klayout) Updated 0.30.10 to 0.30.12
0.30.12 (2026-08-26):
* Bugfix: %GITHUB%/issues/2434 Application crashes with Ruby PCell
0.30.11 (2026-08-23):
* Bugfix: %GITHUB%/issues/2362 Range checks of integers in Python API and correct string deserialization of MIN_INT
* Bugfix: %GITHUB%/issues/2369 Skipping cell name in OASIS error messages or warning unless inside a cell
* Enhancement: %GITHUB%/issues/2374 LEF/DEF Import - skip duplicate Macros feature
* Enhancement: %GITHUB%/issues/2407 Visualize "Select" and "Partial" via selection box style
* Bugfix: %GITHUB%/issues/2416 Two-layer DRC check without merged first input produces separation violations that 0.30.9 does not reportbug
* Enhancement: %GITHUB%/issues/2417 Better error message in LVS "name" function
* Bugfix: %GITHUB%/issues/2419 Arc disappears when zoomed in and all anchor points are outside the viewportbug
* Bugfix: %GITHUB%/issues/2423 DRC regression (separation check)
* Bugfix: %GITHUB%/issues/2429 Internal error on triangulation
* Bugfix: DXF - avoiding generating duplicates of zero layer during DXF read/write spin.
* Bugfix: PCellDeclarationHelper documentation for Python was not visible in Assistant
* Enhancement: Text markers can now be configured to have a filled text box
* Bugfix: Python does not generate "long long" Variant types when not required
[16 lines not shown]
