[LoongArch] Support memcmp expansion for vectors and combine for i128/i256 setcc
This commit enables memcmp expansion for lsx/lasx. After doing
this, i128 and i256 loads which are illegal types on LoongArch
will be generated. Without process, they will be splited to
legal scalar type.
So this commit also enable combination for `setcc` to bitcast
i128/i256 types to vector types before type legalization and
generate vector instructions.
Inspired by x86 and riscv.
[CIR] Lay out allocas in the order classic codegen does (#231974)
At -O0 the order of a function's entry-block allocas is its stack frame
layout. CIR now creates the return value's alloca before the
parameters', and keeps hoisted block-scope allocas after the function's
own, matching classic codegen.
CIRGen creates `__retval` before the parameters, as classic's
StartFunction does, and the implicit `return 0` store for `main` moves
into emitFunctionProlog, where classic emits it. HoistAllocas places
each hoisted alloca after the allocas already at the start of the
destination block instead of in front of them.
Assisted-by: Cursor / claude-opus-5.5
---------
Co-authored-by: Andy Kaylor <akaylor at nvidia.com>
[libc++] Make usage of python3 work as intended on macOS benchmark runners (#232151)
Homebrew stops providing unversionned commands like `python3` in their
versionned formulae (`python at 3.14`) whenever it stops being the default.
As a result, the `python3` symlink moved from `<...>/bin` to
`<...>/libexec/bin` when the Python 3.15 formula was introduced,
displacing Python 3.14.
As a result, the macOS jobs started falling back to the system Python
3.9. Since llvm-lnt does not support Python 3.9 (which is EOL'd), that
failed the macOS benchmarking jobs (see for example [1]).
Fix this by adding <...>/libexec/bin to the path instead of just <...>/bin.
[1]: https://github.com/llvm/llvm-project/actions/runs/38039547247/job/114176935620
[PowerPC] Prefix option names with ppc-, turn disable- to positive options (#230393)
Rename the PowerPC CodeGen options so that they start with ppc-, and
turn the -disable-* options into positive options with the default
flipped. -enable-ppc-gen-scalar-mass becomes -ppc-scalar-mass and
-disable-ppc-ctrloops becomes -ppc-ctr-loops, since -ppc-gen-scalar-mass
and -ppc-ctrloops are pass names.
Preparatory for migrating to LibraryOptions.
Aided by Opus 5.5
[ORC] Set target triple on ReOptimizeLayer's orc-rt-lite module. (#232088)
addOrcRTLiteSupport created its helper module without a triple. An empty
triple defaults to ELF, so since #228429 (AsmPrinter reads the triple
from the Module, not the TargetMachine) the AArch64 AsmPrinter took its
ELF path on Mach-O hosts and called through a null
AArch64TargetStreamer.
Use the ExecutionSession's triple.
rdar://189983111
Co-authored by: Claude Sonnet 5.5
[libc++] Extract LNT benchmark validation into a reusable workflow (#232155)
This allows sharing the logic for validating the LNT machines definition
between the libc++ and the libstdc++ benchmarking jobs. As part of that,
I noticed that these jobs only used a subset of the fields in
machines.json, so this PR regroups them into a sub-entry. There are now
two aspects in machines.json: "when" we measure something, and "how" we
measure something, and both are sub-objects.
test: remove volatile to restore old behavior (#231722)
PR #230426 makes the memory access volatile. but it was pointed out in
review of PR #221870, volatile may break the test point. Remove the
volatile and use command line option to disable possible alloca
promotion.
iwm: add return status to set/clear prph bits
This brings these functions inline with OpenBSD
Locally tested:
* 3160, STA mode
* 7260, STA mode
* 8260, STA mode
* 9260, STA mode
Obtained from: OpenBSD a6e25c727a2214219715b51ba6af2221d7e0d674
Reviewed by: emaste
Differential Revision: https://reviews.freebsd.org/D60211
iwm: update phy context routines; add HT channel width parameter
Update the phy context routines to match what the openbsd snapshot
is doing. This involves some HT channel width stuff which although
I am not doing HT right now, it was juts easier to sync these
entirely versus just a partial sync.
* Update the phy context routines to match what openbsd is doing
* Although the openbsd driver has an iwm_phy_ctxt_update() routine
instead of add and modify, I'm leaving it as-is for now.
A bunch of refactoring is going to need to be done to properly
use an iwm_phy_ctxt_update() call and I didn't want to tackle
that in here.
* Add a UHB firmware capability phy context call; I can't test it
but it's mostly copy/paste.
* Add in a util to turn ieee80211_channel into the 'sco' variable
(the HT low/hi parameter) since it's done in openbsd in a
slightly different way.
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iwm: bring IWM_CSR_HW_IF_CONFIG_REG programming in line with openbsd
bring the iwm_nic_config() / IWM_CSR_HW_IF_CONFIG_REG programming
in line with openbsd.
Locally tested:
* 3160 STA mode
* 7260 STA mode
* 8260 STA mode
* 9260 STA mode
Obtained from: OpenBSD a6e25c727a2214219715b51ba6af2221d7e0d674
Differential Revision: https://reviews.freebsd.org/D60081
iwm: add DQA (dynamic queue assignment)
This is the minimum set of DQA bits from iwm at the given openbsd
commit place.
* add a method to map ac to queue / ring
* use the DQA command queue if needed
* glue to wire it up
Locally tested:
* Intel 7260, STA mode
* Intel 9260, STA mode
* Intel 8260, STA mode
* Intel 3160, STA mode
Obtained from: OpenBSD a6e25c727a2214219715b51ba6af2221d7e0d674
Differential Revision: https://reviews.freebsd.org/D60080
[InstCombine] Fold select of pow into select of the differing operand
When both arms of a select are calls to `llvm.pow` with one use that
differ in exactly one operand, sink the select into that operand:
$$
\mathrm{select}(c,\ x^{y},\ x^{z}) \rightarrow x^{\mathrm{select}(c,\ y,\ z)}
$$
$$
\mathrm{select}(c,\ x^{z},\ y^{z}) \rightarrow \mathrm{select}(c,\ x,\ y)^{z}
$$
This removes one `pow` call. FMF are intersected and debug locations
are merged. The transform is skipped when a differing operand is a
constant, since that may enable a cheaper lowering (e.g.
$x^2 \rightarrow x \cdot x$).
[mlir] `HasParallelRegion` means region may be parallel (#231372)
Clarify the documentation of `HasParallelRegion`. The presence of the
trait means that the op may have parallel semantics. This trait could be
turned into an op interface in the future. Also add the trait to some
operations where it was missing.
Assisted-by: Codex
Reland [AMDGPU] Handle gfx950 v_pk_{add,mul,fma}_f32 invalid op_sel (#232016)
gfx950 v_pk_add/mul/fma_f32 for certain op_sel combinations:
- Case 1 (v_pk_add/mul_f32): src0/src1 both VGPR with op_sel[1:0] ==
2'b10. Adjusted in GCNHazardRecognizer::fixPkF32InvalidOpSel by
commuting src0/src1 in place.
- Case 2/3 (v_pk_fma_f32): op_sel[2:1] == 2'b01, 2'b10, or 2'b11. Fixed
via SIInstrInfo::decomposePkFMAF32, which splits the packed FMA into two
independent scalar v_fma_f32s; wired in from both
SITargetLowering::AdjustInstrPostInstrSelection (SelectionDAG) and
AMDGPUInstructionSelector::select's G_FMA case (GlobalISel), both gated
on SIInstrInfo::isLegalPkFMAF32OpSel. A safety net that crashes the
compiler is added in GCNHazardRecognizer::fixPkF32InvalidOpSel.
Also reject the invalid op_sel encodings directly in the assembler
(AMDGPUAsmParser::validateOpSel) so hand-written/inline asm can't encode
them.
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[flang] Classify MOVE_ALLOC with noncoarray FROM as SIMPLE (#224923)
F2023 16.1 p5 classifies `MOVE_ALLOC` as simple when its `FROM` argument
is not a coarray, and no other standard intrinsic subroutine is pure or
simple. Mark a `MOVE_ALLOC` call `SIMPLE` and `PURE` only when `FROM` is
not a coarray. A call with a coarray `FROM` in a pure subprogram or `DO
CONCURRENT` is now also reported as a reference to an impure procedure.
Update `F202X.md` and add a test.
Part of #221457.
[libc] Use a syscall wrapper for `sched_setparam` (#231893)
Follow up of https://github.com/llvm/llvm-project/pull/231865.
This PR move `sched_setparam` behind the centralized syscall wrappers,
following `libc/docs/dev/syscall_wrapper_refactor.md`.
[Clang][counted_by] Use the innermost struct that contains the count
__builtin_dynamic_object_size and __builtin_counted_by_ref find the
count by walking the base expression to a struct that contains it, then
searching that struct's fields for the count. For a '.' member access,
StructAccessBase preferred the *outermost* such struct. When the struct
with the 'counted_by' field is embedded more than once, the search from
the outer struct finds the first copy's count, whichever copy is
accessed:
struct inner { int count; int *buf __counted_by(count); };
struct outer { struct inner a, b; };
__builtin_dynamic_object_size((*o).b.buf, 1) // used o->a.count
*__builtin_counted_by_ref((*o).b.buf) = n; // wrote o->a.count
Stop at the innermost member expression whose struct contains the count,
as is already done for '->' and array subscripts. Sema requires the
count to be in the same struct as the counted field, so the innermost
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