LLVM/project f2d5b39llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/RISCV splice.ll rvv-shuffle.ll

[RISCV] Add cost for @llvm.vector.splice.{left,right} (#179219)

Currently vector splice intrinsics are costed through getShuffleCost
when the offset is fixed. When the offset is variable though we can't
use a shuffle mask so it currently returns invalid.

This implements the cost in RISCVTTIImpl::getIntrinsicInstrCost as the
cost of a slideup and a slidedown, which matches the codegen.

It also implements the type based cost whenever the offset argument
isn't available.

It may be possible to reduce the cost in future when one of the vector
operands is known to be poison, in which case we only generate a single
slideup or slidedown.
DeltaFile
+372-7llvm/test/Analysis/CostModel/RISCV/splice.ll
+16-33llvm/test/Analysis/CostModel/RISCV/rvv-shuffle.ll
+13-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+401-403 files

OPNSense/core 870692csrc/opnsense/mvc/app/models/OPNsense/Base/FieldTypes InterfaceField.php, src/opnsense/mvc/tests/app/library/OPNsense/Firewall FilterRuleTest.php

tests: fix tests broken by #9744

The static option list caching mechanism is now invoked over a
nonexistant config.xm; caching no interfaces for the "*" static
options key.  In order to fix that add a reset for the list.

Would be nicer to move reset to BaseListField since a number
of fields use the static option list for caching but they all
define their own.
DeltaFile
+18-10src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/InterfaceField.php
+3-1src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes/InterfaceFieldTest.php
+0-1src/opnsense/mvc/tests/app/library/OPNsense/Firewall/FilterRuleTest.php
+21-123 files

NetBSD/src bjVmbzMsbin/gpt gpt_uuid.c

   Remove assumption that known type UIDs have a local alias

   Currently this changes nothing, as all known types have a known
   name (aka description), which is unlikely to ever change, and have
   been assigned an alias for use with gpt -- which might change in the
   future if we learn about types which no-one is ever likely to want
   to use gpt(8) to create (but which might exist in tables processed).

   Avoiding the assumptions is cheap (for both alias and name), so just
   do it, and no-one will ever need to care in the future.
VersionDeltaFile
1.29+17-9sbin/gpt/gpt_uuid.c
+17-91 files

LLVM/project c9d3b8allvm/lib/Target/AMDGPU/AsmParser AMDGPUAsmParser.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUAsmUtils.cpp

AMDGPU: Add syntax for s_wait_event values

Previously this would just print hex values. Print names for the
recognized values, matching the sp3 syntax.
DeltaFile
+42-3llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+30-0llvm/test/MC/AMDGPU/gfx12_err.s
+27-0llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
+16-10llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
+20-0llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
+18-0llvm/test/MC/AMDGPU/gfx11_asm_err.s
+153-138 files not shown
+209-1514 files

NetBSD/pkgsrc 8XOu6oPtextproc/ruby-xhtmldiff Makefile

   textproc/ruby-xhtmldiff: fix build on ruby40

   Require RUBY_ALLOW_HAS_RDOC on ruby40.
VersionDeltaFile
1.2+2-1textproc/ruby-xhtmldiff/Makefile
+2-11 files

LLVM/project fbe1334clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, libc/src/__support/wctype wctype_classification_utils.cpp

Rebase

Created using spr 1.3.6-beta.1
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458-2,041clang/test/OpenMP/task_codegen.cpp
+2,140-2,140clang/test/OpenMP/threadprivate_codegen.cpp
+4,100-13llvm/test/CodeGen/AArch64/clmul-fixed.ll
+3,681-0libc/src/__support/wctype/wctype_classification_utils.cpp
+23,221-14,0362,508 files not shown
+137,890-63,1702,514 files

LLVM/project f36e996clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, libc/src/__support/wctype wctype_classification_utils.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458-2,041clang/test/OpenMP/task_codegen.cpp
+2,140-2,140clang/test/OpenMP/threadprivate_codegen.cpp
+4,100-13llvm/test/CodeGen/AArch64/clmul-fixed.ll
+3,681-0libc/src/__support/wctype/wctype_classification_utils.cpp
+23,221-14,0362,508 files not shown
+137,890-63,1702,514 files

NetBSD/pkgsrc EgmCrQPtextproc/ruby-csv Makefile

   textproc/ruby-csv: not for ruby40

   Ruby 4.0.1 has the same version as bundled gem.
VersionDeltaFile
1.21+4-1textproc/ruby-csv/Makefile
+4-11 files

LLVM/project bc17014clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, libc/src/__support/wctype wctype_classification_utils.cpp

Rebase

Created using spr 1.3.6-beta.1
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458-2,041clang/test/OpenMP/task_codegen.cpp
+2,140-2,140clang/test/OpenMP/threadprivate_codegen.cpp
+4,100-13llvm/test/CodeGen/AArch64/clmul-fixed.ll
+3,681-0libc/src/__support/wctype/wctype_classification_utils.cpp
+23,221-14,0362,509 files not shown
+137,891-63,1712,515 files

LLVM/project 097a303clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, libc/src/__support/wctype wctype_classification_utils.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458-2,041clang/test/OpenMP/task_codegen.cpp
+2,140-2,140clang/test/OpenMP/threadprivate_codegen.cpp
+4,100-13llvm/test/CodeGen/AArch64/clmul-fixed.ll
+3,681-0libc/src/__support/wctype/wctype_classification_utils.cpp
+23,221-14,0362,509 files not shown
+137,891-63,1712,515 files

NetBSD/pkgsrc q0MCrlMtextproc/ruby-commonmarker23 Makefile

   textproc/ruby-commonmarker23: not for ruby40

   This packages is for ruby-redmine61 and it is not support ruby40.
VersionDeltaFile
1.4+4-1textproc/ruby-commonmarker23/Makefile
+4-11 files

LLVM/project e16f354llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/RISCV abs.ll

[RISCV][TTI] Adjust the cost of `llvm.abs` intrinsic when `Zvabd` exists

When `Zvabd` exists, `llvm.abs` is lowered to `vabs.v` so the cost
is 1.

Reviewers: mshockwave, topperc, lukel97, skachkov-sc, preames

Reviewed By: topperc

Pull Request: https://github.com/llvm/llvm-project/pull/180146
DeltaFile
+36-0llvm/test/Analysis/CostModel/RISCV/abs.ll
+5-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+41-02 files

LLVM/project 0c583e7clang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaAMDGPU.cpp

AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (#180170)

Exactly match the s_wait_event instruction. For some reason we already
had this instruction used through llvm.amdgcn.s.wait.event.export.ready,
but that hardcodes a specific value. This should really be a bitmask
that
can combine multiple wait types.

gfx11 -> gfx12 broke compatabilty in a weird way, by inverting the
interpretation of the bit but also shifting the used bit by 1. Simplify
the selection of the old intrinsic by just using the magic number 2,
which should satisfy both cases.
DeltaFile
+42-9llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.wait.event.ll
+27-0clang/test/SemaOpenCL/builtins-amdgcn-s-wait-event.cl
+24-0clang/lib/Sema/SemaAMDGPU.cpp
+11-0llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+7-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+2-4llvm/lib/Target/AMDGPU/SOPInstructions.td
+113-131 files not shown
+114-137 files

OpenBSD/ports 9wAfuaynet/py-cbor2 distinfo Makefile

   Update to py3-cbor2-5.8.0.
VersionDeltaFile
1.2+2-2net/py-cbor2/distinfo
1.2+1-1net/py-cbor2/Makefile
+3-32 files

OpenBSD/ports X9wxZkDmisc/p5-Finance-Quote Makefile distinfo, misc/p5-Finance-Quote/pkg PLIST

   Update to p5-Finance-Quote-1.68.
VersionDeltaFile
1.17+4-12misc/p5-Finance-Quote/pkg/PLIST
1.32+3-1misc/p5-Finance-Quote/Makefile
1.16+2-2misc/p5-Finance-Quote/distinfo
+9-153 files

OPNSense/core 49d5736. plist, src/opnsense/mvc/tests/app/library/OPNsense/Firewall FilterRuleTest.php

tests: one more for protocol replacements; closes #9744

The tests aren't complete but they do cover parseReplaceSimple()
in its latest form so that's good enough.

Just as a note the tests are designed to be render-agnostic so
that we always start with our rule input and produce pf.conf
compatible rulesets with the tests.  There are two purposes here:

1. Catch regressions when parsers are changed and that also includes
   switching the parser implementation completely in the future.

2. Make sure that the files are actually compilable by pf.conf and
   this should be covered later (the conf files are there on the
   disk for that purpose).

This is the right type of testing for the purpose since the pf.conf
syntax is virtually static and will require little maintenance.
Just needs a lot more coverage for the missing features/rule types.
DeltaFile
+20-0src/opnsense/mvc/tests/app/library/OPNsense/Firewall/FilterRuleTest.php
+5-0src/opnsense/mvc/tests/app/library/OPNsense/Firewall/FilterRuleTest/testProtocol.conf
+1-0plist
+26-03 files

FreeBSD/src dac3b99. CONTRIBUTING.md

CONTRIBUTING.md: Fix links to section

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>

Sponsored by:   The FreeBSD Foundation
Pull Request:   https://github.com/freebsd/freebsd-src/pull/2010
DeltaFile
+2-2CONTRIBUTING.md
+2-21 files

LLVM/project 700c1c9clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, libc/src/__support/wctype wctype_classification_utils.cpp

Rebase

Created using spr 1.3.6-beta.1
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458-2,041clang/test/OpenMP/task_codegen.cpp
+2,140-2,140clang/test/OpenMP/threadprivate_codegen.cpp
+4,100-13llvm/test/CodeGen/AArch64/clmul-fixed.ll
+3,681-0libc/src/__support/wctype/wctype_classification_utils.cpp
+23,221-14,0362,506 files not shown
+137,867-63,1902,512 files

LLVM/project b141939clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, libc/src/__support/wctype wctype_classification_utils.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+5,528-5,528llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314-4,314llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458-2,041clang/test/OpenMP/task_codegen.cpp
+2,140-2,140clang/test/OpenMP/threadprivate_codegen.cpp
+4,100-13llvm/test/CodeGen/AArch64/clmul-fixed.ll
+3,681-0libc/src/__support/wctype/wctype_classification_utils.cpp
+23,221-14,0362,506 files not shown
+137,867-63,1902,512 files

LLVM/project fe73774llvm/lib/Target/ARM ARMISelLowering.cpp ARMInstrNEON.td, llvm/test/CodeGen/ARM fp-intrinsics-vector-v8.ll

[ARM] Treat strictfp vector rounding operations as legal

Previously, the strictfp variants of rounding operations (FLOOR, ROUND,
etc) were handled in SelectionDAG via the default expansion, which
splits vector operation into scalar ones. This results in less efficient
code.

This change declares the strictfp counterparts of the vector rounding
operations as legal and modifies existing rules in tablegen descriptions
accordingly.
DeltaFile
+25-40llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
+20-0llvm/lib/Target/ARM/ARMISelLowering.cpp
+1-16llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
+6-6llvm/lib/Target/ARM/ARMInstrNEON.td
+6-6llvm/lib/Target/ARM/ARMInstrMVE.td
+58-685 files

LLVM/project 972e73bllvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoZvabd.td, llvm/test/CodeGen/RISCV/rvv abs-vp.ll fixed-vectors-abs-vp.ll

[RISCV][CodeGen] Lower `ISD::ABS` to Zvabd instructions

We add pseudos/patterns for `vabs.v` instruction and handle the
lowering in `RISCVTargetLowering::lowerABS`.

Reviewers: topperc, 4vtomat, mshockwave, preames, lukel97, tclin914

Reviewed By: mshockwave

Pull Request: https://github.com/llvm/llvm-project/pull/180142
DeltaFile
+319-0llvm/test/CodeGen/RISCV/rvv/abs-vp.ll
+247-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs-vp.ll
+107-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll
+94-0llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll
+16-10llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+26-0llvm/lib/Target/RISCV/RISCVInstrInfoZvabd.td
+809-103 files not shown
+833-389 files

LLVM/project 3b76dabllvm/unittests/CodeGen MFCommon.inc

BogusTargetmachine comment

Created using spr 1.3.5-bogner
DeltaFile
+3-3llvm/unittests/CodeGen/MFCommon.inc
+3-31 files

NetBSD/pkgsrc l3ZHyLEdoc CHANGES-2026 TODO

   doc: Updated security/spiped to 1.6.4
VersionDeltaFile
1.990+2-1doc/CHANGES-2026
1.26782+1-2doc/TODO
+3-32 files

NetBSD/pkgsrc BdRLPmSsecurity/spiped Makefile distinfo

   spiped: update to 1.6.4.

   spiped-1.6.4
   * Fixes a bug which can cause spiped to abort if a RST packet arrives
     from one side of a pipe at the same time as a FIN packet arrives from
     the other end.
   spiped-1.6.3
   * Add -b <bind address> (spiped and spipe) to bind the outgoing address.
   spiped-1.6.2
   * Warn if the maximum number of connections is reached in spiped.
   * Add --syslog (spiped) to send warnings to syslog when daemonized.
   * Significantly improve performance of AES-CTR and SHA256 on amd64 and aarch64.
   * Add ability to suppress POSIX runtime checks during compilation to simplify
     cross-compiling.
VersionDeltaFile
1.22+7-6security/spiped/Makefile
1.9+4-4security/spiped/distinfo
+11-102 files

NetBSD/pkgsrc ahnMfXHdevel/spin Makefile

   spin: switch to https
VersionDeltaFile
1.8+2-2devel/spin/Makefile
+2-21 files

OpenBSD/ports nwnAzNFdevel/py-dtfabric distinfo Makefile, devel/py-dtfabric/pkg PLIST

   Update to py3-dtfabric-20251118.
VersionDeltaFile
1.11+6-0devel/py-dtfabric/pkg/PLIST
1.6+2-2devel/py-dtfabric/distinfo
1.19+1-2devel/py-dtfabric/Makefile
+9-43 files

NetBSD/pkgsrc jcohJ7Hlang/spidermonkey Makefile

   spidermonkey: update HOMEPAGE
VersionDeltaFile
1.34+2-2lang/spidermonkey/Makefile
+2-21 files

FreeBSD/ports 8845ac3www/gohugo distinfo Makefile

www/gohugo: Update to 0.155.3

ChangeLog: https://github.com/gohugoio/hugo/releases/tag/v0.155.3

 * hugolib: Don't render default site redirect for non-primary isHTML output
   formats
 * server: Fix stuck server global error logging
 * build(deps): bump github.com/evanw/esbuild from 0.27.2 to 0.27.3
 * server: Fix panic when the server browser error handler tried to use a config
   in a state of flux

Approved by:    doceng@ (implicit)
DeltaFile
+5-5www/gohugo/distinfo
+1-2www/gohugo/Makefile
+6-72 files

NetBSD/pkgsrc DGmQvxhlang/spidermonkey185 Makefile

   spidermonkey185: update HOMEPAGE
VersionDeltaFile
1.17+2-3lang/spidermonkey185/Makefile
+2-31 files

LLVM/project aa80896clang/include/clang/Sema Sema.h, clang/lib/Sema SemaType.cpp SemaDeclAttr.cpp

[Clang][HIP][CUDA] Validate that variable type fits in address spaces (#178909)

Currently, Clang only checks arrays and structures for size at a
top-level view, that is it does not consider whether they will fit in
the address space when applying the address space attribute. This can
lead to situations where a variable is declared in an address space but
its type is too large to fit in that address space, leading to
potentially invalid modules.

This patch proposes a fix for this by checking the size of the type
against the maximum size that can be addressed in the given address
space when applying the address space attribute.

This does not currently handle instantiations of dependent variables, as
the attributes are not re-processesd at that time. This is planned for
further investigation and a follow-up patch.

---------

Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
Co-authored-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
DeltaFile
+23-0clang/test/SemaHIP/shared-variable-too-large.hip
+18-0clang/lib/Sema/SemaType.cpp
+13-0clang/test/SemaOpenCL/amdgpu-variables-too-large-for-address-space.cl
+11-0clang/include/clang/Sema/Sema.h
+8-0clang/lib/Sema/SemaDeclAttr.cpp
+6-0clang/lib/Sema/SemaDecl.cpp
+79-02 files not shown
+84-18 files