NetBSD/pkgsrc h2h7uVa — doc TODO CHANGES-2026

   doc: Updated sysutils/fd-find to 10.5.1
VersionDeltaFile
1.28289+1-2doc/TODO
1.7657+2-1doc/CHANGES-2026
+3-32 files

NetBSD/pkgsrc fAKIKEK — sysutils/fd-find Makefile cargo-depends.mk

   fd-find: update to 10.5.1.

   Bugfixes

       Fix --absolute-path turning verbatim (\\?\) search paths into relative paths on Windows: \\?\UNC\server\share is now reported as \\server\share, and \\?\Volume{...} paths are kept intact, see #2207 (@Duo-ee)
       Make --ignore and --no-hidden after -u override only their half of -u, see #2192 (@NavpreetSSidhu)
       Fix inline case-insensitive regex flags incorrectly making other --and patterns case-sensitive, see #2184 (@mabunemeh)
       Accept --format templates that start with - when passed as a separate argument, see #2126 (@vulragrag-star)
       Don't incorrectly escape newlines in error messages, see #2104
       Restore jemalloc as default allocator on supported systems
       Fix the cargo binstall release URL, which named the crate (fd-find) instead of the binary (fd) and fell back to a third-party mirror
       Fix integer overflow when parsing size constraints, rejecting values that exceed u64::MAX instead of panicking, see #2196 (@parneetsingh022).
       Various fixes and updates to zsh completion
       Fix --glob patterns when using --full-path on windows. See #2067.
VersionDeltaFile
1.20+166-271sysutils/fd-find/distinfo
1.16+54-89sysutils/fd-find/cargo-depends.mk
1.21+2-2sysutils/fd-find/Makefile
+222-3623 files

NetBSD/pkgsrc 6fvlqzj — doc CHANGES-2026

   doc: Updated net/rrsync to 3.5.2
VersionDeltaFile
1.7656+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc 7GMU1N8 — doc CHANGES-2026

   doc: Updated sysutils/proc-cli to 2.3.0
VersionDeltaFile
1.7655+2-1doc/CHANGES-2026
+2-11 files

LLVM/project b3d84c0 — clang/lib/CodeGen BackendUtil.cpp, clang/test/CodeGen sanitize-memory-merge.c

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+4-2clang/lib/CodeGen/BackendUtil.cpp
+0-1clang/test/CodeGen/sanitize-memory-merge.c
+4-32 files

NetBSD/pkgsrc sVLXlA3 — sysutils/proc-cli cargo-depends.mk Makefile

   proc-cli: Update to version 2.3.0

   Changes since 2.2.0:
   - on, info, for and why show the same card for a process
   - process tables show the user, uptime and command
   - ports says if each port is reachable from the network
   - values proc cannot read show as "-", not 0
   - JSON adds parent name, child count, CPU time, open files
VersionDeltaFile
1.2+4-4sysutils/proc-cli/distinfo
1.2+2-2sysutils/proc-cli/Makefile
1.2+0-0sysutils/proc-cli/cargo-depends.mk
+6-63 files

NetBSD/pkgsrc CrwSrCQ — doc CHANGES-2026 TODO

   doc: Updated net/rsync to 3.5.2
VersionDeltaFile
1.28288+3-1doc/TODO
1.7654+2-1doc/CHANGES-2026
+5-22 files

FreeBSD/ports 90edaea — ports-mgmt/pkg/files pkg_triggers.in

ports-mgmt/pkg: fix missing git add

Reported by:    otis
DeltaFile
+36-0ports-mgmt/pkg/files/pkg_triggers.in
+36-01 files

LLVM/project 0c99d12 — clang/test/CodeGen sanitize-memory-merge.c

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+21-0clang/test/CodeGen/sanitize-memory-merge.c
+21-01 files

LLVM/project 5756495 — clang/lib/CodeGen BackendUtil.cpp, clang/test/CodeGen sanitize-memory-merge.c

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+0-20clang/test/CodeGen/sanitize-memory-merge.c
+2-4clang/lib/CodeGen/BackendUtil.cpp
+2-242 files

NetBSD/pkgsrc Hq0SSZx — net/rsync Makefile.common distinfo

   rsync: update to 3.5.2.

   # NEWS for rsync 3.5.2 (4 Nov 2026)

   ## Changes in this version:

   ### BUG FIXES:
   - Fixed interrupted `--append` and `--inplace` transfers writing the final
     256 KiB buffer twice. An interrupted destination now remains a clean prefix
     which the next transfer can resume or repair.
   - Fixed uploads through `rrsync` when the destination file already exists.
     Existing files are now reached beneath a pinned parent directory instead of
     being passed as an unwritable `/proc/self/fd/N` destination.
   - Fixed poor matching performance on large sparse and repeated-block files
     when duplicate checksum chains exhausted the search limit. Valid basis
     blocks are no longer hidden behind duplicate entries.
   - Bounded strong-checksum work when a malicious receiver supplies weak
     checksums that collide with consecutive rolling windows
     (CVE-2026-119741).

    [46 lines not shown]
VersionDeltaFile
1.70+4-4net/rsync/distinfo
1.4+2-2net/rsync/Makefile.common
+6-62 files

LLVM/project a19c00c — clang/test/CodeGen sanitize-memory-merge.c

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+0-21clang/test/CodeGen/sanitize-memory-merge.c
+0-211 files

LLVM/project ad6ea62 — offload/plugins-nextgen/common/src/Utils ELF.cpp

[Offload] Don't report ELF symbols that run past its section (#238709)

It seems that the L0 ELF contains variables considered to be zero-filled
in sections not marked with `SHT_NOBITS`. Being zero-filled their size
goes beyon the limits of the memory image which produces failures when
checking the bounds in `olGetSymbol`.

This fix adds a workaround for variables in L0 images which would extend beyond their ELF section
as having no contents in the image.

Fixes regression introduced by #235935

Failure analysis done by Claude.
DeltaFile
+8-0offload/plugins-nextgen/common/src/Utils/ELF.cpp
+8-01 files

FreeBSD/ports 35b01ec — net-p2p/c-lightning Makefile Makefile.crates

net-p2p/c-lightning: upgrade from 26.06.9 to 26.06.10
DeltaFile
+21-111net-p2p/c-lightning/distinfo
+9-54net-p2p/c-lightning/Makefile.crates
+1-2net-p2p/c-lightning/Makefile
+31-1673 files

LLVM/project 8517ee7 — llvm/lib/Target/ARM/MCTargetDesc ARMInstPrinter.cpp, llvm/test/CodeGen/ARM inlineasm-switch-mode.ll

[ARM] Fix A32 single-register PUSH/POP preferred disassembly aliases

For A32, `POP`/`PUSH` of a single register encodes as an `LDR`/`STR`.
When the code for this was first committed in 2011 in change 8ba76c6d5,
the Arm ARM only mentioned that `POP` is listed as the "standard syntax".

Later, in 2014, the Arm ARM DDI0487A.e, §F7.1.137 was updated to
specifically say that `POP`/`PUSH` "is always the preferred disassembly."

I suspect the intention was to prefer pop/push, but:

  * for PUSH: the decoder supplied positive 4294967292, so comparing it
    with -4 failed. Changed this to a int32_t.
  * for POP:  the decoder supplied a packed addressing-mode value, so
    comparing the entire value with 4 failed. We need to check
    that the direction is add and the offset is 4

and then tests were then added in change ed6d3e813 for disassembly
with ldr/str.

    [2 lines not shown]
DeltaFile
+3-2llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
+2-2llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt
+1-1llvm/test/CodeGen/ARM/inlineasm-switch-mode.ll
+6-53 files

LLVM/project 1af6356 — llvm/lib/Target/ARM/Disassembler ARMDisassembler.cpp, llvm/lib/Target/ARM/MCTargetDesc ARMInstPrinter.cpp

fixup! Use int32_t instead of casting
DeltaFile
+1-1llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
+1-1llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+2-22 files

LLVM/project 4b2ff98 — clang/docs BoundsSafety.md, clang/docs/BoundsSafety BoundsSafety.md

Rebase

Created using spr 1.3.7
DeltaFile
+3,186-0llvm/test/CodeGen/AMDGPU/amdgcn-av-scopes.ll
+1,140-10llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
+944-96llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
+5-967clang/docs/BoundsSafety.md
+969-0clang/docs/BoundsSafety/BoundsSafety.md
+437-508llvm/test/CodeGen/AArch64/fixed_masked_deinterleaved_loads.ll
+6,681-1,5812,260 files not shown
+55,368-21,8472,266 files

LLVM/project 6d48c12 — clang/test/CodeGen sanitize-memory-merge.c, llvm/test/Instrumentation/MemorySanitizer merge_checks.ll

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+2-4llvm/test/Instrumentation/MemorySanitizer/merge_checks.ll
+2-4clang/test/CodeGen/sanitize-memory-merge.c
+4-82 files

LLVM/project f062844 — clang/test/CodeGen sanitize-memory-merge.c, llvm/test/Instrumentation/MemorySanitizer merge_checks.ll

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+11-9llvm/test/Instrumentation/MemorySanitizer/merge_checks.ll
+11-9clang/test/CodeGen/sanitize-memory-merge.c
+22-182 files

FreeBSD/src d67c363 — usr.sbin/bhyve virtio.c

bhyve: check paddr_guest2host return in _vq_record

_vq_record() stored the result of paddr_guest2host() without checking for
NULL. A guest descriptor with an invalid address causes a NULL dereference
in every virtio driver. Return early on failure; the caller sees zero
descriptors and discards the chain.

The indirect path already performs this check (line 357).

Reviewed by:    bnovkov
Differential Revision:  https://reviews.freebsd.org/D60870
MFC after:      1 week
DeltaFile
+7-0usr.sbin/bhyve/virtio.c
+7-01 files

LLVM/project 9a0bb33 — llvm/lib/CodeGen RegisterCoalescer.cpp, llvm/test/CodeGen/AArch64 coalescer-readundef-subreg-def-subregtoreg.mir coalescer-readundef-subreg-def.mir

Coalescer: Preserve read-undef when coalescing into a larger reg.

When rewriting a %1:gpr32 def into %0.sub_32:gpr64, the new def operand
can be marked with undef if no lanes from the larger gpr64 reg are live.

Assisted-by: codex (test reduction)
DeltaFile
+115-0llvm/test/CodeGen/AArch64/coalescer-readundef-subreg-def.mir
+65-0llvm/test/CodeGen/AArch64/coalescer-readundef-subreg-def-subregtoreg.mir
+14-1llvm/lib/CodeGen/RegisterCoalescer.cpp
+194-13 files

LLVM/project 83800e7 — llvm/include/llvm/IR IRBuilder.h

Revert "[IRBuilder] Assert correct offset width for CreatePtrAdd" (#238859)

Reverts llvm/llvm-project#238806

There are some buildbot failures.
DeltaFile
+2-4llvm/include/llvm/IR/IRBuilder.h
+2-41 files

NetBSD/pkgsrc oXBjiOz — doc CHANGES-2026

   doc: Updated devel/py-pip to 26.3nb1
VersionDeltaFile
1.7653+2-1doc/CHANGES-2026
+2-11 files

LLVM/project 9bf51e7 — mlir/lib/Interfaces ControlFlowInterfaces.cpp, mlir/test/Transforms type-changing-region-branch-canonicalize.mlir

[mlir][Interfaces] Check types when replacing successor inputs (#238121)

In RegionBranchOpInterface, operations can override areTypesCompatible
to allow non-identical types along control-flow edges. For example, an
operation some_op may forward an operand of type wrapper<T> to a block
argument of type T, or yield a value of type T to an op result of type
wrapper<T>.

Previously, MakeRegionBranchOpSuccessorInputsDead and
RemoveDuplicateSuccessorInputUses replaced uses of successor inputs
directly via replaceAllUsesWith without checking that the replacement
value has the same type. When areTypesCompatible permits type
transitions along region boundaries, this produced ill-typed IR and
verification failures.

This patch fixes the issue by:
1. Guarding MakeRegionBranchOpSuccessorInputsDead to skip replacing a
successor input if replacement.getType() != value.getType().
2. Incorporating Type into the equivalence key (MapKey) in

    [2 lines not shown]
DeltaFile
+130-0mlir/test/Transforms/type-changing-region-branch-canonicalize.mlir
+41-0mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+30-10mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+17-0mlir/test/lib/Dialect/Test/TestOps.td
+218-104 files

NetBSD/pkgsrc j62NonM — devel/py-pip Makefile distinfo, devel/py-pip/patches patch-src_pip___internal_operations_install_wheel.py

   devel/py-pip: Fix runtime error witn py-distlib-0.4.4

   * Bump PKGREVISION.
   * Fix build failure of emulators/qemu at least.
VersionDeltaFile
1.5+2-2devel/py-pip/patches/patch-src_pip___internal_operations_install_wheel.py
1.81+2-2devel/py-pip/distinfo
1.96+2-1devel/py-pip/Makefile
+6-53 files

LLVM/project ef066db — clang/docs ReleaseNotes.md, clang/lib/Sema SemaExpr.cpp

[Clang] Fix crash on comparisons of `_BitInt` vectors wider than 128 bits (#232797)

Fixes #200665

`Sema::GetSignedVectorType` picks the element type for the result of a
vector comparison by matching the element's size against `char`,
`short`, `int`, `__int128`, `long` and `long long`, and asserts when
nothing matches. Since `_BitInt` became a legal vector element in Clang
16, any `_BitInt` wider than 128 bits falls off the end of that chain:
`a > 0` on a `_BitInt(512)` vector trips the assertion, and a release
build hands back a `long long` vector instead. The malformed input in
the report is incidental; a plain `v3i512 f(v3i512 a) { return a > 0; }`
crashes the same way.

The `_BitInt` case is now handled where the asserts used to fire: after
the builtin size checks, a `_BitInt` element with no builtin counterpart
produces the signed `_BitInt` of the same width, in the same vector kind
and with the same element count. Widths that match a builtin integer
keep mapping to it exactly as before, so nothing changes for `_BitInt`

    [2 lines not shown]
DeltaFile
+125-0clang/test/SemaCXX/ext-int-vector.cpp
+79-0clang/test/Sema/ext-int.c
+44-0clang/test/CodeGenCXX/ext-int.cpp
+14-7clang/lib/Sema/SemaExpr.cpp
+1-0clang/docs/ReleaseNotes.md
+263-75 files

LLVM/project 283045b — llvm/lib/Target/BPF BPFISelLowering.cpp BPFInstrInfo.td, llvm/test/CodeGen/BPF atomics_mem_order_v3.ll atomics_mem_order_v1.ll

[BPF] Expand atomicrmw sub into atomicrmw add of negated value (#236193)

https://github.com/llvm/llvm-project/pull/184715 changed `InstCombine`
to rewrite `atomicrmw add(p, sub(0, x))` into `atomicrmw sub(p, x)`. The
64-bit `atomic_load_sub` patterns were placed outside `BPFHasALU32`,
causing `-mcpu=v1/v2` to lower subtractions to `XFADDD`
(`atomic_fetch_add`) even when the return value is unused. This causes
Linux 5.10 kernels (still supported per
https://www.kernel.org/category/releases.html and used in Android) to
reject the BPF program. Since BPF has no atomic sub instruction, we
allow atomic sub to lower to atomic add of negated value by removing the
`atomic_load_sub` patterns from `BPFInstrInfo.td`.

As a result, this PR partially reverts
https://github.com/llvm/llvm-project/pull/107343 and
https://github.com/llvm/llvm-project/pull/210371.

Assisted-by: Gemini
DeltaFile
+69-39llvm/test/CodeGen/BPF/atomics_mem_order_v1.ll
+20-24llvm/test/CodeGen/BPF/atomics_mem_order_v3.ll
+1-27llvm/lib/Target/BPF/BPFInstrInfo.td
+2-0llvm/lib/Target/BPF/BPFISelLowering.cpp
+92-904 files

LLVM/project ad413ee — lldb/include/lldb/Core Mangled.h, lldb/include/lldb/Target Language.h

[lldb] Let language plugins register their mangling schemes  (#232925)

Currently Mangled recognizes the names of each mangling scheme by
hardcoded prefixes, so a language plugin can't bring a scheme that
LLDB doesn't already know.

This patch adds a registry of mangling schemes to Mangled. Language
plugins register the prefixes of their schemes when they are
initialized, and Mangled hands the names of those schemes to the
plugin that registered them. The registry also records each scheme's
language, which replaces Language::HandlesManglingScheme().

CPlusPlusLanguage now registers the Itanium and MSVC schemes.

Assisted-by: Claude

Depends on https://github.com/llvm/llvm-project/pull/232922
DeltaFile
+170-27lldb/source/Core/Mangled.cpp
+47-0lldb/unittests/Core/MangledTest.cpp
+23-19lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
+31-5lldb/include/lldb/Core/Mangled.h
+14-19lldb/source/Target/Language.cpp
+5-10lldb/include/lldb/Target/Language.h
+290-803 files not shown
+294-859 files

LLVM/project d242d76 — llvm/lib/Target/AArch64 AArch64RegisterInfo.cpp, llvm/test/CodeGen/AArch64 fcvt-i256.ll subreg-to-reg-coalescing.mir

[AArch64] Eliminate shouldCoalesce restriction.

This does not enforce much, we are already very careful about ORRW,
which is only considered as a copy instruction when we can prove it's
not performing a required zero extension.
DeltaFile
+20-25llvm/test/CodeGen/AArch64/aarch64-matrix-umull-smull.ll
+7-7llvm/test/CodeGen/AArch64/predicate-as-counter-loop-rewrites.ll
+6-7llvm/test/CodeGen/AArch64/implicit-def-subreg-to-reg-regression.ll
+4-6llvm/test/CodeGen/AArch64/subreg-to-reg-coalescing.mir
+0-9llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+1-8llvm/test/CodeGen/AArch64/fcvt-i256.ll
+38-625 files not shown
+43-7411 files

LLVM/project d0734b0 — llvm/test/CodeGen/AArch64 zext-reg-coalesce.ll zext-reg-regalloc.mir

[AArch64] Add tests to document SUBREG_TO_REG and INSERT_SUBREG behaviour

This will help when/if slowly deprecating SUBREG_TO_REG and corresponding
optimisations. The point is to show that SUBREG_TO_REG does not provide
extra guarantees regarding upper bits compared to e.g. INSERT_SUBREG or
REG_SEQUENCE.
DeltaFile
+179-19llvm/test/CodeGen/AArch64/zext-reg-coalesce.mir
+135-0llvm/test/CodeGen/AArch64/subreg-to-reg-coalescing.mir
+120-0llvm/test/CodeGen/AArch64/zext-reg-regalloc.mir
+24-0llvm/test/CodeGen/AArch64/zext-reg-coalesce.ll
+458-194 files