LLVM/project c003bfbllvm/lib/Target/AMDGPU SIRegisterInfo.cpp, llvm/test/CodeGen/AMDGPU eliminate-frame-index-flat-scratch-frame-reg-no-sgpr.ll

[AMDGPU] Fix eliminateFrameIndex assertion when reusing the frame register. (#215182)

This is a follow-up patch that solves the crashing test in the #215180 

On a flat-scratch target, a frame index used by a VALU instruction with
a live frame register but no scavengeable SGPR entered the branch that
assumes no frame register exists, tripping `assert(!FrameReg && "there
is a frame register!")`.

Restore the `!FrameReg` term in the guard so this case falls through to
the existing path that reuses the frame register as the temporary
(offset folded in, then restored). The `!FrameReg` assertion is moved
into the SVS
fallback, where it actually holds.
DeltaFile
+9-9llvm/test/CodeGen/AMDGPU/eliminate-frame-index-flat-scratch-frame-reg-no-sgpr.ll
+10-2llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+19-112 files

LLVM/project 848e563llvm/test/CodeGen/ARM float-abi-module-flag.ll

Fix test comment
DeltaFile
+1-1llvm/test/CodeGen/ARM/float-abi-module-flag.ll
+1-11 files

LLVM/project fbaa112llvm/lib/Target/ARM ARMAsmPrinter.cpp ARMTargetMachine.cpp, llvm/test/CodeGen/ARM float-abi-module-flag.ll

ARM: Read float ABI from the "float-abi" module flag

Use the value from the module flag if present, otherwise
fall back on the legacy TargetOptions field until that is
removed.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+43-0llvm/test/CodeGen/ARM/float-abi-module-flag.ll
+10-1llvm/lib/Target/ARM/ARMTargetMachine.cpp
+6-1llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+59-23 files

OPNSense/core 3fa8a4csrc/opnsense/mvc/app/views/OPNsense/Diagnostics fw_log.volt

Firewall: Log Files: Live View - htmlSafe() action search value

PR: GHSA-9h93-hhcx-957c
(cherry picked from commit 14de8b0235246b83a1824ca9a5f052817fbd035b)
DeltaFile
+1-1src/opnsense/mvc/app/views/OPNsense/Diagnostics/fw_log.volt
+1-11 files

OPNSense/core af24a9fsrc/opnsense/mvc/app/models/OPNsense/Interfaces NetworkInterface.xml

Interfaces: Assignments - strict description fields as before in interfaces_assign.php

Earlier code dropped all unallowed fields in https://github.com/opnsense/core/blob/8cc69b21e0f4c2622fc8a62df2a15ba7cb1e731f/src/www/interfaces_assign.php#L121

PR: GHSA-9h93-hhcx-957c
(cherry picked from commit 7f6811fea620c94d6bd13aaa13ecf5df90d939a0)
DeltaFile
+3-1src/opnsense/mvc/app/models/OPNsense/Interfaces/NetworkInterface.xml
+3-11 files

OPNSense/core 8356822src/www system_authservers.php interfaces.php

ui: add some more legacy_html_escape_form_data() safeguards

PR: GHSA-6vv6-fpw9-8r2g
(cherry picked from commit 096071af4be64380a34f396e1718008247c91dc0)
DeltaFile
+6-2src/www/interfaces.php
+4-2src/www/system_authservers.php
+10-42 files

OPNSense/core 4a87f70src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api ServiceController.php

VPN: OpenVPN: Connection Status - add some input validation for control characters

PR: GHSA-fqmm-g6xw-qhm4
(cherry picked from commit 024d986d43538b5261413f6cf5b815175e9253b1)
DeltaFile
+4-0src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api/ServiceController.php
+4-01 files

OPNSense/core a2708c7src/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt alias.volt, src/opnsense/mvc/app/views/OPNsense/IDS policy.volt

mvc: add some missint htmlSafe() calls for generated HTML

PR: GHSA-75fw-j788-j4hj
(cherry picked from commit 5786beb80c5410a170b44ef6f1532ac071e135bd)
DeltaFile
+3-3src/opnsense/mvc/app/views/OPNsense/IDS/policy.volt
+1-1src/opnsense/mvc/app/views/OPNsense/IPsec/sad.volt
+1-1src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+1-1src/opnsense/mvc/app/views/OPNsense/Firewall/alias.volt
+6-64 files

NetBSD/src 9FRb9Cksys/arch/arm/ti files.ti ti_edma.c, sys/arch/evbarm/conf GENERIC_V5

   evbarm/ti_edma: enable on am18xx SoCs

   The linux dt-bindings allow two different ways to specify power/clock domains for the edma3. This commit adds support for the way used on the am18xx (powerdomains).
VersionDeltaFile
1.3+16-7sys/arch/arm/ti/ti_tptc.c
1.6+14-5sys/arch/arm/ti/ti_edma.c
1.33+3-3sys/arch/arm/ti/files.ti
1.11+3-1sys/arch/evbarm/conf/GENERIC_V5
+36-164 files

LLVM/project 11eba5cllvm/test/Transforms/LoopVectorize/AArch64 sve2-histcnt-epilogue.ll interleaving-load-store.ll

[LV] Prefer fixed VFs for epilogue vectorization (#211814)

Unless forced (via `-scalable-vectorization=always`), or if the fixed
vector cost is much higher than scalable vectors (which occurs for some
loops, such as histograms), prefer fixed vectors for the epilogue.

There are currently some hidden costs for scalable epilogues that are
not modeled (such as reduced post-vectorization unrolling).

This restriction likely can be lifted/reworked once we support
predicated vector epilogue.
DeltaFile
+32-42llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
+24-32llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
+15-22llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
+15-20llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
+13-19llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
+14-14llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt-epilogue.ll
+113-1499 files not shown
+166-19815 files

OPNSense/core 14de8b0src/opnsense/mvc/app/views/OPNsense/Diagnostics fw_log.volt

Firewall: Log Files: Live View - htmlSafe() action search value

PR: GHSA-9h93-hhcx-957c
DeltaFile
+1-1src/opnsense/mvc/app/views/OPNsense/Diagnostics/fw_log.volt
+1-11 files

OPNSense/core 7f6811fsrc/opnsense/mvc/app/models/OPNsense/Interfaces NetworkInterface.xml

Interfaces: Assignments - strict description fields as before in interfaces_assign.php

Earlier code dropped all unallowed fields in https://github.com/opnsense/core/blob/8cc69b21e0f4c2622fc8a62df2a15ba7cb1e731f/src/www/interfaces_assign.php#L121

PR: GHSA-9h93-hhcx-957c
DeltaFile
+3-1src/opnsense/mvc/app/models/OPNsense/Interfaces/NetworkInterface.xml
+3-11 files

NetBSD/src LkH7rp9sys/arch/arm/ti am18xx_psc.c

   evbarm/am18xx: expose the PSC as powerdomain

   Some peripherals in the DTB expect to manage clocks as power domains.
VersionDeltaFile
1.6+27-3sys/arch/arm/ti/am18xx_psc.c
+27-31 files

OPNSense/core 096071asrc/www system_authservers.php interfaces.php

ui: add some more legacy_html_escape_form_data() safeguards

PR: GHSA-6vv6-fpw9-8r2g
DeltaFile
+6-2src/www/interfaces.php
+4-2src/www/system_authservers.php
+10-42 files

FreeBSD/ports 23a9390net-mgmt/netbox pkg-plist distinfo

net-mgmt/netbox: Update to 4.6.8

Changelog:

Performance Improvements:
* Avoid N+1 queries when resolving generic relations (e.g. assigned
  objects) via the GraphQL API
* Improve performance when provisioning new custom fields
* Omit implicit pagination when prefetching to-one relations via
  the GraphQL API
* Improve caching logic when retrieving custom fields via
  get_for_model()

Bug Fixes:
* Clear a device's stale rack assignment when changing its site
* Enforce object permissions on custom script write operations via
  the REST API
* Avoid re-executing the LDAP configuration file on every
  permission check

    [24 lines not shown]
DeltaFile
+9-9net-mgmt/netbox/Makefile
+3-3net-mgmt/netbox/distinfo
+4-0net-mgmt/netbox/pkg-plist
+16-123 files

FreeBSD/ports e77a522www/py-dj60-drf-spectacular-sidecar Makefile distinfo

www/py-dj60-drf-spectacular-sidecar: Update to 2026.8.1

Changelog:

https://github.com/tfranzel/drf-spectacular-sidecar/compare/2026.7.1...2026.8.1

MFH:            2026Q3
(cherry picked from commit be2c64b6f7affbd51c6e4cceabc2b9bc8e378fc9)
DeltaFile
+3-3www/py-dj60-drf-spectacular-sidecar/distinfo
+1-1www/py-dj60-drf-spectacular-sidecar/Makefile
+4-42 files

FreeBSD/ports 10ef8f5www/py-dj60-strawberry-graphql-django Makefile distinfo

www/py-dj60-strawberry-graphql-django: Update to 0.87.0

Changelog:

https://github.com/strawberry-graphql/strawberry-django/blob/0.87.0/CHANGELOG.md

MFH:            2026Q3
(cherry picked from commit e07db17307d5ae47ceb646721f6af24dcf4ae962)
DeltaFile
+3-3www/py-dj60-strawberry-graphql-django/distinfo
+1-1www/py-dj60-strawberry-graphql-django/Makefile
+4-42 files

FreeBSD/ports 12e6825www/py-dj60-django-debug-toolbar Makefile distinfo

www/py-dj60-django-debug-toolbar: Update to 7.1.0

Changelog:

https://github.com/django-commons/django-debug-toolbar/releases/tag/7.1.0

MFH:            2026Q3
(cherry picked from commit 7aae2e653ca24f9ef4878005c88e0d56f50adeaf)
DeltaFile
+3-3www/py-dj60-django-debug-toolbar/distinfo
+1-1www/py-dj60-django-debug-toolbar/Makefile
+4-42 files

FreeBSD/ports 8083c06www/py-dj60-django-htmx Makefile distinfo, www/py-dj60-django-htmx/files patch-pyproject.toml

www/py-dj60-django-htmx: Update to 1.29.0

Changelog:

https://github.com/adamchainz/django-htmx/blob/1.29.0/docs/changelog.rst

MFH:            2026Q3
(cherry picked from commit 2d4987b68388493891df0d64e4f5c2cd30b13f49)
DeltaFile
+10-19www/py-dj60-django-htmx/files/patch-pyproject.toml
+3-3www/py-dj60-django-htmx/distinfo
+2-3www/py-dj60-django-htmx/Makefile
+15-253 files

FreeBSD/ports 688da1btextproc/py-zensical Makefile distinfo

textproc/py-zensical: Update to 0.0.53

Changelog:

https://github.com/zensical/zensical/releases/tag/v0.0.53

MFH:            2026Q3
(cherry picked from commit 1b33d0e24670b737ff8bcd29e1f356e937360dc6)
DeltaFile
+3-3textproc/py-zensical/distinfo
+2-2textproc/py-zensical/Makefile
+5-52 files

FreeBSD/ports 92fc378textproc/py-tablib Makefile distinfo

textproc/py-tablib: Update to 3.10.0

Changelog:

https://github.com/jazzband/tablib/releases/tag/v3.10.0

MFH:            2026Q3
(cherry picked from commit 1abe25a35f5b4c09d1bf412487a9b1618722f8a6)
DeltaFile
+3-3textproc/py-tablib/distinfo
+1-1textproc/py-tablib/Makefile
+4-42 files

FreeBSD/ports 245c81ddevel/py-dj60-strawberry-graphql distinfo Makefile

devel/py-dj60-strawberry-graphql: Update to 0.324.0

* Drop obsolete comment while I'm here.

Changelog:

https://github.com/strawberry-graphql/strawberry/releases/tag/0.324.0

MFH:            2026Q3
(cherry picked from commit 036d7fb4ed789223256ade480a13b62b010085de)
DeltaFile
+4-5devel/py-dj60-strawberry-graphql/Makefile
+3-3devel/py-dj60-strawberry-graphql/distinfo
+7-82 files

LLVM/project 58f94bcllvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/test/CodeGen/X86 fp128-ldexp-frexp-no-libcall-error.ll

DAG: Gracefully diagnose missing fp128 ldexp/frexp libcalls (#215626)

When the fp128 ldexp/frexp libcall is unavailable (e.g. MSVC),
LegalizeDAG crashed instead of emitting a diagnostic. The expansion
path introduces a cast to an integer type, so we can't introduce that
wide integer if it's not legal at this point.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+18-2llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+17-0llvm/test/CodeGen/X86/fp128-ldexp-frexp-no-libcall-error.ll
+35-22 files

OPNSense/core 024d986src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api ServiceController.php

VPN: OpenVPN: Connection Status - add some input validation for control characters

PR: GHSA-fqmm-g6xw-qhm4
DeltaFile
+4-0src/opnsense/mvc/app/controllers/OPNsense/OpenVPN/Api/ServiceController.php
+4-01 files

LLVM/project 17a2349mlir/lib/Bindings/Python IRAttributes.cpp

[mlir][python] Define __index__ on PyIntegerAttribute (#215555)

In nanobind v2.14.0+, integer casting from Python objects to C++ integer
types was updated to require `__index__` (`PyNumber_Index`) instead of
`__int__`.


https://nanobind.readthedocs.io/en/latest/changelog.html#version-2-14-0-aug-7-2026

Because `PyIntegerAttribute` defined `__int__` but not `__index__`,
passing `IntegerAttr` instances to bindings expecting integer sequences
failed. Specifically, in `mlir/test/python/ir/attributes.py`:

# CHECK: input: [IntegerAttr(4 : i64), IntegerAttr(2 : i64)] (<class
'list'>),
    # CHECK-SAME: result: array<i8: 4, 2>
create_and_print(DenseI8ArrayAttr, [Attribute.parse(f"{x}") for x in [4,
2]])


    [11 lines not shown]
DeltaFile
+2-0mlir/lib/Bindings/Python/IRAttributes.cpp
+2-01 files

NetBSD/pkgsrc 7TWeZKgdoc CHANGES-2026

   doc: Added shells/shuck version 0.1.1
VersionDeltaFile
1.5216+2-1doc/CHANGES-2026
+2-11 files

NetBSD/pkgsrc vjUv69Nshells Makefile

   shells/Makefile: + shuck
VersionDeltaFile
1.82+2-1shells/Makefile
+2-11 files

NetBSD/pkgsrc ygpM4Stshells/shuck PLIST DESCR

   shells/shuck: import shuck-0.1.1

   A fast shell script linter, formatter, and language server, written
   in Rust.

   Shuck parses, analyzes, formats, and powers editor feedback for
   shell scripts. It catches common bugs, style issues, security
   hazards, performance traps, and portability problems; formats shell
   sources with configurable layout rules; and ships a first-party
   Language Server Protocol (LSP) server for editor diagnostics, fixes,
   navigation, symbols, hover, completion, and formatting. It also
   lints shell embedded in supported non-shell files such as GitHub
   Actions workflows. A caching layer keeps incremental runs fast.
VersionDeltaFile
1.1+869-0shells/shuck/distinfo
1.1+290-0shells/shuck/cargo-depends.mk
1.1+26-0shells/shuck/Makefile
1.1+11-0shells/shuck/DESCR
1.1+2-0shells/shuck/PLIST
+1,198-05 files

OPNSense/core 5786bebsrc/opnsense/mvc/app/views/OPNsense/Firewall filter_rule.volt alias.volt, src/opnsense/mvc/app/views/OPNsense/IDS policy.volt

mvc: add some missint htmlSafe() calls for generated HTML

PR: GHSA-75fw-j788-j4hj
DeltaFile
+3-3src/opnsense/mvc/app/views/OPNsense/IDS/policy.volt
+1-1src/opnsense/mvc/app/views/OPNsense/IPsec/sad.volt
+1-1src/opnsense/mvc/app/views/OPNsense/Firewall/filter_rule.volt
+1-1src/opnsense/mvc/app/views/OPNsense/Firewall/alias.volt
+6-64 files

NetBSD/pkgsrc p8FutX7doc CHANGES-2026

   Updated devel/py-pyobjc, devel/py-typing-inspection
VersionDeltaFile
1.5215+3-1doc/CHANGES-2026
+3-11 files