LLVM/project 4996e3bllvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify/ConstProp/WebAssembly dot.ll

[ConstantFolding] Allow truncation when folding wasm.dot

Changes this to getSigned() to match the signedness of the calculation.
However, we still need to allow truncation because the addition
result may overflow, and the operation is specified to truncate
in that case.

Fixes https://github.com/llvm/llvm-project/issues/175159.
DeltaFile
+8-0llvm/test/Transforms/InstSimplify/ConstProp/WebAssembly/dot.ll
+1-1llvm/lib/Analysis/ConstantFolding.cpp
+9-12 files

LLVM/project c722ef4offload/plugins-nextgen/host CMakeLists.txt, offload/test/sanitizer free_wrong_ptr_kind.cpp kernel_crash.c

[OpenMP] Remove testing LTO variant on CPU targets (#175187)

Summary:
This is only really meaningful for the NVPTX target. Not all build
environments support host LTO and these are redundant tests, just clean
this up and make it run faster.
DeltaFile
+7-7offload/plugins-nextgen/host/CMakeLists.txt
+0-3offload/test/sanitizer/free_wrong_ptr_kind.cpp
+0-3offload/test/sanitizer/kernel_crash.c
+0-3offload/test/sanitizer/kernel_crash_async.c
+0-3offload/test/sanitizer/kernel_crash_many.c
+0-3offload/test/sanitizer/kernel_crash_single.c
+7-2225 files not shown
+7-8531 files

FreeBSD/doc 1aa4024website/content/en/releases/15.0R errata.adoc

15.0/errata: Mention possiblity of disabling ipfw

Requested by:   jhb
DeltaFile
+1-1website/content/en/releases/15.0R/errata.adoc
+1-11 files

LLVM/project 6a151f6llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/test/CodeGen/AMDGPU vgpr-setreg-mode-swar.mir

cover piggybacking update
DeltaFile
+82-14llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+51-28llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+133-422 files

LLVM/project 8fd1ac9llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp

resolve review comments
DeltaFile
+9-6llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+9-61 files

LLVM/project b36f0d8llvm/test/CodeGen/AMDGPU carryout-selection.ll llvm.amdgcn.wmma.gfx1250.w32.ll

update the SWAR
DeltaFile
+2-713llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+0-246llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
+0-220llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
+0-212llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+0-174llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
+170-0llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+172-1,565145 files not shown
+201-6,089151 files

LLVM/project 33ef8adllvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/test/CodeGen/AMDGPU vgpr-setreg-mode-swar.mir

S_SET_VGPR_MSB and S_SETREG_IMM32_B32 actually use different order
DeltaFile
+50-44llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+20-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+70-472 files

LLVM/project 51a03efllvm/test/CodeGen/AMDGPU carryout-selection.ll llvm.amdgcn.wmma.gfx1250.w32.ll

[AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register

On certain hardware, this instruction clobbers VGPR MSB `bits[12:19]`, so we need to restore the current mode.
DeltaFile
+713-2llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+246-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
+220-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
+212-0llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+174-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
+166-0llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+1,731-2146 files not shown
+6,212-3152 files

LLVM/project 4818252llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp

use circular shift to convert mode
DeltaFile
+4-5llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+4-51 files

LLVM/project 73c6f73llvm/test/CodeGen/AMDGPU llvm.amdgcn.wmma.gfx1250.w32.ll llvm.amdgcn.wmma.imod.gfx1250.w32.ll

resolve comments
DeltaFile
+246-246llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.gfx1250.w32.ll
+220-220llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imod.gfx1250.w32.ll
+212-212llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+174-174llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma.imm.gfx1250.w32.ll
+166-166llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+103-103llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
+1,121-1,121144 files not shown
+5,383-5,461150 files

LLVM/project edab192llvm/test/MC/AMDGPU gfx11_asm_vop2_t16_promote.s sym_kernel_scope_agpr.s

[AMDGPU] Remove unneeded redirects from MC tests. NFC. (#175186)

These tests redirected stderr to stdout, but never actually checked for
any errors.
DeltaFile
+2-2llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s
+2-2llvm/test/MC/AMDGPU/sym_kernel_scope_agpr.s
+1-1llvm/test/MC/AMDGPU/gfx11_asm_vopcx_fake16_promote.s
+1-1llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
+1-1llvm/test/MC/AMDGPU/gfx12_asm_vop2_fake16_promote.s
+1-1llvm/test/MC/AMDGPU/gfx12_asm_vop2_t16_promote.s
+8-85 files not shown
+13-1311 files

FreeBSD/src 87b6549share/man/man4 mrsas.4

mrsas.4: Add Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116)

This is an OEM card from Fujitsu using an LSI SAS2208 ROC controller shipped
with many Fujitsu PRIMERGY servers like RX300 S7.

Controller description: https://www.fujitsu.com/global/products/computing/servers/primergy/blades/connection/cb-pmod-110426.html

Reviewed by:    ziaee
MFC after:      3 days
Differential Revision:  https://reviews.freebsd.org/D54566

(cherry picked from commit ccec94bf63de8ee067b03b981a283d9f968c3667)
DeltaFile
+2-1share/man/man4/mrsas.4
+2-11 files

FreeBSD/src 653099bshare/man/man4 mrsas.4

mrsas.4: Add Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116)

This is an OEM card from Fujitsu using an LSI SAS2208 ROC controller shipped
with many Fujitsu PRIMERGY servers like RX300 S7.

Controller description: https://www.fujitsu.com/global/products/computing/servers/primergy/blades/connection/cb-pmod-110426.html

Reviewed by:    ziaee
MFC after:      3 days
Differential Revision:  https://reviews.freebsd.org/D54566

(cherry picked from commit ccec94bf63de8ee067b03b981a283d9f968c3667)
DeltaFile
+2-1share/man/man4/mrsas.4
+2-11 files

LLVM/project e486a26llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstrInfo.h, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll ran-out-of-sgprs-allocation-failure.mir

[AMDGPU] Add liverange split instructions into BB Prolog (#117544)

The COPY inserted for liverange split during sgpr-regalloc
pipeline currently breaks the BB prolog during the subsequent
vgpr-regalloc phase while spilling and/or splitting the vector
liveranges. This patch fixes it by correctly including the
LR split instructions during sgpr-regalloc and wwm-regalloc
pipelines into the BB prolog.
DeltaFile
+710-684llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+58-62llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
+27-7llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+797-7534 files

FreeBSD/src 852a446share/man/man4 mrsas.4

mrsas.4: Add Fujitsu RAID Controller SAS 6Gbit/s 1GB (D3116)

This is an OEM card from Fujitsu using an LSI SAS2208 ROC controller shipped
with many Fujitsu PRIMERGY servers like RX300 S7.

Controller description: https://www.fujitsu.com/global/products/computing/servers/primergy/blades/connection/cb-pmod-110426.html

Reviewed by:    ziaee
MFC after:      3 days
Differential Revision:  https://reviews.freebsd.org/D54566

(cherry picked from commit ccec94bf63de8ee067b03b981a283d9f968c3667)
DeltaFile
+2-1share/man/man4/mrsas.4
+2-11 files

LLVM/project a095db2llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions (#117543)

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

LLVM/project 0d6f651llvm/test/CodeGen/X86 clmul-vector.ll clmul.ll

[X86] Add baseline clmul intrinsic test coverage (#175185)

DeltaFile
+6,878-0llvm/test/CodeGen/X86/clmul-vector.ll
+1,868-0llvm/test/CodeGen/X86/clmul.ll
+8,746-02 files

FreeBSD/ports 2ec4b08sysutils/vpnc-scripts Makefile, sysutils/vpnc-scripts/files patch-vpnc-script

sysutils/vpnc-scripts: Fix invalid ps(1) argument

PR:             292298
Submitted by:   John Baldwin <jhb at FreeBSD.org>
DeltaFile
+11-0sysutils/vpnc-scripts/files/patch-vpnc-script
+1-0sysutils/vpnc-scripts/Makefile
+12-02 files

LLVM/project 77b8b33lld/COFF Driver.cpp Options.td, lld/docs ReleaseNotes.rst

[LLD][COFF] Prefetch inputs early-on to improve link times (#169224)

This PR reduces outliers in terms of runtime performance, by asking the
OS to prefetch memory-mapped input files in advance, as early as
possible. I have implemented the Linux aspect, however I have only
tested this on Windows 11 version 24H2, with an active security stack
enabled. The machine is a AMD Threadripper PRO 3975WX 32c/64t with 128
GB of RAM and Samsung 990 PRO SSD.

I have used a Unreal Engine-based game to profile the link times. Here's
a quick summary of the input data:
```
                                    Summary
--------------------------------------------------------------------------------
               4,169 Input OBJ files (expanded from all cmd-line inputs)
      26,325,429,114 Size of all consumed OBJ files (non-lazy), in bytes
                   9 PDB type server dependencies
                   0 Precomp OBJ dependencies
         350,516,212 Input debug type records

    [52 lines not shown]
DeltaFile
+25-0llvm/lib/Support/Windows/Path.inc
+17-5lld/COFF/Driver.cpp
+13-0llvm/lib/Support/Unix/Path.inc
+6-0lld/docs/ReleaseNotes.rst
+5-0llvm/include/llvm/Support/MemoryBuffer.h
+5-0lld/COFF/Options.td
+71-53 files not shown
+75-59 files

LLVM/project 475f022llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp VOPCInstructions.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h

[AMDGPU] Add support for GFX12 expert scheduling mode 2 (#170319)

DeltaFile
+687-0llvm/test/CodeGen/AMDGPU/expert_scheduling_gfx12.mir
+287-9llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+207-0llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
+86-0llvm/test/CodeGen/AMDGPU/function-esm2-prologue-epilogue.ll
+18-9llvm/lib/Target/AMDGPU/VOPCInstructions.td
+18-4llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+1,303-227 files not shown
+1,357-3913 files

FreeBSD/ports bc1c934sysutils Makefile, sysutils/sdmon Makefile distinfo

[NEW PORT] sysutils/sdmon: Utility to get SD card health data

Co-authored-by: Michael Osipov <michaelo at FreeBSD.org>
PR:             292278
DeltaFile
+27-0sysutils/sdmon/Makefile
+3-0sysutils/sdmon/distinfo
+2-0sysutils/sdmon/pkg-descr
+1-0sysutils/Makefile
+33-04 files

NetBSD/src VL38TRbsys/sys bootblock.h

   Sprinkle #include <sys/endian.h>.
VersionDeltaFile
1.62+2-1sys/sys/bootblock.h
+2-11 files

OPNSense/core 5219572src/opnsense/mvc/app/models/OPNsense/Radvd Radvd.xml Radvd.php

Fix some typos in validation messages of Radvd.xml and Radvd.php
DeltaFile
+5-5src/opnsense/mvc/app/models/OPNsense/Radvd/Radvd.xml
+1-1src/opnsense/mvc/app/models/OPNsense/Radvd/Radvd.php
+6-62 files

LLVM/project df7d4a7llvm/include/llvm/CodeGen MachineInstr.h, llvm/lib/CodeGen SplitKit.cpp

[CodeGen] Introduce MI flag for Live Range split instructions

For some targets, it is required to identify the COPY instruction
corresponds to the RA inserted live range split. Adding the new
flag `MachineInstr::LRSplit` to serve the purpose.
DeltaFile
+2-1llvm/include/llvm/CodeGen/MachineInstr.h
+2-0llvm/lib/CodeGen/SplitKit.cpp
+4-12 files

NetBSD/src UiF0IG9sys/arch/sh3/include coff_machdep.h

   Sprinkle #include <sys/endian.h>
VersionDeltaFile
1.7+7-5sys/arch/sh3/include/coff_machdep.h
+7-51 files

LLVM/project ff94a19clang/lib/AST/ByteCode Pointer.cpp, clang/test/AST/ByteCode new-delete.cpp

[clang][bytecode] Fix APValues for arrays in dynamic allocations (#175176)

getType() returns just int for those instead of an array type, so the
previous condition resulted in the array index missing in the APValue's
LValuePath.
DeltaFile
+2-2clang/lib/AST/ByteCode/Pointer.cpp
+3-0clang/test/AST/ByteCode/new-delete.cpp
+5-22 files

LLVM/project 3c51ed9clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode new-delete.cpp

[clang][bytecode] Fix initializing array elems from string (#175170)

In the `= {"foo"}` case, we don't have an array filler we can use and we
need to explicitily zero the remaining elements.
DeltaFile
+21-6clang/lib/AST/ByteCode/Compiler.cpp
+1-1clang/test/AST/ByteCode/new-delete.cpp
+22-72 files

OpenBSD/src u0YQaWddistrib/sets/lists/comp clang.arm64

   sync
VersionDeltaFile
1.50+1-1distrib/sets/lists/comp/clang.arm64
+1-11 files

FreeBSD/ports 0290d90sysutils Makefile, sysutils/witr Makefile pkg-descr

[NEW PORT] sysutils/witr: Witr (why-is-this-running)

Co-authored-by: Michael Osipov <michaelo at FreeBSD.org>
PR:             292143
DeltaFile
+37-0sysutils/witr/Makefile
+20-0sysutils/witr/pkg-descr
+15-0sysutils/witr/distinfo
+1-0sysutils/Makefile
+73-04 files

NetBSD/pkgsrc cwxLjlAdoc CHANGES-2026

   Updated databases/lua-ldap to 1.4.0
VersionDeltaFile
1.206+2-1doc/CHANGES-2026
+2-11 files