FreeBSD/ports df5403fwww/drupal7 pkg-plist distinfo, www/drupal7-wysiwyg distinfo Makefile

www/drupal7*: update to latest upstream releases

- Update drupal7 from 7.98 to 7.103
- Update drupal7-wysiwyg from 7.x-2.9 to 7.x-2.10

Sponsored by:   Netzkommune GmbH
DeltaFile
+22-2www/drupal7/pkg-plist
+3-3www/drupal7/distinfo
+3-3www/drupal7-wysiwyg/distinfo
+1-1www/drupal7-wysiwyg/Makefile
+1-1www/drupal7/Makefile
+30-105 files

OPNSense/core 3ad5eb2src/opnsense/mvc/app/controllers/OPNsense/Radvd/forms dialogEntry.xml, src/opnsense/mvc/app/models/OPNsense/Radvd Radvd.xml

Shuffle dialog around a bit and hide options in advanced where needed
DeltaFile
+38-38src/opnsense/mvc/app/controllers/OPNsense/Radvd/forms/dialogEntry.xml
+0-3src/opnsense/mvc/app/models/OPNsense/Radvd/Radvd.xml
+38-412 files

FreeBSD/ports 4a35d9atextproc/ov distinfo Makefile

textproc/ov: Update to 0.50.2

Changelog:
- https://github.com/noborus/ov/releases/tag/v0.50.0
- https://github.com/noborus/ov/releases/tag/v0.50.2

PR:             291539
Approved by:    lcook (maintainer, timeout 4 weeks)
DeltaFile
+5-5textproc/ov/distinfo
+2-3textproc/ov/Makefile
+7-82 files

LLVM/project f15ee78clang/lib/CIR/Dialect/IR CIRDialect.cpp, mlir/include/mlir/Interfaces ControlFlowInterfaces.td ControlFlowInterfaces.h

[mlir][Interfaces] Simplify and align `RegionSuccessor` API
DeltaFile
+36-27mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+11-13mlir/lib/Dialect/SCF/IR/SCF.cpp
+9-15clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+10-6mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+5-5mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+5-5mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+76-7116 files not shown
+108-10522 files

LLVM/project 9ac2d0a.github/workflows docs.yml, clang/utils/analyzer entrypoint.py

Revert "[OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (#152189)"

This reverts commit 20d0ec849804218d75647aeafbe23f8a02a83b56.

The publish-sphinx-docs buildbot still uses LLVM_ENABLE_PROJECTS=openmp.
DeltaFile
+13-10llvm/CMakeLists.txt
+17-2flang/tools/f18/CMakeLists.txt
+7-0llvm/runtimes/CMakeLists.txt
+2-2.github/workflows/docs.yml
+2-2flang-rt/README.md
+1-1clang/utils/analyzer/entrypoint.py
+42-171 files not shown
+42-187 files

LLVM/project 8a2642cllvm/test/tools/llvm-mca/AArch64/Apple M1-neon-instructions.s M1-basic-instructions.s, llvm/test/tools/llvm-mca/AArch64/Apple/Inputs neon-instructions.s basic-instructions.s

[AArch64][llvm-mca] Add old Cyclone instruction tables for reference (#172652)

This patch adds static instruction tables tests for the old Cyclone
scheduling model bounded to `-mcpu=apple-m1`, for the sake of a
reference. It creates a new `llvm/test/tools/llvm-mca/AArch64/Apple`
directory, moves a Cyclone test there, and adds 2 tests
`basic-instructions` and `neon-instructions` from Neoverse with reusable
inputs (in addition to Neoverse, we also match stderr output of llvm-mca
for instruciton warnings).
DeltaFile
+3,162-0llvm/test/tools/llvm-mca/AArch64/Apple/M1-neon-instructions.s
+2,527-0llvm/test/tools/llvm-mca/AArch64/Apple/M1-basic-instructions.s
+1,559-0llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/neon-instructions.s
+1,448-0llvm/test/tools/llvm-mca/AArch64/Apple/Inputs/basic-instructions.s
+0-29llvm/test/tools/llvm-mca/AArch64/Cyclone/register-offset.s
+29-0llvm/test/tools/llvm-mca/AArch64/Apple/Cyclone-register-offset.s
+8,725-296 files

NetBSD/pkgsrc vN8KPVgdoc TODO

   doc: add upstream link for py-aiodns problem with py-cares
VersionDeltaFile
1.26644+2-2doc/TODO
+2-21 files

LLVM/project 5b1e74bllvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass.ll

InstCombine: Fixup known fp class for select and compare

Improve reported known fp-class when simplifying select.

Previously we just reported the conservative result that
the result class could be either of the inputs. Use the new
utility to apply the compare+select logic the default case of
computeKnownFPClass would catch.
DeltaFile
+27-3llvm/test/Transforms/InstCombine/simplify-demanded-fpclass.ll
+6-2llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+33-52 files

LLVM/project 6d35712llvm/include/llvm/Analysis ValueTracking.h, llvm/include/llvm/Support KnownFPClass.h

ValueTracking: Refactor computeKnownFPClass select handling

Match the structure of ComputeKnownBits. Expose the condition
handling as a utility function so SimplifyDemanedFPClass can make
use of this. Avoids some redundant code and improves accuracy in
at least one case.
DeltaFile
+23-49llvm/lib/Analysis/ValueTracking.cpp
+11-0llvm/include/llvm/Analysis/ValueTracking.h
+7-1llvm/include/llvm/Support/KnownFPClass.h
+2-2llvm/test/Transforms/Attributor/nofpclass-select.ll
+43-524 files

NetBSD/pkgsrc KRBpAx7doc CHANGES-2026 TODO

   doc: py-cares update reverted
VersionDeltaFile
1.177+1-2doc/CHANGES-2026
1.26643+2-1doc/TODO
+3-32 files

LLVM/project 769dbe3llvm/lib/Target/X86 X86ISelLowering.cpp

[X86] combineConcatVectorOps - IsConcatFree - detect splats first, then check for repeated load. NFC. (#174950)

This will make it easier to handle other splat values that are free to
concat.

There should be no need to do repeated peekThroughBitcasts for every
(canonicalised) bitcasted operand.
DeltaFile
+7-5llvm/lib/Target/X86/X86ISelLowering.cpp
+7-51 files

NetBSD/pkgsrc 7iRA3TQnet/py-cares distinfo Makefile, net/py-cares/patches patch-deps_build-config_config__netbsd_ares__config.h

   py-cares: revert update, breaks py-aiodns
VersionDeltaFile
1.16+4-3net/py-cares/distinfo
1.19+1-2net/py-cares/Makefile
1.3+0-0net/py-cares/patches/patch-deps_build-config_config__netbsd_ares__config.h
+5-53 files

FreeBSD/ports a587692finance/R-cran-AER distinfo Makefile

finance/R-cran-AER: Update to 1.2.15
DeltaFile
+3-3finance/R-cran-AER/distinfo
+2-1finance/R-cran-AER/Makefile
+5-42 files

FreeBSD/ports f0cfb82www/py-litestar distinfo Makefile

www/py-litestar: Update to 2.19.0
DeltaFile
+3-3www/py-litestar/distinfo
+1-1www/py-litestar/Makefile
+4-42 files

LLVM/project 0b849c3bolt/test/AArch64 epilogue-determination.s

[BOLT] Fix label in epilogue-determination.s test

On RHEL8 we get the following error that may originate from a typo:
```
clang: warning: argument unused during compilation: '-ffreestanding' [-Wunused-command-line-argument]
ld.lld: error: relocation R_AARCH64_ADR_PREL_LO21 cannot be used against symbol '_jmptbl2'; recompile with -fPIC
>>> defined in /tmp/epilogue-determination-7bd9d4.o
>>> referenced by /tmp/epilogue-determination-7bd9d4.o:(.text+0x54)
clang: error: linker command failed with exit code 1 (use -v to see invocation)
```
DeltaFile
+1-1bolt/test/AArch64/epilogue-determination.s
+1-11 files

LLVM/project 20d0ec8.github/workflows docs.yml, clang/utils/analyzer entrypoint.py

[OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (#152189)

The build mode has been deprecated in #136314. According to the
deprecation message, it was supposed to be removed in the LLVM 21
release. Each build mode increased the maintanance overhead when
failing, such as in #151117.

Let's remove it in LLVM 22.
DeltaFile
+10-13llvm/CMakeLists.txt
+2-17flang/tools/f18/CMakeLists.txt
+0-7llvm/runtimes/CMakeLists.txt
+2-2flang-rt/README.md
+2-2.github/workflows/docs.yml
+1-1clang/utils/analyzer/entrypoint.py
+17-421 files not shown
+18-427 files

FreeBSD/ports 817a79fMk/Uses electron.mk

Mk/Uses/electron.mk: Adjust valid electron versions after electron36 removal
DeltaFile
+1-1Mk/Uses/electron.mk
+1-11 files

LLVM/project e471478cross-project-tests lit.cfg.py

[cross-project-tests][lit] Account for Apple LLDB version in compatibility check

The LLVM release version and Apple LLDB version follow slightly different numbering scheme. Make sure we set the minimum required LLDB version appropriately.

Also refactors the `apple-lldb-pre-1000` feature check to use the same `get_lldb_version_string` method.

Currently this was causing the LLDB LLVM formatters to be skipped on our public macOS CI.
DeltaFile
+41-22cross-project-tests/lit.cfg.py
+41-221 files

LLVM/project 90b8a48llvm/lib/Target/SPIRV SPIRVRegularizer.cpp, llvm/test/CodeGen/SPIRV icmp-i1.ll

[SPIRV] Support additional comparison predicates for i1 types (#174585)

Previously, the SPIRV BE only handled equality and inequality
comparisons (ICMP_EQ, ICMP_NE) for i1 types using logical operations
(OpLogicalEqual, OpLogicalNotEqual). Other comparison predicates
(signed/unsigned less than, greater than, etc.) triggered an unreachable
assertion.

This patch extends the support for the missing predicates. The BE
considers i1 values as booleans and in SPIR-V only logical operations
can work on them. This patch lowers the missing predicates into
supported logical operations.

The lowering has been validated with instcombine to avoid introducing an
unsound transformation (using the new test case).
DeltaFile
+130-0llvm/test/CodeGen/SPIRV/icmp-i1.ll
+59-0llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
+189-02 files

OPNSense/core 335065esrc/etc/inc/plugins.inc.d radvd.inc, src/opnsense/mvc/app/controllers/OPNsense/Radvd/Api ServiceController.php

radvd: service registration and most backend migrated

RDNSS and DNSSL are not saving. Tokenizer may also be missing.
DeltaFile
+73-73src/etc/inc/plugins.inc.d/radvd.inc
+25-0src/opnsense/service/conf/actions.d/actions_radvd.conf
+18-2src/opnsense/mvc/app/controllers/OPNsense/Radvd/Api/ServiceController.php
+9-8src/opnsense/mvc/app/controllers/OPNsense/Radvd/forms/dialogEntry.xml
+8-3src/opnsense/mvc/app/models/OPNsense/Radvd/Radvd.xml
+2-2src/opnsense/mvc/app/views/OPNsense/Radvd/settings.volt
+135-882 files not shown
+138-908 files

LLVM/project 94a9565mlir/lib/Bindings/Python Rewrite.cpp, mlir/test/python rewrite.py

[MLIR][Python] Add GreedyRewriteDriverConfig parameter to apply_patterns_and_fold_greedily (#174913)

We already have `GreedyRewriteDriverConfig` on the Python side, but it
hasn’t yet been exposed as a parameter of
`apply_patterns_and_fold_greedily`. This PR does that.

Before:
```python
def apply_patterns_and_fold_greedily(module: ir.Module, set: FrozenRewritePatternSet) -> None
def apply_patterns_and_fold_greedily(op: ir._OperationBase, set: FrozenRewritePatternSet) -> None
```

After:
```python
def apply_patterns_and_fold_greedily(module: ir.Module, set: FrozenRewritePatternSet,
                                     config: GreedyRewriteDriverConfig | None = None) -> None
def apply_patterns_and_fold_greedily(op: ir._OperationBase, set: FrozenRewritePatternSet,
                                     config: GreedyRewriteDriverConfig | None = None) -> None
```

    [7 lines not shown]
DeltaFile
+39-31mlir/lib/Bindings/Python/Rewrite.cpp
+44-0mlir/test/python/rewrite.py
+83-312 files

LLVM/project d6c22d4bolt/lib/Passes Instrumentation.cpp, bolt/test/runtime/AArch64 instrumentation-ind-call-bti.c

[BOLT][BTI] Disallow instrumenting BTI binaries (#174936)

Until instrumentation support is added, the feature should be
disabled for BTI binaries. An error message is added to explain
the situation.
Meanwhile, users can choose sampling-based profiling methods.

Added a TODO comment explaining missing steps.
DeltaFile
+30-0bolt/test/runtime/AArch64/instrumentation-ind-call-bti.c
+16-0bolt/lib/Passes/Instrumentation.cpp
+46-02 files

LLVM/project c63d295llvm/test/CodeGen/X86 llround-conv.ll lrint-conv-i32.ll

[SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (#152684)

On platforms that soft promote `half`, using `lrint` intrinsics crashes
with the following:

    SoftPromoteHalfOperand Op #0: t5: i32 = lrint t4

    LLVM ERROR: Do not know how to soft promote this operator's operand!
PLEASE submit a bug report to
https://github.com/llvm/llvm-project/issues/ and include the crash
backtrace.
    Stack dump:
0. Program arguments:
/Users/tmgross/Documents/projects/llvm/llvm-build/bin/llc
-mtriple=riscv32
    1.      Running pass 'Function Pass Manager' on module '<stdin>'.
2. Running pass 'RISC-V DAG->DAG Pattern Instruction Selection' on
function '@test_lrint_ixx_f16'


    [7 lines not shown]
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+112-10llvm/test/CodeGen/X86/llround-conv.ll
+86-11llvm/test/CodeGen/X86/lrint-conv-i32.ll
+76-12llvm/test/CodeGen/X86/llrint-conv.ll
+72-10llvm/test/CodeGen/X86/lrint-conv-i64.ll
+63-8llvm/test/CodeGen/X86/lround-conv-i32.ll
+57-6llvm/test/CodeGen/X86/lround-conv-i64.ll
+466-578 files not shown
+594-10814 files

FreeBSD/ports ab8edfdsecurity/modsecurity3-nginx distinfo Makefile

security/modsecurity3-nginx: update to latest 1.0.4 snapshot

Upstream continues to receive fixes and small improvements after the
1.0.4 release. Switch the GitHub fetch from the 1.0.4 tag to commit
b94f2d3 and bump PORTREVISION accordingly.

Sponsored by:   Netzkommune GmbH
DeltaFile
+3-3security/modsecurity3-nginx/distinfo
+2-2security/modsecurity3-nginx/Makefile
+5-52 files

NetBSD/src wA2wqIwcommon/lib/libc/hash/sha2 sha2.c

   sha2: Include <sys/endian.h> also when not doing a tools build.

   prompted by PR pkg/59839
VersionDeltaFile
1.27+4-4common/lib/libc/hash/sha2/sha2.c
+4-41 files

LLVM/project 5dfa538clang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeAnnotations.h, clang/lib/Analysis/LifetimeSafety LifetimeAnnotations.cpp FactsGenerator.cpp

[LifetimeSafety] Add implicit tracking for STL functions (#170005)

Add support for tracking STL container methods and free functions in the
lifetime safety analysis.

- Added `VisitExprWithCleanups` to the `FactsGenerator` to properly
handle expressions with cleanup code
- Moved `shouldTrackImplicitObjectArg` and `shouldTrackFirstArgument`
from `CheckExprLifetime.cpp` to `LifetimeAnnotations.h/cpp` to make them
available to the lifetime safety analysis
- Enhanced the lifetime analysis to track STL container methods that
return pointers or references dependent on the container's lifetime
(e.g., `begin()`, `data()`, `c_str()`)
- Added support for tracking free functions like `std::begin`,
`std::data`, and `std::any_cast` that return pointers or references
dependent on their arguments

Fixes https://github.com/llvm/llvm-project/issues/162622
DeltaFile
+180-0clang/unittests/Analysis/LifetimeSafetyTest.cpp
+6-88clang/lib/Sema/CheckExprLifetime.cpp
+82-0clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
+21-0clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
+4-1clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+4-0clang/lib/Analysis/LifetimeSafety/Origins.cpp
+297-896 files

LLVM/project d49fe5fclang/lib/CIR/Dialect/IR CIRDialect.cpp, mlir/include/mlir/Interfaces ControlFlowInterfaces.td ControlFlowInterfaces.h

[mlir][Interfaces] Simplify and align `RegionSuccessor` API
DeltaFile
+36-27mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+11-13mlir/lib/Dialect/SCF/IR/SCF.cpp
+8-14clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+10-6mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+5-5mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+5-5mlir/test/lib/Dialect/Test/TestOpDefs.cpp
+75-7016 files not shown
+107-10422 files

GhostBSD/ghostbsd 3fc13b7contrib/libcbor/doc/source requirements.txt

Merge pull request #380 from ghostbsd/dependabot/pip/contrib/libcbor/doc/source/urllib3-2.6.3

build(deps): bump urllib3 from 2.6.0 to 2.6.3 in /contrib/libcbor/doc/source
DeltaFile
+1-1contrib/libcbor/doc/source/requirements.txt
+1-11 files

NetBSD/src OGdMOm3sys/crypto/aes/arch/x86 aes_via.c aes_sse2_4x32_impl.h

   aes: Include <sys/endian.h> where needed.

   prompted by PR pkg/59839
VersionDeltaFile
1.11+4-2sys/crypto/aes/arch/x86/aes_via.c
1.2+2-1sys/crypto/aes/arch/x86/aes_sse2_4x32_impl.h
+6-32 files

OpenBSD/ports d5bMznulang/php Makefile.inc, lang/php/8.2 Makefile

   move --enable-opcache so that it's only in the subdirs which need it
   noop
VersionDeltaFile
1.199+0-3lang/php/Makefile.inc
1.28+1-0lang/php/8.4/Makefile
1.51+1-0lang/php/8.3/Makefile
1.59+1-0lang/php/8.2/Makefile
+3-34 files