LLVM/project a43cbf4llvm/test/Instrumentation/AddressSanitizer/AMDGPU no_redzones_in_scratch_globals.ll no_redzones_in_lds_globals.ll

AMDGPU: Migrate asan tests to subarch triples
DeltaFile
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_scratch_globals.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/no_redzones_in_lds_globals.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/global_metadata_addrspacecasts.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_global_address_space.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_generic_address_space.ll
+1-1llvm/test/Instrumentation/AddressSanitizer/AMDGPU/asan_instrument_constant_address_space.ll
+6-64 files not shown
+10-1010 files

LLVM/project 8d632c0llvm/lib/Target/X86 X86InsertX87Wait.cpp X86FloatingPoint.cpp, llvm/test/CodeGen/X86 zero-call-used-regs.ll

[X86] Don't clobber x87 return values when zeroing call-used registers (#211129)

### Summary
`-fzero-call-used-regs=all` / `zero_call_used_regs("all")`
unconditionally push eight `fldz` onto the x87 stack before returning.
When a value is live in `ST0` (`long double`) or `ST0:ST1` (`_Complex
long double`), the pushes overflow the 8-slot x87 stack and the return
value becomes an indefinite NaN. Reproduces on x86-64 at every
optimization level, via both the flag and the attribute.

```c++
__attribute__((zero_call_used_regs("all")))
long double g(long double a) { return a + 1; }
// g(1.0L) returns nan, expected 2.0
```

### Root cause
The x87 return value lives in `ST0` (and `ST1` for `_Complex long
double`), but the FP stackifier's `handleReturn` deletes the `RET`'s FP

    [33 lines not shown]
DeltaFile
+259-0llvm/test/CodeGen/X86/zero-call-used-regs.ll
+8-2llvm/lib/Target/X86/X86FrameLowering.cpp
+9-0llvm/lib/Target/X86/X86FloatingPoint.cpp
+5-2llvm/lib/Target/X86/X86InsertX87Wait.cpp
+281-44 files

LLVM/project f29686cllvm/test/Verifier/AMDGPU alloca.ll reqd-work-group-size.ll

AMDGPU: Migrate verifier tests to subarch triples
DeltaFile
+5-5llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
+1-1llvm/test/Verifier/AMDGPU/alloca.ll
+6-62 files

FreeNAS/freenas c91e93a.github/workflows ruff.yml, src/middlewared/middlewared job.py

NAS-141948 / 26.0.0-RC.1 / Fix `JobProgressBuffer.set_progress` not being thread-safe (by themylogin) (#19409)

`JobProgressBuffer.set_progress` called `self.job.loop.call_later`. When
doing so from a thread, it might break event the loop.

Original PR: https://github.com/truenas/middleware/pull/19402

---------

Co-authored-by: themylogin <themylogin at gmail.com>
DeltaFile
+159-0tests/unit/test_job_progress_buffer.py
+34-0src/middlewared/middlewared/utils/asyncio_.py
+2-1src/middlewared/middlewared/job.py
+1-1.github/workflows/ruff.yml
+196-24 files

LLVM/project 031386allvm/test/MC/AMDGPU hsa-v4.s hsa-gfx13-v4.s

AMDGPU: Migrate assembler tests with content changes to subarch triples

Convert tests which failed after converting the arguments due to content
changes from checking the emitted target id string.
DeltaFile
+10-10llvm/test/MC/AMDGPU/amdgcn-target-directive-triple-env.s
+6-6llvm/test/MC/AMDGPU/hsa-v5-uses-dynamic-stack.s
+5-5llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
+5-5llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
+4-4llvm/test/MC/AMDGPU/hsa-v4.s
+4-4llvm/test/MC/AMDGPU/hsa-gfx13-v4.s
+34-344 files not shown
+48-4810 files

LLVM/project 34be3a6offload/unittests/OffloadAPI/queue olLaunchHostFunction.cpp

[OFFLOAD][L0][NFC] Mark as skip unittest with driver issue (#212466)
DeltaFile
+2-0offload/unittests/OffloadAPI/queue/olLaunchHostFunction.cpp
+2-01 files

FreeBSD/src 15671c2sys/dev/usb usbdevs

usbdevs: Add Microchip 10BASE-T1S eval board

USB vendor:product 184f:0051

Sponsored by:   The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D56794

(cherry picked from commit 707ee7ff952c5aa50884f96f7ed26f756c9723b5)
DeltaFile
+4-0sys/dev/usb/usbdevs
+4-01 files

LLVM/project 857746bclang/test/CIR/CodeGenHIP builtins-amdgcn-extended-image.hip, clang/test/CodeGen link-builtin-bitcode.c

AMDGPU: Fix missing extended-image-insts missing from feature map (#212418)

Unsurprisingly, this manually maintained table is buggy.
fillAMDGCNFeatureMap never set extended-image-insts, so clang's builtin
feature check rejected every case. The tests were working around this
with manually specified -target-features flags.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+26-0clang/test/SemaOpenCL/builtins-extended-image-supported.cl
+10-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+2-2clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
+2-2clang/test/CodeGen/link-builtin-bitcode.c
+0-3clang/test/CIR/CodeGenHIP/builtins-amdgcn-extended-image.hip
+3-0clang/test/SemaOpenCL/builtins-extended-image-param-gfx942-err.cl
+43-74 files not shown
+47-1110 files

LLVM/project 8f05795llvm/test/Analysis/CostModel/RISCV arith-fp.ll int-bit-manip.ll, llvm/test/Transforms/VectorCombine/RISCV vpintrin-scalarization.ll

[IR] Autoupgrade trivial VP intrinsics to their non-VP counterparts

As a first step towards removing trivial VP intrinsics, autoupgrade them to their non-VP counterparts for backwards compatibility.

Since trivial VP intrinsics only set lanes to poison, it's safe to replace them with non predicated versions.

RFC: https://discourse.llvm.org/t/rfc-remove-trivial-vp-intrinsics/90972
DeltaFile
+0-1,763llvm/test/Analysis/CostModel/RISCV/cast.ll
+250-545llvm/test/Transforms/VectorCombine/RISCV/vpintrin-scalarization.ll
+370-416llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
+308-308llvm/test/Analysis/CostModel/RISCV/fround.ll
+310-167llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
+0-470llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
+1,238-3,66941 files not shown
+1,922-4,59247 files

OPNSense/plugins dbd8141net/ndp-proxy-go Makefile pkg-descr

net/ndp-proxy-go: Bump version to 1.4
DeltaFile
+1-2net/ndp-proxy-go/Makefile
+3-0net/ndp-proxy-go/pkg-descr
+4-22 files

LLVM/project 43f6e19llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp

Simplify loops.
DeltaFile
+2-7llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+2-71 files

OPNSense/plugins afc630enet/ndp-proxy-go/src/opnsense/service/conf/actions.d actions_ndpproxy.conf

net/ndp-proxy-go: Fix status not showing stopped service
DeltaFile
+1-0net/ndp-proxy-go/src/opnsense/service/conf/actions.d/actions_ndpproxy.conf
+1-01 files

LLVM/project 9ccedc2llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp SPIRVNonSemanticDebugHandler.h

Rename function.
DeltaFile
+6-6llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+3-3llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+9-92 files

LLVM/project 64e80f1llvm/test/Assembler auto_upgrade_vp.ll

Precommit test
DeltaFile
+148-0llvm/test/Assembler/auto_upgrade_vp.ll
+148-01 files

LLVM/project 89d39f6llvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/SimplifyCFG branch-nested.ll

[SimplifyCFG] Bail out on trivial cases in `mergeNestedCondBranch` (#212309)

Closes https://github.com/llvm/llvm-project/issues/212300.

When BB3 is identical to BB4, it is no longer profitable to perform this
fold, since it creates an unused xor instruction. The DomTree update
issue is also easy to fix. But I think this solution is better.

The following IR was dumped just before this function:
```
define void @func(i1 %cond1, i1 %cond2, i1 %cond3) {
entry:
  br i1 %cond1, label %bb2, label %else

else:                                             ; preds = %entry
  br i1 %cond2, label %bb0, label %common.ret

bb0:                                              ; preds = %else
  br i1 %cond1, label %bb1, label %bb2

    [12 lines not shown]
DeltaFile
+33-0llvm/test/Transforms/SimplifyCFG/branch-nested.ll
+4-0llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+37-02 files

OPNSense/plugins 9a58d8anet/ndp-proxy-go/src/opnsense/mvc/app/controllers/OPNsense/NdpProxy/forms general.xml, net/ndp-proxy-go/src/opnsense/mvc/app/models/OPNsense/NdpProxy NdpProxy.xml

net/ndp-proxy-go: Add static-prefix and static-router flags
DeltaFile
+18-0net/ndp-proxy-go/src/opnsense/mvc/app/controllers/OPNsense/NdpProxy/forms/general.xml
+11-0net/ndp-proxy-go/src/opnsense/mvc/app/models/OPNsense/NdpProxy/NdpProxy.xml
+10-0net/ndp-proxy-go/src/opnsense/service/templates/OPNsense/NdpProxy/ndp_proxy_go
+1-0net/ndp-proxy-go/src/opnsense/mvc/app/views/OPNsense/NdpProxy/general.volt
+40-04 files

OpenBSD/src DmuOLWRusr.bin/tmux server-client.c

   Store status position in new mouse event for menus so the position is
   correct later.
VersionDeltaFile
1.500+5-3usr.bin/tmux/server-client.c
+5-31 files

LLVM/project d85f94cllvm/lib/Target/VE VEInstrPatternsVec.td, llvm/test/CodeGen/VE/Packed vp_mul.ll

[VE] Fix crash when splitting all-ones v512i1 mask

The added test case crashes because we try to extract a subreg from vmp0 when selecting vec_unpack_*, but vmp0 has no subregisters, see d46e49838e17800cb72d95db1b23c04bbca610e2

vmp0 is hardwired to all ones, so it gets selected for an all ones mask.

Fix it by adding an explicit pattern for an all ones mask that selects vm0, the v256i1 version of vmp0, instead of creating an invalid subreg extract.
DeltaFile
+21-0llvm/test/CodeGen/VE/Packed/vp_mul.ll
+4-0llvm/lib/Target/VE/VEInstrPatternsVec.td
+25-02 files

LLVM/project 7b42aa6llvm/test/CodeGen/SPIRV/debug-info debug-function-namespace-scope.ll

Fix negative checks.
DeltaFile
+5-2llvm/test/CodeGen/SPIRV/debug-info/debug-function-namespace-scope.ll
+5-21 files

FreeNAS/freenas eacd557src/middlewared/middlewared/plugins/nfs_ status.py validators.py

NAS-141984 / 26.0.0-RC.1 / Fix small bugs in NFS code (#19418)

`sanitize_networks` and `sanitize_hosts` reported incorrect error
messages when wildcard host/network was not the last on the list.

`clear_nfs3_rmtab` accepted mutable value as default argument. This
didn't affect anything currently, but can potentially result in memory
leaks and weird behavior if code is modified.

`dbgflg` was a leaked loop variable that worked by accident

Backported from https://github.com/truenas/middleware/pull/19417
DeltaFile
+5-4src/middlewared/middlewared/plugins/nfs_/debug.py
+4-4src/middlewared/middlewared/plugins/nfs_/validators.py
+4-1src/middlewared/middlewared/plugins/nfs_/status.py
+13-93 files

LLVM/project 0d92236mlir/include/mlir/Dialect/List/IR ListOps.td, mlir/lib/Dialect/List/Transforms ListLowerRange.cpp ListSimplifyElements.cpp

list exercises
DeltaFile
+566-3mlir/lib/Dialect/List/Transforms/ListSimplify.cpp
+92-53mlir/include/mlir/Dialect/List/IR/ListOps.td
+0-144mlir/lib/Dialect/List/Transforms/ListLowerMap.cpp
+0-122mlir/lib/Dialect/List/Transforms/ListSimplifyElements.cpp
+0-100mlir/lib/Dialect/List/Transforms/ListLowerRange.cpp
+67-26mlir/test/Dialect/List/simplify.mlir
+725-44810 files not shown
+1,068-59216 files

LLVM/project e432cb1mlir/test/IR properties.mlir invalid-properties.mlir, mlir/test/lib/Dialect/Test TestOps.td

[mlir]Add resultSegmentSizes/operandSegmentSizes to prop-dict. (#211222)

`setPropertiesFromParsedAttr` (generated by `OpFormatGen.cpp` for ops
using a custom `assemblyFormat`) rejects the trait-injected
`operandSegmentSizes` /. `resultSegmentSizes` properties when they
appear in a `prop-dict`, even though the printer emits them there for ops
whose format uses a bulk operand/result type directive
(`type(operands)`, `type(results)`, `functional-type(operands, results)`).

This breaks round-tripping: any op combining `AttrSizedOperandSegments`
/ `AttrSizedResultSegments` with such a bulk directive fails to re-parse
its own printed output, because printer-side elision of these keys
(introduced in #115930) is intentionally skipped in that case — the
sizes can't be reconstructed from individually-typed operand/result 
groups, so they must survive in the text, but the custom parser was never
taught to read them back.

`setPropertiesFromAttr` (used by the generic-form parser, bytecode, and
C++ construction) already special-cases these two keys, so this change

    [12 lines not shown]
DeltaFile
+40-0mlir/tools/mlir-tblgen/OpFormatGen.cpp
+30-0mlir/test/mlir-tblgen/op-format.td
+20-0mlir/test/IR/invalid-properties.mlir
+16-0mlir/test/lib/Dialect/Test/TestOps.td
+11-0mlir/test/IR/properties.mlir
+117-05 files

LLVM/project 1dc1db7clang/lib/Basic/Targets AMDGPU.h, clang/lib/Driver/ToolChains CommonArgs.cpp AMDGPU.cpp

AMDGPU: Split R600 feature bitmask into separate enum from amdgcn

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+17-17llvm/unittests/TargetParser/TargetParserTest.cpp
+18-12llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+6-4llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+3-5clang/lib/Driver/ToolChains/CommonArgs.cpp
+4-4clang/lib/Driver/ToolChains/AMDGPU.cpp
+5-3clang/lib/Basic/Targets/AMDGPU.h
+53-454 files not shown
+62-5410 files

LLVM/project c154f4aclang/lib/Basic/Targets AMDGPU.h, llvm/include/llvm/TargetParser AMDGPUTargetParser.h

AMDGPU: Remove dead FEATURE_FP64/FEATURE_LDEXP from ArchFeatureKind (#212479)

No GPU ever sets these bits, and clang's hasFP64()/hasLDEXPF()
short-circuit on isAMDGCN() before testing them, so the bits are 
never observed.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+10-12llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+2-8clang/lib/Basic/Targets/AMDGPU.h
+12-202 files

FreeBSD/src 4702384. ObsoleteFiles.inc

Revert "Add a few missed files to ObsoleteFiles.inc"

This reverts commit 33175a5059970bf9e888a799d3578e2902d765af, because
some of the directories and files are still being installed.
DeltaFile
+0-9ObsoleteFiles.inc
+0-91 files

FreeBSD/src d4b36d6. ObsoleteFiles.inc

Revert "Add a few missed files to ObsoleteFiles.inc"

This reverts commit 2e089a89812b56329741cd8dc2d272405a6e73ff, because
some of the directories and files are still being installed.
DeltaFile
+0-9ObsoleteFiles.inc
+0-91 files

LLVM/project 89e43e3llvm/lib/Transforms/Utils LoopUnroll.cpp

revert fix in #208874, keep test
DeltaFile
+0-4llvm/lib/Transforms/Utils/LoopUnroll.cpp
+0-41 files

FreeBSD/ports 94ca6c9www/radicale Makefile distinfo

www/radicale: Update to 3.7.7
DeltaFile
+3-3www/radicale/distinfo
+1-1www/radicale/Makefile
+4-42 files

LLVM/project acf3f09llvm/lib/Analysis ScalarEvolution.cpp, llvm/unittests/Analysis ScalarEvolutionTest.cpp

Revert "[SCEV] Speed up forgetLoop by avoiding def-use walk for loop-header P…"

This reverts commit 0411e39a35866c125750810e59a15e00c9484fc9.
DeltaFile
+0-39llvm/unittests/Analysis/ScalarEvolutionTest.cpp
+16-6llvm/lib/Analysis/ScalarEvolution.cpp
+16-452 files

FreeNAS/freenas 8e33647src/middlewared/middlewared/plugins/nfs_ utils.py fs_attachment_delegate.py

`mypy` for `plugins/nfs_`
DeltaFile
+23-17src/middlewared/middlewared/plugins/nfs_/debug.py
+24-12src/middlewared/middlewared/plugins/nfs_/status.py
+9-7src/middlewared/middlewared/plugins/nfs_/validators.py
+11-4src/middlewared/middlewared/plugins/nfs_/port_attachments.py
+11-3src/middlewared/middlewared/plugins/nfs_/fs_attachment_delegate.py
+2-2src/middlewared/middlewared/plugins/nfs_/utils.py
+80-452 files not shown
+84-468 files