LLVM/project 5cec69a — compiler-rt/lib/hwasan hwasan_linux.cpp, compiler-rt/lib/lsan lsan_thread.cpp

Merge branch 'main' into revert-228574-dsymutil-index-globals
DeltaFile
+68-0compiler-rt/test/lsan/TestCases/Linux/detached_thread_dlsym.c
+15-0compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
+6-4lldb/source/Core/FormatEntity.cpp
+5-1compiler-rt/lib/lsan/lsan_thread.cpp
+4-0compiler-rt/lib/sanitizer_common/sanitizer_dl.h
+2-0compiler-rt/lib/hwasan/hwasan_linux.cpp
+100-51 files not shown
+102-57 files

LLVM/project ca650f1 — compiler-rt/lib/asan asan_thread.cpp, compiler-rt/lib/hwasan hwasan_linux.cpp

[sanitizer] Clear pending dlerror on thread exit before unregistering (#228930)

Starting with glibc 2.34
(https://sourceware.org/git/?p=glibc.git;h=fada9018199c), failed dlfcn
calls store a per-thread error struct in TLS (__libc_dlerror_result)
instead of a pthread_key_t, and free it in __libc_thread_freeres() after
all pthread TSD destructors have completed.

Because ASan, LSan, and HWASan unregister the exiting thread in their
pthread TSD destructors during __nptl_deallocate_tsd(), LSan stops
scanning that thread's TLS before __libc_thread_freeres() frees
__libc_dlerror_result. If a leak check runs in that window (for example,
when the main thread exits while a detached worker thread is finishing)
and libc debug symbols are not installed to match the default *dlerror*
suppression on _dlerror_run, LSan reports a false positive leak from
dlsym/dlopen.

This manifests as flaky (~3% failure rate) LSan leaks on
`LLVM :: ExecutionEngine/JITLink/x86-64/` tests on

    [9 lines not shown]
DeltaFile
+68-0compiler-rt/test/lsan/TestCases/Linux/detached_thread_dlsym.c
+15-0compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
+5-1compiler-rt/lib/lsan/lsan_thread.cpp
+4-0compiler-rt/lib/sanitizer_common/sanitizer_dl.h
+2-0compiler-rt/lib/hwasan/hwasan_linux.cpp
+2-0compiler-rt/lib/asan/asan_thread.cpp
+96-16 files

LLVM/project 9f7943e — llvm/lib/Target/RISCV RISCVInsertVSETVLI.cpp, llvm/test/CodeGen/RISCV/rvv vsetvli-insert.mir

RISCV: Do not add a live VL def to inline asm that clobbers it

Inline asm that already clobbers VL or VTYPE was given an additional
live implicit def of the same register, contradicting the dead clobber
def.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+29-0llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir
+2-4llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
+31-42 files

LLVM/project 5b4b9a9 — llvm/lib/CodeGen MachineBasicBlock.cpp, llvm/lib/CodeGen/MIRParser MILexer.h MILexer.cpp

MIR: Serialize MachineBasicBlock::IsEHContTarget

Co-Authored-By: Claude Sonnet 5 <noreply at anthropic.com>
DeltaFile
+16-0llvm/test/CodeGen/MIR/Generic/machine-basic-block-ehcont-target.mir
+6-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+5-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+1-0llvm/lib/CodeGen/MIRParser/MILexer.h
+1-0llvm/lib/CodeGen/MIRParser/MILexer.cpp
+29-05 files

FreeBSD/src 4bb6015 — sys/netinet in.c, sys/netinet6 in6.c

netinet: Deprecate OSIOCAIFADDR and OSIOCAIFADDR_IN6

Requested by:   glebius
Reviewed by:    pouria, glebius
MFC after:      1 week
Sponsored by:   The FreeBSD Foundation
Differential Revision:  https://reviews.freebsd.org/D60247
DeltaFile
+3-0sys/netinet/in.c
+2-0sys/netinet6/in6.c
+5-02 files

LLVM/project 7b7aeae — lldb/source/Core FormatEntity.cpp

[lldb] Replace ConstString in FormatEntity.cpp (#225523)

Co-authored-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+6-4lldb/source/Core/FormatEntity.cpp
+6-41 files

NetBSD/src SwIDa45 — sys/kern sys_pipe.c

   pipe(2): Fix possible use-after-free if both ends are closed at once.

   Followup for:

   PR kern/59056: poll POLLHUP bugs
VersionDeltaFile
1.184+29-7sys/kern/sys_pipe.c
+29-71 files

LLVM/project 665afe7 — libc/src/stdio/linux tmpnam.cpp, libc/test/src/stdio tmpnam_test.cpp

Merge branch 'main' into revert-228574-dsymutil-index-globals
DeltaFile
+174-0llvm/test/tools/dsymutil/AArch64/dwarf5-loclist-addrx-data.test
+129-0llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
+117-1mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
+108-0libc/test/src/stdio/tmpnam_test.cpp
+94-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
+94-0libc/src/stdio/linux/tmpnam.cpp
+716-174 files not shown
+1,477-39580 files

LLVM/project 8bd6c00 — llvm/test/CodeGen/AMDGPU atomic_optimizations_local_pointer.ll, llvm/test/CodeGen/AMDGPU/GlobalISel srem.i64.ll sdiv.i64.ll

Merge branch 'main' into users/vitalybuka/spr/sanitizer-clear-pending-dlerror-on-thread-exit-before-unregistering
DeltaFile
+733-5,435llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
+986-1,144llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
+914-1,072llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
+728-824llvm/test/CodeGen/X86/mul-constant-i32.ll
+585-680llvm/test/CodeGen/X86/mul-constant-i64.ll
+608-584llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
+4,554-9,7391,010 files not shown
+44,683-28,8561,016 files

LLVM/project a2c07d5 — llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp

[AMDGPU] Reserve ENABLE_WAVEFRONT_SIZE32 on gfx125x (#229162)

Wave32-only targets (gfx1250, gfx1250-strict, gfx1251, gfx12-5-generic)
reserve the kernel descriptor's ENABLE_WAVEFRONT_SIZE32, so it must be
0.

Also update the documentation regarding which targets allow selecting
the wave size through this bit.
DeltaFile
+9-9llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+6-8llvm/test/MC/AMDGPU/hsa-gfx1251-v4.s
+6-8llvm/test/MC/AMDGPU/hsa-gfx1250-v4.s
+8-6llvm/test/MC/AMDGPU/hsa-diag-v4.s
+5-5llvm/docs/AMDGPUUsage.rst
+5-1llvm/test/MC/Disassembler/AMDGPU/kernel-descriptor-errors.test
+39-377 files not shown
+61-4413 files

LLVM/project c21c809 — llvm/test/MC/AMDGPU gfx1250_asm_vop3.s gfx1250_asm_vop3-fake16.s, llvm/test/MC/Disassembler/AMDGPU gfx1250_dasm_vop3.txt

[AMDGPU] op_sel[0] must be zero for v_cvt_sr_fp8/bf8_f16 (#227413)

For v_cvt_sr_fp8_f16 and v_cvt_sr_bf8_f16, current hardware ignores the
op_sel[0] bit. SP3 docs have been updated to specify op_sel[0] must be zero.
This work makes the change accordingly for both MC and instruction
selection. In true16 mode the src0.h form is thus no longer encodable.
    
These instructions use op_sel[2:3] to select a byte in vdst and require
op_sel[1:0] to be zero, so set HasOpSel = 0 on their profiles: there is no
op_sel operand at all and Inst{11-12} are hardwired to zero. src0 is then
restricted to the low half of a VGPR through the true16 profile, using new
definitions:
    
  - VGPR_16_LO16 -- VGPR0_LO16 through VGPR255_LO16, the most a 9-bit VOP3
     source can encode;
  - VS_16_LO16 -- VGPR_16_LO16, SReg_32 and LDS_DIRECT, as the operand's
     register class;
  - VSrcT_f16_LO16 and FPT16_LO16InputMods for Src0RC64/Src0Mod (VOP3);
  - VGPROp_16_LO16 and FPT16_LO16VRegInputMods for Src0VOP3DPP/Src0ModVOP3DPP

    [9 lines not shown]
DeltaFile
+129-0llvm/test/MC/AMDGPU/gfx1250_asm_vop3_err.s
+94-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_err.s
+78-0llvm/test/MC/AMDGPU/gfx1250_asm_vop3_fake16_err.s
+0-40llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3.txt
+0-30llvm/test/MC/AMDGPU/gfx1250_asm_vop3.s
+0-30llvm/test/MC/AMDGPU/gfx1250_asm_vop3-fake16.s
+301-10012 files not shown
+387-21018 files

FreeBSD/ports 0b23c55 — audio/surge-synthesizer-xt-lv2/files patch-libs_JUCE_modules_juce__audio__processors_format__types_VST3__SDK_pluginterfaces_base_fplatform.h patch-libs_JUCE_fplatform_h, biology/gkl/files patch-CMakeLists.txt

*/*: CMake 4.5 compatibility

PR:     295319
DeltaFile
+26-9cad/qucsator/files/patch-CMakeLists.txt
+0-29audio/surge-synthesizer-xt-lv2/files/patch-libs_JUCE_modules_juce__audio__processors_format__types_VST3__SDK_pluginterfaces_base_fplatform.h
+29-0audio/surge-synthesizer-xt-lv2/files/patch-libs_JUCE_fplatform_h
+16-8biology/gkl/files/patch-CMakeLists.txt
+20-0cad/qcsxcad/files/patch-CMakeLists.txt
+15-0graphics/open3d/files/patch-CMakeLists.txt
+106-4666 files not shown
+228-5772 files

FreeBSD/src 499901d — sys/ufs/ffs ffs_suspend.c

ufssuspend(4): mark non-passable

This fixes long-standing issue where ufssuspend file descriptor could
leak over fork or be passed over unix domain socket, and then closing it
in the opener would not unsuspend the file system.

It should not affect the well-behaving growfs(8) utility, but makes the
userspace API safer on principle.

Reviewed by:    markj
Tested by:      pho (previous version)
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D60285
DeltaFile
+1-0sys/ufs/ffs/ffs_suspend.c
+1-01 files

FreeBSD/src 850d456 — sys/fs/devfs devfs_vnops.c, sys/sys conf.h

cdevsw: add D_NONPASSABLE flag

to make the opened device files non-passable.

Reviewed by:    markj
Tested by:      pho (previous version)
Sponsored by:   The FreeBSD Foundation
MFC after:      1 week
Differential revision:  https://reviews.freebsd.org/D60285
DeltaFile
+25-2sys/fs/devfs/devfs_vnops.c
+2-0sys/sys/conf.h
+27-22 files

LLVM/project 6f29c16 — llvm/lib/DWARFLinker CMakeLists.txt, llvm/utils/gn/secondary/llvm/lib/DWARFLinker BUILD.gn

[DWARFLinker] Add missing DebugInfoDWARFLowLevel dependency (#229222)

Since afca127bbb62, hasImplicitAddressLocation() in LLVMDWARFLinker uses
DWARFExpression from DebugInfoDWARFLowLevel. Builds with
BUILD_SHARED_LIBS=ON failed to link libLLVMDWARFLinker with undefined
references to DWARFExpression. Add the component to the CMake library,
and the matching dependency to the GN build.

Assisted-by: Claude
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/lib/DWARFLinker/BUILD.gn
+1-0llvm/lib/DWARFLinker/CMakeLists.txt
+2-02 files

LLVM/project 1def37a — llvm/lib/CodeGen/SelectionDAG LegalizeTypes.cpp LegalizeFloatTypes.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll

DAG: Fix error message casing to match style policy (#229212)

The developer guidelines suggests that diagnostic messages should start
with a lowercase letter and not end in a period

Co-authored-by: Claude <noreply at anthropic.com>
DeltaFile
+4-4llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-3llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+2-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.nxv2i32.fail.ll
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+1-1llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
+14-148 files not shown
+22-2214 files

LLVM/project 25e2b44 — libc/include/llvm-libc-macros stdio-macros.h, libc/src/stdio tmpnam.h

[libc] Add tmpnam implementation (#204901)

Implements tmpnam per the POSIX specification and adds unit tests. The
macros defined are taken from glibc.

tmpnam spec:
https://pubs.opengroup.org/onlinepubs/9799919799/functions/tmpnam.html

Assisted by: Claude + Gemini

#191280
DeltaFile
+108-0libc/test/src/stdio/tmpnam_test.cpp
+94-0libc/src/stdio/linux/tmpnam.cpp
+25-0libc/src/stdio/tmpnam.h
+18-0libc/src/stdio/linux/CMakeLists.txt
+18-0libc/include/llvm-libc-macros/stdio-macros.h
+15-0libc/test/src/stdio/CMakeLists.txt
+278-05 files not shown
+298-011 files

LLVM/project 182a11a — llvm/lib/Target/AArch64 AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 wineh-csr-area-spill.ll

[AArch64][Win] Account for the fixed object area when classifying CSR (#222111)

In Windows frames, the fixed object area sits above the callee-saved
register area:

    +---------------+
    | Fixed objects |
    +---------------+
    | Callee-saved  |
    +---------------+
    | Locals        |
    +---------------+

Include the fixed object area in the callee-saved threshold used by
`resolveFrameOffsetReference()`. Without this, objects in the
callee-saved area can be incorrectly addressed through the base
pointer in stack-realigned frames.

This became visible after #147421 moved catch objects into the fixed

    [3 lines not shown]
DeltaFile
+61-0llvm/test/CodeGen/AArch64/wineh-csr-area-spill.ll
+11-1llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+72-12 files

LLVM/project f43c4d3 — llvm/include/llvm/Analysis ReleaseModeModelRunner.h, llvm/include/llvm/Analysis/Utils MLGOUtils.h

[MLGO] Make regalloc eviction input tensor shapes runtime variables (#224598)

The column count was hardcoded to 33 for X86

It now comes from `-mlregalloc-num-allocatable-regs` (default 32, plus
one column for the candidate), compiled model whose shapes do not match
falls back to the default policy
DeltaFile
+47-33llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
+36-0llvm/unittests/Analysis/MLModelRunnerTest.cpp
+21-2llvm/include/llvm/Analysis/ReleaseModeModelRunner.h
+1-20llvm/lib/CodeGen/MLRegAllocEvictAdvisor.h
+8-0llvm/test/CodeGen/MLRegAlloc/interactive-mode.ll
+6-1llvm/include/llvm/Analysis/Utils/MLGOUtils.h
+119-561 files not shown
+122-567 files

LLVM/project 4cdcd6d — lldb/source/API CMakeLists.txt

[lldb] Use file(MAKE_DIRECTORY) to create header staging dir (#228606)

This simplifies the build graph for modifying lldb headers for
installation. It also fixes the `clean` target by not making a target
responsible for creating this directory. CMake will create it as needed
during configuration time instead of at build time.

rdar://161109746
DeltaFile
+2-8lldb/source/API/CMakeLists.txt
+2-81 files

LLVM/project 7560c22 — llvm/include/llvm/IR IntrinsicsSPIRV.td

[SPIR-V] Mark elementwise intrinsics IntrTriviallyScalarizable (#227286)

This mirrors the DirectX intrinsics

The SPIR-V legalizer will use it to split elementwise intrinsics with
illegal vector widths

Required for https://github.com/llvm/llvm-project/pull/227287
DeltaFile
+42-42llvm/include/llvm/IR/IntrinsicsSPIRV.td
+42-421 files

FreeBSD/ports cf24cea — security/snort Makefile

security/snort: Use libpcap from ports

Summary:
Add explicit lib version to force port to use libpcap from ports and
avoid it rebuilding every time base packages are upgraded

Sponsored by:   Rubicon Communications, LLC ("Netgate")
Reviewed By:    dvl
Differential Revision:  https://reviews.freebsd.org/D60381
DeltaFile
+2-2security/snort/Makefile
+2-21 files

FreeBSD/ports ab49c19 — security/snort3 Makefile

security/snort3: Use libpcap from ports

Summary:
Add explicit lib version to force port to use libpcap from ports and
avoid it rebuilding every time base packages are upgraded

Sponsored by:   Rubicon Communications, LLC ("Netgate")
Reviewed By:    bofh
Differential Revision:  https://reviews.freebsd.org/D60383
DeltaFile
+2-1security/snort3/Makefile
+2-11 files

FreeBSD/ports 40569e6 — net/libdaq Makefile

net/libdaq: Use libpcap from ports

Add explicit lib version to force port to use libpcap from ports and
avoid it rebuilding every time base packages are upgraded

Sponsored by:   Rubicon Communications, LLC ("Netgate")
Reviewed By:    bofh
Differential Revision:  https://reviews.freebsd.org/D60383
DeltaFile
+2-1net/libdaq/Makefile
+2-11 files

LLVM/project 2a8d8df — flang/test/Transforms/OpenACC acc-implicit-routine.fir, mlir/include/mlir/Dialect/OpenACC OpenACCUtils.h

[mlir][OpenACC] Skip implicit routine marking for host-only calls (#227758)

Calls nested in a host-only branch of `acc.on_device` do not run on the
device. Do not try to attach implicit acc routine information to them.
DeltaFile
+117-1mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
+50-0mlir/lib/Dialect/OpenACC/Utils/OpenACCUtils.cpp
+47-1flang/test/Transforms/OpenACC/acc-implicit-routine.fir
+8-5mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
+9-0mlir/lib/Dialect/OpenACC/Transforms/ACCImplicitRoutine.cpp
+8-0mlir/include/mlir/Dialect/OpenACC/OpenACCUtils.h
+239-76 files

LLVM/project 63d98dc — .ci compute_projects.py compute_projects_test.py

[CI] Exclude CIR from Windows premerge testing (#229208)

After #227957, the check-clang-cir target is only defined when
CLANG_ENABLE_CIR is ON. The Windows premerge build never sets that
option (only monolithic-linux.sh receives enable_cir), but
compute_projects.py still selects check-clang-cir for CIR changes on
Windows. Every PR touching CIR now fails the Windows job before any test
runs:

  ninja: error: unknown target 'check-clang-cir'

Before #227957 the target existed unconditionally, and the CIR tests
were all unsupported on Windows because CIR was disabled, so excluding
CIR there loses no coverage. It also stops building mlir for CIR-only
changes on Windows.

Enabling real CIR testing on Windows (passing enable_cir through to
monolithic-windows.sh) can be done separately.


    [2 lines not shown]
DeltaFile
+18-1.ci/compute_projects_test.py
+1-0.ci/compute_projects.py
+19-12 files

FreeBSD/ports 4e3de49 — security/vuxml/vuln 2026.xml

security/vuxml: Fix entry for expat2 CVE-2026-93990

expat2 package is using expat as package name

PR:             299162
Reported by:    Tomáš Čiernik <tomas at ciernik.sk>
DeltaFile
+1-1security/vuxml/vuln/2026.xml
+1-11 files

LLVM/project 029ee5b — llvm/include/llvm/DWARFLinker AddressesMap.h, llvm/lib/DWARFLinker/Classic DWARFLinker.cpp

[DWARFLinker] Relocate DW_OP_addrx by the delta of its own symbol  (#228583)

When rewriting DW_OP_addrx or DW_OP_constx into a relocated address,
DWARFLinker applied the adjustment of whatever owned the expression.
For a location list that is the enclosing function, but the .debug_addr
entry may name a data symbol, which the linker moves by a different
amount. For a variable holding the address of _g at 0x100004008 this
produced:

  [0x100000418, 0x100000424): DW_OP_addr 0x100000790, DW_OP_stack_value

Look up the relocation of each operand's own .debug_addr slot instead,
the way a variable's single location is already handled, and fall back
to the owner's adjustment only where there is none. Do this in both the
classic and the parallel linker.

rdar://188852150
Assisted-by: Claude
DeltaFile
+174-0llvm/test/tools/dsymutil/AArch64/dwarf5-loclist-addrx-data.test
+16-0llvm/include/llvm/DWARFLinker/AddressesMap.h
+12-2llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+9-2llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
+211-44 files

NetBSD/pkgsrc-wip 6da5797 — . TODO

TODO: + llama.cpp-0.6.0.
DeltaFile
+1-0TODO
+1-01 files

NetBSD/pkgsrc I6C5WBe — doc TODO

   doc/TODO: + ggml-0.26.0, gleam-1.19.0, mold-3.0.0, picard-3.0.
VersionDeltaFile
1.28109+5-2doc/TODO
+5-21 files