[RISCV] Update Andes45 vector load/stores scheduling info (#173806)
This PR adds latency/throughput for all RVV load/stores to the Andes45
series scheduling model.
Merge tag 'devicetree-fixes-for-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree fixes from Rob Herring:
- Fix an error path memory leak in DT unittest
- Update Saravana's bouncing email
* tag 'devicetree-fixes-for-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
of: unittest: Fix memory leak in unittest_data_add()
MAINTAINERS: Update Saravana Kannan's email address
refactor the matching of sk->sk_states entries in pf_find_state()
ive been looking at and trying to comprehend this code for what
feels like months of my life, and the af-to handling in particular.
it wasn't until i found the PF_AFRT handling in pf_test that it
suddenly clicked.
i figure it doesnt hurt to pull the code here apart a bit and put
some comments in place to help future travellers.
ok sashan@
strlcpy(3): convert the list of WARNINGs to .Bl
Use `-hang -width 0n` to make the bodies indented ever so slightly, by
the extra amount mdoc adds between the value specified by `-width` and
the body (digit-width).
This slightly alleviates the sensory overload from the big lumps of
bold at the start of these paragraphs. Em instead Sy might be another
additional tweak to consider.
If you don't like the result you can switch back to the old output by
just changing the list to `-inset`. Another alternative might be
`-ohang`. (Neither needs `-width`).
