[AArch64] Improve v1i64/v2i64 clmulh. (#196694)
We can use pmull/pmull2 to compute the full product then take the high
half.
---------
Co-authored-by: Matthew Devereau <matthew.devereau at arm.com>
[clang-tidy][NFC] Use `std::array` instead of `SmallVector` in `UseTrailingReturnTypeCheck`
We know we have exactly 2 `Token` in the array. There is no need to use `SmallVector` here.
[mlir][SparseTensor] Terminology cleanup PIV -> PCV (NFC) (#196707)
This PR standardizes terminology in the MLIR sparsifier by replacing the
PIV (Pointer, Index, Value) terminology with the PCV (Position,
Coordinate, Value) terminology established in
https://reviews.llvm.org/D144773. The changes include renaming template
parameters and error macros.
[lldb] Rename GetInstanceVariableName to GetInstanceName (NFC) (#196453)
Based on Jim's comments
(https://github.com/llvm/llvm-project/pull/195187#discussion_r3205135577)
which highlights that it is incorrect to call this/self an "instance
variable".
I went with "instance name" to leave out the word "object", since not
all instances values are objects.
[LLVM] Add validation to check the number of intrinsic args (#196563)
Add validation to check the number of intrinsic args. In service of
that, extend `getIntrinsicInfoTableEntries` to return several things:
* ArrayRef to the Table (as a convenience).
* Number of arguments
* Does the intrinsic have variable arguments.
This avoids some code duplication at various callers of
`getIntrinsicInfoTableEntries`. To have `getIntrinsicInfoTableEntries`
correctly compute the number of arguments based on trip count of the
while loop, move parsing of element type for `IIT_SAME_VEC_WIDTH_ARG` to
a recursive call from `DecodeIITType`.
NAS-140915 / 27.0.0-BETA.1 / Add recursion for filesystem.set_zfs_attributes (#18906)
This commit expands the API for filesystem.set_zfs_attributes to include
options for recursion. Specifically, we can do non-recursive, recursive
on files only and recursive on directories only, or recursively on both
files and directories.
(cherry picked from commit 67210c8d06d459ed00b50d39df666f9439d218a4)
[mlir] Add erase sub-region dominate tree logic in DominanceInfoBase::invalidate method (#192469)
Fix the issue: a region may contain nested sub-regions. When we remove
the dominate tree of a parent region and delete the region, the dominate
trees of its sub-regions should also be removed.
NAS-140946 / 26.0.0-RC.1 / Add basic NFSv4 change-attribute regression tests (by anodos325) (#18930)
This commit adds a variety of tests in which we validate the behavior
the the NFSv4 change-attribute FATTR4_CHANGE over a variety of NFS
operations that should advance it.
Original PR: https://github.com/truenas/middleware/pull/18919
Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
[clang] implement CWG2064: ignore value dependence for decltype
The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.
This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.
This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.
Fixes #8740
Fixes #61818
Fixes #190388
NAS-140946 / 27.0.0-BETA.1 / Add basic NFSv4 change-attribute regression tests (#18919)
This commit adds a variety of tests in which we validate the behavior
the the NFSv4 change-attribute FATTR4_CHANGE over a variety of NFS
operations that should advance it.
(cherry picked from commit 031c3f3292b5b872a5aa7553bdfa2cf9ba5d7430)
NAS-140868 / 26.0.0-RC.1 / Expand reporting tests (by anodos325) (#18931)
This fixes a schema field name typo for reporting disks (appears in API
docs, but does not change surfaced reporting.realtime event field names
-- typo only was in docs) in addition to adding explicit testing for
internal utilities as well as validating shape of returned
responses.
Original PR: https://github.com/truenas/middleware/pull/18870
[SPIR-V] Reject OpSelect with scalar result and vector condition (#193745)
Per SPIR-V spec, scalar Result Type requires a scalar bool condition.
So, vector cond branches under a scalar result are unreachable
Expand reporting tests
This fixes a schema field name typo for reporting disks
(appears in API docs, but does not change surfaced
reporting.realtime event field names -- typo only was in
docs) in addition to adding explicit testing for internal
utilities as well as validating shape of returned
responses.
(cherry picked from commit ef8cd34a7bdb50fdb68730d9225ce00beaa9d125)
NAS-140949 / 26.0.0-RC.1 / expand NFS tests for clone and copy ops (by anodos325) (#18927)
This commit expands and fixes server-side copy and clone tests for NFS
protocol.
Original PR: https://github.com/truenas/middleware/pull/18921
---------
Co-authored-by: Andrew Walker <andrew.walker at truenas.com>
NAS-140868 / 27.0.0-BETA.1 / Expand reporting tests (#18870)
This fixes a schema field name typo for reporting disks (appears in API
docs, but does not change surfaced reporting.realtime event field names
-- typo only was in docs) in addition to adding explicit testing for
internal utilities as well as validating shape of returned
responses.
refactor: remove dead i386/ILP32 code from kernel, userland, and tests (2)
* Put the platform fall-through test in kgdb back in, just removing
the i386 part.
[VPlan] Avoid erroneously marking PredPHI as using scalars (#195511)
PredInstPHIRecipe can use wide values, and indeed, we have several tests
demonstrating this behavior. Strip the erroenous always-true usesScalars
member, falling back to usesFirstLaneOnly as usual.
refactor: remove dead i386/ILP32 code from kernel, userland, and tests
DragonFly is x86_64-only. Remove permanently dead #ifdef __i386__,
userland tools, and regression tests. The code is never compiled.
refactor: remove large #if 0 dead code blocks
Remove 3200+ lines of permanently dead code guarded by #if 0 across
kernel, drivers, VFS, and userland. Several blocks have author comments
explicitly requesting removal. Code can be inspected in git history.
[CIR][AArch64] Lower vfmaq_v f32/f64 (#195602)
Lower `BI__builtin_neon_vfmaq_v` in CIR for the `vfmaq_f32` and
`vfmaq_f64` ACLE wrappers.
This is split out from the broader fused multiply-accumulate work and
only covers `BI__builtin_neon_vfmaq_v`. The related `vfma_v`,
`vfmaq_f16`, lane, laneq, and scalar forms remain outside this PR.
Tests move the existing `vfmaq_f32` and `vfmaq_f64` coverage from
`neon-intrinsics.c` into `neon/vfmaq.c`, preserve the original LLVM
checks, and add ClangIR coverage.
Validation: rebuilt `clang` and ran the focused `vfmaq.c` lit test.
Part of #185382
Split from feedback on #188190
[llvm][tools][llvm-objdump] Fix nested-offload-binary.test (#196912)
In little endian systems the embedded image hex is incorrect and the
test fails on Solaris/sparcv9.
Switching to generate the inner image on the fly and patch the outer
image CONTENT field.
DAGCombiner: (srl/sra (add nuw/nsw X, c), d) --> (add nuw/nsw (srl/sra X, d), c >> d)
Additional precondition:
* The LSBs of c are 0; equivalently: c >> d is exact
Alive2 for
* unsigned case: https://alive2.llvm.org/ce/z/YcJ8qA
* signed case: https://alive2.llvm.org/ce/z/fgpvyE
We already canonicalize (shl (add ...) ...) to (add (shl ...) ...).
Restrict this combine to the single-use case to minimize risk for now.
The main target of this combine is a fan-out tree of `add`s that all end
up being shifted by the same amount at the leaves. This change happens to
improve a bunch of existing CodeGen tests in AMDGPU.
v2:
- remove a redundant check on the shift amount -- large shift amounts
results in poison anyway
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