LLVM/project 5b94e6fclang/test/CodeGenHLSL/builtins atan2-overloads_mat.hlsl atan2_mat-overloads.hlsl, clang/test/SemaHLSL/BuiltIns atan2-errors_mat.hlsl atan2_mat-errors.hlsl

Update `atan2` matrix tests (#214550)

This PR updates the `atan2` matrix sema error test to cover the full set
of argument/type error cases (mirroring `pow_mat-errors.hlsl`). It also
renames two tests to match the `<intrinsic>_mat-<suffix>` convention
that other intrinsics follow.
DeltaFile
+0-52clang/test/CodeGenHLSL/builtins/atan2-overloads_mat.hlsl
+52-0clang/test/CodeGenHLSL/builtins/atan2_mat-overloads.hlsl
+36-0clang/test/SemaHLSL/BuiltIns/atan2_mat-errors.hlsl
+0-7clang/test/SemaHLSL/BuiltIns/atan2-errors_mat.hlsl
+88-594 files

LLVM/project 65cb5bcllvm/lib/Target/PISA PISAAsmPrinter.cpp

Formatting fix
DeltaFile
+2-1llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+2-11 files

LLVM/project 200993fllvm/test/Analysis/CostModel/RISCV reduce-scalable-int.ll vp-intrinsics.ll, llvm/test/Transforms/SLPVectorizer/RISCV runtime-strided-stores.ll

[RISCV] Increase cost of vmv.x.s and vfmv.f.s (#214481)

A change landed that enabled SLP vectorization in more places, but it
caused a 16% regression in 508.namd_r on the spacemit-k3:
https://github.com/llvm/llvm-project/issues/214417

The root cause is that we're emitting two vfmv.f.s now which are
generally slow due to the vector->scalar domain crossing:
https://godbolt.org/z/dMo55zPMa

Reciprocal throughput of vmv.x.s/vfmv.f.s is 6 times higher than
vmv.s.x/vfmv.s.f on the spacemit-k3 and 2.5 higher on the P870 according
to https://camel-cdr.github.io/rvv-bench-results/

This PR increases the cost of a vmv.x.s/vfmv.f.s from 1->2, which is
just enough to prevent unprofitable SLP vectorization and fixes the
regression on 508.namd_r.

It also has the bonus side effect of preventing loop vectorization where

    [3 lines not shown]
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+859-864llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll
+239-239llvm/test/Analysis/CostModel/RISCV/cast.ll
+126-126llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
+124-124llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
+114-114llvm/test/Analysis/CostModel/RISCV/reduce-scalable-int.ll
+132-66llvm/test/Transforms/SLPVectorizer/RISCV/runtime-strided-stores.ll
+1,594-1,53336 files not shown
+2,634-2,39442 files

LLVM/project 9adc253flang/include/flang/Semantics tools.h, flang/lib/Lower ConvertVariable.cpp

[Flang] Coarray allocation, update error for pointer component #193829 (#194651)

The TODO message in `verify()` was not completly displayed, so it has
been replaced by `emitErrorOp`.
In addition, the test in `ConvertVariable` has been updated by adding
pointer direct component case.
Fix #193829
DeltaFile
+15-3flang/lib/Lower/ConvertVariable.cpp
+3-3flang/lib/Optimizer/Dialect/MIF/MIFOps.cpp
+5-0flang/lib/Semantics/tools.cpp
+2-1flang/test/Lower/MIF/coarray_allocation3.f90
+2-0flang/include/flang/Semantics/tools.h
+27-75 files

OpenBSD/ports cnqbqnBsysutils/fastfetch Makefile distinfo

   Update fastfetch to 2.67
VersionDeltaFile
1.17+2-2sysutils/fastfetch/distinfo
1.17+1-1sysutils/fastfetch/Makefile
+3-32 files

LLVM/project 75c3118llvm/lib/Target/PISA CMakeLists.txt PISAAsmPrinter.cpp, llvm/test/CodeGen/PISA unreachable.ll return.ll

Add PISA AsmPrinter

Add PISAAsmPrinter to complete the codegen pipeline with end-to-end code
emission.
DeltaFile
+933-0llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+352-0llvm/test/CodeGen/PISA/store.ll
+350-0llvm/test/CodeGen/PISA/load.ll
+37-0llvm/test/CodeGen/PISA/return.ll
+14-0llvm/test/CodeGen/PISA/unreachable.ll
+1-0llvm/lib/Target/PISA/CMakeLists.txt
+1,687-06 files

HardenedBSD/ports 40bb12emisc/py-onnxruntime pkg-plist, misc/shimmy/files patch-Cargo.lock

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+305-0sysutils/magika/distinfo
+187-0sysutils/magika/Makefile
+0-121misc/py-onnxruntime/pkg-plist
+118-0sysutils/py-magika/files/patch-pyproject.toml
+0-77misc/shimmy/files/patch-Cargo.lock
+55-12science/py-OpenMC/Makefile
+665-21031 files not shown
+1,091-33837 files

LLVM/project f11fc54llvm/lib/Target/PISA PISAKernelByValArgsLowering.cpp

Formatting fix
DeltaFile
+4-3llvm/lib/Target/PISA/PISAKernelByValArgsLowering.cpp
+4-31 files

LLVM/project 4300427llvm/lib/Target/PISA CMakeLists.txt

Review fixes
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+1-1llvm/lib/Target/PISA/CMakeLists.txt
+1-11 files

LLVM/project 6e827e9llvm/lib/Target/Lanai LanaiTargetMachine.h

formatting

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/Target/Lanai/LanaiTargetMachine.h
+1-11 files

FreeBSD/src 114f4a6share/man/man4 pci.4, sys/dev/pci pci.c

pci: Optionally disable endpoints with unsafe MPS

Keep warn-only behavior as the default. Add an opt-in policy that
clears endpoint decoding and bus mastering when a newly discovered
function cannot match its active path, while never disabling bridge
functions and their subtrees.

MFC after:      2 weeks
DeltaFile
+41-2sys/dev/pci/pci.c
+13-0share/man/man4/pci.4
+54-22 files

HardenedBSD/src 114f4a6share/man/man4 pci.4, sys/dev/pci pci.c

pci: Optionally disable endpoints with unsafe MPS

Keep warn-only behavior as the default. Add an opt-in policy that
clears endpoint decoding and bus mastering when a newly discovered
function cannot match its active path, while never disabling bridge
functions and their subtrees.

MFC after:      2 weeks
DeltaFile
+41-2sys/dev/pci/pci.c
+13-0share/man/man4/pci.4
+54-22 files

FreeBSD/src 673cb52share/man/man4 pci.4, sys/dev/pci pci.c

pci: Add a hierarchy-wide MPS limit

Add a boot-time ceiling for MPS reconciliation. Apply it only while an
entire cold-enumerated link can be configured consistently, and leave
an established active path unchanged.

MFC after:      2 weeks
DeltaFile
+44-7sys/dev/pci/pci.c
+15-0share/man/man4/pci.4
+59-72 files

HardenedBSD/src 673cb52share/man/man4 pci.4, sys/dev/pci pci.c

pci: Add a hierarchy-wide MPS limit

Add a boot-time ceiling for MPS reconciliation. Apply it only while an
entire cold-enumerated link can be configured consistently, and leave
an established active path unchanged.

MFC after:      2 weeks
DeltaFile
+44-7sys/dev/pci/pci.c
+15-0share/man/man4/pci.4
+59-72 files

LLVM/project b020e06clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

rebase

Created using spr 1.3.7
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project e65e45bclang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
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+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project d2ace49clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

rebase

Created using spr 1.3.7
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project b71d97aclang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project 7762e71clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

rebase

Created using spr 1.3.7
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project fb41d36clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project 0ca6142clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

rebase

Created using spr 1.3.7
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project 6ba9d2cclang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Format Format.h

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+8,221-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+2,087-1,967llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+445-403llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+404-404clang/include/clang/Format/Format.h
+743-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/pow_mat.ll
+11,900-10,817473 files not shown
+33,141-18,287479 files

LLVM/project 0b5cc57llvm/include/llvm/Target TargetMachine.h

[Target] Add shouldDefaultToNewPM flag

This will allow for tools like clang/flang/llc to default to the NewPM
for targets that request it.

Future patches will update clang/llc and flip it for targets that have
been fully ported but shouldn't have a large blast radius (like Lanai
and MSP430).

Pursuant to
https://discourse.llvm.org/t/rfc-incrementally-enabling-the-newpm-for-codegen/91410/11.

Reviewers: arsenm, vikramRH, aengelke

Pull Request: https://github.com/llvm/llvm-project/pull/214570
DeltaFile
+4-0llvm/include/llvm/Target/TargetMachine.h
+4-01 files

LLVM/project fa4bd25llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/RISCV tail-folding-complex-mask.ll

[VPlan] Append recipes created via builder to worklist

The previous PR appended the top most created recipe to the worklist, and this PR extends it to any other nested recipes that were created, similar to InstCombine.

This removes the header mask in a good few more places on RISC-V as measured on SPEC CPU 2017, e.g. for the following loop:

```c
long f(const int *p, const int *q, long n) {
  long a = 0, b = 0;
  for (long i = 0;; i++) {
    if (p[i] && q[i]) { a += i; b += i; }
    if (i + 1 == n) break;
  }
  return a + b;
}
```

Before:


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DeltaFile
+24-7llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+11-4llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+2-3llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+37-143 files

LLVM/project dd95c05llvm/test/Transforms/LoopVectorize/RISCV tail-folding-complex-mask.ll

Precommit test
DeltaFile
+163-0llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+163-01 files

LLVM/project f5f9e87llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize blend-i1.ll

[VPlan] Process simplifyRecipes in a worklist

This brings simplifyRecipes further in line with InstCombine, and asides from unlocking more simplifications it also helps avoid spurious test churn whenever passes are moved around simplifyRecipes.

For now just push the new recipe onto the worklist, not its users.
This uses a post order traversal so we maintain the same simplification order as before.

I've gone through and checked every simplification we do is a canonicalisation that converges, and I checked on llvm-test-suite + SPEC CPU 2017 in various configurations that we don't hit any cycles.
DeltaFile
+23-14llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-2llvm/test/Transforms/LoopVectorize/blend-i1.ll
+24-162 files

LLVM/project a6b2f97llvm/test/Transforms/LoopVectorize blend-i1.ll

Precommit test
DeltaFile
+58-0llvm/test/Transforms/LoopVectorize/blend-i1.ll
+58-01 files

LLVM/project 5c3123allvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/VPlan constant-fold.ll

[VPlan] Make simplifyRecipe more like InstCombine

Most combines in simplifyRecipe RAUW a value, but not all of them erase the old recipe.
Unify them and bring it in line with InstCombine by having it return a VPValue, which simplifyRecipes can then call RAUW with, and automatically erase the old recipe.

Similarly to InstCombine, combines that modify a recipe should return the same recipe.
DeltaFile
+116-153llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+6-9llvm/test/Transforms/LoopVectorize/X86/funclet.ll
+0-11llvm/test/Transforms/LoopVectorize/VPlan/constant-fold.ll
+122-1733 files

LLVM/project e723bdfllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Update trunc combine, fix m_Not return position
DeltaFile
+4-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-41 files

LLVM/project 424588cllvm/test/CodeGen/AArch64 sitofp-to-tbl.ll zext-to-tbl.ll, llvm/test/CodeGen/RISCV constantpool-sizes.ll

[AsmPrinter] Emit type and size for Constant Pool Entries (#214387)
DeltaFile
+41-23llvm/test/CodeGen/AArch64/constant-pool-partition.ll
+52-12llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle-tbl.ll
+35-19llvm/test/CodeGen/X86/constant-pool-partition.ll
+45-5llvm/test/CodeGen/AArch64/zext-to-tbl.ll
+30-0llvm/test/CodeGen/RISCV/constantpool-sizes.ll
+18-2llvm/test/CodeGen/AArch64/sitofp-to-tbl.ll
+221-615 files not shown
+259-7711 files