LLVM/project f813633llvm/lib/Target/Sparc SparcInstrAliases.td SparcInstrInfo.td, llvm/lib/Target/Sparc/AsmParser SparcAsmParser.cpp

[SPARC][IAS] Implement Solaris Natural Instruction extension (#170794)

We match GCC's coverage of the extension, that is, everything except
`setn` and `setnhi`.
See also: https://docs.oracle.com/cd/E53394_01/html/E54833/gmael.html
DeltaFile
+94-14llvm/lib/Target/Sparc/SparcInstrAliases.td
+57-0llvm/test/MC/Sparc/sparc-natural-instructions.s
+5-1llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+3-2llvm/lib/Target/Sparc/SparcInstrInfo.td
+159-174 files

LLVM/project df2c0a7llvm/utils git-llvm-push

[llvm][utils] Make GitHubAPI methods pass around PR number (#174860)

This avoids repeatedly reparsing the URL to extract the number.
DeltaFile
+16-30llvm/utils/git-llvm-push
+16-301 files

LLVM/project 7873abbmlir/include/mlir/Bindings/Python IRCore.h, mlir/lib/Bindings/Python DialectSparseTensor.cpp Rewrite.cpp

[MLIR][Python][NFC] Use enum class instead of enum (#174792)

This PR replace `enum`s with `enum class`es in Python bindings. No
functional change.
DeltaFile
+18-20mlir/lib/Bindings/Python/DialectSparseTensor.cpp
+14-19mlir/lib/Bindings/Python/Rewrite.cpp
+13-12mlir/include/mlir/Bindings/Python/IRCore.h
+10-11mlir/lib/Bindings/Python/IRCore.cpp
+6-6mlir/lib/Bindings/Python/Pass.cpp
+61-685 files

LLVM/project b3564b2llvm/test/CodeGen/PowerPC optimize-vector-not-equal.ll

[NFC][PowerPC] fix IR to be splat and not zeroinitializer (#174699)

IR should be a splat of 7 as this compares vector of elements with 7
(`vec[i]!=7`). Having `zeroinitializer` goes against this comparison.

Co-authored-by: himadhith <himadhith.v at ibm.com>
DeltaFile
+4-4llvm/test/CodeGen/PowerPC/optimize-vector-not-equal.ll
+4-41 files

NetBSD/pkgsrc-wip 0a4cfaerumdl distinfo Makefile

rumdl: update to 0.0.212
DeltaFile
+3-3rumdl/distinfo
+1-1rumdl/Makefile
+4-42 files

OpenBSD/ports Vz7XAsWdevel/jujutsu distinfo crates.inc, devel/jujutsu/patches patch-cli_src_commands_bisect_run_rs patch-modcargo-crates_rustix-1_1_2_build_rs

   Update to jujutsu v0.37.0

   https://github.com/jj-vcs/jj/releases/tag/v0.37.0
VersionDeltaFile
1.20+164-162devel/jujutsu/distinfo
1.21+81-80devel/jujutsu/crates.inc
1.3+1-1devel/jujutsu/patches/patch-cli_src_commands_bisect_run_rs
1.26+1-1devel/jujutsu/Makefile
1.11+1-0devel/jujutsu/pkg/PLIST
1.2+0-0devel/jujutsu/patches/patch-modcargo-crates_rustix-1_1_2_build_rs
+248-2446 files

FreeBSD/src e2bedc7tools/test/hwpmc pmctest.py

Extend the script to collect gprof data

While we're at it, switch to simple waiting from communicate() calls.
DeltaFile
+27-4tools/test/hwpmc/pmctest.py
+27-41 files

FreeNAS/freenas d4d3f4esrc/middlewared/middlewared/plugins sysdataset.py

Use statmount and listmount for sysdataset plugin

This commit adds some minor improvements to the system dataset
plugin to use optimized syscalls to get mount information.
DeltaFile
+29-21src/middlewared/middlewared/plugins/sysdataset.py
+29-211 files

LLVM/project b7fcf33clang/test/Driver fpartition-static-data-sections.c, llvm/include/llvm/Transforms/Instrumentation MemProfUse.h

[StaticDataLayout][MemProf]Introduce an LLVM option to specify one of read-only vs read-write
DeltaFile
+41-7llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
+10-6llvm/test/Transforms/PGOProfile/data-access-profile.ll
+3-1llvm/include/llvm/Transforms/Instrumentation/MemProfUse.h
+1-1llvm/lib/Passes/PassRegistry.def
+1-1llvm/lib/Passes/PassBuilderPipelines.cpp
+1-1clang/test/Driver/fpartition-static-data-sections.c
+57-171 files not shown
+58-187 files

LLVM/project 013c04autils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel] Make CAPIIR depend on TransformsPassIncGen (#174902)

CAPIIR includes this in some of its source files, so we need to ensure
the header is around.
DeltaFile
+1-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+1-01 files

LLVM/project de3e9b0llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv vsplats-zfa.ll

[RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (#173808)

We use fli+fneg to generate negative float, eliminate the fneg for fma.
Fold fma to vfnmsac.vf,vfnmsub.vf, vfnmacc.vf, vfnmadd.vf

---------

Co-authored-by: Craig Topper <craig.topper at sifive.com>
DeltaFile
+46-0llvm/test/CodeGen/RISCV/rvv/vsplats-zfa.ll
+17-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+63-12 files

LLVM/project 9519d52llvm/lib/Target/SPIRV SPIRVEmitIntrinsics.cpp SPIRVInstructionSelector.cpp, llvm/test/CodeGen/SPIRV/instructions nested-composites.ll

[SPIRV] Handle aggregate arguments to `spv_store` (#172348)

This patch handles the special case where an extract value yields an
aggregate result, which then is used as an argument to a store. The
SPIRV BE uses special intrinsics (`spv_extractv` and `spv_store`) to
represent these through IRTranslator, however this creates a problem:
`spv_store` is called as a function, and IRTranslator cannot handle
arguments that take more than a vreg. For other functions, the aggregate
argument replacement pass would have solved things, but it does not
apply here. Hence, we apply the same mutate-into-Int32 solution here
when dealing with stores, and restore the extract value's type (which we
have available as a ValueAttr) during instruction selection.
DeltaFile
+30-0llvm/test/CodeGen/SPIRV/instructions/nested-composites.ll
+13-0llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+11-0llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+54-03 files

NetBSD/src kplD8mBusr.bin/gzip gzip.c gzip.1

   gzip: finally support --ascii and --license for GNU compat.
VersionDeltaFile
1.129+34-10usr.bin/gzip/gzip.c
1.33+13-8usr.bin/gzip/gzip.1
+47-182 files

NetBSD/src Kaaulnfusr.bin/gzip gzip.c

   avoid small reads when there's a preferred IO size.

   a discussion on port-sparc here:
      https://mail-index.netbsd.org/port-sparc/2025/12/29/msg003063.html
   showed that the "file type" 4-byte read was failing on tape devices
   as they need a specific IO size to work.

   since we already pass this 4 bytes to the real decompressor, avoid this
   problem by checking if there's a st_blksize value from stat(2) and use
   a buffer of that size for the first read.

   rename handle_stdin() to handle_fd_decomp() and use the same backend
   for stdin as well as readable non-file files (device, fifo, socket).

   tested by Nobuyoshi SATO on port-sparc, atf, and a few other manual
   things.
VersionDeltaFile
1.128+57-33usr.bin/gzip/gzip.c
+57-331 files

NetBSD/pkgsrc hfOWAM7doc CHANGES-pkgsrc-2025Q4

   doc: update for ticket 7041
VersionDeltaFile
1.1.2.5+4-1doc/CHANGES-pkgsrc-2025Q4
+4-11 files

NetBSD/pkgsrc Cnd83Butextproc/libxslt Makefile distinfo, textproc/libxslt/patches patch-CVE-2025-11731 patch-CVE-2025-11731

   Pullup ticket #7041 - requested by nia
   textproc/libxslt: Security fix

   Revisions pulled up:
   - textproc/libxslt/Makefile                                     1.145
   - textproc/libxslt/distinfo                                     1.76
   - textproc/libxslt/patches/patch-CVE-2025-11731                 1.1

   ---
      Module Name:      pkgsrc
      Committed By:     nia
      Date:             Tue Jan  6 10:21:13 UTC 2026

      Modified Files:
        pkgsrc/textproc/libxslt: Makefile distinfo
      Added Files:
        pkgsrc/textproc/libxslt/patches: patch-CVE-2025-11731

      Log Message:

    [3 lines not shown]
VersionDeltaFile
1.1.2.2+27-0textproc/libxslt/patches/patch-CVE-2025-11731
1.1.2.1+0-27textproc/libxslt/patches/patch-CVE-2025-11731
1.144.6.1+2-2textproc/libxslt/Makefile
1.75.6.1+2-1textproc/libxslt/distinfo
+31-304 files

LLVM/project 8da7c05llvm/lib/Target/WebAssembly WebAssemblyTargetTransformInfo.cpp WebAssemblyTargetTransformInfo.h, llvm/test/Transforms/InstCombine/WebAssembly fold-swizzle.ll

[WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (#169110)

Resolves #169058.

This adds ~~an InstCombine pass~~ a TTI hook to the WebAssembly backend
that folds `i8x16.swizzle` and `i8x16.relaxed.swizzle` operations to
`shufflevector` operations if their mask operands are constant.

This is mainly useful for abstractions over the raw intrinsics--for
instance, in architecture-generic SIMD code that may not be able to
expose the constant shuffles due to type system limitations.

I took most of this from the x86 backend (in particular,
`simplifyX86vpermilvar` in `X86InstCombineIntrinsic`), and adapted it
for the WebAssembly backend. There wasn't any previous
`instCombineIntrinsic` method on the WebAssembly `TargetTransformInfo`,
so I added it. Right now, this swizzle optimization is the only one it
performs.


    [16 lines not shown]
DeltaFile
+113-0llvm/test/Transforms/InstCombine/WebAssembly/fold-swizzle.ll
+87-0llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
+3-0llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
+203-03 files

LLVM/project ec51fd2mlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector invalid.mlir

[mlir][vector] Emit error when `kind` attribute is not a CombiningKind (#173659)

This PR fixes a crash by validating the type of the `kind` attribute.
For `vector.contract` and `vector.outerproduct`, the verifier now emits
an error when `kind` is not a CombiningKindAttr. Fixes #173555.
DeltaFile
+29-0mlir/test/Dialect/Vector/invalid.mlir
+10-0mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+39-02 files

LLVM/project c194ccfllvm/lib/Target/RISCV RISCVAsmPrinter.cpp, llvm/lib/Target/RISCV/MCTargetDesc RISCVMCTargetDesc.cpp

[RISC-V] Ensure MCTargetStreamer is initialized. (#174800)

Fixes a failure on llc for ubsan builds:

../lib/Target/RISCV/RISCVAsmPrinter.cpp:552:7: runtime error: downcast
of null pointer of type 'RISCVTargetStreamer'
SUMMARY: UndefinedBehaviorSanitizer: undefined-behavior
../lib/Target/RISCV/RISCVAsmPrinter.cpp:552:7
DeltaFile
+1-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp
+2-0llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+3-12 files

FreeBSD/src 9b5d6absys/dev/sdhci sdhci_pci.c

sdhci_pci(4): Remove incorrect __unused

The slot parameter actually is used as index into the memory resource.

Fixes:  c11bbc7d
DeltaFile
+13-13sys/dev/sdhci/sdhci_pci.c
+13-131 files

FreeBSD/src 61002e0sys/kern tty.c

tty(4): Consistently use ISO C99 bool

Fixes:  9750d9e5
DeltaFile
+1-1sys/kern/tty.c
+1-11 files

FreeBSD/ports 3ccc350devel/microsoft-gsl distinfo Makefile

devel/microsoft-gsl: update: 4.2.0 -> 4.2.1

ChangeLog:      https://github.com/microsoft/GSL/compare/v4.2.0...v4.2.1
PR:             291618
Approved by:    Henry Hu (mostly + maintainer timeout)

Sponsored by:   tipi.work
DeltaFile
+3-3devel/microsoft-gsl/distinfo
+1-1devel/microsoft-gsl/Makefile
+4-42 files

NetBSD/src iQbu3gOsys/compat/netbsd32 netbsd32_ioctl.c

   revert previous -- was fixed by removing __packed entirely.
VersionDeltaFile
1.124+5-4sys/compat/netbsd32/netbsd32_ioctl.c
+5-41 files

LLVM/project 92480a5llvm/lib/Transforms/Utils LoopUtils.cpp, llvm/test/Transforms/LoopVectorize branch-weights.ll

[profcheck] Fix encoding of 0 loopEstimatedTrip count
DeltaFile
+5-5llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
+4-1llvm/lib/Transforms/Utils/LoopUtils.cpp
+2-2llvm/test/Transforms/LoopVectorize/branch-weights.ll
+1-1llvm/unittests/Transforms/Utils/LoopUtilsTest.cpp
+12-94 files

LLVM/project 84cc153flang/include/flang/Optimizer/Dialect FIROps.td, flang/test/Transforms licm.fir

[flang] Make fir.result Pure operation. (#173508)

This allows speculating recursively speculatable operations
containing `fir.result`. Note that making it Pure does not allow
speculating `fir.result` itself from its containing operation,
since it is a terminator.
DeltaFile
+85-0flang/test/Transforms/licm.fir
+3-3flang/include/flang/Optimizer/Dialect/FIROps.td
+88-32 files

LLVM/project 777017ellvm/test/CodeGen/NVPTX tcgen05-mma-block-scale-ptx88.ll tcgen05-mma-block-scale-ptx88-aa.ll

[LLVM][NVPTX] Enable family specific support for a few intrinsics (#173268)

This commit adds support for family specific support for the following
intrinsics:
- ldmatrix
- stmatrix
- mma.block_scale, mma.sp.block_scale
- redux.sync
- cvt.rs
- clusterlaunchcontrol
- setmaxnreg
- tcgen05.mma

Removed `hasTcgen05Instructions` function in the favour of `hasTcgen05InstSupport` Updated wmma.py script with family specific support and added new tests
DeltaFile
+59-293llvm/test/CodeGen/NVPTX/tcgen05-mma-block-scale-ptx88.ll
+246-0llvm/test/CodeGen/NVPTX/tcgen05-mma-block-scale-ptx88-aa.ll
+219-0llvm/test/CodeGen/NVPTX/tcgen05-mma-disable-output-lane-i8.ll
+4-212llvm/test/CodeGen/NVPTX/tcgen05-mma-disable-output-lane.ll
+168-0llvm/test/CodeGen/NVPTX/tcgen05-mma-ws-i8.ll
+166-0llvm/test/CodeGen/NVPTX/tcgen05-mma-i8.ll
+862-50519 files not shown
+1,105-84025 files

HardenedBSD/src 7991435sys/compat/linuxkpi/common/include/linux kmsg_dump.h font.h, sys/compat/linuxkpi/common/include/media cec.h cec-notifier.h

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+147-35sys/net/iflib.c
+51-0sys/compat/linuxkpi/common/include/linux/kmsg_dump.h
+33-0sys/compat/linuxkpi/common/include/linux/font.h
+23-0sys/compat/linuxkpi/common/include/media/cec.h
+20-0sys/compat/linuxkpi/common/include/linux/spinlock.h
+17-0sys/compat/linuxkpi/common/include/media/cec-notifier.h
+291-357 files not shown
+332-3913 files

FreeNAS/freenas ba3d694src/middlewared/middlewared/plugins filesystem.py, src/middlewared/middlewared/utils/filesystem stat_x.py utils.py

NAS-139212 / 26.04 / use statx provided by truenas_pyos (#17972)

This commit removes the ctypes definition for statx and replaces with
the implemntatoin from truenas_pyos (cpython).
DeltaFile
+7-121src/middlewared/middlewared/utils/filesystem/stat_x.py
+0-103tests/unit/test_statx.py
+0-18src/middlewared/middlewared/utils/filesystem/utils.py
+4-13src/middlewared/middlewared/utils/filesystem/copy.py
+5-6src/middlewared/middlewared/plugins/filesystem.py
+4-3src/middlewared/middlewared/utils/filesystem/directory.py
+20-2643 files not shown
+20-2679 files

HardenedBSD/src 27dd91fsys/compat/linuxkpi/common/include/linux kmsg_dump.h font.h, sys/compat/linuxkpi/common/include/media cec.h cec-notifier.h

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+147-35sys/net/iflib.c
+51-0sys/compat/linuxkpi/common/include/linux/kmsg_dump.h
+33-0sys/compat/linuxkpi/common/include/linux/font.h
+23-0sys/compat/linuxkpi/common/include/media/cec.h
+20-0sys/compat/linuxkpi/common/include/linux/spinlock.h
+17-0sys/compat/linuxkpi/common/include/media/cec-notifier.h
+291-357 files not shown
+332-3913 files

FreeBSD/ports 563c23bgames/openbor distinfo Makefile

games/openbor: update to 7760

Changes:        https://github.com/DCurrent/openbor/compare/52921e77...7569231a
DeltaFile
+3-3games/openbor/distinfo
+2-2games/openbor/Makefile
+5-52 files