[AArch64][SME] Vastly simplify and fix `sme-framelower-use-bp.ll` (NFC) (#172999)
This test was added in:
https://github.com/llvm/llvm-project/commit/d4c86e7f3ea298b259e673142470a7b838f5f302
However, over time this test has stopped testing that change. That
change ensures that LLVM sets up the base-pointer in functions with only
+sme (no sve) and dynamic allocas + SVE stack objects.
The original test did not intend to have dynamic allocas or SVE stack
objects though. They were introduced by the IR-based SME ABI pass
unintentionally pushing allocas outside the entry block and SVE spills.
Both of these have been resolved, so this test was not testing the
original change. This patch simplifies the test, and corrects it so
tests the intended functionality.
[MCA][AArch64] Model single-register EXTR as ROR on Neoverse N2 (#172831)
As per the SWOG for [Neoverse
N2](https://developer.arm.com/documentation/109914/latest/), the latency
of a one register bitfield extract should be 1 and the throughput should
be 4. This patch models the single register EXTR (alias ROR) for the
Neoverse N2 model.
[MCA] Fix -mcpu=help flag (#173399)
Previously, using the `-mcpu=help` flag would require an empty stdin to
be passed to print the CPU/Features
list.
- Moves the `MemoryBuffer::getFileOrSTDIN` call below an early return.
- Adds a test mcpu-help.test is included which tests the flag with a
missing file. Previously, this would have resulted in an error with no
outputted help list, but now provides the help list and ignores the
missing file input.
[LLVM][CMake][NFC] Use generator expression to separate CXXFLAGS (#173869)
This avoids looking at the individual sources for mixed C/C++ libraries.
The previous code was written ~2014. Generator expressions were added in
CMake 3.3 (2015). We currently require CMake 3.20 and therefore can rely
on more modern features.
Apart from simplifying the code, this is preliminary work to make more
use of pre-compiled headers (#173868).
py-borgbackup: updated to 1.4.3
Version 1.4.3 (2025-12-02)
For upgrade and compatibility hints, please also read the “Upgrade Notes” section above.
New features:
None.
Fixes:
compact: replace AssertionError with a warning,
compact: also fix segment hints data for lost segment files.
CI: FUSE-related fixes and improvements,
The Linux and FreeBSD binaries built on GitHub now include working FUSE support (based on llfuse).
[26 lines not shown]
[mlir][ods] Fix ODS bug for usePropertiesForAttributes = 0 (#173006)
This fixes invalid cpp generated in the `verifyInvariantsImpl` method
for operations generated from ODS when `usePropertiesForAttributes = 0`
is set on the Dialect.
Fixes the bug introduced in
- https://github.com/llvm/llvm-project/pull/153603
Closes #171217
Reland "[mlir][tensor] Add ValueBoundsOpInterface for ExpandShapeOp and CollapseShapeOp #173356" (#173857)
The original PR #173356 was reverted (commit 5d6c40b) due to an
AddressSanitizer failure
(https://lab.llvm.org/buildbot/#/builders/52/builds/13831).
The failure was caused by incorrect use of a const reference
https://github.com/llvm/llvm-project/pull/173356#discussion_r2643027667,
which bound a reference to a temporary value returned by
`getReassociationIndices()`.
This reland drops the const reference and uses a copy instead.
Signed-off-by: Yu-Zhewen <zhewenyu at amd.com>
[mlir][docs] Add more examples for the "canonical form" (#173667)
Mention that there is no formal definition of the canonical form. Also
add more examples for users to understand what kind of transformations
the community has agreed upon in the past.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
[mlir][Transforms][NFC] `remove-dead-values`: Simplify dropped value handling (#173540)
`RDVFinalCleanupList::values` is used only for function op handling. The
functionality for dropping function arg uses can be incorporated into
Step 5 (function op handling). There is no need for a separate step.
[Clang] Remove 't' from __builtin_amdgcn_flat_atomic_fmin/fmax_f64 (#173839)
Allows for type checking depending on the built-in signature.
There is no `f32` version for both builtins
