[LoongArch][NFC] Move XOR combine into performXORCombine (#242151)
Extract the inline ISD::XOR handling in PerformDAGCombine into a
dedicated performXORCombine helper, matching how the other opcodes (AND,
OR, SETCC, ...) are structured. No functional change.
Also fix a clang-format issue in emitPseudoVMSKCOND.
Assisted-By: LLM
[clang][CIR] Add tests for SVE RINTI intrinsics (#240757)
adds CIR tests for svrinti (plain SVE) intrinsics.
Moves and adapts `sve-intrinsics/acle_sve_rinti.c` to `sve/rinti.c`
Part of #223963
[clang][CIR] Add tests for SVE RINTX intrinsics (#241369)
adds CIR tests for svrintx (plain SVE) intrinsics.
Move sve-intrinsics/acle_sve_rintx.c to sve/rintx.c and add
CIR checks for all f16/f32/f64 variants with _z/_m/_x predication.
Part of #223963.
Co-authored-by: Ente Wang <ente.wang at h-partners.com>
[ConstantRange] Handle llvm.{sshl,ushl}.sat (#242178)
Wire up ConstantRange::intrinsic() to sshl_sat and ushl_sat, restricting
their shift range to [0, BitWidth).
Alive2: https://alive2.llvm.org/ce/z/9WSZqW
[flang] Check the kind of subscript, bound, extent, and length expressions (#239633)
Expr<SubscriptInteger> no longer encodes the kind in its type, so
nothing guarantees anymore that subscripts, triplets, substring bounds,
cosubscripts, array bounds, extents, and character lengths have kind
SubscriptIntegerKind. Add IsSubscriptIntegerKind() helpers and CHECK the
kind where such expressions are stored, so that a missing conversion is
caught in the front end instead of surfacing later in lowering.
[MLIR][NVVM] Add support for scaled n1 ue8m0 and ue5m3 packed Convert Ops (#239189)
This patch adds support for `scaled::n1::ue8m0` to existing
`f32/f16x2/bf16x2`
to `FP8` (`e4m3x2`, `e5m2x2`), `FP6` (`e2m3x2`, `e3m2x2`) and
`FP4` (`e2m1x2`) convert Ops.
This also adds support for `ue5m3x2` to `f16x2/bf16x2` and
`ff/f16/bf16` to `ue5m3` in existing convert Ops.
Lit tests are added to verify the lowering to the intrinsics.
Negative tests are also added to check the error-handling of invalid
combinations.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
firmware: business now uses 26.10.0p1 for patch releases
Because 26.10p1 is bigger than 26.10.1 we need to add a .0 to the
releases even though we tried to avoid it for a decade. Initial
releaes are still without .0 which makes 26.10 equal 26.10.0 but
the lookup code doesn't know that.
Since we also don't use 26.07 we can split at .0 no problem.
[Transforms] Remove AssumeSimplify pass (#241939)
This removes the AssumeSimplify pass, which is part of the
KnowledgeRetention framework and not enabled by default.
Our general direction has been to instead simplify assumes directly as
part of other passes like InstCombine instead, and we generally don't
plan to further pursue the KnowledgeRetention framework in its current
form, so this deletes the pass.
If we wanted to have a dedicated assume simplification pass, we would
reimplement it from scratch without using KnowledgeRetention APIs
anyway.
net/geoclue: Update 2.8.1 to 2.8.2
- Translations for Georgian and Occitan.
- Building translations now works.
- Fix double free in on_desktop_id_set() and on_client_proxy_ready().
- Fix some gobject-linter rules in the correctness category.
- Document the command to register network NMEA sources to avahi.
Changelog: https://gitlab.freedesktop.org/geoclue/geoclue/-/blob/2.8.2/NEWS
Approved by: jrm (mentor), desktop (arrowd)
Differential Revision: https://reviews.freebsd.org/D61474
dbus: comment out Solaris-only flag
not supported on Illumos, says meson; I don't know how to check for
that in particular, but we have Illumos bulk builds and none for Solaris,
so let's fix these.
X86: Reuse the last subtarget for functions with same attributes
Add a utility for caching subtarget lookups. This returns the last
subtarget without building the subtarget key if the function has the
same attributes or same subtarget-relevant attributes as the last
query. RISCV and AArch64 already do something similar, and this
utility should be adopted across the targets (customized to the
relevant attributes). Also find the subtarget attributes in one
scan.
CTMark instructions executed, geomean: O3 -0.26%, ThinLTO -0.26%.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[APFloat] Support user defined bit conversions (#240920)
[APFloat] Support user provided conversion to/from bits
This change allows users to provide custom functions to convert to/from
bits.
- fltSemantics has function pointers for conversion and user provided
values of it are supported
- built-in semantics also use these instead of chained if, making the
code less repetitive and slightly faster
- APFloat/IEEFloat internals like types and ranges of significand,
mantissa etc. can only be accessed using FloatRepr interface so only
user defined bitcast functions will be affected by changes
Resubmitted #233961 with fixes for GCC 7
[LoongArch] Legalize BUILD_VECTOR into a broadcast when all non-undef elements are identical
When a BUILD_VECTOR consists of the same element (ignoring undefs),
it is better emitting a broadcast instead of multiple insertions.
Some floating-point cases suffer performance regressions, those
specific cases are excluded in this commit. Including when:
- only one element is non-undef,
- only two elements are non-undef, and one of them must at index 0,
- for v8f32 vector type, specially exclude the cases when the only
two non-undefs are at index (1,2)/(1,3)/(2,3).
amd64/vmm: Don't advertise AMD PerfMonV2 or performance counters
vmm does not handle CPUID leaf 0x80000022, so a FreeBSD guest on a
Family 19h or later host panics on "kldload hwpmc", which trusts the
PerfMonV2 bit and writes AMD_PMC_GLOBAL_CTL.
Tested by: Osvaldo Janeri Filho <ojanerif at amd.com>
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Reviewed by: markj, kib
Differential Revision: https://reviews.freebsd.org/D61141
(cherry picked from commit 8fb539b081dbfe3e93e607a5d4d36184c53c8aaf)
amd64/vmm: Don't advertise AMD PerfMonV2 or performance counters
vmm does not handle CPUID leaf 0x80000022, so a FreeBSD guest on a
Family 19h or later host panics on "kldload hwpmc", which trusts the
PerfMonV2 bit and writes AMD_PMC_GLOBAL_CTL.
Tested by: Osvaldo Janeri Filho <ojanerif at amd.com>
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Reviewed by: markj, kib
Differential Revision: https://reviews.freebsd.org/D61141
(cherry picked from commit 8fb539b081dbfe3e93e607a5d4d36184c53c8aaf)
netlink: Pre-register the missing devctl event systems
devctl_notify() can be called with a mutex held. If the event system is
not listed in devctl_systems[], sysevent_get_group() calls
sysevent_new_group(), which calls strdup() with M_WAITOK, and we may end
up sleeping while holding a non-sleepable mutex.
Add the missing systems.
While here, remove the nonexistent KERNEL system.
PR: 299272
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D61161
(cherry picked from commit 66d078c17294ca2ea225e4926a8cd9697dda57ed)
[libc][math][NFC] Fix GCC diagnostics in math tests (#241530)
Building the math test suite with GCC surfaces conversion, narrowing,
uninitialised-variable, and non-exhaustive return warnings, along with
-Wattributes visibility warnings under -fvisibility-inlines-hidden when
passing LIBC_ALWAYS_INLINE static_rounding functions as template
arguments.
Initialise tracking locals across range and shared tests, suffix float
and float16 test literals with exact f and f16 hexadecimal forms, cast
FModTest inputs with fputil::cast<T>, and wrap static_rounding helpers
in static functions for exhaustive expf and exp2f tests. Guard the
64-bit long exponent checks in LdExpTest with if constexpr and mark the
MPCUtils RoundingMode switch unreachable after covering all enumerators.
Assisted-by: Automated tooling, human reviewed.
---------
Co-authored-by: Tue Ly <lntue.h at gmail.com>
