Makefile.inc1: Force NO_ROOT for distribute* and package*
These targets are used to produce legacy dist sets for install media and
now always use NO_ROOT mode. Extend existing logic that forces NO_ROOT
mode to these cases to ensure they do not run in the wrong mode.
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D50551
(cherry picked from commit 300aa267efaa08564337797e89590737a7cc6af0)
Fix ddtprune causing space leak
In zio_ddt_free, if a pruned dde is still in ddt, it would do nothing
and cause space leak.
Reviewed-by: Rob Norris <robn at despairlabs.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Reviewed-by: Allan Jude <allan at klarasystems.com>
Signed-off-by: Chunwei Chen <david.chen at nutanix.com>
Closes #17982
Closes #17983
[sanitizer_common][test-only] Specify full path for sort executable in popen.cpp (#171622)
This test has begun failing on iossim with 'sh: sort: command not found'
in the stderr. I believe this may be due to the change to the lit
internal shell not having 'sort' in it's path.
This patch adds the full path /usr/bin/sort to work around this.
[lldb] Make TestJitBreakPoint.py use LLVM_TOOLS_DIR (#171656)
This seems the standard way to get the path to such tools within LLVM.
Calling findBuiltClang() has some annoying behavior like falling back to
CC when it cannot find anything else, which might point to anything or
not even be set.
We noticed this with our internal build system as the lli binary is not
in the same path as the clang binary.
[BOLT][AArch64] Always cover veneers in lite mode (#171534)
If a veneer is not disassembled in lite mode, the veneer elimination
pass will not recognize it as such and the call to such veneer will
remain unchanged.
Later, we may need to insert a new veneer for such code ending up with a
double veneer.
To avoid such suboptimal code generation, always disassemble veneers and
guarantee that they are converted to direct calls in BOLT.
[mlir][xegpu] Add support for `vector.extract_strided_slice` XeGPU SIMT distribution with partial offsets. (#171512)
`vector.extract_strided_slice` can have two forms when specifying
offsets.
Case 1:
```
%1 = vector.extract_strided_slice %0 { offsets = [8, 0], sizes = [8, 16], strides = [1, 1]}
: vector<24x16xf32> to vector<8x16xf32>
```
Case 2:
```
%1 = vector.extract_strided_slice %0 { offsets = [8], sizes = [8], strides = [1]}
: vector<24x16xf32> to vector<8x16xf32>
```
These two ops means the same thing, but case 2 is syntactic sugar to
avoid specifying offsets for fully extracted dims. Currently case 2
fails in XeGPU SIMT distribution. This PR fixes this issue.
[lldb] Stop emitting pointless newline (NFC) (#171531)
AppendError ends up trimming this "\n" from the end of the string, then
putting another on on. So there's no reason to keep appending the
newline in CommandObjectMultiword::Execute.
Ensure 64-bit `off_t` is used in user space instead of `loff_t`
Use 64-bit POSIX off_t in user space instead of the Linux kernel type
loff_t. This is enforced at configure time via AC_SYS_LARGEFILE and
AC_CHECK_SIZEOF([off_t]). loff_t remains in shared headers where they
mirror Linux VFS interfaces, and on FreeBSD we typedef loff_t to off_t
in those headers since libc does not provide it.
Reviewed-by: Rob Norris <robn at despairlabs.com>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Alexander Moch <mail at alexmoch.com>
Closes #18020
[libc++][Github] Bump Runner Version to v2.330.0 (#168753)
Bumps the runner version to keep things up to date (and prevent us from
falling below the support horizon).
[NFC][TTI] Introduce getInstructionUniformity API for uniformity analysis (#168903)
This patch introduces a new TargetTransformInfo hook
`getInstructionUniformity()`
that provides a unified interface for querying target-specific
uniformity
information about instructions and values.
The new hook returns an `InstructionUniformity` enum with three values:
- Default: Result is uniform if all operands are uniform (standard
propagation)
- AlwaysUniform: Result is always uniform regardless of operands
- NeverUniform: Result can never be assumed uniform
This API wraps the existing `isAlwaysUniform()` and
`isSourceOfDivergence()`
hooks, providing a single entry point for uniformity queries. Both LLVM
IR-level
(via TTI) and MIR-level (via TargetInstrInfo) uniformity analysis have
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irdma(4): fix potential memory leak on qhash cqp operation
It was found that in some circumstances when launching
non-waiting create qhash cqp operation the refcount on
the cqp_request may be not properly decremented leading to a memory
leak.
Signed-off-by: Bartosz Sobczak <bartosz.sobczak at intel.com>
Reviewed by: anzhu_netapp.com
Tested by: mateusz.moga_intel.com
Approved by: kbowling (mentor)
Sponsored by: Intel Corporation
Differential Revision: https://reviews.freebsd.org/D53732
(cherry picked from commit 7b6644e160ed63b633e7c68a3cacf2c71d216cd5)
[Flang][Pass]Disable memory intrinsics expansions
Patch disables memory intrinsics expansion, enabled by default in
https://github.com/llvm/llvm-project/pull/168622. This patch does the
same in clang, but not in flang.
The expansion causes massive perf regressions, up to 2x times in
fortran code.
Reviewers: jeanPerier, vzakhari
Reviewed By: vzakhari
Pull Request: https://github.com/llvm/llvm-project/pull/171650
[clang][ssaf] Introduce entity abstraction for SSAF (#169131)
Add core abstractions for identifying program entities across
compilation and link unit boundaries in the Scalable Static Analysis
Framework (SSAF).
Introduces three key components:
- BuildNamespace: Represents build artifacts (compilation units, link
units)
- EntityName: Globally unique entity identifiers across compilation
boundaries
- AST mapping: Functions to map Clang AST declarations to EntityNames
Entity identification uses Unified Symbol Resolution (USR) as the
underlying mechanism, with extensions for sub-entities (parameters,
return values) via suffixes. The abstraction allows whole-program
analysis by providing stable identifiers that persist across separately
compiled translation units.
[flang][OpenMP] Frontend support for DIMS modifier (#171454)
Add parsing and semantic checks for DIMS modifier on NUM_TEAMS,
NUM_THREADS, and THREAD_LIMIT.
[CIR][NFC] Rename AtomicFence to AtomicFenceOp (#171248)
This fixes missed suffix `Op` of `CIR_AtomicFence` defination and also
improves API `makeAtomicFenceValue`.
[LLVM][IR] Add support for address space names in DataLayout (#170559)
Add support for specifying the names of address spaces when specifying
pointer properties for an address space. Update LLVM's AsmPrinter and
LLParser to print and read these symbolic address space name.
irdma(4): fix potential memory leak on qhash cqp operation
It was found that in some circumstances when launching
non-waiting create qhash cqp operation the refcount on
the cqp_request may be not properly decremented leading to a memory
leak.
Signed-off-by: Bartosz Sobczak <bartosz.sobczak at intel.com>
Reviewed by: anzhu_netapp.com
Tested by: mateusz.moga_intel.com
Approved by: kbowling (mentor)
Sponsored by: Intel Corporation
Differential Revision: https://reviews.freebsd.org/D53732
(cherry picked from commit 7b6644e160ed63b633e7c68a3cacf2c71d216cd5)
ZTS: Add test for snapshot automount race
Add snapshot_019_pos to verify parallel snapshot automount operations
don't cause AVL tree panic. Regression test for commit 4ce030e025.
Reviewed-by: Tony Hutter <hutter2 at llnl.gov>
Reviewed-by: Brian Behlendorf <behlendorf1 at llnl.gov>
Signed-off-by: Ameer Hamza <ahamza at ixsystems.com>
Closes #18035
AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES
Move G_UNMERGE_VALUES handling to AMDGPURegBankLegalizeRules.cpp.
Fix sgpr S16 unmerge by lowering using shift and using S32.
Previously sgpr S16 unmerge was selected using _lo16 and _hi16 subreg
indexes which are exclusive to vgpr register classes.
For remaing cases we do trivial mapping, assigns same reg bank
to all operands, vgpr or sgpr.
[lldb] Log when we use fallback register information
These fallback layouts are essentially guesses. Used when there is
no other way to query register information from the debug server.
Therefore there is a risk that LLDB and the debug server disagree,
which can produce strange effects.
I have added a log message here so we have a clue when triaging
these problems.
Note that it's not wrong to assume a layout in some situations.
It's how some debug servers were built. However if you end up
using the fallback when the server expected you to use XML,
you're likely going to have a bad time.
