FreeBSD/src 1256447sys/kern kern_jail.c, sys/sys jail.h

jail: define well-known parameter names in sys/jail.h

Userland jail managers hardcode jail parameter name strings; nothing
in the headers has ever named them, even when sys/jail.h already
has JAIL_META_PRIVATE/JAIL_META_SHARED for the metadata pair.

Added JAIL_PARAM_* string constants for the static parameters registered
by the base kernel.

No functional change.

MFC After: 1 week

Reviewed by:    jamie, adrian
Differential Revision:  https://reviews.freebsd.org/D59572
DeltaFile
+101-87sys/kern/kern_jail.c
+93-0sys/sys/jail.h
+194-872 files

LLVM/project ffdc7dfllvm/lib/Transforms/Utils SimplifyLibCalls.cpp, llvm/test/Transforms/InstCombine memchr.ll memchr-3.ll

[SimplifyLibCalls] Explicitly annotate memchr selects (#222734)

SimplifyLibCalls creates a variety of selects when optimizing calls to
memchr. Explicitly annotate them as unknown as the conditions always
depend on a non-constant parameter to memchr with which we cannot infer
probability information without value profile data.
DeltaFile
+30-6llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
+9-4llvm/test/Transforms/InstCombine/memchr-6.ll
+0-11llvm/utils/profcheck-xfail.txt
+8-3llvm/test/Transforms/InstCombine/memchr.ll
+8-3llvm/test/Transforms/InstCombine/memchr-3.ll
+8-3llvm/test/Transforms/InstCombine/memchr-2.ll
+63-301 files not shown
+71-337 files

LLVM/project 26609f5llvm/lib/Transforms/Scalar SimpleLoopUnswitch.cpp, llvm/test/Transforms/SimpleLoopUnswitch pr219510.ll

[SimpleLoopUnswitch] Fix bug in partially invariant unswitching (#222118)

Partial invariant unswitching can potentially hoist a load from header
to the preheader of the loop. If a potentially no-return function call
exists in the loop header before the load instruction, the
transformation is still performed, but this is not correct.
DeltaFile
+34-0llvm/test/Transforms/SimpleLoopUnswitch/pr219510.ll
+11-5llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+45-52 files

LLVM/project b3599edllvm/lib/Target/RISCV RISCVISelLowering.h RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv vector-interleave-fixed.ll vector-interleave.ll

[RISCV] Special lowering for CONCAT_VECTORS + VECTOR_INTERLEAVE to avoid redundant slideup/down
DeltaFile
+36-147llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+6-86llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+74-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+3-0llvm/lib/Target/RISCV/RISCVISelLowering.h
+119-2334 files

LLVM/project 04fa9e6llvm/include/llvm/Frontend/OpenMP OMP.td

typo
DeltaFile
+2-2llvm/include/llvm/Frontend/OpenMP/OMP.td
+2-21 files

LLVM/project b686fb5clang/docs ReleaseNotes.md, clang/lib/Sema SemaExprCXX.cpp

[clang][Sema] Don't warn about non-virtual destructors on destroying delete (#222047)

A destroying `operator delete `takes over destruction, so the delete
expression never invokes the destructor and
[[expr.delete]p3](https://eel.is/c++draft/expr.delete#3) carves it out.
Skip `CheckVirtualDtorCall` when the selected deallocation function is
destroying. `::delete` and `delete[]` keep warning.

Fixes #65524
DeltaFile
+43-0clang/test/SemaCXX/delete-non-virtual-dtor.cpp
+10-4clang/lib/Sema/SemaExprCXX.cpp
+5-0clang/docs/ReleaseNotes.md
+58-43 files

LLVM/project 8c57adfflang/include/flang/Lower/OpenMP Clauses.h, flang/lib/Lower/OpenMP Clauses.cpp

[OpenMP] Add definitions for REDUCTION_KIND and SHIFT clauses

This is a barebones change to introduce the enum identifiers for these
clauses.
DeltaFile
+15-2llvm/include/llvm/Frontend/OpenMP/ClauseT.h
+4-0llvm/include/llvm/Frontend/OpenMP/OMP.td
+2-0flang/lib/Lower/OpenMP/Clauses.cpp
+2-0flang/include/flang/Lower/OpenMP/Clauses.h
+23-24 files

LLVM/project 2d57805utils/bazel/llvm-project-overlay/libc BUILD.bazel

Fix bazel build for libc:__support_wctype_utils (#222743)

Fixes https://github.com/llvm/llvm-project/pull/222154 (commit
e47d10f55719cb5bc7dac81d49277938813b5ee4) by adding missing dependency.
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

LLVM/project a4f04abllvm/utils/gn/secondary/llvm/tools/llc BUILD.gn

[gn build] Port c86292488b86 (#222741)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
+1-01 files

LLVM/project a241c37llvm/utils/gn/secondary/llvm/unittests/Frontend BUILD.gn

[gn build] Port 1e6f0cbabe1b (#222738)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/unittests/Frontend/BUILD.gn
+1-01 files

LLVM/project 93ab99fllvm/lib/Transforms/Scalar LoopIdiomRecognize.cpp, llvm/test/Transforms/LoopIdiom/X86 ctlz.ll

[LoopIdiom] Recognize the ctlz/cttz idiom when the input is known non-zero (#222373)

LoopIdiomRecognize converts a shift-until-zero loop to `ctlz`/`cttz`.
When the loop uses the count outside the loop, it needs a zero check of
the input before the loop. Without the check, the inputs 0 and 1 give
the same count. The recognizer stops when the check is not present.

The check is not necessary when the input is known non-zero. InstCombine
can remove the check for such inputs. Then the recognizer does not
convert the loop. This happens in `sbc_calc_scalefactors` from ffmpeg
with #222334: the input is an or reduction that starts at 32768, so it
is never zero, and the loop stays a loop.

This patch makes the recognizer accept a known non-zero input in place
of the zero check. The conversion is exact in this case.

`ctlz-loop.ll` in PhaseOrdering had a FIXME for a loop over `abs(n)`.
The recognizer now converts that loop too.


    [2 lines not shown]
DeltaFile
+38-0llvm/test/Transforms/LoopIdiom/X86/ctlz.ll
+5-11llvm/test/Transforms/PhaseOrdering/X86/ctlz-loop.ll
+5-6llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
+48-173 files

LLVM/project ce9363fclang/test/CodeGenHLSL/builtins RWBuffer-Interlocked.hlsl RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl, clang/test/SemaHLSL/BuiltIns ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl InterlockedCompareExchangeFloatBitwise-errors.hlsl

First attempt implementing InterlockedCompareExchangeFloatBitwise



DeltaFile
+119-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchangeFloatBitwise-errors.hlsl
+43-0clang/test/CodeGenHLSL/builtins/InterlockedCompareExchangeFloatBitwise.hlsl
+42-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl
+32-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
+25-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
+10-0clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
+271-05 files not shown
+298-311 files

LLVM/project 152b3acclang/lib/Sema SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl InterlockedCompareStoreFloatBitwise.hlsl

First attempt implementing InterlockedCompareStoreFloatBitwise



DeltaFile
+100-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareStoreFloatBitwise-errors.hlsl
+39-0clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStoreFloatBitwise-sm60.hlsl
+35-0clang/test/CodeGenHLSL/builtins/InterlockedCompareStoreFloatBitwise.hlsl
+30-0llvm/test/CodeGen/DirectX/ResourceAtomicCompareStoreFloat.ll
+27-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
+16-6clang/lib/Sema/SemaHLSL.cpp
+247-66 files not shown
+311-1012 files

LLVM/project 3155d62clang/lib/Sema HLSLExternalSemaSource.cpp SemaHLSL.cpp, clang/test/CodeGenHLSL/builtins RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl RWByteAddressBuffer-InterlockedCompareExchange.hlsl

First attempt implementing InterlockedCompareExchange



DeltaFile
+93-81clang/lib/Sema/SemaHLSL.cpp
+113-0clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchange-errors.hlsl
+70-0clang/test/CodeGenHLSL/builtins/InterlockedCompareExchange.hlsl
+41-24clang/lib/Sema/HLSLExternalSemaSource.cpp
+44-0clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchange.hlsl
+35-0clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl
+396-1056 files not shown
+480-12212 files

LLVM/project 30eac2allvm/utils/gn/secondary/libcxx/include BUILD.gn

[gn build] Port 5b757b81db35 (#222739)
DeltaFile
+0-1llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+0-11 files

LLVM/project 4eae56cllvm/utils/gn/secondary/libcxx/include BUILD.gn

[gn build] Port 672843a3f2ee (#222740)
DeltaFile
+1-0llvm/utils/gn/secondary/libcxx/include/BUILD.gn
+1-01 files

LLVM/project d90d78futils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms BUILD.bazel, utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel

Fix bazel builds (#222733)

- For flang/lib/Optimizer/HLFIR/Transforms -- fixes
https://github.com/llvm/llvm-project/pull/222013 by adding missing
dependencies.
- For lldb/source/Plugins:PluginRegisterTypeBuilderClang -- fixes
https://github.com/llvm/llvm-project/pull/220707 by adding missing
dependency
DeltaFile
+2-0utils/bazel/llvm-project-overlay/flang/lib/Optimizer/HLFIR/Transforms/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+3-02 files

LLVM/project 67e86d2clang/include/clang/Basic BuiltinsAMDGPU.td, clang/test/SemaOpenCL builtins-amdgcn-error-gfx1250-strict.cl

[AMDGPU] Disable block16 conversions on gfx1250-strict
DeltaFile
+45-0llvm/test/MC/AMDGPU/gfx1250-strict_err.s
+23-21llvm/lib/Target/AMDGPU/VOP3Instructions.td
+17-15llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+15-15clang/include/clang/Basic/BuiltinsAMDGPU.td
+19-1clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
+9-1llvm/lib/Target/AMDGPU/AMDGPU.td
+128-536 files

LLVM/project e286cb0llvm/utils/gn/secondary/llvm/test BUILD.gn

[gn] fix mistake from f3909e073dd93f (#222735)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/test/BUILD.gn
+1-01 files

LLVM/project 833b8a0llvm/lib/CodeGen MachineOutliner.cpp, llvm/test/CodeGen/AArch64 machine-outliner-operand-flags.mir

[AArch64][PAC] Reset `killed` operand flags in outlined functions

Presently, MachineOutliner does not take `killed` operand flags into
account when merging instruction sequences. While it sounds perfectly
reasonable not to inhibit merging of the instruction sequences that
only differ in `killed` flags (for N flags there is technically 2^N
valid ways to drop some subset of them), copying these flags from
an arbitrarily chosen representative instruction may result in
incorrect codegen of PAuth-related pseudo instructions on AArch64.

To keep `killed` flags conservatively correct as if `OUTLINED_FUNCTION`s
are virtually re-inserted at every call site, this patch takes the
simplest approach of resetting every `killed` flag inside the
outlined functions.
DeltaFile
+82-0llvm/test/CodeGen/AArch64/machine-outliner-operand-flags.mir
+1-0llvm/lib/CodeGen/MachineOutliner.cpp
+83-02 files

FreeBSD/src 6b92093sys/dev/ichiic ig4_pci.c

ig4: Add Lunar Lake-M I2C controllers 4 and 5

Commit 851dffef532a added the Lunar Lake-M I2C controllers 0 through 3
(0xa878-0xa87b), which sit on PCI device 0x15.  The platform exposes two
further controllers at 0xa850 and 0xa851 on PCI device 0x19, reported by
Intel as I2C #4 and #5.  This mirrors the layout already handled for
Arrow Lake-U, where both the 0x777x and 0x775x ranges are listed.

On an HP OmniBook X Flip 16-as0xxx (Core Ultra 9 288V) the firmware
enables only four of the six controllers, and both HID devices sit on
the two that were missing: an ELAN2514 touchscreen on controller 4 and
a SYNA3503 touchpad on controller 5.  Neither attaches without this
change, so the machine has no working pointing device.

Like the other four, these use the Tiger Lake revision of the I2C IP;
Linux treats 0xa850/0xa851 identically to 0xa878-0xa87b in
intel-lpss-pci.c.

Tested on:      HP OmniBook X Flip 16-as0xxx (Intel Core Ultra 9 288V)

    [4 lines not shown]
DeltaFile
+4-0sys/dev/ichiic/ig4_pci.c
+4-01 files

LLVM/project e47d10flibc/src/wchar wcsncasecmp.h CMakeLists.txt, libc/test/src/wchar wcscasecmp_test.cpp wcsncasecmp_test.cpp

[libc] Add wcscasecmp and wcsncasecmp implementations. (#222154)

Add a helper to wctype_utils.h for three-way comparison of individual
`wchar_t`s. As is the case in existing code, `wchar_t` is presumed to be
UTF-32.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+93-0libc/test/src/wchar/wcsncasecmp_test.cpp
+82-0libc/test/src/wchar/wcscasecmp_test.cpp
+42-0libc/src/wchar/wcsncasecmp.cpp
+38-0libc/src/wchar/wcscasecmp.cpp
+29-0libc/src/wchar/CMakeLists.txt
+27-0libc/src/wchar/wcsncasecmp.h
+311-08 files not shown
+412-014 files

LLVM/project 505ecefllvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp, llvm/test/CodeGen/RISCV ctselect-fallback-gisel.ll ctselect-fallback-scalable.ll

[ConstantTime] Use ARITH_FENCE as the combine barrier in CT_SELECT expansion

Replace the CopyToReg/CopyFromReg vreg barrier in ExpandCTSELECT with
ISD::ARITH_FENCE. The legalizer no longer creates vregs or picks register
classes via getRegClassFor, and scalable vectors are now covered too.
Codegen tests regenerated; output stays branchless.
DeltaFile
+945-702llvm/test/CodeGen/X86/ctselect.ll
+232-144llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+5-25llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+8-0llvm/test/CodeGen/RISCV/ctselect-fallback-scalable.ll
+2-0llvm/test/CodeGen/RISCV/ctselect-fallback-gisel.ll
+1,192-8715 files

LLVM/project dd45915llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp

[ConstantTime] Move the CT_SELECT expansion into a helper

The CT_SELECT case in ExpandNode was around 180 lines. Move it to
SelectionDAGLegalize::ExpandCTSELECT and name the operands, so the case is
three lines. Pure code motion: emitted assembly is unchanged for every RUN
line of the existing ct.select codegen tests.

Also use a temporary for the promoted SELECT so the call fits on one line
instead of wrapping after the assignment.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+193-185llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+193-1851 files

LLVM/project 3c7e0eellvm/docs LangRef.md, llvm/include/llvm/IR Intrinsics.td

[ConstantTime] Allow dead llvm.ct.select to be removed

An unused llvm.ct.select outlived the InstructionSimplify fold, which kept
both value arguments live and contradicted the LangRef text saying the unused
argument becomes dead code. Add the intrinsic to the wouldInstructionBeTriviallyDead
whitelist next to llvm.allow.runtime.check and llvm.allow.ubsan.check, which
carry IntrInaccessibleMemOnly for the same reason: to pin the call in place,
not to model a real memory access.

Keep IntrInaccessibleMemOnly rather than switching to IntrNoMem. As a pure
value the call is sunk into a conditionally-executed block by InstCombine
(gated on mayWriteToMemory) and split into one copy per branch arm by GVN PRE.

Also correct the undef condition semantics, trim the declaration list, and
drop claims from the definition comment that the memory effect does not
actually provide.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+69-16llvm/test/Transforms/InstSimplify/ct-select.ll
+23-25llvm/docs/LangRef.md
+13-8llvm/include/llvm/IR/Intrinsics.td
+2-1llvm/lib/Transforms/Utils/Local.cpp
+107-504 files

LLVM/project dd175ecllvm/docs LangRef.md, llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp SelectionDAGBuilder.cpp

[ConstantTime] Address reviewer feedback on llvm.ct.select core

- Fix vector-split build error: call the existing SplitRes_Select for
  CT_SELECT instead of the nonexistent SplitRes_CT_SELECT.
- Fix a VP_MERGE result-split regression: the CT_SELECT switch reformat had
  moved ISD::VP_MERGE onto the SplitRes_SELECT_CC line, which reads operand 4
  (out of bounds for VP_MERGE's 4 operands) and builds a SELECT_CC without
  splitting the EVL, crashing or miscompiling any vp.merge whose result
  vector must be split. Restore it to the SplitRes_Select group.
- Accept byte types (bN and vectors of them) in the Verifier and document
  them in LangRef; add byte-typed X86 codegen and Verifier test coverage.
- Drop the redundant `VT0 == MVT::i1` guard in visitCT_SELECT; the inner
  condition-type checks already cover correctness after promotion.
- LangRef: reword the constant-fold rule to the enforceable "constant
  operand" form, restate fast-math flags via the general FP-call rule (only
  nnan/ninf are poison-generating), and switch undef/poison to match select,
  dropping the noundef return attribute so poison propagates (both arms always
  evaluate, so poison in either yields poison).
- Revert an unrelated whitespace change in LegalizeTypes.h.

    [2 lines not shown]
DeltaFile
+354-0llvm/test/CodeGen/X86/ctselect.ll
+24-22llvm/docs/LangRef.md
+21-22llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+3-9llvm/test/Transforms/InstSimplify/ct-select.ll
+1-5llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+4-2llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+407-605 files not shown
+417-7011 files

LLVM/project 16c0a7ellvm/docs LangRef.md, llvm/lib/CodeGen/SelectionDAG LegalizeFloatTypes.cpp LegalizeDAG.cpp

[ConstantTime] Apply review fixes for llvm.ct.select core

- Verifier: reject aggregate types instead of crashing ISel; add test.
- Fix scalable-vector expansion crash when the element type is not a
  legal scalar; add RVV test.
- LangRef: document poison/undef, noundef, permitted folds, and FMF
  behavior; rewrite Syntax/Overview.
- Deduplicate CT_SELECT type-legalizer handlers into the SELECT paths.
- Misc: FP int-twin assert, dead null check, in-place memory blend,
  flag-free PromoteNode, GlobalISel fallback test, comment cleanups.
DeltaFile
+117-0llvm/test/CodeGen/RISCV/ctselect-fallback-scalable.ll
+70-45llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+56-34llvm/docs/LangRef.md
+24-24llvm/test/CodeGen/X86/ctselect.ll
+35-0llvm/test/CodeGen/RISCV/ctselect-fallback-gisel.ll
+10-24llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+312-12711 files not shown
+369-18717 files

LLVM/project 46dc494llvm/docs LangRef.md, llvm/include/llvm/IR Intrinsics.td

[ConstantTime] Address reviewer feedback for llvm.ct.select core

Model llvm.ct.select as IntrInaccessibleMemOnly so the call stays pinned
without pessimizing alias analysis. Make CT_SELECT flagless (drop the
getCTSelect flags parameter, dead flag propagation, and
setFlags-after-getNode) and assert its condition is scalar. Blend the FP
memory fallback at the widest legal integer width with ext-load and
trunc-store tails instead of illegal i8 chunks. Restore the LangRef
section dropped in the rebase onto the Markdown docs migration and note
RISC-V Zkt/Zvkt. Apply review style fixes and regenerate affected tests.
DeltaFile
+113-113llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+125-0llvm/docs/LangRef.md
+27-68llvm/test/CodeGen/X86/ctselect.ll
+39-27llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+16-19llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-2llvm/include/llvm/IR/Intrinsics.td
+328-2298 files not shown
+349-24714 files

LLVM/project 8571841llvm/include/llvm/CodeGen ISDOpcodes.h, llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

[ConstantTime] Reword comments and LangRef doc
DeltaFile
+0-7llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+5-2llvm/include/llvm/CodeGen/ISDOpcodes.h
+5-92 files

LLVM/project c35a298llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp SelectionDAGBuilder.cpp, llvm/test/CodeGen/RISCV ctselect-fallback.ll

[ConstantTime] Move ct.select lowering to legalizer; misc fixes

- LegalizeDAG owns CT_SELECT lowering: scalar-mask+splat for vectors
  (avoids illegal vNi1), memory-blend for FP types lacking a legal
  same-size integer (f64 on i386 no-SSE, fp128, x86_fp80)
- Add InstSimplify folds for constant cond and identical arms
- Extend X86 tests to half/bfloat/fp128/x86_fp80; nounwind cleanup
- Preserve flags through legalizer; reuse SDTSelect
DeltaFile
+1,513-549llvm/test/CodeGen/X86/ctselect.ll
+143-65llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+12-111llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+102-0llvm/test/Transforms/InstSimplify/ct-select.ll
+44-30llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+4-13llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1,818-7685 files not shown
+1,838-78011 files