LLVM/project 854d088llvm/lib/CodeGen/SelectionDAG LegalizeFloatTypes.cpp LegalizeTypes.h

Delete the implementation functions
DeltaFile
+0-655llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+0-37llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+0-6922 files

LLVM/project 4148355llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen TargetLoweringBase.cpp

DAG: Remove softPromoteHalfType

Remove the now unimplemented target hook and associated DAG machinery
for the old half legalization path.

Really fixes #97975
DeltaFile
+7-22llvm/include/llvm/CodeGen/TargetLowering.h
+0-20llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+0-11llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+2-7llvm/lib/CodeGen/TargetLoweringBase.cpp
+0-8llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
+0-2llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+9-701 files not shown
+9-717 files

LLVM/project febe138llvm/lib/Target/AMDGPU R600ISelLowering.cpp R600ISelLowering.h, llvm/test/CodeGen/AMDGPU kernel-args.ll

R600: Remove softPromoteHalfType

Also includes a kind of hacky, minimal change to avoid assertions
when softPromoteHalfType is removed to fix kernel arguments
lowered as f16. Half support was never really implemented
for r600, and there just happened to be a few incidental tests
which included a half argument (which were also not even meaningful,
since the function body just folded to nothing due to no callable
function support).
DeltaFile
+164-0llvm/test/CodeGen/AMDGPU/kernel-args.ll
+3-0llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+0-2llvm/lib/Target/AMDGPU/R600ISelLowering.h
+167-23 files

LLVM/project 2fa99dcllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll

AMDGPU: Move softPromoteHalfType override to R600 only

As expected the code is much worse, but more correct.
We could do a better job with source modifier management around
fp16_to_fp/fp_to_fp16.
DeltaFile
+19,051-23,588llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+7,381-11,318llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+6,645-10,108llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+6,103-9,009llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+7,004-7,821llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,419-8,032llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+51,603-69,876116 files not shown
+97,949-126,397122 files

LLVM/project 6fc8028llvm/lib/Analysis LazyValueInfo.cpp

[LVI] Fix the type when inferring nonnull from a dereferenceable attribute bundle (#177562)

DeltaFile
+1-1llvm/lib/Analysis/LazyValueInfo.cpp
+1-11 files

OPNSense/plugins 14a1301net/isc-dhcp/src/etc/inc/plugins.inc.d dhcpd.inc, net/isc-dhcp/src/www services_dhcpv6.php services_dhcp.php

isc-dhcpdv6: add static mapping export (#5164)

DeltaFile
+33-1net/isc-dhcp/src/www/services_dhcpv6.php
+1-2net/isc-dhcp/src/etc/inc/plugins.inc.d/dhcpd.inc
+1-1net/isc-dhcp/src/www/services_dhcp.php
+35-43 files

LLVM/project 7b72ab8llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel fpext.ll unmerge-sgpr-s16.ll

AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES

Move G_UNMERGE_VALUES handling to AMDGPURegBankLegalizeRules.cpp.
Fix sgpr S16 unmerge by lowering using shift and using S32.
Previously sgpr S16 unmerge was selected using _lo16 and _hi16 subreg
indexes which are exclusive to vgpr register classes.
For remaing cases we do trivial mapping, assigns same reg bank
to all operands, vgpr or sgpr.
DeltaFile
+47-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+13-27llvm/test/CodeGen/AMDGPU/GlobalISel/fpext.ll
+36-0llvm/test/CodeGen/AMDGPU/GlobalISel/unmerge-sgpr-s16.ll
+26-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+14-9llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
+14-9llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
+150-452 files not shown
+158-498 files

FreeBSD/ports 3573372x11/walker distinfo Makefile.crates

x11/walker: Update to 2.14.1

Changelog:
- https://github.com/abenz1267/walker/releases/tag/v2.14.0
- https://github.com/abenz1267/walker/releases/tag/v2.14.1

Reported by:    GitHub (watch releases)
DeltaFile
+3-23x11/walker/distinfo
+0-10x11/walker/Makefile.crates
+1-1x11/walker/Makefile
+4-343 files

LLVM/project 39a9e65mlir/include/mlir/Dialect/Bufferization/IR BufferizableOpInterface.h, mlir/lib/Dialect/Bufferization/IR BufferizableOpInterface.cpp

[mlir][bufferization] Cache SymbolTableCollection for CallOp types (#176909)

Use the BufferizationState symbol table cache when resolving CallOp
callee types in getBufferType(), avoiding repeated SymbolTableCollection
creation. Add a const accessor (backed by a mutable cache) so const
state can reuse the same tables. Completes a marked TODO.
DeltaFile
+2-4mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
+3-1mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
+4-0mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
+9-53 files

OPNSense/core 32178f6src/opnsense/mvc/app/views/OPNsense/Firewall firewall_migration.volt

Firewall: Rules: Migration assistant: Fix typos and improve clarity in migration instructions
DeltaFile
+5-5src/opnsense/mvc/app/views/OPNsense/Firewall/firewall_migration.volt
+5-51 files

LLVM/project b791501clang/test/CodeGenObjC arc-foreach.m arc-unsafeclaim.m, clang/test/CodeGenObjCXX auto-release-result-assert.mm

Revert "Reapply "[CGObjC] Allow clang.arc.attachedcall on -O0 (#164875)" (#177285)" (#177533)

This reverts commit 4b939beb79e3390046b760bef71b7d891ba9b4df.

This commit seems to be causing these test failures:

- ThreadSanitizer-x86_64-iossim.Darwin.norace-objcxx-run-time.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/norace_objcxx_run_time_mm/
- ThreadSanitizer-x86_64-iossim.Darwin.objc-synchronize-cycle-tagged.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/objc_synchronize_cycle_tagged_mm/
- ThreadSanitizer-x86_64-iossim.Darwin.objc-synchronize-tagged.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/objc_synchronize_tagged_mm/
- ThreadSanitizer-x86_64-iossim.Darwin.objc-synchronize.mm
https://ci.swift.org/job/llvm.org/job/clang-san-iossim/14230/testReport/junit/ThreadSanitizer-x86_64-iossim/Darwin/objc_synchronize_mm/


With the error message:

```
fatal error: error in backend: Cannot select: intrinsic %llvm.objc.clang.arc.noop.use
```
DeltaFile
+1-232llvm/test/CodeGen/AArch64/call-rv-marker.ll
+89-89clang/test/CodeGenObjC/arc-foreach.m
+5-45clang/test/CodeGenObjC/arc-unsafeclaim.m
+16-16clang/test/CodeGenObjC/os_log.m
+1-22clang/test/CodeGenObjC/arc-arm.m
+6-12clang/test/CodeGenObjCXX/auto-release-result-assert.mm
+118-41610 files not shown
+155-46416 files

OPNSense/plugins 7ad1ea6net/isc-dhcp/src/etc/inc/plugins.inc.d dhcpd.inc, net/isc-dhcp/src/www services_dhcpv6.php services_dhcp.php

isc-dhcpdv6: add static mapping export
DeltaFile
+33-1net/isc-dhcp/src/www/services_dhcpv6.php
+1-2net/isc-dhcp/src/etc/inc/plugins.inc.d/dhcpd.inc
+1-1net/isc-dhcp/src/www/services_dhcp.php
+35-43 files

LLVM/project 2142388llvm/test/CodeGen/X86 clmul-vector-256.ll clmul-vector-512.ll

[X86] Add 256-bit and 512-bit CLMULR and CLMULH test coverage (#177561)

DeltaFile
+1,844-0llvm/test/CodeGen/X86/clmul-vector-256.ll
+1,595-3llvm/test/CodeGen/X86/clmul-vector-512.ll
+3,439-32 files

LLVM/project e619523mlir/lib/Dialect/XeGPU/Transforms XeGPUPropagateLayout.cpp, mlir/test/Dialect/XeGPU propagate-layout-subgroup.mlir

[MLIR][XeGPU] Add simple rank-based sg layout creation (#172867)

DeltaFile
+197-24mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+74-0mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+271-242 files

NetBSD/src LbSRX8udoc CHANGES-9.5

   Ticket #1997
VersionDeltaFile
1.1.2.93+16-1doc/CHANGES-9.5
+16-11 files

NetBSD/src ORLHjRVexternal/bsd/unbound/dist/doc unbound.conf.5.in, external/bsd/unbound/dist/iterator iter_scrub.c

   Apply patch, requested by gutteridge in ticket #1997:

        external/bsd/unbound/dist/doc/example.conf.in           (apply patch)
        external/bsd/unbound/dist/doc/unbound.conf.5.in         (apply patch)
        external/bsd/unbound/dist/iterator/iter_scrub.c         (apply patch)
        external/bsd/unbound/dist/util/config_file.c            (apply patch)
        external/bsd/unbound/dist/util/config_file.h            (apply patch)
        external/bsd/unbound/dist/util/configlexer.c            (apply patch)
        external/bsd/unbound/dist/util/configlexer.lex          (apply patch)
        external/bsd/unbound/dist/util/configparser.c           (apply patch)
        external/bsd/unbound/dist/util/configparser.h           (apply patch)
        external/bsd/unbound/dist/util/configparser.y           (apply patch)
        external/bsd/unbound/include/config.h                   (apply patch)

   unbound: apply upstream patch to fix CVE-2025-11411.
VersionDeltaFile
1.1.1.4.2.3+3,011-3,745external/bsd/unbound/dist/util/configlexer.c
1.1.1.4.2.3+1,876-1,860external/bsd/unbound/dist/util/configparser.c
1.1.1.4.2.3+51-4external/bsd/unbound/dist/iterator/iter_scrub.c
1.1.1.4.2.3+13-1external/bsd/unbound/dist/util/configparser.y
1.1.1.4.2.3+4-2external/bsd/unbound/dist/util/configparser.h
1.1.1.4.2.3+6-0external/bsd/unbound/dist/doc/unbound.conf.5.in
+4,961-5,6125 files not shown
+4,974-5,61411 files

FreeBSD/src e17d7ablib/libc/xdr xdr.c, sys/xdr xdr.c

xdr_string: don't leak strings with xdr_free

Historically (and in a small amount of older software such as OpenAFS),
developers would attempt to free XDR strings with

        xdr_free((xdrproc_t)xdr_string, &string)

This resulted in xdr_free calling xdr_string with only two intentional
arguments and whatever was left in the third argument register.  If the
register held a sufficently small number, xdr_string would return FALSE
and not free the string (no one checks the return values).

Software should instead free strings with:

        xdr_free((xdrproc_t)xdr_wrapstring, &string)

Because buggy software exists in the wild, act as though xdr_wrapstring
was used in the XDR_FREE case and plug these leaks.


    [5 lines not shown]
DeltaFile
+7-0sys/xdr/xdr.c
+7-0lib/libc/xdr/xdr.c
+14-02 files

FreeBSD/src ac5a19einclude/rpc xdr.h, lib/libc/rpc rpc.3

rpc/xdr.h: make xdrproc_t always take two arguments

The type of xdrproc_t is clearly defined in the comments as a function
with two arguments, an XDR * and a void * (sometimes spelled caddr_t).
It was initialy defined as:

        typedef bool_t (*xdrproc_t)();

At some point people started giving it a non-empty argument list.
Unfortunatly, there has been widespread disagreement about how arguments
are passed.  There seems to have been a widespread view that it should
be allowed to pass three argument function pointer to xdrproc_t.  Most
notable is xdr_string which takes a maximum length parameter. This lead
to all sorts of prototypes (all of which have been present in the
FreeBSD source tree):

FreeBSD userspace (nominally from tirpc, but seemingly local):
        typedef bool_t (*xdrproc_t)(XDR *, ...);
FreeBSD kernel, glibc:

    [36 lines not shown]
DeltaFile
+1-8sys/rpc/xdr.h
+1-8include/rpc/xdr.h
+2-2lib/libc/rpc/rpc.3
+2-1sys/contrib/openzfs/module/nvpair/nvpair.c
+1-1sys/sys/param.h
+7-205 files

LLVM/project 7826cbellvm/test/Transforms/Attributor/IPConstantProp openmp_parallel_for.ll

Attributor: Regenerate baseline test checks (#177560)

DeltaFile
+12-10llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll
+12-101 files

NetBSD/src RsvuIVvdoc CHANGES-10.2

   Ticket #1225
VersionDeltaFile
1.1.2.86+16-1doc/CHANGES-10.2
+16-11 files

NetBSD/src cqJvMgbexternal/bsd/unbound/dist/doc unbound.conf.5.in, external/bsd/unbound/dist/iterator iter_scrub.c

   Apply patch, requested by gutteridge in ticket #1225

        external/bsd/unbound/dist/doc/example.conf.in           (apply patch)
        external/bsd/unbound/dist/doc/unbound.conf.5.in         (apply patch)
        external/bsd/unbound/dist/iterator/iter_scrub.c         (apply patch)
        external/bsd/unbound/dist/util/config_file.c            (apply patch)
        external/bsd/unbound/dist/util/config_file.h            (apply patch)
        external/bsd/unbound/dist/util/configlexer.c            (apply patch)
        external/bsd/unbound/dist/util/configlexer.lex          (apply patch)
        external/bsd/unbound/dist/util/configparser.c           (apply patch)
        external/bsd/unbound/dist/util/configparser.h           (apply patch)
        external/bsd/unbound/dist/util/configparser.y           (apply patch)
        external/bsd/unbound/include/config.h                   (apply patch)

   Apply upstream fix for CVE-2025-11411.
VersionDeltaFile
1.1.1.7.2.2+3,011-3,745external/bsd/unbound/dist/util/configlexer.c
1.1.1.7.2.2+1,876-1,860external/bsd/unbound/dist/util/configparser.c
1.1.1.7.2.2+51-4external/bsd/unbound/dist/iterator/iter_scrub.c
1.1.1.7.2.2+13-1external/bsd/unbound/dist/util/configparser.y
1.1.1.7.2.2+6-0external/bsd/unbound/dist/doc/unbound.conf.5.in
1.1.1.7.2.2+4-2external/bsd/unbound/dist/util/configparser.h
+4,961-5,6125 files not shown
+4,974-5,61411 files

OPNSense/core 28ff02fsrc/opnsense/mvc/app/controllers/OPNsense/Firewall/Api DNatController.php, src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes ProtocolField.php BaseField.php

firewall: lowercase for protocol values required for DNAT

Use the ChangeCase BaseField extension because it's already being tested
and add more tests and safeguards so that the cache knows which case is
going on (also if 'any' needs to be used).

The 'any' value is a bit tricky here.  Force it to lowercase in all cases
since it wasn't uppercased before either.

Also fix the display of anti-lockout protocol for consistency.
DeltaFile
+45-31src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes/ProtocolFieldTest.php
+31-7src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/ProtocolField.php
+16-14src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/BaseField.php
+2-1src/opnsense/mvc/app/models/OPNsense/Firewall/DNat.xml
+1-0src/opnsense/mvc/app/controllers/OPNsense/Firewall/Api/DNatController.php
+95-535 files

LLVM/project 323bb14clang/lib/AST/ByteCode Compiler.cpp Interp.cpp, clang/test/SemaCXX ms-constexpr-new.cpp

[clang][bytecode] Finish support for `msvc::constexpr` (#177388)

Keep track of whether an `InterpFrame` is allowed to call
`msvc::constexpr` functions via two new opcodes.
DeltaFile
+15-2clang/lib/AST/ByteCode/Compiler.cpp
+10-4clang/lib/AST/ByteCode/Interp.cpp
+13-0clang/lib/AST/ByteCode/Interp.h
+4-0clang/test/SemaCXX/ms-constexpr-new.cpp
+3-0clang/lib/AST/ByteCode/InterpFrame.h
+3-0clang/lib/AST/ByteCode/Opcodes.td
+48-64 files not shown
+54-710 files

OPNSense/core da4883asrc/opnsense/mvc/app/models/OPNsense/Base/FieldTypes ProtocolField.php BaseField.php, src/opnsense/mvc/app/models/OPNsense/Firewall DNat.xml

firewall: lowercase for protocol values required for DNAT

Use the ChangeCase BaseField extension because it's already being tested
and add more tests and safeguards so that the cache knows which case is
going on (also if 'any' needs to be used).
DeltaFile
+45-31src/opnsense/mvc/tests/app/models/OPNsense/Base/FieldTypes/ProtocolFieldTest.php
+31-7src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/ProtocolField.php
+16-14src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/BaseField.php
+2-1src/opnsense/mvc/app/models/OPNsense/Firewall/DNat.xml
+94-534 files

LLVM/project f016ee5utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel] Add missing dependency for b9ab8885c89b80cdb638aecbd5114672ec4fdb4b
DeltaFile
+1-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+1-01 files

LLVM/project 7f39d92clang/lib/AST/ByteCode Interp.h Interp.cpp

[clang][bytecode][NFC] Move some opcode impls to the source file (#177543)

They aren't templated, so move them to Interp.cpp to make the header
file a bit shorter.
DeltaFile
+6-98clang/lib/AST/ByteCode/Interp.h
+96-0clang/lib/AST/ByteCode/Interp.cpp
+102-982 files

LLVM/project 4e51f90mlir/include/mlir/Dialect/SPIRV/IR SPIRVTosaOps.td SPIRVTosaTypes.td, mlir/lib/Dialect/SPIRV/IR SPIRVTosaOps.cpp

[mlir][spirv] Add Conv operations for TOSA Extended Instruction Set (001000.1) (#176908)

This patch expands support for the TOSA Extended Instruction Set
(001000.1) to the SPIR-V dialect in MLIR. The TOSA extended instruction
set provides a standardized set of machine learning operations designed
to be used within `spirv.ARM.Graph` operations (corresponding to
OpGraphARM in SPV_ARM_graph) and typed with `!spirv.arm.tensor<...>`
(corresponding to OpTypeTensorARM in SPV_ARM_tensor).

The change introduces:
* Extending dialect plumbing for import, serialization, and
deserialization of the TOSA extended instruction set.
* The `spirv.Tosa.*Conv*` convolution operation from TOSA extended
instruction, each lowering to the corresponding `OpExtInst`.
* Verification enforcing that new convolution operations appears only
within `spirv.ARM.Graph` regions, operates on `!spirv.arm.tensor<...>`
types, and is well-formed according to the TOSA 001000.1 specification.

All convolution operations from TOSA 001000.1 extended instructions are

    [11 lines not shown]
DeltaFile
+337-0mlir/test/Dialect/SPIRV/IR/tosa-ops-verification.mlir
+287-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaOps.td
+184-0mlir/test/Target/SPIRV/tosa-ops.mlir
+133-3mlir/lib/Dialect/SPIRV/IR/SPIRVTosaOps.cpp
+104-0mlir/test/Dialect/SPIRV/IR/tosa-ops.mlir
+29-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTosaTypes.td
+1,074-44 files not shown
+1,116-610 files

OPNSense/core 811a2f3src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes ProtocolField.php

fix
DeltaFile
+2-0src/opnsense/mvc/app/models/OPNsense/Base/FieldTypes/ProtocolField.php
+2-01 files

LLVM/project 9ef96bbllvm/test/Transforms/Attributor/IPConstantProp openmp_parallel_for.ll

Attributor: Regenerate baseline test checks
DeltaFile
+12-10llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll
+12-101 files

LLVM/project 580b6dcllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 clmul-vector-256.ll clmul-vector-512.ll

[X86] Enable custom lowering of 256/512-bit vXi32 and vXi64 CLMUL nodes (#177554)

Similar to 128-bit v4i32/v2i64 support, these are can now be efficiently
lowered to PCLMUL nodes through unrolling, shuffle combining and
concatenation

If the target only supports PCLMUL then they will remain as 128-bit
nodes, but if VPCLMULQDQ is supported then they should merge into wider
types.
DeltaFile
+119-1,787llvm/test/CodeGen/X86/clmul-vector-256.ll
+64-381llvm/test/CodeGen/X86/clmul-vector-512.ll
+118-208llvm/test/CodeGen/X86/clmul-vector.ll
+16-0llvm/lib/Target/X86/X86ISelLowering.cpp
+317-2,3764 files