LLVM/project 62b7ae5llvm/test/CodeGen/AMDGPU sdwa-ops.mir

[AMDGPU] Compact virtual register numbers in sdwa-ops.mir (NFC) (#222197)

Renumber vregs in appearance order.
DeltaFile
+124-121llvm/test/CodeGen/AMDGPU/sdwa-ops.mir
+124-1211 files

LLVM/project 757a2bfllvm/lib/Target/AMDGPU SIInstrInfo.cpp

Refactor `ExpectedRC` determination
DeltaFile
+20-10llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+20-101 files

LLVM/project f40e465flang/lib/Evaluate tools.cpp, flang/test/Lower split-sum-expression-tree-subscripts.f90

[flang] Ignore subscript conversions when reassociating sums (#222302)

Implicit conversions of INTEGER(4) array indices to SubscriptInteger
were treated as conversions in the surrounding floating-point sum,
preventing reassociation of ordinary array-element expressions.

Stop only the conversion traversal at subscripts. Keep the independent
side-effect and volatile/asynchronous checks and embedded numeric
conversion restrictions unchanged.

Assisted-by: Codex
DeltaFile
+100-0flang/test/Lower/split-sum-expression-tree-subscripts.f90
+4-0flang/lib/Evaluate/tools.cpp
+1-1flang/test/Lower/OpenACC/acc-cache.f90
+105-13 files

LLVM/project 44b3326clang/docs ReleaseNotes.md, clang/include/clang/Basic Attr.td

[clang] treat [[gnu::flag_enum]] as equivalent to [[clang::flag_enum]] (#219105)

GCC gained a `[[gnu::flag_enum]]` attribute for consistency with clang
in GCC 15. With this patch, the `[[gnu::flag_enum]]` is recognized and
handled equivalently to `[[clang::flag_enum]]`.

The patch introducing `[[gnu::flag_enum]]` in GCC is
https://github.com/gcc-mirror/gcc/commit/1914ca8791ce4e0ba821e818cb6f86c76afdb6f2.
GCC treats `[[clang::flag_enum]]` as equivalent to `[[gnu::flag_enum]`.
DeltaFile
+4-0clang/test/Sema/attr-c2x.c
+1-1clang/include/clang/Basic/Attr.td
+2-0clang/docs/ReleaseNotes.md
+7-13 files

LLVM/project 4c06812llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/AArch64 illegal-floating-point-vector-compares.ll fold-sext-in-reg-predicate-fixed-length.ll

[SDAG][ComputeNumSignBits] Look through undefined high bits for EXTRACT_VECTOR_ELT in a BUILD_VECTOR (#218099)

If we have a `BUILD_VECTOR(EXTRACT_VECTOR_ELT()...)` where the
`EXTRACT_VECTOR_ELT` is adding undefined high bits by extending but the
`BUILD_VECTOR` is again truncating those bits, then we can just look
through the extract and call `ComputeNumSignBits` directly on the parent
vector.

Ideally, when the caller is truncating the value, it would be nice for
`ComputeNumSignBits` to have the ability to ignore high bits we don't
care about.
DeltaFile
+68-116llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
+74-4llvm/test/CodeGen/AArch64/fold-sext-in-reg-predicate-fixed-length.ll
+26-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+2-4llvm/test/CodeGen/ARM/vtrn.ll
+0-2llvm/test/CodeGen/AArch64/illegal-floating-point-vector-compares.ll
+170-1265 files

LLVM/project f9c612ellvm/include/llvm/Frontend/OpenMP OMPDescriptors.h.inc, llvm/lib/Frontend/OpenMP OMPDescriptors.inc

[OpenMP] Make all syntactic properties explicit

For clauses, modifiers, and modifier sets/groups, make sure that
either the syntactic proprty or its inverse is explicitily listed,
with the missing properties added according to the following table.

                       |                           Modifier
            Inverse    | Clause       Modifier     group
Property    property   | defaults     defaults     defaults
----------+------------+------------+------------+-----------
required    optional   | optional     optional     optional
unique      repeatable | repeatable   unique       unique
exclusive   compatible | compatible   compatible   compatible
ultimate    free       | free         free         free
DeltaFile
+840-839llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
+9-7llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
+849-8462 files

LLVM/project ecd333fllvm/test/CodeGen/RISCV orc-b-patterns.ll

[RISCV] Correct some constants in orc-b-patterns.ll. NFC (#222229)

Based on the test function names being similar to other function, I
assume these were supposed to generate orc.b.

Also remove unnecessary nuw, nsw, and exact flags.
DeltaFile
+117-77llvm/test/CodeGen/RISCV/orc-b-patterns.ll
+117-771 files

LLVM/project 651e832libclc/clc/lib/generic/math clc_fmod.cl

libclc: Update fmod implementations

This was originally ported from rocm device libs in
93af966747b59d37c57312a0c0242151076c072b. Merge in more
recent changes.

Co-Authored-By: Claude <noreply at anthropic.com>
DeltaFile
+96-124libclc/clc/lib/generic/math/clc_fmod.cl
+96-1241 files

LLVM/project acc8777llvm/test/Transforms/LoopVectorize div-exact.ll if-pred-stores.ll, llvm/test/Transforms/LoopVectorize/VPlan dissolve-replicate-regions.ll

[VPlan] Skip branch term in masks for some preserved uniform edges
DeltaFile
+6-425llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
+36-129llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+9-123llvm/test/Transforms/LoopVectorize/div-exact.ll
+25-76llvm/test/Transforms/LoopVectorize/VPlan/dissolve-replicate-regions.ll
+19-80llvm/test/Transforms/LoopVectorize/X86/predicated-replicate-feeding-cast.ll
+7-59llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
+102-89235 files not shown
+370-1,36841 files

LLVM/project 4945fb0llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll

I think we need to freeze
DeltaFile
+195-173llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+26-13llvm/test/Transforms/LoopVectorize/predicator.ll
+14-0llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+6-5llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+4-2llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
+4-2llvm/test/Transforms/LoopVectorize/AArch64/sve-predicated-costs.ll
+249-1953 files not shown
+257-1999 files

LLVM/project ba83264llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize hoist-predicated-loads.ll if-pred-stores.ll

[VPlan][Predicator] Preserve some uniform control flow

Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack.

That should allow implementation of an alternative to
https://github.com/llvm/llvm-project/pull/141900 based on this
functionality (see BOSCC in the paper).
DeltaFile
+1,514-204llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+323-129llvm/test/Transforms/LoopVectorize/predicator.ll
+184-128llvm/test/Transforms/LoopVectorize/X86/cost-conditional-branches.ll
+234-16llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+81-45llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+102-10llvm/test/Transforms/LoopVectorize/hoist-predicated-loads.ll
+2,438-53240 files not shown
+3,129-78746 files

LLVM/project 8bfad82llvm/test/Transforms/LoopVectorize/AArch64 predicated-costs.ll force-target-instruction-cost.ll, llvm/test/Transforms/LoopVectorize/X86 invariant-load-gather.ll replicate-uniform-call.ll

isUnformAcrossVFsAndUFs is sufficient, no need for "is available"
DeltaFile
+300-90llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+49-14llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
+31-13llvm/test/Transforms/LoopVectorize/X86/scatter_crash.ll
+6-29llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
+20-7llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
+19-7llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
+425-1608 files not shown
+528-19714 files

LLVM/project 60bd976llvm/lib/Transforms/Vectorize VPlanPredicator.cpp

Implement non-uniform part of partial linearization algorithm
DeltaFile
+58-13llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+58-131 files

LLVM/project af5ead8llvm/lib/Transforms/Vectorize VPlanPredicator.cpp

[AI] Move convertPhisToBlends to post-linearization
DeltaFile
+27-9llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+27-91 files

LLVM/project 7b298fellvm/lib/Transforms/Vectorize VPlanRecipes.cpp

Don't crash dumping malformed phis
DeltaFile
+20-0llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+20-01 files

LLVM/project 5fca64bllvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Create actual test functions (AI-assisted)
DeltaFile
+478-25llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+478-251 files

LLVM/project 8636acbllvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Predicator tests for uniform control flow preservation
DeltaFile
+168-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+168-01 files

LLVM/project 4833f71llvm/lib/Transforms/Vectorize VPlanUtils.h VPlanUtils.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

Luke's reconstructSSA (#212209)
DeltaFile
+268-0llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+37-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+9-0llvm/lib/Transforms/Vectorize/VPlanUtils.h
+314-03 files

LLVM/project b8da22cllvm/test/Transforms/LoopVectorize predicator.ll, llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Copy to LoopVectorize/predicator.ll and generate CHECKs in both
DeltaFile
+1,074-0llvm/test/Transforms/LoopVectorize/predicator.ll
+547-1llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+1,621-12 files

LLVM/project fc97bbbllvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll

[VPlan] Use compact RPOT instead of just RPOT

This is necessary for the future partial linearization change, but I
wanted to commit this bit independently because it changes some tests on
itself and could potentially provide more blend optimization
opportunites (at least I hoped) but that didn't seem to happen.
DeltaFile
+55-13llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+32-32llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+4-4llvm/test/Transforms/LoopVectorize/predicator.ll
+4-4llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
+95-534 files

LLVM/project 3db06a9llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Drop `removeCommonBlendMask` from `simplifyBlends` - noop now
DeltaFile
+0-19llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+0-191 files

LLVM/project ef23c38llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize pr43166-fold-tail-by-masking.ll

[VPlan] Optimize away common blend mask in predicator
DeltaFile
+12-105llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+18-28llvm/test/Transforms/LoopVectorize/RISCV/pr154103.ll
+15-15llvm/test/Transforms/LoopVectorize/VPlan/RISCV/cse-loads-evl.ll
+5-16llvm/test/Transforms/LoopVectorize/pr43166-fold-tail-by-masking.ll
+16-2llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+8-7llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
+74-17324 files not shown
+123-23130 files

LLVM/project 7c10754llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize reduction-inloop.ll dereferenceable-info-from-assumption-constant-size.ll

[VPlan] Make blend operands non-reorderable to optimize their masks in predicator

Sort the incoming edges according to RPOT order so that we could use
simpler source block mask instead of the edge mask.
DeltaFile
+78-118llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+105-10llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+28-18llvm/test/Transforms/LoopVectorize/RISCV/pr154103.ll
+14-24llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+15-21llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
+18-18llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
+258-20951 files not shown
+522-43357 files

LLVM/project b21f9d2llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Remove tests from predicator.ll
DeltaFile
+0-352llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+0-3521 files

LLVM/project 54a7b12llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize/RISCV tail-folding-complex-mask.ll low-trip-count.ll

[VPlan] Reassociate header mask in the predicator during mask creation
DeltaFile
+37-28llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+45-5llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+0-29llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+9-10llvm/test/Transforms/LoopVectorize/RISCV/low-trip-count.ll
+3-1llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+0-2llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
+94-756 files

LLVM/project e88ada1llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Copy tests to predicator.ll
DeltaFile
+343-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+343-01 files

LLVM/project edd7d0allvm/lib/Transforms/Vectorize VPlanEVLTailFolding.cpp VPlanPatternMatch.h

[NFC][VPlan] Move `m_RemoveMask` to `VPlanPatternMatch.h`

I plan to use it in the `VPlanPredicator.cpp`.
DeltaFile
+0-23llvm/lib/Transforms/Vectorize/VPlanEVLTailFolding.cpp
+23-0llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+23-232 files

FreeNAS/freenas 5f075desrc/freenas/etc/logrotate.d syslog-ng-truenas, src/middlewared/middlewared logger.py

Log full git output to its own log file

## Problem
`utils/git.py` shortened git's stderr to 50 characters before putting it into the `CallError`, and `textwrap.shorten` collapses newlines before it truncates. `git clone` always opens stderr with `Cloning into '/mnt/.ix-apps/truenas_catalog'...`, which is 47 characters by itself, so every clone failure produced the byte-identical message and the `fatal:` line saying what actually went wrong was discarded every time. Bad credentials, DNS, TLS, a proxy and a missing branch were indistinguishable in the UI, in the logs and in a debug bundle, and git's stderr was preserved nowhere else.

## Solution
- **A dedicated `git` log file.** The tail of git's output goes to `/var/log/git.log` rather than back into `middlewared.log`, which is what the original shortening was trying to keep clean. The syslog-ng filter and destination generate themselves from `ALL_LOG_FILES`, so `logger.py` is the only place that needed touching, plus a line in the existing logrotate stanza.
- **The raised message names the cause.** The last `fatal:` line is preferred, then the last `error:` line, then whatever git printed last. Position alone is not reliable because `reset --hard` on a bad ref prints usage boilerplate after the `fatal:` line. The message stays a single line because it is stored as the job error and rendered into the catalog sync alert, and it points at the log file for the rest.
- **Stopped discarding two other git errors.** A failed checkout or pull was caught, silently dropped and turned into a re-clone, so a repository that stopped being usable left no record of why. The clone error was also re-raised behind a second copy of the prefix `clone_repository` had already produced, which pushed the real error further right in every alert and dropped the inner errno.
DeltaFile
+42-0src/middlewared/middlewared/pytest/unit/utils/test_git.py
+18-18src/middlewared/middlewared/utils/git.py
+3-5src/middlewared/middlewared/plugins/catalog/git_utils.py
+2-0src/middlewared/middlewared/logger.py
+1-0src/freenas/etc/logrotate.d/syslog-ng-truenas
+66-235 files

LLVM/project dd9f100llvm/lib/Transforms/Vectorize VPlanPredicator.cpp

[NFC][VPlan] Move `introduceMasksAndLinearize` into a `VPPredicator`'s method

To reduce diff in the next PR.

AI-assisted.
DeltaFile
+21-13llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+21-131 files

LLVM/project 2fb4de9clang CMakeLists.txt, llvm CMakeLists.txt

[CIR][CMake] Configure MLIR as a dependency-only project

Enable MLIR implicitly for ClangIR without attaching its unrelated tools
and test suite to the aggregate build. An explicit MLIR selection retains
its normal behavior. Add MLIR after all Clang consumers enable Clang, so
CIR also works when Clang is enabled for LLDB.

Package the required MLIR libraries through Clang's existing exports and
LLVM's distribution policy. Register dependency library and header install
components and honor toolchain-only installations. When Clang is itself
an implicit Flang dependency, let Flang package the required targets.

Keep MLIR test support available for CIR and retain the standalone ClangIR
restriction. Leave MLIR disabled when CIR is disabled.

Validated implicit and explicit MLIR, CIR disabled, toolchain-only, binary
distribution, and combined Flang/CIR configurations. Combined SDK and named
distributions configure successfully, as does an external CMake consumer
loading the Clang and Flang build-tree packages.

    [2 lines not shown]
DeltaFile
+39-2clang/CMakeLists.txt
+7-0llvm/CMakeLists.txt
+46-22 files