LLVM/project baa4983llvm/lib/CodeGen/SelectionDAG LegalizeVectorOps.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

[AArch64] Support lowering v4i16/f16 VECTOR_COMPRESS nodes to SVE (#173256)

This is a follow-up to #171162, which broke the (untested) lowering of
v4i16/f16 to SVE.

See: https://github.com/llvm/llvm-project/pull/171162#discussion_r2601901376
DeltaFile
+48-0llvm/test/CodeGen/AArch64/sve-vector-compress.ll
+33-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+6-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+87-03 files

FreeBSD/ports d96c7d2games/libretro-shaders-slang pkg-plist distinfo

games/libretro-shaders-slang: Update g20251121 => g20251223

Commitlog:
https://github.com/libretro/slang-shaders/compare/a2ac00b...2707c34

PR:     291911
DeltaFile
+148-2games/libretro-shaders-slang/pkg-plist
+3-3games/libretro-shaders-slang/distinfo
+2-2games/libretro-shaders-slang/Makefile
+153-73 files

LLVM/project e3c2e6cmlir/lib/Dialect/SCF/IR SCF.cpp, mlir/test/Dialect/SCF canonicalize.mlir

[mlir][scf] Fold away `scf.for` iter args cycles (#173436)

When iter args form cycle through region args/yields with the same init
value, we can replace them all with that init value.

---------

Signed-off-by: Ivan Butygin <ivan.butygin at gmail.com>
DeltaFile
+99-13mlir/lib/Dialect/SCF/IR/SCF.cpp
+60-24mlir/test/Dialect/SCF/canonicalize.mlir
+159-372 files

OpenBSD/src Q3fdxSrusr.sbin/snmpd parse.y usm.c

   Put snmp engineids in a struct instead of having the data/length in
   everything that needs in. This is in preparation for wider use of the
   engineids

   OK jmatthew@
VersionDeltaFile
1.92+88-68usr.sbin/snmpd/parse.y
1.31+14-13usr.sbin/snmpd/usm.c
1.96+9-7usr.sbin/snmpd/snmpe.c
1.122+11-5usr.sbin/snmpd/snmpd.h
1.45+2-5usr.sbin/snmpd/trap.c
1.14+3-3usr.sbin/snmpd/application_internal.c
+127-1011 files not shown
+129-1027 files

NetBSD/pkgsrc-wip be4ecdflabwc distinfo Makefile

labwc: update to 0.9.3
DeltaFile
+3-3labwc/distinfo
+2-1labwc/Makefile
+2-0labwc/PLIST
+7-43 files

LLVM/project 3159baallvm/include/llvm/Transforms/Utils UnrollLoop.h LoopPeel.h, llvm/lib/Transforms/Scalar LoopUnrollPass.cpp

[LoopPeel] Peel last iteration to enable load widening

In loops that contain multiple consecutive small loads (e.g., 3 bytes
loading i8's), peeling the last iteration makes it safe to read beyond
the accessed region, enabling the use of a wider load (e.g., i32) for
all other N-1 iterations.

Patterns such as:
```
  %a = load i8, ptr %p
  %b = load i8, ptr %p+1
  %c = load i8, ptr %p+2
  ...
  %p.next = getelementptr i8, ptr %p, 3
```

Can be transformed to:
```
  %wide = load i32, ptr %p  ; Read 4 bytes

    [9 lines not shown]
DeltaFile
+616-0llvm/test/Transforms/LoopUnroll/peel-last-iteration-load-widening.ll
+230-1llvm/lib/Transforms/Utils/LoopPeel.cpp
+104-0llvm/test/Transforms/LoopUnroll/peel-last-iteration-load-widening-be.ll
+24-10llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
+10-8llvm/include/llvm/Transforms/Utils/UnrollLoop.h
+7-1llvm/include/llvm/Transforms/Utils/LoopPeel.h
+991-206 files

LLVM/project 0812f41clang/lib/Format TokenAnnotator.cpp, clang/unittests/Format FormatTest.cpp

[clang-format] Don't crash on incomplete template declaration (#173433)

DeltaFile
+6-4clang/lib/Format/TokenAnnotator.cpp
+2-0clang/unittests/Format/FormatTest.cpp
+8-42 files

LLVM/project 5254894llvm/lib/IR Instructions.cpp

address review comments
DeltaFile
+2-2llvm/lib/IR/Instructions.cpp
+2-21 files

NetBSD/pkgsrc XyX6Tmddoc CHANGES-2025

   doc: Updated x11/kitty to 0.45.0
VersionDeltaFile
1.7371+2-1doc/CHANGES-2025
+2-11 files

NetBSD/pkgsrc twJ0JCJx11/kitty distinfo go-modules.mk

   kitty: update to 0.45.0

   - new kitten `choose-files` command
     - a system-wide fuzzy search program
   - Add support for the paste events protocol
   - icat kitten: Add support for animated PNG and animated WebP, netPBM
     images, ICC color profiles and CCIP color space metadata to the
     builtin engine
   - icat kitten: Add a new flag kitty +kitten icat --fit to control how
     images are scaled to fit the screen
   - icat kitten: The kitty +kitten icat --scale-up flag now takes
     effect when not using kitty +kitten icat --place as well
   - Add a mappable action copy_last_command_output to copy the output
     of the last command to the clipboard
   - ssh kitten: Fix a bug where automatic login was not working
   - goto_session: allow specifying a directory to select a session
     file from the directory
   - many bug fixes
VersionDeltaFile
1.37+88-64x11/kitty/distinfo
1.16+29-21x11/kitty/go-modules.mk
1.35+4-11x11/kitty/PLIST
1.78+2-3x11/kitty/Makefile
+123-994 files

LLVM/project 98be349mlir/lib/CAPI/Dialect Complex.cpp

[MLIR] quick fix errors introduced in #173228 (#173474)

My bad, I thought that the build was being run for PRs, everything
succeeded and didn't test out on local.

Now main branch is throwing these errors on CI:

```
[490/2482] Building CXX object tools/mlir/lib/CAPI/Dialect/CMakeFiles/obj.MLIRCAPIComplex.dir/Complex.cpp.o
FAILED: tools/mlir/lib/CAPI/Dialect/CMakeFiles/obj.MLIRCAPIComplex.dir/Complex.cpp.o 
/usr/local/bin/c++ -DGTEST_HAS_RTTI=0 -DMLIR_CAPI_BUILDING_LIBRARY=1 -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/stage1/tools/mlir/lib/CAPI/Dialect -I/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/llvm/mlir/lib/CAPI/Dialect -I/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/stage1/tools/mlir/include -I/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/llvm/mlir/include -I/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/stage1/include -I/home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/llvm/llvm/include -mcpu=neoverse-v2 -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -Wundef -Werror=mismatched-tags -O3 -DNDEBUG -std=c++17 -fvisibility=hidden  -fno-exceptions -funwind-tables -fno-rtti -UNDEBUG -MD -MT tools/mlir/lib/CAPI/Dialect/CMakeFiles/obj.MLIRCAPIComplex.dir/Complex.cpp.o -MF tools/mlir/lib/CAPI/Dialect/CMakeFiles/obj.MLIRCAPIComplex.dir/Complex.cpp.o.d -o tools/mlir/lib/CAPI/Dialect/CMakeFiles/obj.MLIRCAPIComplex.dir/Complex.cpp.o -c /home/tcwg-buildbot/worker/clang-aarch64-sve2-vla/llvm/mlir/lib/CAPI/Dialect/Complex.cpp
../llvm/mlir/lib/CAPI/Dialect/Complex.cpp:15:45: error: no member named 'complex' in namespace 'mlir'
   15 |                                       mlir::complex::ComplexDialect)
      |                                       ~~~~~~^
../llvm/mlir/include/mlir/CAPI/Registration.h:39:30: note: expanded from macro 'MLIR_DEFINE_CAPI_DIALECT_REGISTRATION'
   39 |     unwrap(registry)->insert<ClassName>();                                     \
      |                              ^~~~~~~~~
../llvm/mlir/lib/CAPI/Dialect/Complex.cpp:15:45: error: no member named 'complex' in namespace 'mlir'
   15 |                                       mlir::complex::ComplexDialect)

    [52 lines not shown]
DeltaFile
+6-3mlir/lib/CAPI/Dialect/Complex.cpp
+6-31 files

FreeBSD/ports da13875databases/py-redisvl distinfo Makefile

databases/py-redisvl: Update to 0.13.2

Changelog:
- https://github.com/redis/redis-vl-python/releases/tag/v0.13.0
- https://github.com/redis/redis-vl-python/releases/tag/v0.13.2

Reported by:    portscout
DeltaFile
+3-3databases/py-redisvl/distinfo
+2-2databases/py-redisvl/Makefile
+5-52 files

NetBSD/pkgsrc-wip 159da01labwc Makefile, labwc/files startlabwc.sh.in

labwc: add dbus dependency
DeltaFile
+3-1labwc/files/startlabwc.sh.in
+1-0labwc/Makefile
+4-12 files

HardenedBSD/src 2ce6ccaetc/mtree BSD.tests.dist, sys/fs/unionfs union_subr.c union_vnops.c

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+168-0sys/fs/unionfs/union_subr.c
+165-0tests/sys/fs/unionfs/unionfs_test.sh
+10-0sys/fs/unionfs/union_vnops.c
+8-0tests/sys/fs/unionfs/Makefile
+2-0etc/mtree/BSD.tests.dist
+1-0tests/sys/fs/Makefile
+354-01 files not shown
+355-07 files

FreeBSD/ports a6358ddsecurity/openssl-oqsprovider distinfo Makefile

security/openssl-oqsprovider: Update to 0.11.0
DeltaFile
+3-3security/openssl-oqsprovider/distinfo
+1-2security/openssl-oqsprovider/Makefile
+4-52 files

HardenedBSD/ports a6358ddsecurity/openssl-oqsprovider distinfo Makefile

security/openssl-oqsprovider: Update to 0.11.0
DeltaFile
+3-3security/openssl-oqsprovider/distinfo
+1-2security/openssl-oqsprovider/Makefile
+4-52 files

OpenBSD/src l7ePwfEsys/dev/vmm vmm.c

   Fix vmm(4) id assignment in vm_create.

   My recent changes to fix race conditions confused vmm's global vm
   counter with the always-incrementing index used for identifying new
   vm's. This caused id collision resulting in vmd(8) not cleanly
   rebooting vm's.

   Reported by bluhm@.

   ok bluhm@, mlarkin@
VersionDeltaFile
1.10+7-8sys/dev/vmm/vmm.c
+7-81 files

OpenBSD/src aJ34Eqjsys/arch/arm64/conf GENERIC RAMDISK

   Enable sdhc at pci
VersionDeltaFile
1.310+2-1sys/arch/arm64/conf/GENERIC
1.237+2-1sys/arch/arm64/conf/RAMDISK
+4-22 files

OpenBSD/src Euvl3WFsys/dev/pci sdhc_pci.c, sys/dev/sdmmc sdhcvar.h

   Add support for the Genesys Logic GL9755 SDHC controller.  This includes
   the SDHC controller found on some of the Apple Silicon laptops.

   ok stsp@, mlarkin@
VersionDeltaFile
1.28+177-3sys/dev/pci/sdhc_pci.c
1.18+3-1sys/dev/sdmmc/sdhcvar.h
+180-42 files

LLVM/project 7c48d5ellvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 arm64-cvtf-simd-intrinsics.ll

[AArch64][llvm] Add codegen for simd fpcvt intrinsics

Add tablegen patterns to provide codegen for SCVTF and UCVTF
operating purely on SIMD & FP registers, using explicit bitcasts.
DeltaFile
+12-24llvm/test/CodeGen/AArch64/arm64-cvtf-simd-intrinsics.ll
+20-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+32-242 files

LLVM/project 4c95f57llvm/test/CodeGen/AArch64 arm64-cvtf-simd-intrinsics.ll

[AArch64][llvm] Pre-commit tests for new fpcvt codegen
DeltaFile
+134-0llvm/test/CodeGen/AArch64/arm64-cvtf-simd-intrinsics.ll
+134-01 files

LLVM/project e903f68bolt README.md

[BOLT][Docs] Add instructions to run all tests. (#172847)

DeltaFile
+29-0bolt/README.md
+29-01 files

FreeBSD/ports a0bf1d4sysutils/rocinante distinfo Makefile

sysutils/rocinante: Update 1.0.20250714 => 1.1.0.251222

Changelogs:
https://github.com/BastilleBSD/rocinante/releases/tag/1.0.1.251120
https://github.com/BastilleBSD/rocinante/releases/tag/1.1.0.251222

PR:             291884
Approved by:    Christer Edwards <christer.edwards at gmail.com> (maintainer)
DeltaFile
+3-3sysutils/rocinante/distinfo
+1-1sysutils/rocinante/Makefile
+4-42 files

HardenedBSD/ports a0bf1d4sysutils/rocinante distinfo Makefile

sysutils/rocinante: Update 1.0.20250714 => 1.1.0.251222

Changelogs:
https://github.com/BastilleBSD/rocinante/releases/tag/1.0.1.251120
https://github.com/BastilleBSD/rocinante/releases/tag/1.1.0.251222

PR:             291884
Approved by:    Christer Edwards <christer.edwards at gmail.com> (maintainer)
DeltaFile
+3-3sysutils/rocinante/distinfo
+1-1sysutils/rocinante/Makefile
+4-42 files

LLVM/project 64f169cclang/test/CodeGenOpenCL builtins-amdgcn-fp-atomics-gfx908-err.cl

Fix error in test builtins-amdgcn-fp-atomics-gfx908-err.cl
DeltaFile
+1-1clang/test/CodeGenOpenCL/builtins-amdgcn-fp-atomics-gfx908-err.cl
+1-11 files

LLVM/project 61659b1bolt README.md

Drop clang-tools-extra
DeltaFile
+1-1bolt/README.md
+1-11 files

LLVM/project 74e1d74llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Add "PhysicalRegisterUsageAnalysis" once
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+1-4llvm/include/llvm/Passes/CodeGenPassBuilder.h
+4-72 files

LLVM/project 7f0a4edllvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Enable "AMDGPURewriteAGPRCopyMFMAPass"
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+4-22 files

LLVM/project 46e5d19llvm/lib/CodeGen LiveIntervals.cpp

[CodeGen][NPM] dump slot index info with -debug while running LiveIntervals
DeltaFile
+4-2llvm/lib/CodeGen/LiveIntervals.cpp
+4-21 files

LLVM/project 0fd7472llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp

[AMDGPU][NPM] Obey "enable-amdgpu-aa" option
DeltaFile
+2-1llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+2-11 files