LLVM/project 8d2d8bellvm/include/llvm/IR MDBuilder.h, llvm/lib/IR MDBuilder.cpp

[profcheck] Expose likely/unlikely weights as constants in MDBuilder (#183252)

Define `kLikelyBranchWeight` and `kUnlikelyBranchWeight` as static
constexpr members in MDBuilder.h and use them in
createLikelyBranchWeights and createUnlikelyBranchWeights. This makes
the weights used for likely/unlikely branches more discoverable and
reusable.

Co-authored-by: Jin Huang <jingold at google.com>
DeltaFile
+14-0llvm/include/llvm/IR/MDBuilder.h
+2-2llvm/lib/IR/MDBuilder.cpp
+16-22 files

LLVM/project 19128bfutils/bazel/llvm-project-overlay/libc BUILD.bazel libc_build_rules.bzl

[bazel][libc] Add some deps for layering_check (#183235)

This adds a whole bunch of deps to get things _mostly_ building w/
`layering_check` enabled. It does not yet enable `layering_check`.

I used some tools to add deps to all these targets that break when
enabling the layering check feature, and a few things were added in
between when I ran the script and where trunk is at now. Since this is a
large change, I plan to do a second (and possibly third) pass later to
catch those new changes, at which point it would be safer to actually
enable `layering_check` for this package.
DeltaFile
+1,288-141utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+5-1utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
+1,293-1422 files

LLVM/project a450e16clang/lib/CodeGen/TargetBuiltins ARM.cpp

[clang][ARM] Refactor argument handling in `EmitAArch64BuiltinExpr` (3/N) (NFC)

Remove the outstanding calls to `EmitScalarExpr` in
`EmitAArch64BuiltinExpr` that are no longer required.

This is a follow-up for #181794 and #181974 - please refer to that PR
for more context.
DeltaFile
+32-65clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+32-651 files

FreeBSD/ports 4cc6370www/py-django-tree-queries distinfo Makefile

www/py-django-tree-queries: Update to 0.23.1

Changelog:

https://github.com/feincms/django-tree-queries/blob/0.23.1/CHANGELOG.rst
DeltaFile
+3-3www/py-django-tree-queries/distinfo
+1-1www/py-django-tree-queries/Makefile
+4-42 files

FreeBSD/ports f6c9dbdtextproc/py-pymdown-extensions distinfo Makefile

textproc/py-pymdown-extensions: Update to 10.21

Changelog:

https://github.com/facelessuser/pymdown-extensions/releases/tag/10.21
DeltaFile
+3-3textproc/py-pymdown-extensions/distinfo
+1-1textproc/py-pymdown-extensions/Makefile
+4-42 files

FreeBSD/ports 8482a85www/py-drf-yasg distinfo Makefile

www/py-drf-yasg: Update to 1.21.15

Changelog:

https://github.com/axnsan12/drf-yasg/releases/tag/1.21.15
DeltaFile
+3-3www/py-drf-yasg/distinfo
+1-1www/py-drf-yasg/Makefile
+4-42 files

FreeBSD/ports 350d216textproc/py-mkdocs-material distinfo Makefile

textproc/py-mkdocs-material: Update to 9.7.3

Changelog:

https://github.com/squidfunk/mkdocs-material/releases/tag/9.7.3
DeltaFile
+3-3textproc/py-mkdocs-material/distinfo
+1-1textproc/py-mkdocs-material/Makefile
+4-42 files

FreeBSD/ports f59ddaadevel/py-inline-snapshot Makefile distinfo

devel/py-inline-snapshot: Update to 0.32.3

* Update testsuite while I'm here.

Changelog since 0.31.0:

https://github.com/15r10nk/inline-snapshot/blob/0.32.3/CHANGELOG.md
DeltaFile
+5-5devel/py-inline-snapshot/Makefile
+3-3devel/py-inline-snapshot/distinfo
+8-82 files

FreeNAS/freenas f718ad3tests/stig test_03_stig_auditing.py

Remove unstable test.
Test became unreliable after adding /etc as a 'watched' directory.
DeltaFile
+1-29tests/stig/test_03_stig_auditing.py
+1-291 files

LLVM/project d46089dclang/docs ReleaseNotes.rst, clang/lib/AST ASTContext.cpp

[clang] allow canonicalizing assumed template names

Assumed template names are part of error recovery and encode just a
declaration name, making them always canonical. This patch allows
them to be canonicalized, which is trivial.

Fixes #183075
DeltaFile
+13-0clang/test/SemaTemplate/GH183075.cpp
+5-2clang/lib/AST/ASTContext.cpp
+1-0clang/docs/ReleaseNotes.rst
+19-23 files

LLVM/project 5eb307eclang/include/clang/AST Decl.h, clang/lib/AST Decl.cpp

[clang][TypePrinter][NFC] Extract logic that handles AnonymousTagNameStyle::SourceLocation into helper function (#183304)

In https://github.com/llvm/llvm-project/pull/168533 we're adding a new
`AnonymousTagMode` and will be handled in `printAnonymousTagDecl`.

This patch extracts the logic that handles
`AnonymousTagNameStyle::SourceLocation` into a helper function to make
`printAnonymousTagDecl` easier to follow.

Drive-by changes:
* While copying the code into the helper I changed it to use
early-return style.
DeltaFile
+26-22clang/lib/AST/Decl.cpp
+3-0clang/include/clang/AST/Decl.h
+29-222 files

FreeNAS/freenas bc744b0src/middlewared/middlewared/api/v26_0_0 smb.py

Add up / down api version
DeltaFile
+12-0src/middlewared/middlewared/api/v26_0_0/smb.py
+12-01 files

LLVM/project 787ba24clang/docs ReleaseNotes.rst, clang/lib/Sema SemaTemplateDeduction.cpp

[clang] create local instantiation scope for matching template template parameters (#183219)

This fixes a bug where a partial substitution from the enclosing scope
is used to prepopulate an unrelated template argument deduction.

Fixes #181166
DeltaFile
+7-0clang/test/SemaTemplate/temp_arg_template_p0522.cpp
+4-2clang/docs/ReleaseNotes.rst
+2-0clang/lib/Sema/SemaTemplateDeduction.cpp
+13-23 files

LLVM/project 3d25128lldb/docs index.rst, lldb/source/Plugins/Process/FreeBSD-Kernel-Core RegisterContextFreeBSDKernelCore_arm.cpp RegisterContextFreeBSDKernelCore_arm.h

[lldb][Process/FreeBSDKernel] Add arm support (#180674)

This is LLDB version of
https://cgit.freebsd.org/ports/tree/devel/gdb/files/kgdb/arm-fbsd-kern.c.
This enables selecting arm and reading registers from PCB structure on
core dump and live kernel debugging while trapframe unwinding support
will be implemented in future. Test files using core dump from arm will
be implemented once other kernel debugging improvements are done.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+102-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_arm.cpp
+41-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/RegisterContextFreeBSDKernelCore_arm.h
+7-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ThreadFreeBSDKernelCore.cpp
+1-1lldb/docs/index.rst
+1-0lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
+1-0llvm/docs/ReleaseNotes.md
+153-16 files

FreeNAS/freenas 8189d17src/middlewared/middlewared/plugins/truenas_connect heartbeat.py finalize_registration.py

Update heartbeat so we update registration details as well
DeltaFile
+20-9src/middlewared/middlewared/plugins/truenas_connect/heartbeat.py
+1-1src/middlewared/middlewared/plugins/truenas_connect/finalize_registration.py
+21-102 files

LLVM/project e77f11cllvm/include/llvm/CodeGen TargetRegisterInfo.h, llvm/lib/CodeGen TargetRegisterInfo.cpp

[NFC][RegisterInfoEmitter] Add target name prefix for a few variables (#183074)

Add target name prefix for a few static global variables in the
generated code. Also rework the TargetRegisterInfo constructor a bit to
use a ArrayRef for array of register classes and rename a few
constructor arguments to match the member names they initialize.
DeltaFile
+38-43llvm/utils/TableGen/RegisterInfoEmitter.cpp
+14-11llvm/lib/CodeGen/TargetRegisterInfo.cpp
+8-6llvm/include/llvm/CodeGen/TargetRegisterInfo.h
+4-4llvm/test/TableGen/RegisterInfoEmitter-regcost-list.td
+4-4llvm/test/TableGen/RegisterInfoEmitter-regcost.td
+2-5llvm/unittests/CodeGen/MFCommon.inc
+70-731 files not shown
+73-767 files

FreeNAS/freenas ae6273esrc/middlewared/middlewared/plugins/truenas_connect utils.py finalize_registration.py

Have a util function to decode/validate given JWT token
DeltaFile
+16-0src/middlewared/middlewared/plugins/truenas_connect/utils.py
+4-11src/middlewared/middlewared/plugins/truenas_connect/finalize_registration.py
+20-112 files

LLVM/project 9d98151llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp

Capitalize again
DeltaFile
+63-61llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+63-611 files

LLVM/project de75b41llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp

Capitalize
DeltaFile
+41-41llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+41-411 files

LLVM/project 829cde3llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU llvm.exp10.f64.ll llvm.exp.f64.ll

AMDGPU: Implement expansion for f64 exp

I asked AI to port the device libs reference implementation.
It mostly worked, though it got the compares wrong and also
missed a fold that happened in compiler. With that fixed I get
identical DAG output, and almost the same globalisel output (differing
by an inverted compare and select). Also adjusted some stylistic choices.
DeltaFile
+11,178-0llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
+10,242-0llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
+9,987-0llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
+117-9llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+116-1llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+31-7llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+31,671-176 files not shown
+31,729-6512 files

FreeBSD/ports 3ac123cnet/asterisk20 Makefile distinfo, net/asterisk20/files extra-patch-addons_mp3_interface.c

net/asterisk20: Add MP3 Decoder Code for Format_MP3 support

Format_MP3, used to play MP3 encoded voicemail and music on hold, relies
on decoder library files that are not included in the main Asterisk
distribution.

PR:             292715
Tested by:      Marek Zarychta <zarychtam at plan-b.pwste.edu.pl>
Approved by:    Oleksandr Kryvulia <o.kryvulia at flex-it.com.ua>
Co-authored-by: Justin T. Gibbs <gibbs at FreeBSD.org>
DeltaFile
+13-1net/asterisk20/Makefile
+8-0net/asterisk20/files/extra-patch-addons_mp3_interface.c
+3-1net/asterisk20/distinfo
+24-23 files

FreeBSD/ports b2ad1b8lang/janet distinfo Makefile

lang/janet: update to 1.41.2

Differential Revision: https://reviews.freebsd.org/D55500
DeltaFile
+3-3lang/janet/distinfo
+1-1lang/janet/Makefile
+4-42 files

LLVM/project 5b7a906clang/lib/CodeGen/TargetBuiltins ARM.cpp

[clang][ARM] Refactor argument handling in `EmitAArch64BuiltinExpr` (3/N) (NFC)

Remove the outstanding calls to `EmitScalarExpr` in
`EmitAArch64BuiltinExpr` that are no longer required.

This is a follow-up for #181794 and #181974 - please refer to that PR
for more context.
DeltaFile
+34-65clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+34-651 files

FreeNAS/freenas a464af6src/middlewared/middlewared/api/base/validators filter_ops.py, src/middlewared/middlewared/utils tdb.py filter_list.py

More utils typing hints
DeltaFile
+53-36src/middlewared/middlewared/utils/tdb.py
+21-21src/middlewared/middlewared/utils/filter_list.py
+20-19src/middlewared/middlewared/utils/mdns.py
+11-10src/middlewared/middlewared/api/base/validators/filter_ops.py
+9-8src/middlewared/middlewared/utils/auth.py
+7-7src/middlewared/middlewared/utils/crypto.py
+121-1014 files not shown
+134-11310 files

LLVM/project cb9f3eellvm/lib/Target/SPIRV SPIRVSubtarget.cpp, llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space non-constant-printf.ll

[SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (#183103)

It's easy to hit the address space limitation when using printf locally,
so just enable the extension by default for Intel.

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
DeltaFile
+4-1llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
+1-0llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_relaxed_printf_string_address_space/non-constant-printf.ll
+5-12 files

FreeNAS/freenas aa36a4csrc/middlewared/middlewared/plugins/apps logs.py

Convert app container log timestamps to system timezone

This commit fixes an issue where app container log timestamps were displayed in UTC (Docker's default behavior). They are now converted to the system's configured timezone before being sent to the UI, using the stdlib zoneinfo module.
DeltaFile
+4-1src/middlewared/middlewared/plugins/apps/logs.py
+4-11 files

FreeNAS/freenas fc94b25src/middlewared/middlewared/api/base/validators filter_ops.py, src/middlewared/middlewared/utils tdb.py filter_list.py

More utils typing hints
DeltaFile
+53-36src/middlewared/middlewared/utils/tdb.py
+19-19src/middlewared/middlewared/utils/filter_list.py
+15-14src/middlewared/middlewared/utils/mdns.py
+11-10src/middlewared/middlewared/api/base/validators/filter_ops.py
+9-8src/middlewared/middlewared/utils/auth.py
+7-7src/middlewared/middlewared/utils/crypto.py
+114-944 files not shown
+127-10610 files

LLVM/project 8bbb24ecompiler-rt/lib/builtins/arm/thumb1 fcmp.h cmpsf2.S

Rename Thumb1 SetResultRegister to ReturnResult

Also remove the return instructions following it in the main macro,
which aren't needed, since it does the returning itself.
DeltaFile
+10-14compiler-rt/lib/builtins/arm/thumb1/fcmp.h
+1-1compiler-rt/lib/builtins/arm/thumb1/cmpsf2.S
+1-1compiler-rt/lib/builtins/arm/thumb1/gesf2.S
+12-163 files

LLVM/project a498580clang/docs LifetimeSafety.rst index.rst

Apply changes from code browser

Apply changes from code browser
DeltaFile
+296-154clang/docs/LifetimeSafety.rst
+1-0clang/docs/index.rst
+297-1542 files

LLVM/project 6e9fdd3llvm/lib/Transforms/InstCombine InstCombineLoadStoreAlloca.cpp, llvm/lib/Transforms/Utils Local.cpp

[InstCombine] Replace alloca with undef size with poison instead of null

When an alloca instruction has an undef (or poison) array size, InstCombine
was previously replacing all uses of the alloca with a null pointer. This
caused invalid IR when the alloca was used by @llvm.lifetime intrinsics.

According to the @llvm.lifetime intrinsic specification, the pointer
argument must be either:
  - A pointer to an alloca instruction, or
  - A poison value

Since null is neither an alloca pointer nor poison, the previous
transformation violated the intrinsic's requirements and produced
invalid IR.

Fix by replacing the alloca with a poison value instead of null, which
satisfies the @llvm.lifetime requirements and produces valid IR.
DeltaFile
+32-0llvm/test/Transforms/InstCombine/alloca-poison-size.ll
+0-30llvm/test/Transforms/InstCombine/invalid-alloca-poison-size.ll
+0-4llvm/lib/Transforms/Utils/Local.cpp
+1-1llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+33-354 files