LLVM/project bdd7b4cflang/lib/Semantics resolve-names.cpp, flang/test/Semantics entry01.f90

[Flang][Semantics] Throw diagnostics for identical entry and result names. (#198500)

Fixes https://github.com/llvm/llvm-project/issues/198499

In flang entry name and result names cannot be same as per
[C1583](https://j3-fortran.org/doc/year/25/25-007r1.pdf).
Previously, Flang did not diagnose cases where the ENTRY name and RESULT
name were identical, e.g.
```
 function m1f1()
  integer :: m1f1
  real :: m1f1e1
  m1f1 = 0
  entry m1f1e1() result(m1f1e1)
  m1f1e1 = 0.1
end function
```
DeltaFile
+8-2flang/lib/Semantics/resolve-names.cpp
+2-1flang/test/Semantics/entry01.f90
+10-32 files

LLVM/project b8c18e9mlir/lib/Conversion/ArithToLLVM ArithToLLVM.cpp, mlir/test/Conversion/ArithToLLVM arith-to-llvm.mlir

[mlir][ArithToLLVM] Lower arith.subui_extended (#197737)
DeltaFile
+49-0mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
+24-0mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
+73-02 files

LLVM/project ee1fe94mlir/lib/Dialect/Arith/Transforms EmulateWideInt.cpp, mlir/test/Dialect/Arith emulate-wide-int.mlir

[mlir][arith] Use subui_extended in wide integer emulation of subi (#197762)
DeltaFile
+10-14mlir/test/Dialect/Arith/emulate-wide-int.mlir
+9-9mlir/lib/Dialect/Arith/Transforms/EmulateWideInt.cpp
+19-232 files

LLVM/project 364a883clang/lib/Driver/ToolChains Flang.cpp, flang/test/Driver frelaxed-c-loc-checks.f90

[Flang] Fix -frelaxed-c-loc-checks being ignored when using the driver (#200733)

`-frelaxed-c-loc-checks` worked correctly when passed directly to -fc1,
but was silently ignored when using the driver (e.g., flang -c
-frelaxed-c-loc-checks), causing the flag to go unused. This patch fixes
it by adding `OPT_relaxed_c_loc` to the `addAllArgs` call in Flang.cpp
Also extend the existing test with a driver-mode RUN line to cover this
path.
DeltaFile
+4-0flang/test/Driver/frelaxed-c-loc-checks.f90
+2-1clang/lib/Driver/ToolChains/Flang.cpp
+6-12 files

LLVM/project b8cc594mlir/include/mlir/Conversion Passes.td, mlir/lib/Conversion/TosaToSPIRVTosa TosaToSPIRVTosaConstants.cpp TosaToSPIRVTosaPass.cpp

[mlir][spirv] Add TOSA graph constant marking (#201095)

Add a TOSA to SPIR-V TOSA preprocessing pass that marks large tosa.const
and tosa.const_shape operations for lowering to spirv.ARM.GraphConstant.

Keep small constants inline as spirv.Constant, assign graph constant IDs
with a grapharm-prefixed marker attribute, and teach the existing
constant conversion to use the marker when present.

Expose the grapharm source-side attribute names used for interface ABI
annotations and graph constant IDs.

Add tests for marking large constants, leaving small constants unmarked,
increasing graph constant IDs across mixed constants, and lowering
pre-marked constants to spirv.ARM.GraphConstant.

Signed-off-by: Davide Grohmann <davide.grohmann at arm.com>
DeltaFile
+92-0mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaConstants.cpp
+48-0mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
+23-1mlir/lib/Conversion/TosaToSPIRVTosa/TosaToSPIRVTosaPass.cpp
+23-0mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-invalid.mlir
+18-0mlir/test/Conversion/TosaToSPIRVTosa/tosa-to-spirv.mlir
+14-2mlir/include/mlir/Conversion/Passes.td
+218-35 files not shown
+256-1011 files

LLVM/project 192c013llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 dup.ll

[AArch64] Fix DUP-of-extload combine to ignore chain uses (#201351)

The original combine bailed when the load had more than one use, but
counted chain uses too.
DeltaFile
+6-6llvm/test/CodeGen/AArch64/dup.ll
+1-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+7-72 files

LLVM/project 3192648orc-rt/include/orc-rt NativeDylibManager.h, orc-rt/lib/executor NativeDylibManager.cpp

[orc-rt] Make NativeDylibManager::lookup return optional addresses. (#201519)

NativeDylibManager::lookup used to return (asynchronously) a vector of
void *s where null represented not-present. This commit updates it to
return a vector of std::optional<void *>s where std::nullopt represents
not-present and an address of zero indicates that the symbol is present
with an address of zero.

This matches the resolve semantics of SimpleExecutorDylibManager,
completing the alignment of the two implementations after the earlier
additions of the Mode argument to load() and the
required/weakly-referenced flag on lookup symbols.
DeltaFile
+32-18orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
+28-17orc-rt/unittests/NativeDylibManagerTest.cpp
+8-16orc-rt/lib/executor/NativeDylibManager.cpp
+15-5orc-rt/lib/executor/Unix/NativeDylibAPIs.inc
+6-4orc-rt/include/orc-rt/NativeDylibManager.h
+1-1orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
+90-616 files

LLVM/project 5f517ddmlir/include/mlir/Dialect/XeGPU/IR XeGPUOps.td XeGPUTypes.td, mlir/lib/Dialect/XeGPU/IR XeGPUOps.cpp

[MLIR][XeGPU] Extend op definitions to support    3D+: dpas, dpas_mx (#199809)

**Summary**

Extend xegpu.dpas and xegpu.dpas_mx operations to support 3D and 4D
operands with batch dimensions, enabling batched matrix multiplication
workloads like [4, 128, 512] x [4, 512, 128] -> [4, 128, 128].

  **Changes**

- Type definitions: Extended XeGPU_DpasOprType and XeGPU_DpasResType to
support rank 3-4 (previously 1-3 and 1-2)
- Op definitions: Extended dpas_mx scale operands to support rank 3-4
vectors
- Verifiers: Updated verifyDpasDimensions() to validate batch dimensions
across A, B, and result operands; updated DpasMxOp::verify() for
batch-aware scale dimension checks
- Documentation: Added comprehensive documentation explaining batch
dimensions, microarchitecture-specific matrix sizes, and 3D/4D usage

    [7 lines not shown]
DeltaFile
+72-31mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
+52-14mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
+12-12mlir/test/Dialect/XeGPU/invalid.mlir
+21-0mlir/test/Dialect/XeGPU/ops.mlir
+2-2mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
+159-595 files

LLVM/project c007d1eclang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Track per-field origins for record types
DeltaFile
+315-5clang/test/Sema/warn-lifetime-safety.cpp
+68-37clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+91-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+17-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+4-6clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+0-1clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+495-556 files

LLVM/project 6adf0d0clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp LiveOrigins.cpp

[LifetimeSafety][NFC] Add field-labeled child edges to OriginNode and generalize subtree walks
DeltaFile
+56-24clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+26-10clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+21-12clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+3-2clang/lib/Analysis/LifetimeSafety/Origins.cpp
+3-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+1-0clang/lib/Analysis/LifetimeSafety/Facts.cpp
+110-486 files

LLVM/project d07994eclang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety][NFC] Refactor OriginList to OriginNode tree
DeltaFile
+138-139clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+42-30clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+38-30clang/lib/Analysis/LifetimeSafety/Origins.cpp
+6-6clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+5-6clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+3-3clang/unittests/Analysis/LifetimeSafetyTest.cpp
+232-2143 files not shown
+241-2239 files

LLVM/project a60bad7clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety Origins.cpp

[LifetimeSafety][NFC] Collect accessed fields in a unified pre-scan
DeltaFile
+22-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+15-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+37-122 files

LLVM/project 4695c84mlir/include/mlir/Dialect/XeGPU/IR XeGPUOps.td, mlir/lib/Dialect/XeGPU/IR XeGPUOps.cpp

[MLIR][XeGPU] Extend op definitions to support 3D+: load_nd, store_nd, prefetch_nd (#199811)

**Summary**
Extend xegpu.load_nd, xegpu.store_nd, and xegpu.prefetch_nd operations
to support 3D and higher-dimensional tensor descriptors with batch
dimensions, enabling batched memory operations for workloads like [4, 8,
16] tensor loads/stores.

  **Changes**
- Verifiers: Removed rank > 2 checks in LoadNdOp::verify() and
StoreNdOp::verify() to allow 3D+ tensor descriptors
- Documentation: Added comprehensive documentation explaining: Tensor
descriptors can be 1D, 2D, 3D, or higher dimensional; Batch dimensions
(leading dimensions) are unrolled to unit dimensions during lowering;
Operations execute at 2D granularity at subgroup level to match 2D block
IO hardware; Examples of 3D operations
- Tests: Added unit tests for 3D operations (load_nd_3d, store_nd_3d,
prefetch_nd_3d)


    [2 lines not shown]
DeltaFile
+61-12mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
+29-0mlir/test/Dialect/XeGPU/ops.mlir
+0-17mlir/test/Dialect/XeGPU/invalid.mlir
+0-6mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
+90-354 files

LLVM/project e75e96allvm/lib/Target/AArch64/GISel AArch64PostLegalizerLowering.cpp, llvm/test/CodeGen/AArch64 cmp-to-cmn.ll fpclamptosat_vec.ll

[AArch64][GlobalISel] Port shouldBeAdjustedToZero to GlobalISel (#195941)
DeltaFile
+80-200llvm/test/CodeGen/AArch64/cmp-to-cmn.ll
+115-64llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+56-80llvm/test/CodeGen/AArch64/fpclamptosat_vec.ll
+27-15llvm/test/CodeGen/AArch64/arm64-csel.ll
+12-12llvm/test/CodeGen/AArch64/fcvt-i256.ll
+8-8llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
+298-3793 files not shown
+310-3909 files

LLVM/project cdf26f6llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV srem-vector-lkk.ll div-by-constant.ll

[RISCV] Fold (add X, (mulhs X, C)) -> (mulhsu X, C) if C is negative. (#199287)

Improves some division by constant cases.

Based on this blog post
https://needlesscomplexity.substack.com/p/implementing-division-by-multiplying

Correctness proof is sketched out in the comments.
DeltaFile
+109-135llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
+34-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+6-5llvm/test/CodeGen/RISCV/div-by-constant.ll
+2-4llvm/test/CodeGen/RISCV/srem-lkk.ll
+151-1444 files

LLVM/project 4e41042clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Track per-field origins for record types
DeltaFile
+315-5clang/test/Sema/warn-lifetime-safety.cpp
+68-37clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+91-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+17-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+4-6clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+0-1clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+495-556 files

LLVM/project 2c4f01fclang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp LiveOrigins.cpp

[LifetimeSafety][NFC] Add field-labeled child edges to OriginNode and generalize subtree walks
DeltaFile
+56-24clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+26-10clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+21-12clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+3-2clang/lib/Analysis/LifetimeSafety/Origins.cpp
+3-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+1-0clang/lib/Analysis/LifetimeSafety/Facts.cpp
+110-486 files

LLVM/project 1a7662cclang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety Origins.cpp

[LifetimeSafety][NFC] Collect accessed fields in a unified pre-scan
DeltaFile
+22-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+15-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+37-122 files

LLVM/project c17f620llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange reduction2mem-extra-lcssa.ll

[LoopInterchange] Check all inner-exit LCSSA PHIs (#200860)

areInnerLoopExitPHIsSupported() returned true as soon as it saw the
reduction LCSSA PHI, skipping the user-check for any later LCSSA PHIs.
If one had a non-PHI user, legality wrongly succeeded and the transform
hit a cast<PHINode> assertion. Use continue so the remaining PHIs are
still validated.

Fixes #200811.
DeltaFile
+82-0llvm/test/Transforms/LoopInterchange/reduction2mem-extra-lcssa.ll
+3-1llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+85-12 files

LLVM/project 4a77ce7llvm/lib/CodeGen SplitKit.cpp, llvm/test/CodeGen/AMDGPU splitkit-getsubrangeformask-phi-extend.ll

[CodeGen][AMDGPU] Remove premature empty subrange elimination (#201263)

This commit removes a call to `removeEmptySubRanges` inside
`SplitEditor::rewriteAssigned` which removes empty subranges that may be
expected at a later stage. The empty subranges are eliminated by a later
call to `removeEmptySubRanges`.

Fixes https://github.com/llvm/llvm-project/issues/199337.

---------

Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
DeltaFile
+1,730-0llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
+0-1llvm/lib/CodeGen/SplitKit.cpp
+1,730-12 files

LLVM/project 36e714bllvm/lib/ExecutionEngine/Orc EPCGenericDylibManager.cpp EPCDynamicLibrarySearchGenerator.cpp, llvm/lib/ExecutionEngine/Orc/TargetProcess ExecutorResolver.cpp SimpleExecutorDylibManager.cpp

[ORC] Replace ExecutorSymbolDef with ExecutorAddr in remote lookup. (#201492)

Update DylibManager and associated interfaces to return ExecutorAddrs
for remote symbols, rather than ExecutorSymbolDefs. No clients were
using the flags component of ExecutorSymbolDef, and this brings the
SimpleExecutorDylibManager implementation in OrcTargetProcess into
closer alignment with the NativeDylibManager implementation in the new
ORC runtime.
DeltaFile
+3-6llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
+2-4llvm/lib/ExecutionEngine/Orc/TargetProcess/ExecutorResolver.cpp
+2-4llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
+2-2llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
+2-2llvm/lib/ExecutionEngine/Orc/ExecutorResolutionGenerator.cpp
+1-2llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleExecutorDylibManager.cpp
+12-205 files not shown
+17-2711 files

LLVM/project a53507fclang/lib/AST/ByteCode Interp.cpp Pointer.h, clang/test/AST/ByteCode cxx20.cpp

[clang][bytecode] Fix a crash with covariant return types (#201354)

`Context::collectBaseOffset()` will assert if the passed-in classes are
the same.
DeltaFile
+15-0clang/test/AST/ByteCode/cxx20.cpp
+6-0clang/lib/AST/ByteCode/Interp.cpp
+2-0clang/lib/AST/ByteCode/Pointer.h
+23-03 files

LLVM/project 9e7053bflang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP metadirective-loop.f90

Fix metadirective loop variant lowering

Preserve the associated DO evaluation when a dynamic metadirective can
select either a loop-associated directive or a standalone fallback, so
the fallback still lowers the original loop body.

Scope temporary loop-IV data-sharing attributes to the selected variant.
Use the selected variant's collapse clause to determine how many loop IVs
to mark, avoiding DSA state leaking between alternatives.
DeltaFile
+84-23flang/lib/Lower/OpenMP/OpenMP.cpp
+49-1flang/test/Lower/OpenMP/metadirective-loop.f90
+133-242 files

LLVM/project 1476d8bflang/lib/Lower/OpenMP OpenMP.cpp DataSharingProcessor.cpp, flang/test/Lower/OpenMP metadirective-loop.f90

[flang][OpenMP] Support loop-associated metadirective variants (part 3)

Enable metadirective lowering for loop-associated variants such as
`do`, `simd`, `parallel do`, and `do simd`.

When a metadirective resolves to a loop-associated directive, the
sibling DO evaluation is spliced into the metadirective's evaluation
list so existing loop lowering finds it. Loop IV data-sharing
attributes are marked at lowering time since semantic analysis cannot
know which variant will be selected. The DataSharingProcessor is also
extended to handle spliced evaluations.

This patch is part of the feature work for #188820 and stacked on top
of #194424.

Assisted with copilot and GPT-5.4
DeltaFile
+203-0flang/test/Lower/OpenMP/metadirective-loop.f90
+100-1flang/lib/Lower/OpenMP/OpenMP.cpp
+83-2flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
+15-0flang/test/Lower/OpenMP/Todo/metadirective-target-loop.f90
+14-0flang/lib/Lower/OpenMP/Utils.cpp
+12-0flang/test/Lower/OpenMP/Todo/metadirective-no-loop.f90
+427-32 files not shown
+429-158 files

LLVM/project 70256dfflang/lib/Lower/OpenMP OpenMP.cpp Utils.cpp, flang/test/Lower/OpenMP metadirective-user.f90

[flang][OpenMP] Support lowering of metadirective (part 2) (#194424)

Lower non-constant `user={condition(expr)}` selectors in OpenMP
metadirectives to a runtime `fir.if` / `else` selection cascade.

Dynamic user conditions are handled in two separate phases:

- Static applicability uses only selector traits that are known at
compile time.
- Guarded ranking preserves selector specificity and dynamic-condition
scores for the path where the runtime condition evaluates to true.

Lowering first filters candidates using compile-time selector traits,
then orders the remaining candidates with the normal OpenMP variant
ranking rules. If the selected candidate has a non-constant user
condition, that condition is emitted as a `fir.if` guard. When the
condition evaluates to false, the `else` branch continues selection
among the remaining candidates.


    [57 lines not shown]
DeltaFile
+460-1flang/test/Lower/OpenMP/metadirective-user.f90
+198-24flang/lib/Lower/OpenMP/OpenMP.cpp
+20-17flang/lib/Lower/OpenMP/Utils.cpp
+12-7flang/lib/Lower/OpenMP/Utils.h
+0-10flang/test/Lower/OpenMP/Todo/metadirective-dynamic.f90
+7-0flang/test/Semantics/OpenMP/metadirective-user.f90
+697-596 files

LLVM/project 9b89e88llvm/include/llvm/IR Intrinsics.td, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

[RFC][CodeGen] Add generic target feature checks for intrinsics

This PR adds target-independent infrastructure for annotating LLVM intrinsics
with required subtarget feature expressions.

It introduces a TargetFeatures string field to intrinsic TableGen records.
TableGen emits an intrinsic-to-feature mapping table.

Both SelectionDAG and GlobalISel now perform this check before lowering target
intrinsics. This allows targets to opt in by annotating intrinsic definitions
directly, rather than adding custom checks during lowering, legalization, or
instruction selection.

This PR uses one AMDGPU intrinsic as an example.
DeltaFile
+92-0llvm/lib/MC/MCSubtargetInfo.cpp
+51-0llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+33-1llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
+28-0llvm/test/TableGen/intrinsic-target-features.td
+24-0llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+13-0llvm/include/llvm/IR/Intrinsics.td
+241-110 files not shown
+278-516 files

LLVM/project 84085aamlir/lib/Dialect/Linalg/Transforms Specialize.cpp, mlir/test/Dialect/Linalg roundtrip-morphism-linalg-named-ops.mlir roundtrip-morphism-linalg-category-ops.mlir

[mlir][linalg] Improve contraction specialization (#201300)

Extend the matcher to recognize additional supported boolean contraction
form(and+or). Fixes #198235.
DeltaFile
+20-9mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
+18-0mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-named-ops.mlir
+16-0mlir/test/Dialect/Linalg/roundtrip-morphism-linalg-category-ops.mlir
+54-93 files

LLVM/project 97d7264llvm/lib/Transforms/IPO MemProfContextDisambiguation.cpp, llvm/test/ThinLTO/X86 memprof-icp-recursive.ll

[MemProf] Change default of memprof-icp-noinline-threshold to 0 (#201474)

This is no longer needed after PR172502 added support to identify
indirect callees from inlined frames.
DeltaFile
+7-7llvm/test/ThinLTO/X86/memprof-icp-recursive.ll
+1-1llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
+8-82 files

LLVM/project 9263a42clang/test/OpenMP target_codegen.cpp target_simd_codegen.cpp, llvm/include/llvm/Frontend/Offloading Utility.h

[OpenMP] Use ext linkage for kernels handles and globals handles keep… (#200964)

… linkage

Host handles are now emmitted with external linkage to clash if two
kernels with the same name are registered. This could have happen right
now and silently corrupt the program, but it can happen more easily once
we allow users to name their kernels.

In the same patch we make global variable handles retain the linkage of
the global variable, forcing clashes for external ones and continue to
support weak use cases.

---------

Co-authored-by: Shilei Tian <i at tianshilei.me>
DeltaFile
+11-11clang/test/OpenMP/target_codegen.cpp
+8-8mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
+8-8clang/test/OpenMP/target_simd_codegen.cpp
+7-6llvm/lib/Frontend/Offloading/Utility.cpp
+4-4llvm/include/llvm/Frontend/Offloading/Utility.h
+4-4clang/test/OpenMP/target_indirect_codegen.cpp
+42-4114 files not shown
+70-6820 files

LLVM/project f0d98c3clang-tools-extra/clang-tidy/readability FunctionSizeCheck.cpp FunctionSizeCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy][readability] Ignore macros in function-size check (#199549)

This patch adds an IgnoreMacros option to the readability-function-size
check.

Fixes https://github.com/llvm/llvm-project/issues/112835
DeltaFile
+71-0clang-tools-extra/test/clang-tidy/checkers/readability/function-size-ignore-macros.cpp
+27-10clang-tools-extra/clang-tidy/readability/FunctionSizeCheck.cpp
+5-0clang-tools-extra/docs/clang-tidy/checks/readability/function-size.rst
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+5-0clang-tools-extra/clang-tidy/readability/FunctionSizeCheck.h
+113-105 files