LLVM/project d0f5df1lldb/source/Plugins/Process/FreeBSD-Kernel-Core ProcessFreeBSDKernelCore.cpp

[lldb][Process/FreeBSDKernelCore] Remove interactive mode check (#187981)

`debugger.GetCommandInterpreter().IsInteractive()` doesn't necessarily
mean that the debugger is running without `-b` or `--batch` flag. This
caused an issue where the message isn't printed in any case. Remove the
check so the message is always printed for now.

Fixes: 9d9c7fc00bdddd72e78b19e9fbb6af9d07c2218b (#178027)

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+0-3lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
+0-31 files

LLVM/project 26fcbd5llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU][SIInsertWaitcnts] Fix counterOutOfOrder() check for LOAD_CNT (#187758)

This is a follow-up to @piotrAMD's comment in #178511 .  
`hasPendingEvent()` used to return an unsigned mask but this changed in
#178511 when this function started to return bool. This changed the
functionality of `counterOutOfOrder()` which was still using an unsigned
mask that was erroneously being assigned a boolean instead of the
expected mask.
DeltaFile
+3-3llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+3-31 files

LLVM/project 8443dfaclang/docs OpenMPSupport.rst

[OpenMP] Mark dyn_groupprivate support as partial for C/C++ (#186706)
DeltaFile
+1-3clang/docs/OpenMPSupport.rst
+1-31 files

LLVM/project e626f19clang/docs ReleaseNotes.rst, clang/include/clang/Basic DiagnosticCommonKinds.td

[Clang] [C++26] Expansion Statements (Part 11)
DeltaFile
+104-0clang/test/AST/ast-print-expansion-stmts.cpp
+49-0clang/test/AST/ast-dump-expansion-stmt.cpp
+0-4clang/include/clang/Basic/DiagnosticCommonKinds.td
+1-1clang/www/cxx_status.html
+1-0clang/docs/ReleaseNotes.rst
+155-55 files

LLVM/project cc3c4efclang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Options Options.td

[Clang] [C++26] Expansion Statements (Part 10)
DeltaFile
+69-0clang/test/SemaCXX/cxx2c-expansion-stmts-limit.cpp
+18-0clang/lib/Sema/SemaExpand.cpp
+9-0clang/test/SemaCXX/cxx2c-fexpansion-statements.cpp
+4-0clang/include/clang/Options/Options.td
+4-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+1-0clang/lib/Driver/ToolChains/Clang.cpp
+105-01 files not shown
+106-07 files

LLVM/project c60a4b5clang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema Sema.h

[Clang] [C++26] Expansion Statements (Part 5)
DeltaFile
+499-14clang/lib/Sema/SemaExpand.cpp
+71-0clang/lib/Sema/TreeTransform.h
+21-15clang/lib/Sema/SemaStmt.cpp
+12-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+12-0clang/include/clang/Sema/Sema.h
+615-295 files

LLVM/project c33d4dfclang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema ScopeInfo.h

[Clang] [C++26] Expansion Statements (Part 9)
DeltaFile
+117-0clang/test/SemaCXX/cxx2c-expansion-stmts-control-flow.cpp
+38-9clang/lib/Sema/SemaLookup.cpp
+28-2clang/lib/Sema/SemaStmt.cpp
+9-2clang/lib/Parse/ParseStmt.cpp
+6-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+5-1clang/include/clang/Sema/ScopeInfo.h
+203-141 files not shown
+205-157 files

LLVM/project e4abcd3clang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaExpand.cpp TreeTransform.h

[Clang] [C++26] Expansion Statements (Part 6)
DeltaFile
+105-6clang/lib/Sema/SemaExpand.cpp
+23-3clang/lib/Sema/TreeTransform.h
+2-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+130-93 files

LLVM/project be79eddclang/lib/Sema SemaExpand.cpp TreeTransform.h, clang/test/Parser cxx2c-expansion-statements.cpp

[Clang] [C++26] Expansion Statements (Part 3)
DeltaFile
+164-0clang/lib/Sema/SemaExpand.cpp
+86-4clang/lib/Sema/TreeTransform.h
+40-40clang/test/Parser/cxx2c-expansion-statements.cpp
+37-1clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+26-3clang/lib/Sema/SemaTemplateInstantiate.cpp
+5-15clang/test/SemaTemplate/GH176155.cpp
+358-634 files not shown
+388-6510 files

LLVM/project 2f67489clang/lib/CodeGen CGStmt.cpp, clang/test/CodeGenCXX cxx2c-enumerating-expansion-statements.cpp cxx2c-iterating-expansion-stmt.cpp

[Clang] [C++26] Expansion Statements (Part 8)
DeltaFile
+1,518-0clang/test/CodeGenCXX/cxx2c-enumerating-expansion-statements.cpp
+548-0clang/test/CodeGenCXX/cxx2c-iterating-expansion-stmt.cpp
+493-0clang/test/CodeGenCXX/cxx2c-destructuring-expansion-stmt.cpp
+429-0clang/test/CodeGenCXX/cxx2c-expansion-stmts-control-flow.cpp
+208-0clang/test/CodeGenCXX/cxx2c-expansion-stmts-templates.cpp
+40-1clang/lib/CodeGen/CGStmt.cpp
+3,236-12 files not shown
+3,245-38 files

LLVM/project 8f5fc6aclang/include/clang/Parse Parser.h, clang/include/clang/Sema Sema.h Scope.h

[Clang] [C++26] Expansion Statements (Part 4)
DeltaFile
+266-221clang/lib/Sema/SemaStmt.cpp
+2-83clang/include/clang/Parse/Parser.h
+11-44clang/lib/Parse/Parser.cpp
+48-3clang/include/clang/Sema/Sema.h
+40-1clang/include/clang/Sema/Scope.h
+20-17clang/lib/Parse/ParseStmt.cpp
+387-36915 files not shown
+538-45021 files

LLVM/project f364692clang/lib/AST ExprConstant.cpp, clang/lib/AST/ByteCode Compiler.cpp Compiler.h

[Clang] [C++26] Expansion Statements (Part 7)
DeltaFile
+1,472-0clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
+42-0clang/lib/AST/ByteCode/Compiler.cpp
+40-0clang/lib/AST/ExprConstant.cpp
+3-0clang/lib/Sema/SemaDeclCXX.cpp
+2-1clang/lib/AST/ByteCode/Compiler.h
+1,559-15 files

LLVM/project 9391ce9flang/test/Lower/Intrinsics poppar.f90 popcnt.f90

[flang][NFC] Converted five tests from old lowering to new lowering (part 38) (#188151)

Tests converted from test/Lower/Intrinsics: pack.f90, parity.f90,
popcnt.f90, poppar.f90, present.f90
DeltaFile
+50-41flang/test/Lower/Intrinsics/poppar.f90
+40-31flang/test/Lower/Intrinsics/popcnt.f90
+16-15flang/test/Lower/Intrinsics/pack.f90
+15-16flang/test/Lower/Intrinsics/parity.f90
+4-3flang/test/Lower/Intrinsics/present.f90
+125-1065 files

LLVM/project 7f25c92llvm/lib/Target/AMDGPU GCNVOPDUtils.cpp GCNPreRAOptimizations.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

AMDGPU: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3

For V_DOT2_F32_F16 and V_DOT2_F32_BF16 add pre-RA register allocation
hints to preferably assign dst and src2 to the same physical register.
When the hint is satisfied, canMapVOP3PToVOPD recognises the instruction
as eligible for VOPD pairing by checking if it is VOP2 like:
dst==src2, no source modifiers, no clamp, and src1 is a register.
Mark both instructions as commutable to allow a literal in src1 to be
moved to src0, since VOPD only permits a literal in src0.
DeltaFile
+258-592llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+75-93llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
+32-1llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
+24-0llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
+8-5llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+403-6911 files not shown
+405-6937 files

LLVM/project c1ea10aclang-tools-extra/clangd CMakeLists.txt, clang-tools-extra/clangd/remap RemapMain.cpp CMakeLists.txt

[clangd] Add background index path remapping tool (#185482)

Introduce a standalone tool to remap paths inside clangd background
index files. This allows users to pay the cost of generating a full
background index once, then reuse the background index across multiple
clients. Each client rewrites the background index in place after
copying the original, specifying the path(s) to be remapped.

This is an alternative approach to the dynamic path remapping proposed
in #180285.

Fixes clangd/clangd#847

Assisted-by: claude
DeltaFile
+345-0clang-tools-extra/clangd/remap/RemapMain.cpp
+18-0clang-tools-extra/clangd/test/remap.test
+17-0clang-tools-extra/clangd/remap/CMakeLists.txt
+1-0clang-tools-extra/clangd/CMakeLists.txt
+1-0clang-tools-extra/clangd/test/CMakeLists.txt
+382-05 files

LLVM/project b9ab9d9llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstrInfo.h, llvm/test/CodeGen/AMDGPU si-lower-sgpr-spills-vgpr-lanes-usage.mir

AMDGPU: Implememt memsize forms of isLoadFromStackSlot/isStoreToStackSlot

Requested in #182673, though I'm not sure why this needs to be pushed
into targets. The size can be taken from the machine mem operand generically.
DeltaFile
+22-12llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+19-4llvm/lib/Target/AMDGPU/SIInstrInfo.h
+0-3llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-vgpr-lanes-usage.mir
+41-193 files

LLVM/project 4a2b384llvm/lib/Target/NVPTX NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX i1-int-to-fp.ll

[NVPTX] Fix sign issue in sint -> bf16 (#188118)

Fixes #187000
DeltaFile
+11-2llvm/test/CodeGen/NVPTX/i1-int-to-fp.ll
+1-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+12-32 files

LLVM/project 9708da6llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.fmad.ftz.ll llvm.amdgcn.fmad.ftz.f16.ll

AMDGPU/GlobalISel: RegBankLegalize rules for fmad_ftz (#188132)
DeltaFile
+252-23llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
+200-20llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+453-443 files

LLVM/project 1034c70llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.cvt.pknorm.i16.ll llvm.amdgcn.cvt.pknorm.u16.ll

AMDGPU/GlobalISel: RegBankLegalize rules for cvt_pknorm (#187834)
DeltaFile
+4-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+3-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.i16.ll
+3-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pknorm.u16.ll
+10-53 files

LLVM/project 9ab1e2bllvm/lib/Target/AArch64 AArch64InstrInfo.td

[AArch64][GlobalISel] Move new SQDMULLi32 pattern to join the others
DeltaFile
+4-4llvm/lib/Target/AArch64/AArch64InstrInfo.td
+4-41 files

LLVM/project 20e59c8llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU cube.ll llvm.amdgcn.cubema.ll

AMDGPU/GlobalISel: RegBankLegalize rules for cube intrinsics (#187762)

Add RegBankLegalize rules for cube* intrinsics. Also update manual tests
to use autogenerated checks.
DeltaFile
+39-11llvm/test/CodeGen/AMDGPU/cube.ll
+22-7llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubema.ll
+22-7llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubeid.ll
+22-7llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubesc.ll
+22-7llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cubetc.ll
+3-1llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+130-406 files

LLVM/project d50d263mlir/include/mlir/Dialect/Arith/IR ArithOps.td, mlir/lib/Dialect/Arith/IR ArithOps.cpp

[mlir][arith] Mark `arith.remsi` and `arith.remui` as conditionally speculatable
DeltaFile
+16-2mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+8-0mlir/lib/Dialect/Arith/IR/ArithOps.cpp
+24-22 files

LLVM/project 2c2706dllvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-store-i64-stride-6.ll

[X86] getFauxShuffleMask - decode insert_subvector(undef, x, c) as shuffle if c != 0 (#188258)

Move existing combineX86ShufflesRecursively handling into
getFauxShuffleMask to allow other shuffle folds to make use of it
DeltaFile
+4,978-4,984llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+4,590-4,623llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+3,850-4,310llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+3,562-3,632llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-8.ll
+2,430-2,474llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
+1,815-1,852llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+21,225-21,87513 files not shown
+27,816-28,94119 files

LLVM/project ff07361llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/AArch64 rem-by-const.ll

[TargetLowering] In expandDIVREMByConstant, combine shift by trailing zeros with chunk shifts. (#188086)

This reduces the number of generated instructions in some cases.

While I was there, I changed an Add to a Disjoint OR since DAGCombine
was going to do it anyway.
DeltaFile
+120-122llvm/test/CodeGen/X86/vector-idiv-udiv-128.ll
+37-40llvm/test/CodeGen/X86/i128-udiv.ll
+35-37llvm/test/CodeGen/X86/divmod128.ll
+22-28llvm/test/CodeGen/AArch64/rem-by-const.ll
+30-19llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+13-16llvm/test/CodeGen/RISCV/urem-lkk.ll
+257-2626 files

LLVM/project c312bf3llvm/lib/Support DivisionByConstantInfo.cpp

[DivisionByConstant] Don't compare bool to 0. Use APInt::getOneBitSet. NFC (#188178)
DeltaFile
+2-2llvm/lib/Support/DivisionByConstantInfo.cpp
+2-21 files

LLVM/project d422ffellvm/test/Transforms/SLPVectorizer/AArch64 unprofitable-alternate-subtree.ll

[SLP][NFC]Add a test with the non-profitable alternate vectorization, not throttled
DeltaFile
+77-0llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
+77-01 files

LLVM/project 4fcc3d7llvm/lib/Target/Sparc SparcInstrInfo.cpp

[Sparc] Report correct size for GETPCX pseudo (#188075)

This currently reports size 4, but the actual size is larger.
DeltaFile
+16-0llvm/lib/Target/Sparc/SparcInstrInfo.cpp
+16-01 files

LLVM/project 0328820clang/lib/CIR/Dialect/IR CIRDialect.cpp, clang/test/CIR/IR invalid-func.cir

[CIR][NFC] Fix regression in clang/test/CIR/IR/func.cir (#188069)

This patch fixes a regression in `clang/test/CIR/IR/func.cir` where the
parsing of `special_member` attributes fails.
DeltaFile
+10-9clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+9-1clang/test/CIR/IR/invalid-func.cir
+19-102 files

LLVM/project 227bab0offload/plugins-nextgen/level_zero/src L0Context.cpp L0Program.cpp

[OFFLOAD][L0] Improve cleanup on errors (#188251)

Additional cleanup improvements on error conditions (in addition to
those in #187597):

  * Fixed incomplete cleanup in L0Context::init()
  * Fixed build log leak in addModule()
  * Fixed context inconsistent state in findDevices()

Disclaimer: The base of this PR was generated by Claude and adjusted by
me afterwards.
DeltaFile
+14-2offload/plugins-nextgen/level_zero/src/L0Context.cpp
+13-2offload/plugins-nextgen/level_zero/src/L0Program.cpp
+4-1offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
+31-53 files

LLVM/project 6638ceelibc/src/math/generic logf.cpp

[libc] Remove redundant and incorrect comments in `logf.cpp` (#188236)

This PR intends to fix the nit (mostly caused during the refactor in
693a018dcf08e )

- During refactor we move the implementation along with the explanation
comments to header.
```CPP
// This is an algorithm for log(x) in single precision which is correctly
// rounded for all rounding modes, based on the implementation of log(x) from
// the RLIBM project at:
// https://people.cs.rutgers.edu/~sn349/rlibm

// Step 1 - Range reduction:
//   For x = 2^m * 1.mant, log(x) = m * log(2) + log(1.m)
//   If x is denormal, we normalize it by multiplying x by 2^23 and subtracting
.....
// Symposium on Principles of Programming Languages (POPL-2022), Philadelphia,
// USA, January 16-22, 2022.

    [12 lines not shown]
DeltaFile
+1-33libc/src/math/generic/logf.cpp
+1-331 files