LLVM/project 771d152llvm/lib/Target/SPIRV SPIRVLegalizePointerCast.cpp, llvm/test/CodeGen/SPIRV/passes SPIRVLegalizePointerCast.ll

[SPIR-V] Preserve offset alignment in pointer cast legalization (#209251)

Splitting a load/store into per-element accesses reused the original
alignment for every element, which could wrongly strengthen or discard
alignment

Compute each split access alignment via commonAlignment with its
DataLayout derived byte offset matching SPIRVLegalizerInfo.cpp
DeltaFile
+24-11llvm/lib/Target/SPIRV/SPIRVLegalizePointerCast.cpp
+34-0llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizePointerCast.ll
+58-112 files

LLVM/project b78a0acllvm/lib/Target/SPIRV SPIRVUtils.cpp

[SPIR-V] Unify duplicated named MDNode lookup helper (#209376)
DeltaFile
+16-18llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+16-181 files

LLVM/project af84127llvm/lib/Target/SPIRV SPIRVCallLowering.cpp

[SPIR-V] Remove dead typed pointer check in getArgSPIRVType (#209515)

Arg->getType() can never be a TypedPointerType since opaque pointers are
now the only pointer representation in LLVM IR
DeltaFile
+0-5llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
+0-51 files

LLVM/project a9d4741clang/test/Driver print-supported-extensions-riscv.c, llvm/lib/Target/RISCV RISCVInstrInfoZilx.td RISCVFeatures.td

Change the expanded name of Zilx

Created using spr 1.3.6-beta.1
DeltaFile
+16-16llvm/test/MC/RISCV/zilx-valid-rv64.s
+8-8llvm/test/MC/RISCV/zilx-valid-rv32.s
+2-2llvm/lib/Target/RISCV/RISCVInstrInfoZilx.td
+2-2llvm/lib/Target/RISCV/RISCVFeatures.td
+1-1llvm/test/CodeGen/RISCV/features-info.ll
+1-1clang/test/Driver/print-supported-extensions-riscv.c
+30-301 files not shown
+31-317 files

LLVM/project 15776b5llvm/include/llvm/ADT GenericCycleImpl.h GenericCycleInfo.h

[CycleInfo] Remove GenericCycle::TopLevelCycle. NFC (#209677)

moveTopLevelCycleToNewParent maintains TopLevelCycle eagerly, rewriting
the whole re-parented subtree with depth_first. When discovery nests k
cycles one by one this is quadratic, and the df_iterator walk plus its
visited set dominate construction on deep nests (~78% of time on a
1500-deep nest).

Walk ParentCycle links in getTopLevelParentCycle instead and delete the
member. The walk is valid during construction too: parent links are
always current, and discovery queries blocks whose innermost cycle sits
at the top of the forest being merged, so the walk is short.

Aided by Claude Fable 5
DeltaFile
+3-9llvm/include/llvm/ADT/GenericCycleImpl.h
+1-5llvm/include/llvm/ADT/GenericCycleInfo.h
+4-142 files

LLVM/project b790c5clibc/src/pthread pthread_condattr_setclock.cpp, libc/test/src/sys/socket/linux CMakeLists.txt

[libc] Remove #include <sys/whatever.h> (#209449)

and replace with granular includes of type/macro proxy headers -- where
those headers exist. I'm leaving the creation of new proxy headers for
another patch.

Assisted by Gemini.
DeltaFile
+14-7libc/test/src/sys/stat/CMakeLists.txt
+19-0libc/test/src/unistd/CMakeLists.txt
+4-4libc/test/src/sys/socket/linux/CMakeLists.txt
+3-4libc/src/pthread/pthread_condattr_setclock.cpp
+3-3libc/test/src/sys/stat/chmod_test.cpp
+3-3libc/test/src/sys/stat/fchmodat_test.cpp
+46-2171 files not shown
+146-13577 files

LLVM/project 51bc9e2llvm/test/CodeGen/AMDGPU xnack-subtarget-feature-any.ll xnack-subtarget-feature-disabled.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (38)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+7-7llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-any.ll
+7-7llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-disabled.ll
+7-7llvm/test/CodeGen/AMDGPU/xnack-subtarget-feature-enabled.ll
+5-5llvm/test/CodeGen/AMDGPU/xnor.ll
+4-4llvm/test/CodeGen/AMDGPU/xor_add.ll
+3-3llvm/test/CodeGen/AMDGPU/xor3.ll
+33-3313 files not shown
+54-5419 files

LLVM/project 64f6784llvm/test/CodeGen/AMDGPU vector-reduce-fmin.ll vector-reduce-fmax.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (36)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+20-20llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
+20-20llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
+16-16llvm/test/CodeGen/AMDGPU/vector-reduce-xor.ll
+16-16llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
+16-16llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
+16-16llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
+104-10493 files not shown
+442-44299 files

LLVM/project 128cb66llvm/test/CodeGen/AMDGPU vopd-combine.mir workitem-intrinsic-opts.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (37)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+7-7llvm/test/CodeGen/AMDGPU/vopd-combine.mir
+6-6llvm/test/CodeGen/AMDGPU/workitem-intrinsic-opts.ll
+6-6llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
+6-6llvm/test/CodeGen/AMDGPU/wave_dispatch_regs.ll
+5-5llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+5-5llvm/test/CodeGen/AMDGPU/wave32.ll
+35-3592 files not shown
+196-19698 files

LLVM/project ce3b72ellvm/test/CodeGen/AMDGPU unsupported-image-sample.ll unsupported-av-store.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (35)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+7-7llvm/test/CodeGen/AMDGPU/unsupported-image-sample.ll
+6-6llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
+6-6llvm/test/CodeGen/AMDGPU/uaddsat.ll
+6-6llvm/test/CodeGen/AMDGPU/trap-abis.ll
+6-6llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
+5-5llvm/test/CodeGen/AMDGPU/uaddo.ll
+36-3688 files not shown
+198-19894 files

LLVM/project 8009c9cllvm/test/CodeGen/AMDGPU strict_fmul.f16.ll strict_fadd.f16.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (34)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+12-12llvm/test/CodeGen/AMDGPU/strict_fmul.f16.ll
+12-12llvm/test/CodeGen/AMDGPU/strict_fadd.f16.ll
+12-12llvm/test/CodeGen/AMDGPU/strict_fsub.f16.ll
+10-10llvm/test/CodeGen/AMDGPU/strict_ldexp.f16.ll
+8-8llvm/test/CodeGen/AMDGPU/strict_ldexp.f64.ll
+8-8llvm/test/CodeGen/AMDGPU/store-atomic-local.ll
+62-6288 files not shown
+307-30794 files

LLVM/project 162a276clang/test/OffloadTools/clang-linker-wrapper linker-wrapper.c, llvm/include/llvm/Object OffloadBinary.h

clang-linker-wrapper: Use AMDGPU::TargetID for image compatibilty (2) (#209563)

This reverts commit aa5960600ac38fcd923e69777bad1293f56658d7.

Before the first attempt, clang-linker-wrapper inconsistently
applied linker reasoning to the target ID feature modifiers, but
not the base processor. e.g., gfx90a was considered mergable
with gfx90a:xnack+.

The first attempt at this changed introduced and used
TargetID::isCompatibleWith, which applied full linking
compatibility logic. This broke tests which combined
generic and covered non-generic targets in the build (e.g.,
gfx9-generic and gfx900). The archives would both be treated
as compatible, resulting in multiple definition errors.

Split the TargetID compatibility checks into 2 different kinds:
1 for exact target match used for archives, and 1 for logical
compatibility usable for objects. For archive purposes, this stops

    [5 lines not shown]
DeltaFile
+166-0llvm/unittests/TargetParser/TargetParserTest.cpp
+124-15clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper.c
+61-35llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+34-29llvm/lib/Object/OffloadBinary.cpp
+14-6llvm/include/llvm/Object/OffloadBinary.h
+14-0llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+413-851 files not shown
+416-887 files

LLVM/project 2d6692dllvm/test/CodeGen/AMDGPU si-unify-exit-return-unreachable.ll sram-ecc-default.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (33) (#209562)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+76-80llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
+8-8llvm/test/CodeGen/AMDGPU/sram-ecc-default.ll
+6-6llvm/test/CodeGen/AMDGPU/spillv16.ll
+6-6llvm/test/CodeGen/AMDGPU/spill-agpr.mir
+6-6llvm/test/CodeGen/AMDGPU/simplify-libcalls.ll
+5-5llvm/test/CodeGen/AMDGPU/smrd.ll
+107-11194 files not shown
+294-298100 files

LLVM/project 60561edflang/lib/Lower/OpenMP OpenMP.cpp, llvm/lib/CodeGen ReplaceWithVeclib.cpp

.

Created using spr 1.3.5-bogner
DeltaFile
+128-21mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+124-14mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+105-8llvm/lib/CodeGen/ReplaceWithVeclib.cpp
+107-0mlir/test/Target/LLVMIR/openmp-target-in-reduction.mlir
+88-15flang/lib/Lower/OpenMP/OpenMP.cpp
+32-66llvm/utils/lit/tests/shtest-format.py
+584-12455 files not shown
+1,320-36361 files

LLVM/project 9ff4097llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

fixup! Address review comments
DeltaFile
+1-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1-11 files

LLVM/project bff9c54llvm/test/MC/RISCV rve-invalid.s xqcilo-invalid.s, llvm/test/MC/RISCV/corev XCVsimd-invalid.s XCValu-invalid.s

[RISCV][MC] Improve GPR Error Messages (#209669)

- For the usual GPR RegClass
- For the GPRX0 RegClass as used by the `PseudoC_ADDI_NOP` instruction.
- For the SR07 regclass used by Zcmp and Xqccmp instructions.
DeltaFile
+732-732llvm/test/MC/RISCV/corev/XCVsimd-invalid.s
+86-86llvm/test/MC/RISCV/corev/XCValu-invalid.s
+66-66llvm/test/MC/RISCV/corev/XCVmac-invalid.s
+34-34llvm/test/MC/RISCV/rve-invalid.s
+33-33llvm/test/MC/RISCV/corev/XCVmem-invalid.s
+16-16llvm/test/MC/RISCV/xqcilo-invalid.s
+967-96739 files not shown
+1,118-1,10145 files

LLVM/project 69e0994llvm/docs QualGroup.rst

[Docs] Document Qualification WG artifacts and meeting archive (#209382)

# Summary

Update the LLVM Qualification Working Group page to point readers to the
group's directory in the `llvm-wgs` repository.

The new **Working Group artifacts** section explains that the directory
is the central location for the group's public technical outputs and
working materials, including qualification guidance, templates,
analyses, and proposals.

The **Meeting Materials** section is also updated to reflect the
migration of meeting materials, agendas, and minutes to the `llvm-wgs`
repository. The repository is presented as the long-term archive, while
the existing Discourse thread remains the location where upcoming
agendas and newly published minutes are shared.

# Changes

    [12 lines not shown]
DeltaFile
+35-5llvm/docs/QualGroup.rst
+35-51 files

LLVM/project 89fa735libc/include/arpa inet.yaml, libc/src/arpa/inet inet_ntoa.cpp inet_ntoa.h

[libc] Implement inet_ntoa (#208702)

Implement inet_ntoa, reusing the internal net::ipv4_to_str helper that
backs inet_ntop.

The result is stored in a *thread-local* static buffer. A thread-local
buffer is not required for POSIX conformance, but there is some
precedent for that, both in llvm libc (e.g. `strsignal`) and in glibc
(whose `inet_ntoa` uses it). I'm doing the same for maximum
compatiblity.

Assisted by Gemini.
DeltaFile
+46-0libc/test/src/arpa/inet/inet_ntoa_test.cpp
+29-0libc/src/arpa/inet/inet_ntoa.cpp
+26-0libc/src/arpa/inet/inet_ntoa.h
+16-1libc/src/arpa/inet/CMakeLists.txt
+12-1libc/test/src/arpa/inet/CMakeLists.txt
+6-1libc/include/arpa/inet.yaml
+135-33 files not shown
+138-39 files

LLVM/project 3639fecllvm/include/llvm/Support PerThreadBumpPtrAllocator.h, llvm/lib/DWARFLinker/Parallel DWARFLinkerTypeUnit.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5-bogner

[skip ci]
DeltaFile
+63-32llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
+26-1llvm/unittests/Support/PerThreadBumpPtrAllocatorTest.cpp
+10-0llvm/lib/Support/Allocator.cpp
+1-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
+100-334 files

LLVM/project 0963357llvm/include/llvm/Support PerThreadBumpPtrAllocator.h, llvm/lib/DWARFLinker/Parallel DWARFLinkerTypeUnit.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5-bogner
DeltaFile
+63-32llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
+26-1llvm/unittests/Support/PerThreadBumpPtrAllocatorTest.cpp
+10-0llvm/lib/Support/Allocator.cpp
+4-1llvm/lib/Support/Parallel.cpp
+1-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
+104-345 files

LLVM/project 210e1a4llvm/test/CodeGen/RISCV zilx.ll

Add more tests

Created using spr 1.3.6-beta.1
DeltaFile
+279-0llvm/test/CodeGen/RISCV/zilx.ll
+279-01 files

LLVM/project 7881a37mlir/lib/Dialect/Linalg/Transforms PackAndUnpackPatterns.cpp, mlir/test/Dialect/Linalg simplify-pack-unpack.mlir

[mlir][linalg] Refine pack/unpack simplification checks (NFC) (#209522)

Update `isPackOn1D`, which is used by both
`SimplifyPackToExpandShape` and `SimplifyUnPackToCollapseShape`:

* Rename it to `isPackOnEffectively1D` to better reflect its
   functionality: the underlying pack can be multi-dimensional.
* Add checks to ensure that the unique non-unit inner tile is used to
   tile the unique non-unit unpacked dimension (that was previously
   left as an unchecked assumption).
* Add comments to the test file for these patterns, grouping the tests
   according to the functionality/cases being tested.
DeltaFile
+59-18mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
+46-12mlir/test/Dialect/Linalg/simplify-pack-unpack.mlir
+105-302 files

LLVM/project 36c6568libc/src/__support/StringUtil/tables CMakeLists.txt, libc/src/signal/linux sigemptyset.cpp

[libc] Remove #include <signal.h> (#209433)

Replace it with granular includes of the appropriate type/macro proxy
headers.

Assisted by Gemini.
DeltaFile
+6-0libc/src/sys/wait/linux/CMakeLists.txt
+3-3libc/src/__support/StringUtil/tables/CMakeLists.txt
+1-4libc/src/signal/linux/sigemptyset.cpp
+2-3libc/test/src/fenv/enabled_exceptions_test.cpp
+2-3libc/test/src/signal/sigfillset_test.cpp
+2-3libc/test/src/signal/sigdelset_test.cpp
+16-1623 files not shown
+41-4829 files

LLVM/project b570a77utils/bazel/llvm-project-overlay/libc BUILD.bazel, utils/bazel/llvm-project-overlay/libc/test/src/sys/socket BUILD.bazel

[libc][bazel] Add recently added sys/socket functions and syscall wrappers (#209457)

This patch adds the missing functions to BUILD.bazel:
- recvmmsg
- sendmmsg
- setsockopt
- shutdown

I also add the corresponding syscall wrapper libraries that these
functions depend on, along with a couple of additional type libraries.

I'm leaving the remaining sys/socket functions and test suites out for
now since some of them require additional infrastructure or type
definitions.

Assisted by Gemini.
DeltaFile
+234-79utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+99-32utils/bazel/llvm-project-overlay/libc/test/src/sys/socket/BUILD.bazel
+333-1112 files

LLVM/project b64be89llvm/docs LangRef.md

Remove vague use of "defined"
DeltaFile
+2-2llvm/docs/LangRef.md
+2-21 files

LLVM/project ddc4fe1llvm/lib/Target/RISCV RISCVInstrInfoZilx.td

Increase Complexity

Created using spr 1.3.6-beta.1
DeltaFile
+3-2llvm/lib/Target/RISCV/RISCVInstrInfoZilx.td
+3-21 files

LLVM/project 2ea7f10llvm/include/llvm/Support PerThreadBumpPtrAllocator.h, llvm/lib/DWARFLinker/Parallel DWARFLinkerTypeUnit.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5-bogner
DeltaFile
+63-32llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
+26-1llvm/unittests/Support/PerThreadBumpPtrAllocatorTest.cpp
+10-0llvm/lib/Support/Allocator.cpp
+1-0llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
+100-334 files

LLVM/project a86a516libc/src/stdlib/linux realpath.cpp CMakeLists.txt, libc/test/src/stdlib realpath_test.cpp CMakeLists.txt

[libc][realpath] Support relative paths
DeltaFile
+84-3libc/test/src/stdlib/realpath_test.cpp
+16-1libc/src/stdlib/linux/realpath.cpp
+2-0libc/test/src/stdlib/CMakeLists.txt
+1-0libc/src/stdlib/linux/CMakeLists.txt
+103-44 files

LLVM/project d921be3libc/test/UnitTest HermeticTestUtils.cpp, libc/test/src/stdlib realpath_test.cpp CMakeLists.txt

[libc][realpath][test] Create test files/directories

Follow-up PRs will add path validation etc to `realpath`, which will require paths to exist in the filesystem.
DeltaFile
+239-13libc/test/src/stdlib/realpath_test.cpp
+13-0libc/test/src/stdlib/CMakeLists.txt
+1-1libc/test/UnitTest/HermeticTestUtils.cpp
+253-143 files

LLVM/project f65f52flibc/src/stdlib/linux realpath.cpp CMakeLists.txt, libc/test/src/stdlib realpath_test.cpp

[libc][realpath] Validate path components.

This PR updates `realpath` to validate paths and return `ENOTDIR` or `ENOENT` according to https://pubs.opengroup.org/onlinepubs/9699919799/functions/realpath.html.

This PR also bumps the memory limit in `HermeticTestUtils.cpp`. The realpath unit tests allocate quite a few strings. Since memory in hermetic tests is never free'd, the unit test quickly reaches the limit.
DeltaFile
+49-0libc/test/src/stdlib/realpath_test.cpp
+34-0libc/src/stdlib/linux/realpath.cpp
+5-0libc/src/stdlib/linux/CMakeLists.txt
+88-03 files