LLVM/project a28c83dlibcxx/include/__locale_dir/support windows.h

add _LIBCPP_HIDE_FROM_ABI to the __get_c_locale() forward declaration on Windows
DeltaFile
+1-1libcxx/include/__locale_dir/support/windows.h
+1-11 files

LLVM/project a2a07c7llvm/lib/Analysis ConstantFolding.cpp, llvm/lib/Target/AMDGPU SIISelLowering.cpp

[AMDGPU] Constant folding for wave-reduce intrinsics
DeltaFile
+972-0llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.ll
+0-614llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll
+41-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+10-0llvm/lib/Analysis/ConstantFolding.cpp
+1,023-6164 files

LLVM/project 9ac223eutils/bazel/llvm-project-overlay/openmp/runtime/src BUILD.bazel

[Bazel] Fixes 94f5dd0 (#225300)

This fixes 94f5dd0eb25ed97603af1d0a501c412fcfea6696 (#197191).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=94f5dd0eb25ed97603af1d0a501c412fcfea6696

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+2-0utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
+2-01 files

LLVM/project 5587ab4llvm/lib/Transforms/Scalar SimpleLoopUnswitch.cpp, llvm/test/Transforms/SimpleLoopUnswitch pr138509.ll nontrivial-unswitch-trivial-select.ll

[SimpleLoopUnswitch] Allow trivial unswitch when exit LCSSA is a header PHI (#222962)

Trivial unswitch bails on a common loop shape: a loop-invariant branch
in the header that exits the loop returning a loop-carried value.

```
  int acc = 0;
  for (...) {
    if (c)
      return acc;
    acc++;
  }
```

After loop-rotate the `if` sits in the header, and the exit reads the
header PHI `%acc`. Trivial unswitch hoists the branch into the
preheader, so the exit value must be available there. It only accepts
loop-invariant values, and `%acc` is not one, so it gives up. But `%acc`
is safe here: the branch is invariant, so if the loop exits it exits on

    [10 lines not shown]
DeltaFile
+272-0llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-header-phi.ll
+48-25llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+4-9llvm/test/Transforms/SimpleLoopUnswitch/nontrivial-unswitch-trivial-select.ll
+1-1llvm/test/Transforms/SimpleLoopUnswitch/pr138509.ll
+325-354 files

LLVM/project 1f73129flang/lib/Semantics resolve-names.cpp, flang/test/Semantics/CUDA cuda-pinned-implicit-modfile.cuf

[flang][cuda] Record implicit pinned attribution in module files

Under -gpu=mem:pinned an unattributed ALLOCATABLE is attributed as pinned by
the compiler, the same way -gpu=mem:managed attributes one as managed, but
only the latter recorded that it had done so. The module file therefore spelled
an implicitly applied PINNED the same as one the user wrote, and a reader
treated it as a user requirement: adding -gpu=mem:pinned to a module's build
rejected its OpenACC-only consumers over an attribute the user never wrote.

Record the attribution for pinned as well, so it is written as
PINNED(IMPLICIT) and consumers can tell the two apart.
DeltaFile
+42-0flang/test/Semantics/CUDA/cuda-pinned-implicit-modfile.cuf
+3-1flang/lib/Semantics/resolve-names.cpp
+45-12 files

LLVM/project ef8bc0allvm/include/llvm/ABI TargetInfo.h, llvm/lib/ABI TargetInfo.cpp

[ABI] Thread alloca address space through getNaturalAlignIndirect
DeltaFile
+6-4llvm/lib/ABI/Targets/BPF.cpp
+6-4llvm/lib/ABI/Targets/AArch64.cpp
+5-4llvm/lib/ABI/Targets/X86.cpp
+5-1llvm/include/llvm/ABI/TargetInfo.h
+3-2llvm/lib/ABI/TargetInfo.cpp
+2-0llvm/unittests/ABI/AArch64TargetInfoTest.cpp
+27-151 files not shown
+29-157 files

LLVM/project 15fc88amlir/include/mlir/IR BuiltinTypeInterfaces.td

[mlir][NFC] Improve `ShapedTypeInterface` documentation
DeltaFile
+6-5mlir/include/mlir/IR/BuiltinTypeInterfaces.td
+6-51 files

LLVM/project e0d9b60orc-rt/test/unit/bedrock ExecutorProcessInfoTest.cpp

[orc-rt] Fix unit test. (#225299)

Use !! to convert EPI to bool, and ExecutorProcessInfo::pageSize() to
get the page size (ExecutorProcessInfo::PageSize is private).
DeltaFile
+2-2orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
+2-21 files

LLVM/project 94f5dd0openmp/runtime/src kmp_device_env.h kmp_settings.cpp, openmp/runtime/test/env omp_num_threads_dev_all_fallback.c omp_num_threads_dev_resolve.c

[libomp] OpenMP 6.0 Device-Scope Environment Variables  (#197191)

The patch introduces `_ALL` `_DEV` `_DEV_<id>` env var suffixes to the
LLVM's OpenMP host runtime `libomp`. The eligible-list env var currently
supports `OMP_NUM_THREADS`.

Assisted by Claude Opus 4.7 / Claude 4.6 Sonnet
DeltaFile
+353-0openmp/runtime/src/kmp_device_env.cpp
+57-14openmp/runtime/src/kmp_settings.cpp
+64-0openmp/runtime/src/kmp_device_env.h
+46-0openmp/runtime/test/env/omp_num_threads_dev_overflow.c
+33-0openmp/runtime/test/env/omp_num_threads_dev_resolve.c
+32-0openmp/runtime/test/env/omp_num_threads_dev_all_fallback.c
+585-1413 files not shown
+811-1419 files

LLVM/project d11b9adclang/lib/Sema SemaOpenMP.cpp, clang/test/OpenMP collapse_ordered_instantiation_dependent.cpp

[Clang][OpenMP] Delay `collapse/ordered` nest walk until instantiation (#225052)

Do not fold `collapse` and `ordered` counts in `checkOpenMPLoop` until
the expression is no longer instantiation-dependent.

Clause parsing already waits. The loop walker did not. A count like
`sizeof(sizeof(T() + T()))` was folded in the template, so Clang could
walk the wrong number of loops before instantiation.
DeltaFile
+52-0clang/test/OpenMP/collapse_ordered_instantiation_dependent.cpp
+2-2clang/lib/Sema/SemaOpenMP.cpp
+54-22 files

LLVM/project fddb288llvm/include/llvm/ABI TargetInfo.h DefaultTargetInfo.h, llvm/lib/ABI CMakeLists.txt TargetInfo.cpp

Create DefaultTargetInfo class
DeltaFile
+60-0llvm/lib/ABI/DefaultTargetInfo.cpp
+0-39llvm/lib/ABI/TargetInfo.cpp
+38-0llvm/include/llvm/ABI/DefaultTargetInfo.h
+10-12llvm/unittests/ABI/TargetInfoTest.cpp
+0-8llvm/include/llvm/ABI/TargetInfo.h
+1-0llvm/lib/ABI/CMakeLists.txt
+109-596 files

LLVM/project 22fc5f5llvm/lib/Target/RISCV RISCVInstrInfoXCV.td, llvm/lib/Target/RISCV/Disassembler RISCVDisassembler.cpp

[RISCV][MC] Reject invalid combined immediates for cv.insert in the disassembler (#225269)

Follow up of #224985
DeltaFile
+17-0llvm/test/MC/Disassembler/RISCV/xcvbitmanip-invalid.txt
+9-0llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+5-1llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
+31-13 files

LLVM/project dc21109llvm/lib/Target/RISCV RISCVFeatures.td RISCVInstrInfoXqccmi.td, llvm/lib/TargetParser RISCVISAInfo.cpp

[RISCV] Add assembler support for the Qualcomm Xqccmi vendor extension (#225119)

This patch adds support for assembling and disassembling the Qualcomm
Xqccmi 16-bit Instruction Lookup Table vendor extension. The extension
has a single `qc.cm.ilut` instruction which executes one or two
instructions from an instruction lookup table. The encoding overlaps
with `c.fld`, making `Xqccmi` and `Zcd` mutually exclusive.

The extension also adds two CSR's `qc.itba` and `qc.itdec` that contain
the lookup table base address and the leading double entries count
respectively.

Spec:
https://github.com/qualcomm/riscv-unified-db/releases#release-Xqccmi-0.2.0

Assisted by gpt-5.6-luna.
DeltaFile
+30-0llvm/lib/Target/RISCV/RISCVInstrInfoXqccmi.td
+23-0llvm/test/MC/RISCV/xqccmi-valid.s
+7-6llvm/lib/TargetParser/RISCVISAInfo.cpp
+9-0llvm/lib/Target/RISCV/RISCVFeatures.td
+8-0llvm/test/MC/RISCV/xqccmi-invalid.s
+6-0llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+83-68 files not shown
+103-614 files

LLVM/project 4c37743.github/workflows build-libc-container.yml

[Github] Rename libc container to 26.04 (#225297)

The last commit bumped it to 26.04, but I forgot to rename it.
DeltaFile
+1-1.github/workflows/build-libc-container.yml
+1-11 files

LLVM/project c04e540llvm/lib/ExecutionEngine/Orc/Shared OrcRTBridge.cpp

[ORC] Mangle MachOUnwindInfoRegistrar CI names as C (#225278)

Flip the MachOUnwindInfoRegistrar register/deregister-sections
descriptors from Verbatim to C, so their names carry the target's C
mangling. Served in-tree by UnwindInfoManager (via mangledCopy of the
same specs) and resolved by UnwindInfoRegistrationPlugin through the
same specs, so both sides stay in sync; nothing else defines them.
DeltaFile
+2-2llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
+2-21 files

LLVM/project 6faaea1llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI SharedMemoryMapperSPSCI.h

[ORC] Mangle SharedMemoryMapper CI names as C (#225277)

Flip the SharedMemoryMapper descriptors (instance +
reserve/initialize/deinitialize/release) from Verbatim to C, so their
names carry the target's C mangling. Served by the in-tree
ExecutorSharedMemoryMapperService; controller and executor mangle the
same specs and nothing else defines these names.
DeltaFile
+7-8llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/SharedMemoryMapperSPSCI.h
+7-81 files

LLVM/project b2fab5allvm/lib/ExecutionEngine/Orc/Shared OrcRTBridge.cpp

[ORC] Mangle GDBJITRegistrar alloc-action CI names as C (#225275)

Flip RegisterJITLoaderGDBAllocActionName and its deregister counterpart
from Verbatim to C, so their names carry the target's C mangling. The
register action is served in-tree by llvm_orc_registerJITLoaderGDBAlloc-
Action (DefaultHostBootstrapValues, via mangledCopy of the same spec)
and resolved by the debugger-support plugins through the same spec, so
both sides stay in sync.
DeltaFile
+2-2llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
+2-21 files

LLVM/project 13c5814clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 poly64.c neon-intrinsics.c

[CIR][AArch64] Upstream load (vld[234]_*/vld[234]q_*) NEON builtins (#220476)

Related to https://github.com/llvm/llvm-project/issues/185382

CIR lowering for load intrinsics (`vld[234]_*`/`vld[234]q_*`)

(https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#stride)

Port tests:
- `clang/test/CodeGen/AArch64/neon-intrinsics.c`
- `clang/test/CodeGen/AArch64/neon-ldst-one.c`
- `clang/test/CodeGen/AArch64/poly64.c`

to `clang/test/CodeGen/AArch64/neon/load.c`
DeltaFile
+0-2,567clang/test/CodeGen/AArch64/neon-ldst-one.c
+2,310-0clang/test/CodeGen/AArch64/neon/load.c
+0-1,344clang/test/CodeGen/AArch64/neon-intrinsics.c
+88-31clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+0-96clang/test/CodeGen/AArch64/poly64.c
+2,398-4,0385 files

LLVM/project 368c7f0lld/ELF Relocations.cpp SyntheticSections.cpp, lld/ELF/Arch AArch64.cpp

[PAC][lld] Do not emit AUTH relocs against undef weak non-preemptible symbols

Undefined weak non-preemptible symbols should be statically resolved
and not signed.

See the corresponding relaxation described in docs:
https://github.com/ARM-software/abi-aa/blob/6e0d6611ac977628af7b2444ff841e76931a3557/design-documents/pauthabi-tls.rst

Previously, a dynamic relocation against such symbols was emitted,
which is not a correct behavior.

See also: https://github.com/ARM-software/abi-aa/pull/391

Depends on: #198327

Resolves #173296
DeltaFile
+79-9lld/ELF/Arch/AArch64.cpp
+48-0lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+48-0lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+47-0lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+15-5lld/ELF/SyntheticSections.cpp
+13-6lld/ELF/Relocations.cpp
+250-202 files not shown
+256-218 files

LLVM/project b6bd32alld/test/ELF aarch64-reloc-pauth-undef-weak.s aarch64-reloc-pauth-undef-weak-pie.s

`.tlsdescauthcall` -> `.tlsauthdesccall` (per documentation)
DeltaFile
+1-1lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+1-1lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+1-1lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+3-33 files

LLVM/project e4227c6lld/ELF Relocations.cpp, lld/ELF/Arch AArch64.cpp

Address review comments
DeltaFile
+2-6lld/ELF/Arch/AArch64.cpp
+1-1lld/ELF/Relocations.cpp
+3-72 files

LLVM/project 996df9alld/ELF SyntheticSections.h SyntheticSections.cpp, lld/test/ELF aarch64-reloc-pauth-undef-weak.s aarch64-reloc-pauth-undef-weak-pie.s

Address review comments
DeltaFile
+3-3lld/ELF/SyntheticSections.cpp
+3-3lld/ELF/Relocations.cpp
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+1-1lld/ELF/SyntheticSections.h
+13-136 files

LLVM/project 53e504flld/ELF Relocations.cpp, lld/test/ELF aarch64-reloc-pauth-undef-weak.s aarch64-reloc-pauth-undef-weak-pie.s

Address review comments
DeltaFile
+50-20lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+1-2lld/ELF/Relocations.cpp
+55-264 files

LLVM/project c73350fllvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64AsmPrinter.cpp, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[PAC][ELF] Support R_AARCH64_AUTH_TLSDESC_CALL relocation (#198327)

The R_AARCH64_AUTH_TLSDESC_CALL is introduced to allow linker relaxation
of AUTH TLSDESC call sequences for non-preemptible undefined weak
symbols.

The lld patch introducing the relaxation: #194636

Corresponding ARM docs PR:
https://github.com/ARM-software/abi-aa/pull/395
DeltaFile
+32-0llvm/test/MC/AArch64/tls-auth-relocs.s
+11-6llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+10-5llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
+12-3llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+9-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+8-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+82-141 files not shown
+85-147 files

LLVM/project 1f825d4utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel

[Bazel] Fixes ce06ac9 (#225288)

This fixes ce06ac932eca6a403fa2f1f84fc5724fd30dc562 (#224822).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ce06ac932eca6a403fa2f1f84fc5724fd30dc562

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-1utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+1-11 files

LLVM/project fd979c6clang/lib/CodeGen CGCall.cpp, llvm/include/llvm/ABI FunctionInfo.h

[ABI] Add IndirectAliased kind to abi::ArgInfo (#225005)

Changes:
- Mirror `clang::CodeGen::ABIArgInfo::IndirectAliased:` an indirect
argument whose pointer may alias an object referenced elsewhere and is
never byval.
- Add the kind, a `getIndirectAliased` factory, an `isIndirectAliased`
predicate, and widens the indirect align/addrspace/realign accessors to
both kinds.
- Add unit tests in FunctionInfoTest.

Relates to : https://github.com/llvm/llvm-project/issues/220471

Assisted by: claude opsu 4.8
DeltaFile
+44-0llvm/unittests/ABI/FunctionInfoTest.cpp
+19-3llvm/include/llvm/ABI/FunctionInfo.h
+8-0clang/lib/CodeGen/CGCall.cpp
+71-33 files

LLVM/project 76301e4llvm/include/llvm/LTO Config.h, llvm/lib/LTO LTOBackend.cpp

[LTO] Add PassBuilderCallback to Config (#224896)

This allows LTO backend to register PassBuilder extension point
callbacks, mirroring the existing PreCodeGenPassesHook.
DeltaFile
+3-0llvm/lib/LTO/LTOBackend.cpp
+1-0llvm/include/llvm/LTO/Config.h
+4-02 files

LLVM/project d677e53llvm/include/llvm/ABI TargetInfo.h, llvm/lib/ABI TargetInfo.cpp

[ABI] Hoist isSingleElementStruct into TargetInfo and fix array reduction (#224994)

Changes:
- Move `isSingleElementStruct` from `X86_64TargetInfo` into the shared
`TargetInfo` base so other targets can reuse it, and restore the
`isAggregateTypeForABI` guard from classic CodeGen so a multi-element
array field no longer reduces (e.g. struct { short a[2]; } stays i32
instead of [2 x i16]).
- Add unit tests for the reduction in to new test file `TargetInfoTest`.

Relates to : https://github.com/llvm/llvm-project/issues/220471

Assisted by: claude opus 4.8
DeltaFile
+147-0llvm/unittests/ABI/TargetInfoTest.cpp
+57-0llvm/lib/ABI/TargetInfo.cpp
+0-55llvm/lib/ABI/Targets/X86.cpp
+3-0llvm/include/llvm/ABI/TargetInfo.h
+1-0llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
+1-0llvm/unittests/ABI/CMakeLists.txt
+209-556 files

LLVM/project b4ed7afllvm/test/MC/RISCV xqcilo-pseudos-invalid.s rv64zfh-invalid.s, llvm/test/TableGen AsmMatcherPrioritizeFeatureErrors.td AsmMatcherPrioritizeFeature.td

[RISCV][MC] Prioritize features in MultiMismatchFallback (#215737)

Add the `PrioritizeFeatureInMultipleNearMisses` AsmParser option and
enable it for RISCV.

When an instruction has both missing features and multiple invalid
operands, prioritize the feature entry when populating `MultiMismatchFallback` so
that diagnostics identify the missing extension.

Keep the existing `MultiMismatchFallback` behavior unchanged for targets
that do not enable the option.


This change was assisted by AI.
DeltaFile
+56-26llvm/utils/TableGen/AsmMatcherEmitter.cpp
+34-12llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s
+36-0llvm/test/TableGen/AsmMatcherPrioritizeFeature.td
+18-8llvm/test/MC/RISCV/rv64zfh-invalid.s
+20-0llvm/test/TableGen/AsmMatcherPrioritizeFeatureErrors.td
+6-12llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
+170-5823 files not shown
+255-12429 files

LLVM/project ce06ac9lldb/source/Plugins/Platform/MacOSX CMakeLists.txt PlatformDarwin.cpp, llvm/unittests/Option OptionMarshallingTest.cpp

[Option] Remove OPTTABLE_STR_TABLE_CODE (#224822)

Its two users read OptionStrTable to spell an option. The unittest now
compares option IDs. lldb prepends '-' to the name it reads, which has
been the prefixed name since 501f92d34382 (2023), so it passes
"--mmacos-version-min=<ver>", which the driver rejects and drops; spell
it with the driver option table instead.

Aided by Opus 5
DeltaFile
+14-18lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
+13-13llvm/unittests/Option/OptionMarshallingTest.cpp
+3-9llvm/utils/TableGen/OptionParserEmitter.cpp
+1-0lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
+31-404 files