LLVM / project - FreshBSD

LLVM/project d3fb3dd — llvm/include/llvm/Transforms/IPO Instrumentor.h InstrumentorUtils.h, llvm/lib/Transforms/IPO Instrumentor.cpp InstrumentorConfigFile.cpp

2026-05-03 01:56:00 UTC by Kevin Sala on ⎇

users/kevinsala/instrumentor-base-pr

Fix review comments

Delta		File
+23	-31	llvm/lib/Transforms/IPO/Instrumentor.cpp
+25	-20	llvm/include/llvm/Transforms/IPO/Instrumentor.h
+2	-4	llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h
+4	-1	llvm/lib/Transforms/IPO/InstrumentorConfigFile.cpp
+1	-1	llvm/include/llvm/Transforms/IPO/InstrumentorConfigFile.h
+55	-57	5 files

LLVM/project a5306ab — llvm/lib/Target/SystemZ SystemZOperands.td

2026-05-03 01:01:33 UTC by Kai Nacke on ⎇

users/redstar/systemzleaf

Remove dead code

Delta		File
+0	-5	llvm/lib/Target/SystemZ/SystemZOperands.td
+0	-5	1 files

LLVM/project 46c83c9 — llvm/lib/Target/SystemZ SystemZOperands.td

2026-05-03 01:00:50 UTC by Kai Nacke on ⎇

users/redstar/systemzleaf

Convert another PatLeaf

Delta		File
+5	-5	llvm/lib/Target/SystemZ/SystemZOperands.td
+5	-5	1 files

LLVM/project 37e0109 — llvm/utils/TableGen DecoderEmitter.cpp, llvm/utils/TableGen/Common InstructionEncoding.cpp InstructionEncoding.h

2026-05-03 00:43:20 UTC by Prerona Chaudhuri via GitHub on ⎇

main

[NFC][TableGen] Drop OperandInfo::addField/fields() wrappers and use OperandInfo::Fields instead (#195489)

Fields is already a public member; the wrappers added no semantic value
beyond a thin storage indirection (and ArrayRef-typed reads). Use Fields
directly at all call sites for consistency with the rest of the struct's
plain-data style.

Assisted by Claude.

Co-authored-by: Claude Opus 4.7 (1M context) <noreply at anthropic.com>

Delta		File
+6	-4	llvm/utils/TableGen/Common/InstructionEncoding.cpp
+4	-4	llvm/utils/TableGen/DecoderEmitter.cpp
+0	-6	llvm/utils/TableGen/Common/InstructionEncoding.h
+10	-14	3 files

LLVM/project d6ffa06 — llvm/lib/IR Constants.cpp, llvm/test/Assembler aggregate-constant-values.ll

2026-05-02 22:21:05 UTC by Shilei Tian on ⎇

users/shiltian/constant-pointer-null-vector-splat

[RFC][IR] Support vector splats in `ConstantPointerNull`

This PR allows `ConstantPointerNull` to represent both scalar pointer nulls and
fixed or scalable vector splats of pointer nulls. This change first aligns with
the native splat behavior of `ConstantInt` and `ConstantFP`, and second, makes
it easier to eventually change the semantics of `ConstantPointerNull` to
represent a semantic null pointer instead of a zero value, which is what it
represents today.

Delta		File
+31	-31	llvm/test/Transforms/RewriteStatepointsForGC/base-vector.ll
+30	-30	llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
+52	-4	llvm/lib/IR/Constants.cpp
+28	-0	llvm/unittests/IR/ConstantsTest.cpp
+18	-9	llvm/test/Transforms/RewriteStatepointsForGC/base-inference.ll
+24	-0	llvm/test/Assembler/aggregate-constant-values.ll
+183	-74	51 files not shown
+333	-203	57 files

LLVM/project 3e2eb32 — llvm/lib/IR Constants.cpp, llvm/test/Assembler aggregate-constant-values.ll

2026-05-02 22:04:50 UTC by Shilei Tian on ⎇

users/shiltian/constant-pointer-null-vector-splat

[RFC][IR] Support vector splats in `ConstantPointerNull`

This PR allows `ConstantPointerNull` to represent both scalar pointer nulls and
fixed or scalable vector splats of pointer nulls. This change first aligns with
the native splat behavior of `ConstantInt` and `ConstantFP`, and second, makes
it easier to eventually change the semantics of `ConstantPointerNull` to
represent a semantic null pointer instead of a zero value, which is what it
represents today.

Delta		File
+31	-31	llvm/test/Transforms/RewriteStatepointsForGC/base-vector.ll
+30	-30	llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
+51	-4	llvm/lib/IR/Constants.cpp
+28	-0	llvm/unittests/IR/ConstantsTest.cpp
+18	-9	llvm/test/Transforms/RewriteStatepointsForGC/base-inference.ll
+24	-0	llvm/test/Assembler/aggregate-constant-values.ll
+182	-74	50 files not shown
+328	-203	56 files

LLVM/project 5bc46b1 — llvm/test/Transforms/LoopVectorize as_cast.ll

2026-05-02 21:28:27 UTC by Florian Hahn via GitHub on ⎇

main

[LV] Modernize as_cast.ll test. (NFC) (#195481)

Update as_cast.ll to cover both loop-invariant and varying address space
casts, as well as auto-generating the checks.

Delta		File
+93	-27	llvm/test/Transforms/LoopVectorize/as_cast.ll
+93	-27	1 files

LLVM/project ecbd653 — llvm/lib/Transforms/Utils CodeExtractor.cpp, llvm/test/Transforms/HotColdSplit stale-funcretval-after-sever.ll

2026-05-02 21:12:42 UTC by Steven Wu on ⎇

users/cachemeifyoucan/spr/codeextractor-reset-stale-funcretval-in-findinputsoutputs

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

Delta		File
+32	-0	llvm/test/Transforms/HotColdSplit/stale-funcretval-after-sever.ll
+3	-0	llvm/lib/Transforms/Utils/CodeExtractor.cpp
+35	-0	2 files

LLVM/project 1f34e4b — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

2026-05-02 21:04:14 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Set predecessor of DispatchVPBB early (NFC). (#195480)

This allows finding the containing plan earlier, which helps when trying
to print DispatchVPBB in a debugger.

Delta		File
+1	-1	llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1	-1	1 files

LLVM/project ff94721 — llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h VPlanTransforms.cpp

2026-05-02 21:00:13 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Add VPBuilder methods to create (First|Last)ActiveLane (NFC). (#195479)

Add dedicaed helpers to builder to slightly simplify code a use-sites.

Delta		File
+14	-0	llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+5	-8	llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1	-2	llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+20	-10	3 files

LLVM/project 13371e2 — compiler-rt/lib/ubsan ubsan_diag.cpp

2026-05-02 20:46:35 UTC by Kleis Auke Wolthuizen via GitHub on ⎇

main

[compiler-rt][UBSan][NFC] Reorder includes in ubsan_diag.cpp (#195435)

Delta		File
+3	-1	compiler-rt/lib/ubsan/ubsan_diag.cpp
+3	-1	1 files

LLVM/project 1cd649c — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

2026-05-02 20:24:12 UTC by xlauko on ⎇

users/xlauko/cir-mul-cleanup

[CIR] Use declarative TableGen constraints for overflow flag verification

Replace hand-written C++ verifiers with PredOpTrait-based constraints
(FlagRequiresIntType, HasAtMostOneOfAttrs). Introduce CIR_SaturatableBinaryOp
base class and use append/prepend ODS directives to compose arguments, format,
and traits across the op hierarchy. Fix HasAtMostOneOfAttrsPred to use
accessor methods instead of dollar-sign references. Add Commutative trait
to AddOp and MulOp.

Delta		File
+49	-35	clang/include/clang/CIR/Dialect/IR/CIROps.td
+0	-39	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+4	-4	clang/test/CIR/CodeGen/size-of-vla.cpp
+4	-4	clang/test/CIR/CodeGen/vla.c
+2	-2	clang/test/CIR/CodeGen/delete-array.cpp
+59	-84	5 files

LLVM/project 3b32d6e — llvm/include/llvm/CodeGen/GlobalISel GenericMachineInstrs.h, llvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp

2026-05-02 20:16:30 UTC by Evgenii Kudriashov via GitHub on ⎇

main

[X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (#141611)

Introduce `G_FPEXTLOAD` and `G_FPTRUNCSTORE` for extending load and
truncating store of a floating point value.

* Introduce `IfFPExtend` and `IfFPTrunc` into `GINodeEquiv` to dispatch
SDAG patterns to the newly introduced opcodes similarly to `G_SEXTLOAD`
and `G_ZEXTLOAD`.
* Added narrowing and widening for the opcodes. However they aren't used
anywhere.
* Supported lowering of `G_FPEXTLOAD` and `G_FPTRUNCSTORE` for X86 by
using X87.
* Added `lowerFPExtAndTruncMem` as default lowering for `G_FPTRUNC` and
`G_FPEXT` using memory.
* Dropped autogenerated line from `legalizer-info-validation.mir` as
scripts can't update them anymore.
* Updated `match-table-cxx.td` with regexps. This is not the first PR
that updates the whole test after opcode introduction.

Delta		File
+259	-0	llvm/test/CodeGen/X86/isel-fptrunc-fpext.ll
+66	-66	llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-cxx.td
+77	-3	llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+27	-27	llvm/test/TableGen/RegClassByHwMode.td
+39	-5	llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
+32	-0	llvm/test/MachineVerifier/test_g_fptruncstore.mir
+500	-101	19 files not shown
+688	-128	25 files

LLVM/project 124d442 — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

2026-05-02 20:04:08 UTC by xlauko on ⎇

users/xlauko/cir-dedup-class-addr

[CIR] Extract CIR_ClassCastOp base class for BaseClassAddrOp and DerivedClassAddrOp

Both ops have identical structure (arguments, results, assembly format)
and differ only in mnemonic and description. Extract a shared TableGen
base class to eliminate the duplication. Also improve the assembly format
to print nonnull before the operand and place the type after the offset.

Delta		File
+22	-33	clang/include/clang/CIR/Dialect/IR/CIROps.td
+18	-18	clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+8	-8	clang/test/CIR/CodeGen/vtt.cpp
+5	-5	clang/test/CIR/CodeGen/derived-to-base.cpp
+4	-4	clang/test/CIR/CodeGen/inherited-ctors.cpp
+3	-3	clang/test/CIR/CodeGen/base-to-derived.cpp
+60	-71	14 files not shown
+90	-101	20 files

LLVM/project c4fc27c — llvm/lib/Transforms/Vectorize VPlanConstruction.cpp LoopVectorize.cpp

2026-05-02 19:55:48 UTC by Ramkumar Ramachandra via GitHub on ⎇

main

[VPlan] Strip pred-block check in inLoopReductions (NFC) (#194086)

A VPInstruction will only have a mask if the block needs predication.

Delta		File
+3	-8	llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+1	-7	llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+1	-3	llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+5	-18	3 files

LLVM/project 8ee61ad — llvm/lib/Target/AMDGPU SIInstructions.td AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU fneg-fabs-v2f32.ll

2026-05-02 19:32:27 UTC by Changpeng Fang via GitHub on ⎇

main

[AMDGPU] Make v2f32 legal for G_FNEG and G_FABS and pattern update (#195419)

  G_FNEG and G_FABS were made legal for v2f32 when packed fp32 instructions were implemented.
For some unknown reasons, this legalization was not upstreamed yet. This work makes v2f32 legal for
G_FNEG and G_FABS, and updates a few tablegen patterns to ensure instructions can be correctly
selected.

Delta		File
+256	-0	llvm/test/CodeGen/AMDGPU/fneg-fabs-v2f32.ll
+17	-6	llvm/lib/Target/AMDGPU/SIInstructions.td
+4	-14	llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.f32.ll
+7	-5	llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+284	-25	4 files

LLVM/project 5d98710 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

2026-05-02 19:17:59 UTC by LumioseSil via GitHub on ⎇

main

[SelectionDAG] Move VSelect sign pattern check from AArch64 to general SelectionDAG (#151840)

For some reason the check is already there, but it bails out. Doing the
transform in SelDAG has no negative effect.

Delta		File
+1,003	-0	llvm/test/CodeGen/X86/cmp-select-sign.ll
+0	-30	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+7	-2	llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1,010	-32	3 files

LLVM/project d20a3c0 — llvm/test/tools/dsymutil/X86 module-warnings.test

2026-05-02 19:06:40 UTC by Jonas Devlieghere via GitHub on ⎇

main

[dsymutil] Update module-warnings.test to run with both linkers (#195474)

The classic linker emits a combined .debug_macinfo table and warns about
MacroLists it has to drop because no compile unit references them. The
parallel linker emits .debug_macinfo per compile unit, so unreferenced
lists are never emitted and have no corresponding warning.

Delta		File
+11	-3	llvm/test/tools/dsymutil/X86/module-warnings.test
+11	-3	1 files

LLVM/project 8a5d5d0 — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

2026-05-02 19:05:09 UTC by xlauko on ⎇

users/xlauko/cir-mul-cleanup

[CIR] Use declarative TableGen constraints for overflow flag verification

Replace hand-written C++ verifiers with PredOpTrait-based constraints
(FlagRequiresIntType, HasAtMostOneOfAttrs). Introduce CIR_SaturatableBinaryOp
base class and use append/prepend ODS directives to compose arguments, format,
and traits across the op hierarchy. Fix HasAtMostOneOfAttrsPred to use
accessor methods instead of dollar-sign references. Add Commutative trait
to AddOp and MulOp.

Delta		File
+49	-35	clang/include/clang/CIR/Dialect/IR/CIROps.td
+0	-39	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+49	-74	2 files

LLVM/project c64084c — clang/include/clang/CIR/Dialect/IR CIROps.td

2026-05-02 18:57:54 UTC by xlauko on ⎇

users/xlauko/cir-signbit-prefix

[CIR][NFC] Rename SignBitOp to CIR_SignBitOp

Align with the CIR_ prefix naming convention used by other op
definitions in CIROps.td.

Delta		File
+1	-1	clang/include/clang/CIR/Dialect/IR/CIROps.td
+1	-1	1 files

LLVM/project 8db17fa — llvm/lib/Transforms/Vectorize VPlanAnalysis.h

2026-05-02 18:57:40 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Remove unused inferScalarTypeForRecipe declaration (NFC). (#194450)

The declaration is not used, remove it.

Delta		File
+0	-2	llvm/lib/Transforms/Vectorize/VPlanAnalysis.h
+0	-2	1 files

LLVM/project 34197a9 — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

2026-05-02 18:48:11 UTC by xlauko on ⎇

users/xlauko/cir-mul-cleanup

[CIR] Use declarative TableGen constraints for overflow flag verification

Replace hand-written C++ verifiers with PredOpTrait-based constraints
(FlagRequiresIntType, HasAtMostOneOfAttrs). Introduce CIR_SaturatableBinaryOp
base class and use append/prepend ODS directives to compose arguments, format,
and traits across the op hierarchy. Fix HasAtMostOneOfAttrsPred to use
accessor methods instead of dollar-sign references. Add Commutative trait
to AddOp and MulOp.

Delta		File
+50	-35	clang/include/clang/CIR/Dialect/IR/CIROps.td
+0	-39	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+50	-74	2 files

LLVM/project ea1505a — llvm/include/llvm/IR Constant.h, llvm/lib/IR Constants.cpp

2026-05-02 16:45:08 UTC by Shilei Tian on ⎇

users/shiltian/constant-zero-value-apis

[NFCI][IR] Add DataLayout pointer to zero and null value related APIs

When the semantics of `ConstantPointerNull` change to represent a semantic null
pointer in the future, a null value won't necessarily be a zero value anymore.
Because of that, the entire LLVM constant infrastructure will need to change. As
a first step, this PR adds an optional data layout pointer to `isNullValue`,
`isZeroValue`, `getNullValue`, and `getZeroValue`. It isn't used yet, since a
null value is still a zero value right now.

Delta		File
+227	-0	llvm/unittests/IR/ConstantsTest.cpp
+104	-11	llvm/lib/IR/Constants.cpp
+20	-2	llvm/include/llvm/IR/Constant.h
+351	-13	3 files

LLVM/project d1a9dfe — llvm/include/llvm/IR Constant.h, llvm/lib/IR Constants.cpp

2026-05-02 16:28:17 UTC by Shilei Tian on ⎇

users/shiltian/constant-zero-value-apis

[NFCI][IR] Add DataLayout pointer to zero and null value related APIs

When the semantics of `ConstantPointerNull` change to represent a semantic null
pointer in the future, a null value won't necessarily be a zero value anymore.
Because of that, the entire LLVM constant infrastructure will need to change. As
a first step, this PR adds an optional data layout pointer to `isNullValue`,
`isZeroValue`, `getNullValue`, and `getZeroValue`. It isn't used yet, since a
null value is still a zero value right now.

Delta		File
+227	-0	llvm/unittests/IR/ConstantsTest.cpp
+126	-11	llvm/lib/IR/Constants.cpp
+20	-2	llvm/include/llvm/IR/Constant.h
+373	-13	3 files

LLVM/project 0555d59 — clang/test/CodeGen target-data.c, clang/test/CodeGenOpenCL amdgpu-env-amdgcn.cl

2026-05-02 16:15:44 UTC by Shilei Tian via GitHub on ⎇

main

Revert "[AMDGPU] Update data layout string to use the new pointer spec about null pointer value" (#195460)

Reverts llvm/llvm-project#194101 since the infrastructure to use that is
not ready such that updating it right now will cause some inconsistency.

Delta		File
+6	-7	llvm/lib/TargetParser/TargetDataLayout.cpp
+4	-4	clang/test/CodeGen/target-data.c
+3	-3	lld/test/ELF/lto/amdgcn-oses.ll
+1	-1	lld/test/ELF/lto/r600.ll
+1	-1	lld/test/ELF/lto/amdgcn.ll
+1	-1	clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
+16	-17	6 files

LLVM/project f66331e — llvm/test/tools/llubi stack_overflow.ll store_dead.ll, llvm/tools/llubi/lib Interpreter.cpp ExecutorBase.cpp

2026-05-02 15:55:26 UTC by Zhige Chen via GitHub on ⎇

main

[llubi] Improve diagnostics and add stacktrace (#195449)

This PR improves UB diagnostics by making `reportImmediateUB` return a
temporary streamable object. Stacktrace on UB is also added.

Delta		File
+40	-34	llvm/tools/llubi/lib/Interpreter.cpp
+50	-13	llvm/tools/llubi/lib/ExecutorBase.cpp
+38	-21	llvm/tools/llubi/lib/Library.cpp
+53	-2	llvm/tools/llubi/lib/ExecutorBase.h
+11	-0	llvm/test/tools/llubi/stack_overflow.ll
+3	-1	llvm/test/tools/llubi/store_dead.ll
+195	-71	34 files not shown
+277	-83	40 files

LLVM/project 267e3d3 — clang/test/CodeGen target-data.c, clang/test/CodeGenOpenCL amdgpu-env-amdgcn.cl

2026-05-02 15:22:31 UTC by Shilei Tian via GitHub on ⎇

revert-194101-users/shiltian/amdgpu-datalayout-string

Revert "[AMDGPU] Update data layout string to use the new pointer spec about …"

This reverts commit 1a861970f2ba5a8e0bdc47423a892d5f39a25c05.

Delta		File
+6	-7	llvm/lib/TargetParser/TargetDataLayout.cpp
+4	-4	clang/test/CodeGen/target-data.c
+3	-3	lld/test/ELF/lto/amdgcn-oses.ll
+1	-1	lld/test/ELF/lto/r600.ll
+1	-1	lld/test/ELF/lto/amdgcn.ll
+1	-1	clang/test/CodeGenOpenCL/amdgpu-env-amdgcn.cl
+16	-17	6 files

LLVM/project 2ce499b — llvm/include/llvm/IR Constant.h, llvm/lib/IR Constants.cpp

2026-05-02 15:18:26 UTC by Shilei Tian on ⎇

users/shiltian/constant-zero-value-apis

[NFCI][IR] Add DataLayout pointer to zero and null value related APIs

When the semantics of `ConstantPointerNull` change to represent a semantic null
pointer in the future, a null value won't necessarily be a zero value anymore.
Because of that, the entire LLVM constant infrastructure will need to change. As
a first step, this PR adds an optional data layout pointer to `isNullValue`,
`isZeroValue`, `getNullValue`, and `getZeroValue`. It isn't used yet, since a
null value is still a zero value right now.

Delta		File
+144	-0	llvm/unittests/IR/ConstantsTest.cpp
+25	-2	llvm/include/llvm/IR/Constant.h
+15	-3	llvm/lib/IR/Constants.cpp
+184	-5	3 files

LLVM/project 7d925b9 — libcxx/include/__random discard_block_engine.h shuffle_order_engine.h

2026-05-02 15:06:17 UTC by Nikolas Klauser via GitHub on ⎇

main

[libc++] Make __is_seed_sequence a variable template (#195420)

This makes things a bit more readable and improves compile times a bit.

Delta		File
+4	-5	libcxx/include/__random/discard_block_engine.h
+4	-5	libcxx/include/__random/shuffle_order_engine.h
+2	-4	libcxx/include/__random/is_seed_sequence.h
+2	-2	libcxx/include/__random/linear_congruential_engine.h
+2	-2	libcxx/include/__random/mersenne_twister_engine.h
+2	-2	libcxx/include/__random/independent_bits_engine.h
+16	-20	1 files not shown
+18	-22	7 files

LLVM/project fd51c78 — clang/lib/AST DeclTemplate.cpp, clang/lib/Sema SemaTemplateDeductionGuide.cpp SemaTemplate.cpp

2026-05-02 13:59:17 UTC by Matheus Izvekov via GitHub on ⎇

main

[clang] fix alias ctad producing function template with no template parameters (#195303)

Delta		File
+40	-43	clang/lib/Sema/SemaTemplateDeductionGuide.cpp
+18	-9	clang/lib/Sema/SemaTemplate.cpp
+9	-0	clang/lib/AST/DeclTemplate.cpp
+4	-3	clang/test/SemaCXX/cxx20-ctad-type-alias.cpp
+3	-3	clang/lib/Sema/SemaInit.cpp
+2	-2	clang/test/SemaTemplate/deduction-guide.cpp
+76	-60	4 files not shown
+82	-62	10 files