AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES
Move G_UNMERGE_VALUES handling to AMDGPURegBankLegalizeRules.cpp.
Fix sgpr S16 unmerge by lowering using shift and using S32.
Previously sgpr S16 unmerge was selected using _lo16 and _hi16 subreg
indexes which are exclusive to vgpr register classes.
For remaing cases we do trivial mapping, assigns same reg bank
to all operands, vgpr or sgpr.
[lldb] Fix SBBreakpointName::SetEnabled to propagate changes to breakpoints (#178734)
When setting the enabled state of a breakpoint name via the API, the
change was not being propagated to breakpoints using that name.
This was inconsistent with the CLI behaviour where `breakpoint name
configure --enable/--disable` correctly updates all associated
breakpoints.
[SPIRV] Split async copy tests and fix invalid tests
After a spirv-val update, tests that mix spirv32 and spirv64 targets with
the same LLVM IR are now correctly flagged as invalid. The SPIR-V
specification requires that NumElements and Stride operands in
OpGroupAsyncCopy must be 32-bit integers when the addressing model is
Physical32, and 64-bit integers for Physical64.
ValueTracking: Revert noundef checks in computeKnownFPClass for fmul/fma
This functionally reverts fd5cfcc41311c6287e9dc408b8aae499501660e1 and
35ce17b6f6ca5dd321af8e6763554b10824e4ac4.
This was correct and necessary, but is causing performance regressions
since isGuaranteedNotToBeUndef is apparently not smart enough to detect
through recurrences. Revert this for the release branch.
Also the test coverage was inadequate for the fma case, so add a new
case which changes with and without the check.
[GlobalISel] Insert bitcast instead of register replacement when types don't match. (#177397)
Cases like the newly added test with the vector types currently hit
```Assertion `canReplaceReg(OldReg, Replacement, MRI) && \"Cannot
replace register?\"' failed."``` because source and destination
registers have mismatching types. Apart from the assertion, it also
fails when using `--verify-machineinstrs`. This PR adds a bitcast in
those cases.
[DAG] Enable bitcast STLF for Constant/Undef (#172523)
This patch introduces support for Store-to-Load Forwarding (STLF) in
`DAGCombiner::ForwardStoreValueToDirectLoad` when the store and load
have **different types but equal memory size** (e.g., storing an `i32`
then loading a `float` from the same location).
### What this patch does:
**Enables Optimization:** It allows for the safe forwarding of the
stored value as a Bitcast when the value is:
* A **Constant** (`ConstantSDNode`, `ConstantFPSDNode`,
`ConstantPoolSDNode`).
* **Undef**.
* And the memory sizes (`LdMemSize` == `StMemSize`) match.
### Scope and Next Steps:
This patch **only implements forwarding for constant and undef values
that has the same memory size** so far.
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[MemCpyOpt] Extend `performMemCpyToMemSetOptzn` to partially memset'd region
While doing memset-to-memcpy forwarding, take into account memset
that covers memory regions from a given offset, and the leading
bytes of such a region are undef.
Fixes: https://github.com/llvm/llvm-project/issues/172326.
[clang][bytecode] Clean up `interp::Function` parameter handling (#178621)
Replace the multiple data structures with a vector + a map holding all
`ParamDescriptor`s. Update docs.
Add test for amdgcn.if/else uniformity analysis
This test documents the current behavior where both outputs of
amdgcn.if and amdgcn.else are marked as divergent. The second
output (exec mask) should be uniform.
[Driver][Frontend] Add -f[no-]ms-anonymous-structs flag to control Microsoft anonymous struct/union extension (#176551)
Add a Clang driver option -fms-anonymous-structs and
-fno-ms-anonymous-structs
to enable or disable Microsoft anonymous struct/union support
independently of -fms-extensions.
**Motivation**:
- On some platforms (e.g. AIX), enabling `-fms-extensions` can conflict
with system headers (such as usage of `__ptr32`).
- Some codebases rely specifically on Microsoft anonymous struct/union
behavior without requiring other Microsoft extensions.
This change allows users to selectively enable the anonymous
struct/union
extension at the driver level without enabling full Microsoft
compatibility
mode.
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[lldb-dap] Fix the completion provided to the DAP client. (#177151)
Previously, completion behavior was inconsistent,
sometimes including the partial token or removing existing user text.
Since LLDB completions includes the partial token by default, we now
strip it before sending to the client.
The completion heuristic:
1. Strip the commandEscapePrefix
2. Request completions from the debugger
3. Get the line at cursor position
4. Calculate the length of any partial token
5. Offset each completion by the partial token length
In all cases, the completion starts from the cursor position. then
offsets by `Length` to the left and inserts the completion.
Examples (single quotes show whitespace and are not part of the input):
```md
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[mlir][shape] Fix crash in FromExtentsOp::fold with poison operands (#178844)
## Summary
- Fix assertion failure in `shape.from_extents` fold when operands
include `ub.poison`
- The fold assumed all non null attributes were `IntegerAttr`, but
poison produces a different attribute type
- Use `dyn_cast_if_present` to safely handle non integer attributes
Fixes #178820
## Test plan
- Added regression test `@from_extents_poison` in canonicalize.mlir
[ExpandIRInst] Support expanding fptoi to smaller type (#178690)
In order to support expanding fptoi where the target type is smaller,
make most of the code work on the float-as-integer type, rather than the
target type of the cast. We only need to cast the final result to the
target type, or prior to performing a left shift.
This not only allows us to handle casts to a smaller type, but also
avoids performing intermediate calculations on unnecessarily large
types.
This also matches how compiler-rt handles this:
https://github.com/llvm/llvm-project/blob/main/compiler-rt/lib/builtins/fp_fixint_impl.inc
Proof: https://alive2.llvm.org/ce/z/3pJ9pE
(Note that there is a pre-existing issue that we produce the same code
for fptosi and fptoui.)
[InlineSpiller] Hoist spills only when all of its subranges are available (#177703)
Context:
https://github.com/llvm/llvm-project/issues/176001#issuecomment-3793846479
When we're hoisting a spill to another block, and storing one of its
sibling values there instead, we need to make sure all sub ranges of
that sibling value is alive at the insertion point. Otherwise, we might
accidentally store compromised subranges values back to the spill slot.
(cherry picked from commit 75f03a62d1f9b0081fff57ceebb29a3ae1560a61)
[SystemZ] Implement ctor/dtor emission via @@SQINIT and .xtor sections (#171476)
This patch implements support for constructors/destructors by
introducing the
`@@SQINIT` section and emitting `.xtor.<priority>` sections within the
SystemZ
AsmPrinter and in the GOFF object lowering layer.
(cherry picked from commit 41567d8ec21b79e16c9f1223e2df23c65c1bc195)
[LV] Add support for extended fadd reductions (#178447)
This makes use of the llvm.vector.partial.reduce.fadd intrinsics added
in #163975 to handle the following with FDOT:
```
float32_t fdot(float16_t *src, int N) {
float32_t sum = 0.0f;
for (int i=0; i<N; ++i)
sum += src[i];
return sum;
}
```
Revert "[RISCV] Support RISCV BitInt larger than 128 (#175515)" (#178311)
This reverts commit e3156c531da5aa4ec604605ed4e19638879d773c.
We need to resolve a crash on trunk and LLVM 22. Reverting makes it
easier to backport.
Fixes #176637.
Fix insert DBG_VALUE after terminator Failure for Hexagon (#173401)
This patch fixes an assertion failure on VLIW targets like Hexagon,
where a packet can contain both a terminator and a spill/copy. The
existing code did not look inside bundles, hence, it could leave a
transfer anchored on a terminator. When LiveDebugValues later
attempted to insert a DBG_VALUE after that packet, it hit:
Assertion `!TR.TransferInst->isTerminator() && "Cannot insert
DBG_VALUE after terminator"' failed
The change switches to instr_iterator and walks each packet with
getBundleStart/getBundleEnd. Packets containing a terminator are skipped
for insertion; non‑terminator ops in other packets are still processed
normally. This avoids illegal insertion points while keeping spill/copy
tracking intact.
(cherry picked from commit 02771a3eaff153002ec544c3dc4427d56ccd4456)
