[mlir][ODS] Include headers of used traits in generated declarations (#236155)
While teaching at the [MLIR summer
school](https://mlir-school.github.io/summer-2026/), a common confusion
by students was the need to add includes for C++ constructs generated by
TableGen, i.e., code they didn't even write!
This PR adds a `cppInclude` list to `Trait` that names the C++ headers
declaring the trait or interface. Generated declarations now emit an
`#include` for the headers of all traits and interfaces they use
(including base interfaces, side effects, `DeclareOpInterfaceMethods`
and trait lists), plus the core MLIR headers every declaration needs.
This should heavily reduce the boilerplate required for new dialects.
The PR only introduces the mechanism, but does not yet override the
field in any TableGen fields beyond tests and the test dialect. Future
work will also port this to more constructs (type and attr constraints
e.g.). Another motivation is that this mechanism is more-or-less a UX
prerequisite to have automatic dialect sharding and self-contained
TableGen generated headers in the future.
[mlir][tosa] Fix i64 negate lowering with constant zero points (#237808)
When both zero points of tosa.negate are constant, the TosaToLinalg
lowering picks the narrowest intermediate type that can hold
maxInt(inputBitWidth) + |inZp + outZp| + 1. For i64 inputs this sum
overflows int64_t, which is undefined behavior and in practice wraps to
a negative value. The bound then compares below INT16_MAX, so the
lowering selects an i16 intermediate and emits an invalid `arith.extsi`
from i64 to i16.
The fix is to compute the zero point sum and the bound with 128-bit
APInt so that neither can overflow. i64 inputs now keep the 64-bit
intermediate, as in the non-constant zero point path, and the
intermediate type chosen for narrower inputs is unchanged.
Assisted By: Claude
[MC] Permit BuildAttribute values to be 64-bit (#238009)
The current generic implementation stores values as unsigned. This is
sufficient for all existing uses.
The AArch64 PAuthABI attributes are defined to be 64-bit values and the
PAuthABI profile for bare-metal will use values > 32-bits to store
flags.
An existing LLD test showed truncation and needed to be updated.
[mlir][MemRefToLLVM] Cast dealloc pointer back to address space 0 (#237806)
`DeallocOpLowering` passes the allocated pointer from the memref
descriptor straight to `free`. For a memref in a non-default memory
space, e.g. `memref<4xf32, 1>`, that pointer is `!llvm.ptr<1>`, because
the alloc lowering casts the result of `malloc` into the memref's
address space. `free` takes a plain `!llvm.ptr`, so the generated
`llvm.call` fails the verifier with an operand type mismatch. Unranked
memrefs such as `memref<*xf32, 1>` hit the same error.
Cast the pointer back to the default address space before the call,
undoing the cast done on the alloc side, and add tests for the ranked
and unranked cases.
Fixes #236924
[AMDGPU] Support FLAT_SCRATCH in SILoadStoreOptimizer const offset promotion (#212507)
Add a 32-bit base/offset extraction path for the V_ADD_U32_e64 pattern
used by FLAT_SCRATCH vaddr and enable promoteConstantOffsetToImm for
FLAT_SCRATCH instructions that have a vaddr operand.
[SandboxVec][LoadStoreVec] Add Reinterpret::reinterpretValue
Mixed-type load unpacking is the first caller. Insert the ptrtoint /
bitcast / inttoptr chain before the unpack point, and return nullptr
when a non-integral pointer is involved.
[SandboxVec][LoadStoreVec] Support mixed-type load vectorization
Remove the restriction that every load in a top-level load chain must
have the vector's element type. A chain of mixed types such as
{i32, float} or {double, i32, i32} is loaded as a vector of integers
(as chosen by VecUtils::getCombinedVectorTypeFor()), each original load
is unpacked from the lanes it occupies, and then reinterpreted back to
its own type with Reinterpret::reinterpretValue().
Chains involving a non-integral pointer are left alone, since such a
pointer cannot be recovered from an integer lane.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[SandboxVec][LoadStoreVec] Split Reinterpret legality from cast-chain building
canReinterpret() only checks for non-integral pointers, and getCastChain()
builds the ptrtoint/bitcast/inttoptr sequence under that precondition.
The chain is at most three casts, so assert that. Drop the unused runtime
reinterpretValue(); mixed-type loads will add it with tests.
Co-authored-by: Cursor <cursoragent at cursor.com>
[AMDGPU[ Expand `av` built-ins and intrinsics to b16/b32/b64
They previously only supported b128, but there is no technical reason why we cannot support all bit widths.
Disclaimer: This is largely Claude assisted. I ran it in short self-contained bursts (to ensure the output of each step was reviewable) to do all the boring steps of plumbing this through the stack. I also manually reverified and cleaned up all the files one by one between each steps.
Assisted-by: Claude Opus 5.5
[SandboxVec][LoadStoreVec] Add LLVM_ABI annotations to Reinterpret
Export the out-of-line static members of Reinterpret, as reported by
the LLVM_ABI annotation check. getCastChain() is private but is called
from the inline canReinterpret(), so it needs to be exported too.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[SandboxVec][LoadStoreVec] Don't pack non-integral pointer constants
getEquivalentConstantWithType() only rejected a non-integral pointer
destination type (via an assert), while a non-integral source such as
'ptr addrspace(5) null' was silently converted with ptrtoint. A
non-integral pointer has no stable integer representation, so it cannot
be packed into an integer lane.
Add VecUtils::isNonIntegralPtr() and return nullptr from
getEquivalentConstantWithType() when either type is a non-integral
pointer, which makes createConstantVector() give up on the bundle.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[SandboxVec][LoadStoreVec] Add Reinterpret helper for same-size type casts (NFC)
Replace getEquivalentConstantWithType() with a Reinterpret utility that
reinterprets the bits of a value as another type of the same size. It
builds a chain of ptrtoint / bitcast / inttoptr casts, and applies it
either to a constant (folding) or to a runtime value (inserting casts).
The runtime form will be used to unpack mixed-type vector loads and to
pack mixed-type store operands.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[mlir][vector] Fix mask rank extension for TransferWriteNonPermutationLowering (#229852)
When a `vector.transfer_write`'s permutation map skips a dim between the
dims that are written to, e.g. `(d0, d1, d2, d3) -> (d1, d3)`,
`TransferWriteNonPermutationLowering` adds a unit dim for it. The vector
got that unit dim in the right place, but the mask always got it at the
end. The new write then failed to verify:
```
'vector.transfer_write' op inferred mask type ('vector<7x1x8xi1>') and mask operand type ('vector<7x8x1xi1>') don't match
```
`-convert-vector-to-scf` runs the same pattern and fails on such a write
too.
This puts the mask's unit dims at the positions of the missing dims.
This is #144893 by @Groverkss, moved to the current builder API. The
test uses a map that also skips the leading dim, so the offset from the
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RuntimeLibcalls: Mark vector libcall out pointers dereferenceable
The whole vector width will be written, so mark the vector width. To
maintain the element width alignment for some functions, we need to
start explicitly tracking if the element alignment is used or not.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
RuntimeLibcalls: Declare vector libcall attributes in TableGen
Replace the type-based heuristics for vector math libcall attributes
with attributes declared on the libcall definitions, emitted with the
same attribute table helpers as intrinsics.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
TableGen: Move attribute set and sequence table helpers to a header
Move AttributeSetTable and AttributeSequenceTable out of
IntrinsicEmitter into a reusable header so the runtime libcall emitter
can use the same encoding.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
TableGen: Unique intrinsic attribute tables by attribute value
Unique the intrinsic attribute tables by the attributes themselves
rather than by CodeGenIntrinsic, and separate the uniquing from the
emission in AttributeSetTable and AttributeSequenceTable so other
emitters can reuse them.
This also fixes MaxNumAttrs, which was computed from one representative
intrinsic per argument attribute sequence and could undercount.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
