[clang][bytecode] Check for block pointers in Free() (#205043)
We need a block pointer here for the following operations, and non-block
pointers aren't valid anyway.
AMDGPU/GlobalISel: Remove -new-reg-bank-select option (#203929)
AMDGPU's -global-isel pipeline that uses AMDGPURegBankSelect and
AMDGPURegBankLegalize, previously -global-isel -new-reg-bank-select,
is now the default -global-isel pipeline.
Remove -new-reg-bank-select option from the compiler.
Remove -new-reg-bank-select from all llvm regression tests.
Edit a couple comments to reference RegBankLegalize instead of
-new-reg-bank-select.
[Allocator] Keep bump pointer at a minimum alignment (#203718)
Add a `MinAlign` template parameter (default 8, sizeof(size_t) on 64-bit
platforms) so that the common case `Alignment <= MinAlign` can skip
realigning `CurPtr`.
This is achieved by rounding each allocation's size up to MinAlign, so
the bump pointer stays MinAlign-aligned between allocations.
SpecificBumpPtrAllocator::DestroyAll() walks objects at a fixed
sizeof(T) stride and needs tight packing, so it uses MinAlign=1. (alignof(T) would
pack just as tightly and reuse the default instantiation, but T may be
incomplete here, e.g. `SpecificBumpPtrAllocator<MCSectionELF>`.)
Its `Allocate` still skips the realign: the slab is max_align_t-aligned
and every size is a multiple of alignof(T), so the bump pointer stays
alignof(T)-aligned and we can just request alignment 1. Over-aligned
types (alignof(T) > alignof(max_align_t)) keep requesting alignof(T).
[5 lines not shown]
AMDGPU/GlobalISel: Remove -new-reg-bank-select option
AMDGPU's -global-isel pipeline that uses AMDGPURegBankSelect and
AMDGPURegBankLegalize, previously -global-isel -new-reg-bank-select,
is now the default -global-isel pipeline.
Remove -new-reg-bank-select option from the compiler.
Remove -new-reg-bank-select from all llvm regression tests.
Edit a couple comments to reference RegBankLegalize instead of
-new-reg-bank-select.
Revert "[lldb] Survive ptrace(PT_DENY_ATTACH) when attaching" (#205075)
Reverts llvm/llvm-project#204688
This breaks green dragon where the error message is `error: attach
failed: this is a non-interactive debug session, cannot get permission
to debug processes.`
AMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default (#203928)
AMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default
Change AMDGPU's default -global-isel pipeline to use AMDGPURegBankSelect
and AMDGPURegBankLegalize (previously -global-isel -new-reg-bank-select)
by default instead of RegBankSelect which uses AMDGPURegisterBankInfo.
-global-isel pipeline that used RegBankSelect/AMDGPURegisterBankInfo is
now deprecated, since it could not generate functionally correct code in
some cases involving divergent control flow and phis.
-new-reg-bank-select option does nothing and will be removed in followup
patch.
Delete regbankselect-mui.ll and regbankselect-mui-salu-float.ll, which
existed to compare the -global-isel vs -global-isel -new-reg-bank-select.
Temporarily disable a couple of tests that are missing AMDGPURegBankLegalize
support.
[LifetimeSafety] Add `LifetimeSafetyDanglingGlobalMoved` to strict diagnostic group (#204891)
Fixes #204213
`-Wlifetime-safety-dangling-global-moved` was defined but not included
in any parent diagnostic group, meaning `-Wlifetime-safety-all` and
`-Wno-lifetime-safety-all` had no effect on it.
`LifetimeSafetyDanglingGlobal` (the non-moved variant) was already
correctly placed under `LifetimeSafetyPermissive`. Following the same
pattern as the other `-moved` sibling warnings
(`DanglingFieldMoved`, `ReturnStackAddrMoved`, `UseAfterScopeMoved`),
this patch adds `LifetimeSafetyDanglingGlobalMoved` to
`LifetimeSafetyStrict`, which is part of the `lifetime-safety-all`
hierarchy.
Assisted-by: Claude (Anthropic) — used for learning and understanding
the codebase, not for generating code directly.
[llvm-objcopy] Report unsupported formats before compression (#202357)
Fixes #197877.
`llvm-objcopy --compress-sections` now reports unavailable compression
support while parsing the option, matching the behavior of
`--compress-debug-sections`. This avoids reaching compression code with
an unavailable format.
Decompression (either via `--decompress-debug-sections` or
`--compress-sections` with a `none` format) is still checked when the
relevant compressed section is processed, because the required
compression format is determined from the section header rather than
from the command-line option.
The `compress-sections-within-segment` test now requires zlib because
`--compress-sections .text=zlib` is diagnosed during option parsing when
zlib support is unavailable, before the test can reach the intended
"section within a segment" diagnostic.
[NFC][llvm] simplify convertWideToUTF8 overloads (#204552)
Remove the C-String overload of `convertWideToUTF8` and convert the
`ArrayRef` one to use `std::wstring_view` in order to simplify the API.
[NFC][AArch64][MCA] Rename A55/A57 mca tests (#204551)
Rename several llvm-mca tests for cortex-a55 and cortex-a57 to follow
the same pattern as the other testss
AMDGPU/GlobalISel: Remove -new-reg-bank-select option
AMDGPU's -global-isel pipeline that uses AMDGPURegBankSelect and
AMDGPURegBankLegalize, previously -global-isel -new-reg-bank-select,
is now the default -global-isel pipeline.
Remove -new-reg-bank-select option from the compiler.
Remove -new-reg-bank-select from all llvm regression tests.
Edit a couple comments to reference RegBankLegalize instead of
-new-reg-bank-select.
[mlir][bufferization] Introduce reconcileBufferTypeMismatchFn hook (#202667)
This PR is the first part of the work that aims to allow customizations
in resolving mismatching buffer types.
Add a new bufferization hook that lets downstream bufferization
implementations define how to handle buffer mismatches that appear
during type inference in various upstream scenarios.
The hook is used as a fallback mechanism in several upstream operations.
For example, when bufferizing block signatures (scf.execute_region), and
resolving "branch" conflicts (scf.if, scfl.index_switch, scf.for,
arith.select).
The hook returns a valid buffer type when reconciliation succeeded;
failure indicates reconciliation failure and should be treated as
bufferization failure. The caller of the hook is expected to use the
returned buffer type. By default, a memref with fully-dynamic layout map
is returned (for unranked case, buffers are assumed to match).
[3 lines not shown]
AMDGPU/GlobalISel: Use AMDGPURegBankSelect + AMDGPURegBankLegalize by default
Change AMDGPU's default -global-isel pipeline to use AMDGPURegBankSelect
and AMDGPURegBankLegalize (previously -global-isel -new-reg-bank-select)
by default instead of RegBankSelect which uses AMDGPURegisterBankInfo.
-global-isel pipeline that used RegBankSelect/AMDGPURegisterBankInfo is
now deprecated, since it could not generate functionally correct code in
some cases involving divergent control flow and phis.
-new-reg-bank-select option does nothing and will be removed in followup
patch.
Delete regbankselect-mui.ll and regbankselect-mui-salu-float.ll, which
existed to compare the -global-isel vs -global-isel -new-reg-bank-select.
Temporarily disable a couple of tests that are missing AMDGPURegBankLegalize
support.
[ARM] Fix Machine Outliner crash when tBLXr uses non-tcGPR register (#200684)
When the Machine Outliner selects MachineOutlinerThunk mode for a
sequence ending in tBLXr/tBLXr_noip, it converts the indirect call to
tTAILJMPr in buildOutlinedFrame. However tTAILJMPr requires its operand
to be in tcGPR (R0-R3, R12), while tBLXr accepts any GPR.
If the register is callee-saved (e.g. r4), the Machine Verifier crashes
with 'Illegal physical register for instruction'.
Fixes #188076
[mlir][spirv] Re-enable bf16/fp8 for vector composite ops (#204848)
Allow bf16 and fp8 vector element types in VectorExtractDynamic,
VectorInsertDynamic, and VectorShuffle.
clang: Use the effective triple string for offload jobs
Track the future effective triple for the job, rather than
the toolchain's default triple. In the future this will
change the result when amdgpu starts adjusting the triples
to contain subarches.
[mlir][tosa] Check same input/output types in pooling ops verifier (#203565)
Adds a missing check to make sure the input and output types of pooling
ops have the same element type.
[AMDGPU] Remove stale declarations. NFC. (#205047)
Remove declarations of functions that are never defined. Also remove
unused field AMDGPUInstructionSelector::TM.
Co-authored-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
clang/AMDGPU: Use effective triple instead of raw toolchain triple
Start using the effective triple instead of the raw toolchain triple.
For the moment this is NFC, but will change when new uses of the subarch
field are introduced.