LLVM/project ab1ef45clang/test/SemaCXX warn-memset-bad-sizeof.cpp

[Clang][Test] Fix warn-memset-bad-sizeof.cpp after #183004 (#205201)

The new `-Wstringop-overread` warning (added in #183004) fires on the
SemaCXX test warn-memset-bad-sizeof.cpp. This happens on targets where
unsigned matches size_t, such as 32-bit ARM, because clang will match
the declaration with the builtin prototype (specifically, argument
`unsigned n`).

Suppress the warning since this test is exercising
`-Wsizeof-pointer-memaccess`, not source buffer overreads.

Fixes:
- https://lab.llvm.org/buildbot/#/builders/154/builds/32985
- https://lab.llvm.org/buildbot/#/builders/135/builds/3888
- https://lab.llvm.org/buildbot/#/builders/38/builds/9363
DeltaFile
+1-1clang/test/SemaCXX/warn-memset-bad-sizeof.cpp
+1-11 files

LLVM/project 45a65bblibcxx/include version, libcxx/include/__expected expected.h

[libc++]  P3798R1: The unexpected in std::expected (#204826)

Closes #204394

Implements P3798 and related tests.

Applies the paper as a Defect Report per https://wg21.link/P3798/github.
DeltaFile
+42-0libcxx/test/std/utilities/expected/expected.expected/observers/has_error.pass.cpp
+42-0libcxx/test/std/utilities/expected/expected.void/observers/has_error.pass.cpp
+4-4libcxx/test/std/language.support/support.limits/support.limits.general/expected.version.compile.pass.cpp
+4-4libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
+4-0libcxx/include/__expected/expected.h
+2-2libcxx/include/version
+98-105 files not shown
+104-1311 files

LLVM/project 58b0681clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

LifetimeCaptureByAttr
DeltaFile
+6-4clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+6-41 files

LLVM/project 1416b5fllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/lib/Target/AMDGPU SIISelLowering.cpp SIISelLowering.h

[AMDGPU][DAGCombiner] Fix UADDO/USUBO_CARRY carry-out miscompile and remove redundant AMDGPU combine (#204362)

performAddCarrySubCarryCombine in SIISelLowering folded:
    
  uaddo_carry((x+y), 0, cc) -> uaddo_carry(x, y, cc)
  usubo_carry((x-y), 0, cc) -> usubo_carry(x, y, cc)
    
Both produce the same value but differ in carry-out when x+y (or x-y)
wraps. The fold was missing a !N->hasAnyUseOfValue(1) guard, giving
wrong carry values to consumers. E.g. x=0xFFFFFFFF, y=1, cc=0:
  original: ((x+y) mod 2^32 + cc) >= 2^32 = 0  (correct)
  folded:   (x+y+cc) >= 2^32 = 1  (wrong)
    
The generic visitUADDO_CARRY (DAGCombiner.cpp) already handles
the UADDO_CARRY/ADD fold with the correct guard. Since target combines
fire before generic ones, the AMDGPU ADD arm was a buggy duplicate.
    
The USUBO_CARRY/SUB arm is produced by AMDGPU's performAddCombine
which converts add(sub(v,a), sext(cmp)) -> usubo_carry(sub(v,a), 0,

    [12 lines not shown]
DeltaFile
+174-0llvm/test/CodeGen/AMDGPU/usubo.ll
+164-0llvm/test/CodeGen/AMDGPU/uaddo.ll
+0-30llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+7-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+0-1llvm/lib/Target/AMDGPU/SIISelLowering.h
+345-315 files

LLVM/project f17453emlir/lib/Dialect/MemRef/Transforms RuntimeOpVerification.cpp, mlir/test/Dialect/MemRef runtime-verification.mlir

[mlir][memref] Add SCFDialect dependency to RuntimeOpVerification (#205241)

Explicitly load SCFDialect as a dependent dialect in
RuntimeOpVerification to avoid unregistered dialect errors when
generating `scf.if`/`scf.yield` ops. Fixes #204295.
DeltaFile
+14-1mlir/test/Dialect/MemRef/runtime-verification.mlir
+1-1mlir/lib/Dialect/MemRef/Transforms/RuntimeOpVerification.cpp
+15-22 files

LLVM/project 7a0829ellvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU GCNProcessors.td AMDGPU.td

[AMDGPU] Define new target gfx1154 (#204816)
DeltaFile
+11-6llvm/docs/AMDGPUUsage.rst
+7-2llvm/lib/Target/AMDGPU/GCNProcessors.td
+9-0llvm/test/tools/llvm-readobj/ELF/AMDGPU/elf-headers.test
+7-0llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml
+5-0llvm/test/tools/llvm-objdump/ELF/AMDGPU/subtarget.ll
+0-4llvm/lib/Target/AMDGPU/AMDGPU.td
+39-1214 files not shown
+57-1220 files

LLVM/project 81f0636orc-rt/include CMakeLists.txt, orc-rt/include/orc-rt MacroUtils.h

[orc-rt] Add MacroUtils.h header for general purpose macros. (#205337)

For now just contains ORC_RT_DEPAREN, a macro for stripping parentheses
from its argument. This will be used in an upcoming commit.
DeltaFile
+42-0orc-rt/unittests/MacroUtilsTest.cpp
+31-0orc-rt/include/orc-rt/MacroUtils.h
+1-0orc-rt/include/CMakeLists.txt
+1-0orc-rt/unittests/CMakeLists.txt
+75-04 files

LLVM/project 592e9d3clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary TUSummaryBuilder.h TUSummaryExtractor.h, clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary TUSummaryExtractor.cpp

Reland "[clang][ssaf][NFC] Make SSAFOptions available in Builders and Extractors" (#205334)

The original version of this was reverted part of #205279 because I
didn't know if this or the other patch caused the Windows build
failures. It turns out this patch is fine. I'm relating this now.

---

Now that we have SSAFOptions, it would make it a lot more ergonomic if
it was accessible from builders and extractors.
This PR does exactly that.

Part of rdar://179151023

Co-authored-by: Jan Korous <jkorous at apple.com>
Co-authored-by: Claude Opus 4.7 <noreply at anthropic.com>
DeltaFile
+7-3clang/unittests/ScalableStaticAnalysisFramework/Registries/SummaryExtractorRegistryTest.cpp
+6-3clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
+7-1clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.h
+4-0clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.cpp
+3-1clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+4-0clang/include/clang/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryExtractor.h
+31-84 files not shown
+41-1310 files

LLVM/project a06ac5dllvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 arm64-fpenv.ll

[AArch64] Add flag to conditionally write FPMR (#203911)

Add a AArch64 codegen flag to make llvm.aarch64.set.fpmr avoid writing
FPMR when it already contains the requested value.

By default, llvm.aarch64.set.fpmr continues to lower directly to an MSR
FPMR instruction. With -aarch64-conditional-fpmr-write, the backend
lowers the intrinsic to an MRS/MSR conditional branch sequence.

This is based on the initial implementation from:
https://github.com/llvm/llvm-project/pull/114248

However this PR keeps the conditional FPMR write sequence behind a
codegen flag. One reason to change the codegen lowering is because GCC
emits the conditional branch sequence unconditionally. LLVM preserves
the existing direct MSR lowering by default.
DeltaFile
+57-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+47-7llvm/test/CodeGen/AArch64/arm64-fpenv.ll
+1-2llvm/lib/Target/AArch64/AArch64InstrInfo.td
+3-0llvm/lib/Target/AArch64/AArch64ISelLowering.h
+108-94 files

LLVM/project 9a5e3fdllvm/docs/CommandGuide llvm-offload-binary.rst, llvm/test/tools/llvm-offload-binary member-extract.test

[llvm-offload-binary] Add `member` key to single out archive members (#205170)

Summary:
Currently, archives offer three approaches.
1. `--archive` which takes an archive and puts all the output in a new
   archive
2. No filename, which outputs based on the member names
3. Filename, which just matches everything.
This has a gap for when people wnat a single file without relying on
implicit naming that dumps all the contents to the CWD.

This PR adds `member` which lets you specify the member names as you
would get from `ar t libfoo.a` for this.
DeltaFile
+22-0llvm/test/tools/llvm-offload-binary/member-extract.test
+5-1llvm/tools/llvm-offload-binary/llvm-offload-binary.cpp
+5-0llvm/docs/CommandGuide/llvm-offload-binary.rst
+32-13 files

LLVM/project d2850baclang/include/clang/Basic Attr.td, clang/test/CodeGen convergent-functions.cpp

[Clang] Accept 'noconvergent' attributes outside of CUDA (#205247)

Summary:
There is no reason that `convergent` should be a generic attributes but
not `noconvergent`.
DeltaFile
+11-2clang/test/CodeGen/convergent-functions.cpp
+0-1clang/include/clang/Basic/Attr.td
+11-32 files

LLVM/project 0a991b7llvm/runtimes CMakeLists.txt

[LLVM][Runtimes] Forward 'LLVM_LIBDIR_SUFFIX' to runtimes by default (#205182)

Summary:
This option controls the logical path of the installed libraries. The
runtimes obften reach into libraries, or want to install to the same
location as the main build. Previously you had to set this per-runtime,
but we should likely forward it by default.

Fixes: https://github.com/llvm/llvm-project/issues/159762
DeltaFile
+1-1llvm/runtimes/CMakeLists.txt
+1-11 files

LLVM/project b713aaellvm/test/CodeGen/ARM vcombine.ll

[ARM] Regenerate vcombine.ll. NFC (#205335)
DeltaFile
+130-50llvm/test/CodeGen/ARM/vcombine.ll
+130-501 files

LLVM/project e9aec19llvm/include/llvm/IR InstrTypes.h, llvm/lib/Transforms/InstCombine InstCombineCalls.cpp InstructionCombining.cpp

Reapply "[InstCombine] Merge consecutive assumes" (#205177) (#205324)

The crash was caused by using `getOperandBundle` for an assume, which
requires that the operand bundles are unique. This isn't guaranteed by
assume bundles. This patch adds `hasOperandBundle` instead, which
doesn't have the same constraint.

Original message:

This should make assumes a bit more efficient, since it removes a few
instructions. This should also help with optimizations that are
limited in how many instructions they step through.

This reverts commit 3f0ef1efb26206c3f5d5621d86d740c7f466c67b.
DeltaFile
+22-14llvm/test/Transforms/InstCombine/assume.ll
+19-3llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+6-0llvm/include/llvm/IR/InstrTypes.h
+1-2llvm/test/Transforms/InstCombine/assume-loop-align.ll
+1-2llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
+1-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+50-226 files

LLVM/project 34612fbclang/test/Driver amdgpu-xnack-sramecc-flags.c, llvm/lib/Target/AMDGPU AMDGPUAsmPrinter.cpp

AMDGPU: Use module flags to control xnack and sramecc

This ensures these ABI details are encoded in the IR module
rather than depending on external state from command-line flags.
Previously, these were encoded as function-level subtarget features.
The code object output was a single target ID directive implied
by the global subtarget. The backend would previously check if a
function's subtarget feature mismatched the global subtarget. This
is avoided by making xnack and sramecc module-level properties from
the start. This also provides proper linker compatibility
enforcement, moving the error point earlier.

The old encoding was also an abuse of the subtarget feature system.
Subtarget features are a bitvector, and later features in the string
can override earlier ones. The old handling added a special case
where explicit settings were preserved: ordinarily +feature,-feature
should result in the feature being disabled, but +xnack,-xnack would
preserve the explicit "-xnack" state, which differs from the absence
of any xnack setting.

    [25 lines not shown]
DeltaFile
+52-52llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
+30-46llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+75-0llvm/test/CodeGen/AMDGPU/module-flag-xnack.ll
+36-33clang/test/Driver/amdgpu-xnack-sramecc-flags.c
+66-0llvm/test/CodeGen/AMDGPU/module-flag-sramecc.ll
+54-0llvm/test/CodeGen/AMDGPU/module-flag-xnack-no-on-off-modes.ll
+313-13193 files not shown
+1,146-36099 files

LLVM/project 99c80felldb/test/API/macosx/thread_suspend main.c

[lldb] Fix race/timeout in TestInternalThreadSuspension (#203202)

This test launches a thread and then waits for a signal from the
launched thread. Below is one possible interleaving, where the
`pthread_cond_signal` (2) wins the race and becomes a no-op while (3) is
locking until the test times out.

```
void *
suspend_func (void *unused) {
  [...]
  // 2. Created thread reaches this and signals.
  pthread_cond_signal(&signal_cond);
  [...]
}

int main() {

  pthread_mutex_lock(&signal_mutex);

    [11 lines not shown]
DeltaFile
+3-1lldb/test/API/macosx/thread_suspend/main.c
+3-11 files

LLVM/project 59c5c39clang/test/AST undocumented-attrs.cpp

Fix test after 844136348ef4c03e84bed0a51d8557d53f466b0d (#205328)
DeltaFile
+1-1clang/test/AST/undocumented-attrs.cpp
+1-11 files

LLVM/project 25f0443llvm/lib/Frontend/OpenMP OMPContext.cpp

[OpenMP] Remove unused isStrictSubset template (NFC) (#202987)

The `isStrictSubset` `ArrayRef<T>` template has no callers, so it never
instantiates and trips `-Wunused-template`. The `VariantMatchInfo`
overload does the work that's actually used, and `isSubset` stays
untouched. Removing the dead template.

NFC.

Part of #202945.
DeltaFile
+0-9llvm/lib/Frontend/OpenMP/OMPContext.cpp
+0-91 files

LLVM/project 72d229eclang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

doc for lifetimebound change
DeltaFile
+3-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+3-01 files

LLVM/project dc4e682clang/include/clang/Analysis/Analyses/LifetimeSafety FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

old changes
DeltaFile
+0-9clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+0-1clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+0-102 files

LLVM/project 5a366daclang/lib/Analysis/LifetimeSafety LiveOrigins.cpp

doc
DeltaFile
+3-3clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+3-31 files

LLVM/project d7bf3bdclang/include/clang/Analysis/Analyses/LifetimeSafety FactsGenerator.h, clang/lib/Analysis/LifetimeSafety LiveOrigins.cpp FactsGenerator.cpp

make liveness more precise
DeltaFile
+23-6clang/test/Sema/LifetimeSafety/invalidations.cpp
+14-3clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+11-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+1-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+49-94 files

LLVM/project 8441363clang/include/clang/Basic AttrDocs.td Attr.td, clang/test/AST undocumented-attrs.cpp

Document the [[clang::annotate]] attribute (#203303)

The new documentation mirrors the existing docs for annotate_type.
DeltaFile
+27-0clang/include/clang/Basic/AttrDocs.td
+1-1clang/include/clang/Basic/Attr.td
+0-1clang/test/AST/undocumented-attrs.cpp
+28-23 files

LLVM/project e3f6a42orc-rt/unittests AllocActionTest.cpp SPSAllocActionTest.cpp

[orc-rt] Split AllocAction tests by SPS dependency. (#205322)

Rewrites AllocActionTest.cpp's integration tests (RunBasicAction,
RunFinalize*) to drive AllocActionFunction::handle with a small local
IntPtrDeserializer / IdentitySerializer pair instead of going through
SPS, and moves the existing SPS-using AllocAction tests into
SPSAllocActionTest.cpp.

Also adds two new SPS tests covering previously-uncovered paths:
- RunActionWithSPSArgsAndWFBReturn — SPS argument deserialization plus
AllocActionSPSSerializer's identity (WrapperFunctionBuffer) overload.
- RunActionWithUndecodableArgs — the deserialization-failure path in
AllocActionFunction::handle.

After the split, an AllocActionTest failure indicates problems with the
AllocAction machinery, and an SPSAllocActionTest failure without a
corresponding AllocActionTest failure indicates an SPS encoding /
decoding issue for AllocAction.
DeltaFile
+87-101orc-rt/unittests/AllocActionTest.cpp
+79-0orc-rt/unittests/SPSAllocActionTest.cpp
+166-1012 files

LLVM/project d09868b.ci/green-dragon lldb-windows.groovy

[CI] switch to BuildTools variant of Visual Studio (#201335)

Follow up to:
- https://github.com/swiftlang/swift-docker/pull/566
- https://github.com/swiftlang/swift-docker/pull/565

It's no longer necessary to install packaging at runtime and the new
image will use `BuildTools`.
DeltaFile
+1-3.ci/green-dragon/lldb-windows.groovy
+1-31 files

LLVM/project 7db1304llvm/test/CodeGen/AArch64 zeroing-forms-counts-not.ll sve-ld1-addressing-mode-reg-reg.ll, llvm/test/CodeGen/ARM bf16-imm.ll bfloat.ll

[LLVM][CodeGen] Remove +bf16 for ARM/AArch64 tests that don't strictly need the feature flag. (#204199)

Tests that use bfloat purely as an opaque datatype should not use
instructions that require the bf16 feature.
DeltaFile
+6-6llvm/test/CodeGen/AArch64/zeroing-forms-counts-not.ll
+3-3llvm/test/CodeGen/ARM/bf16-imm.ll
+2-2llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-reg.ll
+2-2llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-reg.ll
+2-2llvm/test/CodeGen/ARM/bfloat.ll
+2-2llvm/test/CodeGen/AArch64/sve2p1-vector-shuffles.ll
+17-1732 files not shown
+52-5538 files

LLVM/project 9750a8dllvm/include/llvm/ADT APFloat.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp SelectionDAG.cpp

[LLVM][ConstantFP] Replace uses of isExactlyValue(+/-1.0) with isOne/isMinusOne. (#204333)
DeltaFile
+14-14llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+26-0llvm/unittests/ADT/APFloatTest.cpp
+8-9llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+16-0llvm/include/llvm/ADT/APFloat.h
+4-4llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+4-4llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+72-3120 files not shown
+116-6526 files

LLVM/project ebd969fllvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/Target/AMDGPU AMDGPUHSAMetadataStreamer.h

AMDGPU: Rename AMDGPUTargetID to TargetID (#205269)

The AMDGPU prefix is redundant with the namespace.

Co-Authored-By: Claude <noreply at anthropic.com>
DeltaFile
+8-16llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+9-10llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+9-9llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+8-8llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
+4-4llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+4-4llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h
+42-514 files not shown
+50-5910 files

LLVM/project e9d162fclang/include/clang/Basic BuiltinsX86.td, clang/lib/AST ExprConstant.cpp

[clang][X86] Add constexpr support for mpsadbw128/256 intrinsics (#202257)

Enable constexpr evaluation for `_mm_mpsadbw_epu8` and
`_mm256_mpsadbw_epu8` (`__builtin_ia32_mpsadbw128`/`mpsadbw256`).

Fixes #157522.
DeltaFile
+54-0clang/lib/AST/ByteCode/InterpBuiltin.cpp
+43-0clang/lib/AST/ExprConstant.cpp
+19-0clang/test/CodeGen/X86/avx2-builtins.c
+11-0clang/test/CodeGen/X86/sse41-builtins.c
+4-3clang/include/clang/Basic/BuiltinsX86.td
+131-35 files

LLVM/project 516ab1allvm/test/CodeGen/SystemZ misched-prera-loads.mir vec-cmp-cmp-logic-select.ll

[SystemZ] Enable liveness reduction in pre-RA sched strategy. (#188823)

Add some handling of register pressure by scheduling an SU "low" if it closes a
live range (under certain conditions).

As this is checked before latency reduction, the "data-sequnces" check that was
used to selectively enable latency reduction can now be removed.

This gives good improvements on several benchmarks and is also a simplification
of the SystemZPreRASchedStrategy.
DeltaFile
+627-0llvm/test/CodeGen/SystemZ/misched-prera-loads.mir
+170-170llvm/test/CodeGen/SystemZ/vec-cmp-cmp-logic-select.ll
+132-119llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll
+96-96llvm/test/CodeGen/SystemZ/machine-combiner-reassoc-fp.ll
+151-0llvm/test/CodeGen/SystemZ/misched-prera-pdiffs.mir
+64-64llvm/test/CodeGen/SystemZ/shift-17.ll
+1,240-44943 files not shown
+1,951-1,16549 files