LLVM/project 0d387de — llvm/lib/Transforms/Utils LoopUtils.cpp, llvm/lib/Transforms/Vectorize VPlanConstruction.cpp

[LV] Model memory runtime checks for inner loops of loop nests in VPlan. (#232794)

Remove the restriction that kept the IR-generated memcheck block for
loops with a parent loop. When hoisting runtime checks, they are
rewritten so they hold across the outer loop and are expanded before the
entry block to the VPlan, using the regular IR expander.

This patch exposes getRuntimeCheckBounds, which does the rewrite, and
marks such rewritten bounds as requiring expansion in IR. VPSCEVExpander
takes a loop as optional argument and uses VPExpandSCEVRecipes for
expressions that are invariant in the loop.

PR: https://github.com/llvm/llvm-project/pull/232794
DeltaFile
+309-59llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
+31-31llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+28-28llvm/test/Transforms/PhaseOrdering/AArch64/matrix-extract-insert.ll
+33-17llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+15-17llvm/test/Transforms/LoopVectorize/multiple-strides-vectorization.ll
+19-11llvm/lib/Transforms/Utils/LoopUtils.cpp
+435-16315 files not shown
+531-21221 files

LLVM/project 6b6b83c — llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll amdgcn.bitcast.832bit.ll

Merge branch 'main' into users/void/pbqp-inline-asm-error

bd51cc5c5556 (#226523) made RegAllocBase::RegClassInfo a pointer to the
shared RegisterClassInfo, so the call to assignFailedVirtReg() dereferences it.

Assisted-by: Claude Opus 5.5
DeltaFile
+88,705-91,244llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,383-26,405llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+9,311-9,381llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+8,998-9,209llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+8,016-8,194llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+7,335-7,432llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+147,748-151,8654,025 files not shown
+387,898-336,0934,031 files

LLVM/project f0330f8 — llvm/lib/Transforms/Scalar GVN.cpp, llvm/test/Transforms/GVN metadata.ll rle-coerced-noalias.ll

[GVN] Forward a load through a byte load to keep `poison` and provenance
DeltaFile
+59-52llvm/test/Transforms/GVN/load-poison.ll
+109-1llvm/lib/Transforms/Scalar/GVN.cpp
+26-27llvm/test/Transforms/GVN/PRE/rle.ll
+7-7llvm/test/Transforms/GVN/rle-coerced-noalias.ll
+6-4llvm/test/Transforms/GVN/metadata.ll
+3-2llvm/test/Transforms/GVN/PRE/atomic.ll
+210-931 files not shown
+213-957 files

LLVM/project 011983d — mlir/test/python multithreaded_tests.py, mlir/test/python/dialects python_test.py

[MLIR][Python] Fix stale multithreaded_tests.py (#237018)

`multithreaded_tests.py` only runs on free-threaded CPython, so it
rotted unnoticed. On 3.14t it failed every test and then aborted. This
PR:

- Drops calls to live-operation APIs removed in #155114.
- Compares live contexts against a pre-test baseline instead of 0,
because `ir/array_attributes.py` keeps a Context alive.
- Restores the builtin `RankedTensorType` caster after binding
`TestIntegerRankedTensorType`, which hijacked it and caused the abort.
The abort itself is fixed in #237010.
- Only collects test functions defined in each module, so imported
helpers aren't run as tests.
- Skips `testMatchInterfaceEnumReplaceAttributeBuilder`, which replaces
a global attribute builder used by `testMatchInterfaceEnum`.
- Without TSAN, skips the xfail list and tests using the `np_to_memref`
helpers. They hit a ctypes race (python/cpython#127945)
nondeterministically. Under TSAN they still xfail as before.

Assisted by: Claude
DeltaFile
+61-6mlir/test/python/multithreaded_tests.py
+10-0mlir/test/python/lib/PythonTestModuleNanobind.cpp
+2-2mlir/test/python/dialects/python_test.py
+73-83 files

LLVM/project ef9a61c — llvm/test/Transforms/GVN load-poison.ll

[GVN] Pre-commit tests for `poison` and provenance when forwarding a load
DeltaFile
+431-0llvm/test/Transforms/GVN/load-poison.ll
+431-01 files

LLVM/project 59054bd — llvm/lib/Transforms/Scalar GVN.cpp, llvm/test/Transforms/GVN bitextract-bitinsert.ll

[GVN] Fold equivalent `bitextract` and `bitinsert`
DeltaFile
+2-4llvm/test/Transforms/GVN/bitextract-bitinsert.ll
+2-0llvm/lib/Transforms/Scalar/GVN.cpp
+4-42 files

LLVM/project 5b79b44 — utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel

[Bazel] Fixes 4f7ca43 (#237393)

This fixes 4f7ca43759f63102f3f73677a5008d0a5576ed12 (#233620).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=4f7ca43759f63102f3f73677a5008d0a5576ed12

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+18-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+18-01 files

LLVM/project 7dba3e5 — llvm/test/Transforms/GVN bitextract-bitinsert.ll

[GVN] Pre-commit tests for equivalent `bitextract` and `bitinsert`
DeltaFile
+104-0llvm/test/Transforms/GVN/bitextract-bitinsert.ll
+104-01 files

LLVM/project ae20ee9 — llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll amdgcn.bitcast.832bit.ll

Merge remote-tracking branch 'llvm/llvm-project/main' into users/void/mir-inline-asm-operand-count

# Conflicts:
#       llvm/test/CodeGen/X86/callbr-asm-kill.mir
DeltaFile
+88,705-91,244llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,383-26,405llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+9,311-9,381llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+8,998-9,209llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+8,016-8,194llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+7,335-7,432llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+147,748-151,8655,030 files not shown
+458,946-359,0335,036 files

LLVM/project 32e470f — clang/lib/Sema SemaTemplateInstantiate.cpp, clang/test/SemaTemplate concepts-lambda.cpp

[Clang] Don't skip lambda constraints when substituting type constraints (#236425)

This follows up to https://github.com/llvm/llvm-project/pull/207966 in order to transforms type
constraints with a ForConstraintSubstitution flag.

Assisted-by: Codex

(cherry-picked from 93c463319ebcb57e82f0c87c813a9ead536fb952)
DeltaFile
+16-0clang/test/SemaTemplate/concepts-lambda.cpp
+7-2clang/lib/Sema/SemaTemplateInstantiate.cpp
+23-22 files

LLVM/project 20eceee — llvm/test/Transforms/LoopVectorize alloca-in-loop.ll, llvm/test/Transforms/LoopVectorize/AArch64 force-target-instruction-cost.ll

Test-behaviour-changes from the cherry-pick of 46965cf.

(Not asserting that this are correct; just that they're what's changed)
DeltaFile
+283-283llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+36-36llvm/test/Transforms/LoopVectorize/alloca-in-loop.ll
+319-3192 files

LLVM/project b10c62b — llvm/lib/Transforms/Vectorize VPlanUtils.cpp VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize tail-folding-alloca-in-loop.ll alloca-in-loop.ll

[VPlan] Don't merge allocas across lanes, parts or recipes. (#229929)

Each execution of an alloca creates a new allocation, distinct from the
allocations of all other executions. They must not be merged, either by
CSE or via isUniformAcrossVFsAndUFs.

Update those to explicitly handle Alloca recipes.

Fixes https://github.com/llvm/llvm-project/issues/229389.

PR: https://github.com/llvm/llvm-project/pull/229929
(cherry picked from commit 95ea23b7d5b06c60c513c575577d5b7d0ed15721)
DeltaFile
+64-18llvm/test/Transforms/LoopVectorize/alloca-in-loop.ll
+13-7llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+6-3llvm/test/Transforms/LoopVectorize/tail-folding-alloca-in-loop.ll
+3-2llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+3-2llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+89-325 files

LLVM/project 86fe084 — llvm/test/Transforms/LoopVectorize alloca-in-loop.ll

[LV] Add tests showing alloca miscompiles. (#229911)

Tests for https://github.com/llvm/llvm-project/issues/229389.

(cherry picked from commit 81f7e6799becc3cb4b945ee4dc231147f9d36c1b)
DeltaFile
+178-0llvm/test/Transforms/LoopVectorize/alloca-in-loop.ll
+178-01 files

LLVM/project c5fb5fb — clang/include/clang/CIR/Dialect/IR CIRAttrs.td

[CIR] Move the identity constBuilderCall onto CIR_FenvAttr

Assisted-by: Claude Code (Opus 5.5).
DeltaFile
+2-3clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+2-31 files

LLVM/project 97d25ba — llvm/test/tools/llubi intr_masked_scatter.ll intr_masked_scatter_ub.ll, llvm/tools/llubi/lib Interpreter.cpp

[llubi] Add support for llvm.masked.scatter (#235990)

Re-use the logic for llvm.masked.gather to also support
llvm.masked.scatter. Lanes are stored in order, so later lanes win for
overlapping addresses.

Depends on https://github.com/llvm/llvm-project/pull/235986

PR: https://github.com/llvm/llvm-project/pull/235990
DeltaFile
+74-0llvm/test/tools/llubi/intr_masked_scatter_ub.ll
+64-0llvm/test/tools/llubi/intr_masked_scatter.ll
+9-5llvm/tools/llubi/lib/Interpreter.cpp
+147-53 files

LLVM/project 643e7c6 — flang/test/Semantics kinds04_q16.f90

[flang] Enable test for all other targets (NFC) (#237224)

x86-registered-target disables the test if the compiler built with
LLVM_TARGETS_TO_BUILD=all or
LLVM_TARGETS_TO_BUILD=...X86..... This patch is to only disable for x86
related targets and enable for all other targets.
DeltaFile
+1-3flang/test/Semantics/kinds04_q16.f90
+1-31 files

LLVM/project c93e82b — clang/include/clang/CIR/Dialect/IR CIRAttrs.td, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

[CIR] Make fenv lowering follow the attribute's defaults

An absent fenv parameter now takes its value in the default FP
environment (tonearest, masked, non-strict), so the empty attribute is the
unconstrained default. The lowering reads the parameters through the
OrDefault helpers, as speculation does, and checks strict_except before the
exception mode: strict exceptions keep the FP status exact even when masked.
Clang codegen output and its lowering are unchanged.

Assisted-by: Claude Code (Opus 5.5).
DeltaFile
+7-11clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+9-1clang/test/CIR/Lowering/fenv.cir
+4-4clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+1-1clang/unittests/CIR/FenvOpTest.cpp
+21-174 files

LLVM/project 4cb5705 — mlir/docs/DefiningDialects Operations.md, mlir/include/mlir/IR AttrTypeBase.td

[mlir][ODS] Give AttrDefs an identity constBuilderCall

An attribute defined with AttrDef is its own constant value, so set its
constBuilderCall to "$0" when its returnType is the attribute class. This
lets an AttrDef be used directly in DefaultValuedAttr without a per-def
override, and drops the one LLVM_DIGlobalVariableExpressionAttr had. Defs
with a different returnType keep it unset.

Assisted-by: Claude Code (Opus 5.5).
DeltaFile
+40-0mlir/test/mlir-tblgen/attrdef-const-builder.td
+17-0mlir/test/IR/default-valued-attr-def.mlir
+9-0mlir/test/lib/Dialect/Test/TestOps.td
+7-0mlir/test/lib/Dialect/Test/TestAttrDefs.td
+5-0mlir/include/mlir/IR/AttrTypeBase.td
+4-0mlir/docs/DefiningDialects/Operations.md
+82-01 files not shown
+82-17 files

LLVM/project 6bc9c37 — llvm/lib/Target/PowerPC PPCTLSDynamicCall.cpp, llvm/test/CodeGen/PowerPC O3-pipeline.ll O0-pipeline.ll

PowerPC: Remove LiveVariables run and unused LiveIntervals requirement

PPCTLSDynamicCall has not used LiveIntervals since 3ff319c69047, but
still required the analysis. LiveIntervals requires there to be no
unreachable blocks or otherwise it asserts. These blocks were
indirectly removed by adding the extra LiveVariables run, because
LiveVariables has a declared requirement on
UnreachableMachineBasicBlockElim.

Drop the dead analysis requirements along with the LiveVariables run.
This also avoids computing LiveIntervals at -O0 for PIC. This is
still broken if the pipeliner is explicitly enabled on optnone
functions which requires a separate fix.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+54-0llvm/test/CodeGen/PowerPC/tls-dynamic-call-unreachable-block.ll
+24-0llvm/test/CodeGen/PowerPC/tls-dynamic-call-unreachable-block-optnone.ll
+2-9llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
+0-3llvm/test/CodeGen/PowerPC/O0-pipeline.ll
+0-2llvm/test/CodeGen/PowerPC/O3-pipeline.ll
+80-145 files

LLVM/project c67e705 — llvm/test/Transforms/Util/DeclareRuntimeLibcalls sparc.ll systemz.ll

RuntimeLibcalls: Fix signatures of fmin/fmax libcalls (#235147)

These used Floating, which always lowered to float regardless of the
libcall type.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+36-36llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+28-28llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+28-28llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+24-24llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+20-20llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+16-16llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sparc.ll
+152-1529 files not shown
+218-21615 files

LLVM/project e2089b0 — llvm/lib/Transforms/IPO GlobalOpt.cpp, llvm/test/Transforms/GlobalOpt malloc-promote-4.ll null-check-is-use-pr35760.ll

[GlobalOpt] Remove malloc promotion (#233797)

This optimization is quite buggy, and it doesn't matter in practice. The code
is already quite complicated and implementing it properly would make the code
even more complicated and make it less applicable and relevant.

Known bugs:

- #233447: the global we optimize needs to be written to once. We assume this
  is the case based on static use site count, which is the bug. We'd need to
  analyze the use site of the store (e.g. is it in a loop?), the parent
  function's callers (transitively) and make sure it'll be called at most once.
  This will rule out any uses in loops, recursive functions, and calls from
  external functions, ... and make this applicable to even more rarely.

- #215533: the new global gets incorrect alignment. The fix requires analysing
  uses of the `malloc` call and the uses of loads from the global. The value of
  `malloc` is allowed to be used in GEPs, and the global value is allowed to be
  used in PHIs. So we'd need to consider alignments of users of those GEPs and

    [31 lines not shown]
DeltaFile
+0-347llvm/lib/Transforms/IPO/GlobalOpt.cpp
+0-77llvm/test/Transforms/GlobalOpt/malloc-promote-opaque-ptr.ll
+0-69llvm/test/Transforms/GlobalOpt/malloc-promote-addrspace.ll
+0-67llvm/test/Transforms/GlobalOpt/null-check-not-use-pr35760.ll
+0-63llvm/test/Transforms/GlobalOpt/null-check-is-use-pr35760.ll
+0-60llvm/test/Transforms/GlobalOpt/malloc-promote-4.ll
+0-68317 files not shown
+5-1,23923 files

LLVM/project 28cf16d — llvm/test/Transforms/GVN load-poison.ll

[GVN] Pre-commit tests for `poison` and provenance when forwarding a load
DeltaFile
+688-0llvm/test/Transforms/GVN/load-poison.ll
+688-01 files

LLVM/project e5671bd — llvm/lib/Transforms/Scalar GVN.cpp, llvm/test/Transforms/GVN invariant.group.ll metadata.ll

[GVN] Forward a load through a byte load to keep `poison` and provenance
DeltaFile
+144-169llvm/test/Transforms/GVN/load-poison.ll
+125-1llvm/lib/Transforms/Scalar/GVN.cpp
+26-27llvm/test/Transforms/GVN/PRE/rle.ll
+7-7llvm/test/Transforms/GVN/rle-coerced-noalias.ll
+6-4llvm/test/Transforms/GVN/metadata.ll
+5-3llvm/test/Transforms/GVN/invariant.group.ll
+313-2111 files not shown
+316-2137 files

LLVM/project 88790a7 — llvm/lib/Transforms/Utils VNCoercion.cpp, llvm/test/Transforms/GVN pr14166.ll ptr-vector-coercion.ll

[GVN] Keep `poison` per lane when forwarding vectors
DeltaFile
+48-63llvm/test/Transforms/GVN/pr63059.ll
+31-50llvm/test/Transforms/GVN/vector-poison.ll
+16-11llvm/lib/Transforms/Utils/VNCoercion.cpp
+4-9llvm/test/Transforms/GVN/ptr-vector-coercion.ll
+0-1llvm/test/Transforms/GVN/pr14166.ll
+99-1345 files

LLVM/project 68f6b55 — llvm/test/Transforms/GVN vector-poison.ll

[GVN] Pre-commit tests for per-lane `poison` in forwarded vectors
DeltaFile
+244-0llvm/test/Transforms/GVN/vector-poison.ll
+244-01 files

LLVM/project cf2df1f — llvm/lib/Target/BPF BPFAbstractMemberAccess.cpp, llvm/test/CodeGen/BPF/CORE offset-reloc-subarray-typedef-anon.ll intrinsic-fieldinfo-subarray.ll

[BPF] Fix CO-RE roots for subarray field info and anonymous elements (#235601)

consumeAccessRoot handles an access chain that starts with array
subscripts, such as (*p)[1][2].y. It folds the leading subscripts into
one index, counted in units of the innermost element, and uses that
element type as the relocation root. Four cases went wrong:

- A subarray passed to __builtin_preserve_field_info crashed, e.g.
  __builtin_preserve_field_info((*p)[1], 0) with struct S (*p)[2][3],
  or __builtin_preserve_field_info(p[1], 0) with struct S (*p)[3].
  The terminal field-info call was pushed onto the access stack, so
  the walk treated it as another array access.

  Fix: keep the field-info call off the access stack. Record elements
  now get a relocation such as struct S::[3], and scalar elements reach
  the existing "Invalid field access" error.

- An anonymous record behind a typedef became a root with no name, e.g.
  &(*p)[1], (*p)[1].x or &p[1] with typedef struct { long x; } Anon.

    [39 lines not shown]
DeltaFile
+219-0llvm/test/CodeGen/BPF/CORE/offset-reloc-typedef-subarray.ll
+114-0llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-subarray.ll
+62-51llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
+78-0llvm/test/CodeGen/BPF/CORE/offset-reloc-subarray-typedef-anon.ll
+473-514 files

LLVM/project 32492f9 — llvm/test/CodeGen/AMDGPU fptosi-sat-vector.ll amdgcn.bitcast.320bit.ll

[AMDGPU] Materialize WMMA SGPR scales to VGPRs before scheduling

v_wmma_scale scale operands accept an SGPR or a VGPR. On GFX12,
depctr_va_ssrc is a 1-deep counter, so each VALU instruction that reads
an SGPR scale takes the only scalar-source slot. A run of WMMA ops that
all read SGPR scales therefore serializes. One cross-bank copy pays for
that slot once; later WMMA ops then read a VGPR and no longer contend
for va_ssrc.

SIMaterializeWMMAScale runs at the end of the machine SSA optimizations,
after SIShrinkInstructions and before scheduling. It is skipped at -O0
and on targets older than GFX12. GFX1250 is included: the separate VALU
read-after-write hazard no longer applies there, but the dependency
counter still does.

The pass walks every WMMA that has scale_src0 and records virtual SGPR
uses of scale_src0 and scale_src1, grouped by register. Physical
registers and subregister uses are left alone. For each SGPR it inserts
a COPY into a low aligned VGPR (the lo256 class matching the scale's

    [21 lines not shown]
DeltaFile
+4,080-3,822llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,108-948llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+847-631llvm/test/CodeGen/AMDGPU/calling-conventions.ll
+567-468llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+404-376llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+231-187llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+7,237-6,43232 files not shown
+9,028-7,15938 files

LLVM/project 2adc69d — clang/include/clang/CIR/Dialect/Builder CIRBaseBuilder.h, clang/include/clang/CIR/Dialect/IR CIRAttrs.td CIROps.td

[CIR] Update fenv docs for the default-valued attribute

Assisted-by: Claude Code (Opus 5.5).
DeltaFile
+12-11clang/include/clang/CIR/Dialect/IR/CIROps.td
+3-2clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+2-1clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+1-1clang/test/CIR/Lowering/fenv.cir
+18-154 files

LLVM/project 1d9ec2a — llvm/test/CodeGen/AArch64 sve-fixed-vector-lrint.ll sve-fixed-vector-llrint.ll, llvm/test/CodeGen/RISCV/rvv fpclamptosat_vec.ll

[SelectionDAG] Fold scalar_to_vector concatenations

DAGCombiner folds `CONCAT_VECTORS` of `BUILD_VECTOR`/`UNDEF` operands into one
`BUILD_VECTOR`, but skips `SCALAR_TO_VECTOR` operands, so each fragment is
lowered separately.

Fold `SCALAR_TO_VECTOR` operands as `[x, poison, ..., poison]`. Integer scalars
are truncated to the common minimum scalar type, as in the existing
`BUILD_VECTOR` fold; FP scalars are used directly. The fold is limited to
fixed-length vectors and runs only before operation legalization.
DeltaFile
+796-1,113llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
+106-213llvm/test/CodeGen/X86/vec_smulo.ll
+125-142llvm/test/CodeGen/AArch64/vector-lrint.ll
+125-142llvm/test/CodeGen/AArch64/vector-llrint.ll
+94-129llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+94-129llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+1,340-1,86821 files not shown
+1,861-2,58127 files

LLVM/project fd13222 — mlir/lib/TableGen EnumInfo.cpp, mlir/test/IR attribute.mlir enum-attr-roundtrip.mlir

[mlir][ODS] Allow a space-only separator for bit enums

Bit enums required a separator containing '|' or ',', so a flag set
could not use the bare keyword syntax of LLVM IR, e.g. `nuw nsw`.
Dialects that want it, such as ClangIR's overflow flags, had to hand-write
a parser and printer for an EnumProp.

Allow `separator = " "` on new-style BitEnums. The generated
FieldParser then reads case keywords until the next token is not one,
symbolize splits on spaces, and the op-format `enum` directive parses
the same way. A literal right after such an enum that is one of its
cases is now rejected as ambiguous. Legacy BitEnumAttr keeps requiring
'|' or ','.

Assisted-by: Claude Code (Claude Opus 5.5).
DeltaFile
+55-40mlir/tools/mlir-tblgen/OpFormatGen.cpp
+47-14mlir/tools/mlir-tblgen/EnumsGen.cpp
+27-0mlir/lib/TableGen/EnumInfo.cpp
+24-0mlir/test/mlir-tblgen/op-format-invalid.td
+24-0mlir/test/IR/enum-attr-roundtrip.mlir
+23-0mlir/test/IR/attribute.mlir
+200-548 files not shown
+285-6314 files