[APFloat][SelectionDAG] Support Float8E5M3FNU in `convert.{to,from}.arbitrary.fp` (#216387)
Float8E5M3FNU was already accepted by the IR verifier, because
`isValidArbitraryFPFormat` is defined in terms of
`getArbitraryFPFormatSizeInBits` and that table covers it. It was
missing from `getArbitraryFPSemantics`, so `SelectionDAGBuilder`
rejected it with "not implemented format" and the verifier-clean IR
failed to compile. Add the mapping and the corresponding entries in the
`expandCONVERT_{TO,FROM}_ARBITRARY_FP` format allowlists.
Unlike every other format the expansions handle so far, Float8E5M3FNU is
unsigned: it has no sign bit, so all 8 bits go to a 5-bit exponent and a
3-bit significand.
Since an unsigned format cannot represent a negative value, a negative
input now saturates to zero when the saturate flag is set, and is poison
otherwise. -0.0 is excluded from that and still converts to +0, and the
check is ordered before the NaN case so a negative NaN still produces
the NaN encoding. APFloat treats constructing a negative value in an
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[AArch64] Restrict FP imm ISel by accurate subtarget macro-fusion (#214849)
This patch improves the accuracy of FP immediate lowering for runtime
performance builds. Until now we relaxed the instruction count limit
from 2 to 4 merely based on the satisfaction of `ST.hasFuseLiterals`,
but this could be wrong for example false-positive for `MOVN`
instructions which would relax the limit but are not macro fused. Here
we check exactly if immediate materialization parts can be macro fused
using a new subtarget helper which is shared with macro-fusion.
It adds exhaustive test cases for all code sequences that
`isFPImmLegal()` can enable using `expandMOVImm()`. Including f32 as
regression tests - those cannot trigger a subtarget feature check,
because a f32 immed can always be materialized by up to 2 instructions
which is the default limit. As well as an optsize test with
representative test cases.
---------
Co-authored-by: Jon Roelofs <jroelofs at gmail.com>
[CIR] Fix array consts who change during layout (#216732)
The element types of an array can change for the purposes of lowering
depending on the contents of the initializer, particularly with unions.
This patch correctly mutates the array type such that it is either a
contiguous array (the correct way), or a struct that has the same
layout.
[VPlan][UTC] Number VPlan passes' instances in printing/filtering (#211424)
Allows to use UTC-generated CHECKs in more tests. First instance of a
given VPlan pass on a function doesn't have a number (would need
`-vplan-print-after=passName$`). Subsequent instances are numbered and
can be filtered as `-vplan-print-after=passName at 2`.
AMDGPU: Use mi_match in isFPExtFromF16OrConst (#216807)
Replace the getVRegDef + G_FPEXT/G_FCONSTANT opcode checks with m_GFPExt
and m_GFCst matchers. NFC.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[mlir][scf] Fully unroll SCF/Affine loops (#215220)
Adds a new transform op that fully unrolls given loops. Also, updates
'loop.unroll' documentation to better reflect its functionality.
A new op is added to avoid overloading and changing the default behavior
of the other existing unroll ops.
On its own, the new op complements the existing two transform ops and
mirrors available SCF/Affine utils.
Assisted-by: Copilot
[SystemZ][z/OS] Refactor switching section for HLASM
Emitting the HLASM instructions for switching section is distributed
between MCAsmInfoGOFF and SystemZHLASMAsmStreamer, with some code
duplication. This change consolidates the implementation in
SystemZHLASMAsmStreamer.
[1/2][AMDGPU] Fixed crash due to virtual register defs not dominating uses (#198472)
Fixes https://github.com/llvm/llvm-project/issues/196671.
Fixes duplicate ROCM-24494, LCOMPILER-2224.
In Rewrite AGPR-Copy-MFMA pass, a spill reload may not have a dominating
spill store. If such a slot is unspilled into a vreg, the elimination
phase crashes because virtual register defs do not dominate all uses.
This patch checks for that dominance property for all reloads and skips
unspilling if such a condition is found.
This patch is adapted from
https://github.com/llvm/llvm-project/pull/167347
Cherry-picked https://github.com/ROCm/llvm-project/commit/e5d02ddb
Authored by: Austin Kerbow <Austin.Kerbow at amd.com>
Instead of scanning through instructions within the reload basic block,
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[Clang] Prevent an assertion failure when instantiating an invalid friend function template (#216727)к
Fixes #216694
---
This patch addresses an assertion failure that occurs when instantiating
an invalid friend function template by marking its `FriendDecl` wrapper
as invalid.
[CIR] Mark bit-field access units as their own member kinds
A bit-field access unit is as wide as the compiler decides, which can be
narrower than the declared type of the bit-fields in it, and the member marks
say nothing about that: a unit with a named occupant is `data` and one with only
unnamed occupants is `empty`, the same marks a declared field gets. So a member
holding a 32-bit bit-field of `long long` looks exactly like an `unsigned`
field, and the two are not the same to the ABI. `BitsContainNoUserData`
recurses on the declared type, finds user data past bit 32 in the first and none
in the second, and classic CodeGen coerces the enclosing records to `i64` and
`i32`.
Split the unit cases out as `bitfield` and `empty_bitfield`. A unit holds data
exactly when a named bit-field lands in it, so `isEmptyForABI` answers the same
for every record once it asks `holdsDataForABI` instead of testing for `data`
alone, and padding is untouched. Nothing classifies on the new marks yet, so no
ABI treatment changes. What needs them is pad-aware eightbyte classification,
which cannot tell a record's declared extents from its access units without
them.
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[CIR] Classify around a record's padding on x86_64
The x86_64 bridge refused any struct whose CIR type carries a pad member, which
is every over-aligned record and every record with a gap between two members.
The ABI library already reads each field's explicit offset, sizes the record
from its own size, and treats a gap no field overlaps as holding no user data.
However, the bridge was handing it every member as a field, padding included, so
a record's padding bytes read as data. Now we build the field list from the
members that hold data.
Assisted-by: Cursor / claude-opus-5
Address review comments
Only clamp negative inputs to zero when saturating. Without saturation
the result is poison, so nothing needs to be emitted and no select gets
a poison operand.
Trim the comments added by the previous commit.
Change-Id: I7b86ebd6d0b7853f4dea7312bec21aea2bb91def
[flang] Improve error for misplaced statement after CONTAINS in derived type (#215886)
A statement after `CONTAINS` in a derived type that is not a type-bound
procedure binding (e.g. a second `CONTAINS`, an `IMPORT`, or a misplaced
subprogram) leaked the intrinsic type-spec parse failures (`expected
'COMPLEX'`, `expected 'INTEGER'`, ...) instead of reporting that a
type-bound procedure binding was expected. In the misplaced-subprogram
case flang emitted an avalanche of unrelated `expected '<type-keyword>'`
errors.
This is a diagnostic regression from #203379, which added
`DataComponentDefStmt` as a trailing alternative in the
type-bound-proc-binding parser. Its intended `fail<>()` message only
fires when `DataComponentDefStmt` fully matches; for other invalid
statement the partial parse into `declarationTypeSpec` displaced the
recovery message in `CombineFailedParses`.
This patch wraps the binding alternatives in `withMessage()` so that
when none of them match a token a single clear message is emitted:
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RISCV: Fix VL optimizer crash on an undef VL operand (#216803)
Found by AI while working on something else.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[CIR] Implement aligned-array-delete. (#216789)
This ends up being a pretty trivial implementation, since we just have
to add the additional i64 argument to the call. This patch adds that,
after threading the alignment through CIR.
Also, the type-aware and destroying deletes aren't valid on a array
delete, so replace those checks with 'assert' instead.
[Clang][CodeGen] Use ptrtoaddr for pointer diff (#210729)
We don't have to expose the provenance of pointers for pointer
subtraction, so use ptrtoaddr instead of ptrtoint if -fwrapv-pointer is
not set.
[CodeGen] Fix stale LiveIntervals regmask tables after MachineBasicBl… (#209610)
MachineBasicBlock::splitAt() moves the tail of a block -- including any
call instructions carrying register-mask operands -- into a newly
created block. When LiveIntervals is attached it calls
LIS->insertMBBInMaps() for the new block, which records the block with
zero regmask slots. That is only correct for a fresh, empty block:
because the tail (and its regmasks) was *moved* out of the original
block, the per-block RegMaskBlocks index for both blocks is left stale,
so checkRegMaskInterference() can miss a call clobber and the register
allocator can assign a live value to a clobbered physical register.
Add a LiveIntervals::splitAt(Orig, SplitBB) entry point that inserts
SplitBB into the SlotIndexes/regmask maps and then re-slices the moved
regmask slots out of Orig's RegMaskBlocks entry into SplitBB's
(RegMaskSlots is sorted, so the slots that moved are those at/after
SplitBB's start index). MachineBasicBlock::splitAt() now calls it in
place of insertMBBInMaps().
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