LLVM/project 1537c32mlir/tools/mlir-src-sharder CMakeLists.txt

[mlir] Use add_tablegen() for mlir-src-sharder to fix aarch64 cross-compile (#196202)

`add_tablegen()` already sets `MLIR_SRC_SHARDER_TABLEGEN_EXE` to the
native host-tool path during cross-compilation (via
`build_native_tool`). The leftover manual
`set(MLIR_SRC_SHARDER_TABLEGEN_EXE mlir-src-sharder PARENT_SCOPE)`
clobbered that path with the bare binary name, causing aarch64
cross-builds to fail with:

```
/bin/sh: 1: mlir-src-sharder: not found
```

when sharding `TestOps`. Switching `mlir-src-sharder` from
`add_llvm_executable` to `add_tablegen` (and dropping the redundant
`set(... PARENT_SCOPE)`) lets the existing cross-compile machinery point
consumers at the host build of the tool.
DeltaFile
+2-3mlir/tools/mlir-src-sharder/CMakeLists.txt
+2-31 files

LLVM/project 033c9e6llvm/test/Transforms/SLPVectorizer/AArch64 spillcost-noreturn-block.ll

[SLP][NFC]Add a test with the overestimation for block with noreturn function call



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/197264
DeltaFile
+81-0llvm/test/Transforms/SLPVectorizer/AArch64/spillcost-noreturn-block.ll
+81-01 files

LLVM/project b601203llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine/AArch64 fold-reduce-add-cmp-zero.ll icmp-vector-reduce.ll

[VectorCombine] Fold reduce.add == 0 into reduce.[or,umax] == 0

If every lane of a fixed-length vector is non-negative or every lane is
non-positive, and the lane count is small enough that summation cannot
wrap, then reduce.add(V) == 0 exactly when every lane is zero. In that
case the add reduction can be replaced by reduce.or or reduce.umax,
whichever is cheaper on the target.
DeltaFile
+361-0llvm/test/Transforms/VectorCombine/AArch64/fold-reduce-add-cmp-zero.ll
+121-0llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+112-0llvm/test/Transforms/VectorCombine/RISCV/fold-reduce-add-cmp-zero.ll
+14-19llvm/test/Transforms/VectorCombine/RISCV/icmp-vector-reduce.ll
+14-19llvm/test/Transforms/VectorCombine/AArch64/icmp-vector-reduce.ll
+4-4llvm/test/Transforms/VectorCombine/AArch64/fold-signbit-reduction-cmp.ll
+626-421 files not shown
+630-467 files

LLVM/project 857dad2clang/lib/CIR/CodeGen CIRGenCall.cpp CIRGenModule.cpp, clang/test/CIR/CodeGen asm-label-redirect-inline.c asm-label-redirect.c

[CIR] Fix function signature mismatch on redirected calls (#196665)

We were running into CIR verification errors ("error: 'cir.call' op
operand type mismatch") when compiling with some older versions of the
GLIBC headers that used a macro to redirect system library calls to a
function that used different, but compatible, arguments.

This change fixes the problem by detecting the mismatch at the callsite
and bitcasting the arguments.

Assisted-by: Cursor / claude-opus-4.7-thinking-xhigh
DeltaFile
+67-0clang/test/CIR/CodeGen/asm-label-redirect-inline.c
+59-0clang/test/CIR/CodeGen/asm-label-redirect.c
+34-10clang/lib/CIR/CodeGen/CIRGenCall.cpp
+39-2clang/lib/CIR/CodeGen/CIRGenModule.cpp
+199-124 files

LLVM/project db436f8compiler-rt/lib/sanitizer_common sanitizer_platform_limits_posix.cpp sanitizer_platform_limits_posix.h

[sanitizer_common] Implement address sanitizer on AIX: platform specific support (#131866)

Add recognition of AIX and some platform specific changes. This lays the
groundwork to implement AIX in sanitizer_common/asan.

Issue: https://github.com/llvm/llvm-project/issues/138916
DeltaFile
+49-21compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
+50-11compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
+8-2compiler-rt/lib/sanitizer_common/sanitizer_platform.h
+5-4compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
+2-0compiler-rt/lib/sanitizer_common/sanitizer_errno.h
+114-385 files

LLVM/project fb5ea45clang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeSafety.h LifetimeAnnotations.h, clang/lib/Analysis/LifetimeSafety LifetimeAnnotations.cpp Checker.cpp

[LifetimeSafety] Warn on implicit this lifetimebound violations (#196926)

With this change we report `[[clang::lifetimebound]]` violations on the
implicit `this` parameter.

It also adds a helper to retrieve the `[[clang::lifetimebound]]`
attribute on method declarations, so diagnostics can point directly at
the attribute location.
DeltaFile
+45-0clang/test/Sema/warn-lifetime-safety-lifetimebound.cpp
+17-10clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
+13-2clang/lib/Sema/SemaLifetimeSafety.h
+9-4clang/lib/Analysis/LifetimeSafety/Checker.cpp
+5-0clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
+5-0clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
+94-161 files not shown
+96-187 files

LLVM/project fe5a48cclang/docs LifetimeSafety.rst

[LifetimeSafety] Update user documentation (#196790)

Updates LifetimeSafety user documentation for

* `new`/`delete` lifetime checks (#193776)
* `std::unique_ptr::reset` invalidation (#194907)
* Explicit destructor calls and `std::destroy_at` (#195010)
DeltaFile
+66-12clang/docs/LifetimeSafety.rst
+66-121 files

LLVM/project 31d25c7clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/CodeGen global-tls-simple-init.cpp global-tls-dyn-init.cpp

[CIR] Global-TLS variable 'call' rewriting- (#197026)

This is a followup to my previous patch to handle global/namespace
thread local variables. This patch handles the
re-writing/lowering-prepare of the `get-global` for these variables.
Each call to one of these is required to go to a 'wrapper' function,
which optionally calls the initializer. This patch does not handle the
initializer call (so each wrapper call is a very simple 'return the
variable'), as that will be handled in a followup.

Also, variables without initialization don't use a wrapper in Classic
Codegen, however this patch does. The followup patch that will call the
initializer will skip the call to the initializer, but leave the wrapper
in place. This is a necessity due to how we handle global ops/get-global
ops: we won't know whether there is a required ctor/dtor that needs an
initializer at the time of wrapper-write-replacement.
DeltaFile
+195-0clang/test/CIR/CodeGen/global-tls-simple-init.cpp
+156-3clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+117-0clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
+55-0clang/test/CIR/CodeGen/global-tls-templates.cpp
+523-34 files

LLVM/project c8fe5e8llvm/utils/git github-automation.py

Fix "author" handling in GitHub PR Greeter (#197140)

This is a follow-up to #194307 and fixes the issue reported in:
* https://github.com/llvm/llvm-project/pull/194307#issuecomment-4426270256

Use the same author-detection logic in `PRGreeter` as in
`PRBuildbotInformation`, so both components handle PR authors
consistently.
DeltaFile
+3-3llvm/utils/git/github-automation.py
+3-31 files

LLVM/project d04ea84llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/llvm BUILD.gn

[gn build] Port bc39082d02f7 (#197248)
DeltaFile
+1-0llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/llvm/BUILD.gn
+1-01 files

LLVM/project 9a39c60libclc CMakeLists.txt

[libclc] Consolidate `amdgpu` and `amdgcn` architectures consistently (#197233)

Summary:
Currently we did not pass all checks with amdgpu triple as we did with
amdgcn. SPIR-V set this pattern so let's make it consistent.
DeltaFile
+7-6libclc/CMakeLists.txt
+7-61 files

LLVM/project eeca780llvm/test/tools/llvm-offload-binary llvm-offload-binary.ll

[llvm][tools] Use temp dir for offload-binary unbundling test (#197234)

Certain environments will leave some of the test dirs read-only for
immutability purposes. Create a new temporary directory so that
llvm-offload-binary has a writable directory to unbundle the image into.
With this method we can also delete the temporary directory preventing
breakage of the failure from still passing tests due to leftover files.
DeltaFile
+2-0llvm/test/tools/llvm-offload-binary/llvm-offload-binary.ll
+2-01 files

LLVM/project df41d79. mops-instructions.s

Delete top level mops-instructions.s file (#197244)

The top level file mops-instructions.s file was accidentally added with
the AArch64 C1-Nano scheduling model and is deleted.

The correct file is located in
llvm/test/tools/llvm-mca/AArch64/Inputs/mops-instructions.s
DeltaFile
+0-138mops-instructions.s
+0-1381 files

LLVM/project 6121089llvm/lib/Target/AMDGPU AMDGPUMIRFormatter.cpp, llvm/test/CodeGen/AMDGPU memory-legalizer-single-wave-workgroup-memops.ll memory-legalizer-atomic-insert-end.mir

[AMDGPU][MIRFormatter] Human-readable mask for S_WAITCNT_soft (#197075)

This patch reuses the S_WAITCNT mask printer and parser for
S_WAITCNT_soft. It prints the mask in a human-readable format, showing
the counter values like `Vmcnt_<NUM>_Expcnt_<NUM>_Lgkmcnt_<NUM>`.
DeltaFile
+134-134llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll
+229-0llvm/test/CodeGen/MIR/AMDGPU/s_waitcnt_soft.mir
+47-47llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
+3-3llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
+2-2llvm/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
+2-0llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp
+417-1866 files

LLVM/project a8c6c6bllvm/test/CodeGen/AMDGPU llvm.amdgcn.image.a16.encode.ll llvm.amdgcn.image.sample.g16.encode.ll

Update tests, add back show-mc-encoding
DeltaFile
+506-411llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
+168-146llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
+0-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.noret.ll
+674-5593 files

LLVM/project bc39082clang-tools-extra/clang-tidy/llvm FormatvStringCheck.cpp FormatvStringCheck.h, clang-tools-extra/docs/clang-tidy/checks/llvm formatv-string.rst

[clang-tidy] Add `llvm-formatv-string` (#195974)

Adds a clang-tidy check to perform some validation on `llvm::formatv`
calls. Similar to the built in support Clang has for checking printf
calls.

The validations are:
- The number of unique format indices matches the number of arguments.
- Every argument is used by the format string.
- Automatic and explicit indices are not mixed.

This includes a config option (`AdditionalFunctions`) to perform the
same validation checks on other functions which take formatv inputs.

Assisted-by: claude

---------

Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
Co-authored-by: Zeyi Xu <zeyi2 at nekoarch.cc>
DeltaFile
+171-0clang-tools-extra/clang-tidy/llvm/FormatvStringCheck.cpp
+84-0clang-tools-extra/test/clang-tidy/checkers/llvm/formatv-string.cpp
+50-0clang-tools-extra/docs/clang-tidy/checks/llvm/formatv-string.rst
+47-0clang-tools-extra/clang-tidy/llvm/FormatvStringCheck.h
+28-0clang-tools-extra/test/clang-tidy/checkers/llvm/formatv-string-additional.cpp
+24-0clang-tools-extra/test/clang-tidy/checkers/llvm/formatv-string-autodetect.cpp
+404-04 files not shown
+414-010 files

LLVM/project 851ca38llvm/lib/AsmParser LLParser.cpp

[AsmParser] Use cantFail for FloatLiteral string conversion (#197064)

With assertions disabled but `LLVM_ABI_BREAKING_CHECKS=FORCE_ON`, the
`assert` was elided, the Expected stayed unchecked, and the subsequent
`*Except` tripped `fatalUncheckedError`. Fix this by switching to
`cantFail`.

Assisted-by: Claude Opus
DeltaFile
+6-5llvm/lib/AsmParser/LLParser.cpp
+6-51 files

LLVM/project d546e64llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp

Add gfx13Encoding for ImageIntrinsics
DeltaFile
+5-1llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+5-11 files

LLVM/project eb5a942llvm/test/CodeGen/AMDGPU srem.ll load-global-i8.ll

DAGCombiner: (srl/sra (add nuw/nsw X, c), d) --> (add nuw/nsw (srl/sra X, d), c >> d) (#196379)

Additional precondition:
* The LSBs of c are 0; equivalently: c >> d is exact

Alive2 for
* unsigned case: https://alive2.llvm.org/ce/z/YcJ8qA
* signed case: https://alive2.llvm.org/ce/z/fgpvyE

We already canonicalize (shl (add ...) ...) to (add (shl ...) ...).

Restrict this combine to the single-use case to minimize risk for now.
The main target of this combine is a fan-out tree of `add`s that all end
up being shifted by the same amount at the leaves. This change happens
to
improve a bunch of existing CodeGen tests in AMDGPU.

v2:
- remove a redundant check on the shift amount -- large shift amounts
results in poison anyway
DeltaFile
+2,123-2,126llvm/test/CodeGen/AMDGPU/srem.ll
+1,647-1,991llvm/test/CodeGen/AMDGPU/load-global-i8.ll
+1,469-1,786llvm/test/CodeGen/AMDGPU/load-global-i16.ll
+860-1,133llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+743-910llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+682-844llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
+7,524-8,79023 files not shown
+10,259-11,88029 files

LLVM/project 2269467clang/lib/CIR/CodeGen CIRGenCUDANV.cpp, clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

[CIR][HIP] Handle HIP module constructor and destructor emission (#195391)

Related: https://github.com/llvm/llvm-project/issues/179278,
https://github.com/llvm/llvm-project/issues/175871

Similar to https://github.com/llvm/llvm-project/pull/188673, This adds
the HIP host-side module registration path in CIR lowering for the
non-RDC, included-fatbin case.

Generated sequence for HIP, non-RDC, with `-fcuda-include-gpubinary`:

  ```c
  void **__hip_gpubin_handle = nullptr;

  void __hip_module_ctor() {
      if (__hip_gpubin_handle == nullptr)
__hip_gpubin_handle = __hipRegisterFatBinary(&__hip_fatbin_wrapper);

__hip_register_globals(__hip_gpubin_handle); // we only register kernels

    [12 lines not shown]
DeltaFile
+148-11clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+157-0clang/test/CIR/CodeGenCUDA/device-stub.cu
+2-2clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
+2-2clang/test/CIR/CodeGenCUDA/kernel-call.cu
+1-1clang/test/CIR/CodeGenHIP/simple.cpp
+310-165 files

LLVM/project a63cd0cllvm/lib/IR Instruction.cpp

Update llvm/lib/IR/Instruction.cpp

Co-authored-by: Alexis Engelke <engelke at in.tum.de>
DeltaFile
+1-1llvm/lib/IR/Instruction.cpp
+1-11 files

LLVM/project a185f46lldb/source/Plugins/Platform/Windows PlatformWindows.cpp

[lldb][windows] fix 4-byte error-code read (#197177)

Reading `word_size` (8) bytes here would include 4 bytes of stack
garbage past the struct and produce bogus error codes.
DeltaFile
+4-4lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
+4-41 files

LLVM/project 8572106llvm/test/CodeGen/SPARC bswap.ll

[SPARC] Add BSWAP tests (#192838)
DeltaFile
+523-0llvm/test/CodeGen/SPARC/bswap.ll
+523-01 files

LLVM/project 617fdfallvm/test/CodeGen/AMDGPU udiv-miscompilation.ll

[reviews] Improve test.
DeltaFile
+70-2llvm/test/CodeGen/AMDGPU/udiv-miscompilation.ll
+70-21 files

LLVM/project 5177030clang/lib/AST ExprConstant.cpp, clang/lib/AST/ByteCode InterpBuiltin.cpp

[clang] Add typed variants for C2y stdbit.h rotate builtins (#195299)

stdc_rotate_left_{uc,us,ui,ul,ull}
stdc_rotate_right_{uc,us,ui,ul,ull}

Lower type-specific <stdbit.h> rotate functions to LLVM intrinsics
(fshl/fshr). Includes constant expression support and tests for Sema,
CodeGen, and constant evaluation.

Followup: #160259
DeltaFile
+88-0clang/test/CodeGen/builtin-rotate.c
+77-0clang/test/Sema/builtin-stdc-rotate.c
+15-0clang/lib/AST/ExprConstant.cpp
+15-0clang/lib/AST/ByteCode/InterpBuiltin.cpp
+12-0clang/test/Sema/Inputs/stdbit.h
+12-0clang/test/CodeGen/Inputs/stdbit.h
+219-05 files not shown
+249-011 files

LLVM/project d656777clang/lib/Sema AnalysisBasedWarnings.cpp SemaLifetimeSafety.h

rename IsLifetimeSafetyDiagnosticEnabled
DeltaFile
+1-1clang/lib/Sema/AnalysisBasedWarnings.cpp
+1-1clang/lib/Sema/SemaLifetimeSafety.h
+2-22 files

LLVM/project 0bb1eb1lld/ELF SyntheticSections.cpp Relocations.cpp, lld/ELF/Arch AArch64.cpp

[PAC][lld] Do not emit AUTH relocs against undef weak non-preemptible symbols

Undefined weak non-preemptible symbols should be statically resolved to
the addend value and not signed. Previously, a dynamic relocation
against such symbols was emitted, which is not a correct behavior.

See also docs: https://github.com/ARM-software/abi-aa/pull/391

Resolves #173296
DeltaFile
+118-17lld/ELF/Arch/AArch64.cpp
+48-0lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+48-0lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+47-0lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+15-5lld/ELF/SyntheticSections.cpp
+13-6lld/ELF/Relocations.cpp
+289-283 files not shown
+300-369 files

LLVM/project 80994b7llvm/lib/Support APInt.cpp, llvm/unittests/ADT APIntTest.cpp

Fix assertion failure of `APInt::sqrt` on U64 MAX input (#197161)

Closes #197145

In https://github.com/llvm/llvm-project/blob/65a206f2ec552cccf7c96c5306147f0437832ec7/llvm/lib/Support/APInt.cpp#L1305-L1312:

Instead of computing `nextSquare` completely (which overflows), we only
need to compute the difference between `x_old^2` and `(x_old + 1)^2`
which is simply `2 * x_old + 1` since `(x_old + 1)^2 = x_old^2 + 2 *
x_old + 1`. We can use this difference for the following computation of
the midpoint.
DeltaFile
+8-0llvm/unittests/ADT/APIntTest.cpp
+3-3llvm/lib/Support/APInt.cpp
+11-32 files

LLVM/project b9fd840llvm/lib/Transforms/InstCombine InstCombineSelect.cpp

[InstCombine] Fix one operator precedence (#197164)
DeltaFile
+4-4llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+4-41 files

LLVM/project 4f5b905llvm/include/llvm/CodeGen ScheduleDAG.h, llvm/lib/CodeGen ScheduleDAG.cpp

[ScheduleDAG] Add a reachability cache to amortize DFS calls (#195079)

ScheduleDAGTopologicalSort::IsReachable falls out to a DFS on its
slow path. For some connectivity patterns this can result in ~quadratic
behavior.

Add a cache of {A, B} -> Reachable(A, B). This is invalidated whenever
AddPred or InitDAGTopologicalSorting is called.

For an antagnostic testcase, SelectionDAG time went from 1300s to 250s.

No testcase as no functional change, performance only.

---------

Co-authored-by: James Molloy <jmolloy at google.com>
DeltaFile
+11-0llvm/lib/CodeGen/ScheduleDAG.cpp
+3-0llvm/include/llvm/CodeGen/ScheduleDAG.h
+14-02 files