[flang][OpenMP][NFC] Share SetSymbolDSA between semantics and lowering (#207826)
Move the DSA helper from the private OmpAttributeVisitor::SetSymbolDSA
into the public openmp-dsa header next to GetSymbolDSA, and share the
DSA flag set through a single GetDataSharingAttributeFlags().
This lets an upcoming metadirective lowering change reuse the helper to
set the predetermined DSA of the loop induction variables of a selected
variant. A loop-associated variant is resolved during lowering, so the
usual semantic DSA resolution never runs on its loop nest and lowering
must set those flags itself.
Assisted with Copilot.
[Attributor] AAAddressSpace should use the AA for recursive lookups
If we stripped some values, we can use the AAAddressSpace again for
an optimistic AS value. If we didn't strip any value, we can still use
the TLI.
[libc++] Use a median-of-3 for the A/B comparison benchmarking job (#208023)
After a bit of testing, I think this provides a good tradeoff between
resource utilization and noise reduction. Furthermore, the comparison
script (which produces the output) will be augmented to surface the
variability of the results in a separate PR.
[Attributor] Distinguish COHERENT accesses in addition to exact ones
When we find overlapping accesses, an access is exact when it will hit
the same memory. Otherwise we treated it like an unknown access that
could overwrite any part of the overlapping value. Using size and
alignment we can introduce a new category, COHERENT, which means the
access migth not be at the exact address but if it is affecting the
initial range it will do so with the proper value, e.g., it will not
write part of the range but all or nothing.
[llvm] Support invariant.load on readonly intrinsics (#205916)
Update passes and analyses that look at invariant.load (ex. MemorySSA)
to also consider the possibility that `!invariant.load` may be present
on intrinsic calls.
Updates the verifier to indicate that `!invariant.load` is only legal
for loads and readonly intrinsics (and moves the definition of the
metadata out of the definition of `load`).
This has not been extended to arbitrary function calls since it's less
clear what the semantics of !invariant.load on them would be.
Furthermore, extension to read/write intrinsics like memcpy() is planned
as a followup.
This PR also deletes tests that were pre-committed in
https://github.com/llvm/llvm-project/pull/205894 but that become invalid
with the verifier changes in this PR
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[flang][OpenMP][NFC] Share SetSymbolDSA between semantics and lowering
Move the DSA helper from the private OmpAttributeVisitor::SetSymbolDSA into the
public openmp-dsa header next to GetSymbolDSA, and share the DSA flag set
through a single GetDataSharingAttributeFlags().
This lets an upcoming metadirective lowering change reuse the helper to set the
predetermined DSA of the loop induction variables of a selected variant. A
loop-associated variant is resolved during lowering, so the usual semantic DSA
resolution never runs on its loop nest and lowering must set those flags itself.
Assisted with Copilot.
[WebAssembly] support `f{min, max}imum.f128` and `f{min, max}imumnum.f128` (#207160)
fixes https://github.com/llvm/llvm-project/issues/207100
As far as I can see `wasi-libc` does not currently export the dedicated
libcalls, so I went with a custom expansion. It emits more code, but
will work without any linker errors etc.
The `long double` type is actually `f128` for webassembly, so at least
the libcalls should work.
PPC: Fix extsw elimination when the input reads a subregister
The EXTSW_32_64 sign-extend elimination previously assumed its input
was a full register value. It would then try using that value as the
source of the new (unnecessary) INSERT_SUBREG.
The new test would then hit this verifier error:
```
bb.0:
liveins: $x3
%0:g8rc = COPY killed $x3
%1:g8rc = RLDICL killed %0:g8rc, 0, 33
%3:g8rc = IMPLICIT_DEF
%2:g8rc = INSERT_SUBREG %3:g8rc(tied-def 0), %1:g8rc, %subreg.sub_32
$x3 = COPY killed %2:g8rc
BLR8 implicit $lr8, implicit $rm, implicit killed $x3
*** Bad machine code: INSERT_SUBREG expected inserted value to have equal or lesser size than the subreg it was inserted into ***
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PPC: Fix EXTSW elimination promoting a subregister operand
promoteInstr32To64ForElimEXTSW copies operands from the 32-bit
instruction verbatim into its promoted 64-bit form. When an operand
reads the sub_32 subregister of a 64-bit register, the promoted
instruction (which takes a full register) ended up with an illegal
subregister use and failed the machine verifier.
Drop the sub_32 subregister and use the original full register, which
provides the low 32 bits the promoted instruction operates on. This
avoids verifier error regressions in a future change.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8, claude-opus-4-8)
[clang][Modules] Support ODR merging of `UsingEnumDecl` (#207071)
Fixes https://github.com/llvm/llvm-project/issues/207066.
`UsingEnumDecl` (representing C++20 `using enum` declarations)
was not handled in `ASTContext::isSameEntity`.
Consequently, identical class definitions containing
a `using enum` statement failed to merge, resulting in spurious ODR
mismatch errors such as: `error: 'MyStruct::MyEnum' from module
'ModuleB' is not present in definition of 'MyStruct' in module
'ModuleA'`.
This patch implements merging support for `UsingEnumDecl` in
`ASTContext::isSameEntity` by comparing the nested-name-specifier
qualifiers and the underlying `EnumDecl` target.
---------
Co-authored-by: ipopov <ipopov at google.com>
