LLVM/project 0979680llvm/lib/Transforms/Vectorize VPlan.h

[VPlan] Remove dead member functions (NFC) (#208936)

Remove member functions with no remaining callers anywhere in the tree:

 - VPExpressionRecipe::getOperandOfResultType
- VPBlockBase::getSingleHierarchicalSuccessor
 - VPIRFlags::hasNonNegFlag
- VPWidenIntOrFpInductionRecipe::getStartValue, which is an exact
duplicate of the inherited VPWidenInductionRecipe::getStartValue.
DeltaFile
+0-20llvm/lib/Transforms/Vectorize/VPlan.h
+0-201 files

LLVM/project 6e01e73libcxx/utils/ci/images libcxx_runners.txt

[libcxx] Bump runner set (#208929)

This pulls in 6d3cf7f436a01f4622fb660e413a4020209777b8, and
8ece73c9f8b54fea6a98e9e4c55f9a2e6ccc9b3c.
DeltaFile
+1-1libcxx/utils/ci/images/libcxx_runners.txt
+1-11 files

LLVM/project 419cce0libcxx/docs/ReleaseNotes 22.rst 23.rst

[libcxx][NFC] Move release notes for MSVC's implementation of exception_ptr (#208883)

These were accidentally placed in LLVM 22 rather than 23 file.
DeltaFile
+0-6libcxx/docs/ReleaseNotes/22.rst
+6-0libcxx/docs/ReleaseNotes/23.rst
+6-62 files

LLVM/project 9a0fd83mlir/test/CAPI rewrite.c

[mlir-c] Fix -Wmissing-field-initializers in rewrite.c test

The new matchAndRewrite1ToN field left three existing
MlirConversionPatternCallbacks initializers under-initialized, which
fails the CI build under -Werror=-Wmissing-field-initializers.
DeltaFile
+4-3mlir/test/CAPI/rewrite.c
+4-31 files

LLVM/project e9577f8mlir/lib/Bindings/Python Rewrite.cpp

[mlir-c] Value-initialize MlirConversionPatternCallbacks in Python bindings

The Python conversion-pattern binding left the struct default-initialized,
so the newly-added optional matchAndRewrite1ToN field held an indeterminate
pointer. The driver's null check then read garbage and jumped into it,
segfaulting mlir/test/python/rewrite.py. Value-initialize the struct so
optional callbacks default to null.
DeltaFile
+3-1mlir/lib/Bindings/Python/Rewrite.cpp
+3-11 files

LLVM/project f847e7bmlir/include/mlir-c Rewrite.h, mlir/lib/CAPI/Transforms Rewrite.cpp

[mlir-c] Add 1:N TypeConverter conversion and materialization bindings

Builds on the source/target materialization C bindings:

- Target materialization callbacks now receive `originalType` (split from the
  previously-shared source/target callback typedef), exposing a documented C++
  capability that was otherwise unreachable from C.
- 1:N type conversion: `mlirTypeConverterAdd1ToNConversion` plus an opaque
  results accumulator (`MlirTypeConverterConversionResults` /
  `mlirTypeConverterConversionResultsAppend`). A declining callback's appended
  types are rolled back so the driver's "try the next conversion" invariant
  holds.
- 1:N target materialization: `mlirTypeConverterAdd1ToNTargetMaterialization`,
  whose callback fills a caller-allocated `outputs` buffer. A success that
  leaves any output null is treated as a decline rather than handing the driver
  a null-containing result.
- `mlirConversionPatternRewriterReplaceOpWithMultiple` for 1:N value
  replacement, which can drive a source materialization with nInputs > 1.
- An optional `matchAndRewrite1ToN` callback on `MlirConversionPatternCallbacks`

    [9 lines not shown]
DeltaFile
+731-2mlir/test/CAPI/rewrite.c
+153-14mlir/lib/CAPI/Transforms/Rewrite.cpp
+103-5mlir/include/mlir-c/Rewrite.h
+987-213 files

LLVM/project 7fb9b32mlir/test/CAPI rewrite.c

[mlir-c] Tighten materialization test CHECKs to pin full module body

Use CHECK-NEXT to match the entire module body (module { ... }) rather
than loose CHECK lines, so the tests also assert the absence of any
stray ops -- e.g. a leftover builtin.unrealized_conversion_cast -- that
a loose CHECK would silently allow.
DeltaFile
+10-6mlir/test/CAPI/rewrite.c
+10-61 files

LLVM/project 4329818mlir-summer-school outline.md, mlir-summer-school/slides lecture1-passes.html lecture1-passes.md

update
DeltaFile
+2,608-0mlir-summer-school/slides/lecture1-passes.html
+997-77mlir-summer-school/slides/lecture1-passes.md
+182-3mlir-summer-school/slides/lecture3-canonicalization.md
+130-1mlir-summer-school/slides/lecture2-patterns.md
+98-0mlir-summer-school/slides/cheat-sheet.md
+37-4mlir-summer-school/outline.md
+4,052-851 files not shown
+4,052-857 files

LLVM/project 670e0a0llvm/test/Analysis/CostModel/AMDGPU is_fpclass.ll, llvm/test/Assembler print-formatted.ll

[IR] Use pretty printing for mask in is_fpclass (#207653)

The second argument of `llvm.is_fpclass` is a mask, where each bit
represents a floating-point class. Understanding the check that the call
makes in an IR dump requires additional effort. To simplify the
interpretation of IR dumps, a previously implemented pretty-printing
mechanism can be used:
https://github.com/llvm/llvm-project/commit/39e7712ac520ccfc43383b3e9d6ea8cf2958b8e3.
This commit implements this mechanism for printing the arguments of
`llvm.is_fpclass`.

This change also fixes the printing of argument names: if an argument
name is absent, it is simply not printed.
DeltaFile
+239-239llvm/test/Transforms/InstCombine/is_fpclass.ll
+177-60llvm/test/Transforms/SpeculativeExecution/spec-calls.ll
+69-69llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
+64-64llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
+51-0llvm/test/Assembler/print-formatted.ll
+25-25llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
+625-45741 files not shown
+871-69247 files

LLVM/project 31ddc7emlir/lib/Analysis/Presburger Matrix.cpp

[mlir][presburger] Avoid redundant zero-initialization in insertColumns (#199911)

When insertColumns does not trigger a physical reallocation, the inner
loop needlessly loops up to nReservedColumns - 1. This causes massive
redundant zero-writes on trailing columns that are already zero. This
patch truncates the inner loop start boundary to nColumns - 1, when the
reserved capacity is unchanged, optimizing the non-realloc path from
O(nRows * nReservedColumns) to O(nRows * nColumns).
DeltaFile
+4-4mlir/lib/Analysis/Presburger/Matrix.cpp
+4-41 files

LLVM/project a11e844clang/include/clang/Analysis/Analyses/LifetimeSafety Utils.h

[clang][LifetimeSafety] Short-circuit joins of identical immutable containers (#208908)
DeltaFile
+4-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
+4-01 files

LLVM/project 9d5d883llvm/lib/Transforms/AggressiveInstCombine AggressiveInstCombine.cpp, llvm/test/Transforms/AggressiveInstCombine/X86 or-load.ll

[AggressiveInstCombine] Fix crash when folding consecutive loads into a type smaller than the combined load (#207229)
DeltaFile
+51-0llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
+8-3llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+59-32 files

LLVM/project 847fe43llvm/lib/Target/AArch64 AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 preserve-all-large-csr.ll

[AArch64] Fix miscompilation due to integer overflow in immediate offset for stack store/load instructions with preserve_all (#207026)

Fix AArch64 framelowering bug exposed by a preserve_all function that
spills 30+ callee-saved registers: paired stp/ldp offsets overflows the
signed 7-bit immediate, fixed by spilling those registers as single
str/ldr instead.

AI Usage Disclosure
AI was used to help the: 
- investigation process 
- suggestion of solution  
- suggestion of comment wordings

Fixes #204564
DeltaFile
+225-0llvm/test/CodeGen/AArch64/preserve-all-large-csr.ll
+7-3llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+232-32 files

LLVM/project e490b43clang/lib/Rewrite HTMLRewrite.cpp, clang/lib/StaticAnalyzer/Core HTMLDiagnostics.cpp

[analyzer] Fix invalid HTML nesting for popups at end of line (#207793)

The static analyzer's HTML reports contain misnested tags whenever a
variable with a `variable_popup` is the last token on a source line.
`AddLineNumber` inserts the row-closing `</td></tr>` with `InsertTextBefore`, which
places it in front of text previously inserted at the same offset. As a result,
the popup's closing `</table></span>` tags and the arrow anchor `</span>`
tags end up outside the table row. HTML parsers (jsoup, pup) and validators
reject the file from that point on.

Before:

<span class='variable'>b</td></tr><table
class='variable_popup'>...</table></span></span></span>

<img width="786" height="414" alt="image"
src="https://github.com/user-attachments/assets/023461ad-73e4-424e-a4fb-42faf7a945f0"
/>


    [28 lines not shown]
DeltaFile
+23-0clang/test/Analysis/html_diagnostics/variable-popups-eol.c
+8-5clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
+1-1clang/lib/Rewrite/HTMLRewrite.cpp
+32-63 files

LLVM/project 79ebcadclang/lib/StaticAnalyzer/Checkers BlockInCriticalSectionChecker.cpp, clang/test/Analysis block-in-critical-section-raii.cpp

[analyzer] Prevent inlining RAII ctors/dtors (#208729)

BlockInCriticalSectionChecker registers the pre-call for the RAII ctors
and Dtors - and also the raw 'lock' and 'unlock' handlers.

However, pre-call does not prevent inlining. This means that (in the
likely case of) that the body is present, the analyzer will model the
effect of the lock twice. This happens on libc++ unique_lock.

We really should have eval-called the ctor/dtor to avoid the inlining of
those, but here we are.

rdar://175814310
DeltaFile
+53-0clang/test/Analysis/block-in-critical-section-raii.cpp
+40-9clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
+93-92 files

LLVM/project a54fc1fllvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll bf16-v4-instructions.ll

[AArch64][GlobalISel] Extend handling to bf16 vecreduce. (#208684)

This alters the extension of f16 vecreduce to bf16, allowing us to
handle the non-strict fadd and fmul reductions, along with fmin and fmax
variants.
DeltaFile
+860-496llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+477-290llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+18-5llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+1,355-7913 files

LLVM/project 196161fclang/lib/Sema DeclSpec.cpp, clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc p2.cpp

Merge branch 'main' into users/aokblast/lldb/set_error
DeltaFile
+120-149llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+93-148llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+163-0clang/lib/Sema/DeclSpec.cpp
+57-48clang/test/CXX/dcl.dcl/dcl.spec/dcl.stc/p2.cpp
+42-42llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
+39-39llvm/test/CodeGen/AArch64/GlobalISel/select-shuffle-vector.mir
+514-426350 files not shown
+1,905-1,442356 files

LLVM/project 53557d3lldb/include/lldb/Symbol Symbol.h, lldb/source/Plugins/ObjectFile/ELF ObjectFileELF.cpp ObjectFileELF.h

[LLDB] Support Auxiliary library in ELF format

An ELF filter library (DT_FILTER) or auxiliary filter (DT_AUXILIARY)
delegates symbol resolution to its filtee: the dynamic linker looks up
each symbol in the filtee first, falling back to the filter library's
own definition. Filter library may export placeholder smyolbs whose
addresses are not the actual function entry points.

To support this, we teach ObjectFileELF to parse the filtee and model
placeholder function definition in filter libraries as ReExported,
reusing the existing re-export machinery.
DeltaFile
+43-10lldb/source/Symbol/Symbol.cpp
+31-0lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+11-1lldb/include/lldb/Symbol/Symbol.h
+2-0lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.h
+87-114 files

LLVM/project 4125b6fllvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[GlobalISel] Improve bf16 converts with fast-math flags. (#200741)

This alters the lowering of bf16 G_TRUNC to exclude the check for nan if
the operation being extended is nnan. Flags are then threaded through so
that the G_FPEXT and G_FPTRUNC from promoted nodes keep the same FMF.
DeltaFile
+120-149llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+93-148llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+42-42llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmad.s16.mir
+42-23llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+4-19llvm/test/CodeGen/AArch64/bf16-instructions.ll
+11-8llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+312-3896 files not shown
+344-40812 files

LLVM/project d90e6c8llvm/lib/CodeGen StackColoring.cpp, llvm/test/CodeGen/RISCV stack-coloring-large-stack.ll

[StackColoring] Change TotalStackSize from unsigned to int64_t (#208671)

StackColoring tracks the total size of the stack as `unsigned int`. This
will wrap around, even on 64-bit systems, if the stack is greater than
that resulting in a wrong size. This can happen on both PPC and RISCV64.
DeltaFile
+17-0llvm/test/CodeGen/RISCV/stack-coloring-large-stack.ll
+2-2llvm/lib/CodeGen/StackColoring.cpp
+19-22 files

LLVM/project 0658008llvm/test/CodeGen/AMDGPU fcanonicalize.ll flat-scratch-reg.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (12)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+15-15llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
+14-14llvm/test/CodeGen/AMDGPU/fmad-formation-fmul-distribute-denormal-mode.ll
+14-14llvm/test/CodeGen/AMDGPU/flat-scratch.ll
+12-12llvm/test/CodeGen/AMDGPU/fma.f16.ll
+10-10llvm/test/CodeGen/AMDGPU/flat-scratch-svs.ll
+83-8394 files not shown
+371-371100 files

LLVM/project 86aa4aallvm/test/CodeGen/AMDGPU fmin3-minimumnum.ll fmax3-maximumnum.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (13)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+18-18llvm/test/CodeGen/AMDGPU/fmin3-minimumnum.ll
+18-18llvm/test/CodeGen/AMDGPU/fmax3-maximumnum.ll
+16-16llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
+14-14llvm/test/CodeGen/AMDGPU/fold-gep-offset.ll
+12-12llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
+11-11llvm/test/CodeGen/AMDGPU/fmin3.ll
+89-8994 files not shown
+374-374100 files

LLVM/project 98a5152llvm/test/CodeGen/AMDGPU carryout-selection.ll call-graph-register-usage.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (9)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+11-11llvm/test/CodeGen/AMDGPU/carryout-selection.ll
+10-10llvm/test/CodeGen/AMDGPU/call-graph-register-usage.ll
+8-8llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
+8-8llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
+8-8llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
+8-8llvm/test/CodeGen/AMDGPU/build-vector-packed-partial-undef.ll
+53-5393 files not shown
+258-25899 files

LLVM/project 5ccdd15llvm/test/CodeGen/AMDGPU dagcombine-fmul-sel.ll copy_phys_vgpr64.mir

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (10)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+10-10llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
+6-6llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir
+6-6llvm/test/CodeGen/AMDGPU/diverge-interp-mov-lower.ll
+6-6llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
+6-6llvm/test/CodeGen/AMDGPU/ctlz.ll
+5-5llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
+39-3991 files not shown
+210-21097 files

LLVM/project b0e9ec3llvm/test/CodeGen/AMDGPU elf-header-flags-mach.ll elf-header-osabi.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (11)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+79-79llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll
+18-18llvm/test/CodeGen/AMDGPU/elf-header-osabi.ll
+14-14llvm/test/CodeGen/AMDGPU/elf-header-flags-sramecc.ll
+10-10llvm/test/CodeGen/AMDGPU/dpp_combine.ll
+10-10llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
+9-9llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir
+140-14093 files not shown
+377-37799 files

LLVM/project 9cce2a1llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmin.ll atomic_optimizations_struct_buffer.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (8)

Mechanically migrate the command-line target spelling on llc/opt RUN lines in
llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the folded
subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+11-11llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+11-11llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
+11-11llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+11-11llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+10-10llvm/test/CodeGen/AMDGPU/bf16.ll
+10-10llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
+64-6490 files not shown
+301-30196 files

LLVM/project 4f94d25llvm/test/CodeGen/AMDGPU atomic_optimizations_global_pointer.ll atomic_optimizations_local_pointer.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (7) (#208836)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+30-30llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+16-16llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
+11-11llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
+11-11llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
+9-9llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
+9-9llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
+86-8690 files not shown
+277-27796 files

LLVM/project a9987b7llvm/test/CodeGen/AMDGPU amdgpu-inline.ll amdgpu-cs-chain-cc.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (6) (#208835)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+5-5llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
+4-4llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
+4-4llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
+4-4llvm/test/CodeGen/AMDGPU/amdgpu-nsa-threshold.ll
+4-4llvm/test/CodeGen/AMDGPU/amdgpu-reloc-const.ll
+3-3llvm/test/CodeGen/AMDGPU/amdgpu-prepare-agpr-alloc.mir
+24-2493 files not shown
+134-13499 files

LLVM/project d5ff29dllvm/test/CodeGen/AMDGPU amdgcn-av-scopes.ll abs_i16.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (5) (#208834)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+12-12llvm/test/CodeGen/AMDGPU/amdgcn-av-scopes.ll
+9-9llvm/test/CodeGen/AMDGPU/abs_i16.ll
+8-8llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+6-6llvm/test/CodeGen/AMDGPU/amd.endpgm.ll
+6-6llvm/test/CodeGen/AMDGPU/add.ll
+6-6llvm/test/CodeGen/AMDGPU/amdgcn.private-memory.ll
+47-4787 files not shown
+287-28993 files

LLVM/project cce2b5aclang-tools-extra/clang-tidy/readability RedundantParenthesesCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Support parentheses around subscript operators in readability-redundant-parentheses (#208759)

Subscript operators have the same operator procedure as function calls.

Treat overloaded `()` as built-in operators as a drive-by. I missed this
case when reviewing #192254.
DeltaFile
+21-0clang-tools-extra/test/clang-tidy/checkers/readability/redundant-parentheses.cpp
+4-1clang-tools-extra/clang-tidy/readability/RedundantParenthesesCheck.cpp
+2-0clang-tools-extra/docs/ReleaseNotes.rst
+27-13 files