[clang][CodeGen] Skip __hip_cuid_ global in incremental(clang-repl) mode (#217228)
With this patch, when run in incremental mode (clang-repl), Clang skips
emitting the `__hip_cuid_` global. This is handled in
`clang/lib/CodeGen/CodeGenModule.cpp` on
`LangOpts.IncrementalExtensions`.
I have also added a test at
`clang/test/CodeGenCUDA/hip-cuid-incremental.hip` which checks that the
`__hip_cuid_` global is emitted normally but not in the presence of
`-fincremental-extensions`.
Assisted by Claude Opus 4.8
[mlir][MPIToLLVM] Take the descriptor index type from the descriptor
`getRawPtrAndSize` extracted the memref descriptor's offset as `i64` and
unconditionally truncated the extents to `i32`. Both assume a 64-bit index: with
a 32-bit one the extract disagrees with the descriptor's field type and the
truncation becomes an invalid `llvm.trunc` from `i32` to `i32`.
Read the index type off the descriptor and only adjust the extent width when it
actually differs. While here, drop the rank-0 branch that rebuilt the already
available element count as an `arith.constant` in the middle of an LLVM
lowering.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[MemProf] Support cold-only and min hint when optimizing existing hot/cold new (#218803)
Change -optimize-existing-hot-cold-new to an enum option supporting:
- none (default): Do not optimize existing hot/cold new calls
- cold: Only optimize existing hot/cold new calls if determined to be
cold
- always: Always optimize existing hot/cold new calls
Add a new option -min-existing-hot-cold-new-hint (off by default) that,
when optimizing an existing hot/cold operator new call, takes the
minimum
of the compiler hint and the existing hint.
[mlir][LLVM] Use a disjoint scope domain when inlining noalias
This matches recent changes to the LLVM inliner.
AI disclosure: Claude wrote the code, I wrote the commit message and
have done initial review.
[mlir][LLVM] Add disjointScopes to AliasScopeDomainAttr
This also updates the MLIR-side inliner to clone disjoint domains
while cloning alias scopes, matching changes to LLVM.
AI disclosure: Claude wrote the code, I wrote the commit message and
looked at the code.
[AMDGPU] Use a disjoint scope domain for merged LDS structs
When lowering LDS values, all the values are mutually disjoint, so we
can use the newly-added disjoint scopes feature to simplify the IR.
AI disclosure: Claude wrote this and I reviewed it and wrote the
commit message
[AMDGPU] Use a disjoint scope domain for noalias kernel arguments
All noalias arguments of a kernel are disjoint with each other, so we
can use a disjoint scope to save on metadata construction.
AI disclosure: Claude wrote this, I looked at it and wrote this
message.
[IR] Add alias scope domains with disjoint scopes
See RFC at
https://discourse.llvm.org/t/rfc-disjoint-scope-alias-scope-noalias-domains/91537
This commit adds support for declaring an alias scope domain disjoint.
Disjoint domains are ones where each scope is implicitly `!noalias`
with each other scope in the domain. This is represented by adding an
`i1` into the scope's domain as the second argument, with `i1 true`
representing disjoint scopes and `i1 false` representing the old
non-disjoint behavior. AutoUpgrade mechanisms have been added to add
in the missing `i1 false` to existing metadata.
This commit updates alias analysis to know about disjoint scopes and
updates the function cloner to also clone the alias domain if it's
disjoint (since, as a herd of LLMs discovered, you don't want the old
IR to be noalias with a clone of itself).
Commits to migrate passes to use disjoint scopes where that's an
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[Inliner] Use a disjoint scope domain for noalias arguments
InlineFunction creates alias.scope/noalias metadata to represent the
set of `noalias` arguments to a function. We don't need the `!noalias`
now that we have the ability to use disjoint scopes, saving us IR size
and metadata bloat.
TODO move these to a previous commit.
Also changes InstCombine to not drop the experimental.noalias.scope.decl
for disjoint scopes even if they're not mentioned in a `!noalias`, but
do still delete them if they're not used.
[utils] Don't rename %. inside quoted strings in test checkseg
Replacing `%.foo` with `%dotfoo` everywhere also caught any `%.foo`
inside metadata, which would then cause incorrect CHECK lines to be
generated (since the value in the metedata isn't going to be
modified).
This commit fixes the issue by matching quoted strings in a regex
before looking for %. to replace.
AI disclosure: Claude found and fixed this, I wrote the commit message
[ValueTracking] Treat RISC-V vsetvlimax as a power of two (#218831)
VLMAX = VLEN * LMUL / SEW is always a non-zero power of two for any valid
vtype, so llvm.riscv.vsetvlimax is a power of two regardless of SEW/LMUL or
whether a vscale_range is present. Report this in isKnownToBeAPowerOfTwo
so that consumers such as ctpop and the x & (x - 1) idiom can fold.
Assisted-by: TRAE CLI (Opus 4.8)
[ExpandMemCmp] Apply NumLoadsPerBlock to ordering compares (#215186)
Make NumLoadsPerBlock control both equality and ordering memcmp
expansions. For ordering comparisons, pack consecutive legal loads
in memory order into a value no wider than the target preferred
load width, then compare the packed values. This preserves
lexicographic semantics while reducing conditional branches.
BPF uses groups of eight byte-load pairs, so an align-1 32-byte
comparison forms four i64 compare blocks instead of 32 byte compare
blocks.
Other targets retain their existing default ordering behavior unless
grouping is explicitly requested.
Assisted-by: TRAE CLI (GPT-5)
[Github] Bump formatting/tools container to 23.1.0 (#218815)
Now that 23.1.0 has been released, we should update the container to
ensure we're using the latest released version of the tooling.
[Github] Hash pin ci-format container (#218816)
This follows our own CI best practices and ensures zizmor/CodeQL will
not complain about this when people inevitably touch it in the future.
[RISCV][Verifier] Check operands and result type of RISC-V vsetvli/vsetvlimax (#218594)
The result of `llvm.riscv.vsetvli/vsetvlimax` models VLMAX (or a VL bounded
by it) and is only defined for XLen, so the result type must be i32 or i64.
Narrower types cannot represent the architectural VLMAX range of [1, 65536]
that value analyses rely on.
Also check that the VSEW and VLMUL immediate operands encode a valid
SEW/LMUL pair (VSEW <= 3, VLMUL != reserved), so that consumers can
assume a well-formed vtype.
Assisted-by: TRAE CLI (Opus 4.8)
[C++][Modules] Don't insert `#include` before GMF when `-include` used (#212533)
Clang currently emits command-line implicit inputs such as `-imacros`,
`-include-pch`/`-include-pth`, and `-include` as part of the predefines
buffer. This causes them to be processed before the main source file.
For a C++20 module unit with a global module fragment:
```cpp
module;
export module M;
```
a force-included header containing declarations was effectively
processed as:
```cpp
#include "Header.h"
module;
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[X86] Limit the result of XOR8rr_NOREX unused (#218640)
In case it may be zero/sign-extended into an REX/REX2 register.
Fixes: #218583
Assisted-by: Claude Opus 4.8
[MCParser,test] Improve macro argument charset test (#218828)
'@', '#', and '?' are assembly identifier characters, but they terminate
a macro argument name.
[AMDGPU] Correct DS FIFO buffer size semantics
There was some ambiguity in how buffersize 0 and 1 are handled. The
correct semantics are:
- `BufferSize == 0`: unlimited, no FIFO stall
- `BufferSize == 1`: unbuffered, only one instruction in flight
- `BufferSize > 1`: buffered FIFO
Handle DS FIFO accounting edge cases
Saturate hardware-unit pressure decrements and treat buffer sizes zero
and one as disabling buffering to avoid underflow and inconsistent stall
costs.
[AMDGPU] Use DS latency for FIFO scheduling
Use instruction latency for DS hardware-unit cycle accounting so the FIFO
model can identify a full buffer. Add focused MIR coverage for the resulting
stall cost and scheduling decision, and regenerate the integration checks.
Change-Id: I2f4df2e97d145af4935872dbd43108e1b55077ab
