LLVM/project 61b5d78clang/lib/CIR/CodeGen CIRGenStmt.cpp CIRGenDecl.cpp

[CIR][NFC] Add missing enum values related to CXXExpansionStmt (#208919)

Add missing enum values related to CXXExpansionStmt
DeltaFile
+2-0clang/lib/CIR/CodeGen/CIRGenStmt.cpp
+1-0clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+3-02 files

LLVM/project 074c4b3lld/ELF MarkLive.cpp

[ELF] Replace getThreadIndex with explicit shards in markLive. NFC (#208974)

The parallel mark loop appends deeper discoveries to per-thread queues
indexed by `parallel::getThreadIndex()`, the last getThreadIndex user in
lld. Instead, have each worker claim frontier items off a shared
counter, accumulating into an explicit shard.

The finer-grained item claiming improves load balancing: the markLive
--time-trace phase is ~5% faster for a clang --gc-sections link and ~4%
for a larger chromium one.
DeltaFile
+9-6lld/ELF/MarkLive.cpp
+9-61 files

LLVM/project 10955eallvm/lib/Target/ARM ARMAsmPrinter.cpp ARMISelLowering.cpp, llvm/test/CodeGen/ARM weak-hidden-pic.ll elf-preemption.ll

Revert "[ARM] Use .reloc for weak symbols in PIC mode instead of GOT indirect…"

This reverts commit 290279b6b69138f4162cace4865713efa12ec262.
DeltaFile
+0-30llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+6-8llvm/test/CodeGen/ARM/weak-hidden-pic.ll
+8-3llvm/lib/Target/ARM/ARMISelLowering.cpp
+4-6llvm/test/CodeGen/ARM/elf-preemption.ll
+9-0llvm/lib/Target/ARM/ARMTargetMachine.h
+2-1llvm/lib/Target/ARM/ARMFastISel.cpp
+29-481 files not shown
+31-497 files

LLVM/project d6d0ccclldb/tools/lldb-mcp Multiplexer.cpp Multiplexer.h, lldb/unittests/Host JSONTransportTest.cpp

[lldb-mcp] Multiplex across all discovered LLDB instances (#208827)

Connect to every LLDB MCP server advertised under ~/.lldb rather than a
single one, and present them to the client as one server. A stale
registry entry from a crashed instance simply fails to connect and is
skipped.

Each instance is identified by the pid of its lldb process, now recorded
in the ServerInfo registry file. Tools and resources are addressed with
instance-qualified URIs, e.g. lldb-mcp://instance/{pid}/debugger/{id}
and lldb://instance/{pid}/debugger/{id}/target/{idx}. Listing requests
(sessions_list, resources/list) fan out to every backend and aggregate;
targeted requests (command, resources/read) are routed by the pid parsed
from the URI. Backends only know their local lldb-mcp://debugger/{id}
form, so URIs are rewritten in both directions.

Add Binder::FailPendingRequests (and Client::CancelPendingRequests) so
that when the client disconnects with a request still in flight to a
backend, the abandoned reply is satisfied with an error instead of being

    [3 lines not shown]
DeltaFile
+467-0lldb/unittests/tools/lldb-mcp/MultiplexerTest.cpp
+239-30lldb/tools/lldb-mcp/Multiplexer.cpp
+53-13lldb/tools/lldb-mcp/Multiplexer.h
+43-23lldb/tools/lldb-mcp/lldb-mcp.cpp
+20-0lldb/unittests/Host/JSONTransportTest.cpp
+15-0lldb/unittests/tools/lldb-mcp/CMakeLists.txt
+837-667 files not shown
+878-7013 files

LLVM/project 516cff3llvm/lib/Bitcode/Writer BitcodeWriter.cpp, llvm/test/Assembler thinlto-bad-summary-5.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+13-0llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
+11-0llvm/test/Assembler/thinlto-bad-summary-5.ll
+5-0llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+3-1llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+32-14 files

LLVM/project b5d4019llvm/lib/Bitcode/Writer BitcodeWriter.cpp, llvm/test/Assembler thinlto-bad-summary-5.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+15-0llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
+7-5llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+11-0llvm/test/Assembler/thinlto-bad-summary-5.ll
+3-1llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+36-64 files

LLVM/project c593d94llvm/lib/Bitcode/Writer BitcodeWriter.cpp, llvm/test/Assembler thinlto-bad-summary-5.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+13-0llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
+11-0llvm/test/Assembler/thinlto-bad-summary-5.ll
+5-0llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+3-1llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+32-14 files

LLVM/project 57c2cf4llvm/lib/Bitcode/Writer BitcodeWriter.cpp, llvm/test/Assembler thinlto-bad-summary-5.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+11-0llvm/test/Assembler/thinlto-bad-summary-5.ll
+3-1llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+14-12 files

LLVM/project 410a2a2libcxx/include/__algorithm pstl.h, libcxx/include/__pstl backend_fwd.h

[libc++][pstl] Default implementation of parallel std::reverse_copy (#208085)

This PR adds a default parallel implementation of `std::reverse_copy`
based on `std::reverse_iterator` + parallel `std::copy`.

Effectively it's a one-liner:
```c++
    return _Copy()(__policy,
                   std::reverse_iterator<_BidirectionalIterator>(std::move(__last)),
                   std::reverse_iterator<_BidirectionalIterator>(std::move(__first)),
                   std::move(__result));
```

Included tests check that:

- Semantics of the function is correct.
- The function correctly SFINAE out when the first argument is not an
execution policy.
- The `nodiscard` policy is followed.

    [8 lines not shown]
DeltaFile
+116-0libcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/pstl.reverse_copy.pass.cpp
+18-0libcxx/include/__pstl/backends/default.h
+17-0libcxx/include/__algorithm/pstl.h
+12-2libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
+7-0libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
+7-0libcxx/include/__pstl/backend_fwd.h
+177-21 files not shown
+179-27 files

LLVM/project 905f654lld/ELF Relocations.cpp SyntheticSections.h, lld/ELF/Arch X86_64.cpp Mips.cpp

[ELF] Replace getThreadIndex with explicit shards in RelocScan. NFC (#208959)

Parallel relocation scanning (https://reviews.llvm.org/D133003) appends
dynamic relocations to `relocsVec[parallel::getThreadIndex()]`.
`getThreadIndex` returns -1u on main, which is a known hazard.

Instead, run one scan task per worker via `parallelFor`, with tasks
claiming object files off a shared counter, and pass the task index
through scanSection/RelocScan as the relocsVec shard.
DeltaFile
+38-44lld/ELF/Relocations.cpp
+18-30lld/ELF/SyntheticSections.h
+11-7lld/ELF/RelocScan.h
+9-7lld/ELF/Arch/X86_64.cpp
+9-7lld/ELF/Arch/Mips.cpp
+8-7lld/ELF/Arch/RISCV.cpp
+93-10210 files not shown
+167-16016 files

LLVM/project 63f4d28lld/ELF RelocScan.h, lld/test/ELF i386-tls-ie-shared.s

[ELF] Fix data race when handleTlsIe adds a RELATIVE relocation (#208956)

The ieExpr == R_GOT PIC case (e.g. R_386_TLS_IE in -shared links) calls
the unsynchronized addRelativeReloc from concurrent scanSectionImpl
tasks, racing on relaDyn->relativeRelocs. Use the sharded variant like
processAux. Split i386-tls-ie-shared.s into two input files so that a
ThreadSanitizer build detects the race.
DeltaFile
+54-62lld/test/ELF/i386-tls-ie-shared.s
+2-2lld/ELF/RelocScan.h
+56-642 files

LLVM/project c84e264llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll bf16-v4-instructions.ll

[AArch64][GlobalISel] Add test coverage for bf16 fptosi.sat. NFC (#208955)
DeltaFile
+186-0llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+137-0llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+125-0llvm/test/CodeGen/AArch64/bf16-instructions.ll
+448-03 files

LLVM/project 5742a30llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fadd.ll atomic_optimizations_struct_buffer.ll

AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (8) (#208837)

Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+11-11llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+11-11llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
+11-11llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+11-11llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+10-10llvm/test/CodeGen/AMDGPU/bf16.ll
+10-10llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
+64-6490 files not shown
+301-30196 files

LLVM/project 8b1da8dllvm/lib/AsmParser LLParser.cpp, llvm/lib/Bitcode/Writer BitcodeWriter.cpp

fix

Created using spr 1.3.7
DeltaFile
+0-14llvm/lib/AsmParser/LLParser.cpp
+3-1llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+1-1llvm/test/Assembler/thinlto-bad-summary-5.ll
+4-163 files

LLVM/project 030fdcellvm/lib/Transforms/Vectorize VPlanHelpers.h LoopVectorize.cpp

[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC). (#203386)

VPRecipeBase::dump() constructs a fresh VPSlotTracker instance on each
call. VPSlotTracker construction requires iterating over all recipes in
the plan, to number all VPValues.

To avoid doing lots of unnecessary work when printing VPlan costs,
construct a shared VPSlotTracker in VPCostContext, re-used by all
prints.

This can speed up debug output for large loops.

PR: https://github.com/llvm/llvm-project/pull/203386
DeltaFile
+19-2llvm/lib/Transforms/Vectorize/VPlanHelpers.h
+5-3llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+6-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+30-63 files

LLVM/project 1cdd33allvm/lib/AsmParser LLParser.cpp, llvm/test/Assembler thinlto-bad-summary-5.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+14-0llvm/lib/AsmParser/LLParser.cpp
+11-0llvm/test/Assembler/thinlto-bad-summary-5.ll
+25-02 files

LLVM/project 0979680llvm/lib/Transforms/Vectorize VPlan.h

[VPlan] Remove dead member functions (NFC) (#208936)

Remove member functions with no remaining callers anywhere in the tree:

 - VPExpressionRecipe::getOperandOfResultType
- VPBlockBase::getSingleHierarchicalSuccessor
 - VPIRFlags::hasNonNegFlag
- VPWidenIntOrFpInductionRecipe::getStartValue, which is an exact
duplicate of the inherited VPWidenInductionRecipe::getStartValue.
DeltaFile
+0-20llvm/lib/Transforms/Vectorize/VPlan.h
+0-201 files

LLVM/project 6e01e73libcxx/utils/ci/images libcxx_runners.txt

[libcxx] Bump runner set (#208929)

This pulls in 6d3cf7f436a01f4622fb660e413a4020209777b8, and
8ece73c9f8b54fea6a98e9e4c55f9a2e6ccc9b3c.
DeltaFile
+1-1libcxx/utils/ci/images/libcxx_runners.txt
+1-11 files

LLVM/project 419cce0libcxx/docs/ReleaseNotes 22.rst 23.rst

[libcxx][NFC] Move release notes for MSVC's implementation of exception_ptr (#208883)

These were accidentally placed in LLVM 22 rather than 23 file.
DeltaFile
+0-6libcxx/docs/ReleaseNotes/22.rst
+6-0libcxx/docs/ReleaseNotes/23.rst
+6-62 files

LLVM/project 9a0fd83mlir/test/CAPI rewrite.c

[mlir-c] Fix -Wmissing-field-initializers in rewrite.c test

The new matchAndRewrite1ToN field left three existing
MlirConversionPatternCallbacks initializers under-initialized, which
fails the CI build under -Werror=-Wmissing-field-initializers.
DeltaFile
+4-3mlir/test/CAPI/rewrite.c
+4-31 files

LLVM/project e9577f8mlir/lib/Bindings/Python Rewrite.cpp

[mlir-c] Value-initialize MlirConversionPatternCallbacks in Python bindings

The Python conversion-pattern binding left the struct default-initialized,
so the newly-added optional matchAndRewrite1ToN field held an indeterminate
pointer. The driver's null check then read garbage and jumped into it,
segfaulting mlir/test/python/rewrite.py. Value-initialize the struct so
optional callbacks default to null.
DeltaFile
+3-1mlir/lib/Bindings/Python/Rewrite.cpp
+3-11 files

LLVM/project f847e7bmlir/include/mlir-c Rewrite.h, mlir/lib/CAPI/Transforms Rewrite.cpp

[mlir-c] Add 1:N TypeConverter conversion and materialization bindings

Builds on the source/target materialization C bindings:

- Target materialization callbacks now receive `originalType` (split from the
  previously-shared source/target callback typedef), exposing a documented C++
  capability that was otherwise unreachable from C.
- 1:N type conversion: `mlirTypeConverterAdd1ToNConversion` plus an opaque
  results accumulator (`MlirTypeConverterConversionResults` /
  `mlirTypeConverterConversionResultsAppend`). A declining callback's appended
  types are rolled back so the driver's "try the next conversion" invariant
  holds.
- 1:N target materialization: `mlirTypeConverterAdd1ToNTargetMaterialization`,
  whose callback fills a caller-allocated `outputs` buffer. A success that
  leaves any output null is treated as a decline rather than handing the driver
  a null-containing result.
- `mlirConversionPatternRewriterReplaceOpWithMultiple` for 1:N value
  replacement, which can drive a source materialization with nInputs > 1.
- An optional `matchAndRewrite1ToN` callback on `MlirConversionPatternCallbacks`

    [9 lines not shown]
DeltaFile
+731-2mlir/test/CAPI/rewrite.c
+153-14mlir/lib/CAPI/Transforms/Rewrite.cpp
+103-5mlir/include/mlir-c/Rewrite.h
+987-213 files

LLVM/project 7fb9b32mlir/test/CAPI rewrite.c

[mlir-c] Tighten materialization test CHECKs to pin full module body

Use CHECK-NEXT to match the entire module body (module { ... }) rather
than loose CHECK lines, so the tests also assert the absence of any
stray ops -- e.g. a leftover builtin.unrealized_conversion_cast -- that
a loose CHECK would silently allow.
DeltaFile
+10-6mlir/test/CAPI/rewrite.c
+10-61 files

LLVM/project 4329818mlir-summer-school outline.md, mlir-summer-school/slides lecture1-passes.html lecture1-passes.md

update
DeltaFile
+2,608-0mlir-summer-school/slides/lecture1-passes.html
+997-77mlir-summer-school/slides/lecture1-passes.md
+182-3mlir-summer-school/slides/lecture3-canonicalization.md
+130-1mlir-summer-school/slides/lecture2-patterns.md
+98-0mlir-summer-school/slides/cheat-sheet.md
+37-4mlir-summer-school/outline.md
+4,052-851 files not shown
+4,052-857 files

LLVM/project 670e0a0llvm/test/Analysis/CostModel/AMDGPU is_fpclass.ll, llvm/test/Assembler print-formatted.ll

[IR] Use pretty printing for mask in is_fpclass (#207653)

The second argument of `llvm.is_fpclass` is a mask, where each bit
represents a floating-point class. Understanding the check that the call
makes in an IR dump requires additional effort. To simplify the
interpretation of IR dumps, a previously implemented pretty-printing
mechanism can be used:
https://github.com/llvm/llvm-project/commit/39e7712ac520ccfc43383b3e9d6ea8cf2958b8e3.
This commit implements this mechanism for printing the arguments of
`llvm.is_fpclass`.

This change also fixes the printing of argument names: if an argument
name is absent, it is simply not printed.
DeltaFile
+239-239llvm/test/Transforms/InstCombine/is_fpclass.ll
+177-60llvm/test/Transforms/SpeculativeExecution/spec-calls.ll
+69-69llvm/test/Transforms/InstCombine/create-class-from-logic-fcmp.ll
+64-64llvm/test/Analysis/CostModel/AMDGPU/is_fpclass.ll
+51-0llvm/test/Assembler/print-formatted.ll
+25-25llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll
+625-45741 files not shown
+871-69247 files

LLVM/project 31ddc7emlir/lib/Analysis/Presburger Matrix.cpp

[mlir][presburger] Avoid redundant zero-initialization in insertColumns (#199911)

When insertColumns does not trigger a physical reallocation, the inner
loop needlessly loops up to nReservedColumns - 1. This causes massive
redundant zero-writes on trailing columns that are already zero. This
patch truncates the inner loop start boundary to nColumns - 1, when the
reserved capacity is unchanged, optimizing the non-realloc path from
O(nRows * nReservedColumns) to O(nRows * nColumns).
DeltaFile
+4-4mlir/lib/Analysis/Presburger/Matrix.cpp
+4-41 files

LLVM/project a11e844clang/include/clang/Analysis/Analyses/LifetimeSafety Utils.h

[clang][LifetimeSafety] Short-circuit joins of identical immutable containers (#208908)
DeltaFile
+4-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Utils.h
+4-01 files

LLVM/project 9d5d883llvm/lib/Transforms/AggressiveInstCombine AggressiveInstCombine.cpp, llvm/test/Transforms/AggressiveInstCombine/X86 or-load.ll

[AggressiveInstCombine] Fix crash when folding consecutive loads into a type smaller than the combined load (#207229)
DeltaFile
+51-0llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
+8-3llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
+59-32 files

LLVM/project 847fe43llvm/lib/Target/AArch64 AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 preserve-all-large-csr.ll

[AArch64] Fix miscompilation due to integer overflow in immediate offset for stack store/load instructions with preserve_all (#207026)

Fix AArch64 framelowering bug exposed by a preserve_all function that
spills 30+ callee-saved registers: paired stp/ldp offsets overflows the
signed 7-bit immediate, fixed by spilling those registers as single
str/ldr instead.

AI Usage Disclosure
AI was used to help the: 
- investigation process 
- suggestion of solution  
- suggestion of comment wordings

Fixes #204564
DeltaFile
+225-0llvm/test/CodeGen/AArch64/preserve-all-large-csr.ll
+7-3llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+232-32 files

LLVM/project e490b43clang/lib/Rewrite HTMLRewrite.cpp, clang/lib/StaticAnalyzer/Core HTMLDiagnostics.cpp

[analyzer] Fix invalid HTML nesting for popups at end of line (#207793)

The static analyzer's HTML reports contain misnested tags whenever a
variable with a `variable_popup` is the last token on a source line.
`AddLineNumber` inserts the row-closing `</td></tr>` with `InsertTextBefore`, which
places it in front of text previously inserted at the same offset. As a result,
the popup's closing `</table></span>` tags and the arrow anchor `</span>`
tags end up outside the table row. HTML parsers (jsoup, pup) and validators
reject the file from that point on.

Before:

<span class='variable'>b</td></tr><table
class='variable_popup'>...</table></span></span></span>

<img width="786" height="414" alt="image"
src="https://github.com/user-attachments/assets/023461ad-73e4-424e-a4fb-42faf7a945f0"
/>


    [28 lines not shown]
DeltaFile
+23-0clang/test/Analysis/html_diagnostics/variable-popups-eol.c
+8-5clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp
+1-1clang/lib/Rewrite/HTMLRewrite.cpp
+32-63 files