DAG: Remove softPromoteHalfType
Remove the now unimplemented target hook and associated DAG machinery
for the old half legalization path.
Really fixes #97975
[clang-tidy] Speed up `readability-container-contains` (#175121)
This is currently one of our most expensive checks according to
`--enable-check-profile`. I measured using [the usual
setup](https://github.com/llvm/llvm-project/pull/174357#issue-3780188615):
```sh
hyperfine \
--shell=none \
--prepare='cmake --build build/release --target clang-tidy' \
'./build/release/bin/clang-tidy --checks=-*,readability-container-contains all_headers.cpp -header-filter=.* -system-headers -- -std=c++23 -fno-delayed-template-parsing'
```
First, the status quo:
```txt
Time (mean ± σ): 5.243 s ± 0.158 s [User: 4.964 s, System: 0.248 s]
Range (min … max): 5.133 s … 5.612 s 10 runs
```
This PR improves that in two independent commits. The first commit
changes the default traversal mode from `TK_AsIs` to
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ValueTracking: Extract isKnownIntegral out of AMDGPU (#177912)
Also do some basic conversions to use SimplifyQuery and add tests to
show assume works in a new context.
[RISC-V] Fix outliner candidate analysis (#177126)
When analyzing outliner candidates, there is no check that the tail-call
expansion register is live across the candidate call site. That can
result in a situation where the original function sets the volatile
register and uses it in the section that gets outlined. This of course
results in the use of the register receiving the incorrect value. Namely
the address of the outlined function since that is what the tail-call
sequence placed in the register.
[AMDGPU] Update patterns for v_cvt_flr and v_cvt_rpi (#177962)
Support GlobalISel and switch to checking `nnan` flag on instruction
instead of TargetOptions.
Instruction are renamed to v_cvt_floor and v_cvt_nearest on gfx11+
so add gfx11 tests as well.
[RISCV] Test Zibi relocation type (#177896)
Zibi beqi/bnei (#127463) use a modified B-type format (replace `rs2`
with `cimm`) and reuse the R_RISCV_BRANCH relocation type.
[HWASan] [MTE] use precise lifetimes even if they don't cover all exits
Previously, for performance reasons, we would only use precise lifetimes
if they cover all reachable exits. Now, if they do not, we use precise
lifetimes in addition to untagging at every exit that is not dominated
by them.
This is the behavior of ASan.
Reviewers: vitalybuka, pcc
Pull Request: https://github.com/llvm/llvm-project/pull/174875