LLVM/project a9257f7clang/docs ReleaseNotes.rst, clang/test/CodeGenCXX typeid-most-derived.cpp

address review comments
DeltaFile
+14-14clang/test/CodeGenCXX/typeid-most-derived.cpp
+3-0clang/docs/ReleaseNotes.rst
+17-142 files

LLVM/project bc2dedbclang/lib/AST ExprCXX.cpp, clang/test/CodeGenCXX typeid-most-derived.cpp

[clang][AST] Teach `CXXTypeidExpr::isMostDerived` to use `isEffectivelyFinal`
DeltaFile
+57-0clang/test/CodeGenCXX/typeid-most-derived.cpp
+5-0clang/lib/AST/ExprCXX.cpp
+62-02 files

LLVM/project b4e8f59mlir/lib/Conversion/MathToSPIRV MathToSPIRV.cpp, mlir/test/Conversion/MathToSPIRV math-to-opencl-spirv.mlir

[mlir][SPIR-V] Lower math.{exp2,log2,log10} operations (#196723)
DeltaFile
+8-12mlir/test/Conversion/MathToSPIRV/math-to-opencl-spirv.mlir
+3-2mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
+11-142 files

LLVM/project f325d13llvm/lib/Transforms/Vectorize LoopVectorize.cpp LoopVectorizationPlanner.cpp

[LV] Use isLegalMaskedLoadOrStore for interleaved accesses too (NFC) (#195243)

isLegalMaskedLoadOrStore is now the central place for querying target
capabilities for masked accesses. Access pattern legality checks are
hoisted outside of it.
DeltaFile
+4-6llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+0-4llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
+2-1llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+6-113 files

LLVM/project 743ee9blibcxx/docs/Status Cxx2cIssues.csvgb

remove empty csvgb file
DeltaFile
+0-0libcxx/docs/Status/Cxx2cIssues.csvgb
+0-01 files

LLVM/project de2d725llvm/include/llvm/ADT GenericUniformityInfo.h GenericUniformityImpl.h, llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp AMDGPUAtomicOptimizer.cpp

review: address suggestion
DeltaFile
+54-54llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+10-8llvm/include/llvm/ADT/GenericUniformityInfo.h
+4-4llvm/unittests/Target/AMDGPU/UniformityAnalysisTest.cpp
+4-4llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+3-3llvm/include/llvm/ADT/GenericUniformityImpl.h
+2-2llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
+77-7512 files not shown
+92-9018 files

LLVM/project 0982089utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[Bazel] Fixes 34502b0 (#196930)

This fixes 34502b0c7e076e658bd176030223029cd4402941.

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+2-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+2-01 files

LLVM/project 9ff5e12flang/lib/Semantics tools.cpp, flang/test/Semantics pure-function-result-pointer.f90 pure-host-associated-result.f90

[Flang][Semantics] Treat host/use-associated objects as externally visible. (#192892)

This patch fixes a false semantic error in Flang where function result
variables were incorrectly treated as externally visible in
pure-definability checks.

As a result, valid code assigning a pointer component of a function
result (as in flang/test/Semantics/pure-function-result-pointer.f90) was
rejected with “not definable in a pure subprogram.”

The fix updates _FindExternallyVisibleObject_ to treat function result
symbols as local, which matches Fortran semantics for function result
variables.
DeltaFile
+46-0flang/test/Semantics/pure-function-result-pointer.f90
+8-7flang/lib/Semantics/tools.cpp
+14-0flang/test/Semantics/pure-host-associated-result.f90
+68-73 files

LLVM/project fb69fcdflang/lib/Lower Bridge.cpp, flang/test/Lower/OpenMP copyin-derived-allocatable-comp.f90

[Flang][OpenMP] Fix COPYIN of derived types with allocatable components at -O3 (#196063)

COPYIN of threadprivate derived types with allocatable components
segfaults at -O3 because the OpenMP runtime zero-fills per-thread
storage, leaving allocatable component descriptors with invalid
metadata. This patch skips the copy on the master thread (where source
and destination alias) and uses temporary_lhs assignment on worker
threads so the runtime initializes descriptors before the deep copy.

Assisted-by: Claude Opus 4.6

Fixes :
[https://github.com/llvm/llvm-project/issues/196134](https://github.com/llvm/llvm-project/issues/196134)
Minimal reprducing test-case : 
```
program repro_o3_segv
  use omp_lib
  implicit none


    [64 lines not shown]
DeltaFile
+88-0flang/test/Lower/OpenMP/copyin-derived-allocatable-comp.f90
+36-0flang/lib/Lower/Bridge.cpp
+124-02 files

LLVM/project c3628c7llvm/lib/Analysis AliasAnalysis.cpp, llvm/test/Analysis/BasicAA atomics.ll

Reapply [AA] No synchronization effects for never-escaping identified local (#196923)

Relative to the previous attempt, this makes sure that the location does
not alias with the pointer operand first. If it aliases, then we need to
consider the direct ModRef effects of the instruction, not just the
synchronization effects.

-----

Fences and other synchronizing operations (such as atomic accesses
stronger than monotonic) are modelled as reading and writing all memory,
in order to enforce their implied ordering constraints.

Currently, this happens even for identified function locals that do not
escape. This patch excludes those objects.

Notably, we can not reason based on captures-before here, because the
synchronizing operation still has an effect even if the object only
escapes later.

    [2 lines not shown]
DeltaFile
+55-27llvm/lib/Analysis/AliasAnalysis.cpp
+50-22llvm/test/Analysis/BasicAA/atomics.ll
+0-8llvm/test/Transforms/DeadStoreElimination/fence.ll
+3-3llvm/test/Transforms/LICM/atomics.ll
+2-2llvm/test/Transforms/GVN/fence.ll
+1-1llvm/test/Analysis/MemorySSA/atomic-clobber.ll
+111-631 files not shown
+111-657 files

LLVM/project 6f08482llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll bf16-v4-instructions.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-reduction-fp.ll

Merge remote-tracking branch 'origin/main' into gbossu.isLegalMaskedLoadOrStore
DeltaFile
+7,584-740llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+6,873-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+4,174-657llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+2,969-1,160llvm/test/CodeGen/X86/vector-reduce-mul.ll
+3,979-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-writeback.s
+30,213-2,9243,847 files not shown
+149,503-45,7503,853 files

LLVM/project 64212c8llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

[NFC][SPIR-V] Use createVirtualRegister helper in selectSUCmp (#196905)

Resolve the existing TODO that asks us to do that
DeltaFile
+4-8llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+4-81 files

LLVM/project a5547d3cross-project-tests lit.cfg.py, cross-project-tests/debuginfo-tests/dexter/dex/test_script Script.py Nodes.py

[Dexter] Add basic structured script parsing (#193710)

See PSA:
https://discourse.llvm.org/t/psa-planned-changes-to-dexter/90402

This patch begins adding support for "structured scripts" to Dexter,
starting with some of the core classes and the ability to parse script
files. This patch does not add the ability to actually run scripts, or
any of the underlying functionality required to do so.

NB: This patch adds a dependency on PyYAML, which is specified in a new
requirements.txt file.
DeltaFile
+238-0cross-project-tests/debuginfo-tests/dexter/dex/test_script/Script.py
+204-0cross-project-tests/debuginfo-tests/dexter/dex/test_script/Nodes.py
+55-7cross-project-tests/lit.cfg.py
+31-3cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
+24-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/invalid-script-nodes.test
+23-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/parser/error-locations.test
+575-107 files not shown
+622-1413 files

LLVM/project 1e84219mlir/include/mlir/Analysis/DataFlow IntegerRangeAnalysis.h, mlir/lib/Analysis/DataFlow IntegerRangeAnalysis.cpp

[mlir][dataflow] IntRange: Replace yield-based widening with per-state lattice budget (#196616)

IntegerRangeAnalysis can hang on `scf.while` loops with dynamic bounds:
a
loop-carried range ratchets [0,0]->[0,1]->[0,2]->... by one per worklist
visit, requiring up to 2^31 iterations on i32. The new
`int-range-analysis-convergence.mlir` test reproduces this.

The ratchet lives at framework merge sites (region successors, callable
args) where the solver joins lattices via virtual
`Lattice::join(const AbstractSparseLattice &)`. The pre-existing
`isYieldedResult`/`isYieldedValue` heuristic in
`IntegerRangeAnalysis::visitOperation` doesn't help: it runs in the
transfer-function callback for inferrable-op results used by a
terminator,
not on the merge path. It is also harmful where it fires - slams to
maxRange on the *second* visit (after, say, [1,1]->[1,2]), so naturally
bounded accumulators (e.g. `arith.minsi`-clamped iter args) widen to
[INT_MIN, INT_MAX].

    [8 lines not shown]
DeltaFile
+91-0mlir/test/Dialect/Arith/int-range-analysis-convergence.mlir
+63-0mlir/test/Dialect/Arith/int-range-loop-iter-args.mlir
+25-34mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
+28-0mlir/include/mlir/Analysis/DataFlow/IntegerRangeAnalysis.h
+207-344 files

LLVM/project 34502b0mlir/include/mlir/Dialect/GPU/Pipelines Passes.h, mlir/lib RegisterAllPasses.cpp

[MLIR][GPU] Add gpu-lower-to-rocdl-pipeline meta-pass (#196751)

Add `gpu-lower-to-rocdl-pipeline` meta-pass which lowers common MLIR
dialects (gpu/arith/scf/vector) to binary, similar to the existing
XeVM/NVVM pipelines.
DeltaFile
+136-0mlir/lib/Dialect/GPU/Pipelines/GPUToROCDLPipeline.cpp
+69-0mlir/test/Integration/GPU/ROCM/gpu-lower-to-rocdl-pipeline.mlir
+60-0mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
+5-0mlir/lib/Dialect/GPU/Pipelines/CMakeLists.txt
+1-0mlir/lib/RegisterAllPasses.cpp
+271-05 files

LLVM/project 02177f3llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp SelectionDAGBuilder.h

[SelectionDAG] Emit `AssertZext` for function argument range attributes
DeltaFile
+6-1llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+2-0llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
+8-12 files

LLVM/project 67d7ee6llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp, llvm/test/CodeGen/X86 argument-range-attr.ll

address review comment
DeltaFile
+11-0llvm/test/CodeGen/X86/argument-range-attr.ll
+1-1llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+12-12 files

LLVM/project a64d504llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp SelectionDAGBuilder.cpp

[SelectionDAG] Drop unnecessary lower bound check in lowerRangeToAssertZExt
DeltaFile
+4-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+0-4llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+4-42 files

LLVM/project 0291fcdllvm/test/CodeGen/AMDGPU bit-op-reduce-width-known-bits.ll, llvm/test/CodeGen/X86 argument-range-attr.ll

update test
DeltaFile
+12-14llvm/test/CodeGen/X86/argument-range-attr.ll
+3-3llvm/test/CodeGen/AMDGPU/bit-op-reduce-width-known-bits.ll
+15-172 files

LLVM/project 3855bballvm/test/CodeGen/X86 argument-range-attr.ll

add test
DeltaFile
+123-0llvm/test/CodeGen/X86/argument-range-attr.ll
+123-01 files

LLVM/project 310084allvm/test/CodeGen/X86 call-range-attr.ll

update test

Co-Authored-By: nikic <github at npopov.com>
DeltaFile
+2-3llvm/test/CodeGen/X86/call-range-attr.ll
+2-31 files

LLVM/project c746a44llvm/test/CodeGen/X86 call-range-attr.ll

add test
DeltaFile
+74-0llvm/test/CodeGen/X86/call-range-attr.ll
+74-01 files

LLVM/project 74028a2llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 abds.ll

[DAGCombiner] Fix abs(add) to abdu miscompile in foldABSToABD
DeltaFile
+9-9llvm/test/CodeGen/X86/abds.ll
+1-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+10-122 files

LLVM/project b8d508dllvm/test/CodeGen/X86 abds.ll

test
DeltaFile
+26-0llvm/test/CodeGen/X86/abds.ll
+26-01 files

LLVM/project 28929e1mlir/include/mlir/IR BuiltinDialectBytecode.td BytecodeBase.td, mlir/test/Dialect/Builtin/Bytecode types.mlir

[mlirbc] Add missing encoding for float types

Making it easy to disable for folks integrating. This indirection will be
removed in the next release.
DeltaFile
+43-1mlir/include/mlir/IR/BuiltinDialectBytecode.td
+26-2mlir/test/Dialect/Builtin/Bytecode/types.mlir
+4-0mlir/include/mlir/IR/BytecodeBase.td
+73-33 files

LLVM/project 5c8c7baclang/lib/AST/ByteCode Interp.h Compiler.cpp, clang/test/AST/ByteCode new-delete.cpp

[clang][bytecode] Check destination size when initializing from an array initlist (#196916)
DeltaFile
+20-0clang/test/AST/ByteCode/new-delete.cpp
+16-0clang/lib/AST/ByteCode/Interp.h
+4-4clang/lib/AST/ByteCode/Compiler.cpp
+1-0clang/lib/AST/ByteCode/Opcodes.td
+41-44 files

LLVM/project 7218857mlir/lib CMakeLists.txt

[MLIR] Make MLIRRegisterAllPasses depend on mlir-headers (#196913)

RegisterAllPasses.cpp pulls in dialect Passes.h / generated Passes.h.inc
via TableGen targets that are tied to mlir-headers, but add_mlir_library
only adds mlir-generic-headers by default, so this TU can compile before
those generated headers are ready and registerAllPasses() can miss
passes (e.g. sporadic mlir-opt --help gaps). Add DEPENDS mlir-headers to
MLIRRegisterAllPasses in mlir/lib/CMakeLists.txt so it waits for those
outputs. Verified with ninja mlir-opt and mlir-opt --help | grep -E
'nvvm-attach-target|rocdl-attach-target' (or similar stable upstream
passes in your tree).

Signed-off-by: Fujun Han <fujun.han at iluvatar.com>
Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+6-0mlir/lib/CMakeLists.txt
+6-01 files

LLVM/project 2c0d0e1llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/ARM atomic-load-store.ll

[AtomicExpand] Add bitcasts when expanding load atomic vector (#148900)

AtomicExpand fails for aligned `load atomic <n x T>` because it
does not find a compatible library call. This change adds appropriate
bitcasts so that the call can be lowered. It also adds support for
128 bit lowering in tablegen to support SSE/AVX.
DeltaFile
+226-61llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
+90-1llvm/test/CodeGen/X86/atomic-load-store.ll
+51-0llvm/test/CodeGen/ARM/atomic-load-store.ll
+15-4llvm/lib/CodeGen/AtomicExpandPass.cpp
+382-664 files

LLVM/project 6f31d41clang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeSafety.h, clang/lib/Sema SemaLifetimeSafety.h

[LifetimeSafety] Impove `[[clang::lifetimbound]]` violation diagnostics (#196824)

Reports lifetimebound verification diagnostics at the attribute
location, so declarations with the attribute now point at the
declaration rather than only at the function definition.
DeltaFile
+3-2clang/lib/Sema/SemaLifetimeSafety.h
+2-3clang/test/Sema/warn-lifetime-safety-lifetimebound.cpp
+2-1clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
+7-63 files

LLVM/project 9b3f3b9llvm/cmake/modules AddLLVM.cmake

[CMake] Don't pass --gc-sections to MSVC-style linkers when using clang's MSVC mode (#196393)

The PR concerns Clang with a GNU-like command-line interface on Windows.

The LLVM linker on Windows (lld-link.exe) does not understand the
--gc-sections option. The PR excludes that option when compiling on
Windows to remove a linker warning (and an error if warnings are treated
as such).
DeltaFile
+1-1llvm/cmake/modules/AddLLVM.cmake
+1-11 files