LLVM/project 9f53175llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV][P-ext] Support packed bswap/bitreverse. (#200448)

We can implement these using combinations of rev, rev8, and ppairoe.*.

Rename REV16->REV16_RV64. A hypothetical REV16 on RV32 would have a
different encoding like REV and REV8.

Long term we should probably custom lower these instead of having
complex isel patterns. That would allow additional optimizations. But I
think the isel patterns are fine as a starting point.
DeltaFile
+17-146llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+14-45llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+39-1llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+6-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+76-1934 files

LLVM/project 8858dddclang/include/clang/Basic AttrDocs.td Attr.td

[Clang][Docs] Documented sentinel attribute (#196088)

The documentation of the sentinel attribute was missing, this PR
documents the behavior of the sentinel attribute.
DeltaFile
+64-2clang/include/clang/Basic/AttrDocs.td
+1-1clang/include/clang/Basic/Attr.td
+65-32 files

LLVM/project 6530683clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-across.c

[CIR] Maximum across vector (IEEE754) (#199779)

Part of https://github.com/llvm/llvm-project/issues/185382

Move the test cases to

[intrinsics.c](https://github.com/llvm/llvmproject/pull/clang/test/CodeGen/AArch64/neon/intrinsics.c)
Removed the test cases from

[neon-intrinsics.c](https://github.com/llvm/llvmproject/pull/clang/test/CodeGen/AArch64/neon/intrinsics.c)

Removed [neon-across.c](clang/test/CodeGen/AArch64/neon-across.c)

---------

Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
DeltaFile
+35-0clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-20clang/test/CodeGen/AArch64/neon-intrinsics.c
+0-18clang/test/CodeGen/AArch64/neon-across.c
+3-0clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+38-384 files

LLVM/project ef86984utils/bazel MODULE.bazel.lock extensions.bzl, utils/bazel/third_party_build zlib-ng.BUILD zstd.BUILD

[Bazel]: Pull from Bazel-Central-Registry for third party deps. (#197316)

The majority of these dependencies are available in the
[Bazel-Central-Registry](https://github.com/bazelbuild/bazel-central-registry)
(BCR) and to improve build performance for bzlmod users, llvm-project
should pull from the BCR to consolidate targets.
DeltaFile
+34-83utils/bazel/MODULE.bazel.lock
+0-105utils/bazel/third_party_build/zlib-ng.BUILD
+16-70utils/bazel/extensions.bzl
+0-44utils/bazel/third_party_build/zstd.BUILD
+0-43utils/bazel/third_party_build/pfm.BUILD
+0-38utils/bazel/third_party_build/nanobind.BUILD
+50-38312 files not shown
+91-55718 files

LLVM/project 1fe66fcllvm/include/llvm/Target/GlobalISel Combine.td, llvm/test/CodeGen/AMDGPU/GlobalISel prelegalizer-combiner-redundant-bitcast.mir

[GlobalISel] Add bitcast chain combine (#200694)
DeltaFile
+8-1llvm/include/llvm/Target/GlobalISel/Combine.td
+3-4llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir
+11-52 files

LLVM/project 9d3f50allvm/test/CodeGen/X86 machine-block-hash.mir

[X86] Fix MachineBlockInfo hash for machine-block-hash.mir (#201039)

I looked at llvm/include/llvm/CodeGen/MachineBlockHashInfo.h,
BlendedBlockHash function and rewrote failing test.

---------

Co-authored-by: mattarde <mattarde at intel.com>
DeltaFile
+16-6llvm/test/CodeGen/X86/machine-block-hash.mir
+16-61 files

LLVM/project 2e9f45aclang/include/clang/Driver Driver.h, clang/lib/Driver Driver.cpp

[clang][driver] Rename ClangExecutable and getClangProgramPath (NFC) (#200814)

This patch is to rename ClangExecutable to DriverExecutable and 
getClangProgramPath to getDriverProgramPath. This makes the 
name more neutral and less confusing when used in flang.
DeltaFile
+5-7clang/include/clang/Driver/Driver.h
+6-6clang/lib/Driver/Driver.cpp
+5-5clang/lib/Driver/ToolChains/Clang.cpp
+4-4clang/unittests/Driver/ToolChainTest.cpp
+2-2clang/lib/Driver/ToolChains/CommonArgs.cpp
+1-2clang/lib/Driver/ToolChains/AIX.cpp
+23-266 files not shown
+29-3212 files

LLVM/project 6e58021llvm/include/llvm/CodeGen ScheduleDAGInstrs.h, llvm/lib/CodeGen ScheduleDAGInstrs.cpp

[MachineScheduler] Rework dag-maps-huge-region (#200945)

For compile time/memory reasons, dag-maps-huge-region is the number of
memory instructions at which we create a barrier and reset maps.
Previously we'd get to dag-maps-huge-region number of instructions, then
add a barrier in the middle of the current set of instructions, and
continue processing the second half of remaining instructions.

With this change, now we simply add a barrier every time we reach
dag-maps-huge-region number of memory instructions, and blow away all
previous instructions.

So now instead of waiting until we get to 1000 memory operations before
creating a barrier for 500 of them, we do it at 500 and do it for all
500.

With this change, -dag-maps-huge-region=500 still has
addChainDependencies() taking up over half of the codegen pipeline in
some cases I looked at, but it's much better than the previous 90%.
DeltaFile
+3,563-3,543llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+921-907llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+401-399llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+31-116llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+60-0llvm/test/CodeGen/AArch64/dag-maps-huge-region.ll
+2-13llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
+4,978-4,9781 files not shown
+4,980-4,9807 files

LLVM/project 50347f5cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts lit.local.cfg

[Dexter][NFC] Mark script tests unsupported for non-lldb debuggers (#201596)

The recently-added structured script feature currently relies on
DAP-based debuggers, of which the only one currently supported by Dexter
is LLDB. In order to prevent the tests that depend on this feature from
running for other debuggers, we require LLDB for the script test
directory.
DeltaFile
+3-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/lit.local.cfg
+3-01 files

LLVM/project 4046fd0llvm/lib/Analysis ModuleSummaryAnalysis.cpp, llvm/lib/Transforms/IPO FunctionImport.cpp

[ThinLTO][AIX] Teach ModuleSummaryAnalysis to include globals
referenced via !implicit.ref metadata as explicit reference edges in the ThinLTO
module summary via a new helper findImplicitRefEdges. Add imported
implicit ref strings (available_externally GVs) to llvm.compiler.used during thinLTO interaction with pragma comment copyright.
DeltaFile
+60-38llvm/test/LTO/PowerPC/pragma-comment-copyright-lto.ll
+67-0llvm/test/LTO/PowerPC/pragma-comment-copyright-thinlto.ll
+39-0llvm/test/Analysis/ModuleSummaryAnalysis/implicit-ref-edges.ll
+34-0llvm/lib/Transforms/IPO/FunctionImport.cpp
+17-11llvm/lib/Transforms/Utils/LowerCommentStringPass.cpp
+24-0llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
+241-492 files not shown
+254-598 files

LLVM/project 9fbb941mlir/lib/Conversion/FuncToEmitC FuncToEmitC.cpp, mlir/test/Conversion/FuncToEmitC func-to-emitc-failed.mlir

[mlir][Func][EmitC] Bail-out to avoid errors from MemRef array conversions (#198583)

Update FuncToEmitC to bail-out before creating invalid EmitC ops for
unsupported cases.

FuncToEmitC now rejects functions, calls, and returns whose converted
result type is `emitc.array`, instead of relying on later `emitc.func`,
`emitc.call`, or `emitc.return` verifier failures.

This does not add support for returning memrefs from functions. It only
makes the existing limitation explicit at the conversion boundary.

## Tests

Added negative tests for the standalone conversion pass. This pass marks
their source ops illegal, so when a pattern bails-out the pass reports a
legalization failure. This is the expected behavior and documents the
unsupported cases directly.


    [5 lines not shown]
DeltaFile
+93-0mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
+18-0mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
+111-02 files

LLVM/project 2172884clang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Reformat classes to make more sense, and other CR updates
DeltaFile
+27-27llvm/lib/Target/AArch64/SVEInstrFormats.td
+45-3llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+22-23llvm/lib/Target/AArch64/SMEInstrFormats.td
+26-18llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+32-8clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+2-2clang/include/clang/Basic/arm_sve.td
+154-813 files not shown
+156-859 files

LLVM/project 040070dclang/test/Sema/AArch64 arm_sve_streaming_only_sme_AND_sme2p3.c arm_sve_feature_dependent_sve_AND_sve2p3___sme_AND_LP_sve2p3_OR_sme2p3_RP.c

fixup! Run `clang/utils/aarch64_builtins_test_generator.py`
DeltaFile
+118-0clang/test/Sema/AArch64/arm_sve_streaming_only_sme_AND_sme2p3.c
+77-0clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_sve2p3___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
+62-0clang/test/Sema/AArch64/arm_sve_non_streaming_only_sve_AND_sve2p3.c
+56-0clang/test/Sema/AArch64/arm_sme_streaming_only_sme_AND_sme2p3.c
+313-04 files

LLVM/project 5666fd2llvm/include/llvm/IR IntrinsicsAArch64.td, llvm/lib/Target/AArch64 SVEInstrFormats.td AArch64ISelDAGToDAG.cpp

fixup! Amend after PR comments
DeltaFile
+11-8llvm/include/llvm/IR/IntrinsicsAArch64.td
+4-4llvm/lib/Target/AArch64/SVEInstrFormats.td
+2-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+1-1llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+18-164 files

LLVM/project 5a8f987llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Don't modify SelectMultiVectorLutiLane
DeltaFile
+38-45llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+38-451 files

LLVM/project 653a5feclang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_luti6.c

fixup! Adjust definitions after ACLE updates from @rockdreamer
DeltaFile
+12-12clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+4-4clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target.c
+1-1clang/include/clang/Basic/arm_sve.td
+17-173 files

LLVM/project 3b3cbfcclang/include/clang/Basic arm_sve.td, clang/test/Sema/aarch64-sme2p3-intrinsics acle_sme2p3_target_lane.c acle_sme2p3_target.c

fixup! Address more PR comments
DeltaFile
+15-9clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+0-16clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_target_lane.c
+5-5llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+3-3clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_target.c
+1-4llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+4-0clang/include/clang/Basic/arm_sve.td
+28-371 files not shown
+28-387 files

LLVM/project 20435acclang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Adjust after ACLE changes to svluti6_lane_s16_x4
DeltaFile
+48-4clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+15-6llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+12-4llvm/lib/Target/AArch64/SMEInstrFormats.td
+8-8clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_imm.c
+4-0llvm/include/llvm/IR/IntrinsicsAArch64.td
+2-1clang/include/clang/Basic/arm_sve.td
+89-232 files not shown
+92-248 files

LLVM/project 834a852clang/include/clang/Basic arm_sve.td arm_sme.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Adjust `def`s and split out tests
DeltaFile
+0-158clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+138-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6_lane_x2.c
+5-5clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+0-4clang/include/clang/Basic/arm_sve.td
+1-0clang/include/clang/Basic/arm_sme.td
+144-1675 files

LLVM/project 21c78dfclang/test/Sema/aarch64-sve2p3-intrinsics acle_sve2p3_target_lane.c acle_sve2p3_target.c, llvm/lib/Target/AArch64 AArch64InstrInfo.td

fixup! Move tests
DeltaFile
+0-54clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+38-3clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target.c
+1-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+39-573 files

LLVM/project 5bf01f2clang/include/clang/Basic arm_sme.td arm_sve.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Fix more PR comments
DeltaFile
+10-13llvm/include/llvm/IR/IntrinsicsAArch64.td
+4-4clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+2-2clang/include/clang/Basic/arm_sme.td
+1-1clang/include/clang/Basic/arm_sve.td
+17-204 files

LLVM/project 4790ca2clang/test/Sema/aarch64-sve2p3-intrinsics acle_sve2p3_target_lane.c acle_sve2p3_imm.cpp, llvm/test/CodeGen/AArch64 sve2p3-intrinsics-luti6.ll

fixup! Add some more _bf16 tests
DeltaFile
+27-0clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+11-0llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+3-0clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_imm.cpp
+41-03 files

LLVM/project 4808ff3clang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_luti6.c

fixup! Fix final PR comments for now
DeltaFile
+118-8clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+5-0llvm/lib/Target/AArch64/SVEInstrFormats.td
+1-1clang/include/clang/Basic/arm_sve.td
+1-0llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+125-94 files

LLVM/project c3cbc46llvm/include/llvm/IR IntrinsicsAArch64.td, llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Fix PR comments
DeltaFile
+24-70llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+19-55llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+17-36llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+15-33llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+0-1llvm/include/llvm/IR/IntrinsicsAArch64.td
+75-1955 files

LLVM/project bc3a1dbclang/lib/Sema SemaARM.cpp, clang/test/Sema/aarch64-sve2p3-intrinsics acle_sve2p3_target_lane.c

fixup! More small PR fixes
DeltaFile
+0-44llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+6-9llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+5-8llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+8-1clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+1-4llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+1-2clang/lib/Sema/SemaARM.cpp
+21-682 files not shown
+23-698 files

LLVM/project 4b6dbd0clang/include/clang/Basic arm_sve.td, clang/lib/Sema SemaARM.cpp

fixup! Address more PR comments
DeltaFile
+3-20clang/lib/Sema/SemaARM.cpp
+0-9clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+4-1clang/include/clang/Basic/arm_sve.td
+1-1clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_target_lane.c
+8-314 files

LLVM/project d9702c3clang/lib/Sema SemaARM.cpp, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Address more PR comments
DeltaFile
+21-3clang/lib/Sema/SemaARM.cpp
+12-4clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+4-11llvm/include/llvm/IR/IntrinsicsAArch64.td
+6-6clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+9-0clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+2-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+54-274 files not shown
+59-3310 files

LLVM/project 6bf85c2llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Add overloaded AArch64DAGToDAGISel::EmitMultiVectorLutiLane() for reuse
DeltaFile
+39-50llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+39-501 files

LLVM/project 5b9078bllvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64SVEInstrInfo.td

fixup! Address PR comments
DeltaFile
+1-10llvm/lib/Target/AArch64/AArch64InstrInfo.td
+2-2llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+3-122 files

LLVM/project aa3ecdallvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Reuse SelectMultiVectorLuti()
DeltaFile
+6-36llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+6-361 files