LLVM/project 6156447llvm/utils/lit/lit util.py

lit: Handle permission errors in runCommandCached (#208508)

The downstream swift CI is getting PermissionError instead of
FileNotFoundError for a [couple of
tests](https://ci.swift.org/job/pr-apple-llvm-project-llvm-linux/1819/consoleFull#-556494529d6fdb6cb-f376-4f2e-8bce-d31c7304698b).
I have no idea what is wrong with our CI, but we should be handling
those errors the same way anyway.

Also fix documentation typo.
DeltaFile
+2-2llvm/utils/lit/lit/util.py
+2-21 files

LLVM/project cfd73adllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 vector-shuffle-256-v16.ll

[X86] lowerShuffleAsDecomposedShuffleMerge - prefer BLEND(X,SHUFFLE(Y)) over UNPCKL(SHUFFLE(X), SHUFFLE(Y)) (#208503)

If blends are cheap and at least one input is a noop - perform a
permute+blend
DeltaFile
+8-16llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
+10-4llvm/lib/Target/X86/X86ISelLowering.cpp
+18-202 files

LLVM/project ef8d490clang/docs UsersManual.md, llvm/docs LangRef.rst LangRef.md

Rebase

Created using spr 1.3.7
DeltaFile
+17,697-18,587llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+0-33,233llvm/docs/LangRef.rst
+30,305-0llvm/docs/LangRef.md
+8,882-7,730llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
+4,011-4,454llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+6,460-0clang/docs/UsersManual.md
+67,355-64,0041,845 files not shown
+142,907-119,3441,851 files

LLVM/project 00cd656llvm/utils/gn/secondary/clang/lib/Headers BUILD.gn, llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses BUILD.gn

[gn build] Port commits (#208516)

01846f68e5ae
39dcb0ff91b3
5275ff2efaa9
6560fef7724b
cc048e80b670
eba2fde4d540
DeltaFile
+4-1llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/SourceTransformation/BUILD.gn
+3-0llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
+2-0llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
+1-0llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/lib/Target/X86/MCTargetDesc/BUILD.gn
+1-0llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
+12-11 files not shown
+12-27 files

LLVM/project 33b64a6clang/docs UsersManual.md, llvm/docs LangRef.rst LangRef.md

Rebase

Created using spr 1.3.7
DeltaFile
+17,697-18,587llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+0-33,233llvm/docs/LangRef.rst
+30,305-0llvm/docs/LangRef.md
+8,882-7,730llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
+4,011-4,454llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+6,460-0clang/docs/UsersManual.md
+67,355-64,0041,845 files not shown
+142,909-119,3451,851 files

LLVM/project 5deba9cclang/include/clang/Basic TargetInfo.h, clang/lib/AST ASTContext.cpp

convert to exec-charset inside getPredefinedStringLiteralFromCache, test __builtin_FILE()
DeltaFile
+10-0clang/lib/AST/ASTContext.cpp
+4-0clang/test/CodeGen/systemz-charset.cpp
+2-1clang/lib/Lex/TextEncoding.cpp
+3-0clang/lib/Basic/TargetInfo.cpp
+2-0clang/include/clang/Basic/TargetInfo.h
+21-15 files

LLVM/project 47f9e9aclang/include/clang/Options Options.td, clang/lib/Driver/ToolChains Clang.cpp

address comments
DeltaFile
+3-3clang/include/clang/Options/Options.td
+1-1clang/lib/Driver/ToolChains/Clang.cpp
+4-42 files

LLVM/project 40746dfclang/lib/AST ASTContext.cpp, clang/lib/Lex TextEncoding.cpp

Convert the key before cache lookup to prevent encoding differences
DeltaFile
+9-9clang/lib/AST/ASTContext.cpp
+1-1clang/lib/Lex/TextEncoding.cpp
+10-102 files

LLVM/project 9b973dbclang/docs LanguageExtensions.md, clang/include/clang/Options Options.td

Enable driver changes for fexec-charset
DeltaFile
+14-6clang/lib/Driver/ToolChains/Clang.cpp
+14-4clang/include/clang/Options/Options.td
+11-3clang/test/Driver/clang_f_opts.c
+10-0llvm/lib/Support/TextEncoding.cpp
+4-3clang/test/Driver/cl-options.c
+3-3clang/docs/LanguageExtensions.md
+56-193 files not shown
+60-199 files

LLVM/project efe6fe2clang/lib/AST PrintfFormatString.cpp FormatString.cpp, clang/lib/Sema SemaChecking.cpp

Add format string handling
DeltaFile
+58-31clang/lib/AST/PrintfFormatString.cpp
+46-40clang/lib/AST/FormatString.cpp
+33-21clang/lib/Sema/SemaChecking.cpp
+25-11clang/lib/AST/FormatStringParsing.h
+15-8clang/lib/AST/ScanfFormatString.cpp
+19-0llvm/lib/Support/TextEncoding.cpp
+196-1113 files not shown
+215-1179 files

LLVM/project 6718971clang/lib/Sema SemaChecking.cpp

do not convert character by character
DeltaFile
+6-4clang/lib/Sema/SemaChecking.cpp
+6-41 files

LLVM/project 15bb83cclang/include/clang/Lex TextEncoding.h, clang/lib/Lex TextEncoding.cpp

remove ParserConversionAction, add paramter to ParseStringLiteralExpression instead, add conversion to SystemCharset then back to UTF8 to handle escape sequences in system encoding
DeltaFile
+31-6clang/lib/Lex/TextEncoding.cpp
+9-2clang/include/clang/Lex/TextEncoding.h
+3-5clang/lib/Parse/Parser.cpp
+8-0clang/lib/Sema/SemaStmtAsm.cpp
+3-3clang/test/CodeGen/systemz-charset.c
+3-3clang/lib/Parse/ParseExpr.cpp
+57-194 files not shown
+67-2410 files

LLVM/project 8a5e2c2llvm/lib/Transforms/Vectorize VPlanVerifier.cpp

[VPlan] Fold Plan variable in single user in verifyLastActivLane (NFC) (#208505)

In release builds, the variable is now unused. Sink and inline into
single user to silence warning.
DeltaFile
+1-2llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
+1-21 files

LLVM/project 5e58aaclibc/cmake/modules prepare_libc_gpu_build.cmake

[libc] Remove CUDA Toolkit dependency for NVPTX build (#208497)

This was problematic because these CMake headers were never intended to
be used from a GPU target. We had to hack around this to suppress
threads, but all this is used for is getting the default CUDA path, so
just do this directly.
DeltaFile
+13-7libc/cmake/modules/prepare_libc_gpu_build.cmake
+13-71 files

LLVM/project ee9a3a2llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 externally-used-copyables.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+552-21llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+58-58llvm/test/Transforms/SLPVectorizer/AArch64/externally-used-copyables.ll
+18-35llvm/test/Transforms/SLPVectorizer/X86/reassociate-ops.ll
+13-13llvm/test/Transforms/SLPVectorizer/X86/bv-shuffle-mask.ll
+9-9llvm/test/Transforms/SLPVectorizer/X86/cast-operand-extracted.ll
+6-8llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
+656-1446 files

LLVM/project 8cc0cd8llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 vec3-reorder-reshuffle.ll

[SLP] Support FAdd/FSub as interchangeable instructions

fadd(x, c) and fsub(x, c) are interchangeable via fadd(x, -c), so treat
them like the existing Add/Sub/Mul/Shl/AShr/And/Or/Xor interchange in
BinOpSameOpcodeHelper. This lets a mixed fadd/fsub bundle vectorize as
a single op instead of needing an alt-shuffle/split node.

Restrict the interchange to a constant RHS. A constant LHS (e.g.
"0.0 - x") cannot be moved to the other opcode without also swapping
the variable operand, which would misalign it against lanes that keep
their native opcode and produce a node too expensive to vectorize.

Reviewers: hiraditya, bababuck, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/208002
DeltaFile
+111-71llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+21-24llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
+6-30llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
+13-13llvm/test/Transforms/SLPVectorizer/RISCV/unordered-loads-operands.ll
+10-14llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
+7-14llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
+168-1667 files not shown
+190-19713 files

LLVM/project ec2041allvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 non-power-of-2-with-adjusted-gathers.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+3-19llvm/test/Transforms/SLPVectorizer/X86/reduction-root-multiuse-same-opcode.ll
+10-10llvm/test/Transforms/SLPVectorizer/AArch64/non-power-of-2-with-adjusted-gathers.ll
+11-3llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-5llvm/test/Transforms/SLPVectorizer/X86/control-deps-schedule-data-recalculate.ll
+28-374 files

LLVM/project d640060llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

[AMDGPU][test] Split slow lit tests for better parallel lit throughput (NFC)

Split the slowest AMDGPU CodeGen tests into independent lit units so
llvm-lit can distribute work across available host cores.
DeltaFile
+0-231,405llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+0-95,794llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+83,634-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.si.ll
+59,107-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.gfx11.ll
+0-52,058llvm/test/CodeGen/AMDGPU/bf16.ll
+49,302-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.vi.ll
+192,043-379,25731 files not shown
+426,912-395,29537 files

LLVM/project c526d45libcxx/test/benchmarks/algorithms/nonmodifying mismatch.bench.cpp equal.bench.cpp

[libc++] Remove benchmark::DoNotOptimize from custom predicates in benchmarks (#208412)

The point of the custom predicates is to defeat any detection of special
predicates within the library. There isn't much point in adding
`benchmark::DoNotOptimize` on top of that. It can actually hurt, since
it may hide performance changes due to how much/which information we
provide to the compiler.
DeltaFile
+2-10libcxx/test/benchmarks/algorithms/nonmodifying/mismatch.bench.cpp
+2-10libcxx/test/benchmarks/algorithms/nonmodifying/equal.bench.cpp
+2-10libcxx/test/benchmarks/algorithms/nonmodifying/is_permutation.bench.cpp
+2-8libcxx/test/benchmarks/algorithms/nonmodifying/find_last.bench.cpp
+1-5libcxx/test/benchmarks/algorithms/nonmodifying/adjacent_find.bench.cpp
+1-5libcxx/test/benchmarks/algorithms/nonmodifying/ends_with.bench.cpp
+10-4816 files not shown
+26-12322 files

LLVM/project 06499c9llvm/test/Transforms/SLPVectorizer/X86 reduction-root-multiuse-same-opcode.ll

[SLP][NFC] Add regressed vectorization of reduced values, NFC

Reported in https://github.com/llvm/llvm-project/pull/185320#issuecomment-4925949343

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/208504
DeltaFile
+65-0llvm/test/Transforms/SLPVectorizer/X86/reduction-root-multiuse-same-opcode.ll
+65-01 files

LLVM/project 0919721flang/lib/Optimizer/Builder IntrinsicCall.cpp, flang/lib/Optimizer/Transforms MIFOpConversion.cpp

[flang][MIF] Fix COSHAPE and THIS_IMAGE(coarray) type mismatch for non-i64 kinds (#208429)

Both COSHAPE and THIS_IMAGE(coarray [,team]) return integer arrays whose
element type is determined by the Fortran KIND argument (default: i32).
The lowering code was ignoring resultType in both cases and hardcoding
i64, which caused downstream type mismatches:

- COSHAPE: SimplifyHLFIRIntrinsics assertion in PRODUCT(COSHAPE(y)) when
the product input type (i64) did not match the declared result type
(i32).
- THIS_IMAGE(coarray): MLIR verifier error on arith.cmpi with mismatched
operand types (i64 vs i32) in comparisons like THIS_IMAGE(a) /=
[5,0,-7].

Fix: derive eleTy from resultType in both genCoshape and genThisImage
and propagate it into the mif.* op's result type. In MIFOpConversion,
extract a shared convertI64SeqToEleTy helper that post-converts the i64
scratch buffer written by the PRIF runtime into the
declared-element-type buffer when the two types differ. Both

    [2 lines not shown]
DeltaFile
+54-0flang/test/Fir/MIF/coshape.mlir
+54-0flang/test/Fir/MIF/this_image.mlir
+46-0flang/lib/Optimizer/Transforms/MIFOpConversion.cpp
+15-6flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+9-2flang/test/Lower/MIF/coshape.f90
+1-1flang/test/Lower/MIF/this_image.f90
+179-96 files

LLVM/project 4e3a68flibcxx/docs/Status Cxx26Issues.csv

[libc++] Mark LWG4276 as complete (#208273)

We already harden std::array<T, 0>::front() and back(), and we have
tests for it.

Closes #171330
DeltaFile
+1-1libcxx/docs/Status/Cxx26Issues.csv
+1-11 files

LLVM/project 2a9f19flibcxx/docs/Status Cxx26Issues.csv, libcxx/test/std/atomics/atomics.types.generic standard_layout.compile.pass.cpp

[libc++] Add tests for LWG3949 and mark it as done (#208272)

Closes #105301
DeltaFile
+1-1libcxx/docs/Status/Cxx26Issues.csv
+1-0libcxx/test/std/atomics/atomics.types.generic/standard_layout.compile.pass.cpp
+1-0libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/dtor.pass.cpp
+3-13 files

LLVM/project 5a2064dllvm/include/llvm/IR ModuleSummaryIndex.h, llvm/lib/CodeGen/LiveDebugValues InstrRefBasedImpl.h InstrRefBasedImpl.cpp

Revert "[LLVM][NFC] Remove some global constructors" (#208494)

Breaks some buildbots with gcc. Looks like constexpr member definitions
need an extern for old gcc otherwise they get local linkage...

Reverts llvm/llvm-project#208407
DeltaFile
+13-11llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.h
+9-9llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
+9-7llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
+11-4llvm/include/llvm/IR/ModuleSummaryIndex.h
+7-7llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
+10-3llvm/lib/DebugInfo/CodeView/ContinuationRecordBuilder.cpp
+59-4127 files not shown
+123-8233 files

LLVM/project 3a8d8aclld/test/wasm cooperative-threading.s, lld/wasm Writer.cpp

[WebAssembly] Don't use passive segments for bss in coop threads (#208284)

This commit is an update to `wasm-ld`'s behavior with bss data segments
with `--cooperative-threading`. Previously bss segments were forced to
become passive data segments meaning that a `start` function was emitted
with a `memory.fill` that set the required region of memory to 0. This
isn't required for coop threads though because the module is only
instantiated once and the default pattern for memory is 0, so only
special treatment of TLS segments are required.
DeltaFile
+35-0lld/test/wasm/cooperative-threading.s
+4-7lld/wasm/Writer.cpp
+39-72 files

LLVM/project c7cecd8libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers assign_range.pass.cpp

[libc++] Fix assign_range test for forward_list (#208283)

That test was checking prepend_range instead of assign_range due to a
copy-paste error.

Fixes #74536
DeltaFile
+7-7libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers/assign_range.pass.cpp
+7-71 files

LLVM/project e2a8a74libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons assign_iter_iter.pass.cpp assign_range.pass.cpp, libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers insert_after_iter_iter.pass.cpp insert_after_range.pass.cpp

[libc++][NFC] Rename forward_list constructor tests (#208301)

The forward_list tests historically used "range" to mean an iterator
pair, but we use `iter_iter` pretty consistently elsewhere in the test
suite. Using `range` also makes it confusing with the actual tests for
`_range` operations, like `append_range` or `assign_range`.
DeltaFile
+90-0libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers/insert_after_iter_iter.pass.cpp
+0-90libcxx/test/std/containers/sequences/forwardlist/forwardlist.modifiers/insert_after_range.pass.cpp
+88-0libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/assign_iter_iter.pass.cpp
+0-88libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/assign_range.pass.cpp
+0-64libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/range_alloc.pass.cpp
+64-0libcxx/test/std/containers/sequences/forwardlist/forwardlist.cons/ctor_iter_iter_alloc.pass.cpp
+242-2422 files not shown
+300-3008 files

LLVM/project 88d548across-project-tests/intrinsic-header-tests riscv_packed_simd.c

[RISCV][P-ext][NFC] Add tests for packed reverse intrinsics (#208484)
DeltaFile
+48-0cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+48-01 files

LLVM/project 2ff8ed7llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/PhaseOrdering/X86 pr67803.ll

[VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (#187870)

Track lane indices through vector bitcasts that change element count in
foldShuffleToIdentity. Widening bitcasts (e.g. <2 x i32> -> <4 x i16>)
compress R consecutive destination lanes into one source lane, while
narrowing bitcasts (e.g. <4 x i16> -> <2 x i32>) expand each destination
lane into R source lanes.

Also fix identity check, splat mask, and destination type construction
to use Item.size() instead of Ty->getNumElements(), since the Item
vector changes size when passing through element-count-changing
bitcasts.

Fixes #96884
DeltaFile
+336-0llvm/test/Transforms/VectorCombine/X86/shuffletoidentity-bitcast.ll
+130-14llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+88-29llvm/test/Transforms/PhaseOrdering/X86/pr67803.ll
+73-3llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll
+8-16llvm/test/Transforms/VectorCombine/X86/shuffle-inseltpoison.ll
+8-16llvm/test/Transforms/VectorCombine/X86/shuffle.ll
+643-781 files not shown
+649-847 files

LLVM/project 07d5e0d.ci/green-dragon lldb-windows.groovy

[lldb][Windows][CI] split steps (#206946)

Split the lldb green-dragon lldb testing steps into 2:
1. Build and run the tests without `lldb-server.exe`
2. Run the tests with `lldb-server.exe`

This gives better separation in the UI and if the first step fails, the
second step will still attempt to run.
DeltaFile
+24-3.ci/green-dragon/lldb-windows.groovy
+24-31 files