LLVM/project b258009 — clang/lib/Interpreter IncrementalParser.cpp, clang/test/Interpreter code-undo-out-of-line.cpp

[clang-repl] Restore the lookup of out-of-line definitions' predecessors (#229780)

Undoing the out-of-line definition of a member removes it from the
lookup table of its semantic context, its class or namespace, and then
makes its surviving previous declaration visible again. But the previous
declaration was made visible in the lookup table of the lexical context,
the enclosing context of the definition. The member was then not found
in its class or namespace anymore, but in the enclosing context instead:

  struct K { static int s; };
  int K::s = 4;
  %undo
  int K::s = 5;  // error: no member named 's' in 'K'

Make the previous declaration visible in its own semantic context.

Assisted-by: Claude Opus 5.5
DeltaFile
+45-31clang/lib/Interpreter/IncrementalParser.cpp
+36-0clang/test/Interpreter/code-undo-out-of-line.cpp
+81-312 files

LLVM/project 2ceae9c — clang/lib/Sema SemaCast.cpp, clang/test/CodeGenHLSL/BasicFeatures MatrixSplat.hlsl

[Clang][Sema] Fix Matrix HLSLAggregateSplatCast with CStyleCast (#239737)

Add missing preparation implicit conversion to fix the MatrixType
HLSLAggregateSplatCast with CStyleCast expr

Fixes: #239736
DeltaFile
+20-0clang/test/CodeGenHLSL/BasicFeatures/MatrixSplat.hlsl
+10-0clang/lib/Sema/SemaCast.cpp
+30-02 files

LLVM/project 5d9e1db — clang/lib/Lex ModuleMap.cpp

[clang][NFC] Fix typo in comments (#239952)

"seperate" -> "separate"

Signed-off-by: Hardik Kumar <hardikxk at gmail.com>
DeltaFile
+1-1clang/lib/Lex/ModuleMap.cpp
+1-11 files

LLVM/project 2db7fe3 — llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Prove non-strict & not-equal later isBasicBlockEntryGuard (NFCI). (#239818)

isBasicBlockEntryGuardedByCond eagerly tried to prove a strict predicate
as its non-strict half and non-equality, up front and for each guarding
condition, even if a later condition implies the predicate directly.

Trying all conditions directly instead first can speed up compile-time,
because either the predicate holds directly or we can avoid the more
expensive non-equality proofs because the non-strict predicate also does
not hold.

stage1-O3: -0.15%
stage1-ReleaseThinLTO: -0.13%
stage1-ReleaseLTO-g: -0.11%
stage1-aarch64-O3: -0.16%
stage2-O3: -0.14%
stage2-clang: -0.02%



    [4 lines not shown]
DeltaFile
+16-32llvm/lib/Analysis/ScalarEvolution.cpp
+16-321 files

LLVM/project 01cee4e — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU store.ll load.ll

[AMDGPU] Price misaligned flat and LDS accesses with the LDS misaligned bug

In WGP mode on subtargets with the LDS misaligned bug, a flat access is
split into pieces no wider than its alignment and no narrower than 4
bytes, and an LDS access aligned below 4 bytes uses 8-byte pieces as one
aligned to 4 does.
DeltaFile
+121-60llvm/test/Analysis/CostModel/AMDGPU/store.ll
+121-60llvm/test/Analysis/CostModel/AMDGPU/load.ll
+4-1llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+246-1213 files

LLVM/project a808848 — llvm/lib/Target/AMDGPU AMDGPULowerBufferFatPointers.cpp AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU store.ll load.ll

apply comments
DeltaFile
+354-0llvm/test/Analysis/CostModel/AMDGPU/buffer-fat-pointer-oob-mode.ll
+21-1llvm/test/Analysis/CostModel/AMDGPU/store.ll
+21-1llvm/test/Analysis/CostModel/AMDGPU/load.ll
+8-4llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+3-3llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+407-95 files

LLVM/project 8e1d6fd — llvm/lib/Target/AMDGPU AMDGPU.h AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU store.ll load.ll

[AMDGPU] Price buffer fat pointer memory operations

Price buffer fat pointer accesses as global accesses, except that an
aligned load is not widened and a vector of odd width elements is not
split element by element. Without relaxed buffer bounds checking, a
vector of elements that are a multiple of 32 bits wide is accessed in
pieces no wider than its alignment and no narrower than 4 bytes, and a
vector of other byte-sized or power of 2 wide elements in pieces of the
largest power of 2 bytes that divides the element size. The width comes
from buffer fat pointer lowering, which now exposes it. When the pointer
is a buffer resource plus a constant offset, the offset and a constant
number of records give the same bounds facts lowering uses to access it
in wider pieces.
DeltaFile
+38-35llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+51-20llvm/test/Analysis/CostModel/AMDGPU/store.ll
+51-20llvm/test/Analysis/CostModel/AMDGPU/load.ll
+56-14llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+9-0llvm/lib/Target/AMDGPU/AMDGPU.h
+205-895 files

LLVM/project 733a858 — llvm/test/Analysis/CostModel/AMDGPU store.ll load.ll

[NFC][AMDGPU] Precommit buffer fat pointer and gfx1010 memory cost tests
DeltaFile
+294-0llvm/test/Analysis/CostModel/AMDGPU/load.ll
+235-0llvm/test/Analysis/CostModel/AMDGPU/store.ll
+529-02 files

LLVM/project d360f5f — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.h AMDGPUTargetTransformInfo.cpp

Use isSourceOfDivergence in hasUniformPointerOperand
DeltaFile
+3-6llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+5-62 files

LLVM/project a2d02f4 — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU load.ll

[AMDGPU] Price constant address space memory operations

Price constant address space accesses as global accesses, except for
loads selected to scalar loads of up to 64 bytes. These are loads from
the 32-bit constant address space, and loads from the constant address
space whose pointer is an argument passed in SGPRs or a constant, plus
constant offsets, both aligned to 4 bytes or to their size. A scalar
load is widened as its lowering does. An integer whose size is not a
multiple of 4 bytes is loaded as whole dwords, plus a byte load when its
size is 7 modulo 8, since the last byte of such a remainder is left out
of the scalar load. A type with no legal dword vector equivalent is
split into the largest power of 2 pieces that fit, and once the
remainder fits in the alignment it is widened to a power of 2 piece of
up to the alignment, at most 8 bytes for byte vectors. A 3-dword
remainder of a legal dword vector takes a fourth dword when aligned to 8
on a subtarget without scalar dwordx3 loads.
DeltaFile
+162-37llvm/test/Analysis/CostModel/AMDGPU/load.ll
+121-71llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-fma-fusion.ll
+56-4llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+339-1123 files

LLVM/project 40a98c3 — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.h AMDGPUTargetTransformInfo.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h AMDGPUBaseInfo.cpp

move uniform helper
DeltaFile
+5-22llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+20-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+15-0llvm/test/Analysis/CostModel/AMDGPU/load.ll
+7-5llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+0-2llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+53-296 files

LLVM/project db3b755 — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU load.ll

small changes
DeltaFile
+22-12llvm/test/Analysis/CostModel/AMDGPU/load.ll
+16-10llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+38-222 files

LLVM/project e26450e — llvm/test/Analysis/CostModel/AMDGPU load.ll

[NFC][AMDGPU] Precommit uniform constant load cost tests (#238839)

Assisted-By: Claude Code Opus 5
DeltaFile
+93-0llvm/test/Analysis/CostModel/AMDGPU/load.ll
+93-01 files

LLVM/project 0a2c535 — llvm/test/CodeGen/LoongArch/lasx xvexth.ll vec-i128.ll, llvm/test/CodeGen/LoongArch/lasx/ir-instruction add.ll sub.ll

[LoongArch] Add support for vector add/sub on vNi128 types

Make v1i128 and v2i128 legal types in the LSX/LASX register classes and
lower ADD/SUB on them to VADD.Q/XVADD.Q and VSUB.Q/XVSUB.Q.

The vNi128 types are intentionally kept out of LSXVTs/LASXVTs so that
only a minimal set of operations is legal on them: LOAD, STORE, BITCAST,
UNDEF, ADD, SUB and VSELECT (via [X]VBITSEL.V). VECTOR_SHUFFLE is custom
lowered by performing the shuffle on the equivalent i64 vector type.
Everything else keeps the default Expand action.

Since the widening extend combine can now produce VEXTH/VEXTH_U on
vNi128, also add the [X]VEXTH.Q.D and [X]VEXTH.QU.DU patterns.
DeltaFile
+188-196llvm/test/CodeGen/LoongArch/lsx/vec-i128.ll
+154-206llvm/test/CodeGen/LoongArch/lasx/vec-i128.ll
+9-97llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
+9-91llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
+14-52llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+9-48llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
+383-6906 files not shown
+496-79312 files

LLVM/project 89c5639 — llvm/test/CodeGen/LoongArch/lasx vec-i128.ll, llvm/test/CodeGen/LoongArch/lasx/ir-instruction add.ll sub.ll

[LoongArch][NFC] Add tests for vector add/sub on vNi128

Also add tests for load/store, select and shuffle on vNi128 types to
make sure operations without dedicated support are still legalized
correctly.
DeltaFile
+277-0llvm/test/CodeGen/LoongArch/lsx/vec-i128.ll
+277-0llvm/test/CodeGen/LoongArch/lasx/vec-i128.ll
+106-2llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
+100-2llvm/test/CodeGen/LoongArch/lasx/ir-instruction/add.ll
+57-2llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
+57-2llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
+874-86 files

LLVM/project c5f954a — clang/docs ReleaseNotes.md, clang/include/clang/Basic DiagnosticSemaKinds.td

Revert "[clang][Sema] Recheck array size once the element type is complete" (#239935)

Reverts llvm/llvm-project#219817

Causes a large compile-time regression.
DeltaFile
+0-55clang/test/SemaCXX/array-size.cpp
+0-42clang/lib/Sema/SemaType.cpp
+0-7clang/lib/Sema/SemaDecl.cpp
+0-6clang/docs/ReleaseNotes.md
+1-2clang/include/clang/Sema/Sema.h
+0-2clang/include/clang/Basic/DiagnosticSemaKinds.td
+1-1146 files

LLVM/project a42ebde — clang/docs ReleaseNotes.md, clang/lib/Basic Warnings.cpp

[clang][Diagnostics] Don't drop "no-" when reporting an unknown -Wno-error= option (#239212)

Fixes #227392

If you pass `-Wno-error=foo` and clang doesn't know the `foo` warning
group, the
message you get back is about `-Werror=foo`. The `no-` is gone, and the
"did you
mean" suggestion drops it as well, so the flag in the message isn't the
one you
actually passed. The reporter hit this with
`-Wno-error=maybe-uninitialized`
from a GCC build and couldn't tell what to remove.

Nothing is lost before this point. `ProcessWarningOptions` pulls off the
`no-`
and stores it in `isPositive`, and the plain `-W` and `-R` paths already
use it
when building the prefix. The `-Werror=` and `-Wfatal-errors=` paths had

    [30 lines not shown]
DeltaFile
+9-0clang/test/Frontend/warning-options.cpp
+6-2clang/lib/Basic/Warnings.cpp
+4-0clang/docs/ReleaseNotes.md
+19-23 files

LLVM/project 5730c94 — clang/docs ReleaseNotes.md, clang/include/clang/Basic DiagnosticSemaKinds.td

Revert "[clang][Sema] Recheck array size once the element type is complete (#…"

This reverts commit dc550beb73ca66333785b235c79dc8947088555a.
DeltaFile
+0-55clang/test/SemaCXX/array-size.cpp
+0-42clang/lib/Sema/SemaType.cpp
+0-7clang/lib/Sema/SemaDecl.cpp
+0-6clang/docs/ReleaseNotes.md
+1-2clang/include/clang/Sema/Sema.h
+0-2clang/include/clang/Basic/DiagnosticSemaKinds.td
+1-1146 files

LLVM/project e5ae646 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vselect.ll

fix for poison cond
DeltaFile
+27-4llvm/test/CodeGen/LoongArch/lsx/vselect.ll
+19-4llvm/test/CodeGen/LoongArch/lasx/vselect.ll
+4-1llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+50-93 files

LLVM/project 1649b70 — llvm/test/CodeGen/LoongArch/lasx vselect.ll, llvm/test/CodeGen/LoongArch/lsx vselect.ll

update after rebase
DeltaFile
+23-19llvm/test/CodeGen/LoongArch/lsx/vselect.ll
+4-8llvm/test/CodeGen/LoongArch/lasx/vselect.ll
+27-272 files

LLVM/project 1d8c21a — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

fix typo
DeltaFile
+1-1llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+1-11 files

LLVM/project 6e0cc7c — llvm/lib/Target/LoongArch LoongArchISelLowering.h LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vselect.ll

[LoongArch] Custom legalize vselect to vector_shuffle for most constant condition cases
DeltaFile
+48-36llvm/test/CodeGen/LoongArch/lasx/vselect.ll
+44-34llvm/test/CodeGen/LoongArch/lsx/vselect.ll
+49-2llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+1-0llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+142-724 files

LLVM/project 3a34e81 — llvm/test/tools/llubi intr_masked_compressstore.ll intr_masked_compressstore_ub.ll, llvm/tools/llubi/lib Interpreter.cpp

[llubi] Add support for llvm.masked.compressstore (#239636)
DeltaFile
+85-0llvm/test/tools/llubi/intr_masked_compressstore_ub.ll
+62-0llvm/test/tools/llubi/intr_masked_compressstore.ll
+13-6llvm/tools/llubi/lib/Interpreter.cpp
+160-63 files

LLVM/project 61e7f64 — llvm/include/llvm/DWARFCFIChecker DWARFCFIFunctionFrameStreamer.h DWARFCFIAnalysis.h, llvm/lib/DWARFCFIChecker Registers.h DWARFCFIFunctionFrameStreamer.cpp

[MC] Remove DWARFCFIChecker (#237681)

The checker (#145633) processes instructions in program order and
attributes each CFI directive to the preceding instruction, so the CFA
reset after a mid-function epilogue is reported as an error. On `clang
-S -O2` output of llvm/lib/Support/{APInt,StringRef,raw_ostream}.cpp
(354 functions), `llvm-mc --validate-cfi` reports 294 errors, all false
positives, plus 3083 warnings. It also ignores .cfi_remember_state and
.cfi_restore_state.

Making it usable requires a CFG with jump tables, landing pads, and
noreturn calls, which is a rewrite. Nothing uses it besides its own
tests, while every new CFI directive has to be handled in
DWARFCFIState::convert.

LLM-aided
Discussion: https://discourse.llvm.org/t/rfc-dwarf-cfi-validation/86936
DeltaFile
+0-314llvm/lib/DWARFCFIChecker/DWARFCFIAnalysis.cpp
+0-182llvm/lib/DWARFCFIChecker/DWARFCFIState.cpp
+0-104llvm/include/llvm/DWARFCFIChecker/DWARFCFIAnalysis.h
+0-91llvm/include/llvm/DWARFCFIChecker/DWARFCFIFunctionFrameStreamer.h
+0-88llvm/lib/DWARFCFIChecker/DWARFCFIFunctionFrameStreamer.cpp
+0-64llvm/lib/DWARFCFIChecker/Registers.h
+0-84326 files not shown
+7-1,47432 files

LLVM/project c882fd5 — llvm/include/llvm/MC MCTargetOptionsCommandFlags.h, llvm/lib/MC CMakeLists.txt MCToolOptions.td

[MC] Declare the MCTargetOptions command line options in TableGen

Move RegisterMCTargetOptionsFlags options into a private `MCToolOptions`
struct, different from MCCLOptions since `MCToolOptions` requires tool
opt-in. RegisterMCToolOptions, renamed from RegisterMCTargetOptionsFlags
(LLVMOption and clang driver use "flags" for boolean options), registers
the struct, so `clang -mllvm -crel` remains an error.

Remove the getters without outside readers. llc reads `MCRelaxAll`
instead of `getExplicitRelaxAll`, so `-mc-relax-all=false` no longer
warns with a non-object file type.

LLM-aided
DeltaFile
+34-218llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
+64-0llvm/lib/MC/MCToolOptions.td
+2-51llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
+10-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+6-0llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
+4-0llvm/lib/MC/CMakeLists.txt
+120-2696 files not shown
+127-27512 files

LLVM/project 41be203 — clang/tools/clang-linker-wrapper ClangLinkerWrapper.cpp, llvm/include/llvm/MC MCTargetOptionsCommandFlags.h

[CodeGen][MC] Pass a LibraryOptionsContext to the MC option readers. NFC

Rename `InitMCTargetOptionsFromFlags` to `getMCTargetOptions` and
`InitTargetOptionsFromCodeGenFlags` to `getTargetOptions`. Most of these
options take values, so "Flags" is a misnomer.

These functions and `getABIName` now take the `LibraryOptionsContext` to read
from. A per-context option declared in TableGen has no global value.

LLM-aided
DeltaFile
+13-9clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
+10-9llvm/tools/lto/lto.cpp
+9-3llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
+6-5llvm/lib/CodeGen/CommandFlags.cpp
+4-4llvm/tools/llvm-lto/llvm-lto.cpp
+6-2llvm/include/llvm/MC/MCTargetOptionsCommandFlags.h
+48-3219 files not shown
+77-5625 files

LLVM/project b4c9928 — llvm/tools/llvm-mc-assemble-fuzzer llvm-mc-assemble-fuzzer.cpp

[llvm-mc-assemble-fuzzer] Remove mc::InitMCTargetOptionsFromFlags (#239913)

Just use default MCTargetOptions. The tool should probably be removed,
but for now drop the mc::InitMCTargetOptionsFromFlags call to simplify
the work making mc::InitMCTargetOptionsFromFlags read from library
options instead.
DeltaFile
+1-2llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
+1-21 files

LLVM/project 906ac96 — bolt/lib/Rewrite DWARFRewriter.cpp

[BOLT] Remove unneeded mc::RegisterMCTargetOptionsFlags (#239910)

PR #100800 added this registration because DwarfStreamer::init called
mc::InitMCTargetOptionsFromFlags, which asserts if the options are not
registered, and #100771 removed the registration from DWP.
DwarfStreamer also no longer needs these MC tool options.
DeltaFile
+0-3bolt/lib/Rewrite/DWARFRewriter.cpp
+0-31 files

LLVM/project afe37d5 — llvm/lib/Target/X86 X86AvoidStoreForwardingBlocks.cpp

[X86] Fix -Wunused-variable from #239777 (#239902)

Deleted some uses that left other variables unused outside of LLVM_DEBUG
which is only enabled with LLVM_ENABLE_ASSERTIONS, leaving release
builds with -Wunused-variable.

Mark [[maybe_unused]] to prevent the warning as-is standard.
DeltaFile
+2-2llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
+2-21 files

LLVM/project 4848b5d — llvm/tools/llvm-mc-assemble-fuzzer llvm-mc-assemble-fuzzer.cpp, llvm/tools/llvm-ml llvm-ml.cpp

[llvm-ml,llvm-mc-assemble-fuzzer] Remove unused MCTargetOptionsCommandFlags (#239906)
DeltaFile
+0-2llvm/tools/llvm-mc-assemble-fuzzer/llvm-mc-assemble-fuzzer.cpp
+0-1llvm/tools/llvm-ml/llvm-ml.cpp
+0-32 files