LLVM/project 2e39485mlir/include/mlir/Dialect/LLVMIR ROCDLOps.td, mlir/test/Conversion/AMDGPUToROCDL dot-gfx9.mlir wmma-gfx12.mlir

[mlir][ROCDL] Enable useStrictPropertiesInAssemblyFormat

**Migration note:** Separate out inherent and discardable attributes
on your `rocdl.*` operations and put a `<>` around the inherent ones.

This commit adds `prop-dict` clauses to all the ROCDL-dialect
operations that have inherent attributes but don't have better syntax
for them.

I looked at creating better syntaxes here, but these are fairly
low-level operations and it was hard to put together comma-separated
lists of optional arguments in tablegen. So I've gone with the rather
straightforward and consistent fix of adding in `prop-dict`s.

AI note: Claude did the changes here, I reviewed the designs.

Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+60-60mlir/test/Target/LLVMIR/rocdl.mlir
+48-48mlir/test/Dialect/LLVMIR/rocdl.mlir
+37-37mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+6-6mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
+6-6mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx11.mlir
+3-3mlir/test/Conversion/AMDGPUToROCDL/dot-gfx9.mlir
+160-1604 files not shown
+167-16610 files

LLVM/project 9d827c1mlir/include/mlir/Dialect/AMDGPU/IR AMDGPUOps.td, mlir/test/Conversion/AMDGPUToROCDL amdgpu-to-rocdl.mlir mfma.mlir

[mlir][AMDGPU] Enable useStrictPropertiesInAssemblyFormat

This is part of the migration to keeping inherent and discardable
attributes separate touched.

**Migration note:** this'll change the syntax of a bunch of `amdgpu`
dialect ops to keep inherent attributes out of the `attr-dict`.

Syntax changes:

1. Operations like the dpp operations have had their inherent operands
turned into oilists that use `name(value)` syntax, such as
`bound_ctrl(false)`, which also leads to the elision of default
values.
2. Buffer operations now use `boundsCheck(true/false)` before the main
operation (keeping the visibility from the old attr-dict) and have
moved to `sgprOffset(%offset)` and `indexOffset(constant)` as optional
syntax alements after the main specification.
3. WMMA operations also now have the same `attribute[(value)]` element

    [15 lines not shown]
DeltaFile
+59-59mlir/test/Dialect/AMDGPU/ops.mlir
+69-20mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
+39-39mlir/test/Conversion/AMDGPUToROCDL/mfma.mlir
+32-32mlir/test/Dialect/AMDGPU/invalid.mlir
+25-25mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
+20-20mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
+244-19518 files not shown
+411-36124 files

LLVM/project f128dfemlir/include/mlir/Dialect/AMDGPU/IR AMDGPUOps.td

Move buffer ops to oilist
DeltaFile
+14-14mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
+14-141 files

LLVM/project 19c0c90mlir/include/mlir/Dialect/XeGPU/IR XeGPUOps.td, mlir/test/Dialect/XeGPU xegpu-wg-to-sg.mlir propagate-layout.mlir

[mlir] Don't print a stray space for a fully-elided prop-dict (#216810)

**Migration note**: if you have a custom `prop-dict` printer, add a
leading space into the format - it'll no longer be printed implicitly.

The `prop-dict` printer generated by mlir-tblgen would always print
a space before dispatching to printProperties(). When every property is
elided (because it is bound elsewhere in the assembly format or matches
its default value) printProperties() prints nothing, leaving a stray
space in the output. We had a test TODO about this.

This PR makes the leading space the responsibility of the properties
printer, so
it's emitted only when needed. The generic
printer in OpState::genericPrintProperties() and all in-tree custom
printers have been updated accordingly.

XeGPU had worked around the stray space by writing an empty space
directive (``) after prop-dict to suppress the space before ':'. Those

    [14 lines not shown]
DeltaFile
+17-17mlir/test/Dialect/XeGPU/ops.mlir
+4-4mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
+4-4mlir/test/Dialect/XeGPU/propagate-layout.mlir
+4-4mlir/test/Dialect/XeGPU/invalid.mlir
+4-4mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
+3-4mlir/test/mlir-tblgen/op-format.mlir
+36-379 files not shown
+54-5215 files

LLVM/project 8980e58llvm/lib/Target/AMDGPU GCNRegPressure.cpp

clang-format.
DeltaFile
+3-2llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+3-21 files

LLVM/project 67cd401clang/include/clang/StaticAnalyzer/Core/PathSensitive SMTConv.h

[analyzer][z3][NFC] fix indentation/formatting in SMTConv.h getBinExpr (#217962)
DeltaFile
+4-5clang/include/clang/StaticAnalyzer/Core/PathSensitive/SMTConv.h
+4-51 files

LLVM/project dd8afabflang/test/Semantics/OpenMP doacross.f90

Restore deleted line from testcase
DeltaFile
+2-1flang/test/Semantics/OpenMP/doacross.f90
+2-11 files

LLVM/project eeb97efllvm/include/llvm/Frontend/OpenMP OMPDescriptors.h.inc, llvm/lib/Frontend/OpenMP OMPDescriptors.inc

Update unique/repeatable properties on modifiers
DeltaFile
+37-37llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
+1-0llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h.inc
+38-372 files

LLVM/project a09e84bllvm/include/llvm/Analysis LoopInfo.h, llvm/lib/Analysis LoopInfo.cpp

[SimpleLoopUnswitch] Tweak token live-out behavior (#217916)

The previous check (moved into Loop::isSafeToCloneConditionally in the
preceding NFC commit) rejected any token instruction with a use outside
its defining basic block. This is both too strict and too lax:

- Too strict: cloning only requires forming phis for values that are
live-out of the *loop*. Token uses that cross blocks but stay within the
loop are cloned along with their defs and need no phis, so they do not
inhibit non-trivial unswitching.

- Too lax: `isTokenTy()` misses token-like target extension types
(`isTokenLikeTy()`), which cannot be used in phi nodes either. A
live-out token-like value would have made unswitching produce invalid
IR.

Switch the check to reject exactly the token-like values that are
live-out of the loop, reusing the same use-scanning logic as
`isBlockInLCSSAForm` (`loopContainsUser`): a use in a phi is treated as

    [4 lines not shown]
DeltaFile
+179-0llvm/test/Transforms/SimpleLoopUnswitch/token-uses.ll
+11-3llvm/lib/Analysis/LoopInfo.cpp
+5-4llvm/include/llvm/Analysis/LoopInfo.h
+4-3llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+199-104 files

LLVM/project 0fa9f1fllvm/include/llvm/IR VPIntrinsics.def, llvm/lib/CodeGen/SelectionDAG MatchContext.h LegalizeVectorOps.cpp

[DAG] Remove trivial VP SDNodes. NFC

This removes the codegen parts of the trivial VP intrinsics. It's quite far reaching, but the general categories of code removed are:

- Removing definitions from VPIntrinsics.def
- Legalization and expansion code
- MatchContext used to match over both VP and non-VP nodes
- Some dead DAGCombines and folds in SelectionDAGBuilder

There are still more things to be cleaned up after this, e.g. removing more of the VPIntrinsic class hierarchy, removing ExpandVectorPredication/moving expansion into other places, removing MatchContext from SDPatternMatch
DeltaFile
+80-283llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-340llvm/include/llvm/IR/VPIntrinsics.def
+6-336llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+47-282llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+7-217llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+0-182llvm/lib/CodeGen/SelectionDAG/MatchContext.h
+143-1,64011 files not shown
+188-2,01417 files

LLVM/project e183085llvm/lib/Target/VE VVPNodes.def

[VE] Remove trivial VP SDNode mappings. NFC

These SDNodes aren't emitted anymore and will be removed in an upcoming patch.
DeltaFile
+9-9llvm/lib/Target/VE/VVPNodes.def
+9-91 files

LLVM/project 1cb56d8llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp LegalizeVectorOps.cpp, llvm/test/CodeGen/VE/Vector vp_urem.ll vp_srem.ll

[DAG] Expand vp.*rem and vp.cttz.elts with non-vp nodes.

Trivial VP SDNodes will be removed in an upcoming patch. The division is still predicated so we avoid UB.
DeltaFile
+24-12llvm/test/CodeGen/VE/Vector/vp_urem.ll
+24-12llvm/test/CodeGen/VE/Vector/vp_srem.ll
+5-5llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+3-5llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+56-344 files

LLVM/project ad9138fllvm/docs LangRef.md, llvm/include/llvm/IR VPIntrinsics.def Intrinsics.td

[IR] Remove trivial VP intrinsics. NFC (#217863)

Trivial VP intrinsics are now all autoupgraded to their non-VP
counterparts, so the intrinsics themselves are dead.

This removes the intrinsics and their corresponding LangRef definitions,
as well as the VPIntrinsic subclasses and some methods in
ExpandVectorPredication which are now dead. Removing the SDNodes is
deferred to a separate patch.

RFC: https://discourse.llvm.org/t/rfc-remove-trivial-vp-intrinsics/90972
DeltaFile
+0-2,733llvm/docs/LangRef.md
+1-317llvm/include/llvm/IR/Intrinsics.td
+97-143llvm/include/llvm/IR/VPIntrinsics.def
+2-170llvm/lib/CodeGen/ExpandVectorPredication.cpp
+0-127mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+1-87llvm/lib/IR/IntrinsicInst.cpp
+101-3,5779 files not shown
+107-3,89515 files

LLVM/project 7637817llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Fix wrap-flags typo in sext-addrec (#217927)

The change is obviously correct, but is very difficult to test.

Proof sketch: https://alive2.llvm.org/ce/z/Tj9Z-c
DeltaFile
+1-1llvm/lib/Analysis/ScalarEvolution.cpp
+1-11 files

LLVM/project 8f7836bllvm/include/llvm/CodeGen/GlobalISel InstructionSelect.h, llvm/lib/CodeGen/GlobalISel InstructionSelect.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+68-13llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+50-7llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
+3-12llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+0-5llvm/test/CodeGen/SPIRV/llc-pipeline.ll
+2-1llvm/unittests/CodeGen/GlobalISel/InstructionSelectTest.cpp
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+124-3914 files not shown
+138-5120 files

LLVM/project 22eeb14llvm/include/llvm/CodeGen/GlobalISel InstructionSelect.h, llvm/lib/CodeGen/GlobalISel InstructionSelect.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+68-13llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+59-0llvm/lib/Target/WebAssembly/WebAssemblyCodeGenPassBuilder.cpp
+50-7llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
+3-12llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+0-5llvm/test/CodeGen/SPIRV/llc-pipeline.ll
+2-1llvm/unittests/CodeGen/GlobalISel/InstructionSelectTest.cpp
+182-3815 files not shown
+197-5121 files

LLVM/project 06424ca.github/workflows libcxx-benchmark-cron.yml, libcxx/utils requirements.txt

[libc++] Give the LNT tooling its own requirements.txt (#217889)

The LNT tooling alone has way fewer dependencies. Using a smaller
requirements.txt should speed up the "request historical benchmark data"
cron job that runs every 30 minutes and needs to install them.
DeltaFile
+1-3libcxx/utils/requirements.txt
+2-2libcxx/utils/ci/lnt/run-benchmarks
+2-2.github/workflows/libcxx-benchmark-cron.yml
+3-0libcxx/utils/ci/lnt/requirements.txt
+1-1libcxx/utils/ci/lnt/submit-benchmarks
+1-1libcxx/utils/ci/lnt/select-anchor-commits
+10-93 files not shown
+13-129 files

LLVM/project 6279700utils/bazel/llvm-project-overlay/mlir/test BUILD.bazel

[bazel][mlir] Fix lit.site.cfg substitution for MLIR_RUN_ARM_NEON_TESTS (#217973)

Follow-up to ee0f7ff7e697 which renamed MLIR_RUN_ARM_I8MM_TESTS to
MLIR_RUN_ARM_NEON_TESTS in lit.site.cfg.py.in.
DeltaFile
+1-1utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
+1-11 files

LLVM/project 6dcfc17clang/include/clang/Basic DiagnosticParseKinds.td, clang/lib/Lex PPDirectives.cpp

[clang] Move the diagnostic of unexpected token after module name from phase 4 to phase 7 (#187846)

The PR https://github.com/llvm/llvm-project/pull/107168 implement
[CWG2947](https://cplusplus.github.io/CWG/issues/2947.html). And clang
checks next pp-token after module name in phase 4.

This PR move the check to phase 7, there are three main motivations:
1. We already convert the module name pp-tokens sequence into a
annot_module_name token, so for the following case, macro expansion will
be disabled.
2. In the original implementation, we need to look ahead a token even if
we already hit an `eod` token, but in phase7, we don't need to look
ahead a token.
3. The original implementation checked and emit a diagnosis in phase 4,
and then skipped these unexpected tokens in phase 7. Now we've merged
them into one step and are able to get a diagnosis approximate as
before.

```cpp

    [18 lines not shown]
DeltaFile
+0-16clang/lib/Lex/PPDirectives.cpp
+7-0clang/test/Preprocessor/modules.cpp
+3-3clang/test/CXX/module/cpp.pre/p1.cpp
+4-2clang/lib/Parse/Parser.cpp
+2-2clang/test/CXX/drs/cwg2947.cpp
+3-0clang/include/clang/Basic/DiagnosticParseKinds.td
+19-234 files not shown
+24-2810 files

LLVM/project ce35294mlir/include/mlir/IR SymbolInterfaces.td, mlir/lib/IR SymbolTable.cpp

Revert "[mlir][IR] Add SymbolUserTypeInterface (#198435)" (#217959)

Looking forward to this feature, but the verification cost presently is
much too high: 2-3x+ end-to-end for CIRCT production workloads, as well
as a noticeable bump to MaxRSS. A user has reported their workload is
now 1.85x (#212160).

This verifier performance hit impacts all MLIR projects using the common
SymbolTable regardless of whether they make use of this interface.

Presently there are no in-tree users.

Promising work to reduce this cost (#212160, #212354) is underway, but
neither are ready yet.

Since the entire purpose of this interface is to support this
verification, revert this entirely for now while the performance story
is worked out.

This reverts commit 8c2d7cc3a9983459628c028d8537eaf79551f396.
DeltaFile
+0-95mlir/test/IR/test-verifiers-symbol-user-type.mlir
+0-57mlir/lib/IR/SymbolTable.cpp
+18-27utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+1-20mlir/include/mlir/IR/SymbolInterfaces.td
+0-13mlir/test/lib/Dialect/Test/TestTypes.cpp
+0-9mlir/test/lib/Dialect/Test/TestTypeDefs.td
+19-2213 files not shown
+19-2259 files

LLVM/project 49e7538lldb/test/API/functionalities/scripted_frame_provider/wrapped_frame_register_context frame_provider.py

[lldb][test] Fix 64-bit register assumption in wrapped frame test (#217659)

Added in #216840 / b0e9c530b5f0206de4a4f59f6728dbd5f10a5ca2.

This is failing on our downstream Arm 32-bit Linux bot:
```
* thread #1, name = 'a.out', stop reason = breakpoint 1.1
  * frame #0: 0x013d0630 a.out`compute(a=<unavailable>, b=<unavailable>) at main.c:3:10 [synthetic]
    frame #1: 0x013d065c a.out`main at main.c:6:25
    frame #2: 0xea2b739a libc.so.6`
    frame #3: 0xea2b743e libc.so.6`__libc_start_main + 94
    frame #4: 0x013d0538 a.out`_start + 40

Expecting sub string: "compute(a=3, b=4)" (was not found)
```
I have not had time to reproduce it locally, but I did notice that the
test packs a struct of registers using `Q` (8 bytes) regardless of
register size.


    [6 lines not shown]
DeltaFile
+19-3lldb/test/API/functionalities/scripted_frame_provider/wrapped_frame_register_context/frame_provider.py
+19-31 files

LLVM/project 584453b.github/workflows compiler-rt-libc-builtins-tests.yml, compiler-rt/lib/builtins CMakeLists.txt

[CI] check libc freestanding in compiler-rt
DeltaFile
+227-0compiler-rt/lib/builtins/libc-isolation/libc-shared-manifest.txt
+59-0.github/workflows/compiler-rt-libc-builtins-tests.yml
+34-0compiler-rt/lib/builtins/libc-isolation/libc-shared-closure.sh
+26-0compiler-rt/lib/builtins/CMakeLists.txt
+25-0compiler-rt/lib/builtins/libc-isolation/export-libc-shared.cmake
+16-0compiler-rt/lib/builtins/libc-isolation/regen-manifest.sh
+387-06 files

LLVM/project b5bccd6llvm/include/llvm/CodeGen/GlobalISel InstructionSelect.h, llvm/lib/CodeGen/GlobalISel InstructionSelect.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+68-13llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+50-7llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
+3-12llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+0-5llvm/test/CodeGen/SPIRV/llc-pipeline.ll
+2-1llvm/unittests/CodeGen/GlobalISel/InstructionSelectTest.cpp
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+124-3914 files not shown
+138-5120 files

LLVM/project 2761c67llvm/include/llvm/CodeGen/GlobalISel InstructionSelect.h, llvm/lib/CodeGen/GlobalISel InstructionSelect.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+68-13llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+50-7llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
+3-12llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+0-5llvm/test/CodeGen/SPIRV/llc-pipeline.ll
+2-1llvm/unittests/CodeGen/GlobalISel/InstructionSelectTest.cpp
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+124-3914 files not shown
+138-5120 files

LLVM/project 6b17aa0llvm/lib/DWARFLinker/Parallel DWARFLinkerImpl.cpp DWARFLinkerCompileUnit.h

[DWARFLinker] Fix getContaingFile typo (NFC) (#217957)

Rename CompileUnit::getContaingFile to getContainingFile and update its
call sites in the parallel DWARF linker.
DeltaFile
+5-6llvm/lib/DWARFLinker/Parallel/DependencyTracker.cpp
+5-5llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
+5-5llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.cpp
+1-1llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
+1-1llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
+17-185 files

LLVM/project 079dd25clang/include/clang/CIR/Dialect/IR CIRTypesDetails.h, clang/lib/CIR/Dialect/IR CIRTypes.cpp

[CIR] Allow only CIR types in function signatures (#215922)

The calling convention lowering pass expects cir.func operations to
contain only CIR types in the signature. This change adds verifier
support to enforce that.

In the process, I discovered that it wasn't possible to walk the
subtypes of a CIR struct or union. The `AttrTypeSubElementHandler`
implementation to handle that (including the TODO comment) is copied
from the LLVM struct type handling.

Adding tests for this revealed a problem where if the `FuncType`
verifier reports an error, the `FuncOp` parser asserted. This change
fixes that by using `FuncType::getChecked()` to catch and report the
error.
DeltaFile
+52-0clang/include/clang/CIR/Dialect/IR/CIRTypesDetails.h
+36-0clang/test/CIR/IR/invalid-func.cir
+24-0clang/lib/CIR/Dialect/IR/CIRTypes.cpp
+12-8clang/test/CIR/IR/builtin-int-cast.cir
+10-8clang/test/CIR/Lowering/builtin-int-cast.cir
+7-5clang/test/CIR/Transforms/builtin-int-cast-fold.cir
+141-211 files not shown
+144-227 files

LLVM/project 62503d0clang/test/CodeGen/AArch64 abi-classify-arg-types.c, llvm/include/llvm/ABI TargetInfo.h

[LLVMABI][AARCH64] Support transparent union arguments (#217686)

This adds support for using the first field in a transparent union for
the purposes of argument classification.

The `useFirstFieldIfTransparentUnion` function was already implemented
for the `X86_64TargetInfo` class. I moved it to the `TargetInfo` base
class because there is nothing target-specific about it.

Assisted-by: Cursor / various models
DeltaFile
+45-0llvm/unittests/ABI/AArch64TargetInfoTest.cpp
+23-0clang/test/CodeGen/AArch64/abi-classify-arg-types.c
+0-13llvm/lib/ABI/Targets/X86.cpp
+11-0llvm/lib/ABI/TargetInfo.cpp
+4-0llvm/include/llvm/ABI/TargetInfo.h
+2-0llvm/lib/ABI/Targets/AArch64.cpp
+85-136 files

LLVM/project cddd439llvm/include/llvm/MC MCGOFFStreamer.h MCSymbolGOFF.h, llvm/lib/MC MCSymbolGOFF.cpp MCGOFFStreamer.cpp

Move code to MCSymbolGOFF
DeltaFile
+7-30llvm/lib/MC/MCGOFFStreamer.cpp
+23-0llvm/lib/MC/MCSymbolGOFF.cpp
+7-3llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
+7-0llvm/include/llvm/MC/MCSymbolGOFF.h
+0-3llvm/include/llvm/MC/MCGOFFStreamer.h
+44-365 files

LLVM/project c4d5b68llvm/lib/ObjCopy/ELF ELFObject.h ELFObject.cpp, llvm/unittests/ObjCopy ObjCopyTest.cpp

[llvm-objcopy] Stream ELF output to regular files

Write ELF output directly to seekable regular files instead of first allocating a buffer for the entire output. Keep buffered output for stdout and other non-seekable streams.

Use separate buffered and file-backed output implementations. Serialize regenerated metadata sequentially, seeking once per output range, and report sticky file errors after writing finishes. Truncate and extend seekable output up front so unwritten layout gaps read as zero without being materialized; explicitly overwrite only removed section contents within copied segments.

On a synthetic stamping-style ELF containing a 1 GiB payload, three warm-cache no-op copies had median peak RSS of 2,102,916 KiB before and 1,053,844 KiB after (49.9% lower). Median wall time improved from 1.06 s to 0.77 s, and the outputs were byte-identical.

Co-authored-by: Jeremy Braun <jtbraun at meta.com>

Assisted-by: OpenAI Codex
DeltaFile
+273-107llvm/lib/ObjCopy/ELF/ELFObject.cpp
+62-0llvm/unittests/ObjCopy/ObjCopyTest.cpp
+34-9llvm/lib/ObjCopy/ELF/ELFObject.h
+369-1163 files

LLVM/project 9160aedllvm/include/llvm/Support raw_ostream.h, llvm/lib/Support raw_ostream.cpp

[Support] Support seekable temporary output streams

Use raw_fd_stream for temporary outputs so callbacks can perform positioned writes and resize the destination. Add raw_fd_ostream::takeError and raw_fd_stream::resize, and return stream failures through Error while preserving an existing destination.

Co-authored-by: Jeremy Braun <jtbraun at meta.com>

Assisted-by: OpenAI Codex
DeltaFile
+66-0llvm/unittests/Support/raw_ostream_test.cpp
+48-3llvm/lib/Support/raw_ostream.cpp
+7-0llvm/include/llvm/Support/raw_ostream.h
+121-33 files