[Offload][Omp] Remove references to InfoTreeNode and DeviceInfo (#236407)
Change DeviceInfo enum to liboffload ones.
Remove unused InfoTreeNode reference.
Assisted by Claude.
[libc] Fix the type of pthread_barrier_init's count argument (#236178)
POSIX declares it as `unsigned`, which is also what our implementation
uses, but pthread.yaml (and hence the generated header) said `int`.
Nothing caught the mismatch because the entrypoint never sees the public
declaration.
While in there, add the missing `__restrict` to the first argument of
the internal declaration.
Assisted-by: Claude
[libc] Fix the values of GRND_NONBLOCK and GRND_RANDOM (#235760)
The two flags were swapped. getrandom passes its flags to the kernel
unchanged, so a caller asking not to block got the blocking random pool,
and a caller asking for that pool was told not to block. The kernel's
values, in include/uapi/linux/random.h, are 0x0001 for GRND_NONBLOCK and
0x0002 for GRND_RANDOM.
The test relies on the kernel rejecting GRND_INSECURE together with
GRND_RANDOM and accepting it together with GRND_NONBLOCK.
AI disclosure: this patch was written with Claude Code. I reviewed the
change and ran the new test; it fails without the fix and passes with
it.
Assisted-by: Claude
[CIR] Store nsw/nuw as an OverflowFlags bit enum and split out saturated add/sub
cir.add, cir.sub and cir.mul carried nsw and nuw as two separate unit
properties, and lowering mapped them to LLVM with an early return that
picked nuw over nsw, so an op with both flags lowered to `overflow<nuw>`
and lost nsw. cir.add and cir.sub also carried a `sat` flag that changed
the operation's result rather than adding a poison condition.
Store the flags as one OverflowFlags bit-enum property whose layout
matches mlir::LLVM::IntegerOverflowFlags, so lowering casts it directly
and keeps both flags. The property owns its syntax: bare `nuw` and `nsw`
keywords, accepted in either order and printed in LLVM IR order as
`nuw nsw`. cir.mul now shares the add/sub base class and so becomes Pure.
Saturating arithmetic moves to new cir.add.sat and cir.sub.sat ops, which
lower to the signed or unsigned saturation intrinsics by element type.
That leaves cir::OverflowBehavior only describing nsw/nuw, so the builder
takes cir::OverflowFlags instead.
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[mlir][Toy] Include generated interface declarations outside of namespaces
The `cppNamespace` field is the conventional name to place an interface inside of a namespace. The ShapeInference interface in Toy chapters 4-7 now specifies its cppNamespace, rather than an include into a namespace. The tutorial docs are updated accordingly.
[libc] Return 0 from uname on success (#235758)
uname returned 1 on success. POSIX only requires a non-negative value,
but glibc, musl and bionic all return 0, and callers compare the result
against 0: lvm2, for example, treats 1 as a failure.
Tighten the test to expect 0.
AI disclosure: this patch was written with Claude Code. I reviewed the
change and ran the new test; it fails without the fix and passes with
it.
Assisted-by: Claude
[flang] Avoid a quadratic walk in FIR LICM's nested-region hoisting (#236138)
With `hoist-from-nested-regions=aggressive`, `flang-licm` considers
every operation in a loop's nested regions as a candidate, and for each
candidate `canMoveOutOfOp` is called once per intermediate ancestor up
to the loop. `canMoveOutOfOp` walks the candidate's whole subtree and
calls `fir::canMoveOutOf` on each nested operation. So an
`scf.if`/`fir.if` that holds a large part of the loop body is walked
again for every enclosing level and again for every `if` nested in it.
On routines with deeply nested IF blocks inside loops this takes minutes
of compile time.
`fir::canMoveOutOf` consults only the region owner's
`OperationMoveOpInterface` and returns true when the owner does not
implement it, so in that case the result of the walk is known in
advance. This patch returns early instead of walking. The pass result
does not change.
The new test checks that hoisting through operations without the
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[AArch64] Fix non-strict scalar bf16/fp128 conversions (#234868)
Fix crashes when lowering non-strict scalar conversions between bf16
and fp128. Both directions now go through fp32. The fp128-to-bf16 path
uses the existing round-to-odd helper before the final bf16 conversion.
Add codegen tests for both directions, covering scalar returns and
loads/stores with and without bf16 support.
Fixes #172400.
[libc][regex] Add '+' and '?' ERE quantifiers (#236364)
In POSIX Extended Regular Expressions (ERE), the '+' quantifier matches
one or more occurrences of the preceding atom and '?' matches zero or
one occurrence. Quantifiers with no preceding repeatable atom, following
an anchor, or chained directly after another quantifier without grouping
must be rejected with REG_BADRPT.
Lower 'r+' to Concat(r, Star(r)) and 'r?' to Alt(EmptyStr, r) in
parse_quantified_atom. Because both references to 'r' in Concat(r,
Star(r)) share the same interned ExprId handle, '+' adds at most two
ExprPool nodes and '?' adds one node regardless of subexpression
complexity, without introducing new AST node kinds.
External compliance suites: Henry Spencer suite passes 218/456 (+50)
boolean/error cases and 73/456 (+8) full-position cases; AT&T testregex
passes 333/400 (+81) ERE boolean/error cases and 335/473 (+81) overall
boolean/error cases with 0 regressions.
Assisted-by: Automated tooling, human reviewed.
[Inline] Make the landing pad clause order deterministic (#236160)
When inlining through an invoke, HandleInlinedLandingPad appends the
outer landing pad's clauses to each inlined landing pad. It visited them
through a SmallPtrSet, which iterates in pointer order once it holds
more than 16 entries. So the use-list order of the clause constants
(e.g. a C++ typeinfo global) could change from run to run.
Use a SmallSetVector to visit them in block order, and drop the unused
set parameter of forwardResume.
Assisted by Opus 5.5
[Offload][OMPT] Add OMPT profiler implementation
Add the OMPT-specific profiler types and plugin tracing implementation without compiling or activating them yet. The existing callback path remains authoritative until the tracing interface and orchestration dependencies are available.
Assisted-by: Claude Code
[Offload][OMPT] Drop device lifecycle handling from OmptProfilerTy
Since #221726, libomptarget emits the device_initialize,
device_finalize and device_load callbacks itself, and GenericProfilerTy
no longer has the hooks the plugins used to report these events. The
overrides were left without callers and still used
GenericPluginTy::getUserId(), which #221726 removed, so the file would
not compile once it is built. Remove them together with the per-profiler
callback copies and the initialization flag only they used.
Assisted-by: Claude Code
[Offload][OMPT] Replace generic profiler data hooks with OMPT API
GenericProfilerTy no longer exposes getProfilerSpecificData() or
getTraceRecordManager(), so OmptProfilerTy provides the OMPT-specific
entry points directly: trackAsyncRecord() creates the event info that
carries a trace record into the plugins, and getOmptProfiler() gives
libomptarget typed access to the process-wide profiler. Keeping the
OMPT types out of the generic interface lets the plugins stay agnostic
of the profiling backend.
The buffer manager member moves back out until the tracing buffer
infrastructure exists later in the series.
Assisted-by: Claude Code
[Offload][OMPT] Call device tracing entry points directly
The plugin-side tracing code reached the libomptarget-side entry points by
dlopen'ing "libomptarget.so" and dlsym'ing each libomptarget_ompt_* symbol
on first use. That indirection dates back to when libomptarget and the
plugins were separate shared objects. They are not: PluginOmpt is linked
into omptarget itself, so the library was dlopen'ing itself to look up its
own symbols. The callback path was already converted to direct calls; the
tracing path should never have reintroduced the pattern.
Declare the entry points in OmptCommonDefs.h and call them directly. This
removes ParentLibrary, ensureFuncPtrLoaded(), the generated function
pointers, and the libomptarget_ompt_*_t typedefs (two of which were
duplicates, and three of which were never used).
Calling directly also means the symbols no longer have to be exported, so
no version script entry is needed for them.
The per-entry-point mutexes are left untouched here: they currently wrap
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[Offload][AMDGPU] Wire HSA profiling into GenericProfiler abstraction (#226044)
Add device profiling infrastructure to the AMDGPU plugin so that the
GenericProfiler can receive nanosecond-accurate kernel execution and
data transfer timestamps from the HSA runtime.
Key changes:
- Add ProfilingInfoTy struct to transport HSA profiling data
- Add timeKernelInNsAsync/timeDataTransferInNsAsync callbacks that
extract dispatch/copy times from HSA signals and call
handleKernelCompletion/handleDataTransfer on the profiler
- Add getOrNullProfilerSpecificData helper to extract ProfilerData
from AsyncInfoWrapperTy
- Add getDeviceTimeStamp() override using hsa_system_get_info
- Add getSystemTimestampInNs() for HSA system timestamp queries
- Add schedProfilerKernelTiming/schedProfilerDataTransferTiming to
StreamSlotTy for scheduling profiler callbacks on stream slots
- Thread ProfilerSpecificData through pushKernelLaunch,
pushMemoryCopyH2DAsync, pushMemoryCopyD2HAsync, pushMemoryCopyD2DAsync
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[AMDGPU] Enable SlotIndexes compaction by default
Add TargetRegisterInfo::shouldCompactSlotIndexes() so targets can opt
in to dropping dead SlotIndexes entries before greedy allocation, one
target at a time. An explicit -greedy-compact-slot-indexes still
overrides the target. Enable it for AMDGPU, where the leftover entries
skew live range priorities enough to cause heavy spilling.
[mlir][tensor] Move ExtractFromTensorGenerate pattern to ExtractOp (NFC) (#223201)
This patch moves `ExtractFromTensorGenerate` from
`GenerateOp::getCanonicalizationPatterns` to
`ExtractOp::getCanonicalizationPatterns`, resolving an explicit TODO in
`TensorOps.cpp`.
Because `ExtractFromTensorGenerate` matches and rewrites
`tensor::ExtractOp`, registering it under `ExtractOp` adheres to MLIR's
convention of grouping canonicalization patterns by their root
operation.
Assisted-by: Gemini
[clang][bytecode] Reject methods with invalid parent decls (#236338)
E.g. the later call to `isEmpty()` via
`isReadByLValueToRValueConversion()` causes infinite recursion.
[mlir][IR] Add return value to `replaceUsesWithIf` indicating that a substitution happened (#235748)
This makes it easier/cleaner for clients to detect and propagate
`change.
For example patterns are expected to return `success` when a change
happens and thus must detect them. Returning a value avoid capturing a
flag and modifying by side-effect in the callback.
[X86] Don't discard over-16 stack alignment for 32-bit interrupt handlers (#225366)
calculateMaxStackAlign assigned Align(16) instead of taking the maximum,
so an alloca with align 64 in a 32-bit handler got andl $-16 and landed
only 16-byte aligned, even though PEI had laid the frame out for 64.
With AVX512 the compiler then emits vmovaps to that object, which faults.
