LLVM / project - FreshBSD

LLVM/project b58a31d — offload CMakeLists.txt, offload/liboffload/src OffloadImpl.cpp

2026-02-13 09:27:52 UTC by fineg74 via GitHub on ⎇

main

[OFFLOAD] Add support for host offloading device (#177307)

The purpose of this PR is to add support of host as an offloading device
to liboffload. Both OpenMP and sycl support offloading to a host as
their normal workflow and therefore would require such capability from
liboffload library.

Delta		File
+195	-0	offload/unittests/OffloadAPI/device/olGetHostInfo.cpp
+17	-100	offload/liboffload/src/OffloadImpl.cpp
+43	-8	offload/plugins-nextgen/host/src/rtl.cpp
+4	-2	offload/CMakeLists.txt
+2	-1	offload/unittests/OffloadAPI/CMakeLists.txt
+261	-111	5 files

LLVM/project 0f8325c — llvm/lib/Target/WebAssembly WebAssemblyTargetTransformInfo.cpp WebAssemblyTargetTransformInfo.h, llvm/test/Analysis/CostModel/WebAssembly extract-last-active.ll

2026-02-13 09:21:46 UTC by Benjamin Maxwell via GitHub on ⎇

main

Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (#180942)

The failures should have been resolved with #180290 (which also added
WebAssembly tests).

This reverts commit 811fb223af2b3e2d68c99b346f4b75dcf3de3417.

Delta		File
+26	-0	llvm/test/Analysis/CostModel/WebAssembly/extract-last-active.ll
+0	-13	llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
+0	-4	llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
+26	-17	3 files

LLVM/project 2435a68 — clang/lib/AST/ByteCode Descriptor.cpp, clang/test/AST/ByteCode vectors.cpp

2026-02-13 09:18:34 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Strip atomicity in Descriptor::getElemQualType() (#181328)

The later check for VectorType fails otherwise.

Delta		File
+4	-0	clang/test/AST/ByteCode/vectors.cpp
+2	-0	clang/lib/AST/ByteCode/Descriptor.cpp
+6	-0	2 files

LLVM/project ca8082f — llvm/lib/Transforms/InstCombine InstCombineAndOrXor.cpp, llvm/test/Transforms/InstCombine and-xor-merge.ll

2026-02-13 09:17:00 UTC by hanbeom via GitHub on ⎇

main

[InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (#174278)

This patch optimizes specific pattern.

((X + AddC) & Mask) ^ Mask
-> (~AddC - X) & Mask

Proof: https://alive2.llvm.org/ce/z/XFHfnD
Fixed: https://github.com/llvm/llvm-project/issues/128475

Delta		File
+142	-0	llvm/test/Transforms/InstCombine/and-xor-merge.ll
+24	-0	llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+166	-0	2 files

LLVM/project ac63824 — clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode invalid.cpp

2026-02-13 09:16:34 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Check for invalid call expressions (#181327)

Delta		File
+9	-0	clang/test/AST/ByteCode/invalid.cpp
+2	-0	clang/lib/AST/ByteCode/Compiler.cpp
+11	-0	2 files

LLVM/project 6906c5c — clang/lib/AST/ByteCode InterpBuiltin.cpp, clang/test/AST/ByteCode builtin-functions.cpp

2026-02-13 09:11:31 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Fix __builtin_nan* for non-primitive arrays (#181326)

They might've been casted, so we need t check for it, not assert.

Delta		File
+4	-0	clang/test/AST/ByteCode/builtin-functions.cpp
+2	-1	clang/lib/AST/ByteCode/InterpBuiltin.cpp
+6	-1	2 files

LLVM/project a76e696 — clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/non-overloaded vabs.c vabdu.c, clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/overloaded vabs.c vabdu.c

2026-02-13 08:57:39 UTC by Zhenxuan Sang via Pengcheng Wang on ⎇

users/wangpc-pp/spr/clangriscv-add-zvabd-intrinsics

Regenerate C tests

Created using spr 1.3.6-beta.1

Delta		File
+956	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/overloaded/vabs.c
+956	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/non-overloaded/vabs.c
+603	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/overloaded/vabdu.c
+603	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/non-overloaded/vabdu.c
+585	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/non-overloaded/vabd.c
+585	-0	clang/test/CodeGen/RISCV/rvv-intrinsics-autogenerated/zvabd/policy/overloaded/vabd.c
+4,288	-0	35 files not shown
+9,397	-2,961	41 files

LLVM/project eb30b5c — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 neon-compare-instructions.ll

2026-02-13 08:49:40 UTC by David Green on ⎇

main

[AArch64] Lower SETLE and SETLT vector CondCodes to FCMGT/FCMGE directly.

We previously checked that the compare was NoNan, but the "don't care"
condition codes can be set from known-values as well as nnan instructions.
Lower the vector condition codes directly so that they do not get scalarized
into many scalar instructions.

Delta		File
+18	-94	llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
+8	-0	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+26	-94	2 files

LLVM/project 8f22e43 — clang/lib/AST/ByteCode Interp.h, clang/test/AST/ByteCode complex.c

2026-02-13 08:45:11 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Fix multi-word complex division (#181325)

Looks like I forgot about `isZero()` when writing this.

Delta		File
+2	-4	clang/lib/AST/ByteCode/Interp.h
+2	-0	clang/test/AST/ByteCode/complex.c
+4	-4	2 files

LLVM/project 25ea920 — clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode complex.cpp

2026-02-13 08:17:46 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Fix already initializing _Complex UO_Not (#181323)

We'd accidentally leave the subexpr pointer on the stack.

Delta		File
+2	-2	clang/lib/AST/ByteCode/Compiler.cpp
+1	-0	clang/test/AST/ByteCode/complex.cpp
+3	-2	2 files

LLVM/project e2cc034 — utils/bazel/llvm-project-overlay/lldb/source/Plugins BUILD.bazel

2026-02-13 08:11:02 UTC by Christian Sigg on ⎇

main

[bazel] Fix 22a3f7b.

Delta		File
+5	-5	utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+5	-5	1 files

LLVM/project 5629f4e — utils/bazel/llvm-project-overlay/mlir BUILD.bazel

2026-02-13 08:03:55 UTC by Christian Sigg via GitHub on ⎇

main

[bazel] Port a1d7cda.

Delta		File
+9	-2	utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+9	-2	1 files

LLVM/project 420047c — llvm/lib/Target/AArch64 AArch64SelectionDAGInfo.cpp AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-mask-partition.ll

2026-02-13 07:51:06 UTC by Sander de Smalen via GitHub on ⎇

main

[AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (#180177)

If the result type and mask don't match, the transform is not valid.

Delta		File
+58	-0	llvm/test/CodeGen/AArch64/sve-mask-partition.ll
+4	-0	llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
+2	-1	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+64	-1	3 files

LLVM/project 25a56fb — clang-tools-extra/clang-tidy/bugprone BadSignalToKillThreadCheck.cpp, clang-tools-extra/clangd/unittests DiagnosticsTests.cpp

2026-02-13 07:48:32 UTC by Alex Wang via GitHub on ⎇

main

[clang-tidy] Fix bugprone-bad-signal-to-kill-thread not working in clangd (#180711)

After preamble deserialization, `Token::getLiteralData()` returns
`nullptr` for macro tokens defined in headers. Fall back to
`SourceManager` to retrieve the token text from the source buffer.

Fixes https://github.com/clangd/clangd/issues/2473

Delta		File
+19	-0	clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
+8	-2	clang-tools-extra/clang-tidy/bugprone/BadSignalToKillThreadCheck.cpp
+4	-0	clang-tools-extra/docs/ReleaseNotes.rst
+31	-2	3 files

LLVM/project b9f4c78 — clang-tools-extra/clangd CodeComplete.cpp, clang-tools-extra/clangd/unittests CodeCompleteTests.cpp

2026-02-13 07:31:52 UTC by Hugo Rambure via GitHub on ⎇

main

[clangd] Respect ArgumentLists setting for lambdas (#181009)

Fixes https://github.com/clangd/clangd/issues/1861

Delta		File
+12	-0	clang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
+7	-5	clang-tools-extra/clangd/CodeComplete.cpp
+19	-5	2 files

LLVM/project 8d5a58e — llvm/test/CodeGen/AArch64 neon-compare-instructions.ll

2026-02-13 07:06:20 UTC by David Green on ⎇

main

[AArch64] Even more fcmp+select tests. NFC

This time from known bits.

Delta		File
+360	-0	llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
+360	-0	1 files

LLVM/project 29b363e — clang/lib/AST/ByteCode EvalEmitter.cpp, clang/test/AST/ByteCode cxx23.cpp

2026-02-13 06:38:29 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Don't check lvalue expressions for initialization (#181309)

We're not reading from them, so they don't need to be fully initialized.

Delta		File
+10	-0	clang/test/AST/ByteCode/cxx23.cpp
+2	-4	clang/test/CodeGenCXX/cxx2a-consteval.cpp
+1	-1	clang/lib/AST/ByteCode/EvalEmitter.cpp
+13	-5	3 files

LLVM/project 54c080d — mlir/tools/mlir-tblgen DialectGen.cpp

2026-02-13 06:38:06 UTC by Christian Ulmann via GitHub on ⎇

main

[MLIR][ODS] Make dialect attribute helper member functions const (NFC) (#181111)

This commit marks member functions of dialect attribute helpers as
constant. This ensures that these helpers can be used as members of
rewrite patterns, whose `matchAndRewrite` functions are marked as const
as well.

Delta		File
+6	-6	mlir/tools/mlir-tblgen/DialectGen.cpp
+6	-6	1 files

LLVM/project da6851f — lldb/source/API SBFile.cpp

2026-02-13 06:32:09 UTC by Jonas Devlieghere via GitHub on ⎇

main

[lldb] Fix typo: transfer_owndership -> transfer_ownership (NFC) (#181314)

Delta		File
+3	-3	lldb/source/API/SBFile.cpp
+3	-3	1 files

LLVM/project 655b6fb — lldb/include/lldb/Breakpoint StoppointHitCounter.h, lldb/include/lldb/Core DebuggerEvents.h Declaration.h

2026-02-13 06:21:27 UTC by Jonas Devlieghere via GitHub on ⎇

main

[lldb] Fix LLDB header guards (NFC) (#181312)

Fix LLDB header guards using clang-tidy's llvm-header-guard check. A
bunch of headers have been moved or renamed and we often forget to
update the header guard.

Delta		File
+3	-4	lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h
+3	-3	lldb/include/lldb/Breakpoint/StoppointHitCounter.h
+3	-3	lldb/include/lldb/Core/DebuggerEvents.h
+3	-3	lldb/include/lldb/Core/Declaration.h
+3	-3	lldb/include/lldb/Core/SourceLocationSpec.h
+3	-3	lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPlatformPythonInterface.h
+18	-19	79 files not shown
+229	-230	85 files

LLVM/project 5ab9cbe — llvm/test/CodeGen/ARM fp-intrinsics-vector-v8.ll, llvm/test/CodeGen/Thumb2/mve-intrinsics strict-round.ll

2026-02-13 06:20:40 UTC by Serge Pavlov via GitHub on ⎇

main

[ARM] Precommit tests: strictfp rounding vector intrinsics (#180479)

Delta		File
+154	-0	llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-round.ll
+82	-0	llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
+236	-0	2 files

LLVM/project 4b88753 — lld/ELF RelocScan.h Relocations.cpp, lld/ELF/Arch X86.cpp X86_64.cpp

2026-02-13 06:10:13 UTC by Fangrui Song on ⎇

main

[ELF] Add target-specific relocation scanning for x86 (#178846)

Implement scanSection/scanSectionImpl for i386 and x86-64 to

* enable devirtualization of getRelExpr calls
* eliminate abstraction overhead for PLT-to-PCRel optimization, TLS
relocations
* optimize for R_X86_64_PC32 and R_X86_64_PLT32: they consist of 95%
  relocations in `lld/ELF/**/*.o` files.
* enable future optimization to remove `loc` from `getRelExpr` (only
  used by X86.cpp `R_386_GOT32[X]`)

at the cost of more boilerplate.

TLS relocation handling is inlined into scanSectionImpl. Also,

- Remove getTlsGdRelaxSkip
- Replace TLS-optimization-specific expressions:
- R_RELAX_TLS_GD_TO_LE, R_RELAX_TLS_LD_TO_LE, R_RELAX_TLS_IE_TO_LE →

    [16 lines not shown]

Delta		File
+147	-92	lld/ELF/Arch/X86.cpp
+147	-49	lld/ELF/Arch/X86_64.cpp
+105	-2	lld/ELF/RelocScan.h
+11	-1	lld/ELF/Relocations.cpp
+410	-144	4 files

LLVM/project a809d64 — llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp RISCVISelLowering.cpp

2026-02-13 06:06:01 UTC by Craig Topper via GitHub on ⎇

main

[RISCV] Remove RISCVISD::WMACC*. Match during isel. NFC (#181197)

I think we may want to be able to fold ADDD nodes independent of the MUL
in some cases. For example turning NSRAI into NSRARI.

If we fold ADDD into WMACC we would need to be able to extract it again.
Keep the nodes separate avoids this.

Code change was assisted by AI.

Delta		File
+98	-62	llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+0	-76	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+0	-13	llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+1	-0	llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
+99	-151	4 files

LLVM/project a89e766 — llvm/lib/Transforms/Scalar IndVarSimplify.cpp, llvm/test/Transforms/IndVarSimplify scev-update-loop-opt.ll

2026-02-13 05:52:34 UTC by Anshil Gandhi via GitHub on ⎇

main

[IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (#181296)

getTruncateExpr may not always return a SCEVAddRecExpr when truncating
loop bounds. Add a check to verify the result type before casting, and
bail out of the transformation if the cast would be invalid.

This prevents potential crashes from invalid casts when dealing with
complex loop bounds.

Co-authored by Michael Rowan

Resolves
[https://github.com/llvm/llvm-project/issues/153090](https://github.com/llvm/llvm-project/issues/153090)

Delta		File
+149	-0	llvm/test/Transforms/IndVarSimplify/scev-update-loop-opt.ll
+18	-8	llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
+167	-8	2 files

LLVM/project 48566b2 — mlir/include/mlir/Dialect/XeGPU/TransformOps XeGPUTransformOps.td, mlir/lib/Dialect/XeGPU/TransformOps XeGPUTransformOps.cpp

2026-02-13 05:49:59 UTC by Tuomas Kärnä via GitHub on ⎇

main

[MLIR][XeGPU][TransformOps] set_op_layout_attr supports setting anchor layout (#172542)

Changes `transform.xegpu.set_op_layout_attr` to support xegpu anchor
layouts. By default, if `result` and `operand` bool arguments are unset,
this transform op sets the op's anchor layout, if the op supports it
(otherwise emits a silenceable failure).

In contrast to the earlier implementation, setting the operand layout
now requires setting the new `operand` argument.

Delta		File
+104	-34	mlir/test/Dialect/XeGPU/transform-ops.mlir
+42	-6	mlir/lib/Dialect/XeGPU/TransformOps/XeGPUTransformOps.cpp
+33	-5	mlir/test/python/dialects/transform_xegpu_ext.py
+15	-9	mlir/include/mlir/Dialect/XeGPU/TransformOps/XeGPUTransformOps.td
+20	-1	mlir/test/Dialect/XeGPU/transform-ops-invalid.mlir
+4	-0	mlir/python/mlir/dialects/transform/xegpu.py
+218	-55	6 files

LLVM/project 3b7acb4 — clang/test/OpenMP task_codegen.cpp threadprivate_codegen.cpp, llvm/test/CodeGen/AArch64 clmul-fixed.ll

2026-02-13 05:26:19 UTC by Serge Pavlov via GitHub on ⎇

users/spavloff/arm.test

Merge branch 'main' into users/spavloff/arm.test

Delta		File
+5,835	-5,584	llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
+5,528	-5,528	llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+4,314	-4,314	llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+3,458	-2,041	clang/test/OpenMP/task_codegen.cpp
+2,140	-2,140	clang/test/OpenMP/threadprivate_codegen.cpp
+4,119	-13	llvm/test/CodeGen/AArch64/clmul-fixed.ll
+25,394	-19,620	3,758 files not shown
+209,468	-97,429	3,764 files

LLVM/project da9c513 — clang/include/clang/CIR/Dialect/IR CIRAttrs.td, clang/include/clang/CIR/Interfaces ASTAttrInterfaces.td

2026-02-13 05:22:44 UTC by Bruno Cardoso Lopes via GitHub on ⎇

main

[CIR][LoweringPrepare] Emit guard variables for static local initialization (#179828)

This implements the lowering of static local variables with the Itanium C++ ABI
guard variable pattern in LoweringPrepare. This is initial support, errorNYI covering all that hasn't been added just yet.

When a GlobalOp has the static_local attribute and a ctor region, this pass:
1. Creates a guard variable global (mangled name from AST)
2. Inserts the guard check pattern at each GetGlobalOp use site:
   - Load guard byte with acquire ordering
   - If zero, call __cxa_guard_acquire
   - If acquire returns non-zero, inline the ctor region code
   - Call __cxa_guard_release
3. Clears the static_local attribute and ctor region from the GlobalOp

Once the new design doc lands I'll add more information over there.

Delta		File
+405	-2	clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+35	-2	clang/test/CIR/CodeGen/static-local.cpp
+19	-4	clang/lib/CIR/CodeGen/CIRGenDeclCXX.cpp
+20	-0	clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+0	-12	clang/include/clang/CIR/Interfaces/ASTAttrInterfaces.td
+7	-3	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+486	-23	6 files not shown
+501	-37	12 files

LLVM/project e999b50 — llvm/lib/Transforms/Utils MatrixUtils.cpp

2026-02-13 05:10:38 UTC by Aiden Grossman on ⎇

users/boomanaiden154/profcheckmatrix-add-profile-data-where-relevant

wording

Created using spr 1.3.7

Delta		File
+2	-2	llvm/lib/Transforms/Utils/MatrixUtils.cpp
+2	-2	1 files

LLVM/project 59cf57e — llvm/lib/Transforms/Utils MatrixUtils.cpp

2026-02-13 05:07:38 UTC by Aiden Grossman on ⎇

users/boomanaiden154/profcheckmatrix-add-profile-data-where-relevant

feedback

Created using spr 1.3.7

Delta		File
+2	-2	llvm/lib/Transforms/Utils/MatrixUtils.cpp
+2	-2	1 files

LLVM/project cbb978f — llvm/test/CodeGen/RISCV/rvv vabs.ll vabdu.ll

2026-02-13 04:50:42 UTC by Zhenxuan Sang via Pengcheng Wang on ⎇

users/wangpc-pp/spr/clangriscv-add-zvabd-intrinsics

Add masked .ll tests

Created using spr 1.3.6-beta.1

Delta		File
+469	-288	llvm/test/CodeGen/RISCV/rvv/vabs.ll
+295	-171	llvm/test/CodeGen/RISCV/rvv/vabdu.ll
+295	-171	llvm/test/CodeGen/RISCV/rvv/vabd.ll
+249	-145	llvm/test/CodeGen/RISCV/rvv/vwabdau.ll
+249	-145	llvm/test/CodeGen/RISCV/rvv/vwabda.ll
+1,557	-920	5 files