BSD Commit Log Search

Transparent functions for all gsl::Pointers

[LifetimeSafety] Handle temporaries of non-trivial view types

[AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR

When users request branch protection with PAuthLR on targets that do not
support the PAuthLR instructions, the PAUTH_EPILOGUE falls back to using
hint-space instructions. This fallback sequence uses X16 as a temporary
register, but X16 was not listed in the clobber set.

Because Speculative Load Hardening uses X16, this omission made SLH
incompatible with this PAUTH_EPILOGUE path.

Mark X16 as clobbered so the compiler does not assume X16 is preserved across
the epilogue, restoring compatibility with Speculative Load Hardening and
avoiding incorrect register liveness assumptions. The clobber is added in C++
rather than TableGen, as X16 is only clobbered when PAuthLR is requested as a
branch protection variation and should not be treated as clobbered
unconditionally.

[SLP]Support for tree throttling in SLP graphs with gathered loads

Gathered loads forming DAG instead of trees in SLP vectorizer. When
doing the throttling analysis for such graphs, need to consider partially
matched gathered loads DAG nodes and consider extract and/or gather
operations and their costs.
The patch adds this analysis and allows cutting off the expensive
sub-graphs with gathered loads.

Reviewers: hiraditya, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/177855

Recommit after revert in d733771113339608aff6002d1fa89aaf4a51c502, which
was related to a crash in SelectionDAG

[VectorCombine] Fix crash when folding select of bitcast (#177183)

Fixes #177144. Nits appreciated.

The fold in question does the following transformation:
Before
```
%bc = bitcast <4 x i32> %src to <16 x i8>
%e0 = extractelement <16 x i8> %bc, i32 0
%s0 = select i1 %cond, i8 %e0, i8 0
%e1 = extractelement <16 x i8> %bc, i32 1
%s1 = select i1 %cond, i8 %e1, i8 0
...
```

After
```
%sel = select i1 %cond, <4 x i32> %src, <4 x i32> zeroinitializer
%bc = bitcast <4 x i32> %sel to <16 x i8>

    [12 lines not shown]

use string_view

[AArch64] Remove dead code emission in Pointer Authentication (#175989)

The AArch64 Pointer Authentication pass was emitting address
materialization instructions that were never used. These instructions
formed dead code and served no purpose in the final control flow.

Remove the unnecessary ADRP/ADD sequence from the Pointer Auth codegen
and update the corresponding test to reflect the simplified output.

This avoids generating dead instructions and keeps the PAUTH LR sequence
minimal and correct.

[AArch64] Refactor PACM emission in Pointer Authentication (NFC) (#175937)

Refactor the emission of PACM instructions in the AArch64 Pointer
Authentication code to simplify the control flow and reduce duplication.

This change consolidates the PACM generation logic, making the code
easier to follow and less error-prone, while preserving the existing
behavior and generated output.

No functional change is intended beyond the internal refactoring.

[flang] Converted five tests from old lowering to new lowering (part 9) (#176310)

Tests converted from test/Lower: c-interoperability-c-pointer.f90,
c-interoperability.f90, character-elemental.f90,
character-local-variables.f90, complex-operations.f90

[LV] Add support for llvm.vector.partial.reduce.fadd (#163975)

Allows the Loop Vectorizer to generate `llvm.vector.partial.reduce.fadd`
intrinsics when sequences which match its requirements are found.

[Review] Avoid repeating the type

[Review] add const and rename

[Review] reuse vector

[Review] Add const

[AArch64][llvm] Allow some `tlbip` insns to be used with only +tlbid

Allow `tlbip` instructions containing *E1IS*, *E1OS*, *E2IS* or *E2OS*
to be used with `+tlbid` or `+d128`. This is because the 2025 Armv9.7-A
MemSys specification says:

```
All TLBIP *E1IS*, TLBIP*E1OS*, TLBIP*E2IS* and TLBIP*E2OS* instructions
that are currently dependent on FEAT_D128 are updated to be dependent
on FEAT_D128 or FEAT_TLBID
```

[libc] Do not use stack protectors or frame pointers on GPU

Summary:
This doesn't work because they're unused in some contexts. Added in
https://github.com/llvm/llvm-project/pull/178136

[AArch64][GlobalISel] Add support for scalar variants of neon right shifts (#178207)

Neon intrinsics are able to operate on single-element vectors (e.g <1 x
i64>). However, LLVM doesn't allow single-element vectors, and instead
converts them to scalar values (e.g i64) in the frontend.
To get around this, the backend must place these scalar values onto an
fpr register bank, in order for the intrinsic to operate on the value as
a vector.

Previously, scalar right shift intrinsics were not legalising due to
misconfigured logic in AArch64LegalizerInfo, which treated non-vector
variants of these intrinsics as invalid.
This has been fixed so that the following can lower:
sqshrn
sqshrun
sqrshrn
sqrshrun
uqshrn
uqrshrn

[Review] miscleaneaous renaming

[Review] found -> reached

[Review] move second loop to helper method

[clang][test] Replace stdint include with uintptr_t typedef (#178125)

This is what we usually do in tests.

[Review] Move loop body to helper method

[CIR] Implement returns_twice, cold, hot, noduplicate, convergent func attrs (#178289)

Continuing my quest to get most of the attributes completed, this patch
implements 5 attributes for CIR/Clang CIR codegen.

4 of the 5 are also implemented in LLVM-MLIR, since 'convergent' was
already there.

As a part of this, we also had to make sure that attributes were handled
properly for Call operation lowering, like we do for function
attributes.

[DAG] SDPatternMatch - Add matchers for reassociatable additions with NSW/NUW flags (#177973)

Fixes #176809

[X86] vectorizeExtractedCast - don't assume vector source type is simple (#178414)

Fixes #178410

Formatting

[Clang] prevent preprocessor crash on incomplete scoped __has_cpp_attribute arguments (#178273)

Fixes #178098

---

This patch addressed the issue when `__has_cpp_attribute` is expanded
with incomplete scoped attributes. The scoped name parsing can lex to
`eof`/`eod` at


https://github.com/llvm/llvm-project/blob/3f5a5d45d18a514f086f3e07c9676ca5fb95bbe9/clang/lib/Lex/PPMacroExpansion.cpp#L1877-L1881

and then proceed with


https://github.com/llvm/llvm-project/blob/3f5a5d45d18a514f086f3e07c9676ca5fb95bbe9/clang/lib/Lex/PPMacroExpansion.cpp#L1425-L1430



    [8 lines not shown]

[LifetimeSafety] Detect dangling fields (#177363)

Detect dangling field references when stack memory escapes to class
fields. This change extends lifetime safety analysis to detect a common
class of temporal memory safety bugs where local variables or parameters
are stored in class fields but outlive their scope.

- Added a new `FieldEscapeFact` class to represent when an origin
escapes via assignment to a field
- Refactored `OriginEscapesFact` into a base class with specialized
subclasses for different escape scenarios
- Added detection for stack memory escaping to fields in constructors
and member functions
- Implemented new diagnostic for dangling field references with
appropriate warning messages

Importantly,
- Added `AddParameterDtors` option to CFG to add parameter dtors and
lifetime ends behind an option. In principle, parameters ctors and dtors

    [4 lines not shown]

[mlir][emitc] Remove unused #include

[lldb][windows] fix an invalid cast from a file descriptor to a HANDLE (#178238)