LLVM/project fe2f7e4clang/include/clang/Options Options.td, clang/lib/Driver/ToolChains CommonArgs.cpp Clang.cpp

[flang] Support -ffunction-sections and -fdata-sections. (#199731)

Wire the flags through the driver, frontend, and TargetMachine, and add
driver and codegen lit tests.

Fixes https://github.com/llvm/llvm-project/issues/163550

---------

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+48-0flang/test/Integration/function-sections.f90
+35-0flang/test/Driver/function-sections.f90
+14-0clang/lib/Driver/ToolChains/CommonArgs.cpp
+1-12clang/lib/Driver/ToolChains/Clang.cpp
+8-0flang/lib/Frontend/CompilerInvocation.cpp
+4-4clang/include/clang/Options/Options.td
+110-164 files not shown
+124-1610 files

LLVM/project 05d152blibc/hdr/types struct_in6_addr.h CMakeLists.txt, libc/include CMakeLists.txt

[libc] Add definition of struct in6_addr to netinet/in.h (#201057)

This patch implements the struct in6_addr definition for netinet/in.h,
mapping it from netinet/in.yaml to the generated public header.

I've defined struct in6_addr under include/llvm-libc-types/ using an
anonymous union containing s6_addr, s6_addr16, and s6_addr32 (only the
first one is mandated by POSIX). Other implementations achieve this by
using a named union and defining the members as macros. This approach is
cleaner, but could potentially run into compatibility problems with code
which expects s6_addr is a macro. If we do, we may have to re-evaluate
this approach, but I'd like to avoid uglyfying this preemptively.

I added a simple test to check the memory layout of the address.

Assisted by Gemini.
DeltaFile
+54-0libc/test/src/netinet/in_test.cpp
+26-0libc/hdr/types/struct_in6_addr.h
+22-0libc/include/llvm-libc-types/struct_in6_addr.h
+13-0libc/test/src/netinet/CMakeLists.txt
+9-0libc/hdr/types/CMakeLists.txt
+1-0libc/include/CMakeLists.txt
+125-02 files not shown
+127-08 files

LLVM/project 2511bddlldb/test/API/qemu TestQemuLaunch.py

[lldb] Skip TestQemuLaunch.py on arm64e (#200969)

This test is set up to use a python-based qemu-like stub instead of the
actual qemu (which makes it far more portable). When trying to run the
test as arm64e, LLDB will attempt to launch an arm64e-based qemu.
Because the fake qemu is a python script, LLDB will try to launch python
as arm64e. Neither the python that ships with Xcode nor the python from
python.org have an arm64e slice, so this test will not work for arm64e.
DeltaFile
+1-0lldb/test/API/qemu/TestQemuLaunch.py
+1-01 files

LLVM/project 6dfef47clang/lib/CodeGen CGBuiltin.cpp, libcxx/test/libcxx/atomics builtin_clear_padding.pass.cpp

[clang] Treat unnamed bitfields as padding in `__builtin_clear_padding` (#201102)

Currently Clang's implementation of `__builtin_clear_padding` diverges
from GCC in its treatment of unnamed bitfields.

GCC treats them as padding (which seems correct since they can't be
named and wouldn't be part of the value representation of an object,
though I'm not sure what the standard has to say about this).

[Gobdolt](https://godbolt.org/z/e9Mo91dhh)

GCC trunk:
```
pre-clear bytes:   ff ff ff ff
post-clear bytes:  01 00 00 80
```

Clang trunk:
```

    [7 lines not shown]
DeltaFile
+20-0libcxx/test/libcxx/atomics/builtin_clear_padding.pass.cpp
+4-0clang/lib/CodeGen/CGBuiltin.cpp
+24-02 files

LLVM/project d9cf2e1clang/lib/CodeGen TargetInfo.h CodeGenModule.cpp, clang/lib/CodeGen/Targets SystemZ.cpp

[SystemZ][z/OS] Add XPLink ABI on z/OS (#188501)

This patch introduces full support for the XPLINK calling convention on
z/OS within LLVM. XPLINK is documented in the Language Environment
Vendor Interface ([Chapter
22](https://www.ibm.com/docs/en/zos/3.2.0?topic=applications-call-linkage-convention-amode-64))
and in the IBM Redbook [XPLink: OS/390 Extra Performance
Linkage](http://www.redbooks.ibm.com/abstracts/sg245991.html?Open
). It defines a high‑performance linkage model used by the z/OS Language
Environment (LE) and by the XL C/C++ compiler.
This work succeeds and replaces the earlier effort in [PR
101024](https://github.com/llvm/llvm-project/pull/101024). The present
implementation restructures the original approach, significantly expands
test coverage, and aligns more closely with both the architectural
requirements of XPLINK and the de‑facto ABI behaviour of XL C/C++.
DeltaFile
+488-0clang/test/CodeGen/SystemZ/zos-abi.c
+370-0clang/lib/CodeGen/Targets/SystemZ.cpp
+96-0clang/test/CodeGen/SystemZ/zos-abi.cpp
+4-0clang/lib/CodeGen/TargetInfo.h
+2-0clang/lib/CodeGen/CodeGenModule.cpp
+960-05 files

LLVM/project 13e5325lldb/packages/Python/lldbsuite/test decorators.py

[lldb] Skip simulator platform tests on arm64e (#200505)

Simulators do not support arm64e.
DeltaFile
+3-0lldb/packages/Python/lldbsuite/test/decorators.py
+3-01 files

LLVM/project bc056eaclang-tools-extra/clangd/index SymbolCollector.cpp, clang/include/clang/Basic FileSystemStatCache.h FileManager.h

[clang] Remove `FileSystemStatCache` (#198411)

This mechanism is not used anywhere, and can be easily reimplemented in
terms of a VFS if needed.
DeltaFile
+90-238clang/unittests/Basic/FileManagerTest.cpp
+0-121clang/lib/Basic/FileSystemStatCache.cpp
+62-30clang/lib/Basic/FileManager.cpp
+0-89clang/include/clang/Basic/FileSystemStatCache.h
+0-26clang/include/clang/Basic/FileManager.h
+2-5clang-tools-extra/clangd/index/SymbolCollector.cpp
+154-5093 files not shown
+156-5179 files

LLVM/project 55af104lldb/source/Plugins/Process/Windows/Common/arm RegisterContextWindows_arm.cpp, lldb/source/Plugins/Process/Windows/Common/x64 RegisterContextWindows_x64.cpp

[lldb][windows] return false in default branch of RegisterContextWindows_*::WriteRegister (#200885)
DeltaFile
+11-3lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
+4-0lldb/source/Plugins/Process/Windows/Common/arm/RegisterContextWindows_arm.cpp
+1-0lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
+16-33 files

LLVM/project 823ff37clang/include/clang/CIR InitAllDialects.h, clang/include/clang/CIR/Dialect CIRDialectRegistration.h

Address Comments & Use MLIR's shape global dialect initialization
DeltaFile
+37-0clang/include/clang/CIR/InitAllDialects.h
+37-0clang/lib/CIR/RegisterAllDialects.cpp
+0-32clang/include/clang/CIR/Dialect/CIRDialectRegistration.h
+0-28clang/lib/CIR/Dialect/CIRDialectRegistration.cpp
+24-0clang/test/CIR/IR/openacc.cir
+8-5clang/lib/CIR/CodeGen/CIRGenerator.cpp
+106-657 files not shown
+124-8313 files

LLVM/project 3658dafclang/lib/Basic/Targets OSTargets.h

[Driver] Switch clang++ to default Solaris 11.4 compilation environment (#201063)

`clang++` has long followed `g++`'s lead predefining `_XOPEN_SOURCE=600`
on Solaris. As detailed in [Switch g++ to default Solaris 11.4
compilation
environment](https://gcc.gnu.org/pipermail/gcc-patches/2026-May/716990.html),
this is no longer necessary in Solaris 11.4.

Tested on `amd64-pc-solaris2.11` and `sparcv9-sun-solaris2.11`.
DeltaFile
+0-1clang/lib/Basic/Targets/OSTargets.h
+0-11 files

LLVM/project 824fc06mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR omptarget-declare-target-llvm-device-2.mlir

[Flang][OpenMP] Declare Target fixes for USM and declare target to (#200248)

Currently declare target enter would fall through the if statement even
though it's a synonym of declare target to, so fix this via adding a
simpler and more readable check for link clause instead.

USM declare target to works a little differently to regular link cases,
where the type is actually converted into a pointer, rather than a
global of the original typing. So, add a caveat where we convert the
type to a pointer if requires usm has been triggered. This gets the
correct behaviour in USM mode on USM devices.
DeltaFile
+50-0mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-device-2.mlir
+22-21mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+72-212 files

LLVM/project e3bc082llvm/lib/Target/PowerPC PPCTargetMachine.cpp, llvm/test/CodeGen/PowerPC aix-codemodel.ll ppc-i128-cmp.ll

[AIX][LLVM] Update the default code model for 64-bit (#199301)

This changes the default code model on 64-bit AIX to large.

For many applications, the existing small code model is simply
inadequate to build. Users often then end up relying on expensive linker
fixups (i.e. -Wl,-bigtoc) to work around the issue when they would have
been better served by moving to the larger code model. Our analysis and
benchmarking leads us to believe this's generally a net benefit to
users.

(Assisted by AI)
DeltaFile
+24-0llvm/test/CodeGen/PowerPC/aix-codemodel.ll
+5-1llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+1-1llvm/test/CodeGen/PowerPC/ppc-i128-cmp.ll
+30-23 files

LLVM/project 836bf56llvm/include/llvm/ADT CachedHashString.h DenseMapInfo.h

[ADT] Remove unused DenseMapInfo::getTombstoneKey (#200959)

#200595 changed DenseMap to no longer create tombstone buckets, so
DenseMapInfo<T>::getTombstoneKey() is never called. Remove dead
definitions and dead tombstone branches.
DeltaFile
+12-28llvm/include/llvm/ADT/CachedHashString.h
+0-32llvm/include/llvm/ADT/DenseMapInfo.h
+0-13llvm/include/llvm/ADT/BitVector.h
+0-13llvm/include/llvm/ADT/SmallBitVector.h
+0-9llvm/include/llvm/ADT/ArrayRef.h
+0-8llvm/include/llvm/ADT/APFixedPoint.h
+12-10320 files not shown
+13-18626 files

LLVM/project b65054fllvm/include/llvm/Transforms/Utils TriggerCrashPass.h, llvm/lib/CodeGen TargetPassConfig.cpp

Reland [LLVM] Add flags to crash the opt/codegen pipeline (#201146)

Will be used for testing crash reduction.

Reland of #200967. Test needs `REQUIRES: backtrace`.
DeltaFile
+43-0llvm/lib/Transforms/Utils/TriggerCrashPass.cpp
+39-0llvm/include/llvm/Transforms/Utils/TriggerCrashPass.h
+1-22llvm/lib/Passes/PassBuilder.cpp
+15-0llvm/test/Other/trigger-crash-flags.ll
+10-0llvm/lib/CodeGen/TargetPassConfig.cpp
+8-0llvm/lib/Passes/PassBuilderPipelines.cpp
+116-222 files not shown
+118-228 files

LLVM/project a661558llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.sched.group.barrier.gfx12.ll

[AMDGPU] Add IGLP mutations to CoexecSched (#200981)

Adds IGLP mutations support to CoexecSched -- regular handling of this
mutation in GCNSchedStage is implemented in GCNSchedStrategy.cpp
DeltaFile
+116-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.gfx12.ll
+4-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+120-12 files

LLVM/project af5506cllvm/test/CodeGen/RISCV callee-saved-gprs.ll vararg.ll, llvm/test/CodeGen/RISCV/GlobalISel vararg.ll

Revert "[RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (#193962)" (#201041)

This reverts commits:

* 46e07d38e078799fa83386ef2b3b5ee423a467c5
* b5d577d3faef34276991fe80b5f869e3f8ef7442

This change is causing a miscompile in zstd, see the discussion under
https://github.com/llvm/llvm-project/pull/193962 for more details.
DeltaFile
+316-316llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
+303-295llvm/test/CodeGen/RISCV/vararg.ll
+246-241llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
+224-224llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+128-128llvm/test/CodeGen/RISCV/xqccmp-callee-saved-gprs.ll
+75-75llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
+1,292-1,27919 files not shown
+1,477-1,48825 files

LLVM/project 22ef7baclang/include/clang/Basic DiagnosticIDs.h

[clang][NFC] Bump the maximum number of Sema diagnostics (#200948)

The number of Sema diagnostics in DiagnosticSemaKinds.td has reached the
5000 limit. This PR increases the max limit to 6000.
DeltaFile
+1-1clang/include/clang/Basic/DiagnosticIDs.h
+1-11 files

LLVM/project 7b199bdlldb/include/lldb/Symbol Symbol.h

[lldb] Fix Symbol static_assert for 32 bit Windows (#201130)

Follow up to
https://github.com/llvm/llvm-project/pull/200919#issuecomment-4600914496
DeltaFile
+1-1lldb/include/lldb/Symbol/Symbol.h
+1-11 files

LLVM/project 9f790fcllvm/lib/Target/SPIRV SPIRVBuiltins.cpp, llvm/test/CodeGen/SPIRV/transcoding enqueue_kernel.ll

[SPIR-V] Fix i8 pointer type for NULL events in OpEnqueueKernel (#201125)
DeltaFile
+25-17llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+2-4llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
+27-212 files

LLVM/project 45ebcb4mlir/include/mlir/Dialect/SCF/IR SCFOps.td, mlir/lib/Dialect/SCF/IR SCF.cpp

allow early exit from execute_region
DeltaFile
+702-0mlir/test/Dialect/SCF/lower-early-exit.mlir
+487-0mlir/lib/Dialect/SCF/Transforms/LowerEarlyExit.cpp
+287-51mlir/lib/Dialect/SCF/IR/SCF.cpp
+143-0mlir/test/Dialect/Arith/int-range-early-exit.mlir
+103-12mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
+86-0mlir/test/Analysis/DataFlow/test-early-exit.mlir
+1,808-6322 files not shown
+2,457-19328 files

LLVM/project cf25fb1flang/lib/Semantics check-omp-metadirective.cpp check-omp-structure.cpp, flang/test/Semantics/OpenMP declare-variant-match.f90 declare-variant.f90

[flang][OpenMP] Add structure checks for DECLARE VARIANT (#198799)

This PR adds declare-variant structure checking. Following checks are
added:

- Validate [base:]variant arguments (including implicit base for
single-name form).
- Require exactly one MATCH clause; reject a second MATCH on the same
directive.
- Reject duplicate (base, variant) across multiple declare variant
directives.
- Reject clauses not allowed on declare variant.
- Apply shared context-selector checks to MATCH (reuse metadirective
logic).
- Require constant user conditions in MATCH for declare variant (dynamic
selectors deferred).

Refactor metadirective support:


    [4 lines not shown]
DeltaFile
+162-5flang/lib/Semantics/check-omp-metadirective.cpp
+118-0flang/test/Semantics/OpenMP/declare-variant-match.f90
+1-53flang/lib/Semantics/check-omp-structure.cpp
+30-0flang/test/Semantics/OpenMP/declare-variant.f90
+6-0flang/lib/Semantics/check-omp-structure.h
+317-585 files

LLVM/project 516867bllvm/lib/CodeGen PseudoProbeInserter.cpp, llvm/test/CodeGen/AArch64 aarch64-pseudo-probe-tail-call.ll

[PseudoProbe] Preserve pseudoprobe for tailcall pseudo instrs (#197246)

Preserve probes for tail call pseudo instructions. 

On AArch64, X86, and other platforms, the lowering of tail calls
requires a pseudo instruction like `TCRETURNdi`. It is often the case
that `TCRETURNdi` is within its own MBB, and the direct call probe
associated with that tail call is considered dangling and removed. This
patch tries to preserve that.
DeltaFile
+47-0llvm/test/CodeGen/X86/pseudo-probe-tail-call.ll
+46-0llvm/test/CodeGen/AArch64/aarch64-pseudo-probe-tail-call.ll
+15-3llvm/lib/CodeGen/PseudoProbeInserter.cpp
+108-33 files

LLVM/project 3248c01llvm/include/llvm/Analysis TargetLibraryInfo.h, llvm/lib/Analysis TargetLibraryInfo.cpp

better/less hacky implementation

Created using spr 1.3.8-wip
DeltaFile
+37-36llvm/lib/Analysis/TargetLibraryInfo.cpp
+3-5llvm/include/llvm/Analysis/TargetLibraryInfo.h
+40-412 files

LLVM/project 9083fb2llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/test/CodeGen/AArch64 special-reg.ll machine-sme-abi-find-insert-pt.mir

Revert "[AArch64] Fix definition of system register move instructions" (#201137)

Reverts llvm/llvm-project#185709
DeltaFile
+1,044-1,044llvm/lib/Target/AArch64/AArch64SystemOperands.td
+17-19llvm/test/MC/Disassembler/AArch64/armv8.7a-xs.txt
+11-24llvm/test/CodeGen/AArch64/special-reg.ll
+17-17llvm/test/MC/Disassembler/AArch64/armv8.8a-nmi.txt
+13-13llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
+0-26llvm/test/CodeGen/AArch64/arm64-invalid-sys-reg.ll
+1,102-1,14328 files not shown
+1,204-1,34634 files

LLVM/project 63a1b9dllvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/test/CodeGen/AArch64 sve-ldst-multi-vec.mir

[AArch64][SME] Add multi-vector store/load opcodes to getMemOpInfo (#201073)

Follow-up to #200238
DeltaFile
+667-0llvm/test/CodeGen/AArch64/sve-ldst-multi-vec.mir
+112-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+779-02 files

LLVM/project 0212229.ci/green-dragon lldb-windows.groovy

[CI] install packaging before running lldb tests on Windows (#201112)

https://ci-external.swift.org/job/lldb-windows/job/main/ is failing
because lldb API tests require the `packaging` module.

This patch installs it before running the `check-lldb` target.
DeltaFile
+2-0.ci/green-dragon/lldb-windows.groovy
+2-01 files

LLVM/project 75334ffllvm/include/llvm/Analysis TargetLibraryInfo.h, llvm/lib/Analysis TargetLibraryInfo.cpp

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+135-48llvm/lib/Analysis/TargetLibraryInfo.cpp
+0-115llvm/unittests/Analysis/ReplaceWithVecLibTest.cpp
+34-19llvm/include/llvm/Analysis/TargetLibraryInfo.h
+0-1llvm/unittests/Analysis/CMakeLists.txt
+169-1834 files

LLVM/project 350fc57llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp

[review] Reduce compile-time overhead.
DeltaFile
+13-11llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+13-111 files

LLVM/project 726aafcllvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp

[reviews] reduce overhead
DeltaFile
+8-6llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+8-61 files

LLVM/project 436e661llvm/test/CodeGen/AMDGPU udiv-miscompilation.ll

[reviews] Improve test.
DeltaFile
+70-2llvm/test/CodeGen/AMDGPU/udiv-miscompilation.ll
+70-21 files