[CIR] Implement missing __sync_* atomic builtins (#214606)
Add CIR codegen support for five legacy __sync_* builtins that
previously emitted "Not Yet Implemented" errors:
__sync_val_compare_and_swap -> cir.atomic.cmpxchg (seq_cst)
__sync_bool_compare_and_swap -> cir.atomic.cmpxchg + cmp (seq_cst)
__sync_swap -> cir.atomic.xchg (seq_cst)
__sync_lock_test_and_set -> cir.atomic.xchg (seq_cst)
__sync_lock_release -> cir.store 0 (release)
Size-suffixed forms (_1, _2, _4, _8) are handled, covering 20 builtin
variants in total; the unsuffixed forms are rewritten by Sema and the
_16 variants fall back to errorBuiltinNYI.
The existing emitBinaryAtomic / emitBinaryAtomicPost infrastructure
already handled the arithmetic __sync_* family (fetch_and_add, etc.).
This patch adds the remaining compare-and-swap, exchange, and
lock-release helpers: emitAtomicCmpXchgValue, emitAtomicCmpXchgBool,
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Restrict intrinsic to fixed->scalable with same min EC
This simplifies a lot of the legalisation code. The codegen regressions
for 64b -> scalable 128b can be addressed with a DAG combiner in a
follow-up.
[analyzer] Move the lifetime checkers from alpha.cplusplus to alpha.core (#216739)
This PR moves the lifetime checkers from `alpha.cplusplus` to
`alpha.core`. This PR is the beginning of future PRs that will bring the
lifetime checkers from `alpha` to `core`. To meet the requirements of a
`core` checker there are still missing works for these checkers that is
the reason this PR only moves them from `alpha.cplusplus` to
`alpha.core`.
[mlir][LLVM] Use a disjoint scope domain when inlining noalias
This matches recent changes to the LLVM inliner.
AI disclosure: Claude wrote the code, I wrote the commit message and
have done initial review.
[mlir][LLVM] Add disjointScopes to AliasScopeDomainAttr
This also updates the MLIR-side inliner to clone disjoint domains
while cloning alias scopes, matching changes to LLVM.
AI disclosure: Claude wrote the code, I wrote the commit message and
looked at the code.
[AMDGPU] Use a disjoint scope domain for noalias kernel arguments
All noalias arguments of a kernel are disjoint with each other, so we
can use a disjoint scope to save on metadata construction.
AI disclosure: Claude wrote this, I looked at it and wrote this
message.
[AMDGPU] Use a disjoint scope domain for merged LDS structs
When lowering LDS values, all the values are mutually disjoint, so we
can use the newly-added disjoint scopes feature to simplify the IR.
AI disclosure: Claude wrote this and I reviewed it and wrote the
commit message
[IR] Add alias scope domains with disjoint scopes
See RFC at
https://discourse.llvm.org/t/rfc-disjoint-scope-alias-scope-noalias-domains/91537
This commit adds support for declaring an alias scope domain disjoint.
Disjoint domains are ones where each scope is implicitly `!noalias`
with each other scope in the domain. This is represented by adding an
`i1` into the scope's domain as the second argument, with `i1 true`
representing disjoint scopes and `i1 false` representing the old
non-disjoint behavior. AutoUpgrade mechanisms have been added to add
in the missing `i1 false` to existing metadata.
This commit updates alias analysis to know about disjoint scopes and
updates the function cloner to also clone the alias domain if it's
disjoint (since, as a herd of LLMs discovered, you don't want the old
IR to be noalias with a clone of itself).
Commits to migrate passes to use disjoint scopes where that's an
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[Inliner] Use a disjoint scope domain for noalias arguments
InlineFunction creates alias.scope/noalias metadata to represent the
set of `noalias` arguments to a function. We don't need the `!noalias`
now that we have the ability to use disjoint scopes, saving us IR size
and metadata bloat.
TODO move these to a previous commit.
Also changes InstCombine to not drop the experimental.noalias.scope.decl
for disjoint scopes even if they're not mentioned in a `!noalias`, but
do still delete them if they're not used.
[UTC] Don't rename %. inside quoted strings in test checkseg (#218767)
Replacing `%.foo` with `%dotfoo` everywhere also caught any `%.foo`
inside metadata, which would then cause incorrect CHECK lines to be
generated (since the value in the metedata isn't going to be
modified).
This commit fixes this by moving from a search-replace on the input to
mangling in the variable name emitter.
AI disclosure: Claude found and fixed this, I wrote the commit message.
[clang][Sema] Fix iterator invalidation in isLayoutCompatibleUnion (#219112)
This patch fixes an iterator invalidation bug in
isLayoutCompatibleUnion.
Without this patch, if we delete a matching field, we end up
evaluating I == E even though the iterators are invalidated. Deleting
a match after the loop fixes the problem.
This bug was discovered with tightened epoch checks in
SmallPtrSetIterator.
Assisted-by: Antigravity
[RISCV] Optimize `(and (i1) f, (setcc a, b, eq))` to use the zicond extension (#217946)
This is a generalization of the previously existing rule, that required
one of the sides of the `setcc` to be zero.
With this commit we now support comparisons between any two variables.
This requires us to insert an additional instruction to compare the two.
But it is still beneficial vs the unoptimized lowering as it reduces 1
instruction in the output.
This fixes one of the issues identified in #179584. Namely `test_lt3`,
now uses `czero.{nez,eqz}` for those cases.
AI Disclosure: I have used AI to help me understand the LLVM build and
test system as well as to understand the existing codebase. The new code
add in this PR is authored by me.
[AMDGPU] PromoteAlloca: split scalar accesses that span several elements
promoteAllocaToVector already splits a *vector* access across several
elements when it is a multiple of the element size, but a *scalar* access
had to be bitcastable to the element type, so an i64 load from an alloca
promoted to <8 x i32> was rejected as "not a supported access type" and
the object stayed in scratch.
Accept a scalar access that is a whole multiple of the element size and
route it through the existing subvector path, which already builds the
value from consecutive elements and bitcasts. Accesses with padding are
still rejected, since splitting those would put the pieces at the wrong
offsets, as are non-integer non-float types.
[AMDGPU] PromoteAlloca: flatten homogeneous structs to vectors
getVectorTypeForAlloca() peeled nested ArrayType and one inner
FixedVectorType, but stopped at any StructType. An alloca of an array of
structs was therefore rejected with "Cannot convert type to vector" and
fell back to scratch, even when the struct was a trivial wrapper around a
scalar.
Peel structs too, but only when every field has the same type and the
struct has no padding, so flattened elements keep the byte offsets the
surrounding index arithmetic assumes. Structs with differing field types
or with padding are left alone.
Simplify logic via suggestions from PR feedback. Add additional test cases, make tests a bit more complex so they don't fold into simple store of constant
[libc] Add self-define for sigev_notify_thread_id field. (#219067)
Support downstream code that assumes `sigev_notify_thread_id`, even
though defined for Linux is a macro that expands to use private `struct
sigevent` fields.
[flang][OpenMP] Remove OmpVerifyModifiers
Verification of clause modifiers is now done in a single place.
The OmpVerifyModifiers function was left in place, but was reduced
to always return "true".
Remove the definition and all calls to it.
The large amount of apparent changes is mostly due to unindenting
and reformatting previously indented code.
