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[DAG] Extend MinMax matchers to detect flippable sign (#177504)

Fixes #174328

[MLIR] Fix GCC's `-Wreturn-type` warnings (#177654)

This patch fixes `-Wreturn-type` warnings which happens if MLIR is built
with GCC compiler (11.5 is used for detecting)


Founded errors
```
build/llvm-llvmorg-21.1.8/mlir/lib/CAPI/Transforms/Rewrite.cpp: In function ‘MlirGreedyRewriteStrictness mlirGreedyRewriteDriverConfigGetStrictness(MlirGreedyRewriteDriverConfig)’:
build/llvm-llvmorg-21.1.8/mlir/lib/CAPI/Transforms/Rewrite.cpp:399:1: warning: control reaches end of non-void function [-Wreturn-type]
  399 | }
      | ^
build/llvm-llvmorg-21.1.8/mlir/lib/CAPI/Transforms/Rewrite.cpp: In function ‘MlirGreedySimplifyRegionLevel mlirGreedyRewriteDriverConfigGetRegionSimplificationLevel(MlirGreedyRewriteDriverConfig)’:
build/llvm-llvmorg-21.1.8/mlir/lib/CAPI/Transforms/Rewrite.cpp:414:1: warning: control reaches end of non-void function [-Wreturn-type]
  414 | }
      | ^
build/llvm-llvmorg-21.1.8/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp: In member function ‘mlir::Speculation::Speculatability mlir::gpu::SubgroupBroadcastOp::getSpeculatability()’:
build/llvm-llvmorg-21.1.8/mlir/lib/Dialect/GPU/IR/GPUDialect.cpp:2522:1: warning: control reaches end of non-void function [-Wreturn-type]
 2522 | }

    [20 lines not shown]

[MoveAutoInit] Fix for miscompilation for #150120 (#173961)

Fixes the miscompilation discussed for the PR #164882 as part of
generalizing the optimization for the issue #150120.

Without this commit, MoveAutoInit moves the store instruction to a
different branch which does not dominate the user dominator node. This
results in UB at runtime. The example in the test case is specifically
for an irreducible loop, in which all the predecessor may not dominate
user dominator head.

To fix this problem, we've introduced a new check to verify if the
predecessor of the user dominator node does in fact dominate user
dominator node before deciding that it is the node where the instruction
will be moved to.

[MLIR][Python] Add a DSL for defining dialects in Python bindings (#169045)

Python bindings for the IRDL dialect were introduced in #158488. They
are currently usable—for constructing IR and dynamically loading modules
that contain `irdl.dialect` into MLIR. However, there are still several
pain points when working with them:

* The IRDL IR-building interface is not very intuitive and tends to be
quite verbose.
* We do not yet have the corresponding `OpView` classes for IRDL-defined
operations.

To address these issues, I propose creating a wrapper (effectively a
small “DSL”) on top of the existing IRDL Python bindings. This wrapper
aims to simplify IR construction and automatically generate the
corresponding `OpView` types. A simple example is shown below.

Currently, using the IRDL bindings looks like this:


    [72 lines not shown]

InstCombine: Infer nnan/ninf on rounding intrinsics (#177770)

Fix a crash in TTI

Created using spr 1.3.7

InstCombine: Infer nnan and ninf on fptrunc (#177769)

Teach SimplifyDemandedFPClass to do this, although this is
not yet applied directly to the cast.

[NFCI][AMDGPU] Use `GET_SUBTARGETINFO_MACRO` in `GCNSubtarget.h` and `R600Subtarget.h` (#177402)

We can finally get rid of the manually defined boolean variables, like
other targets. Even though most of them are now defined by macros, we
still need to add the entries.

InstCombine: Infer nnan and ninf on fpext (#177768)

Teach SimplifyDemandedFPClass to do this, although this is
not yet applied directly to the cast.

InstCombine: Infer nnan/ninf on canonicalize (#177771)

InstCombine: Infer nnan and ninf flags on log intrinsics (#177767)

Use the new common utility function to try fold to constant
or introduce flags.

InstCombine: Infer nnan and ninf flags on exp intrinsics (#177766)

Use the new common utility function to try fold to constant
or introduce flags.

[gn build] Port 49d464ccaf44

[gn build] Port 9311996261e1

[X86] Prefer andl to andb to save one byte encoding when using with bzhi or bextr (#86921)

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

optimize fold_left_with_iter

[libclang/python] Move SPELLING_CACHE into CodeCompletion (#177586)

This adresses point 2 from
https://github.com/llvm/llvm-project/issues/156680.

Also add a dummy object that serves as an alias to `SPELLING_CACHE`,
used to replicate the old behavior and throw a `DeprecationWarning`.

[libc++][ranges] implement `ranges::shift_left` (#83231)

Implement the `ranges::shift_left` algorithm from
[P2440R1](https://wg21.link/P2440R1).

Closes: #134061

---------

Co-authored-by: Hui Xie <hui.xie1990 at gmail.com>
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>

[mlir][Affine] affine-super-vectorize transform op (#177755)

Added an operation in the transform dialect to apply the
affine-super-vectorize pass locally.
The operation vectorizes the loops that are children of the provided
operation, itself included.
Also added a test file verifying the operation behaves.

[clang-tidy] Improve diagnostics of bugprone-macro-parentheses (#177841)

Closes #177594

[mlir][python] Support Arbitrary Precision Integers in MLIR C API and Python Bindings (#177733)

This PR extends the MLIR C API and Python bindings to support
**arbitrary-precision integers (`APInt`)**, overcoming the previous
limitation where `IntegerAttr` values were restricted to 64 bits.

Cryptographic applications often require integer types much larger than
standard machine words (e.g., the 256-bit modulus for the BN254 curve).
Previously, attempting to bind these values resulted in truncation or
errors. This PR exposes the underlying word-based `APInt` structure via
the C API and updates the Python bindings to seamlessly handle Python's
arbitrary-precision integers.

fix nit test case

[NFCI][AMDGPU] Use `GET_SUBTARGETINFO_MACRO` in `GCNSubtarget.h`

le format monseiur

[CIR][CUDA] Add NVPTX target info and CUDA/HIP global emission filtering

[AMDGPU] Fix DomTree preservation in SILowerControlFlow when nodes are removed (#176691)

I would think the "applyUpdates" API should also take care of deleting
the nodes from the analyses objects but this does not seem to be the
case. https://godbolt.org/z/38a7rfzjd shows an example where
SILowerControlFlow removes a basic block which is not removed in the
Post dominator tree.

[clang-format] Handle \\""" at end of Java text block (#177736)

[RISCV] Use decodeVMaskReg for VMaskCarryInOp. NFC (#177742)

After #177678 we don't need DecodeVMV0RegisterClass to reject vm=1
cases. All instructions that use VMaskCarryInOp have set vm=0 in their
tablegen classes.

[AArch64][SME] Use LibcallLoweringInfo in the MachineSMEABIPass (#177762)

This adds a new helper to add calls to SME routines (addSMELibCall) and
check they are using the expected CC.

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>