LLVM/project 6bfca10llvm/lib/Target/AArch64 AArch64InstrInfo.cpp

[AArch64] Tidy up getMemOpInfo cases where Width == Scale (NFC) (#201153)
DeltaFile
+23-46llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+23-461 files

LLVM/project e202047libcxx/docs/Status Cxx2cIssues.csv, libcxx/include span

[libc++][span] LWG4243: `as_bytes`/`as_writable_bytes` is broken with `span<volatile T>` (#200993)

Closes #171317
DeltaFile
+60-5libcxx/test/std/containers/views/views.span/span.objectrep/as_writable_bytes.pass.cpp
+60-5libcxx/test/std/containers/views/views.span/span.objectrep/as_bytes.pass.cpp
+0-55libcxx/test/std/containers/views/views.span/span.objectrep/as_writable_bytes.verify.cpp
+3-1libcxx/include/span
+1-1libcxx/docs/Status/Cxx2cIssues.csv
+124-675 files

LLVM/project 74bf9b5clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2_int_fp_cvt.c acle_sve2_fp_int_cvtn_x2.c, clang/test/Sema/AArch64 arm_sve_feature_dependent_sve_AND_LP_sve2p3_OR_sme2p3_RP___sme_AND_LP_sve2p3_OR_sme2p3_RP.c

[AArch64] Add 9.7 CVT data processing intrinsics (#186807)

Add Clang intrinsics
svcvtt_f16_s8, _f32_s16, _f64_s32, _f16_u8, _f32_u16, _f64_u32
svcvtb_f16_s8, _f32_s16, _f64_s32, _f16_u8, _f32_u16, _f64_u32

+ lowering to AARCH64 Instrs. SCVTF, SCVTFLT, UCVTF, UCVTFLT

and Clang instrinsics:
svcvtn_s8[_f16_x2], _s32[_f64_x2], _u8[_f16_x2], _u16[_f32_x2],
_u32[_f64_x2]


+ lowering to AARCH64 Instrs. FCVTZSN, FCVTZUN

The Clang intrinsics are guarded by the sve2.3 and sme2.3 feature flags.

ACLE Patch:
https://github.com/ARM-software/acle/pull/428

    [3 lines not shown]
DeltaFile
+197-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2_int_fp_cvt.c
+120-0llvm/test/CodeGen/AArch64/sve2p3-intrinsics-fp-converts.ll
+117-0clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_LP_sve2p3_OR_sme2p3_RP___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
+113-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2_fp_int_cvtn_x2.c
+108-0llvm/test/CodeGen/AArch64/sve2p3-intrinsics-fp-converts_x2.ll
+20-0llvm/include/llvm/IR/IntrinsicsAArch64.td
+675-08 files not shown
+718-1314 files

LLVM/project f162043libcxx/test/support nasty_string.h

[libc++][test] Make narrowing in `nasty_char_traits::to_char_type` more explicit (#138375)

Previously, the cast was allowed due to
[P0960R3](https://wg21.link/p0960r3), which made narrowing implicitly
done in the parenthesized aggregate initialization. MSVC doesn't seem
happy with such an implicit manner, despite not being
copy-initialization or list-initialization, and emits warning C4242.

This patch makes the narrowing more explicit to MSVC with `static_cast`.
Follows up 3e7be494f84e51d5f4245d6f39e380a500f226a6.
DeltaFile
+1-1libcxx/test/support/nasty_string.h
+1-11 files

LLVM/project 1bd2a0ellvm/lib/Target/SystemZ SystemZInstrVector.td SystemZISelDAGToDAG.cpp, llvm/test/CodeGen/SystemZ vec-move-25.ll

[SystemZ] Don't zero extend after a VLGV[BHF] instruction. (#201109)

The VLGV already zero extends up to 64 bits, so a following zero extend
is not needed.

New TableGen patterns for these cases as well as a handling to avoid
tryRISBGZero() selecting i64 cases.
DeltaFile
+206-0llvm/test/CodeGen/SystemZ/vec-move-25.ll
+25-0llvm/lib/Target/SystemZ/SystemZInstrVector.td
+17-1llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
+248-13 files

LLVM/project e579340llvm/lib/Target/AMDGPU GCNSubtarget.h SIISelLowering.cpp

[AMDGPU][NFC] Use generated hasMinMaxI64Insts subtarget feature query (#201052)

Replace the custom GCNSubtarget::hasIntMinMax64 helper with the
generated hasMinMaxI64Insts from AMDGPUSubtargetFeature.
DeltaFile
+0-3llvm/lib/Target/AMDGPU/GCNSubtarget.h
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+3-64 files

LLVM/project 7b0d00fllvm/include/llvm/ObjCopy ObjCopy.h, llvm/lib/ObjCopy ObjCopy.cpp Archive.cpp

[llvm-objcopy] Add --verbose option to llvm-strip/llvm-objcopy (#196611)

Added `--verbose / -v` option to `llvm-strip` and `llvm-objcopy` as part
of #123041, matching GNU strip's output format. When the flag is passed,
the tool prints one line per file processed.

copy from `'input.o' [elf64-x86-64] to 'output.o' [elf64-x86-64]`
DeltaFile
+91-0llvm/test/tools/llvm-objcopy/verbose.test
+26-1llvm/tools/llvm-objcopy/llvm-objcopy.cpp
+14-0llvm/lib/ObjCopy/ObjCopy.cpp
+12-1llvm/lib/ObjCopy/Archive.cpp
+8-0llvm/include/llvm/ObjCopy/ObjCopy.h
+5-0llvm/tools/llvm-objcopy/CommonOpts.td
+156-24 files not shown
+167-210 files

LLVM/project 8d42953utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Port c264e07 (#201292)
DeltaFile
+2-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+2-11 files

LLVM/project 97bb7eclibcxx/include/__type_traits integer_traits.h, libcxx/test/libcxx/concepts/concepts.arithmetic __libcpp_signed_integer.compile.pass.cpp __libcpp_unsigned_integer.compile.pass.cpp

[libc++] Reject cv-qualified types in __is_signed/unsigned_integer_v (#200377)

`__is_signed_integer_v` and `__is_unsigned_integer_v` previously
admitted cv-qualified types, contradicting `[basic.fundamental]/p1-2`.
The fix adds `__is_unqualified_v<_Tp>` to both predicates.

Reported by @jwakely on
[#185027](https://github.com/llvm/llvm-project/pull/185027#issuecomment-4574289895).
Trait-level tests cover all consumers via the shared concept; cast-like
templates (`in_range`, `saturating_cast`, `extents`) get explicit
cv-rejection tests.

Assisted-by: Claude (Anthropic)

---------

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+32-0libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_signed_integer.compile.pass.cpp
+32-0libcxx/test/libcxx/concepts/concepts.arithmetic/__libcpp_unsigned_integer.compile.pass.cpp
+21-0libcxx/test/std/numerics/numeric.ops/numeric.ops.sat/saturating_cast.compile.pass.cpp
+9-7libcxx/include/__type_traits/integer_traits.h
+10-0libcxx/test/std/utilities/utility/utility.intcmp/intcmp.verify.cpp
+8-0libcxx/test/std/containers/views/mdspan/extents/index_type.verify.cpp
+112-76 files

LLVM/project edcafdblldb/packages/Python/lldbsuite/test lldbpexpect.py, lldb/test/API/commands/apropos/formatting TestAproposFormatting.py

[lldb][test] Always call quit when tearing down pexpect tests (#201100)

Right now we manually have to call quit at the end of each pexpect test.
This patches makes this call automatic.

This also makes tests that missed the call and where previously waiting
for a timeout faster. For example, TestClangREPL.py now only takes about
10 seconds to run instead of 1 minute.
DeltaFile
+17-2lldb/packages/Python/lldbsuite/test/lldbpexpect.py
+0-3lldb/test/API/commands/apropos/formatting/TestAproposFormatting.py
+0-3lldb/test/API/commands/expression/multiline-navigation/TestMultilineNavigation.py
+0-3lldb/test/API/iohandler/autosuggestion/TestAutosuggestion.py
+0-2lldb/test/API/iohandler/sigint/TestIOHandlerPythonREPLSigint.py
+0-1lldb/test/API/commands/gui/basicdebug/TestGuiBasicDebug.py
+17-1414 files not shown
+17-2820 files

LLVM/project 6b5bb08clang/lib/Basic Targets.cpp, clang/lib/Basic/Targets SPIR.h

Revert "[OpenCL] Allow mesa3d OS in spirv32 and spirv64 targets" (#200727)

Reverts llvm/llvm-project#197148

libclc will use generic target triple spirv32[64]-unknown-unknown for use in mesa.
DeltaFile
+9-14clang/lib/Basic/Targets/SPIR.h
+0-12clang/test/CodeGen/target-data.c
+1-9clang/test/Frontend/spirv-target-validation.c
+2-2clang/lib/Basic/Targets.cpp
+12-374 files

LLVM/project 6a7b887libclc CMakeLists.txt README.md

[libclc] Use generic spirv*-unknown-unknown clang triple for SPIR-V targets (#199618)

spirv-diff shows only numbering change to
spirv64-unknown-unknown/libclc.spv. No change in `llvm-spirv -to-text`
outputs. llvm-diff shows no change on reverse-translated bitcode files.

Also fixes a bug that spirv32-unknown-unknown was incorrectly using
64-bit triple.

Update README.md to use the generic target triple for SPIR-V targets.
DeltaFile
+1-11libclc/CMakeLists.txt
+3-3libclc/README.md
+4-142 files

LLVM/project 6e6c51blibcxx/include map __tree, libcxx/test/std/containers/associative/map/map.cons copy_assign.pass.cpp

[libc++] Make `<map>` `std::map` constexpr as part of P3372R3 (#134330)

Fixes https://github.com/llvm/llvm-project/issues/128660

Adds `constexpr` support for `std::map` as per P3372R3

---------

Co-authored-by: A. Jiang <de34 at live.cn>
DeltaFile
+346-255libcxx/include/map
+295-211libcxx/include/__tree
+68-54libcxx/test/std/containers/associative/map/map.modifiers/emplace.pass.cpp
+63-48libcxx/test/std/containers/associative/map/map.modifiers/emplace_hint.pass.cpp
+86-16libcxx/test/std/containers/associative/map/map.cons/copy_assign.pass.cpp
+74-0libcxx/test/support/CopyConstructible.h
+932-58493 files not shown
+2,161-1,03599 files

LLVM/project 40d725fllvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll llvm.amdgcn.av.load.b128.ll

rebase to fix ReleaseNotes.rst

Created using spr 1.3.7
DeltaFile
+23,873-20,923llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+12,982-11,930llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+12,365-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
+10,469-10llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+8,268-12llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+2,674-2,698llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+70,631-35,5738,082 files not shown
+443,877-231,9148,088 files

LLVM/project c2ed0b1llvm/lib/Analysis CaptureTracking.cpp

[CaptureTracking] Remove allocator comparison special case (#201143)

CaptureTracking had a special case that (incorrectly) reported
`captures(none)` for comparisons of allocation functions with null.
Remove this special case and return the correct
`captures(address_is_null)` result instead.

It seems like this doesn't have any practical benefit anymore, as things
like AA will ignore address-only captures nowadays.
DeltaFile
+4-16llvm/lib/Analysis/CaptureTracking.cpp
+4-161 files

LLVM/project d0af9c8utils/bazel/llvm-project-overlay/lldb BUILD.bazel

[bazel] Port 142ad48 (#201283)
DeltaFile
+14-8utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+14-81 files

LLVM/project 57b0939libc/src/unistd/linux alarm.cpp

[libc] Fix alarm layout mismatch on 32-bit time64 (#201276)

Fixed alarm implementation on 32-bit architectures with 64-bit time_t
(like RISC-V 32-bit). The SYS_setitimer syscall on these platforms
expects the legacy 32-bit struct itimerval (with 32-bit tv_sec and
tv_usec). Convert the arguments to this layout before invoking the
syscall to avoid the kernel misinterpreting the timeout.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+23-10libc/src/unistd/linux/alarm.cpp
+23-101 files

LLVM/project 9bb17a0clang-tools-extra/clangd/unittests CMakeLists.txt

[clangd] Disable PCH reuse for ClangdTests (#201232)

Fixes https://github.com/llvm/llvm-project/issues/200999
DeltaFile
+3-0clang-tools-extra/clangd/unittests/CMakeLists.txt
+3-01 files

LLVM/project c264e07llvm/include/llvm/DTLTO DTLTO.h, llvm/include/llvm/LTO LTO.h

[DTLTO] Refactor the DTLTO code. (#192629)

DTLTO implementation code has been moved from `llvm/lib/LTO/` to
`llvm/lib/DTLTO/`. This refactor does not change any externally visible
behavior, so existing DTLTO tests and documentation remain valid. The
move was done to reduce code duplication, improve maintainability, and
make it easier to adopt future performance improvements.
DeltaFile
+63-496llvm/lib/LTO/LTO.cpp
+273-231llvm/lib/DTLTO/DTLTO.cpp
+364-45llvm/include/llvm/DTLTO/DTLTO.h
+221-0llvm/lib/DTLTO/DTLTOInputFiles.cpp
+143-0llvm/lib/DTLTO/DTLTODistributionDriver.cpp
+10-41llvm/include/llvm/LTO/LTO.h
+1,074-81310 files not shown
+1,138-85316 files

LLVM/project 4a74b44orc-rt/include/orc-rt NativeDylibManager.h, orc-rt/lib/executor NativeDylibManager.cpp

[orc-rt] Add required/weak-ref attribute to NativeDylibManager lookup. (#201272)

Replace the std::vector<std::string> argument to lookup() with a
SymbolLookupSet (a vector of (name, LookupFlags) pairs, where
LookupFlags is RequiredSymbol or WeaklyReferencedSymbol).

This brings NativeDylibManager more closely into alignment with the
SimpleExecutorDylibManager implementation in the LLVM OrcTargetProcess
library.
DeltaFile
+73-7orc-rt/unittests/NativeDylibManagerSPSCITest.cpp
+46-8orc-rt/unittests/NativeDylibManagerTest.cpp
+34-2orc-rt/lib/executor/sps-ci/NativeDylibManagerSPSCI.cpp
+26-2orc-rt/lib/executor/NativeDylibManager.cpp
+9-3orc-rt/include/orc-rt/NativeDylibManager.h
+188-225 files

LLVM/project 1834a71clang/include/clang/Basic BuiltinsAMDGPU.td, clang/test/SemaOpenCL builtins-amdgcn-global-load-store-target-error.cl

add ArgNames; use target feature "flat-global-insts"
DeltaFile
+5-3clang/include/clang/Basic/BuiltinsAMDGPU.td
+8-0llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+2-2clang/test/SemaOpenCL/builtins-amdgcn-global-load-store-target-error.cl
+15-53 files

LLVM/project 7bebe28llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-extract-subvector-loop.ll

[SelectionDAG] Fold extracts of subvector inserts

Fold extract_subvector(insert_subvector(...)) when the extraction is
outside the inserted subvector or the inserted subvector only amends
the extracted

In particular,
1. vA extract_subvector (vB insert_subvector(vB X, vC Y, C1), C2) =>
vA extract_subvector(X, C2) when [C2, C2 + A) intersect [C1, C1 + C)
is the empty set
2. ... => extract_subvector(Y, C2 - C1) if [C2, C2 + Y) is a subset of
[C1, C1 + C) - an existing simplification
3. ... => vA insert_subvector(vA extract_subvector(vB X, C2), vC Y, C1 - C2)
if [C1, C1 + C) is a subset of [C2, C2 + A) - that is, if you're only
updating the extracted sub-part.

Adds a regresssion tests for an infinite SelectionDAG cycle that is
fixed by a stack of commits that ends with this one.


    [3 lines not shown]
DeltaFile
+72-56llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-6.ll
+44-48llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+25-22llvm/test/CodeGen/X86/dagcombine-extract-insert.ll
+45-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-extract-subvector-loop.ll
+28-7llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+15-17llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+229-1502 files not shown
+237-1668 files

LLVM/project 1bc6af8llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/X86 dagcombine-insert-concat.ll

[SelectionDAG] Fold subvector inserts into concat operands

Push insert_subvector into the containing CONCAT_VECTORS operand when the insertion is wholly contained there.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+34-10llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-18llvm/test/CodeGen/X86/dagcombine-insert-concat.ll
+38-282 files

LLVM/project 9e7a44fllvm/test/CodeGen/AArch64 sve-fixed-vector-llrint.ll sve-fixed-vector-lrint.ll, llvm/test/CodeGen/AMDGPU bf16.ll

[SelectionDAG] Fold extracts spanning concat operands

Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+992-904llvm/test/CodeGen/AMDGPU/bf16.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+196-176llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+142-140llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+120-120llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+1,824-1,79812 files not shown
+2,204-2,27918 files

LLVM/project 6395570llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[SelectionDAG] Fold nonzero extract-of-extract indices

Generalize the extract_subvector-of-extract_subvector fold to compose
nonzero indices instead of only handling an outer index of zero.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+8-8llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-81 files

LLVM/project d7eb426llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-bitcast-demanded-elts.ll

[SelectionDAG] Track bitcast demanded elements in noundef tests

Bitcasts preserve undef/poison status, but vector bitcasts can change
which source lanes cover a demanded result lane. Map the demanded
element mask through fixed-length vector bitcasts before checking the
source where possible.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+41-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+3-12llvm/test/CodeGen/X86/dagcombine-freeze-bitcast-demanded-elts.ll
+44-122 files

LLVM/project 9fbcc6cllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

[SelectionDAG] Track demanded select elements in noundef checks

Propagate demanded elements through to the two arms of a select, and
check the condition with or without demanded elements depending on if
it's a vector or not.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+17-2llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+0-10llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+17-122 files

LLVM/project 808bf28llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll dagcombine-freeze-bitcast-demanded-elts.ll

[SelectionDAG] Pre-commit tests for dagcombine improvements

I've got a stack of dagcombine improvements that together make an
infinite cycle relating to freeze insertion in vector-manipulation IR.
Here we have

- Handling freeze(undef) in demanded-elts for shufflevector
- Improvements to noundef checks for bitcast, concat, and select
- Improvements to extract(concat), extract(extract), and
- extract(insert) nadling
DeltaFile
+84-0llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+56-0llvm/test/CodeGen/X86/dagcombine-freeze-bitcast-demanded-elts.ll
+51-0llvm/test/CodeGen/X86/dagcombine-extract-insert.ll
+38-0llvm/test/CodeGen/X86/dagcombine-insert-concat.ll
+36-0llvm/test/CodeGen/X86/dagcombine-freeze-undef-demanded-elts.ll
+25-0llvm/test/CodeGen/X86/dagcombine-extract-concat.ll
+290-01 files not shown
+310-07 files

LLVM/project 59be8e3llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-undef-demanded-elts.ll pr91005.ll

[SelectionDAG] Look through freeze in undef demanded checks

There were cycles where the freeze combiner and thet
demanded-elements simplification code would get into fights about
whethere the operands to a shuffle or a concat should be
`freeze undef` or `undef` once the simplifier had concluded zero
elements were demanded from some operation. This PR prevents such
cases.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+11-7llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+2-1llvm/test/CodeGen/X86/dagcombine-freeze-undef-demanded-elts.ll
+2-1llvm/test/CodeGen/X86/pr91005.ll
+15-93 files

LLVM/project f203fd2llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-concat-demanded-elts.ll

[SelectionDAG] Track demanded concat elements in noundef checks

Teach isGuaranteedNotToBeUndefOrPoison to distribute fixed-length
demanded element masks across CONCAT_VECTORS operands. This is part of
the series of fixes needed to resolve a SelectionDAG hang by making it
possible to prove certain values don't need to be frozen.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+23-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+1-4llvm/test/CodeGen/X86/dagcombine-freeze-concat-demanded-elts.ll
+24-42 files