LLVM/project 9baca01mlir/lib/Dialect/Tensor/Transforms MergeConsecutiveInsertExtractSlicePatterns.cpp DropRedundantRankExpansionPatterns.cpp, mlir/test/Dialect/Tensor fold-tensor-subset-ops.mlir fold-consecutive-insert-extract-slice.mlir

[mlir][tensor] Consolidate tensor fold patterns and rename related file (#192820)

This PR moves `MergeConsecutiveExtractSlice` from `MergeConsecutiveInsertExtractSlicePatterns.cpp` to `FoldTensorSubsetOps.cpp`, and removes the duplicate `MergeConsecutiveInsertSlice` pattern in favor of `InsertSliceOfInsertSliceFolder`, which already exists in `FoldTensorSubsetOps.cpp` and provides equivalent functionality with greater stability. Since the merge-related patterns have been fully migrated out, `MergeConsecutiveInsertExtractSlicePatterns.cpp` is renamed to `DropRedundantRankExpansionPatterns.cpp` to better reflect its remaining responsibilities.
DeltaFile
+0-243mlir/lib/Dialect/Tensor/Transforms/MergeConsecutiveInsertExtractSlicePatterns.cpp
+175-0mlir/lib/Dialect/Tensor/Transforms/DropRedundantRankExpansionPatterns.cpp
+58-0mlir/test/Dialect/Tensor/fold-tensor-subset-ops.mlir
+35-6mlir/lib/Dialect/Tensor/Transforms/FoldTensorSubsetOps.cpp
+1-1mlir/test/Dialect/Tensor/fold-consecutive-insert-extract-slice.mlir
+1-1mlir/lib/Dialect/Tensor/Transforms/CMakeLists.txt
+270-2516 files

LLVM/project 6a06c8bbolt/lib/Passes ThreeWayBranch.cpp, bolt/test/AArch64 unsupported-passes.test

[BOLT][AArch64] Refuse to run ThreeWayBranch pass (#193252)

On AArch64, `--three-way-branch` produces a crash as it is not
implemented. This patch adds a guard
and updates relevant test(s).
DeltaFile
+5-0bolt/lib/Passes/ThreeWayBranch.cpp
+2-0bolt/test/AArch64/unsupported-passes.test
+7-02 files

LLVM/project 5673b02llvm/test/MC/RISCV/rvv zvlsseg.s compare.s

[RISCV][MC] Remove tautological CHECK-UNKNOWN disassembly checks (NFC) (#193682)

Many RISC-V MC tests assemble with `--mattr=+v` (or another extension),
then run llvm-objdump on the result *without* `--mattr=`, expecting the
disassembler to print `<unknown>` for every instruction. These
CHECK-UNKNOWN lines only restate the encoded bytes that are already
verified by CHECK-ENCODING from `llvm-mc -show-encoding`, so they do not
add coverage.

Drop the CHECK-UNKNOWN RUN lines and check directives from the affected
tests to reduce noise and make the tests easier to read. The remaining
CHECK-INST / CHECK-ENCODING / CHECK-ERROR coverage is unchanged.

This is a preparatory cleanup that makes the upcoming llvm-objdump
per-region disassembly change (using ISA mapping symbols #193448) easier
to review.

Assisted-by: Claude Opus
I use Opus to write commit message...:P
DeltaFile
+0-515llvm/test/MC/RISCV/rvv/zvlsseg.s
+0-85llvm/test/MC/RISCV/rvv/compare.s
+0-66llvm/test/MC/RISCV/rvv/load.s
+0-61llvm/test/MC/RISCV/rvv/add.s
+0-57llvm/test/MC/RISCV/rvv/vsetvl.s
+0-52llvm/test/MC/RISCV/rvv/sub.s
+0-83652 files not shown
+0-1,67358 files

LLVM/project 5a45fbbllvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv fixed-vectors-fp-setcc.ll fixed-vectors-setcc-fp-vp.ll

[llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (#193424)

Currently we don't handle any of illegal promoted fixed vectors for
zvfhmin and zvfbfmin we expand it and make general legalizer handle it.
However some of operators are split and some are scalarized depends on
operator type, in this case we need to split it manually.
DeltaFile
+326-4,626llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
+192-2,277llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
+36-23llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+45-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lmul-max.ll
+599-6,9264 files

LLVM/project 8e2c42bllvm/test/Transforms/LoopVectorize float-induction.ll tbaa-nodep.ll, llvm/test/Transforms/LoopVectorize/AArch64 sve-extract-last-veclane.ll sve-gather-scatter.ll

[LV][NFC] Stop running DCE pass in tests (#193521)

The additional DCE pass made no difference to the output, so I've
removed it.
DeltaFile
+4-4llvm/test/Transforms/LoopVectorize/float-induction.ll
+3-3llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
+2-2llvm/test/Transforms/LoopVectorize/tbaa-nodep.ll
+1-1llvm/test/Transforms/LoopVectorize/AArch64/sve-extract-last-veclane.ll
+1-1llvm/test/Transforms/LoopVectorize/AArch64/sve-gather-scatter.ll
+1-1llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions.ll
+12-1233 files not shown
+45-4539 files

LLVM/project 4209849lldb/test/API/tools/lldb-dap/locations TestDAP_locations.py main.cpp, lldb/tools/lldb-dap JSONUtils.cpp

[lldb-dap] Add valueLocationReference for member function pointers (#186837)

Added `valueLocationReference` for member function pointers. Also
changed `GetValueAsAddress`, because original implementation doesn't
work for member function pointers.
DeltaFile
+45-35lldb/test/API/tools/lldb-dap/locations/TestDAP_locations.py
+7-0lldb/test/API/tools/lldb-dap/locations/main.cpp
+4-2lldb/tools/lldb-dap/JSONUtils.cpp
+4-1lldb/tools/lldb-dap/Handler/LocationsRequestHandler.cpp
+60-384 files

LLVM/project 52e5d65llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll bf16-instructions.ll

[AArch64][GlobalISel] Add fpext bf16 legalization. (#193342)

These are simple, as they lower straight to shifts and so are always
available.
DeltaFile
+82-18llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+44-28llvm/test/CodeGen/AArch64/bf16-instructions.ll
+27-10llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+8-2llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+161-584 files

LLVM/project 257371ellvm/lib/Target/LoongArch LoongArchLSXInstrInfo.td LoongArchLASXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx bitset.ll bitclr.ll

[LoongArch] Support VBIT{CLR,SET,REV}I patterns for non-native element sizes

Extend vsplat_uimm_{pow2,inv_pow2} matching to allow specifying an explicit
element bit width, enabling recognition of splat patterns whose logical
element size differs from the vector's native element type.

Introduce templated selectVSplatUimm{Pow2,InvPow2} helpers with an optional
EltSize parameter, and add corresponding ComplexPattern definitions for
i8/i16/i32 element widths. This allows TableGen patterns to match cases such
as operating on v8i32/v4i64 vectors with masks derived from smaller element
sizes (e.g. i16).

With these changes, AND/OR/XOR operations using inverse power-of-two or
power-of-two splat masks are now correctly selected to VBITCLRI, VBITSETI,
and VBITREVI instructions instead of falling back to vector logical
operations with materialized constants.
DeltaFile
+35-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+27-0llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+8-4llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
+3-6llvm/test/CodeGen/LoongArch/lasx/bitset.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/bitclr.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/bitrev.ll
+79-224 files not shown
+90-4110 files

LLVM/project ffe5b85llvm/test/CodeGen/LoongArch/lasx bitclr.ll bitrev.ll, llvm/test/CodeGen/LoongArch/lsx bitset.ll bitclr.ll

[LoongArch][NFC] Add tests for VBITCLRI, VBITSETI, and VBITREVI
DeltaFile
+96-0llvm/test/CodeGen/LoongArch/lasx/bitclr.ll
+96-0llvm/test/CodeGen/LoongArch/lasx/bitrev.ll
+96-0llvm/test/CodeGen/LoongArch/lsx/bitset.ll
+96-0llvm/test/CodeGen/LoongArch/lsx/bitclr.ll
+96-0llvm/test/CodeGen/LoongArch/lsx/bitrev.ll
+96-0llvm/test/CodeGen/LoongArch/lasx/bitset.ll
+576-06 files

LLVM/project 019cf51llvm/lib/Target/RISCV RISCVISelLowering.cpp

[RISCV][NFC] Rename isZipEven/isZipOdd to isPairEven/isPairOdd (#193674)

To match the terminologies in Zvzip extension.

And some comments are changed accordingly.
DeltaFile
+11-9llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+11-91 files

LLVM/project a9180ccllvm/test/TableGen/GlobalISelEmitter metadata-operand.td, llvm/utils/TableGen/Common/GlobalISel GlobalISelMatchTable.cpp

[GlobalISel] skip type check when matching metadata operand
DeltaFile
+32-0llvm/test/TableGen/GlobalISelEmitter/metadata-operand.td
+6-0llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
+38-02 files

LLVM/project 3f6aa4dllvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/Target/RISCV RISCVInstrInfo.cpp RISCVInstrInfo.h

[CodeGen][NFC] Remove InsertPt since it's always the same as MI (#193668)
DeltaFile
+9-8llvm/lib/Target/X86/X86InstrInfo.cpp
+8-8llvm/include/llvm/CodeGen/TargetInstrInfo.h
+8-7llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+7-7llvm/lib/Target/X86/X86InstrInfo.h
+7-7llvm/lib/Target/SystemZ/SystemZInstrInfo.h
+7-7llvm/lib/Target/RISCV/RISCVInstrInfo.h
+46-446 files not shown
+65-6212 files

LLVM/project 582db3cclang/include/clang/Driver ModulesDriver.h, clang/lib/Driver ModulesDriver.cpp

Revert "[clang][modules-driver] Add support for C++ named modules and `import std`" (#193677)

Reverts llvm/llvm-project#193312 due to a failing test
(Driver/modules-driver-import-std.cpp)
DeltaFile
+0-111clang/test/Driver/modules-driver-both-modules-types.cpp
+11-89clang/lib/Driver/ModulesDriver.cpp
+0-88clang/test/Driver/modules-driver-cxx-modules-only.cpp
+0-60clang/test/Driver/modules-driver-import-std.cpp
+0-10clang/test/Driver/modules-driver-incompatible-options.cpp
+0-4clang/include/clang/Driver/ModulesDriver.h
+11-3622 files not shown
+11-3668 files

LLVM/project 956ad61llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

Merge branch 'upstream-main' into users/ssahasra/gisel-metadata-operand
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+41,844-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills2.mir
+40,613-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills1.mir
+37,209-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_multiple_spills3.mir
+597,128-04,550 files not shown
+1,133,469-116,2024,556 files

LLVM/project 1eb568allvm/include/llvm/CodeGen/GlobalISel GIMatchTableExecutorImpl.h GIMatchTableExecutor.h, llvm/utils/TableGen/Common/GlobalISel GlobalISelMatchTable.h GlobalISelMatchTable.cpp

Revert "[GlobalISel] Add GIM_CheckMachineOperandType for matching metadata operands"

This reverts commit 4d7615b8615fc68a64f1ae696e37f4ca9c9cbcbc.
DeltaFile
+0-18llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+0-17llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
+0-9llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
+0-6llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
+0-504 files

LLVM/project 9152f21compiler-rt/cmake/Modules AddCompilerRT.cmake

[compiler-rt] Set CMAKE_INSTALL_MESSAGE to NEVER for custom libcxx (#193666)

It removes like 90% of logs my typical local build.
DeltaFile
+3-2compiler-rt/cmake/Modules/AddCompilerRT.cmake
+3-21 files

LLVM/project dd13552llvm/lib/Transforms/IPO LowerTypeTests.cpp, llvm/test/Transforms/LowerTypeTests x86-jumptable-dbg.ll aarch64-jumptable-dbg.ll

Reland: [LowerTypeTests] Add debug info to jump table entries (#193670)

When Control Flow Integrity (CFI) is enabled, jump tables are used to
redirect indirect calls. Previously, these jump table entries lacked
debug information, making it difficult for profilers and debuggers to
attribute execution time correctly.

Now stack trace, when stopped on jump table entry will looks like this:
```
#0: __ubsan_check_cfi_icall_jt at sanitizer/ubsan_interface.h:0
#1: c::c() (.cfi_jt) at sanitizer/ubsan_interface.h:0:0
#2: .cfi.jumptable.81 at sanitizer/ubsan_interface.h:0:0
```

This is reland of #192736, reverted with #193663.
This version don't update debug info for "Cross-DSO CFI" mode.
DeltaFile
+68-4llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+32-8llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
+16-4llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
+116-163 files

LLVM/project fecb3cdclang/test lit.cfg.py, llvm/utils/lit/lit/llvm config.py

rebase

Created using spr 1.3.7
DeltaFile
+1-3clang/test/lit.cfg.py
+3-1llvm/utils/lit/lit/llvm/config.py
+4-42 files

LLVM/project 94689d3clang/test lit.cfg.py, llvm/utils/lit/lit/llvm config.py

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+3-1llvm/utils/lit/lit/llvm/config.py
+1-3clang/test/lit.cfg.py
+4-42 files

LLVM/project c1ff819mlir/lib/Target/LLVMIR ModuleTranslation.cpp, mlir/test/Target/LLVMIR llvmir.mlir

[mlir][LLVMIR] Extend FP array-splat constant lowering (#192378)

Handle floating-point compatible array splats in the ConstantDataArray
path using bit-pattern based ConstantDataArray::getFP construction,
instead of only specializing integer element types.
DeltaFile
+24-0mlir/test/Target/LLVMIR/llvmir.mlir
+20-1mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+44-12 files

LLVM/project 739c459clang/include/clang/Driver ModulesDriver.h, clang/lib/Driver ModulesDriver.cpp

[clang][modules-driver] Add support for C++ named modules and `import std` (#193312)

This patch adds basic support for explicit C++ named module builds,
managed natively by the Clang driver, including support for use of the
Standard library modules.

This follows #187606, which adds the same for Clang modules.

Current limitations:
- Standard library modules are still compiled to object files instead of
using the provided shared library. (This will be addressed in a
follow-up soon.)
- Caching is not supported yet (but likely to be added during the
upcoming GSoC cycle).
- Importing C++ standard library modules into Clang modules is not
supported (and not expected in the near term).

RFC:
https://discourse.llvm.org/t/rfc-modules-support-simple-c-20-modules-use-from-the-clang-driver-without-a-build-system
DeltaFile
+111-0clang/test/Driver/modules-driver-both-modules-types.cpp
+89-11clang/lib/Driver/ModulesDriver.cpp
+88-0clang/test/Driver/modules-driver-cxx-modules-only.cpp
+60-0clang/test/Driver/modules-driver-import-std.cpp
+10-0clang/test/Driver/modules-driver-incompatible-options.cpp
+4-0clang/include/clang/Driver/ModulesDriver.h
+362-112 files not shown
+366-118 files

LLVM/project 917c6d6clang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19518 files not shown
+156-33324 files

LLVM/project f450415clang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19519 files not shown
+175-33725 files

LLVM/project d26cd64clang/test lit.cfg.py, compiler-rt/cmake/Modules AddCompilerRT.cmake

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+19-4libcxx/utils/libcxx/test/config.py
+3-2compiler-rt/cmake/Modules/AddCompilerRT.cmake
+1-3llvm/utils/lit/lit/llvm/config.py
+3-1clang/test/lit.cfg.py
+26-104 files

LLVM/project 94a9f2fclang/test lit.cfg.py, compiler-rt/cmake/Modules AddCompilerRT.cmake

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+3-2compiler-rt/cmake/Modules/AddCompilerRT.cmake
+3-1clang/test/lit.cfg.py
+1-3llvm/utils/lit/lit/llvm/config.py
+7-63 files

LLVM/project 639e7ffclang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19518 files not shown
+156-33324 files

LLVM/project fa70e46clang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19518 files not shown
+156-33324 files

LLVM/project ddd6cceclang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19518 files not shown
+156-33324 files

LLVM/project 42b8e08clang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19518 files not shown
+156-33324 files

LLVM/project d9cd93dclang/lib/Driver ModulesDriver.cpp, compiler-rt/lib/asan asan_errors.cpp

rebase

Created using spr 1.3.7
DeltaFile
+0-87compiler-rt/test/asan/TestCases/assume_dereferenceable.cpp
+64-0flang/test/Semantics/deallocate08.f90
+0-42llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
+8-30compiler-rt/lib/asan/asan_errors.cpp
+0-35compiler-rt/test/asan/TestCases/assume_dereferenceable_pass.cpp
+26-1clang/lib/Driver/ModulesDriver.cpp
+98-19518 files not shown
+156-33324 files