LLVM/project 3b1f7fd — llvm/test/CodeGen/LoongArch/lasx vec-sext-invec-mask.ll build-vector.ll, llvm/test/CodeGen/LoongArch/lsx scalar-load-to-vector.ll vec-sext.ll

[LoongArch] Load scalars into vector lane 0 with FLD/VLDREPL (#234119)

Inserting a loaded integer into lane 0 of an undefined vector, which is
also how sub-128-bit vector loads are legalized, was lowered to a scalar
load plus [X]VINSGR2VR. VINSGR2VR merges into its destination, so it
carries a false dependency on the previous value of that register, and
it needs a GPR-to-vector move.

Use FLD.{S/D} for 32/64-bit elements and [X]VLDREPL.{B/H} for 8/16-bit
elements instead. They write the whole register in one instruction.

When the register allocator reuses one vector register for several such
loads, the false dependency serializes otherwise independent chains. In
the GSM autocorrelation loop (9 x i64 multiply-accumulate over i16 taps)
on LA664:

  VF2: 0.953s -> 0.724s
  VF4: 1.446s -> 0.856s
DeltaFile
+76-80llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
+32-50llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
+33-41llvm/test/CodeGen/LoongArch/lsx/scalar-load-to-vector.ll
+30-36llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uitofp.ll
+28-32llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sitofp.ll
+20-32llvm/test/CodeGen/LoongArch/lasx/vec-sext-invec-mask.ll
+219-27121 files not shown
+521-67427 files

LLVM/project 96a415c — llvm/test/CodeGen/LoongArch/lasx scalar-load-to-vector.ll, llvm/test/CodeGen/LoongArch/lsx scalar-load-to-vector.ll

[LoongArch][NFC] Pre-commit tests for loading a scalar into a vector (#234118)
DeltaFile
+237-0llvm/test/CodeGen/LoongArch/lsx/scalar-load-to-vector.ll
+137-0llvm/test/CodeGen/LoongArch/lasx/scalar-load-to-vector.ll
+374-02 files

LLVM/project d11c21a — llvm/lib/Target/SPIRV SPIRV.h SPIRVRemoveUnusedResources.cpp, llvm/test/CodeGen/SPIRV/hlsl-resources remove-unused-resource-dead-handle.ll remove-unused-resources-counter.ll

[hlsl][spirv] Add late pass in spirv backend to remove dead resources (#225270)

Add a pass to remove unused resource handle intrinsics and unused global
variables used to store these handles.
Also remove stores to aforementioned globals that are generated by Clang
as initializers as well as string names only used in dead handle calls.

Based on DXILUnusedResources pass, but differs by removing a resource
global variable if dead regardless of whether the corresponding handle
intrinsic used in its initializer is dead.

Assisted by: codex
DeltaFile
+134-0llvm/lib/Target/SPIRV/SPIRVRemoveUnusedResources.cpp
+51-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resources-live-handle.ll
+49-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resources-loaded-handle.ll
+48-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resources-counter.ll
+29-0llvm/test/CodeGen/SPIRV/hlsl-resources/remove-unused-resource-dead-handle.ll
+9-0llvm/lib/Target/SPIRV/SPIRV.h
+320-06 files not shown
+330-512 files

LLVM/project 83f726a — clang/lib/StaticAnalyzer/Checkers DynamicTypePropagation.cpp NullabilityChecker.cpp, clang/unittests/StaticAnalyzer CheckLifetimeEndTest.cpp BugReportInterestingnessTest.cpp

[analyzer] Handle null nodes from CheckerContext node creation (#238414)

Node creation (addTransition, addSink, generateNonFatalErrorNode)
returns null when the node already exists or the state is
overconstrained. Several callers dereferenced or reported against the
result unchecked.

Fixes:
- NullabilityChecker: reportBugIfInvariantHolds got null from 4 callers
and from its own addTransition
- DynamicTypeChecker, DynamicTypePropagation, PutenvStackArrayChecker
- Unit test checkers that fed addSink() into a bug report unchecked

Authored-By: Claude
DeltaFile
+4-2clang/lib/StaticAnalyzer/Checkers/DynamicTypeChecker.cpp
+3-2clang/unittests/StaticAnalyzer/RegisterCustomCheckersTest.cpp
+2-2clang/lib/StaticAnalyzer/Checkers/DynamicTypePropagation.cpp
+4-0clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp
+1-1clang/unittests/StaticAnalyzer/CheckLifetimeEndTest.cpp
+2-0clang/unittests/StaticAnalyzer/BugReportInterestingnessTest.cpp
+16-71 files not shown
+18-77 files

LLVM/project 5eed099 — flang/lib/Lower OpenACC.cpp, flang/test/Lower/OpenACC acc-data-operands-remapping-selector.f90

[flang][OpenACC] Fix remapping of SELECT TYPE associate names in data clauses

Using the associate name of an allocatable or pointer SELECT TYPE selector
in an OpenACC data clause hit an assertion while lowering, because the
associate name's descriptor type still marked it allocatable or pointer
while the data clause's did not. Convert between the two descriptor types
when they differ only in that way.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+55-1flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
+14-1flang/lib/Lower/OpenACC.cpp
+69-22 files

LLVM/project ad3a846 — mlir/include/mlir/Dialect/LLVMIR ROCDLDialectDecl.h, mlir/include/mlir/Dialect/Tensor/IR TensorDialect.h

[mlir][ODS] Include headers required by generated dialect declarations and definitions

Generated dialect declarations and definitions use C++ constructs that are
not declared by any header they include. They therefore relied on the
surrounding source file to include these headers first.

The dialect declarations now include the header declaring the dialect base
class, and the headers declaring `StringAttr` and `Operation` if the
dialect has discardable attributes. The dialect definitions include
`MLIRContext.h` if they load dependent dialects.

Similar to #236155 and #238735 but for the dialect generator.

Co-authored-by: Claude <noreply at anthropic.com>
DeltaFile
+40-0mlir/test/mlir-tblgen/cpp-includes-dialect.td
+20-0mlir/tools/mlir-tblgen/DialectGen.cpp
+0-3mlir/include/mlir/Dialect/LLVMIR/ROCDLDialectDecl.h
+0-2mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSA.h
+0-2mlir/include/mlir/Dialect/Vector/IR/VectorDialect.h
+0-2mlir/include/mlir/Dialect/Tensor/IR/TensorDialect.h
+60-952 files not shown
+61-7658 files

LLVM/project fed3c60 — libcxx CMakeLists.txt, libcxx/include __config_site.in

[libc++][pstl] Statpart backend is unconditionally used when threading is enabled (#237177)

This PR removes the CMake parameter `LIBCXX_PSTL_BACKEND` and instead
moves the backend selection logic purely into the source code:
- If libc++ is built with threading (`_LIBCPP_HAS_THREADS=1`), the
`statpart` PSTL backend is used.
- Otherwise, the `serial` PSTL backend is used.

`pstl/statpart.cpp` is now added to `LIBCXX_EXPERIMENTAL_SOURCES`
unconditionally.
This also cleans up a few places where the CI is now complaining since
the new backend is used.
DeltaFile
+0-23libcxx/CMakeLists.txt
+3-14libcxx/include/__pstl/backend_fwd.h
+4-12libcxx/include/__pstl/backend.h
+1-6libcxx/src/CMakeLists.txt
+0-6libcxx/include/__config_site.in
+0-4libcxx/test/libcxx/vendor/apple/system-install-properties.sh.cpp
+8-658 files not shown
+17-7414 files

LLVM/project bbdb74d — llvm/test/CodeGen/AArch64 build-vector-extract.ll aarch64-neon-vector-insert-uaddlv.ll

Update Test Checks
DeltaFile
+644-665llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+169-90llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
+13-17llvm/test/CodeGen/AArch64/aarch64-neon-vector-insert-uaddlv.ll
+1-3llvm/test/CodeGen/AArch64/build-vector-extract.ll
+827-7754 files

LLVM/project 3dc3fa5 — llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 shuffle-insert-zero.ll

[AArch64][DAG] Improve codegen for clearing upper vector lanes

Add patterns that use scalar fmov instruction to clear the upper lanes of a vector
DeltaFile
+305-16llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
+54-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+359-162 files

LLVM/project 9b94c48 — mlir/include/mlir/IR EnumAttr.td, mlir/test/IR attribute.mlir enum-attr-roundtrip.mlir

[mlir][ODS] Allow a space-only separator for bit enums (#237149)

Bit enums required a separator containing `|` or `,`, so a flag set
could not be written as bare keywords like LLVM IR's `nuw nsw`, and
dialects wanting that syntax (e.g. ClangIR overflow flags) had to
hand-write an `EnumProp` parser and printer. This allows `separator = "
"` on new-style `BitEnum`s: the generated `FieldParser` reads case
keywords until the next token is not one, symbolize splits on spaces,
and the op-format `enum` directive parses the same way. Like the
existing check for a separator literal, the format verifier rejects a
case literal written right after such an enum, since the parser would
take it as another case. The `BitEnumBase` assert now requires `|`, `,`,
or a space `" "`, where `|` and `,` may be space-padded, so separators
like `"||"` are rejected; legacy `BitEnumAttr` still requires `|` or
`,`. Builds on llvm/llvm-project#237962, which adds the `EnumInfo`
separator accessors.

Assisted-by: Claude Code (Claude Opus 5.5).
DeltaFile
+40-2mlir/tools/mlir-tblgen/EnumsGen.cpp
+30-7mlir/tools/mlir-tblgen/OpFormatGen.cpp
+24-0mlir/test/IR/enum-attr-roundtrip.mlir
+23-0mlir/test/IR/attribute.mlir
+13-8mlir/include/mlir/IR/EnumAttr.td
+20-0mlir/test/mlir-tblgen/enums-gen.td
+150-177 files not shown
+223-2313 files

LLVM/project 443782f — llvm/lib/Transforms/Utils ControlFlowUtils.cpp, llvm/test/Transforms/FixIrreducible basic.ll undef-phis.ll

[ControlFlowHub] Keep the incoming value of a redirected self-loop (#237903)

When reconnectPhis moves a PHI entry for a self-loop of Out (BB == Out)
into the new PHI in the guard block, it replaced the incoming value with
the new PHI itself. That is only right if the incoming value is the
original PHI, and that case is already handled: if the original PHI ends
up with no operands it is replaced by the new PHI everywhere, including
in the new PHI's own operand. Any other value, such as the next value
of an induction variable, was lost.

Keep the incoming value instead. This special case goes back to the
original UnifyLoopExits code, where BB == Out cannot happen.
FixIrreducible
reaches it when the header of an irreducible cycle has a self-loop.

In FixIrreducible/basic.ll the value along the self-loop is now the
input's own undef. In FixIrreducible/undef-phis.ll all the moved values
are now undef, so the PHI is replaced by undef (not poison, after
#237407).

    [3 lines not shown]
DeltaFile
+137-0llvm/test/Transforms/FixIrreducible/phi-self-loop.ll
+4-6llvm/lib/Transforms/Utils/ControlFlowUtils.cpp
+1-2llvm/test/Transforms/FixIrreducible/undef-phis.ll
+1-1llvm/test/Transforms/FixIrreducible/basic.ll
+143-94 files

LLVM/project 26ff0e1 — flang/include/flang/Evaluate tools.h, flang/lib/Evaluate fold-logical.cpp

[Flang][NFC] Remove trivial uses of SearchTypes (#238479)

Second cleanup after #216960

Some uses of `evaluate::SearchTypes` only use for a single TypeCategory.
With KIND not a template parameter anymore and uses only single static
TypeCategory, the visitor code does not need to be polymorphic anymore.
Most of these only look for a specific known-in-advance KIND, such that
we don't even need to loop over all kinds.

For the remaining uses I had the idea to turn `SearchTypes` into a
function that takes a polymorphic lambda. However, some visitor classes
such as `LocationHelper` and `AsConstantHelper` contain more methods
than just the callback method which diminishes the advantage over the
additional change churn.

Change applied using AI
DeltaFile
+40-78flang/lib/Evaluate/fold-logical.cpp
+6-43flang/include/flang/Evaluate/tools.h
+7-30flang/lib/Semantics/expression.cpp
+9-22flang/lib/Semantics/check-case.cpp
+62-1734 files

LLVM/project 98178cd — llvm/test/CodeGen/LoongArch/lasx vec-sext-invec-mask.ll build-vector.ll, llvm/test/CodeGen/LoongArch/lsx scalar-load-to-vector.ll vec-sext.ll

[LoongArch] Load scalars into vector lane 0 with FLD/VLDREPL

Inserting a loaded integer into lane 0 of an undefined vector, which is
also how sub-128-bit vector loads are legalized, was lowered to a scalar
load plus [X]VINSGR2VR. VINSGR2VR merges into its destination, so it
carries a false dependency on the previous value of that register, and
it needs a GPR-to-vector move.

Use FLD.{S/D} for 32/64-bit elements and [X]VLDREPL.{B/H} for 8/16-bit
elements instead. They write the whole register in one instruction.

When the register allocator reuses one vector register for several such
loads, the false dependency serializes otherwise independent chains. In
the GSM autocorrelation loop (9 x i64 multiply-accumulate over i16 taps)
on LA664:

  VF2: 0.953s -> 0.724s
  VF4: 1.446s -> 0.856s
DeltaFile
+76-80llvm/test/CodeGen/LoongArch/lasx/build-vector.ll
+32-50llvm/test/CodeGen/LoongArch/lsx/vec-sext.ll
+33-41llvm/test/CodeGen/LoongArch/lsx/scalar-load-to-vector.ll
+30-36llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uitofp.ll
+28-32llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sitofp.ll
+20-32llvm/test/CodeGen/LoongArch/lasx/vec-sext-invec-mask.ll
+219-27121 files not shown
+521-67427 files

LLVM/project ca4a922 — clang/test/Profile c-mcdc-not.c c-mcdc-nested-ternary.c

[Clang] Use fixed triple for more Profile tests (NFC) (#239186)

The index type size will differ between 32-bit and 64-bit platforms,
producing slightly different IR. Use a fixed 64-bit triple to
keep output consistent.
DeltaFile
+3-3clang/test/Profile/c-mcdc.c
+2-2clang/test/Profile/c-mcdc-not.c
+2-2clang/test/Profile/c-mcdc-nested-ternary.c
+2-2clang/test/Profile/c-mcdc-logicalop-ternary.c
+2-2clang/test/Profile/c-mcdc-class.cpp
+11-115 files

LLVM/project 09c7da1 — llvm/test/CodeGen/LoongArch/lasx scalar-load-to-vector.ll, llvm/test/CodeGen/LoongArch/lsx scalar-load-to-vector.ll

[LoongArch][NFC] Pre-commit tests for loading a scalar into a vector
DeltaFile
+237-0llvm/test/CodeGen/LoongArch/lsx/scalar-load-to-vector.ll
+137-0llvm/test/CodeGen/LoongArch/lasx/scalar-load-to-vector.ll
+374-02 files

LLVM/project 3582495 — clang/lib/CIR/Lowering CIRPasses.cpp, clang/test/CIR/CodeGen call-conv-lowering-amdgpu-cxx-records.cpp call-conv-lowering-amdgpu-return-types.c

[CIR] Enable CallConvLowering for AMDGPU triples
DeltaFile
+165-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-arg-types.c
+158-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-return-types.c
+137-0clang/test/CIR/CodeGenHIP/call-conv-lowering-amdgpu-kernel-args.hip
+74-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-cxx-records.cpp
+4-4clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
+4-2clang/lib/CIR/Lowering/CIRPasses.cpp
+542-61 files not shown
+544-87 files

LLVM/project aa607d7 — llvm/lib/Analysis ValueTracking.cpp InstructionSimplify.cpp, llvm/test/Transforms/InstSimplify ldexp.ll

[InstSimplify] Fix poison propagation for ldexp (#239135)
DeltaFile
+12-4llvm/test/Transforms/InstSimplify/ldexp.ll
+0-5llvm/lib/Analysis/InstructionSimplify.cpp
+2-0llvm/lib/Analysis/ValueTracking.cpp
+14-93 files

LLVM/project 7d21367 — libc/src/__support/OSUtil/linux/syscall_wrappers CMakeLists.txt pkey_free.h, libc/src/sys/mman/linux CMakeLists.txt pkey_free.cpp

[libc] Use a syscall wrapper for pkey_free

This PR move pkey_free behind the centralized syscall wrappers, following libc/docs/dev/syscall_wrapper_refactor.md.
DeltaFile
+39-0libc/src/__support/OSUtil/linux/syscall_wrappers/pkey_free.h
+10-13libc/src/sys/mman/linux/pkey_free.cpp
+17-2utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+13-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+4-3libc/src/sys/mman/linux/CMakeLists.txt
+83-185 files

LLVM/project 51f9073 — libc/src/__support/OSUtil/linux/syscall_wrappers CMakeLists.txt pkey_alloc.h, libc/src/sys/mman/linux CMakeLists.txt pkey_alloc.cpp

[libc] Use a syscall wrapper for pkey_alloc

This PR move pkey_alloc behind the centralized syscall wrappers, following libc/docs/dev/syscall_wrapper_refactor.md.
DeltaFile
+40-0libc/src/__support/OSUtil/linux/syscall_wrappers/pkey_alloc.h
+11-15libc/src/sys/mman/linux/pkey_alloc.cpp
+17-2utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+13-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+4-3libc/src/sys/mman/linux/CMakeLists.txt
+85-205 files

LLVM/project e606eb9 — libc/src/__support/OSUtil/linux/syscall_wrappers CMakeLists.txt mremap.h, libc/src/sys/mman/linux CMakeLists.txt mremap.cpp

[libc] Use a syscall wrapper for mremap

This PR move mremap behind the centralized syscall wrappers, following libc/docs/dev/syscall_wrapper_refactor.md.
DeltaFile
+38-0libc/src/__support/OSUtil/linux/syscall_wrappers/mremap.h
+12-13libc/src/sys/mman/linux/mremap.cpp
+17-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+13-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+4-2libc/src/sys/mman/linux/CMakeLists.txt
+84-165 files

LLVM/project 8ac35aa — mlir/include/mlir/IR OpBase.td, mlir/include/mlir/Interfaces ViewLikeInterface.td DataLayoutInterfaces.td

[mlir][ODS] Set `cppIncludes` on core traits and interfaces

Set the `cppIncludes` field introduced in #236155 on the traits and
interfaces defined in MLIR's core. Generated declarations using them now include the
headers declaring them.
Dialect interfaces get the field as well, although their generated
declarations do not emit includes yet.

Record-level `let` statements were generally preferred (as is currently convention with e.g., `cppNamespace`) with just occasional use of top-level `let` for e.g., many small trait definitions.

Co-authored-by: Claude <noreply at anthropic.com>
DeltaFile
+11-3mlir/include/mlir/Interfaces/SideEffectInterfaces.td
+11-1mlir/include/mlir/IR/OpBase.td
+9-2mlir/include/mlir/Interfaces/InferTypeOpInterface.td
+9-0mlir/include/mlir/Interfaces/MemorySlotInterfaces.td
+8-0mlir/include/mlir/Interfaces/DataLayoutInterfaces.td
+5-1mlir/include/mlir/Interfaces/ViewLikeInterface.td
+53-740 files not shown
+135-1046 files

LLVM/project 328395d — llvm/lib/CodeGen MachineSink.cpp, llvm/test/CodeGen/X86 setuge.ll

[MachineSink] Don't pass LiveIntervals and SlotIndexes to SplitCriticalEdge (#238888)

LiveIntervals and SlotIndexes are not used by this pass.
SplitCriticalEdge does not need them as well. This removes them and all
mentions of those analysis from MachineSink.

This was causing a crash under NewPM pipeline because SlotIndexes were
passed to SplitCriticalEdge, which was attempting to update it, but the
SI became corrupted in PerformTrivialForwardCoalescing which destroys MI
without updating SI
DeltaFile
+9-19llvm/lib/CodeGen/MachineSink.cpp
+1-0llvm/test/CodeGen/X86/setuge.ll
+10-192 files

LLVM/project bb09e01 — compiler-rt/lib/copyprof/tests copyprof_state_test.cpp

[CopyProf][NFC] Add argument comments in state test. (#237763)

Split out of #232851 as requested in review.

Stack: #237763 (this PR) → #232851 → #235453 → #235454 → #235455
DeltaFile
+3-3compiler-rt/lib/copyprof/tests/copyprof_state_test.cpp
+3-31 files

LLVM/project aed9799 — lld/test/ELF loongarch-relax-tlsdesc.s loongarch-pc-hi20-lo12-got.s

[LoongArch][MC] Support --print-imm-hex and --no-print-imm-hex (#236024)

Fix llvm-objdump's `--print-imm-hex` and `--no-print-imm-hex` support on
LoongArch, it's worth noticing that the default behaviour is print hex
format immediate, which is different from binutils objdump.
DeltaFile
+37-37lld/test/ELF/loongarch-pc-aligned.s
+8-8lld/test/ELF/loongarch-tls-ld.s
+8-8lld/test/ELF/loongarch-relax-pc-hi20-lo12.s
+7-7lld/test/ELF/loongarch-relax-align.s
+6-6lld/test/ELF/loongarch-pc-hi20-lo12-got.s
+5-5lld/test/ELF/loongarch-relax-tlsdesc.s
+71-71152 files not shown
+288-288158 files

LLVM/project cdbc581 — libc/test/UnitTest LibcTest.h

[libc][test] Reference callables in skipped death tests (#234960)

When death or subprocess tests are skipped, expanding EXPECT_DEATH and
ASSERT_DEATH to empty macros discards callables before type checking.
This triggers unused parameter or variable warnings under -Werror when a
test sets up a variable or parameter solely for a death check.

Evaluate callables and expected values in an unevaluated block inside do
{ if (false) { ... } } while (false). The compiler type-checks the
expression and marks captured variables as referenced, while the dead
code is eliminated at compile time.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+14-6libc/test/UnitTest/LibcTest.h
+14-61 files

LLVM/project d30733a — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 scalable-expanding-load.ll

[AArch64][SVE] Support unpacked types for llvm.masked.expandload (#238810)

Assisted-by: Codex (tests)
DeltaFile
+67-0llvm/test/CodeGen/AArch64/scalable-expanding-load.ll
+11-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+78-22 files

LLVM/project 7fe8b7a — clang/test/CIR/CodeGen call-conv-lowering-amdgpu-cxx-records.cpp call-conv-lowering-amdgpu-return-types.c, clang/test/CIR/CodeGenHIP cleanup-alloca-addrspace.hip lambda-reference-var.hip

[CIR] Enable CallConvLowering for AMDGPU triples
DeltaFile
+165-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-arg-types.c
+158-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-return-types.c
+137-0clang/test/CIR/CodeGenHIP/call-conv-lowering-amdgpu-kernel-args.hip
+74-0clang/test/CIR/CodeGen/call-conv-lowering-amdgpu-cxx-records.cpp
+4-4clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
+6-2clang/test/CIR/CodeGenHIP/lambda-reference-var.hip
+544-64 files not shown
+560-1410 files

LLVM/project f873c23 — libc/src/__support/OSUtil/linux/syscall_wrappers CMakeLists.txt madvise.h, libc/src/sys/mman/linux CMakeLists.txt madvise.cpp

[libc] Use a syscall wrapper for madvise

This PR move madvise behind the centralized syscall wrappers, following libc/docs/dev/syscall_wrapper_refactor.md.
DeltaFile
+35-0libc/src/__support/OSUtil/linux/syscall_wrappers/madvise.h
+10-12libc/src/sys/mman/linux/madvise.cpp
+17-2utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+13-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+5-3libc/src/sys/mman/linux/CMakeLists.txt
+80-175 files

LLVM/project 17f3955 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp

[LV] Inline filterExtractingOperands (NFC) (#238745)

Inline filterExtractingOperands in its single use-site, and improve code
around it.
DeltaFile
+4-17llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+4-171 files

LLVM/project eb36b48 — llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/InstCombine/AArch64 sve-intrinsic-dupqlane.ll

[LLVM][AArch64] Ensure compatible indices when converting dupq to dup_lane. (#238488)

instCombineSVEDupqLane was not verifying the subvector being splatted
matched the one being inserted. At the same time I've also added a check
to ensure the quad index is zero because otherwise we'll generate the
wrong result for out-of-range indices.

Fixes https://github.com/llvm/llvm-project/issues/235610
DeltaFile
+38-0llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-dupqlane.ll
+6-1llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+44-12 files