LLVM/project 7c97178clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/test/Sema warn-lifetime-safety-invalidations.cpp

Revert "[LifetimeSafety] Detect iterator invalidation through container aliases" (#195702)

This introduces unintended side effects and causes downstream crashes,
so reverting for now.

Reverts llvm/llvm-project#195231
DeltaFile
+21-65clang/test/Sema/warn-lifetime-safety-invalidations.cpp
+3-5clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+24-702 files

LLVM/project b2d9a21clang/test/CodeGen fp-floatcontrol-stack.cpp attr-signaling-nans.c, clang/test/Options Gis.hlsl

Fix tests and documentation

Also changes intersect behavior to IntersectPreserve, because
IntersectCustom is implemented only forIntAttr.
DeltaFile
+6-6llvm/docs/LangRef.rst
+6-6clang/test/CodeGen/fp-floatcontrol-stack.cpp
+0-5llvm/lib/IR/Attributes.cpp
+2-2clang/test/CodeGen/attr-signaling-nans.c
+2-1llvm/include/llvm/IR/Attributes.td
+1-1clang/test/Options/Gis.hlsl
+17-211 files not shown
+18-227 files

LLVM/project 7ca6c5fllvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

rebase

Created using spr 1.3.7
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513820 files not shown
+40,568-20,936826 files

LLVM/project 770766fllvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513820 files not shown
+40,568-20,936826 files

LLVM/project 7a7efa2lldb/test/API/tools/lldb-dap/coreFile TestDAP_coreFile.py, lldb/tools/lldb-dap DAP.h

[lldb-dap] Fix core file stop reason overridden to "entry" (#195352)

# Summary:
There's a behavior change on core file stop reason
It used to report the actual crash (stop) reason:
  - reason: "exception" (reflecting the actual crash signal/exception)
  - description:  crash signals, eg."signal SIGSEGV"

However, the stopped event now always reports:
  - reason: "entry"
  - The crash reason is lost

## Root Cause
1. `bd0efcaa34b1` (Oct 31, 2025) — "[lldb-dap] Correctly trigger 'entry'
stop reasons"

This commit changed CreateThreadStopped in `JSONUtils.cpp`:
Changed `body.try_emplace("reason", "entry")` to `body["reason"] =
"entry"`, and this will overwrites it unconditionally.

    [28 lines not shown]
DeltaFile
+31-0lldb/test/API/tools/lldb-dap/coreFile/TestDAP_coreFile.py
+3-1lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
+1-1lldb/tools/lldb-dap/Handler/ConfigurationDoneRequestHandler.cpp
+1-0lldb/tools/lldb-dap/DAP.h
+36-24 files

LLVM/project 9e64223llvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

rebase

Created using spr 1.3.7
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513827 files not shown
+40,816-21,128833 files

LLVM/project 0698b46llvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513827 files not shown
+40,816-21,128833 files

LLVM/project 8e34113compiler-rt/test/asan/TestCases use-after-poison-history-size-partial-granule.cpp

[NFC][asan] Cleanup use-after-poison-history-size-partial-granule.cpp test (#195667)

Update the test to use more robust argument passing for offsets and
sizes.
DeltaFile
+18-11compiler-rt/test/asan/TestCases/use-after-poison-history-size-partial-granule.cpp
+18-111 files

LLVM/project e6d1676lldb/bindings/python get-python-config.py

[lldb] Use (_d).pyd as Python extension suffix on Windows (#195262)

The current Windows x86_x64 installer ships a `_lldb.abi3None` in
`lib\site-packages\lldb\native`. This will cause errors when trying to
import LLDB in Python.

We always use `.abi3{SHLIB_SUFFIX}` as the Python extension suffix in
`get-python-config.py`. On Windows(-msvc), this won't result in the
correct path. `SHLIB_SUFFIX` is not defined there.

The recognized extensions are:
```console
> python -c "import importlib.machinery;print(importlib.machinery.EXTENSION_SUFFIXES)"
['.cp314-win_amd64.pyd', '.pyd']
> python_d -c "import importlib.machinery;print(importlib.machinery.EXTENSION_SUFFIXES)"
['_d.cp314-win_amd64.pyd', '_d.pyd']
```

The first one is equal to `sysconfig.get_config_var("EXT_SUFFIX")`.

    [6 lines not shown]
DeltaFile
+9-1lldb/bindings/python/get-python-config.py
+9-11 files

LLVM/project 75f884bllvm/include/llvm/SandboxIR Region.h, llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer RegionWithScore.h

Revert "[SandboxIR][SandboxVec] Remove score tracking from Region, add RegionWithScore" (#195708)

Reverts llvm/llvm-project#190293
DeltaFile
+0-102llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/RegionWithScore.h
+77-20llvm/unittests/SandboxIR/RegionTest.cpp
+0-84llvm/unittests/Transforms/Vectorize/SandboxVectorizer/RegionWithScoreTest.cpp
+51-29llvm/include/llvm/SandboxIR/Region.h
+43-7llvm/lib/SandboxIR/Region.cpp
+0-34llvm/lib/Transforms/Vectorize/SandboxVectorizer/RegionWithScore.cpp
+171-2767 files not shown
+182-29113 files

LLVM/project f97f3efcompiler-rt/lib/asan asan_poisoning.cpp

Update asan_poisoning.cpp
DeltaFile
+0-2compiler-rt/lib/asan/asan_poisoning.cpp
+0-21 files

LLVM/project 5dbbd73compiler-rt/lib/asan asan_poisoning.cpp

Add FIXME comment for RecordPoison consideration

Added a FIXME comment to consider RecordPoison in asan_poisoning.cpp.
DeltaFile
+3-0compiler-rt/lib/asan/asan_poisoning.cpp
+3-01 files

LLVM/project 5399086llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp, llvm/test/CodeGen/AArch64 freeze-load-zext-copytoreg.ll

[SelectionDAG] Look through FREEZE in getCopyToRegs when checking isZExtFree (#195285)

When a narrow load i8 or i16 is frozen and its value crosses a basic
block, `getCopyToRegs` emits `any_extend` instead of `zero_extend`
because `isZExtFree` can't see through the `ISD::FREEZE` node.

Example: https://godbolt.org/z/MYvjq8vPM contains an redundant `and w11,
w11, 0xff`
```
        ldrb    w11, [x10], #1
        cmp     w11, #32
        b.lo    .LBB0_1
        and     w11, w11, #0xff
```

Fix this by passing the incoming node to the freeze to `isZExtFree`
instead.
DeltaFile
+162-0llvm/test/CodeGen/PowerPC/freeze-load-zext-copytoreg.ll
+156-0llvm/test/CodeGen/RISCV/freeze-load-zext-copytoreg.ll
+148-0llvm/test/CodeGen/AArch64/freeze-load-zext-copytoreg.ll
+3-2llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+469-24 files

LLVM/project da28d01mlir/include/mlir/Dialect/OpenACC OpenACCCGOps.td OpenACCOpsTypes.td, mlir/test/Dialect/OpenACC ops-cg-privatization.mlir

[mlir][acc] Introduce privatization operations for codegen (#195273)

This change adds codegen-oriented operations for representing
private-variable storage and materializing the storage that a particular
parallel execution actually uses.

The two operations are meant to be used together:
- acc.privatize introduces an abstract handle for the privatized
storage,
including the parallel levels that determine the ultimate size of the
storage needed. Which parallel levels apply can be stated when that
structure is known, or omitted so the same representation can be refined
later as launch and loop parallelism are decided.
- acc.private_local takes that handle and yields the concrete storage
for the current execution context(for example the slice that corresponds
to this gang or worker).
DeltaFile
+116-0mlir/test/Dialect/OpenACC/ops-cg-privatization.mlir
+65-0mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+11-0mlir/include/mlir/Dialect/OpenACC/OpenACCOpsTypes.td
+192-03 files

LLVM/project ffa3e2bllvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

rebase

Created using spr 1.3.7
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513819 files not shown
+40,137-21,094825 files

LLVM/project 84fe3a2llvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513819 files not shown
+40,137-21,094825 files

LLVM/project fa48d10clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/test/Sema warn-lifetime-safety-invalidations.cpp

Revert "[LifetimeSafety] Detect iterator invalidation through container alias…"

This reverts commit b561bdbedd7bb59112cbb3eeafda70e3493555f4.
DeltaFile
+21-65clang/test/Sema/warn-lifetime-safety-invalidations.cpp
+3-5clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+24-702 files

LLVM/project 0d1bd85llvm/include/llvm/ADT ArrayRef.h

[NFC][LLVM][ADT] Fix indendation for ArrayRef.h (#195522)

Remove extra indendation for ArrayRef.h in conformance with
https://llvm.org/docs/CodingStandards.html#namespace-indentation
DeltaFile
+474-486llvm/include/llvm/ADT/ArrayRef.h
+474-4861 files

LLVM/project 40a97b5clang-tools-extra/clang-tidy/modernize UseStringViewCheck.cpp UseStringViewCheck.h, clang-tools-extra/test/clang-tidy/checkers/modernize use-string-view-overloaded.cpp use-string-view.cpp

Revert "[clang-tidy] An option for conditional skipping overloaded functions …"

This reverts commit c859a273b516b5b50ab0967c966a913401dd47eb.
DeltaFile
+0-146clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view-overloaded.cpp
+91-0clang-tools-extra/test/clang-tidy/checkers/modernize/use-string-view.cpp
+3-7clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.cpp
+0-4clang-tools-extra/clang-tidy/modernize/UseStringViewCheck.h
+94-1574 files

LLVM/project a0330b3flang/lib/Optimizer/CodeGen CodeGen.cpp, flang/test/Fir convert-to-llvm-access-group.fir

[flang] Fix missed access group attribute when converting FIR to LLVM dialect. (#195376)

Apply group access attribute to memcpy when lowering fir.load/fir.store
of a box if an original FIR operation had it.
DeltaFile
+109-0flang/test/Fir/convert-to-llvm-access-group.fir
+10-2flang/lib/Optimizer/CodeGen/CodeGen.cpp
+119-22 files

LLVM/project c738bfacompiler-rt/lib/asan asan_errors.cpp

[asan] Change error to note when poison record is not found (#195669)

When `CheckPoisonRecords` fails to find a record, it's often due to the
history buffer being too small rather than a functional error in the
logic.
DeltaFile
+1-1compiler-rt/lib/asan/asan_errors.cpp
+1-11 files

LLVM/project 4e32fa9llvm/test/CodeGen/AArch64 rem-by-const.ll mul_pow2.ll, llvm/test/CodeGen/AArch64/GlobalISel combine-sub-of-mul-const.ll

[GIsel] Add combine (sub a, (mul x, C)) -> (add a, (mul x, -C)) (#194282)

Copy this canonicalization from InstCombine so it can run on
post-legalized expansions. This is especially useful if the sub is a
neg.
DeltaFile
+370-389llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+160-172llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+142-75llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
+98-95llvm/test/CodeGen/AArch64/rem-by-const.ll
+91-0llvm/test/CodeGen/AArch64/GlobalISel/combine-sub-of-mul-const.ll
+57-25llvm/test/CodeGen/AArch64/mul_pow2.ll
+918-7567 files not shown
+1,036-81813 files

LLVM/project ba728cellvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

rebase

Created using spr 1.3.7
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513805 files not shown
+38,538-19,828811 files

LLVM/project 97dec52llvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513805 files not shown
+38,538-19,828811 files

LLVM/project 8ebe9d5llvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

rebase

Created using spr 1.3.7
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513803 files not shown
+38,523-19,803809 files

LLVM/project a5313a2llvm/test/CodeGen/X86 vector-reduce-smin.ll vector-reduce-smax.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+2,928-1,388llvm/test/CodeGen/X86/vector-reduce-smin.ll
+2,924-1,389llvm/test/CodeGen/X86/vector-reduce-smax.ll
+2,677-1,279llvm/test/CodeGen/X86/vector-reduce-umax.ll
+2,628-1,271llvm/test/CodeGen/X86/vector-reduce-umin.ll
+1,491-563llvm/test/CodeGen/X86/vector-reduce-or-cmp.ll
+1,334-623llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
+13,982-6,513803 files not shown
+38,523-19,803809 files

LLVM/project b8142eccompiler-rt/lib/asan asan_errors.cpp

[asan] Improve manual poison reporting (#195666)

Always print the thread ID that poisoned the memory, even if the
stack trace is unavailable.
DeltaFile
+2-3compiler-rt/lib/asan/asan_errors.cpp
+2-31 files

LLVM/project bda0016mlir/include/mlir/Dialect/AMDGPU/IR AMDGPUOps.td, mlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp

[MLIR][AMDGPU] Add amdgpu.global_transpose_load op for gfx1200+ global memory transpose loads (#195287)

Adds a new `amdgpu.global_transpose_load` op to the AMDGPU dialect that
wraps the `global_load_tr` family of instructions introduced in RDNA4
(gfx1250+). Each thread reads a column of a matrix from global memory
and receives the corresponding transposed row in its result register.

The op is kept separate from the existing `amdgpu.transpose_load` (which
targets LDS via `ds_read_tr` on gfx950+) because the two variants target
different GPU architecture families, have different chipset
requirements, and differ in their valid (element size, num elements)
combinations — in particular the 16-bit case produces a 128-bit
(8-element) result via `global_load_tr.b128` rather than the 64-bit
(4-element) result from `ds_read_tr16.b64`.

Lowering to the existing ROCDL `global.load.tr{4,6,.}.b{64,96,128}`
intrinsics added for gfx1200+.

---------

    [2 lines not shown]
DeltaFile
+81-1mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+57-0mlir/test/Conversion/AMDGPUToROCDL/global_transpose_load.mlir
+49-0mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
+37-0mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
+10-0mlir/test/Dialect/AMDGPU/invalid.mlir
+9-0mlir/test/Dialect/AMDGPU/ops.mlir
+243-16 files

LLVM/project b057c78mlir/lib/Conversion/MathToLLVM MathToLLVM.cpp, mlir/test/Conversion/MathToLLVM math-to-llvm.mlir

[mlir][MathToLLVM] Fix vector type checks in math.absi lowering. (#195360)

For vector types, the lowered type is LLVMArrayType not VectorType. We
should use the original result type to guide if we can do the lowering
for vectors or not.

Signed-off-by: hanhanW <hanhan0912 at gmail.com>
DeltaFile
+11-0mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
+1-1mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
+12-12 files

LLVM/project d27d0f0mlir/include/mlir/Dialect/SPIRV/IR SPIRVBarrierOps.td SPIRVTypes.h, mlir/lib/Dialect/SPIRV/IR SPIRVTypes.cpp SPIRVDialect.cpp

[mlir][SPIRV] Add named-barrier type and OpNamedBarrierInitialize / OpMemoryNamedBarrier (#195664)

Adds the SPIR-V named-barrier object (TypeNamedBarrier) along with
NamedBarrierInitialize and MemoryNamedBarrier ops, gated on the
NamedBarrier capability and SPIR-V 1.1+.

---------

Co-authored-by: Claude Opus 4.7 (1M context) <noreply at anthropic.com>
DeltaFile
+101-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td
+34-0mlir/test/Dialect/SPIRV/IR/barrier-ops.mlir
+17-4mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp
+15-1mlir/test/Target/SPIRV/barrier-ops.mlir
+11-0mlir/include/mlir/Dialect/SPIRV/IR/SPIRVTypes.h
+9-2mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp
+187-76 files not shown
+222-712 files