LLVM/project 08fb771clang/lib/CodeGen CGDebugInfo.cpp, clang/test/DebugInfo/CXX limited-ctor.cpp

Revert "[DebugInfo] Ignore undefined constexpr constructors in constructor homing." (#221566)

This reverts commit
https://github.com/llvm/llvm-project/commit/6ba0802b406e0963720a698702b9136578dde149
(https://github.com/llvm/llvm-project/pull/218165).

canUseCtorHoming() used to bail out on
hasConstexprNonCopyMoveConstructor().
That commit narrowed the exemption to *defined* constexpr constructors,
on the
assumption that a constructor which is not defined here will be defined
- and
will therefore emit the type's debug info - in whichever translation
unit
constructs the object.

That assumption does not hold when the constructor is never invoked at
all. A
constructor of a class template specialization is only instantiated, and

    [86 lines not shown]
DeltaFile
+35-2clang/test/DebugInfo/CXX/limited-ctor.cpp
+5-15clang/lib/CodeGen/CGDebugInfo.cpp
+40-172 files

LLVM/project c2dd24dllvm/lib/Transforms/InstCombine InstCombineCompares.cpp, llvm/test/Transforms/InstCombine overflow-mul.ll saturating-add-sub.ll

[InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (#220658)

Change processUMulZExtIdiom to also support adds, since the idiom is the
same, except with add instead of mul.

Alive2: https://alive2.llvm.org/ce/z/SsB4AK
DeltaFile
+84-71llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+71-0llvm/test/Transforms/InstCombine/uadd-with-overflow.ll
+53-0llvm/test/Transforms/InstCombine/saturating-add-sub.ll
+2-2llvm/test/Transforms/InstCombine/overflow-mul.ll
+210-734 files

LLVM/project cc4b3c9llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/Hexagon sffms.ll

DAGCombiner: Drop AllowFPOpFusion from visitFSUBForFMACombine (#221439)

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+3-3llvm/test/CodeGen/Hexagon/sffms.ll
+3-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+6-62 files

LLVM/project 2592405llvm/lib/Target/AMDGPU AMDGPUSubtarget.h AMDGPUSubtarget.cpp

[NFC][AMDGPU] Inline `getEffectiveWavesPerEU`

This function only has one use. No need to keep it.
DeltaFile
+22-31llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+0-9llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+22-402 files

LLVM/project 6c81c90llvm/test/CodeGen/X86 branch-folding-landing-pads.ll

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+97-0llvm/test/CodeGen/X86/branch-folding-landing-pads.ll
+97-01 files

LLVM/project 525b9e5llvm/lib/CodeGen BranchFolding.cpp, llvm/test/CodeGen/PowerPC 2007-11-16-landingpad-split.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+96-0llvm/test/CodeGen/X86/branch-folding-landing-pads.ll
+8-24llvm/test/CodeGen/RISCV/lpad.ll
+25-0llvm/lib/CodeGen/BranchFolding.cpp
+8-13llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
+10-10llvm/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll
+7-9llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
+154-561 files not shown
+154-587 files

LLVM/project bc31234llvm/test/CodeGen/X86 branch-folding-landing-pads.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+97-0llvm/test/CodeGen/X86/branch-folding-landing-pads.ll
+97-01 files

LLVM/project 7fd679autils/bazel/llvm-project-overlay/mlir BUILD.bazel

[Bazel] Fixes 64171f0 (#221585)

This fixes 64171f09367ae70475eebe9184353ca5948681fb (#221123).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=64171f09367ae70475eebe9184353ca5948681fb

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+3-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+3-01 files

LLVM/project ca64854llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPUtils.h SLPUtils.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+198-84llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+92-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
+31-35llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
+13-43llvm/test/Transforms/SLPVectorizer/RISCV/gep-mixed-index-types.ll
+17-22llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
+34-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
+385-1849 files not shown
+450-26315 files

LLVM/project 746ad7fclang/utils/TableGen CIRLoweringEmitter.cpp

[CIR] Derive lowering attr names from cppClassName, not the def name

CIRLoweringEmitter built its CXX_ABI_ALWAYS_LEGAL_ATTRS entries with
GetOpCppClassName, which splits the TableGen def name at the first
underscore. That works only while every def is named CIR_<CppClassName>Attr.
When one is not, the emitter writes an `isa<>` for a class that does not
exist, and the failure lands as a compile error in generated code.

Attributes carry the authoritative name in cppClassName, which
GenerateAttrToValueVisitor was already reading. Factor that out as
GetAttrCppClassRef and use it for both attribute paths. GetOpCppClassName
stays for operations.

NFC, and checkable. No CIR attribute overrides cppClassName, so the generated
CIRLowering.inc is byte-identical.
DeltaFile
+16-10clang/utils/TableGen/CIRLoweringEmitter.cpp
+16-101 files

LLVM/project fb01722clang/include/clang/CIR/Dialect/IR CIRAttrs.td, clang/test/CIR/CodeGen callsite-inline-attributes.cpp

[CIR] Drop the redundant suffix from the inline kind mnemonic

inline_kind was the one CIR enum attribute mnemonic still repeating what its
C++ enum class name says. The attribute now spells
`#cir.inline<always_inline>`. The operation argument keeps the name
inline_kind, since that is the accessor name, so the printed form reads
`inline_kind = #cir.inline<always_inline>`.

The enum's summary also becomes "inline kind" rather than the camelCase
"inlineKind", which is what generated docs show now that CIR_InlineKindAttr
no longer overrides it.

25 CHECK lines change across four test files. Nine are in an
aarch64-registered-target test, unsupported in an X86-only build, but the
substitution matches the two CIR tests that do run.
DeltaFile
+9-9clang/test/CodeGen/AArch64/sme-inline-callees-streaming-attrs.c
+9-9clang/test/CIR/CodeGen/callsite-inline-attributes.cpp
+6-6clang/test/CIR/IR/inline-attrs.cir
+2-3clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+2-2clang/test/CIR/IR/invalid-call.cir
+28-295 files

LLVM/project 51ef39cclang/include/clang/CIR/Dialect/IR CIRCUDAAttrs.td CIRTypes.td

[CIR] Use the modern enum case classes

The `I32EnumAttrCase` family carries an `Attr` half, and an `IntegerAttr`
predicate with it, that a CIR enum has no use for now that the enums derive
from `EnumInfo`. Upstream says of those forms that they "are not needed when
using the newer `EnumCase` form".

Rename all 198 of them to `I32EnumCase`, `I32BitEnumCaseNone`,
`I32BitEnumCaseBit` and `BitEnumCaseGroup`. The group class drops its width
prefix because the modern spelling takes the width from its cases.

NFC, mechanical.
DeltaFile
+140-140clang/include/clang/CIR/Dialect/IR/CIROps.td
+43-43clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+8-8clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
+4-4clang/include/clang/CIR/Dialect/IR/CIRTypes.td
+3-3clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
+198-1985 files

LLVM/project 046466fllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 horizontal.ll getelementptr.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+567-21llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+67-53llvm/test/Transforms/SLPVectorizer/X86/loop-accumulator-reduction.ll
+43-33llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
+24-18llvm/test/Transforms/SLPVectorizer/AArch64/getelementptr.ll
+8-12llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
+11-8llvm/test/Transforms/SLPVectorizer/AArch64/horizontal.ll
+720-1451 files not shown
+726-1547 files

LLVM/project 7545fb3clang/include/clang/Basic AttrDocs.td, llvm/test/CodeGen/AArch64 vector-ldst-align-float.ll

fix bad static_cast that caused test failures and add comments

Created using spr 1.3.8-beta.1-arichardson
DeltaFile
+17,286-3,454llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+13,787-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+9,921-0llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+7,985-1,589llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-neon-instructions.s
+6,355-3,146llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+4,556-4,169clang/include/clang/Basic/AttrDocs.td
+59,890-19,21417,453 files not shown
+1,082,239-547,94517,459 files

LLVM/project 21e5bbdclang/include/clang/Basic AttrDocs.td, llvm/test/CodeGen/AArch64 vector-ldst-align-float.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1-arichardson

[skip ci]
DeltaFile
+17,286-3,454llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+13,787-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+9,921-0llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+7,985-1,589llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-neon-instructions.s
+6,355-3,146llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+4,556-4,169clang/include/clang/Basic/AttrDocs.td
+59,890-19,21417,452 files not shown
+1,082,221-547,94217,458 files

LLVM/project efa4371clang/include/clang/CIR/Dialect/IR CIREnumAttr.td CIROps.td

[CIR] Drop dead ceremony around the CIR enum attributes

Five things that no longer earn their place in the CIR enum attribute
machinery.

CIR_CleanupKindAttr carried three. Its cppClassName restated the default
AttrDef already derives. Its skipDefaultBuilders plus hand-written
AttrBuilder existed only to default $value to CleanupKind::All, which no
caller relies on, so the generated builders stayed suppressed for nothing.
And its summary and description restated the name, overriding the enum's own
"cleanup kind" that EnumAttr would otherwise inherit. The isNormal, isEH and
isNormalAndEH helpers stay.

CIR_TLSModelAttr's summary restated its name the same way, so only that goes.
CIR_DefaultValuedEnumParameter has never had a user.

NFC.
DeltaFile
+0-16clang/include/clang/CIR/Dialect/IR/CIROps.td
+0-5clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
+0-212 files

LLVM/project fcc4537clang/include/clang/CIR/Dialect/IR CIROps.td, clang/test/CIR/CodeGenBuiltins builtin-isinf-sign.c builtin-isfpclass.c

[CIR] Migrate the FPClassTest bit enum and unquote its flags

cir.is_fp_class printed its flags inconsistently. Single-bit values came out
bare, as in `fcSNan`, while group values and combinations came out quoted, as
in `"fcInf"` and `"fcSNan|fcNegInf"`. That comes from I32BitEnumAttr setting
printBitEnumQuoted, which EnumAttr.td keeps only for backwards compatibility.

Clearing the bit and using the `enum` directive selects the separator-aware
parser and printer, so every value now spells unquoted:

  cir.is_fp_class %x, fcSNan|fcNegInf : (!cir.float) -> !cir.bool

The enum also drops its specialized IntegerAttr for a CIR_EnumAttr wrapper,
giving it the standalone spelling `#cir.fp_class<fcSNan|fcNegInf>`. This
changes operation syntax, so it updates 37 CHECK lines.
DeltaFile
+20-20clang/test/CIR/CodeGenBuiltins/builtin-fpclassify.c
+16-16clang/test/CIR/CodeGenBuiltins/builtin-isfpclass.c
+20-0clang/test/CIR/IR/enum-attrs.cir
+12-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+1-1clang/test/CIR/CodeGenBuiltins/builtin-isinf-sign.c
+69-395 files

LLVM/project 6883a31clang/include/clang/CIR/Dialect/IR CIRTypes.td CIRCUDAAttrs.td, clang/test/CIR/IR invalid-call.cir

[CIR] Move the CIR enums off the legacy EnumAttrInfo hierarchy

MLIR has two enum hierarchies. `EnumAttrInfo` doubles as an `IntegerAttr`
constraint, so every CIR enum had to clear `genSpecializedAttr` to say it did
not want one. `EnumInfo` describes a C++ enum and nothing more.

Derive the CIR bases from `I32Enum`, `I64Enum` and `I32BitEnum`, and widen
`CIR_EnumAttr` to the `EnumInfo` that upstream `EnumAttr` already takes. The
flag no longer exists to clear. `FPClassTestEnum` gets unquoted printing from
`BitEnumBase` rather than overriding `printBitEnumQuoted`, and
`CIR_KnownFuncKind` drops a `parameterPrinter` the generated `operator<<`
now covers, still spelling `#cir.func_identity<"std::find">`.

AMDGPU wraps an `I32Enum` in an `EnumAttr` with this same bracketed format.
Parsing moves to the generated `FieldParser`, whose diagnostic names the
accepted spellings, so two `expected-error` lines change. Generated attribute
code drops 16 KB as 28 inlined parsers collapse into it.
DeltaFile
+33-73clang/include/clang/CIR/Dialect/IR/CIROps.td
+23-53clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+13-9clang/include/clang/CIR/Dialect/IR/CIREnumAttr.td
+2-4clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
+1-3clang/include/clang/CIR/Dialect/IR/CIRTypes.td
+1-1clang/test/CIR/IR/invalid-call.cir
+73-1431 files not shown
+74-1447 files

LLVM/project 6c978c6llvm/test/Transforms/SLPVectorizer/AArch64 loop-accumulator-reduction.ll

[SLP][NFC]Add some more tests for loop accumulated reductions, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/221597
DeltaFile
+1,019-8llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
+1,019-81 files

LLVM/project 3da9899flang-rt/include/flang-rt/runtime file.h connection.h, flang/include/flang/Common optional.h

[flang-rt] Initialize I/O unit storage read by short-circuit predicates (#221126)

ConnectionState and OpenFile hold common::optional members read through
predicates of the form `opt && x < *opt`, which never use an indeterminate
value in the abstract machine. Compilers do, however, routinely if-convert
the short-circuit && into a branchless compare and select, which speculates
the payload load; because these objects are placement-new'd into malloc'd
storage by UnitMap::Create(), a memory checker then reports a conditional
branch that depends on uninitialized memory. On AArch64 this fires for
every Fortran program that writes a record, giving two reports in
ExternalFileUnit::AdvanceRecord() from IsAfterEndfile() and IsAtEOF(),
while x86-64 is unaffected and libgfortran is clean on the same program and
host. The reports are false positives -- the engaged flag is 0, so both arms
of the select are 0 -- but they are unavoidable noise for anyone running
Valgrind on Fortran code.

Add common::ResetWithDefinedPayload(), which leaves an optional disengaged 
while writing its payload storage, and call it at construction for the
optionals in ConnectionAttributes, ConnectionState and OpenFile. Also

    [15 lines not shown]
DeltaFile
+25-0flang/include/flang/Common/optional.h
+14-0flang-rt/include/flang-rt/runtime/connection.h
+9-1flang-rt/include/flang-rt/runtime/file.h
+48-13 files

LLVM/project bb3fe4aflang/include/flang/Evaluate intrinsics.h, flang/lib/Evaluate intrinsics.cpp

[flang] Reclassify MVBITS, SPLIT, and TOKENIZE as SIMPLE (#205024)

F2023 makes MVBITS a simple elemental subroutine and SPLIT/TOKENIZE
simple subroutines.

This change:
- adds `simpleSubroutine` and `simpleElementalSubroutine` to
`IntrinsicClass`,
- reclassifies the MVBITS, SPLIT, and TOKENIZE intrinsic table entries,
- propagates `SIMPLE` through intrinsic resolution and procedure
characteristics.

MOVE_ALLOC is not included in this change.
DeltaFile
+49-0flang/test/Semantics/simple-intrinsics.f90
+12-7flang/lib/Evaluate/intrinsics.cpp
+8-1flang/lib/Semantics/resolve-names.cpp
+2-1flang/include/flang/Evaluate/intrinsics.h
+71-94 files

LLVM/project ec37fb6llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

[SLP][NFC]Fix formatting, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/221596
DeltaFile
+23-23llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+23-231 files

LLVM/project 4af1cd6llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/Hexagon sffms.ll

DAGCombiner: Drop AllowFPOpFusion from visitFSUBForFMACombine

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+3-3llvm/test/CodeGen/Hexagon/sffms.ll
+3-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+6-62 files

LLVM/project 1e4858acompiler-rt/test/asan/TestCases complete_stack_trace.c

[asan][test] Check that stack traces are not truncated (#221518)

Add a test that the access, free and malloc traces each name the whole
call
chain down to `main`, in order, and that each names its own call site in
`main`. A trace that stops early -- as every trace but the access one
does when
the fast unwinder runs on a target that chains no frames -- fails it.

`deep_stack_uaf.cpp` already covers trace depth, but it looks for three
individual frames anywhere in the trace, so it passes on a trace with
holes in
it, and it needs C++ name demangling to do that.

Split out of #220231 at reviewer request.

Assisted-by: Claude Code
DeltaFile
+58-0compiler-rt/test/asan/TestCases/complete_stack_trace.c
+58-01 files

LLVM/project 42012a9llvm/include/llvm/Option Option.h OptTable.h, llvm/lib/Option Option.cpp OptTable.cpp

[OptTable] Store Info strings in the string table (#218845)

Change HelpText, MetaVar, AliasArgs, and Values from `const char *` to
StringTable::offset, making the fields smaller, and removing dynamic
relocations in .data.rel.ro in PIC links.

Store them as StringTable::Offset, like the option names already are,
and return StringRef from getOptionHelpText() and getOptionMetaVar().
The 53 tables in the tree lose all 616 KB of .data.rel.ro, and sizeof(Info)
drops from 88 to 60; clang's table becomes 232 KB of .rodata.

An unset field and one explicitly set to the empty string, such as a
HelpText<"">, have to stay distinguishable, so the latter gets an empty
string of its own rather than offset zero.

Values declared with ValuesCode are only known to the generated code,
which supplies getOptionValuesCode() for OptTable to call; only clang has any.

Aided by Opus 5
DeltaFile
+92-80llvm/utils/TableGen/OptionParserEmitter.cpp
+44-17llvm/include/llvm/Option/OptTable.h
+21-18llvm/lib/Option/OptTable.cpp
+31-2llvm/unittests/Option/OptionParsingTest.cpp
+5-10llvm/lib/Option/Option.cpp
+10-5llvm/include/llvm/Option/Option.h
+203-1323 files not shown
+214-1359 files

LLVM/project 5735d17llvm/include/llvm/MC MCTargetOptions.h, llvm/include/llvm/Target TargetOptions.h

MC: Move DisableIntegratedAS from TargetOptions to MCTargetOptions (#221547)

The integrated assembler is only meaningful in MC, so this field belongs
in MCTargetOptions alongside the other assembler options rather than in
the codegen-level TargetOptions.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+7-11llvm/include/llvm/Target/TargetOptions.h
+0-7llvm/lib/CodeGen/CommandFlags.cpp
+7-0llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
+3-0llvm/include/llvm/MC/MCTargetOptions.h
+1-1llvm/lib/LTO/LTOCodeGenerator.cpp
+1-1llvm/lib/CodeGen/CodeGenTargetMachineImpl.cpp
+19-204 files not shown
+23-2410 files

LLVM/project 2796699llvm/test/Transforms/SLPVectorizer/X86 loop-accumulator-reduction.ll

[SLP][NFC]Add more tests for loop accumulator reductions, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/221591
DeltaFile
+1,327-0llvm/test/Transforms/SLPVectorizer/X86/loop-accumulator-reduction.ll
+1,327-01 files

LLVM/project 5840db8llvm/include/llvm/CodeGen SelectionDAG.h, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[SelectionDAG] Remove dead functions (NFC) (#221541)

SelectionDAG::getBitcastedSExtOrTrunc,
SelectionDAG::getBitcastedZExtOrTrunc: Added on August 11, 2023 in
commit d26a06728da84a7302875a99ea86e887f6bc425a without any callers.

Assisted-by: Antigravity
DeltaFile
+0-30llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+0-10llvm/include/llvm/CodeGen/SelectionDAG.h
+0-402 files

LLVM/project f0e701aclang/test/OpenMP interchange_codegen.cpp, llvm/test/CodeGen/AMDGPU flat-saddr-atomics.ll flat-saddr-load.ll

Merge remote-tracking branch 'upstream' into users/lukel97/loop-vectorize/simplifyRecipes-worklist
DeltaFile
+17,282-3,458llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+7,983-1,591llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-neon-instructions.s
+2,115-2,484llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+3,312-825llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+1,704-2,400clang/test/OpenMP/interchange_codegen.cpp
+2,226-1,164llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+34,622-11,9224,795 files not shown
+241,334-126,6184,801 files

LLVM/project ebb7e0clibc/src/__support/GPU allocator.cpp

[libc] Fix chunk calculation in GPU allocator (#221583)

Summary:
This would pesismistically round up 48 to 64 and the previous s0 case
was unused.
DeltaFile
+7-10libc/src/__support/GPU/allocator.cpp
+7-101 files