LLVM/project 550c65bllvm/lib/Target/SystemZ SystemZInstrInfo.cpp, llvm/test/CodeGen/SystemZ foldmemop-global.mir

[SystemZ] Allow folding from another MBB in foldMemoryOperandImpl(). (#182921)

After 7c1d517 "[SystemZ] Enable rematerialization for scalar loads
(#179838)", an assertion in foldMemoryOperandImpl() that checked
that the original load and the subsuming instruction are in the same
MBB started to fail.

There is no fundamental reason to not allow this, so this assertion has
been removed and this case is now handled as well by the search that
checks for CC liveness.
DeltaFile
+124-0llvm/test/CodeGen/SystemZ/foldmemop-global.mir
+6-8llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+130-82 files

LLVM/project 29f32e6clang/lib/CIR/CodeGen CIRGenCUDARuntime.cpp CIRGenExpr.cpp, clang/test/CIR/CodeGenCUDA kernel-call.cu

[CIR][CUDA][HIP] Emit host-side kernel calls (#179809)

Related: https://github.com/llvm/llvm-project/issues/179278,
https://github.com/llvm/llvm-project/issues/175871
DeltaFile
+58-1clang/test/CIR/CodeGenCUDA/kernel-call.cu
+25-0clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
+8-5clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+8-0clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+6-0clang/lib/CIR/CodeGen/CIRGenCUDARuntime.h
+6-0clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
+111-62 files not shown
+118-78 files

LLVM/project fc1cba8clang/lib/AST/ByteCode Interp.h Interp.cpp

[clang][bytecode] Copy EvalID into InterpState (#182913)

So the EvalID there is independent of changes to the one in the Context.
This is currently an NFC change but will make future commits easier.
DeltaFile
+6-8clang/lib/AST/ByteCode/Interp.h
+2-10clang/lib/AST/ByteCode/Interp.cpp
+12-0clang/lib/AST/ByteCode/Context.h
+5-2clang/lib/AST/ByteCode/Compiler.cpp
+2-2clang/lib/AST/ByteCode/InterpState.cpp
+2-0clang/lib/AST/ByteCode/InterpState.h
+29-226 files

LLVM/project 0fa0bb1clang-tools-extra/clangd Selection.cpp, clang-tools-extra/clangd/unittests XRefsTests.cpp

[clangd] Handle MemberPointerTypeLoc in SelectionTree (#183242)

This is another type loc that overlaps the name of the declaration whose
type it is, and so needs special handling to allow the declaration
itself to be targeted.

Fixes https://github.com/clangd/clangd/issues/2608
DeltaFile
+10-0clang-tools-extra/clangd/unittests/XRefsTests.cpp
+4-0clang-tools-extra/clangd/Selection.cpp
+14-02 files

LLVM/project bc9d5b0clang/lib/CodeGen CGDebugInfo.cpp, clang/test/DebugInfo/CXX callsite-edges.cpp callsite-base.cpp

[clang][DebugInfo] Add virtuality call-site target information in DWARF. (#182510)

Given the test case:

  struct CBase {
    virtual void foo();
  };

  void bar(CBase *Base) {
    Base->foo();
  }

and using '-emit-call-site-info' with llc, the following DWARF
is produced for the indirect call 'Base->foo()':

1$: DW_TAG_structure_type "CBase"
      ...
2$:   DW_TAG_subprogram "foo"
        ...

    [20 lines not shown]
DeltaFile
+99-0cross-project-tests/debuginfo-tests/clang_llvm_roundtrip/callsite-dwarf.cpp
+93-0clang/test/DebugInfo/CXX/callsite-edges.cpp
+70-0clang/test/DebugInfo/CXX/callsite-base.cpp
+58-0clang/test/DebugInfo/CXX/callsite-derived.cpp
+28-1llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+23-0clang/lib/CodeGen/CGDebugInfo.cpp
+371-119 files not shown
+451-2325 files

LLVM/project 9ce3c09clang/test/CIR/CodeGenCUDA kernel-call.cu

fix these tests yo
DeltaFile
+8-8clang/test/CIR/CodeGenCUDA/kernel-call.cu
+8-81 files

LLVM/project 590568bmlir/lib/ExecutionEngine CMakeLists.txt

[MLIR] DISABLE_PCH_REUSE for runtime wrappers
DeltaFile
+5-0mlir/lib/ExecutionEngine/CMakeLists.txt
+5-01 files

LLVM/project 78f319ellvm/test/CodeGen/WebAssembly ctselect-fallback-vector.ll ctselect-fallback-patterns.ll

[ConstantTime][WebAssembly] Add comprehensive tests for ct.select
DeltaFile
+714-0llvm/test/CodeGen/WebAssembly/ctselect-fallback-vector.ll
+641-0llvm/test/CodeGen/WebAssembly/ctselect-fallback-patterns.ll
+552-0llvm/test/CodeGen/WebAssembly/ctselect-fallback.ll
+376-0llvm/test/CodeGen/WebAssembly/ctselect-fallback-edge-cases.ll
+226-0llvm/test/CodeGen/WebAssembly/ctselect-side-effects.ll
+2,509-05 files

LLVM/project d35b31cllvm/test/CodeGen/Mips ctselect-fallback-vector.ll ctselect-fallback-patterns.ll

[LLVM][MIPS] Add comprehensive tests for ct.select
DeltaFile
+830-0llvm/test/CodeGen/Mips/ctselect-fallback-vector.ll
+426-0llvm/test/CodeGen/Mips/ctselect-fallback-patterns.ll
+371-0llvm/test/CodeGen/Mips/ctselect-fallback.ll
+244-0llvm/test/CodeGen/Mips/ctselect-fallback-edge-cases.ll
+183-0llvm/test/CodeGen/Mips/ctselect-side-effects.ll
+2,054-05 files

LLVM/project c9a00e8llvm/test/CodeGen/RISCV ctselect-fallback-vector-rvv.ll ctselect-fallback-patterns.ll

[ConstantTime][RISCV] Add comprehensive tests for ct.select

Add comprehensive test suite for RISC-V fallback implementation:
- Edge cases (zero conditions, large integers, sign extension)
- Pattern matching (nested selects, chains)
- Vector support with RVV extensions
- Side effects and memory operations

The basic fallback test is in the core infrastructure PR.
DeltaFile
+804-0llvm/test/CodeGen/RISCV/ctselect-fallback-vector-rvv.ll
+383-0llvm/test/CodeGen/RISCV/ctselect-fallback-patterns.ll
+214-0llvm/test/CodeGen/RISCV/ctselect-fallback-edge-cases.ll
+176-0llvm/test/CodeGen/RISCV/ctselect-side-effects.ll
+1,577-04 files

LLVM/project a9996f3llvm/lib/Target/ARM ARMISelLowering.cpp ARMBaseInstrInfo.cpp, llvm/test/CodeGen/ARM ctselect-vector.ll ctselect-half.ll

[LLVM][ARM] Add native ct.select support for ARM32 and Thumb

This patch implements architecture-specific lowering for ct.select on ARM
(both ARM32 and Thumb modes) using conditional move instructions and
bitwise operations for constant-time selection.

Implementation details:
- Uses pseudo-instructions that are expanded Post-RA to bitwise operations
- Post-RA expansion in ARMBaseInstrInfo for BUNDLE pseudo-instructions
- Handles scalar integer types, floating-point, and half-precision types
- Handles vector types with NEON when available
- Support for both ARM and Thumb instruction sets (Thumb1 and Thumb2)
- Special handling for Thumb1 which lacks conditional execution
- Comprehensive test coverage including half-precision and vectors

The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- ISelDAGToDAG: Selection of appropriate pseudo-instructions
- BaseInstrInfo: Post-RA expansion of BUNDLE to bitwise instruction sequences

    [3 lines not shown]
DeltaFile
+2,179-0llvm/test/CodeGen/ARM/ctselect-vector.ll
+975-0llvm/test/CodeGen/ARM/ctselect-half.ll
+530-66llvm/lib/Target/ARM/ARMISelLowering.cpp
+555-0llvm/test/CodeGen/ARM/ctselect.ll
+335-2llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+327-2llvm/lib/Target/ARM/ARMISelLowering.h
+4,901-704 files not shown
+5,185-21310 files

LLVM/project 29292e8llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 ctselect.ll

[LLVM][AArch64] Add native ct.select support for ARM64

This patch implements architecture-specific lowering for ct.select on AArch64
using CSEL (conditional select) instructions for constant-time selection.

Implementation details:
- Uses CSEL family of instructions for scalar integer types
- Uses FCSEL for floating-point types (F16, BF16, F32, F64)
- Post-RA MC lowering to convert pseudo-instructions to real CSEL/FCSEL
- Handles vector types appropriately
- Comprehensive test coverage for AArch64

The implementation includes:
- ISelLowering: Custom lowering to CTSELECT pseudo-instructions
- InstrInfo: Pseudo-instruction definitions and patterns
- MCInstLower: Post-RA lowering of pseudo-instructions to actual CSEL/FCSEL
- Proper handling of condition codes for constant-time guarantees
DeltaFile
+153-0llvm/test/CodeGen/AArch64/ctselect.ll
+56-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+40-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+35-4llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+18-0llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
+11-0llvm/lib/Target/AArch64/AArch64ISelLowering.h
+313-46 files

LLVM/project de75ea6llvm/lib/Target/X86 X86InstrInfo.cpp X86ISelLowering.cpp, llvm/test/CodeGen/X86 ctselect-i386-fp.ll

[LLVM][X86] Add f80 support for ct.select

Add special handling for x86_fp80 types in CTSELECT lowering by splitting
them into three 32-bit chunks, performing constant-time selection on each
chunk, and reassembling the result. This fixes crashes when compiling
tests with f80 types.

Also updated ctselect.ll to match current generic fallback implementation.
DeltaFile
+463-452llvm/lib/Target/X86/X86InstrInfo.cpp
+126-146llvm/test/CodeGen/X86/ctselect-i386-fp.ll
+63-0llvm/lib/Target/X86/X86ISelLowering.cpp
+9-12llvm/lib/Target/X86/X86InstrInfo.h
+661-6104 files

LLVM/project 6542a73llvm/lib/Target/X86 X86ISelLowering.cpp X86InstrInfo.cpp, llvm/test/CodeGen/X86 ctselect.ll ctselect-vector.ll

[LLVM][X86] Add native ct.select support for X86 and i386

Add native X86 implementation with CMOV instructions and comprehensive tests:
- X86 ISelLowering with CMOV for x86_64 and i386
- Fallback bitwise operations for i386 targets without CMOV
- Post-RA expansion for pseudo-instructions
- Comprehensive test coverage:
  - Edge cases (zero conditions, large integers)
  - i386-specific tests (FP, MMX, non-CMOV fallback)
  - Vector operations
  - Optimization patterns

The basic test demonstrating fallback is in the core infrastructure PR.
DeltaFile
+629-1,189llvm/test/CodeGen/X86/ctselect.ll
+1,274-0llvm/test/CodeGen/X86/ctselect-vector.ll
+763-28llvm/lib/Target/X86/X86ISelLowering.cpp
+722-0llvm/test/CodeGen/X86/ctselect-i386-fp.ll
+604-5llvm/lib/Target/X86/X86InstrInfo.cpp
+428-0llvm/test/CodeGen/X86/ctselect-i386-mmx.ll
+4,420-1,22211 files not shown
+5,717-1,22717 files

LLVM/project be7aa6aclang/include/clang/Analysis/Scalable/Serialization JSONFormat.h, clang/lib/Analysis/Scalable/Serialization JSONFormat.cpp

[clang][ssaf] Add checks for missing and mismatched `EntitySummary` data and improve code coverage

This PR adds new checks and tests for null `EntitySummary`, and
`SummaryName` match against `EntitySummary::getSummaryName()`. It also
adds tests for `SummaryName` with no registered `FormatInfo`.
As part of this change, the `JSONFormatTest` fixture has been made to
inherit from `ssaf::TestFixture` to provide its subclasses direct access
to the private-field accessors that TestFixture exposes.
This brings JSONFormat.cpp to almost 100% coverage. The remaining
uncovered lines are either in untestable paths or coverage
instrumentation artifacts.
DeltaFile
+225-5clang/unittests/Analysis/Scalable/Serialization/JSONFormatTest/TUSummaryTest.cpp
+80-18clang/lib/Analysis/Scalable/Serialization/JSONFormat.cpp
+2-2clang/unittests/Analysis/Scalable/Serialization/JSONFormatTest/JSONFormatTest.h
+4-0clang/include/clang/Analysis/Scalable/Serialization/JSONFormat.h
+311-254 files

LLVM/project 138805elldb/cmake/modules LLDBConfig.cmake, lldb/source/Plugins/ScriptInterpreter/Lua CMakeLists.txt

[lldb] Limit Python include dir to ScriptInterpreterPython (NFC) (#183236)

Limit Python include dir to ScriptInterpreterPython and any library that
depends on it (i.e. liblldb), making it consistent with what we do for
Lua.
DeltaFile
+3-2lldb/source/Plugins/ScriptInterpreter/Lua/CMakeLists.txt
+4-0lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
+0-2lldb/cmake/modules/LLDBConfig.cmake
+7-43 files

LLVM/project 43dfde4mlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/test/python/dialects nvvm.py

[MLIR][NVVM] Enable result type inference (#181781)

Includes `InferOpTypeInterface.td` in `NVVMOps.td` enabling result type
inference for NVVM operations.

Fixes a test for `nvvm.redux.sync` in `nvvm.py` due to a resulting
change in the python binding for the operation.
DeltaFile
+2-2mlir/test/python/dialects/nvvm.py
+1-0mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+3-22 files

LLVM/project 41a9f7d

retrigger checks
DeltaFile
+0-00 files

LLVM/project 7f5bf7bclang/lib/CIR/CodeGen CIRGenCUDARuntime.h

format yo
DeltaFile
+1-1clang/lib/CIR/CodeGen/CIRGenCUDARuntime.h
+1-11 files

LLVM/project 90f5316clang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenCUDANV.cpp, clang/test/CIR/CodeGenCUDA kernel-call.cu

[CIR][CUDA][HIP] Emit host-side kernel calls
DeltaFile
+17-2clang/test/CIR/CodeGenCUDA/kernel-call.cu
+6-1clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+6-0clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
+4-1clang/lib/CIR/CodeGen/CIRGenModule.cpp
+0-2clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
+2-0clang/lib/CIR/CodeGen/CIRGenCUDARuntime.h
+35-66 files

LLVM/project d5c0b00clang/lib/CIR/CodeGen CIRGenCUDARuntime.cpp

hip assert guards
DeltaFile
+3-0clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
+3-01 files

LLVM/project 623f89aclang/lib/CIR/CodeGen CIRGenCUDARuntime.cpp CIRGenExprCXX.cpp, clang/test/CIR/CodeGenCUDA kernel-call.cu

[CIR][CUDA] Emit host-side kernel calls
DeltaFile
+43-1clang/test/CIR/CodeGenCUDA/kernel-call.cu
+24-0clang/lib/CIR/CodeGen/CIRGenCUDARuntime.cpp
+8-0clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+2-4clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+4-0clang/lib/CIR/CodeGen/CIRGenCUDARuntime.h
+3-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+84-56 files

LLVM/project dc0a06dllvm/lib/SandboxIR Region.cpp, llvm/unittests/SandboxIR RegionTest.cpp

Reapply "[SandboxIR][Region] Replace exit() with reportFatalUsageError() (#182134)"

This reverts commit 4ffa61978b3d72b868e995bf89d4f864f5e8ab6d.
DeltaFile
+3-1llvm/unittests/SandboxIR/RegionTest.cpp
+1-1llvm/lib/SandboxIR/Region.cpp
+4-22 files

LLVM/project 37eb423lld/ELF/Arch LoongArch.cpp

[lld][LoongArch] Fix range checking of R_LARCH_*_PCADD_HI20 relocations on 64-bit

According to the la-abi-specs, the R_LARCH_*_PCADD_HI20 relocations are
also used on 64-bit LoongArch. Fix the range checking accordingly.
DeltaFile
+1-1lld/ELF/Arch/LoongArch.cpp
+1-11 files

LLVM/project ba34cballdb/bindings CMakeLists.txt, lldb/bindings/lua CMakeLists.txt

[lldb] Extract CMake logic to add SWIG wrapper into helper function (#183203)

Extract the CMake logic to add SWIG wrapper into helper function defined
in the bindings directly. This avoid code duplication between Python and
Lua.

The function is parameterized in its target, making it possible to add
the wrapper to a different target, for example the respective script
interpreter plugin when building dynamic plugins.
DeltaFile
+4-53lldb/source/API/CMakeLists.txt
+22-0lldb/bindings/python/CMakeLists.txt
+10-0lldb/bindings/CMakeLists.txt
+8-0lldb/bindings/lua/CMakeLists.txt
+44-534 files

LLVM/project 2ff512bclang/test/SemaTemplate concepts.cpp

[Clang][NFC] Correct the test in PR183010 (#183226)

We should test non-type-dependent type aliases.

(I copy-pasted wrong code which is used for debugging. Thanks to Richard
for spotting that)
DeltaFile
+1-2clang/test/SemaTemplate/concepts.cpp
+1-21 files

LLVM/project 6533cb6clang/docs ReleaseNotes.rst, clang/lib/AST ASTContext.cpp

[clang] allow canonicalizing assumed template names

Assumed template names are part of error recovery and encode just a
declaration name, making them always canonical. This patch allows
them to be canonicalized, which is trivial.

Fixes #183075
DeltaFile
+12-0clang/test/SemaTemplate/GH183075.cpp
+5-2clang/lib/AST/ASTContext.cpp
+1-0clang/docs/ReleaseNotes.rst
+18-23 files

LLVM/project 75171b0llvm/test/CodeGen/AMDGPU waitcnt-loop-ds-prefetch-flushed.ll waitcnt-loop-ds-prefetch-flushed.mir

[AMDGPU] Add LIT tests for DS loop waitcnt prefetch flushed (tests-only PR) (#183217)

Test-only PR for PR #175658, and remove -O3 from PR #172728 LIT test per
post-merge comment
DeltaFile
+119-0llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
+89-0llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.mir
+4-4llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
+212-43 files

LLVM/project 20718e1libcxx/include/ext hash_map, libcxx/test/extensions/gnu/hash_map non_standard_layout.pass.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+7-11libcxx/include/ext/hash_map
+17-0libcxx/test/extensions/gnu/hash_map/non_standard_layout.pass.cpp
+17-0libcxx/test/extensions/gnu/hash_multimap/non_standard_layout.pass.cpp
+41-113 files

LLVM/project 6f22c23flang/lib/Lower/OpenMP Utils.cpp, flang/test/Lower/OpenMP task-affinity.f90

Add character test
DeltaFile
+34-0flang/test/Lower/OpenMP/task-affinity.f90
+5-8flang/lib/Lower/OpenMP/Utils.cpp
+39-82 files