[RISCV] Consistently name AVL operands as $vl. NFC (#182174)
Looking into using getNamedOperandIndex so we need to be consistent.
To avoid a conflict, I renamed the $vl output of vleff pseudos to
$vl_out. Arguably the AVL inputs should be $avl, but that requires more
changes and may interact with out of tree vendor specific instructions.
[ProfCheck] Remove now passing tests
There were quite a few tests in the profcheck-xfail.txt list that now
pass, likely due to other fixes coincidentally helping or someone
forgetting to update the list. Remove them from the list to ensure we
have test coverage.
[modules] Add diagnostic about performed input file validation when encounter unrecoverable changed input file. (#180899)
The expected behavior for implicitly built modules is to validate input
files and to rebuild a module if there are any input file changes. But
if for some reason a module hasn't been rebuilt, it is useful to know if
the validation has been done and what kind of validation.
The goal is to make investigations for fixes like
f2a3079a1b48033a92d0a7d9f03251ebeb4a0c30 and
ada79f4c2691ab6546d379a144377162fd4f5191 easier.
rdar://159857416
---------
Co-authored-by: Cyndy Ishida <cyndyishida at gmail.com>
[RISCV] Rename PALUVINoVm->ZvkALUVINoVm. NFC (#182077)
OP_VE was originally named OP_P which is how these classes got P in
their name. Replace P with Zvk.
[libclc] Enable -ffp-contract=fast-honor-pragmas globally (#153137)
Enable -ffp-contract=fast-honor-pragmas globally improves performance.
Verified that exp, trig, and hyperbolic functions pass the OpenCL CTS on
Intel GPUs with this flag enabled.
Note: exp/exp2 still require the fixes proposed in #179875; however,
those failures are independent of the fp-contract changes in this patch.
[TableGen] Introduce RegisterByHwMode
This is useful for `InstAlias` where a fixed register may depend on the
HwMode. The motivating use case for this is the RISC-V RVY ISA where
certain instructions mnemonics are remapped to take a different
register class depending on the HwMode and can be used as follows:
```
def NullReg : RegisterByHwMode<PtrRC, [RV32I, RV64I, RV64Y, RV64Y],
[X0, X0, X0_Y, X0_Y]>;
```
Pull Request: https://github.com/llvm/llvm-project/pull/175227
[RISCV] Force a frame pointer when the max reserved call frame exceeds simm12. (#182124)
We need to be able to address emergency spill slots without requiring a
register scavenging. This requires the emergency spill slot to be near
the SP or the FP to keep the offset small enough. If there is a large
reserved call frame, we can't keep the emergency spill slot near SP. But
we might not have a frame pointer.
This patch forces the use of a frame pointer when the max reserved call
frame is large so we can keep the emergency spill slot near it. This
idea is borrowed from AArch64.
Multiple MIR tests had to be updated to set the max call frame size as
the reserved registers are frozen before mirFileLoaded is called. I
copied mirFileLoaded from AArch64, but it appears the register freezing
moved after the AArch64 code was written.
Fixes #180199.
[LSR][RISCV] Add support for cmp/branch fuse.
RISCV has cmp within branches, and therefore
costing using cmp/branch fuse in LSR is
useful to configure the proposed solution
cost for LSR.
[MLIR][tblgen] Honor `-dialect` in `-gen-{attrdef,op,typedef,enum}-doc`
Make all dialect documentation generators use the same set of records as
`-gen-dialect-doc`, which honors the `-dialect` tblgen option to filter
records by dialect. Add a `-keep-op-source-order` option to allow
`-gen-op-doc` to continue producing unsorted op lists if needed.
This commit factors the record collection, filtering, and sorting
performed in `emitDialectDoc` out into a separate `collectRecords`
function, returning a `DialectRecords` with the results. The emit
functions now all accept a `DialectRecords` argument instead of
collecting records themselves. Most changes are mechanical renamings and
moving code around.
This fixes a confusing issue where `gen-dialect-doc` would produce the
entire documentation for a dialect, but individual calls to
`gen-attrdef-doc` and the like would seemingly operate on a different
set of records, potentially covering multiple dialects. This all produce
the overall documentation now.
[modules] Move diagnostic about specific mtime/size change into a note from an error. (#181963)
So far higher visibility is more confusing than actionable. Keep the
information available but make it less prominent.
rdar://159857416
[SDPatternMatch] Support conditionally binding the value matching a sub-pattern (#182091)
I've seen more and more occurrences of what is essentially
```
m_AllOf(<sub pattern>, m_Value(BindVal))
```
That is, bind to the same SDValue that matches the sub-pattern. Most
people won't even bother write this `m_AllOf` construct because it's too
long, and instead just write another `sd_match` against the bound value.
This patch adds
```
m_Value(BindVal, <sub pattern>)
```
To replace the `m_AllOf` construct above and conditionally bind the
SDValue that matches the sub-pattern.
---------
Co-authored-by: Stefan Weigl-Bosker <stefan at s00.xyz>
[OpenMP] Remove standalone build mode (Reapply #149878) (#182022)
This reapplies #149878
Remove all the CMake code for openmp standalone builds. Standalone
builds have been superseded by the runtimes default build (also
sometimes called the standalone runtimes build). The runtimes default
build can be thought of a standalone build with the standalone
boilerplate contained in <llvm-project>/runtimes/CMakeLists.txt. There
is no need for each runtime to contain the same boilerplate code again.
Builds still using the standalone build via
```sh
cmake -S <llvm-project>/openmp ...
```
can switch over to the runtimes default build using
```sh
cmake -S <llvm-project>/runtimes -DLLVM_ENABLE_RUNTIMES=openmp ...
```
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[SLP]Support reduced or selects of bitmask as cmp bitcast
Converts reduced or(select %cmp, bitmask, 0) to zext(bitcast %vector_cmp to
i<num_reduced_values>) to in
Reviewers: RKSimon, hiraditya
Pull Request: https://github.com/llvm/llvm-project/pull/181940
[clang][DependencyScanning] Use OverlayFS naming consistently [NFC] (#172352)
Changes the naming of the OverlayFileSystem parameter for more consistent use in
`DependencyScanningTool.cpp`.
(This addresses the feedback in
https://github.com/llvm/llvm-project/pull/169964#discussion_r2620074122)
[CIR][CodeGen] Use MapVector instead of StringMap for replacements (#181969)
When using llvm::StringMap transitive replacements may be out of order, so use llvm::MapVector which is also used in Clang's LLVM IR CodeGen.
[clang] Make makeInputArg available in Driver.h [NFC] (#182163)
This moves makeInputArg from Driver.cpp to Driver.h so it can be used by
other components.
This change is part of an effort to split #152770 into smaller, more
manageable pieces.
[clang][darwin] macOS no longer infers a minimum deployment version from the OS version (#181958)
The recent createFromSDKInfo refactor lost the
getSystemOrSDKMacOSVersion version adjustment on macOS, causing -arch
builds to create binaries that can't run on the host that built them.
rdar://170007161
[clang] Move InputTy and InputList out of the Driver class [NFC] (#182158)
This change moves InputTy and InputList outside of the Driver class to
allow wider usage.
InputTy and InputList are currently defined inside the Driver class,
which prevents other headers from using them without including Driver.h
(by foreward declaring).
This change is required for #152770 and is part of an effort to break
that PR into smaller pieces.
[flang][acc] Add ACCDeclareActionConversion pass (#181894)
Implements the allocation and deallocation semantics for allocatables
and pointers in declare directives (OpenACC 3.4, Section 2.13.2). For a
non-shared memory device, allocate/deallocate must keep local and device
memory in sync.
Lowering generates recipe functions (with acc dialect ops to create the
device copy) and attaches an attribute to the operations that allocate
or deallocate the object. This pass finds those operations and inserts
calls to the corresponding recipe.
Example: for "!$acc declare create(arr)" and "allocate(arr(100))" in a
subroutine, the pass inserts a call to the post-alloc recipe after the
store so the device copy is created.
---------
Co-authored-by: Susan Tan <zujunt at nvidia.com>
