LLVM/project 2c2074eflang/lib/Optimizer/CodeGen CodeGen.cpp, mlir/lib/Conversion/MathToLLVM MathToLLVM.cpp

[mlir] Migrate aggregate builders to explicit properties

Pass typed property structs and discardable attributes separately at ODS
aggregate builder call sites.

Assisted-by: Codex
DeltaFile
+45-70mlir/unittests/Dialect/OpenACC/OpenACCUtilsTest.cpp
+83-26flang/lib/Optimizer/CodeGen/CodeGen.cpp
+71-35mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+71-23mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+33-42mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+38-25mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
+341-22164 files not shown
+908-42270 files

LLVM/project 6d890e7clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVMOpenCLMetadata.h LowerToLLVM.cpp, clang/test/CIR/CodeGenOpenCL kernel-arg-metadata.cl kernel-arg-info.cl

[CIR][OpenCL] Lower kernel argument metadata to LLVM dialect metadata (#217835)

Lower CIR OpenCL kernel-argument metadata into `LLVMFuncOp`
`function_metadata` instead of mutating LLVM IR directly. Keep CIR
storage in source-level language address spaces while emitting the fixed
SPIR 2.0 metadata numbers.

Assisted-by: Codex / GPT-5.6 Sol
DeltaFile
+175-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
+68-0clang/test/CIR/CodeGenOpenCL/kernel-arg-info.cl
+30-20clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+38-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
+22-0clang/test/CIR/Lowering/opencl-kernel-arg-metadata.cir
+13-0clang/test/CIR/CodeGenOpenCL/kernel-arg-metadata.cl
+346-203 files not shown
+361-219 files

LLVM/project e154c3amlir/docs/DefiningDialects Operations.md, mlir/test/lib/Dialect/Test TestOps.td

[mlir][ODS] Populate properties in legacy aggregate builders

Partition mixed aggregate attributes before operation creation so legacy
aggregate builders correctly initialize typed properties while preserving
discardable attributes.

Assisted-by: Codex
DeltaFile
+155-85mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
+110-2mlir/unittests/TableGen/OpBuildGen.cpp
+64-20mlir/test/mlir-tblgen/op-decl-and-defs.td
+51-0mlir/test/lib/Dialect/Test/TestOps.td
+42-0mlir/test/mlir-tblgen/op-error.td
+14-2mlir/docs/DefiningDialects/Operations.md
+436-1091 files not shown
+438-1117 files

LLVM/project d6eb845llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/RISCV convert-from-arbitrary-fp.ll

[Legalizer] Do not use illegal type when expanding CONVERT_FROM_ARBITRARY_FP
DeltaFile
+137-0llvm/test/CodeGen/RISCV/rvv/fixed-convert-from-arbitrary-fp.ll
+70-0llvm/test/CodeGen/RISCV/convert-from-arbitrary-fp.ll
+42-11llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+249-113 files

LLVM/project 246bae4clang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Sema HLSLExternalSemaSource.cpp HLSLBuiltinTypeDeclBuilder.cpp

Merge branch 'users/icohedron/texturecube' into users/icohedron/texturecubearray
DeltaFile
+16-19clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+10-14clang/lib/CodeGen/CGHLSLBuiltins.cpp
+1-1clang/lib/Sema/HLSLExternalSemaSource.cpp
+27-343 files

LLVM/project 7079c4bclang/lib/ScalableStaticAnalysis/Analyses/PointerFlow PointerFlowExtractor.cpp

address comments
DeltaFile
+17-14clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
+17-141 files

LLVM/project da4b231clang/lib/Sema HLSLExternalSemaSource.cpp

constexpr Dim and IsArray
DeltaFile
+2-2clang/lib/Sema/HLSLExternalSemaSource.cpp
+2-21 files

LLVM/project faf1f5eclang/lib/Sema HLSLBuiltinTypeDeclBuilder.cpp

Remove extra whitespace
DeltaFile
+0-3clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+0-31 files

LLVM/project 252d8c9clang/lib/Sema HLSLBuiltinTypeDeclBuilder.cpp

Use `hasResourceOffset(Dim)` instead of checking Dim against cube
DeltaFile
+16-16clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+16-161 files

LLVM/project 54c343aclang/lib/CodeGen CGHLSLBuiltins.cpp

Remove braces from single-statement conditionals
DeltaFile
+4-8clang/lib/CodeGen/CGHLSLBuiltins.cpp
+4-81 files

LLVM/project e7ef390clang/lib/CodeGen CGHLSLBuiltins.cpp

constexpr OffsetIdx
DeltaFile
+6-6clang/lib/CodeGen/CGHLSLBuiltins.cpp
+6-61 files

LLVM/project b4e175bllvm/test/Transforms/LoopVectorize bounded-load-scalable.ll, llvm/test/Transforms/LoopVectorize/AArch64 bounded-load.ll

[LV] Extend test coverage for bounded loads. (NFC) (#219583)

Add test coverage for scalable vectors, as well as predicated loads and
tail folding.
DeltaFile
+521-370llvm/test/Transforms/LoopVectorize/AArch64/bounded-load.ll
+285-0llvm/test/Transforms/LoopVectorize/bounded-load-scalable.ll
+806-3702 files

LLVM/project 3e2beeeclang/test/CodeGenHLSL/resources Textures-Load.hlsl

Revise description of HAS_OFFSET
DeltaFile
+2-2clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+2-21 files

LLVM/project 18eb838clang/test/CodeGenHLSL/resources Textures-Load.hlsl

Remove unnecessary added trailing periods
DeltaFile
+2-2clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+2-21 files

LLVM/project 655cd6dclang/test/AST/HLSL Textures-AST.hlsl

Add AST test
DeltaFile
+17-0clang/test/AST/HLSL/Textures-AST.hlsl
+17-01 files

LLVM/project 22011d5clang/lib/CodeGen CGHLSLBuiltins.cpp, clang/test/CodeGenHLSL/resources Textures-Load.hlsl

Use poison instead of 0 for unused mip level
DeltaFile
+2-2clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+1-1clang/lib/CodeGen/CGHLSLBuiltins.cpp
+3-32 files

LLVM/project 1994c6dllvm/lib/CodeGen DetectDeadLanes.cpp

CodeGen: Use getVRegDef in DetectDeadLanes (#219520)

Look up the defining instruction of a single-def virtual register with
getVRegDef instead of the parent of its first def operand, so this no
longer depends on MachineOperand::getParent().

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+3-5llvm/lib/CodeGen/DetectDeadLanes.cpp
+3-51 files

LLVM/project 06f62efclang/lib/CIR/CodeGen CIRGenRecordLayoutBuilder.cpp, clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp

[CIR] Record how far a bit-field's declared types reach on x86_64

A bit-field access unit is as wide as the compiler chooses, which can be
narrower than the types declared in it.  The x86_64 ABI reads how far those
declarations reach to tell the bytes after a unit from padding, and CIR had no
way to say it, so the bridge refused any padded record holding a named unit.

CIRGen now records that reach as a zero-length member beside the unit, the
shape a zero-width bit-field uses.  With the fact in the type, the bridge
drops the reject.  It also stops refusing unions like `union { int x : 3; }`,
where no member on its own is as wide as the union.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+250-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-bitfield-reach.cpp
+64-69clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+80-0clang/test/CIR/Transforms/abi-lowering/x86_64-bitfield-reach.cir
+61-2clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+28-24clang/test/CIR/CodeGen/bitfield-init-values.c
+0-51clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
+483-14617 files not shown
+624-27223 files

LLVM/project 06a1d31llvm/lib/CodeGen LiveIntervalCalc.cpp

[CodeGen] Reuse one LiveIntervalCalc across all subranges (NFC) (#219571)

`SplitKit` already reuses a single `SubLIC` this way:

https://github.com/llvm/llvm-project/blob/aa198f8668e578cf11068c9a47559dfd3cc04bc7/llvm/lib/CodeGen/SplitKit.cpp#L1452-L1471
DeltaFile
+1-1llvm/lib/CodeGen/LiveIntervalCalc.cpp
+1-11 files

LLVM/project 34d5bcdllvm/test/Transforms/LoopVectorize/VPlan epilogue-vectorization-printing.ll

[VPlan] Add VPlan printing test for epilogue vectorization (NFC). (#219578)

Print the final VPlans for the main and the epilogue vector loop, to
show what epilogue vectorization models in VPlan and what is left to be
patched up in the generated IR after executing the plans.
DeltaFile
+301-0llvm/test/Transforms/LoopVectorize/VPlan/epilogue-vectorization-printing.ll
+301-01 files

LLVM/project 02c5537flang/lib/Optimizer/OpenACC/Support FIROpenACCTypeInterfaces.cpp, flang/test/Fir/OpenACC recipe-populate-private.mlir

[flang][OpenACC] Changed memory management for private POINTERs. (#219052)

The motivating example:
```
!$acc parallel loop private(ptr) present(target_data)
  do i = 1, 128
     ptr => target_data(i)%array
     ptr(...) = ...
```

The OpenACC privatization recipe was allocating private data
for `ptr`, storing it in `ptr` private descriptor and then
trying to deallocate `ptr->base_addr` at the end of the region.

`ptr->base_addr` is pointing to `target_data(i)%array` that is allocated
in device global memory and it is illegal to `free()` it in the device
code.

The `destroy` part of the recipe can only `free()` the private data

    [43 lines not shown]
DeltaFile
+83-21flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
+44-18flang/test/Lower/OpenACC/acc-reduction.f90
+33-15mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+35-8flang/test/Fir/OpenACC/recipe-populate-private.mlir
+43-0flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate.fir
+20-15mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
+258-779 files not shown
+362-11515 files

LLVM/project 5ed7492llvm/lib/Target/M68k M68kRegisterInfo.td M68kInstrInfo.cpp, llvm/test/CodeGen/M68k/Control cmp-cse.ll

[M68k] Fix Instruction Verifier errors related to `MOVEM` and `PHI` lowering (#219011)

This fixes some errors reported by the Instruction Verifier when
building with `-verify-machineinstrs`.

- The `MOVM` pseudos are given an 8-bit variant so that the IV can
correctly see 8-bit physical registers being defined/used. Without this,
8-bit register spills fail IV by attempting to load/store an undefined
physical register (the 16-bit superclass of the 8-bit register). Codegen
is not affected by this change.
- During `CollapseMOVEMPass`, the implicit ops are now copied over from
the old deleted instructions into the new combined instruction. This
fixes IV failing in cases where an instruction wants to use registers
that were defined by the collapsed `MOVEM`. Codegen is not affected by
this change.
- CCR is now marked as non-allocatable (which is true anyway). The
custom inserter for `CMOV` (`emitLoweredSelect()`) has logic where CCR
is added as a live-in for the newly-created blocks that are expected to
use it. This would cause IV to fail, because IV doesn't allow non-entry

    [3 lines not shown]
DeltaFile
+66-0llvm/test/CodeGen/M68k/Control/cmp-cse.ll
+21-16llvm/lib/Target/M68k/M68kCollapseMOVEMPass.cpp
+8-0llvm/lib/Target/M68k/M68kInstrData.td
+4-0llvm/lib/Target/M68k/M68kExpandPseudo.cpp
+1-1llvm/lib/Target/M68k/M68kRegisterInfo.td
+1-1llvm/lib/Target/M68k/M68kInstrInfo.cpp
+101-186 files

LLVM/project e4c86bd.github/workflows release-binaries.yml

workflow/release-binaries: Hard-code Wix install path (#219328)

Searching for the candle.exe executable is very slow and we know the
install path will always be the same since we have version pinned the
install.
DeltaFile
+4-2.github/workflows/release-binaries.yml
+4-21 files

LLVM/project 1b2e770clang/include/clang/ScalableStaticAnalysis/Analyses/EntityPointerLevel EntityPointerLevel.h, clang/lib/ScalableStaticAnalysis/Analyses/EntityPointerLevel EntityPointerLevel.cpp

Merge commit '01a1a0850d42' into users/ziqingluo-90/PR-183529483-2

 Conflicts:
        clang/include/clang/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.h
DeltaFile
+127-46clang/unittests/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevelTest.cpp
+65-63clang/lib/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.cpp
+13-14clang/include/clang/ScalableStaticAnalysis/Analyses/EntityPointerLevel/EntityPointerLevel.h
+205-1233 files

LLVM/project b1223eallvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Share block masks in reconstructSSA for blend masks
DeltaFile
+10-18llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+4-7llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+14-252 files

LLVM/project 9175ba0llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize blend-in-header.ll predicatedinst-loop-invariant.ll

Don't preserve branch-on-constant
DeltaFile
+15-62llvm/test/Transforms/LoopVectorize/constantfolder.ll
+5-25llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
+2-10llvm/test/Transforms/LoopVectorize/blend-in-header.ll
+11-1llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+2-9llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
+3-7llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+38-1141 files not shown
+39-1217 files

LLVM/project 3d9d924llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Extra tests for mask/phi re-use
DeltaFile
+149-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+149-01 files

LLVM/project 12afa49llvm/test/Transforms/LoopVectorize constant-fold-commutative-and.ll predicator.ll, llvm/test/Transforms/LoopVectorize/RISCV tail-folding-complex-mask.ll gather-scatter-cost.ll

Do CommonDom mask removal before reconstructSSA run for blend masks
DeltaFile
+23-31llvm/test/Transforms/LoopVectorize/predicator.ll
+12-16llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+8-12llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+8-12llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
+5-10llvm/test/Transforms/LoopVectorize/constant-fold-commutative-and.ll
+5-10llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+61-913 files not shown
+74-1069 files

LLVM/project dfb0bcfllvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll

Fix bug in previous commit
DeltaFile
+80-12llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+26-18llvm/test/Transforms/LoopVectorize/VPlan/AArch64/vplan-memory-op-decisions.ll
+22-19llvm/test/Transforms/LoopVectorize/predicator.ll
+10-5llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+7-6llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+7-6llvm/test/Transforms/LoopVectorize/RISCV/gather-scatter-cost.ll
+152-663 files not shown
+167-779 files

LLVM/project 578537cllvm/test/Transforms/LoopVectorize scalarize-masked-call.ll predicator.ll, llvm/test/Transforms/LoopVectorize/RISCV divrem.ll

WIP2
DeltaFile
+303-346llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
+100-100llvm/test/Transforms/LoopVectorize/X86/x86-predication.ll
+97-97llvm/test/Transforms/LoopVectorize/induction.ll
+64-60llvm/test/Transforms/LoopVectorize/predicator.ll
+56-65llvm/test/Transforms/LoopVectorize/scalarize-masked-call.ll
+23-23llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
+643-69116 files not shown
+835-84922 files