[AArch64] Use NoSchedPred for SME instructions in C1 scheduling models. (#220553)
We can have the scheduling model enabled without SME using -mtune, which
means that no scheduling information was present for any instructions
that execute in either SME or the core. AFAICT the predicate should be
NoSchedPred, as any instructions should be using the non-streaming
scheduling info when not in a SME function.
Fixes #220070
Fixes #220067
[orc-rt] Drop the _C_ prefix from ORC_RT_C_FORMAT_PRINTF (#220592)
The macro is not C-specific. Rename it to ORC_RT_FORMAT_PRINTF and
update its two uses in Logging.h.
[flang][cuda] Delay descriptor alloc when addressed reused on host/device (#220534)
CSE can share one fir.coordinate_of between the host-association capture
store and a later fir.load. Treating that coordinate_of as a real use
made cuf-alloc-delay think the movable group depended on an operand at
the sink point, so the device descriptor stayed at function entry and
cudaMallocManaged ran before cudaSetDevice.
Count only users of the slot address that actually read it. Stores that
populate the tuple still sink with the allocation group.
[VPlan] Allow non-live-in IV offsets when simplifying latch cond (NFC). (#220734)
simplifyBranchConditionForVFAndUF matches the canonical IV increment
plus an offset, which epilogue vectorization adds to resume the
canonical IV at the vector trip count of the main vector loop. Require
the offset to be defined outside the vector loop region instead of
requiring it to be a live-in; that is what makes it available in the
preheader..
This is NFC today, but prepares for modeling the full epilogue skeleton
in VPlan, which requires adding phi nodes in the preheader before
execute.
[LoopVersioning] Add missing verify-analysis-invalidation=false to test. (#220735)
Add -verify-analysis-invalidation=false to test added in
https://github.com/llvm/llvm-project/pull/220537 to fix expensive check
failures due to extra verification passes.
[lldb] Pass Wasm runtime-args before the port argument (#220700)
A runtime that dispatches on a leading subcommand, such as WasmKit's
`wasmkit run`, could not be driven directly: runtime-args landed after
the port argument, so the subcommand did too and the runtime rejected
it. Naming the subcommand required a wrapper script. Move runtime-args
ahead of the port argument so the setting can carry it.
Extract the command line assembly into PlatformWasm::MakeRuntimeCommand
so the ordering is covered by unit tests, and clarify that port-arg has
to carry its value in the same argument.
[llvm] Use ValueMap for ValueToGUIDMap (#220682)
ValueToGUIDMap currently uses a DenseMap which does not properly track
the deletion of Values, leaving dangling pointers in the map.
This change fixes this by using ValueMap. FollowRAUW is set to false to
match the current behavior of DenseMap.
This bug was discovered by a sanity test for deterministic compilation
where, depending on the allocator state, a newly allocated Value could
re-use the address of a previously deleted one, incorrectly inheriting
the GUID.
[VPlan][Predicator] Preserve some uniform control flow
Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack.
That should allow implementation of an alternative to
https://github.com/llvm/llvm-project/pull/141900 based on this
functionality (see BOSCC in the paper).
[libclc] Fix remainder calculation in clc_remquo for subnormals (#217925)
The remainder t was previously computed using:
__CLC_GENTYPE t = __clc_mad(y, -__CLC_CONVERT_GENTYPE(qsgn), x);
Multiplying y by -qsgn (+-1.0) introduces an unnecessary intermediate
multiplication step. On platforms or execution modes where subnormals
are flushed to zero computing `y * -qsgn` can prematurely flush a
subnormal `y` to zero, resulting in `0.0 + x = x` instead of computing
the subtraction `x - y` (or `x + y`).
Replace `__clc_mad` with a direct addition/subtraction based on the sign
of the quotient:
__CLC_GENTYPE t = qsgn > 0 ? (x - y) : (x + y);
This avoids multiplication by +-1.0, eliminates unwanted subnormal
flushing on intermediate products in FTZ modes, and computes the exact
remainder.
[SelectionDAG] Do not use illegal type when expanding `CONVERT_FROM_ARBITRARY_FP` (#219597)
During `CONVERT_FROM_ARBITRARY_FP`'s expansion, it'll try to create
intermediate integer values with the same width as the floating point
result. However, that integer type might not be legal, and would cause
problem when dealing with scalar version of `CONVERT_FROM_ARBITRARY_FP`.
For example, in the attached LIT tests, it'll generate something like
```
t58: f32 = convert_from_arbitrary_fp t57, TargetConstant:i32<7>
```
after type legalization. While f32 is a legal type, its integer
counterpart with the same width, i32, is not a legal type in RV64.
This patch fixes such problem by using the legal type for those
intermediate values, if the legal type is wider.
[VPlan] Use compact RPOT instead of just RPOT
This is necessary for the future partial linearization change, but I
wanted to commit this bit independently because it changes some tests on
itself and could potentially provide more blend optimization
opportunites (at least I hoped) but that didn't seem to happen.
[AMDGPU] Add getLocalMemorySize to TargetParser
Add getLocalMemorySize and getAddressableLocalMemorySize, both taking a
GPUKind or a Triple::SubArchType, so the LDS a work-group gets can be
queried from a GPU name alone without an MCSubtargetInfo. The first
returns the physical block available in the current mode, the second
caps it at what one work-group can address, mirroring the IsaInfo pair.
The number of SIMDs a work-group runs on is a per-kernel mode rather
than a property of the GPU, so it stays a parameter. GCNSubtarget
initializes its cached sizes from the new entry points. There is no
functional change.
Change-Id: Ib71428b66032a231ed491d6294122b359abfe7e2
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[mlir][OpenACC] Reject unsupported routine bind attributes (#220710)
Require each routine bind item to be a symbol reference or string
attribute. Other successfully parsed attributes left the kind
discriminator uninitialized and were silently dropped.
Found by Coverity.
Assisted-by: Codex
[clang][include cleaner] Fix MainHeader insertion issue (#212852)
When doing multiple header insertions (like from include cleaner) there
was an issue with MainHeaders inserted in the wrong location.
HeaderIncludes now supports a bulk insertion where it sorts the
insertions appropriately before inserting them to make sure that the
MainHeader ends up in the correct location.
Format.cpp has been updated to use the bulk insertion method correctly.
Tests added to verify.
[mlir][LLVM][GPU] Migrate to explicit split inherent/discardable attribute APIs access (#218921)
Use discardable attribute APIs and typed operation accessors throughout
the LLVM and GPU dialect families, their conversions, translations, and
tests.
Assisted-by: Codex
