[clang][CFG] Fix compound assignment evaluation order (#212115)
CompoundAssignOperator (e.g. `+=`, `-=`, `<<=`) is a distinct StmtClass
deriving from BinaryOperator, but it was not handled in the CFGBuilder
dispatch switches. As a result it fell through to the generic default
path (VisitChildren over reverse_children), which emits the LHS before
the RHS in the CFG.
Per C++17 [expr.ass]/1, all assignment operators - simple and compound -
sequence the right operand before the left operand. Route
CompoundAssignOperator through VisitBinaryOperator (and
VisitBinaryOperatorForTemporaries), whose existing isAssignmentOp()
branch already emits the RHS before the LHS, matching simple assignment.
This mirrors the class of evaluation-order defect fixed for lambda
captures in f3b31871e9b8.
rdar://183253943
Assisted-By: claude
[libc++][pstl] Implementation of a parallel std::mismatch() based on __pstl::__parallel_find() (#209291)
This PR adds a parallel version of `std::mismatch` as one of the backend
operations.
It also provides an implementation based on `__pstl::__parallel_find()`
which does the heavy lifting.
`libdispatch` and `std_thread` backends expose this implementation under
their backend tags, while the `serial` backend redirects the calls to
the serial `std::mismatch`.
4 flavours of the function are exposed: 3-legged, 3-legged with
predicate, 4-legged, 4-legged with predicate.
3-legged flavours are implemented in the `default` (`composition`)
backend by redirecting the call to the 4-legged flavours.
Included tests check that:
- Semantics of the iterator-only functions is correct.
- Semantics of the predicated functions is correct.
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[libc][cpp::string] Allocate fewer temp strings in operator= and += (#210895)
This PR generally updates `cpp::string` to avoid incidental allocations.
Specifically, it:
- Updates `opreator=(string_view)` to avoid allocating a temporary
string:
https://github.com/llvm/llvm-project/blob/67ebc4b221c3e94028b33004cd5cd08deee95048/libc/src/__support/CPP/string.h#L106-L108
- Changes `operator+=(const string&)` to accept a `string_view` so that
strings may be appended without allocation.
- Makes the `string(string_view)` constructor explicit. Before, there
were non-obvious allocations because of the implicit conversion.
As a side effect, this PR has to more carefully handle self-assignment
and self-append. This PR updates append and assignment to avoid calling
`realloc` during append / assignment, as this may invalidate input
pointers held by `string_view` if they point to data held by the string.
This also fixes self-assignment, which previously didn't work, eg
`cpp::string s = "abc"; s = s;` would zero out `s`.
[libc++abi][NFC] Remove some XFAILs which never trigger (#211241)
The oldest library we support is from LLVM 12, so we can remove any
XFAILs for libraries built before that.
[analyzer] Fix _Atomic crashes for Z3 symbolic execution (#212050)
This PR fixes _Atomic crashes for Z3 symbolic execution by passing the
types through getAtomicUnqualifiedType and getCanonicalType and skip
casting in fromCast if `FromTy == ToTy && FromBitWidth == ToBitWidth`.
Assisted-by: Codex
[llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (#211795)
IntrusiveRefCntPtr has non-trivial ctor/dtor, thus unused variables
wouldn't trigger a warning by default. However, they should.
https://clang.llvm.org/docs/AttributeReference.html#warn-unused
Let's mark the class with this attribute get warned about them.
This would have helped catching #211518 and #211517.
Supersedes #211647.
Some tests had to be uplifted because some bots used `-Werror` for those tests.
[SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (#212035)
Previously we relied on `createUnreachableSwitchDefault` to remove
incoming edges in phi nodes and update DT. However, it also creates a
new unreachable BB and updates the default destination of the switch
instruction, which is about to be replaced by a branch instruction. This
patch inlines the function and removes logic about the new BB, to make
sure the DT is updated correctly.
This issue cannot be reproduced via
-simplifycfg-require-and-preserve-domtree=1. I just found it by checking
DT in requestResimplify (will be added after fixing all existing
issues). The following test covers this case:
https://github.com/llvm/llvm-project/blob/5bc304c65494702d9d4928ff6cb369e6e6496e53/llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll#L38-L73
[clang][CFG] Fix lambda capture evaluation order (#211877)
Previously, the captures were emitted in their spelling order - but in
the CFG that gets translared in a reversed order.
Because of this, we need to emit them in reversed order to get them
appear in their natural order.
Fixes rdar://183140177
[docs] Remove release notes for backported changes (#212069)
Commit 68f703f3e58a52c41b39dfc654a675560b6c5614 added these release
notes, but this commit was backported to the 23.x release branch in
47e2df730a099583f16fc6fe64f0d2ffc5b7a16a (included in the 23.1.0 RC 1
tag).
Therefore, remove these release notes from the main branch (where they
would have been included in the 24.x release notes).
[clang] [test] Fix a new test on mingw (#212064)
This fixes running a new test that was added in
4b66bacd1fdf02803509b744034f3ab09945157c, in mingw environments.
The quirks that warranted adding the `!defined(_WIN32)` condition in the
test aren't actually specific to Windows in general, but specific to
MSVC environments - mingw environments behave just like other platforms.
Ideally we'd use `!defined(_MSC_VER)`, however in -cc1 mode, Clang
doesn't automatically define `_MSC_VER`; defining it requires setting a
command line option that the driver normally passes in MSVC mode.
Therefore, qualify the condition as `!defined(_MSC_VER) ||
defined(__MINGW32__)`.
DAG: Canonicalize undef shuffle operands and results to poison
getVectorShuffle canonicalizes fully-undefined results and unused operands.
Make sure these use poison to avoid degrading poison to undef, defending against
future regressions.
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[libc][test][NFC] Fix pthread_setschedparam_test flakiness (#212067)
Synchronised child thread execution in pthread_setschedparam_test using
a mutex lock. This prevents race conditions where the child thread
exited before scheduling parameter assertions ran on multi-core
platforms such as aarch64.
Added missing pthread target dependencies to CMakeLists.txt.
Assisted-by: Automated tooling, human reviewed.
[AMDGPU][GISel] Remove redundant AND on scalar shift amounts
A scalar shift only consumes the low log2(bitwidth) bits of its amount,
so an explicit (and amt, mask) feeding the amount is redundant whenever
mask has all of those low bits set. SelectionDAG already achieves this
via SimplifyDemandedBits on the shift-amount operand; this adds the
equivalent to the post-RegBankSelect combiner for G_SHL/G_LSHR/G_ASHR.
Co-authored-by: Cursor <cursoragent at cursor.com>
[LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (#212000)
analyze() numbers the dominator tree, scans it in reverse preorder for
header candidates, floods backward through the CFG from each header's
latches, then walks the CFG again to order the blocks.
Do all of it in one forward DFS, with the algorithm of Wei et al.,
"A New Algorithm for Identifying Loops in Decompilation", which
GenericCycleInfo already implements.
On an irreducible CFG that algorithm may return an irreducible superset
of the natural loop subset `discoverAndMapSubloop` would return.
(Depending on the successor visiting order, the algorithm may report a
reducible loop nested in an irreducible loop, where the reducible one
exactly matches `discoverAndMapSubloop`.)
To satisfy verifyLoop and LoopSimplify, reduce each such ireducible loop
to the natural loop of its header's backedges instead: the latches the
header dominates, and the blocks reaching them without passing the
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[clang][bytecode] Don't check global variable init size (#212092)
The current interpreter doesn't do this either. If we do, the clang
build fails because AMDGPUGenGlobalISel.inc: contains a global constexpr
array called MatchTable0 with 1'926'005 elements.
[clang][bytecode] Only override constant-context state if we have an EvalEmitter (#211475)
This does not make sense when emitting bytecode, as the bytecode would
just contain a `PushCC`/`PopCC` pair with nothing in between.
[AArch64] Add CAS instructions to NeoverseN2 schedule model (#211195)
CAS instructions (B, H, W, X variants) are not described in the ARM
Neoverse N2 Software Optimization Guide. There used to be no schedule
model for them, so `llvm-mca` was unable to analyze code containing
these instructions:
llvm-mca -mtriple=aarch64 -mcpu=cortex-a78 -mattr=+lse casb.s
error: found an unsupported instruction in the input assembly
sequence, use -skip-unsupported-instructions=lack-sched to ignore
these on the input.
note: instruction: casb w0, w1, [sp]
The patch adds a basic schedule model of 14 cycles (as measured on
Cortex-A78 with llvm-exegesis) and L/S utilized pipelines (this is a
guess, the reality is likely more complicated).
