[X86][APX] Fix EFLAGS reuse across cycles (#223613)
optimizeCompareInstr's multi-predecessor NF reuse (added in
ab39c491430e) did not scan the below-CmpInstr region of CmpMBB when
CmpMBB was on a CFG cycle: that region is on the back-edge path but is
scanned by neither the caller nor the helper's predecessor walk. A
non-NF-convertible EFLAGS clobber there (e.g. an unrelated CMP feeding a
JCC, as in the reproducer below with VUCOMISS/CTEST/COPY-\$eflags) still
let the helper delete the redundant compare and mark \$eflags live-in on
CmpMBB. That broke the reused EFLAGS on iteration 2+ and tripped
X86FlagsCopyLowering's SuccMBB == TestMBB self-loop check with a fatal
report_fatal_error when a preexisting COPY \$eflags save/restore sat in
the cycle.
Reproducer: https://godbolt.org/z/s58j5zxqd
Detect CmpMBB on a cycle via a forward-reachability BFS on its
successors and, when so, scan from just after CmpInstr to the block's
end: bail on any non-NF-convertible EFLAGS clobber, stage NF-convertible
[10 lines not shown]
[X86] getPSHUFShuffleMask - use PSHUFD/LW/HW decodes directly. NFC. (#224900)
Don't bother going through getTargetShuffleMask and checking for a
repeated lane mask when all we care about is the mask[4] permute mask -
PSHUFLW/HW don't even need the full 128-bit lane mask!
[clang][bytecode] Notify bytecode interpreter after deserializing constant global declarations (#198062)
The problem looks something like this:
```c++
extern const int m;
constexpr int getm() { return m; }
const int m = 12;
static_assert(getm() == 12);
```
The generated bytecode for `getm()` references a global variable stored
in `interp::Program`. This variable is uninitialized when the bytecode
is generated, but since it's extern, that's not diagnosed (because it
might be initialized later).
When we parse the redeclaration of `m` on line 4, we evaluate its
initializer via `Expr::EvaluateAsInitializer`, which makes the bytecode
[15 lines not shown]
[HIPSTDPAR] Add `sincos` support (#224620)
The math fixup pass for `hipstdpar` only supported standard library math
functions. Due to #194616, combining `sin` + `cos` into `sincos` becomes
possible, so whilst `sincos` itself is not (yet) a standard library
interface, it has to be handled as well. This extends the set of covered
intrinsics to include it.
[clang][test] Add regression test for invalid 'int decltype {}' (#224855)
The parser crash on `int decltype {}` was fixed by #211221, but the test
it added only covers the `= 0` forms. Add the brace-init form reported
in the issue.
Fixes #165246
PPC: Fold 64-bit zero-extending word load feeding extsw subregister
A gprc LWZ/LWZX feeding EXTSW_32_64 is rewritten into a sign-extending
LWA/LWAX load. Extend the same fold to the 64-bit zero-extending word
loads LWZ8/LWZX8 when the EXTSW_32_64 reads their sub_32 subregister,
producing a single LWA/LWAX instead of a redundant lwz+extsw pair.
Co-authored-by: Claude (Claude Opus 4.8, claude-opus-4-8) <noreply at anthropic.com>
PPC: Add MIR examples for missed extsw+word-load fold on subregister input
A gprc LWZ/LWZX feeding EXTSW_32_64 folds into a sign-extending LWA/LWAX
load. The equivalent 64-bit zero-extending word loads (LWZ8/LWZX8) whose
sub_32 feeds EXTSW_32_64 are not folded, leaving a redundant lwz+extsw
(or lwzx+extsw) pair. Add MIR examples documenting the missed fold.
Co-authored-by: Claude (Claude Opus 4.8, claude-opus-4-8) <noreply at anthropic.com>
PPC: Fix extsw elimination when the input reads a subregister
The EXTSW_32_64 sign-extend elimination previously assumed its input
was a full register value. It would then try using that value as the
source of the new (unnecessary) INSERT_SUBREG.
The new test would then hit this verifier error:
```
bb.0:
liveins: $x3
%0:g8rc = COPY killed $x3
%1:g8rc = RLDICL killed %0:g8rc, 0, 33
%3:g8rc = IMPLICIT_DEF
%2:g8rc = INSERT_SUBREG %3:g8rc(tied-def 0), %1:g8rc, %subreg.sub_32
$x3 = COPY killed %2:g8rc
BLR8 implicit $lr8, implicit $rm, implicit killed $x3
*** Bad machine code: INSERT_SUBREG expected inserted value to have equal or lesser size than the subreg it was inserted into ***
[8 lines not shown]
PPC: Fix EXTSW elimination promoting a subregister operand
promoteInstr32To64ForElimEXTSW copies operands from the 32-bit
instruction verbatim into its promoted 64-bit form. When an operand
reads the sub_32 subregister of a 64-bit register, the promoted
instruction (which takes a full register) ended up with an illegal
subregister use and failed the machine verifier.
Drop the sub_32 subregister and use the original full register, which
provides the low 32 bits the promoted instruction operates on. This
avoids verifier error regressions in a future change.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8, claude-opus-4-8)
[DAG] canCreateUndefOrPoison/isGuaranteedNotToBeUndefOrPoison - SCALAR_TO_VECTOR upper elements are poison (#217185)
ISD::SCALAR_TO_VECTOR documents its upper elements (1..N-1) as poison,
not undef. Update both helpers to use includesPoison(Kind) instead of
includesUndef(Kind) when those elements are demanded, so PoisonOnly
queries correctly report that the upper elements can create poison and
are not guaranteed to be poison-free.
AI assistance was used for code review analysis and local build
verification.
Fixes #217028
[SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits
Replace a non-zero constant with zero when none of its set bits are
demanded.
This allows users of `SimplifyMultipleUseDemandedBits` to eliminate
irrelevant constant bits while preserving the convention that a null
SDValue indicates no simplification.
CodeGen: Move DataLayout computation to CodeGenTargetMachineImpl's ctor
Every target's TargetMachine constructor passed TT.computeDataLayout() as
the DL string argument to the base constructor, duplicating the same call
across all backends. Some backends just didn't bother passing in the ABI
name.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8)
[SandboxVec][LoadStoreVec] Support constant vectors of mixed types
createConstantVector() previously packed the constant store operands
as-is, which only worked when every store had the same element type.
Take the lane type from VecUtils::getCombinedVectorTypeFor() instead and
reinterpret each constant's bits as that type, going through an integer
of matching width via ptrtoint/inttoptr/bitcast. Constants wider than a
lane (e.g. an i64 in an <N x i32>) are split across several lanes in
memory order. Bail out when a constant cannot be reinterpreted, such as
a non-integral pointer or a relocatable address that needs splitting.
Also flatten vector-typed ConstantPointerNull into per-lane nulls, and
bail out on the remaining vector constants such as poison rather than
packing them into the result.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
[ORC] Drive LLJIT dlopen/dlupdate/dlclose via proxies (#224881)
Add Dlfcn proxies (Dlfcn.h), their SPS specs (DlfcnSPS.h) and CI
descriptors (DlfcnSPSCI.h), and route ORCPlatformSupport's three
callSPSWrapper sites through them via recordProxy.
[clang][bytecode] Add a special opcode for trivial default initializers (#224839)
Trivial default initializers from modules are not implicitly defined in
the AST, so we would diagnose the attached test case as an undefined
constructor. Do what the current interpreter does and special-case this.
Fixes https://github.com/llvm/llvm-project/issues/221400
[SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits
Replace a non-zero constant with zero when none of its set bits are
demanded.
This allows users of `SimplifyMultipleUseDemandedBits` to eliminate
irrelevant constant bits while preserving the convention that a null
SDValue indicates no simplification.
