LLVM/project 2d12c0d — llvm/include/llvm/Transforms/Utils ScalarEvolutionExpander.h, llvm/lib/Transforms/Vectorize VPlanLowering.cpp

[LV] Expand IR AddRecs from VPSCEVExpander in SafeUDivMode. (#240209)

VPSCEVExpander leaves some expressions for expansion in IR. Those may
get hoisted and executed before other runtime checks (like SCEV
predicate checks).

The expressions may only be valid if the SCEV predicates hold. For
example, a runtime check bound with an outer loop AddRec with step
%m /u (%stride + %y) becomes %m /u (%y + 1) after applying
%stride == 1, which divides by zero for %y == -1 and %stride != 1,
while the original loop is well defined.

Expand SCEVs via IR expander in SafeUDivMode, exposed via a
new constructor parameter, so they cannot cause UB.
DeltaFile
+99-0llvm/test/Transforms/LoopVectorize/alias-mask.ll
+70-0llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+6-2llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
+4-1llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
+179-34 files

LLVM/project 687805d — llvm/lib/Transforms/Scalar GVNHoist.cpp, llvm/test/Transforms/GVNHoist hoist.ll

[GVNHoist] Propogate getClobberingMemoryAccess after moveToPlace

getDefiningAccess in sfaeToHoistLdSt returns the nearest stores
if we don't query AA result by using getClobberingMemoryAccess. This
reduce the opportunity for optimization in sfaeToHoistLdSt as
isLiveOnEntryDef returns false without updating.

In the example (See Closes item): after hosting left.a and left.b,
getDefiningAccess returns `store q` before.

As a result, we call getClobberingMemoryAccess after relink the
hoisted expression.

Assisted-by: Claude # Test
Closes: #221578
DeltaFile
+47-0llvm/test/Transforms/GVNHoist/hoist.ll
+2-0llvm/lib/Transforms/Scalar/GVNHoist.cpp
+49-02 files

LLVM/project 095411e — llvm/lib/Transforms/Vectorize VPlanUtils.cpp, llvm/test/Transforms/LoopVectorize invariant-store-vectorization.ll runtime-checks-hoist.ll

[VPlan] Hoist sums of invariant operands of adds in runtime checks. (#240190)

When expanding a variant integer add for the runtime checks of an inner
loop in a loop nest, operands invariant in the outer loop were hoisted
individually during IR SCEV expansion.

Update VPlan-based SCEV epander to expand the sum of the invariant
operands plus the sum of the others, so the invariant sum is expanded in
IR and hoisted out of the outer loop.
DeltaFile
+19-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+5-7llvm/test/Transforms/LoopVectorize/runtime-checks-hoist.ll
+3-1llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
+27-83 files

LLVM/project fc735c5 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 narrowed-reduction-combined-root-extra-use.ll

[SLP]Do not form scalar reduction roots with external lane uses

Narrowed reductions keep chains with extra uses alive, so their leaves
need extracts from the root vector, which bitcast and bit pack roots
do not produce.

Fixes #240152

Assisted-by: Cursor

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/240216
DeltaFile
+167-0llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-combined-root-extra-use.ll
+12-3llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+179-32 files

LLVM/project 0d1bc72 — lld/ELF Symbols.cpp

[ELF] Symbol::resolve: Remove dead discardedSecIdx condition. NFC (#240213)

initializeSymbols used to call `resolve` with such an Undefined for a
global symbol defined in a discarded COMDAT member. Since D120626 all
callers pass discardedSecIdx=0 (except combineVersionedSymbol where
`this` is a Defined).
DeltaFile
+3-7lld/ELF/Symbols.cpp
+3-71 files

LLVM/project 640f559 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 reduction-split-signed-narrow-part.ll

[SLP]Fix signedness of the last narrow part in split reductions

If the other parts are reduced in tree, the remaining narrow vector part
was extended to the reduction type with zext, ignoring its signedness.

Fixes #240151

Assisted-by: Cursor

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/240211
DeltaFile
+1-1llvm/test/Transforms/SLPVectorizer/X86/reduction-split-signed-narrow-part.ll
+1-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+2-22 files

LLVM/project dce5d5a — lld/ELF Symbols.cpp

[ELF] Delete dead VER_NDX_LOCAL check. NFC (#240210)

Dead since D107234
DeltaFile
+1-1lld/ELF/Symbols.cpp
+1-11 files

LLVM/project 859cffb — llvm/test/Transforms/SLPVectorizer/X86 reduction-split-signed-narrow-part.ll

[SLP][NFC]Add a test ith incorrect zext in reduction, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/240206
DeltaFile
+37-0llvm/test/Transforms/SLPVectorizer/X86/reduction-split-signed-narrow-part.ll
+37-01 files

LLVM/project 935398c — lld/ELF SyntheticSections.cpp LinkerScript.cpp, lld/ELF/Arch ARM.cpp

[ELF] Remove unused Ctx parameter from Defined, CommonSymbol, and addAndCheckDuplicate. NFC (#240207)
DeltaFile
+16-17lld/ELF/InputFiles.cpp
+9-9lld/ELF/Writer.cpp
+5-8lld/ELF/Symbols.h
+3-3lld/ELF/SyntheticSections.cpp
+3-3lld/ELF/LinkerScript.cpp
+3-3lld/ELF/Arch/ARM.cpp
+39-435 files not shown
+44-4811 files

LLVM/project 9f63b3c — llvm/include/llvm/Frontend/OpenMP OMPContext.h

Document the tie-break in getBestVariantMatchForContext
DeltaFile
+3-0llvm/include/llvm/Frontend/OpenMP/OMPContext.h
+3-01 files

LLVM/project 4781c5f — llvm/test/Assembler bitinsert-bitextract-invalid.ll

[IR] Remove dead CHECK lines in `bitinsert-bitextract-invalid.ll`
DeltaFile
+36-33llvm/test/Assembler/bitinsert-bitextract-invalid.ll
+36-331 files

LLVM/project 0ba0e3f — llvm/lib/Transforms/Scalar GVNHoist.cpp, llvm/test/Transforms/GVNHoist hoist-md.ll

[GVNHoist] Make nested GEPs check corresponding Instructions

A nested GEP of a load/store was originally check the direct parent of
the load store. This makes us unable to correctly relax the flags for
the innermost GEP.

The simple example is in here:

```
b = gep a
c = gep b
d = load c
```

In the orignal implementation, the merging always uses gep b, this
causes gep a are unable to detect.

Assisted-by: Cluade # Test
Closes: #237085
DeltaFile
+70-0llvm/test/Transforms/GVNHoist/hoist-md.ll
+25-15llvm/lib/Transforms/Scalar/GVNHoist.cpp
+95-152 files

LLVM/project e1fd616 — llvm/include/llvm/ADT SmallString.h, llvm/unittests/Support VirtualOutputBackendsTest.cpp

[ADT] Add LLVM_ATTRIBUTE_WARN_UNUSED to SmallString (#240180)

This patch adds LLVM_ATTRIBUTE_WARN_UNUSED to SmallString so that
compilers can diagnose unused SmallString variables even though
SmallString has a non-trivial constructor and destructor.

This patch also removes an unused local variable Path in
VirtualOutputBackendsTest.cpp uncovered by the attribute.

Assisted-by: Antigravity
DeltaFile
+4-2llvm/include/llvm/ADT/SmallString.h
+0-1llvm/unittests/Support/VirtualOutputBackendsTest.cpp
+4-32 files

LLVM/project 94bb8b5 — llvm/lib/Target/SPIRV SPIRVEmitIntrinsics.cpp SPIRVGlobalRegistry.h

[NFC][SPIRV] Clean up the Global Registry when removing an instruction (#239297)

This fixes a relatively quaint bug, that only seems to trigger with .bc
inputs. Here's what I believe is happening:

- during intrinsic emission we might have to update assign pointer type
instructions, as a consequence of mutating an instruction;
- the old / non mutated instruction is erased, as is the old type
assignment, but its entry in the map from instruction to assigned type
maintained by the Global Registry is not erased;
- during subsequent processing, as a consequence of new instructions
getting created, the address of the old, now erased instruction, appears
to be re-used;
- due to the re-use, we can end up in a circumstance wherein we index
into the assigned type map via the re-used address and retrieve the now
invalid / dead `assign.type` instruction.

The fix is to a just add an interface that allows the simple removal /
erasure of an entry from the map (we already have `add` and `update`),

    [7 lines not shown]
DeltaFile
+4-0llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
+2-0llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+6-02 files

LLVM/project 47535a4 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/RISCV early_exit_with_stores.ll

[LV] Treat all blocks as predicated for early exits with side effects. (#232408)

For uncountable exits with side effects, all memory accesses except the
uncountable exit condition load are masked on the VPlan-level. Legal
already marks them as requiring a mask.

Also return true from blockNeedsPredicationForAnyReasonif the loop has
an uncountable exit with side effects.

PR: https://github.com/llvm/llvm-project/pull/232408
DeltaFile
+248-0llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
+202-0llvm/test/Transforms/LoopVectorize/X86/early_exit_with_stores.ll
+8-7llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+458-73 files

LLVM/project 5d7d7ac — llvm/lib/Transforms/Vectorize VPlanRecipes.cpp VPlan.h

[VPlan] Share the result-type helper of `VPReplicateRecipe` with `VPWidenRecipe` (NFC)
DeltaFile
+29-20llvm/lib/Transforms/Vectorize/VPlan.h
+2-2llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+31-222 files

LLVM/project acbdeaa — llvm/lib/Transforms/Vectorize VPlanUtils.cpp LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize outer-loop-bitextract.ll bitextract-bitinsert.ll

[LV] Widen `bitextract` and `bitinsert`
DeltaFile
+306-0llvm/test/Transforms/LoopVectorize/bitextract-bitinsert.ll
+134-0llvm/test/Transforms/LoopVectorize/X86/bitextract-bitinsert-cost.ll
+95-0llvm/test/Transforms/LoopVectorize/outer-loop-bitextract.ll
+42-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+18-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+2-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+597-16 files

LLVM/project 60b9d2f — llvm/test/Analysis/CostModel/X86 bitinsert-bitextract.ll

[TTI] Pre-commit tests for `bitinsert` and `bitextract` costs
DeltaFile
+74-0llvm/test/Analysis/CostModel/X86/bitinsert-bitextract.ll
+74-01 files

LLVM/project 7f76d40 — llvm/include/llvm/Analysis TargetTransformInfo.h TargetTransformInfoImpl.h, llvm/include/llvm/CodeGen BasicTTIImpl.h

[TTI] Cost `bitinsert` and `bitextract` by their lowering
DeltaFile
+26-26llvm/test/Analysis/CostModel/X86/bitinsert-bitextract.ll
+43-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+20-0llvm/lib/Analysis/TargetTransformInfo.cpp
+20-0llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+12-0llvm/include/llvm/Analysis/TargetTransformInfo.h
+121-265 files

LLVM/project 0bf417e — llvm/lib/Analysis InstructionSimplify.cpp, llvm/test/Transforms/InstSimplify bitinsert-bitextract.ll

[InstSimplify] Simplify vector `bitinsert` and `bitextract` with out-of-range offsets
DeltaFile
+23-5llvm/lib/Analysis/InstructionSimplify.cpp
+2-4llvm/test/Transforms/InstSimplify/bitinsert-bitextract.ll
+25-92 files

LLVM/project 566350c — llvm/test/Transforms/InstSimplify bitinsert-bitextract.ll

[InstSimplify] Pre-commit tests for vector `bitinsert` and `bitextract` with out-of-range offsets
DeltaFile
+31-11llvm/test/Transforms/InstSimplify/bitinsert-bitextract.ll
+31-111 files

LLVM/project 93cf709 — llvm/test/Transforms/InstSimplify bitcast-vector-fold.ll, llvm/test/Transforms/InstSimplify/ConstProp bitinsert-bitextract.ll

[ConstantFolding] Pre-commit tests for constant vector `bitcast`s to scalar bytes
DeltaFile
+72-0llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
+20-0llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+92-02 files

LLVM/project fa2c745 — llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify bitcast-vector-fold.ll

[ConstantFolding] Fold constant vector `bitcast`s to scalar bytes
DeltaFile
+20-8llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
+20-5llvm/lib/Analysis/ConstantFolding.cpp
+2-4llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+42-173 files

LLVM/project 95825bc — llvm/test/Transforms/InstSimplify/ConstProp bitinsert-bitextract.ll

[ConstantFolding] Pre-commit tests for vector `bitinsert` and `bitextract`
DeltaFile
+74-0llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+74-01 files

LLVM/project 856b790 — llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify/ConstProp bitinsert-bitextract.ll

[ConstantFolding] Fold vector `bitinsert` and `bitextract`
DeltaFile
+65-6llvm/lib/Analysis/ConstantFolding.cpp
+10-23llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+75-292 files

LLVM/project 4f4016e — llvm/lib/CodeGen/GlobalISel IRTranslator.cpp, llvm/test/CodeGen/AArch64 bitinsert-bitextract-vector.ll

[GlobalISel] Lower vector `bitinsert` and `bitextract`
DeltaFile
+65-0llvm/test/CodeGen/AArch64/bitinsert-bitextract-vector.ll
+14-12llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+79-122 files

LLVM/project 1563d4f — llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp, llvm/test/CodeGen/AArch64 sve-bitinsert-bitextract.ll bitinsert-bitextract-vector.ll

[SelectionDAG] Lower vector `bitinsert` and `bitextract`
DeltaFile
+277-0llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-vector.ll
+183-0llvm/test/CodeGen/X86/bitinsert-bitextract-vector.ll
+145-0llvm/test/CodeGen/RISCV/rvv/bitinsert-bitextract.ll
+94-0llvm/test/CodeGen/AArch64/bitinsert-bitextract-vector.ll
+27-0llvm/test/CodeGen/AArch64/sve-bitinsert-bitextract.ll
+2-2llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+728-26 files

LLVM/project edff199 — llvm/lib/Transforms/IPO IPOOptions.td Instrumentor.cpp

[IPO] Declare Instrumentor.cpp command line options in TableGen (#240199)
DeltaFile
+11-21llvm/lib/Transforms/IPO/Instrumentor.cpp
+6-0llvm/lib/Transforms/IPO/IPOOptions.td
+17-212 files

LLVM/project c593ffa — llvm/test/tools/llubi bitinsert_bitextract_le.ll bitinsert_bitextract_be.ll, llvm/tools/llubi/lib Interpreter.cpp

[llubi] Add support for vector `bitinsert` and `bitextract`
DeltaFile
+26-22llvm/tools/llubi/lib/Interpreter.cpp
+32-0llvm/test/tools/llubi/bitinsert_bitextract_le.ll
+32-0llvm/test/tools/llubi/bitinsert_bitextract_be.ll
+90-223 files

LLVM/project a89b4c5 — llvm/lib/Target/M68k M68kSubtarget.cpp M68kSubtarget.h, llvm/lib/Target/M68k/AsmParser M68kAsmParser.cpp

[M68k] Declare command line options in TableGen (#240195)

Move -m68k-use-base-pointer into M68kOptions.td and
-m68k-register-prefix-optional into MCTargetDesc/M68kMCOptions.td.
M68kTargetMachine holds `const M68kOptions &CLOpts`, and M68kSubtarget
copies it; M68kAsmParser holds `const M68kMCOptions &CLOpts`.

Delete the unused -m68k-ssection-threshold.
DeltaFile
+23-0llvm/lib/Target/M68k/MCTargetDesc/M68kMCOptions.h
+14-0llvm/lib/Target/M68k/M68kOptions.td
+14-0llvm/lib/Target/M68k/MCTargetDesc/M68kMCOptions.td
+6-7llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
+6-3llvm/lib/Target/M68k/M68kSubtarget.h
+5-3llvm/lib/Target/M68k/M68kSubtarget.cpp
+68-137 files not shown
+90-2613 files