LLVM/project e003f1cllvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR never-uniform-gmir.mir, mlir/include/mlir/Dialect/OpenACC OpenACCCGOps.td

rebase

Created using spr 1.3.7
DeltaFile
+86-0mlir/test/Dialect/OpenACC/ops-cg.mlir
+55-0mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+40-1mlir/test/Dialect/Linalg/canonicalize.mlir
+36-0mlir/test/Dialect/OpenACC/invalid-cg.mlir
+14-0mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
+13-0llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
+244-13 files not shown
+256-79 files

LLVM/project 1a4ff96llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR never-uniform-gmir.mir, mlir/include/mlir/Dialect/OpenACC OpenACCCGOps.td

rebase

Created using spr 1.3.7
DeltaFile
+86-0mlir/test/Dialect/OpenACC/ops-cg.mlir
+55-0mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+40-1mlir/test/Dialect/Linalg/canonicalize.mlir
+36-0mlir/test/Dialect/OpenACC/invalid-cg.mlir
+14-0mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
+13-0llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
+244-12 files not shown
+254-58 files

LLVM/project 22cdececlang/lib/Driver/ToolChains Darwin.cpp AMDGPU.cpp

clang: Add BoundArch argument to addClangTargetOptions (#196504)

addClangTargetOptions already has an OffloadKind argument,
but it kind of doesn't make sense for any function to know the
OffloadKind, but not the associated BoundArch.

The current process is kind of convoluted. TranslateArgs
synthesizes a -mcpu argument from BoundArch, and later
addClangTargetOptions re-parses that -mcpu argument each
time it wants the architecture. Add this argument so this
can be cleaned up in a future change.

Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
DeltaFile
+9-5clang/lib/Driver/ToolChains/Darwin.cpp
+7-5clang/lib/Driver/ToolChains/AMDGPU.cpp
+7-3clang/lib/Driver/ToolChains/Darwin.h
+6-3clang/lib/Driver/ToolChains/AMDGPU.h
+5-3clang/lib/Driver/ToolChains/Gnu.h
+5-3clang/lib/Driver/ToolChains/Cuda.cpp
+39-2248 files not shown
+115-5654 files

LLVM/project 3443243mlir/lib/Dialect/Linalg/IR LinalgOps.cpp, mlir/test/Dialect/Linalg canonicalize.mlir

[mlir][linalg] add more pattern to fold pack op padding_value. (#198468)

No padding is needed for unit tile size.
DeltaFile
+40-1mlir/test/Dialect/Linalg/canonicalize.mlir
+7-4mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
+47-52 files

LLVM/project 5784cd3llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR never-uniform-gmir.mir

AMDGPU/UniformityAnalysis: For G_AMDGPU_WHOLE_WAVE_FUNC_SETUP, always divergent (#203000)
DeltaFile
+13-0llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
+3-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+16-02 files

LLVM/project 8342bf9mlir/include/mlir/Dialect/OpenACC OpenACCCGOps.td, mlir/lib/Dialect/OpenACC/IR OpenACCCG.cpp

[mlir][acc] Add acc.predicate_region for redundant/single semantics (#203011)

Add acc.predicate_region, an intermediate codegen operation that groups
statements at intermediate points in a loop nest within
acc.compute_region. OpenACC distinguishes partitioned loop execution
from single and redundant execution at nest transitions: for example,
gang-redundant code runs on all gangs but not as partitioned gang-loop
iterations, and worker-single or vector-single code runs on one worker
or vector lane rather than across the full worker or vector partition.
This grouping marks code whose execution scope differs from surrounding
partitioned loops, so predication and synchronization can be applied
correctly during lowering.
DeltaFile
+86-0mlir/test/Dialect/OpenACC/ops-cg.mlir
+55-0mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+36-0mlir/test/Dialect/OpenACC/invalid-cg.mlir
+14-0mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
+191-04 files

LLVM/project 61e473fllvm/lib/Support SpecialCaseList.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+26-0llvm/lib/Support/SpecialCaseList.cpp
+26-01 files

LLVM/project 1b4e530clang/test/CodeGen/RISCV rvp-intrinsics.c, clang/unittests/ScalableStaticAnalysisFramework/Serialization/JSONFormatTest LUSummaryTest.cpp

rebase

Created using spr 1.3.7
DeltaFile
+8,554-3,250llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
+0-6,200llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
+4,380-0llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16-fake16.txt
+3,349-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+0-2,076clang/unittests/ScalableStaticAnalysisFramework/Serialization/JSONFormatTest/LUSummaryTest.cpp
+1,308-0llvm/test/CodeGen/AArch64/clmul.ll
+17,591-11,526480 files not shown
+37,438-16,298486 files

LLVM/project 652915cllvm/lib/Transforms/InstCombine InstCombineCasts.cpp, llvm/test/Transforms/InstCombine trunc.ll

[InstCombine] Preserve no wrap kinds for trunc in EvaluateInDifferentType (#202233)

proof: https://alive2.llvm.org/ce/z/M2ghfG
DeltaFile
+81-0llvm/test/Transforms/InstCombine/trunc.ll
+12-0llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+93-02 files

LLVM/project dd4012dllvm/lib/Support SpecialCaseList.cpp

space

Created using spr 1.3.7
DeltaFile
+0-1llvm/lib/Support/SpecialCaseList.cpp
+0-11 files

LLVM/project 56281e9llvm/lib/Support SpecialCaseList.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+5-2llvm/lib/Support/SpecialCaseList.cpp
+5-21 files

LLVM/project f5a4294flang/include/flang/Parser parse-tree.h dump-parse-tree.h, flang/lib/Parser unparse.cpp

[flang][semantic] parser node types and rewrite for explicit-shape-bounds-spec (#188447)

This commit lays the groundwork for semantic analysis of rank-1 integer array expressions being used as bounds in a declaration with explicit bounds.
DeltaFile
+117-0flang/test/Semantics/declaration-explicit-array-bounds.f90
+71-0flang/lib/Semantics/resolve-names-utils.cpp
+12-4flang/include/flang/Parser/parse-tree.h
+4-0flang/lib/Parser/unparse.cpp
+1-0flang/include/flang/Parser/dump-parse-tree.h
+205-45 files

LLVM/project d536406llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Strip unused SetOperations hdr (NFC) (#202993)
DeltaFile
+0-1llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+0-11 files

LLVM/project 8b0c628flang/lib/Lower ConvertExprToHLFIR.cpp ConvertConstant.cpp, flang/lib/Optimizer/Builder IntrinsicCall.cpp

Enumeration Type Lowering: FIR code generation (PR 9)

Maps enumeration types to i32 at the FIR level. Intercepts enumeration
DerivedTypeSpec in ConvertType to produce IntegerType, lowers
enumeration constructors/constants, and generates NEXT/PREVIOUS/HUGE
intrinsic lowering with STAT boundary handling and error termination.

Files from original PR 9 plus PR 7/8 lowering additions (PREVIOUS,
STAT, void-cast fixes).
DeltaFile
+181-0flang/lib/Lower/ConvertExprToHLFIR.cpp
+38-0flang/lib/Lower/ConvertConstant.cpp
+20-0flang/lib/Lower/ConvertExpr.cpp
+11-0flang/lib/Lower/ConvertType.cpp
+1-0flang/lib/Optimizer/Builder/IntrinsicCall.cpp
+251-05 files

LLVM/project dab8820flang/test/Lower enumeration-type.f90

Adding lowering test.
DeltaFile
+261-0flang/test/Lower/enumeration-type.f90
+261-01 files

LLVM/project a2a7e08flang/include/flang/Runtime magic-numbers.h, flang/lib/Evaluate intrinsics.cpp fold-implementation.h

Enumeration Type Sem-3: Intrinsics + I/O + Module Files (PRs 6-8)

Adds enumeration type intrinsics (HUGE, NEXT, PREVIOUS, INT) with
constant folding, STAT argument support with boundary detection,
formatted I/O rejection for enumeration types, module file round-trip
support, and runtime STAT_ENUM_BOUNDARY error code.

Files from original PRs 6-8 (including PREVIOUS intrinsic from PR 7).
DeltaFile
+227-1flang/lib/Evaluate/intrinsics.cpp
+86-0flang/lib/Semantics/mod-file.cpp
+74-1flang/lib/Evaluate/fold-implementation.h
+73-0flang/lib/Semantics/check-io.cpp
+5-0flang/lib/Semantics/type.cpp
+5-0flang/include/flang/Runtime/magic-numbers.h
+470-23 files not shown
+477-29 files

LLVM/project dd58684flang/test/Semantics enumeration-type-intrinsics.f90 enumeration-type-mod.f90

Adding test cases.
DeltaFile
+153-0flang/test/Semantics/enumeration-type-intrinsics.f90
+84-0flang/test/Semantics/enumeration-type-mod.f90
+68-0flang/test/Semantics/enumeration-type-io.f90
+305-03 files

LLVM/project 8035ae5llvm/lib/Target/NVPTX NVPTXUtilities.cpp NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX ret-align-mismatch.ll param-overalign.ll

[NVPTX] Cleanup and refactor param align computation, addressing a few minor bugs and discrepancies (#188588)
DeltaFile
+82-0llvm/test/CodeGen/NVPTX/ret-align-mismatch.ll
+49-24llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
+15-44llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+8-16llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+18-6llvm/lib/Target/NVPTX/NVPTXUtilities.h
+3-4llvm/test/CodeGen/NVPTX/param-overalign.ll
+175-944 files not shown
+181-10010 files

LLVM/project 2b83630clang/lib/Sema SemaAPINotes.cpp

[APINotes] Early return when no apinotes files are loaded

When no APINotes readers are available, let's not spend time trying to
determine the current decl's context or do other redundant work.

Resolves https://github.com/llvm/llvm-project/issues/202214
DeltaFile
+14-11clang/lib/Sema/SemaAPINotes.cpp
+14-111 files

LLVM/project 575a0b1llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU isel-whole-wave-functions.ll whole-wave-functions.ll

AMDGPU/GlobalISel: RegBankLegalize rules for WHOLE_WAVE_FUNC setup and return
DeltaFile
+16-11llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
+5-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+2-2llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll
+1-1llvm/test/CodeGen/AMDGPU/amdgcn-call-whole-wave.ll
+24-144 files

LLVM/project fef1229llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR never-uniform-gmir.mir

AMDGPU/UniformityAnalysis: For G_AMDGPU_WHOLE_WAVE_FUNC_SETUP, always divergent
DeltaFile
+13-0llvm/test/Analysis/UniformityAnalysis/AMDGPU/MIR/never-uniform-gmir.mir
+3-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+16-02 files

LLVM/project 0cd5b7fmlir/lib/Target/LLVMIR ModuleImport.cpp, mlir/test/Target/LLVMIR/Import function-metadata.ll

[MLIR][LLVM] Preserve unknown function metadata on import

Import non-debug function metadata without a kind-specific dialect conversion into LLVMFuncOp function_metadata. Preserve repeated metadata kinds through the generic carrier so LLVM IR import and export can round-trip those attachments.
DeltaFile
+36-5mlir/lib/Target/LLVMIR/ModuleImport.cpp
+34-0mlir/test/Target/LLVMIR/Import/function-metadata.ll
+70-52 files

LLVM/project e9b4d77mlir/lib/Target/LLVMIR ModuleTranslation.cpp, mlir/test/Target/LLVMIR function-metadata.mlir

[MLIR][LLVM] Translate LLVMFuncOp function metadata

Materialize LLVMFuncOp function_metadata through ModuleTranslation metadata conversion. Attach function metadata after module-level symbols are mapped so metadata references to functions, globals, aliases, and ifuncs can be resolved.
DeltaFile
+142-0mlir/test/Target/LLVMIR/function-metadata.mlir
+49-5mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+191-52 files

LLVM/project b1ff7b3mlir/include/mlir/Dialect/LLVMIR LLVMAttrDefs.td LLVMOps.td, mlir/lib/Dialect/LLVMIR/IR LLVMAttrs.cpp

[MLIR][LLVM] Add function metadata to LLVMFuncOp

Add a generic LLVM dialect carrier for LLVM IR function metadata on LLVMFuncOp.
Represent attachments as an ordered list so repeated metadata kinds, such as
multiple type metadata attachments, can be preserved while keeping metadata names
language-agnostic.
DeltaFile
+22-0mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
+20-0mlir/test/Dialect/LLVMIR/invalid.mlir
+17-0mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
+6-0mlir/test/Dialect/LLVMIR/func.mlir
+3-0mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+1-0mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
+69-06 files

LLVM/project 0bb5833.github/workflows ids-check.yml, llvm/utils/git ids-check-helper.py

[ids-check] Update the workflow and script (#199710)

In compnerd/ids#58, support was added to parse a header file using a
given source file's flags. This solves many of the issues we had
encountered with the `ids-check-helper.py` script and its corresponding
workflow.

* Update ids to the current version, which includes the `--main-file`
changes.
* Use a more recent LLVM compiler to build a subset of LLVM.
* Build a subset of LLVM targets to properly parse more header files.
* Use the `--main-file` argument when invoking `idt`.
* Add explicit overrides and exclude header lists.

This was tested on every public header in LLVM and forthcoming PRs will
land the changes found with the updated script. Once all of the headers
have been updated, the workflow will be re-enabled. This effort is
tracked in #109483.
DeltaFile
+368-131llvm/utils/git/ids-check-helper.py
+49-19.github/workflows/ids-check.yml
+417-1502 files

LLVM/project 4bcd444mlir/lib/Target/LLVMIR ModuleImport.cpp, mlir/test/Target/LLVMIR/Import intrinsic-unregistered.ll import-failure.ll

[MLIR][LLVM] Preserve global value metadata operands on import

Import global value references inside LLVM metadata operands as LLVM dialect metadata symbol-reference attributes. Add llvm.read_register import coverage for function, global, alias, and nameless-global metadata operands.
DeltaFile
+78-5mlir/test/Target/LLVMIR/Import/intrinsic-unregistered.ll
+49-12mlir/lib/Target/LLVMIR/ModuleImport.cpp
+45-0mlir/test/Target/LLVMIR/Import/import-failure.ll
+172-173 files

LLVM/project 90297b8llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU bitop3-shared-operand.ll

[AMDGPU] Fix wrong truth table in BitOp3_Op for shared sub-expressions. (#198556)

When the LHS and RHS of a boolean node share a common sub-expression,
LHS recursion can decompose that shared node via the "replace parent
operator" mechanism in getOperandBits (Src[I] = Op where Src[I] == In).
This replaces the Src slot that RHS was originally mapped to with a
sub-operand. If RHS recursion then fails to re-derive its own
decomposition, RHSBits still refers to the old slot index — but the slot
now holds a different value, producing an incorrect truth table.

Fix this by tracking which Src slot RHS occupies before LHS recursion.
If RHS recursion fails and that specific slot was modified, roll back
Src and the bit assignments to the pre-recursion state.

Add a test to show a specific example.

Assisted-by: Cursor (Claude)
DeltaFile
+573-0llvm/test/CodeGen/AMDGPU/bitop3-shared-operand.ll
+99-8llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+98-8llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+770-163 files

LLVM/project caae8f8mlir/include/mlir/Dialect/LLVMIR LLVMOps.td, mlir/lib/Target/LLVMIR ModuleTranslation.cpp

[MLIR][LLVM] Share LLVM metadata attribute translation

Share LLVM dialect metadata materialization through ModuleTranslation so named
metadata and metadata-as-value lowering use one conversion path. Resolve metadata
symbol references to functions, globals, aliases, and ifuncs, and diagnose
malformed required metadata before lowering.
DeltaFile
+18-43mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
+50-0mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+31-0mlir/test/Target/LLVMIR/llvmir-named-metadata.mlir
+12-9mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
+17-0mlir/test/Target/LLVMIR/llvmir-invalid.mlir
+13-0mlir/test/Dialect/LLVMIR/call-intrin.mlir
+141-523 files not shown
+159-529 files

LLVM/project 12089b1llvm/docs ProgrammersManual.rst, llvm/include/llvm/ADT StringMap.h

Revert "[StringMap] Invalidate iterators in remove()  (#203003)

This reverts commit
https://github.com/llvm/llvm-project/commit/bccd1b9cb744e5dd96ee59baa4bf4583457feea3.
and
https://github.com/adrian-prantl/llvm-project/commit/9dfcf7663b1604ae5ced030a69e2be0e93632d5e.

They breaks the LLDB bots:

https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake/22124/
DeltaFile
+0-88llvm/unittests/ADT/StringMapTest.cpp
+48-35llvm/include/llvm/ADT/StringMap.h
+50-28llvm/lib/Support/StringMap.cpp
+7-10llvm/lib/Transforms/IPO/StripSymbols.cpp
+2-2llvm/docs/ProgrammersManual.rst
+2-1llvm/utils/gdb-scripts/prettyprinters.py
+109-1646 files

LLVM/project 9cc82cf.github/workflows test-suite.yml

[GitHub] Remove old permissions call from test-suite.yml (#203006)
DeltaFile
+0-6.github/workflows/test-suite.yml
+0-61 files