LLVM/project 06882cbllvm/lib/Analysis HashRecognize.cpp, llvm/test/Analysis/HashRecognize cyclic-redundancy-check.ll

[HashRecognize] Recognize trunc-to-i1 little-endian bit check (#213883)

InstCombine may rewrite `icmp ne (X & 1), 0` to `trunc X to i1`
(#178977). Accept that spelling in the CRC significant-bit matcher.

Fixes: #213881 
Assisted-by: AI
DeltaFile
+96-0llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
+22-16llvm/lib/Analysis/HashRecognize.cpp
+118-162 files

LLVM/project cd4a6f4lld/ELF SyntheticSections.h SyntheticSections.cpp, lld/test/ELF aarch64-reloc-pauth-undef-weak.s aarch64-reloc-pauth-undef-weak-pie.s

Address review comments
DeltaFile
+3-3lld/ELF/SyntheticSections.cpp
+3-3lld/ELF/Relocations.cpp
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+1-1lld/ELF/SyntheticSections.h
+13-136 files

LLVM/project 490641flldb/source/Plugins/Language/CPlusPlus MsvcStl.h CPlusPlusLanguage.cpp, lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/iterator TestDataFormatterStdIterator.py

[lldb] Add MSVC STL formatter for vector iterators (#217247)

`std::_Vector_iterator` and `std::_Vector_const_iterator` store the
element pointer in `_Ptr`. Reuse the existing vector-iterator frontend
(same pattern as libc++ / libstdc++).

Tests: generic iterator suite's MSVC STL category (Windows).

Part of #24834

Assisted-by: Grok 4.6
Assisted-by: codex-5.6-high

---------

Co-authored-by: Bjorn Schobben <bjorn.schobben at aimsport.com>
DeltaFile
+9-0lldb/source/Plugins/Language/CPlusPlus/MsvcStlVector.cpp
+5-0lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/iterator/TestDataFormatterStdIterator.py
+4-0lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
+3-0lldb/source/Plugins/Language/CPlusPlus/MsvcStl.h
+21-04 files

LLVM/project 15042belld/ELF Relocations.cpp, lld/test/ELF aarch64-reloc-pauth-undef-weak.s aarch64-reloc-pauth-undef-weak-pie.s

Address review comments
DeltaFile
+50-20lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+2-2lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+1-2lld/ELF/Relocations.cpp
+55-264 files

LLVM/project c04598alld/test/ELF aarch64-reloc-pauth-undef-weak.s aarch64-reloc-pauth-undef-weak-pie.s

`.tlsdescauthcall` -> `.tlsauthdesccall` (per documentation)
DeltaFile
+1-1lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+1-1lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+1-1lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+3-33 files

LLVM/project 1f428dcclang/lib/AST TextNodeDumper.cpp ASTContext.cpp, clang/lib/Sema TreeTransform.h SemaTemplate.cpp

[Clang] use TemplateName in AutoType / TypeConstraint to store a concept (#217637)

This is in preparation of implementing P3670 - ie we are going to have
pack indexing to model a concept, so a TemplateDecl* is not sufficient.
    
This is fairly mechanical.
There are still some places, especially in tooling & json dumping where
we reach to the underlying TemplateDecl - which will have to change
later.
But I think we need to have pack indexing first to update these places
(and I wanted to minimize change to tooling here).
    
The serialization of AutoType was changed to work around a weirdness
of TemplateName which makes serialization of an null TemplateName
impossible.

Assisted-by: Opus 5
DeltaFile
+21-19clang/lib/AST/ASTContext.cpp
+19-14clang/lib/Sema/SemaType.cpp
+22-6clang/lib/AST/TextNodeDumper.cpp
+14-11clang/lib/Sema/SemaConcept.cpp
+11-10clang/lib/Sema/SemaTemplate.cpp
+12-8clang/lib/Sema/TreeTransform.h
+99-6835 files not shown
+224-16741 files

LLVM/project a6dd7f0lld/ELF Relocations.cpp SyntheticSections.cpp, lld/ELF/Arch AArch64.cpp

[PAC][lld] Do not emit AUTH relocs against undef weak non-preemptible symbols

Undefined weak non-preemptible symbols should be statically resolved
and not signed.

See the corresponding relaxation described in docs:
https://github.com/ARM-software/abi-aa/blob/6e0d6611ac977628af7b2444ff841e76931a3557/design-documents/pauthabi-tls.rst

Previously, a dynamic relocation against such symbols was emitted,
which is not a correct behavior.

See also: https://github.com/ARM-software/abi-aa/pull/391

Depends on: #198327

Resolves #173296
DeltaFile
+79-9lld/ELF/Arch/AArch64.cpp
+48-0lld/test/ELF/aarch64-reloc-pauth-undef-weak.s
+48-0lld/test/ELF/aarch64-reloc-pauth-undef-weak-dso.s
+47-0lld/test/ELF/aarch64-reloc-pauth-undef-weak-pie.s
+15-5lld/ELF/SyntheticSections.cpp
+13-6lld/ELF/Relocations.cpp
+250-202 files not shown
+256-218 files

LLVM/project a3e3b87llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64AsmPrinter.cpp, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

`.tlsdescauthcall` -> `.tlsauthdesccall` (per documentation)
DeltaFile
+5-5llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
+5-5llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+3-3llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+2-2llvm/test/MC/AArch64/tls-auth-relocs.s
+2-2llvm/test/MC/AArch64/directives-case_insensitive.s
+2-2llvm/lib/Target/AArch64/AArch64InstrInfo.td
+19-191 files not shown
+20-207 files

LLVM/project a225173llvm/test/MC/AArch64 tls-auth-relocs.s

Address review comments
DeltaFile
+36-0llvm/test/MC/AArch64/tls-auth-relocs.s
+36-01 files

LLVM/project be9b417llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64AsmPrinter.cpp, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[PAC][ELF] Support R_AARCH64_AUTH_TLSDESC_CALL relocation

The R_AARCH64_AUTH_TLSDESC_CALL is introduced to allow linker relaxation of
AUTH TLSDESC call sequences for non-preemptible undefined weak symbols.

The lld patch introducing the relaxation: #194636

Corresponding ARM docs PR: https://github.com/ARM-software/abi-aa/pull/395
DeltaFile
+11-6llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+10-5llvm/test/CodeGen/AArch64/ptrauth-arm64-tls-dynamics.ll
+12-3llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+9-0llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
+8-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+3-0llvm/test/MC/AArch64/directives-case_insensitive.s
+53-146 files

LLVM/project 8eb3da8llvm/test/MC/AArch64 tls-auth-relocs.s

Address review comments
DeltaFile
+2-2llvm/test/MC/AArch64/tls-auth-relocs.s
+2-21 files

LLVM/project 6171018clang/docs ClangFormatStyleOptions.rst ClangFormatStyleOptions.md, clang/include/clang/Basic AttrDocs.td

Merge branch 'main' into users/kovdan01/lld-pauth-undef-weak
DeltaFile
+13,767-6,856llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+6,347-3,146llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+4,558-4,154clang/include/clang/Basic/AttrDocs.td
+8,235-0clang/docs/ClangFormatStyleOptions.md
+0-8,043clang/docs/ClangFormatStyleOptions.rst
+3,980-3,687llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+36,887-25,88611,899 files not shown
+631,253-346,96311,905 files

LLVM/project 3ab5550llvm/lib/Analysis Loads.cpp, llvm/test/Transforms/LoopVectorize single-early-exit-deref-assumptions.ll dereferenceable-info-from-assumption-constant-size.ll

[Loads] ZExt size from deref bundles to widest type. (#217770)

The size in a dereferenceable bundle may have a different bitwidth than
the access size. Both are interpreted as unsigned values. Zero-extend
them to the widest type, to avoid asserts on size mismatch.

Fixes https://github.com/llvm/llvm-project/issues/217547.

PR: https://github.com/llvm/llvm-project/pull/217770
DeltaFile
+281-0llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
+144-0llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
+9-2llvm/lib/Analysis/Loads.cpp
+434-23 files

LLVM/project 23ccb5elibc/shared/math truncf128.h, libc/src/__support/math truncf128.h

[libc] Modify `truncf128` to use emulated Float128 type (#216560)
DeltaFile
+18-0libc/test/src/math/truncf128_test.cpp
+16-0libc/test/src/math/CMakeLists.txt
+4-7libc/src/__support/math/truncf128.h
+0-6libc/shared/math/truncf128.h
+5-1libc/test/src/math/smoke/truncf128_test.cpp
+5-0libc/src/math/truncf128.h
+48-1421 files not shown
+77-2827 files

LLVM/project 9f57227clang-tools-extra/clang-tidy/portability PortabilityTidyModule.cpp AvoidPragmaCommentCheck.h, clang-tools-extra/docs ReleaseNotes.md

[clang-tidy] New portability-avoid-pragma-comment (#215239)

Finds uses of `#pragma comment` and, for `lib` or `linker` comments,
suggests using the build system for improved portability.

`#pragma comment` is not widely supported outside of MSVC. Clang
supports the use of `#pragma comment` to link libraries on both Windows
and Linux, but other kinds are only supported on Windows. Using `pragma
comment` to change link flags may be unexpected in projects that prefer
to set these flags in the build system.

Co-authored-by: Tom James <tom.james at siemens.com>
DeltaFile
+50-0clang-tools-extra/clang-tidy/portability/AvoidPragmaCommentCheck.cpp
+49-0clang-tools-extra/test/clang-tidy/checkers/portability/avoid-pragma-comment.cpp
+37-0clang-tools-extra/clang-tidy/portability/AvoidPragmaCommentCheck.h
+24-0clang-tools-extra/docs/clang-tidy/checks/portability/avoid-pragma-comment.md
+6-0clang-tools-extra/docs/ReleaseNotes.md
+3-0clang-tools-extra/clang-tidy/portability/PortabilityTidyModule.cpp
+169-02 files not shown
+171-08 files

LLVM/project b26a359llvm/lib/CodeGen PeepholeOptimizer.cpp, llvm/test/CodeGen/X86 peephole-compare-load-fold-ext.mir

[PeepholeOpt] Erase optimized compare from LocalMIs earlier (#217848)

We need to drop the compare instruction that was optimized away from
LocalMIs before the LocalMIs-based load folding optimization a few lines
below. Addresses a regression from #194662.

Fixes https://github.com/llvm/llvm-project/issues/208746.

---------

Co-authored-by: woruyu <1214539920 at qq.com>
DeltaFile
+40-0llvm/test/CodeGen/X86/peephole-compare-load-fold-ext.mir
+1-1llvm/lib/CodeGen/PeepholeOptimizer.cpp
+41-12 files

LLVM/project 3b3f77cllvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp

ARM: Use divmod type signatures from RuntimeLibcallsInfo

Start moving towards an API to emit calls from RuntimeLibcallsInfo's
knowledge about the type signature of a function instead of manually
computing an IR type from the EVT of the operation.

Also change the swap of arguments to be based on the libcall impl,
rather than the ABI since it's logically a property of the function
itself.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+85-27llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+38-41llvm/lib/Target/ARM/ARMISelLowering.cpp
+9-0llvm/include/llvm/CodeGen/TargetLowering.h
+132-683 files

LLVM/project 0fd0200llvm/lib/Target/AMDGPU SIInstructions.td

[AMDGPU] Make use of !ne. NFC. (#217855)
DeltaFile
+15-15llvm/lib/Target/AMDGPU/SIInstructions.td
+15-151 files

LLVM/project 5d9888fllvm/include/llvm/ADT GenericUniformityImpl.h

[UniformityAnalysis] Miscellaneous comment fixes (#217661)
DeltaFile
+5-4llvm/include/llvm/ADT/GenericUniformityImpl.h
+5-41 files

LLVM/project 8ae295dllvm/test/Transforms/IRCE unsigned_comparisons_ugt.ll unsigned_comparisons_ult.ll, llvm/test/Transforms/IndVarSimplify loop-predication.ll

[Analysis] Use usub_sat during SCEV expansion in some cases (#216975)

When expanding code in visitAddExpr we can look for the pattern

  -C + umax(X, C)

and transform this into

--> usub.sat(X, C)

which simplifies the IR in some tests.

Please see https://github.com/llvm/llvm-project/pull/118195 for the
original instcombine that this PR copies from. It contains the alive
link: https://alive2.llvm.org/ce/z/oSWe5S
DeltaFile
+76-4llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
+20-37llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll
+14-29llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll
+12-24llvm/test/Transforms/IndVarSimplify/ARM/code-size.ll
+8-17llvm/test/Transforms/LoopPredication/predicate-exits.ll
+6-12llvm/test/Transforms/IndVarSimplify/loop-predication.ll
+136-12314 files not shown
+179-16620 files

LLVM/project c660ef8llvm/lib/Target/AArch64/GISel AArch64InstructionSelector.cpp, llvm/test/CodeGen/AArch64/GlobalISel select-reduce-add.mir select-reduce-minmax.mir

[AArch64][GlobalISel] Select integer vector reductions into GPRs (#212976)

Prototyping a new minimal type-based approach to RegBankSelect (#199040)
for compile-time purposes exposed various gaps in instruction selection
when not using the existing RegBankSelect pass. These manifested as new
fallbacks when compiling CTMark and the IR dataset from [1].

Imported patterns require an FPR result. This patch teaches instruction
selection to handle vector reductions with GPR results by using a
temporary FPR and inserting a cross-bank copy.

Assisted-by: codex

[1] https://davemgreen.github.io/gisel.html
DeltaFile
+106-0llvm/test/CodeGen/AArch64/GlobalISel/select-reduce-minmax.mir
+86-0llvm/test/CodeGen/AArch64/GlobalISel/select-reduce-add.mir
+27-0llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+219-03 files

LLVM/project 3629a88clang/include/clang/AST ASTContext.h, clang/lib/AST RecordLayoutBuilder.cpp ExprConstant.cpp

[clang][AST] Add ASTContext::hasLayout() (#216541)

Whenever we add a new call to e.g. `ASTContext::getASTRecordLayout()`,
we inevitably cause a problem because that function has quite a few
prerequisites:

```c++
  D = D->getDefinition();
  assert(D && "Cannot get layout of forward declarations!");
  assert(!D->isInvalidDecl() && "Cannot get layout of invalid decl!");
  assert(D->isCompleteDefinition() && "Cannot layout type before complete!");
```

Add a function to check whether a record decl can be pased to
`getASTRecordLayout()` and update a few callers.
DeltaFile
+8-2clang/lib/AST/ByteCode/Pointer.cpp
+7-0clang/include/clang/AST/ASTContext.h
+2-2clang/lib/StaticAnalyzer/Core/MemRegion.cpp
+4-0clang/lib/AST/ExprConstant.cpp
+0-3clang/lib/AST/RecordLayoutBuilder.cpp
+3-0clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp
+24-71 files not shown
+25-87 files

LLVM/project ef1a70alld/ELF SyntheticSections.cpp SyntheticSections.h, lld/test/ELF ppc32-ifunc-nonpreemptible-pic.s ppc32-ifunc-nonpreemptible-nopic.s

[ELF] Emit synthetic local in symbol table for non-preemptible IFUNC (#210616)

Currently we create an internal alias of the original symbol and then
rewrite the latter to point to the IPLT entry, which means we lose
symbol table information for the actual resolver. In practice compilers
also emit a normal function symbol for the resolver due to how IFUNCs
are represented in GNU C so that at least shows up, but we shouldn't be
relying on it. By emitting a synthetic local we can keep having a symbol
for the resolver whilst still redirecting references to the IPLT entry.
DeltaFile
+18-0lld/test/ELF/gnu-ifunc-i386.s
+2-3lld/ELF/Relocations.cpp
+1-2lld/ELF/SyntheticSections.h
+1-1lld/test/ELF/ppc32-ifunc-nonpreemptible-pic.s
+1-1lld/test/ELF/ppc32-ifunc-nonpreemptible-nopic.s
+1-1lld/ELF/SyntheticSections.cpp
+24-86 files

LLVM/project db8ad40lld/ELF Symbols.h

[NFC][ELF] Remove Symbol's unused copy constructor (#210615)

Now that we are no longer copying symbols via the copy constructor we
can remove it. Given we track symbol pointers in various data structures
it can be dangerous to have multiple objects for the same symbol that
would risk being viewed inconsistently, or even moved and the original
lost, though no such cases exist upstream that I'm aware of.

Copying a symbol entirely is also a weird thing to do, and can be
inefficient, so when copies are being made it's best to be explicit
about the members to copy. This also makes it clearer to understand what
members are relevant, rather than implicitly copying all the members,
most of which aren't relevant in practice.

Whilst the copy/move constructors/assignment operators are currently
implicitly deleted due to the atomic flags member, explicitly delete
them all so they remain deleted in case that ever changes.
DeltaFile
+6-3lld/ELF/Symbols.h
+6-31 files

LLVM/project a6ec980lld/ELF Relocations.cpp

[NFC][ELF] Only create alias in handleNonPreemptibleIfunc if needed (#210613)

In the no direct relocations case, the original IFUNC symbol keeps its
value, and so there's no need to create a separate alias; it's only
needed when the original symbol is being redirected to the IPLT as a
normal function symbol.

This change also shifts the isInIplt assignment to be explicit and
mirror the allocateAux/pltIdx uses, rather than relying on makeDefined
copying it, and to be clear that this is in fact deliberately and
consistently being copied like them.

A future commit will also change the exact way in which we create this
alias, and will rely on it only existing for the direct relocations
case.
DeltaFile
+23-18lld/ELF/Relocations.cpp
+23-181 files

LLVM/project 9a9c9a5lld/ELF Relocations.cpp

[NFC][ELF] Create fresh alias in handleNonPreemptibleIfunc (#210614)

We don't need to copy the full symbol here, we just want an internal
alias to use for the IPLT and IGOTPLT entries and IRELATIVE relocation's
addend.
DeltaFile
+3-1lld/ELF/Relocations.cpp
+3-11 files

LLVM/project 36a5f08mlir/test/python pass_manager.py

[MLIR] Fix invalid escape sequences (#94036)

Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
DeltaFile
+1-1mlir/test/python/pass_manager.py
+1-11 files

LLVM/project 3db5350llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp LegalizeVectorOps.cpp, llvm/test/CodeGen/VE/Vector vp_urem.ll vp_srem.ll

[DAG] Expand vp.*rem and vp.cttz.elts with non-vp nodes.

Trivial VP SDNodes will be removed in an upcoming patch. The division is still predicated so we avoid UB.
DeltaFile
+24-12llvm/test/CodeGen/VE/Vector/vp_urem.ll
+24-12llvm/test/CodeGen/VE/Vector/vp_srem.ll
+5-5llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+3-5llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+56-344 files

LLVM/project 4ec5f0allvm/include/llvm/IR VPIntrinsics.def, llvm/lib/CodeGen/SelectionDAG MatchContext.h LegalizeVectorOps.cpp

[DAG] Remove trivial VP SDNodes. NFC

This removes the codegen parts of the trivial VP intrinsics. It's quite far reaching, but the general categories of code removed are:

- Removing definitions from VPIntrinsics.def
- Legalization and expansion code
- MatchContext used to match over both VP and non-VP nodes
- Some dead DAGCombines and folds in SelectionDAGBuilder

There are still more things to be cleaned up after this, e.g. removing more of the VPIntrinsic class hierarchy, removing ExpandVectorPredication/moving expansion into other places, removing MatchContext from SDPatternMatch
DeltaFile
+80-283llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+3-340llvm/include/llvm/IR/VPIntrinsics.def
+6-336llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+47-282llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+7-217llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+0-182llvm/lib/CodeGen/SelectionDAG/MatchContext.h
+143-1,64011 files not shown
+188-2,01417 files

LLVM/project 1396edcllvm/lib/Target/VE VVPNodes.def

[VE] Remove trivial VP SDNode mappings. NFC

These SDNodes aren't emitted anymore and will be removed in an upcoming patch.
DeltaFile
+9-9llvm/lib/Target/VE/VVPNodes.def
+9-91 files