LLVM/project f5e4be4llvm/include/llvm/CodeGen Passes.h, llvm/lib/CodeGen CFIInstrInserter.cpp

Add Legacy suffix go pass creation function.
DeltaFile
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+1-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+1-1llvm/lib/CodeGen/CFIInstrInserter.cpp
+1-1llvm/include/llvm/CodeGen/Passes.h
+4-44 files

LLVM/project bc78463offload/languages/kernel CMakeLists.txt, offload/languages/kernel/include Stream.h LanguageUtils.h

add event cleanup
DeltaFile
+85-0offload/languages/kernel/src/Stream.cpp
+39-21offload/languages/kernel/include/LanguageUtils.h
+14-12offload/languages/kernel/src/LanguageRuntime.cpp
+19-0offload/languages/kernel/include/Stream.h
+6-2offload/languages/kernel/src/State.cpp
+1-0offload/languages/kernel/CMakeLists.txt
+164-356 files

LLVM/project 658978allvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 cmp-with-same-operands.ll

[SLP]Fix unscheduled-deps assertion for cmp with identical operands

Same-operands cmps (icmp sge %x, %x) took the reordered dependency
counting path, which undercounts the second use while scheduling
releases one dep per operand column. Treat them as non-commutative so
each use is checked against its own edge.

Fixes #217408

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/217495
DeltaFile
+20-0llvm/test/Transforms/SLPVectorizer/X86/cmp-with-same-operands.ll
+4-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+24-22 files

LLVM/project 7ef5ee3flang-rt/lib/runtime assign.cpp, flang-rt/unittests/Runtime Assign.cpp

Reject CHARACTER types in AssignSimple and add death tests

AssignSimple is only intended for trivial intrinsic types (integer, real,
complex, logical). Add a guard that crashes on CHARACTER type input,
matching the existing derived-type guard.

Add death tests covering all five crash paths in AssignSimple: rank
mismatch, element-bytes mismatch, derived type, character type, and
non-allocatable element count mismatch.

Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
DeltaFile
+72-0flang-rt/unittests/Runtime/Assign.cpp
+3-0flang-rt/lib/runtime/assign.cpp
+75-02 files

LLVM/project 754283fllvm/include/llvm/CodeGen CFIInstrInserter.h, llvm/lib/CodeGen CFIInstrInserter.cpp

[NewPM] Port CFIInstrInserter to the new pass manager

Adds a newPM pass for CFIInstrInserter (cfi-instr-inserter).

- Extracts the pass's working state (MBBVector, CSRLocMap) and logic
  into a CFIInstrInserterImpl class with a run method, called by both
  the legacy pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass CFIInstrInserterPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either. run() unconditionally returns
  PreservedAnalyses::all(), matching the legacy pass's own
  AU.setPreservesAll() declaration -- the same shape CFIFixupPass (an
  already-ported sibling CFI pass) already uses.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Wires the pass into X86's and RISC-V's newPM pipelines, matching
  their existing legacy-PM gating conditions:
  - X86 replaces an existing TODO inside an already-correct

    [13 lines not shown]
DeltaFile
+48-30llvm/lib/CodeGen/CFIInstrInserter.cpp
+25-0llvm/include/llvm/CodeGen/CFIInstrInserter.h
+7-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
+2-0llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+88-3513 files not shown
+108-3819 files

LLVM/project 9afd75fllvm/include/llvm/CodeGen FuncletLayout.h, llvm/lib/CodeGen FuncletLayout.cpp

[NewPM] Port FuncletLayout to the new pass manager (#217490)

Adds a newPM pass for FuncletLayout (funclet-layout).

- Extracts the pass's logic (which has no per-instance state) into a
shared runFuncletLayout free function, called by both the legacy pass
and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass FuncletLayoutPass, using
RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
calls skipFunction, so it always runs unconditionally and should not be
skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder
-- FuncletLayoutPass was already unconditionally invoked from
CodeGenPassBuilder.h via a DUMMY_MACHINE_FUNCTION_PASS stub, so no
separate enablement change was needed.
- Fixes four pipeline-dump tests (X86, RISC-V x2, Lanai) whose CHECK
lines expected the stub's class-name fallback ("FuncletLayoutPass")
rather than the real pass's registered pipeline name ("funclet-layout").

    [4 lines not shown]
DeltaFile
+31-19llvm/lib/CodeGen/FuncletLayout.cpp
+28-0llvm/include/llvm/CodeGen/FuncletLayout.h
+4-4llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+1-1llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
+1-1llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
+1-1llvm/test/CodeGen/Lanai/llc-pipeline-npm.ll
+66-266 files not shown
+72-2912 files

LLVM/project 8548eaellvm/include/llvm/CodeGen CFIInstrInserter.h, llvm/lib/CodeGen CFIInstrInserter.cpp

[NewPM] Port CFIInstrInserter to the new pass manager

Adds a newPM pass for CFIInstrInserter (cfi-instr-inserter).

- Extracts the pass's working state (MBBVector, CSRLocMap) and logic
  into a CFIInstrInserterImpl class with a run method, called by both
  the legacy pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass CFIInstrInserterPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either. run() unconditionally returns
  PreservedAnalyses::all(), matching the legacy pass's own
  AU.setPreservesAll() declaration -- the same shape CFIFixupPass (an
  already-ported sibling CFI pass) already uses.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Wires the pass into X86's and RISC-V's newPM pipelines, matching
  their existing legacy-PM gating conditions:
  - X86 replaces an existing TODO inside an already-correct

    [13 lines not shown]
DeltaFile
+48-30llvm/lib/CodeGen/CFIInstrInserter.cpp
+25-0llvm/include/llvm/CodeGen/CFIInstrInserter.h
+7-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
+2-0llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+88-3513 files not shown
+108-3819 files

LLVM/project d207b59llvm/include/llvm/CodeGen FuncletLayout.h, llvm/lib/CodeGen FuncletLayout.cpp

[NewPM] Port FuncletLayout to the new pass manager

Adds a newPM pass for FuncletLayout (funclet-layout).

- Extracts the pass's logic (which has no per-instance state) into a
  shared runFuncletLayout free function, called by both the legacy
  pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass FuncletLayoutPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder
  -- FuncletLayoutPass was already unconditionally invoked from
  CodeGenPassBuilder.h via a DUMMY_MACHINE_FUNCTION_PASS stub, so no
  separate enablement change was needed.
- Fixes four pipeline-dump tests (X86, RISC-V x2, Lanai) whose CHECK
  lines expected the stub's class-name fallback ("FuncletLayoutPass")
  rather than the real pass's registered pipeline name

    [6 lines not shown]
DeltaFile
+31-19llvm/lib/CodeGen/FuncletLayout.cpp
+28-0llvm/include/llvm/CodeGen/FuncletLayout.h
+4-4llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+1-1llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
+1-1llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
+1-1llvm/test/CodeGen/Lanai/llc-pipeline-npm.ll
+66-266 files not shown
+72-2912 files

LLVM/project 4ef5f0bclang/lib/CodeGen CGBuiltin.cpp

s/CAT/CountAttributedTy/
DeltaFile
+5-4clang/lib/CodeGen/CGBuiltin.cpp
+5-41 files

LLVM/project ef645f2llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen FuncletLayout.h

[NewPM] Port FuncletLayout to the new pass manager

Adds a newPM pass for FuncletLayout (funclet-layout).

- Extracts the pass's logic (which has no per-instance state) into a
  shared runFuncletLayout free function, called by both the legacy
  pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass FuncletLayoutPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder
  -- FuncletLayoutPass was already unconditionally invoked from
  CodeGenPassBuilder.h via a DUMMY_MACHINE_FUNCTION_PASS stub, so no
  separate enablement change was needed.
- Fixes four pipeline-dump tests (X86, RISC-V x2, Lanai) whose CHECK
  lines expected the stub's class-name fallback ("FuncletLayoutPass")
  rather than the real pass's registered pipeline name

    [6 lines not shown]
DeltaFile
+31-19llvm/lib/CodeGen/FuncletLayout.cpp
+28-0llvm/include/llvm/CodeGen/FuncletLayout.h
+4-4llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+1-1llvm/lib/CodeGen/CodeGen.cpp
+1-1llvm/include/llvm/Passes/MachinePassRegistry.def
+1-1llvm/include/llvm/InitializePasses.h
+66-266 files not shown
+72-2912 files

LLVM/project d28bc6bllvm/test/CodeGen/AMDGPU llvm.is.fpclass.f16.ll freeze.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fshr.ll fshl.ll

[AMDGPU] Remove more redundant ANDs (#216900)

Remove more redundant AND X, IMM instructions by allowing:

1.  s_and_b32 operations to be processed.
2. IMM can have values beside 0xffff.
3. The instruction defining X can be another AND instruction.
4. IMM can be either source operand.

---------

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+2,569-0llvm/test/CodeGen/AMDGPU/redundant-and.mir
+0-2,191llvm/test/CodeGen/AMDGPU/high-bits-zeroed-16-bit-ops.mir
+209-275llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+191-257llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+67-145llvm/test/CodeGen/AMDGPU/freeze.ll
+56-121llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
+3,092-2,98918 files not shown
+3,237-3,17924 files

LLVM/project e27e417llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-freeze.mir regbankselect-fexp2.mir

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
+22-22358 files not shown
+452-452364 files

LLVM/project 6a719c0llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-amdgcn.ptr.s.buffer.load.ll regbankselect-mui-salu-float.mir

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+17-17llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ptr.s.buffer.load.ll
+36-36375 files not shown
+495-495381 files

LLVM/project 4af508dllvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-freeze.mir regbankselect-fexp2.mir

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mui-salu-float.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-freeze.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
+22-22358 files not shown
+452-452364 files

LLVM/project 18f48d7llvm/test/CodeGen/AArch64/GlobalISel arm64-regbankselect.mir, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-whole-wave-functions.mir regbankselect-mad_64_32.mir

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
+2-2llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+20-20198 files not shown
+266-266204 files

LLVM/project 5b1a52dllvm/test/CodeGen/AArch64/GlobalISel arm64-regbankselect.mir, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-whole-wave-functions.mir regbankselect-mad_64_32.mir

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-copy.mir
+4-4llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.else.32.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-whole-wave-functions.mir
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mad_64_32.mir
+2-2llvm/test/CodeGen/AArch64/GlobalISel/arm64-regbankselect.mir
+20-20198 files not shown
+266-266204 files

LLVM/project 25a7ebbllvm/unittests/ADT FoldingSet.cpp

[ADT] Improve unit test coverage for FoldingSet (#217214)

This patch adds unit tests covering the following previously uncovered
areas of FoldingSet, FoldingSetVector, and ContextualFoldingSet:

- Move semantics (move constructor and move assignment operator of
  FoldingSet).

- Iterators (begin()/end(), exact element traversal, and pre/post
  increment operators).

- FoldingSetVector (basic operations including deduplication, lookup
with
  an insertion token, deterministic iteration order, and clear()).

- ContextualFoldingSet (similar basic operations with contextual node
  profiling).

Assisted-by: Antigravity
DeltaFile
+163-0llvm/unittests/ADT/FoldingSet.cpp
+163-01 files

LLVM/project b234afblldb/include/lldb/DataFormatters TypeFormat.h, lldb/source/API SBTypeFormat.cpp

[lldb] Remove ConstString from TypeFormatImpl_EnumType (#215431)

These type names don't need to be in the ConstString pool. If they ever
need to be deduplicated in the future, we can evaluate different
approaches.
DeltaFile
+6-6lldb/source/API/SBTypeFormat.cpp
+6-4lldb/include/lldb/DataFormatters/TypeFormat.h
+5-4lldb/source/DataFormatters/TypeFormat.cpp
+1-1lldb/source/Commands/CommandObjectType.cpp
+18-154 files

LLVM/project 02f4f7cllvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize div-exact.ll uniform-blend.ll

[VPlan][Predicator] Preserve some uniform control flow

Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack. Does **NOT** improve predication/masking yet, so
applicability is artificially narrowed, only some uniform branches are
preserved. In particular, the following is left for future PRs:

* Block masks still contains now-unnecessary term for the preserved
  uniform branches.
* Mixed blends/phis aren't supported yet. Detecting where they would be
  necessary is as complex as implementing proper support (which would
  need either Luke's `reconstructSSA` or Iterated Dominance Frontier),
  so we also limit it to a trivial/structured CFG where there's only
  single block where those would need to be inserted.

I think even the current version might be enough to start implementing
an alternative to https://github.com/llvm/llvm-project/pull/141900 (see
BOSCC in the paper).
DeltaFile
+81-45llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+102-3llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+45-38llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+32-8llvm/test/Transforms/LoopVectorize/uniform-blend.ll
+18-10llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
+14-6llvm/test/Transforms/LoopVectorize/div-exact.ll
+292-11015 files not shown
+393-13421 files

LLVM/project 4d8c4b1mlir/lib/Dialect/OpenACC/Transforms ACCSpecializeForHost.cpp, mlir/test/Dialect/OpenACC acc-if-clause-lowering.mlir

[MLIR][OpenACC] Defer lowering atomic capture children (#217475)
DeltaFile
+24-2mlir/test/Dialect/OpenACC/acc-if-clause-lowering.mlir
+13-9mlir/lib/Dialect/OpenACC/Transforms/ACCSpecializeForHost.cpp
+37-112 files

LLVM/project b7cb353llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize div-exact.ll uniform-blend.ll

[VPlan][Predicator] Preserve some uniform control flow

Implements "Partial Control-Flow Linearization" by Simon Moll and
Sebastian Hack. Does **NOT** improve predication/masking yet, so
applicability is artificially narrowed, only some uniform branches are
preserved. In particular, the following is left for future PRs:

* Block masks still contains now-unnecessary term for the preserved
  uniform branches.
* Mixed blends/phis aren't supported yet. Detecting where they would be
  necessary is as complex as implementing proper support (which would
  need either Luke's `reconstructSSA` or Iterated Dominance Frontier),
  so we also limit it to a trivial/structured CFG where there's only
  single block where those would need to be inserted.

I think even the current version might be enough to start implementing
an alternative to https://github.com/llvm/llvm-project/pull/141900 (see
BOSCC in the paper).
DeltaFile
+81-45llvm/test/Transforms/LoopVectorize/if-pred-stores.ll
+107-3llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+45-38llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+32-8llvm/test/Transforms/LoopVectorize/uniform-blend.ll
+18-10llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-multi-block.ll
+14-6llvm/test/Transforms/LoopVectorize/div-exact.ll
+297-11015 files not shown
+398-13421 files

LLVM/project f660015llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize predicator.ll

Implement non-uniform part of partial linearization algorithm
DeltaFile
+92-92llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+106-19llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+4-4llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
+3-3llvm/test/Transforms/LoopVectorize/predicator.ll
+205-1184 files

LLVM/project 195427ellvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Add `*_no_phi` versions
DeltaFile
+623-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+623-01 files

LLVM/project 7b6a307llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Predicator tests for uniform control flow preservation
DeltaFile
+168-0llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+168-01 files

LLVM/project 0a05c2dllvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Create actual test functions (AI-assisted)
DeltaFile
+478-25llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+478-251 files

LLVM/project 2f23ae6llvm/test/Transforms/LoopVectorize/VPlan predicator.ll

Generate CHECKs
DeltaFile
+1,101-1llvm/test/Transforms/LoopVectorize/VPlan/predicator.ll
+1,101-11 files

LLVM/project 3fc15bcllvm/lib/Transforms/Vectorize VPlanPredicator.cpp

[NFC][VPlan] Move `introduceMasksAndLinearize` into a `VPPredicator`'s method

To reduce diff in the next PR.

AI-assisted.
DeltaFile
+21-13llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+21-131 files

LLVM/project e740ed6flang/include/flang/Optimizer/Builder/Runtime Assign.h, flang/lib/Optimizer/Builder/Runtime Assign.cpp

[flang] - Call _FortranAAssignSimple instead of _FortranAAssign for intrinsic-type array assignments.

This patch adds support for calling _FortranAAssignSimple, a faster-path for array assignments.
`_FortranAAssignSimple` is called when ALL the following conditions are true:
1. Intrinsic element type (not derived type)
2. Matching ranks (no scalar-to-array broadcasting)
3. Non-volatile
4. Not polymorphic
5. Not explicit-length character
6. Not temporary LHS

Otherwise, uses `_FortranAAssign` (or specialized variants like `_FortranAAssignPolymorphic`, `_FortranAAssignExplicitLengthCharacter`).

This is a (perhaps final) part of the fix for https://github.com/llvm/llvm-project/issues/203915
DeltaFile
+287-0flang/test/HLFIR/assign-simple-routing.fir
+46-4flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
+19-13flang/lib/Optimizer/OpenMP/LowerWorkdistribute.cpp
+13-0flang/lib/Optimizer/Builder/Runtime/Assign.cpp
+12-0flang/include/flang/Optimizer/Builder/Runtime/Assign.h
+2-2flang/test/HLFIR/assign-codegen.fir
+379-192 files not shown
+381-218 files

LLVM/project 0db61dbflang-rt/unittests/Runtime Assign.cpp

fix clang-format issues
DeltaFile
+4-2flang-rt/unittests/Runtime/Assign.cpp
+4-21 files

LLVM/project 92242c0flang/test/Fir convert-to-llvm-openmp-and-fir.fir, flang/test/Lower/OpenMP target.f90 declare-mapper.f90

[MLIR][OpenMP] Enable strict property assembly format (#217297)

Enable strict property assembly format mode for OpenMP. Spell OpenMP
assembly-only properties directly in directive and clause formats
instead of relying on generic property dictionaries.

Refresh OpenMP dialect, conversion, and LLVM target tests to use the
direct syntax for these properties.

Assisted-by: Codex
DeltaFile
+144-144mlir/test/Dialect/OpenMP/ops.mlir
+75-75flang/test/Transforms/omp-map-info-finalization.fir
+60-60flang/test/Lower/OpenMP/declare-mapper.f90
+61-55mlir/test/Dialect/OpenMP/invalid.mlir
+53-53flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
+43-43flang/test/Lower/OpenMP/target.f90
+436-430230 files not shown
+1,454-1,449236 files