[RISCV] Fix crashes and add RV32 RUN line to rvp-simd-64.ll (#194782)
Prevent combinePExtTruncate from forming RISCVISD nodes with illegal
type. Remove unnecessary call to getSimpleVT().
Legalize shift amount when custom legalizing i64 shifts.
SelectionDAGBuilder usually pre-legalizes shift amounts. If we scalarize
a vXi64 vector shift the shift amount will be i64.
[AMDGPU] Propagate debug info to constant materialization instr (#192669)
Set the debug location on non-target constant nodes so that the
resulting machine instructions inherit the correct source location.
[LoopVectorize] Add metadata to distinguish vectorized loop body from scalar remainder (#190258)
Add two new loop metadata attributes — `llvm.loop.vectorize.body` and
`llvm.loop.vectorize.epilogue` — that the loop vectorizer sets on the
generated vector loop and epilogue loop respectively. The metadata is
only emitted when optimization remarks are enabled (`ORE->enabled()`),
so it has zero cost in normal compilation.
These enable downstream passes (LoopUnroll, WarnMissedTransforms) to
produce more precise optimization remarks. Instead of the generic "loop
not unrolled" warning on a source line that was vectorized, the unroller
can now report:
- **"vectorized loop"** for the main vector body
- **"epilogue loop"** for the scalar epilogue/remainder
- **"epilogue vectorized loop"** for an epilogue that was itself
vectorized during epilogue vectorization (carries both attributes)
A shared `getLoopVectorizeKindPrefix()` helper in
`LoopUtils.h`/`LoopUtils.cpp` reads the metadata and returns the
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[RISCV] Use BufferSize = 0 for ProcResGroup in SiFive7 scheduling models (#194754)
As it turns out, even if a `ProcResGroup` consists of in-order pipes, as
long as its (the group's) BufferSize is not zero, Machine Scheduler will
not use in-order scheduling on instructions that consume it. Since
BufferSize also defaults to -1 for `ProcResGroup`, we have been
scheduling the resource consumption of SiFive7's `PipeAB` (scalar pipes)
and `VA1OrVA2` (vector pipes) in an out-of-order fashion!
Co-authored-by: Min Hsu <min.hsu at sifive.com>
[SLP][NFC] Reduce compile time of isTreeTinyAndNotFullyVectorizable
Cache root entry and SLPCostThreshold queries once, group
!ForReduction-only checks under two blocks, extract a shared benign-node
predicate from the two duplicated lambdas, and skip HasSingleLoad and
allConstant work when results are dead.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/194895
[CIR][AArch64] Lower NEON vzip intrinsics (#193658)
### Summary
part of https://github.com/llvm/llvm-project/issues/185382
lower part of intrinsics in :
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#zip-elements
Lower NEON::BI__builtin_neon_vzip_v and NEON::BI__builtin_neon_vzipq_v
in CIRGenBuiltinAArch64.cpp by porting the existing incubator logic
(`clangir/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp`) onto ClangIR:
two bitcasts on the input vectors, two rounds of cir.vec.shuffle
generating the low/high interleave patterns, each stored through a
ptr_stride of the sret base pointer.
### Test
- test_vzip_mf8
- test_vzipq_mf8
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[libcxx][lit] Fixing libcxx test failures on Windows (#194752)
PR#194368 changed how line breaks are handles on Windows and it broke
several libcxx tests on Windows, including
libcxx/test/std/localization/locale.categories/facet.numpunct/
locale.numpunct.byname/thousands_sep.pass.cpp
This patch addresses this issue.
[X86] Add custom ISD::VEC_REDUCE_*MIN/MAX lowering (#194848)
Pulled out of #194473 - update combineMinMaxReduction to fold to a
ISD::VECREDUCE_SMAX/SMIN/UMAX/UMIN node and then perform the lowering
later on.
combineMinMaxReduction will go away once we can use
shouldExpandReduction, rely on the middle-end to recognise reductions
and not have to recreate them from the expanded patterns.
I've added pre-SSE41 handling using vector unrolling - hopefully this
will go away once #194672 is in place.
[TableGen] Use guarded assert in constexpr functions (#194728)
The constexpr functions in question take a scoped enum as an argument
and a switch statement returns a value for each value of the enum. These
are all legal statements in a constexpr function in C++14.
Under constexpr rules, the evaluation of a constexpr function cannot
lead to an evaluation of any prohibited forms of expressions. An
evaluation of the functions being discussed with a valid argument will
terminate at the switch, and an code that follows will not be evaluated.
Using "llvm_unreachable" after the switch should be ok as long as the
expansion of the llvm_unreachable macro does not contain any statements
not allowed to appear in a constexpr function. At the same time, GCC
before v9 did not tolerate any unguarded calls to non-constexpr
functions after the switch.
To avoid using "llvm_unreachable", which can have multiple expansions,
use an assert with an explicit condition that the underlying value of
the argument lies between the minimum and maximum values of the enum.
[CodeGen] Use getFnAttributeAsParsedInteger for patchable-function attributes (#194726)
Replace `getAsInteger()` parsing of the `patchable-function-entry`
and `patchable-function-prefix` function attributes with the existing
`Function::getFnAttributeAsParsedInteger()` helper across AsmPrinter
and all backend targets.
The IR verifier already validates these attributes as unsigned base-10
integers via `checkUnsignedBaseTenFuncAttr`, so parse failure at point
of use indicates a verifier bypass or IR corruption.
`getFnAttributeAsParsedInteger()` returns a default of 0 on failure
(matching the implicit behavior of the old code) and emits a diagnostic
rather than silently continuing.
[X86] Add constant comments for VGF2P8AFFINEQB rmbi forms (#194789)
Handle AVX-512 VGF2P8AFFINEQB rmbi instructions in X86MCInstLower.
Unlike the existing rmi forms, rmbi uses a 64-bit broadcast memory
operand, so the constant pool entry may only contain the broadcast
source instead of a full-width vector constant. Print that constant
repeated across the destination vector width when forming the asm
comment.
Related: https://github.com/llvm/llvm-project/pull/194572
[lldb] Override UpdateBreakpointSites in ProcessGDBRemote to use MultiBreakpoint
This concludes the implementation of MultiBreakpoint by actually using
the new packet to batch breakpoint requests.
https://github.com/llvm/llvm-project/pull/192910
[Flang][Semantics] Fix crash on invalid function result declaration (#194648)
Fixes https://github.com/llvm/llvm-project/issues/194596.
When the function result symbol is encountered while the compiler is
already completing the function result type, flang could recursively
re-enter _CompleteFunctionResultType()_ and crash on invalid code.
Instead of crashing on conflicting declarations, flang now reports an
“already declared” error and stops further recursion.
Search for @_thisIsNotAPipe vs _thisIsNotAPipe (#192132)
z/OS has a table of mapped names in the IR. Counting the hits for just
the name leads to one more hit than expected. Search for the name with
the @ char to make sure the right occurrences are being counted.
[clang-tidy][readability-identifier-length] refactoring and cleanup (#194610)
This PR implements the refactorings discussed with @localspook in
#193838
---------
Co-authored-by: Victor Chernyakin <chernyakin.victor.j at outlook.com>
[AArch64][llvm] Generate asm parser extension map from TableGen (NFC)
Modify ARMTargetDefEmitter to emit the assembly parser `ExtensionMap[]`
and replace the hand-written table in AArch64AsmParser.cpp with the
generated one.
Keep the assembly parser-only quirks in the emitter: the directive
denylist, the legacy primary spellings for `mte` and `compnum`, and the
extra bits needed for the `sve2-*` shorthand extensions.
This removes the duplicate manual table while preserving existing
directive parsing and required-feature diagnostics.
[Docs] Normalize headers and indents for ReleaseNotes (#194784)
- Normalize the header syntax for ReleaseNotes (current `.md` file and
`ReleaseNotesTemplate.txt`) to use `#`-based headings
- Normalize indents to distinguish doc title from page headers
Fixes navigation indents for Furo theme update (see
https://github.com/llvm/llvm-project/pull/184440).
