LLVM/project e426a42 — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPMemoryUtils.h SLPCostAnalysis.cpp

[SLP] Use costing to decide between Strided Loads and Compressed Loads (#226540)

For small vectors will small strides, the vectorized load can be
represented as either a stride or a masked compress. Rather than
preferentially choose compression, decide based on the relative costs.
DeltaFile
+121-29llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
+85-55llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+26-51llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
+5-67llvm/test/Transforms/SLPVectorizer/RISCV/reductions.ll
+64-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
+10-27llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.h
+311-2294 files not shown
+357-24210 files

LLVM/project 1328360 — clang/lib/CodeGen CodeGenFunction.h CodeGenFunction.cpp, clang/test/CodeGen attr-counted-by-base-exprs.c attr-counted-by-debug-info.c

[Clang][counted_by] Capture the field l-value instead of re-emitting the load

To share the pointer field's address with the -fsanitize=array-bounds
check, EmitArraySubscriptExpr emitted the field load itself instead of
going through EmitPointerWithAlignment and ScalarExprEmitter. That
duplicated the scalar member-load path by hand, and the copy missed
several things that path does: the 'align_value' assumption (fixed in
the previous commit), the member's debug location, and the
-fdebug-info-for-profiling pseudo variable for the struct base. So
enabling the sanitizer changed debug info and sample-profile
attribution, even for fields where no bounds check was emitted at all.

Instead, emit the base exactly as before, and have
ScalarExprEmitter::EmitLoadOfLValue record the l-value it loads from
when it matches an expression registered in the new
CodeGenFunction::CurLoadedLValueCapture. The bounds check then uses the
recorded field address. Since the base is emitted the same way with and
without the sanitizer, the load keeps everything the scalar path does.
This also covers a cast between the field load and the subscript (e.g.

    [7 lines not shown]
DeltaFile
+57-0clang/test/CodeGen/attr-counted-by-debug-info.c
+19-26clang/lib/CodeGen/CGExpr.cpp
+41-4clang/lib/CodeGen/CGExprScalar.cpp
+0-35clang/lib/CodeGen/CodeGenFunction.cpp
+16-6clang/lib/CodeGen/CodeGenFunction.h
+15-6clang/test/CodeGen/attr-counted-by-base-exprs.c
+148-771 files not shown
+150-797 files

LLVM/project 3327ad1 — clang/lib/CodeGen CGExpr.cpp, clang/test/CodeGen attr-counted-by-or-null-for-pointers.c attr-sized-by-or-null-for-pointers.c

[Clang][counted_by] Don't re-evaluate the base of a counted_by pointer access for -fsanitize=array-bounds

When indexing a 'counted_by' pointer field with -fsanitize=array-bounds,
EmitCountedByBoundsChecking was handed an invalid address and re-emitted
the field's l-value to locate the count. That re-evaluated the struct
base, duplicating its side-effects:

  struct p { int count; int *buf __counted_by(count); };
  struct p *q;
  int f(int i) { return q++->buf[i]; }   // 'q' incremented twice
  int g(int i) { return get()->buf[i]; } // 'get' called twice

i.e. enabling the sanitizer changed the program's behavior.

When the subscript base is exactly the field load, emit the field's
l-value once, load the pointer from it (as the default case of
EmitPointerWithAlignment does, through EmitLoadOfLValue so that a
'__ptrauth'-qualified field is still authenticated), and pass the
field's address to the bounds check. When there's an intervening cast (e.g.

    [6 lines not shown]
DeltaFile
+136-26clang/test/CodeGen/attr-counted-by-base-exprs.c
+50-13clang/lib/CodeGen/CGExpr.cpp
+12-12clang/test/CodeGen/attr-sized-by-or-null-for-pointers.c
+12-12clang/test/CodeGen/attr-sized-by-for-pointers.c
+24-0clang/test/CodeGen/attr-counted-by-ptrauth.c
+6-6clang/test/CodeGen/attr-counted-by-or-null-for-pointers.c
+240-691 files not shown
+246-757 files

LLVM/project 71f9a30 — clang/lib/CodeGen CodeGenFunction.h CGExpr.cpp, clang/test/CodeGen attr-counted-by-align-value.c

[Clang][counted_by] Keep the align_value assumption on the bounds-checked load

With -fsanitize=array-bounds, a subscript of a 'counted_by' pointer field
loads the pointer directly from the field's l-value, so that the bounds
check can reuse the field's address instead of re-evaluating the base.
That load bypassed ScalarExprEmitter, which is where the 'align_value'
assumption for a loaded l-value is emitted. Enabling array-bounds
therefore silently dropped the llvm.assume alignment bundle and, with
-fsanitize=alignment, the alignment-assumption check as well.

Move EmitLValueAlignmentAssumption from ScalarExprEmitter into
CodeGenFunction, so that the direct-load path can share it, and call it
on the loaded pointer.

Assisted-by: Claude Opus 5.5
DeltaFile
+2-36clang/lib/CodeGen/CGExprScalar.cpp
+35-0clang/lib/CodeGen/CodeGenFunction.cpp
+27-0clang/test/CodeGen/attr-counted-by-align-value.c
+8-3clang/lib/CodeGen/CGExpr.cpp
+6-0clang/lib/CodeGen/CodeGenFunction.h
+78-395 files

LLVM/project 4dcc914 — clang/test/OpenMP threadprivate_codegen.cpp, lldb/source/Plugins/Process/Utility lldb-riscv-register-enums.h

Rebase, address comments

Created using spr 1.3.7
DeltaFile
+4,842-5,011llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+0-4,730lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h
+4,730-0lldb/source/Register/Arch/lldb-riscv-register-enums.h
+4,185-0llvm/test/Transforms/LoopVectorize/WebAssembly/dequantize.ll
+1,097-1,121clang/test/OpenMP/threadprivate_codegen.cpp
+745-1,222llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
+15,599-12,0841,737 files not shown
+87,903-47,6471,743 files

LLVM/project 3e63179 — llvm/include/llvm/CodeGen CodeGenCommonISel.h, llvm/lib/CodeGen CodeGenCommonISel.cpp

refactor(codegen): Move shift helpers out of line

Define the shared shift helpers in CodeGenCommonISel.cpp under llvm::detail. Use function_ref callbacks to preserve lazy KnownBits computation, and retain LLVM_ABI for callers in other CodeGen component libraries.
DeltaFile
+18-51llvm/include/llvm/CodeGen/CodeGenCommonISel.h
+57-0llvm/lib/CodeGen/CodeGenCommonISel.cpp
+4-3llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+3-3llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+82-574 files

LLVM/project f337c83 — llvm/lib/Transforms/Scalar StructurizeCFG.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline.ll

[StructurizeCFG] Convert legacy pass from RegionPass to FunctionPass (#233940)

Convert StructurizeCFGLegacyPass from a RegionPass to a FunctionPass,
just like the NewPM version.

Possible follow-ups:
- Stop using metadata to propagate information from inner to outer
  regions.
- Remove RegionPass and RGPassManager from LLVM.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+38-38llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
+5-10llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+43-482 files

LLVM/project b0e2423 — llvm/test/Instrumentation/MemorySanitizer msan_basic.ll

[test][msan] Regenerate test without changes (#233711)

To avoid mixing with functional changes.
DeltaFile
+70-70llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
+70-701 files

LLVM/project 7be7bc4 — libc/shared/math/static_rounding exp2f.h, libc/src/__support/math exp2f_integer_eval.h

[libc][math] Add integer-only implementation for exp2f. (#233177)

- Correctly rounded to all rounding mode (statically).
- Share core computations with expf integer-only static-rounding version
- Optimize for code size.
- Based on top of https://github.com/llvm/llvm-project/pull/233118

Assisted-by: Gemini for analysis and refactoring.
DeltaFile
+131-0libc/src/__support/math/exp2f_integer_eval.h
+44-17libc/test/src/math/exp2f_test.cpp
+39-13libc/test/src/math/smoke/exp2f_test.cpp
+32-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+30-0libc/shared/math/static_rounding/exp2f.h
+28-0libc/test/shared/shared_math_test.cpp
+304-319 files not shown
+358-3315 files

LLVM/project b843442 — libc/src/__support frac64.h big_int.h, libc/src/__support/math CMakeLists.txt exp2f_integer_utils.h

[libc][math] Optimize integer-only expf and factor out shared utilities. (#233118)

- Optimize `expf_integer_eval` for both code size and performance.
- Factor out the shared range reduction and `2^u` fixed point evaluation
to be used by `exp2f` and `exp10f` integer-only versions.

Assisted-by: Gemini for analysis and refactoring.
DeltaFile
+60-236libc/src/__support/math/expf_integer_eval.h
+182-0libc/src/__support/math/exp2f_integer_utils.h
+48-10libc/src/__support/big_int.h
+36-0libc/test/shared/shared_math_test.cpp
+16-12libc/src/__support/frac64.h
+21-2libc/src/__support/math/CMakeLists.txt
+363-26010 files not shown
+412-27516 files

LLVM/project 81e400a — clang/lib/CodeGen CGCUDANV.cpp, clang/test/CodeGenHIP hip-rdc-profile-ctors.hip

[HIP] Fix dynamic initialization with RDC and host profiling (#233655)

HIP compilation with `-fgpu-rdc` and `-fprofile-instr-generate` fails
when a global variable needs initialization before main(). Profiling
and C++ initialization create separate startup lists, but only one
list is allowed.

Collect profiling registration and C++ initialization in the same
startup list so both run before main().
DeltaFile
+14-0clang/test/CodeGenHIP/hip-rdc-profile-ctors.hip
+1-2clang/lib/CodeGen/CGCUDANV.cpp
+15-22 files

LLVM/project af491a3 — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+205-24llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+712-1,7676 files not shown
+773-1,79312 files

LLVM/project e3c580c — llvm/lib/Target/NVPTX NVPTXISelLowering.h NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX atomicrmw-widen-fp16.ll

[NVPTX] Prototype widening scalar fp16 atomics to elementwise operations
DeltaFile
+474-0llvm/test/Transforms/AtomicExpand/NVPTX/widen-fp16-atomics.ll
+455-0llvm/test/CodeGen/NVPTX/atomicrmw-widen-fp16.ll
+109-0llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+2-0llvm/lib/Target/NVPTX/NVPTXISelLowering.h
+1,040-04 files

LLVM/project 043660e — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Defer single-lane elementwise atomics to type legalization
DeltaFile
+2,376-2,410llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+2,252-2,190llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm60.ll
+882-958llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+162-0llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-vector.ll
+51-38llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+38-45llvm/lib/CodeGen/AtomicExpandPass.cpp
+5,761-5,6413 files not shown
+5,830-5,6809 files

LLVM/project 045b277 — llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer VecUtils.h, llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes LoadStoreVec.h

[SandboxVec][LoadStoreVec] Support constant vectors of mixed types
DeltaFile
+414-4llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/load_store_vec_mixed_types.ll
+109-11llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
+58-13llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
+18-0llvm/lib/SandboxIR/Constant.cpp
+13-2llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
+12-0llvm/unittests/SandboxIR/SandboxIRTest.cpp
+624-304 files not shown
+638-3310 files

LLVM/project 9823e86 — clang/lib/CIR/CodeGen CIRGenFunction.h CIRGenFunction.cpp, clang/test/CIR/CodeGenCoroutines coro-yield.cpp

[CIR] Support CoyieldExpr in emitLValue (#232298)

In `CIRGenFunction::emitLValue`, `Expr::CoyieldExprClass` previously
called `errorNYI`. When a coroutine yields an expression whose
`yield_value()` returns an awaiter whose `await_resume()` returns an
lvalue reference (for example, `int &r = co_yield 0;` or `(co_yield 0) =
42;`), Clang evaluates the `CoyieldExpr` as an lvalue. The resume
pointer is spilled and reloaded across `cir.await` to maintain MLIR SSA
dominance in the parent scope.

Fixes #232233.
DeltaFile
+71-0clang/test/CIR/CodeGenCoroutines/coro-yield.cpp
+41-2clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
+1-2clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+1-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+114-44 files

LLVM/project 58fc008 — clang/lib/Driver/ToolChains CommonArgs.cpp Clang.cpp, clang/test/Driver aarch64-uefi-constructed-args.c aarch64-security-options.c

[clang][Driver] Use the Windows ARM64 defaults for aarch64-unknown-uefi

Match the Windows ARM64 driver defaults for aarch64-unknown-uefi, which
follows the same ABI:

* char is signed, so do not pass -fno-signed-char,
* the frame chain must stay valid even when frame pointers are omitted,
  so -fomit-frame-pointer yields -mframe-pointer=reserved rather than
  none, as the backend reserves the frame pointer for UEFI as well,
* -msign-return-address selects the B key, the only one the backend
  accepts for Windows and UEFI.

Assisted-by: Claude
DeltaFile
+9-0clang/test/Driver/aarch64-uefi-constructed-args.c
+9-0clang/test/Driver/aarch64-security-options.c
+4-4clang/lib/Driver/ToolChains/CommonArgs.cpp
+4-4clang/lib/Driver/ToolChains/Clang.cpp
+26-84 files

LLVM/project 0302aa4 — clang/lib/Basic/Targets AArch64.h AArch64.cpp, clang/lib/Driver Driver.cpp

[clang] Add aarch64-unknown-uefi target

Add the aarch64-unknown-uefi target to clang, building on the backend
support added in the preceding patches. Like x86_64-unknown-uefi it
follows the Microsoft ABI conventions, matching the Windows ARM64 target
which is the only way EFI applications for AArch64 can be built with
Clang/LLVM today:

* add UEFIAArch64TargetInfo: LLP64 types, Microsoft C++ ABI, char*
  based va_list and the Win64 calling convention kind,
* use the Windows AArch64 ABI info in CodeGen for UEFI,
* accept aarch64 for *-uefi triples in the driver.

The UEFI toolchain already handles the linker invocation (lld-link with
/subsystem:efi_application), so no further driver changes are needed.

Assisted-by: Claude
DeltaFile
+50-0clang/lib/Basic/Targets/AArch64.cpp
+43-0clang/test/CodeGen/AArch64/uefi-abi.c
+19-0clang/test/Driver/aarch64-uefi-constructed-args.c
+14-0clang/lib/Basic/Targets/AArch64.h
+0-6clang/test/Driver/unsupported-target-arch.c
+4-2clang/lib/Driver/Driver.cpp
+130-89 files not shown
+147-915 files

LLVM/project ea55686 — llvm/docs ReleaseNotes.md, llvm/lib/Target/AArch64 AArch64CodeLayoutOpt.cpp AArch64MachineFunctionInfo.cpp

[AArch64] Apply the Windows SEH and CRT codegen constraints to UEFI

aarch64-unknown-uefi uses SEH unwind information and has no C runtime
library, so the remaining Windows specific codegen decisions that follow
from this apply to it too:

* do not align loops or basic blocks, since SEH unwind info generation
  needs the exact function layout before alignment padding is inserted,
* sign return addresses with the B key by default and reject A key
  signing, matching the pac_sign_lr unwind code used by the unwinder;
  the branch protection parser defaults to the B key for UEFI as well,
  so that -mbranch-protection=pac-ret keeps working,
* do not lower wide shifts to libcalls at -Oz, as those helpers are not
  available.

The corresponding Windows tests gain aarch64-unknown-uefi run lines and
the LLVM release notes announce the new target, which completes the
backend side of aarch64-unknown-uefi support.

Assisted-by: Claude
DeltaFile
+18-0llvm/unittests/TargetParser/TargetParserTest.cpp
+5-5llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-2llvm/lib/TargetParser/ARMTargetParserCommon.cpp
+2-2llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
+4-0llvm/docs/ReleaseNotes.md
+1-1llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
+32-103 files not shown
+35-109 files

LLVM/project 62a5653 — llvm/lib/CodeGen/GlobalISel IRTranslator.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64Subtarget.cpp

[AArch64] Classify global references on UEFI like Windows COFF

Apply the Windows COFF rules for global references to
aarch64-unknown-uefi, which produces the same PE/COFF images:

* classify dllimport and non-dso-local globals with MO_DLLIMPORT /
  MO_COFFSTUB, so extern_weak symbols are referenced through a stub that
  can be resolved to zero by the linker,
* keep the existing SelectionDAG, FastISel and GlobalISel handling of
  calls and tail calls to extern_weak functions in sync with that,
* default to the PIC relocation model, so jump tables and other
  references stay position independent in relocatable PE images,
* lower ifuncs on UEFI as COFF has no support for them.

The extern weak and jump table tests gain aarch64-unknown-uefi run lines,
and a new test checks that the default pipelines lower ifuncs for both
Windows and UEFI.

Assisted-by: Claude
DeltaFile
+47-0llvm/test/CodeGen/AArch64/ifunc-lower-coff.ll
+3-3llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+3-3llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+2-2llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+2-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+3-0llvm/test/CodeGen/AArch64/windows-extern-weak.ll
+60-93 files not shown
+63-119 files

LLVM/project f3241f7 — llvm/lib/Target/AArch64 AArch64MachineFunctionInfo.cpp AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 win-alloca-no-stack-probe.ll no-stack-arg-probe.ll

[AArch64] Probe large stack frames with __chkstk on UEFI

Like Windows, aarch64-unknown-uefi has no guard page handling of its
own, so frames larger than the probe size are probed with __chkstk
instead of inline probing, and "no-stack-arg-probe" disables it.

Tests: chkstk.ll, no-stack-arg-probe.ll and win-alloca-no-stack-probe.ll.

Assisted-by: Claude
DeltaFile
+1-1llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.cpp
+1-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1-1llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+2-0llvm/test/CodeGen/AArch64/no-stack-arg-probe.ll
+2-0llvm/test/CodeGen/AArch64/chkstk.ll
+1-0llvm/test/CodeGen/AArch64/win-alloca-no-stack-probe.ll
+8-36 files

LLVM/project 23129db — llvm/lib/Target/AArch64 MachineSMEABIPass.cpp, llvm/test/CodeGen/AArch64 win-alloca.ll

[AArch64] Address review feedback on UEFI dynamic stack allocation

Include UEFI in the MachineSMEABI lazy ZA save assertion message and add
an -O0 run line for aarch64-unknown-uefi in win-alloca.ll to exercise the
GlobalISel dynamic alloca fallback.

Assisted-by: Claude
DeltaFile
+1-1llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
+1-0llvm/test/CodeGen/AArch64/win-alloca.ll
+2-12 files

LLVM/project e83e520 — llvm/include/llvm/IR RuntimeLibcalls.td, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

[AArch64] Use __chkstk for dynamic stack allocation on UEFI

Register the Windows __chkstk stack probe helper for aarch64-unknown-uefi
and lower dynamic stack allocations through it, including the SME ZA
buffer allocation in LowerFormalArguments. GlobalISel falls back to
SelectionDAG for dynamic allocas on UEFI as it does on Windows.

Tests: win-alloca.ll, the vla in win64_vararg.ll (which now runs in full
on UEFI) and sme-lazy-save-windows.ll.

Assisted-by: Claude
DeltaFile
+3-2llvm/include/llvm/IR/RuntimeLibcalls.td
+2-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-2llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+1-1llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
+1-0llvm/test/CodeGen/AArch64/win64_vararg.ll
+1-0llvm/test/CodeGen/AArch64/win-alloca.ll
+10-71 files not shown
+11-77 files

LLVM/project 3ed8c04 — llvm/lib/TargetParser AArch64TargetParser.cpp, llvm/test/CodeGen/AArch64 arm64-platform-reg.ll

[AArch64] Reserve x18 as the platform register on UEFI

Both the Windows ARM64 ABI, which UEFI follows, and the firmware
ecosystem (EDK2 builds AArch64 with -ffixed-x18) treat x18 as a reserved
platform register. Reserve it by default for aarch64-unknown-uefi, as is
already done for Windows, Darwin, Android, Fuchsia and OHOS.

Assisted-by: Claude
DeltaFile
+1-1llvm/lib/TargetParser/AArch64TargetParser.cpp
+1-0llvm/test/CodeGen/AArch64/arm64-platform-reg.ll
+2-12 files

LLVM/project fd1cbb3 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 win64cc-backup-x18.ll

[AArch64] Treat the Win64 calling convention as native on UEFI

Functions using the Win64 calling convention on a non-Windows target
back up x18 and are excluded from tail call optimization, because x18
is the platform register there. On UEFI the Win64 convention is the
native one, so apply the Windows behaviour.

Tests: win64cc-backup-x18.ll gains Windows and UEFI run lines showing
that neither backs up x18 and both tail call.

Assisted-by: Claude
DeltaFile
+8-0llvm/test/CodeGen/AArch64/win64cc-backup-x18.ll
+1-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+1-1llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+10-23 files

LLVM/project 6186288 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[AArch64] Derive va_list size from the DataLayout

LowerVACOPY and the GlobalISel va_copy legalization each re-derived
sizeof(va_list) and the pointer size from target-triple conditionals,
duplicating AArch64TargetLowering::getVaListSizeInBits. Use the
DataLayout pointer size and getVaListSizeInBits in all three places so
the Darwin/Windows/UEFI vs. AAPCS decision lives in one function.

Also cover llvm.va_copy legalization for Windows and UEFI.

LLM-aided
DeltaFile
+8-10llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+11-0llvm/test/CodeGen/AArch64/GlobalISel/legalize-vacopy.mir
+3-7llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+22-173 files

LLVM/project 3e0d7df — llvm/lib/Target/NVPTX NVPTXISelLowering.h NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX atomicrmw-widen-fp16.ll

[NVPTX] Prototype widening scalar fp16 atomics to elementwise operations
DeltaFile
+474-0llvm/test/Transforms/AtomicExpand/NVPTX/widen-fp16-atomics.ll
+455-0llvm/test/CodeGen/NVPTX/atomicrmw-widen-fp16.ll
+109-0llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+2-0llvm/lib/Target/NVPTX/NVPTXISelLowering.h
+1,040-04 files

LLVM/project 8f6e75d — llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/lib/Target/NVPTX NVPTXISelDAGToDAG.cpp NVPTXISelLowering.cpp

[AtomicExpand][NVPTX] Support native elementwise atomicrmw
DeltaFile
+171-1,538llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm90.ll
+205-24llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+57-167llvm/test/CodeGen/NVPTX/atomicrmw-elementwise-sm70.ll
+142-10llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+95-0llvm/test/CodeGen/NVPTX/cache-hint-atomics.ll
+42-28llvm/lib/CodeGen/AtomicExpandPass.cpp
+712-1,7676 files not shown
+773-1,79312 files

LLVM/project f39e416 — llvm/lib/Transforms/IPO GlobalOpt.cpp

Formatting
DeltaFile
+4-7llvm/lib/Transforms/IPO/GlobalOpt.cpp
+4-71 files

LLVM/project 6f8e5ac — llvm/lib/Transforms/IPO GlobalOpt.cpp, llvm/test/Transforms/GlobalOpt globalsra-comdat.ll

Copy attributes into dummy and use [0 x i8]
DeltaFile
+5-2llvm/lib/Transforms/IPO/GlobalOpt.cpp
+1-1llvm/test/Transforms/GlobalOpt/globalsra-comdat.ll
+6-32 files