LLVM/project d2db5bbclang/lib/CodeGen CGCall.cpp, llvm/include/llvm/ABI FunctionInfo.h

[CodeGen] Use unique_ptr for FunctionInfo to prevent memory leaks (#196603)

Raw pointer return from `FunctionInfo::create` caused leaks in callers
like `computeABIInfoUsingLib`, breaking BPF tests on ASan bots.
Using `std::unique_ptr` enforces automatic cleanup.

Fixes leak from #194460.
Buildbot: https://lab.llvm.org/buildbot/#/builders/52/builds/17090

Assisted-by: Gemini
DeltaFile
+8-5llvm/lib/ABI/FunctionInfo.cpp
+1-1clang/lib/CodeGen/CGCall.cpp
+1-1llvm/include/llvm/ABI/FunctionInfo.h
+10-73 files

LLVM/project c7120bbmlir/lib/Dialect/Tensor/Transforms DropRedundantRankExpansionPatterns.cpp, mlir/test/Dialect/Tensor drop-redundant-insert-slice-rank-expansion.mlir

[mlir][tensor] Enhance pattern to fold extract_slice(insert_slice) (#195045)

Extend the DropRedundantRankExpansionOnExtractSliceOfInsertSlice pattern
to support cases where the expanded dimensions are a subset of the
dropped dimensions, rather than requiring them to be exactly equal.
For example:
```
%inserted_slice = tensor.insert_slice %src into %dest[0, 0, 0, 0] [1, 1, 128, 480] [1, 1, 1, 1] :
        tensor<128x480xf32> into tensor<1x1x128x480xf32>
%extracted_slice = tensor.extract_slice %inserted_slice[0, 0, 0, 0] [1, 1, 123, 1] [1, 1, 1, 1] :
        tensor<1x1x128x480xf32> to tensor<123xf32>
```
can be folded into:
```
%extracted_slice = tensor.extract_slice %src[0, 0] [123, 1] [1, 1] :
        tensor<128x480xf32> to tensor<123xf32>
```
DeltaFile
+17-10mlir/lib/Dialect/Tensor/Transforms/DropRedundantRankExpansionPatterns.cpp
+12-0mlir/test/Dialect/Tensor/drop-redundant-insert-slice-rank-expansion.mlir
+29-102 files

LLVM/project bc654b4bolt/lib/Rewrite RewriteInstance.cpp

Revert "[BOLT] Fix EH data encoding checks in relocateEHFrameSection (#195691)" (#196672)

This reverts commit 7ab26d7c3a160e1dc166f2673644baa396703ee5.

There is test failure in bolt-tests::exceptions-split-strip.test.
DeltaFile
+7-4bolt/lib/Rewrite/RewriteInstance.cpp
+7-41 files

LLVM/project 2daf204clang/lib/Serialization ASTReader.cpp, llvm/lib/DWARFLinker/Parallel DWARFLinkerImpl.cpp

Merge branch 'main' into users/vitalybuka/spr/codegen-use-unique_ptr-for-functioninfo-to-prevent-memory-leaks-2
DeltaFile
+1,608-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p.s
+555-435llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+108-246llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+13-318mlir/lib/Dialect/MemRef/Transforms/FoldMemRefAliasOps.cpp
+140-144clang/lib/Serialization/ASTReader.cpp
+140-61llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
+2,564-1,204225 files not shown
+6,109-2,788231 files

LLVM/project 54ea7c5llvm/lib/Target/RISCV RISCVInstrInfoXAndes.td, llvm/test/CodeGen/RISCV rv64zba.ll

[RISCV] Use the nhs.lea.h/w/d instead of nhs.lea.h/w/d.ze with Sh1AddPat. (#196660)

The srliw already took care of zeroing the upper bits. Using the non-.ze
form is consistent with the Zba version of this pattern.
DeltaFile
+3-3llvm/test/CodeGen/RISCV/rv64zba.ll
+3-3llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
+6-62 files

LLVM/project f03da66clang-tools-extra/clangd ProjectModules.cpp, clang/include/clang/DependencyScanning DependencyScanningService.h

[clang][deps] Move `ScanningOutputFormat` out of the library (#196631)

Basing behavior of the dependency scanner on the final output format is
a leaky abstraction. Instead, we should aim to introduce proper feature
flags.
DeltaFile
+20-1clang/tools/clang-scan-deps/ClangScanDeps.cpp
+2-18clang/include/clang/DependencyScanning/DependencyScanningService.h
+2-1clang-tools-extra/clangd/ProjectModules.cpp
+1-1clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+0-2clang/unittests/Tooling/DependencyScannerTest.cpp
+25-235 files

LLVM/project 0366ed2llvm/lib/Target/PowerPC PPCISelLowering.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll bf16-v4-instructions.ll

rebase

Created using spr 1.3.4
DeltaFile
+5,938-880llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+3,322-504llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+1,608-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p.s
+555-435llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+0-775llvm/utils/Reviewing/find_interesting_reviews.py
+16,057-2,9611,818 files not shown
+52,277-20,1441,824 files

LLVM/project a989cd9llvm/lib/Target/PowerPC PPCISelLowering.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll bf16-v4-instructions.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+5,938-880llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+3,322-504llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+1,608-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p.s
+555-435llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+0-775llvm/utils/Reviewing/find_interesting_reviews.py
+16,057-2,9611,818 files not shown
+52,277-20,1441,824 files

LLVM/project 8fc5513bolt/include/bolt/Profile DataAggregator.h, bolt/lib/Profile DataAggregator.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+14-57bolt/lib/Profile/DataAggregator.cpp
+1-13bolt/include/bolt/Profile/DataAggregator.h
+15-702 files

LLVM/project f3cc308llvm/lib/Target/AMDGPU GCNRegPressure.cpp GCNRegPressure.h

Added comments on limitations of physical register tracking.
DeltaFile
+13-3llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+16-0llvm/lib/Target/AMDGPU/GCNRegPressure.h
+29-32 files

LLVM/project dbbe548llvm/lib/Target/DirectX DXILRootSignature.h DXILRootSignature.cpp, llvm/test/CodeGen/DirectX/ContainerData RootSignature-PrintOnlyValid.ll RootSignature-Error-is-not-value.ll

[DirectX] Not print invalid root signature definitions. (#196444)

This patch adds a check during root signature printing pass, that makes
sure we have valid root signature before starting printing. This is
required after https://github.com/llvm/llvm-project/pull/194858 changed
reportError to not stop after emitting the first error.

Fix: https://github.com/llvm/llvm-project/issues/196430
DeltaFile
+26-0llvm/test/CodeGen/DirectX/ContainerData/RootSignature-PrintOnlyValid.ll
+4-11llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Error-is-not-value.ll
+3-10llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Error-is-not-function.ll
+1-1llvm/test/CodeGen/DirectX/ContainerData/RootSignature-Invalid-Version.ll
+2-0llvm/lib/Target/DirectX/DXILRootSignature.h
+2-0llvm/lib/Target/DirectX/DXILRootSignature.cpp
+38-221 files not shown
+38-237 files

LLVM/project 25295bcbolt/include/bolt/Profile DataReader.h, bolt/lib/Profile DataReader.cpp

[BOLT][NFCI] Consolidate DataReader::setEntryCounts (#196411)

FuncBranchData/BinaryFunction exec/external entry counts are set
in multiple places in `DataReader`:
- FBD: in `parse` and `appendFrom`,
- BF: in `preprocessProfile` and `matchProfileData`.

Consolidate to `setEntryCounts` called from `readProfile`.
Drop explicit counters, compute them from `FBD::EntryData`.

Test Plan: NFCI
DeltaFile
+26-18bolt/lib/Profile/DataReader.cpp
+3-6bolt/include/bolt/Profile/DataReader.h
+29-242 files

LLVM/project 38d7928lldb/tools/driver Driver.cpp

[lldb] Handle SIGINT via the MainLoop signal thread (on POSIX) (#195959)

The driver's async SIGINT handler called
SBDebugger::DispatchInputInterrupt directly. That is not
async-signal-safe and can lead to a crash.

Register SIGINT with the existing signal-thread MainLoop instead so
DispatchInputInterrupt runs in normal thread context. The Windows path
is unchanged and keeps the legacy async handler.

While DispatchInputInterrupt runs, the callback temporarily installs
SIG_DFL so a second Ctrl-C still hard-terminates the process, preserving
the escape hatch users rely on when the debugger is unresponsive.

Moving SIGINT off the main thread means a Ctrl-C no longer interrupts
blocking syscalls there (e.g. a Python REPL waiting on input or
sleeping), so Python never observes the queued interrupt and
KeyboardInterrupt is not raised. To restore that behavior, after
dispatching the interrupt the callback re-raises SIGINT on the main

    [6 lines not shown]
DeltaFile
+56-4lldb/tools/driver/Driver.cpp
+56-41 files

LLVM/project dc93944mlir/include/mlir/Dialect/AMDGPU/IR AMDGPUOps.td, mlir/lib/Dialect/AMDGPU/IR AMDGPUOps.cpp

[mlir][AMDGPU] Add, unify verification of memref index counts (#196657)

This PR verifies that, on operations that have
`%memref[%idx0, %idx1, ...]` arguments, the number of indices matches
the rank of the memref being passed in.

While we're here, fixes capitalization for certain verification error
messages.

Assisted-by: Codex 5.5 (handled much of the implementation)
DeltaFile
+159-1mlir/test/Dialect/AMDGPU/invalid.mlir
+56-12mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
+0-3mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUOps.td
+215-163 files

LLVM/project 4b248f2flang/lib/Optimizer/Builder CUDAIntrinsicCall.cpp, flang/test/Lower/CUDA cuda-default-stream.cuf

[flang][cuda] Widen stream argument to i64 in stream intrinsic lowering (#196650)

`genCUDASetDefaultStream` and `genCUDAStreamDestroy` build their runtime
call with an `i64` stream parameter but pass the actual argument
straight through, so a smaller-kind actual (e.g. the literal `0` in
`cudaforSetDefaultStream(0)`) produces an ill-typed `fir.call`:
```
error: 'llvm.call' op operand type mismatch for operand 0: 'i32' != 'i64'
```
Insert a `fir.convert` to `i64` before the call, matching what
`genCUDASetDefaultStreamArray` already does.
DeltaFile
+34-0flang/test/Lower/CUDA/cuda-default-stream.cuf
+3-0flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
+37-02 files

LLVM/project ad4e5bbmlir/include/mlir/Dialect/Vector/Transforms LoweringPatterns.h, mlir/lib/Dialect/Vector/Transforms LowerVectorContract.cpp

nits

Signed-off-by: Eric Feng <Eric.Feng at amd.com>
DeltaFile
+0-2mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
+0-1mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
+0-32 files

LLVM/project d063eeblld/test/wasm libsearch.s dylink.s, lld/wasm Driver.cpp

[lld][WebAssembly] Remove the experimental warning for PIC/dynamic linking (#196566)

The current dynamic linking support has been used for several years not
both in emscripten and in wasi-sdk and is documented
https://github.com/WebAssembly/tool-conventions/blob/main/DynamicLinking.md.
We did/do have have plans to develop another version of the dynamic
linking ABI that doesn't use a global symbol namespace, and that can
still happen, but the current API is clearly production worthy
regardless of future plans.

This change removes the linker warning and the corresponding
`--experimental-pic` flag.

If we do want to still make breaking changes to the dylink format we can
rename the `dylink.1` section (which already contains a version number).

This change is leads the way for enabling shared libraries by default in
emscripten.
DeltaFile
+14-14lld/test/wasm/libsearch.s
+0-23lld/wasm/Driver.cpp
+6-6lld/test/wasm/dylink.s
+6-6lld/test/wasm/unsupported-pic-relocations64.s
+6-6lld/test/wasm/unsupported-pic-relocations.s
+6-6lld/test/wasm/shared-lazy.s
+38-6134 files not shown
+91-11840 files

LLVM/project 59152f4llvm/test/CodeGen/X86 combine-add.ll

[X86] combine-add.ll - regenerate to show missing add asm comments (#196647)
DeltaFile
+2-2llvm/test/CodeGen/X86/combine-add.ll
+2-21 files

LLVM/project e38d29fllvm/lib/ProfileData InstrProf.cpp

fix

Created using spr 1.3.7
DeltaFile
+4-0llvm/lib/ProfileData/InstrProf.cpp
+4-01 files

LLVM/project 40d64cdllvm/lib/ProfileData InstrProf.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+4-0llvm/lib/ProfileData/InstrProf.cpp
+4-01 files

LLVM/project aa1e92cllvm/lib/ProfileData InstrProf.cpp

fix

Created using spr 1.3.7
DeltaFile
+4-0llvm/lib/ProfileData/InstrProf.cpp
+4-01 files

LLVM/project 4714c8fclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll

rebase

Created using spr 1.3.7
DeltaFile
+652-9,305clang/test/AST/ast-dump-templates.cpp
+4,820-4,830llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+6,873-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+5,938-794llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+27,978-19,45810,604 files not shown
+487,906-229,51310,610 files

LLVM/project 14ac9dflldb/bindings/python python-extensions.swig, lldb/docs/use variable.rst

[lldb] Add lldb.summary and lldb.synthetic decorators (#195351)

Adds two new decorators, `@lldb.summary` and `@lldb.synthetic`,
analogous to the existing `@lldb.command` decorator.

```python
@lldb.summary("MyType")
def MyType_summary(valobj, _):
      return "summary string"

@lldb.synthetic("MyContainer")
class MyContainerSynthetic:
    def __init__(self, valobj, _): ...
```

These decorators result in `type summary add` and `type synthetic add`
commands being run.

An additional motivation: these decorators will make it straightforward

    [8 lines not shown]
DeltaFile
+102-0lldb/docs/use/variable.rst
+54-0lldb/bindings/python/python-extensions.swig
+50-0lldb/test/API/functionalities/data-formatter/decorator-formatters/formatters.py
+37-0lldb/test/API/functionalities/data-formatter/decorator-formatters/TestDecoratorFormatters.py
+15-0lldb/test/API/functionalities/data-formatter/decorator-formatters/main.cpp
+6-0lldb/test/API/functionalities/data-formatter/decorator-formatters/broken_formatter.py
+264-01 files not shown
+266-07 files

LLVM/project 147662eclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+652-9,305clang/test/AST/ast-dump-templates.cpp
+4,820-4,830llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+6,873-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+5,938-794llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+27,978-19,45810,604 files not shown
+487,906-229,51310,610 files

LLVM/project ad3de62llvm/docs LangRef.rst

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+3-1llvm/docs/LangRef.rst
+3-11 files

LLVM/project 13cc7a4llvm/docs LangRef.rst, llvm/lib/ProfileData InstrProf.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+25-0llvm/test/Transforms/PGOProfile/Inputs/consecutive-zeros-metadata.proftext
+21-0llvm/test/Transforms/PGOProfile/consecutive-zeros-metadata.ll
+8-0llvm/lib/ProfileData/InstrProf.cpp
+3-1llvm/docs/LangRef.rst
+57-14 files

LLVM/project d0771fdclang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll

rebase

Created using spr 1.3.7
DeltaFile
+652-9,305clang/test/AST/ast-dump-templates.cpp
+4,820-4,830llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+6,873-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+5,938-794llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+27,978-19,45810,601 files not shown
+487,852-229,51310,607 files

LLVM/project fdf4eb1libcxx/include/__memory uninitialized_algorithms.h, libcxx/test/libcxx/memory uninitialized_allocator_copy_template_op_assign.pass.cpp

[libc++] Require the exact assignment expression to be trivial in __uninitialized_allocator_copy_impl

__uninitialized_allocator_copy_impl has an optimization that replaces allocator_traits::construct with std::copy for raw pointer ranges when the element type is trivially copy constructible and trivially copy assignable.

The copy-assignment trait only checks whether assignment from const T& is trivial. That is weaker than the expression used by std::copy, which evaluates *out = *in. If overload resolution selects a different non-trivial assignment operator for that expression, std::copy can call that operator on uninitialized storage.

Check is_trivially_assignable<_Out&, _In&> instead. This matches the assignment expression used by std::copy, preserves the optimized path when that assignment is actually trivial, and falls back to placement construction otherwise.

Add a regression test with a type whose defaulted copy assignment is trivial but whose templated assignment operator is selected for non-const lvalue sources.

Tested with:
~/llvm-project/build-libcxx-fresh/bin/llvm-lit ~/llvm-project/libcxx/test/libcxx/memory/uninitialized_allocator_copy_template_op_assign.pass.cpp ~/llvm-project/libcxx/test/libcxx/memory/uninitialized_allocator_copy.pass.cpp -q
DeltaFile
+66-0libcxx/test/libcxx/memory/uninitialized_allocator_copy_template_op_assign.pass.cpp
+1-1libcxx/include/__memory/uninitialized_algorithms.h
+67-12 files

LLVM/project b1b3b43.github/workflows libc-overlay-tests.yml libc-fullbuild-tests.yml, libc/cmake/modules LLVMLibCCheckCpuFeatures.cmake

[libc] Disable -march=native in CI to fix sccache poisoning (#196560)

-march=native is incompatible with shared build caches because sccache
treats it as a literal string. Object files compiled on one CPU model
get silently served to runners with a different CPU, causing SIGILL
crashes in the opt_host memory tests.

Made LIBC_COMPILE_OPTIONS_NATIVE a CMake cache variable so CI can
override it. Both overlay and fullbuild workflows now pass
-DLIBC_COMPILE_OPTIONS_NATIVE="" to disable -march=native. Local
developer builds are unaffected and still default to -march=native.

Reverted the per-CPU cache key approach from #196477 in favour of this
fix, which addresses the root cause.

Bumped sccache key versions (v2) in both workflows to invalidate the
poisoned caches.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+2-26.github/workflows/libc-overlay-tests.yml
+16-3libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake
+3-2.github/workflows/libc-fullbuild-tests.yml
+21-313 files

LLVM/project 1e28dballvm/include/llvm/IR Intrinsics.h, llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

keep all comments

Created using spr 1.3.4
DeltaFile
+244-245llvm/include/llvm/IR/Intrinsics.h
+278-0llvm/test/Instrumentation/MemorySanitizer/ftrunc.ll
+139-0llvm/test/CodeGen/AMDGPU/d16-write-vgpr32.ll
+115-0llvm/test/CodeGen/RISCV/stack-probing-dynamic-nonentry.ll
+70-19llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+73-0mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
+919-26431 files not shown
+1,158-32637 files