LLVM/project fea987bllvm/lib/ExecutionEngine/Orc/Debugging ELFDebugObjectPlugin.cpp

[ORC] Fix unchecked Expected<T> in ELFDebugObjectPlugin::FinalizePromise (#172904)

If `Alloc.finalize()` fails in the post-allocation pass, we store the
error in `FinalizePromise`. If we don't reach the post-fixup pass
afterwards the error will leak. This patch adds another case in the
DebugObject destructor that will check the `Expected<T>` and report the
error.
DeltaFile
+29-8llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
+29-81 files

LLVM/project 6d63f12llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/InstSimplify call.ll

[InstCombine] Propagate poison through fshl and fshr intrinsics (#172859)

Currently these intrinsics output `undef` on poison, which triggers CI
errors on PRs that want to add poison tests for funnel shifts (such as
#172723). Let's make `fshl` and `fshr` propagate poison instead.
DeltaFile
+14-19llvm/test/Transforms/InstSimplify/call.ll
+6-6llvm/unittests/Analysis/ValueTrackingTest.cpp
+2-0llvm/lib/Analysis/ValueTracking.cpp
+22-253 files

LLVM/project 5dcd381clang/lib/AST ExprConstant.cpp, clang/test/SemaCXX dllimport.cpp

[clang][ExprConstant] Fix error on static constexpr symbol in dllimport function (#171628)

Consider the following:
```
struct A {
    __declspec(dllimport) __forceinline
    static const int* foo() {
        static constexpr int var = 42;
        static constexpr const int* p = &var;
        static_assert(*p == 42, "");
        return p;
    }
};

const int* (*pfoo)() = &A::foo;

int main() {
    return pfoo() == A::foo();
}

    [88 lines not shown]
DeltaFile
+30-0clang/test/SemaCXX/dllimport.cpp
+5-3clang/lib/AST/ExprConstant.cpp
+35-32 files

LLVM/project 6e74f3bllvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine nanless-canonicalize-combine.ll

Partially handle as independent folds
DeltaFile
+49-11llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+21-32llvm/test/Transforms/InstCombine/nanless-canonicalize-combine.ll
+70-432 files

LLVM/project b5ced47llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine nanless-canonicalize-combine.ll

InstCombine: Fold out nanless canonicalize pattern

Pattern match a wrapper around llvm.canonicalize which
weakens the semantics to not require quieting signaling
nans. Depending on the denormal mode and FP type, we can
either drop the pattern entirely or reduce it only to
a canonicalize call. I'm inventing this pattern to deal
with LLVM's lax canonicalization model in math library
code.

The math library code currently has explicit checks for
the denormal mode, and conditionally canonicalizes the
result if there is flushing. Semantically, this could be
directly replaced with a simple call to llvm.canonicalize,
but doing so would incur an additional cost when using
standard IEEE behavior. If we do not care about quieting
a signaling nan, this should be a no-op unless the denormal
mode may flush. This will allow replacement of the
conditional code with a zero cost abstraction utility

    [17 lines not shown]
DeltaFile
+20-81llvm/test/Transforms/InstCombine/nanless-canonicalize-combine.ll
+65-0llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+85-812 files

LLVM/project 7c77545llvm/test/Transforms/InstCombine nanless-canonicalize-combine.ll

InstCombine: Add baseline test for nanless canonicalize combine
DeltaFile
+832-0llvm/test/Transforms/InstCombine/nanless-canonicalize-combine.ll
+832-01 files

LLVM/project 5986571clang-tools-extra/clang-tidy/bugprone UseAfterMoveCheck.cpp

[clang-tidy][NFC] Refactor `bugprone-use-after-move` check (#172219)

This change is a necessary step for a subsequent PR that will enhance
the `bugprone-use-after-move` check to correctly handle cases where
variables are re-initialized inside captured lambdas, which currently
lead to FPs.

Part of #172018
DeltaFile
+66-57clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
+66-571 files

LLVM/project 37ce62alldb/tools/lldb-dap/Handler RestartRequestHandler.cpp AttachRequestHandler.cpp, lldb/tools/lldb-dap/Protocol ProtocolRequests.cpp ProtocolRequests.h

[lldb-dap] Migrate restart request to structured types (#172488)

This patch migrates `restart` request to structured types. Also, I added
some checks that at least one of the required fields was provided for
`launch` and `attach` requests. Maybe I missed some possible
configurations, so please double check.
DeltaFile
+29-95lldb/tools/lldb-dap/Handler/RestartRequestHandler.cpp
+85-20lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp
+40-0lldb/unittests/DAP/ProtocolRequestsTest.cpp
+0-22lldb/tools/lldb-dap/Handler/AttachRequestHandler.cpp
+13-0lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
+6-3lldb/tools/lldb-dap/Handler/RequestHandler.h
+173-1403 files not shown
+175-1489 files

LLVM/project a71b1d2llvm/include/llvm/ADT Bitset.h, llvm/unittests/ADT BitsetTest.cpp

[ADT] Refactor Bitset to Be More Constexpr-Usable (#172062)

This patch refactors some essential `Bitset` member functions to be
`constexpr` and adds more useful member functions. Unit tests have been
added to `BitsetTest.cpp` to cover both runtime and `consteval` context
correctness.

The thought of refactor was brought up in this context:
https://discourse.llvm.org/t/rfc-out-of-lanebitmask-bits-again/88613.
DeltaFile
+226-0llvm/unittests/ADT/BitsetTest.cpp
+44-15llvm/include/llvm/ADT/Bitset.h
+270-152 files

LLVM/project 7844878llvm/examples/SpeculativeJIT SpeculativeJIT.cpp

[SpeculativeJIT] Remove redundant return statement (#173146)

Remove redundant return 0 already returned by runAsMain.
DeltaFile
+0-2llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp
+0-21 files

LLVM/project aaff3afmlir/lib/Target/IRDLToCpp IRDLToCpp.cpp, mlir/test/lib/Dialect/TestIRDLToCpp test_irdl_to_cpp.irdl.mlir

[mlir] [irdl] Fix order of emitted cpp namespace closing comments (#172035)

DeltaFile
+5-0mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir
+3-1mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
+8-12 files

LLVM/project b97b1f2libcxx/include/__vector vector_bool.h, libcxx/test/benchmarks/containers/sequence vector_bool.bench.cpp

[libc++] Optimize vector<bool>::resize() (#172853)

This both simplifies the implementation and improves the performance,
since the compiler is better able to see through what's going on.

```
Benchmark                                                                              old             new    Difference    % Difference
--------------------------------------------------------------------------  --------------  --------------  ------------  --------------
vector<bool>(const_vector<bool>&)                                                    11.99           12.26          0.27           2.25%
vector<bool>(size_type,_const_value_type&)                                            9.24            9.29          0.05           0.54%
vector<bool>(vector<bool>&&,_const_allocator_type&)_(different_allocators)           14.26           14.35          0.09           0.65%
vector<bool>(vector<bool>&&,_const_allocator_type&)_(equal_allocators)                2.67            2.67         -0.01          -0.29%
vector<bool>::reserve()                                                               9.30            9.29         -0.01          -0.12%
vector<bool>::resize()                                                               15.14           13.43         -1.71         -11.28%
Geomean                                                                               9.17            9.03         -0.14          -1.48%
DeltaFile
+10-19libcxx/include/__vector/vector_bool.h
+9-0libcxx/test/benchmarks/containers/sequence/vector_bool.bench.cpp
+19-192 files

LLVM/project 49e601allvm/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/test/Transforms/InstCombine intrinsic-select.ll

[InstCombine] Don't fold struct-ret intrinsics into vector selects (#173062)

Folding struct-ret intrinsics like `@llvm.sincos.v4f32` into selects
with vector conditions is invalid (the result must be a vector).
DeltaFile
+23-0llvm/test/Transforms/InstCombine/intrinsic-select.ll
+2-1llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+25-12 files

LLVM/project 5b3ac20libcxx/src/include refstring.h

Revert "[libc++] Don't try to be compatible with libstdc++ in __libcpp_refstring on iOS (#170816)" (#173099)

This reverts commit b2ddb909cf. Sadly, I was wrong when I said that
Apple didn't ship libstdc++.dylib on iOS. We actually still do, it's
just not part of the shared cache, which is why I missed it.

Hence, it is still possible to encounter libstdc++.dylib in processes
running on iOS.
DeltaFile
+2-2libcxx/src/include/refstring.h
+2-21 files

LLVM/project 534b6fellvm/lib/Target/AMDGPU SIRegisterInfo.td, llvm/test/CodeGen/AMDGPU regalloc-vgpr_lo128-gfx1250.mir shrink-vgpr_lo128-gfx1250.mir

[AMDGPU] Limit allocation of lo128 registers for occupancy

Parent change allows allocation of lo128 VGPRs from all 4 banks.
That may result in the undesired allocation leaving a hole of
maximum 128 registers in case if for example v0-v127 are allocated,
and v128-v255 are free.

Limit the available allocation order to the occupancy. Both hard
occupancy limits and occupancy achieved during scheduling are
considered. That is better to spill a register than to drop occupancy
in this case.
DeltaFile
+97-1llvm/test/CodeGen/AMDGPU/regalloc-vgpr_lo128-gfx1250.mir
+29-0llvm/test/CodeGen/AMDGPU/shrink-vgpr_lo128-gfx1250.mir
+14-2llvm/lib/Target/AMDGPU/SIRegisterInfo.td
+140-33 files

LLVM/project 1e82d04llvm/test/CodeGen/AMDGPU local-stack-alloc-add-references.gfx8.mir coalesce-copy-to-agpr-to-av-registers.mir, llvm/test/MC/Disassembler/AMDGPU gfx12_dasm_vop1_dpp8.txt gfx11_dasm_vop1_dpp16.txt

[AMDGPU] Allow allocation of lo128 registers from all banks

We can encode 16-bit operands in a short form for VGPRs [0..127].
When we have 1K registers available we can in fact allocate 4
times more from all 4 banks. That, however, requires an allocatable
class for these operands. When for most of the instructions it will
result in the VOP3 longer form, for V_FMAAMK/FMADAK_F16 it will
simply prohibit the encoding because these do not have VOP3 forms.

A straight forward solution would be to create a register class
with all registers having bit 8 of the encoding zero, i.e. to
create a register class with holes punched in it: [0-127, 256-383,
512-639, 768-895]. LLVM, however, does not like register classes
with punched holes when they also have subregisters. The cross-
product of all classes explodes and some combinations of a 'class
having a common subreg with another' becomeing impossible. Just
doing so explodes our register info to 4+Gb, uncompilable too.

The solution proposed is to define _lo128 RC with contigous 896

    [17 lines not shown]
DeltaFile
+180-180llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir
+120-120llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir
+90-90llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir
+49-46llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
+94-0llvm/test/CodeGen/AMDGPU/regalloc-vgpr_lo128-gfx1250.mir
+46-46llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
+579-48239 files not shown
+1,018-74745 files

LLVM/project 8953f67llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/X86 wide-scalar-shift-by-byte-multiple-legalization.ll

Merge branch 'main' into users/aokblast/readelf/pxnum_support
DeltaFile
+45,267-48,746llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+17,545-20,831llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
+11,954-11,000llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+8,998-11,093llvm/test/CodeGen/AMDGPU/maximumnum.bf16.ll
+8,981-11,098llvm/test/CodeGen/AMDGPU/minimumnum.bf16.ll
+5,981-8,885llvm/test/CodeGen/AMDGPU/shufflevector.v4i64.v4i64.ll
+98,726-111,65317,517 files not shown
+1,074,771-723,85117,523 files

LLVM/project ab665f2clang-tools-extra/clang-tidy .clang-format

[clang-tidy][NFC] Add option 'RemoveBracesLLVM' to clang-format config (#172755)

We successfully cleared codebase
(https://github.com/llvm/llvm-project/pull/172748,
https://github.com/llvm/llvm-project/pull/172751,
https://github.com/llvm/llvm-project/pull/172752,
https://github.com/llvm/llvm-project/pull/172754) without any
significant issues encountered.

I propose we add `RemoveBracesLLVM: true` which should _drastically_
reduce churn on code reviews.
DeltaFile
+1-0clang-tools-extra/clang-tidy/.clang-format
+1-01 files

LLVM/project 2a7c39eclang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema Sema.h

[clang] Add support for consteval null terminated strings

Adds support for null terminated strings produced by constexpr
evaluation. This makes it possible to perform analysis of format
strings that previously were not possible, and is needed in the
future to support __ptrauth qualifier options.
DeltaFile
+49-2clang/test/SemaCXX/static-assert-cxx26.cpp
+42-0clang/lib/Sema/SemaDeclCXX.cpp
+28-1clang/test/Parser/asm.cpp
+10-3clang/include/clang/Basic/DiagnosticSemaKinds.td
+5-4clang/include/clang/Sema/Sema.h
+5-3clang/lib/AST/ByteCode/Context.cpp
+139-131 files not shown
+141-157 files

LLVM/project 7a489b2llvm/docs MemProf.rst

Address comments.
DeltaFile
+46-21llvm/docs/MemProf.rst
+46-211 files

LLVM/project b91add8cmake/Modules FindGRPC.cmake

[FindGRPC.cmake] Make sure that `PACKAGE_VERSION` is not overwritten when doing `find_package(gRPC)` (#173115)

`PACKAGE_VERSION` is important since it sets the `LLVM_VERSION_STRING`
string.
DeltaFile
+4-0cmake/Modules/FindGRPC.cmake
+4-01 files

LLVM/project a3824dellvm/lib/Analysis AliasAnalysis.cpp, llvm/test/Transforms/DeadStoreElimination atomic.ll atomic-todo.ll

Revert "[AA] Improve precision for monotonic atomic load/store operations (#1…"

This reverts commit ce2518f59d9bc67553f05536ac9bb200827c36da.
DeltaFile
+26-67llvm/test/Transforms/DeadStoreElimination/atomic.ll
+23-0llvm/test/Transforms/DeadStoreElimination/atomic-todo.ll
+3-16llvm/lib/Analysis/AliasAnalysis.cpp
+52-833 files

LLVM/project 0c70ec6clang/include/clang/Basic DiagnosticSemaKinds.td, clang/include/clang/Sema Sema.h

[clang] Add support for consteval null terminated strings

Adds support for null terminated strings produced by constexpr
evaluation. This makes it possible to perform analysis of format
strings that previously were not possible, and is needed in the
future to support __ptrauth qualifier options.
DeltaFile
+49-2clang/test/SemaCXX/static-assert-cxx26.cpp
+42-0clang/lib/Sema/SemaDeclCXX.cpp
+28-1clang/test/Parser/asm.cpp
+12-7clang/include/clang/Basic/DiagnosticSemaKinds.td
+5-4clang/include/clang/Sema/Sema.h
+5-3clang/lib/AST/ByteCode/Context.cpp
+141-171 files not shown
+143-197 files

LLVM/project a95a303clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/CodeGen CIRGenBuilder.cpp

[CIR] Add 'get element' for array index ops (#172897)

This is a refactor/upstream/etc of:
https://github.com/llvm/clangir/pull/1748

This modifies our array-index operations to use a specific operation
(GetElementOp). According to the original patch commit message, this
replaces nearly 50% of ptr_stride operations in single source tests!
DeltaFile
+89-34clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+57-0clang/include/clang/CIR/Dialect/IR/CIROps.td
+12-24clang/test/CIR/CodeGen/array.cpp
+13-0clang/lib/CIR/CodeGen/CIRGenBuilder.cpp
+4-8clang/test/CIR/Lowering/array.cpp
+4-8clang/test/CIR/CodeGen/union.c
+179-745 files not shown
+187-8911 files

LLVM/project 8c7771allvm/lib/CodeGen/SelectionDAG ScheduleDAGSDNodes.cpp, llvm/test/CodeGen/AArch64 bit-test.ll

Add test

Created using spr 1.3.6-beta.1
DeltaFile
+91-0llvm/test/CodeGen/AArch64/bit-test.ll
+7-1llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+98-12 files

LLVM/project a7f0588llvm/lib/CodeGen/SelectionDAG ScheduleDAGSDNodes.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+7-1llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+7-11 files

LLVM/project 583905allvm/lib/CodeGen/SelectionDAG ScheduleDAGSDNodes.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.6-beta.1
DeltaFile
+7-1llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
+7-11 files

LLVM/project 632f592llvm/test/tools/llvm-readobj/ELF many-sections.s

fixup! [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments.
DeltaFile
+6-6llvm/test/tools/llvm-readobj/ELF/many-sections.s
+6-61 files

LLVM/project 59da50cllvm/test/CodeGen/RISCV/rvv fixed-vectors-vfmax.ll fixed-vectors-fmaximumnum.ll

[RISCV] Fix Zvfbfa tests from #171794 to mitigate UTC bug. NFCI (#173125)

Context:
https://github.com/llvm/llvm-project/pull/171794#discussion_r2614489484

For some reasons, UTC is unable to merge the 'ZVFHMIN' and 'ZVFBFA'
CHECK lines in some of the test functions, and emits incorrect CHECK
lines for them, once you run UTC again on the file.
This hinders the ability to update these tests in bulk, as one has to
manually remove the excessed ZVFBFA lines. While I don't know how to fix
UTC at this moment, I found a workaround that simply re-orders these two
check prefixes.

This is effectively a NFC
DeltaFile
+2-3llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll
+2-2llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximumnum.ll
+2-2llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum.ll
+2-2llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimumnum.ll
+2-2llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll
+2-2llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
+12-136 files not shown
+24-2512 files

LLVM/project 19d94eemlir/cmake/modules AddMLIRPython.cmake, mlir/python CMakeLists.txt

massage cmake
DeltaFile
+94-31mlir/cmake/modules/AddMLIRPython.cmake
+10-61mlir/python/CMakeLists.txt
+104-922 files