LLVM/project 80b6554flang/include/flang/Lower ConvertConstant.h, flang/lib/Lower ConvertVariable.cpp ConvertConstant.cpp

[flang] Lower initial values via ConvertConstant instead of the legacy expression lowering (#210621)

Global and component initial values were lowered with
`createSomeInitializerExpression` (the legacy, non-HLFIR expression
lowering). Route them through ConvertConstant instead, which is
self-contained and safe inside a fir.global initializer region: it never
consults the symbol map, allocates temporaries, or outlines constants
into memory.

Observable IR change: fir.no_reassoc no longer appears in fir.global
initializer regions for parenthesized scalar/derived constants. Update
global-initialization-parens.f90 -- previously a pre-commit baseline
pinning the old fir.no_reassoc behavior -- to assert the new folded
form, and add common-block-derived-initialization.f90 (a
DATA-initialized common block with a derived-type member).

Assisted-by: AI
DeltaFile
+26-50flang/lib/Lower/ConvertVariable.cpp
+43-28flang/test/Lower/global-initialization-parens.f90
+33-3flang/lib/Lower/ConvertConstant.cpp
+35-0flang/test/Lower/common-block-derived-initialization.f90
+8-0flang/include/flang/Lower/ConvertConstant.h
+145-815 files

LLVM/project e6103d7llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU packed-fp64.ll packed-u64.ll

[AMDGPU] Relax SGPR splat selection for PK_*64 (#210790)

These instructions replicate SGPR operands into high 64-bit channel
w/o opsel.
DeltaFile
+77-45llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+46-2llvm/test/CodeGen/AMDGPU/packed-u64.ll
+3-4llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+126-513 files

LLVM/project 5809c75flang/lib/Lower/OpenMP ClauseProcessor.cpp Utils.cpp, flang/test/Lower/OpenMP task-affinity.f90 depend-iterator.f90

[flang][OpenMP] Lower iterator indices with genExprValue instead of the legacy expression lowering (#210385)

`getIteratorElementIndices()` lowered the depend/affinity iterator
subscript expressions with `createSomeExtendedExpression` (the legacy,
non-HLFIR expression lowering). Switch it to
`AbstractConverter::genExprValue`, matching the idiom already used
elsewhere in OpenMP/Utils.cpp, so this code no longer depends on the
legacy expression lowering.

The iterator LIT tests are updated to reflect the induction values now
being materialized in memory (store + hlfir.declare + load) and the
subscript arithmetic lowering through HLFIR (hlfir.no_reassoc instead of
fir.no_reassoc).

Assisted-by: AI
DeltaFile
+62-15flang/test/Lower/OpenMP/task-affinity.f90
+48-13flang/test/Lower/OpenMP/depend-iterator.f90
+22-8flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+3-5flang/lib/Lower/OpenMP/Utils.cpp
+135-414 files

LLVM/project 890b11eclang/lib/Basic/Targets SPIR.h DirectX.h

[clang] Use 0 for wasm_funcref in non-Wasm address space maps (NFCI) (#210253)

The __funcref keyword is only supported by the WebAssembly target, so
the wasm_funcref entries in other targets' address space maps are
unused.

Use 0 for these entries, which is consistent with other unsupported
address spaces.
DeltaFile
+2-6clang/lib/Basic/Targets/SPIR.h
+1-3clang/lib/Basic/Targets/DirectX.h
+1-3clang/lib/Basic/Targets/NVPTX.h
+1-3clang/lib/Basic/Targets/AArch64.h
+1-3clang/lib/Basic/Targets/TCE.h
+1-3clang/lib/Basic/Targets/X86.h
+7-216 files

LLVM/project 35020b2llvm/unittests/Support ProgramTest.cpp

[Support][Unit] Fix ProgramTest.cpp build warning unused variable 'RetCode' (#210699)

RetCode is unused if __MINGW32__ is defined.
DeltaFile
+3-2llvm/unittests/Support/ProgramTest.cpp
+3-21 files

LLVM/project c26e99cflang/lib/Optimizer/Transforms/CUDA CUFDeviceGlobal.cpp, flang/test/Fir/CUDA cuda-device-global-cycle.fir

[flang][cuda] Avoid infinite loop while processing globals (#210805)
DeltaFile
+25-0flang/test/Fir/CUDA/cuda-device-global-cycle.fir
+11-8flang/lib/Optimizer/Transforms/CUDA/CUFDeviceGlobal.cpp
+36-82 files

LLVM/project b290a41lldb/source/Plugins/ABI/RISCV ABISysV_riscv.cpp, lldb/test/API/functionalities/gdb_remote_client TestGDBServerTargetXML.py

[lldb][RISCV] Fix x8 register aliasing for gdb-remote targets (#209070)

GDB remote target descriptions can expose the RISC-V `x8` register as
`fp`. LLDB previously used `fp` as the primary name and `s0` as the
alternate name, leaving no register name for `x8`.

This commit changes `s0` as the primary name, `x8` as the alternate
name, and mark the register as the generic frame pointer. Allowing `fp`,
`s0`, and `x8` to resolve to the same register.

Fixes #127900
DeltaFile
+5-4lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
+4-4lldb/test/API/functionalities/gdb_remote_client/TestGDBServerTargetXML.py
+9-82 files

LLVM/project de44ed3clang-tools-extra/docs/clang-tidy Contributing.rst

[clang-tidy][docs] Remove obsolete doc8 instructions. NFC. (#210576)

Remove the doc8 setup and invocation instructions from the contributing
guide as clang-tidy documentation transitions to Markdown.

Part of https://github.com/llvm/llvm-project/issues/201242
DeltaFile
+1-19clang-tools-extra/docs/clang-tidy/Contributing.rst
+1-191 files

LLVM/project d6790a7llvm/include/llvm/Target/GlobalISel Combine.td, llvm/lib/CodeGen/GlobalISel GISelValueTracking.cpp CombinerHelper.cpp

[GlobalISel] Add `isKnownNeverZero` to `GISelValueTracking` (#198438)

## Summary of changes

* This patch adds `GISelValueTracking::isKnownNeverZero`, modeled after
the SelectionDAG query, and uses it in the GlobalISel count-zero
combiner.

* The root combines enabled by this patch are:
  * `G_CTLZ x -> G_CTLZ_ZERO_POISON x`
  * `G_CTTZ x -> G_CTTZ_ZERO_POISON x`
* The combine only fires when the source is known nonzero and the
zero-poison opcode is legal, or when the combiner is running before
legalization.
* For the initial proof set, this patch handles `G_OR`, `G_SELECT`, and
`G_SHL`. These are not new root combines; they are source-expression
cases used by `isKnownNeverZero` to prove that the input to `G_CTLZ` /
`G_CTTZ` is nonzero. Other structural cases can be added in follow-up
patches. For other opcodes, the query falls back to existing KnownBits

    [21 lines not shown]
DeltaFile
+157-0llvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
+134-0llvm/test/CodeGen/AMDGPU/GlobalISel/combine-ctlz-cttz-zero-poison.ll
+97-0llvm/test/CodeGen/AArch64/GlobalISel/combine-ctlz-cttz-zero-poison.mir
+52-0llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+32-0llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+18-1llvm/include/llvm/Target/GlobalISel/Combine.td
+490-12 files not shown
+503-18 files

LLVM/project e49aac8llvm/include/llvm/ADT GenericCycleImpl.h GenericCycleInfo.h, llvm/test/Analysis/CycleInfo basic.ll

[CycleInfo] Identify cycles with a single-pass DFS algorithm (#210491)

Replace the Havlak-Tarjan construction in GenericCycleInfoCompute, a DFS
followed by a reverse-preorder scan, with the single-pass algorithm of
Wei, Mao, Zou and Chen, "A New Algorithm for Identifying Loops in
Decompilation" (SAS 2007). One depth-first traversal tags every block
with its innermost loop header on the fly; tagLoopHeader weaves the
per-block header chains, replacing UNION-FIND.

The flat forest is reconstructed from the tags, dropping the temporary
cycle objects and the per-block worklist passes. An edge re-entering an
already-closed cycle records non-header entries, so entries need no
predecessor scan.

The cycle sets, headers, reducibility and nesting are identical for the
given DFS order, cross-checked against the old construction on random
reducible and irreducible CFGs. Two implementation-defined orders change
(with minor test churn): sibling cycles are laid out in decreasing
header preorder, and non-header entries in block preorder.

    [6 lines not shown]
DeltaFile
+219-253llvm/include/llvm/ADT/GenericCycleImpl.h
+11-25llvm/include/llvm/ADT/GenericCycleInfo.h
+3-3llvm/test/CodeGen/X86/cycle-info.mir
+1-1llvm/test/Analysis/CycleInfo/basic.ll
+234-2824 files

LLVM/project 404d4daflang/lib/Lower/OpenMP OpenMP.cpp, flang/lib/Semantics openmp-utils.cpp

Revert "Redo [flang][OpenMP] Implement collapse for imperfectly nested loops" (#210861)

Reverts llvm/llvm-project#208528
Revert with #210753  pending llvm-test-suite fix.
DeltaFile
+0-648flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
+4-216flang/lib/Lower/OpenMP/OpenMP.cpp
+0-148flang/test/Semantics/OpenMP/doacross-nesting-omp60.f90
+5-122flang/test/Semantics/OpenMP/do22.f90
+3-84flang/lib/Semantics/openmp-utils.cpp
+0-50flang/test/Semantics/OpenMP/ordered-nesting-omp50.f90
+12-1,26817 files not shown
+71-1,46423 files

LLVM/project c9237cbflang/test/Semantics/OpenMP metadirective-loop-nest.f90

Revert "[flang][OpenMP] Fix new metadirective-loop-nest.f90 test expectation with collapse changes in #208528" (#210860)

Reverts llvm/llvm-project#210753
Revert with #208528 pending llvm-test-suite fix.
DeltaFile
+1-1flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
+1-11 files

LLVM/project 7a470a9flang/test/Lower pointer-assignments.f90 call-copy-in-out.f90

[flang][NFC] Remove downstream issue references (#210858)
DeltaFile
+26-26flang/test/Lower/pointer-assignments.f90
+4-4flang/test/Lower/call-copy-in-out.f90
+3-4flang/test/Lower/statement-function.f90
+3-3flang/test/Lower/host-associated.f90
+2-2flang/test/Lower/variable-inquiries.f90
+2-2flang/test/Lower/components.f90
+40-412 files not shown
+40-438 files

LLVM/project aa53970flang/test/Semantics/OpenMP metadirective-loop-nest.f90

Revert "[flang][OpenMP] Fix new metadirective-loop-nest.f90 test expectation …"

This reverts commit cfddcac22dabf01901424b746c94d3b6c9bddc4a.
DeltaFile
+1-1flang/test/Semantics/OpenMP/metadirective-loop-nest.f90
+1-11 files

LLVM/project 0e69549clang/include/clang/Basic DiagnosticFrontendKinds.td Attr.td, clang/lib/CodeGen CodeGenModule.cpp CodeGenModule.h

[Clang][AIX] Move -mloadtime-comment-vars validation to Sema. Add Release notes.
DeltaFile
+7-116clang/lib/CodeGen/CodeGenModule.cpp
+75-0clang/lib/Sema/SemaDecl.cpp
+0-40clang/lib/CodeGen/CodeGenModule.h
+0-17clang/include/clang/Basic/DiagnosticFrontendKinds.td
+11-2clang/test/CodeGen/PowerPC/loadtime-comment-vars-cxx.cpp
+10-0clang/include/clang/Basic/Attr.td
+103-1757 files not shown
+126-18213 files

LLVM/project bad025cclang/lib/CodeGen CodeGenModule.cpp

nit: CodeGenModule.cpp new line deletion
DeltaFile
+0-1clang/lib/CodeGen/CodeGenModule.cpp
+0-11 files

LLVM/project 282b91cclang/docs LanguageExtensions.md, clang/lib/CodeGen CodeGenModule.cpp CodeGenModule.h

[Clang][AIX] Switch -mloadtime-comment-vars name matching to mangled IR names

Replace source-qualified name matching in matchesLoadTimeCommentVarName with
mangled IR symbol name matching via getMangledName(GlobalDecl(VD)).
DeltaFile
+13-40clang/lib/CodeGen/CodeGenModule.cpp
+30-22clang/test/CodeGen/loadtime-comment-vars-cxx.cpp
+24-9clang/docs/LanguageExtensions.md
+5-6clang/lib/CodeGen/CodeGenModule.h
+2-4clang/test/Driver/mloadtime-comment-vars.c
+74-815 files

LLVM/project e6c9df7clang/test/CodeGen/PowerPC loadtime-comment-vars-cxx.cpp

Add list-parsing test cases for -mloadtime-comment-vars
DeltaFile
+33-0clang/test/CodeGen/PowerPC/loadtime-comment-vars-cxx.cpp
+33-01 files

LLVM/project 50b049aclang/docs LanguageExtensions.md, clang/lib/CodeGen CodeGenModule.cpp CodeGenModule.h

[Clang][AIX] Handle -mloadtime-comment-vars in global var emission
DeltaFile
+65-93clang/lib/CodeGen/CodeGenModule.cpp
+85-0clang/test/CodeGen/loadtime-comment-vars-cxx.cpp
+15-2clang/docs/LanguageExtensions.md
+6-9clang/lib/CodeGen/CodeGenModule.h
+5-5clang/test/CodeGen/loadtime-comment-vars.c
+4-0clang/test/Driver/mloadtime-comment-vars.c
+180-1096 files

LLVM/project 19c9b73clang/docs LanguageExtensions.md

Apply suggestions from code review

Co-authored-by: Hubert Tong <hubert.reinterpretcast at gmail.com>
DeltaFile
+2-8clang/docs/LanguageExtensions.md
+2-81 files

LLVM/project fc7ae21clang/docs LanguageExtensions.md, clang/lib/CodeGen CodeGenModule.cpp

[Clang][AIX] Diagnose unsupported -mloadtime-comment-vars variables
DeltaFile
+228-0clang/test/CodeGen/PowerPC/loadtime-comment-vars-cxx.cpp
+89-34clang/lib/CodeGen/CodeGenModule.cpp
+0-93clang/test/CodeGen/loadtime-comment-vars-cxx.cpp
+33-28clang/docs/LanguageExtensions.md
+0-61clang/test/CodeGen/loadtime-comment-vars.c
+60-0clang/test/CodeGen/PowerPC/loadtime-comment-vars.c
+410-2165 files not shown
+468-22711 files

LLVM/project 96b98f3clang/docs LanguageExtensions.md, clang/lib/CodeGen CodeGenModule.cpp CodeGenModule.h

[Clang][AIX] Add -mloadtime-comment-vars support to preserve variables in the final object file.
DeltaFile
+119-0clang/lib/CodeGen/CodeGenModule.cpp
+65-0clang/docs/LanguageExtensions.md
+61-0clang/test/CodeGen/loadtime-comment-vars.c
+13-8llvm/test/Transforms/LowerCommentString/lower-comment-string.ll
+18-0clang/lib/CodeGen/CodeGenModule.h
+12-0clang/test/CodeGen/PowerPC/loadtime-comment-mixed.c
+288-84 files not shown
+318-810 files

LLVM/project a7b974bllvm/test/CodeGen/AMDGPU v_swap_b16.mir schedule-regpressure-ilp-metric-spills.mir

Revert "[AMDGPU] Refactor some existing test files with true16/fake16 split, …"

This reverts commit bbbc24bc594959c4b268165c6d1a11d21cb02f52.
DeltaFile
+0-409llvm/test/CodeGen/AMDGPU/v_swap_b16.mir
+192-192llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
+0-227llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
+52-51llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
+0-102llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma-fake16.mir
+18-42llvm/test/CodeGen/AMDGPU/shrink-true16.mir
+262-1,0233 files not shown
+272-1,1469 files

LLVM/project bbbc24bllvm/test/CodeGen/AMDGPU v_swap_b16.mir schedule-regpressure-ilp-metric-spills.mir

[AMDGPU] Refactor some existing test files with true16/fake16 split, add some new test cases (#209890)
DeltaFile
+409-0llvm/test/CodeGen/AMDGPU/v_swap_b16.mir
+192-192llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
+227-0llvm/test/CodeGen/AMDGPU/llvm.ldexp.ll
+51-52llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
+102-0llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma-fake16.mir
+42-18llvm/test/CodeGen/AMDGPU/shrink-true16.mir
+1,023-2623 files not shown
+1,146-2729 files

LLVM/project 140b650llvm/test/CodeGen/AMDGPU load-constant-i1.ll, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.image.atomic.dim.a16.ll llvm.amdgcn.image.gather4.a16.dim.ll

[AMDGPU] Upstream True16 runlines for various tests
DeltaFile
+2,559-652llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
+1,270-764llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+1,253-322llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
+430-320llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.tfe.ll
+402-298llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.tfe.ll
+377-208llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
+6,291-2,56415 files not shown
+7,899-3,24421 files

LLVM/project 27ede4bllvm/test/CodeGen/AMDGPU vector-reduce-mul.ll llvm.floor.f16.ll

[AMDGPU] Clean up check prefixes and regenerate checklines for some tests that were out of date (#209889)
DeltaFile
+536-264llvm/test/CodeGen/AMDGPU/vector-reduce-mul.ll
+38-38llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
+25-25llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
+40-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
+37-2llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
+676-3315 files

LLVM/project 270842bllvm/include/llvm/ProfileData SampleProfReader.h, llvm/lib/ProfileData SampleProfReader.cpp

[ProfileData] Refactor SampleProfileNameTable into a polymorphic class hierarchy (NFC) (#210252)

This patch refactors SampleProfileNameTable into an abstract base
class with concrete derived classes like LazySampleProfileNameTable
and EagerSampleProfileNameTable.

The motivation is twofold:

- I want each derived class to focus on one data representation
  instead of using complex if-then-else.  Plus, I'm planning to
  introduce one more data representation [1].

- I want each class to be populated and ready for use as soon as it is
  constructed.  That is, there is no intermediate state like
  "constructed but waiting to be populated".

Now, you might notice that the iterator uses virtual operator[].  I
would argue that this is acceptable.  We have three places where we
iterate over the entire range of the name table entries.  Two of

    [8 lines not shown]
DeltaFile
+58-71llvm/include/llvm/ProfileData/SampleProfReader.h
+14-6llvm/lib/ProfileData/SampleProfReader.cpp
+72-772 files

LLVM/project 1c97f0cllvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV][P-ext] Custom legalize v4i16->v4i8 and v2i32->v2i16 truncate. (#210670)

Convert to a bitcast and a shufflevector.

Assisted-by: Claude
DeltaFile
+12-66llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+31-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+3-13llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+3-10llvm/test/CodeGen/RISCV/rvp-narrowing-shift-trunc.ll
+49-894 files

LLVM/project e8510cfllvm/test/TableGen subreg-index-overflow-allowed.td

[TableGen] Add sub-register overflow tests for exact-fit and non-covered registers (#210529)

Follow-up to #206346. Adds two cases the overflow check's companion test
missed: an exact-fit tiling that must be accepted, and a register
without `CoveredBySubRegs` that must be left alone. Test only.
DeltaFile
+29-2llvm/test/TableGen/subreg-index-overflow-allowed.td
+29-21 files

LLVM/project b74f72cllvm/test/Transforms/SLPVectorizer/AMDGPU ordered-reduction-fma-fusion.ll, llvm/test/Transforms/SLPVectorizer/NVPTX ordered-reduction-fma-fusion.ll

[NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (#210835)

Baseline coverage for an ordered fadd-of-fmul reduction that is
currently vectorized even on FMA-capable targets, breaking the scalar
fmul + fadd -> fma fusion. A follow-up teaches the reduction cost model
to account for the lost fusion and keep these reductions scalar, at
which point these CHECK lines update. Covers X86 avx2, AMDGPU gfx90a and
NVPTX sm_80.

It is a pre-requisite for
https://github.com/llvm/llvm-project/pull/210399

Assisted-By: Claude Opus 4.8
DeltaFile
+516-0llvm/test/Transforms/SLPVectorizer/AMDGPU/ordered-reduction-fma-fusion.ll
+123-0llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
+46-0llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
+685-03 files