LLVM/project b15b438llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/ARM atomic-load-store.ll

[AtomicExpand] Add bitcasts when expanding store atomic vector

AtomicExpand fails for aligned \`store atomic <n x T>\` because it
does not find a compatible library call. This change adds appropriate
ptrtoint + bitcast so that the call can be lowered, mirroring the
load-side handling from #148900.
DeltaFile
+99-6llvm/test/CodeGen/X86/atomic-load-store.ll
+98-0llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
+49-0llvm/test/CodeGen/ARM/atomic-load-store.ll
+4-2llvm/lib/CodeGen/AtomicExpandPass.cpp
+250-84 files

LLVM/project 48ba9b2llvm/include/llvm/Target TargetSelectionDAG.td, llvm/lib/Target/X86 X86InstrFragmentsSIMD.td X86InstrAVX512.td

[X86] Cast atomic vectors in IR to support floats

Extend the X86 \`alignedstore\` PatFrag to also match \`atomic_store\`
with vector-size alignment, so existing MOVAPS/MOVAPD/MOVDQA-family
aligned-store patterns cover 128-bit aligned vector atomic stores on
SSE/AVX/AVX-512 without per-type duplicates. \`<4 x float>\`,
\`<2 x double>\`, \`<2 x i64>\`, \`<4 x i32>\`, \`<8 x half>\`, \`<8 x bfloat>\`
all codegen to a single \`movaps\`/\`movapd\` on AVX+ via this.

Adds v8f16/v8bf16 bitconvert variants to the widen-path
\`atomic_store_32\` / \`atomic_store_64\` patterns so \`<2 x half>\`,
\`<2 x bfloat>\`, \`<4 x half>\`, \`<4 x bfloat>\` atomic stores reaching
the PR4 widen path also collapse to a single instruction on AVX+
targets.

Vectors whose \`getTypeAction\` is split rather than widen still rely
on PR6's \`SplitVecOp_ATOMIC_STORE\` — that path bitcasts the vector
to a scalar integer and issues an integer \`atomic_store_N\`, picked
up by the pre-existing scalar atomic-store patterns. The two

    [4 lines not shown]
DeltaFile
+92-12llvm/test/CodeGen/X86/atomic-load-store.ll
+5-4llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+1-1llvm/lib/Target/X86/X86InstrAVX512.td
+1-1llvm/include/llvm/Target/TargetSelectionDAG.td
+99-184 files

LLVM/project e0dca2bllvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp LegalizeTypes.h, llvm/test/CodeGen/X86 atomic-load-store.ll

[SelectionDAG] Split vector types for atomic store

Vector types that aren't widened are split so that a single ATOMIC_STORE
is issued for the entire vector at once. This enables SelectionDAG to
translate vectors with type bfloat,half.
DeltaFile
+450-0llvm/test/CodeGen/X86/atomic-load-store.ll
+20-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+471-03 files

LLVM/project a730eafllvm/lib/Target/X86 X86InstrSSE.td X86InstrAVX512.td, llvm/test/CodeGen/X86 atomic-load-store.ll atomic-unordered.ll

[X86] Remove extra MOV after widening atomic store

This change adds patterns to optimize out an extra MOV present after
widening the atomic store. Covers <2 x i8> (SSE4.1+), <2 x i16>,
<4 x i8>, <2 x i32>, <2 x float>, <4 x i16>, <2 x ptr addrspace(270)>.
DeltaFile
+47-64llvm/test/CodeGen/X86/atomic-load-store.ll
+30-24llvm/test/CodeGen/X86/atomic-unordered.ll
+10-10llvm/lib/Target/X86/X86InstrSSE.td
+6-6llvm/lib/Target/X86/X86InstrAVX512.td
+5-0llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+1-1llvm/lib/Target/X86/X86ISelLowering.cpp
+99-1056 files

LLVM/project 740f199llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp LegalizeTypes.h, llvm/test/CodeGen/X86 atomic-load-store.ll

[SelectionDAG] Widen <2 x T> vector types for atomic store

Vector types of 2 elements must be widened. This change does this
for vector types of atomic store in SelectionDAG so that it can
translate aligned vectors of >1 size.
DeltaFile
+198-0llvm/test/CodeGen/X86/atomic-load-store.ll
+56-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+255-03 files

LLVM/project 7027fd5mlir/docs PrivateNameObfuscation.md, mlir/include/mlir/TableGen PrivateName.h

strip op and pass names
DeltaFile
+164-0mlir/test/mlir-tblgen/private-name-obfuscation.td
+151-0mlir/docs/PrivateNameObfuscation.md
+144-0mlir/lib/TableGen/PrivateName.cpp
+75-0mlir/test/mlir-tblgen/private-pass-strip.td
+55-13mlir/tools/mlir-tblgen/PassGen.cpp
+68-0mlir/include/mlir/TableGen/PrivateName.h
+657-1320 files not shown
+890-3426 files

LLVM/project b527137mlir/docs PrivateNameObfuscation.md, mlir/include/mlir/TableGen PrivateName.h

strip op and pass names
DeltaFile
+144-0mlir/lib/TableGen/PrivateName.cpp
+125-0mlir/docs/PrivateNameObfuscation.md
+75-0mlir/test/mlir-tblgen/private-pass-strip.td
+74-0mlir/test/mlir-tblgen/private-name-obfuscation.td
+55-13mlir/tools/mlir-tblgen/PassGen.cpp
+68-0mlir/include/mlir/TableGen/PrivateName.h
+541-1320 files not shown
+758-3326 files

LLVM/project f5f4934llvm/lib/Target/AMDGPU AMDGPUCodeGenPrepare.cpp VOP3PInstructions.td, llvm/test/CodeGen/AMDGPU idot4-test.ll idot2-test.ll

[AMDGPU] Add dot product patterns with saturating add (clamp) (#187945)

Add pattern matching for dot product operations combined with saturating
add intrinsics (llvm.uadd.sat / llvm.sadd.sat). This enables the
compiler to generate dot instructions with the clamp modifier instead of
separate dot + saturating add instructions.

Fixes #182095

  ## Changes

- Added UDot2SatPat and SDot2SatPat TableGen pattern classes that match
uaddsat/saddsat with dot2 computations
- Added performSatAddCombine DAG combiner function to handle
ISD::UADDSAT and ISD::SADDSAT nodes
  - Added test file idot2-sat.ll

  ## Example


    [16 lines not shown]
DeltaFile
+944-0llvm/test/CodeGen/AMDGPU/idot4-test.ll
+515-0llvm/test/CodeGen/AMDGPU/idot2-test.ll
+149-0llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+47-4llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+1,655-44 files

LLVM/project 68a1a83clang/test/CXX/drs cwg7xx.cpp, clang/www cxx_dr_status.html

Revert "[clang][NFC] Mark CWG717 as implemented and add a test (#197732)" (#198074)

As reported in #197930, these new tests fail on the
`arm64-apple-darwin-unknown` target. There's not a consensus yet on how
to fix the breakage, so revert it until we can decide.
DeltaFile
+0-36clang/test/CXX/drs/cwg7xx.cpp
+1-1clang/www/cxx_dr_status.html
+1-372 files

LLVM/project d6fe581clang/test/CXX/drs cwg7xx.cpp, clang/www cxx_dr_status.html

Revert "[clang][NFC] Mark CWG717 as implemented and add a test (#197732)"

This reverts commit f4528cc84fd75e6fd540e524c6349a5de07a31e0.
DeltaFile
+0-36clang/test/CXX/drs/cwg7xx.cpp
+1-1clang/www/cxx_dr_status.html
+1-372 files

LLVM/project 199e750mlir/include/mlir/Dialect/SPIRV/IR SPIRVGraphOps.td

[mlir][spirv] Remove ConstantLike trait from spirv.ARM.GraphConstant (#198054)

Operations with the `ConstantLike` trait can always be folded into a
concrete attribute value. However, the `spirv.ARM.GraphConstant` op
cannot be folded, because its GraphConstantID is merely a unique
identifier used to map to the actual constants defined in the SPIR-V
module. Therefore, the `ConstantLike` trait should be removed from
`pirv.ARM.GraphConstant`. Fixes #197970.
DeltaFile
+1-1mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGraphOps.td
+1-11 files

LLVM/project 6ea6d51llvm/tools/llvm-ir2vec/lib Utils.cpp IRUtils.cpp

[llvm-ir2vec] Breaking up llvm-ir2vec lib implementation to clean up MIR deps from ir2vec python bindings (#194414)

The Python bindings only expose IR2Vec functionality. MIR2Vec has no
Python API. However, the single `LLVMEmbUtils` library bundled both
IR2VecTool and MIR2VecTool, causing CodeGen and Target components to be
linked into the nanobind module unnecessarily.

This patch splits the library along that boundary. LLVMIREmbUtils covers
IR2Vec and is linked by both the CLI tool and the Python bindings.
LLVMMIREmbUtils covers MIR2Vec and is linked only by the CLI tool.
Result: Python wheel size reduces from ~14 MB to ~4 MB.
DeltaFile
+0-494llvm/tools/llvm-ir2vec/lib/Utils.cpp
+271-0llvm/tools/llvm-ir2vec/lib/IRUtils.cpp
+236-0llvm/tools/llvm-ir2vec/lib/MIRUtils.cpp
+0-232llvm/tools/llvm-ir2vec/lib/Utils.h
+119-0llvm/tools/llvm-ir2vec/lib/IRUtils.h
+108-0llvm/tools/llvm-ir2vec/lib/MIRUtils.h
+734-7266 files not shown
+818-74612 files

LLVM/project 1ae6f8dllvm/test CMakeLists.txt, llvm/tools/llvm-ir2vec/Bindings requirements.txt

[llvm-ir2vec] Setting up ir2vec python bindings testing for ml-opt bots (#194593)

- ~We are enabling IR2Vec Python binding tests in the LLVM monolithic
Linux CI by adding -D LLVM_IR2VEC_ENABLE_PYTHON_BINDINGS=ON to
monolithic-linux.sh.~

- We're adding testing for ir2vec python bindings with the ml-opt
buildbots. To that end, we need to add pip install requirements, and
other relevant flags to make way for a seamless warning-free llvm build.

The following changes are being done here
- Adding a requirements.txt file, putting out an explicit nanobind
requirement.
- Adding the option for downstream users to test bindings as part of the
`check llvm` umbrella, by passing the appropriate bindings flag
- Suppressing warnings from the nanobind headers, in order to ensure a
seamless llvm cI build
DeltaFile
+4-0llvm/test/CMakeLists.txt
+2-0llvm/tools/llvm-ir2vec/Bindings/requirements.txt
+6-02 files

LLVM/project 81fa937llvm/lib/CodeGen InlineSpiller.cpp

Refactoring based on reviewer suggestion.
DeltaFile
+19-29llvm/lib/CodeGen/InlineSpiller.cpp
+19-291 files

LLVM/project a1d40ddclang-tools-extra/clang-tidy/bugprone UseAfterMoveCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix false positives about reinitialization detection in `bugprone-use-after-move` (#197438)

When calling base class's `operator=` through derived object, a implicit
cast with `UncheckedDerivedToBase` will be generated:
```
void foo() {
  Base b;
  Derived d;
  std::move(d);
  d = b;
}
```
AST for `d = b`'s `d`:  
```
        |-ImplicitCastExpr <col:3> 'GH62206::Base' lvalue <UncheckedDerivedToBase (Base)>
        | `-DeclRefExpr <col:3> 'Derived' lvalue Var 0x1d11a400 'd' 'Derived'
```

This patch considers possible `implicitCastExpr` in the reinit matcher,

    [8 lines not shown]
DeltaFile
+24-0clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
+2-1clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
+3-0clang-tools-extra/docs/ReleaseNotes.rst
+29-13 files

LLVM/project 25ad067llvm/lib/CodeGen PHIElimination.cpp, llvm/test/CodeGen/X86 phi-elim-undef-livevars.mir coalescer-copy-from-erasable-implicit-def.ll

[PHIElimination] Clear stale LiveVariables AliveBlocks for undef PHI sources (#197764)

When PHI Elimination lowers a PHI with an undef source (e.g. from an
`IMPLICIT_DEF),` it skips the LiveVariables kill/AliveBlocks update
because the value is undefined. However, the source register's
AliveBlocks may still mark intermediate blocks as live-through from its
definition to the (now eliminated) PHI use. This causes MachineVerifier
failures in EXPENSIVE_CHECKS builds.

Fix by calling `recomputeForSingleDefVirtReg` on undef source registers
when their last PHI use on a CFG edge is eliminated, which correctly
clears the stale AliveBlocks entries.

Fixes the EXPENSIVE_CHECKS failure introduced by #196895.
DeltaFile
+75-0llvm/test/CodeGen/X86/phi-elim-undef-livevars.mir
+8-0llvm/lib/CodeGen/PHIElimination.cpp
+1-1llvm/test/CodeGen/X86/coalescer-copy-from-erasable-implicit-def.ll
+84-13 files

LLVM/project e6566c5clang/lib/Parse ParseOpenACC.cpp, clang/test/ParserOpenACC gh197858.cpp

[OpenACC] Fix invalid using inside of an openacc directive (#198058)

Bug report #197858 comes up with a reproducer where an invalid `using`
declaration checks the Scope it is in, and asserts if it isn't in a
DeclScope. Since all of the important directives that create scopes end
up causing a new scope anyway, this patch adds 'DeclScope' to the parse
scope for an OpenACC directive. This follows the guidance of the OpenMP
directives.

Fixes: #197858
DeltaFile
+10-0clang/test/ParserOpenACC/gh197858.cpp
+3-3clang/lib/Parse/ParseOpenACC.cpp
+13-32 files

LLVM/project 319a501offload/plugins-nextgen/common CMakeLists.txt

[Offload] Fix missing dependency on generated OffloadAPI headers (#198055)

Summary:
These are included in the plugins but not a dependency

Fixes: https://github.com/llvm/llvm-project/issues/196690
DeltaFile
+1-1offload/plugins-nextgen/common/CMakeLists.txt
+1-11 files

LLVM/project 82bc7ddclang/lib/AST/ByteCode Program.cpp Interp.cpp, clang/test/AST/ByteCode records.cpp

[clang][bytecode] Fix wrong 'never produces a constant expression' diagnostic with static data members (#197881)

They can be initialized later, similar to extern variables.
DeltaFile
+8-11clang/lib/AST/ByteCode/Program.cpp
+9-2clang/lib/AST/ByteCode/Interp.cpp
+10-0clang/test/AST/ByteCode/records.cpp
+27-133 files

LLVM/project e6cd5d3clang-tools-extra/clang-doc YAMLGenerator.cpp

[clang-doc][nfc] Use static declarations to enforce internal linkage
DeltaFile
+2-2clang-tools-extra/clang-doc/YAMLGenerator.cpp
+2-21 files

LLVM/project fc9cbe0clang-tools-extra/clang-doc Serialize.cpp

[clang-doc][nfc] Silence tidy warning about anonymous namespace

clang-tidy complains that we should prefer static over the anonymous
namespace, despite the API being static in addition to being in the
anonymous namespace. We can silence the diagnostic by simply removing
the namespace declaration.
DeltaFile
+0-2clang-tools-extra/clang-doc/Serialize.cpp
+0-21 files

LLVM/project 9c96578clang-tools-extra/clang-doc Representation.cpp YAMLGenerator.cpp

[clang-doc][nfc] Prefer range based APIs
DeltaFile
+2-2clang-tools-extra/clang-doc/Representation.cpp
+2-1clang-tools-extra/clang-doc/YAMLGenerator.cpp
+4-32 files

LLVM/project 8fb34c0clang-tools-extra/clang-doc Serialize.cpp

[clang-doc][nfc] Declare pointer with auto explicitly

This silences some errors from clang-tidy.
DeltaFile
+6-6clang-tools-extra/clang-doc/Serialize.cpp
+6-61 files

LLVM/project dd01825clang-tools-extra/clang-doc ClangDoc.cpp YAMLGenerator.cpp

[clang-doc] Use explicit for single param constructors

This trips up some clang-tidy checks, so add the explicit keyword as
needed to satisfy the lints.
DeltaFile
+2-2clang-tools-extra/clang-doc/ClangDoc.cpp
+2-2clang-tools-extra/clang-doc/YAMLGenerator.cpp
+1-1clang-tools-extra/clang-doc/BitcodeWriter.cpp
+1-1clang-tools-extra/clang-doc/Serialize.cpp
+6-64 files

LLVM/project c1a6e38clang-tools-extra/clang-doc BitcodeWriter.cpp BitcodeWriter.h

[clang-doc] Clean up inconsistent namespace usage in BitcodeWriter

Typically we forgo prefixing things with clang::doc or llvm:: unless
they overlap with something in std::, like `to_underlying()`. We also
group things to avoid non-internal symbols by placing types in the
anonymous namespace, and more logically grouping things that don't need
to be in the clang::doc namespace.
DeltaFile
+56-61clang-tools-extra/clang-doc/BitcodeWriter.cpp
+2-3clang-tools-extra/clang-doc/BitcodeWriter.h
+58-642 files

LLVM/project b17ab41clang-tools-extra/clang-doc BitcodeWriter.cpp BitcodeWriter.h

[clang-doc] Use const and constexpr arrays in BitcodeWriter

We have three static data structures in the BitcodeWriter implementation
that all use std::vector. Instead, we can make them constant arrays.
These data structures and their types are also not in the anonymous
namespace, so just move these helpers out of the clang::doc namespace
and improve the hygiene since we're changing the code anyway.
DeltaFile
+88-70clang-tools-extra/clang-doc/BitcodeWriter.cpp
+1-1clang-tools-extra/clang-doc/BitcodeWriter.h
+89-712 files

LLVM/project a140313libc/src/stdlib qsort_data.h

[libc] Make cpp::byte alias-safe (#194171)

Change LIBC_NAMESPACE::cpp::byte from an enum-backed type to unsigned
char so libc’s raw-memory utilities and sorting code can legally access
object representations without violating C++ strict-aliasing rules.
DeltaFile
+15-14libc/src/stdlib/qsort_data.h
+15-141 files

LLVM/project c45cd10llvm/include/llvm/Analysis MemoryBuiltins.h, llvm/include/llvm/IR InstrTypes.h

[MemoryBuiltins] Capture more information for alloc/free from attributes

We now read the `alloc_align` attribute to provide better alignment
information to users. `alloc-family` should be used as well, as
described in the LangRef. Two new helpers provide argument numbers,
rather than values.
DeltaFile
+14-19llvm/lib/Analysis/MemoryBuiltins.cpp
+10-3llvm/lib/IR/Instructions.cpp
+5-0llvm/include/llvm/Analysis/MemoryBuiltins.h
+4-0llvm/include/llvm/IR/InstrTypes.h
+33-224 files

LLVM/project 874420dflang/lib/Optimizer/HLFIR/Transforms OptimizedBufferization.cpp, flang/test/HLFIR opt-bufferization-skip-volatile.fir

[flang] Recognize effects on non-addressable resources in opt-bufferization.

opt-bufferization has been only handling `fir::DebuggingResource`
explicitly. This patch adds support for other non-addressable
resources, such as `fir::VolatileMemoryResource`. This allows
merging elemental/assign for the `volatile_src_nonvolatile_dst`
example in the updated LIT test.
DeltaFile
+115-22flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
+6-8flang/test/HLFIR/opt-bufferization-skip-volatile.fir
+121-302 files

LLVM/project 88459c7flang/include/flang/Optimizer/Dialect FIROps.td, flang/test/HLFIR opt-bufferization-skip-volatile.fir

[flang] Pass-through fir.volatile_cast in FIR AliasAnalysis.

It should be safe to pass-through `fir.volatile_cast` for the purpose
of alias analysis. The missing pass-through prevented optimization
of the `nonvolatile_src_volatile_dst` test (see updated LIT test).
DeltaFile
+98-4flang/test/HLFIR/opt-bufferization-skip-volatile.fir
+12-1flang/include/flang/Optimizer/Dialect/FIROps.td
+110-52 files