[X86] Verify inline-asm register operands against the subtarget
Inline asm can name physical registers that require a subtarget feature
the selected subtarget lacks: zmm and mask (k) registers need AVX-512,
ymm registers need AVX. The subtarget is derived from the function's
target-cpu/target-features, so no MachineFunction is required.
Fix Windows Path Separator issues in create_symlink and readlink (#206665)
- Force create_symlink target path to use backslashes on Windows, as
NTFS reparse points require backslashes.
- Normalize readlink output to native path separators to match preferred
style.
This fixes the following test failure:
```
PS C:\src\chromium\src\third_party\llvm> .\build_repro\unittests\Support\SupportTests.exe --gtest_filter=FileSystemTest.CreateRelativeDirectorySymlink
[ RUN ] FileSystemTest.CreateRelativeDirectorySymlink
Test Directory: C:/src/temp/file-system-test-a3fd42
C:\src\chromium\src\third_party\llvm\llvm\unittests\Support\Path.cpp(896): error: Value of: fs::is_directory(Link) Actual: false
Expected: true
```
[AsmMatcher] Report a near-miss when all candidates mismatch multiple operands (#206390)
In the ReportMultipleNearMisses path, an opcode that mismatches more
than one operand is dropped, and its first near-miss is dropped with it. If
every opcode is dropped this way, the parser only reports a generic
"invalid instruction".
Now keep the first near-miss of each such opcode, and use it only when
no other opcode gives a near-miss.
Assisted-by: claude-opus
[TargetParser][NFC] Make FeatureBitset iterable (#206394)
FeatureBitset had no way to iterate its bits, so callers scanned all
MAX_SUBTARGET_FEATURES positions by hand.
This adds begin()/end() that yield the index of each set bit, skipping
unset bits with countr_zero.
Callers can now write `for (unsigned Feature: Features)`.
Assisted-by: claude-opus
[lldb][test] Skip more unsupported tests on WebAssembly (#206857)
These tests exercise functionality that WebAssembly does not provide, so
they cannot pass under the Wasm test configuration. The reasons vary by
test, captured by a short inline comment.
Skip them with @skipIfWasm (and @skipIfNoSignals for the SIGINT test) so
the suite reflects real failures.
[clang][llvm]Uncorrelate CFI and Callgraph related type metadata annotations (#204266)
When -fexperimental-call-graph-section flag is set, it adds type
metadata to all the functions whose addresses are taken and does not
have local linkage. When this flag is set along with CFI, the type
metadata is added to all the vtable functions including destructors.
This changes which functions are to be treated as CFI functions and
includes such vtable entries to become part of the CFI check jumptables.
To disambiguate intentions of CFI and callgraph mechanisms, this patch
renames metadata set by callgraph mechanism to !callgraph
(MD_callgraph). This prevents inflating the list of CFI functions when
callgraph section is enabled along with CFI.
Reland: [LoongArch] Custom scalar UINT_TO_FP and FP_TO_UINT with LSX instructions (#206655)
Using `vftintrz.lu.d` for converting scalar double/float values to
unsigned 64-bit integers, and `vffint.d.lu` vice versa.
Remove incorrect uint64 to float conversion, which is suffered
from double-rounding issue.
[LoongArch] Support ISD::SET_ROUNDING (llvm.set.rounding) (#206395)
Fix https://github.com/llvm/llvm-project/issues/205039.
The LoongArch FCSR RM field supports four rounding modes, whose
encodings differ from LLVM's rounding mode values:
FCSR: 0=RNE, 1=RZ, 2=RP, 3=RM
LLVM: 0=RTZ, 1=RNE, 2=RUP, 3=RDN
For LLVM rounding mode 4, round to nearest with ties away from zero,
diagnose an error when it is a constant.
---------
Co-authored-by: tangyuan0821 <tangyuan0821 at email.cn>
[AMDGPU] Introduce ABI occupancy for object linking
This PR introduces ABI occupancy as the contract used to compile functions under
object linking. The default is derived from the occupancy needed for a 1024
workitem workgroup, can be overridden with `-amdgpu-abi-waves-per-eu`, and can
be overridden per function by `amdgpu-flat-work-group-size` or tightened by an
accepted `amdgpu-waves-per-eu` hint.
The backend emits the selected occupancy in `.amdgpu.info` and uses it to
enforce the object linking register budget.
[RFC][AMDGPU][lld] Add object linking support
Add AMDGPU ELF object-linking support in lld, including resource propagation,
LDS layout, indirect-call handling, named-barrier updates, target compatibility
checks, and kernel descriptor/metadata patching.
This is a large PR because the linker needs to understand and validate several
AMDGPU object-linking concepts end to end. I tried to keep the changes scoped to
the necessary linker support and related metadata plumbing, but I'm open to
suggestions on how to split or structure the review to make it easier.
[HLSL] Enable conversion of ConstantBuffer<T> to T (#205996)
HLSL allows assigning a `ConstantBuffer<T>` to an object of type `T`.
This change adds support for this.
Fixes #195093
[libc++][test][NFC] Remove implementation-detail noise from _BitInt test comments (#206666)
Several `_BitInt` test comments named the builtin the code lowers to,
restated macro equivalences, or pointed at another test file's
internals. They read as machine-generated and do not help a reader. This
rewords them across the `_BitInt` tests touched by #203876, where the
pattern was flagged in review.
Assisted-by: Claude (Anthropic)
Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
[lldb] Create a BSS section for WebAssembly object files (#206840)
Zero-initialized globals (BSS) live in a module's linear memory above
the initialized data segments, but wasm-ld emits no data segment for
them, so ObjectFileWasm created no section covering their addresses.
Reading those global without a running process fails with "unable to
resolve the module for file address", because the address resolved to no
section. Live reads did work because they go through process memory.
Synthesize a zero-fill section spanning from the end of the initialized
data to the linear memory's minimum size, and map it into linear memory
like the data segments. Live reads keep going through process memory
while zero-fill reads return zero.
[lldb][Windows] Fix "Invalid register name" for eax on x86_64 attach (#203498)
On Windows, when attaching to a process with no pre-existing target,
lldb reports "Invalid register name" for sub-registers like eax.
This is due to a bug in `ABIX86::AugmentRegisterInfo`, which determines
the GPR base size by reading
`Target::GetArchitecture().GetAddressByteSize()`. During attach, the
target's architecture has not yet been set when `AugmentRegisterInfo`
runs, so the lookup returns 0, the process is treated as 32-bit, and the
x86_64 sub-registers are never added.
This patch removes the dependency on the target's architecture: the X86
ABI plugins already know their own bitness, so `ABIX86_64` and
`ABIX86_i386` now report it directly via a new `Is64Bit()` virtual.
This patch fixes
`TestRegisters::test_convenience_registers_with_process_attach` and
`TestRegisters::test_convenience_registers_16bit_with_process_attach` on
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[flang][openacc] Fix DEFAULT(NONE) errors for array sections (#204248)
ResolveAccObject skipped DSA registration when
GetDesignatorNameIfDataRef returned nullptr (i.e. for subscripted
designators like copyin(a(1:n))). The DEFAULT(NONE) post-visitor then
found the base variable unregistered and emitted a false error even
though it was explicitly listed in a data clause.
Unify the path using GetFirstName, which extracts the base symbol from
both bare data references and array sections. Continue not registering component references. This will need to be followed up with more accurate designator checking in the near future.
