LLVM/project 80ae4e5llvm/tools/llvm-profgen ProfiledBinary.cpp ProfiledBinary.h

[llvm-profgen] Read build ID from binary for perfscript address filtering (#190862)

For shared libraries (.so), read the binary's build ID during load()
using object::getBuildID() and store it as FilterBuildID. Main
executables keep FilterBuildID empty, matching the convention that
their perfscript addresses have no buildid prefix.

This enables automatic build ID-based filtering of perfscript
addresses in [buildid:]0xaddr format without requiring a CLI option.
DeltaFile
+17-0llvm/tools/llvm-profgen/ProfiledBinary.cpp
+14-0llvm/tools/llvm-profgen/ProfiledBinary.h
+31-02 files

LLVM/project 1035389bolt/lib/Profile DataAggregator.cpp CMakeLists.txt, bolt/test/X86 pre-aggregated-perf-shlib.test

[BOLT] Use identify_magic for shared library detection (#190902)

Replace the fragile filename-based check (ends_with(".so")) with
identify_magic()/file_magic::elf_shared_object to reliably detect
shared libraries when filtering pre-aggregated profile data by
build ID.

Test Plan: pre-aggregated-perf-shlib.test
DeltaFile
+75-0bolt/test/X86/pre-aggregated-perf-shlib.test
+5-1bolt/lib/Profile/DataAggregator.cpp
+1-0bolt/lib/Profile/CMakeLists.txt
+81-13 files

LLVM/project e300318orc-rt/include/orc-rt Session.h, orc-rt/unittests SessionTest.cpp

[orc-rt] Add Session::attach convenience overload. (#191199)

This overload enables one-line attach in the common case where the
ControllerAccess implementation does not require any configuration after
construction.
DeltaFile
+12-0orc-rt/include/orc-rt/Session.h
+3-6orc-rt/unittests/SessionTest.cpp
+15-62 files

LLVM/project c1b169bclang/lib/Headers/hlsl hlsl_alias_intrinsics.h, llvm/test/tools/llvm-mca/RISCV/SiFiveX390 vector-fp.s

rebase

Created using spr 1.3.4
DeltaFile
+0-4,851llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-fp.s
+4,526-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/arithmetic.test
+4-3,871clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+3,706-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fp.test
+3,126-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlseg-vsseg.test
+2,878-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/bitwise.test
+14,240-8,722930 files not shown
+63,964-31,550936 files

LLVM/project 494f43dclang/lib/Headers/hlsl hlsl_alias_intrinsics.h, llvm/test/tools/llvm-mca/RISCV/SiFiveX390 vector-fp.s

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]
DeltaFile
+0-4,851llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-fp.s
+4,526-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/arithmetic.test
+4-3,871clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+3,706-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fp.test
+3,126-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlseg-vsseg.test
+2,878-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/bitwise.test
+14,240-8,722930 files not shown
+63,964-31,550936 files

LLVM/project fda5671llvm/docs CompileCudaWithLLVM.rst

[Docs, CUDA] Update cuda compilation docs (#191271)
DeltaFile
+29-24llvm/docs/CompileCudaWithLLVM.rst
+29-241 files

LLVM/project 5f27de8clang/lib/CIR/CodeGen CIRGenDecl.cpp CIRGenFunction.cpp, clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

[CIR] Implement variable size array cleanup (#191247)

This implements partial array destruction for variable sized arrays. The
cir.array.dtor operation already had support for variable length, so
this change only needs to add the variable handling in
`emitArrayDestroy` and `emitArrayLength`.

Assisted-by: Cursor / claude-4.6-opus-high
DeltaFile
+499-0clang/test/CIR/CodeGen/partial-array-cleanup.cpp
+27-32clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+34-4clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+0-2clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+560-384 files

LLVM/project 67ff769clang/include/clang/Basic DiagnosticLexKinds.td, clang/include/clang/Lex HeaderSearch.h

[clang][modules] Add warning for symlinks to modular headers (#188059)

Symlinks that are not covered by a module that point to a header owned
by a module create situations where if a header is owned by a module
depends on which headers were included prior.

This adds a diagnostic for such cases when they can be detected, and
informs the user to use a textual forwarding header instead.

This bypasses Clang's FileManager and VFS as they don't know about
symlinks. The diagnostic is worded as "may" because of this.
DeltaFile
+130-38clang/lib/Lex/HeaderSearch.cpp
+98-0clang/test/Modules/symlink-to-modular-header.c
+11-0clang/lib/Lex/ModuleMap.cpp
+11-0clang/include/clang/Lex/HeaderSearch.h
+7-0clang/include/clang/Basic/DiagnosticLexKinds.td
+257-385 files

LLVM/project 6b2c2fellvm/utils/lit/lit TestTimes.py, llvm/utils/lit/tests malformed-test-times.py

[llvm-lit] Ignore malformed `.lit_test_times` entries

When running `llvm-lit`, I sometimes hit a traceback, because a
`.lit_test_times.txt` file has got corrupted (not sure how).
However, it's non-obvious what the issue is (you just get a traceback),
so I've fixed this as follows:

`read_test_times()` currently assumes every line in .lit_test_times.txt
contains a floating-point time followed by a test path. If the file
contains a blank line, a line without a path, or a non-numeric time,
lit raises during discovery instead of skipping the bad entry.

Fix this by parsing each line defensively. Split once, ignore lines
that do not produce both fields, and ignore entries whose time cannot
be parsed as a float. This keeps the existing behavior for valid lines
while making malformed timing files non-fatal.

Add a new `malformed-test-times.py` regression test and a checked-in
lit_test_times fixture containing both valid and malformed entries. The

    [3 lines not shown]
DeltaFile
+12-0llvm/utils/lit/tests/malformed-test-times.py
+8-2llvm/utils/lit/lit/TestTimes.py
+7-0llvm/utils/lit/tests/Inputs/malformed-test-times/lit.cfg
+5-0llvm/utils/lit/tests/Inputs/malformed-test-times/lit_test_times
+1-0llvm/utils/lit/tests/Inputs/malformed-test-times/b.txt
+1-0llvm/utils/lit/tests/Inputs/malformed-test-times/a.txt
+34-26 files

LLVM/project 92d3a1dllvm/test/Transforms/SLPVectorizer/RISCV revec-strided-load.ll

[NFC][SLP] Add tests for revectorization of strided loads (#191293)

Demonstrates bug in SLP when handling re-vectorization, see #191292
DeltaFile
+116-0llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
+116-01 files

LLVM/project 47107a7clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/lib/Sema SemaARM.cpp

[AArch64][clang] Fix `__arm_atomic_store_with_stshh` ordering and lowering

`__builtin_arm_atomic_store_with_stshh` must satisfy two constraints:
  - preserve release/seq_cst ordering in LLVM IR
  - keep `stshh` immediately adjacent to the final store in codegen

The original target-intrinsic lowering preserved the final `stshh` + store
sequence, but it did not model ordering strongly enough in LLVM IR, so the
optimizer could sink earlier stores across the builtin.

Fix this by inserting a `release` or `seq_cst` fence before the intrinsic
call. This preserves ordering in optimized IR while still letting the
backend emit the required final instruction sequence. This means we now
get a `dmb ish` instruction before the `stshh` instruction.

Also relax Sema for the builtin to accept storing 8/16/32/64-bit
floating-point and pointer values in addition to integers, and update
the diagnostic text accordingly.


    [5 lines not shown]
DeltaFile
+38-0clang/test/CodeGen/AArch64/pcdphint-atomic-store.c
+37-0clang/test/CodeGen/AArch64/pcdphint-atomic-store-order.c
+28-5clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+13-5clang/test/Sema/AArch64/pcdphint-atomic-store.c
+13-0llvm/test/CodeGen/AArch64/pcdphint-atomic-store.ll
+4-1clang/lib/Sema/SemaARM.cpp
+133-111 files not shown
+134-127 files

LLVM/project e38801bclang/lib/Driver ModulesDriver.cpp, clang/test/Driver modules-driver-clang-modules-only.cpp modules-driver-manifest-input-args.cpp

Reapply "[clang][ModulesDriver] Add support for Clang modules to -fmodules-driver" (#191258)

This relands #187606 (reverted with #191122).

In the initial PR, the Clang module precompile jobs were created as
`CC1Command` objects instead of regular `Command` objects, which
introduced a memory leak.
(See discussion in https://reviews.llvm.org/D74447)

This has been fixed in this reland.
DeltaFile
+127-0clang/test/Driver/modules-driver-clang-modules-only.cpp
+57-27clang/lib/Driver/ModulesDriver.cpp
+7-9clang/test/Driver/modules-driver-manifest-input-args.cpp
+191-363 files

LLVM/project 3c5e03bllvm/test/CodeGen/SystemZ zos-symbol-2.ll

Extend test
DeltaFile
+24-10llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
+24-101 files

LLVM/project 4a5e9fallvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rv64p.ll rv32p.ll

[RISCV][P-ext] Recognize (select (X >u ((1 << C) - 1), sext(X >s -1), trunc(X)) as usati (#190810)

Where the result is a type with C bits. The unsigned compare on the
select treats negative values as large positive values so any value
that isn't in the range [0, (1 << C) - 1] will use the True operand
of the select. The sext(X >s -1) creates all ones for positive values
of X and 0 for negative values of X.

This pattern appears in the picojpeg workload of embench-iot with
an i8 result type.

Assisted-by: Claude Sonnet 4.5
DeltaFile
+230-0llvm/test/CodeGen/RISCV/rv64p.ll
+95-0llvm/test/CodeGen/RISCV/rv32p.ll
+68-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+393-03 files

LLVM/project 7b73b23clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp Type.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

Readds a few test cases from da98651

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+473-44clang/lib/AST/ASTContext.cpp
+78-12clang/test/SemaTemplate/instantiation-dependence.cpp
+41-7clang/include/clang/AST/ASTContext.h
+44-0clang/test/SemaTemplate/injected-class-name.cpp
+28-16clang/lib/Sema/SemaTemplate.cpp
+25-16clang/lib/AST/Type.cpp
+689-9521 files not shown
+836-13227 files

LLVM/project e8e8552llvm/include/llvm/Analysis BlockFrequencyInfoImpl.h BranchProbabilityInfo.h, llvm/include/llvm/CodeGen MachineBranchProbabilityInfo.h

[Analysis][NFC] Remove BPI::getEdgeProbability(iterator) (#191286)

Now that successor iterators are Use iterators, it is no longer cheap to
get the successor index. Replace uses with the variant that takes the
successor index, which in all cases is easily available.

This is primarily cleanup after the somewhat recent successor changes.
There's also a minor (barely measurable) performance improvement here.
DeltaFile
+12-12llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
+5-5llvm/lib/CodeGen/MachineBranchProbabilityInfo.cpp
+3-5llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
+0-6llvm/lib/Analysis/BranchProbabilityInfo.cpp
+0-3llvm/include/llvm/Analysis/BranchProbabilityInfo.h
+1-1llvm/lib/CodeGen/MIRSampleProfile.cpp
+21-326 files

LLVM/project f29dbd7llvm/include/llvm/ADT PostOrderIterator.h

[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+28-19llvm/include/llvm/ADT/PostOrderIterator.h
+28-191 files

LLVM/project 6010425clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp Type.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

Readds a few test cases from da98651

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+473-44clang/lib/AST/ASTContext.cpp
+78-12clang/test/SemaTemplate/instantiation-dependence.cpp
+41-7clang/include/clang/AST/ASTContext.h
+28-16clang/lib/Sema/SemaTemplate.cpp
+44-0clang/test/SemaTemplate/injected-class-name.cpp
+25-16clang/lib/AST/Type.cpp
+689-9521 files not shown
+835-13227 files

LLVM/project a085299llvm/test/CodeGen/SystemZ zos-section-1.ll zos-section-2.ll

Update tests
DeltaFile
+42-50llvm/test/CodeGen/SystemZ/zos-section-1.ll
+27-35llvm/test/CodeGen/SystemZ/zos-section-2.ll
+69-852 files

LLVM/project 691a130clang/include/clang/Analysis/Analyses PostOrderCFGView.h, clang/lib/Analysis PostOrderCFGView.cpp

[ADT] Refactor post order traversal (#191047)

Currently, po_iterator holds the traversal state. This makes copying
and moving po_iterator fairly expensive and the code cannot be optimized
away in several cases (most of it isn't even inlined in a default
build).

Therefore, refactor post-order traversal to hold the state in a wrapper
class with cheap iterators. Additionally, replace po_storage base class
with a CRTP implementation where users can provide their own storage.

Benefits:

- Performance in stage2-O3 improves by 0.19% instructions:u and even
  more substantially in cycles/wall-time.

- Users that use a custom storage/iteration limitation can do so in a
  more clean way by subclassing PostIteratorTraversalBase. See e.g.
  LoopBlocksTraversal.

    [15 lines not shown]
DeltaFile
+160-206llvm/include/llvm/ADT/PostOrderIterator.h
+16-42llvm/include/llvm/Analysis/LoopIterator.h
+9-47llvm/unittests/ADT/PostOrderIteratorTest.cpp
+0-52clang/include/clang/Analysis/Analyses/PostOrderCFGView.h
+33-5clang/lib/Analysis/PostOrderCFGView.cpp
+14-12mlir/include/mlir/IR/Iterators.h
+232-3647 files not shown
+263-38813 files

LLVM/project 7a186dallvm/include/llvm/CodeGen SelectionDAG.h, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp TargetLowering.cpp

[SelectionDAG] Replace `isKnownNeverZeroFloat` with `isKnownNeverLogicalZero` using `KnownFPClass` (#190621)

In so doing, this also corrects miscompiles caused by
`isKnownNeverZeroFloat` mishandling denormals in DAZ floats.
DeltaFile
+186-0llvm/test/CodeGen/X86/fminimum-fmaximum.ll
+14-8llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+1-14llvm/test/CodeGen/X86/nofpclass.ll
+9-3llvm/include/llvm/CodeGen/SelectionDAG.h
+6-6llvm/lib/Target/X86/X86ISelLowering.cpp
+5-5llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+221-362 files not shown
+227-428 files

LLVM/project 3106002llvm/include/llvm/DebugInfo/Symbolize SymbolizableObjectFile.h, llvm/lib/DebugInfo/Symbolize SymbolizableObjectFile.cpp

SymbolizableOjbectFile: Convert Wasm file offset to section offset for DWARF (#191068)

Wasm's object and linking format lacks virtual addresses like ELF et al.
As a result, linked files generally use file offsets as "addresses",
whereas
objects and DWARF sections use code section offsets.
This has led to incorrect interpretation of addresses in llvm-objdump
and llvm-symbolizer for linked files.

This change to SerializableObjectFile checks the input ModuleOffset, and
if it falls within a wasm code section, adjusts it to a section offset
before querying the DwarfContext. (For object files, Sec.getAddress() is
0 so it works for object files too). It extends the existing DWARF test
for llvm-symbolizer to include a linked file, and also adds an
equivalent for objdump.

Fixes #129523
DeltaFile
+74-0llvm/test/tools/llvm-objdump/wasm/line-numbers.s
+21-11llvm/test/tools/llvm-symbolizer/wasm-basic.s
+23-3llvm/lib/DebugInfo/Symbolize/SymbolizableObjectFile.cpp
+7-0llvm/include/llvm/DebugInfo/Symbolize/SymbolizableObjectFile.h
+4-0llvm/test/tools/llvm-symbolizer/lit.local.cfg
+4-0llvm/test/tools/llvm-objdump/lit.local.cfg
+133-146 files

LLVM/project 5439c31llvm/docs ProgrammersManual.rst, llvm/include/llvm/Support Error.h

Revert "[LLVM][Support] add nonNull function helper (#188718)"

This reverts commit 9e428b7e41ee891cddc911fb70bc23b4997e1d9b.
DeltaFile
+0-38llvm/unittests/Support/ErrorTest.cpp
+0-23llvm/include/llvm/Support/Error.h
+0-9llvm/docs/ProgrammersManual.rst
+0-703 files

LLVM/project 61830b2llvm/include/llvm/MC MCGOFFObjectWriter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

Use ADA reference of MCSymbolGOFF for externals.
DeltaFile
+15-0llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+6-9llvm/lib/MC/GOFFObjectWriter.cpp
+1-11llvm/lib/MC/MCGOFFStreamer.cpp
+2-5llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+0-6llvm/include/llvm/MC/MCGOFFObjectWriter.h
+3-2llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
+27-332 files not shown
+32-338 files

LLVM/project 6b34d4cllvm/lib/MC GOFFObjectWriter.cpp MCGOFFStreamer.cpp, llvm/lib/Target/SystemZ/MCTargetDesc SystemZHLASMAsmStreamer.cpp

[SystemZ][GOFF] Reference to external variable needs PR symbol

Variables are modelled as parts in the GOFF format. Referencing a
variable defined in a different compilation unit requires to use
a PR symbol instead of EXTRN/WEXTRN instruction.
A small issue is that these PR symbols can refer to the same ED
symbols, for which a section needs to be created.
DeltaFile
+52-44llvm/test/CodeGen/SystemZ/zos-section-1.ll
+35-27llvm/test/CodeGen/SystemZ/zos-section-2.ll
+22-10llvm/lib/MC/GOFFObjectWriter.cpp
+12-12llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
+15-2llvm/lib/MC/MCGOFFStreamer.cpp
+7-2llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
+143-972 files not shown
+153-988 files

LLVM/project 70406aallvm/lib/Target/SystemZ/MCTargetDesc SystemZHLASMAsmStreamer.cpp

Fix formatting
DeltaFile
+2-1llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
+2-11 files

LLVM/project 7d0313dllvm/lib/MC MCGOFFStreamer.cpp GOFFObjectWriter.cpp

Fix formatting
DeltaFile
+4-3llvm/lib/MC/MCGOFFStreamer.cpp
+2-1llvm/lib/MC/GOFFObjectWriter.cpp
+6-42 files

LLVM/project e070dc0llvm/lib/Target/PowerPC PPCISelLowering.cpp PPCInstrInfo.td

[PowerPC] Simplify implementation of atomis loads

The code for atomic loads is verbose. There are 10 different
operations and 4 memory sizes to support, which means 40 pseudo
instructions are used, with all the details repeated. This PR
changes the following:

 - Use a loop over the operations and the sizes to create the pseudo instruction
 - Adds the memory size as last operand to the pseudo instruction
 - Updates the C++ code to take advantage of the memory size in the pseudo instruction
DeltaFile
+71-79llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+34-111llvm/lib/Target/PowerPC/PPCInstrInfo.td
+21-35llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+0-2llvm/lib/Target/PowerPC/PPCISelLowering.h
+126-2274 files

LLVM/project c454305llvm/lib/Target/PowerPC PPCInstrInfo.td PPCInstr64Bit.td

Do not pass the size to ATOMIC_CMP_SWAP

There are no test cases for ATOMIC_CMP_SWAP, and the code was not
updated.
DeltaFile
+4-4llvm/lib/Target/PowerPC/PPCInstrInfo.td
+2-2llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+6-62 files

LLVM/project fb04fd5llvm/lib/Target/PowerPC PPCISelLowering.cpp

Fix formatting
DeltaFile
+3-2llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+3-21 files