LLVM/project 6fb04b6llvm/lib/Target/RISCV RISCVInstrInfoZb.td, llvm/test/CodeGen/RISCV rv64zbkb.ll

[RISCV] Add SRLI+PACK pattern for (or (and rs1, 0xffffffff), (and rs2, 0xffffffff00000000)). (#223507)

Fixes #223455.
DeltaFile
+22-0llvm/test/CodeGen/RISCV/rv64zbkb.ll
+5-1llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
+27-12 files

LLVM/project 0efe725llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp, llvm/lib/MC GOFFObjectWriter.cpp MCSymbolGOFF.cpp

[SystemZ][z/OS] Add AMODE to PR symbols

Contrary to the documentation, setting the AMODE at PR symbols is
required. The symptom is that references to variables `optind` and
`optarg` (from include `<getopt.h>`, the LE-provided C runtime)
results in "missing symbol" errors.
Fix is to add AMODE to PrAttr, analog to LdAttr.
DeltaFile
+11-11llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+10-10llvm/lib/MC/MCObjectFileInfo.cpp
+5-5llvm/lib/MC/MCSymbolGOFF.cpp
+3-2llvm/lib/MC/GOFFObjectWriter.cpp
+2-2llvm/test/CodeGen/SystemZ/zos-section-2.ll
+1-1llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
+32-312 files not shown
+34-328 files

LLVM/project 62d4861clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations CppBoundedBuffers.cpp, clang/unittests/ScalableStaticAnalysis/SourceTransformation CppBoundedBuffersTest.cpp

[SSAF][SourceEdit] The last patch of expression rewrite rules for the initial version

Add a list of rewrite rules:

- '&var'/'&member' is rewritten to 'addr_of(var)', if it needs to have
  bounded type;
- 'this' is rewritten to 'make_single(this)', if it needs to have
  bounded type;
- A non-empty list-initializer flowing into a bounded_array LHS gets an
  extra '{...}' layer;
- A union with a transformed variant member gets a '= {}' default
  initializer added to one member, if necessary;
- 'delete e' gets '.data()' appended to 'e' when its base is
  transformed.

Final step of
rdar://187125348
DeltaFile
+199-15clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations/CppBoundedBuffers.cpp
+202-3clang/unittests/ScalableStaticAnalysis/SourceTransformation/CppBoundedBuffersTest.cpp
+401-182 files

LLVM/project a581509llvm/test/CodeGen/AArch64 neon-truncstore.ll lowmaskedlanes.ll

[AArch64] Add test coverage for constant mask and extract of a vector store. NFC (#223552)
DeltaFile
+272-0llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
+62-0llvm/test/CodeGen/AArch64/neon-truncstore.ll
+334-02 files

LLVM/project 7878c7dllvm/docs/CommandGuide llvm-ir2vec.md

revert whitespace change
DeltaFile
+1-0llvm/docs/CommandGuide/llvm-ir2vec.md
+1-01 files

LLVM/project 011d837bolt/include/bolt/Core BinaryFunction.h, bolt/lib/Core BinaryEmitter.cpp

[BOLT] Share one LSDA type table across function fragments

## Motivation

The type table, the action table and the type index table of an LSDA are all
per-function. BOLT copies the first and the last verbatim from the input and
re-encodes the type table, but it emits a whole LSDA per fragment, so every one
of those tables is duplicated once per fragment even though the copies are
identical.

## Change

Emit the type table and the type index table once per function, after the LSDA
of the last fragment. Each fragment header points at that one @TType base. This
works because the base is an unsigned forward offset, because all LSDAs go to a
single section, and because the fragments of a function are emitted one after
another.

The action table stays per fragment. The personality routine locates it

    [10 lines not shown]
DeltaFile
+106-0bolt/test/X86/split-shared-type-table.s
+56-0bolt/test/runtime/X86/split-shared-type-table.cpp
+35-12bolt/lib/Core/BinaryEmitter.cpp
+19-0bolt/include/bolt/Core/BinaryFunction.h
+216-124 files

LLVM/project 9cd597bllvm/lib/Target/AMDGPU SIOptimizeVGPRLiveRange.cpp, llvm/test/CodeGen/AMDGPU si-opt-vgpr-liverange-bug-deadlanes.mir opt-vgpr-live-range-verifier-error.mir

AMDGPU: Use LiveIntervals in SIOptimizeVGPRLiveRange when available

LiveVariables has been long deprecated. Use LiveIntervals if available.
With the current pass structure, this will use LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+76-18llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+2-0llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
+2-0llvm/test/CodeGen/AMDGPU/opt-vgpr-live-range-verifier-error.mir
+80-183 files

LLVM/project 523bf2cllvm/lib/Target/AMDGPU SIOptimizeVGPRLiveRange.cpp

Address review comments
DeltaFile
+8-13llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
+8-131 files

LLVM/project 46e24dbllvm/include/llvm/Transforms/Scalar InferAddressSpaces.h, llvm/lib/Passes PassBuilder.cpp PassRegistry.def

InferAddressSpaces: Replace -assume-default-is-flat-addrspace cl::opt with pass parameter (#223480)

Migrate the pass-specific command-line option to a new pass manager
pass parameter, exposed as
infer-address-spaces<assume-default-is-flat-addrspace>.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+28-14llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+15-5llvm/include/llvm/Transforms/Scalar/InferAddressSpaces.h
+6-1llvm/lib/Passes/PassRegistry.def
+5-0llvm/lib/Passes/PassBuilder.cpp
+2-2llvm/test/Transforms/InferAddressSpaces/infer-address-spaces-overlapping-dead.ll
+3-0llvm/test/Other/new-pm-print-pipeline.ll
+59-227 files not shown
+68-2813 files

LLVM/project 6697123clang/unittests/Interpreter InterpreterTest.cpp

[clang-repl] Fix FindMangledNameSymbol test on Darwin/arm64e (#223410)

Fix the FindMangledNameSymbol unit test by comparing values as
llvm::orc::ExecutorAddrs.

This test was using comparing a pointer cast to uintptr_t and the result
of an ExecutorAddr::getValue call, but those can be different on
Darwin/arm64e due to pointer authentication. Comparing as ExecutorAddr
values eliminates this difference (pointer authentication bits are
stripped from both sides).
DeltaFile
+1-1clang/unittests/Interpreter/InterpreterTest.cpp
+1-11 files

LLVM/project 060aa57clang/test lit.cfg.py, clang/test/Interpreter simple-exception.cpp

[clang-repl] XFAIL simple-exception test on Darwin/arm64e (#223401)

ORC doesn't support unwinding on arm46e yet.
DeltaFile
+2-2clang/test/Interpreter/simple-exception.cpp
+1-0clang/test/lit.cfg.py
+3-22 files

LLVM/project d6ae821libc/src/sys/sendfile/linux sendfile.cpp, libc/test/src/sys/sendfile CMakeLists.txt sendfile_test.cpp

[libc] Fix sendfile argument order (#223059)

The previous implementation had the arguments swapped. This PR fixes it
and also adds a test to ensure we don't regress.
DeltaFile
+77-1libc/test/src/sys/sendfile/sendfile_test.cpp
+4-4libc/src/sys/sendfile/linux/sendfile.cpp
+1-0libc/test/src/sys/sendfile/CMakeLists.txt
+82-53 files

LLVM/project b80623bllvm/test/Transforms/LoopVectorize early_exit_legality.ll predicated-inductions-vs-first-order-recurrences.ll

[LV] Add more tests with phis that could be FORs or predicated IVS (NFC) (#223539)

Extend test coverage with more cases where a phi can be both a FOR and a
predicated IV.

Test coverage for https://github.com/llvm/llvm-project/pull/201208.
DeltaFile
+1,376-202llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
+33-0llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
+1,409-2022 files

LLVM/project c508696clang/lib/Interpreter Value.cpp

[clang-repl] Use ExecutorAddr::toPtr to get function ptr (#223395)

Fixes the pretty-print.cpp testcase on Darwin/arm64e.

This testcase was crashing on Darwin/arm64e when it tried to call a
value's destructor via an unauthenticated pointer.

Fix the issue by updating Value::Value to use ExecutorAddr::toPtr to get
an authenticated pointer to the destructor (rather than using
ExecutorAddr::getValue, which yields a raw address with no
authentication bits)
DeltaFile
+1-1clang/lib/Interpreter/Value.cpp
+1-11 files

LLVM/project a688a83llvm/include/llvm/Transforms/Utils LowerAtomic.h, llvm/lib/Target/AMDGPU SIISelLowering.cpp

LowerAtomic: Preserve the volatile flag when lowering atomicrmw and cmpxchg

These utility functions built the replacements without copying the volatile
flag from the original instruction.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+60-0llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-flat-i64-private-volatile.ll
+10-10llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-private-gas.ll
+9-8llvm/lib/Transforms/Utils/LowerAtomic.cpp
+7-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+3-4llvm/include/llvm/Transforms/Utils/LowerAtomic.h
+2-2llvm/test/Transforms/AtomicExpand/AMDGPU/expand-cmpxchg-flat-maybe-private.ll
+91-296 files

LLVM/project 3e121e0llvm/test/CodeGen/AMDGPU memory-legalizer-private-cluster.ll memory-legalizer-private-agent.ll

AMDGPU: Remove volatile from atomic tests

This is testing basic operation lowering, not volatileness.
Avoids a lot of test churn in a future change. Currently the codegen
is not actually seeing the volatile.
DeltaFile
+107-107llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
+75-75llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
+75-75llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+485-4851 files not shown
+556-5567 files

LLVM/project 3bb6687clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/CodeGen/PowerPC aix-vec-extabi-module-flag.c

PPC: Replace EnableAIXExtendedAltivecABI with "target-abi" module flag (#221670)

Continue purging ABI-influencing TargetOptions fields. Eliminate this
case by migrating to a module flag, reusing the generic target-abi module
flag with a new value.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+22-21llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+10-16llvm/include/llvm/Target/TargetOptions.h
+12-12llvm/test/CodeGen/PowerPC/ppc64-rop-protection-aix.ll
+18-0clang/test/CodeGen/PowerPC/aix-vec-extabi-module-flag.c
+13-0flang/test/Integration/PowerPC/aix-vec-extabi.f90
+0-11clang/lib/Driver/ToolChains/CommonArgs.cpp
+75-6076 files not shown
+199-19782 files

LLVM/project 32cc084clang/test/SemaHLSL/Resources Textures-declaration-order.hlsl Textures-Subscript.hlsl

Drop spirv Sema RUN lines
DeltaFile
+0-25clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
+0-2clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
+0-272 files

LLVM/project 9268498clang/lib/CodeGen CGHLSLBuiltins.cpp

Derive the coordinate width from the resource attribute for better readability
DeltaFile
+14-9clang/lib/CodeGen/CGHLSLBuiltins.cpp
+14-91 files

LLVM/project 2f7419cclang/lib/Sema HLSLBuiltinTypeDeclBuilder.cpp

Assert that result ty vec and the Elts size are the same
DeltaFile
+2-0clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+2-01 files

LLVM/project 1356b3fclang/test/AST/HLSL Textures-AST.hlsl Textures-vector-AST.hlsl, clang/test/CodeGenHLSL/resources Textures-SampleGrad.hlsl Textures-Subscript.hlsl

[HLSL] Implement Texture1D and its variants
DeltaFile
+297-159clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+213-175clang/test/AST/HLSL/Textures-vector-AST.hlsl
+213-175clang/test/AST/HLSL/Textures-scalar-AST.hlsl
+245-106clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
+205-115clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+162-115clang/test/AST/HLSL/Textures-AST.hlsl
+1,335-84524 files not shown
+2,670-1,42230 files

LLVM/project 9329c41clang/test/CodeGenHLSL/resources Textures-Mips.hlsl Textures-CalculateLevelOfDetail.hlsl, clang/test/SemaHLSL/Resources Textures-Subscript.hlsl

Fold Texture3D into the texture tests after the rebase
DeltaFile
+42-45clang/test/SemaHLSL/Resources/Textures-Subscript.hlsl
+43-37clang/test/CodeGenHLSL/resources/Textures-Load.hlsl
+25-35clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
+25-23clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+14-18clang/test/CodeGenHLSL/resources/Textures-CalculateLevelOfDetail.hlsl
+19-5clang/test/CodeGenHLSL/resources/Textures-Mips.hlsl
+168-16316 files not shown
+217-18722 files

LLVM/project c770c98clang/test/CodeGenHLSL/resources Textures-SampleLevel.hlsl Textures-SampleCmpLevelZero.hlsl, clang/test/SemaHLSL/Resources Textures-declaration-order.hlsl

Add missing macro descriptions to tests
DeltaFile
+5-0clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+4-0clang/test/SemaHLSL/Resources/Textures-declaration-order.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleCmpLevelZero.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
+4-0clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
+25-06 files not shown
+40-012 files

LLVM/project 059804dclang/test/CodeGenHLSL/resources Textures-SampleCmp.hlsl Textures-SampleGrad.hlsl

Reorganize RUN lines in tests. Remove unused macros
DeltaFile
+100-158clang/test/CodeGenHLSL/resources/Textures-Subscript.hlsl
+106-132clang/test/CodeGenHLSL/resources/Textures-SampleBias.hlsl
+106-132clang/test/CodeGenHLSL/resources/Textures-Sample.hlsl
+105-131clang/test/CodeGenHLSL/resources/Textures-SampleLevel.hlsl
+93-109clang/test/CodeGenHLSL/resources/Textures-SampleGrad.hlsl
+82-107clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
+592-76921 files not shown
+1,214-1,34527 files

LLVM/project 8f887e3clang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Sema SemaHLSL.cpp

[HLSL] Add CustomTypeChecking and improve sema for texture builtins (#221060)

This PR makes the texture builtins (for load, sample, gather) use
CustomTypeChecking, and adds additional semantic checks for them to make
them more strict and conform with the way sema checks are done for other
builtins.

The main benefit of CustomTypeChecking is preventing
DefaultArgumentPromotion from occurring due to the builtins being
declared `void(...)`; primarily, the promotion of float/half to double
is undesirable.
Floating-point scalar operands in codegen (`CGHLSLBuiltins.cpp`) for
these builtins always had a check and cast of the form `if
(Op->getType() != FloatTy) Op = CreateFPCast(Op, FloatTy);` to
compensate for that, which looked like a code smell to me.
The DefaultArgumentPromotion also affected diagnostics, which would
report the promoted type (double) instead of the type the user provided
(float) (e.g., https://hlsl.godbolt.org/z/Yec3dKh14). These diagnostics
were not exercised before, and this PR adds tests to exercise them.

    [14 lines not shown]
DeltaFile
+42-83clang/lib/Sema/SemaHLSL.cpp
+117-0clang/test/SemaHLSL/BuiltIns/resource_sample-errors.hlsl
+52-0clang/test/SemaHLSL/BuiltIns/resource_load-errors.hlsl
+42-0clang/test/SemaHLSL/BuiltIns/resource_gather-errors.hlsl
+4-34clang/lib/CodeGen/CGHLSLBuiltins.cpp
+10-14clang/test/CodeGenHLSL/resources/Textures-SampleCmp.hlsl
+267-1317 files not shown
+311-18313 files

LLVM/project 4010148llvm/test/CodeGen/AMDGPU memory-legalizer-private-system.ll memory-legalizer-private-cluster.ll

AMDGPU: Remove volatile from atomic tests

This is testing basic operation lowering, not volatileness.
Avoids a lot of test churn in a future change. Currently the codegen
is not actually seeing the volatile.
DeltaFile
+107-107llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
+76-76llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
+75-75llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
+75-75llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+71-71llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+480-4806 files

LLVM/project 2e5fa3aclang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip builtins-amdgcn-gfx9.hip

[CIR][AMDGPU] Add support for AMDGCN fmed3 builtins (#223101)

Adds codegen for the following AMDGCN fmed3 builtins:

- __builtin_amdgcn_fmed3f (float)
- __builtin_amdgcn_fmed3h (half)

These are lowered to the corresponding `llvm.amdgcn.fmed3` intrinsic.
DeltaFile
+38-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx9.hip
+2-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+48-63 files

LLVM/project 4698a51llvm/include/llvm/BinaryFormat Dwarf.h Dwarf.def, llvm/lib/BinaryFormat Dwarf.cpp

[DWARF] Add DW_MSPACE_LLVM_* memory space encodings (#220766)

DW_AT_LLVM_memory_space is already defined in Dwarf.def, and the memory
space encodings it takes are already specified in
docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst, but the values
had no names in the source, so llvm-dwarfdump printed the attribute as a
bare integer.

Add the encodings via a HANDLE_DW_MSPACE macro alongside the existing
HANDLE_DW_ASPACE, define the MemorySpace enum, and add MemorySpaceString
and getMemorySpace. AttributeValueString then resolves the attribute, so
no changes are needed in the DWARF consumers themselves.

Unlike address spaces, memory space encodings are target-independent, so
MemorySpaceString takes no triple.
DeltaFile
+69-0llvm/test/tools/llvm-dwarfdump/AMDGPU/DW_AT_LLVM_memory_space.yaml
+25-0llvm/lib/BinaryFormat/Dwarf.cpp
+13-0llvm/include/llvm/BinaryFormat/Dwarf.def
+9-0llvm/include/llvm/BinaryFormat/Dwarf.h
+116-04 files

LLVM/project 3377fbdllvm/lib/CodeGen MachineBasicBlock.cpp, llvm/test/CodeGen/WebAssembly splitcriticaledge-physreg-liveness.mir

CodeGen: Clear physreg ranges after SplitCriticalEdge (#223172)

After critical edge spliting replaces a terminator, clear referenced
physreg ranges. The block's terminators may be replaced, and may
reference physical registers (e.g. WebAssebly's ARGUMENTS. When
LiveIntervals is available, repairIntervalsInRange only repairs virtual
registers, so the tracked physreg units were stale.

It feels like a bug that repairIntervalsInRange doesn't touch physregs,
but I've left that for a future change.

Co-Authored-By: Claude claude-opus-4.8 <noreply at anthropic.com>
DeltaFile
+61-0llvm/test/CodeGen/WebAssembly/splitcriticaledge-physreg-liveness.mir
+7-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+68-02 files

LLVM/project 5bfc176clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-empty.cpp

[CIR] Accept a union whose empty member is [[no_unique_address]]

The record-wide reject for a member CIRGen marks empty is there for the
struct arm of mapCIRType, which reads such a member as an unnamed
bit-field standing for the bytes it occupies.  This does not apply to a
union, so the reject moves into the struct branch.

Which variants the classifier sees then falls to the union arm, and it
now reads that from each variant's own storage rather than from its
mark.  A zero-sized variant and one that is empty for the ABI are
skipped.  One whose mark says empty over storage that holds data is not.

Assisted-by: Cursor / claude-opus-5
DeltaFile
+242-0clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
+166-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
+44-34clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+26-3clang/test/CIR/Transforms/abi-lowering/x86_64-aggregate-nyi.cir
+478-374 files