1,062,527 commits found in 99 milliseconds
LLVM /project b9c01fa — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange dependency-all-eq.ll [LoopInterchange] Change the cost model to interchange `[* =]`
[LoopInterchange] Add test with dependency `[* =]` and `[= *]` (NFC)
LLVM /project 094b18c — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-vectorization.ll delay-cachecost-calculation.ll [LoopInterchange] Disable LoopCacheAnalysis-based heuristic by default
LLVM /project a5b533f — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange dependency-all-eq.ll pr43176-move-to-new-latch.ll [LoopInterchange] Relax legality check to accept more patterns
LLVM /project 72af9c1 — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-instorder.ll [LoopInterchange] Take base pointer into account in profitability check
[LoopInterchange] Add test for multiple accesses to same base ptr (NFC)
LLVM /project 0b46c81 — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-instorder.ll update
LLVM /project 4b78787 — clang/lib/CIR/Dialect/IR CIRDialect.cpp, mlir/include/mlir/Interfaces ControlFlowInterfaces.td ControlFlowInterfaces.h [mlir][Interfaces] Use single interface method to query region-based control flow
LLVM /project a166f0b — llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU load-constant-i1.ll sra.ll [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (#193468)
When splitting i64 SRA(X,BW-1) sign splat shifts, don't both freezing the HI upper i32 as only a single (repeated) shift will be generated
Noticed in a regression in #188206 LLVM /project fa6b47c — clang/include/clang/Analysis/Analyses/LifetimeSafety Loans.h, clang/include/clang/Basic DiagnosticGroups.td Revert "[LifetimeSafety] Add support for `new`/`delete` (#192504)"
This reverts commit b1175088531de1a3bae9942ef50d880fab6fe144 .
LLVM /project d88a8a1 — clang/lib/CIR/Dialect/IR CIRDialect.cpp, mlir/include/mlir/Interfaces ControlFlowInterfaces.td ControlFlowInterfaces.h [mlir][Interfaces] Use single interface method to query region-based control flow
[LoopInterchange] Add test with dependency `[* =]` and `[= *]` (NFC)
LLVM /project cdef7e6 — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-instorder.ll [LoopInterchange] Take base pointer into account in profitability check
LLVM /project ab3e820 — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange dependency-all-eq.ll [LoopInterchange] Change the cost model to interchange `[* =]`
LLVM /project cd04215 — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange dependency-all-eq.ll pr43176-move-to-new-latch.ll [LoopInterchange] Relax legality check to accept more patterns
[LoopInterchange] Add test for multiple accesses to same base ptr (NFC)
LLVM /project 5bba0db — llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-vectorization.ll lcssa-phi-outer-latch.ll [LoopInterchange] Disable LoopCacheAnalysis-based heuristic by default
update
LLVM /project 567583c — clang/test/CodeGen/SystemZ builtins-systemz-zvector.c builtins-systemz-vector.c [Clang][SystemZ] Fix unwanted unsequenced volatile accesses in codegen tests (#190212)
This PR fix(as I hope) #186584
For fix I write one-use program that found and renamed volatile var in
funcall. After use tests seems valid(but more verbose) and it's pass.
Link to script: https://pastebin.com/QR71We5b [LLVM][GlobalISel] Remove unnecessary comment (#193333)
Remove unnecessary FIXME from
`InstructionSelect.cpp:selectMachineFunction()`.
Reference: [[LLVM][GlobalISel] Support Blocks Created During Instruction
Selection #192625](https://github.com/llvm/llvm-project/pull/192625 ) LLVM /project 2c8d22d — clang/lib/CIR/Dialect/IR CIRDialect.cpp, mlir/include/mlir/Interfaces ControlFlowInterfaces.td ControlFlowInterfaces.h [mlir][Interfaces] Use single interface method to query region-based control flow
Review: debuginfod, warn but not fail
Review: move the on failure line
LLVM /project f418a7b — llvm/lib/Debuginfod Debuginfod.cpp, llvm/lib/LTO ThinLTOCodeGenerator.cpp Review: ErrOrPruned->PrunedOrErr
Review: More verbose error on disk space failure
Review: typo Peform->Perform
LLVM /project 666c568 — llvm/lib/Debuginfod Debuginfod.cpp, llvm/lib/LTO ThinLTOCodeGenerator.cpp Review: no-auto, use Expected<bool>
Missing LLDB side
[Support][Cache] Make `pruneCache` return an `Expected`
When `sys::fs::disk_space` would fail in during a call to `pruneCache`,
it would report a `fatal_error`. However, a failure to prune doesn't
mean the caller should fail catastrophically.
Downstream, we use LLVM's cache in the OpenCL runtime. A failure to prune
the cache can be safely ignored without stopping the user's application.
Extra )
