LLVM/project 0526807clang/test/AST tyloctype_alignment.cpp

[clang][z/OS] Add test for TypeLoc tail padding alignment (#202710)

This adds a test for the TypeLoc tail padding fix that was merged in
commit 89305c3.
DeltaFile
+10-0clang/test/AST/tyloctype_alignment.cpp
+10-01 files

LLVM/project 12d95c6llvm/lib/Transforms/Scalar LICM.cpp, llvm/test/Transforms/LICM vector-insert.ll

Revert "[LICM] Allow hoisting of InsertElementInst's past non-hoistable InsertElementInsts" (#203611)

Reverts llvm/llvm-project#200532
DeltaFile
+0-572llvm/test/Transforms/LICM/vector-insert.ll
+0-87llvm/lib/Transforms/Scalar/LICM.cpp
+0-6592 files

LLVM/project 6494225llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp SPIRVNonSemanticDebugHandler.h, llvm/test/CodeGen/SPIRV/debug-info debug-function-declaration-path-null.ll debug-function-declaration-skip-type-not-in-debug-type-regs.ll

[SPIRV] Emit NonSemantic DebugFunctionDeclaration for DISubprograms.
DeltaFile
+161-12llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+73-10llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+46-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-path-null.ll
+45-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-skip-type-not-in-debug-type-regs.ll
+44-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration.ll
+44-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-composite-scope.ll
+413-226 files

LLVM/project 6a5147allvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.cpp SPIRVNonSemanticDebugHandler.h, llvm/test/CodeGen/SPIRV/debug-info debug-function-declaration-path-null.ll debug-function-declaration-skip-type-not-in-debug-type-regs.ll

[SPIRV] Emit NonSemantic DebugFunctionDeclaration for DISubprograms.
DeltaFile
+164-12llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+73-10llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+46-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-path-null.ll
+45-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-skip-type-not-in-debug-type-regs.ll
+44-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration.ll
+44-0llvm/test/CodeGen/SPIRV/debug-info/debug-function-declaration-composite-scope.ll
+416-226 files

LLVM/project 2dec950llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h

Extend to getReasonName
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+1-11 files

LLVM/project e3c3a18llvm/lib/Target/AMDGPU AMDGPU.td, llvm/test/CodeGen/AMDGPU branch-relaxation-gfx1250.ll

[AMDGPU] Enable S_ADD_PC_I64 on gfx1251
DeltaFile
+2-1llvm/lib/Target/AMDGPU/AMDGPU.td
+1-1llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
+3-22 files

LLVM/project 0b12839llvm/test/tools/llvm-diff callsite-assumption-passing.ll, llvm/tools/llvm-diff/lib DifferenceEngine.cpp

[llvm-diff] Respect AllowAssumptions in diffCallSites (#203597)

diffCallSites always built an AssumptionContext, so call sites made
optimistic equivalence assumptions even when the caller disabled them.
This made matchForBlockDiff over-match, and the re-check in unify() then
hit the "structural differences second time around?" assertion.

Thread the caller's AssumptionContext into diffCallSites so call sites
honor the no-assumptions request like every other instruction kind.

Fixes #184133
DeltaFile
+33-0llvm/test/tools/llvm-diff/callsite-assumption-passing.ll
+8-8llvm/tools/llvm-diff/lib/DifferenceEngine.cpp
+41-82 files

LLVM/project 94c3745llvm/lib/Target/AMDGPU VOP3PInstructions.td, llvm/test/CodeGen/AMDGPU shl.v2i64.ll pk-lshl-add-u64.ll

[AMDGPU] Add gfx1251 V_PK_LSHL_ADD_U64
DeltaFile
+736-0llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
+241-0llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
+52-0llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
+46-0llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+39-0llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
+34-0llvm/test/MC/AMDGPU/gfx1251_err.s
+1,148-04 files not shown
+1,167-210 files

LLVM/project 5d5589fllvm/lib/Transforms/Scalar LICM.cpp, llvm/test/Transforms/LICM vector-insert.ll

Revert "[LICM] Allow hoisting of InsertElementInst's past non-hoistable Inser…"

This reverts commit 06bc3b75f3697e848662201ac9e7769ccc2467ed.
DeltaFile
+0-572llvm/test/Transforms/LICM/vector-insert.ll
+0-87llvm/lib/Transforms/Scalar/LICM.cpp
+0-6592 files

LLVM/project 10508afclang/lib/ScalableStaticAnalysisFramework/Analyses SSAFAnalysesCommon.h, clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowExtractor.cpp

Reland "[SSAF][Extractor] Make hard errors in PointerFlow and UnsafeBufferUsage Extractors quiet (#201953)" (#203602)

Reverted 7dcd1d2ad104c3f9748370a42dc775cd6e7e34dc and added '#ifndef
NDEBUG' guards for tests using 'llvm::setCurrentDebugType'.

Original message:

Hard errors were used in extractors during development to quickly
identify unsupported language constructs. This commit converts them to
DEBUG_WITH_TYPE so that these errors are silenced in release builds.

In addition, translating unsupported language constructs now silently
results in an empty EntityPointerLevelSet. The PointerFlowExtractor will
skip empty sets for either the source or the destination when building
edges to avoid an ill-formed edge set data structure.

rdar://178747892
DeltaFile
+45-2clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
+28-0clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+15-12clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
+11-11clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
+9-0clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
+108-255 files

LLVM/project e80bedallvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/X86 cost-any-of.ll

[VPlan] Account for any-of costs in legacy cost model

Some VPlan transforms, like vectorizing fmin without fast-math,
introduce AnyOfs, which have costs assigned in the VPlan-based cost
model, but not the legacy cost model. Account for their cost like done
for other similar VPInstrctions, like EVL.

Fixes https://github.com/llvm/llvm-project/issues/185867.

(cherry picked from commit 475cc4fe0b4065775db470bb512c9c9142242e55)
DeltaFile
+41-0llvm/test/Transforms/LoopVectorize/X86/cost-any-of.ll
+1-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+42-02 files

LLVM/project 1060a6bllvm/lib/Analysis TargetTransformInfo.cpp, llvm/lib/Target/DirectX DirectXTargetTransformInfo.h DirectXTargetTransformInfo.cpp

[SimplifyCFG][DirectX] Honor target minimum lookup table element width (#203103)

fixes #202481

This change adds a `TTI::getMinimumLookupTableEntryBitWidth()` (default
`8`) and fold it
into SimplifyCFG's `NeededBitWidth` computation so targets can prevent
unsupported
narrow lookup tables. DirectX returns 32 (or 16 with native 16-bit
types) so tables
never narrow to the unsupported i8 type.


> Assisted by Claude Opus 4.8
DeltaFile
+45-0llvm/test/CodeGen/DirectX/switch-to-lookup-table-i16-narrowing.ll
+42-0llvm/test/CodeGen/DirectX/switch-to-lookup-table-no-i8-narrowing.ll
+16-1llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
+7-4llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+7-0llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
+4-0llvm/lib/Analysis/TargetTransformInfo.cpp
+121-52 files not shown
+127-58 files

LLVM/project 2c1b71allvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/RISCV i128-trip-count-evl.ll

[VPlan] Compute URem via APInt in materializeVectorTripCount (#203604)

materializeVectorTripCount has a shortcut for scalable steps: if the
constant trip count is divisible by the maximum possible runtime step,
the vector trip count equals the trip count directly. This called
APInt::getZExtValue unconditionally, which asserts when the constant
value needs more than 64 bits.

Compute the URem in APInt to fix the crash.
DeltaFile
+42-0llvm/test/Transforms/LoopVectorize/RISCV/i128-trip-count-evl.ll
+1-1llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+43-12 files

LLVM/project 19c1150bolt/include/bolt/Profile DataAggregator.h, bolt/lib/Profile DataAggregator.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.8-beta.1
DeltaFile
+19-18bolt/lib/Profile/DataAggregator.cpp
+9-0bolt/test/perf2bolt/perf_brstack.test
+4-4bolt/include/bolt/Profile/DataAggregator.h
+32-223 files

LLVM/project 312c1b7llvm/lib/Target/AMDGPU VOP3PInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU packed-u64.ll

[AMDGPU] Add gfx1251 V_PK_ADD/SUB_NC_U64
DeltaFile
+1,313-0llvm/test/CodeGen/AMDGPU/packed-u64.ll
+96-0llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
+72-0llvm/test/MC/Disassembler/AMDGPU/gfx1251_dasm_vop3p.txt
+58-0llvm/test/MC/AMDGPU/gfx1251_err.s
+16-1llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+15-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1,570-213 files not shown
+1,622-719 files

LLVM/project 3d43e21llvm/docs AMDGPUUsage.rst

Try and fix links
DeltaFile
+3-3llvm/docs/AMDGPUUsage.rst
+3-31 files

LLVM/project fda7a72llvm/test/CodeGen/AMDGPU fcanonicalize.ll maximumnum.ll, llvm/test/MC/AMDGPU gfx1251_asm_vop3p.s gfx1251_err.s

[AMGDPU] Add gfx1251 V_PK_MIN/MAX_NUM_F64 (#203596)

Also legalizes v2f64 fcanonicalize.
DeltaFile
+2,760-227llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+1,357-0llvm/test/CodeGen/AMDGPU/maximumnum.ll
+1,317-0llvm/test/CodeGen/AMDGPU/minimumnum.ll
+552-0llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+96-0llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
+78-0llvm/test/MC/AMDGPU/gfx1251_err.s
+6,160-2275 files not shown
+6,260-23111 files

LLVM/project 6438199llvm/lib/Transforms/Vectorize VPlanPatternMatch.h VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize epilog-iv-select-cmp.ll

[VPlan] Introduce m_SelectLike and use to support 2-operand blends. (#194729)

We should be able to treat 2-operand blends like select by most VPlan
code. Add a new m_SelectLike matcher and use in places that only use the
matcher to extract operands.

Overall this leads to a small number of improvements in RISCV (~10 files
changed in a large IR corpus) and 2 loops changed on AArch64 with
tail-folding forced.


PR: https://github.com/llvm/llvm-project/pull/194729
DeltaFile
+49-15llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
+30-0llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+6-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-3llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+1-2llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
+90-265 files

LLVM/project 815e057clang/lib/Sema SemaLifetimeSafety.h, clang/test/Sema/LifetimeSafety safety.cpp nocfg.cpp

improved-names-for-function-calls
DeltaFile
+56-51clang/test/Sema/LifetimeSafety/safety.cpp
+39-25clang/test/Sema/LifetimeSafety/nocfg.cpp
+14-1clang/lib/Sema/SemaLifetimeSafety.h
+6-6clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
+115-834 files

LLVM/project 2a72cd8llvm/unittests/Support GlobPatternTest.cpp

[NFC][Support] Add test for inverted slash-agnostic matching (#203290)

Add a test case to GlobPatternTest to verify that inverted character
classes containing slashes (e.g. [^/] or [^\\]) behave correctly
under SlashAgnostic mode (i.e. they do not match either slash).

Assisted-by: Gemini
DeltaFile
+14-0llvm/unittests/Support/GlobPatternTest.cpp
+14-01 files

LLVM/project 869c99allvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h

[AMDGPU] NFC: Drop constexpr from getFlavor*Name functions

Change-Id: I6936feedf1af27d348e7b0e9787bbb291e4cf862
DeltaFile
+2-2llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+2-21 files

LLVM/project 5036a80clang/lib/CodeGen CGHLSLRuntime.cpp CGExpr.cpp

[HLSL][NFC] Remove unused location argument (#203467)

The location argument was just passed around but never used.
DeltaFile
+12-17clang/lib/CodeGen/CGHLSLRuntime.cpp
+4-8clang/lib/CodeGen/CGExpr.cpp
+2-3clang/lib/CodeGen/CGHLSLRuntime.h
+18-283 files

LLVM/project f2957d7flang/lib/Semantics check-omp-structure.cpp

[flang][OpenMP] Add missing check for empty argument list (#203592)
DeltaFile
+4-0flang/lib/Semantics/check-omp-structure.cpp
+4-01 files

LLVM/project 5a52d68llvm/lib/MC/MCParser COFFMasmParser.cpp, llvm/lib/Target/X86/AsmParser X86AsmParser.cpp

[llvm-ml] Add MASM unwind v3 support for x64 exception handling and improve MSVC compat (#202809)

New command-line options:
- `/unwindv3`: Enable V3 unwind information format

New MASM directives:
- `.push2reg` / `.pop2reg`: Push/pop register pairs (PUSH2/POP2)
- `.beginepilog` / `.endepilog`: Delimit epilog unwind regions
- `.popreg`, `.freestack`, `.restorereg`, `.restorexmm128`,
`.unsetframe`: Epilog counterparts of existing prolog directives
- `.pushframe code`: MASM syntax for interrupt handlers with error codes

New built-in symbol:
- `@UnwindVersion`: Returns the current x64 unwind version being used.

Error diagnostics:
- Prolog directives after `.endprolog` are diagnosed
- Epilog directives outside `.beginepilog`/`.endepilog` are diagnosed
- Nested `.beginepilog` is diagnosed
- Unwind v3 directives or using extended registers in directives without
unwind v3 are diagnosed
DeltaFile
+278-0llvm/test/tools/llvm-ml/epilog_directives.asm
+177-0llvm/test/tools/llvm-ml/proc_frame_v3.asm
+87-2llvm/lib/MC/MCParser/COFFMasmParser.cpp
+74-12llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+61-0llvm/test/tools/llvm-ml/unwindv3_required_errors.asm
+45-0llvm/test/tools/llvm-ml/prolog_directive_errors.asm
+722-1410 files not shown
+930-1416 files

LLVM/project 0ab7800clang/lib/ScalableStaticAnalysisFramework/Analyses SSAFAnalysesCommon.h, clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowExtractor.cpp

Reland "[SSAF][Extractor] Make hard errors in PointerFlow and UnsafeBufferUsage Extractors quiet (#201953)"

Reverted 7dcd1d2ad104c3f9748370a42dc775cd6e7e34dc and
added '#ifndef NDEBUG' guards for tests using 'llvm::setCurrentDebugType'.

Original message:

Hard errors were used in extractors during development to quickly
identify unsupported language constructs. This commit converts them to
DEBUG_WITH_TYPE so that these errors are silenced in release builds.

In addition, translating unsupported language constructs now silently
results in an empty EntityPointerLevelSet. The PointerFlowExtractor will
skip empty sets for either the source or the destination when building
edges to avoid an ill-formed edge set data structure.

rdar://178747892
DeltaFile
+45-2clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
+28-0clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+15-12clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
+11-11clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
+9-0clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
+108-255 files

LLVM/project 660771dllvm/include/llvm/ADT Bitset.h, llvm/unittests/ADT BitsetTest.cpp

Reapply "[ADT] Bitset: add shift operators, word accessors, and etc" (#195874)

Reapplies #193400, which was reverted in #195848 because it broke
buildbots with:

```
Bitset.h:271: error: static assertion failed: Unsupported word size
```

Root cause: a `static_assert(BitwordBits == 32, ...)` inside the
discarded `else` branch of `if constexpr (BitwordBits == 64)` in
`getWord64()`. The assert's condition is non-template-dependent
(`BitwordBits` derives from `sizeof(uintptr_t)`, not from `NumBits`), so
it is checked even though the branch is discarded, and fires on 64-bit
hosts. Related:
https://stackoverflow.com/questions/38304847/how-does-a-failed-static-assert-work-in-an-if-constexpr-false-block

Fix: drop the redundant inner `static_assert`. The class-level
`static_assert(BitwordBits == 64 || BitwordBits == 32, ...)` already

    [6 lines not shown]
DeltaFile
+313-111llvm/unittests/ADT/BitsetTest.cpp
+97-4llvm/include/llvm/ADT/Bitset.h
+410-1152 files

LLVM/project 0451b65clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Track per-field origins for record types
DeltaFile
+315-5clang/test/Sema/warn-lifetime-safety.cpp
+69-37clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+93-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+31-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+4-6clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+0-2clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+512-566 files

LLVM/project ab2ddf7clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety Origins.cpp

[LifetimeSafety][NFC] Collect accessed fields in a unified pre-scan
DeltaFile
+22-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+15-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+37-122 files

LLVM/project 8566733clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Facts.cpp

[LifetimeSafety][NFC] Add field-labeled child edges to OriginNode and generalize subtree walks
DeltaFile
+76-33clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+38-18clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+18-8clang/lib/Analysis/LifetimeSafety/Facts.cpp
+8-3clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+7-3clang/lib/Analysis/LifetimeSafety/Origins.cpp
+147-655 files

LLVM/project 9196bd6llvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

[𝘀𝗽𝗿] initial version

Created using spr 1.3.8-beta.1
DeltaFile
+465-0llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+274-12llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+209-0llvm/utils/TableGen/Common/CodeGenHwModes.cpp
+199-0llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+144-0llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+79-38llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+1,370-5042 files not shown
+2,615-23948 files