[libc++] Implement LWG3749: `common_iterator` should handle integer-class difference types (#233606)
Make `iterator_category` of `iterator_traits<common_iterator<I,S>>`
conditionally present only when `iter_difference_t<I>` is an integral
type.
Fixes #105291
[libc++][ci] Retarget the ARM BuildKite runners (#224107)
I enabled agent clusters in BuildKite since unclustered agents are not
supported anymore. As part of that, I created a new libcxx-builders-arm
queue to replace the existing queue. This patch switches the pipeline
definition so that new jobs start targeting the new queue with clustered
agents.
(cherry picked from commit 01edf187213105e35db8aef724a63f86241b6bd4)
[clang-repl][CodeGen] Add setOptLevel, #pragma clang repl optimize(N) (#214793)
clang-repl fixes its CodeGenOptions when the interpreter is created, so
the optimization level is the same for every input. This adds a way to
change it, similar to Cling:
- Add a new `CodeGenerator::StartModule` overload that takes a
CodeGenOptions, so the incremental path can start a module with
different codegen options than the ones fixed at construction.
- `Interpreter::setOptLevel` uses it to re-stage the pending module at
the new level.
- `#pragma clang repl optimize(N)` exposes this in source, the level
applies to the input the pragma appears in and stays in effect until
changed again.
assisted by claude-opus-5-5
[CIR] Support array coercions and flattened direct structs in CallConvLowering (#220207)
**Summary:**
- The AMDGPU classifier can pass or return an aggregate directly in
registers and can pack a 33-64 bit aggregate
into a [2 x i32] register pair. The CallConvLowering bridge handled
neither, so such signatures hit the NYI path. Handle both in
convertABIArgInfo/abiTypeToCIR.
**Changes:**
- `abiTypeToCIR` gets an `ArrayType` case
- A Direct struct argument with a null coerce type and `CanBeFlattened`
is split into one argument per field, as classic CGCall does. Returns,
unions and non-flattenable structs pass through unchanged.
- Added cir-opt coverage for 64-bit struct coerced to [2 x i32] and
larger struct passed directly in registers.
Addresses review feedback from @koparasy on #220197.
[2 lines not shown]
[Clang] Rebuild lambda init-captures and their initialization in default initializers (#234793)
Fixes https://github.com/llvm/llvm-project/issues/196469.
Reland #196597 with the CodeGen crash fixed by rebuilding init-capture
initialization. Verified with focused Clang tests and runtime
capture/cleanup checks.
In addition to the added test, the main change since #196597 has been
```diff
diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp
index 3554e76a09cff5332a331e78aa54b2b8cfa9c0c2..43b0c86132172b3f8a42d4d2b3ebf379fc82a779 100644
--- a/clang/lib/Sema/SemaExpr.cpp
+++ b/clang/lib/Sema/SemaExpr.cpp
@@ -5801,13 +5801,10 @@ struct ImmediateCallVisitor : DynamicRecursiveASTVisitor {
struct EnsureImmediateInvocationInDefaultArgs
: TreeTransform<EnsureImmediateInvocationInDefaultArgs> {
- using Base = TreeTransform<EnsureImmediateInvocationInDefaultArgs>;
[49 lines not shown]
SystemZ: Replace AEXT128/ZEXT128/PAIR128 pseudos with patterns
These pseudos only existed because GR128 values were untyped, so the
REG_SEQUENCE they expand to could not be written as a pattern. Now that
GR128 holds v2i64, select the extensions with REG_SEQUENCE output
patterns, and build GR128 pairs with a PAIR128 target node instead of a
custom inserter.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
SystemZ: Make v2i64 legal on subtargets without vector support
Without the vector feature, the GR128 even/odd register pairs were
modeled with MVT::Untyped, since no 128-bit type was legal. Use v2i64
instead, which is what the pairs functionally are.
v2i64 values can be built from and split into their halves with
subregister operations. Everything else is expanded. Loads and stores
are split into i64 halves, so they don't tie up a register
pair. Bitcasts to and from f128 use the FPR pair halves.
This takes care to avoid changing the calling convention. Vectors that
would be broken down into v2i64 are still passed as individual i64
elements. Inline assembly operands still use untyped, which is listed
first in the GR128 type list, so i128 operands are not bitcast to
v2i64.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
[clang] Enhance `DependencyScanningFilesystem` to optionally accept a VFS for non-shared cache queries (#234393)
Since `DependencyScanningFilesystem` resolves FS queries through a
global shared cache, the VFS it receives cannot be a custom VFS for
different compiler invocations. To address this add an optional
`LocalFS` whose queries will be cached by the worker only, without going
through the shared cache.
A caller can use this to pass a VFS-per-invocation for dependency
scanning purposes.
[ValueTracking] Query fma/fmuladd operands when NaN is demanded (#234831)
`fma` and `fmuladd` operands are now queried when NaN is demanded for
`computeKnownFPClass` in `ValueTracking`/`GISelValueTracking`.
These allow some tests to fold in another PR
https://github.com/llvm/llvm-project/pull/233986#issuecomment-6301362660
AI Disclosure:
I used Claude Opus 5 to help write the tests.
[LSR] Simplify equality loop exit checks
Assert that the latch has exactly one in-loop successor.
Keep the transform test IR-only since codegen is covered separately.
Assisted-by: TRAE CLI (GPT-5.6-Sol)
[clang][CodeGen] Copy calling convention to .inline builtin clones (#234089)
0f0e31cf511d created a separate `.inline` function for inline builtins
instead
of renaming `Fn` in place, leaving the default C calling convention on
the
clone even when `Fn` uses a different calling convention.
Assisted-by: Gemini
[Polly][docs] Finish MyST migration for selected docs (#233692)
Migration notes from the agent:
- Enabled the MyST `deflist` extension in `polly/docs/conf.py` and
converted the two option lists in `UsingPollyWithClang.md` to native
definition lists because the original reST definition lists would
otherwise need `{eval-rst}`. The converted lists lose the accidental
blockquote indentation, which shifts them slightly left.
- Converted `.. sectionauthor::` in
`HowToManuallyUseTheIndividualPiecesOfPolly.md` to the native
`{sectionauthor}` directive because MyST can invoke Sphinx directives
directly.
- Replaced the `{eval-rst}` `isonum.txt` include and the `{{ larr }}`
substitution in `Performance.md` with a literal `←` because the file
already uses other Unicode math characters.
- Replaced `{{ ReleaseNotesTitle }}`, `{{ release }}` and `{{ version
}}` in `ReleaseNotes.md` with `env.config` expressions and a
`PreRelease` conditional because `rst_epilog` substitutions do not apply
[21 lines not shown]
[Polly][docs] Rename selected docs from .rst to .md (#233688)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
[ELF] Speed up ICF by hashing relocations and propagating over an edge list (#233697)
ICF's initial hash covers section contents and, since
https://reviews.llvm.org/D56986, two rounds of relocation target hashes,
but not what constantEq compares: offsets, types, addends, merge-section
offsets, and names of undefined or preemptible targets. Sections that
differ only in relocations, e.g. the string or external function they
reference, share a hash at every depth, which is why D56986 found no
gain from more rounds. segregate() separates them with a quadratic
number of equalsConstant calls, which dominates a Chromium --icf=all
link.
Hash what constantEq compares, and propagate hashes over relocations to
other candidates for 7 rounds. Each round saves up to one segregate()
pass. Also parallelize the symbol fold loop.
--threads=8, --icf=all, output byte-identical at --threads=1 and 8:
```
[7 lines not shown]
SystemZ: Add baseline tests for i64 vector handling
Make sure nothing changes in future changes. Cover the ABI of other
i64-element vector types and a range of <2 x i64> operations on a
subtarget without the vector facility.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
[KnownFPClass] Properly handle the denormal mode for fma (#234821)
Fixes https://github.com/llvm/llvm-project/issues/228972
I have made it so `KnownFPClass::fma` will only flush input denormals
before the multiplication step, and flush output denormals after the
addition step.
In total, this changes:
- Applying the input denormal mode to the Addend
- Applying the output denormal mode to the result
- Not applying the output denormal mode to the intermediate `fmul` step
The tests I added are not currently observable since `KnownFPClass::fma`
is not capable of refining zero/subnormal results precisely enough.
AI Disclosure:
I used Claude Opus 5 to help write the tests.
[clang][CodeGen] Copy function attributes to .inline builtin clones (#234081)
0f0e31cf511d created a separate `.inline` function for inline builtins
instead
of renaming `Fn` in place, but only set `alwaysinline` on the clone.
Exposed by #215264: missing target attributes can prevent inlining
`.inline`
clones, and missing `noundef` parameter attributes cause MSan false
positives
when the clone is not inlined.
Assisted-by: Gemini
[libc++] Cache the result of LNT commit refinement less aggressively (#234825)
At least as we tweak the new pipeline, waiting 3 hours to trigger new
commits is too long.
[BPF] Add UHMUL and SHMUL instruction variants with -mcpu=v5 (#234076)
This patch adds LLVM support for the unsigned and signed high-half
multiply instructions (UHMUL and SHMUL) proposed for the BPF ISA [1].
The instructions use the existing `BPF_MUL` opcode with the offset field
distinguishing the variants:
- `off = 1`: UHMUL, returning the upper 64 bits of an unsigned 64×64-bit
product.
- `off = 2`: SHMUL, returning the upper 64 bits of a signed 64×64-bit
product.
Both register and immediate forms are supported. For example:
```asm
r1 uh*= r2
r3 sh*= r4
r5 uh*= -2
[42 lines not shown]
