[DTLTO] terminology - use extract rather than serialize (#208468)
Change the terminology used for DTLTO from "serialization" to
"extraction" for improved clarity.
Update the DTLTO time-trace scope and tests to match the new wording,
and rename/update related LLD and cross-project DTLTO cache tests.
I have also improved some unrelated wording in the comments and removed
a redundant comment block from the DTLTO class comment.
This terminology improvement was agreed in
https://github.com/llvm/llvm-project/pull/204104. Note that the
documentation already uses this terminology, see:
https://llvm.org/docs/DTLTO.html.
[flang-rt] Disable tests by default when cross-compiling (#208926)
Cross-compiled tests can't run on the build host and pull in host
dependencies (e.g. LLVMSupport's ZLIB::ZLIB) that break the build.
Fixes #208924
[libc] Fix non-relative includes of __llvm-libc-common.h (#209412)
This seems to work, but I ran into this problem when trying to expand
hermetic tests.
The hdrgen-generated headers already use relative includes of this file.
[libc++] Mark LWG3403 as complete (#208866)
LWG3403 specifies that `ranges::ssize` should work on non-range objects
for which `ranges::size` is valid. This has been true in libc++ since
6f1b10d, which first implemented `ranges::ssize` for libc++13. The tests
introduced by that commit are sufficient to verify compliance since they
test calling `ranges::ssize` with various non-range arguments.
In addition to marking LWG3403 as complete, this also updates the status
page entry for P1970R2, the paper that added `ranges::ssize`. P1970R2 was
previously marked complete in libc++15 as an approximation; however, it was
actually complete in libc++13.
Resolves #104280
[libc++] Improve diagnostic for libcxxabi missing from the runtimes (#208274)
When libc++ is configured to use libc++abi as an ABI library but
libcxxabi is not part of the runtimes, we'd end up with a confusing
build error about a missing <cxxabi.h> header. Instead, diagnose at
CMake configuration time.
Closes #136480
[lldb][Windows] add release notes for lldb-server (#209415)
As of https://github.com/llvm/llvm-project/pull/209258,
`lldb-server.exe` is now the default plugin if libxml2 is available at
build time.
This patch adds a release note for this change.
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (22) (#209213)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
[libc++] Fix usage of constructive interference when we meant destructive (#208804)
We maintain a contention table to implement atomic wait/notify inside
atomic.cpp. Entries in that table are padded to avoid false sharing,
since they are expected to be accessed from multiple threads
concurrently.
However, we used std::hardware_constructive_interference_size for that,
when in reality std::hardware_destructive_interference_size is the one
we need. The semantics of constructive interference are to promote true
sharing for data that should stay colocated, while destructive
interference is to prevent false sharing.
Note that on platforms such as macOS arm64, destructive interference
size is larger than constructive interference size, which means that
this patch may regress the size of the dylib on some platforms. However,
that is required for performance purposes.
Fixes #208305
[mlir][EmitC] Add rank-0 MemRef conversion (#205774)
Add rank-0 memref support to MemRefToEmitC and the EmitC TypeConverter,
needed for lowering the models generated by:
- `llvm/lib/Analysis/models/gen-inline-oz-test-model.py`
- `llvm/lib/Analysis/models/gen-regalloc-eviction-test-model.py`
Rank-0 memrefs are no longer rejected by `isMemRefTypeLegalForEmitC`.
The EmitC type converter maps `memref<T>` to `!emitc.ptr<T>`, giving
rank-0 memrefs addressable scalar storage.
`memref.alloc` now allocates one element for rank-0 memrefs.
`memref.dealloc` frees the pointer-backed value. `memref.load` and
`memref.store` lower rank-0 accesses through `emitc.subscript %ptr[0]`,
followed by `emitc.load` or `emitc.assign`. `memref.copy` lowers rank-0
copies as scalar load plus assign.
`memref.alloca` still rejects rank-0 memrefs because this patch only
supports pointer-backed rank-0 lowering.
[11 lines not shown]
[X86] Use BMM for bitreverse without GFNI (#209223)
For the scalar path bitreverse currently doesn't lower to vbitrevb on
AVX512-BMM unless GFNI is specified as well. However, GFNI isn't
required at all for this and only BMM needs to be present.
See https://godbolt.org/z/xr61xYzYr
[VPlan] Type VP(Recipe|Block)Ty SubclassID (NFC) (#209132)
With the advantage that switching over the SubclassID would give better
compile-time diagnostics.
Co-authored-by: Luke Lau <luke at igalia.com>
[MLIR][NFC] Fix tgfmt compilation with MSVC (#209446)
Apparently older MSVC has problems with inferring template argument
types. Provide them explicitly.
Fixes https://github.com/llvm/llvm-project/issues/209303.
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (21) (#209212)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
[lldb] Return llvm::Error from DisableLogChannel (#207004)
Follow up to #206479.
llvm:Error better describes the success exor error message states that
we were previously doing with a boolean plus an error stream.
[clang][Analysis] Speed up LiveVariables set merge (#209430)
LiveVariables' mergeSets built the union by unconditionally inserting
every element of B into A. Apply the two cheap tricks the
lifetime-safety analysis uses in its dataflow join:
* Return early when both operands are the same tree (an O(1) pointer
comparison), skipping the merge entirely. Merged liveness values are
canonicalized, so two predecessors with identical liveness share the
same tree -- common at confluence points.
* Insert the smaller set into the larger one, so the number of O(log n)
insertions is min(|A|, |B|) rather than always |B|.
The result is unchanged: set union is commutative and order-independent.
On a pathological function (1000 simultaneously-live locals across 5000
control-flow merges of identical sets) the liveness computation is ~18%
faster, essentially all from the identical-set short circuit. On real
translation units the merge is a small fraction of the analysis, so the
[7 lines not shown]
[clang][Diagnostics] Fix check-point recording under default colors (#209355)
`getShowColors() != ShowColorsKind::Off` is also true for the default
Auto, so ordinary non-TTY compiles where colors are never actually
emitted kept recording check points, leaving the original 718aac9f cost
in place.
[Passes] Replace OptimizationLevel with an enum (#209424)
Now that OptimizationLevel no longer has a size dimension, replace it
with a simple enum class.
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (20) (#209211)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to
the folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping
the redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
[libc] Implement SA_NODEFER and SA_RESETHAND signal flags (#209429)
Defined SA_NODEFER and SA_RESETHAND in Linux signal-macros.h.
Added unit tests in sigaction_test.cpp to verify the behavior of the new
flags. Also added a test case for SA_SIGINFO.
Assisted-by: Automated tooling, human reviewed.
AMDGPU: Migrate CodeGen tests to amdgpu subarch triple (19) (#209122)
Mechanically migrate the command-line target spelling on llc/opt RUN
lines in llvm/test/CodeGen/AMDGPU from -mtriple=amdgcn ... -mcpu=<gfx> to the
folded subarch triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa), dropping the
redundant -mcpu.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
[GlobalISel] Add G_UAVGFLOOR/G_UAVGCEIL/G_SAVGFLOOR/G_SAVGCEIL to computeKnownBits (#209171)
Add known-bits handling for the averaging (halving add) opcodes G_UAVGFLOOR,
G_UAVGCEIL, G_SAVGFLOOR and G_SAVGCEIL in GISelValueTracking, using the
existing `KnownBits::avg{Floor,Ceil}{S,U}` helpers. This matches
SelectionDAG's handling of the corresponding ISD::AVGFLOOR*/AVGCEIL*
nodes.
This lets GlobalISel drop the redundant masking around hadd/rhadd of
zero-extended operands on AArch64 (see aarch64-known-bits-hadd.ll, where the
GlobalISel output now matches SelectionDAG). The sign-extended cases are
unaffected, since the masking is not redundant there.
Part of #150515.
---
Assisted by Claude (Anthropic).
