LLVM/project b9865b1llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 unprofitable-alternate-subtree.ll

Simplifications, fixes

Created using spr 1.3.7
DeltaFile
+24-49llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
+17-19llvm/test/Transforms/SLPVectorizer/AArch64/unprofitable-alternate-subtree.ll
+16-17llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation4.ll
+8-8llvm/test/Transforms/SLPVectorizer/X86/external-bin-op-user.ll
+7-8llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+5-9llvm/test/Transforms/SLPVectorizer/X86/reduction2.ll
+77-1102 files not shown
+87-1228 files

LLVM/project 5df89aellvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/SystemZ vec-trunc-to-i16.ll

[CodeGen] Preserve big-endian trunc in concat_vectors (#190701)

A transform from `concat_vectors(trunc(scalar), undef)` to
`scalar_to_vector(scalar)` is only equivalent for little-endian targets.
On big-endian, that would put the extra upper bytes ahead of the desired
truncated bytes. This problem was seen on Rust s390x in [RHEL-147748].

[RHEL-147748]: https://redhat.atlassian.net/browse/RHEL-147748

Assisted-by: Claude Code
DeltaFile
+45-0llvm/test/CodeGen/SystemZ/vec-trunc-to-i16.ll
+3-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+48-12 files

LLVM/project fce08a6mlir/include/mlir/Dialect/AMDGPU/IR AMDGPUEnums.h AMDGPUEnums.td, mlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp

[AMDGPU][MLIR][NFC] moved enc computation to a dedicated method (#189339)

Tried to adapt `GlobalPrefetchOp` for projects like Triton that do not
use `memref`s but they can still use enums exposed to the AMDGPU
dialects. Therefor, they could benefit from just calling a static method
which converts a bunch of enums to a correct `i32` value expected by the
AMDGCN backend.

Also renamed `TemporalHint` to `LoadTemporalHint` because it turned out
there are temporal hints for store operations (for example,
`buffer_store`) which have slightly different enum values (e.g., `WB`
(write-back) instead of `LU`)
DeltaFile
+36-0mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.h
+10-10mlir/test/Conversion/AMDGPUToROCDL/global-prefetch.mlir
+3-15mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+12-5mlir/lib/Dialect/AMDGPU/IR/AMDGPUOps.cpp
+9-0mlir/test/Dialect/AMDGPU/invalid.mlir
+2-2mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUEnums.td
+72-323 files not shown
+76-369 files

LLVM/project f59009dmlir/include/mlir/Dialect/OpenMP OpenMPOps.td, mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

[mlir][OpenMP] Separate OutlinableInterface from taskloop LoopWrapper (#188068)

Separate taskloop context and loop lowering into different operations.
This allows us to have separate operations representing the outlinable
interface and the loop wrapper interface so that there is somewhere
better than the loop body to put task-local allocations:

```
omp.taskloop.context {
  llvm.alloca ...
  omp.taskloop {
    omp.loop_nest ... {
      ...
    }
  }
  omp.terminator
}
```


    [11 lines not shown]
DeltaFile
+225-150mlir/test/Dialect/OpenMP/ops.mlir
+221-139mlir/test/Dialect/OpenMP/invalid.mlir
+66-48mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
+58-37mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
+66-11mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+54-10mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+690-39532 files not shown
+1,208-67638 files

LLVM/project 58a5ce4lldb/include/lldb/Symbol Symbol.h, lldb/source/Core Disassembler.cpp

[lldb] Skip local variable declarations at start of Wasm function (#190093)

In WebAssembly, a function starts with a number of local variable
declarations, sometimes called a function header. These declarations are
*not* instructions, but they are considered to be part of the function,
meaning we can't just pretend like the function starts on the first
instruction. Instead, we treat them like a prologue, albeit one that you
cannot disassemble or set a breakpoint on.

With this PR, we now correctly disassemble the function, matching the
output of `objdump` and breakpoints resolve to the first instruction.

Fixes #189960
DeltaFile
+70-0lldb/test/Shell/ObjectFile/wasm/wasm-local-decls.yaml
+39-4lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
+31-0lldb/source/Core/Disassembler.cpp
+7-0lldb/include/lldb/Symbol/Symbol.h
+147-44 files

LLVM/project f2bc625mlir/lib/Target/LLVM/XeVM Target.cpp, mlir/test/Conversion/MathToXeVM native-spirv-builtins.mlir

[XeVM] Refactor the SPIR-V generation to use SPIR-V backend API. (#189494)

Currently, we use 2 different approach to generate SPIR-V based on
compilation target. If compilation target is `assembly/isa`, an MLIR
interface `translateToISA` is used to convert an LLVM module to SPIR-V
text. For other cases (`bin/fatbin` compilation target) SPIR-V backend
API is used to generate SPIR-V binary.

SPIR-V backend API is more powerful, as it lets one pass the necessary
extensions which is a must if one is using any advanced or
vendor-specific SPIR-V features.

This PR discontinues the usage of MLIR API and consolidates to use
SPIR-V API.

It also ensures that SPIR-V generated from MLIR side is always in binary
format (for both XeVM target and SPIR-V target).
DeltaFile
+0-119mlir/test/Conversion/MathToXeVM/native-spirv-builtins.mlir
+22-48mlir/lib/Target/LLVM/XeVM/Target.cpp
+22-1672 files

LLVM/project 33ed5e8llvm/test/CodeGen/AMDGPU rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll

[AMDGPU] Removed uselistorder from test, not required for failure mode.
DeltaFile
+0-2llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
+0-21 files

LLVM/project 8a10380utils/bazel/third_party_build nanobind.BUILD

[bazel] Make nanobind link on macOS (#190687)

Previously the mlir libraries that are marked as shared didn't link on
macOS since undefined symbols error by default. This uses nanobind's
list of acceptable undefined python symbols to make these link.
DeltaFile
+10-0utils/bazel/third_party_build/nanobind.BUILD
+10-01 files

LLVM/project cf784aclldb/bindings/interface SBFileSpecExtensions.i, lldb/test/API/python_api/filespec TestFileSpecAPI.py

[lldb] Support comparing FileSpec against Python strings (#190690)

We got a bug report where someone was iterating over the modules and
wanted to verify that the module name was empty and noticed it didn't
trigger.

```
for module in target.module_iter():
  if module.file is None or module.file == "":
    # Do something
```

My initial hypothesis was that we were somehow skipping modules, but
upon further investigation, it was the string comparison that was the
culprit. The reporter (reasonably) expected the `file` property to
return a string, but in reality it returns a SBFileSpec.

This could be avoided by explicitly comparing with an empty FileSpec,
but that seems needlessly tedious.

    [9 lines not shown]
DeltaFile
+35-0lldb/test/API/python_api/filespec/TestFileSpecAPI.py
+11-0lldb/bindings/interface/SBFileSpecExtensions.i
+46-02 files

LLVM/project 72cb3c0mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

Fix OpenMPToLLVMIRTranslation nits
DeltaFile
+2-3mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+2-31 files

LLVM/project 71ce5e5mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

Harden implementation of getTaskloopContext
DeltaFile
+1-1mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+1-11 files

LLVM/project 850df43mlir/include/mlir/Dialect/OpenMP OpenMPOps.td, mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

Rename TaskloopOp::getContextOp to getTaskloopContext
DeltaFile
+2-2mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+1-1mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+3-32 files

LLVM/project f66c30emlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp, mlir/test/Dialect/OpenMP invalid.mlir

Improve error message

Make it clear that the requirement is for direct nesting.
DeltaFile
+3-3mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+2-2mlir/test/Dialect/OpenMP/invalid.mlir
+5-52 files

LLVM/project f4d2748mlir/test/Target/LLVMIR openmp-taskloop-bounds-cast.mlir

Fix test added in later commit

It seems the testing bots cherry-pick the branch onto current main
instead of testing the branch as it is.
DeltaFile
+7-4mlir/test/Target/LLVMIR/openmp-taskloop-bounds-cast.mlir
+7-41 files

LLVM/project 799d0d5mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

Use llvm::find_if for finding taskloop loop wrapper op
DeltaFile
+3-4mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+3-41 files

LLVM/project 3903fb1mlir/test/Target/LLVMIR openmp-taskloop-outer-bounds.mlir

Fix another new test
DeltaFile
+7-4mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
+7-41 files

LLVM/project e0650e8mlir/include/mlir/Dialect/OpenMP OpenMPOps.td, mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp

[mlir][OpenMP] Separate OutlinableInterface from taskloop LoopWrapper

Separate taskloop context and loop lowering into different operations.
This allows us to have separate operations representing the outlinable
interface and the loop wrapper interface so that there is somewhere
better than the loop body to put task-local allocations:

```
omp.taskloop.context {
  llvm.alloca ...
  omp.taskloop {
    omp.loop_nest ... {
      ...
    }
  }
  omp.terminator
}
```


    [11 lines not shown]
DeltaFile
+225-150mlir/test/Dialect/OpenMP/ops.mlir
+221-139mlir/test/Dialect/OpenMP/invalid.mlir
+66-48mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
+58-37mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
+66-11mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+55-10mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+691-39530 files not shown
+1,196-66836 files

LLVM/project 894fb64llvm/lib/Target/Sparc SparcInstr64Bit.td Sparc.td, llvm/test/MC/Sparc sparc64-alu-instructions.s

[SPARC][IAS] Make 64-bit instructions available in 32-bit mode on V9 (#187534)

When the ISA level is V9, 64-bit instruction definitions should be available
even if currently it's not used by any patterns.

This should allow usage of 64-bit instructions, like `sllx`/`srlx`, in inline
assembly snippets in a source file otherwise intended to target V9 processors
running in 32-bit mode, as found in, for example, the Linux kernel.
DeltaFile
+32-22llvm/lib/Target/Sparc/SparcInstr64Bit.td
+32-0llvm/lib/Target/Sparc/Sparc.td
+4-1llvm/test/MC/Sparc/sparc64-alu-instructions.s
+68-233 files

LLVM/project 1604565lldb/source/Plugins/Process/AIX NativeProcessAIX.cpp, lldb/tools/lldb-server lldb-gdbserver.cpp

[lldb][AIX] Enable NativeProcessAIX Manager for lldb-server (#190173)

This PR is in reference to porting LLDB on AIX. Ref discusssions: [llvm
discourse](https://discourse.llvm.org/t/port-lldb-to-ibm-aix/80640) and
https://github.com/llvm/llvm-project/issues/101657.
Complete changes together in this draft:
- https://github.com/llvm/llvm-project/pull/102601

Description:
This change enables proper AIX processes integration with lldb-server,
ensuring correct loading and handling of AIX target architectures.
It also retrieves the target process architecture from the host and
configures NativeProcessAIX accordingly.
DeltaFile
+16-1lldb/source/Plugins/Process/AIX/NativeProcessAIX.cpp
+4-0lldb/tools/lldb-server/lldb-gdbserver.cpp
+20-12 files

LLVM/project 20916c6llvm/lib/Target/AMDGPU AMDGPUAttributor.cpp

AMDGPU: Stop creating attributor attributes for declarations (#190800)
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+1-11 files

LLVM/project 07a40b3llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp, mlir/test/Target/LLVMIR openmp-taskloop-outer-bounds.mlir openmp-taskloop-collapse.mlir

[mlir][OpenMP] Fix taskloop outlined step handling (#190198)

The outlined taskloop preheader still used the original function's
casted step value when computing the canonical loop trip count. When
lb/ub/step were defined outside the taskloop body, the outlined function
ended up referring to an instruction from another function, which
crashed LLVM IR verification and finalization.

Reload the task step from the outlined task shareds, alongside lb and
ub, and use that value for the trip-count division. Update the MLIR
taskloop checks and add a regression for outer-scope variable bounds.

Fortran reproducer:
```
subroutine test(lb, ub, step)
  integer :: i, lb, ub, step

  !$omp taskloop
    do i=lb,ub,step

    [6 lines not shown]
DeltaFile
+41-0mlir/test/Target/LLVMIR/openmp-taskloop-outer-bounds.mlir
+18-6mlir/test/Target/LLVMIR/openmp-taskloop-collapse.mlir
+11-2llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+3-3mlir/test/Target/LLVMIR/openmp-taskloop-cancel.mlir
+2-2mlir/test/Target/LLVMIR/openmp-taskloop-cancellation-point.mlir
+1-2mlir/test/Target/LLVMIR/openmp-taskloop.mlir
+76-151 files not shown
+77-167 files

LLVM/project 4a6adf4llvm/lib/Analysis InstructionSimplify.cpp, llvm/test/Transforms/CorrelatedValuePropagation pr187381.ll

[InstSimplify] Fix Compilation Hang in simplifyExtractValueInst (#190279)

Jump Threading can create self-referential insertvalues which are
allowed by the verifier in unreachable code. These self-referential
insertvalues cause the compilation to hang in simplifyExtractValueInst.
This PR adds a check to break out of the loop if it detects it is a
self-referential insertvalue and adds the reproducer's bitcode as a
test.

Fixes: https://github.com/llvm/llvm-project/issues/187381
DeltaFile
+58-0llvm/test/Transforms/CorrelatedValuePropagation/pr187381.ll
+5-0llvm/lib/Analysis/InstructionSimplify.cpp
+63-02 files

LLVM/project c5e0fd1.github/workflows libc-shared-tests.yml

[libc] Add gcc builds to libc-shared-tests precommit CIs. (#190801)
DeltaFile
+19-4.github/workflows/libc-shared-tests.yml
+19-41 files

LLVM/project 36ed3fallvm/unittests/DebugInfo/PDB PublicsStreamTest.cpp

[pdb] Store symbol names without null terminators in PublicsStreamTest (#190790)

to catch any bugs where code assumes these names are null terminated.

This would have caught (at least in ASan builds) #163755 and the bug
fixed in #190133.
DeltaFile
+12-0llvm/unittests/DebugInfo/PDB/PublicsStreamTest.cpp
+12-01 files

LLVM/project dfa1c56flang/include/flang/Optimizer/Analysis AliasAnalysis.h, flang/lib/Optimizer/Analysis AliasAnalysis.cpp

[flang] Disambiguate derived component accesses in AliasAnalysis. (#189516)

This change introduces an AccessPath representation inside the
AliasAnalysis
Source object that tracks the sequence of named component accesses
and pointer/allocatable dereferences from the root variable to the
queried
memory location. The access path is built during the backward walk
in getSource and enables more precise alias analysis for Fortran derived
types.

Previously, accesses to different components of the same derived-type
variable (such as x%a and x%b) were reported as MayAlias
because the analysis could not distinguish them once they traced back
to the same origin. With the access path, the analysis can now identify
when two accesses diverge at a named component step
and return NoAlias for disjoint subobjects.

This patch does not get rid of `followingData` and `isData` completely.

Assisted by Claude.
DeltaFile
+449-0flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
+242-0flang/test/Transforms/tbaa-derived-type-records.fir
+224-9flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
+178-0flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
+29-45flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
+58-0flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
+1,180-541 files not shown
+1,184-677 files

LLVM/project 5358d45flang/lib/Optimizer/Dialect FIROps.cpp, flang/test/Transforms licm.fir

[flang] Enable speculation of fir.convert with memref<> type. (#190413)

Such `fir.convert`s may appear after FIRToMemref conversion and it would
be good to be able to speculate them.
DeltaFile
+27-0flang/test/Transforms/licm.fir
+2-1flang/lib/Optimizer/Dialect/FIROps.cpp
+29-12 files

LLVM/project 27f52f9llvm/lib/Target/RISCV RISCVInstrInfoC.td, llvm/test/tools/llvm-mca/RISCV/SiFive7 sp-bypass.s

[llvm-mca][RISC-V] Remove duplicated use of SP from `c.addi4spn` (#189980)

`c.addi4spn` instruction implicitly uses the X2 (SP) register, but in
addition to being present in the Uses list, it is also modeled as an
explicit operand with the SP register class. This duplication causes
missed bypasses in llvm-mca when the instruction needs to read the SP
value written by a previous instruction.

For example, on a `sifive-u74` CPU, the following timeline excerpt
shows that the `c.addi4spn` is issues 2 cycles later than expected by
the GPR bypass:
```
Timeline view:
Index     012345678

[0,0]     DeeE .  .   mv        sp, a0
[0,1]     .  DeeE .   addi      a1, sp, 12
```


    [5 lines not shown]
DeltaFile
+81-0llvm/test/tools/llvm-mca/RISCV/SiFive7/sp-bypass.s
+1-1llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+82-12 files

LLVM/project b050410libc/shared rpc_server.h

[libc] Fix return code after rewriting GPU printf support (#190797)

Summary:
This just blindly accumulated the return values without checking if they
were errors. printf returns `-1` on failure and fwrite returns the
number successfully written. Because we split these up we need to handle
that correctly.
DeltaFile
+22-12libc/shared/rpc_server.h
+22-121 files

LLVM/project d630240clang/lib/Driver/ToolChains HIPSPV.cpp, clang/test/Driver hipspv-toolchain.hip

HIPSPV: a fix for Assertion `isFilename() && "Invalid accessor."' failed (#187655)

AFAICT, this assertion failure was introduced by #181870 and #182930.
These PRs introduced linker options that got passed down to
HIPSPV::Linker which wasn't prepared for any non-file inputs.

Fixed by ignoring non-file arguments.
DeltaFile
+7-0clang/test/Driver/hipspv-toolchain.hip
+2-1clang/lib/Driver/ToolChains/HIPSPV.cpp
+9-12 files

LLVM/project 9caead2llvm/lib/Target/AMDGPU AMDGPUAttributor.cpp

AMDGPU: Stop creating attributor attributes for declarations
DeltaFile
+1-1llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+1-11 files