LLVM/project 1306e15 — clang/lib/Analysis UnsafeBufferUsage.cpp

[-Wunsafe-buffer-usage] Speed up warning a bit (#226605)

Checking a type is faster than calling ignoreUnsafeBufferIn...(). The
latter has to get the Stmt's begin loc, look up diagnostic state and
suppression, etc. And the type check lets us skip most Stmts cheaply, so
do that first.

In a sampling profile of 48 Chromium TUs (which are built with
-Wunsafe-buffer-usage), UnsafeBufferUsageReporter's
ignoreUnsafeBufferInLibcCall() and ignoreUnsafeBufferInContainer() were
1.35% and 1.29% of the total compile time, and 3.75% for
checkUnsafeBufferUsage() as a whole.

For 60 random Chromium TUs drawn with probability proportional to their
compile time, sum over all TUs:

    CPU time: 242.9 s => 237.5 s, -2.2%
    instructions: 2452.6e9 => 2371.8e9, -3.3%

No behavior change.
DeltaFile
+16-14clang/lib/Analysis/UnsafeBufferUsage.cpp
+16-141 files

LLVM/project 99667dd — llvm/test/CodeGen/X86/apx bls-egpr.ll

[X86][APX] Precommit test for BLSI/BLSMSK i8 patterns with EGPR (NFC) (#226793)

The i8 BLSI/BLSMSK patterns always select the VEX forms, so when only
extended GPRs (r16-r31) are available the operands get spilled instead
of using the EVEX forms.

Tests for #226796

Assisted-by: Claude Code

Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+137-0llvm/test/CodeGen/X86/apx/bls-egpr.ll
+137-01 files

LLVM/project f4c1a20 — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 fp-intrinsics-flags.ll fpcw-dead-eflags.ll

X86: Mark EFLAGS dead on the FP control word OR (#227017)

Fix custom inserters to add dead flags.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+74-0llvm/test/CodeGen/X86/fpcw-dead-eflags.ll
+5-2llvm/lib/Target/X86/X86ISelLowering.cpp
+1-1llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
+80-33 files

LLVM/project 2257b64 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

comment fix
DeltaFile
+1-1llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1-11 files

LLVM/project 1f90d49 — llvm/include/llvm/CodeGen SelectionDAG.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

Revert "helper"

This reverts commit fd5362699f8ec71960007213176b83817dd3f19f.
DeltaFile
+5-2llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+0-5llvm/include/llvm/CodeGen/SelectionDAG.h
+5-72 files

LLVM/project a4d89f1 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

DAG: Use poison for some vector element folds
DeltaFile
+7-4llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+7-41 files

LLVM/project 2d7d840 — llvm/include/llvm/CodeGen SelectionDAG.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

helper
DeltaFile
+2-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+5-0llvm/include/llvm/CodeGen/SelectionDAG.h
+7-52 files

LLVM/project fc1e244 —

[ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)

This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.

This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664).  With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.

Assisted-by: Antigravity
DeltaFile
+0-00 files

LLVM/project 4fce7d6 — clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp

[clang] Add one-entry cache for ASTContext::getDeclAttrs() (#226610)

In libc++, almost every decl has attributes, so ASTContext::DeclAttrs
has 50k-150k entries when using libc++. But attributes are often queried
several times in a row for the same decl (e.g. `D->hasAttr<A>() ||
D->hasAttr<B>()`). Numbers for some Chromium TUs:

                                        getDeclAttrs()  same Decl as   table
                                        calls           previous call  size
    blink logical_box_fragment.cc       19.6M           88.4%          156132
    glic_webui_contents_manager.cc      16.0M           86.1%          144545
    tflite kernels/conv.cc               6.1M           91.2%           52623

So add a one-element cache. AttrVecs are allocated separately, so
keeping a pointer to the result is safe.

Build time for 60 random Chromium TUs drawn with probability
proportional to their compile time:


    [8 lines not shown]
DeltaFile
+11-0clang/lib/AST/ASTContext.cpp
+4-0clang/include/clang/AST/ASTContext.h
+15-02 files

LLVM/project cb4b7ec — clang/test/OpenMP structured-bindings-codegen.cpp parallel_master_taskloop_simd_firstprivate_codegen.cpp

[OpenMP] Preserve host capture lifetimes in frontend lowering

Mark captured alloca/global storage nofreeobj when Clang emits a synchronous
host parallel call. This preserves lifetime across outlining without claiming
that escaped capture slots are noalias or immutable, and without extending the
lifetime guarantee to pointers loaded from those slots.

Mark OpenMPIRBuilder's fresh host capture aggregate noalias and nofreeobj.
This covers the lowering path used by Flang and Clang's IRBuilder mode.

Replace callback Attributor seeding with frontend and translation tests,
including escaped captures, heap references, firstprivate pointers, debug
wrappers, serialized regions, and optimized load hoisting with OpenMPOpt
disabled. Refresh the affected parameter-attribute checks.
DeltaFile
+1,897-1,897clang/test/OpenMP/task_codegen.cpp
+527-527clang/test/OpenMP/parallel_master_taskloop_simd_codegen.cpp
+286-286clang/test/OpenMP/parallel_master_taskloop_simd_lastprivate_codegen.cpp
+283-283clang/test/OpenMP/parallel_codegen.cpp
+235-235clang/test/OpenMP/parallel_master_taskloop_simd_firstprivate_codegen.cpp
+221-221clang/test/OpenMP/structured-bindings-codegen.cpp
+3,449-3,44979 files not shown
+5,551-5,31285 files

LLVM/project 8ece767 — llvm/include/llvm/ADT DenseMap.h

[ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)

This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.

This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664).  With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.

Assisted-by: Antigravity
DeltaFile
+262-219llvm/include/llvm/ADT/DenseMap.h
+262-2191 files

LLVM/project 81cdde2 — llvm/test/CodeGen/AArch64/GlobalISel select-usubo.mir select-usube.mir

AArch64: Mark the NZCV def dead for unused overflow results (#227018)

Avoid implicitly depending on later recomputed dead flags.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+4-4llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
+4-4llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
+4-4llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
+4-4llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
+4-4llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
+4-4llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
+24-243 files not shown
+35-339 files

LLVM/project 221fe11 — clang/test/CodeGenHLSL matrix-layout-attr-overrides-default.hlsl, clang/test/CodeGenHLSL/BasicFeatures MatrixToAndFromVectorConstructors.hlsl MatrixImplicitTruncation.hlsl

[HLSL] Preserve matrix layout as AST storage metadata (#225519)

fixes #213996
fixes #211977
fixes https://godbolt.org/z/rhTYx1KGf

Keep matrix layout metadata on noncanonical matrix types without
affecting type identity, overload resolution, deduction, or mangling.

Normalize matrix values to column-major register representation when
loading from memory, and convert them back to the destination layout
when storing. Preserve layout metadata through typedefs, arrays,
records, resources, serialization, AST import, and template
substitution.

This change also starts the reversal of encoding row\column major via
indexing changes in codegen and instead ops for a stable index but
transpose intrinsics for swapping matrix majorness.
DeltaFile
+329-150clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
+251-110clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
+222-96clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
+34-48clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
+27-23clang/test/CodeGenHLSL/builtins/mul.hlsl
+33-15clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
+896-44227 files not shown
+1,158-63033 files

LLVM/project a29c090 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp LoopVectorizationLegality.cpp, llvm/test/Transforms/LoopVectorize early-exit-tail-folding.ll

[VPlan] Support tail folding uncountable early exits
DeltaFile
+103-154llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
+66-110llvm/test/Transforms/LoopVectorize/RISCV/early-exit.ll
+47-77llvm/test/Transforms/LoopVectorize/early-exit-tail-folding.ll
+35-12llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+22-4llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+8-0llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+281-3576 files

LLVM/project a0f704d — llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Skip invalidation with empty ValueExprMap (NFC). (#226845)

forgetLoop, forgetValue and forgetValues walk the def-use chains from
the forgotten instructions and erase each visited value's SCEV. This can
be expensive.

If ValueExprMap is empty, there's nothing to forget and skipping the
walk reduces compile-time a bit:
stage1-O3: -0.05%
stage1-ReleaseThinLTO: -0.05%
stage1-ReleaseLTO-g: -0.03%
stage1-aarch64-O3: -0.04%
stage2-O3: -0.05%
stage2-clang: -0.01%


https://llvm-compile-time-tracker.com/compare.php?from=899d817c7950c997402cd229935cd822acf45b08&to=c43f92b9840b62f75ab8a45b7379188d78d81135&stat=instructions:u

PR: https://github.com/llvm/llvm-project/pull/226845
DeltaFile
+5-0llvm/lib/Analysis/ScalarEvolution.cpp
+5-01 files

LLVM/project 0767e7c — lldb/packages/Python/lldbsuite/test lldbtest.py

[lldb][test] Don't add pdb to explicitly tagged debug info categories (#226999)

`LLDBTestCaseFactory` appends `"pdb"` to `dbginfo_categories` whenever
the class sets `TEST_WITH_PDB_DEBUG_INFO=True`. When a test method is
tagged with explicit debug info categories
(`@add_test_categories(["dwarf"])`), `dbginfo_categories` is the set
intersection of the method's categories and the known debug info
categories, not a list, so the class failed to load with

```
      AttributeError: 'set' object has no attribute 'append'
```
and dotest reported the whole file as UNRESOLVED.

Only add "pdb" when the method is not tagged, which is also the only
case where the default categories are used.

rdar://188589961
DeltaFile
+4-4lldb/packages/Python/lldbsuite/test/lldbtest.py
+4-41 files

LLVM/project 517839b — llvm/lib/Analysis VectorUtils.cpp, llvm/test/Transforms/LoopVectorize intrinsic.ll

[VectorUtils] Allow trivial vectorization of llvm.pdep and llvm.pext intrinsics (#227019)
DeltaFile
+60-0llvm/test/Transforms/LoopVectorize/intrinsic.ll
+2-0llvm/lib/Analysis/VectorUtils.cpp
+62-02 files

LLVM/project 33eb30d — clang/lib/CodeGen/TargetBuiltins RISCV.cpp, clang/test/CodeGen/RISCV rvp-intrinsics.c

[Clang][RISCV] Add packed widening shift intrinsics (#224790)

This PR adds support for the Packed Widening Shift intrinsics:

- `__riscv_pwsll_s_u16x4`
- `__riscv_pwsll_s_u32x2`
- `__riscv_pwsla_s_i16x4`
- `__riscv_pwsla_s_i32x2`
DeltaFile
+186-0llvm/test/CodeGen/RISCV/rvp-widening-shift.ll
+90-0cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+80-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+27-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+20-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+12-0clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
+415-03 files not shown
+439-09 files

LLVM/project 6015b86 — llvm/test/CodeGen/AArch64 aarch64-za-clobber.ll aarch64-sme2-asm.ll, llvm/test/CodeGen/AMDGPU/GlobalISel irtranslator-inline-asm.ll

CodeGen: Mark inline asm clobber defs dead

A clobber operand has no value associated with it, so the def is always
dead. Set the flag where the INLINEASM is built instead of relying on
later inference.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+64-64llvm/test/CodeGen/AArch64/aarch64-sme2-asm.ll
+3-5llvm/test/CodeGen/PowerPC/pr47155-47156.ll
+3-3llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
+2-2llvm/test/CodeGen/AArch64/aarch64-za-clobber.ll
+1-1llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
+76-786 files not shown
+82-8212 files

LLVM/project d359e9d — llvm/lib/Support raw_socket_stream.cpp, llvm/unittests/Support raw_socket_stream_test.cpp

[llvm][Support] Use ::closesocket for native sockets on Windows (#226613)

Calling ::close on a Windows SOCKET that has not been converted with
_open_osfhandle crashes and aborts the process with 0xC0000409 instead
of returning an error.

Use ::closesocket on Windows for those sockets, and keep ::close on
POSIX.
DeltaFile
+30-18llvm/lib/Support/raw_socket_stream.cpp
+10-0llvm/unittests/Support/raw_socket_stream_test.cpp
+40-182 files

LLVM/project 1aa8a5a — llvm/lib/Target/AMDGPU SILowerControlFlow.cpp, llvm/test/CodeGen/AMDGPU lower-control-flow-live-variables-update.xfail.mir lower-control-flow-live-variables-update.mir

AMDGPU: Remove update-only LiveVariables maintenance from SILowerControlFlow

This was only maintained, never relied on. Part of staged LiveVariables
removal.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+87-0llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
+5-71llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+0-42llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
+92-1133 files

LLVM/project 06763ff — llvm/lib/CodeGen TwoAddressInstructionPass.cpp, llvm/test/CodeGen/Hexagon two-addr-tied-subregs.mir

CodeGen: Remove LiveVariables use from TwoAddressInstructionPass

Now that LiveIntervals is computed unconditionally before TwoAddressInstructions
in the pipeline, the pass no longer needs LiveVariables.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+38-131llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+18-18llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
+9-16llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
+8-8llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
+7-7llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
+3-3llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
+83-1831 files not shown
+85-1857 files

LLVM/project 7df2866 — llvm/lib/Target/NVPTX NVPTXTargetMachine.cpp NVPTXCodeGenPassBuilder.cpp, llvm/test/CodeGen/NVPTX llc-pipeline-npm.ll

NVPTX: Drop LiveVariables from the register allocation pipeline

The optimized RegAlloc pipeline ran LiveVariables only to satisfy PHIElimination
and TwoAddressInstruction, both of which no longer need it. Remove the
LiveVariables run (and, in the new pass manager, the UnreachableMachineBlockElim
that was there only as a LiveVariables prerequisite).

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+0-7llvm/lib/Target/NVPTX/NVPTXCodeGenPassBuilder.cpp
+0-2llvm/test/CodeGen/NVPTX/llc-pipeline-npm.ll
+0-1llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+0-103 files

LLVM/project 7dc4215 — llvm/lib/Target/AMDGPU SIFoldOperands.cpp SIInstrInfo.cpp, llvm/lib/Target/RISCV RISCVInstrInfo.cpp

CodeGen: Drop the LiveVariables parameter from convertToThreeAddress

This was used for analysis updates, but now the analysis is being
removed.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+15-69llvm/lib/Target/X86/X86InstrInfo.cpp
+0-17llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+0-11llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+1-10llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+2-4llvm/lib/Target/X86/X86InstrInfo.h
+2-2llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+20-1136 files not shown
+25-12012 files

LLVM/project 9775178 — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.960bit.ll load-constant-i8.ll

CodeGen: Compute LiveIntervals before TwoAddressInstructions

TwoAddressInstructions is the traditional primary use of LiveVariables,
but it has gained a LiveIntervals path. By moving LiveIntervals earlier,
the default flips to rely on it instead of LiveVariables. The overall
test churn is mostly neutral, with more net wins than losses.

This should move before phi elimination. This is a staging move to
incrementally remove the LiveVariables support from TwoAddressInstructions,
and because the move to running LiveIntervals on SSA is a bigger leap.

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+42,004-42,000llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+7,206-7,302llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+2,603-2,582llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
+1,833-1,839llvm/test/CodeGen/AMDGPU/load-local-i16.ll
+1,790-1,779llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
+1,685-1,735llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+57,121-57,237308 files not shown
+97,788-98,270314 files

LLVM/project 5198f10 — llvm/lib/CodeGen TargetPassConfig.cpp, llvm/test/CodeGen/RISCV/rvv fminimum-sdnode.ll fmaximum-sdnode.ll

Remove the obsolete -early-live-intervals flag
DeltaFile
+89-180llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
+2-9llvm/test/CodeGen/Thumb2/mve-shuffle.ll
+0-8llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
+0-8llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
+1-5llvm/test/CodeGen/Thumb2/mve-vld3.ll
+0-5llvm/lib/CodeGen/TargetPassConfig.cpp
+92-21543 files not shown
+96-27449 files

LLVM/project d949523 — llvm/test/CodeGen/X86/apx ccmp-flag-source.ll

[X86] Add tests for CCMP chain leaves with a folded flag source (#226797)

Tests for #217682

Assisted-by: Claude Code
DeltaFile
+177-0llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
+177-01 files

LLVM/project 28acf4e — .ci/green-dragon lldb-windows.groovy

[lldb][Windows][CI] remove in process plugin testing (#226989)

lldb-server is now the default on Windows, stop testing the in process
plugin.
DeltaFile
+3-10.ci/green-dragon/lldb-windows.groovy
+3-101 files

LLVM/project b550208 — llvm/lib/Target/Mips MipsMSAInstrInfo.td, llvm/test/CodeGen/Mips/msa bitcast.ll

[MIPS] add f16 vector bitcast patterns (#226287)

came across this failure

https://godbolt.org/z/YPK78ea76

```llvm
; -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64

define <4 x float> @f(<8 x half> %a) {
  %b = bitcast <8 x half> %a to <4 x float>
  ret <4 x float> %b
}
```

Gives 

```
LLVM ERROR: Cannot select: 0x3b4ac900: v8f16 = bitcast 0x3b4acf90

    [16 lines not shown]
DeltaFile
+41-18llvm/test/CodeGen/Mips/msa/bitcast.ll
+6-0llvm/lib/Target/Mips/MipsMSAInstrInfo.td
+47-182 files

LLVM/project 5c20fe9 — clang/lib/CodeGen BackendConsumer.h CodeGenAction.cpp, clang/lib/Interpreter Interpreter.cpp DeviceOffload.h

releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation" (#226930)

This PR implements the IncrementalHIPDeviceParser. It takes each
incremental statement's device code and lowers it all the way to a
loadable HIP fat binary: linking the ROCm device libraries, running the
AMDGPU optimization/codegen pipeline, producing a .hsaco code object,
and embedding it as __hip_fatbin for the host runtime to register and
launch.

This PR only adds the parser class, wiring it into `Interpreter.cpp`;
the end-to-end tests will come in a follow-up.

Reland of #218337 (reverted in #226679 due to buildbot failures): the
original hit a build race where `DeviceOffload.cpp` could be compiled
before the tablegen-generated `AMDGPUTargetParserDef.inc` existed. Fixed
by adding `target_parser_gen `to `clang/lib/Interpreter/CMakeLists.txt`.

Assisted by Claude Opus 4.8
DeltaFile
+209-8clang/lib/Interpreter/DeviceOffload.cpp
+55-9clang/lib/Interpreter/DeviceOffload.h
+50-0clang/unittests/Basic/TargetIDTest.cpp
+9-0clang/lib/CodeGen/CodeGenAction.cpp
+8-0clang/lib/CodeGen/BackendConsumer.h
+1-6clang/lib/Interpreter/Interpreter.cpp
+332-234 files not shown
+342-2510 files