[lldb-server][NFC] Factor out code handling breakpoint packets
This commit extracts the code handling breakpoint packets into a helper
function that can be used by a future implementation of the
MultiBreakpointPacket.
It is meant to be purely NFC.
There are two functions handling breakpoint packets (`handle_Z`
and `handle_z`) with a lot of repeated code. This commit did not attempt
to merge the two, as that would make the diff much larger due to subtle
differences in the error message produced by the two. The only
deduplication done is in the code processing a GDBStoppointType, where a
helper struct (`BreakpointKind`) and function (`std::optional<BreakpointKind> getBreakpointKind(GDBStoppointType stoppoint_type)`) was created.
https://github.com/llvm/llvm-project/pull/192910
[analyzer] Fix typo in ExprEngine.h (#193535)
While I was studying the code base I have spotted some typo in the
`ExprEngine.h` in this PR I have fixed these typos.
[LifetimeSafety] Simplify `AccessPath` root `PointerUnion` (#193520)
Stores generic `Expr*` and `Decl*` in `AccessPath`'s `PointerUnion` to
avoid problems where we do not have enough available low bits when more
template parameters are added.
[clang][docs] open details of C++{17,14,11} implementation by default (#193141)
Before
https://github.com/llvm/llvm-project/commit/b9c0e590f1fd4ea37da5c2b9b78d8e715c885f56
switched the C++ status page to a reverse chronological order, it made
sense to avoid wasting vertical space for already-implemented standards.
After that switch, it would make sense however to unfold them by
default.
This is for example why I had opened #61426, because CRTL+F did not show
P0588 on the status page[^1]. But not just for this paper, I think the
ease of finding papers is a good argument for folding out those tables.
[^1]: together with the fact that other status pages
([example](https://en.cppreference.com/cpp/compiler_support/20)) have
sorted this paper under C++20 rather than C++11.
[flang] Add the MLIR pass pipelines for dumping (#183144)
The flang driver never registered passes in the MLIR pass registry, so
--mlir-print-ir-before=<pass> always failed with `Cannot find option`.
This commit adds pass registration calls before CLI option parsing in
the -mmlir handler such that all ~30 pipeline passes are now selectable.
[lldb/test] Relax NSBundle formatter test for Darwin embedded platforms (#193659)
Some Foundation APIs have been migrated from Objective-C to Swift while
maintaining backward compatibility. For instance, that can cause
`NSBundle` created via `initWithURL:` to format without the `@"..."`
prefix.
Match the path string without requiring the @ prefix so the test passes
with both the ObjC and Swift implementations
rdar://175394563
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
[NFC][Target] Fixed rule-of-three for RegisterTargetPassConfigCallback class (#193470)
- This PR fixes ```RegisterTargetPassConfigCallback``` classes default
member functions as per rule of three
(https://en.cppreference.com/cpp/language/rule_of_three)
[ConstantFolding] Constant fold nextafter and nexttoward (#168794)
Closes #74368.
This patch enables us to constant fold `nextafter` and `nexttoward` as
long as we know that `errno` won't be written. In the latter case, we
should keep the function call so the programmer can observe the side
effect.
[AMDGPU] Fix s_cselect scc clobber issue (#193498)
The frame index elimination e.g., for S_CSELECT_B32 (which reads SCC)
uses the SCC-preserving S_ADDC_U32+S_BITCMP1_B32+S_BITSET0_B32 sequence
instead of a plain S_ADD_I32, even when the regscavenger reports SCC as
unused due to its backward scan removing the SCC def from the live set.
Root cause: scavengeRegisterBackwards scans backward from MI and calls
LiveRegUnits::stepBackward() on each instruction. stepBackward removes
defs from the live set. When it processes the S_AND_B64 (which defines
SCC) immediately before S_CSELECT_B32, SCC is removed from LiveUnits.
This makes RS->isRegUsed(SCC) return false, so NeedSaveSCC was false
before the fix.
The fix adds MI->readsRegister(SCC) to the NeedSaveSCC condition so the
SCC-preserving ADDC+BITCMP1+BITSET0 sequence is always used when MI
reads SCC, regardless of what the regscavenger reports.
- commit message and the test are generated by claude
[flang] Ignore -fno-realloc-lhs for polymorphic allocatable LHS with warning (#192697)
When -fno-realloc-lhs is specified and the LHS of an assignment is a
polymorphic allocatable (class(*) or class(T)), reallocation semantics
are required by the Fortran 2003 standard for dynamic type tracking and
cannot be safely skipped. Previously, the compiler generated invalid FIR
in such cases (type mismatch between i32 and
!fir.class<!fir.heap<none>>), causing a compilation error.
With this change, when -fno-realloc-lhs is in effect and a polymorphic
allocatable LHS is detected, the compiler emits a warning that the
option is being ignored for that assignment and proceeds with
reallocation semantics.
[lit] Fix `progress-bar.py` flaky test
The `lit` progress-bar test was checking for exact progress-bar text
like `0.. 10.. 20.. 30.. 40..`, but that output is not stable from run
to run.
The progress bar is based on timing estimates, including saved timings
from earlier runs, so small timing differences can change which numbers
get printed.
That made the test flaky: FileCheck could match the wrong Testing: line
and then fail later, even though the actual test failures were correct.
Relax the test to verify ordering instead of exact progress-bar
contents. The updated checks assert that the test header is printed, that
each failing test result is separated by a Testing: progress-bar line,
and that the final failed-tests summary lists all expected tests in order.
This preserves coverage for the simple progress-bar path while removing
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[LoongArch] Add patterns for vector bitwise selection
Add instruction selection patterns for VBITSEL_V/XVBITSEL_V and
VBITSELI_B/XVBITSELI_B to match the canonical bitwise select idiom:
`(a & b) | (~a & c)`
This enables the backend to generate dedicated bitwise select
instructions instead of separate AND/ANDN/OR sequences.
