LLVM/project 4670f59llvm/test/Analysis/DependenceAnalysis banerjee-overflow.ll

update
DeltaFile
+5-4llvm/test/Analysis/DependenceAnalysis/banerjee-overflow.ll
+5-41 files

LLVM/project 4376a41llvm/test/Transforms/LoopVectorize find-last-iv-sinkable-expr-epilogue.ll, llvm/test/Transforms/LoopVectorize/AArch64 epilog-iv-live-outs.ll find-last-iv-sinkable-expr-epilogue.ll

Address comments

Created using spr 1.3.7
DeltaFile
+257-0llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-live-outs.ll
+209-23mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+206-14mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+212-0llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
+189-0mlir/test/Target/LLVMIR/nvvm/convert_s2f6x2.mlir
+172-0llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
+1,245-37135 files not shown
+2,509-1,044141 files

LLVM/project b6e7c47llvm/lib/CodeGen/SelectionDAG ScheduleDAGRRList.cpp, llvm/test/CodeGen/ARM pr190497.ll

[CodeGen] Ignore `ANNOTATION_LABEL` in scheduler (#190499)

This fixes a crash in `clang` for `armv7` targets when optimizations are
enabled.

Fixes #190497
DeltaFile
+39-0llvm/test/CodeGen/ARM/pr190497.ll
+1-0llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+40-02 files

LLVM/project 0403639llvm/lib/Transforms/Vectorize VPlan.cpp, llvm/test/Transforms/LoopVectorize early_exit_with_outer_loop.ll

[VPlan] Skip successors outside any loop when updating LoopInfo. (#190553)

Successors outside of any loop do not contribute to the innermost loop,
skip them to avoid incorrect results due to
getSmallestCommonLoop(nullptr, X) returning nullptr.
DeltaFile
+115-0llvm/test/Transforms/LoopVectorize/early_exit_with_outer_loop.ll
+15-8llvm/lib/Transforms/Vectorize/VPlan.cpp
+130-82 files

LLVM/project 05ff170llvm/lib/Transforms/InstCombine InstCombineShifts.cpp InstCombineCompares.cpp, llvm/test/Transforms/InstCombine icmp-shl-add-to-add.ll apint-shift.ll

[InstCombine] Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted (#165975)

Consider a pattern like `icmp (shl nsw X, L), (add nsw (shl nsw Y, L),
K)`. When the constant K is a multiple of 2^L, this can be simplified to
`icmp X, (add nsw Y, K >> L)`.
This patch extends canEvaluateShifted to support `Instruction::Add` and
updates its signature to accept `Instruction::BinaryOps` instead of a
boolean. This change allows the function to distinguish between LShr and
AShr requirements, ensuring that information is preserved according to
the signedness and overflow flags (nsw/nuw) of the operands.
The logic is integrated into `foldICmpCommutative` to enable peeling off
matching shifts from both sides of a comparison even when an offset is
present.

Fixes: #163110
DeltaFile
+311-0llvm/test/Transforms/InstCombine/icmp-shl-add-to-add.ll
+111-41llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+28-0llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+14-0llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+3-3llvm/test/Transforms/InstCombine/apint-shift.ll
+1-1llvm/test/Transforms/InstCombine/icmp-select.ll
+468-456 files

LLVM/project 3b02210llvm/utils/gn/secondary/lldb/source/Host BUILD.gn

[gn] fix mistake from 88f6b181b6ab2 (#190601)
DeltaFile
+1-1llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
+1-11 files

LLVM/project 4539d71llvm/lib/Target/AMDGPU AMDGPUResourceUsageAnalysis.cpp, llvm/test/CodeGen/AMDGPU resource-usage-asan-O0.ll

[AMDGPU] Preserve assumed stack size for ASan-instrumented functions at -O0
DeltaFile
+29-0llvm/test/CodeGen/AMDGPU/resource-usage-asan-O0.ll
+18-4llvm/lib/Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp
+47-42 files

LLVM/project ded8e89llvm/test/CodeGen/AMDGPU amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll

[AMDGPU] Use ASan callback functions instead of inline checks in SW lower LDS pass
DeltaFile
+31-157llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
+8-119llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
+6-117llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-indirect-access-asan.ll
+3-118llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
+7-98llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
+4-89llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
+59-6987 files not shown
+121-96913 files

LLVM/project 64a0bd1llvm/lib/Transforms/Vectorize LoopVectorize.cpp LoopVectorizationPlanner.h

[LV] Return best VPlan together with VF from computeBestVF (NFC). (#190385)

computeBestVF iterates over all VPlans and picks the VF of the most
profitable VPlan. This VPlan is later needed for execution and
additional checks. Instead of retrieving it multiple times later, just
directly return it from computeBestVF.

This removes some redundant lookups.

PR: https://github.com/llvm/llvm-project/pull/190385
DeltaFile
+33-29llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+8-6llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+41-352 files

LLVM/project 4cce6f8llvm/test/tools/llvm-ir2vec/bindings ir2vec-initEmbedding.py ir2vec-getInstEmbMap.py, llvm/tools/llvm-ir2vec/Bindings PyIR2Vec.cpp

[llvm-ir2vec] Added Enum for ir2vec embedding mode (#190466)

Currently, the initEmbedding() takes mode as an input. This input is a
string input. This PR introduces a patch to take the input as an enum
value.
DeltaFile
+19-7llvm/test/tools/llvm-ir2vec/bindings/ir2vec-initEmbedding.py
+12-12llvm/tools/llvm-ir2vec/Bindings/PyIR2Vec.cpp
+3-1llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getInstEmbMap.py
+3-1llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncNames.py
+3-1llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmbMap.py
+3-1llvm/test/tools/llvm-ir2vec/bindings/ir2vec-getFuncEmb.py
+43-231 files not shown
+46-247 files

LLVM/project f7cdebbllvm/lib/Transforms/Vectorize VPlanRecipes.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

[VPlan] Mark unary ops as not having side-effects (NFC). (#190554)

Mark unary ops (only FNeg current) to neither read nor write memory,
similar to binary and cast ops.

Should currently be NFC end-to-end.
DeltaFile
+10-0llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+2-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+12-12 files

LLVM/project 63231ebmlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/lib/Dialect/LLVMIR/IR NVVMDialect.cpp

[MLIR][NVVM] Add new narrow FP convert Ops (#184291)

This change adds the following NVVM Ops for new narrow FP conversions
introduced in PTX 9.1:
- `convert.{f32x2/bf16x2}.to.s2f6x2`
- `convert.s2f6x2.to.bf16x2`
- `convert.bf16x2.to.f8x2` (extended for `f8E4M3FN` and `f8E5M2` types)
- `convert.{f16x2/bf16x2}.to.f6x2`
- `convert.{f16x2/bf16x2}.to.f4x2`

PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-cvt
DeltaFile
+209-23mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+206-14mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+189-0mlir/test/Target/LLVMIR/nvvm/convert_s2f6x2.mlir
+74-3mlir/test/Target/LLVMIR/nvvm/convert_fp6x2.mlir
+41-0mlir/test/Target/LLVMIR/nvvm/convert_fp8x2_invalid.mlir
+28-0mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
+747-405 files not shown
+807-5711 files

LLVM/project e326ff2clang-tools-extra/clang-tidy/cppcoreguidelines ProTypeMemberInitCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix FP on cppcoreguidelines-pro-type-member-init with forward decl (#190521)

Fixes https://github.com/llvm/llvm-project/issues/155416.
DeltaFile
+24-0clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/pro-type-member-init.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+2-1clang-tools-extra/clang-tidy/cppcoreguidelines/ProTypeMemberInitCheck.cpp
+31-13 files

LLVM/project ce1a9fdmlir/include/mlir/Dialect/ControlFlow/IR ControlFlowOps.td, mlir/include/mlir/Interfaces ControlFlowInterfaces.td

Reland "[mlir][reducer] Add eraseRedundantBlocksInRegion and getSuccessorForwardOperands API to BranchOpInterface" (#189253)

After fixing undefined symbol and memory leak issues(You can see
previous issue https://github.com/llvm/llvm-project/pull/189150), the PR
would like to reland
it(https://github.com/llvm/llvm-project/pull/187864).
DeltaFile
+114-0mlir/lib/Reducer/ReductionTreePass.cpp
+65-0mlir/test/mlir-reduce/reduction-tree.mlir
+24-0mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
+10-0mlir/lib/Reducer/ReductionNode.cpp
+6-4mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+228-42 files not shown
+232-48 files

LLVM/project 5e14916bolt/lib/Profile DataReader.cpp, bolt/test empty-fdata-file.test

Early exit llvm-bolt when coming across empty data files (#176859)

perf2bolt generates empty fdata files for small binaries and right now
BOLT does this check while parsing by calling `((!hasBranchData() &&
!hasMemData()))`. Instead, early exit as soon as the buffer finishes
reading the data file and exit with error message.
DeltaFile
+12-0bolt/test/empty-fdata-file.test
+9-3bolt/lib/Profile/DataReader.cpp
+21-32 files

LLVM/project 26697f4polly/lib/CodeGen IslExprBuilder.cpp, polly/test/CodeGen issue190459_1.ll

[Polly] Correct integer comparison bit width (#190493)

For making an integer compareable to bool, don't compare it to bool.

Bug occured during the reduction of #190459
DeltaFile
+27-0polly/test/CodeGen/issue190459_1.ll
+2-1polly/lib/CodeGen/IslExprBuilder.cpp
+29-12 files

LLVM/project 1839b75llvm/cmake/modules HandleLLVMOptions.cmake

[runtimes] Skip custom linker validation for gpu/offload targets (#189933)

This fixes `Host compiler does not support '-fuse-ld=lld'` error when
cross-build libclc for gpu target. Cmake configure command is:
-DRUNTIMES_amdgcn-amd-amdhsa-llvm_LLVM_ENABLE_RUNTIMES=libclc \
-DLLVM_RUNTIME_TARGETS="amdgcn-amd-amdhsa-llvm"
libclc targets only support offload target cross-build and can't link
host executable. The configuration error is false positive for offload.

This PR adds a baseline test to first check if the target can link
executable. If it fails (typical for gpu/offload), we skip the custom
linker validation.
DeltaFile
+12-6llvm/cmake/modules/HandleLLVMOptions.cmake
+12-61 files

LLVM/project 3564570llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Fix formatting

Created using spr 1.3.7
DeltaFile
+9-11llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+9-111 files

LLVM/project 96b2a4ellvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll

Rebase

Created using spr 1.3.7
DeltaFile
+161,105-175,310llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+54,366-54,928llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+92,827-0llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+41,419-41,418llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+36,428-36,427llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+428,494-350,43134,353 files not shown
+4,984,546-3,040,38734,359 files

LLVM/project 58208a0llvm/test/Transforms/LoopVectorize find-last-iv-sinkable-expr-epilogue.ll, llvm/test/Transforms/LoopVectorize/AArch64 epilog-iv-live-outs.ll find-last-iv-sinkable-expr-epilogue.ll

[LV] Additional epilogue tests for find-iv and with uses of IV.(NFC) (#190548)

Additional test coverage for loops not yet supported, with sinkable
find-iv expressions (github.com/llvm/llvm-project/pull/183911) and uses
of the IV.

PR: https://github.com/llvm/llvm-project/pull/190548
DeltaFile
+257-0llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-live-outs.ll
+212-0llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-epilogue.ll
+172-0llvm/test/Transforms/LoopVectorize/AArch64/find-last-iv-sinkable-expr-epilogue.ll
+641-03 files

LLVM/project c109dd1llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlanPatternMatch.h

[VPlan] Refactor FindLastSelect matching to use m_Specific(PhiR) (NFC). (#190547)

Match the select operands directly against PhiR using m_Specific,
binding only the non-phi IV expression. This replaces the generic
TrueVal/FalseVal matching followed by an assert and conditional
extraction.

Split off from approved
https://github.com/llvm/llvm-project/pull/183911/ as suggested.
DeltaFile
+17-15llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+5-0llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+22-152 files

LLVM/project 4bd1facllvm/docs GettingStarted.rst

[llvm][docs] Fix typo (#190150)

This commit corrects a typo in the project documentation.
DeltaFile
+1-1llvm/docs/GettingStarted.rst
+1-11 files

LLVM/project 9ce30c8llvm/lib/ExecutionEngine/Orc/TargetProcess LibraryScanner.cpp

[Orc][LibResolver] Fix GNU/Hurd build (#184470)

GNU/Hurd does not put a PATH_MAX static constraint on path lengths. We can instead check the symlink length.
DeltaFile
+3-5llvm/lib/ExecutionEngine/Orc/TargetProcess/LibraryScanner.cpp
+3-51 files

LLVM/project 11e7a49lldb/include/lldb/Utility VMRange.h, lldb/source/Core Section.cpp

[lldb] Remove VMRange class (NFC) (#190475)

We have a template class `Range` that provides similar functionality and
is much more widely used.
DeltaFile
+0-151lldb/unittests/Utility/VMRangeTest.cpp
+0-104lldb/include/lldb/Utility/VMRange.h
+0-69lldb/source/Utility/VMRange.cpp
+22-1lldb/unittests/Utility/RangeTest.cpp
+3-4lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+1-4lldb/source/Core/Section.cpp
+26-3334 files not shown
+26-33710 files

LLVM/project f8e394blldb/source/Plugins/ObjectFile/ELF ObjectFileELF.cpp, lldb/unittests/ObjectFile/ELF TestObjectFileELF.cpp

[lldb] Fix section offset of synthesized entry point symbol (#190348)

In the non-ARM case, the offset was left unset, so the symbol
synthesized for the entry point pointed to the start of the containing
section.
As a drive-by change, simplify offset adjustment in ARM case.
DeltaFile
+37-0lldb/unittests/ObjectFile/ELF/TestObjectFileELF.cpp
+3-3lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+40-32 files

LLVM/project 353ab41lldb/unittests/Host SocketTest.cpp

[lldb] Update error message in SocketTest::CreatePair (#190544)
DeltaFile
+1-1lldb/unittests/Host/SocketTest.cpp
+1-11 files

LLVM/project 61550efmlir/include/mlir/IR OpImplementation.h, mlir/lib/AsmParser Parser.cpp

[MLIR] Add two-phase region parsing API to OpAsmParser
DeltaFile
+109-0mlir/test/mlir-tblgen/op-format.mlir
+35-0mlir/test/lib/Dialect/Test/TestOpsSyntax.td
+34-0mlir/lib/AsmParser/Parser.cpp
+33-0mlir/test/lib/Dialect/Test/TestOpsSyntax.cpp
+23-0mlir/include/mlir/IR/OpImplementation.h
+234-05 files

LLVM/project f866ef2lldb/source/Plugins/Language/CPlusPlus CPlusPlusLanguage.cpp LibCxxVector.cpp, lldb/source/Plugins/ScriptInterpreter/Python ScriptInterpreterPython.cpp

[lldb] Bring more diagnostics in compliance with our coding standards (#190410)

The LLVM Coding Standards [1] specify that:

> [T]o match error message styles commonly produced by other tools,
> start the first sentence with a lowercase letter, and finish the last
> sentence without a period, if it would end in one otherwise.

Historically, that hasn't been something we've enforced in LLDB, but in
the past year or so I've started to pay more attention to this in code
reviews. This PR brings more error messages in compliance, further
increasing consistency.

I also adopted `createStringErrorV` where it improved the code as a
drive-by for lines I was already touching.

[1] https://llvm.org/docs/CodingStandards.html#error-and-warning-messages

Assisted-by: Claude Code
DeltaFile
+26-26lldb/source/Plugins/Language/CPlusPlus/CPlusPlusLanguage.cpp
+15-15lldb/unittests/Expression/ExpressionTest.cpp
+6-10lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
+7-9lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
+6-10lldb/source/Plugins/Language/CPlusPlus/MsvcStlVector.cpp
+9-4lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
+69-7461 files not shown
+214-23267 files

LLVM/project 36e495dllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Use APSInt in CheckSentinel directly (NFC). (#190534)

Simplify the sentinel checking logic by using APSInt and checking for
both a signed and unsigned sentinel in a single call.

Removes the IsSigned argument

Split off from approved
https://github.com/llvm/llvm-project/pull/183911/ as suggested.
DeltaFile
+15-18llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+15-181 files

LLVM/project a2c16bbllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Rename CondSelect to FindLastSelect (NFC). (#190536)

…ns (NFC).

Use the more descriptive name FindLastSelect for the conditional select
that picks between the reduction phi and the IV value.

Split off from approved
https://github.com/llvm/llvm-project/pull/183911/ as suggested.
DeltaFile
+11-10llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+11-101 files