LLVM/project 92b0b15 — .github/workflows libc-shared-tests.yml compiler-rt-libc-builtins-tests.yml

[libc][GitHub] Bump runner image and move to clang 24 (#241667)

Try to keep up to date with the compiler.

Assisted-By: LLM
DeltaFile
+48-48.github/workflows/libc-fullbuild-tests.yml
+14-14.github/workflows/libc-overlay-tests.yml
+5-5.github/workflows/libc-shared-tests.yml
+5-5.github/workflows/compiler-rt-libc-builtins-tests.yml
+72-724 files

LLVM/project fc40c94 — llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp, llvm/test/CodeGen/AMDGPU stacksave_stackrestore.ll

[AMDGPU][GISel] Fix stack pointer shift direction in selectStackRestore (#240831)

`llvm.stacksave` returns `SP >> log2(wavesize)`. Restoring a value that
is not the direct result of `G_AMDGPU_WAVE_ADDRESS` has to shift that
value back left before copying it to the stack pointer.

However, `selectStackRestore` uses `S_LSHR_B32` on that path. Change it
to `S_LSHL_B32` instead.
DeltaFile
+28-28llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
+8-8llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.mir
+4-4llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+40-403 files

LLVM/project a4a4094 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[RISCV][P-ext] Use nsrl to for 64-bit extract_vector_elt with variable index on RV32.
DeltaFile
+6-30llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+21-6llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+27-362 files

LLVM/project 7cce16f — llvm/test/CodeGen/RISCV rvp-simd-32.ll rvp-simd-64.ll

[RISCV][P-ext] Add tests for extractelement with a variable index. NFC

Assisted-by: Claude
DeltaFile
+109-61llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+36-4llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+145-652 files

LLVM/project 10d414d — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[RISCV][P-ext] Fix crash on v2i32 extract_vector_elt with a variable index on RV32.

Assisted-by: Claude
DeltaFile
+63-39llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+6-3llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+69-422 files

LLVM/project 355676b — llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll

[RISCV][P-ext] Make v2i32 insert_vector_elt with constant indices legal for RV32.

We can select to an insert_subreg.

The default lowering created a store+load to stack that got folded,
but left behind the stack slot allocation.

Assisted-by: Claude
DeltaFile
+73-47llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+6-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+5-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+84-473 files

LLVM/project 50cd195 — cross-project-tests/intrinsic-header-tests riscv_packed_simd.c

fixup! Update test expectation
DeltaFile
+1-2cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+1-21 files

LLVM/project ed98bbc — lld/MachO InputSection.h, lld/test/MachO why-live.s

Address review comments

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
Claude-Session: https://claude.ai/code/session_0151E9ZpWv8G9QXmUg4V6AhM
DeltaFile
+1-1lld/test/MachO/why-live.s
+1-0lld/MachO/InputSection.h
+2-12 files

LLVM/project 150e366 — llvm/lib/Target/SPIRV SPIRVLegalizerInfo.cpp, llvm/test/CodeGen/SPIRV/llvm-intrinsics fixed-point-math-i64.ll fixed-point-math.ll

[SPIR-V] Lower G_SMULFIXSAT and G_UMULFIXSAT (#241155)

Reuse the G_SMULFIX rule, including the s64 gate

Also lower G_TRUNC_SSAT_S and G_TRUNC_USAT_U, which the generic mulfix
lowering emits
DeltaFile
+139-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/fixed-point-math.ll
+34-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/fixed-point-math-i64.ll
+4-1llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
+177-13 files

LLVM/project 0a3a3db — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/CodeGen varargs-with-nonzero-default-address-space.c

[CIR] Fix va_list lowering for non-zero default address space (#238455)

Drop the bitcast to a generic-AS `ptr`, which is invalid for `ptr
addrspace(4)` on SPIR-V
DeltaFile
+32-0clang/test/CIR/CodeGen/varargs-with-nonzero-default-address-space.c
+6-19clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+38-192 files

LLVM/project eb7d70e — mlir/lib/Dialect/XeGPU/Transforms XeGPULayoutImpl.cpp, mlir/test/Dialect/XeGPU propagate-layout-inst-data.mlir

[mlir][XeGPU] Preserve consumer instruction blocking for vector.multi_reduction (#240592)

vector.multi_reduction previously reset inst_data to lane_layout *
lane_data, losing larger instruction blocks requested by its consumer.
Preserve compatible consumer blocking on non-reduced dimensions when
reusing a matching slice parent.

Also improve the documentation and simplify the code logic regarding
lane assignment and vector packing, and add tests for blocking
preservation and clamping reused lanes to the source extent.

assisted-by-ai

---------

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+140-153mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
+124-0mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
+264-1532 files

LLVM/project 190adc7 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-32.ll rvp-simd-64.ll

[RISCV][P-ext] Lower 2 element insert_vector_elt to scalar_to_vec+ppaire/ppaireo.

This avoids needing to match the srl+build_vec later which we only
do on RV64.
DeltaFile
+9-14llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+2-4llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+1-2llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+12-203 files

LLVM/project eeb0ee7 — llvm/include/llvm/IR RuntimeLibcalls.h, llvm/lib/CodeGen DwarfEHPrepare.cpp AtomicExpandPass.cpp

[RuntimeLibcalls] Take the module in libcall signature converters (NFC)

The converters that turn declaration C type descriptions into IR types
and attributes take a context, a triple and a data layout. A libcall
declaration can also depend on properties recorded in the module itself
rather than in the triple, so pass the module instead and derive all
three from it.

Change getDefaultFunctionTy, getFunctionTy, getVariableType and the
static helpers they use to take a Module, and update the callers. No
functional change intended.

Assisted-by: Claude
DeltaFile
+27-22llvm/lib/IR/RuntimeLibcalls.cpp
+4-7llvm/include/llvm/IR/RuntimeLibcalls.h
+4-6llvm/lib/Target/ARM/ARMISelLowering.cpp
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+2-2llvm/lib/CodeGen/DwarfEHPrepare.cpp
+2-2llvm/lib/CodeGen/AtomicExpandPass.cpp
+41-413 files not shown
+45-479 files

LLVM/project 62ac48c — clang/lib/DependencyScanning DependencyScanningFilesystem.cpp, clang/unittests/DependencyScanning DependencyScanningFilesystemTest.cpp

[clang][deps] Give `LocalFS` precedence in the scanning VFS overlay (#241464)

The overlay of `LocalFS` and the global FS that
`DependencyScanningWorkerFilesystem`
forwards unhandled queries to (e.g. directory iteration) put the global
FS on
top. That's inconsistent with `status()`, `openFileForRead()` and
`getRealPath()`,
which look at `LocalFS` first. Put `LocalFS` on top of the overlay
instead.

Depends on #241463, only review the second commit.
DeltaFile
+31-0clang/unittests/DependencyScanning/DependencyScanningFilesystemTest.cpp
+5-3clang/lib/DependencyScanning/DependencyScanningFilesystem.cpp
+36-32 files

LLVM/project 01c4604 — clang/lib/CIR/CodeGen CIRGenOpenMPRuntime.h CIRGenModule.cpp, clang/test/CIR/CodeGenOpenMP global-var.cpp

[CIR][OpenMP] Add registerTargetGlobalVariable for global variables (#234077)

Limit the NYI to declare target variables so other globals emit under
-fopenmp
DeltaFile
+40-0clang/test/CIR/CodeGenOpenMP/global-var.cpp
+26-0clang/lib/CIR/CodeGen/CIRGenOpenMPRuntime.cpp
+4-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+3-0clang/lib/CIR/CodeGen/CIRGenOpenMPRuntime.h
+73-34 files

LLVM/project 98f1b00 — clang/include/clang/CIR/Dialect/IR CIRTypeConstraints.td CIROps.td, clang/lib/CIR/CodeGen CIRGenClass.cpp

[CIR] Keep source address space in vtable.get_vptr result (#238495)

The result was always in the default address space, so objects in other
address spaces left an unrealized_conversion_cast and failed LLVM
translation
DeltaFile
+18-14clang/test/CIR/CodeGen/base-class-addrspace.cpp
+9-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+1-3clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
+0-1clang/lib/CIR/CodeGen/CIRGenClass.cpp
+28-204 files

LLVM/project b4a674b — llvm/include/llvm/IR RuntimeLibcalls.td, llvm/test/Transforms/Util/DeclareRuntimeLibcalls systemz.ll bsd.ll

RuntimeLibcalls: Add attributes to memcpy, memmove and memset

Annotate memcpy, memmove and memset with the attributes
inferLibFuncAttributes gives them. Also handle the __aeabi variants,
which aren't exactly the same.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+38-6llvm/include/llvm/IR/RuntimeLibcalls.td
+20-15llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+16-12llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+14-11llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+12-9llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+8-6llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+108-5912 files not shown
+179-10718 files

LLVM/project 024b2dd — llvm/include/llvm/CodeGen SelectionDAGTargetInfo.h, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

RuntimeLibcalls: Make the AEABI memory functions distinct libcalls

__aeabi_memcpy, __aeabi_memmove and __aeabi_memset were
implementations of MEMCPY, MEMMOVE and MEMSET but did not have the
same signature. These return void instead of returning the destination
argument. Additionally __aeabi_memset takes its size before its
value. Add distinct Libcalls since these are not the same.

ARM relied on MEMCPY resolving to __aeabi_memcpy for the memcpy calls
it did not specialize, such as unaligned and minsize copies. Select
the AEABI functions in ARM lowering for those as well.

To keep these as tail calls, the EmitTargetCode* methods now take an
in/out IsTailCall like CallLoweringInfo. As a side effect this allows
all the targets emitting calls for the specialized code emit tail
calls, including the __aeabi functions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+160-0llvm/test/CodeGen/ARM/aeabi-memfunc-tail-call.ll
+22-39llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
+38-21llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
+25-12llvm/include/llvm/CodeGen/SelectionDAGTargetInfo.h
+25-11llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
+26-7llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+296-9023 files not shown
+396-12629 files

LLVM/project 7fdca2f — llvm/test/CodeGen/PISA asm-printer-unsupported-vector-hint-fp128.ll

Add asm-printer-unsupported-vector-hint-fp128.ll test
DeltaFile
+11-0llvm/test/CodeGen/PISA/asm-printer-unsupported-vector-hint-fp128.ll
+11-01 files

LLVM/project 5d7f3ae — llvm/lib/Target/PISA PISAAsmPrinter.cpp

Fixes
DeltaFile
+9-8llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+9-81 files

LLVM/project 22575b2 — llvm/lib/Target/PISA PISAAsmPrinter.cpp, llvm/test/CodeGen/PISA asm-printer-annotation-globals.ll

Remove the user scan and add a test
DeltaFile
+19-0llvm/test/CodeGen/PISA/asm-printer-annotation-globals.ll
+0-18llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+19-182 files

LLVM/project 4a5223b — llvm/lib/Target/PISA PISAAsmPrinter.cpp, llvm/test/CodeGen/PISA asm-printer-unusual-vector-global.ll

Add a test for reportFatalUsageError
DeltaFile
+8-0llvm/test/CodeGen/PISA/asm-printer-unusual-vector-global.ll
+2-3llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+10-32 files

LLVM/project 014e1bb — llvm/lib/Target/PISA PISAAsmPrinter.cpp, llvm/test/CodeGen/PISA asm-printer-fp-inline-asm.mir

Fix printing FP immediates
DeltaFile
+23-0llvm/test/CodeGen/PISA/asm-printer-fp-inline-asm.mir
+9-2llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+32-22 files

LLVM/project 5cbb73d — llvm/lib/Target/PISA PISAAsmPrinter.cpp

Inline comparison into the assertion
DeltaFile
+3-3llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+3-31 files

LLVM/project 1c48b0b — llvm/lib/Target/PISA PISAAsmPrinter.cpp

Add file headers
DeltaFile
+5-0llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+5-01 files

LLVM/project e2084d0 — llvm/test/CodeGen/PISA asm-printer-special-globals.ll

Add asm-printer-special-globals.ll to test isIgnoredIntrinsicGlobal
DeltaFile
+48-0llvm/test/CodeGen/PISA/asm-printer-special-globals.ll
+48-01 files

LLVM/project 5acca06 — llvm/lib/Target/PISA PISAAsmPrinter.cpp

Document why AsmPrinter::emitGlobalConstant is not used
DeltaFile
+4-0llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+4-01 files

LLVM/project 1d70e8f — llvm/test/CodeGen/PISA load.ll

Remove -verify-machineinstr
DeltaFile
+2-3llvm/test/CodeGen/PISA/load.ll
+2-31 files

LLVM/project 1ba32d4 — llvm/lib/Target/PISA PISAAsmPrinter.cpp

Formatting fix
DeltaFile
+2-1llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+2-11 files

LLVM/project 2f0b753 — llvm/lib/Target/PISA CMakeLists.txt PISAAsmPrinter.cpp, llvm/test/CodeGen/PISA unreachable.ll return.ll

Add PISA AsmPrinter

Add PISAAsmPrinter to complete the codegen pipeline with end-to-end code
emission.
DeltaFile
+933-0llvm/lib/Target/PISA/PISAAsmPrinter.cpp
+352-0llvm/test/CodeGen/PISA/store.ll
+350-0llvm/test/CodeGen/PISA/load.ll
+37-0llvm/test/CodeGen/PISA/return.ll
+14-0llvm/test/CodeGen/PISA/unreachable.ll
+1-0llvm/lib/Target/PISA/CMakeLists.txt
+1,687-06 files