[DirectX][Driver] Add /Qpdb_in_private flag support (#204903)
In DXC, when `/Qpdb_in_private` flag is specified, debug info PDB is
emitted into PRIV part of the output DXContainer (as well as into
separate PDB file, if its name is specified with `/Fd`).
This patch reimplements similar behavior in llc and Clang.
MC is modified to be able to emit PRIV part.
Depends on https://github.com/llvm/llvm-project/pull/204166.
Revert "[dsymutil] Add support for pseudo probes (#186877)" (#206789)
This reverts commit bc3386c1b9a5bff82ce4baaf4254fc4268f69ff4.
Let's back this out in favor of emitting pseudoprobe data in favor of
emitting in the `__LLVM` segment, and let `dsymutil` collect the debug
map objects and merge them into the final sections.
[CIR] Fix avx512vlbw builtin test run lines (#211063)
The avx512vlbw-builtins.c test was using the now-nonexistant avx10.1-512
target feature in several of its run lines. Because the feature no
longer exists with that spelling it was being silently ignored.
Apparently it isn't needed for the test upstream because the test has
been passing, but I received reports from a downstream user that the
test was failing for them.
There was a recent change to more strictly enforce always-inlining if
target features didn't match. I suspect that this downstream project has
a different version of some intrinsic header files so that it requires
"avx10.1" (the correct spelling of the feature).
This change updates the test run lines to use the correct feature
spelling.
PPC: Fold 64-bit zero-extending word load feeding extsw subregister
A gprc LWZ/LWZX feeding EXTSW_32_64 is rewritten into a sign-extending
LWA/LWAX load. Extend the same fold to the 64-bit zero-extending word
loads LWZ8/LWZX8 when the EXTSW_32_64 reads their sub_32 subregister,
producing a single LWA/LWAX instead of a redundant lwz+extsw pair.
Co-authored-by: Claude (Claude Opus 4.8, claude-opus-4-8) <noreply at anthropic.com>
PPC: Add MIR examples for missed extsw+word-load fold on subregister input
A gprc LWZ/LWZX feeding EXTSW_32_64 folds into a sign-extending LWA/LWAX
load. The equivalent 64-bit zero-extending word loads (LWZ8/LWZX8) whose
sub_32 feeds EXTSW_32_64 are not folded, leaving a redundant lwz+extsw
(or lwzx+extsw) pair. Add MIR examples documenting the missed fold.
Co-authored-by: Claude (Claude Opus 4.8, claude-opus-4-8) <noreply at anthropic.com>
PPC: Fix extsw elimination when the input reads a subregister
The EXTSW_32_64 sign-extend elimination previously assumed its input
was a full register value. It would then try using that value as the
source of the new (unnecessary) INSERT_SUBREG.
The new test would then hit this verifier error:
```
bb.0:
liveins: $x3
%0:g8rc = COPY killed $x3
%1:g8rc = RLDICL killed %0:g8rc, 0, 33
%3:g8rc = IMPLICIT_DEF
%2:g8rc = INSERT_SUBREG %3:g8rc(tied-def 0), %1:g8rc, %subreg.sub_32
$x3 = COPY killed %2:g8rc
BLR8 implicit $lr8, implicit $rm, implicit killed $x3
*** Bad machine code: INSERT_SUBREG expected inserted value to have equal or lesser size than the subreg it was inserted into ***
[8 lines not shown]
PPC: Fix EXTSW elimination promoting a subregister operand
promoteInstr32To64ForElimEXTSW copies operands from the 32-bit
instruction verbatim into its promoted 64-bit form. When an operand
reads the sub_32 subregister of a 64-bit register, the promoted
instruction (which takes a full register) ended up with an illegal
subregister use and failed the machine verifier.
Drop the sub_32 subregister and use the original full register, which
provides the low 32 bits the promoted instruction operates on. This
avoids verifier error regressions in a future change.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8, claude-opus-4-8)
Diagnose nested FIRSTPRIVATE under DEFAULT(NONE)
A variable listed as FIRSTPRIVATE on a nested TASK is also referenced by the
enclosing construct. If that construct has DEFAULT(NONE), the variable must be
listed in one of its data-sharing clauses.
The metadirective loop checker incorrectly treated nested FIRSTPRIVATE like
PRIVATE and skipped the diagnostic. Exempt only nested PRIVATE variables and
add a regression test.
Assisted with codex.
workflows/issue-release-workflow: Allow multiple URLs in /cherry-pick commands. (#211050)
f0ae26c9 allowed specifying multiple commits to /cherry-pick, but that
only works for plain commit hashes; it doesn't work for the URL form.
Adjust the regex to allow multiple URLs.
[flang][OpenMP] Check DEFAULT(NONE) on metadirective loop variants
Flang does not enforce `DEFAULT(NONE)` for variables referenced in a loop
associated with a standalone METADIRECTIVE. Consequently, it accepts invalid
programs when a potentially selectable loop variant specifies DEFAULT(NONE) but
omits a referenced variable from its data-sharing clauses. This change checks the
associated loop for each potentially selectable `DEFAULT(NONE)` variant and
diagnoses missing data-sharing attributes as it does for ordinary OpenMP loop
constructs.
Standalone metadirectives and their associated loops are separate parse-tree
nodes. For example:
```fortran
!$omp metadirective &
!$omp& when(implementation={vendor(llvm)}: &
!$omp& parallel do default(none) shared(n, a)) default(nothing)
do i = 1, n
a(i) = x
[23 lines not shown]
[NVPTX] Simplify BRX emission avoiding pseduo-instruction chain (#209952)
This is much more idiomatic and simpler as well and avoids a series of
instructions which would cause syntax errors if somehow something were
scheduled between them.
[flang][OpenMP] Lower DO and SIMD variants in metadirectives
Lower DO, SIMD, and DO SIMD replacement directives selected by a
metadirective. Support standalone and begin/end forms with static or runtime
selection.
A standalone metadirective and its associated loop are represented as sibling
PFT evaluations. For example:
```fortran
!$omp metadirective &
!$omp& when(user={condition(flag)}: do) &
!$omp& otherwise(nothing)
do i = 1, n
a(i) = i
end do
```
has the following evaluation shape:
[54 lines not shown]
[TableGen][AMDGPU][AsmParser] Catch and fix ambiguous instructions
Declares mutually exclusive assembler predicates and teaches
TableGen to use that knowledge to report matchables that are
indistinguishable to the asm parser.
The instruction changes are effectively NFCI, mostly removing
genuine duplicates and fixing predicates.
Prepared using Claude.
https://github.com/llvm/llvm-project/issues/69256
[flang][cuda][openacc] Support CUDA calls to ACC routines (#210165)
Enable CUDA device procedures to call !$acc routine procedures.
- Treat ACC routines as device-callable during CUDA semantic checking.
- Apply implicit-device dummy argument handling to ACC routines called
from CUDA device code.
- Defer CUDA cloning of ACC routines until ACC lowering materializes and
moves the specialized routine into the GPU module.
- Add a CUF device-function transform regression test.
[libc++] Use github-script instead of pygithub for benchmark jobs, and report failure (#211074)
Switch GitHub API interactions to use actions/github-script instead of
pygithub, as is done in other Github workflows in the repository. This
is simpler and it also resolves the issue that if setting up the Python
virtual environment fails, there's no way to communicate the issue back
since doing so would require pygithub.
As a drive-by, also report the failure when a step in the libc++ PR
benchmark job fails, instead of leaving a "Running benchmarks in ..."
comment indefinitely.
Assisted by Claude
Fixes #210985
[ConstraintElim] Derive signed facts for post-increment inductions. (#210079)
Extend logic added in https://github.com/llvm/llvm-project/pull/209199
to also derive signed facts.
To do so, we keep track of whether LowerBound = Start + Step overflows
signed/unsigned. Code that previously bailed out if we were handling a
post-increment induction has been updated to use the computed
LowerBound, if it does not signed-wrap.
Alive2 Proof: https://alive2.llvm.org/ce/z/frskVt
PR: https://github.com/llvm/llvm-project/pull/210079
[mlir-c] Add 1:N TypeConverter conversion and materialization bindings
Builds on the source/target materialization C bindings:
- Target materialization callbacks now receive `originalType` (split from the
previously-shared source/target callback typedef), exposing a documented C++
capability that was otherwise unreachable from C.
- 1:N type conversion: `mlirTypeConverterAdd1ToNConversion` plus an opaque
results accumulator (`MlirTypeConverterConversionResults` /
`mlirTypeConverterConversionResultsAppend`). A declining callback's appended
types are rolled back so the driver's "try the next conversion" invariant
holds.
- 1:N target materialization: `mlirTypeConverterAdd1ToNTargetMaterialization`,
whose callback fills a caller-allocated `outputs` buffer. A success that
leaves any output null is treated as a decline rather than handing the driver
a null-containing result.
- `mlirConversionPatternRewriterReplaceOpWithMultiple` for 1:N value
replacement, which can drive a source materialization with nInputs > 1.
- An optional `matchAndRewrite1ToN` callback on `MlirConversionPatternCallbacks`
[9 lines not shown]
[mlir-c] Test the failure path of the 1:N type conversion callback
Adds a test that registers a 1:N conversion function returning
MlirTypeConverterConversionStatusFailure. Because it is tried before the
i32 -> (i16, i16) conversion, the failure must abort the whole conversion
(rather than falling back), leaving the IR unchanged -- the behavior that a
plain decline would not produce.
[mlir-c] Value-initialize MlirConversionPatternCallbacks in Python bindings
The Python conversion-pattern binding left the struct default-initialized,
so the newly-added optional matchAndRewrite1ToN field held an indeterminate
pointer. The driver's null check then read garbage and jumped into it,
segfaulting mlir/test/python/rewrite.py. Value-initialize the struct so
optional callbacks default to null.
[mlir-c] Fix -Wmissing-field-initializers in rewrite.c test
The new matchAndRewrite1ToN field left three existing
MlirConversionPatternCallbacks initializers under-initialized, which
fails the CI build under -Werror=-Wmissing-field-initializers.
[mlir-c] Use a tri-state status enum for the type conversion callback
MlirTypeConverterConversionCallback returned MlirLogicalResult and used a
null convertedType as a second failure sentinel, which could only express
success or "try another conversion" -- and conflated the C++ decline
(std::nullopt) and hard-failure (failure()) states.
Introduce MlirTypeConverterConversionStatus (Success/Failure/Declined) and
return it from the callback instead, mapping the three states to success(),
failure(), and std::nullopt respectively. Update the Python binding and the
C API test callback accordingly.
Add a C API unit test (testTypeConverterConversionStatus) exercising all
three status values through mlirTypeConverterConvertType.
[flang][OpenMP] Lower DO and SIMD variants in metadirectives
Lower DO, SIMD, and DO SIMD replacement directives selected by a
metadirective. Support standalone and begin/end forms with static or runtime
selection.
A standalone metadirective and its associated loop are represented as sibling
PFT evaluations. For example:
```fortran
!$omp metadirective &
!$omp& when(user={condition(flag)}: do) &
!$omp& otherwise(nothing)
do i = 1, n
a(i) = i
end do
```
has the following evaluation shape:
[45 lines not shown]
