LLVM / project - FreshBSD

LLVM/project 15a30e3 — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/InstCombine cttz.ll

2026-02-06 03:20:32 UTC by Snehasish Kumar via GitHub on ⎇

main

[InstCombine][profcheck] Fix profile metadata propagation in takeLog2 (#179331)

Pass the select inst to Builder.CreateSelect so that profile metadata is retained.

Assisted-by: gemini

Delta		File
+8	-3	llvm/test/Transforms/InstCombine/cttz.ll
+7	-1	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+0	-7	llvm/utils/profcheck-xfail.txt
+15	-11	3 files

LLVM/project 0cb1476 — clang-tools-extra/clang-apply-replacements/tool ClangApplyReplacementsMain.cpp

2026-02-06 02:54:44 UTC by Keith Smiley via GitHub on ⎇

main

[clang-apply-replacements] Change cleanup to only happen with --format (#178763)

Cleanup can result in many unrelated changes to the given replacements.
This change makes that only apply if the user actually wants
clang-apply-replacements to format their code outside of the
replacements.

Delta		File
+1	-1	clang-tools-extra/clang-apply-replacements/tool/ClangApplyReplacementsMain.cpp
+1	-1	1 files

LLVM/project e3c72cf — lldb/include/lldb/Host HostInfoBase.h, lldb/source/Core ModuleList.cpp

2026-02-06 02:38:20 UTC by Jason Molenda via GitHub on ⎇

main

[lldb] Add a new way of loading files from a shared cache (#179881)

Taking advantage of a few new SPI in macOS 26.4 libdyld, it is possible
for lldb to load binaries out of a shared cache binary blob, instead of
needing discrete files on disk. lldb has had one special case where it
has done this for years -- if the debugee process and lldb itself are
using the same shared cache, it could create ObjectFiles based on its
own memory contents. This new method requires only the shared cache on
disk, not depending on it being mapped into lldb's address space
already.

In HostInfoMacOSX.mm, we create an array of binaries in lldb's shared
cache, by one of two methods depending on the availability of SPI/SDKs.
This PR adds a new third method for loading lldb's shared cache off disk
as a proof of concept. It will prefer this new method when the needed
SPI are available at runtime. There is also a user setting to disable
this new method in case we uncover a problem as it is deployed.

I did change the internal store of the shared cache files from a single

    [32 lines not shown]

Delta		File
+222	-21	lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
+33	-2	lldb/include/lldb/Host/HostInfoBase.h
+13	-6	lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
+12	-7	lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
+6	-4	lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
+10	-0	lldb/source/Core/ModuleList.cpp
+296	-40	5 files not shown
+310	-44	11 files

LLVM/project ab87a36 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

2026-02-06 02:35:55 UTC by yangzhaoxin on ⎇

users/ylzsx/vxi1-vector-masks

Fixes for review

Delta		File
+4	-4	llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+4	-4	1 files

LLVM/project 2a0b935 — llvm/cmake/modules TableGen.cmake

2026-02-06 02:35:32 UTC by Eric Christopher via GitHub on ⎇

main

[CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (#179842)

Ninja versions prior to 1.10 cannot handle depfile mode when CMake
generates build rules with implicit outputs (the `| ${cmake_ninja_workdir}`
syntax used for IDE support). Ninja's depslog interprets these as
multiple outputs and rejects them with the error:

ninja: error: build.ninja:XXXX: multiple outputs aren't (yet?) supported
  by depslog; bring this up on the mailing list if it affects you

This primarily affected builds where CMake generates NATIVE subdirectory
builds for host tools.

This patch modifies TableGen.cmake to:
1. Detect the Ninja version at configure time
2. Disable depfile mode (fall back to globbing .td files) when:
   - Ninja version is < 1.10, OR
   - The tablegen invocation produces multiple outputs (e.g. -gen-register-info)


    [10 lines not shown]

Delta		File
+43	-3	llvm/cmake/modules/TableGen.cmake
+43	-3	1 files

LLVM/project 46423d8 — llvm/lib/Target/RISCV RISCVInstrInfoP.td, llvm/test/MC/RISCV rv32p-valid.s

2026-02-06 02:35:24 UTC by Kito Cheng via GitHub on ⎇

main

[RISCV] Fix P-extension instruction names per spec 0.19 (#179961)

Fix instruction naming to match P-extension specification 0.19:
- pnsari.b -> pnsrari.b (Packed Narrowing Shift Right Arithmetic
Rounding)
- pnsari.h -> pnsrari.h
- nsari -> nsrari
- paax.dhx -> paas.dhx (Packed Average Add/Sub, not Add/Add-Cross)

The instruction encodings remain unchanged as they were already correct.

Ref: https://www.jhauser.us/RISCV/ext-P/RVP-baseInstrs-Sail-019.txt

Delta		File
+8	-8	llvm/test/MC/RISCV/rv32p-valid.s
+4	-4	llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+12	-12	2 files

LLVM/project a6aca39 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vxi1-masks.ll

2026-02-06 02:33:39 UTC by yangzhaoxin on ⎇

users/ylzsx/vxi1-vector-masks

[LoongArch] Try to avoid casts around logical vector ops on lasx

On LASX the type v4i1/v8i1/v16i1 may be legalized to v4i32/v8i16/v16i8,
which is LSX-sized register. In most cases we actually compare or select
LASX-sized registers and mixing the two types creates horrible code.

Delta		File
+83	-583	llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
+127	-0	llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+210	-583	2 files

LLVM/project 93d92d5 — llvm/test/CodeGen/LoongArch/lasx vxi1-masks.ll

2026-02-06 02:22:27 UTC by Zhaoxin Yang via GitHub on ⎇

main

[LoongArch][NFC] Add tests for vxi1 vector masks used with AND/OR/XOR operations on lasx (#163490)

Delta		File
+1,026	-0	llvm/test/CodeGen/LoongArch/lasx/vxi1-masks.ll
+1,026	-0	1 files

LLVM/project b8060ef — llvm/utils/gn/secondary/llvm/lib/TargetParser BUILD.gn

2026-02-06 01:45:02 UTC by LLVM GN Syncbot on ⎇

main

[gn build] Port d005cb2953bd

Delta		File
+1	-0	llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
+1	-0	1 files

LLVM/project 39dba7b — libcxx/include/__algorithm unwrap_range.h

2026-02-06 01:42:49 UTC by A. Jiang via GitHub on ⎇

main

[libc++] Fix module builds for `<__algorithm/unwrap_range.h>` (#179887)

3a653afd45709432181952c0ffdb53eceb0939ae removed the inclusion of
`<__utility/declval.h>` from `<__algorithm/unwrap_range.h>`. However,
`unwrap_range.h` still needs to use `std::declval`. So we should restore
the inclusion.

The building failure with Clang modules was already caught by CI.

Delta		File
+1	-0	libcxx/include/__algorithm/unwrap_range.h
+1	-0	1 files

LLVM/project 1ad20b9 — llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp RISCVInstrInfoP.td

2026-02-06 01:35:12 UTC by Craig Topper via GitHub on ⎇

main

[RISCV] Rename RISCVISD::PPACK_DH->PPAIRE_DB. NFC (#180089)

The instruction was renamed, but we hadn't renamed the ISD opcode.

Delta		File
+6	-6	llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+3	-3	llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+1	-1	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+10	-10	3 files

LLVM/project 313d9ac — llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rv32p.ll

2026-02-06 01:34:25 UTC by Craig Topper via GitHub on ⎇

main

[RISCV] Add wmul(u) codegen for RV32+P (#180032)

mulh tests are to make sure we continue to use mulh when only the
upper half is used.

Delta		File
+51	-1	llvm/test/CodeGen/RISCV/rv32p.ll
+20	-0	llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+8	-3	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+79	-4	3 files

LLVM/project 6c37aa8 — llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp

2026-02-06 01:33:35 UTC by Craig Topper via GitHub on ⎇

main

[RISCV] Remove P from RISCVISD::PASUB(U)/PMULHSU/PMULHR(U)/PMULHRSU. NFC (#180064)

There's a good chance we'll want to use these for scalar too.

Drop vector type from SDTypeProfile. Remove PMULHSU since we already
have RISCVISD::MULHSU for scalars in the base ISA.

Delta		File
+22	-24	llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+18	-18	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+40	-42	2 files

LLVM/project 41cc71e — lldb/test/API/python_api/process/cancel_attach TestCancelAttach.py

2026-02-06 01:27:42 UTC by jimingham via GitHub on ⎇

main

Disable TestCancelAttach.py for linux -> linux remote (#180092)

This test was already disabled going from windows -> linux because it
was timing out there.

The PR: https://github.com/llvm/llvm-project/pull/179799 seems to have
exacerbated whatever this stall was, and now we're seeing it when
debugging from a linux host to a remote linux as well.

The native local host tests works correctly on all the bots that we
have, however. So I'm disabling the remote test till we can figure out
why this is problematic.

Delta		File
+1	-1	lldb/test/API/python_api/process/cancel_attach/TestCancelAttach.py
+1	-1	1 files

LLVM/project b4a32db — clang/lib/Analysis UnsafeBufferUsage.cpp

2026-02-06 00:58:49 UTC by Rohan Jacob-Rao via GitHub on ⎇

main

[NFC][Clang][unsafe-buffer-usage] Simplify isPtrBufferSafe with helper. (#178768)

Also change parameter type to a reference since it's assumed to be
nonnull.

Delta		File
+45	-52	clang/lib/Analysis/UnsafeBufferUsage.cpp
+45	-52	1 files

LLVM/project d005cb2 — llvm/include/llvm/TargetParser AVRTargetParser.h Triple.h, llvm/lib/TargetParser AVRTargetParser.cpp

2026-02-06 00:58:12 UTC by Ruoyu Qiu via GitHub on ⎇

main

[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (#174731)

This PR updates llvm-objdump to detect the specific AVR architecture
from the ELF header flags when no specific CPU is provided.

Fixes: #146451

---------

Signed-off-by: RuoyuQiu <cabbaken at outlook.com>
Signed-off-by: Ruoyu Qiu <cabbaken at outlook.com>
Co-authored-by: qiuruoyu <qiuruoyu at hygon.cn>

Delta		File
+55	-0	llvm/test/tools/llvm-objdump/ELF/AVR/mattr.test
+50	-0	llvm/lib/TargetParser/AVRTargetParser.cpp
+30	-0	llvm/include/llvm/TargetParser/AVRTargetParser.h
+16	-0	llvm/tools/llvm-objdump/llvm-objdump.cpp
+2	-0	llvm/include/llvm/TargetParser/Triple.h
+2	-0	llvm/test/tools/llvm-objdump/ELF/AVR/lit.local.cfg
+155	-0	1 files not shown
+156	-0	7 files

LLVM/project 5090843 — .github/workflows commit-access-review.py

2026-02-06 00:51:42 UTC by Tom Stellard on ⎇

users/tstellar/commit-access-review-debug

Try to optimize

Delta		File
+37	-3	.github/workflows/commit-access-review.py
+37	-3	1 files

LLVM/project 6d53558 — llvm/utils/gn/secondary/llvm/lib/Target/X86 BUILD.gn

2026-02-06 00:44:20 UTC by LLVM GN Syncbot on ⎇

main

[gn build] Port eb9e98f62e0c

Delta		File
+1	-0	llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
+1	-0	1 files

LLVM/project c3db527 — llvm/lib/MC MCWasmStreamer.cpp, llvm/lib/Target/WebAssembly WebAssemblyAsmPrinter.cpp

2026-02-06 00:40:25 UTC by Derek Schuff via GitHub on ⎇

main

[MC][Wasm] Emit useful error message when encountering common symbols (#179586)

We don't currently support common symbols for Wasm, and we currently
emit a generic error with a backtrace. Instead, don't crash, and report
the names of the offending symbols.

Delta		File
+8	-2	llvm/lib/MC/MCWasmStreamer.cpp
+7	-0	llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+6	-0	llvm/test/MC/WebAssembly/common-error.s
+6	-0	llvm/test/CodeGen/WebAssembly/common-error.ll
+27	-2	4 files

LLVM/project 2302355 — clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

2026-02-06 00:37:23 UTC by Florian Mayer on ⎇

users/fmayer/spr/main.nfc-flowsensitive-statusor-add-test-reassigning-variable-in-loop

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]

Delta		File
+483	-0	clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+483	-0	1 files

LLVM/project 1d3f347 — clang/unittests/Analysis/FlowSensitive UncheckedStatusOrAccessModelTestFixture.cpp

2026-02-06 00:37:23 UTC by Florian Mayer on ⎇

users/fmayer/spr/nfc-flowsensitive-statusor-add-test-reassigning-variable-in-loop

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7

Delta		File
+532	-0	clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+532	-0	1 files

LLVM/project b03496a — .github/workflows commit-access-review.py

2026-02-06 00:35:38 UTC by Tom Stellard on ⎇

users/tstellar/commit-access-review-debug

More debug

Delta		File
+2	-0	.github/workflows/commit-access-review.py
+2	-0	1 files

LLVM/project eb9e98f — llvm/lib/Target/X86 X86CleanupLocalDynamicTLS.cpp X86InstrInfo.cpp

2026-02-06 00:31:01 UTC by Kyungtak Woo via GitHub on ⎇

main

[NewPM] Port x86-cleanup-local-dynamic-tls (#179864)

Port x86-cleanup-local-dynamic-tls to the new pass manager.
I moved LDTLSCleanup to a new
llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp file and renamed it to
X86CleanupLocalDynamicTLSPass. Then I renamed the legacy pass, and
adding a NewPM wrapper around the impl.

No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.

Delta		File
+165	-0	llvm/lib/Target/X86/X86CleanupLocalDynamicTLS.cpp
+0	-113	llvm/lib/Target/X86/X86InstrInfo.cpp
+9	-1	llvm/lib/Target/X86/X86.h
+1	-2	llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1	-1	llvm/lib/Target/X86/X86PassRegistry.def
+1	-1	llvm/lib/Target/X86/X86TargetMachine.cpp
+177	-118	2 files not shown
+179	-118	8 files

LLVM/project 1f26c39 — flang/include/flang/Optimizer/Dialect FIROps.td, flang/lib/Optimizer/Dialect FIROps.cpp

2026-02-06 00:22:30 UTC by Slava Zakharin via GitHub on ⎇

main

[flang] Allow fir.field_index and fir.coordinate_of speculation. (#179785)

This change makes `fir.field_index` a Pure operation, and
add support of `ConditionallySpeculatable` interface for
`fir.coordinate_of`. The test demonstrates how this affects
Flang LICM.

Delta		File
+48	-0	flang/test/Transforms/licm.fir
+9	-0	flang/lib/Optimizer/Dialect/FIROps.cpp
+5	-2	flang/include/flang/Optimizer/Dialect/FIROps.td
+62	-2	3 files

LLVM/project 3bbb997 — flang/lib/Optimizer/Analysis AliasAnalysis.cpp, flang/test/Analysis/AliasAnalysis alias-analysis-cray-pointers.fir ptr-component.fir

2026-02-06 00:21:57 UTC by Slava Zakharin via GitHub on ⎇

main

[flang] Disambiguate descriptor and data addresses in FIR AA. (#179774)

This change basically treats the descriptors' and data loads
as non-aliasing (with one exception) same way as we do it
for the purpose of the TBAA tags generation for LLVM
to do better optimizations. This change enables more LICM in Flang MLIR.

Delta		File
+155	-19	flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
+32	-0	flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
+15	-12	flang/test/Analysis/AliasAnalysis/ptr-component.fir
+2	-4	flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
+204	-35	4 files

LLVM/project 1ef499b — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.struct.buffer.store.format.f16.ll llvm.amdgcn.raw.tbuffer.store.f16.ll

2026-02-06 00:20:09 UTC by vangthao95 via GitHub on ⎇

main

AMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (#179994)

Enable commented out D16 v3f16 tests.

Delta		File
+63	-5	llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
+57	-5	llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
+44	-5	llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
+40	-5	llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
+2	-7	llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+206	-27	5 files

LLVM/project 6299a53 — openmp/runtime CMakeLists.txt

2026-02-06 00:18:06 UTC by YunQiang Su via GitHub on ⎇

revert-179933-openmp-mips-atomic

Revert "openmp: add atomic to SANITIZER_COMMON_LINK_LIBS for MIPS (#179933)"

This reverts commit 74e9bc6cb93964edfcb3761623a43d1e55aceb2a.

Delta		File
+0	-4	openmp/runtime/CMakeLists.txt
+0	-4	1 files

LLVM/project 74e9bc6 — openmp/runtime CMakeLists.txt

2026-02-06 00:17:56 UTC by YunQiang Su via GitHub on ⎇

main

openmp: add atomic to SANITIZER_COMMON_LINK_LIBS for MIPS (#179933)

atomic is needed explicitly for MIPS.

Delta		File
+4	-0	openmp/runtime/CMakeLists.txt
+4	-0	1 files

LLVM/project 2b3d97a — clang/lib/Analysis UnsafeBufferUsage.cpp

2026-02-06 00:15:09 UTC by Rohan Jacob-Rao via GitHub on ⎇

main

[NFC][Clang][UnsafeBufferUsage] Remove unnecessary struct. (#178801)

The struct has no members and has a surrounding namespace that can be
used for disambiguating names. This was also mentioned in a previous PR
review:
https://github.com/llvm/llvm-project/pull/101583/changes#r1737089937

Delta		File
+33	-41	clang/lib/Analysis/UnsafeBufferUsage.cpp
+33	-41	1 files

LLVM/project c7e3bdd — llvm/lib/Target/Mips MipsSEInstrInfo.cpp, llvm/test/CodeGen/MIR/Mips mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir

2026-02-06 00:15:01 UTC by YunQiang Su via GitHub on ⎇

main

MIPS: readsWritesFloatRegister, inc Idx for continue (#179932)

Otherwise, the input register will also be treat as write.

Delta		File
+18	-0	llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
+2	-2	llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+20	-2	2 files