LLVM/project f95ed25llvm/lib/Target/WebAssembly/GISel WebAssemblyLegalizerInfo.cpp

[WebAssembly][GlobalISel] Fix legalizeCustom return value for Helper.lower() (#191345)

Helper.lower() returns a LegalizerHelper::LegalizeResult enum where
UnableToLegalize=2, which implicitly converts to true (success). Compare
against LegalizerHelper::Legalized instead so that legalization failures
are correctly reported.

---------

Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
DeltaFile
+1-1llvm/lib/Target/WebAssembly/GISel/WebAssemblyLegalizerInfo.cpp
+1-11 files

LLVM/project 074788fllvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp, llvm/test/CodeGen/AMDGPU hazard-setreg-vgpr-msb-gfx1250.mir vgpr-setreg-mode-swar.mir

[AMDGPU] Preserve old MSBs when handling SETREG
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/hazard-setreg-vgpr-msb-gfx1250.mir
+1-1llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+1-1llvm/test/CodeGen/AMDGPU/vgpr-setreg-mode-swar.mir
+4-43 files

LLVM/project 6e0a76bllvm/include/llvm/Analysis InlineCost.h, llvm/lib/Analysis InlineCost.cpp

[Passes][Inliner] Add separate optsize inlinehint threshold (#191213)

PGO pre-inlining wants to set a different inlinehint threshold when
optimizing for size. Currently this is done by adjusting the InlineHint
threshold based on the pipeline optimization level.

Replace this with a separate OptSizeInlineHint threshold that is applied
based on attributes instead.
DeltaFile
+9-2llvm/lib/Analysis/InlineCost.cpp
+4-0llvm/include/llvm/Analysis/InlineCost.h
+2-1llvm/lib/Passes/PassBuilderPipelines.cpp
+15-33 files

LLVM/project 5b4dd04lld/test/COFF pdb-publics-hashes.s, llvm/lib/DebugInfo/PDB/Native GSIStreamBuilder.cpp

[pdb] Fix public symbol hashing in GSIHashStreamBuilder::finalizeBuckets (#190133)

BulkPublic.Name is not necessarily null terminated, so make sure not to
hash past its actual length.

In practice it would often be null terminated, but in the cases where it
was not, we would compute the wrong hash here, put it in the wrong hash
bucket, preventing debuggers from looking up the symbol by name, causing
issues such as
https://discourse.llvm.org/t/pdb-generated-by-lld-link-doesnt-point-to-correct-entry-point-when-debugged-using-visual-studio/90349

(cherry picked from commit 6732640f5f3b2729c245e3b8026637d322c7f31d)
DeltaFile
+30-0lld/test/COFF/pdb-publics-hashes.s
+1-1llvm/lib/DebugInfo/PDB/Native/GSIStreamBuilder.cpp
+31-12 files

LLVM/project f42d371llvm/lib/Target/WebAssembly WebAssemblyCFGStackify.cpp, llvm/test/CodeGen/WebAssembly cfg-stackify-eh-legacy.ll exception.ll

[WebAssembly] Fix: fixCallUnwindMismatches after fixCatchUnwindMismatches (#187484)

`fixCallUnwindMismatches()` adds an extra try block around call sites
with incorrect unwind targets. `fixCatchUnwindMismatches()` handles
catch blocks that have incorrect next unwind destinations. Previously we
ran `fixCallUnwindMismatches()` first and then ran
`fixCatchUnwindMismatches()`. The problem is that
`fixCatchUnwindMismatches()` wraps entire try blocks which can change
the unwind destination of the calls inside. If the calls had an
incorrect unwind target to begin with, they will be wrapped already and
so the outer wrapping won't alter their unwind target. However, if they
start out with a correct unwind target, they won't get wrapped and then
that can be messed up by `fixCatchUnwindMismatches()`.

The fix is to run `fixCatchUnwindMismatches()` first.
`fixCallUnwindMismatches()` never messes up the result of
`fixCatchUnwindMismatches()` so this is the correct order.

Resolves #187302

    [2 lines not shown]
DeltaFile
+100-7llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
+31-22llvm/test/CodeGen/WebAssembly/exception.ll
+14-4llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+2-4llvm/test/CodeGen/WebAssembly/exception-legacy.ll
+1-1llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
+148-385 files

LLVM/project a0ab88allvm/test/CodeGen/AArch64 itofp-bf16.ll bf16-instructions.ll

[AArch64][GISel] Update and regenerate bf16 test coverage. NFC (#191348)
DeltaFile
+2,832-1,746llvm/test/CodeGen/AArch64/itofp-bf16.ll
+296-285llvm/test/CodeGen/AArch64/bf16-instructions.ll
+154-38llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+102-41llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+3,384-2,1104 files

LLVM/project b8fdc59llvm/include/llvm/Analysis InlineCost.h, llvm/lib/Analysis InlineCost.cpp

[Passes][Inliner] Handle optsize/minsize via attributes only (#190168)

InlineParams already has separate threshold for OptSize/MinSize
functions that get applied based on the corresponding function
attributes. As such, we should not also be changing the DefaultThreshold
based on the pipeline Os/Oz levels as well.
DeltaFile
+9-9llvm/test/Transforms/Inline/always-inline-phase-ordering.ll
+3-15llvm/lib/Analysis/InlineCost.cpp
+7-7llvm/lib/Passes/PassBuilderPipelines.cpp
+5-5llvm/test/Transforms/Inline/ML/Inputs/test-module.ll
+4-4llvm/include/llvm/Analysis/InlineCost.h
+1-1llvm/test/Transforms/Inline/ML/interactive-mode.ll
+29-412 files not shown
+31-438 files

LLVM/project 3155e5dllvm/test/Transforms/LoopVectorize reduction-inloop-pred.ll reduction-predselect.ll

[LV] Use -force-target-supports-masked-memory-ops on target agnostic tail folding tests. NFC (#191181)

It's a good bit easier to read tail folding tests if masked memory ops
are allowed. This adds -force-target-supports-masked-memory-ops to tests
where we aren't explicitly trying to test predicated replicate regions
DeltaFile
+136-827llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
+95-555llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
+75-396llvm/test/Transforms/LoopVectorize/first-order-recurrence-tail-folding.ll
+63-277llvm/test/Transforms/LoopVectorize/tail-folding-div.ll
+117-0llvm/test/Transforms/LoopVectorize/tail-folding-replicate-region.ll
+8-46llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
+494-2,1016 files

LLVM/project a42e49fllvm/include/llvm/Analysis ScalarEvolutionPatternMatch.h, llvm/include/llvm/IR PatternMatch.h

[Support] Factor PatternMatch m_Combine(And|Or), m_Isa (NFC) (#190753)

Introduce a new PatternMatchHelpers with a variant of m_Combine(And|Or)
and m_Isa to share across the IR PatternMatch,
ScalarEvolutionPatternMatch, and VPlanPatternMatch. m_Combine(And|Or)
has been generalized to be variadic. Planned follow-ups include
factoring the specific-value matcher.
DeltaFile
+21-95llvm/include/llvm/IR/PatternMatch.h
+7-63llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+69-0llvm/include/llvm/Support/PatternMatchHelpers.h
+10-15llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
+4-4llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
+111-1775 files

LLVM/project 6b1484fllvm/include/llvm/CodeGen BasicTTIImpl.h, llvm/test/Analysis/CostModel/AArch64 masked-divrem.ll

[TTI] Add BasicTTIImpl cost model for llvm.masked.{u,s}{div,rem} (#191240)

This implements a generic cost model for the intrinsics added in
#189705. It costs it equivalently to the current expansion, i.e. an
unmasked divide + select.
DeltaFile
+429-0llvm/test/Analysis/CostModel/AArch64/masked-divrem.ll
+295-0llvm/test/Analysis/CostModel/RISCV/masked-divrem.ll
+44-0llvm/include/llvm/CodeGen/BasicTTIImpl.h
+768-03 files

LLVM/project d6d99d9llvm/test/CodeGen/AMDGPU minmax3-tree-reduction.ll vector-reduce-umin.ll

[AMDGPU] Improve max3/min3 formation for tree-structured reductions (#190734)

The existing `performMinMaxCombine` forms `max3` by matching
`max(max(a,b), c) -> max3(a,b,c)`. For tree reductions like
`max(max(a,b), max(c,d))`, this produces `max3(a, b, max(c,d));` placing
`max3` on top. At the next tree level, `max(max3, max3)` cannot combine
because the 3-op opcode (`FMAXIMUM3`) differs from the 2-op opcode
(`FMAXIMUM`).

This patch:
1. Adds a tree combine: `max(max(a,b), max(c,d)) -> max(max3(a,b,c),
d)`, keeping a 2-op node on top that enables further combining.
2. Defers the existing combine when the operand is a tree node whose
children can still be combined, ensuring inner tree levels are optimized
before outer levels consume them.

Deferral is skipped when neither child has a single use, since the inner
combine cannot fire in that case.

Fix: LCOMPILER-1652
DeltaFile
+538-0llvm/test/CodeGen/AMDGPU/minmax3-tree-reduction.ll
+54-68llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
+54-68llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
+50-64llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
+50-64llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
+37-41llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
+783-3053 files not shown
+825-3229 files

LLVM/project 55feddbclang/lib/CodeGen CodeGenModule.cpp, clang/test/CodeGen ptrauth-module-flags.c

[PAC][clang] Use `Error` behavior for ptrauth module flags (#189923)

Previous use of `Min` for `ptrauth-elf-got` and
`ptrauth-sign-personality` module flags was introducing a risk of silent
decrease of security during module merge. The previous choice for `Min`
was mimicking the behavior for the `sign-return-address*` family of
module flags, but it does not make sense to apply this behavior here.
DeltaFile
+3-3clang/lib/CodeGen/CodeGenModule.cpp
+2-2clang/test/CodeGen/ptrauth-module-flags.c
+5-52 files

LLVM/project 2f2bd5elldb/source/Plugins/Process/gdb-remote ProcessGDBRemote.cpp

[NFC][lldb] Extract Do{Dis}EnableBreakpoint into helper functions (#191136)

Re-using this code will be important in an upcoming patch.

This commit also greatly simplifies the comments in the function.
DeltaFile
+97-130lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+97-1301 files

LLVM/project 611868bmlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-target-launch-host.mlir openmp-target-launch-device.mlir

update
DeltaFile
+49-37mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+22-3mlir/test/Target/LLVMIR/openmp-target-launch-host.mlir
+21-0mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
+92-403 files

LLVM/project 7459e10offload/test/offloading strided_update_count_expression_complex.c strided_update_multiple_arrays_count_expression.c, offload/test/offloading/strided_update strided_update_count_expression_complex.c strided_update_multiple_arrays_count_expression.c

[OpenMP][NFC] Refactor Non-contiguous Update Tests (#190923)

The PR refactors the non-contiguous update tests as raised as a TODO in
one of the comments in the related PR. Prefixed all with
`strided_update`. For offload tests, added a dedicated sub-directory.
DeltaFile
+0-290offload/test/offloading/strided_update_count_expression_complex.c
+290-0offload/test/offloading/strided_update/strided_update_count_expression_complex.c
+0-162offload/test/offloading/strided_update_multiple_arrays_count_expression.c
+162-0offload/test/offloading/strided_update/strided_update_multiple_arrays_count_expression.c
+145-0offload/test/offloading/strided_update/strided_update_multiple_arrays_variable_stride.c
+0-145offload/test/offloading/strided_update_multiple_arrays_variable_stride.c
+597-597118 files not shown
+4,593-4,593124 files

LLVM/project b6fff9fmlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-teams.mlir openmp-target-launch-host.mlir

[OpenMP][MLIR] Add thread_limit mlir->llvm lowering
DeltaFile
+82-49mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+36-0mlir/test/Target/LLVMIR/openmp-teams.mlir
+3-3mlir/test/Target/LLVMIR/openmp-target-launch-host.mlir
+3-3mlir/test/Target/LLVMIR/openmp-todo.mlir
+124-554 files

LLVM/project fc17b6dmlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-todo.mlir

add todo test
DeltaFile
+10-3mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+11-0mlir/test/Target/LLVMIR/openmp-todo.mlir
+21-32 files

LLVM/project 0a0a333llvm/lib/Target/AMDGPU AMDGPUIGroupLP.cpp AMDGPUIGroupLP.h

[NFC][AMDGPU]: expose IGLPStrategyID in AMDGPUIGroupLP.h (#191340)

Move IGLPStrategyID and its enumerators into llvm::AMDGPU in the public
header so other translation units can share the immediate encoding.
DeltaFile
+1-7llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+8-0llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.h
+9-72 files

LLVM/project b34901cmlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/lib/Conversion/NVGPUToNVVM NVGPUToNVVM.cpp

[mlir][NVVM] Add InferTypeOpInterface to NVVM MBarrier ops with deterministic result types (#188173)

Add result type inference to 5 NVVM ops whose result types can be fully
determined from their operands and attributes. This enables the Python
binding generator to emit `results=None` as a default parameter,
removing the need for callers to pass explicit result types.

Ops with optional results (using `InferTypeOpAdaptorWithIsCompatible`):
- `MBarrierArriveOp`: i64 for non-cluster pointers, no result for
shared_cluster
- `MBarrierArriveDropOp`: same as above
- `MBarrierArriveExpectTxOp`: same, plus no result when predicate is set
- `MBarrierArriveDropExpectTxOp`: same as MBarrierArriveOp
- `BarrierOp`: i32 when reductionOp is present, no result otherwise

The optional-result ops use a permissive `isCompatibleReturnTypes` that
allows omitting the result, preserving backward compatibility with the
existing zero-result assembly form.


    [8 lines not shown]
DeltaFile
+88-0mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
+38-9mlir/test/python/dialects/nvvm.py
+10-5mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+6-8mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
+7-0mlir/test/Dialect/LLVMIR/nvvm.mlir
+3-1mlir/test/Target/LLVMIR/nvvm/mbar_arrive.mlir
+152-236 files

LLVM/project adb986abolt/lib/Passes FixRISCVCallsPass.cpp, bolt/lib/Target/RISCV RISCVMCPlusBuilder.cpp

[BOLT][RISCV] Fix the inaccurate profile data check (#189338)
DeltaFile
+6-12bolt/lib/Passes/FixRISCVCallsPass.cpp
+8-0bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp
+2-2bolt/test/RISCV/call-annotations.s
+3-1bolt/test/RISCV/relax.s
+19-154 files

LLVM/project 0609b23mlir/lib/Target/LLVMIR/Dialect/OpenMP OpenMPToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR openmp-target-launch-host.mlir openmp-target-launch-device.mlir

update
DeltaFile
+30-40mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+23-3mlir/test/Target/LLVMIR/openmp-target-launch-host.mlir
+19-0mlir/test/Target/LLVMIR/openmp-target-launch-device.mlir
+72-433 files

LLVM/project fe5d5b7llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/DebugInfo/X86 sdag-load-sext-trunc.ll sdag-load-sext.ll

[SelectionDAG] Salvage debuginfo when combining load and z|s ext instrs. (#188544)

Reland 2b958b9ee24b8ea36dcc777b2d1bcfb66c4972b6

Salvage debuginfo when combining load and z|s ext instrs.

SelectionDAG uses the DAGCombiner to fold a load followed by a sext to a
load and sext instruction. For example, in x86 we will see that

```
%1 = load i32, ptr @GlobArr
    #dbg_value(i32 %1, !43, !DIExpression(), !52)
%2 = sext i32 %1 to i64, !dbg !53
```

is converted to:

```
%0:gr64_nosp = MOVSX64rm32 $rip, 1, $noreg, @GlobArr, $noreg, debug-instr-number 1, debug-location !51

    [14 lines not shown]
DeltaFile
+89-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+70-0llvm/test/DebugInfo/X86/sdag-load-sext-trunc.ll
+61-0llvm/test/DebugInfo/X86/sdag-load-sext.ll
+48-0llvm/test/DebugInfo/X86/sdag-load-zext-multiple-args.ll
+268-34 files

LLVM/project 8401bebclang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering address-space.cir

[CIR][Lowering] Handle address space cast in GlobalViewAttr lowering (#190197)

Upstreaming clangIR PR: https://github.com/llvm/clangir/pull/2099

This PR fixes the GlobalViewAttr LLVM lowering to use AddrSpaceCastOp
when the source and destination address spaces differ.
This fixes crashes when lowering globals referenced across address
spaces, such as AMDGPU globals in addrspace(1) referenced from
llvm.compiler.used arrays.
DeltaFile
+45-0clang/test/CIR/Lowering/address-space.cir
+21-3clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+66-32 files

LLVM/project 4bb06e2llvm/lib/Target/AMDGPU AMDGPURewriteAGPRCopyMFMA.cpp

Changed to a debug counter.
DeltaFile
+4-7llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
+4-71 files

LLVM/project 9909223clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn-logb-scalbn.hip

[CIR][AMDGPU] Adds amdgcn logb and scalebn builtins
DeltaFile
+89-10clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+42-0clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
+131-102 files

LLVM/project 4d1c8c0llvm/include/llvm/ObjectYAML DWARFYAML.h, llvm/lib/ObjectYAML DWARFEmitter.cpp DWARFYAML.cpp

[DWARFYAML] Begin DWARFv5 debug_line support (#191167)

This patch adds enough support to generate a correct basic v5 header
(llvm-dwarfdump complains it can't find DW_LNCT_path, but I wouldn't say
it's strictly required).  Directory and file name counts use relatively
complex encodings, so I'm leaving those for separate patch(es). For now,
I'm hardcoding the relevant fields to zero.
DeltaFile
+128-0llvm/test/tools/yaml2obj/ELF/DWARF/debug-line-v5.yaml
+26-11llvm/lib/ObjectYAML/DWARFEmitter.cpp
+10-2llvm/lib/ObjectYAML/DWARFYAML.cpp
+2-0llvm/include/llvm/ObjectYAML/DWARFYAML.h
+166-134 files

LLVM/project b4388d8libc/src/__support/OSUtil/linux/syscall_wrappers accept.h CMakeLists.txt, libc/src/sys/socket accept.h

[libc] Implement accept(2) on linux (#191203)

The implementation follows the same patterns as the other socket
functions (this was mostly done using AI).

I've extended the connect test to test accepting connections as well
(and renamed it accordingly).
DeltaFile
+125-0libc/test/src/sys/socket/linux/connect_accept_test.cpp
+0-76libc/test/src/sys/socket/linux/connect_test.cpp
+48-0libc/src/__support/OSUtil/linux/syscall_wrappers/accept.h
+30-0libc/src/sys/socket/linux/accept.cpp
+23-0libc/src/sys/socket/accept.h
+15-0libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
+241-766 files not shown
+272-7912 files

LLVM/project af03f5eclang/lib/Basic/Targets RISCV.h, clang/test/CodeGen/RISCV bitint.c

Reland "[RISCV] Support RISCV BitInt larger than 128 (#175515)" (#190188)

Reverted due to https://github.com/llvm/llvm-project/issues/176637 and
be fixed after https://github.com/llvm/llvm-project/pull/178690.

---


https://github.com/llvm/llvm-project/commit/fa57074d146925a303263905af415cc78f58f353
constraint the RISCV BitInt with 128 bits.

It is due to fp <-> int convension will crash in backend.
(https://godbolt.org/z/9o1qr4rje)

This patch enable larger than 128 bits BitInt type by
setMaxLargeFPConvertBitWidthSupported(128).
DeltaFile
+3,583-866llvm/test/CodeGen/RISCV/fpclamptosat.ll
+1,792-0llvm/test/CodeGen/RISCV/bitint-fp-conv-200.ll
+218-36clang/test/CodeGen/RISCV/bitint.c
+214-0llvm/test/CodeGen/RISCV/fp128.ll
+4-0clang/lib/Basic/Targets/RISCV.h
+2-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+5,813-9021 files not shown
+5,813-9047 files

LLVM/project 7a25ab7llvm/lib/Analysis DependenceAnalysis.cpp, llvm/test/Analysis/DependenceAnalysis gcd-miv-overflow.ll

[DA] Fix overflow of findBoundsALL in BanerjeeTest

Fix signed overflow handling in `findBounds*` for the Banerjee test.
The previous implementation computed bounds using `getMinusSCEV` and
`getMulExpr` without checking for signed overflow, which could produce
incorrect bounds when coefficients have extreme values.

- Add `mulSCEVNoSignedOverflow` helper function that checks for
multiplication overflow before computing the result
- Use `minusSCEVNoSignedOverflow` and `mulSCEVNoSignedOverflow` in
`findBounds*` to safely compute bounds, returning `nullptr`
when overflow would occur
DeltaFile
+112-46llvm/lib/Analysis/DependenceAnalysis.cpp
+7-19llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
+119-652 files

LLVM/project f11fe5bclang-tools-extra/clangd/unittests DiagnosticsTests.cpp, clang/lib/Serialization ASTReader.cpp ASTWriter.cpp

[clang][Serialization] Serialize DiagStateOnPushStack to fix pragma d… (#190420)

**Serialize DiagStateOnPushStack to fix pragma diagnostic push/pop
across PCH boundary**

`DiagStateOnPushStack` was not serialized in PCH files, causing `#pragma
clang diagnostic pop` to emit a spurious "no matching push" warning when
the corresponding push was in the preamble. This is because clangd
splits files into a preamble (compiled to PCH) and the main file body,
and the push/pop stack was lost during the PCH round-trip.

Serialize and deserialize DiagStateOnPushStack in
`WritePragmaDiagnosticMappings`/`ReadPragmaDiagnosticMappings` so that
unmatched pushes from a preamble are correctly restored.

Fixes https://github.com/clangd/clangd/issues/1167
DeltaFile
+12-0clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
+12-0clang/lib/Serialization/ASTReader.cpp
+11-0clang/test/PCH/pragma-diag-push-pop-across-pch.c
+7-0clang/lib/Serialization/ASTWriter.cpp
+1-0clang/test/PCH/Inputs/pragma-diag-push.h
+43-05 files