LLVM/project e924218 — mlir/lib/Dialect/X86/Transforms VectorContractToAMXDotProduct.cpp, mlir/test/Dialect/X86/AMX vector-contract-to-tiled-dp.mlir

[mlir][x86] Support rank-reducing RHS reads in AMX online packing (#232279)

Allows AMX online packing to handle rank-reducing RHS reads.

For a rank-reducing read, the sizes miss the dropped leading unit dims,
which hit an assertion when creating the subview. The packing loads also
indexed the subview with the read's leading offsets twice.

Assisted-by: Claude
DeltaFile
+63-0mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
+16-11mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
+79-112 files

LLVM/project 2c048b8 — llvm/lib/Analysis IVDescriptors.cpp, llvm/test/Transforms/LoopVectorize first-order-recurrence.ll first-order-recurrence-invariant-backedge.ll

[LV] Loop-invariant backedge values prevent recognition of fixed-order recurrence (#228021)

Fixes #228018 by handling fixed-order recurrences with loop-invariant backedge values.
DeltaFile
+146-0llvm/test/Transforms/LoopVectorize/first-order-recurrence-invariant-backedge.ll
+103-15llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+8-1llvm/lib/Analysis/IVDescriptors.cpp
+257-163 files

LLVM/project 4cd9aff — flang/lib/Optimizer/CodeGen CodeGen.cpp, flang/test/Fir convert-to-llvm-invalid.fir

[flang] Fail fir.global conversion when the type has no LLVM equivalent (#232610)

`GlobalOpConversion` passed the result of `convertType` straight to
`LLVM::GlobalOp::create`. For a global whose type the FIR type converter
cannot lower, such as tensor<10xi32>, that result is null and
TypeAttr::get segfaults.

Return a match failure instead so the conversion reports that
`fir.global` could not be legalized.

Assisted-by: Claude code

Signed-off-by: Keshav Vinayak Jha <keshavvinayakjha at gmail.com>
DeltaFile
+8-0flang/test/Fir/convert-to-llvm-invalid.fir
+3-0flang/lib/Optimizer/CodeGen/CodeGen.cpp
+11-02 files

LLVM/project 5170cd8 — libc/src/__support/OSUtil/linux CMakeLists.txt sigmask.h, libc/src/setjmp/linux sigsetjmp_epilogue.cpp

[libc] Move linux signal mask helpers into OSUtil/sigmask.h (#232647)

Move internal signal set and mask helpers (full_set, empty_set, add,
remove, block_all, set_mask, etc.) out of signal_utils.h and into a new
src/__support/OSUtil/linux/sigmask.h header under the signals namespace.
This allows other low-level OS utilities and entrypoints to manipulate
signal masks without pulling in signal_utils.h (defined under
src/signal).

The rest of signal_utils.h should also move, but I'm leaving that for a
separate PR (and a separate file) because the rest of the file has more
dependencies (RwLock, vdso, __restore_rt), and interacts with more
components.

Along with the move:
- fix full_set() on 32-bit systems: sigset_t{{-1UL}} only set the first
word, leaving real-time signals unmasked. Now we loop over __signals.
- rename the helpers to shorter names within the signals namespace
(add_signal -> add, delete_signal -> remove, restore_signals ->

    [5 lines not shown]
DeltaFile
+122-0libc/src/__support/OSUtil/linux/sigmask.h
+3-49libc/src/signal/linux/signal_utils.h
+22-2utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+15-0libc/src/__support/OSUtil/linux/CMakeLists.txt
+5-9libc/src/stdlib/linux/system.cpp
+5-8libc/src/setjmp/linux/sigsetjmp_epilogue.cpp
+172-689 files not shown
+198-8615 files

LLVM/project e3aa6c7 — llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.h SPIRVNonSemanticDebugHandler.cpp, llvm/test/CodeGen/SPIRV/debug-info debug-lexical-block-discriminator.ll

[SPIRV] Emit DebugLexicalBlockDiscriminator for a DILexicalBlockFile.

A location scoped at a DILexicalBlockFile was emitted as a DebugScope of the compilation unit, so the discriminator did not round-trip.
Use the discriminator as the DebugScope operand, matching SPIRV-LLVM-Translator.
DeltaFile
+67-0llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block-discriminator.ll
+31-26llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+15-7llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+113-333 files

LLVM/project f02c39c — mlir/lib/Dialect/Linalg/Transforms Vectorization.cpp, mlir/test/Dialect/Linalg/vectorization unsupported.mlir

[mlir][linalg] Reject non-unit strides when vectorizing insert_slice (#221293)

`vectorizeAsInsertSliceOp` writes the source back with a
`vector.transfer_write` at the slice offsets, which cannot express a
stride. An insert with stride 3 was written to rows 0 and 1 instead of
rows 0 and 3. Bail out in the precondition unless all strides are 1.

Part of #227821.
DeltaFile
+37-0mlir/test/Dialect/Linalg/vectorization/unsupported.mlir
+9-1mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+46-12 files

LLVM/project f238fd1 — llvm/test/CodeGen/AMDGPU memset-param-combinations.ll fptoi.i128.ll

[AMDGPU] Narrow 64-bit setcc to only test lower 32 bits (#232433)

Narrow 64-bit compare to a lower 32-bit compare if upper 32-bits are
known to be equal.

---------

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+2,795-3,867llvm/test/CodeGen/AMDGPU/clmul.ll
+1,325-0llvm/test/CodeGen/AMDGPU/setcc-i64-to-i32.ll
+0-900llvm/test/CodeGen/AMDGPU/setcc-select-hi32mask.ll
+74-74llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
+65-67llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
+36-36llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
+4,295-4,94413 files not shown
+4,435-5,04619 files

LLVM/project 4cc66b7 — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 bfloat.ll

[X86] keep upper-16-bit f32 extractions in XMM for f16/v8i16 (#230698)

Teach combineBitcast and combineVectorInsert to keep this upper-16-bit
f32 extraction in XMM registers rather than bouncing through a GPR.

Depends on PR: https://github.com/llvm/llvm-project/pull/231112
Follow-up PR:  https://github.com/llvm/llvm-project/pull/230557
DeltaFile
+8-29llvm/test/CodeGen/X86/bfloat.ll
+31-0llvm/lib/Target/X86/X86ISelLowering.cpp
+39-292 files

LLVM/project f0acb15 — clang/lib/CodeGen CGDecl.cpp

[Clang] Do not check result of getTerminator. NFC. (#232736)

Since #189416 BasicBlock::getTerminator cannot return nullptr.
DeltaFile
+3-5clang/lib/CodeGen/CGDecl.cpp
+3-51 files

LLVM/project e650426 — mlir/lib/Dialect/Tensor/Transforms ScalarizeFunctionResult.cpp, mlir/test/Dialect/Tensor scalarize-single-elem-return.mlir

[MLIR][Tensor] Allow tensor-result scalarization with public callers (#231447)

Private callees should be scalarized even when called by public
functions. `tensor.from_elements` preserves existing tensor uses without
changing public signatures.
- Simplify DFS to recurse only into candidate callers, removing
redundant checks and the `moduleFunctions` set.
- Add coverage for private call chains with public callers and unchanged
public call boundaries.
- Rename the tensor-consumer test to reflect that its caller is
scalarized.
Validation: C++ syntax and diff checks passed. Runtime verification
requires rebuilding mlir-opt.

I leveraged AI to write this PR.
DeltaFile
+12-33mlir/lib/Dialect/Tensor/Transforms/ScalarizeFunctionResult.cpp
+35-9mlir/test/Dialect/Tensor/scalarize-single-elem-return.mlir
+47-422 files

LLVM/project 336c444 — llvm/lib/Transforms/Scalar StructurizeCFG.cpp, llvm/test/CodeGen/AMDGPU tuple-allocation-failure.ll uniform-cfg-around-divergent-region.ll

[StructurizeCFG] Simplify uniform region check (#232665)

When deciding whether a region can be left unstructurized, only check
that the conditional branches of its direct child blocks are uniform.

Sub-regions are processed before their parent, so divergent control flow
inside a sub-region has already been structurized and is self-contained:
it rejoins at Flow blocks inside the sub-region, or at the sub-region's
exit if its entry dominates the exit. Uniform control flow around it
therefore never needs structurizing. (Sub-regions whose entry ends in a
callbr are an exception, because run() leaves them unstructurized; that
was not handled by the old check either.)

The old check additionally required either every branch in every
sub-region to carry !structurizecfg.uniform metadata, or at most one
conditional branch among the direct children. Those conditions were
precautions that were never shown to be necessary, and they caused
uniform control flow around a divergent sub-region to be structurized
needlessly. tuple-allocation-failure.ll changes for this reason, and its

    [15 lines not shown]
DeltaFile
+354-0llvm/test/CodeGen/AMDGPU/uniform-cfg-around-divergent-region.ll
+150-196llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
+319-0llvm/test/Transforms/StructurizeCFG/AMDGPU/uniform-regions.ll
+29-65llvm/lib/Transforms/Scalar/StructurizeCFG.cpp
+852-2614 files

LLVM/project 451136a — llvm/lib/Transforms/Utils LoopUnroll.cpp, llvm/test/Transforms/LoopUnroll unroll-loads-cse.ll

[LoopUnroll] Combine metadata when CSE'ing loads after unrolling (#232267)

loadCSE() replaces a load with an earlier load of the same address, but
it leaves the earlier load's metadata as it is. If the earlier load has
!nonnull or !range and the replaced one doesn't, a null or out-of-range
value becomes poison for all the users of the replaced load, while in
the original program they saw a well-defined value.

This calls combineMetadataForCSE(M, Load, /*DoesKMove=*/false) before
the RAUW, the same as EarlyCSE does. That drops the poison-generating
metadata from the surviving load unless it also has !noundef.

Fixes #231395
DeltaFile
+154-0llvm/test/Transforms/LoopUnroll/unroll-loads-cse.ll
+2-0llvm/lib/Transforms/Utils/LoopUnroll.cpp
+156-02 files

LLVM/project 97d1a3f — llvm/test/CodeGen/Thumb pr35836.ll, llvm/test/CodeGen/X86 scheduler-backtracking.ll combine-sbb.ll

DeadMachineInstructionElim: Mark unread physreg defs dead (#232730)

When DeadMachineInstructionElim deletes all readers of a physreg def,
the def was left live. It already tracks liveness in its backward walk,
so mark non-reserved physreg defs that are not live afterward as dead.

The newly dead $eflags/CC defs let MachineSink move some flag-setting
arithmetic, which accounts for the codegen changes.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+93-0llvm/test/CodeGen/X86/dead-mi-elimination-dead-physreg-def.mir
+28-40llvm/test/CodeGen/X86/midpoint-int.ll
+12-16llvm/test/CodeGen/Thumb/pr35836.ll
+15-13llvm/test/CodeGen/X86/select-lea.ll
+6-6llvm/test/CodeGen/X86/combine-sbb.ll
+4-5llvm/test/CodeGen/X86/scheduler-backtracking.ll
+158-806 files not shown
+176-9112 files

LLVM/project f000143 — llvm/test/CodeGen/AMDGPU llvm.amdgcn.image.dim.indexed.nonuniform.ll llvm.amdgcn.image.dim.indexed.ll

Merge branch 'main' into users/gbossu/lv.rewrite.scalable.vf.selection
DeltaFile
+1,271-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.indexed.ll
+1,048-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.indexed.nonuniform.ll
+1,048-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.indexed.nonuniform.sample.ll
+1,032-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.indexed.sample.ll
+1,012-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.indexed.ll
+989-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.indexed.nonuniform.ll
+6,400-0169 files not shown
+11,348-925175 files

LLVM/project f68a7f8 — libcxxabi/test cxa_thread_atexit_test.pass.cpp

[libc++abi][test] Remove `XFAIL` in `cxa_thread_atexit_test.pass.cpp` (#232638)

The multiple definition problem was fixed in
cfe1b90e7cda8f2e801e23316c89e3800c5f363e so we should enable the test
for LLVM libc now.
DeltaFile
+0-5libcxxabi/test/cxa_thread_atexit_test.pass.cpp
+0-51 files

LLVM/project 208b0aa — clang/test/OffloadTools/clang-sycl-linker split-mode.ll basic.ll, libsycl/unittests/common scoped_binary_registration.hpp device_images.hpp

[SYCL] Normalize the device image target triple (#231446)

clang-sycl-linker now records the target triple of each SYCL offload
image in
its normalized three-part form, architecture-vendor-operating_system.

Only the architecture component tells which binary format an image
holds, so
libsycl no longer compares the triple as a whole. DeviceImageManager
extracts
that component once, when the image is registered, and keeps it as a
std::string_view that the per-kernel compatibility check reuses.

Assisted-by: Claude Code.

---------

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+100-0libsycl/unittests/program_manager/image_compatibility.cpp
+20-2clang/test/OffloadTools/clang-sycl-linker/triple.ll
+12-7libsycl/unittests/common/device_images.hpp
+6-6clang/test/OffloadTools/clang-sycl-linker/split-mode.ll
+6-6clang/test/OffloadTools/clang-sycl-linker/basic.ll
+7-4libsycl/unittests/common/scoped_binary_registration.hpp
+151-255 files not shown
+171-3211 files

LLVM/project 304cb72 — clang/tools/cir-opt CMakeLists.txt, clang/tools/cir-translate CMakeLists.txt

[CIR][DYNLIB] Make CIR/MLIR related symbols hidden in libclang-cpp.so. (#232409)

It was brought up on a different review that the cost of enabling
ClangIR by default was a significant runtime cost, even without
fclangir. From an instruction count, I found a ~8.5 million instruction
increase caused by the loader having to see all these symbols.

Reducing these gets us down to about a 300k overhead here, which reduces
the time measured on my machine of around 0.11% increase on a file
including std::vector, which feels reasonable. An empty TU overhead
looks to be in the high-1% increase due to the ~300k additional
instructions of loading.

AI disclosure: I used it extensively here, but I think I understand what
is going on, to the best of my ability to understand linking and CMake
(which is minimal :/).
DeltaFile
+7-11clang/tools/cir-translate/CMakeLists.txt
+16-1clang/tools/clang-shlib/simple_version_script.map.in
+5-9clang/tools/cir-opt/CMakeLists.txt
+28-213 files

LLVM/project 19f1235 — libcxx/include/__locale_dir/support openbsd.h

[libcxx] fix missing `__get_locale_encoding()` for OpenBSD (#228306)

Fixes errors like this:


/home/alexrp/Sources/ziglang/zig-llvm23/lib/libcxx/src/text_encoding.cpp:34:43:
error: no member named '__get_locale_encoding' in namespace
        'std::__locale'
34 | return
__make_text_encoding(__locale::__get_locale_encoding(static_cast<__locale::__locale_t>(0)));
| ^~~~~~~~~~~~~~~~~~~~~

/home/alexrp/Sources/ziglang/zig-llvm23/lib/libcxx/src/text_encoding.cpp:48:41:
error: no member named '__get_locale_encoding' in namespace
        'std::__locale'
48 | return __make_text_encoding(__locale::__get_locale_encoding(__l));
        |                                         ^~~~~~~~~~~~~~~~~~~~~
    2 errors generated.
DeltaFile
+7-0libcxx/include/__locale_dir/support/openbsd.h
+7-01 files

LLVM/project baec31b — libc/src/__support/printf_core float_dec_converter_limited.h

[libc][printf] Fix %e/%g formatting in float320 algorithm (#232721)

Commit 509679cf9c9db71, updating arrays of char to a more general CharT,
removed a memset in the float320 code and replaced it with default
zero-initialization of the containing object. But the memset was to
`'0'`, not to `0`, so this changed the output. Restored the correct
initialization, this time using a for loop so that it will work even if
CharT is >1 byte.
DeltaFile
+3-2libc/src/__support/printf_core/float_dec_converter_limited.h
+3-21 files

LLVM/project 304ada3 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-intrinsics-and-not.ll

[AArch64][llvm] Combine SVE AND-NOT operations into BIC for _m forms

Replace NOT followed by merging AND with BIC for expressions such as:

  return svand_u32_m(pg, a, svnot_u32_x(pg, b));

Combine when NOT is the second operand and its predicate matches the AND
predicate or is all-active.

Use predicated BIC to preserve the AND's first operand in inactive
lanes. Use unpredicated BIC when the AND predicate is all-active.

Do not commute merging AND operands, since this would change inactive
results. Leave pairs with incompatible predicates unchanged.

This applies to all integer element widths. Update the pre-commit LLVM
expectations, including cases where combining would change the
result.
DeltaFile
+12-48llvm/test/CodeGen/AArch64/sve-intrinsics-and-not.ll
+22-10llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+34-582 files

LLVM/project 0d75fac — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-intrinsics-and-not.ll

[AArch64][llvm] Combine SVE AND-NOT operations into BIC for _x forms

Replace NOT followed by AND with BIC for expressions such as:

  return svand_u32_x(svptrue_b32(), a, svnot_u32_x(svptrue_b32(), b));

Combine ordinary AND with NOT when the NOT predicate is all-active or
its inactive values are undefined.

Also combine matching-predicate SVE AND_x-NOT pairs before lowering
discards the AND predicate. AND_x ignores inactive results, so the NOT's
inactive values do not need preserving.

This applies to all integer element widths. Update the pre-commit LLVM
expectations, including cases where combining would change the
result.
DeltaFile
+22-101llvm/test/CodeGen/AArch64/sve-intrinsics-and-not.ll
+34-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+56-1032 files

LLVM/project 22cfd3c — llvm/test/CodeGen/AArch64 sve-intrinsics-and-not.ll

[AArch64][llvm] Add pre-commit tests for SVE AND-NOT combining

Add LLVM tests for expressions where NOT followed by AND could
use BIC. Record the existing assembly so the following changes show the
missed optimisations being fixed.

Cover _x and _m AND forms using all-active and runtime predicates. Test
_m forms across all integer element widths. Include NOT with defined
inactive values and reversed AND operands.

Also test cases that must remain as NOT followed by AND because
combining would change the values in inactive lanes.
DeltaFile
+346-0llvm/test/CodeGen/AArch64/sve-intrinsics-and-not.ll
+346-01 files

LLVM/project d71aac3 —

[clang][ThreadSafety] Fix a crash on a capability expression calling a pointer to member (#231995)

`translateCXXMemberCallExpr` looks for calls to `get()` on smart
pointers through `CXXMemberCallExpr::getMethodDecl()`, which returns
null for a call through a pointer to member function, so a capability
expression such as `(g->*g->mu_of)()->Lock()` dereferenced null.

The call then reaches `translateCallExpr`, where its callee, a
pointer-to-member operator, is not translated and became the callee of a
`til::Call`. An `Undefined` compares equal to any other `Undefined`, so
such calls through different objects were taken for one capability, and
nested in a `Call` the `Undefined` escaped
`CapabilityExpr::isInvalid()`, so nothing was reported. Propagate the
`Undefined` as the result of the call instead, which the analysis
reports as "cannot resolve lock expression" like any other unsupported
expression.

Assisted-by: Claude Fable 5.1
DeltaFile
+0-00 files

LLVM/project 58432f9 — llvm/test/Transforms/SLPVectorizer/X86 merge-input-operands.ll

[SLP][X86] Add pre-commit tests for merging bin-op input operands (#210004)

Add baseline SLP vectorizer tests covering the merge-input-operands
transform, including cases that exercise IR flag propagation (fast-math
flags, integer nsw/nuw wrap flags, and the exact flag on shifts) onto
the merged operand node. These checks reflect current (pre-transform)
codegen; a follow-up patch enables the transform and updates the checks
to show the delta.

Co-authored-by: Balakrishna Bandlapalli <bbandlap at gmail.com>
Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+462-0llvm/test/Transforms/SLPVectorizer/X86/merge-input-operands.ll
+462-01 files

LLVM/project 3416262 — clang/lib/Analysis ThreadSafetyCommon.cpp, clang/test/SemaCXX warn-thread-safety-analysis.cpp

[clang][ThreadSafety] Fix a crash on a capability expression calling a pointer to member (#231995)

`translateCXXMemberCallExpr` looks for calls to `get()` on smart
pointers through `CXXMemberCallExpr::getMethodDecl()`, which returns
null for a call through a pointer to member function, so a capability
expression such as `(g->*g->mu_of)()->Lock()` dereferenced null.

The call then reaches `translateCallExpr`, where its callee, a
pointer-to-member operator, is not translated and became the callee of a
`til::Call`. An `Undefined` compares equal to any other `Undefined`, so
such calls through different objects were taken for one capability, and
nested in a `Call` the `Undefined` escaped
`CapabilityExpr::isInvalid()`, so nothing was reported. Propagate the
`Undefined` as the result of the call instead, which the analysis
reports as "cannot resolve lock expression" like any other unsupported
expression.

Assisted-by: Claude Fable 5.1
DeltaFile
+22-0clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+8-3clang/lib/Analysis/ThreadSafetyCommon.cpp
+30-32 files

LLVM/project 4fa92e8 — clang/test/CodeGen #amdgcnspirv-size-optimization.c#

remove accidentally added file from pr/232710 (#232740)
DeltaFile
+0-0clang/test/CodeGen/#amdgcnspirv-size-optimization.c#
+0-01 files

LLVM/project dfeadc6 — clang/include/clang/Analysis/Analyses ThreadSafetyCommon.h, clang/lib/Analysis ThreadSafetyCommon.cpp

[clang][ThreadSafety] Resolve sibling members of function pointer fields against the called object (#231602)

d1e84bb9ad3b allowed thread safety attributes on function pointer
fields, but an attribute naming a sibling member of the struct was
translated without an implicit object, so for

  struct Dev {
    Mutex mu;
    void (*lock)(void) ACQUIRE(mu);
  };

`dev->lock()` did not acquire `dev->mu`. In C the field was translated
as a bare `mu` that matched no object's `mu`; in C++ the `this->mu` that
Sema builds was substituted with the placeholder `this` of the enclosing
function, so inside a member function of `Dev` a call through another
object was silently taken as a lock of the enclosing object's `mu`.

Use the base of the member access through which the field is called as
the implicit object for the attributes on that field. The member access

    [6 lines not shown]
DeltaFile
+60-0clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+26-10clang/lib/Analysis/ThreadSafetyCommon.cpp
+35-0clang/test/Sema/warn-thread-safety-analysis.c
+0-3clang/include/clang/Analysis/Analyses/ThreadSafetyCommon.h
+121-134 files

LLVM/project fc53a01 — llvm/lib/Analysis ScalarEvolution.cpp

[ScalarEvolution] Avoid duplicate range computation for singleton steps (#232653)

When the step range contains a single value, its signed minimum and
maximum are equal, so we can skip the second affine range calculation
and reuse the first result. This reduces compile-time instruction counts
by 0.27% for mafft and 0.14% for lencod at O3.
DeltaFile
+10-6llvm/lib/Analysis/ScalarEvolution.cpp
+10-61 files

LLVM/project 7ce728e — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 bfloat.ll

[X86] Keep upper-16-bit f32 extractions in XMM for f16/v8i16

Teach combineBitcast and combineVectorInsert to keep this upper-16-bit
f32 extraction in XMM registers rather than bouncing through a GPR.

Depends on PR: https://github.com/llvm/llvm-project/pull/231112
Follow-up PR:  https://github.com/llvm/llvm-project/pull/230557
DeltaFile
+8-29llvm/test/CodeGen/X86/bfloat.ll
+31-0llvm/lib/Target/X86/X86ISelLowering.cpp
+39-292 files

LLVM/project 74158ed — clang/docs ReleaseNotes.md, clang/lib/AST Expr.cpp

[Clang] Fix crash classifying a dependent call to a non-callable value (#220110)

Clang asserts in Type::castAs<FunctionType> (via
CallExpr::getCallReturnType) when a template argument contains a call
whose callee has already been substituted to a plain value while an
argument is still dependent, e.g.

```cpp
template <auto V> struct W {
  static constexpr auto value = V;
  template <class T> auto f(T) -> W<value(T::value)>;
};
template struct W<42>;
```

When W<42> is instantiated, the callee `value` becomes an int but
T::value is still dependent, so BuildCallExpr creates a dependent
CallExpr (the MayBeFunctionType guard from #139246 intentionally lets
DeclRefExpr callees through so the error is deferred to instantiation).

    [17 lines not shown]
DeltaFile
+39-0clang/test/SemaTemplate/fun-template-def.cpp
+3-0clang/lib/AST/Expr.cpp
+3-0clang/docs/ReleaseNotes.md
+45-03 files