LLVM/project da34c91llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPCostAnalysis.cpp SLPCostAnalysis.h

[NFC][SLP] Refactor so that CostKind is a property of BoUpSLP (#217463)

Track in just one place so we can adjust as needed.

Precursor to #217398.

AI Usage: Assisted by Codex
DeltaFile
+190-186llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+8-9llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
+5-5llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
+203-2003 files

LLVM/project 4666404llvm/lib/Target/AMDGPU AMDGPU.td, llvm/lib/TargetParser AMDGPUTargetParser.cpp

AMDGPU: Remove remaining uses of old manual bitset of target features. (#217748)

Use new feature bitset for sgpr-init-bug checks, and remove the
remaining llvm uses of getArchAttrAMDGCN in favor of the new feature 
bitset.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+7-6llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+4-0llvm/unittests/TargetParser/TargetParserTest.cpp
+2-1llvm/lib/Target/AMDGPU/AMDGPU.td
+13-73 files

LLVM/project 49291a6flang/docs OpenMPSupport.md

[Flang][OpenMP] add more OpenMP support entries and status updates (#212889)

This adds a feature table for OpenMP 4.5 to the Flang OpenMP support
page, and also updates various entries (PR links, status, Claimed By
column for some in progress features, Notes).
DeltaFile
+73-52flang/docs/OpenMPSupport.md
+73-521 files

LLVM/project 85c7d75llvm/lib/CodeGen CFIInstrInserter.cpp

Undo enthusiastic clang-format change.
DeltaFile
+4-4llvm/lib/CodeGen/CFIInstrInserter.cpp
+4-41 files

LLVM/project 732d841llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen/GlobalISel RegBankSelect.h

[GISel][NewPM] Port RegBankSelect

Standard NewPM pass porting. A little bit more analysis plumbing than
normal.

* Plumb both Pass*/MachineFunctionAnalysisManager* for critical edge
  splitting analysis updates.
* Plumb through functions to get MBFI/MBPI both cached and non-cached.
* Move the Impl class to the C++ file to try and keep the size of
  RegBankSelect.h small.

Reviewers: arsenm, mshockwave, aemerson, lenary, wangpc-pp

Pull Request: https://github.com/llvm/llvm-project/pull/217756
DeltaFile
+764-96llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+39-573llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
+1-1llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+1-1llvm/lib/CodeGen/GlobalISel/GlobalISel.cpp
+1-1llvm/include/llvm/Passes/MachinePassRegistry.def
+1-1llvm/include/llvm/InitializePasses.h
+807-67310 files not shown
+817-68116 files

LLVM/project f4e9070llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen CFIInstrInserter.h

[NewPM] Port CFIInstrInserter to the new pass manager

Adds a newPM pass for CFIInstrInserter (cfi-instr-inserter).

- Extracts the pass's working state (MBBVector, CSRLocMap) and logic
  into a CFIInstrInserterImpl class with a run method, called by both
  the legacy pass and the new pass manager pass.
- Renames the old pass with the "Legacy" suffix.
- Adds the new pass manager pass CFIInstrInserterPass, using
  RequiredPassInfoMixin: the legacy pass's runOnMachineFunction never
  calls skipFunction, so it always runs unconditionally and should not
  be skippable in the new PM either. run() unconditionally returns
  PreservedAnalyses::all(), matching the legacy pass's own
  AU.setPreservesAll() declaration -- the same shape CFIFixupPass (an
  already-ported sibling CFI pass) already uses.
- Updates MachinePassRegistry.def, PassBuilder, and CodeGenPassBuilder.
- Wires the pass into X86's and RISC-V's newPM pipelines, matching
  their existing legacy-PM gating conditions:
  - X86 replaces an existing TODO inside an already-correct

    [13 lines not shown]
DeltaFile
+48-30llvm/lib/CodeGen/CFIInstrInserter.cpp
+25-0llvm/include/llvm/CodeGen/CFIInstrInserter.h
+7-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-4llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/cfi-multiple-locations.mir
+1-1llvm/include/llvm/InitializePasses.h
+87-3612 files not shown
+107-3818 files

LLVM/project de73682llvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp, llvm/lib/Target/X86 X86CodeGenPassBuilder.cpp

Fix missing CFIInstrInserter.h include after CRTP removal

050470e75fb6 ([CodeGen] Replace CodeGenPassBuilder CRTP with virtual
hooks) moved pass headers out of CodeGenPassBuilder.h and into the
specific translation units that actually call them. FuncletLayout.h's
include followed its call site (the generic base pipeline) into the
new lib/Passes/CodeGenPassBuilder.cpp correctly, and MachineCombiner.h
was already included directly in X86CodeGenPassBuilder.cpp, so neither
needed a fix. CFIInstrInserter.h fell through: it was only ever pulled
in transitively via CodeGenPassBuilder.h, so once that stopped
including pass headers, both X86CodeGenPassBuilder.cpp and
RISCVCodeGenPassBuilder.cpp were left calling CFIInstrInserterPass()
with no declaration in scope.

Assisted-by: Claude Sonnet 5
DeltaFile
+1-0llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+1-0llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-02 files

LLVM/project 5078d44llvm/lib/CodeGen CFIInstrInserter.cpp

Undo clang-format enthusiastic reformatting
DeltaFile
+1-2llvm/lib/CodeGen/CFIInstrInserter.cpp
+1-21 files

LLVM/project ba442e6llvm/include/llvm/CodeGen Passes.h, llvm/lib/CodeGen CFIInstrInserter.cpp

Add Legacy suffix go pass creation function.
DeltaFile
+1-1llvm/lib/Target/X86/X86TargetMachine.cpp
+1-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+1-1llvm/lib/CodeGen/CFIInstrInserter.cpp
+1-1llvm/include/llvm/CodeGen/Passes.h
+4-44 files

LLVM/project 0cfbd42clang/lib/CIR/CodeGen CIRGenFixedPointBuilder.h CIRGenExprScalar.cpp, clang/test/CIR/CodeGen fixed-point-arith.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+323-569llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
+759-0clang/test/CIR/CodeGen/fixed-point-arith.cpp
+151-446llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
+168-261clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+398-0clang/lib/CIR/CodeGen/CIRGenFixedPointBuilder.h
+169-169clang/test/CIR/CodeGenOpenACC/combined-copy.c
+1,968-1,445168 files not shown
+6,291-3,544174 files

LLVM/project c769c56llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmin.ll buffer-fat-pointer-atomicrmw-fadd.ll

Rebase, address comment

Created using spr 1.3.7
DeltaFile
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,252-3,311llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,533-2,603llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+20,441-20,4684,507 files not shown
+199,348-138,8864,513 files

LLVM/project dc42e6fllvm/test/CodeGen/X86 expand-frem-no-libcall.ll, llvm/test/tools/llc module-triple-default.ll module-triple.ll

[llc] set canonical triple in module (#203725)

Prior to this change the effective triple for the TargetMachine and the
triple in the module were determined by different criteria and diverged
in some cases. This can create lots of issues in passes which check the
module triple.

TargetMachine:
1. -march
2. -mtriple
3. target triple in incoming module
4. default target triple

Module:
1. -mtriple
2. target triple in incoming module

Stamp the canonical target triple into the module so that this
divergence is no longer possible.
DeltaFile
+0-31llvm/test/CodeGen/X86/expand-frem-no-libcall.ll
+16-0llvm/test/tools/llc/module-triple.ll
+14-0llvm/test/tools/llc/module-triple-default.ll
+2-2llvm/tools/llc/llc.cpp
+32-334 files

LLVM/project 0597243llvm/lib/Target/SPIRV SPIRVSubtarget.h

[SPIRV] Cleanup includes in SPIRVSubtarget.h

This makes some cleanup for NewPM porting easier for RegBankSelect.
SPIRVSubtarget currently transitively depends in RegisterBankInfo.h from
RegBankSelect.h, which we want to remove. Also remove an unused include
while at it.

Reviewers: aeubanks

Pull Request: https://github.com/llvm/llvm-project/pull/217755
DeltaFile
+1-1llvm/lib/Target/SPIRV/SPIRVSubtarget.h
+1-11 files

LLVM/project e24bf1fllvm/lib/Target/RISCV RISCVInstrInfoXqci.td

[RISCV][NFC] Remove unneeded QC.SelectI<cc>I Patterns (#216837)

The `Select_GPR_Using_CC_GPR` patterns have complexity from 3 to 8,
depending on which exact pattern is being considered. The
`QCISELECTICCIPat` patterns have complexity 11, so would already be
preferred to those documented in the comment, so these additional
patterns with explicit zeroes are not required.
DeltaFile
+0-7llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+0-71 files

LLVM/project 350f999libc/hdr/types CMakeLists.txt struct_sigevent.h, libc/include CMakeLists.txt signal.yaml

[libc] Add struct sigevent definition and proxy header. (#217699)

Definition follows the standard POSIX layout from:
https://man7.org/linux/man-pages/man3/sigevent.3type.html
DeltaFile
+33-0libc/include/llvm-libc-types/struct_sigevent.h
+27-0libc/hdr/types/struct_sigevent.h
+9-0libc/include/signal.yaml
+8-0libc/hdr/types/CMakeLists.txt
+6-0libc/include/llvm-libc-macros/linux/signal-macros.h
+1-0libc/include/CMakeLists.txt
+84-01 files not shown
+85-07 files

LLVM/project 9dc2b79lldb/include/lldb/Core Module.h, lldb/source/Core Module.cpp

[lldb] Don't overwrite a caller-supplied lookup name (#217491)

MakeLookupInfos takes a lookup_name_override so a caller can say exactly
which name to search the symbol and object files for. The LookupInfo
constructor then replaced it with the basename it got from the language
plugin, so the override was thrown away.

Assisted-by: claude
DeltaFile
+29-0lldb/unittests/Core/ModuleTest.cpp
+8-6lldb/source/Core/Module.cpp
+1-1lldb/include/lldb/Core/Module.h
+38-73 files

LLVM/project 3c3fbabflang/lib/Optimizer/HLFIR/Transforms ConvertToFIR.cpp

Factor out genAssignSimple vs genAssign selection into a lambda

The logic for choosing between genAssignSimple and genAssign was
duplicated in the allocatable and non-allocatable paths of
AssignOpConversion. Extract it into a genSimpleOrAssign lambda to
avoid code drift between the two paths.

This also fixes the allocatable path which was missing the
useFortranAssignOnly guard that the non-allocatable path had.

Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
DeltaFile
+25-39flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
+25-391 files

LLVM/project 5d6859dclang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenFixedPointBuilder.h CIRGenExprScalar.cpp

[CIR] Implement fixed-point arithmetic lowering (#217710)

This should be the rest of the lowering for fixed point, so it removes
the `MissingFeatures` listing. It is a faithful re-implementation of
classic-lowering as best I can tell, except the create<COMPARE> ops are
combined.
DeltaFile
+759-0clang/test/CIR/CodeGen/fixed-point-arith.cpp
+168-261clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+398-0clang/lib/CIR/CodeGen/CIRGenFixedPointBuilder.h
+0-1clang/include/clang/CIR/MissingFeatures.h
+1,325-2624 files

LLVM/project d4bef00llvm/include/llvm/TargetParser AMDGPUTargetParser.h, llvm/lib/TargetParser AMDGPUTargetParser.cpp

AMDGPU: Deprecate getArchAttrAMDGCN

The legacy ArchFeatureKind bitfield returned by getArchAttrAMDGCN is being
replaced by getFeatureBitset (FEAT_* bits). All in-tree callers have been
migrated, so mark both overloads LLVM_DEPRECATED to steer out of tree code
to the bitset API before the accessor is removed.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+4-0llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+2-1llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+6-12 files

LLVM/project 0c46727llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmin.ll buffer-fat-pointer-atomicrmw-fadd.ll

Merge remote-tracking branch 'origin/main' into vplan-based-stride-mv-rt-guard
DeltaFile
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,252-3,311llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,533-2,603llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
+20,441-20,4683,799 files not shown
+164,252-126,0073,805 files

LLVM/project 902aaddllvm/test/Transforms/LoopVectorize dereferenceable-info-from-assumption-variable-size.ll dereferenceable-info-from-assumption-constant-size.ll

[LV] Regenerate dereferenceable tests with masked mem-ops support (NFC). (#217750)

This cuts down on the file size and makes the IR easier to read. Also
filter out after scalar.ph.
DeltaFile
+323-569llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
+151-446llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
+474-1,0152 files

LLVM/project f5d2953flang/lib/Parser tools.cpp, flang/test/Parser acc-label-do.f90

[flang][openacc] Fix nested labeled DO loops sharing a terminator (#217705)

When an OpenACC loop construct is associated with a non-block labeled
DO, GetFinalLabel() did not look through that construct. Nested DO
statements that share a terminating label then failed with "Label is
not in DO loop scope".
Walk the associated loop of OpenACC loop and combined constructs so the
shared label still closes the outer DO.
DeltaFile
+50-0flang/test/Parser/acc-label-do.f90
+19-0flang/lib/Parser/tools.cpp
+69-02 files

LLVM/project b62a7bdllvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVOptWInstrs.h, llvm/test/CodeGen/RISCV O3-newpm-pipeline.ll O1-newpm-pipeline.ll

[RISCV] Port Opt W Instrs to NewPM

Assisted-by: AI
DeltaFile
+44-22llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+35-0llvm/lib/Target/RISCV/RISCVOptWInstrs.h
+3-3llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+4-0llvm/test/CodeGen/RISCV/prefer-w-inst.mir
+2-1llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
+2-1llvm/test/CodeGen/RISCV/O1-newpm-pipeline.ll
+90-276 files not shown
+97-2812 files

LLVM/project 2e5cdd3llvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVTargetMachine.cpp

Header to RISCV.h, rename to createRISCVOptWInstrsLegacyPass
DeltaFile
+0-35llvm/lib/Target/RISCV/RISCVOptWInstrs.h
+8-2llvm/lib/Target/RISCV/RISCV.h
+2-2llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+1-2llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+0-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+11-425 files

LLVM/project 27a6a94llvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVTargetMachine.cpp

Header to RISCV.h, rename to createRISCVFoldMemOffsetLegacyPass
DeltaFile
+0-36llvm/lib/Target/RISCV/RISCVFoldMemOffset.h
+10-0llvm/lib/Target/RISCV/RISCV.h
+2-2llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+1-2llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+0-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+13-415 files

LLVM/project b082856llvm/lib/Target/RISCV RISCVCodeGenPassBuilder.cpp RISCVVectorPeephole.cpp

Header to RISCV.h, rename to createRISCVVectorPeepholeLegacyPass
DeltaFile
+0-39llvm/lib/Target/RISCV/RISCVVectorPeephole.h
+13-0llvm/lib/Target/RISCV/RISCV.h
+1-1llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+0-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+14-414 files

LLVM/project dd90d49llvm/lib/Target/RISCV RISCV.h RISCVCodeGenPassBuilder.cpp, llvm/test/CodeGen/RISCV/rvv vmv.v.v-peephole.mir

[RISCV] Port Vector Peephole to NewPM

Assisted-by: AI
DeltaFile
+67-45llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+39-0llvm/lib/Target/RISCV/RISCVVectorPeephole.h
+2-2llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+0-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+2-0llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
+112-517 files not shown
+120-5113 files

LLVM/project 552a3a4llvm/lib/Target/RISCV RISCVFoldMemOffset.cpp

Preserve MachineRegisterClassAnalysis
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+1-01 files

LLVM/project 3b9f0callvm/lib/Target/RISCV RISCV.h RISCVTargetMachine.cpp, llvm/test/CodeGen/RISCV fold-mem-offset.mir

[RISCV] Port Fold Memory Offset Pass to NewPM

Assisted-by: AI
DeltaFile
+37-16llvm/lib/Target/RISCV/RISCVFoldMemOffset.cpp
+36-0llvm/lib/Target/RISCV/RISCVFoldMemOffset.h
+0-3llvm/lib/Target/RISCV/RISCV.h
+2-1llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
+2-1llvm/lib/Target/RISCV/RISCVCodeGenPassBuilder.cpp
+1-0llvm/test/CodeGen/RISCV/fold-mem-offset.mir
+78-213 files not shown
+81-219 files

LLVM/project 0acf4fellvm/lib/Target/RISCV RISCVVectorPeephole.cpp

Preserve MachineRegisterClassAnalysis
DeltaFile
+1-0llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+1-01 files