LLVM/project 6394197 — bolt/test/runtime setup-race.cpp

by DmitriiMartynov via GitHub on ⎇
[BOLT] Fix test for systems where dl/pthread are not part of libc (#206944)

The bolt/test/runtime/setup-race.cpp test (including the original one)
crashes with a segfault on Ubuntu 20.04 (glibc 2.31) because the dlsym
symbol is not found.
According to the glibc 2.34 release notes, libpthread, libdl, libutil,
and libanl have been integrated into libc. For older glibc versions, it
is still necessary to link against libdl (for dlsym) and libpthread (for
pthread_* symbols).
DeltaFile
+1-1bolt/test/runtime/setup-race.cpp
+1-11 files

LLVM/project 1503caa — llvm/include/llvm/CodeGen/GlobalISel MIPatternMatch.h, llvm/lib/Target/AArch64/GISel AArch64InstructionSelector.cpp

by Matt Arsenault on ⎇
GlobalISel: Add m_PosZeroFP matcher and use it in AArch64 selector

Add an FP-constant predicate matcher m_PosZeroFP, mirroring the IR
PatternMatch helper, and use it in emitFPCompare instead of binding the
ConstantFP just to test for +0.0. NFC.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+17-0llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+2-4llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+19-42 files

LLVM/project 7423100 — clang/lib/Interpreter IncrementalExecutor.cpp, clang/test/Interpreter emulated-tls.cpp

by Emery Conrad via GitHub on ⎇
Reland "[ORC] Track __emutls_t definitions in IRMaterializationUnit" (#207161) (#209717)

Relands #207161 (the `IRMaterializationUnit::discard` fix for duplicated
`__emutls_t.<var>` symbols). History: #207161 merged, reverted in
#207775,
relanded in #208413, reverted again in #209260 (a day before the 23.x
cut).

### Why #208413 was reverted

clang-repl's JIT lowers `thread_local` to emulated TLS on every target
(`JITTargetMachineBuilder` forces `EmulatedTLS`), so JIT'd code always
references `__emutls_get_address`. #208413 only made that symbol
resolvable on
Darwin (`#ifdef __APPLE__` + `isOSBinFormatMachO()`), where it lives in
the
compiler-rt builtins static archive. The same gap exists on any host
that
links compiler-rt builtins instead of libgcc_s: the arm-toolchain CI hit

    [80 lines not shown]
DeltaFile
+50-0clang/lib/Interpreter/IncrementalExecutor.cpp
+28-0clang/test/Interpreter/emulated-tls.cpp
+1-0llvm/lib/ExecutionEngine/Orc/Layer.cpp
+79-03 files

LLVM/project ebd743c — llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine load-insert-store.ll

by hanbeom via GitHub on ⎇
[VectorCombine] Handle frees and synchronization in single element stores (#216562)

foldSingleElementStore only checked whether intervening instructions modified
the stored memory. Calls that may free or synchronize could therefore make
scalarization incorrect.

Fixes https://github.com/llvm/llvm-project/issues/216557
DeltaFile
+21-1llvm/test/Transforms/VectorCombine/load-insert-store.ll
+11-5llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+1-1llvm/test/Transforms/VectorCombine/SPIRV/load-insert-store.ll
+33-73 files

LLVM/project d37b02c — libc/benchmarks/gpu CMakeLists.txt, libc/cmake/modules LLVMLibCTestRules.cmake

by Pavel Labath via GitHub on ⎇
[libc] Drop .unit/.hermetic suffix from test support libraries (#216689)

This is not necessary now that we only build one kind of a test in a
given build configuration. This also makes it easier to convert to
something closer to how other libc libraries work.
DeltaFile
+33-53libc/test/UnitTest/CMakeLists.txt
+15-25libc/benchmarks/gpu/CMakeLists.txt
+9-23libc/cmake/modules/LLVMLibCTestRules.cmake
+1-7libc/test/src/time/CMakeLists.txt
+3-3libc/utils/MPFRWrapper/CMakeLists.txt
+2-2libc/utils/MPCWrapper/CMakeLists.txt
+63-1131 files not shown
+64-1147 files

LLVM/project a28c028 — llvm/lib/TargetParser Host.cpp

by Craig Topper via GitHub on ⎇
[RISCV] Query sched_getaffinity before hwprobe for -mcpu=native (#216886)

Heterogenous CPUs like the SpacemiT K3 have a different marchid/mimpid
on different cores. The previous code asked for the common marchid/mimpid
amongst all CPUs. This will return -1 since they don't match across all
CPUs.

This patch uses sched_getaffinity to get the CPUs the compiler is
running on. If the process has been restricted to either the X100 or
A100 cores, this will allow us to get the marchid/mimpid for just those
cores.
DeltaFile
+17-13llvm/lib/TargetParser/Host.cpp
+17-131 files

LLVM/project 5ff04f6 — mlir/lib/Conversion/ComplexToStandard ComplexToStandard.cpp

by Bryth via GitHub on ⎇
[mlir][ComplexToStandard] fix typo in complex sine comment (NFC) (#216738)
DeltaFile
+1-1mlir/lib/Conversion/ComplexToStandard/ComplexToStandard.cpp
+1-11 files

LLVM/project fd5d289 — llvm/lib/CodeGen MachineSink.cpp, llvm/test/CodeGen/X86 machinesink-coalesce-undef.mir

by Matt Arsenault via GitHub on ⎇
CodeGen: Fix machine sink critical edge crash on an undef register (#216870)
DeltaFile
+59-0llvm/test/CodeGen/X86/machinesink-coalesce-undef.mir
+1-2llvm/lib/CodeGen/MachineSink.cpp
+60-22 files

LLVM/project d5ff5c4 — llvm/lib/Target/RISCV RISCVVectorPeephole.cpp

by Matt Arsenault via GitHub on ⎇
RISCV: Fix using getVRegDef on a physical register (#216749)
DeltaFile
+2-0llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+2-01 files

LLVM/project ca1719f — clang/include/clang/Basic Specifiers.h, clang/lib/AST TypePrinter.cpp

by Arseniy Obolenskiy via GitHub on ⎇
[clang][SPIR-V] Remove CC_SpirFunction calling convention (#216252)

CC_SpirFunction is now redundant: CC_C already lowers to spir_func on
SPIR/SPIR-V targets, after
https://github.com/llvm/llvm-project/pull/210882
DeltaFile
+32-34clang/include/clang/Basic/Specifiers.h
+1-3clang/lib/Basic/Targets/SPIR.h
+0-3clang/lib/AST/TypePrinter.cpp
+0-2clang/lib/CodeGen/CGDebugInfo.cpp
+0-2clang/lib/CodeGen/CGCall.cpp
+1-1clang/lib/CodeGen/Targets/SPIR.cpp
+34-454 files not shown
+34-5010 files

LLVM/project 8915dd8 — llvm/include/llvm/CodeGen TargetPassConfig.h, llvm/lib/CodeGen TargetPassConfig.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+2-3llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
+0-4llvm/lib/CodeGen/TargetPassConfig.cpp
+0-4llvm/include/llvm/CodeGen/TargetPassConfig.h
+1-1llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+3-124 files

LLVM/project 8584442 — llvm/include/llvm/CodeGen TargetPassConfig.h, llvm/include/llvm/CodeGen/GlobalISel IRTranslator.h

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+265-207llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+46-13llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
+2-3llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
+0-4llvm/lib/CodeGen/TargetPassConfig.cpp
+0-4llvm/include/llvm/CodeGen/TargetPassConfig.h
+3-0llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
+316-23115 files not shown
+331-24521 files

LLVM/project 4b1a5d5 — llvm/include/llvm/CodeGen TargetPassConfig.h, llvm/lib/CodeGen TargetPassConfig.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+2-3llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
+0-4llvm/lib/CodeGen/TargetPassConfig.cpp
+0-4llvm/include/llvm/CodeGen/TargetPassConfig.h
+1-1llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+3-124 files

LLVM/project f3bc580 — clang/lib/AST/ByteCode Pointer.h InterpBuiltin.cpp

by Timm Baeder via GitHub on ⎇
[clang][bytecode] Add `Pointer::getRootExpr()` (#216706)

Similarly to `getRootVarDecl()`, returns the expression of the base of
the pointer, if there is such an expression.
DeltaFile
+5-7clang/lib/AST/ByteCode/Interp.h
+4-4clang/lib/AST/ByteCode/Interp.cpp
+6-0clang/lib/AST/ByteCode/Pointer.cpp
+2-2clang/lib/AST/ByteCode/InterpBuiltin.cpp
+1-0clang/lib/AST/ByteCode/Pointer.h
+18-135 files

LLVM/project 5eeda72 — llvm/lib/Target/RISCV RISCVInstrInfoXCV.td RISCVInstrInfoXAndes.td

by Craig Topper via GitHub on ⎇
[RISCV] Use PatLeaf to simplify XAndes and XCV select patterns. NFC (#216839)
DeltaFile
+14-15llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
+6-5llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
+20-202 files

LLVM/project fcce921 — clang/lib/AST/ByteCode Pointer.cpp, clang/test/AST/ByteCode cxx23.cpp

by Timm Baeder via GitHub on ⎇
[clang][bytecode] Check for invalid RecordDecls in Pointer::toAPValue() (#216537)

We can't pass forward declarations to ASTContext::getRecordLayout().
DeltaFile
+21-8clang/lib/AST/ByteCode/Pointer.cpp
+22-0clang/test/AST/ByteCode/cxx23.cpp
+43-82 files

LLVM/project 8488a83 — llvm/docs LFI.md, llvm/lib/MC MCELFStreamer.cpp MCLFI.cpp

by Zachary Yedidia via GitHub on ⎇
[LFI][X86] Enable bundling for the LFI target (#214111)

This enables 32-byte bundling for the LFI x86-64 target, and uses bundle
grouping for existing rewrites where appropriate.
DeltaFile
+24-0llvm/docs/LFI.md
+10-0llvm/lib/MC/MCLFI.cpp
+7-0llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+5-0llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
+3-1llvm/test/MC/X86/LFI/syscall.s
+2-0llvm/lib/MC/MCELFStreamer.cpp
+51-11 files not shown
+53-17 files

LLVM/project b1550b1 — llvm/lib/Transforms/InstCombine InstCombineCompares.cpp, llvm/test/Transforms/InstCombine icmp-samesign-canonicalize.ll icmp-samesign-known-bits.ll

by Kiva via GitHub on ⎇
[InstCombine] Use samesign constraints in unsigned known-bits folds (#209675)

Extracted from #209097 during review.

For a non-poison unsigned `icmp samesign`, both operands have the same
sign bit. Propagate a known sign bit between the temporary `KnownBits`
values in `foldICmpUsingKnownBits()` so the existing range folds can use
this constraint.

This enables endpoint folds in both signed halves of the integer range,
for example:

```
icmp samesign ugt i8 %x, 126 -> icmp eq i8 %x, 127
icmp samesign ult i8 %x, 127 -> icmp ne i8 %x, 127
icmp samesign ugt i8 %x, -2  -> icmp eq i8 %x, -1
```

-------------------------------

    [34 lines not shown]
DeltaFile
+51-0llvm/test/Transforms/InstCombine/icmp-samesign-known-bits.ll
+16-0llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+3-5llvm/test/Transforms/InstCombine/icmp-samesign-canonicalize.ll
+70-53 files

LLVM/project d7d525e — clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-intrinsics.c

by Jiahao Guo via GitHub on ⎇
[CIR][AArch64] Lower NEON Saturating substract intrinsics (#207189)

### Summary

part of : https://github.com/llvm/llvm-project/issues/185382

Lower intrinsics with out SISD in :
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#saturating-subtract

- Vector forms (vqsub{q}_{s,u}{8,16,32,64} - 16): added vqsub_v/vqsubq_v
to the existing vshl_v intrinsic-call block in
emitCommonNeonBuiltinExpr; signedness picks sqsub/uqsub via the
UnsignedAlts alternates.

Assisted by : Claude Opus4.8
DeltaFile
+0-234clang/test/CodeGen/AArch64/neon-intrinsics.c
+181-2clang/test/CodeGen/AArch64/neon/subtraction.c
+2-0clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+183-2363 files

LLVM/project fe17ff6 — llvm/lib/Target/NVPTX CMakeLists.txt, llvm/utils/gn/secondary/llvm/lib/Target/NVPTX BUILD.gn

by Shilei Tian via GitHub on ⎇
[NVPTX] Fix link error when building LLVM with dylib (#216898)
DeltaFile
+2-0llvm/utils/gn/secondary/llvm/lib/Target/NVPTX/BUILD.gn
+2-0llvm/lib/Target/NVPTX/CMakeLists.txt
+4-02 files

LLVM/project da9c024 — llvm/lib/Support FoldingSet.cpp

by Kazu Hirata via GitHub on ⎇
[Support] Remove duplicate comments in FoldingSet.cpp (NFC) (#216833)

This patch removes duplicate comments in FoldingSet.cpp.
Corresponding declarations are already documented in FoldingSet.h.

Note that LLVM Coding Standards state:

  Don't duplicate the documentation comment in the header file and in
  the implementation file. Put the documentation comments for public
  APIs into the header file.
DeltaFile
+0-27llvm/lib/Support/FoldingSet.cpp
+0-271 files

LLVM/project 703f0ae — llvm/include/llvm/ADT FoldingSet.h

by Kazu Hirata via GitHub on ⎇
[ADT] Remove CRTP from FoldingSet and ContextualFoldingSet (NFC) (#216830)

This patch simplifies FoldingSet by removing CRTP from FoldingSet and
ContextualFoldingSet.

Without this patch, FoldingSetImpl uses CRTP to get FoldingSetInfo, a
custom "vtable", from FoldingSet and ContextualFoldingSet.

With this patch, we put ContextStorage as the base class of
FoldingSetImpl.  FoldingSetImpl directly takes FoldingSetTrait as a
template parameter.  This allows us to:

- populate FoldingSetInfo for both FoldingSet and
  ContextualFoldingSet as a static constexpr variable.

- rely on the empty base optimization (EBO) on ContextStorage so that
  FoldingSet incurs no memory overhead.

- turn FoldingSet and ContextualFoldingSet into simple type aliases of

    [2 lines not shown]
DeltaFile
+59-104llvm/include/llvm/ADT/FoldingSet.h
+59-1041 files

LLVM/project 7299aaf — clang/docs UsersManual.md

by Reid Kleckner on ⎇
Fix text color in dark mode
DeltaFile
+1-1clang/docs/UsersManual.md
+1-11 files

LLVM/project 2aa7480 — clang/docs conf.py, clang/docs/_static custom.css

by Reid Kleckner on ⎇
[docs] Restore project-specific Furo CSS
DeltaFile
+0-140utils/docs/llvm_sphinx/_static/furo-common.css
+71-0llvm/docs/_static/custom.css
+60-0clang/docs/_static/custom.css
+8-0utils/docs/llvm_sphinx/__init__.py
+2-1llvm/docs/conf.py
+3-0clang/docs/conf.py
+144-1414 files not shown
+147-14210 files

LLVM/project 9089be3 — flang/include/flang/Optimizer/CodeGen CodeGen.h CGPasses.td, flang/lib/Optimizer/CodeGen CodeGen.cpp

by Valentin Clement (バレンタイン クレメン) via GitHub on ⎇
[flang][cuda] Add support for custom descriptor allocator in codegen (#216881)

Simlar to https://github.com/llvm/llvm-project/pull/216841 but for
CodeGen pass usage.
DeltaFile
+49-29flang/lib/Optimizer/CodeGen/CodeGen.cpp
+6-1flang/include/flang/Optimizer/CodeGen/CGPasses.td
+6-0flang/include/flang/Optimizer/CodeGen/CodeGen.h
+5-0flang/test/Fir/CUDA/cuda-code-gen.mlir
+66-304 files

LLVM/project b84b33d — flang/include/flang/Optimizer/Transforms Passes.td, flang/include/flang/Optimizer/Transforms/CUDA CUFAllocationConversion.h

by Valentin Clement (バレンタイン クレメン) via GitHub on ⎇
[flang][cuda] Add option to emit different function name for alloc/free of descriptors (#216841)

This allow to call specialized functions instead of the upstream ones.
DeltaFile
+52-10flang/lib/Optimizer/Transforms/CUDA/CUFAllocationConversion.cpp
+12-0flang/include/flang/Optimizer/Transforms/Passes.td
+7-1flang/include/flang/Optimizer/Transforms/CUDA/CUFAllocationConversion.h
+7-0flang/test/Fir/CUDA/cuda-allocate.fir
+78-114 files

LLVM/project 7a12952 — llvm/include/llvm/Analysis BlockFrequencyInfoImpl.h, llvm/lib/Analysis BlockFrequencyInfoImpl.cpp

by Fangrui Song via GitHub on ⎇
[BFI] Solve irreducible SCCs instead of splitting their headers (#215170)

c5a3139ebd0d (2014) approximates irreducible control flow by modelling
an SCC as a loop with multiple headers, and
http://reviews.llvm.org/D10348 re-distributes the loop mass across those
headers in proportion to the backedge mass each one received -- one step
of a power iteration, from an assumed split.

Package the SCC with a single representative and solve it instead.
`solveIrreducibleMass` iterates the SCC's internal chain towards its
dominant eigenvector and reads the member masses, the exits and the
circulating mass off that, so the entries' relative frequencies come out
of the solve.  Power iteration rather than a relaxation of `f = e +
f*P`: the mass `e` entering the SCC is unknown here, so there is no
fixed point to relax towards, only a direction.  NumHeaders, the
per-header BackedgeMass, getHeaderIndex, the isHeader binary search and
adjustLoopHeaderMass go away with the split.

Relative error against an exact rational solve has improved.

    [29 lines not shown]
DeltaFile
+148-164llvm/include/llvm/Analysis/BlockFrequencyInfoImpl.h
+25-89llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
+19-19llvm/test/CodeGen/AArch64/late-taildup-computed-goto.ll
+22-14llvm/test/CodeGen/X86/pr38795.ll
+26-1llvm/test/Analysis/BlockFrequencyInfo/irreducible_pgo.ll
+13-13llvm/test/Analysis/BlockFrequencyInfo/irreducible.ll
+253-3005 files not shown
+275-32011 files

LLVM/project 763aec0 — lldb/source/Host/common NativeProcessProtocol.cpp, lldb/source/Plugins/Process/elf-core ProcessElfCore.cpp

by satyanarayana reddy janga via GitHub on ⎇
[lldb] Adopt ProcessAddress in the read memory APIs (NFC) (#214088)

Relevant RFC:
https://discourse.llvm.org/t/rfc-address-spaces-support-in-lldb/91222/

Previous PR  #206370  adding the AddressSpace definitions. 


- switches the read memory virtuals from lldb::addr_t to const
ProcessAddress & and updates every override. No behavior change
expected.
 

**Test Plan**
- Depending on the buildbots for all other platforms.
DeltaFile
+10-7lldb/unittests/Target/MemoryTest.cpp
+6-4lldb/source/Target/ProcessTrace.cpp
+6-4lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
+6-4lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
+6-4lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
+6-4lldb/source/Host/common/NativeProcessProtocol.cpp
+40-2742 files not shown
+143-10748 files

LLVM/project 23b24af — llvm/lib/Target/WebAssembly WebAssemblyInstrSIMD.td, llvm/test/CodeGen/WebAssembly f16-intrinsics.ll

by Anutosh Bhat via GitHub on ⎇
[WebAssembly] Add v8f16 select instruction patterns (#213280)

I see the following 

```
 anutosh491 at Anutoshs-MacBook-Air llvm-project % cat /private/tmp/wasm-f16-select.ll
define <8 x half> @select_v8f16(i1 %cond, <8 x half> %a, <8 x half> %b) {
  %result = select i1 %cond, <8 x half> %a, <8 x half> %b
  ret <8 x half> %result
}
```
```

 anutosh491 at Anutoshs-MacBook-Air llvm-project % build-assert/bin/llc \             
  -mtriple=wasm32-unknown-unknown \
  -mattr=+simd128,+fp16 \
  -o /dev/null \
  /private/tmp/wasm-f16-select.ll
LLVM ERROR: Cannot select: t8: v8f16 = select t12, t4, t6

    [33 lines not shown]
DeltaFile
+33-0llvm/test/CodeGen/WebAssembly/f16-intrinsics.ll
+2-2llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+35-22 files

LLVM/project 0207706 — orc-rt/include/orc-rt NativeDylibManager.h

by KAWASHIMA Takahiro via GitHub on ⎇
[orc-rt] Add missing `#include <optional>` (#216894)
DeltaFile
+2-0orc-rt/include/orc-rt/NativeDylibManager.h
+2-01 files