[MLIR][CMake] Extend MLIRIR PCH reuse to transitive dependants
llvm_update_pch() only offers a PCH to targets that name the defining
library as a *direct* dependency, because across LLVM subprojects a
transitively reused PCH drags in unrelated headers and causes name
collisions. Within MLIR that concern is much weaker: mlir/IR/pch.h holds
MLIR core headers that essentially every MLIR library includes anyway.
Add mlir_reuse_ir_pch(), which offers MLIRIR's PCH to any target that
actually reaches MLIRIR through its link graph. The reachability check
matters: a PCH containing MLIR IR headers emits out-of-line symbols that
only libMLIRIR provides, so handing it to a Support-only target such as
tblgen-lsp-server breaks the link.
The helper is called from add_mlir_library() and add_mlir_tool(), and
again from mlir_target_link_libraries(), where most tests, unittests and
libMLIR.so-avoiding libraries actually attach their MLIR dependencies. It
is idempotent and skips targets that define their own PCH, that opt out
with DISABLE_PCH_REUSE, that override RTTI/EH, or that contain C/ObjC
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[AMDGPU] Generalize MFMA VGPR->AGPR opcode mapping (NFC) (#213274)
Move the VGPR/AGPR pairing out of MFMATable into a generalized
AGPRFormTable class and rename getMFMASrcCVDstAGPROp to getAGPRFormOp.
MFMATable inherits AGPRFormTable, so the instantiation sites and the
generated table are unchanged.
Other instruction families with paired VGPR/AGPR pseudos, such as DS,
can now be tagged with AGPRFormTable.
Related to #168983
clang: Store vendor GPU kinds in OffloadArch instead of re-listing GPUs (#213362)
OffloadArch was a flat enum that hand-duplicated every AMDGPU and NVPTX
target, plus a few edge cases. This was yet another place that needed
updating every time a new target is added, which should now be avoided.
Replace with a tagged union-like scheme.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[MLIR][CMake] Add PCH for MLIRIR
Add a precompiled header for MLIRIR, following the infrastructure added in
llvm#176420 and the per-component PCHs for llvm/IR (llvm#183303),
llvm/CodeGen (llvm#183346) and clang/AST (llvm#183358).
The header list was selected with the same methodology: compile all 1173
CUs under mlir/lib with -ftime-trace, rank mlir headers by the time spent
parsing them (including transitively included headers), then greedily pick
the header with the largest marginal coverage until the marginal gain
falls off. Candidates were restricted to headers already reachable from
MLIRIR's own sources, so the PCH does not invert the library layering.
Over the mlir/lib CUs, the selected set covers 1227s of 3674s total
frontend time (33%). On a Release+assertions build of mlir-opt
(Apple M-series, -j16), clean build wall time goes from 468.3s to 440.8s
(-5.9%); 715 of 1536 MLIR objects reuse the PCH.
mlir/lib/CMakeLists.txt gains an explicit add_subdirectory(IR) before the
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[RISCV] Fix ISCVISAInfo::computeDefaultABI() result for xcheriot (#212129)
XCheriot was not considered in this function, so RV32E+XCheriot
defaulted
to ilp32e instead of cheriot when no -target-abi was given.
Since this function does not have unit test coverage, this adds new
tests
for the ABI inference functions: RISCVISAInfo::computeDefaultABI() and
RISCVABI::computeTargetABI.
This change was created with the help of AI tools
[X86AsmBackend] Define reset() hook (#213409)
Noticed when reviewing #175830: MCObjectStreamer::reset frees the
fragments PendingBA and PrevInstPosition point into, but X86AsmBackend
keeps them. Define the hook.
clang: Replace Is*OffloadArch free functions with OffloadArch methods
Drop the IsNVIDIAOffloadArch/IsAMDOffloadArch/IsIntel*OffloadArch free
functions in favor of the OffloadArch member predicate functions.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
clang: Store vendor GPU kinds in OffloadArch instead of re-listing GPUs
OffloadArch was a flat enum that hand-duplicated every AMDGPU and NVPTX
targets, plus a few edge cases. This was yet another place that needed
updating every time a new target is added, which should now be avoided.
Replace with a tagged union-like scheme.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[lldb][test] Skip the JSON symbol file test on WebAssembly (#213407)
A JSON symbol file requires the UUID of the module it describes, and a
WebAssembly module carries no UUID.
Add option to format a whole file using git-clang-format (#204336)
Today, git-clang-format will only format lines which have been modified.
However, in some cases, that's not sufficient to get a "clean" file
which would be unmodified by running `clang-format` manually.
I've got a minimal repro using the default clang-format rules. Setup a
new git repository and create a commit with an empty file:
```
mkdir /tmp/bla
cd /tmp/bla
git init
touch t.cpp
git add t.cpp
git commit -m "V1"
```
Add a line to that file containing a comment:
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[lldb] Bound a WebAssembly backtrace by the target's maximum depth (#213397)
Only UnwindLLDB honored target.process.thread.max-backtrace-depth, so
UnwindWasm reported every frame the stub sent and a stack that recursed
without end was walked to its end.
Bound the frame count by the depth on every query rather than dropping
the frames that exceed it. A Wasm call stack arrives whole on the first
query, so a depth lowered after that has to still apply, which is when a
user reaches for it. The synthetic call frame addresses stay derived
from the whole stack, so the order of the frames does not depend on the
depth.
[X86][APX] Fix per-function V3 unwind for EGPR functions on Windows x64 (#212924)
A function that saves a callee-saved EGPR (R16-R31) cannot be encoded with V1/V2 unwind info, so it must use V3 even when the module default stays on V1/V2 (e.g. an APX clone created by auto-dispatch alongside a baseline generic clone). The previous code rejected such functions with a recoverable backend diagnostic ("EGPR (R16-R31) requires V3 unwind info on Windows x64") instead of emitting valid V3 unwind info.
Introduce a single shared predicate, requiresWinX64UnwindV3(MF), that returns true when the whole module is in V3 mode, or when the function needs an unwind table and may use EGPR. It is consumed by X86FrameLowering (SEH prolog/epilog layout), the X86WinEHUnwindV2 pass (which skips such functions), and the X86WinEHUnwindV3 pass (which stamps a per-function .seh_unwindversion 3 on every WinEH frame -- the entry block and each funclet). Also widen the SEH_UnwindVersion pseudo operand from i1imm to i8imm since it holds 1, 2 or 3.
Revert "[VPlan] Remove redundant x && (y && x) -> x && y combine (#213219)" (#213405)
This reverts commit 8db13de265a5f12d49147930da6d16a3ad7b40e3.
Logical ands block poison, and commuting the operands doesn't preserve
it