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[clang][test] Use __INTPTR_TYPE__ in ast-dump-APValue-addrlabeldiff test

It's otherwise broken on 32 bit builders:
https://lab.llvm.org/buildbot/#/builders/154/builds/25707

Also set the triple to i686 so we can test this on 32 bit targets.

[clang][ExprConstant] Reject integral casts of addr-label-diffs... (#171437)

... if the result is narrower than 32 bits.

See the discussion in https://github.com/llvm/llvm-project/issues/136135

address comments

[AMDGPU] Make SIShrinkInstructions pass return valid changed state (#168833)

The SIShrinkInstructions run() method currently returns "false"
unconditionally. This change makes it return the actual changed state.

[lldb/cmake] create staging directory for headers (#173427)

copy_command can either become `cmake -E copy`, which handles target
directory creation automatically, or `unifdef >` which fails without
explicitly created directory and consequently so does
version-header-fix.py later on.

[clang-tidy] Remove `allow-long-titles` option in doc8 config (#173519)

There is a bug in `doc8` where `allow-long-titles` option incorrectly
skipping non-title lines. So we have to disable it before they solve the
problem and make a new release.

[mlir] Emit an error when dense i1 array values are not `true` or `false` (#173533)

Fixes #173373.

MIPSr6: Set SETCC CondCode not supported by hardware to Expand (#173541)

With the current custom match rules, we may generate code like
```
  cmp.ueq.s $f0, $f12, $f14
  mfc1 $1, $f0
  not $1, $1
  mtc1 $1, $f0
  sel.s $f0, $f14, $f12
  jrc $ra
```
With Expand, we can get:
```
  cmp.ueq.s $f0, $f12, $f14
  sel.s $f0, $f12, $f14
  jrc $ra
```

[libc++] Implement P1789R3: Library Support for Expansion Statements (#167184)

[P1789R3](https://isocpp.org/files/papers/P1789R3.pdf) was accepted for
C++26 through LWG motion 14 at the 2025 Kona meeting. This patch
implements it, along with tests and documentation changes.

Closes #167268

---------

Co-authored-by: Tsche <che at pydong.org>

[PowerPC] Check isPhysical() before converting Register to MCRegister. NFC (#173531)

comments

[cmake] Simplify LLVM_ON_WIN32 logic (#173525)

This is just a vestige of an old llvm-config.h configuration macro that
was removed long ago. LLVM_ON_UNIX remains, but its main purpose is to
enable targetting bare metal through -DCMAKE_SYSTEM_NAME=Generic (see
1422f1bf2b1).

comments

[VPlan] Support truncated IVs in getSCEVExprForVPValue. (NFCI)

Handle truncated inductions in getSCEVExprForVPValue. This means we are
able to compute SCEV expressions for more inductions used in the
VPlan-based cost model, which should produce costs matching the legacy
cost model.

comments

remove undefs

remove undefs

check standalone

check standalone

[SLP]Enable float point math ops as copyables elements.

Patch enables support for float point math operations as base
instructions for copyable elements. It also fixes some scheduling
issues, found during testing

Reviewers: hiraditya, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/169857

Recommit after revert in 9008922707915a6632fb74ed301bce11d8775e2a

tmp commit

simple test working

draft: do not erase IR, just replace uses

[mlir][acc] Add ACCIfClauseLowering pass (#173573)

This pass lowers OpenACC compute constructs with `if` clauses into
`scf.if` with separate device and host paths.

Before:
```
  %d = acc.copyin varPtr(%a : memref<10xf32>) -> memref<10xf32>
  acc.parallel dataOperands(%d) if(%cond) {
    acc.loop control(%i : i32) = (%c0 : i32) to (%c10 : i32) step (%c1 :
i32) {
      // loop body
      acc.yield
    }
    acc.yield
  }
  acc.copyout accPtr(%d) to varPtr(%a)
```


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[CI] Finish Python Version TODOs

There were a couple TODOs in .ci related to Python typing changes after
v3.10. Now that Windows is python version matched to Linux at Python
3.12, we do not need to keep using the old syntax.

[PassManager] Use ListSeparator. NFC (#173462)

Change-Id: I40fa748d2c188171caccff7cb418c6be74c22fb8

[SLP]Check if the value has uselist before asking for uses

Need to check if the value has uselist before asking for uses to fix
a compiler crash

Fixes #173569

[NFC][AMDGPU] Improve the alignment of some TableGen code (#173524)

[mlir][acc] Add ACCSpecializeForDevice and ACCSpecializeForHost passe… (#173527)

[mlir][acc] Add ACCSpecializeForDevice and ACCSpecializeForHost passes

Add two new transformation passes for specializing OpenACC IR for
different execution contexts:

ACCSpecializeForDevice:
- Strips OpenACC constructs that are invalid in device code
- Replaces data entry ops with their var operands
- Unwraps regions from compute/data constructs
- Erases runtime operations (init, shutdown, wait, etc.)

This pass is applicable in two contexts:
1. Functions marked with `acc.specialized_routine` attribute, where the
entire function body is device code
2. Non-specialized functions, where patterns are applied only to `acc`
operations nested inside compute constructs (parallel, serial, kernels),
not to the constructs themselves

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[libc++] Implement LWG3476: Remove incorrect decay-copy in std::async and add QoI static_assert improvements (#173363)

Fixes https://github.com/llvm/llvm-project/issues/104307

This patch implements LWG3476 by removing the incorrect decay-copy in
std::async. The decay-copy was being applied twice, once explicitly via
_LIBCPP_AUTO_CAST and once in __async_func's tuple constructor.
(https://github.com/llvm/llvm-project/issues/143828)

It also adds static_assert mandates to std::thread and std::async (which
were already implicitly enforced) and expands test coverage.

[AArch64] Consider MOVaddr* as cheap if fuse-adrp-add

These pseudo-instructions usually translate into a pair of adrp+add and
have a single cycle latency on some micro-architectures.

[AVR] Set mayLoad/mayStore flags of some load/store instructions (#172986)

fixes https://github.com/llvm/llvm-project/issues/156782