LLVM/project fa6280e — llvm/lib/Target/Hexagon HexagonQFPOptimizer.cpp

Hexagon: Remove dead kill flag maintenance in HexagonQFPOptimizer

The operands are virtual registers, which can no longer carry kill
flags.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+9-28llvm/lib/Target/Hexagon/HexagonQFPOptimizer.cpp
+9-281 files

LLVM/project 8e8d827 — llvm/lib/Target/RISCV RISCVVectorPeephole.cpp, llvm/test/CodeGen/RISCV/rvv vmand-to-masked-compare.mir vmerge-peephole.mir

RISCV: Fix ensureDominates crashes on operands without a vreg def (#241034)

ensureDominates used an unchecked getVRegDef on every register
operand. This crashed on physical register uses or undef vregs. Also
fix dropping an incoming undef flag which would fail the verifier.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+49-0llvm/test/CodeGen/RISCV/rvv/vmerge-peephole.mir
+23-0llvm/test/CodeGen/RISCV/rvv/vmand-to-masked-compare.mir
+8-1llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+80-13 files

LLVM/project d5cbc17 — clang/include/clang/AST TypeBase.h, clang/include/clang/Basic Attr.td AttrDocs.td

Revert "[RISCV][clang] Support XSfmm ABI attributes (#206260)" (#241096)

This reverts commit 09dcbfb936c629a1285fb04fff9974456f041804. Revert for
now and investigate why compile time increase.
DeltaFile
+0-146clang/test/Sema/sifive-xsfmm-func-attr.c
+0-105clang/lib/Sema/SemaRISCV.cpp
+7-98clang/include/clang/AST/TypeBase.h
+0-102clang/lib/Sema/SemaType.cpp
+0-67clang/include/clang/Basic/AttrDocs.td
+0-35clang/include/clang/Basic/Attr.td
+7-55319 files not shown
+9-75125 files

LLVM/project 22c2948 — llvm/lib/Transforms/IPO Attributor.cpp

Attributor: Decide which instructions access memory in the opcode switch

initializeInformationCache already switches over the opcode of every
instruction, and then called mayReadOrWriteMemory out of line for each
one. Decide in the switch instead, where only calls need to check their
memory effects.

Instruction counts (callgrind) with other pending attributor-light
changes applied: attributor-light sqlite3 -0.79%, kimwitu++ k -0.32%,
SPASS cnf -0.31%, consumer-typeset z08 -8.59%; the full attributor
-0.02% to -0.08%.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+22-7llvm/lib/Transforms/IPO/Attributor.cpp
+22-71 files

LLVM/project 3731f41 — clang/lib/Driver/ToolChains Linux.cpp, clang/test/Driver linux-ld.c

[Clang][Driver][MIPS] Fix musl dynamic linker path (#240826)

Clang's Linux driver selects an incorrect dynamic linker for several
MIPS musl configurations.

- select the correct musl dynamic linker for MIPS targets
- add driver tests

Closes: #240798

Signed-off-by: Pepper Gray <hello at peppergray.xyz>
DeltaFile
+44-0clang/test/Driver/linux-ld.c
+23-0clang/lib/Driver/ToolChains/Linux.cpp
+67-02 files

LLVM/project d5486a2 — llvm/include/llvm/Transforms/IPO Attributor.h, llvm/lib/Transforms/IPO Attributor.cpp

Attributor: Make IRPosition::verify inline without expensive checks (#241087)

IRPosition::verify only checks anything with EXPENSIVE_CHECKS, but
every IRPosition constructor still called it out of line. This
prevented keeping the position in registers plus the cost of the call.

Instruction counts (callgrind) over 68 llvm-test-suite TUs, with other
pending attributor-light changes applied, median:
attributor-light -0.71% (-0.45%), attributor-light-cgscc -0.31%
(-0.38%), attributor -0.35% (-0.45%).

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+2-2llvm/lib/Transforms/IPO/Attributor.cpp
+4-0llvm/include/llvm/Transforms/IPO/Attributor.h
+6-22 files

LLVM/project 750a60b — llvm/include/llvm/IR RuntimeLibcalls.td, llvm/test/Transforms/Util/DeclareRuntimeLibcalls divmod.ll

RuntimeLibcalls: Annotate divrem libcall remainder out arguments (#240731)

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+16-5llvm/include/llvm/IR/RuntimeLibcalls.td
+3-2llvm/test/Transforms/Util/DeclareRuntimeLibcalls/divmod.ll
+19-72 files

LLVM/project 8461e2a — lldb/include/lldb/Core Module.h, lldb/include/lldb/Symbol ObjectFile.h

[lldb] Don't cache symtabs for memory modules w/ corefile (#237050)

In https://github.com/llvm/llvm-project/pull/229305 I added a new
setting, `symbols.enable-lldb-index-cache-memory-modules` which creates
a DataFileCache symtab file for memory-read modules. Reading the symbol
table out of memory is a serious performance issue, and caching those
tables on the debug host is worth doing by default.

This is not the correct tradeoff if we are doing corefile debugging,
where reading memory is cheap. In that case we need to ignore the
`symbols.enable-lldb-index-cache-memory-modules` setting and not create
the symtabs, unless the user has set
`symbols.enable-lldb-index-cache` themselves.

This patchset is a little tricky because the layers where we can make
this judgement (DynamicLoader or Process) is pretty far away from the
place where we create the Symtab, `ObjectFile::GetSymtab` and there is
another scenario I want to override the default for in the future that
is only knowable to the DynamicLoader (if the DynamicLoader believes ALL

    [28 lines not shown]
DeltaFile
+110-0lldb/test/API/functionalities/module_cache/corefile_memory_module/TestModuleCacheCorefileMemoryModule.py
+24-7lldb/include/lldb/Core/Module.h
+17-2lldb/source/Symbol/Symtab.cpp
+19-0lldb/test/API/functionalities/module_cache/corefile_memory_module/main.cpp
+14-0lldb/include/lldb/Symbol/ObjectFile.h
+9-4lldb/source/Core/Module.cpp
+193-134 files not shown
+209-1810 files

LLVM/project 7fcc520 — llvm/include/llvm/Analysis VectorUtils.h, llvm/lib/Analysis VectorUtils.cpp

[VectorUtils] Preserve cache-hint metadata
DeltaFile
+84-0llvm/unittests/Analysis/VectorUtilsTest.cpp
+53-0llvm/lib/Analysis/VectorUtils.cpp
+9-4llvm/test/Transforms/SLPVectorizer/X86/cache-hint.ll
+9-4llvm/test/Transforms/LoadStoreVectorizer/NVPTX/cache-hint.ll
+5-0llvm/include/llvm/Analysis/VectorUtils.h
+160-85 files

LLVM/project 9217344 — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-4-regallocfast-fold' into users/void/asm-rm-5-prefer-reg
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project 9f45bd2 — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-3-direct-mem-output-error' into users/void/asm-rm-4-regallocfast-fold
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project 084b057 — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-2f-peephole-asm-load-fold' into users/void/asm-rm-3-direct-mem-output-error
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project ca8bcc9 — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-2e-fold-asm-memoperands' into users/void/asm-rm-2f-peephole-asm-load-fold
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project 9df30c3 — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-2d-prefer-spilling-foldable' into users/void/asm-rm-2e-fold-asm-memoperands
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project 3444b53 — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-2c-fold-subreg-offset' into users/void/asm-rm-2d-prefer-spilling-foldable
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project 2e6295e — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-2b-fold-all-reg-operands' into users/void/asm-rm-2c-fold-subreg-offset
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project c8c28ac — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/asm-rm-2-fold-tied-operands' into users/void/asm-rm-2b-fold-all-reg-operands
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project 504a79b — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/mir-inline-asm-func-kind' into users/void/asm-rm-2-fold-tied-operands
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project b8dcdda — llvm/include/llvm/IR InlineAsm.h

Merge branch 'users/void/mir-inline-asm-operand-count' into users/void/mir-inline-asm-func-kind
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project cd7990e — llvm/lib/Target/ARM ARMRegisterInfo.td

ARM: Mark GPRsp as not allocatable (#240935)

This only contains SP which is always reserved.
DeltaFile
+1-0llvm/lib/Target/ARM/ARMRegisterInfo.td
+1-01 files

LLVM/project af26319 — llvm/include/llvm/IR InlineAsm.h

Use maskTrailingOnes() for the largest operand count

There's nothing in <bit> that builds a mask, but maskTrailingOnes() does,
and it's what Bitfield uses for the field's own mask. Unlike a shift or a
rotate, it's also right for a field as wide as an unsigned.

Assisted-by: Claude Opus 5.5
DeltaFile
+2-1llvm/include/llvm/IR/InlineAsm.h
+2-11 files

LLVM/project ddea95c — llvm/include/llvm/Analysis VectorUtils.h, llvm/lib/Analysis VectorUtils.cpp

[VectorUtils] Preserve cache-hint metadata
DeltaFile
+84-0llvm/unittests/Analysis/VectorUtilsTest.cpp
+54-0llvm/lib/Analysis/VectorUtils.cpp
+9-4llvm/test/Transforms/SLPVectorizer/X86/cache-hint.ll
+9-4llvm/test/Transforms/LoadStoreVectorizer/NVPTX/cache-hint.ll
+5-0llvm/include/llvm/Analysis/VectorUtils.h
+161-85 files

LLVM/project 18d58e0 — llvm/test/Transforms/LoadStoreVectorizer/NVPTX cache-hint.ll, llvm/test/Transforms/SLPVectorizer/X86 cache-hint.ll

[VectorUtils] Add cache-hint tests
DeltaFile
+297-0llvm/test/Transforms/LoadStoreVectorizer/NVPTX/cache-hint.ll
+229-0llvm/test/Transforms/SLPVectorizer/X86/cache-hint.ll
+526-02 files

LLVM/project c8b08b0 — clang/docs ReleaseNotes.md, clang/lib/CodeGen CGClass.cpp

[Clang][CodeGen] Fix crash in implicit assignment operators after a `noreturn` member copy (#240447)

Fixes #111612

When an implicit assignment operator copies a member or base through a
`noreturn` `operator=`, `EmitStmt` emits `unreachable` and clears the
insertion point. `AssignmentMemcpyizer` then batches the trivially
copyable members that follow into one memcpy and emits it directly, so
the field GEPs were built on a null block.

`FieldMemcpyizer::emitMemcpy` now drops the batch when there is no
insertion point, as `EmitStmt` does for any other unreachable statement.
The operator then ends with the call and `unreachable`, like a
hand-written one with the same statements.

AI Assisted!
DeltaFile
+18-0clang/test/CodeGenCXX/pod-member-memcpys.cpp
+6-0clang/lib/CodeGen/CGClass.cpp
+1-0clang/docs/ReleaseNotes.md
+25-03 files

LLVM/project 0e0fc06 — libcxx/test/std/algorithms/alg.sorting/alg.heap.operations heap_helpers.h, libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap is_heap_until.pass.cpp is_heap_until_comp.pass.cpp

[libc++] Mark LWG2166 as "Nothing To Do" (#236422)

LWG2166 formalised the binary heap layout such that `for 0 < i < N`,
`comp(a[(i-1)/2], a[i])` is `false`. libc++’s heap algorithms already
implement this layout, so this patch is NFC and mainly adding test
coverage for heap property.

Closes: https://github.com/llvm/llvm-project/issues/99969

---------

Co-authored-by: A. Jiang <de34 at live.cn>
DeltaFile
+27-0libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/heap_helpers.h
+14-0libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/ranges_is_heap_until.pass.cpp
+11-0libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/is_heap_until_comp.pass.cpp
+6-2libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/make.heap/make_heap.pass.cpp
+8-0libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/is.heap/is_heap_until.pass.cpp
+5-2libcxx/test/std/algorithms/alg.sorting/alg.heap.operations/make.heap/make_heap_comp.pass.cpp
+71-48 files not shown
+96-1114 files

LLVM/project 9f8de66 — llvm/test/Other opt-legacy-syntax-deprecation.ll, llvm/test/Transforms/LoopUnroll unroll-preserve-scev-lcssa.ll

[opt] Register only legacy-pinned pass names as options (#234529)

opt registers every legacy pass name as an option, but only names that
shouldPinPassToLegacyPM accepts can start the legacy pipeline. The other
206 of 600 still occupy option spellings; a library option with the same
spelling aborts opt at startup. Register only the pinned names.

```
Command                     Before                         After
opt -instcombine            "use -passes=" error           unknown argument
opt -arm-parallel-dsp -dce  runs both under the legacy PM  -dce is unknown
opt -codegenprepare         runs                           runs
opt -passes=instcombine     runs                           runs
```

Tests that ran an unpinned pass next to a pinned one now use -passes= or
pipe into a second opt.

LLM-aided
DeltaFile
+38-22llvm/tools/opt/optdriver.cpp
+22-22llvm/test/Transforms/StructurizeCFG/workarounds/needs-fr-ule.ll
+12-12llvm/test/Transforms/StructurizeCFG/interleaved-loop-order.ll
+9-9llvm/test/Transforms/StructurizeCFG/workarounds/needs-unified-loop-exits.ll
+2-7llvm/test/Transforms/LoopUnroll/unroll-preserve-scev-lcssa.ll
+7-2llvm/test/Other/opt-legacy-syntax-deprecation.ll
+90-7433 files not shown
+124-11139 files

LLVM/project 0431144 — llvm/include/llvm/Transforms/Utils LoopSimplify.h, llvm/lib/Transforms/Scalar LoopUnrollPass.cpp

[LoopSimplify] Don't separate nested loops on targets with branch divergence (#235627)

When a loop header has multiple backedges, LoopSimplify may call
`separateNestedLoop` to move some of them into a new inner loop. On
targets
with branch divergence, if those backedges are selected by a divergent
condition (e.g. a divergent `continue`), the new inner loop gets a
divergent
exit, and loop-carried values that were uniform (e.g. the loop counter)
can
become divergent. On AMDGPU this turns scalar values into VGPRs and adds
an
extra exec-mask loop level.

Skip `separateNestedLoop` when `TTI->hasBranchDivergence(F)` is true and
fall
back to `insertUniqueBackedgeBlock`. Degenerate header PHIs are now also
folded before inserting the unique backedge block, as
`separateNestedLoop`

    [14 lines not shown]
DeltaFile
+283-0llvm/test/Transforms/LoopSimplify/AMDGPU/separate-nested-loop-divergent.ll
+98-0llvm/test/Transforms/LoopSimplify/AMDGPU/separate-nested-loop-divergent-resimplify.ll
+46-21llvm/lib/Transforms/Utils/LoopSimplify.cpp
+5-1llvm/include/llvm/Transforms/Utils/LoopSimplify.h
+2-2llvm/lib/Transforms/Utils/LoopUnroll.cpp
+2-2llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp
+436-262 files not shown
+440-288 files

LLVM/project cd02324 — llvm/lib/Target/AMDGPU AMDGPUUniformIntrinsicCombine.cpp, llvm/test/CodeGen/AMDGPU amdgpu-simplify-uniform-waterfall.ll amdgpu-uniform-intrinsic-combine-cmp.ll

[AMDGPU] Fold icmp (readfirstlane X), X when X is uniform (#234262)
DeltaFile
+236-0llvm/test/CodeGen/AMDGPU/amdgpu-uniform-intrinsic-combine-cmp.ll
+31-1llvm/lib/Target/AMDGPU/AMDGPUUniformIntrinsicCombine.cpp
+2-4llvm/test/CodeGen/AMDGPU/amdgpu-simplify-uniform-waterfall.ll
+269-53 files

LLVM/project f7be3c7 — llvm/include/llvm/IR RuntimeLibcalls.td, llvm/test/Transforms/Util/DeclareRuntimeLibcalls codegen-opt-flags.ll

RuntimeLibcalls: Don't apply generic memory attributes to AEABI variants

__aeabi_memcpy, __aeabi_memmove and __aeabi_memset are implementations
of the generic memcpy, memmove and memset libcalls, but they do not
return the destination and __aeabi_memset takes its value and length
arguments in the opposite order. Don't give them the attributes of the
standard functions, which mark the destination as returned.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
DeltaFile
+9-3llvm/include/llvm/IR/RuntimeLibcalls.td
+6-0llvm/test/Transforms/Util/DeclareRuntimeLibcalls/codegen-opt-flags.ll
+15-32 files

LLVM/project 4903409 — llvm/include/llvm/IR RuntimeLibcalls.td, llvm/test/Transforms/Util/DeclareRuntimeLibcalls systemz.ll bsd.ll

RuntimeLibcalls: Add missing attributes to memory and allocator libcalls

Add the attributes inferLibFuncAttributes would give these functions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+74-26llvm/include/llvm/IR/RuntimeLibcalls.td
+49-35llvm/test/Transforms/Util/DeclareRuntimeLibcalls/ppc.ll
+46-36llvm/test/Transforms/Util/DeclareRuntimeLibcalls/aarch64.ll
+36-28llvm/test/Transforms/Util/DeclareRuntimeLibcalls/windows.ll
+27-21llvm/test/Transforms/Util/DeclareRuntimeLibcalls/bsd.ll
+18-14llvm/test/Transforms/Util/DeclareRuntimeLibcalls/systemz.ll
+250-16016 files not shown
+430-28722 files