LLVM/project 617ba83llvm/lib/Transforms/IPO GlobalOpt.cpp, llvm/test/Transforms/GlobalOpt global-opt-addrspace.ll

[GlobalOpt] Preserve Address Space when recreating GV (#171211)

Fix for GlobalOpt pass: preserve Address Space when recreating GV
This fix prevents dropping `addrspace(1)` in the following code snippet
(see modified LIT-test) for `@llvm.compiler.used`:

Before global-opt
```
@_ZM2C = internal addrspace(1) global %struct.FakeDeviceGlobal zeroinitializer, align 8
@_ZL1C = internal addrspace(1) global %struct.FakeDeviceGlobal zeroinitializer, align 8

@llvm.compiler.used = appending addrspace(1) global [2 x ptr addrspace(4)] [ptr addrspace(4) addrspacecast (ptr addrspace(1) @_ZM2C to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @_ZL1C to ptr addrspace(4))]
```

After global-opt
```
@_ZM2C = internal addrspace(1) global %struct.FakeDeviceGlobal zeroinitializer, align 8
@_ZL1C = internal addrspace(1) global %struct.FakeDeviceGlobal zeroinitializer, align 8


    [7 lines not shown]
DeltaFile
+4-3llvm/lib/Transforms/IPO/GlobalOpt.cpp
+2-2llvm/test/Transforms/GlobalOpt/global-opt-addrspace.ll
+6-52 files

LLVM/project a7aa852clang/lib/CIR/CodeGen CIRGenExprScalar.cpp, clang/test/CIR/CodeGen noexcept.cpp

[CIR] Upstream CXXNoexceptExpr (#171462)

Upstream the support for CXXNoexceptExpr
DeltaFile
+40-0clang/test/CIR/CodeGen/noexcept.cpp
+4-0clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+44-02 files

LLVM/project 36865a1lldb/test/API/tools/lldb-dap/module TestDAP_module.py

[lldb-dap] enable TestDAP_module on linux (#171584)

The issue was fixed in https://github.com/llvm/llvm-project/pull/163821
DeltaFile
+0-2lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
+0-21 files

LLVM/project f85494fclang/test/Driver print-supported-cpus-aarch64.c, clang/test/Driver/print-enabled-extensions aarch64-apple-m5.c

[AArch64] Define apple-m5/a19 CPUs. (#171187)

A19 and M5 have been released in fall 2025.
They add several features on top of M4/A18:
- MTE, CSSC, HBC
- SME2p1, SMEB16B16, SMEF16F16
- SPECRES2

This also bumps apple-latest to apple-m5.
DeltaFile
+71-0clang/test/Driver/print-enabled-extensions/aarch64-apple-m5.c
+41-1llvm/lib/Target/AArch64/AArch64Processors.td
+4-2llvm/unittests/TargetParser/TargetParserTest.cpp
+2-0clang/test/Misc/target-invalid-cpu-note/aarch64.c
+2-0clang/test/Driver/print-supported-cpus-aarch64.c
+1-0llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+121-31 files not shown
+122-37 files

LLVM/project b3d6a0bflang/lib/Lower OpenACC.cpp, flang/test/Lower/OpenACC acc-use-device-remapping.f90

review comments
DeltaFile
+11-10flang/test/Lower/OpenACC/acc-use-device-remapping.f90
+3-3flang/lib/Lower/OpenACC.cpp
+14-132 files

LLVM/project 570f6a7llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU promote-alloca-scoring.ll promote-alloca-negative-index.ll

AMDGPU/PromoteAlloca: Refactor into analysis / commit phases

This change is motivated by the overall goal of finding alternative ways
to promote allocas to VGPRs. The current solution is effectively limited
to allocas whose size matches a register class, and we can't keep adding
more register classes. We have some downstream work in this direction,
and I'm currently looking at cleaning that up to bring it upstream.

This refactor paves the way to adding a third way of promoting allocas,
on top of the existing alloca-to-vector and alloca-to-LDS. Much of the
analysis can be shared between the different promotion techniques.

Additionally, the idea behind splitting the pass into an analysis
phase and a commit phase is that it ought to allow us to more easily make
better "big picture" decision about which allocas to promote how in the
future.

commit-id:138f5985
DeltaFile
+347-302llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+34-30llvm/test/CodeGen/AMDGPU/promote-alloca-scoring.ll
+2-4llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
+383-3363 files

LLVM/project bfce025flang/lib/Lower/OpenMP Clauses.cpp ClauseProcessor.cpp, llvm/include/llvm/Frontend/OpenMP ClauseT.h

[flang][OpenMP] Store list of expressions in InitializerT (#170923)

The INITIALIZER clause holds a stylized expression that can be
intiantiated with different types. Currently, the InitializerT class
only holds one expression, which happens to correspond to the first type
in the DECLARE_REDUCTION type list.

Change InitializerT to hold a list of expressions instead, one for each
type. Keep the lowering code unchanged by picking the first expression
from the list.
DeltaFile
+13-11flang/lib/Lower/OpenMP/Clauses.cpp
+3-2flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+2-1llvm/include/llvm/Frontend/OpenMP/ClauseT.h
+18-143 files

LLVM/project 8f2c7cdllvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp, llvm/test/CodeGen/AMDGPU promote-alloca-scoring.ll promote-alloca-negative-index.ll

AMDGPU/PromoteAlloca: Refactor into analysis / commit phases

This change is motivated by the overall goal of finding alternative ways
to promote allocas to VGPRs. The current solution is effectively limited
to allocas whose size matches a register class, and we can't keep adding
more register classes. We have some downstream work in this direction,
and I'm currently looking at cleaning that up to bring it upstream.

This refactor paves the way to adding a third way of promoting allocas,
on top of the existing alloca-to-vector and alloca-to-LDS. Much of the
analysis can be shared between the different promotion techniques.

Additionally, the idea behind splitting the pass into an analysis
phase and a commit phase is that it ought to allow us to more easily make
better "big picture" decision about which allocas to promote how in the
future.

commit-id:138f5985
DeltaFile
+345-297llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+34-30llvm/test/CodeGen/AMDGPU/promote-alloca-scoring.ll
+2-4llvm/test/CodeGen/AMDGPU/promote-alloca-negative-index.ll
+381-3313 files

LLVM/project 2e6677aflang-rt CMakeLists.txt

Merge branch 'users/meinersbur/runtimes_flangrt-common' into users/meinersbur/flang_builtin-mods_3
DeltaFile
+0-4flang-rt/CMakeLists.txt
+0-41 files

LLVM/project 4c11225llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton_bug.ll OpExtInst_vector_promoton.ll

[Review] Fix the _bug test such that it passes if spirv-tools is not available.
DeltaFile
+4-3llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton_bug.ll
+2-2llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+6-52 files

LLVM/project b6cc5bbllvm/lib/Target/SPIRV SPIRVBuiltins.cpp, llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton.ll

[SPIRV] Promote scalar arguments to vector for OpExtInst
DeltaFile
+46-2llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+25-11llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+71-132 files

LLVM/project cc58394llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promotion.ll OpExtInst_vector_promoton.ll

[Review] promoton -> promotion in test name
DeltaFile
+179-0llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promotion.ll
+0-179llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+0-21llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton_bug.ll
+21-0llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promotion_bug.ll
+200-2004 files

LLVM/project a2b1bdallvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promotion.ll

[Review] missing .
DeltaFile
+2-2llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promotion.ll
+2-21 files

LLVM/project fc77377llvm/lib/Target/SPIRV SPIRVBuiltins.cpp

[Revew] getOpExtCallArguments->getBuiltinCallArguments
DeltaFile
+3-3llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+3-31 files

LLVM/project aa44e80llvm/lib/Target/SPIRV SPIRVBuiltins.cpp

[Review] Broadcast->Splat & Move code to helper
DeltaFile
+32-18llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+32-181 files

LLVM/project f256ad7llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton_bug.ll OpExtInst_vector_promoton.ll

[Review] for clarity, split the test case in two
DeltaFile
+20-0llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton_bug.ll
+1-15llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+21-152 files

LLVM/project 49b38fellvm/lib/Target/SPIRV SPIRVRegularizer.cpp, llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton.ll

[SPIRV] Remove the vector-scalar min/max/fmin/fmax IR rewriting
DeltaFile
+3-99llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
+84-1llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+87-1002 files

LLVM/project 0e1a925llvm/test/CodeGen/SPIRV/transcoding OpExtInst_vector_promoton.ll OpMin.ll

[NFC][SPIRV] Update OpMin test to show that the promotion to vector is broken
DeltaFile
+96-0llvm/test/CodeGen/SPIRV/transcoding/OpExtInst_vector_promoton.ll
+0-16llvm/test/CodeGen/SPIRV/transcoding/OpMin.ll
+96-162 files

LLVM/project a6b6514flang-rt CMakeLists.txt

Avoid whitespace-only change
DeltaFile
+0-1flang-rt/CMakeLists.txt
+0-11 files

LLVM/project b3db6e5llvm/include/llvm/Analysis TargetTransformInfo.h TargetTransformInfoImpl.h, llvm/include/llvm/CodeGen BasicTTIImpl.h

remove unused hook from target
DeltaFile
+5-12llvm/lib/Analysis/TargetTransformInfo.cpp
+0-11llvm/include/llvm/Analysis/TargetTransformInfo.h
+8-2llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+4-2llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
+0-4llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+0-4llvm/include/llvm/CodeGen/BasicTTIImpl.h
+17-356 files

LLVM/project 8445909lldb/include/lldb/Host Terminal.h, lldb/include/lldb/Host/common DiagnosticsRendering.h

[lldb] improve the heuristics for checking if a terminal supports Unicode (#171491)

DeltaFile
+18-1lldb/include/lldb/Host/common/DiagnosticsRendering.h
+16-0lldb/source/Host/common/Terminal.cpp
+12-0lldb/include/lldb/Host/Terminal.h
+5-6lldb/source/Host/common/DiagnosticsRendering.cpp
+1-1lldb/unittests/Host/common/DiagnosticsRenderingTest.cpp
+52-85 files

LLVM/project fb8a7c7libunwind CMakeLists.txt, libunwind/test CMakeLists.txt

[libunwind] Make sure libunwind test dependencies are installed before running tests (#171474)

This patch adds an installation step where we install libc++ in a fake
installation tree before testing libunwind. This is necessary because
some configurations (in particular "generic-merged") require libc++ to
be installed, since the libunwind tests are actually linking libc++.so
in which libc++abi.a and libunwind.a have been merged.

Without this, we were actually failing to find `libc++.so` to link
against and then linking against whatever system library we'd find in
the provided search directories. While this happens to work in the
current CI configuration, this breaks down when updating to newer build
tools.
DeltaFile
+16-13libunwind/test/CMakeLists.txt
+3-0libunwind/CMakeLists.txt
+19-132 files

LLVM/project 5160a05clang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenItaniumCXXABI.cpp CIRGenCXXABI.h

[CIR] Emit CatchParamOp in the catch region (#171169)

Emit structured CatchParamOp in the catch region

Issue https://github.com/llvm/llvm-project/issues/154992
DeltaFile
+91-0clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
+3-0clang/lib/CIR/CodeGen/CIRGenCXXABI.h
+2-1clang/lib/CIR/CodeGen/CIRGenException.cpp
+3-0clang/include/clang/CIR/MissingFeatures.h
+1-0clang/test/CIR/CodeGen/try-catch-tmp.cpp
+100-15 files

LLVM/project d4b194dflang-rt CMakeLists.txt, flang-rt/cmake/modules AddFlangRT.cmake

Avoid redundancies in flang-rt CMakeLists.txt
DeltaFile
+1-89flang-rt/CMakeLists.txt
+4-4flang-rt/cmake/modules/AddFlangRT.cmake
+1-1flang-rt/test/lit.site.cfg.py.in
+6-943 files

LLVM/project 2d65bdblldb/packages/Python/lldbsuite/test decorators.py, lldb/test/API/functionalities/breakpoint/jit_loader_rtdyld_elf TestJitBreakPoint.py Makefile

[lldb] convert jit-loader_rtdyld_elf.test to an API test (#170333)

This patch converts the `jit-loader_rtdyld_elf.test` test from a Shell
test to an API test.

This test is timing out in CI on Windows and the hang cannot be
reproduced at desk. Converting it to an API test would allow us to
instrument it better in order to trace the failure.
DeltaFile
+46-0lldb/test/API/functionalities/breakpoint/jit_loader_rtdyld_elf/TestJitBreakPoint.py
+0-22lldb/test/Shell/Breakpoint/jit-loader_rtdyld_elf.test
+13-0lldb/packages/Python/lldbsuite/test/decorators.py
+12-0lldb/test/API/functionalities/breakpoint/jit_loader_rtdyld_elf/Makefile
+2-0lldb/test/API/functionalities/breakpoint/jit_loader_rtdyld_elf/jitbp.cpp
+73-225 files

LLVM/project 4ff6d12cmake/Modules GetToolchainDirs.cmake, runtimes CMakeLists.txt

Backport runtimes files
DeltaFile
+292-11runtimes/CMakeLists.txt
+11-0cmake/Modules/GetToolchainDirs.cmake
+303-112 files

LLVM/project 11e457cllvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 bitcnt-big-integer.ll

[X86] Use vectorized i256 bit counts when we know the source originated from the vector unit (#171589)

Currently we only permit i256 CTTZ/CTLZ AVX512 lowering when the source
is loadable as GPR->FPU transition costs would outweigh the
vectorization benefit.

This patch checks for other cases where the source can avoid the GPR - a
mayFoldToVector helper checks for a bitcast originally from a vector
type, as well as constant values and the original mayFoldLoad check.

There will be other cases for the mayFoldToVector helper, but I've just
used this for CTTZ/CTLZ initially.
DeltaFile
+104-228llvm/test/CodeGen/X86/bitcnt-big-integer.ll
+10-1llvm/lib/Target/X86/X86ISelLowering.cpp
+114-2292 files

LLVM/project 9339601llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64] support `.arch_extension` for features that the CLI also accepts (#169999)

fixes https://github.com/llvm/llvm-project/issues/146866

The CLI and `.arch_extension` use a different list of features, and some
features that the CLI supports cannot currently be toggled using
`.arch_extension`. This PR fixes that, adding support for
`.arch_extension` for the following features:

- `dit`
- `brbe`
- `bti`
- `fcma`
- `jscvt`
- `pauth`
- `ssve`
- `wfxt`

The issue discusses that it is unfortunate that command line flag

    [7 lines not shown]
DeltaFile
+25-25llvm/test/MC/AArch64/armv8.3a-complex_missing.s
+33-0llvm/test/MC/AArch64/directive-arch_extension.s
+8-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-1llvm/lib/Target/AArch64/AArch64InstrInfo.td
+67-264 files

LLVM/project cc7a324cmake/Modules GetToolchainDirs.cmake, flang-rt/cmake/modules GetToolchainDirs.cmake

Move GetToolchainDirs.cmake
DeltaFile
+125-0cmake/Modules/GetToolchainDirs.cmake
+0-125flang-rt/cmake/modules/GetToolchainDirs.cmake
+125-1252 files

LLVM/project 360ea64llvm/lib/Target/LoongArch LoongArchInstrInfo.td, llvm/test/CodeGen/LoongArch trap.ll

Lower `trap` to `ud 0`
DeltaFile
+2-6llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+1-1llvm/test/CodeGen/LoongArch/trap.ll
+3-72 files