LLVM/project 1c7a3fd — mlir/lib/Target/LLVMIR ModuleTranslation.cpp, mlir/test/Target/LLVMIR llvmir.mlir

[MLIR][LLVM] Preserve high bits in work-group size metadata (#237303)

Treat the signed i32 elements of work-group size arrays as signed inputs
when constructing 32-bit `APInt` values. Preserve dimensions with the
high bit set without triggering the unsigned constructor assertion.

Cover high-bit dimensions in the LLVM IR export tests for both
`work_group_size_hint` and `reqd_work_group_size`.

Assisted-by: Codex / GPT-6
DeltaFile
+18-0mlir/test/Target/LLVMIR/llvmir.mlir
+5-4mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
+23-42 files

LLVM/project 6a69b3e — clang/lib/StaticAnalyzer/Checkers MallocChecker.cpp, clang/test/Analysis malloc-funny-funopen.c

[analyzer] MallocChecker: don't crash on funny funopen (#237447)

The method mayFreeAnyEscapedMemoryOrIsModeledExplicitly implemented a
heuristic for handling "funopen", but only checked that the call has at
least 4 arguments before accessing the fifth (index 4) one.

This off-by-one error could cause a crash in the theoretical case when a
system header had a nonstandard 4-argument function named "funopen". I'm
pretty sure that nobody encountered this in the wild since 2012 when it
was introduced. The bug was noticed by a Claude review of a PR that
touched nearby code; but this change is written by hand.

Reported-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+30-0clang/test/Analysis/malloc-funny-funopen.c
+1-1clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
+31-12 files

LLVM/project 53808b5 — llvm/lib/Target/AArch64 AArch64PrologueEpilogue.cpp AArch64InstrInfo.td, llvm/test/CodeGen/AArch64 seh-extended-spills.ll

[AArch64][Windows] Fixes for Q register spills in unwind. (#237826)

Make sure to check pairing, fix the pairing rule so it checks the
alignment correctly, and add support for unpaired spills.

(llvm/test/CodeGen/AArch64/preserve-all-large-csr.ll was affected by the
wrong alignment computation, once we started to check pairing.)

Fixes #236674
DeltaFile
+54-1llvm/test/CodeGen/AArch64/seh-extended-spills.ll
+33-17llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+20-10llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+2-0llvm/lib/Target/AArch64/AArch64PrologueEpilogue.cpp
+2-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+2-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+113-286 files

LLVM/project f405e7b — llvm/lib/Target/SPIRV SPIRVNonSemanticDebugHandler.h SPIRVNonSemanticDebugHandler.cpp, llvm/test/CodeGen/SPIRV/debug-info debug-scope-lexical-block-file.ll debug-lexical-block-discriminator.ll

[SPIRV] Emit DebugLexicalBlockDiscriminator for a DILexicalBlockFile (#238004)

Emit
[DebugLexicalBlockDiscriminator](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugLexicalBlockDiscriminator)
for a DILexicalBlockFile. 

Prior to this PR, when a DILexicalBlockFile was used as a scope, it was
replaced by the nearest parent that is not a block-file. That emitted
valid SPIR-V, but the information in the DILexicalBlockFile was lost.

That information can be encoded in a DebugLexicalBlockDiscriminator. The
NSDI spec has a problem/limitation that we have to workaround.
DebugFunction and DebugLexicalBlock are described as [lexical
scopes](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#LexicalScope),
but DebugLexicalBlockDiscriminator is not, so it cannot be a DebugScope
operand. DebugLine has no discriminator operand either, so there is no
valid way to attach a discriminator to code!

This PR follows the SPIRV-LLVM Translator. The discriminator instruction

    [8 lines not shown]
DeltaFile
+67-0llvm/test/CodeGen/SPIRV/debug-info/debug-lexical-block-discriminator.ll
+46-14llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
+17-6llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
+7-5llvm/test/CodeGen/SPIRV/debug-info/debug-scope-lexical-block-file.ll
+137-254 files

LLVM/project a9cdcb3 — llvm/utils/sanitizers ubsan_ignorelist.txt

[cfi] Ignore cfi-icall on LLVMContext::yield and JIT calls (#237755)

LLVMContextSetYieldCallback casts a C callback with a mismatched pointer
type, and ExecutionEngine / JIT tools invoke runtime-generated JIT code
outside the link-time CFI jump table.

This is needed to remove the `LIT_FILTER_OUT="ExecutionEngine/"`
workaround in
https://github.com/llvm/llvm-zorg/blob/d6d19aa00e80a00ee06119d173d1979dbeed1ab2/zorg/buildbot/builders/sanitizers/buildbot_functions.sh#L665
on
https://lab.llvm.org/buildbot/#/builders/sanitizer-x86_64-linux-bootstrap-cfi
and
https://lab.llvm.org/buildbot/#/builders/sanitizer-aarch64-linux-bootstrap-cfi.

Assisted-by: Gemini
DeltaFile
+10-0llvm/utils/sanitizers/ubsan_ignorelist.txt
+10-01 files

LLVM/project e540d6c — llvm/lib/CodeGen RegAllocFast.cpp

[RegAllocFast] Add implicit super-register operands after operand loops. NFC (#230011)

setPhysReg rewrites a subregister operand and adds an implicit operand
of the full register:

```
$eax = COPY killed %0.sub_32bit  =>  $eax = COPY renamable $edi, implicit killed $rdi
undef %1.sub_32bit = MOV32ri 7   =>  undef renamable $ecx = MOV32ri 7, implicit-def $rcx
undef %1.sub_32bit = MOV32ri 7   =>  undef renamable $eax = MOV32ri 7, implicit-def dead $rax
                                     (%1 unused)
```

Adding the operand can rearrange the implicit operands, so every operand
loop in allocateInstruction restarts when useVirtReg, defineVirtReg or
defineLiveThroughVirtReg report a rearrangement.

Queue those operands and add them after the def and use loops instead.
The loops become plain iterations, the four functions no longer return a
flag, and defineVirtReg and defineLiveThroughVirtReg take the operand

    [2 lines not shown]
DeltaFile
+64-96llvm/lib/CodeGen/RegAllocFast.cpp
+64-961 files

LLVM/project c8cb967 — llvm/lib/Transforms/Vectorize VPlanConstruction.cpp, llvm/test/Transforms/LoopVectorize multiple-early-exits.ll early-exit-tail-folding.ll

[VPlan] Support tail folding uncountable early exits

Enables the first step towards #179595. After #237254, the MaskedHandleExitInVectorLoop early exit style uses the CFG to handle masking for early exit loops. This allows it to compose with tail folding which is also handled via the CFG in #176143.

This allows us to tail fold the following loop:

```c
extern char x[256];
int f(char * restrict y) {
  for (int i = 0; i < 256; i++) {
    if (x[i] == 0)
      return i;
  }
  return -1;
}
```

Into this on RISC-V:


    [18 lines not shown]
DeltaFile
+91-164llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
+77-149llvm/test/Transforms/LoopVectorize/RISCV/early-exit.ll
+54-105llvm/test/Transforms/LoopVectorize/early-exit-tail-folding.ll
+108-16llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
+20-37llvm/test/Transforms/LoopVectorize/RISCV/sink-to-early-exit.ll
+32-18llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
+382-4894 files not shown
+414-49710 files

LLVM/project d7cc124 — llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.h AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU scale-offset-flat.ll scale-offset-global.ll

[AMDGPU] Fix scale_offset with wrapping offsets

On gfx1250, vector memory scales the sign-extended offset in 64 bits,
but SMEM scales the offset in 32 bits and then zero-extends it. Both
selectors set scale_offset either way, so global and flat accesses
miscompiled a 32-bit scaled index that wraps, and SMEM loads an index
whose 64-bit scaled value reaches 4 GiB.

Keep scale_offset only when nsw or known bits prove that the hardware
computes the same address. Fix the SMEM tests that expected the wrong
code.
DeltaFile
+365-82llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll
+284-4llvm/test/CodeGen/AMDGPU/scale-offset-global.ll
+24-4llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+22-2llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+19-0llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll
+2-2llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+716-941 files not shown
+718-957 files

LLVM/project 3bd152d — lld/MachO SyntheticSections.h SyntheticSections.cpp, lld/test/MachO chained-fixups-alignment.s

[lld-macho] Check the alignment of every chained fixup (#234006)

`buildFixupChains` only checked that consecutive fixups on a page are a
multiple of the stride apart. The first fixup on a page has no
predecessor, so a single unaligned pointer, or a page of pointers all
displaced by the same amount, passed, and a bad distance could be blamed
on an aligned fixup that follows an unaligned one.

Now we check every fixup's alignment in
`ChainedFixupsSection::finalizeContents` instead, next to the
page-boundary check from #233911, and report it the same way.

Assisted-by: Claude
DeltaFile
+68-0lld/test/MachO/chained-fixups-alignment.s
+5-13lld/MachO/Writer.cpp
+10-5lld/MachO/SyntheticSections.cpp
+4-0lld/MachO/SyntheticSections.h
+87-184 files

LLVM/project 63d25f4 — mlir/lib/Target/LLVMIR/Dialect/LLVMIR LLVMToLLVMIRTranslation.cpp, mlir/test/Target/LLVMIR llvmir.mlir

[MLIR][LLVM] Preserve inline asm call attributes with operand_attrs (#233770)
DeltaFile
+3-0mlir/test/Target/LLVMIR/llvmir.mlir
+1-1mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
+4-12 files

LLVM/project 7dde3fe — lld/MachO InputFiles.cpp, lld/test/MachO arm64e-input-abi.s

Check arm64e ABI markers in static links too

Static links skipped the check, but ld64 takes only unversioned and
kernel objects there besides version 0, and ignores the other markers.

Assisted-by: Claude Code
DeltaFile
+13-5lld/MachO/InputFiles.cpp
+6-1lld/test/MachO/arm64e-input-abi.s
+19-62 files

LLVM/project e5c65b6 — lld/MachO InputFiles.cpp, lld/test/MachO arm64e-input-abi.s

[lld-macho] Reject incompatible arm64e object ABI markers

The CPU subtype of an arm64e object carries a pointer authentication ABI
marker. In a dynamic link, ld64 accepts only objects marked userland ABI
version 0, even on macOS and Mac Catalyst, whose executables are marked
version 1. It names any other marker as another architecture
(arm64e.old, arm64e.v1, arm64e.kernel, arm64e.kernel.v1 or unknown) and,
as with an arm64 object, ignores the file with a warning, or reports an
error with -arch_errors_fatal. This applies to archive members too.

lld linked these objects. Check the marker in the same way. ld64 accepts
unversioned and kernel-ABI objects in static links, so those links are
not checked.

Assisted-by: Claude Code



DeltaFile
+134-0lld/test/MachO/arm64e-input-abi.s
+31-11lld/MachO/InputFiles.cpp
+165-112 files

LLVM/project 5eb1f98 — lld/MachO InputSection.h Writer.cpp, lld/test/MachO arm64e-tlv-bootstrap.s

[lld-macho] Sign the arm64e TLV bootstrap pointer as ld64 does

The first word of a thread-local variable descriptor is bound to
__tlv_bootstrap, which dyld replaces with a pointer to tlv_get_addr that
TLV accesses call with blraaz. On arm64e, ld64 writes that bind as an
authenticated bind with the IA key and no diversity, although the object
asks for a plain pointer. Do the same.

Assisted-by: Claude Code



DeltaFile
+30-0lld/test/MachO/arm64e-tlv-bootstrap.s
+16-1lld/MachO/InputSection.cpp
+2-1lld/MachO/Writer.cpp
+2-0lld/MachO/InputSection.h
+50-24 files

LLVM/project baa1e26 — lld/MachO MapFile.cpp, lld/test/MachO arm64e-map.s

[lld-macho] List arm64e __auth_got entries in the map file

The map file printed the entries of __got but not those of arm64e's
__auth_got, which held the targets of the stubs and the personalities.
Print them in the same way.

Assisted-by: Claude Code



DeltaFile
+36-0lld/test/MachO/arm64e-map.s
+11-6lld/MachO/MapFile.cpp
+47-62 files

LLVM/project 7bba1b7 — lld/MachO InputSection.h OutputSegment.cpp, lld/MachO/Arch ARM64.cpp

[lld-macho] Call through authenticated stubs on arm64e

ld64 calls dylib functions from arm64e code through __auth_stubs rather
than __stubs. Each stub is four instructions instead of three:

  adrp x17, slot at page
  add  x17, x17, slot at pageoff
  ldr  x16, [x17]
  braa x16, x17

where the slot is in __auth_got and holds a pointer that dyld signs with
the IA key, blended with the slot's address. The raw target is only ever
held in x16 and x17, so a stub never branches through an unauthenticated
pointer loaded from writable memory. Do the same: on arm64e, name the stubs
section __auth_stubs, make stubs 16 bytes, and put stub targets in
__auth_got. Fast ObjC stubs load _objc_msgSend from __auth_got and braa to
it in the same way, as ld64's do; small ones already branch to its stub.

__auth_stubs gets __stubs' place directly after __text. That is not just

    [11 lines not shown]
DeltaFile
+56-14lld/test/MachO/arm64e-stubs.s
+52-0lld/MachO/Arch/ARM64.cpp
+35-0lld/test/MachO/arm64e-auth-stubs-section-order.s
+21-8lld/MachO/SyntheticSections.cpp
+2-0lld/MachO/OutputSegment.cpp
+1-0lld/MachO/InputSection.h
+167-226 files

LLVM/project 0521621 — lld/test/MachO arm64e-stubs.s

Check which __auth_got slot each stub loads

The ObjC stub's slot was captured but never checked, so a stub loading
the wrong slot would have passed.

Assisted-by: Claude Code
DeltaFile
+2-2lld/test/MachO/arm64e-stubs.s
+2-21 files

LLVM/project 29bbbef — lld/MachO OutputSegment.cpp

Give __stubs and __auth_stubs distinct section priorities

The other code sections already had -5, so move the header, __text and
the code sections down by one to make room for __stubs. The order of the
sections is unchanged; only the ties are gone.

Assisted-by: Claude Code
DeltaFile
+4-4lld/MachO/OutputSegment.cpp
+4-41 files

LLVM/project 4918396 — lld/MachO Driver.cpp

Make skipping category merging on arm64e a FIXME

ld64 merges arm64e categories by default and keeps their signatures, so
this is a missing feature in lld, not ld64 behavior.

Assisted-by: Claude Code
DeltaFile
+2-1lld/MachO/Driver.cpp
+2-11 files

LLVM/project 99fc79a — lld/MachO SyntheticSections.h SyntheticSections.cpp, lld/test/MachO arm64e-auth-pointer.s

Keep arm64e bind addends inline as ld64 does

arm64e binds have a 19-bit addend field, but only addends from 0 to 255
stayed inline, as in DYLD_CHAINED_PTR_64; the rest each took an import.
Keep addends below 256 KiB in magnitude inline, as ld64 does, except
negative ones in DYLD_CHAINED_PTR_ARM64E, which ld64 rejects and which
stay in the imports table.

Assisted-by: Claude Code
DeltaFile
+37-4lld/test/MachO/arm64e-auth-pointer.s
+20-4lld/MachO/SyntheticSections.cpp
+3-2lld/MachO/SyntheticSections.h
+60-103 files

LLVM/project 0b5f18a — lld/MachO Driver.cpp, lld/test/MachO arm64e-objc-category-merging.s

[lld-macho] Don't merge ObjC categories for arm64e

Category merging rewrites category data without regard to the signing
schemas of the authenticated pointers in it, which produces a binary that
crashes when the runtime authenticates them. Until merging preserves the
schemas, warn about -objc_category_merging on arm64e and leave the
categories as they are.

Assisted-by: Claude Code



DeltaFile
+104-0lld/test/MachO/arm64e-objc-category-merging.s
+7-2lld/MachO/Driver.cpp
+111-22 files

LLVM/project 4613099 — lld/MachO SyntheticSections.cpp Driver.cpp, lld/test/MachO arm64e-auth-pointer-invalid.yaml

Report both problems with a signing schema, and tidy two leftovers

An embedded signing schema can both lack bit 63 and set reserved bits, so
report both. Move the DYLD_CHAINED_PTR_64_OFFSET FIXME to where the
pointer format is chosen, and drop an ICF comparison that the type
comparison above it already makes.

Assisted-by: Claude Code
DeltaFile
+1-2lld/MachO/ICF.cpp
+3-0lld/test/MachO/arm64e-auth-pointer-invalid.yaml
+1-1lld/MachO/InputFiles.cpp
+0-1lld/MachO/SyntheticSections.cpp
+1-0lld/MachO/Driver.cpp
+6-45 files

LLVM/project 7e34b39 — lld/MachO Target.h Driver.cpp, lld/MachO/Arch ARM64.cpp

[lld-macho] Add an arm64e target

lld accepts -arch arm64e but links it with the arm64 target, so the output
claims to be arm64. Add an ARM64e target derived from ARM64, select it for
-arch arm64e, and mark the CPU subtype as ld64 does: CPU_SUBTYPE_ARM64E
with ptrauth ABI version 1 for macOS and Mac Catalyst executables, and
version 0 for everything else.

Assisted-by: Claude Code


DeltaFile
+37-0lld/test/MachO/arm64e-cpu-subtype.s
+10-0lld/MachO/SyntheticSections.cpp
+10-0lld/MachO/Arch/ARM64.cpp
+2-0lld/MachO/Driver.cpp
+1-0lld/MachO/Target.h
+60-05 files

LLVM/project 7fe349a — lld/MachO SyntheticSections.h Writer.cpp, lld/test/MachO arm64e-chained-fixups.s

Don't suggest -no_fixup_chains in any chained-fixup error on arm64e

The page-boundary and page-index errors still suggested the flag, which
arm64e ignores. Decide in one place whether the hint can help.

Assisted-by: Claude Code
DeltaFile
+32-0lld/test/MachO/arm64e-chained-fixups.s
+9-5lld/MachO/SyntheticSections.cpp
+3-4lld/MachO/Writer.cpp
+4-0lld/MachO/SyntheticSections.h
+48-94 files

LLVM/project 0888503 — lld/MachO InputFiles.cpp, lld/test/MachO arm64e-reject-mixed.s

[lld-macho] Don't mix arm64 and arm64e objects

arm64 and arm64e share a CPU type, but as in ld64, an arm64e link ignores
arm64 objects and an arm64 link ignores arm64e objects with a warning, and
-arch_errors_fatal makes both an error. Like ld64, both also ignore
arm64e.x1 objects, which have the arm64e ABI but need a newer CPU than
arm64e. The inputs of an -arch arm64e.x1 link are not checked.

Assisted-by: Claude Code

DeltaFile
+62-0lld/test/MachO/arm64e-reject-mixed.s
+8-1lld/MachO/InputFiles.cpp
+70-12 files

LLVM/project 90e5fe8 — lld/MachO ICF.cpp, lld/test/MachO arm64e-icf.s

[lld-macho] Keep differently signed arm64e data apart in ICF

Sections that differ only in the signing schema of an authenticated pointer
are not identical. Compare the schemas in ICF. This matters even without
--icf, because __cfstring sections, whose isa pointers arm64e compilers
sign, are always deduplicated.

Assisted-by: Claude Code


DeltaFile
+60-0lld/test/MachO/arm64e-icf.s
+4-0lld/MachO/ICF.cpp
+64-02 files

LLVM/project fe3afac — lld/MachO Relocations.h SyntheticSections.cpp, lld/test/MachO arm64e-tlv-auth.s arm64e-auth-pointer.s

[lld-macho] Link arm64e authenticated pointers

Parse ARM64_RELOC_AUTHENTICATED_POINTER, which keeps the pointer's signing
schema (key, diversity and address diversity) in its upper half, and write
it as an authenticated chained rebase or bind. Relocation stores the schema
next to a 32-bit addend, so its size stays 24 bytes.

As in ld64, accept only the extern form of the relocation and only a payload
with the authentication bit set and the reserved bits clear, store the
target of an authenticated rebase as an offset of at most 4 GiB from the
image base, put the addends of authenticated binds, which have no addend
field, in the imports table, and keep authenticated pointers in
__thread_vars signed pointers rather than offsets into the thread-local
data.

Assisted-by: Claude Code


DeltaFile
+153-0lld/test/MachO/arm64e-auth-pointer-invalid.yaml
+117-0lld/test/MachO/arm64e-auth-reloc-local.s
+104-0lld/test/MachO/arm64e-auth-pointer.s
+62-15lld/MachO/SyntheticSections.cpp
+52-4lld/MachO/Relocations.h
+42-0lld/test/MachO/arm64e-tlv-auth.s
+530-198 files not shown
+612-4714 files

LLVM/project c89b30b — lld/MachO Writer.cpp InputSection.cpp, lld/test/MachO arm64e-auth-got.s

[lld-macho] Sign arm64e personality pointers through __auth_got

The arm64e unwinder authenticates the personality pointers that it loads
through the GOT, from the personality array in __unwind_info and from a
CIE, against the address of their slot with the IA key. An image with an
unsigned slot crashes on its first throw. Like ld64, put these GOT entries
in __auth_got, whose pointers dyld signs that way. Other GOT references to
the same symbol keep their unsigned __got slot.

Assisted-by: Claude Code


DeltaFile
+140-0lld/test/MachO/arm64e-auth-got.s
+36-1lld/MachO/SyntheticSections.cpp
+21-5lld/MachO/UnwindInfoSection.cpp
+24-0lld/MachO/SyntheticSections.h
+8-2lld/MachO/Writer.cpp
+9-1lld/MachO/InputSection.cpp
+238-92 files not shown
+240-98 files

LLVM/project 226dba7 — lld/MachO Driver.cpp SyntheticSections.cpp, lld/test/MachO arm64e-stubs.s arm64e-chained-fixups-imports.s

[lld-macho] Use ld64's chained fixups for arm64e

Authenticated pointers can only be encoded as chained fixups, so like
ld64, use them for every arm64e output: also below the deployment targets
at which lld switches other architectures to chained fixups, and when
-no_fixup_chains is given, which ld64 ignores with a warning while keeping
__mod_init_func and DYLD_CHAINED_PTR_ARM64E.

Write rebases and binds in ld64's pointer formats, with an 8-byte stride:
DYLD_CHAINED_PTR_ARM64E_USERLAND24 from the deployment targets at which
ld64 switches to it, and DYLD_CHAINED_PTR_ARM64E below them. As ld64 does,
and with its messages, reject rebase targets that the format cannot hold,
including targets below the image base, and images with more than 65535
imports in DYLD_CHAINED_PTR_ARM64E, whose binds have 16-bit ordinals.

Assisted-by: Claude Code


DeltaFile
+146-0lld/test/MachO/arm64e-chained-fixups.s
+70-1lld/MachO/SyntheticSections.cpp
+68-0lld/test/MachO/arm64e-chained-fixups-high8.s
+58-0lld/test/MachO/arm64e-chained-fixups-imports.s
+42-0lld/test/MachO/arm64e-stubs.s
+36-5lld/MachO/Driver.cpp
+420-62 files not shown
+439-128 files

LLVM/project 48f82ab — llvm/include/llvm/BinaryFormat MachO.h, llvm/include/llvm/Object MachO.h

[llvm-objdump] Decode arm64e chained fixups (#234001)

`llvm-objdump` and `llvm-otool` decoded only `DYLD_CHAINED_PTR_64` and
`DYLD_CHAINED_PTR_64_OFFSET` and stopped with "unsupported chained fixup
pointer_format" on arm64e.

Here we:
- Add the `dyld_chained_ptr_arm64e_*` structs of
`<mach-o/fixup-chains.h>` to `BinaryFormat`
- Decode `DYLD_CHAINED_PTR_ARM64E` and
`DYLD_CHAINED_PTR_ARM64E_USERLAND24` fixups in `MachOChainedFixupEntry`
- Authenticated rebases and binds expose their key, diversity and
address diversity, which `--dyld-info` prints in the div, addr and key
columns that cctools' `otool` uses for arm64e.

The test builds its images with `yaml2obj` from the `obj2yaml` output of
images that Xcode 27's ld linked from the sources in the test. The
lld-macho arm64e tests later in the stack check their output with this
decoder.

Assisted-by: Claude
DeltaFile
+599-0llvm/test/tools/llvm-objdump/MachO/chained-fixups-arm64e.test
+65-20llvm/lib/Object/MachOObjectFile.cpp
+62-0llvm/include/llvm/BinaryFormat/MachO.h
+20-6llvm/tools/llvm-objdump/MachODump.cpp
+17-0llvm/include/llvm/Object/MachO.h
+763-265 files

LLVM/project c135122 — mlir/include/mlir/TableGen EnumInfo.h, mlir/lib/TableGen EnumInfo.cpp

[mlir][ODS] Add EnumInfo accessors for the bit enum separator (NFC)

The generators read the bit enum `separator` field through
getValueAsString in nine places, and EnumsGen and OpFormatGen each carry
a copy of the StringSwitch that maps it to the AsmParser method parsing
it. Add EnumInfo::getBitEnumSeparator, getBitEnumSeparatorKind and
getBitEnumSeparatorParser, and use them at every site; the comma checks
now compare the kind. A separator other than '|' or ',' used to produce
C++ that did not compile and is now a TableGen error instead.

Assisted-by: Claude Code (Claude Opus 5.5).
DeltaFile
+25-0mlir/lib/TableGen/EnumInfo.cpp
+9-12mlir/tools/mlir-tblgen/EnumsGen.cpp
+4-9mlir/tools/mlir-tblgen/OpFormatGen.cpp
+12-0mlir/include/mlir/TableGen/EnumInfo.h
+2-1mlir/tools/mlir-tblgen/AttrOrTypeFormatGen.cpp
+1-1mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp
+53-236 files