LLVM/project fdf8fb6flang/lib/Semantics resolve-directives.cpp, flang/test/Lower/OpenACC acc-routine-multi-name.f90 acc-module-definition-multi-name.f90

[flang][openacc] add extension which accepts multiple names in a OpenACC routine directive (#200296)

This PR adds an extension which allows one or more function names in a
single named routine directive. This is treated as multiple named
routine directives with the same clauses. The bind clause is forbidden.
The empty list of names isn't excepted. Routine clauses are stable under
unparsing.

This PR tests Parsing, Unparsing, Semantics, and Lowering.
DeltaFile
+55-0flang/test/Parser/acc-routine-empty-parens.f90
+52-0flang/test/Lower/OpenACC/acc-routine-multi-name.f90
+47-0flang/test/Semantics/OpenACC/acc-routine-multi-name.f90
+44-0flang/test/Lower/OpenACC/acc-module-definition-multi-name.f90
+42-0flang/test/Semantics/OpenACC/acc-routine-multi-name-disabled.f90
+29-8flang/lib/Semantics/resolve-directives.cpp
+269-811 files not shown
+316-1417 files

LLVM/project f1b42dcllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize early_exit_with_stores.ll scalarized_conditional_ops_uncountable_exits.ll

[LV] Vectorize early exit loops with stores using masking (#178454)

This is an alternative approach to vectorizing early exit loops with
stores that avoids needing to add an extra check block. This is a
fairly straightforward approach that should work on vector ISAs
supporting masked memory ops.

The basic approach is to create a mask covering all lanes _before_ any
exiting lane, using cttz.elts and active.lane.mask (which sets all lanes
to true if the uncountable exit wasn't taken). If the uncountable exit
was taken, then there will still be one scalar iteration left to perform
after the vector loop, which will also handle which exit block we should
branch to.

We no longer need to advance exit conditions in the vector body to the
next iteration (compared to the other PR), though we still need to move
the recipes needed to generate the exit condition (depending on which
memory operations are first in the loop).


    [56 lines not shown]
DeltaFile
+256-63llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
+209-31llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+178-49llvm/test/Transforms/LoopVectorize/RISCV/early_exit_with_stores.ll
+168-39llvm/test/Transforms/LoopVectorize/AArch64/early_exit_with_stores.ll
+193-11llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+132-0llvm/test/Transforms/LoopVectorize/scalarized_conditional_ops_uncountable_exits.ll
+1,136-1939 files not shown
+1,411-22915 files

LLVM/project ad58ae7llvm/lib/Target/AArch64 AArch64RegisterInfo.td SMEInstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Restrict luti6 (4 regs, 8-bit) to 0 <= Zn <= 7

The `luti6` instruction (table, four registers, 8-bit) should only
allow `0 <= Zn <= 7`, since there's only 3 bits. It actually allows:
```
   luti6 { z0.b - z3.b }, zt0, { z8 - z10 }
```
which produces a duplicate encoding to the following:
```
   luti6 { z0.b - z3.b }, zt0, { z0 - z2 }
```

Fix tablegen to ensure Zn is only allowed in correct range of 0 to 7.
DeltaFile
+15-0llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+5-0llvm/test/MC/AArch64/SME2p3/luti6-diagnostics.s
+4-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-1llvm/lib/Target/AArch64/SMEInstrFormats.td
+25-14 files

LLVM/project 2f323c0llvm/lib/Target/AArch64 AArch64RegisterInfo.td

fixup! Address CR comments
DeltaFile
+10-19llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+10-191 files

LLVM/project 4a8c5d2clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-2velem.c v8.2a-neon-intrinsics.c

[CIR][AArch64] Lower vfmaq_lane_v and vfma_laneq_v (#197084)

Lower BI__builtin_neon_vfmaq_lane_v and BI__builtin_neon_vfma_laneq_v in
CIR.

This handles the covered vfmaq_lane_* and vfma_laneq_* ACLE wrappers by
bitcasting operands to the expected types, selecting the requested lane
from the lane source operand, and emitting fma through
emitCallMaybeConstrainedBuiltin.

For vfmaq_lane_v, the selected lane is splatted with emitNeonSplat.
For vfma_laneq_v, the lane is selected from the wider lane source; the
f64 case extracts the scalar lane before emitting scalar fma.

Neighboring scalar lane/laneq wrappers and other out-of-scope forms
remain explicit NYI cases.

Tests are moved into the existing CIR-enabled fused multiply files under
clang/test/CodeGen/AArch64/neon/, reusing upstream LLVM checks where

    [3 lines not shown]
DeltaFile
+109-1clang/test/CodeGen/AArch64/neon/fused-multiply.c
+0-96clang/test/CodeGen/AArch64/neon-2velem.c
+50-2clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+45-2clang/test/CodeGen/AArch64/neon/fused-multiple-fullfp16.c
+0-40clang/test/CodeGen/AArch64/v8.2a-neon-intrinsics.c
+0-23clang/test/CodeGen/AArch64/neon-scalar-x-indexed-elem.c
+204-1646 files

LLVM/project f78d2a6llvm/lib/Target/AArch64 AArch64RegisterInfo.td SMEInstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Address more CR comments
DeltaFile
+6-8llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+10-1llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+2-2llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-1llvm/lib/Target/AArch64/SMEInstrFormats.td
+19-124 files

LLVM/project 90a172bllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU inlineasm-mismatched-size-error.ll

[AMDGPU] Reject named single register inline asm constraints for wider types (#200771)

A named single register constraint like `={v0}` was silently accepted
for i64 result, binding it to one 32-bit register

Reject scalars larger than 32 bits as well
DeltaFile
+14-122llvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm-mismatched-size.ll
+57-0llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
+5-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+76-1243 files

LLVM/project 3521e31clang/include/clang/AST DeclTemplate.h, clang/lib/AST DeclTemplate.cpp

[clang] fix getTemplateInstantiationArgs

This implements a new strategy for collecting the template arguments, by
relying on the qualifiers and template parameter lists to navigate the template
context of out-of-line definitions.

This greatly simplifies the signature of that function, by removing a bunch
of workarounds, and simpliffying a couple that weren't removed yet.

Since this now relies on qualifiers and template parameter lists,
this patch expends most of its effort making sure these are placed,
transformed and propagated to template instantiations.

Also makes the explicit specialization AST nodes stop abusing the template
parameter lists by storing it's own template parameter list, creating a
dedicated field for them, similar to partial specializations.
DeltaFile
+194-429clang/lib/Sema/SemaTemplateInstantiate.cpp
+257-164clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+151-147clang/lib/Sema/SemaTemplate.cpp
+96-95clang/include/clang/AST/DeclTemplate.h
+59-129clang/lib/Sema/SemaConcept.cpp
+60-92clang/lib/AST/DeclTemplate.cpp
+817-1,05653 files not shown
+1,458-1,71659 files

LLVM/project 8b51a40clang/lib/Sema SemaTemplateInstantiateDecl.cpp, clang/test/CodeGenCXX default-arguments.cpp

fixup
DeltaFile
+12-1clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+12-0clang/test/CodeGenCXX/default-arguments.cpp
+24-12 files

LLVM/project 9606c9fclang/test/CodeGen scoped-atomic-ops.c, clang/test/CodeGenCUDA atomic-options.hip amdgpu-kernel-arg-pointer-type.cu

Reapply "[clang] remove lots of "innocuous" addrspacecasts"  (#200427)

Reapply #197745, with an additional commit to undo a small part of the
first commit, pending further analysis of alternatives to that part of it.

In particular, make the `agg.tmp` (CreateAggTemp) values keep using the
declared expression type of the RValue. This is indeed probably
sensible, since it lets Sema influence this via the expression type,
though it runs into some issues where some expression types (notably for
any load) haven't had one of the equivalent functions
getNonLValueExprType/DeduceAutoType/getUnqualifiedType called on them,
so they are bringing along additional annotation baggage which doesn't
apply the the rvalue when turned into a temporary (see comments in
getNonLValueExprType for relevant part of C++ standard). This in turn is
also rarely relevant, since inventing temporaries aren't often allowed
in this part of the pipeline (it'd require a move constructor) so the
LValue Dest already provides the type and the RValue type is ignored.
However, it does affect a single test (which loads a global but ignores
the result) and so this adds an extra `getUnqualifiedType` call to

    [6 lines not shown]
DeltaFile
+568-852clang/test/CodeGen/scoped-atomic-ops.c
+144-216clang/test/CodeGenCUDA/atomic-options.hip
+95-103clang/test/CodeGenCUDA/amdgpu-kernel-arg-pointer-type.cu
+36-54clang/test/CodeGenCUDA/builtins-spirv-amdgcn.cu
+56-31clang/test/CodeGenCXX/amdgcn-func-arg.cpp
+32-42clang/test/OpenMP/target_teams_generic_loop_codegen_as_parallel_for.cpp
+931-1,29833 files not shown
+1,148-1,55039 files

LLVM/project 270a6a8flang/include/flang/Semantics symbol.h, flang/lib/Semantics mod-file.cpp resolve-directives.cpp

[flang][OpenMP] Store DECLARE_TARGET information in WithOmpDeclarative (#201103)

This will be used to emit DECLARE_TARGET directives into module files.

When a symbol apperars in DECLARE_TARGET, the OmpDeclareTarget flag will
be set on it (this includes procedures containing a DECLARE_TARGET
without arguments or clauses). The set of accompanying clauses will be
stored in the associated details, in the WithOmpDeclarative mixin. The
mixin was added to ObjectEntityDetails, ProcEntityDetails, and
CommonBlockDetails.

The design goal was to be able to reconstruct the appropriate DECLARE_
TARGET directive for individual symbols for the purpose of emitting it
in a module file. Simply storing and then unparsing the AST node may
include symbols that should not be emitted.

Additionally, refactor the WithOmpDeclarative printing code for reuse in
symbol dumping for debugging, and for printing clause sets.
DeltaFile
+40-26flang/lib/Semantics/mod-file.cpp
+65-0flang/lib/Semantics/resolve-directives.cpp
+41-21flang/lib/Semantics/symbol.cpp
+50-0flang/test/Semantics/OpenMP/declare-target-modfile.f90
+43-0flang/test/Semantics/OpenMP/declare-target-flags.f90
+23-3flang/include/flang/Semantics/symbol.h
+262-508 files not shown
+280-6714 files

LLVM/project 934715cclang/lib/Sema SemaDeclAttr.cpp, llvm/lib/IR Verifier.cpp

[AMDGPU] Verify AMDGPU required workgroup size matches flat workgroup size
DeltaFile
+89-0llvm/test/Verifier/AMDGPU/reqd-work-group-size.ll
+82-0llvm/lib/IR/Verifier.cpp
+35-0mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
+35-0clang/lib/Sema/SemaDeclAttr.cpp
+12-12llvm/test/Transforms/InstCombine/AMDGPU/mbcnt-wave32-optimizations.ll
+19-0mlir/test/Target/LLVMIR/rocdl-invalid.mlir
+272-1221 files not shown
+375-8927 files

LLVM/project 3a9c6cdclang/include/clang/AST MatrixUtils.h, clang/lib/CodeGen CGExprScalar.cpp CGHLSLBuiltins.cpp

[Matrix][HLSL] Add codegen support for Matrix Layout keywords (#198887)

fixes #192262
    
- Wrap Matrix Type in a row or column major layout attribute
- Add Helper to know which Matrix Layout to apply in codegen or check
for in Sema
- Remove the Decl Atribute and only store on the type.

Assisted by Claud Opus 4.7
DeltaFile
+223-0clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
+65-43clang/lib/Sema/SemaHLSL.cpp
+49-0clang/include/clang/AST/MatrixUtils.h
+16-12clang/lib/CodeGen/CGExprScalar.cpp
+13-13clang/test/SemaHLSL/MatrixElementOverloadResolution.hlsl
+13-9clang/lib/CodeGen/CGHLSLBuiltins.cpp
+379-7714 files not shown
+454-13420 files

LLVM/project 817b8d6cross-project-tests/debuginfo-tests/dexter/dex/test_script __init__.py, cross-project-tests/debuginfo-tests/dexter/dex/tools/test Tool.py

Minor fixup(s)
DeltaFile
+1-1cross-project-tests/debuginfo-tests/dexter/dex/test_script/__init__.py
+1-1cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
+2-22 files

LLVM/project cdfb434cross-project-tests/debuginfo-tests/dexter/dex/evaluation Metrics.py RunMatch.py, cross-project-tests/debuginfo-tests/dexter/dex/tools/test Tool.py

Address review comments
DeltaFile
+9-1cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
+6-4cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
+4-3cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
+2-2cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
+21-104 files

LLVM/project 1d79b32cross-project-tests/debuginfo-tests/dexter/dex/evaluation RunMatch.py Metrics.py, cross-project-tests/debuginfo-tests/dexter/dex/tools/test Tool.py

format
DeltaFile
+53-12cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
+19-7cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
+11-2cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
+6-6cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/basic_evaluate.cpp
+5-3cross-project-tests/debuginfo-tests/dexter/dex/evaluation/ExpectMatch.py
+3-2cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/evaluate_nothing.cpp
+97-321 files not shown
+98-327 files

LLVM/project 8ba70e8cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers ScriptDebuggerController.py, cross-project-tests/debuginfo-tests/dexter/dex/evaluation Metrics.py RunMatch.py

[Dexter] Add basic result evaluation for structured scripts

This patch adds evaluation for structured scripts, completing the features
required to run simple Dexter tests using structured scripts. The basic
output from these evaluations is a list of named metrics aggregating the
results of evaluating !value nodes. The verbose output gives a per-step
summary of the results for each expect node active at that step.

Most of the new functionality is in the evaluation/ dir, which has also
absorbed some functionality previously stored in the
ScriptDebuggerController for matching !where nodes to a debugger StepIR,
as this is logic which is common to both managing a debugger session and
evaluating the end result.
DeltaFile
+120-0cross-project-tests/debuginfo-tests/dexter/dex/evaluation/Metrics.py
+120-0cross-project-tests/debuginfo-tests/dexter/dex/evaluation/RunMatch.py
+93-0cross-project-tests/debuginfo-tests/dexter/dex/evaluation/StateMatch.py
+4-82cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ScriptDebuggerController.py
+46-17cross-project-tests/debuginfo-tests/dexter/dex/tools/test/Tool.py
+42-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/evaluation/basic_evaluate.cpp
+425-994 files not shown
+498-9910 files

LLVM/project 7419b86clang/test/Driver hip-toolchain-no-rdc.hip, flang-rt CMakeLists.txt

Merge branch 'users/hvdijk/dxilprettyprinter-ir-printing' into users/hvdijk/directx-delay-converting-debug-info
DeltaFile
+0-755llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses-inseltpoison.ll
+0-138llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
+2-2clang/test/Driver/hip-toolchain-no-rdc.hip
+2-0flang-rt/CMakeLists.txt
+4-8954 files

LLVM/project 24f3018clang/test/Driver hip-toolchain-no-rdc.hip, flang-rt CMakeLists.txt

Merge branch 'users/hvdijk/aaw-emitmdnodeannot' into users/hvdijk/dxilprettyprinter-ir-printing
DeltaFile
+0-755llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses-inseltpoison.ll
+0-138llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
+2-2clang/test/Driver/hip-toolchain-no-rdc.hip
+2-0flang-rt/CMakeLists.txt
+4-8954 files

LLVM/project fb8f285clang/test/Driver hip-toolchain-no-rdc.hip, flang-rt CMakeLists.txt

Merge branch 'main' into users/hvdijk/aaw-emitmdnodeannot
DeltaFile
+0-755llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses-inseltpoison.ll
+0-138llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
+2-2clang/test/Driver/hip-toolchain-no-rdc.hip
+2-0flang-rt/CMakeLists.txt
+4-8954 files

LLVM/project 9e36ae5clang/lib/Driver Driver.cpp ToolChain.cpp, llvm/test/CodeGen/AMDGPU amdgpu-late-codegenprepare.ll

Merge branch 'main' into users/kasuga-fj/loop-interchange-fix-call-check
DeltaFile
+0-755llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses-inseltpoison.ll
+0-138llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
+39-75clang/lib/Driver/Driver.cpp
+35-35llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+59-0llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll
+53-0clang/lib/Driver/ToolChain.cpp
+186-1,00354 files not shown
+589-1,32660 files

LLVM/project 7eff475clang/test/Driver hip-toolchain-no-rdc.hip

[HIP] Fix test for --no-lto (#201367)
DeltaFile
+2-2clang/test/Driver/hip-toolchain-no-rdc.hip
+2-21 files

LLVM/project 9e01e09flang-rt CMakeLists.txt

[Flang-RT] Disable tests by default without modules (#201311)

With #201297 flang-rt-mod is required for running tests. Disable tests
by default if module files are not built.
DeltaFile
+2-0flang-rt/CMakeLists.txt
+2-01 files

LLVM/project a7bfea8llvm/test/Transforms/InferAddressSpaces/AMDGPU old-pass-regressions-inseltpoison.ll, llvm/test/Transforms/InterleavedAccess/AArch64 interleaved-accesses-inseltpoison.ll

[Transforms] Delete identical poison tests (NFC) (#201349)

These are now bit-identical to the original tests:
- llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
- llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses.ll
DeltaFile
+0-755llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses-inseltpoison.ll
+0-138llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
+0-8932 files

LLVM/project d8370bfllvm/lib/Target/AArch64 AArch64RegisterInfo.td SMEInstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Address more CR comments
DeltaFile
+6-8llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+10-1llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+2-2llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-1llvm/lib/Target/AArch64/SMEInstrFormats.td
+19-124 files

LLVM/project e850589llvm/include/llvm/IR ModuleSummaryIndex.h ModuleSummaryIndexYAML.h, llvm/lib/Bitcode/Writer BitcodeWriter.cpp

decouple cfi from thinlto
DeltaFile
+107-0llvm/test/ThinLTO/X86/cfi-icall-thinlto.ll
+52-48llvm/include/llvm/IR/ModuleSummaryIndex.h
+27-10llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
+20-14llvm/test/Transforms/LowerTypeTests/export-icall.ll
+16-12llvm/test/Transforms/LowerTypeTests/Inputs/import-icall.yaml
+15-6llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+237-9019 files not shown
+329-16125 files

LLVM/project dbc3667flang/test/Semantics/OpenMP declare-target-flags.f90 declare-target-modfile.f90

Add common block to tests
DeltaFile
+21-14flang/test/Semantics/OpenMP/declare-target-flags.f90
+9-0flang/test/Semantics/OpenMP/declare-target-modfile.f90
+30-142 files

LLVM/project 32564b2clang/lib/Driver/ToolChains Clang.cpp, flang/lib/Optimizer/HLFIR/Transforms OptimizedBufferization.cpp

Merge branch 'users/hvdijk/dxilprettyprinter-ir-printing' into users/hvdijk/directx-delay-converting-debug-info
DeltaFile
+38-1libc/test/src/__support/FPUtil/bfloat16_test.cpp
+30-0flang/test/HLFIR/opt-bufferization-eval_in_mem.fir
+23-5flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
+13-12clang/lib/Driver/ToolChains/Clang.cpp
+13-1libc/src/__support/FPUtil/bfloat16.h
+117-195 files

LLVM/project a224465clang/lib/Driver/ToolChains Clang.cpp, flang/lib/Optimizer/HLFIR/Transforms OptimizedBufferization.cpp

Merge branch 'users/hvdijk/aaw-emitmdnodeannot' into users/hvdijk/dxilprettyprinter-ir-printing
DeltaFile
+38-1libc/test/src/__support/FPUtil/bfloat16_test.cpp
+30-0flang/test/HLFIR/opt-bufferization-eval_in_mem.fir
+23-5flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
+13-12clang/lib/Driver/ToolChains/Clang.cpp
+13-1libc/src/__support/FPUtil/bfloat16.h
+117-195 files

LLVM/project 4cee4eeclang/lib/Driver/ToolChains Clang.cpp, flang/lib/Optimizer/HLFIR/Transforms OptimizedBufferization.cpp

Merge branch 'main' into users/hvdijk/aaw-emitmdnodeannot
DeltaFile
+38-1libc/test/src/__support/FPUtil/bfloat16_test.cpp
+30-0flang/test/HLFIR/opt-bufferization-eval_in_mem.fir
+23-5flang/lib/Optimizer/HLFIR/Transforms/OptimizedBufferization.cpp
+13-12clang/lib/Driver/ToolChains/Clang.cpp
+13-1libc/src/__support/FPUtil/bfloat16.h
+117-195 files