LLVM / project - FreshBSD

LLVM/project 3805d81 — mlir/docs/DefiningDialects Operations.md, mlir/test/IR properties.mlir

2026-08-27 22:30:59 UTC by Mehdi Amini via GitHub on ⎇

main

[mlir] Print unit prop-dict entries by presence (#219315)

Teach generated prop-dict parsers and printers to use a bare key for
`UnitAttr` and false-default `UnitProp` entries while retaining the
explicit value spelling for compatibility.

Assisted-by: Codex

Delta		File
+78	-17	mlir/tools/mlir-tblgen/OpFormatGen.cpp
+15	-2	mlir/test/IR/properties.mlir
+2	-1	mlir/test/lib/Dialect/Test/TestOps.td
+3	-0	mlir/docs/DefiningDialects/Operations.md
+1	-1	mlir/test/mlir-tblgen/op-format.mlir
+1	-1	mlir/test/mlir-tblgen/op-format-custom-properties-printer.td
+100	-22	6 files

LLVM/project 20f25d1 — clang-tools-extra/clang-ssaf-src-edit-merge CMakeLists.txt

2026-08-27 22:28:22 UTC by Rashmi Mudduluru via GitHub on ⎇

main

[clang][ssaf] Fix Windows link error by adding clangAST dependency (#219305)

Fixes link failure in SrcEditMerge(Introduced in #216183) on Windows due
to a missing clangAST dependency.

rdar://179151250

Delta		File
+1	-0	clang-tools-extra/clang-ssaf-src-edit-merge/CMakeLists.txt
+1	-0	1 files

LLVM/project ff19396 — lldb/source/Plugins/Process/Linux NativeProcessLinux.cpp

2026-08-27 22:26:26 UTC by Nick Desaulniers via GitHub on ⎇

main

lldb: Linux: restore __ptrace_request typedef for bionic+musl (#219237)

glibc declares ptrace as taking an enum __ptrace_request as its first
argument. Because C++ does not allow implicit conversion from int to an
enumeration type, callers must cast int arguments to __ptrace_request
(e.g., static_cast<__ptrace_request>(req)).
    
However, bionic and musl declare ptrace as taking an int and do not
define __ptrace_request. Providing a fallback typedef int
__ptrace_request
allows the static_cast to compile across all three libcs.

I removed this typedef by accident in
ef9085f5bdb52b27258c150bd7e1fd812fc406c8.

Fixes: commit ef9085f5bdb5 ("lldb: Linux: empty Ptrace.h pollyfill")
Link: https://github.com/llvm/llvm-project/issues/217413

Delta		File
+7	-0	lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+7	-0	1 files

LLVM/project 1f38227 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

2026-08-27 22:25:15 UTC by Andrei Elovikov on ⎇

users/eas/predicator-ssa-fixups

Drop removeCommonBlendMask from simplifyBlends, seems to be a no-op now

Delta		File
+0	-19	llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+0	-19	1 files

LLVM/project 75973e1 — clang/test/CodeGen/AArch64/neon load.c, libcxx/test/std/language.support/support.limits/support.limits.general version.version.compile.pass.cpp

2026-08-27 22:21:13 UTC by Alexey Bataev on ⎇

users/alexey-bataev/spr/slprecognize-interchangeable-cmp-predicates-with-boundary-constants

Rebase, address comments

Created using spr 1.3.7

Delta		File
+0	-6,246	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_nested_loops.mir
+0	-4,877	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader2.mir
+2,428	-0	llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-0.ll
+2,426	-0	llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-1.ll
+2,240	-0	clang/test/CodeGen/AArch64/neon/load.c
+2,058	-2	libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
+9,152	-11,125	2,013 files not shown
+93,591	-40,676	2,019 files

LLVM/project 13b8540 — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize vplan-based-stride-mv.ll

2026-08-27 22:12:29 UTC by Ramkumar Ramachandra via GitHub on ⎇

main

[VPlan] Handle trunc in replaceSymbolicStrides (#216367)

LoopAccessAnalysis skips IntegralCast expressions when speculating
strides, but the trunc case is missing in replaceSymbolicStrides. Add
the case, and make some non-functional improvements while at it.

Delta		File
+13	-14	llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1	-2	llvm/test/Transforms/LoopVectorize/vplan-based-stride-mv.ll
+14	-16	2 files

LLVM/project 851ce84 — llvm/lib/CodeGen ModuloSchedule.cpp

2026-08-27 22:02:08 UTC by Matt Arsenault via GitHub on ⎇

main

ModuloSchedule: Use use_instructions instead of use_operands + getParent (#219297)

The use list only inspected the user, so directly loop over the users.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Delta		File
+6	-7	llvm/lib/CodeGen/ModuloSchedule.cpp
+6	-7	1 files

LLVM/project b8cbca3 — llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

2026-08-27 22:01:57 UTC by Chinmay Deshpande on ⎇

users/chinmaydd/fix-simd-mode

Update supportsWGP to use feature bits instead

Change-Id: Ie1ecc691fac766dc2f32ff4edcb41ccf2483a71c

Delta		File
+1	-3	llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+1	-3	1 files

LLVM/project 6a5367a — llvm/lib/CodeGen Rematerializer.cpp

2026-08-27 22:01:13 UTC by Matt Arsenault via GitHub on ⎇

main

Rematerializer: Use def_instructions instead of def_operands + getParent (#219298)

Directly iterate the user instructions instead of querying the same
parent for each use.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Delta		File
+2	-4	llvm/lib/CodeGen/Rematerializer.cpp
+2	-4	1 files

LLVM/project c59f418 — llvm/include/llvm/ADT FoldingSet.h, llvm/include/llvm/Analysis ScalarEvolution.h

2026-08-27 22:00:57 UTC by Kazu Hirata via GitHub on ⎇

main

[ADT] Remove ComputeNodeHash and Trait::ComputeHash (NFC) (#219029)

With the switch to open addressing (commit b3411b89c3af),
FoldingSetNode stores its hash in the node itself.  Table growth
rehashes nodes by calling getFoldingSetHash(), leaving ComputeNodeHash
and Trait::ComputeHash unused.

Delta		File
+0	-36	llvm/include/llvm/ADT/FoldingSet.h
+3	-14	llvm/include/llvm/CodeGen/SelectionDAG.h
+0	-9	llvm/include/llvm/Analysis/ScalarEvolution.h
+3	-59	3 files

LLVM/project 9ebb067 — mlir/include/mlir/IR SymbolTable.h

2026-08-27 21:53:39 UTC by Artem Gindinson via GitHub on ⎇

main

[mlir][IR][NFC] Disambiguate `SymbolTable::Visibility` references (#219301)

As a follow-up to 979b722, address MSVC's confusion when it's trying to
resolve the underqualified enum name:
```
error C2955: 'mlir::OpTrait::SymbolTable': use of class template requires template argument list
```

Assisted-by: OpenAI Codex

Signed-off-by: Artem Gindinson <gindinson at roofline.ai>

Delta		File
+11	-10	mlir/include/mlir/IR/SymbolTable.h
+11	-10	1 files

LLVM/project 747588a — llvm/lib/Target/Hexagon HexagonBitSimplify.cpp

2026-08-27 21:51:46 UTC by Matt Arsenault on ⎇

users/arsenm/hexagon/bitsimplify-use-instructions

Hexagon: Use use_instructions in BitSimplify use scans

This only inspects the parent instruction, so use use_instructions
instead.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Delta		File
+8	-10	llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+8	-10	1 files

LLVM/project 5964066 — compiler-rt/lib/scudo/standalone secondary.h, compiler-rt/lib/scudo/standalone/tests secondary_test.cpp

2026-08-27 21:49:46 UTC by Sadaf Ebrahimi via GitHub on ⎇

main

[scudo] Track maximum resident memory in cache (#219036)

Add tracking for the resident memory in MapAllocatorCache. Unreleased
cache entries where Time != 0 are assumed to be resident, while entries
that have passed through releaseOlderThan where Time == 0 have had their
physical pages discarded.

Tracking is performed by updating CurrentResidentBytes on store, remove,
and release operations, recoding the peak in maxResidentBytes and
reporting it in getStats.

Delta		File
+44	-0	compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
+35	-2	compiler-rt/lib/scudo/standalone/secondary.h
+79	-2	2 files

LLVM/project cd17483 — llvm/test/CodeGen/AArch64 vector-ldst-offset.ll vector-ldst-align.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis test_ers_emit_restore_in_loop_preheader2.mir test_ers_nested_loops.mir

2026-08-27 21:45:02 UTC by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpvectorize-unique-scalars-of-splat-gather-nodes-as-separate-subtrees

Rebase, address comments

Created using spr 1.3.7

Delta		File
+9,921	-0	llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+8,227	-0	llvm/test/CodeGen/AArch64/vector-ldst-align.ll
+0	-6,246	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_nested_loops.mir
+0	-4,877	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader2.mir
+3,448	-2	llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
+2,421	-285	llvm/test/tools/llvm-mca/AArch64/Cortex/A57-forwarding.s
+24,017	-11,410	3,448 files not shown
+186,009	-80,423	3,454 files

LLVM/project 3aff3f8 — llvm/lib/Target/AMDGPU SIRegisterInfo.cpp AMDGPUInstructionSelector.cpp, llvm/lib/Target/RISCV RISCVRegisterInfo.h RISCVRegisterInfo.cpp

2026-08-27 21:39:46 UTC by Matt Arsenault on ⎇

users/arsenm/global-isel/getConstrainedRegClassForOperand-no-operand

GlobalISel: Replace MachineOperand based register constraint API

Replace MachineOperand reference in getConstrainedRegClassForOperand with
a Register. It is only valid to call this on a generic vreg operand, which
must be a Register so there's no point in using an operand reference.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Delta		File
+31	-33	llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+6	-6	llvm/lib/Target/WebAssembly/GISel/WebAssemblyInstructionSelector.cpp
+4	-5	llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+4	-5	llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2	-6	llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
+3	-2	llvm/lib/Target/RISCV/RISCVRegisterInfo.h
+50	-57	5 files not shown
+59	-66	11 files

LLVM/project 367293a — clang/include/clang/Basic OffloadArch.h, clang/lib/Basic Cuda.cpp OffloadArch.cpp

2026-08-27 21:32:07 UTC by Ian Li via GitHub on ⎇

main

[Clang] Rename OffloadArch::TargetArch::SPIRV to AMDGCNSPIRV to avoid confusion (#218502)

Following up to
https://github.com/llvm/llvm-project/pull/213362/changes#r3745729994,
the `TargetArch::SPIRV` introduced by #213362 actually corresponds to
`amdgcnspirv`, which is not the same as standard SPIRV: This could prove
rather confusing in the future. Renaming to `TargetArch::AMDGCNSPIRV`
also decouples "`TargetArch::SPIRV`" from AMD-specific SPIRV support, as
SPIRV is used by other vendors as well.

Delta		File
+12	-10	clang/include/clang/Basic/OffloadArch.h
+6	-6	clang/unittests/Basic/OffloadArchTest.cpp
+4	-4	clang/lib/Basic/OffloadArch.cpp
+3	-3	clang/lib/Driver/Driver.cpp
+2	-2	clang/lib/Basic/Cuda.cpp
+27	-25	5 files

LLVM/project e192df0 — clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-packed.c

2026-08-27 21:30:15 UTC by Adam Smith on ⎇

users/adams381/cir-callconv-named-bitfield-unit-x86_64

[CIR] Classify a named bit-field access unit as a bit-field on x86_64

mapCIRType built the ABI FieldInfo for a bit-field access unit with IsBitField
set only for an unnamed one, so a named unit reached the classifier as an
ordinary field.  We now pass IsBitField with the unit's width to be able to
lower named bit-fields correctly.

Assisted-by: Cursor / claude-opus-5

Delta		File
+33	-0	clang/test/CIR/CodeGen/call-conv-lowering-x86_64-packed.c
+6	-1	clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+39	-1	2 files

LLVM/project 41c2ec5 — llvm/include/llvm/Support KnownFPClass.h, llvm/lib/Analysis ValueTracking.cpp

2026-08-27 21:27:38 UTC by ZERICO2005 via GitHub on ⎇

main

[KnownFPClass] Add `KnownFPClass::frem` [NFC] (#218949)

Follow up to https://github.com/llvm/llvm-project/pull/218726

Moves `frem` deduction logic from `Analysis/ValueTracking.cpp` and
`CodeGen/GlobalISel/GISelValueTracking.cpp` to `KnownFPClass::frem`.

Delta		File
+30	-0	llvm/lib/Support/KnownFPClass.cpp
+1	-18	llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+1	-18	llvm/lib/Analysis/ValueTracking.cpp
+5	-0	llvm/include/llvm/Support/KnownFPClass.h
+37	-36	4 files

LLVM/project a58e481 — mlir/lib/Dialect/XeGPU/Transforms XeGPUArrayLengthOptimization.cpp, mlir/test/Dialect/XeGPU array-len-op-unit.mlir

2026-08-27 21:24:00 UTC by Mehdi Amini via GitHub on ⎇

main

[MLIR][XeGPU] Update array-length users atomically (#217478)

Preflight load and slice users before changing tensor descriptor types,
then update their dependent types and offsets in one pattern
application.

Assisted-by: Codex

Delta		File
+88	-147	mlir/lib/Dialect/XeGPU/Transforms/XeGPUArrayLengthOptimization.cpp
+198	-2	mlir/test/Dialect/XeGPU/array-len-op-unit.mlir
+286	-149	2 files

LLVM/project d97960d — llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp, llvm/test/CodeGen/AMDGPU lds-limit-diagnostics.ll

2026-08-27 21:22:40 UTC by Chinmay Deshpande on ⎇

users/chinmaydd/fix-simd-mode

[AMDGPU] Ignore CU mode on targets without WGP mode

isFullSIMDMode() treated +cumode as meaningful on every generation, so on
pre-gfx10 targets it halved both the physical and the addressable LDS size
and dropped getNumWorkGroupSIMDs() from 4 to 2. Before the LDS size rework
the CU/WGP adjustment was gated on isGFX10Plus(), and +cumode was simply
ignored elsewhere.

rocFFT passes -mcumode to hipRTC unconditionally, so its Bluestein kernels
started failing to compile on gfx942 with "local memory (65536) exceeds
limit (32768)".

Change-Id: I0b440751aedd8f8b5d334ee62b68ffdc449d53f8
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>

Delta		File
+5	-0	llvm/test/CodeGen/AMDGPU/lds-limit-diagnostics.ll
+3	-1	llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+8	-1	2 files

LLVM/project 6560cd0 — llvm/lib/CodeGen Rematerializer.cpp

2026-08-27 21:21:58 UTC by Matt Arsenault on ⎇

users/arsenm/rematerializer-def-instructions

Rematerializer: Use def_instructions instead of def_operands + getParent

Directly iterate the user instructions instead of querying the same
parent for each use.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Delta		File
+2	-4	llvm/lib/CodeGen/Rematerializer.cpp
+2	-4	1 files

LLVM/project 5e5edf0 — llvm/lib/Transforms/Vectorize VPlanPredicator.cpp, llvm/test/Transforms/LoopVectorize blend-in-header.ll predicatedinst-loop-invariant.ll

2026-08-27 21:21:00 UTC by Andrei Elovikov on ⎇

users/eas/predicator-ssa-fixups

Don't preserve branch-on-constant

Delta		File
+15	-62	llvm/test/Transforms/LoopVectorize/constantfolder.ll
+5	-25	llvm/test/Transforms/LoopVectorize/predicatedinst-loop-invariant.ll
+2	-10	llvm/test/Transforms/LoopVectorize/blend-in-header.ll
+11	-1	llvm/lib/Transforms/Vectorize/VPlanPredicator.cpp
+2	-9	llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
+3	-7	llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+38	-114	1 files not shown
+39	-121	7 files

LLVM/project 948eff3 — llvm/lib/CodeGen ModuloSchedule.cpp

2026-08-27 21:20:57 UTC by Matt Arsenault on ⎇

users/arsenm/modulo-schedule/iterate-user-instructions

ModuloSchedule: Use use_instructions instead of use_operands + getParent

The use list only inspected the user, so directly loop over the users.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>

Delta		File
+6	-7	llvm/lib/CodeGen/ModuloSchedule.cpp
+6	-7	1 files

LLVM/project 0fd16c5 — llvm/lib/ProfileData InstrProf.cpp, llvm/test/tools/llvm-profdata merge-incompatible.test

2026-08-27 21:20:23 UTC by SharonXSharon via GitHub on ⎇

main

[llvm-profdata] Clarify incompatible counter profile error (#219280)

Fix based on the comment on
https://github.com/llvm/llvm-project/pull/213177#pullrequestreview-5011647833

Delta		File
+1	-2	llvm/lib/ProfileData/InstrProf.cpp
+1	-1	llvm/test/tools/llvm-profdata/merge-incompatible.test
+2	-3	2 files

LLVM/project 6b1075c — clang/test/CodeGen/AArch64/neon load.c, llvm/test/CodeGen/AMDGPU atomic_optimizations_global_pointer.ll

2026-08-27 21:13:11 UTC by Adam Smith on ⎇

users/adams381/cir-callconv-incomplete-record-decl

Merge branch 'users/adams381/cir-callconv-incomplete-record-decl' of https://github.com/llvm/llvm-project into cir-callconv-incomplete-record-decl

Delta		File
+0	-6,246	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_nested_loops.mir
+0	-4,877	llvm/test/CodeGen/AMDGPU/NextUseAnalysis/test_ers_emit_restore_in_loop_preheader2.mir
+2,428	-0	llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-0.ll
+2,426	-0	llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/unmerge-crash-1.ll
+1,217	-1,125	llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
+2,240	-0	clang/test/CodeGen/AArch64/neon/load.c
+8,311	-12,248	2,226 files not shown
+106,120	-52,325	2,232 files

LLVM/project a4d5d5f — llvm/test/Transforms/SLPVectorizer/X86 splat-gather-operands.ll

2026-08-27 21:09:41 UTC by Alexey Bataev via GitHub on ⎇

main

[SLP][NFC]Add extra tests for gathered splats, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/219291

Delta		File
+91	-0	llvm/test/Transforms/SLPVectorizer/X86/splat-gather-operands.ll
+91	-0	1 files

LLVM/project 5d05e04 — offload/languages/include/kernel DefineLanguageNames.inc UndefineLanguageNames.inc, offload/languages/kernel/src LanguageRuntime.cpp

2026-08-27 21:06:44 UTC by Sophia Herrmann on ⎇

users/jellytabby/llvmoffload/llvmoffload-add-streamcreate-with-flags

add StreamCreateWithFlags

Delta		File
+26	-1	offload/languages/kernel/src/LanguageRuntime.cpp
+27	-0	offload/test/offloading/CUDA/stream_api.cu
+26	-0	offload/test/offloading/HIP/stream_api.hip
+10	-1	offload/languages/include/kernel/LanguageRuntime.h
+3	-1	offload/languages/include/kernel/UndefineLanguageNames.inc
+3	-0	offload/languages/include/kernel/DefineLanguageNames.inc
+95	-3	6 files

LLVM/project 93bd9f4 — llvm/lib/Analysis ScalarEvolution.cpp

2026-08-27 21:04:09 UTC by Florian Hahn via GitHub on ⎇

main

[SCEV] Remove unreachable visitMulExpr in SCEVCastSinkingRewriter (NFC) (#219279)

SCEVCastSinkingRewriter::visit() returns S unchanged unless S->getType()
is a pointer type. So visitMulExpr can never be entered.

Delta		File
+0	-10	llvm/lib/Analysis/ScalarEvolution.cpp
+0	-10	1 files

LLVM/project 18bd92a — clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver cuda-via-liboffload.cu

2026-08-27 21:00:31 UTC by Sophia Herrmann on ⎇

users/jellytabby/llvmoffload/llvmoffload-add-perthreaddefaultstream-var

add PerThreadDefaultStream

Delta		File
+28	-0	offload/languages/kernel/CMakeLists.txt
+14	-0	clang/test/Driver/cuda-via-liboffload.cu
+12	-0	offload/languages/kernel/src/PerThreadDefaultStream.cpp
+6	-3	offload/languages/kernel/src/State.cpp
+5	-0	clang/lib/Driver/ToolChains/CommonArgs.cpp
+1	-0	offload/languages/kernel/exports
+66	-3	6 files

LLVM/project bd63550 — offload/languages/kernel/include OffloadErrors.h State.h, offload/languages/kernel/src LanguageRuntime.cpp State.cpp

2026-08-27 20:58:59 UTC by Sophia Herrmann on ⎇

users/jellytabby/llvmoffload/llvmoffload-add-internal-stream-type

add interal StreamTy

Delta		File
+246	-89	offload/languages/kernel/src/State.cpp
+78	-37	offload/languages/kernel/include/State.h
+32	-26	offload/languages/kernel/src/LanguageRuntime.cpp
+31	-9	offload/test/offloading/CUDA/stream_api.cu
+30	-8	offload/test/offloading/HIP/stream_api.hip
+38	-0	offload/languages/kernel/include/OffloadErrors.h
+455	-169	5 files not shown
+539	-201	11 files