LLVM / project - FreshBSD

LLVM/project 0fff939 — mlir/include/mlir/Dialect/Linalg/TransformOps LinalgTransformOps.td, mlir/include/mlir/Dialect/Linalg/Transforms Transforms.h

2026-03-03 07:26:04 UTC by Adam Siemieniuk via GitHub on ⎇

main

[mlir][linalg] Lower unpack - capture handle to created copy op (#183744)

Adds missing copy op created to unpack lowering results. Corresponding
transform op is also updated with the new result value.

Delta		File
+18	-9	mlir/test/Dialect/Linalg/transform-lower-pack.mlir
+4	-3	mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
+4	-2	mlir/test/Dialect/Linalg/transform-tile-and-fuse-pack-unpack.mlir
+4	-2	mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
+2	-1	mlir/test/Integration/Dialect/Linalg/CPU/pack-unpack-mmt4d.mlir
+2	-1	mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
+34	-18	1 files not shown
+35	-18	7 files

LLVM/project 78ac964 — llvm/lib/Target/RISCV RISCVInstrInfo.cpp RISCVInstrInfoSFB.td, llvm/test/CodeGen/RISCV opt-w-instrs.mir

2026-03-03 07:08:00 UTC by quic_hchandel via GitHub on ⎇

main

[RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (#182456)

This NFC patch introduces two key updates:

- It replaces the `gpr` operand type with `sfb_rhs` for the `rhs`
operand in the short forward branch optimization pseudos. The `sfb_rhs`
type supports both register and immediate operands.
- It updates the pseudos to use branch opcodes instead of condition
codes, which were used prior to this change.

Together, these changes prepare the existing codebase to support short
forward branches that compare a register with an immediate value.
Currently, short forward branch support is limited to
register-to-register comparisons

Delta		File
+140	-29	llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+69	-45	llvm/lib/Target/RISCV/RISCVInstrInfoSFB.td
+34	-35	llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
+12	-12	llvm/lib/Target/RISCV/RISCVOptWInstrs.cpp
+6	-9	llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+4	-4	llvm/test/CodeGen/RISCV/opt-w-instrs.mir
+265	-134	3 files not shown
+277	-137	9 files

LLVM/project f67c2cd — llvm/lib/Target/RISCV RISCVVLOptimizer.cpp, llvm/test/CodeGen/RISCV/rvv vl-opt.mir fixed-vectors-shuffle-deinterleave2.ll

2026-03-03 07:05:36 UTC by Luke Lau via GitHub on ⎇

main

[RISCV] Handle Zvabd and XRivosVizip EEWs in RISCVVLOptimizer (#184117)

This allows the VL optimizer to handle more cases that
RISCVVectorPeephole currently catches.

The XRivosVizip instructions have ReadsPastVL=true, so only the vl of
the zip instruction itself is reduced, not its inputs.

Delta		File
+164	-1	llvm/test/CodeGen/RISCV/rvv/vl-opt.mir
+16	-0	llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
+2	-2	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
+2	-2	llvm/test/CodeGen/RISCV/rvv/vabd.ll
+2	-2	llvm/test/CodeGen/RISCV/rvv/vabdu.ll
+186	-7	5 files

LLVM/project 0504af9 — llvm/lib/Analysis InlineCost.cpp CmpInstAnalysis.cpp, llvm/lib/IR ConstantRange.cpp

2026-03-03 06:47:28 UTC by serge-sans-paille via GitHub on ⎇

main

[llvm] Turn misc copy-assign to move-assign (#184143)

That's an automated patch generated from clang-tidy
performance-use-std-move as a follow-up to #184136

Delta		File
+6	-6	llvm/lib/IR/ConstantRange.cpp
+6	-6	llvm/lib/Analysis/InlineCost.cpp
+6	-6	llvm/lib/Support/APFixedPoint.cpp
+5	-5	llvm/lib/Analysis/CmpInstAnalysis.cpp
+4	-4	llvm/lib/Target/X86/X86ISelLowering.cpp
+3	-3	llvm/tools/llvm-readobj/ELFDumper.cpp
+30	-30	16 files not shown
+53	-53	22 files

LLVM/project 00df973 — clang-tools-extra/clang-doc JSONGenerator.cpp, clang-tools-extra/clang-doc/assets/md namespace-template.mustache

2026-03-03 06:06:56 UTC by Erick Velez on ⎇

users/evelez7/clang-doc-markdown-mustache

review comments, format

Delta		File
+22	-25	clang-tools-extra/clang-doc/JSONGenerator.cpp
+10	-8	clang-tools-extra/test/clang-doc/namespace.cpp
+4	-10	clang-tools-extra/test/clang-doc/enum.cpp
+5	-5	clang-tools-extra/test/clang-doc/templates.cpp
+4	-4	clang-tools-extra/test/clang-doc/basic-project.mustache.test
+1	-1	clang-tools-extra/clang-doc/assets/md/namespace-template.mustache
+46	-53	1 files not shown
+47	-54	7 files

LLVM/project f9c3755 — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp

2026-03-03 05:56:10 UTC by xlauko on ⎇

users/xlauko/cir-binary-ops

[CIR] Split cir.binop into separate per-operation binary ops

LLVM lowering uses per-op patterns generated by the CIRLowering.inc TableGen
infrastructure instead of a monolithic TypeSwitch dispatch.

Delta		File
+491	-491	clang/test/CIR/CodeGenBuiltins/X86/avx512dq-builtins.c
+241	-56	clang/include/clang/CIR/Dialect/IR/CIROps.td
+124	-124	clang/test/CIR/CodeGen/complex-mul-div.cpp
+129	-106	clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+92	-92	clang/test/CIR/CodeGenBuiltins/X86/sse41-builtins.c
+73	-73	clang/test/CIR/CodeGenOpenACC/private-clause-pointer-array-recipes-CtorDtor.cpp
+1,150	-942	102 files not shown
+2,338	-2,094	108 files

LLVM/project e4def2d — llvm/test/CodeGen/AMDGPU attr-amdgpu-flat-work-group-size-vgpr-limit.ll

2026-03-03 05:52:24 UTC by Christudasan Devadasan via GitHub on ⎇

main

[AMDGPU] Make the options consistent across 3 RA pipelines(NFC) (#184190)

Adding the missing option for the wwm-regalloc in the test
attr-amdgpu-flat-work-group-size-vgpr-limit.ll. The existing
test already specifies -sgpr-regalloc=fast & -vgpr-regalloc=fast
to ensure that the fast register allocator is preferred over
the default greedy allocator. For consistency, the same
preference should also be applied to the wwm-regalloc pipeline.

Delta		File
+10	-10	llvm/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size-vgpr-limit.ll
+10	-10	1 files

LLVM/project d20395c — llvm/test/CodeGen/AArch64 clmul-fixed.ll, llvm/test/CodeGen/PowerPC clmul-vector.ll

2026-03-03 05:50:40 UTC by Craig Topper via GitHub on ⎇

main

[LegalizeVectorOps][RISCV][PowerPC][AArch64][X86] Enable the clmul/clmulr/clmulh expansion code. (#184257)

These opcodes weren't added to the master switch statement that
determines if they should be considered vector ops.

Delta		File
+11,541	-22,066	llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+2,945	-2,952	llvm/test/CodeGen/X86/clmul-vector.ll
+3,042	-2,286	llvm/test/CodeGen/PowerPC/clmul-vector.ll
+1,138	-1,324	llvm/test/CodeGen/AArch64/clmul-fixed.ll
+1,158	-1,078	llvm/test/CodeGen/X86/clmul-vector-512.ll
+1,003	-1,013	llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+20,827	-30,719	4 files not shown
+22,329	-32,404	10 files

LLVM/project 4ea39c4 — llvm/utils/lit/lit TestRunner.py LitConfig.py, llvm/utils/lit/lit/llvm config.py

2026-03-03 05:45:06 UTC by Junji Watanabe via GitHub on ⎇

main

[LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (#179865)

When building with `-DLLVM_WINDOWS_PREFER_FORWARD_SLASH=ON`, tools like
lld output paths with forward slashes on Windows. However, lit's default
substitutions (`%t`, `%p`) typically use backslashes on Windows, causing
FileCheck failures in tests that strictly match path separators.

This patch propagates the `LLVM_WINDOWS_PREFER_FORWARD_SLASH` build flag
to llvm-lit via `builtin_parameters`. It also updates lit's TestRunner
to respect the 'use_normalized_slashes' parameter. When enabled, lit
normalizes paths in substitutions to use forward slashes, ensuring that
test expectations align with the tool output.

With this fix, the number of failed tests with
`-DLLVM_WINDOWS_PREFER_FORWARD_SLASH=ON` changes as follow:

- The total number of failed tests: 303 -> 168
- Break down:
  - `Builtins-i386-windows` tests: 99 -> 0

    [9 lines not shown]

Delta		File
+40	-9	llvm/utils/lit/lit/TestRunner.py
+10	-3	llvm/utils/lit/tests/lit.cfg
+8	-0	llvm/utils/lit/lit/llvm/config.py
+5	-0	llvm/utils/llvm-lit/llvm-lit.in
+2	-0	llvm/utils/lit/lit/LitConfig.py
+1	-1	llvm/utils/lit/tests/shtest-readfile.py
+66	-13	6 files

LLVM/project 75b0cf3 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rv64p.ll

2026-03-03 05:32:23 UTC by Qihan Cai via GitHub on ⎇

main

[RISCV] Add scalar saturating add/sub operations for i32 for RV64P (#184062)

Delta		File
+37	-0	llvm/test/CodeGen/RISCV/rv64p.ll
+22	-10	llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+59	-10	2 files

LLVM/project 84d0f87 — clang/lib/Headers CMakeLists.txt

2026-03-03 05:25:08 UTC by Craig Topper via GitHub on ⎇

main

[RISCV] Alphabetize riscv_files in clang/lib/Headers/CMakeLists.txt. NFC (#184024)

Delta		File
+5	-3	clang/lib/Headers/CMakeLists.txt
+5	-3	1 files

LLVM/project 30fc31a — llvm/include/llvm/TableGen CodeGenHelpers.h

2026-03-03 05:18:00 UTC by Jaydeep Chauhan via GitHub on ⎇

main

[NFC][TableGen] Add deleted copy operations for RAII guard classes (#184168)

Delta		File
+16	-0	llvm/include/llvm/TableGen/CodeGenHelpers.h
+16	-0	1 files

LLVM/project eba4a76 — compiler-rt/test/cfi/icall bad-signature.c

2026-03-03 05:07:19 UTC by Vitaly Buka via GitHub on ⎇

main

[CFI] Expand test to include minimal runtime (#183646)

`ubsan_minimal` contains some CFI tests, but it would be nice have one
on CFI side.

Delta		File
+6	-0	compiler-rt/test/cfi/icall/bad-signature.c
+6	-0	1 files

LLVM/project da8929b — utils/bazel/llvm-project-overlay/mlir BUILD.bazel

2026-03-03 04:29:03 UTC by Jordan Rupprecht via GitHub on ⎇

main

[bazel][mlir][acc] Port e63e55cae8ce29150f38a758555d9cc712a1cf4c (#184289)

Co-authored-by: Pranav Kant <prka at google.com>

Delta		File
+4	-0	utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+4	-0	1 files

LLVM/project a85dbcf — clang/lib/AST/ByteCode Compiler.cpp

2026-03-03 04:19:29 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Reject non-VarDecl DeclRefExprs (#184141)

I have no idea how to test this, but this is what the current
interpreter does.

Delta		File
+1	-1	clang/lib/AST/ByteCode/Compiler.cpp
+1	-1	1 files

LLVM/project 5a53fce — llvm/lib/Target/RISCV RISCVMoveMerger.cpp, llvm/test/CodeGen/RISCV double-convert.ll double-mem.ll

2026-03-03 04:06:10 UTC by Kavin Gnanapandithan via GitHub on ⎇

main

[RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (#183657)

This PR addresses post-commit reviews in #182416

Previously, `RISCVMoveMerger` only identified and merged 32-bit moves
into a 64-bit GPRPair move if the even-indexed register most appeared
before the odd-index register move.

This patch extends the pass by disregarding the order of even/odd-index
pair.

Delta		File
+117	-60	llvm/lib/Target/RISCV/RISCVMoveMerger.cpp
+2	-4	llvm/test/CodeGen/RISCV/double-convert.ll
+2	-4	llvm/test/CodeGen/RISCV/double-mem.ll
+1	-2	llvm/test/CodeGen/RISCV/double-stack-spill-restore.ll
+1	-2	llvm/test/CodeGen/RISCV/double-select-fcmp.ll
+1	-2	llvm/test/CodeGen/RISCV/copysign-casts.ll
+124	-74	6 files

LLVM/project 198f85e — clang/lib/AST/ByteCode InterpBuiltin.cpp, clang/test/CodeGenCXX pfp-member-pointer-offsetof.cpp

2026-03-03 03:54:46 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Fix newly added pfp test (#184137)

Do the same thing 370d7ce58011eccfab8105eddbc028cc09c4c5e5 did in
ExprConstant.cpp

Delta		File
+1	-0	clang/test/CodeGenCXX/pfp-member-pointer-offsetof.cpp
+1	-0	clang/lib/AST/ByteCode/InterpBuiltin.cpp
+2	-0	2 files

LLVM/project b234386 — offload/test/api omp_virtual_func_multiple_inheritance_02.cpp omp_virtual_func_multiple_inheritance_01.cpp

2026-03-03 02:52:34 UTC by Jason Van Beusekom via GitHub on ⎇

main

[OpenMP][clang] Indirect and Virtual function call mapping from host to device (#159857)

This patch implements the CodeGen logic for calling __llvm_omp_indirect_call_lookup
on the device when an indirect function call or a virtual function call is made
within an OpenMP target region.
---------
Co-authored-by: Youngsuk Kim

Delta		File
+403	-0	offload/test/api/omp_virtual_func_multiple_inheritance_02.cpp
+400	-0	offload/test/api/omp_virtual_func_multiple_inheritance_01.cpp
+322	-0	offload/test/api/omp_indirect_func_struct.c
+153	-0	offload/test/api/omp_virtual_func.cpp
+124	-0	offload/test/api/omp_indirect_func_array.c
+95	-0	offload/test/api/omp_indirect_func_basic.c
+1,497	-0	14 files not shown
+1,808	-1	20 files

LLVM/project 908782f — clang/lib/Sema SemaHLSL.cpp

2026-03-03 02:50:41 UTC by Helena Kotas on ⎇

users/hekota/pr184281-res-in-structs-sema

Reorder and format

Delta		File
+47	-53	clang/lib/Sema/SemaHLSL.cpp
+47	-53	1 files

LLVM/project 572a0e4 — llvm/lib/Target/AMDGPU SIInstrInfo.cpp

2026-03-03 02:42:08 UTC by Nicolai Hähnle via GitHub on ⎇

main

AMDGPU: Remove "MBUF" from "loadMBUFScalarOperandsFromVGPR" (#184282)

There is nothing MBUF-specific about this function.

Delta		File
+11	-12	llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+11	-12	1 files

LLVM/project 6d25af0 — llvm/utils/lit/lit TestRunner.py display.py

2026-03-03 02:39:10 UTC by Henrik G. Olsson via GitHub on ⎇

main

[utils] use annotations from __future__ in lit (#184225)

Delta		File
+4	-6	llvm/utils/lit/lit/TestRunner.py
+3	-3	llvm/utils/lit/lit/display.py
+7	-9	2 files

LLVM/project 768240d — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

2026-03-03 02:11:25 UTC by Shoreshen via GitHub on ⎇

main

[AMDGPU] Insert readfirstlane for uniform VGPR arguments (#178198)

Fix inreg argument, which is uniform, but using VGPR due to run out of
SGPR.

---------

Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>

Delta		File
+84,419	-78,498	llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,751	-24,782	llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+23,663	-20,281	llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+21,867	-18,577	llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+19,112	-16,445	llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+17,646	-15,131	llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+192,458	-173,714	32 files not shown
+244,721	-216,715	38 files

LLVM/project 43a2695 — llvm/lib/Target/AMDGPU SIInstrInfo.cpp

2026-03-03 02:11:20 UTC by Nicolai Hähnle on ⎇

users/nhaehnle/spr/main/3c711dc9

AMDGPU: Remove "MBUF" from "loadMBUFScalarOperandsFromVGPR"

There is nothing MBUF-specific about this function.

commit-id:3c711dc9

Delta		File
+11	-12	llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+11	-12	1 files

LLVM/project 1a3c736 — clang/include/clang/AST HLSLResource.h, clang/include/clang/Basic Attr.td

2026-03-03 02:07:13 UTC by Helena Kotas on ⎇

users/hekota/pr184281-res-in-structs-sema

[HLSL] Add globals for resources embedded in structs

For each resource or resource array member of a struct declared
at global scope or inside a cbuffer, create an implicit global
variable of the same resource type. The variable name will be
derived from the struct instance name and the member name.

The new global is associated with the struct declaration using
a new attribute HLSLAssociatedResourceDeclAttr.

Closes #182988

Delta		File
+163	-8	clang/lib/Sema/SemaHLSL.cpp
+167	-0	clang/test/AST/HLSL/resources-in-structs.hlsl
+46	-0	clang/lib/AST/HLSLResource.cpp
+34	-0	clang/include/clang/AST/HLSLResource.h
+8	-6	clang/include/clang/Sema/SemaHLSL.h
+8	-0	clang/include/clang/Basic/Attr.td
+426	-14	3 files not shown
+440	-14	9 files

LLVM/project 99a6b3e — clang-tools-extra/clang-doc/assets/md class-template.mustache namespace-template.mustache, clang-tools-extra/test/clang-doc enum.cpp templates.cpp

2026-03-03 02:01:52 UTC by Erick Velez on ⎇

users/evelez7/clang-doc-markdown-mustache

fix conflicts and update tests

Delta		File
+4	-10	clang-tools-extra/test/clang-doc/enum.cpp
+5	-5	clang-tools-extra/test/clang-doc/templates.cpp
+1	-1	clang-tools-extra/clang-doc/assets/md/class-template.mustache
+1	-1	clang-tools-extra/clang-doc/assets/md/namespace-template.mustache
+11	-17	4 files

LLVM/project e63e55c — flang/test/Transforms/OpenACC acc-recipe-materialization-firstprivate-derived.fir, mlir/include/mlir/Dialect/OpenACC OpenACCCGOps.td

2026-03-03 01:35:22 UTC by Razvan Lupusoru via GitHub on ⎇

main

[mlir][acc] Add ACCRecipeMaterialization pass and reduction ops (#184252)

Pass
----
Add the `acc-recipe-materialization` pass, which materializes OpenACC
privatization, firstprivate and reduction recipes by inlining their
init, copy, combiner, and destroy regions into the operation for the
construct. The pass runs on acc.parallel, acc.serial, acc.kernels, and
acc.loop.

- Firstprivate: Inserts acc.firstprivate_map so the initial value is
available on the device, then clones the recipe init and copy regions
into the construct and replaces uses with the materialized alloca.
Optional destroy region is cloned before the region terminator.

- Private: Clones the recipe init region into the construct (at region
entry or at the loop op for acc.loop private). Replaces uses of the
recipe result with the materialized alloca. Optional destroy region is
cloned before the region terminator.

    [42 lines not shown]

Delta		File
+459	-0	mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
+59	-40	mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
+86	-0	mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
+66	-0	mlir/include/mlir/Dialect/OpenACC/OpenACCCGOps.td
+63	-0	mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
+60	-0	flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate-derived.fir
+793	-40	17 files not shown
+1,329	-41	23 files

LLVM/project 92aa2d3 — .github/workflows/containers/github-action-ci-windows Dockerfile

2026-03-03 01:17:06 UTC by Aiden Grossman via GitHub on ⎇

main

[Github] Respect LLVM_VERSION when building windows container (#184231)

Otherwise setting LLVM_VERSION does not actually do anything. This
avoids needing to update ~8 different locations in the file when doing a
toolchain bump to just 1 place.

Delta		File
+5	-5	.github/workflows/containers/github-action-ci-windows/Dockerfile
+5	-5	1 files

LLVM/project 52f32d7 — .github/workflows/containers/github-action-ci Dockerfile, .github/workflows/containers/github-action-ci-windows Dockerfile

2026-03-03 01:15:37 UTC by Aiden Grossman via GitHub on ⎇

main

[Github] Bump Github Runner to v2.332.0 (#184230)

To stay ahead of the support horizon. There were no major feature
changes/bug fixes from a cursory glance at the release notes.

Delta		File
+1	-1	.github/workflows/containers/github-action-ci-windows/Dockerfile
+1	-1	.github/workflows/containers/github-action-ci/Dockerfile
+2	-2	2 files

LLVM/project 8decfb8 — mlir/lib/Conversion/ArithToEmitC ArithToEmitCPass.cpp, mlir/lib/Conversion/FuncToEmitC FuncToEmitCPass.cpp

2026-03-03 01:06:23 UTC by Longsheng Mou via GitHub on ⎇

main

[mlir][emitc] Do not convert illegal types to emitc (#156222)

This PR adds fallbacks for other types instead of converting unsupported
types to emitc.

Delta		File
+8	-0	mlir/test/Conversion/ArithToEmitC/arith-to-emitc-failed.mlir
+6	-1	mlir/lib/Conversion/ArithToEmitC/ArithToEmitCPass.cpp
+6	-1	mlir/lib/Conversion/FuncToEmitC/FuncToEmitCPass.cpp
+6	-0	mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
+26	-2	4 files

LLVM/project 2407564 — clang/include/clang/Basic OpenCLExtensions.def, clang/test/SemaOpenCL extension-version.cl

2026-03-03 01:05:05 UTC by Victor Mustya via GitHub on ⎇

main

[Clang] Add missing extension cl_intel_split_work_group_barrier declaration (#184269)

All the OpenCL extensions must be declared in OpenCLExtensions.def,
otherwise the frontend won't recognize them and won't be able to use
them in the code. This patch adds the missing declaration for the
`cl_intel_split_work_group_barrier` extension.

Delta		File
+12	-0	clang/test/SemaOpenCL/extension-version.cl
+1	-0	clang/include/clang/Basic/OpenCLExtensions.def
+13	-0	2 files