Reapply "[SandboxIR] Callback registration now allows specifying order" (#221099)
This reverts commit f111407c0502851409a887c8e5dea4a3ec190d4e.
Should fix the sanitizer issue.
[CIR][OpenCL] Lower OpenCL language version metadata to LLVM dialect
Propagate CIR OpenCL language version module attributes as LLVM dialect named metadata before LLVM IR translation.
Assisted-by: Codex / GPT-5.6 Sol
fix: Supply the HIP SPIR-V version only for metadata emission
Fix the assertion exposed by PR #214246 under the version invariant from PR #219687. Supply OpenCL 2.0 in classic CodeGen and CIRGen without changing HIP language options or enabling OpenCL-only Sema restrictions.
Assisted-by: Codex / GPT-6
[CIR][OpenCL] Emit OpenCL language version metadata in CIR
Emit OpenCL and C++ for OpenCL language version attributes from CIRGen. Preserve the compatible OpenCL version and the C++ for OpenCL version separately so later lowering does not infer one from the other.
Assisted-by: Codex / GPT-5.6 Sol
[CIR][OpenCL] Add OpenCL language version module attributes
Add structured CIR module attributes for OpenCL and C++ for OpenCL language versions. Verify their module-level placement and version components so lowering can consume explicit source-language version state.
Assisted-by: Codex / GPT-5.6 Sol
[TableGen] Unique the remaining Init pools in a UniquingSet. NFC (#221394)
Follow-up to #219630. Every one of these keys is a handful of scalars,
pointers and trailing-object arrays already stored in the node, so a
typed key removes the FoldingSetNodeID serialization on every get() and
the profile rebuild on every hit.
llvm-tblgen instructions retired, minimum of five interleaved runs:
```
RISCV -gen-asm-matcher -3.492%
RISCV -gen-register-info -4.027%
X86 -gen-dag-isel -1.573%
AMDGPU -gen-subtarget -1.140%
```
Aided by Opus 5
[VPlan] Preserve branch weights from VPlan0 through to codegen. (#213143)
This patch adds support for carrying through branch weights from the
original scalar loop through VPlan.
The flow is as follows:
1. On the scalar VPlan, we import the branch weights from the existing
IR branches and add them as !prof metadata to VPInstruction terminators
2. The predicator dissolves the control flow and each block will get
executed unconditionally. What remains are predicated recipes, with
their lanes executing with probability relative to the header. Compute
the executing probabilities as sum of probabilities of all incoming
edges.
3. Each masked recipe gets the execution probability attached as custom
!vplan.execution.frequency metadata
4. When creating replicate regions, a predicated recipe is replaced by
explicit control fold. The execution frequency from the recipe is
converted to profile metadata and added to the newly introduced
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[include-cleaner] Support Objective-C literals and boxed expressions in WalkAST (#216201)
This change adds AST visitors for ObjCBoxedExpr, ObjCArrayLiteral,
ObjCDictionaryLiteral, and ObjCStringLiteral. This ensures that the
underlying class interfaces (such as NSNumber, NSArray, NSDictionary,
and NSString) and any associated categories used for these literals are
correctly reported as referenced. Unit tests are included to verify the
new behavior.
[TypePromotion] Support trunc-to-i1 conditions (#216311)
InstCombine may rewrite `icmp ne (X & 1), 0` to `trunc X to i1`
(#178977). Start TypePromotion searches from operands of scalar
trunc-to-i1 instructions, treating the trunc as a boolean boundary
without promoting its result or traversing its users.
Assisted-by: AI
[Support] Fix -Wunused-template from debugString
This is not used in the header (outside of a non-instantiated template),
so triggers -Wunused-template. Move it into the class definition to
prevent this without adding any namespace pollution.
Reviewers: MaskRay, kazutakahirata
Pull Request: https://github.com/llvm/llvm-project/pull/221478
[lldb] Add a fuzzing dictionary for lldb-target-fuzzer (#221348)
target.dict gives the mutator the magic bytes and required keys for
every object file format. Without a seed dictionary, blind mutation
essentially never lands the exact multi-byte magic these formats gate
on.
Assisted-by: claude
[MemProf][Docs] Add more information on static data partitioning (#220446)
Clarify some sentences that I found hard to parse. Also update the docs
now that a linker script is no longer required.
[SLP][AMDGPU][NFC] Remove unreachable GFX940/GFX941 checks (#220745)
`inst-count-heuristic.ll` only runs
`-check-prefix=GFX950/GFX942/GFX906;` the `GFX941/GFX940 CHECK` blocks
had no matching `RUN` line and were never executed.
[CI][Github] Hash-pin AArch64 CI image (#221475)
Otherwise we end up picking up the latest version of the image that uses
clang 23 which causes issues. This also is security best practice as
described in our security best practices doc.
Fixes #221470.
[SandboxVec][VecUtils] Introduce DeadInstrMorgue
Move dead instructions collector and erasor into VecUtils, so that
it is usable by both, BundleVec and LoadStoreVec, vectorizers. NFC
[mlir][tblgen] Prune unused filterForDialect template [-Wunused-template] (#221422)
`filterForDialect` lost its last caller in 4957518ef57f (May 2022) and
has been dead since. It is a static file-scope function template, so
`-Wunused-template` flags it and `-Werror` builds fail. Removing it also
orphans the `DialectFilterIterator` alias and the `llvm::Record`
using-declaration, which nothing else references, so this drops all
three.
Co-authored-by: Henrich Lauko <hlauko at nvidia.com>
[RegAllocFast] Document the allocation algorithm. NFC (#219835)
Add a file-level overview: block-local allocation, a stack slot for
every value crossing a block boundary, no liveness analysis or coalescing,
and a backward walk where uses acquire registers and defs release them.
Correct two stale claims: RegUnitStates is indexed by register unit, not
by physical register, and allocateInstruction() runs eight phases rather
than the two its comment described.
Drop a redundant local in reloadAtBegin(), and assert the def operand
that isTiedToNotUndef() documents.
Aided by Opus 5
