LLVM/project 26c9598lldb/test/API/lang/objc/objc-ivar-protocols main.m

[lldb] Fix TestIvarProtocols to use +new instead of +alloc (NFC) (#172740)

A test failure on green dragon shows the ivars with unexpected values.
This makes the test us an explicit `+new` instead of `+alloc` (which is
missing an `-init` call).
DeltaFile
+1-1lldb/test/API/lang/objc/objc-ivar-protocols/main.m
+1-11 files

LLVM/project 534f334clang/include/clang/Basic DiagnosticDriverKinds.td, clang/include/clang/Driver Driver.h

Revert "Reland [clang][modules-driver] Add scanner to detect C++20 module presence (#153497)" (2nd Attempt) (#172701)

DeltaFile
+0-192clang/test/Driver/modules-driver-cxx20-module-usage-scanner.cpp
+0-66clang/lib/Driver/Driver.cpp
+0-50clang/lib/Lex/DependencyDirectivesScanner.cpp
+0-32clang/include/clang/Driver/Driver.h
+0-7clang/include/clang/Lex/DependencyDirectivesScanner.h
+0-7clang/include/clang/Basic/DiagnosticDriverKinds.td
+0-3542 files not shown
+0-3628 files

LLVM/project 0f41390llvm/test/CodeGen/AArch64 fmla.ll sve-streaming-mode-fixed-length-fp-arith.ll, llvm/test/CodeGen/NVPTX shift-opt.ll

Merge branch 'main' into refactor-getDistributeLayoutAttr-fix
DeltaFile
+259-123llvm/test/CodeGen/RISCV/half-arith.ll
+379-0llvm/test/CodeGen/NVPTX/shift-opt.ll
+185-185llvm/test/CodeGen/AArch64/fmla.ll
+160-160llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-arith.ll
+276-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
+130-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-exp.ll
+1,389-468131 files not shown
+2,466-1,224137 files

LLVM/project 769f703mlir/test/Dialect/XeGPU propagate-layout-subgroup.mlir

change test case
DeltaFile
+0-2mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+0-21 files

LLVM/project 0880c64llvm/test/CodeGen/AArch64 fmla.ll sve-streaming-mode-fixed-length-fp-arith.ll, llvm/test/CodeGen/AMDGPU fcopysign.bf16.ll fcopysign.f16.ll

Merge branch 'main' into users/makslevental/reapplymathtoapfloat
DeltaFile
+873-0llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
+692-0llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
+259-123llvm/test/CodeGen/RISCV/half-arith.ll
+379-0llvm/test/CodeGen/NVPTX/shift-opt.ll
+185-185llvm/test/CodeGen/AArch64/fmla.ll
+160-160llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-arith.ll
+2,548-468202 files not shown
+6,188-2,225208 files

LLVM/project 328fa8eclang/include/clang/Sema Sema.h, clang/lib/Parse ParseExpr.cpp

do not translate unevaluated strings
DeltaFile
+9-0clang/test/CodeGen/systemz-charset-diag.cpp
+1-2clang/lib/Parse/ParseExpr.cpp
+1-1clang/include/clang/Sema/Sema.h
+11-33 files

LLVM/project 2824225lld/COFF Driver.cpp, lld/test/COFF export-all.s exclude-all.s

[LLD] [COFF] Fix implicit DLL entry point for MinGW (#171680)

Previously, LLD would always set the implicit entry point for DLLs to
the symbol that is prefixed with an underscore. However, mingw-w64
defines it without that underscore.

This change fixes that by adding a special branch for MinGW. Also, it
simplifies tests that use MinGW style DLL entry symbol by skipping the
entry point argument.

Note, tests that use MSVC style DLL entry symbol and LLD in MinGW mode,
will now require using explicit entry point. I believe this is sensible.
When an explicit entry point is passed, i.e. LLD is called by Clang or
GCC, there will be no observable difference.

Fixes https://github.com/llvm/llvm-project/issues/171441
DeltaFile
+9-2lld/COFF/Driver.cpp
+4-4lld/test/COFF/export-all.s
+2-2lld/test/COFF/exclude-all.s
+1-1lld/test/COFF/autoimport-arm64-code.s
+1-1lld/test/COFF/autoimport-arm64-data.s
+1-1lld/test/COFF/autoimport-debug.s
+18-116 files not shown
+24-1712 files

LLVM/project 21fd8ccllvm/include/llvm/ADT STLExtras.h, llvm/unittests/ADT STLExtrasTest.cpp

Make STLExtras's (all|any|none)_of() Utility Functions Constexpr-Friendly (#172536)

This patch replaces the implementation of `llvm::all_of`,
`llvm::any_of`, and `llvm::none_of` with simple loops instead of their
corresponding `std` versions. This makes them possible to be evaluated
at compile time for the time being. We can revisit once the C++ version
of LLVM is promoted to C++20.
https://en.cppreference.com/w/cpp/algorithm/all_any_none_of.html

This refactor was brought up in the context of this PR:
https://github.com/llvm/llvm-project/pull/172062#discussion_r2615331513
DeltaFile
+17-8llvm/include/llvm/ADT/STLExtras.h
+19-0llvm/unittests/ADT/STLExtrasTest.cpp
+36-82 files

LLVM/project 727e2fellvm/lib/Analysis ValueTracking.cpp

Reorder amdgcn_exp2 special case
DeltaFile
+5-4llvm/lib/Analysis/ValueTracking.cpp
+5-41 files

LLVM/project 014355fllvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-exp.ll

ValueTracking: Handle amdgcn_exp2 in computeKnownFPClass

The base exp handling looks pretty incomplete.
DeltaFile
+24-24llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-exp.ll
+6-1llvm/lib/Analysis/ValueTracking.cpp
+30-252 files

LLVM/project 33d7cd6llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-exp.ll

ValueTracking: Add baseline test for amdgcn_exp2 handling (#172494)

DeltaFile
+130-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-exp.ll
+130-01 files

LLVM/project cc1ade5llvm/test/CodeGen/AMDGPU fcopysign.bf16.ll fcopysign.f16.ll, llvm/test/CodeGen/RISCV short-forward-branch-opt-load.ll short-forward-branch-opt-load-atomic-acquire-seq_cst.ll

Merge branch 'main' into refactor-getDistributeLayoutAttr
DeltaFile
+6,871-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-load.ll
+3,834-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-load-atomic-acquire-seq_cst.ll
+873-0llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
+417-417llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
+394-394llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
+692-0llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
+13,081-811476 files not shown
+24,435-6,398482 files

LLVM/project cedd8e5llvm/lib/Analysis ValueTracking.cpp

reorder flush case above recursion
DeltaFile
+4-4llvm/lib/Analysis/ValueTracking.cpp
+4-41 files

LLVM/project eaea30bllvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-log.ll

ValueTracking: Handle amdgcn_log in computeKnownFPClass
DeltaFile
+48-48llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
+7-4llvm/lib/Analysis/ValueTracking.cpp
+55-522 files

LLVM/project 3734acellvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-log.ll

ValueTracking: Add baseline test for nofpclass handling of amdgcn_log (#172491)

DeltaFile
+276-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
+276-01 files

LLVM/project f0f763bllvm/lib/Analysis ValueTracking.cpp

reorder flush case above recursion
DeltaFile
+4-4llvm/lib/Analysis/ValueTracking.cpp
+4-41 files

LLVM/project dd9efd6mlir/include/mlir/Dialect/XeGPU/IR XeGPUOps.td, mlir/include/mlir/Dialect/XeGPU/Utils XeGPUUtils.h

Revert "[MLIR][XeGPU] Refactor Layout access interface  (#172125)"

This reverts commit 2b9e47749ca1eb337ea26b8084dad52732dc7186.
DeltaFile
+65-182mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
+79-73mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
+12-109mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
+57-63mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
+47-59mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
+48-36mlir/lib/Dialect/XeGPU/Transforms/XeGPUSubgroupDistribute.cpp
+308-52221 files not shown
+517-78827 files

LLVM/project 009c8a8llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-log.ll

ValueTracking: Handle amdgcn_log in computeKnownFPClass
DeltaFile
+48-48llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
+7-4llvm/lib/Analysis/ValueTracking.cpp
+55-522 files

LLVM/project 46a6eebllvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-log.ll

ValueTracking: Add baseline test for nofpclass handling of amdgcn_log
DeltaFile
+276-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-log.ll
+276-01 files

LLVM/project ad5a02allvm/lib/ExecutionEngine/Orc Core.cpp

[ORC] Rewrite loop to use structured bindings. NFCI. (#172631)

DeltaFile
+7-7llvm/lib/ExecutionEngine/Orc/Core.cpp
+7-71 files

LLVM/project a587ccdllvm/test/CodeGen/AArch64 fmla.ll sve-streaming-mode-fixed-length-fp-arith.ll, llvm/test/CodeGen/ARM fp16-promote.ll

fix `llvm.fma.f16` double rounding issue when there is no native support (#171904)

fixes https://github.com/llvm/llvm-project/issues/98389

As the issue describes, promoting `llvm.fma.f16` to `llvm.fma.f32` does
not work, because there is not enough precision to handle the repeated
rounding. `f64` does have sufficient space. So this PR explicitly
promotes the 16-bit fma to a 64-bit fma.

I could not find examples of a libcall being used for fma, but that's
something that could be looked in separately to work around code size
issues.
DeltaFile
+259-123llvm/test/CodeGen/RISCV/half-arith.ll
+185-185llvm/test/CodeGen/AArch64/fmla.ll
+160-160llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-arith.ll
+67-22llvm/test/CodeGen/RISCV/half-intrinsics.ll
+51-31llvm/test/CodeGen/ARM/fp16-promote.ll
+32-24llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
+754-54513 files not shown
+916-65619 files

LLVM/project 5587600llvm/include/llvm/ExecutionEngine/Orc ExecutorProcessControl.h, llvm/include/llvm/ExecutionEngine/Orc/Shared WrapperFunctionUtils.h

[ORC] Rename WrapperFunctionResult to WrapperFunctionBuffer. NFCI. (#172633)

Also renames CWrapperFunctionResult to CWrapperFunctionBuffer.

These types are used as argument buffers, as well as result buffers. The
new name better reflects their purpose, and is consistent with naming in
the new ORC runtime (llvm-project/orc-rt).
DeltaFile
+62-62llvm/include/llvm/ExecutionEngine/Orc/Shared/WrapperFunctionUtils.h
+22-22llvm/unittests/ExecutionEngine/Orc/WrapperFunctionUtilsTest.cpp
+11-11llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
+10-10llvm/lib/ExecutionEngine/Orc/TargetProcess/SimpleRemoteEPCServer.cpp
+10-10llvm/lib/ExecutionEngine/Orc/TargetProcess/OrcRTBootstrap.cpp
+7-7llvm/unittests/ExecutionEngine/Orc/EPCGenericMemoryAccessTest.cpp
+122-12229 files not shown
+206-20635 files

LLVM/project b6d06deflang-rt/include/flang-rt/runtime work-queue.h, flang-rt/lib/runtime derived.cpp

Revert "[flang][cuda] Add support for derived-type initialization on device" (#172737)

Reverts llvm/llvm-project#172568 this cause some build bots failures.
DeltaFile
+17-17flang/test/Lower/allocatable-polymorphic.f90
+0-27flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
+9-9flang/test/Lower/volatile-allocatable.f90
+7-11flang-rt/include/flang-rt/runtime/work-queue.h
+15-0flang/test/Lower/CUDA/TODO/cuda-allocate-default-init.cuf
+6-7flang-rt/lib/runtime/derived.cpp
+54-7124 files not shown
+113-15130 files

LLVM/project b6bfa85llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

[aarch64] Mix the frame pointer with the stack cookie when protecting the stack (#161114)

This strengthens the guard and matches MSVC.

Fixes #156573 .
DeltaFile
+69-36llvm/test/CodeGen/AArch64/mingw-refptr.ll
+19-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+15-0llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+6-6llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+12-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+5-5llvm/include/llvm/CodeGen/TargetLowering.h
+126-479 files not shown
+156-5915 files

LLVM/project e691dbdflang/include/flang/Parser parse-tree.h

[flang][OpenMP] Move some class definitions into right place, NFC

They were accidentally committed out of the alphabetical order.
DeltaFile
+34-34flang/include/flang/Parser/parse-tree.h
+34-341 files

LLVM/project 8ea8264llvm/lib/Target/SPIRV SPIRVCallLowering.cpp, llvm/test/CodeGen/SPIRV function-alias-non-interposable.ll function-alias-interposable.ll

[SPIRV] Add support for non-interposable function aliases

This patch implements support for calling functions through
non-interposable aliases in the SPIRV backend. When a call target
is a GlobalAlias, the alias is resolved to its underlying aliasee
object before code generation (when possible).

Interposable aliases are explicitly not supported yet and will cause
compilation to fail. This was not supported prior to this patch.

Tests added for both the supported non-interposable case and the
unsupported interposable case.
DeltaFile
+55-5llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp
+22-0llvm/test/CodeGen/SPIRV/function-alias-non-interposable.ll
+15-0llvm/test/CodeGen/SPIRV/function-alias-interposable.ll
+92-53 files

LLVM/project bab0dc4clang/test/Frontend optimization-remark-options.c, llvm/lib/Transforms/Vectorize LoopVectorize.cpp

Reapply "[LV] Mark checks as never succeeding for high cost cutoff."

Reapply 8a115b6934a90441 with an update to tests handling remarks.

The patch now directly emits a clear remark when we bail out
due to the memory check threshold.

Original message:
When GeneratedRTChecks::create bails out due to exceeding the cost
threshold, no runtime checks are generated and we must not proceed
assuming checks have been generated.

Mark the checks as never succeeding, to make sure we don't try to
vectorize assuming the runtime checks hold. This fixes a case where we
previously incorrectly vectorized assuming runtime checks had been
generated when forcing vectorization via metadate.

Fixes the mis-compile mentioned in
https://github.com/llvm/llvm-project/pull/166247#issuecomment-3631471588
DeltaFile
+14-25llvm/test/Transforms/LoopVectorize/runtime-check-threshold-with-force-metadata.ll
+16-3llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+3-3llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
+1-1clang/test/Frontend/optimization-remark-options.c
+34-324 files

LLVM/project db1fd3fclang/lib/DependencyScanning DependencyScannerImpl.cpp, clang/lib/Interpreter Interpreter.cpp

[clang] Remove pointless `hasDiagnostics()` checks (#172705)

Calling `CompilerInstance::hasDiagnostics()` after
`CompilerInstance::createDiagnostics()` is pointless, since the creation
step cannot fail. This removes such calls.
DeltaFile
+6-12clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+2-7clang/lib/Tooling/Tooling.cpp
+3-3clang/unittests/Frontend/CompilerInstanceTest.cpp
+0-4clang/lib/Interpreter/Interpreter.cpp
+0-4clang/unittests/Tooling/DependencyScannerTest.cpp
+0-2clang/unittests/Frontend/CodeGenActionTest.cpp
+11-323 files not shown
+12-379 files

LLVM/project f09f578llvm/lib/Target/NVPTX NVPTXISelLowering.cpp NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX shift-opt.ll

[NVPTX][DagCombiner] Eliminate guards on shift amount because PTX shifts automatically clamp (#172431)

Transform patterns like:

`(select (ugt shift, BitWidth-1), 0, (srl/shl x, shift))`
`(select (ult shift, BitWidth), (srl/shl x, shift), 0)`

Into:

`(srl/shl x, shift)`

These patterns arise from C/C++ code like shift >= 32 ? 0 : x >> shift
which guards against undefined behavior. PTX shr/shl instructions clamp
shift amounts >= BitWidth to produce 0 for logical shifts, making the
guard redundant.
DeltaFile
+379-0llvm/test/CodeGen/NVPTX/shift-opt.ll
+66-7llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+9-0llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+454-73 files

LLVM/project 5210803libc/src/stdio/baremetal vfprintf_internal.h

[libc] Cast the error value to int (#172724)

The negative value represents an error and we already use cast in this
scenario elsewhere.
DeltaFile
+1-1libc/src/stdio/baremetal/vfprintf_internal.h
+1-11 files