Reapply "[VPlan] Run removeDeadRecipes early." (#195325) (#195445)
This reverts commit 2a9699ccd128d7f94372d18c97229e1934b8506e.
Recommit contains a small fix for skipping dead recipes when finding
induction casts.
Original message:
The initial simplifyRecipes run can leave dead recipes, which
removeDeadRecipes can clean up, similar for dead instructions in the
input.
PR: https://github.com/llvm/llvm-project/pull/190191
[MLIR] Add HasAncestor op trait
Add HasAncestor/AncestorOneOf traits that verify an operation has a
specific ancestor anywhere in the parent chain, unlike HasParent which
only checks the immediate parent. This enables declarative verification
for ops that can be nested arbitrarily deep inside a required ancestor.
[NFC][LLVM] Simplify `PruningFunctionCloner::cloneInstruction` (#195389)
Add early returns and decrease indendation of the code that does
implements calls to constrained intrinsics.
[VPlan] Simplify extract-lane of all single-scalars (#194838)
Checking against vputils::isSingleScalar is sufficient for both
correctness and profitability.
[Clang-Tidy] Skip `misc-unused-parameters` in macro. (#194999)
The new parameter allows to skip the check for the cases when we need to
use the macro, but there is no immediate way to fix the macro itself. It
recently come up with a gradual adoption of clang-tidy and not all parts
of the code could be fixed at once.
Simply enabling it using `clang-tidy-diff` is not enough, since
`misc-unused-parameters` would cause false-positive, since the given
diff didn't introduce the unused parameters and might be not easy to
change.
The given parameters allow for better incremental adoption.
---------
Co-authored-by: Dmitrii Kuragin <dkuragin at adobe.com>
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
[InstCombine] Add user-count bailout to isAllocSiteRemovable (#190347)
isAllocSiteRemovable() walks all transitive users of an alloc site, but
sites with many users are almost never removable. Profiling on
real-world codegen workloads (73,943 alloc sites) showed:
- 89 removable sites, max 1,392 users walked
- 73,854 non-removable sites, avg 31,305 users walked
- 2.31B total wasted user visits (~400s wall-clock on a 35-min build)
Skip the removability analysis when direct user count exceeds a
configurable threshold (default 2048, tunable via hidden cl::opt
-instcombine-max-allocsite-removable-users).
Also defer WeakTrackingVH conversion: collect into Instruction* first
and convert only when the site is actually removable.
[libc][math] Refactor fmul-fsub-frexp family to header-only (#195431)
Refactors the fmul-fsub-frexp math family to be header-only.
part of: #147386
Target Functions:
- fmul
- fmulf128
- fmull
- fsub
- fsubf128
- fsubl
- frexp
- frexpbf16
- frexpl
Co-authored-by: Muhammad Bassiouni <60100307+bassiounix at users.noreply.github.com>
[llvm] Add support for atomicrmw and cmpxchg in AssumeBundleBuilder (#194630)
The assume builder currently only preserves dereferenceable, nonnull,
and alignment knowledge for regular load/store instructions and calls.
Atomic memory accessing instructions (atomicrmw and cmpxchg) also
dereference their pointer operands, but were previously skipped, causing
useful knowledge to be lost across these operations.
Add handling for AtomicRMWInst and AtomicCmpXchgInst in
AssumeBuilderState::addInstruction(), using the same addAccessedPtr()
path as loads and stores. The accessed type is taken from the value
operand (atomicrmw) or compare operand (cmpxchg), which corresponds to
the in-memory element type, and the alignment is taken from the
instruction's explicit alignment.
Add a test to verify that assume bundles are correctly generated before
atomicrmw and cmpxchg instructions.
---------
Co-authored-by: Nikita Popov <github at npopov.com>
[RISCV][CodeGen] Add initial vzip codegen support (#194548)
Add initial support for vzip instruction, which is included in zvzip
extension. It is used to lower VECTOR_SHUFFLE with interleave pattern
and VECTOR_INTERLEAVE.
[CIR] Add RegionBranchOpInterface unit tests and fix control flow bugs
Add unit tests for RegionBranchOpInterface implementations across CIR
control flow operations: IfOp, ScopeOp, TernaryOp, SwitchOp, WhileOp,
ForOp, DoWhileOp, and TryOp. The tests verify successor regions,
terminator successors, loop detection, repetitive region marking, and
op/terminator successor consistency.
Fix a missing return in ConditionOp::getSuccessorRegions that caused
fallthrough from the loop case to an unconditional cast<AwaitOp>,
crashing when the parent is a loop operation.
Fix IfOp::getSuccessorRegions to report parent exit as a successor
when the else region is absent, correctly modeling the case where the
condition is false.
[X86][AVX10.2] Use SDNode patterns based lowering for VMINBF16/VMAXBF16 (#194987)
This PR adds direct SDNode-based selection for AVX10.2 BF16 vmin/vmax.
This unblocks the select-minmax DAG combine which would earlier hit a
selection failure.
Update Android CI and Emulator image to API 23 (#194936)
As seen in https://github.com/android/ndk/issues/2188, NDK will raise
minimum supported version to API 23 (Android 6.0) in r31. We need to
bump the API level for the x86 emulator image so we can use it for the
CI. It required generating a new ABI list for API 23 and removing the
old API 21 and making some changes to adb_run.py to filter out warnings
and get permissions for the adb run folder.
[libc][math] Refactor fmaximum-mag-num-fminimum-mag-num family to header-only (#195415)
Refactors the fmaximum-mag-num-fminimum-mag-num math family to be
header-only.
part of: #147386
Target Functions:
- fmaximum_mag_numf128
- fmaximum_mag_numf16
- fmaximum_mag_numl
- fminimum_mag_num
- fminimum_mag_numbf16
- fminimum_mag_numf
- fminimum_mag_numf128
- fminimum_mag_numf16
- fminimum_mag_numl
[SLP] Keep loops BTCs across CurrentLoopNest truncations
Record SCEV BTCs in a per-depth vector so a later loop nest reaching a
previously merged depth via the empty, divergence, or extend branch in
buildTreeRec is re-validated.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/195411
[Instrumentor] Add unreachable support; unreachable stack trace printing
Allow to instrument unreachable and provide a use case for stack trace
printing.
