LLVM/project 70bb6ad — llvm/include/llvm/Target TargetSubtarget.td, llvm/test/TableGen AsmPredicateCombining.td

TableGen: Add none_of for negating features in AssemblerPredicate

AssemblerPredicates are currently specified with "all_of", "any_of",
and then "not" as the odd one out. The use of these operators relies
on the "forward declaration" of not, which is not a language feature
tablegen has. This "not" operator isn't actually the same empty record
as all_of/any_of, and is in fact usually supplied by the PatFrag to
match xor -1 in from TargetSelectionDAG.td. The predicate parser just
special cases the name.

Introduce none_of to go with the other predicate operators, which is
more consistent and expressive. This will help cleanup some tablegen
include dependencies, like avoiding redeclaring not in every target's
TargetParser generation.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+18-1llvm/utils/TableGen/Basic/PredicateExpanderDag.cpp
+7-6llvm/utils/TableGen/Basic/PredicateExpanderDag.h
+13-0llvm/test/TableGen/AsmPredicateCombining.td
+4-2llvm/include/llvm/Target/TargetSubtarget.td
+2-2llvm/utils/TableGen/Common/SubtargetFeatureInfo.cpp
+2-1llvm/utils/TableGen/AsmWriterEmitter.cpp
+46-121 files not shown
+47-137 files

LLVM/project a8797d6 — clang/tools/clang-ssaf-driver/lib/clang_ssaf_driver options.py source_edits.py, clang/tools/clang-ssaf-driver/tests test_make_orchestrator.py test_source_edits.py

Clang ssaf driver 4 (#231999)

Add a tool that runs a source transformation over a project as it builds
    and presents the result. It knows which summaries and which
whole-program analysis each transformation needs, so a user names only
    the transformation and the build command; cpp-bounded-buffers is the
    first. It drives projects built with make through
    clang-ssaf-orchestrator-make. 

The driver writes the link unit's source edits as a patch, and prints
the transformation report the way a compiler prints diagnostics as well
as writing it as SARIF. A merge resolves only the conflicts among its
own inputs, so an edit that overlaps a reported conflict is left out of
    the patch. With --apply the driver also applies the edits with
    clang-apply-replacements, which it looks for before the build, and
    checks that the sources end up as the patch shows them.

    This is a generalization of a tool that we
    proposed earlier - clang-reforge. We want to build a general-purpose
    analysis and transformation driver decoupled from the specifics.
DeltaFile
+237-0clang/tools/clang-ssaf-driver/tests/test_patch.py
+204-0clang/tools/clang-ssaf-driver/tests/test_report.py
+186-0clang/tools/clang-ssaf-driver/lib/clang_ssaf_driver/source_edits.py
+171-0clang/tools/clang-ssaf-driver/tests/test_source_edits.py
+159-0clang/tools/clang-ssaf-driver/lib/clang_ssaf_driver/options.py
+137-0clang/tools/clang-ssaf-driver/tests/test_make_orchestrator.py
+1,094-030 files not shown
+2,748-036 files

LLVM/project 6efd62d — libcxx/include/__algorithm pstl.h, libcxx/include/__atomic atomic_ref.h atomic.h

[libc++] Remove redundant `_LIBCPP_HIDE_FROM_ABI` from detail headers a-c (#201722)

This is the first bulk-removal patch of `_LIBCPP_HIDE_FROM_ABI`. While
this is something we could do over time, actively removing the redundant
annotations significanly improves readability, and QoI.
This happens in a few patches to keep the size somewhat manageable.
DeltaFile
+163-188libcxx/include/__atomic/atomic.h
+124-139libcxx/include/__algorithm/pstl.h
+70-102libcxx/include/__chrono/year_month_day.h
+67-93libcxx/include/__chrono/year_month_weekday.h
+64-70libcxx/include/__atomic/atomic_ref.h
+58-74libcxx/include/__chrono/duration.h
+546-666278 files not shown
+2,066-2,605284 files

LLVM/project ed1cc5b — clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/test/Sema/LifetimeSafety safety.cpp

[LifetimeSafety] Propagate origins through BaseToDerived casts (#231896)

In addition to what the title says, I added a few tests demonstrating
the pre-existing origin shape mismatch detection and borrow drop
behavior.

Assissted-By: claude
DeltaFile
+70-0clang/test/Sema/LifetimeSafety/safety.cpp
+3-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+73-02 files

LLVM/project a63282e — llvm/test/CodeGen/AMDGPU fptosi-sat-vector.ll amdgcn.bitcast.320bit.ll

[AMDGPU] Materialize WMMA SGPR scales to VGPRs before scheduling

v_wmma_scale scale operands accept an SGPR or a VGPR. On GFX12,
depctr_va_ssrc is a 1-deep counter, so each VALU instruction that reads
an SGPR scale takes the only scalar-source slot. A run of WMMA ops that
all read SGPR scales therefore serializes. One cross-bank copy pays for
that slot once; later WMMA ops then read a VGPR and no longer contend
for va_ssrc.

SIMaterializeWMMAScale runs at the end of the machine SSA optimizations,
after SIShrinkInstructions and before scheduling. It is skipped at -O0
and on targets older than GFX12. GFX1250 is included: the separate VALU
read-after-write hazard no longer applies there, but the dependency
counter still does.

The pass walks every WMMA that has scale_src0 and records virtual SGPR
uses of scale_src0 and scale_src1, grouped by register. Physical
registers and subregister uses are left alone. For each SGPR it inserts
a COPY into a low aligned VGPR (the lo256 class matching the scale's

    [22 lines not shown]
DeltaFile
+4,158-3,987llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,125-963llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+847-631llvm/test/CodeGen/AMDGPU/calling-conventions.ll
+591-492llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+388-360llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
+231-187llvm/test/CodeGen/AMDGPU/fptosi-sat-vector.ll
+7,340-6,62032 files not shown
+8,782-7,34738 files

LLVM/project 4dc9557 — clang/lib/CIR/CodeGen CIRGenStmtOpenMP.cpp, clang/test/CIR/CodeGenOpenMP not-yet-implemented.c distribute.c

[CIR][OpenMP] Add initial support for distribute

This patch adds initial support for the OpenMP 'distribute' directive. Basic
code generation for the standalone and combined cases is introduced. Support
for clauses will be added in the future. The composite 'teams distribute
parallel for' form will be added in a subsequent patch.

Assisted-by: Cursor / Claude Sonnet 5 High
DeltaFile
+160-27clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
+95-0clang/test/CIR/CodeGenOpenMP/target-teams-distribute.c
+60-0clang/test/CIR/CodeGenOpenMP/distribute.c
+12-0clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
+327-274 files

LLVM/project 9d55474 — llvm/include/llvm/Analysis TargetTransformInfo.h, llvm/lib/Target/RISCV RISCVTargetTransformInfo.h RISCVTargetTransformInfo.cpp

 [SLP][TTI][RISCV] Update BuildVectorUseOp to support intrinsics (#231400)

Allows TTI::getBuildVectorContextHint() to in turn handle splats feeding intrinsics.

Addresses #231116.

AI Usage: Assisted by Codex
DeltaFile
+33-30llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+10-14llvm/test/Transforms/SLPVectorizer/RISCV/iss231116.ll
+7-4llvm/include/llvm/Analysis/TargetTransformInfo.h
+6-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+2-2llvm/test/Transforms/SLPVectorizer/RISCV/intrinsic-splat-operands.ll
+2-1llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+60-526 files

LLVM/project d731613 — llvm/include/llvm/Option LibraryOptions.h, llvm/include/llvm/Support CommandLine.h LibraryOptionsContext.h

[Support][IR] Set library options per LLVMContext (#231407)

`OptionsStruct<..., perContext = true>` lets each LLVMContext hold its
own values of a library's options, so that two contexts in one process
can compile with different values. The static member `Global` becomes
private, and readers call `Ctx.getLibraryOptions().get<T>()`, which
returns the context's copy, (temporary fallback) or `Global` if it has
none. InstCombine and Vectorize are the first such libraries.
SandboxVectorizerPass builds its pipeline from the options of the first
context it runs in.

The new cl::parseCommandLineOptions sets per-context libraries' options
in the given cl::LibraryOptionsContext instead of Global. opt parses
into its LLVMContext; clang -cc1 parses -mllvm into its CompilerInstance
and assigns the arguments to the code generation LLVMContext at each
input. An embedder calls assign({"-x=v"}), which dispatches through the
cl:: registry.


https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877
LLM-aided
DeltaFile
+81-21llvm/lib/Support/CommandLine.cpp
+65-0llvm/unittests/IR/LibraryOptionsContextTest.cpp
+62-0llvm/include/llvm/Support/LibraryOptionsContext.h
+47-7llvm/unittests/Option/LibraryOptionsTest.cpp
+23-13llvm/include/llvm/Option/LibraryOptions.h
+30-5llvm/include/llvm/Support/CommandLine.h
+308-4641 files not shown
+501-9847 files

LLVM/project 60994af — clang/docs ReleaseNotes.md, clang/lib/CodeGen/Targets NVPTX.cpp

[Clang] [CUDA] Fix calling convention for forward-declared kernels (#231628)

The calling convention was not being set properly, leading to linker
errors in nvlink. We already set the calling convention this way for
AMDGPU, so do the same for NVPTX.

Fixes #118212.

Assisted-by: Codex
DeltaFile
+41-0clang/test/CodeGenCUDA/kernel-declarations.cu
+5-2clang/lib/CodeGen/Targets/NVPTX.cpp
+2-0clang/docs/ReleaseNotes.md
+48-23 files

LLVM/project e3eaf33 — flang/lib/Lower/OpenMP Clauses.cpp ClauseProcessor.cpp, flang/test/Lower/OpenMP iterator-ranges.f90

Select map and motion iterators from source references

Map and motion locators chose their iterator ranges from the folded
designator, so a reference such as a(0*i + 1) lost its iterator and was
mapped unconditionally, even when the range was empty.

Build Map, To and From locator lists with the source iterator references
already used for AFFINITY and DEPEND, and select each locator's ranges from
them. Locators without an iterator modifier are unchanged.
DeltaFile
+21-0flang/test/Lower/OpenMP/iterator-ranges.f90
+2-10flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+6-3flang/lib/Lower/OpenMP/Clauses.cpp
+29-133 files

LLVM/project 594c1eb — flang/lib/Lower/OpenMP ClauseProcessor.cpp Utils.cpp, flang/test/Lower/OpenMP iterator-ranges.f90 declare-mapper-iterator.f90

[flang][OpenMP] Lower iterator modifiers in map and motion clauses

Add iterator lowering for `target data`, `target enter/exit data`,
`target update`, and map clauses inside `declare mapper`.

For example:

```fortran
!$omp target update to(iterator(i=1:n): a(i), b)
```

Conceptually, this becomes:

```text
entries = omp.iterator(i = 1 through n) {
  yield map_info(base = a, bounds = element i)
}
target_update(iterated_maps = entries, ordinary_maps = [b])
```

    [37 lines not shown]
DeltaFile
+910-0flang/test/Lower/OpenMP/motion-iterator.f90
+277-0flang/test/Lower/OpenMP/declare-mapper-iterator.f90
+187-0flang/lib/Lower/OpenMP/Utils.cpp
+159-13flang/lib/Lower/OpenMP/ClauseProcessor.cpp
+160-0flang/test/Lower/OpenMP/iterator-ranges.f90
+112-13mlir/test/Target/LLVMIR/openmp-iterator.mlir
+1,805-2628 files not shown
+2,415-14534 files

LLVM/project 15f33a6 — llvm/lib/Target/NVPTX NVPTXISelLowering.cpp, llvm/test/CodeGen/NVPTX store-i1-trunc.ll

[NVPTX] Use default legalizer for truncating store that have memory VT == i1 (#231592)

NVPTXTargetLowering set action to "Expand" to legalize i1 MemVT.
However, custom lowering intercept this case and to do wrong lowering
which triggers Tmp3.getValueType() == MVT::i1 assertion.

Fixes: https://github.com/llvm/llvm-project/issues/197699

Signed-off-by: ZakyHermawan <zaky.hermawan9615 at gmail.com>
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
DeltaFile
+42-0llvm/test/CodeGen/NVPTX/store-i1-trunc.ll
+2-1llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+44-12 files

LLVM/project 0f426a6 — llvm/lib/Target/AMDGPU AMDGPUPerfHintAnalysis.cpp AMDGPUSearchableTables.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h AMDGPUBaseInfo.cpp

Use TableGen based query instead of string matching

Change-Id: Iae886233ce397e0fbb5232a7cedc0daadcf30e1a
DeltaFile
+27-0llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
+2-7llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp
+8-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+3-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+40-74 files

LLVM/project 1e9851c — llvm/lib/Transforms/IPO AttributorAttributes.cpp, llvm/test/Transforms/Attributor align.ll noundef-return-poison-attrs.ll

Attributor: Deduce noundef returns if poison-generating attributes hold

Instead of giving up on noundef for returns with poison-generating
attributes, check that the attributes are assumed to hold for all
returned values. This uses the Attributor's own deductions for the
returned values (AANonNull, AAAlign, AAValueConstantRange and
AANoFPClass), so e.g. a range only known from a callee is enough.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+207-15llvm/test/Transforms/Attributor/noundef-return-poison-attrs.ll
+61-9llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+1-1llvm/test/Transforms/Attributor/align.ll
+269-253 files

LLVM/project 187d1ce — llvm/include/llvm/IR Attributes.h, llvm/lib/IR Attributes.cpp Instruction.cpp

Attributor: Don't infer noundef returns with poison-generating attributes

Returning a value that violates an existing return attribute results
in poison. AANoUndef did not account for this and could mark such
returns noundef. Give up on returns with poison-generating attributes.

This loses 2 of 3 noundef returns that would have been proven over
CTMark with -attributor-enable=full, and no call site attributes. A
follow-up instead checks that the attributes hold for the returned
values, using the Attributor's own deductions for them.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+48-0llvm/test/Transforms/Attributor/noundef-return-poison-attrs.ll
+15-0llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+4-10llvm/lib/IR/Instruction.cpp
+9-0llvm/lib/IR/Attributes.cpp
+4-0llvm/include/llvm/IR/Attributes.h
+1-1llvm/test/Transforms/Attributor/align.ll
+81-116 files

LLVM/project 257acb9 — utils/bazel/llvm-project-overlay/lldb/source/Plugins plugin_config.bzl BUILD.bazel

[bazel][lldb] Add ArchitectureRISCV and ArchitectureWasm plugins (#231987)

CMake builds both unconditionally, but the bazel overlay had no targets
for them, so bazel-built lldb silently lacked them.

https://github.com/llvm/llvm-project/blob/560cd8fd256bf6654c0f06dfd7a72fdc891959b0/lldb/source/Plugins/Architecture/RISCV/CMakeLists.txt#L4

https://github.com/llvm/llvm-project/blob/560cd8fd256bf6654c0f06dfd7a72fdc891959b0/lldb/source/Plugins/Architecture/Wasm/CMakeLists.txt#L4

Here we add the target rule into the bazel build as well as adding to
default plugins list. If we wanted to do just the first half (target)
and leave plugins to users, that is fine, too.

No ability to bazel build locally so relying on CI here and Meta's
bazel->BUCK translation.

assisted with: claude
DeltaFile
+24-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/BUILD.bazel
+2-0utils/bazel/llvm-project-overlay/lldb/source/Plugins/plugin_config.bzl
+26-02 files

LLVM/project 79469d2 — llvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/PhaseOrdering/X86 hsub.ll hadd.ll

[VectorCombine] Add instructions created by IRBuilder into Worklist automatically (#230618)

Previously, users have to add newly generated instructions into Worklist
_manually_. Which can be quite easy to forget and leave potential
optimization opportunities on the table. Especially that, unlike
InstCombine, VectorCombine runs only like 2 times in the pipeline.

This patch uses a custom IRBuilder inserter to add newly generated
instructions automatically into VectorCombine's Worklist, just like what
InstCombine is doing. The patch also fixes several places to use
`VectorCombine::Builder` rather than a local IRBuilder instance.
DeltaFile
+33-48llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+30-46llvm/test/Transforms/VectorCombine/X86/load-inseltpoison.ll
+15-49llvm/test/Transforms/VectorCombine/X86/concat-boolmasks.ll
+4-4llvm/test/Transforms/PhaseOrdering/X86/hsub.ll
+4-4llvm/test/Transforms/PhaseOrdering/X86/hadd.ll
+0-2llvm/test/Transforms/VectorCombine/X86/extract-binop.ll
+86-1531 files not shown
+86-1547 files

LLVM/project ea41e0e — lldb/include/lldb/ValueObject ValueObject.h, lldb/source/ValueObject ValueObject.cpp

[lldb] Replace const char * with StringRef in ValueObject::GetSyntheticExpressionPathChild (#231711)

I'm doing some refactoring and having this go in first makes some later
stuff easier to review.
DeltaFile
+7-8lldb/source/ValueObject/ValueObject.cpp
+2-2lldb/include/lldb/ValueObject/ValueObject.h
+9-102 files

LLVM/project 134894a — mlir/include/mlir/Dialect/OpenMP OpenMPOps.td, mlir/test/Dialect/OpenACC side-effects.mlir

[mlir][OpenMP] Model recursive memory effects of omp.masked (#230493)

Change the test-side-effects test pass to emit recursive side effects. 
Update side-effect tests.
Directly test for recursive memory effects.

AI-Assisted-by: Codex (testing)

---------

Co-authored-by: Jamie.Rowlinson-Patel at arm.com <jamrow01 at ip-10-252-16-38.eu-west-1.compute.internal>
DeltaFile
+10-0mlir/test/Dialect/OpenMP/memory-effects.mlir
+6-0mlir/test/lib/IR/TestSideEffects.cpp
+1-1mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+2-0mlir/test/Dialect/OpenACC/side-effects.mlir
+19-14 files

LLVM/project 2d747cb — libcxx/utils/ci/lnt README.md, libcxx/utils/ci/lnt/schemas libstdcxx.json libcxx.json

[libc++] Add LNT v5 schemas for the libcxx and libstdcxx test suites (#231998)
DeltaFile
+92-0libcxx/utils/ci/lnt/schemas/libcxx.json
+70-0libcxx/utils/ci/lnt/schemas/libstdcxx.json
+6-0libcxx/utils/ci/lnt/README.md
+168-03 files

LLVM/project 6b58e14 — llvm/lib/Target/AMDGPU SIInstrInfo.h AMDGPUAsmPrinter.cpp, llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250.mir inline-mem-constraints.ll

[AMDGPU] Support the RF and m inline asm constraints (#195123)

This patch supports the RF inline asm constraint for memory operands in
the flat address space as well as the generic 'm' constraint.
DeltaFile
+334-0llvm/test/CodeGen/AMDGPU/inline-mem-constraints.ll
+27-0llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+12-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+10-0llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+8-1llvm/lib/Target/AMDGPU/SIInstrInfo.h
+4-4llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
+395-59 files not shown
+420-1015 files

LLVM/project 8e7f49f — llvm/lib/Transforms/Coroutines SpillUtils.cpp, llvm/test/Transforms/Coroutines coro-alloca-scalable.ll

[CoroSplit] Keep scalable allocas on the stack when no use crosses a suspend

Lifetime markers can conservatively span a suspend point even when no use of
the alloca does (e.g. a local whose C++ scope covers a co_await). For scalable
allocas this forces them onto the frame, which cannot hold them, and CoroSplit
aborts with "Coroutines cannot handle non static or vscale allocas yet". If
the address does not escape and no non-lifetime use crosses a suspend point,
keep the alloca on the stack instead.

Assisted-By: Claude
DeltaFile
+51-0llvm/test/Transforms/Coroutines/coro-alloca-scalable.ll
+21-2llvm/lib/Transforms/Coroutines/SpillUtils.cpp
+72-22 files

LLVM/project e925278 — llvm/lib/Transforms/Coroutines SpillUtils.cpp, llvm/test/Transforms/Coroutines coro-alloca-scalable.ll

[CoroSplit] Keep scalable allocas on the stack when no use crosses a suspend

Lifetime markers can conservatively span a suspend point even when no use of
the alloca does (e.g. a local whose C++ scope covers a co_await). For scalable
allocas this forces them onto the frame, which cannot hold them, and CoroSplit
aborts with "Coroutines cannot handle non static or vscale allocas yet". If
the address does not escape and no non-lifetime use crosses a suspend point,
keep the alloca on the stack instead.

Assisted-By: Claude
DeltaFile
+51-0llvm/test/Transforms/Coroutines/coro-alloca-scalable.ll
+22-2llvm/lib/Transforms/Coroutines/SpillUtils.cpp
+73-22 files

LLVM/project 9bf6245 — llvm/test/CodeGen/X86 unfold-masked-merge-vector-variablemask-const.ll vshift-6.ll

[DAGCombiner] Fold `or (not x), (and x, y) --> or (not x), y` (#231699)

Proof: https://alive2.llvm.org/ce/z/_DZJxr
DeltaFile
+102-130llvm/test/CodeGen/X86/packus.ll
+89-120llvm/test/CodeGen/X86/vector-trunc-usat.ll
+91-111llvm/test/CodeGen/X86/masked_store_trunc_usat.ll
+34-78llvm/test/CodeGen/X86/psubus.ll
+31-33llvm/test/CodeGen/X86/vshift-6.ll
+16-28llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask-const.ll
+363-50016 files not shown
+438-63722 files

LLVM/project bed4918 — llvm/utils/gn/secondary/llvm/test BUILD.gn

[gn] port 6f7e31684796 (#232003)
DeltaFile
+1-0llvm/utils/gn/secondary/llvm/test/BUILD.gn
+1-01 files

LLVM/project 835ca75 — libc/cmake/modules LLVMLibCTestRules.cmake, libc/config/baremetal/hexagon entrypoints.txt

[libc] Add bare-metal Hexagon port (#217528)

Add support for llvm-libc on Hexagon bare-metal targets.

Recognize the hexagon architecture in CMake.
Add the Hexagon bare-metal config: config.json, entrypoints.txt,
headers.txt. Add Hexagon startup code (crt1) with semihosting trap
handling. Add a Hexagon FEnvImpl and select it in FEnvImpl.h; define
fenv_t for Hexagon. Add bare-metal signal macros and wire the bare-metal
include path into signal-macros.h.
memory_size: detect signed addition overflow with a builtin instead of
relying on undefined behavior.

---------

Signed-off-by: Kushal Pal <kushpal at qti.qualcomm.com>
DeltaFile
+998-0libc/config/baremetal/hexagon/entrypoints.txt
+215-0libc/src/__support/FPUtil/hexagon/FEnvImpl.h
+120-0libc/test/UnitTest/HexagonBaremetalTestUtils.cpp
+110-0libc/startup/baremetal/hexagon/start.cpp
+37-4libc/cmake/modules/LLVMLibCTestRules.cmake
+40-0libc/src/setjmp/hexagon/setjmp.cpp
+1,520-420 files not shown
+1,782-2426 files

LLVM/project 83e5ea5 — llvm/include/llvm/IR RuntimeLibcallsImpl.td RuntimeLibcalls.td, llvm/lib/IR RuntimeLibcalls.cpp

RuntimeLibcalls: Define vector math libcall signatures in tablegen

Give vector math libcalls a signature in tablegen. The vector modf,
sincos and sincospi types now come from the generated signature instead of
being manually constructed, though the attributes are still manually applied.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+41-111llvm/lib/IR/RuntimeLibcalls.cpp
+56-55llvm/include/llvm/IR/RuntimeLibcalls.td
+17-10llvm/include/llvm/IR/RuntimeLibcallsImpl.td
+11-0llvm/test/Transforms/Util/DeclareRuntimeLibcalls/amdlibm.ll
+6-0llvm/test/TableGen/RuntimeLibcallEmitter.td
+131-1765 files

LLVM/project 19375a4 — llvm/include/llvm/IR RuntimeLibcallsImpl.td RuntimeLibcalls.td, llvm/lib/IR RuntimeLibcalls.cpp

RuntimeLibcalls: Define vector math libcall signatures in tablegen

Add vector FuncArgTypes and replace some of the manual signature
construction in getFunctionTy. Add masked and unmasked variants for
the scalable vector cases, with mapping functions between the versions.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+276-275llvm/include/llvm/IR/RuntimeLibcalls.td
+35-86llvm/lib/IR/RuntimeLibcalls.cpp
+75-0llvm/test/TableGen/RuntimeLibcallEmitter-vector-mask-argument.td
+51-0llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+33-0llvm/include/llvm/IR/RuntimeLibcallsImpl.td
+25-0llvm/test/TableGen/RuntimeLibcallEmitter.td
+495-3619 files not shown
+537-37215 files

LLVM/project 69d63ae — llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU coexec-sched-carried-latency.mir

[AMDGPU] Add heuristic to set CarriedLatencies (#224057)

After
https://github.com/llvm/llvm-project/commit/8723e4a1bc0b6078e35c17532952f79fb8480f53
users have some control to defer scheduling instructions which depend on
loads from predecessor blocks. This PR adds a simple heuristic to
control setting the Fence mode, which has shown to be the most useful in
practice.

We would like to defer scheduling the ATOMIC_FENCE, if 1. there is a
corresponding load/store in flight, and 2. there have not been enough
cycles for that instruction to reasonably finish. Unfortunately, since
we are reasoning about loads/stores in predecessor blocks, we can not
reliably know where these will in the final schedule. However, we can
inspect the dependency structure to identify cases where these
instructions may be pushed back.

This heuristic identifies predecessor blocks in which ds_loads must be
scheduled after all wmma instructions, as this dependency structure

    [5 lines not shown]
DeltaFile
+424-0llvm/test/CodeGen/AMDGPU/coexec-sched-carried-latency.mir
+67-7llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+6-1llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+497-83 files

LLVM/project c684d2a — llvm/test/Transforms/SLPVectorizer/X86 rsqrt-estimate-vector-users.ll

[SLP][NFC]Add a test with sqrt vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/231993
DeltaFile
+82-0llvm/test/Transforms/SLPVectorizer/X86/rsqrt-estimate-vector-users.ll
+82-01 files