LLVM/project a64f741llvm/lib/Target/SPIRV SPIRVStructurizer.cpp, llvm/test/CodeGen/SPIRV/structurizer HLSLControlFlowHint-pass-check.ll

[SPIR-V][NewPM] Register SPIRVStructurizer with the new pass manager (#209965)
DeltaFile
+39-31llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
+9-0llvm/test/CodeGen/SPIRV/structurizer/HLSLControlFlowHint-pass-check.ll
+48-312 files

LLVM/project 8a11931clang/include/clang/Basic DiagnosticIDs.h

[clang][NFC] Bump the maximum number of Frontend diagnostics (#210345)

The number of Frontend diagnostics in DiagnosticFrontendKinds.td is
close to the DIAG_SIZE_FRONTEND limit of 200 (195 in use), and in-flight
PRs adding frontend diagnostics (e.g. #187986) run into the static
assert in DiagnosticIDs.cpp. Increase the limit to 300, following the
precedent of #200948 which did the same for Sema diagnostics.

Co-authored-by: Tony Varghese <tony.varghese at ibm.com>
DeltaFile
+1-1clang/include/clang/Basic/DiagnosticIDs.h
+1-11 files

LLVM/project c98bd8cllvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

Merge branch 'users/aokblast/lldb/fix_auxilary_handle' into users/aokblast/lldb/mmap_fix_for_reexport
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+3,624-0mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+15,332-8,5646,297 files not shown
+150,969-75,9326,303 files

LLVM/project d8a4772llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

Merge branch 'main' into users/aokblast/lldb/fix_auxilary_handle
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+3,624-0mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+15,332-8,5646,297 files not shown
+150,969-75,9326,303 files

LLVM/project 53c6ce1libcxx/include/__utility cmp.h

[libc++][cmp][NFC] Fix: Empty namespaces should be avoided (#210624)

Context: Including `<__utility/cmp.h>` causes:

> cmp.h:25:1: error: Empty namespaces should be avoided. Move any checks
around the namespace instead.
[libcpp-avoid-empty-namespaces,-warnings-as-errors]
DeltaFile
+4-4libcxx/include/__utility/cmp.h
+4-41 files

LLVM/project 5497f46clang/lib/Headers riscv_packed_simd.h, clang/test/CodeGen/RISCV rvp-intrinsics.c

[RISCV][P-ext] Support Packed Narrowing Zip (#210040)
DeltaFile
+266-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+99-0llvm/test/CodeGen/RISCV/rvp-narrowing-zip.ll
+80-0cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+46-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+43-0clang/lib/Headers/riscv_packed_simd.h
+26-3llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+560-36 files

LLVM/project d417c27clang/include/clang/Basic DiagnosticIDs.h

[clang][NFC] Bump the maximum number of Frontend diagnostics

The number of Frontend diagnostics in DiagnosticFrontendKinds.td is close
to the DIAG_SIZE_FRONTEND limit of 200 (195 in use). Increase the limit
to 300.
DeltaFile
+1-1clang/include/clang/Basic/DiagnosticIDs.h
+1-11 files

LLVM/project 126d90allvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/NVPTX atomicrmw-sm60.ll atomicrmw-sm70.ll

Merge branch 'main' into users/tonykuttai/bump-diag-size-frontend
DeltaFile
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,635-849llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
+0-1,177llvm/docs/JITLink.rst
+11,708-9,741576 files not shown
+38,248-22,080582 files

LLVM/project f436caelibc/src/stdlib/linux realpath.cpp CMakeLists.txt, libc/test/src/stdlib realpath_test.cpp CMakeLists.txt

[libc][realpath] Follow symlinks
DeltaFile
+140-22libc/src/stdlib/linux/realpath.cpp
+99-0libc/test/src/stdlib/realpath_test.cpp
+1-0libc/src/stdlib/linux/CMakeLists.txt
+1-0libc/test/src/stdlib/CMakeLists.txt
+241-224 files

LLVM/project c6672a6llvm/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/test/Transforms/InstCombine fsh.ll

[InstCombine] Fix invalid fshl -> lshr fold when shift is vector with constant zero lane (#210606)

For vectors, this is not valid if a subset of the lanes are constant
zero. Doing this fold introduces poison in those lanes. A similar fix
was done for fshr in 46957a138dea339799059ea5bf032e40042ff185 however
the same issue seems to apply to fshl

Fixes https://github.com/llvm/llvm-project/issues/210605
DeltaFile
+9-0llvm/test/Transforms/InstCombine/fsh.ll
+3-1llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+12-12 files

LLVM/project 16ffd27libcxx/src/support/runtime exception_pointer_msvc.ipp

[libcxx][NFC] Address -Wmicrosoft-cast in MSVC's exception_ptr (#210570)

This was introduced as part of #94977. Rather than suppressing the
warning with `#pragma clang diagnostic ignored`, we use
`reinterpret_cast` to avoid the implicit conversion.
DeltaFile
+3-2libcxx/src/support/runtime/exception_pointer_msvc.ipp
+3-21 files

LLVM/project 01683dborc-rt/include/orc-rt Session.h QueueingRunner.h, orc-rt/lib/executor Session.cpp

[orc-rt] Replace RunWrapperCall with generalized Dispatch (#210591)

RunWrapperCall dispatched wrapper-function calls, but the Session also
needs to dispatch continuations for results returned by the controller.
Replace it with a generalized Dispatch mechanism (DispatchFn) that is
handed an opaque Task for each unit of work, covering both.

QueueingRunner is correspondingly simplified: it no longer knows
anything about wrapper functions and just enqueues the Task it is given.
Tests and the noDispatch helper are updated to the new interface.
DeltaFile
+43-75orc-rt/test/unit/QueueingRunnerTest.cpp
+19-16orc-rt/include/orc-rt/Session.h
+7-15orc-rt/include/orc-rt/QueueingRunner.h
+8-13orc-rt/test/unit/CommonTestUtils.h
+2-2orc-rt/lib/executor/Session.cpp
+1-1orc-rt/test/unit/InProcessControllerAccessTest.cpp
+80-1226 files

LLVM/project 30fd90dmlir/lib/Dialect/Bufferization/Transforms StaticMemoryPlannerAnalysis.cpp, mlir/test/Dialect/Bufferization/Transforms static-memory-planner-analysis.mlir static-memory-planner-errors.mlir

[mlir][bufferization] Address review feedback on arith.select dealloc pass

- Use BufferViewFlowOpInterface instead of hardcoded arith::SelectOp check,
  so any future op implementing the interface is handled automatically
- Error out (not skip) when no dealloc or cross-block dealloc is found;
  the only valid skip is dynamic shapes
- Remove redundant potentialCandidates vector copy in collectCandidates
- Replace erasedDeallocs with deallocsToErase set in rewriteAllocations
- Remove outdated comment about group constraint
- Add error tests for missing-dealloc and cross-block cases
DeltaFile
+48-47mlir/lib/Dialect/Bufferization/Transforms/StaticMemoryPlannerAnalysis.cpp
+6-34mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-analysis.mlir
+24-0mlir/test/Dialect/Bufferization/Transforms/static-memory-planner-errors.mlir
+78-813 files

LLVM/project 598f152llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination constraint-overflow.ll

[ConstraintElim] Fix integer overflow when negating constraint (#210627)

Negating a coefficient (e.g. INT64_MIN) can overflow; skip adding the
inverted constraint if it wraps.

Fixes an UBSan failure for the added test.
DeltaFile
+26-0llvm/test/Transforms/ConstraintElimination/constraint-overflow.ll
+2-1llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+28-12 files

LLVM/project 6bcdcb3llvm/lib/DWARFLinker/Parallel SyntheticTypeNameBuilder.cpp

[DWARFLinker] Make synthetic type names deterministic under threading (#209553)
DeltaFile
+7-4llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
+7-41 files

LLVM/project 83d52c3llvm/tools/llvm-reduce ReducerWorkItem.cpp

fixfix

Created using spr 1.3.7
DeltaFile
+0-1llvm/tools/llvm-reduce/ReducerWorkItem.cpp
+0-11 files

LLVM/project 2519098llvm/test/tools/llvm-reduce initialize-asm-parsers.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1-1llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
+1-11 files

LLVM/project d9030cfllvm/test/tools/llvm-reduce initialize-asm-parsers.ll

fix

Created using spr 1.3.7
DeltaFile
+1-1llvm/test/tools/llvm-reduce/initialize-asm-parsers.ll
+1-11 files

LLVM/project d51a74cllvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/AMDGPU amdgpu-codegenprepare-idiv.ll

rebase

Created using spr 1.3.7
DeltaFile
+23,904-12llvm/test/CodeGen/RISCV/clmul.ll
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,510-2,221llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+35,487-9,9489,490 files not shown
+250,411-118,8579,496 files

LLVM/project 268bd17llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/AMDGPU amdgpu-codegenprepare-idiv.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+23,904-12llvm/test/CodeGen/RISCV/clmul.ll
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,510-2,221llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+35,487-9,9489,487 files not shown
+250,404-118,8479,493 files

LLVM/project fc985f0llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/AMDGPU amdgpu-codegenprepare-idiv.ll

rebase

Created using spr 1.3.7
DeltaFile
+23,904-12llvm/test/CodeGen/RISCV/clmul.ll
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,510-2,221llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+35,487-9,9489,487 files not shown
+250,404-118,8479,493 files

LLVM/project 174afe1llvm/docs NVPTXUsage.rst NVPTXUsage.md, llvm/test/CodeGen/AMDGPU amdgpu-codegenprepare-idiv.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+23,904-12llvm/test/CodeGen/RISCV/clmul.ll
+0-4,767llvm/docs/NVPTXUsage.rst
+2,949-1,487llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
+2,871-1,461llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
+4,253-0llvm/docs/NVPTXUsage.md
+1,510-2,221llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
+35,487-9,9489,487 files not shown
+250,404-118,8479,493 files

LLVM/project f0c08a4clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.cpp

address comment
DeltaFile
+26-39clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+26-391 files

LLVM/project f4383a3llvm/docs LangRef.md, llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp LegalizeFloatTypes.cpp

[ConstantTime] Apply review fixes for llvm.ct.select core

- Verifier: reject aggregate types instead of crashing ISel; add test.
- Fix scalable-vector expansion crash when the element type is not a
  legal scalar; add RVV test.
- LangRef: document poison/undef, noundef, permitted folds, and FMF
  behavior; rewrite Syntax/Overview.
- Deduplicate CT_SELECT type-legalizer handlers into the SELECT paths.
- Misc: FP int-twin assert, dead null check, in-place memory blend,
  flag-free PromoteNode, GlobalISel fallback test, comment cleanups.
DeltaFile
+117-0llvm/test/CodeGen/RISCV/ctselect-fallback-scalable.ll
+70-45llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+56-34llvm/docs/LangRef.md
+24-24llvm/test/CodeGen/X86/ctselect.ll
+35-0llvm/test/CodeGen/RISCV/ctselect-fallback-gisel.ll
+10-24llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+312-12711 files not shown
+369-18917 files

LLVM/project 64613edllvm/docs LangRef.md, llvm/include/llvm/IR Intrinsics.td

[ConstantTime] Address reviewer feedback for llvm.ct.select core

Model llvm.ct.select as IntrInaccessibleMemOnly so the call stays pinned
without pessimizing alias analysis. Make CT_SELECT flagless (drop the
getCTSelect flags parameter, dead flag propagation, and
setFlags-after-getNode) and assert its condition is scalar. Blend the FP
memory fallback at the widest legal integer width with ext-load and
trunc-store tails instead of illegal i8 chunks. Restore the LangRef
section dropped in the rebase onto the Markdown docs migration and note
RISC-V Zkt/Zvkt. Apply review style fixes and regenerate affected tests.
DeltaFile
+113-113llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+125-0llvm/docs/LangRef.md
+27-68llvm/test/CodeGen/X86/ctselect.ll
+39-27llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+16-19llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+8-2llvm/include/llvm/IR/Intrinsics.td
+328-2298 files not shown
+349-24714 files

LLVM/project 61defe7llvm/include/llvm/CodeGen ISDOpcodes.h, llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

[ConstantTime] Reword comments and LangRef doc
DeltaFile
+0-7llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+5-2llvm/include/llvm/CodeGen/ISDOpcodes.h
+5-92 files

LLVM/project 6309808llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp SelectionDAGBuilder.cpp, llvm/test/CodeGen/RISCV ctselect-fallback.ll

[ConstantTime] Move ct.select lowering to legalizer; misc fixes

- LegalizeDAG owns CT_SELECT lowering: scalar-mask+splat for vectors
  (avoids illegal vNi1), memory-blend for FP types lacking a legal
  same-size integer (f64 on i386 no-SSE, fp128, x86_fp80)
- Add InstSimplify folds for constant cond and identical arms
- Extend X86 tests to half/bfloat/fp128/x86_fp80; nounwind cleanup
- Preserve flags through legalizer; reuse SDTSelect
DeltaFile
+1,513-549llvm/test/CodeGen/X86/ctselect.ll
+143-65llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+12-111llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+102-0llvm/test/Transforms/InstSimplify/ct-select.ll
+44-30llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+4-13llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1,818-7685 files not shown
+1,838-78011 files

LLVM/project 904766allvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp SelectionDAGBuilder.cpp, llvm/test/CodeGen/RISCV ctselect-fallback.ll

[ConstantTime] Fix CT_SELECT expansion to preserve constant-time guarantees

Create CT_SELECT nodes for scalar types regardless of target support, so
they survive DAGCombiner (visitCT_SELECT is conservative). Expand to
AND/OR/XOR during operation legalization after SETCC is lowered, preventing
the sext(setcc)->select fold chain that converts constant-time patterns
into data-dependent conditional moves (e.g. movn/movz on MIPS).

The mask uses SUB(0, AND(Cond, 1)) instead of SIGN_EXTEND because type
legalization already promoted i1 to the SetCC result type, making
SIGN_EXTEND a no-op for same-width types.
DeltaFile
+144-115llvm/test/CodeGen/X86/ctselect.ll
+10-12llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+12-8llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+13-3llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+179-1384 files

LLVM/project d855f76llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp LegalizeIntegerTypes.cpp, llvm/test/CodeGen/RISCV ctselect-fallback.ll

[ConstantTime] Changed CTSELECT instances to CT_SELECT
DeltaFile
+14-14llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+11-11llvm/test/CodeGen/X86/ctselect.ll
+9-9llvm/test/CodeGen/RISCV/ctselect-fallback.ll
+7-7llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+6-6llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+6-6llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+53-5313 files not shown
+75-8019 files

LLVM/project 8cb284ellvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[LangRef][ConstantTime] Add documentation for llvm.ct.select.* constant-time intrinsics (#181042)

This PR introduces and documents the llvm.ct.select.* constant-time
intrinsics, providing timing-independent selection operations for
security-sensitive code. The LangRef is updated with syntax, semantics,
supported types, and usage guidance.

Additionally, test coverage is extended with a new <8 x float> variant
(llvm.ct.select.v8f32) and corresponding X86 codegen tests to ensure
correct lowering on both x64 and x32 targets.
DeltaFile
+188-0llvm/test/CodeGen/X86/ctselect.ll
+6-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+5-5llvm/include/llvm/CodeGen/TargetLowering.h
+199-103 files