[clang][CIR] Add tests for SVE MAXNMV intrinsics (#232198)
adds CIR tests for `svmaxnmv` (plain SVE) intrinsics.
Moves and adapts `sve-intrinsics/acle_sve_maxnmv.c` to `sve/maxnmv.c`
Part of #223963
[clang][CIR] Add tests for SVE MINNMV intrinsics (#232199)
adds CIR tests for `svminnmv` (plain SVE) intrinsics.
Moves and adapts `sve-intrinsics/acle_sve_minnmv.c` to `sve/minnmv.c`
Part of #223963
[RISCV][Docs] Rename Extensions section in RISCVUsage to 'Ratified Extensions' (#232488)
We have separate sections for Experimental and Vendor so let's name this
what it is.
[lldb] Rename OS register metadata providers (#231564)
Rename platform/arch-specific RegisterContext* to RegisterInfo* under
Process/Utility as these files contain classes derived from
RegisterInfoInterface not RegisterContext.
[TargetLowering][X86] Prefer 'r' over 'm' for foldable "rm" inline asm operands
An "rm" (register-or-memory) inline asm operand has always resolved to
'm', because getConstraintPreferences() picks the most general
constraint present, and 'm' is more general than 'r'. That's safe, since
memory can't run out, but it forces a value that could stay in a
register through a stack slot even when there's no register pressure
(https://github.com/llvm/llvm-project/issues/20571).
Prefer 'r' instead where the register allocator can fold the register
back to a stack slot when it runs out of registers, and mark the
register operand foldable (InlineAsm::Flag::setRegMayBeFolded()) so it
does. Both allocators can: the greedy allocator folds an operand when it
spills its value, and the fast allocator folds operands up front when
the asm's register operands wouldn't fit.
ParseConstraints() sets AsmOperandInfo::MayFoldRegister for an operand
whose constraint codes include 'r' and 'm' and are otherwise only
immediate codes, above -O0, on a target that opts in through the new
[26 lines not shown]
[RegAllocFast] Fold foldable inline asm operands under register pressure
An inline asm register operand marked foldable (from an "rm" constraint)
may be replaced with a stack slot when the register allocator runs out
of registers. The greedy allocator does that when it spills the value.
The fast allocator can't: it assigns the operands of an instruction one
at a time, and folding replaces the instruction. So it reported
"inline assembly requires more registers than available" instead.
Before allocating a block, estimate from each inline asm's own operands
whether they fit in registers, and fold as many foldable registers as
needed to make them fit, so the common case without pressure still gets
a register. Values that only live across the asm don't count, since the
allocator spills them when it needs their registers. The estimate
follows allocateInstruction():
- First all defs get distinct registers, avoiding physreg defs; then all
uses, along with the defs still occupied while the uses are read
(early-clobber and tied defs, see isLiveThroughDef()), get distinct
[26 lines not shown]
[CodeGen] Address review: error for "=m|r" direct outputs too
A direct output whose chosen alternative is memory, e.g. "=m|r", still
crashed SelectionDAG, which exempted multiple-alternative operands from the
check and then asked for the address of an output with no value. Drop the
exemption and test "=m|r" with both instruction selectors. Name the
selector explicitly in the RUN lines rather than relying on -O levels,
since X86 GlobalISel can't lower inline asm and both X86 lines ran
SelectionDAG anyway. Drop "yet" from the error: Clang never emits a
direct memory output, so there are no plans to support one.
Assisted-by: Claude Opus 5.5
[CodeGen] Report an error for a direct inline asm output in memory
An inline asm output returned by value has no memory to write to, yet a
constraint such as "=rm" picks memory, the most general constraint, as
does "=m". SelectionDAG asserted on that ("Can only indirectify direct
input operands!"), and GlobalISel dereferenced a null pointer. Clang
never emits such an output, since it passes the address of a memory
output, but other IR can. Report "cannot handle direct memory outputs
yet for constraint 'm'" instead, like the other inline asm errors there.
Assisted-by: Claude Opus 5.5
[MLIR][AsmPrinter] Add alwaysUseAliases printing flag (#232518)
Per-function IR dumps print a nested op, which takes the non top-level
path where types and attributes expand in full. For passes over
functions with heavy types this buries the dump in noise that aliases
would fold away.
Add OpPrintingFlags::alwaysUseAliases plus the
mlir-print-always-use-aliases tool option. When set, printing
initializes aliases and takes the top-level path for any op, so nested
dumps use aliases. The flag takes precedence over local scope on
purpose: pass instrumentation prints nested ops with local scope, so
without precedence the per-function dumps this flag targets would never
use aliases.
Reusing one AsmState across prints must not carry the previous op
aliases or dialect resources into the next print, so initialize now
starts both fresh.
Assisted-by: Muse Code (Muse)
[TargetInstrInfo] Address review: autogenerate greedy-inline-asm-fold.mir checks
Generate the checks with update_mir_test_checks.py so that the spills and
reloads around each folded inline asm are verified, not just the INLINEASM
itself. Fix the "=r" comment to describe the C "+r" operand, note that which
"+rm" pair greedy folds is its own choice, and add a "+&rm" case on an
uninitialized value showing that folding a pair whose tied use is undef
stores to the slot without loading from it.
Assisted-by: Claude Opus 5.5
[APFloat][NFCI] Move x87DoubleExtended next to the other native IEEE types (#223193)
Reordered the `APFloatBase::Semantics` so that `S_x87DoubleExtended` is
placed after the IEEE types and before the DoubleDouble types.
Previously, `S_x87DoubleExtended` was the very last `enum` value,
meaning that `SemanticsToEnum`/`bitcastToAPInt`/`initFromAPInt` would
test if `Sem` is one of the 13 GPU floating point types before testing
if `Sem` is `x87DoubleExtended`. Given that `x87DoubleExtended` is more
commonly used and a native LLVM IR type, I thought a better heuristic
would be to test if `Sem` is a `x87DoubleExtended` type before testing
if it is one of the 13 GPU floating point types.
I also made the order of other functions/fields more consistent across
`APFloat`.
[TargetLowering][X86] Prefer 'r' over 'm' for foldable "rm" inline asm operands
An "rm" (register-or-memory) inline asm operand has always resolved to
'm', because getConstraintPreferences() picks the most general
constraint present, and 'm' is more general than 'r'. That's safe, since
memory can't run out, but it forces a value that could stay in a
register through a stack slot even when there's no register pressure
(https://github.com/llvm/llvm-project/issues/20571).
Prefer 'r' instead where the register allocator can fold the register
back to a stack slot when it runs out of registers, and mark the
register operand foldable (InlineAsm::Flag::setRegMayBeFolded()) so it
does. Both allocators can: the greedy allocator folds an operand when it
spills its value, and the fast allocator folds operands up front when
the asm's register operands wouldn't fit.
ParseConstraints() sets AsmOperandInfo::MayFoldRegister for an operand
whose constraint codes include 'r' and 'm' and are otherwise only
immediate codes, above -O0, on a target that opts in through the new
[26 lines not shown]
[RegAllocFast] Fold foldable inline asm operands under register pressure
An inline asm register operand marked foldable (from an "rm" constraint)
may be replaced with a stack slot when the register allocator runs out
of registers. The greedy allocator does that when it spills the value.
The fast allocator can't: it assigns the operands of an instruction one
at a time, and folding replaces the instruction. So it reported
"inline assembly requires more registers than available" instead.
Before allocating a block, estimate from each inline asm's own operands
whether they fit in registers, and fold as many foldable registers as
needed to make them fit, so the common case without pressure still gets
a register. Values that only live across the asm don't count, since the
allocator spills them when it needs their registers. The estimate
follows allocateInstruction():
- First all defs get distinct registers, avoiding physreg defs; then all
uses, along with the defs still occupied while the uses are read
(early-clobber and tied defs, see isLiveThroughDef()), get distinct
[26 lines not shown]
[CodeGen] Report an error for a direct inline asm output in memory
An inline asm output returned by value has no memory to write to, yet a
constraint such as "=rm" picks memory, the most general constraint, as
does "=m". SelectionDAG asserted on that ("Can only indirectify direct
input operands!"), and GlobalISel dereferenced a null pointer. Clang
never emits such an output, since it passes the address of a memory
output, but other IR can. Report "cannot handle direct memory outputs
yet for constraint 'm'" instead, like the other inline asm errors there.
Assisted-by: Claude Opus 5.5
[TargetInstrInfo] Fix folding inline asm operands next to tied operands
foldInlineAsmMemOperand() swapped a register operand for the target's
memory operands with MachineInstr::removeOperand(), which asserts when a
later operand is tied, because moving it would break the tie. Inline asm
lists every input after every output, so folding any operand that comes
before another tied pair asserted, e.g. an "rm" input followed by the
input of a "+r" operand, or one of two "+rm" operands. Without
assertions, the moved operands kept stale tie indices. Untie the
operands, rebuild the operand list, and re-tie the remaining pairs at
their new positions.
It also gave up when the register appears in more than one operand, e.g.
one value passed to two "rm" operands, which left the greedy allocator
unable to spill that value at all. Fold every such operand into the
stack slot.
Finally, take MayLoad from the folded operands rather than from every
read of the register: a folded def whose tied use is another virtual
[9 lines not shown]
[DebugInfo] Bound the probe loop in DWARFUnitIndex::getFromHash (#232375)
A CU/TU index with no empty slot and no matching signature made the
lookup iterate forever. Stop after NumBuckets probes, which visit every
slot of a well-formed table.
rdar://186841022
[MIR] Serialize the "foldable" inline asm register operand flag (#229626)
The symbolic MIR syntax for inline asm operand flags dropped
InlineAsm::Flag's RegMayBeFolded bit, which marks a register operand
(from an "rm" constraint) that the register allocator may fold to a
stack slot. Printing MIR and parsing it back therefore silently changed
what the allocator was allowed to do, e.g. with -stop-before and
-run-pass, and a test could only set the bit through a raw numeric flag.
Print the bit as a trailing "foldable", as MachineInstr::print() already
does, and parse it back. A tied use stores its matched operand number in
the same bits, so it never prints the marker.
Co-authored-by: Nick Desaulniers <ndesaulniers at google.com>
Co-authored-by: Bill Wendling <morbo at google.com>
[CIR] Emit references to constant-initialized const variables as const. (#231689)
This ports classic codegen's tryEmitAsConstant, so CIR folds references
to const variables with constant initializers instead of only enum
constants. That includes lambda captures, references, and static
members accessed through MemberExpr.
It fixes cir.const lowering for the constant forms.
NOTE: The changes on the classic codegen are NFC and we move code
around so that we can reuse on CIR side.
---------
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
[CIR] Refresh the ClangIR landing docs page (#232501)
Rewrite clang/docs/CIR/index.md as the project's front page: drop the
stale upstreaming warning, keep the design-documents toctree, and add
Using ClangIR, RFC, talks/posts, and History sections with some content
ported from the (now archived) incubator site.
[Flang] Diagnose invalid SIGNAL handler arguments (#229092)
SIGNAL accepts a procedure or scalar INTEGER as its handler argument,
but the current intrinsic matching may also accept other scalar types.
Add a SIGNAL-specific semantic check for the handler argument. This also
rejects UNSIGNED handlers when -funsigned is enabled; SIGNAL accepts
only a procedure or a scalar INTEGER handler.
Add regression tests for valid procedure/integer handlers and invalid
non-integer data arguments.
AI was used to assist with code analysis, debugging, and drafting the PR
description. I personally debugged, reviewed and verified the changes,
tested the code, and fully understand the submitted contribution.
Fixes 221193
[lldb] Replace const char * in TypeFilterImpl's interface (#232072)
Expression paths could be added either via const char * or std::string.
I'm centralizing on llvm::StringRef so it can accept any kind of string
object that we can produce.
Similarly, GetExpressionPathAtIndex will return a StringRef instead of a
const char *.
[CIR][NFC] Test cold/optsize/minsize function attribute interplay (#232522)
#232131 implemented cold-to-optsize (plus minsize/naked/noduplicate and
user optnone) in setCIRFunctionAttributesForDefinition. Pin the
optimization-level interplay its tests do not cover: a cold definition
gets optsize at -O2 but not at -O0, minsize keeps optsize on at -O0 by
suppressing the O0-implies-optnone default, optnone suppresses optsize,
and declarations and call sites carry cold alone.
Assisted-by: Muse Code (Muse).
[CIR][NFC] Do not copy CIRGenBuilderTy per vtable component (#232509)
CIRGenBuilderTy carries two StringMaps by value (record name and global
versioning maps), which grow to tens of thousands of entries over a
translation unit. getVTableComponent copied the builder on every call,
deep-copying both maps per vtable component: quadratic work that cost
~12.5s while selfhosting clang/unittests/AST/ASTImporterTest.cpp.
Take the builder by reference instead, matching every other call site.
Also take it by reference in genVscaleTimesFactor, the only other
by-value use.
ASTImporterTest -fclangir wall time goes from 87.4s to 75.0s; output is
unchanged.
