[AMDGPU][NPM] Fix CFG invalidation detection in insertSimulatedTrap (#169290)
When SIMULATED_TRAP is at the end of a block with no successors,
insertSimulatedTrap incorrectly returns the original MBB despite adding
HaltLoopBB to the CFG.
EmitInstrWithCustomInserter detects CFG changes by comparing the
returned MBB with the original. When they match, it assumes no
modification occurred and skips MachineLoopInfo invalidation. This
causes stale loop information in subsequent passes, particularly when
using the NPM which relies on accurate invalidation signals.
Fix: Return HaltLoopBB to properly signal the CFG modification.
[clang] fix crash when template with constructor attribute is instantiated without a priority (#169282)
fixes: https://github.com/llvm/llvm-project/issues/169072
The current implementation expects the priority argument to be provided
to `[[gnu::constructor(<priority>)]]`, but the argument is really
optional. This was causing a segfault when instantiating the
function-template because we were trying to fold an `Expr*` that was a
nullptr.
This change skips the evaluation of the priority argument when it is
missing; this will instantiate a function declaration with the default
priority (65535).
[ARM] Auto-decode pred operands of Thumb instructions (#156540)
Most predicable Thumb instructions do not encode the predicate operand,
but rather take it from an enclosing IT block.
Add `bits<0> p` to the encoding of these instructions to make the
predicate operand decodable by the generated code.
The previous approach was to analyze an instruction after it has been
decoded and add missing predicate operand if necessary. The
post-decoding pass is still required to check predicate applicability
and advance IT block state, but it no longer modifies a decoded
instruction.
Some of the custom decoder methods have become redundant and can be
removed in the future, delegating the decoding task to TableGen-erated
decoder.
Pull Request: https://github.com/llvm/llvm-project/pull/156540
[TTI][Vectorize] Migrate masked/gather-scatter/strided/expand-compress costing (NFCI) (#165532)
In #160470, there is a discussion about the possibility to explored a
general approach for handling memory intrinsics.
API changes:
- Remove getMaskedMemoryOpCost, getGatherScatterOpCost,
getExpandCompressMemoryOpCost, getStridedMemoryOpCost from
Analysis/TargetTransformInfo.
- Add getMemIntrinsicInstrCost.
In BasicTTIImpl, map intrinsic IDs to existing target implementation
until the legacy TTI hooks are retired.
- masked_load/store → getMaskedMemoryOpCost
- masked_/vp_gather/scatter → getGatherScatterOpCost
- masked_expandload/compressstore → getExpandCompressMemoryOpCost
- experimental_vp_strided_{load,store} → getStridedMemoryOpCost
TODO: add support for vp_load_ff.
No functional change intended; costs continue to route to the same
target-specific hooks.
[TTI] Use MemIntrinsicCostAttributes for getExpandCompressMemoryOpCost (#168677)
- Following #168029. This is a step toward a unified interface for
masked/gather-scatter/strided/expand-compress cost modeling.
- Replace the ad-hoc parameter list with a single attributes object.
API change:
```
- InstructionCost getExpandCompressMemoryOpCost(Opcode, DataTy,
- VariableMask, Alignment,
- CostKind, Inst);
+ InstructionCost getExpandCompressMemoryOpCost(MemIntrinsicCostAttributes,
+ CostKind);
```
Notes:
- NFCI intended: callers populate MemIntrinsicCostAttributes with same
information as before.
[LLD] Add support for statically resolved vendor-specific RISCV relocations. (#169273)
This is achieved by using some of the bits of RelType to tag vendor namespaces. This change also adds a relocation iterator for RISCV that folds vendor namespaces into the RelType of the following relocation.
This patch is extracted from the implementation of RISCV vendor-specific relocations in the CHERIoT LLVM downstream: https://github.com/CHERIoT-Platform/llvm-project/commit/3d6d6f7d9480b590731cbcf4b4817e1fa3049854
[mlir][arith] Fix `arith.cmpf` lowering with unsupported FP types (#166684)
The `arith.cmpf` lowering pattern used to generate invalid IR when an
unsupported floating-point type was used.
[QualGroup][docs] Update meeting schedule and link for slides (#169458)
Summary
======
This PR update the schedule for online sync-up and update link for past
meeting slides.
Changes
======
* Remove the wednesday schedule, since we did not have the meeting for
Americas-friendly timezones.
* Use a single folder for past meeting slides instead of individual
links.
Related Links
=========
* [Meeting materials for Qualification Working
Group](https://llvm.org/docs/QualGroup.html#meeting-materials)
* [Online
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[libc++] Fix the locale base API on Linux with musl (#167980)
This pull request addresses an issue encountered when building
**libcxx** with certain configurations (`-D_LIBCPP_HAS_MUSL_LIBC` &
`-D__linux__`) that lack the `_GNU_SOURCE` definition. Specifically,
this issue arises if the system **musl libc** is built with
`_BSD_SOURCE` instead of `_GNU_SOURCE`. The resultant configuration
leads to problems with the "Strtonum functions" in the file
[libcxx/include/__locale_dir/support/linux.h](https://github.com/llvm/llvm-project/tree/master/libcxx/include/__locale_dir/support/linux.h),
affecting the following functions:
- `__strtof`
- `__strtod`
- `__strtold`
**Error messages displayed include**:
```console
error: no member named 'strtof_l' in the global namespace
```
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[NFC] [DirectX] Make DirectX codegen test `CBufferAccess/gep-ce-two-uses.ll` more strict (#169855)
Continuation of PR #169848 to address PR comments.
This PR makes the test more strict by adding CHECKs to ensure the loads
are indeed using the same or different GEPs.
