LLVM/project 41dab73llvm/lib/Target/AArch64 AArch64InstrInfo.td

[AArch64] Remove unused SDTypeProfile from AArch64InstrInfo.td (NFC) (#198269)

These became dead in earlier cleanups:
- SDT_AArch64unvec and SDT_AArch64binvec in b0b97e3b0507
- SDT_AArch64fcmpz in d7f3c3129344
- SDT_AArch64TLSDescCall in aea846182090
DeltaFile
+0-7llvm/lib/Target/AArch64/AArch64InstrInfo.td
+0-71 files

LLVM/project 18e5a2dllvm/test/CodeGen/SPIRV/instructions scalar-floating-point-arithmetic.ll

[NFC][SPIR-V] Re-enable scalar fneg arithmetic test (#198204)
DeltaFile
+12-14llvm/test/CodeGen/SPIRV/instructions/scalar-floating-point-arithmetic.ll
+12-141 files

LLVM/project 24b04abllvm/test/CodeGen/SPIRV/instructions float-fast-flags.ll

[NFC][SPIR-V] Add FPFastMathMode decorations checks in float-fast-flags test (#198209)
DeltaFile
+26-20llvm/test/CodeGen/SPIRV/instructions/float-fast-flags.ll
+26-201 files

LLVM/project 64c39ddflang/include/flang/Optimizer/Dialect FIROps.td, flang/lib/Lower Bridge.cpp PFTBuilder.cpp

[flang][debug] Only import debug info for specified renamed variables (#194926)

Given the following:

USE mod, ONLY : alias => var

Currently, flang will create a DW_TAG_imported_module tag for mod when
it should only be creating a list of DW_TAG_imported_declaration tags
for each imported variable. This causes erroneous variables from mod to
be visible in the debugger with undefined information.

The correct logic to do this was previously implemented at line 837 in
flang/lib/Optimizer/Transforms/AddDebugInfo.cpp under the comment "//
Process renames within ONLY clause". But this code block would never be
invoked as the function handleOnlyClause would never be called as only
one of renames or ONLY clauses could be present at once, not both. This
commit fixes the logic and allows the proper code block to be called.

Fixes #180836
DeltaFile
+7-2flang/include/flang/Optimizer/Dialect/FIROps.td
+3-1flang/lib/Lower/Bridge.cpp
+2-2flang/test/Lower/debug-use-stmt.f90
+1-1flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
+2-0flang/test/Integration/debug-use-stmt.f90
+1-0flang/lib/Lower/PFTBuilder.cpp
+16-61 files not shown
+17-67 files

LLVM/project 2e3e28bflang-rt CMakeLists.txt

[flang-rt] Add -Wno-fenv-access to flang-rt compile options

A check recently added to clang will now flag uses of floating-point
exception routines. There are some calls to these functions in the
flang runtime. Since the flang runtime is compiled with the freshly
built clang, it now shows these warnings.

Since the CI build uses -Werror, this breaks the flang-rt build
even though no changes to the flang-rt were made:

flang-rt/lib/runtime/main.cpp:20:3: error:
      'feclearexcept' used without enabling floating-point exception behavior;
      use 'pragma STDC FENV_ACCESS ON' or compile with
      '-ffp-exception-behavior=maytrap' [-Werror,-Wfenv-access]
   20 |   std::feclearexcept(FE_ALL_EXCEPT);
      |   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
flang-rt/lib/runtime/main.cpp:25:3: error:
      'fesetround' used without enabling floating-point exception behavior; use
      'pragma STDC FENV_ACCESS ON' or compile with

    [7 lines not shown]
DeltaFile
+12-0flang-rt/CMakeLists.txt
+12-01 files

LLVM/project 93ea5b2llvm/test/Transforms/LoopInterchange loop-interchange-optimization-remarks.ll

fix test
DeltaFile
+3-2llvm/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll
+3-21 files

LLVM/project 9a454ddllvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-vectorization.ll loop-interchange-optimization-remarks.ll

[LoopInterchange] Disable LoopCacheAnalysis-based heuristic by default
DeltaFile
+3-3llvm/test/Transforms/LoopInterchange/profitability-vectorization.ll
+1-2llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+1-1llvm/test/Transforms/LoopInterchange/loop-interchange-optimization-remarks.ll
+1-1llvm/test/Transforms/LoopInterchange/delay-cachecost-calculation.ll
+1-1llvm/test/Transforms/LoopInterchange/lcssa-phi-outer-latch.ll
+1-1llvm/test/Transforms/LoopInterchange/perserve-lcssa.ll
+8-91 files not shown
+9-107 files

LLVM/project 30d2ac5llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange dependency-all-eq.ll pr43176-move-to-new-latch.ll

[LoopInterchange] Relax legality check to accept more patterns
DeltaFile
+103-42llvm/test/Transforms/LoopInterchange/dependency-all-eq.ll
+15-0llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+8-6llvm/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
+4-6llvm/test/Transforms/LoopInterchange/inner-only-reductions.ll
+6-3llvm/test/Transforms/LoopInterchange/legality-check.ll
+0-8llvm/test/Transforms/LoopInterchange/innermost-latch-uses-values-in-middle-header.ll
+136-651 files not shown
+140-697 files

LLVM/project 45fe649llvm/test/Transforms/LoopInterchange profitability-vectorization.ll

address review comment
DeltaFile
+1-1llvm/test/Transforms/LoopInterchange/profitability-vectorization.ll
+1-11 files

LLVM/project f965c25llvm/test/Transforms/LoopInterchange dependency-all-eq.ll

[LoopInterchange] Add test with dependency `[* =]` and `[= *]` (NFC)
DeltaFile
+117-0llvm/test/Transforms/LoopInterchange/dependency-all-eq.ll
+117-01 files

LLVM/project d8f51a2llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange dependency-all-eq.ll

[LoopInterchange] Change the cost model to interchange `[* =]`
DeltaFile
+30-53llvm/test/Transforms/LoopInterchange/dependency-all-eq.ll
+33-2llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+63-552 files

LLVM/project 5a02945llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-instorder.ll

[LoopInterchange] Take base pointer into account in profitability check
DeltaFile
+18-7llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+7-17llvm/test/Transforms/LoopInterchange/profitability-instorder.ll
+25-242 files

LLVM/project 675374ellvm/test/Transforms/LoopInterchange profitability-instorder.ll

[LoopInterchange] Add test for multiple accesses to same base ptr (NFC)
DeltaFile
+86-2llvm/test/Transforms/LoopInterchange/profitability-instorder.ll
+86-21 files

LLVM/project a5e248bllvm/test/Transforms/LoopInterchange profitability-instorder.ll

update test
DeltaFile
+42-51llvm/test/Transforms/LoopInterchange/profitability-instorder.ll
+42-511 files

LLVM/project 0e72407llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-instorder.ll interchangeable-outerloop-multiple-indvars.ll

[LoopInterchange] Fix instorder profitability check
DeltaFile
+50-41llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+40-30llvm/test/Transforms/LoopInterchange/profitability-instorder.ll
+1-1llvm/test/Transforms/LoopInterchange/interchangeable-outerloop-multiple-indvars.ll
+91-723 files

LLVM/project 5166350llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange profitability-instorder.ll

update
DeltaFile
+30-28llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+28-28llvm/test/Transforms/LoopInterchange/profitability-instorder.ll
+58-562 files

LLVM/project d6717b0llvm/lib/Transforms/Scalar LoopInterchange.cpp

address review comments
DeltaFile
+16-2llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+16-21 files

LLVM/project 03abd63flang/test/Driver intrinsic-module-path_per_target.f90

Apply suggestion by @tarunprabhu
DeltaFile
+3-2flang/test/Driver/intrinsic-module-path_per_target.f90
+3-21 files

LLVM/project 4e111f5llvm/test/Transforms/LoopInterchange profitability-instorder.ll

[LoopInterchange] Add tests for a simple profitable case currently missed (NFC) (#181990)

This patch adds test cases where the heuristic function `instorder` is
somewhat inaccurate, causing the profitability decision to behave
unexpectedly. The root cause is that the heuristic function assumes that
the structure of GEPs "reflect" the original memory access patterns,
which is not always the case. For example, given the following code:

```c
int A[100][100];
for (i = 0; i < 100; i++)
  for (j = 0; j < 100; j++)
    A[i][j] = ...;
```

The heuristic assumes that the memory access will be transformed into
like:

```llvm

    [14 lines not shown]
DeltaFile
+189-0llvm/test/Transforms/LoopInterchange/profitability-instorder.ll
+189-01 files

LLVM/project 661aae4clang/test/CXX/drs cwg27xx.cpp cwg31xx.cpp, clang/test/SemaCXX lambda-expressions.cpp

[clang] Add tests for some of CWG issues resolved in Croydon (2026-03) (#189299)

This PR adds tests for the following Core issues:
- [CWG2765](https://cplusplus.github.io/CWG/issues/2765.html) "Address
comparisons between potentially non-unique objects during constant
evaluation";
- [CWG2966](https://cplusplus.github.io/CWG/issues/2966.html) "Alignment
and value representation of `std::nullptr_t`";
- [CWG3035](https://cplusplus.github.io/CWG/issues/3035.html) "Lambda
expressions in anonymous unions";
- [CWG3128](https://cplusplus.github.io/CWG/issues/3128.html)
"Potentially-throwing unevaluated operands";
- [CWG3151](https://cplusplus.github.io/CWG/issues/3151.html) "Closure
types that are `final`";
- [CWG3156](https://cplusplus.github.io/CWG/issues/3156.html) "Handling
of deleted functions in unevaluated _lambda-captures_".

Additionally, the following Core issues are marked as "N/A", because I
don't think they can be tested:

    [16 lines not shown]
DeltaFile
+60-7clang/test/CXX/drs/cwg27xx.cpp
+40-9clang/test/CXX/drs/cwg31xx.cpp
+11-11clang/www/cxx_dr_status.html
+11-0clang/test/CXX/drs/cwg30xx.cpp
+10-0clang/test/CXX/drs/cwg29xx.cpp
+7-0clang/test/SemaCXX/lambda-expressions.cpp
+139-271 files not shown
+141-277 files

LLVM/project 9f6031cllvm/test/CodeGen/AMDGPU/GlobalISel sdivrem.ll udivrem.ll, llvm/test/CodeGen/Thumb2 mve-clmul.ll

rebase

Created using spr 1.3.7
DeltaFile
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+2,801-2,109llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
+0-4,752llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
+4,549-0llvm/test/tools/llvm-mca/RISCV/SiFiveP800/rvv/arithmetic.test
+20,662-26,9822,583 files not shown
+149,761-81,8662,589 files

LLVM/project 176512dllvm/test/CodeGen/AMDGPU/GlobalISel sdivrem.ll udivrem.ll, llvm/test/CodeGen/Thumb2 mve-clmul.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+2,801-2,109llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
+0-4,752llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
+4,549-0llvm/test/tools/llvm-mca/RISCV/SiFiveP800/rvv/arithmetic.test
+20,662-26,9822,583 files not shown
+149,761-81,8662,589 files

LLVM/project 9365fe2llvm/test/CodeGen/AMDGPU/GlobalISel sdivrem.ll udivrem.ll, llvm/test/CodeGen/Thumb2 mve-clmul.ll

rebase

Created using spr 1.3.7
DeltaFile
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+2,801-2,109llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
+0-4,752llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
+4,549-0llvm/test/tools/llvm-mca/RISCV/SiFiveP800/rvv/arithmetic.test
+20,662-26,9822,583 files not shown
+149,761-81,8662,589 files

LLVM/project d483a6allvm/test/CodeGen/AMDGPU/GlobalISel sdivrem.ll udivrem.ll, llvm/test/CodeGen/Thumb2 mve-clmul.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+2,801-2,109llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
+0-4,752llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
+4,549-0llvm/test/tools/llvm-mca/RISCV/SiFiveP800/rvv/arithmetic.test
+20,662-26,9822,583 files not shown
+149,761-81,8662,589 files

LLVM/project f1349c1llvm/test/CodeGen/AMDGPU/GlobalISel sdivrem.ll udivrem.ll, llvm/test/CodeGen/Thumb2 mve-clmul.ll

Removed builtin and use of uintptr_t

Created using spr 1.3.7
DeltaFile
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+2,801-2,109llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
+0-4,752llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
+4,549-0llvm/test/tools/llvm-mca/RISCV/SiFiveP800/rvv/arithmetic.test
+20,662-26,9822,583 files not shown
+149,761-81,8662,589 files

LLVM/project 9deb4fdllvm/test/CodeGen/AMDGPU/GlobalISel sdivrem.ll udivrem.ll, llvm/test/CodeGen/Thumb2 mve-clmul.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+8,633-8,584llvm/test/CodeGen/Thumb2/mve-clmul.ll
+1,243-8,768llvm/test/CodeGen/X86/vector-replicaton-i1-mask.ll
+3,436-2,769llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll
+2,801-2,109llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll
+0-4,752llvm/test/tools/llvm-mca/RISCV/SiFiveP800/vlseg-vsseg.s
+4,549-0llvm/test/tools/llvm-mca/RISCV/SiFiveP800/rvv/arithmetic.test
+20,662-26,9822,582 files not shown
+149,758-81,8572,588 files

LLVM/project 73ddc72llvm/test/CodeGen/X86 atomic-load-store.ll

[X86] Add atomic vector store tests for unaligned >1 sizes. (#197372)

Unaligned atomic vector stores with size >1 are lowered to calls.
Adding their tests separately here.

Store-side counterpart to #148896. Stacked below #197165.
DeltaFile
+1,068-0llvm/test/CodeGen/X86/atomic-load-store.ll
+1,068-01 files

LLVM/project 7d27a76llvm/lib/IR Constants.cpp AsmWriter.cpp, llvm/test/Assembler constant-splat.ll

[LLVM][AsmWriter] Fix ConstantFP zeroinitializer check (#196097)

It turns out ppc_fp128 has a value where isPosZero() returns true but
isNullValue() returns false.
DeltaFile
+2-3llvm/lib/IR/Constants.cpp
+3-0llvm/test/Assembler/constant-splat.ll
+1-1llvm/lib/IR/AsmWriter.cpp
+6-43 files

LLVM/project 431f757llvm/test/CodeGen/AArch64 sve-multivector-loads.ll, llvm/test/Transforms/LoopVectorize/X86 masked_load_store.ll

Merge branch 'main' into users/kasuga-fj/da-consolidate-acc-gcd
DeltaFile
+897-897llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
+1,526-0llvm/test/CodeGen/AArch64/sve-multivector-loads.ll
+615-549llvm/test/Transforms/SLPVectorizer/X86/arith-mul-smulo.ll
+615-449llvm/test/Transforms/SLPVectorizer/X86/arith-add-uaddo.ll
+615-449llvm/test/Transforms/SLPVectorizer/X86/arith-add-saddo.ll
+615-449llvm/test/Transforms/SLPVectorizer/X86/arith-sub-usubo.ll
+4,883-2,793185 files not shown
+10,409-6,805191 files

LLVM/project e43fcb0llvm/lib/Target/X86/AsmParser X86AsmParser.cpp, llvm/test/CodeGen/X86 inline-asm-intel-negative-scale.ll

[X86] Fix Invalid assembly given inverted meaning (#190460)

Previously, `lea rax, [rax - 8 * rdx]` would be misassembled as `lea rax, [rax + 8 * rdx]` when a program with this line should've been rejected. 

This patch rejects the invalid program and cleans up some misleading `unknown token in expression` diagnostics that came up in similar programs.

Fixes: https://github.com/llvm/llvm-project/issues/96427
DeltaFile
+48-20llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+16-0llvm/test/MC/X86/intel-syntax-invalid-scale.s
+14-0llvm/test/CodeGen/X86/inline-asm-intel-negative-scale.ll
+78-203 files