LLVM/project 8530a2ccmake/Modules LLVMVersion.cmake

Bump version to 22.1.0-rc3
DeltaFile
+1-1cmake/Modules/LLVMVersion.cmake
+1-11 files

LLVM/project a5d3471.github/workflows release-documentation.yml release-tasks.yml

workflows/release-task: Use less privileged token for uploading release notes (#180299) (#180650)

We were using one token for both pushing to the llvmbot fork and for
creating a pull request against the www-releases repository, since the
fork and the repository have different owners, we were using a classic
access token which has very coarse-grained permissions. By using two
separate tokens, we limit the permissions to just what we need to do the
task.

This is a re-commit of b6ee085068972a41f3b2735a9f7e3ca48eab0f00 minus
the environment changes which were causing the workflow to fail.

(cherry picked from commit 48dffbc654f2a606025f4b14c9b789c99f8188ae)
DeltaFile
+5-1.github/workflows/release-documentation.yml
+1-0.github/workflows/release-tasks.yml
+6-12 files

LLVM/project 2566c81.github/workflows release-binaries.yml release-binaries-all.yml, llvm/utils/git requirements.txt requirements.txt.in

workflows/release-binaries: Add support for Windows ARM builds (#177609)

(cherry picked from commit 6de2b513c6d13089f4190584a88602de8964813e)
DeltaFile
+387-304llvm/utils/git/requirements.txt
+12-1.github/workflows/release-binaries.yml
+2-1llvm/utils/git/requirements.txt.in
+1-0.github/workflows/release-binaries-all.yml
+402-3064 files

LLVM/project 0f8d8dcclang/lib/AST/ByteCode InterpBuiltin.cpp, clang/test/AST/ByteCode complex.cpp

[clang][bytecode] Reject composite copies on primitive pointers (#180683)

This should fail.
DeltaFile
+9-0clang/test/AST/ByteCode/complex.cpp
+5-0clang/lib/AST/ByteCode/InterpBuiltin.cpp
+14-02 files

LLVM/project 1cf62afclang/lib/AST/ByteCode Interp.cpp, clang/test/AST/ByteCode new-delete.cpp

[clang][bytecode] Don't call InterpFrame::getThis() on the bottom frame (#180682)

This happens when we're in checkingPotentialConstantExpression() and we
try to evaluate a delete expression.
DeltaFile
+6-0clang/test/AST/ByteCode/new-delete.cpp
+2-1clang/lib/AST/ByteCode/Interp.cpp
+8-12 files

LLVM/project 2c1d15amlir/lib/Dialect/Transform/IR TransformDialect.cpp, mlir/lib/IR Verifier.cpp

Revert "[mlir] Fix the order of operation attribute verification"

This reverts commit e1651717324e8e17052380c55d8755305552ac9b.

This was submitted by accident.
DeltaFile
+51-0mlir/test/Dialect/Transform/ops-invalid.mlir
+8-8mlir/lib/IR/Verifier.cpp
+14-0mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
+2-2mlir/test/Dialect/GPU/invalid.mlir
+1-1mlir/test/Dialect/LLVMIR/invalid.mlir
+76-115 files

LLVM/project e165171mlir/lib/Dialect/Transform/IR TransformDialect.cpp, mlir/lib/IR Verifier.cpp

[mlir] Fix the order of operation attribute verification

The verifiers of these attributes are supposed to verify additional
constraints which usually require the invariants, nested ops to be
verified first. Move it to the end of verification so that we don't
operate on malformed operations.
DeltaFile
+0-51mlir/test/Dialect/Transform/ops-invalid.mlir
+8-8mlir/lib/IR/Verifier.cpp
+0-14mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
+2-2mlir/test/Dialect/GPU/invalid.mlir
+1-1mlir/test/Dialect/LLVMIR/invalid.mlir
+11-765 files

LLVM/project 33fa987clang/lib/Driver/ToolChains/Arch AArch64.cpp

[Clang][AArch64] Extract get target CPU by triple (NFC) (#179097)

This patch refactors the AArch64 target resolution in Clang driver,
extracting a new static local function called
`getAArch64TargetCPUByTriple` to reduce redundant checks at runtime.
Previously, `getAArch64TargetFeatures` would redundantly double-check
`march` and `mcpu` arguments. Also removes some uninformative comments
on the way.
DeltaFile
+32-28clang/lib/Driver/ToolChains/Arch/AArch64.cpp
+32-281 files

LLVM/project ff0568flldb/include/lldb/Host MemoryMonitor.h, lldb/source/Host/common MemoryMonitor.cpp

[lldb] Fix memory monitor shutdown on Linux using eventfd (#178083)

The current linux implementation has a 1 second timeout when polling for
memory pressure. lldb-dap may take up to an extra 1 second to shutdown.
Use an event file descriptor to immediately stop the memory monitor
thread.

Fixes #150220

(cherry picked from commit a5ffce0faebe5f49d8befb774f4cb781b9e33df7)
DeltaFile
+102-31lldb/source/Host/common/MemoryMonitor.cpp
+2-1lldb/include/lldb/Host/MemoryMonitor.h
+104-322 files

LLVM/project a41eda7llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU isel-amdgcn-cs-chain-intrinsic-w32.ll isel-amdgcn-cs-chain-intrinsic-w64.ll

[AMDGPU] Allow hoising of V_READFIRSTLANE_B32 for uniform operand

readfirstlane can be moved across control flow for uniform inputs.
The MachineInstr::NoConvergent attribute allows hoisting
which is otherwise prohibited for a convergent instruction.
DeltaFile
+82-82llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w32.ll
+52-52llvm/test/CodeGen/AMDGPU/isel-amdgcn-cs-chain-intrinsic-w64.ll
+24-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.make.buffer.rsrc.ll
+33-0llvm/test/CodeGen/AMDGPU/readanylane.ll
+16-16llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-intrinsic-dyn-vgpr-w32.ll
+11-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+218-1742 files not shown
+224-1798 files

LLVM/project 1a9c61fllvm/lib/Target/AMDGPU SIInstrInfo.cpp

[AMDGPU] Non convergent instruction does not depend on EXEC. NFCI. (#179821)

DeltaFile
+4-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+4-01 files

LLVM/project 10a50cellvm/test/CodeGen/AMDGPU llvm.sqrt.f16.ll, llvm/test/CodeGen/AMDGPU/GlobalISel llvm.amdgcn.struct.buffer.atomic.swap.ll llvm.amdgcn.raw.buffer.atomic.swap.ll

Merge branch 'main' into users/ssahsara/async-lds-dma
DeltaFile
+5,835-5,584llvm/test/tools/llvm-dwarfdump/X86/simplified-template-names.s
+934-0llvm/test/Transforms/LoopVectorize/find-last-sink-based-iv-expr.ll
+220-491llvm/test/CodeGen/X86/select-big-integer.ll
+658-0llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
+620-0llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
+374-158llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
+8,641-6,233540 files not shown
+28,083-9,346546 files

LLVM/project a56b877llvm/lib/Target/X86 X86GlobalBaseReg.cpp X86InstrInfo.cpp, llvm/test/CodeGen/X86 llc-pipeline-npm.ll

[NewPM] Port x86-global-base-reg (#180119)

Had to move X86GlobalBaseRegPass to its own file like in
https://github.com/llvm/llvm-project/pull/179864

No test coverage added for now as there are no MIR->MIR tests exercising
this pass and we do not have enough ported to run any end to end tests.

This is a redo of https://github.com/llvm/llvm-project/pull/180070
DeltaFile
+145-0llvm/lib/Target/X86/X86GlobalBaseReg.cpp
+0-103llvm/lib/Target/X86/X86InstrInfo.cpp
+7-1llvm/lib/Target/X86/X86.h
+4-0llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+2-2llvm/lib/Target/X86/X86TargetMachine.cpp
+1-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+159-1082 files not shown
+161-1098 files

LLVM/project 461e433clang/lib/AST/ByteCode Interp.h, clang/test/AST/ByteCode intap.cpp

[clang][bytecode] Don't use trunc() to increase APInt bitWidth (#180536)

`FieldDecl::getBitWidthValue()` can return a value higher than the type
size of the bit field. We need to account for that.
DeltaFile
+12-14clang/lib/AST/ByteCode/Interp.h
+13-0clang/test/AST/ByteCode/intap.cpp
+25-142 files

LLVM/project 2d1b2b7clang/docs ReleaseNotes.rst, clang/test/Sema attr-nooutline.c attr-nooutline.cpp

Address Review Feedback: Flags, Release Notes
DeltaFile
+3-3clang/docs/ReleaseNotes.rst
+1-1clang/test/Sema/attr-nooutline.c
+1-1clang/test/Sema/attr-nooutline.cpp
+5-53 files

LLVM/project 62dcb61clang/include/clang/Basic AttrDocs.td Attr.td, clang/test/CodeGen attr-nooutline.c

Address reviewer feedback: Tests, Docs, TableGen
DeltaFile
+30-0clang/include/clang/Basic/AttrDocs.td
+19-10clang/test/CodeGen/attr-nooutline.c
+2-2clang/include/clang/Basic/Attr.td
+51-123 files

LLVM/project c61a512clang/docs ReleaseNotes.rst

Release Note
DeltaFile
+2-0clang/docs/ReleaseNotes.rst
+2-01 files

LLVM/project 66969e5clang/docs ReleaseNotes.rst

Release Notes
DeltaFile
+3-0clang/docs/ReleaseNotes.rst
+3-01 files

LLVM/project 8e00878llvm/docs ReleaseNotes.md

Release Note
DeltaFile
+3-0llvm/docs/ReleaseNotes.md
+3-01 files

LLVM/project 2b84629clang/include/clang/Basic CodeGenOptions.def, clang/include/clang/Options Options.td

[clang] Ensure -mno-outline adds attributes

Before this change, `-mno-outline` and `-moutline` only controlled the
pass pipelines for the invoked compiler/linker.

The drawback of this implementation is that, when using LTO, only the
flag provided to the linker invocation is honoured (and any files which
individually use `-mno-outline` will have that flag ignored).

This change serialises the `-mno-outline` flag into each function's
IR/Bitcode, so that we can correctly disable outlining from functions in
files which disabled outlining, without affecting outlining choices for
functions from other files. This matches how other optimisation flags
are handled so the IR/Bitcode can be correctly merged during LTO.
DeltaFile
+14-3clang/test/CodeGen/attr-nooutline.c
+7-10clang/include/clang/Options/Options.td
+6-5clang/lib/Driver/ToolChains/CommonArgs.cpp
+3-1clang/lib/CodeGen/CodeGenModule.cpp
+3-0clang/include/clang/Basic/CodeGenOptions.def
+1-1clang/test/Driver/aarch64-outliner.c
+34-203 files not shown
+37-239 files

LLVM/project 44a5ae3clang/include/clang/Basic Attr.td, clang/lib/CodeGen CodeGenModule.cpp

[clang] Add clang::nooutline Attribute

This change:
- Adds a `[[clang::nooutline]]` function attribute for C and C++. There
  is no equivalent GNU syntax for this attribute, so no `__attribute__`
  syntax.
- Uses the presence of `[[clang::nooutline]]` to add the `nooutline`
  attribute to IR function definitions.
- Adds test for the above.

The `nooutline` attribute disables both the Machine Outliner (enabled at
Oz for some targets), and the IR Outliner (disabled by default).
DeltaFile
+16-0clang/test/CodeGen/attr-nooutline.c
+7-0clang/test/Sema/attr-nooutline.c
+7-0clang/test/Sema/attr-nooutline.cpp
+7-0clang/include/clang/Basic/Attr.td
+3-0clang/lib/CodeGen/CodeGenModule.cpp
+1-0clang/test/Misc/pragma-attribute-supported-attributes-list.test
+41-06 files

LLVM/project c6e30bcllvm/include/llvm/IR Attributes.td, llvm/lib/CodeGen MachineOutliner.cpp

[outliners] Turn nooutline into an Enum Attribute

This change turns the `"nooutline"` attribute into an enum attribute
called `nooutline`, and adds an auto-upgrader for bitcode to make the
same change to existing IR.

This IR attribute disables both the Machine Outliner (enabled at Oz for
some targets), and the IR Outliner (disabled by default).
DeltaFile
+12-0llvm/test/Bitcode/upgrade-nooutline.ll
+6-0llvm/lib/IR/AutoUpgrade.cpp
+4-0llvm/lib/Transforms/Utils/CodeExtractor.cpp
+2-2llvm/test/Transforms/IROutliner/nooutline-attribute.ll
+3-0llvm/include/llvm/IR/Attributes.td
+1-1llvm/lib/CodeGen/MachineOutliner.cpp
+28-36 files not shown
+36-612 files

LLVM/project a455e38clang/lib/Driver/ToolChains CommonArgs.cpp

formatting
DeltaFile
+3-2clang/lib/Driver/ToolChains/CommonArgs.cpp
+3-21 files

LLVM/project 4152ef2clang/include/clang/Options Options.td, clang/lib/Driver/ToolChains CommonArgs.cpp

[clang][Driver] Support Outline Flags on RISC-V and X86

These two targets both also support the machine outliner, so these flags
should probably be cross-target. This updates the docs for these flags
as well.
DeltaFile
+11-7clang/include/clang/Options/Options.td
+10-6clang/lib/Driver/ToolChains/CommonArgs.cpp
+7-0clang/test/Driver/riscv-outliner.c
+7-0clang/test/Driver/x86-outliner.c
+0-3clang/test/Driver/aarch64-outliner.c
+3-0clang/test/Driver/unsupported-outliner.c
+38-166 files

LLVM/project 031424eclang/docs ReleaseNotes.rst

Release Note
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+1-0clang/docs/ReleaseNotes.rst
+1-01 files

LLVM/project 8a5168bclang/lib/Driver/ToolChains CommonArgs.cpp

Move Comment to correct place
DeltaFile
+3-3clang/lib/Driver/ToolChains/CommonArgs.cpp
+3-31 files

LLVM/project 2302110clang/lib/Format TokenAnnotator.cpp, clang/unittests/Format TokenAnnotatorTest.cpp

[clang-format] Don't annotate C compound literal r_paren (#180436)

Fixes #180179
DeltaFile
+8-0clang/unittests/Format/TokenAnnotatorTest.cpp
+3-1clang/lib/Format/TokenAnnotator.cpp
+11-12 files

LLVM/project 6dc9a48clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode invalid.cpp

[clang][bytecode] Handle missing target label in break statement (#180532)

Happens in error cases.
DeltaFile
+13-0clang/test/AST/ByteCode/invalid.cpp
+3-1clang/lib/AST/ByteCode/Compiler.cpp
+16-12 files

LLVM/project f33ea53llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV xaluo.ll condops.ll

[RISCV] Remove redundant czero in multi-word comparisons (#180485)

When comparing multi-word integers with Zicond, we generate:
  (or (czero_eqz (lo1 < lo2), (hi1 == hi2)),
      (czero_nez (hi1 < hi2), (hi1 == hi2)))

The czero_nez is redundant because when hi1 == hi2 is true, hi1 < hi2 is
already 0. This patch adds a DAG combine to recognize:
  czero_nez (setcc X, Y, CC), (setcc X, Y, eq) -> (setcc X, Y, CC)
when CC is a strict inequality (lt, gt, ult, ugt).

This saves one instruction in 128-bit comparisons on RV64 with Zicond.

Note the czero_nez becomes a czero.eqz in the final assembly because the
seteq is replaced by an xor that produces 0 when the values are equal.

Part of #179584

Assisted-by: claude
DeltaFile
+33-42llvm/test/CodeGen/RISCV/xaluo.ll
+16-32llvm/test/CodeGen/RISCV/condops.ll
+17-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+66-743 files

LLVM/project 4f81463llvm/lib/Target/AMDGPU SIInstrInfo.cpp

[AMDGPU] Non convergent instruction does not depend on EXEC. NFCI.
DeltaFile
+4-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+4-01 files