LLVM/project e34651flld/ELF SyntheticSections.cpp InputFiles.h, lld/test/ELF verneed-weak.s verneed-as-needed-weak.s

[ELF] Set vna_flags to VER_FLG_WEAK if all references are weak (#176673)

When all undefined references to a version are weak, set vna_flags to
VER_FLG_WEAK in the .gnu.version_r section. This enables glibc ld.so to
report a warning instead of an error when the required version is not
found at runtime, supporting optional dependencies.

Per https://sourceware.org/bugzilla/show_bug.cgi?id=24718#c20 ,
glibc rtld since 2.30 (BZ #24741) tolerates missing versioned symbols
when the runtime shared object defines the required version. With this
vna_flags VER_FLG_WEAK change, rtld can also tolerate a completely
missing version, printing a message like:

```
% LD_PRELOAD=c2.so ./a
./a: /tmp/t/v2/c2.so: weak version `v1' not found (required by /tmp/t/v2/b.so)
a
```


    [2 lines not shown]
DeltaFile
+80-0lld/test/ELF/verneed-weak.s
+21-15lld/ELF/SyntheticSections.cpp
+0-18lld/test/ELF/verneed-as-needed-weak.s
+10-4lld/ELF/InputFiles.h
+1-1lld/ELF/SyntheticSections.h
+112-385 files

LLVM/project 96f8782flang/lib/Optimizer/OpenMP MapInfoFinalization.cpp, flang/test/Lower/OpenMP attach-and-ref-modifier.f90 optional-argument-map-2.f90

[Flang][OpenMP][Offload] Modify MapInfoFinalization to handle attach mapping and 6.1's ref_* and attach map keywords

This PR is one of four required to implement the attach mapping semantics in Flang, alongside the
ref_ptr/ref_ptee/ref_ptr_ptee map modifiers and the attach(always/never/auto) modifiers.

This PR is the MapInfoFinalization changes required to support these features, it mainly deals with
applying the correct attach map type and manipulating the descriptor types maps for base address
and descriptor so that when we specify ref_ptr/ref_ptee we emit one of the two maps and when we
emit ref_ptr_ptee we emit our usual default maps. In all cases we add the "glue" of an new
attach map except in cases where a user has provided attach never. In cases where we are
provided an always, we apply the always map type to our attach maps.

It's important to note the runtime has a toggle for the auto map behaviour, which will flip the
attach behaviour to the newer semantics or the older semantics for backwards compatability (outside
the purview of this PR but good to mention).
DeltaFile
+588-279mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+507-247flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
+55-7flang/test/Lower/OpenMP/attach-and-ref-modifier.f90
+34-21flang/test/Transforms/omp-map-info-finalization.fir
+21-19flang/test/Lower/OpenMP/optional-argument-map-2.f90
+18-12flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
+1,223-58514 files not shown
+1,313-63320 files

LLVM/project d6652c1lldb/source/Plugins/ObjectFile/ELF ObjectFileELF.cpp, lldb/source/Symbol ObjectFile.cpp

[lldb] Fix data buffer regression in ObjectFile (#177724)

This fixes a regression in `ObjectFile` and `ObjectFileELF` introduced
by #171574.

The original code created a `DataBuffer` using `MapFileDataWritable`.

```
  data_sp = MapFileDataWritable(*file, length, file_offset);
  if (!data_sp)
    return nullptr;
  data_offset = 0;
```

The new code requires converting the `DataBuffer` to a `DataExtractor`:

```
  DataBufferSP buffer_sp = MapFileDataWritable(*file, length, file_offset);
  if (!buffer_sp)

    [11 lines not shown]
DeltaFile
+1-2lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+1-2lldb/source/Symbol/ObjectFile.cpp
+2-42 files

LLVM/project dc900f1llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Specify Loop pass adaptor to not use MSSA (#176690)

this needs to be done since "loop-mssa" adapter assumes all passes that
are part of it to preserve MSSA, CanonicalizeFreezeInLoopsPass doesen't
do this. I'm not really sure of the history here (about having two
variants of loop pass adatpters)
DeltaFile
+2-2llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+2-2llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-1llvm/include/llvm/Passes/CodeGenPassBuilder.h
+6-53 files

LLVM/project 6a12178utils/bazel/llvm-project-overlay/compiler-rt BUILD.bazel

[bazel] Fixes for compiler-rt Bazel build rules (#177287)

Update the compiler-rt arch-specific file groups to include `.h` file
extensions. At least `arm` and `ppc` have these, and seems better to be
consistent and defensive.

Also add `5` to model list for outlined atomics, matching CMake.
DeltaFile
+7-0utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
+7-01 files

LLVM/project c3e226bclang/bindings/python/clang cindex.py

[NFC][libclang/python] Move CompletionChunkKind definition before CompletionChunk (#177723)

This is a required step for the 2nd point of #156680.
It is separated into a different PR for readibility, as has been
suggested here
https://github.com/llvm/llvm-project/pull/177586#pullrequestreview-3697864205
DeltaFile
+49-48clang/bindings/python/clang/cindex.py
+49-481 files

LLVM/project cf25346llvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp, llvm/test/CodeGen/AMDGPU wait-xcnt-atomic-rmw-optimization.ll

[AMDGPU][GFX1250] Optimize s_wait_xcnt for back-to-back atomic RMWs (#177620)

This patch optimizes the insertion of s_wait_xcnt instruction for
sequences of atomic read-modify-write (RMW) operations in the
SIInsertWaitcnts pass. The Memory Legalizer conservatively inserts a
soft xcnt instruction before each atomic RMW operation as part of PR
168852, which is correct given the nature of atomic operations.
However, for back-to-back atomic RMWs, only the first s_wait_xcnt is
necessary for better runtime performance. This patch tracks atomic
RMW blocks within each basic block and removes redundant soft xcnt
instructions, keeping only the first wait in each sequence. An atomic
RMW block continues through subsequent atomic RMWs and non-memory
instructions (e.g., ALU operations) but is broken by CU-scoped memory
operations, atomic stores, or basic block boundaries.
DeltaFile
+1,271-0llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
+71-2llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+1,342-22 files

LLVM/project 6451685mlir/include/mlir/Support LLVM.h

Cleanup: Remove SmallVector hacks (#177667)

We no longer support any platform that uses Clang 5. This was a
workaround for older clang versions where template arguments weren't
merged between forward declarations and definitions correctly.

Since we don't support anything this old anymore, we can drop this
workaround.

Note: I do not have merge permissions.
DeltaFile
+0-8mlir/include/mlir/Support/LLVM.h
+0-81 files

LLVM/project c115598llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine select-binop-associative-prof.ll

[InstCombine] Preserve !prof metadata when creating select instructions.
DeltaFile
+19-0llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll
+3-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+22-12 files

LLVM/project e7b7726llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/modernize BUILD.gn

[gn build] Port 77ebdad20a17
DeltaFile
+1-0llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/modernize/BUILD.gn
+1-01 files

LLVM/project f768311llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll, llvm/test/MC/AMDGPU gfx8_asm_vop3.s gfx7_asm_vop3.s

rebase

Created using spr 1.3.6
DeltaFile
+48,017-51,672llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+41,419-41,418llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+36,428-36,427llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+28,175-28,174llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
+22,711-22,884llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
+219,099-222,9236,783 files not shown
+1,681,259-1,449,2226,789 files

LLVM/project aefdd12llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll, llvm/test/MC/AMDGPU gfx8_asm_vop3.s gfx7_asm_vop3.s

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6

[skip ci]
DeltaFile
+48,017-51,672llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+41,419-41,418llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+36,428-36,427llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+28,175-28,174llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
+22,711-22,884llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
+219,099-222,9236,783 files not shown
+1,681,259-1,449,2226,789 files

LLVM/project d3c57a9llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll, llvm/test/MC/AMDGPU gfx8_asm_vop3.s gfx7_asm_vop3.s

rebase

Created using spr 1.3.6
DeltaFile
+48,017-51,672llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+42,349-42,348llvm/test/MC/AMDGPU/gfx8_asm_vop3.s
+41,419-41,418llvm/test/MC/AMDGPU/gfx7_asm_vop3.s
+36,428-36,427llvm/test/MC/AMDGPU/gfx9_asm_vop3.s
+28,175-28,174llvm/test/MC/AMDGPU/gfx9_asm_vopc.s
+22,711-22,884llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3.txt
+219,099-222,9236,783 files not shown
+1,681,259-1,449,2226,789 files

LLVM/project 2aa2414llvm/test/Instrumentation/HWAddressSanitizer use-after-scope.ll

[NFC] [HWASan] run UTC on use-after-scope.ll
DeltaFile
+20-20llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+20-201 files

LLVM/project f5e2f29flang/include/flang/Optimizer/Dialect FIROps.td, flang/lib/Optimizer/Dialect FIROps.cpp

[flang] Added ConditionallySpeculatable and Pure for some FIR ops. (#174013)

This patch implements `ConditionallySpeculatable` interface for some
FIR operations (`embox`, `rebox`, `box_addr`, `box_dims` and `convert`).
It also adds `Pure` trait for `fir.shape`, `fir.shapeshift`,
`fir.shift` and `fir.slice`.

I could have split this into multiple patches, but the changes
are better tested together on real apps, and the amount of affected
code is small.

There are more `NoMemoryEffect` operations for which I am planning
to do the same in future PRs.
DeltaFile
+179-15flang/test/Transforms/licm.fir
+69-0flang/lib/Optimizer/Dialect/FIROps.cpp
+24-5flang/include/flang/Optimizer/Dialect/FIROps.td
+272-203 files

LLVM/project 5d91c11flang/include/flang/Optimizer/Analysis AliasAnalysis.h, flang/lib/Optimizer/Analysis AliasAnalysis.cpp CMakeLists.txt

[flang] Support cuf.device_address in FIR AliasAnalysis. (#177518)

Support `cuf.device_address` same way as `fir.address_of`.
This implementation implies that the host address and the device
address `MustAlias` (as shown in the new test). This should be
conservatively correct as long as `MustAlias` does not allow
to assume that the actual addresses are the same (that is what
LLVM documentation implies, I believe).

It is probably worth adding an operation interface to handle
`fir::AddrOfOp` and `cuf::DeviceAddressOp` in FIR AliasAnalysis,
but for the initial implementation I hardcoded the checks.

I also removed the call to `fir::valueHasFirAttribute` that performs
on demand SymbolTable lookups, which may be costly, and added
SymbolTable caching in FIR AliasAnalysis object. Anyway,
`fir::valueHasFirAttribute` does not work for `cuf::DeviceAddressOp`.
DeltaFile
+41-11flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
+50-0flang/test/Fir/CUDA/cuda-alias-analysis.fir
+28-0flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
+8-0flang/test/Analysis/AliasAnalysis/load-ptr-alloca.fir
+2-0flang/lib/Optimizer/Analysis/CMakeLists.txt
+2-0flang/test/Transforms/tbaa-with-dummy-scope2.fir
+131-116 files

LLVM/project 585954dclang/lib/Driver/ToolChains Linux.cpp, clang/test/Driver hip-runtime-libs-linux.hip

[HIP] Provide implicit include to ROCm library directory (#177704)

Summary:
It's more correct to directly link the HIP runtime if we know the path,
however some users were relying on the old `-L` to pass in some other
non-standard HIP libraries. Put that part back in for now.
DeltaFile
+5-0clang/lib/Driver/ToolChains/Linux.cpp
+1-1clang/test/Driver/hip-runtime-libs-linux.hip
+6-12 files

LLVM/project cb651a2lldb/source/Plugins/ObjectFile/ELF ObjectFileELF.cpp, lldb/source/Plugins/ObjectFile/Mach-O ObjectFileMachO.cpp

[lldb] Avoid redundant calls to `std::shared_ptr::get` (NFC) (#177720)

Avoid redundant calls to `std::shared_ptr::get()`. The class provides a
dereference operator and using that is the standard, idiomatic way to
access the underlying object.
DeltaFile
+13-18lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+8-10lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
+3-3lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
+1-1lldb/source/Symbol/ObjectFile.cpp
+25-324 files

LLVM/project 4f92da4utils/bazel/llvm-project-overlay/lldb BUILD.bazel

Fix bazel lldb (#177717)

PR #177309 introduced some new dependencies on DebugInfo/DWARF. This
updates the bazel file for lldb accordingly.
DeltaFile
+2-0utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+2-01 files

LLVM/project 9571c19utils/bazel/llvm-project-overlay/libc BUILD.bazel

[Bazel] Fix libc build. (#177716)

Fix missing dependency for change introduced in PR #177224
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

LLVM/project 7954b47lldb/packages/Python/lldbsuite/test gdbclientutils.py lldbgdbclient.py, lldb/source/Plugins/Process/gdb-remote ProcessGDBRemote.cpp

Revert "[lldb] Fix setting CanJIT if memory cannot be allocated (#176099)"

This reverts commit b5d8fc553d8e03f4d325458d29ac2c9e46a464e3.
DeltaFile
+0-55lldb/test/API/functionalities/gdb_remote_client/TestExprNoAlloc.py
+0-13lldb/packages/Python/lldbsuite/test/gdbclientutils.py
+3-3lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
+2-2lldb/packages/Python/lldbsuite/test/lldbgdbclient.py
+5-734 files

LLVM/project 2d0e952flang/lib/Lower/OpenMP Utils.cpp, flang/lib/Optimizer/OpenMP MapInfoFinalization.cpp

[Flang][OpenMP][Offload] Modify MapInfoFinalization to handle attach mapping and 6.1's ref_* and attach map keywords

This PR is one of four required to implement the attach mapping semantics in Flang, alongside the
ref_ptr/ref_ptee/ref_ptr_ptee map modifiers and the attach(always/never/auto) modifiers.

This PR is the MapInfoFinalization changes required to support these features, it mainly deals with
applying the correct attach map type and manipulating the descriptor types maps for base address
and descriptor so that when we specify ref_ptr/ref_ptee we emit one of the two maps and when we
emit ref_ptr_ptee we emit our usual default maps. In all cases we add the "glue" of an new
attach map except in cases where a user has provided attach never. In cases where we are
provided an always, we apply the always map type to our attach maps.

It's important to note the runtime has a toggle for the auto map behaviour, which will flip the
attach behaviour to the newer semantics or the older semantics for backwards compatability (outside
the purview of this PR but good to mention).
DeltaFile
+507-247flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
+55-7flang/test/Lower/OpenMP/attach-and-ref-modifier.f90
+34-21flang/test/Transforms/omp-map-info-finalization.fir
+21-19flang/test/Lower/OpenMP/optional-argument-map-2.f90
+18-12flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
+17-7flang/lib/Lower/OpenMP/Utils.cpp
+652-31313 files not shown
+725-35419 files

LLVM/project 9743deaclang/lib/CIR/CodeGen CIRGenBuiltinX86.cpp

[CIR][NFC] Fix build after emitIntrinsicCallOp change (#177706)

The emitIntrinsicCallOp function was moved from the
architecture-specific builtin implementation files to a shared location
in CIRGenBuilderTy by https://github.com/llvm/llvm-project/pull/172735.
Unfortunately, a few changes had been merged before that change was
landed and it broke the build. This updates the broken call sites.
DeltaFile
+4-4clang/lib/CIR/CodeGen/CIRGenBuiltinX86.cpp
+4-41 files

LLVM/project 6b01276llvm/test/CodeGen/X86 pclmulqdq.ll

[X86] pclmulqdq.ll - add missing AVX512 test coverage (#177694)

DeltaFile
+46-11llvm/test/CodeGen/X86/pclmulqdq.ll
+46-111 files

LLVM/project 65662cdllvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine de-morgan-prof.ll select-binop-associative-prof.ll

[InstCombine] Preserve !prof metadata when creating select instructions.
DeltaFile
+31-0llvm/test/Transforms/InstCombine/de-morgan-prof.ll
+19-0llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll
+3-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+53-13 files

LLVM/project 97c4a5fllvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/lib/Target/RISCV/Disassembler RISCVDisassembler.cpp

[RISCV] Add a template function for disassembling LMUL=2/4/8 vector registers. NFC (#177681)

DeltaFile
+6-39llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+9-3llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+15-422 files

LLVM/project a10a834llvm/lib/Target/AMDGPU GCNSubtarget.h AMDGPUSubtarget.h

[NFCI][AMDGPU] Use `GET_SUBTARGETINFO_MACRO` in `GCNSubtarget.h`
DeltaFile
+9-291llvm/lib/Target/AMDGPU/GCNSubtarget.h
+11-62llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+14-11llvm/lib/Target/AMDGPU/R600Subtarget.h
+7-5llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+0-10llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+3-3llvm/lib/Target/AMDGPU/R600Processors.td
+44-3824 files not shown
+49-38710 files

LLVM/project 3d073f4clang/docs AddressSanitizer.rst ThreadSanitizer.rst

[sanitizer][NFCI] Document interaction of inlining with disabling instrumentation (#177672)

For ASan, MSan, TSan, UBSan
DeltaFile
+16-1clang/docs/AddressSanitizer.rst
+16-0clang/docs/ThreadSanitizer.rst
+16-0clang/docs/MemorySanitizer.rst
+14-0clang/docs/UndefinedBehaviorSanitizer.rst
+62-14 files

LLVM/project 1efebfellvm/test/CodeGen/AArch64 arm64-neon-mul-div.ll

[AArch64][GlobalISel] Add test coverage for arm64-neon-mul-div.ll. NFC
DeltaFile
+2,459-1,242llvm/test/CodeGen/AArch64/arm64-neon-mul-div.ll
+2,459-1,2421 files

LLVM/project d722b29llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fdiv.ll

Address comment nan lhs
DeltaFile
+4-2llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fdiv.ll
+1-1llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+5-32 files