LLVM/project d7170f6llvm/docs TestSuiteMakefileGuide.rst SourceLevelDebugging.rst

[llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (#179288)

The LLVM test suite used to provide a Makefile-based suite, which had
been deprecated and mostly unmaintained for many years. As explained in
https://discourse.llvm.org/t/llvm-test-suite-removing-the-deprecated-makefiles,
we recently got consensus to remove that test suite, which was done in
llvm/llvm-test-suite#320. This patch cleans up the related
documentation.
DeltaFile
+0-198llvm/docs/TestSuiteMakefileGuide.rst
+0-14llvm/docs/SourceLevelDebugging.rst
+0-10llvm/docs/TestSuiteGuide.md
+0-1llvm/docs/TestingGuide.rst
+0-2234 files

LLVM/project e225bc3llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Fix formatting

Created using spr 1.3.7
DeltaFile
+2-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+2-11 files

LLVM/project 8d53f11libcxx/test/extensions/posix xopen_source.gen.py, libcxx/test/selftest/modules std-and-std.compat-module.sh.cpp std.compat-module.sh.cpp

[libc++] Enable additional tests when Clang modules are enabled (#168967)

Disabling tests when Clang modules are enabled is not great because we
are moving more and more tests towards using Clang modules by default.
Instead, disable Clang modules on a per-test basis.
DeltaFile
+5-5libcxx/test/extensions/posix/xopen_source.gen.py
+7-1libcxx/utils/libcxx/test/modules.py
+6-1libcxx/test/selftest/modules/std-and-std.compat-module.sh.cpp
+6-1libcxx/test/std/modules/std.pass.cpp
+6-1libcxx/test/std/modules/std.compat.pass.cpp
+6-1libcxx/test/selftest/modules/std.compat-module.sh.cpp
+36-1020 files not shown
+76-3826 files

LLVM/project b2a017cllvm/lib/Target/Hexagon HexagonGlobalScheduler.cpp, llvm/test/CodeGen/AMDGPU amdgpu-simplify-libcall-pow.ll

Rebase

Created using spr 1.3.7
DeltaFile
+14,035-8,410llvm/test/CodeGen/RISCV/clmul.ll
+14,058-0llvm/test/CodeGen/RISCV/clmulr.ll
+13,835-0llvm/test/CodeGen/RISCV/clmulh.ll
+8,874-0llvm/test/CodeGen/PowerPC/clmul-vector.ll
+5,330-0llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
+4,143-746llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
+60,275-9,1562,829 files not shown
+182,235-50,6162,835 files

LLVM/project 94559fbllvm/lib/Analysis DependenceAnalysis.cpp

express the test by using range analysis
DeltaFile
+4-36llvm/lib/Analysis/DependenceAnalysis.cpp
+4-361 files

LLVM/project 844619eclang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Headers/hlsl hlsl_alias_intrinsics.h

Revert "[HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385" (#182741)

Reverts llvm/llvm-project#165109
DeltaFile
+0-143llvm/test/CodeGen/DirectX/WaveActiveProduct.ll
+0-123clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+38-55llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+0-45clang/test/CodeGenHLSL/builtins/WaveActiveProduct.hlsl
+0-41llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveProduct.ll
+7-33clang/lib/CodeGen/CGHLSLBuiltins.cpp
+45-4409 files not shown
+46-50715 files

LLVM/project 609e119libcxx/include/__atomic atomic_ref.h

fix gcc ci
DeltaFile
+6-8libcxx/include/__atomic/atomic_ref.h
+6-81 files

LLVM/project c42ad58clang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Headers/hlsl hlsl_alias_intrinsics.h

[HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (#165109)

From issue #99165, adds the implementation of WaveActiveProduct. Mainly
followed how WaveActiveSum was implemented

- [x] Implement WaveActiveProduct clang builtin,
- [x] Link WaveActiveProduct clang builtin with hlsl_intrinsics.h
- [x] Add sema checks for WaveActiveProduct to
CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
- [x] Add codegen for WaveActiveProduct to EmitHLSLBuiltinExpr in
CGBuiltin.cpp
- [x] Add codegen tests to
clang/test/CodeGenHLSL/builtins/WaveActiveProduct.hlsl
- [x] Add sema tests to
clang/test/SemaHLSL/BuiltIns/WaveActiveProduct-errors.hlsl
- [x] Create the int_dx_WaveActiveProduct intrinsic in
IntrinsicsDirectX.td
- [x] Create the DXILOpMapping of int_dx_WaveActiveProduct to 119 in
DXIL.td

    [11 lines not shown]
DeltaFile
+143-0llvm/test/CodeGen/DirectX/WaveActiveProduct.ll
+123-0clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+55-38llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+45-0clang/test/CodeGenHLSL/builtins/WaveActiveProduct.hlsl
+41-0llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveProduct.ll
+33-7clang/lib/CodeGen/CGHLSLBuiltins.cpp
+440-459 files not shown
+507-4615 files

LLVM/project 4226250mlir/include/mlir/Dialect/XeGPU/uArch uArchBase.h IntelGpuXe2.h, mlir/lib/Dialect/XeGPU/Transforms XeGPULayoutImpl.cpp XeGPUPropagateLayout.cpp

[MLIR][XeGPU] Fix matrix ops layout propagation (#182268)

DeltaFile
+0-28mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
+6-18mlir/include/mlir/Dialect/XeGPU/uArch/IntelGpuXe2.h
+15-0mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
+8-6mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
+3-0mlir/lib/Dialect/XeGPU/Transforms/XeGPUPropagateLayout.cpp
+32-525 files

LLVM/project 1548723llvm/lib/Target/Sparc SparcInstrInfo.cpp SparcInstrInfo.h, llvm/test/CodeGen/SPARC stack-slot-coloring.mir

[SPARC] Set how many bytes load from or store to stack slot (#182674)

Refer from: https://reviews.llvm.org/D44782

The testcase is copied from
llvm/test/CodeGen/RISCV/stack-slot-coloring.mir.
DeltaFile
+179-0llvm/test/CodeGen/SPARC/stack-slot-coloring.mir
+50-18llvm/lib/Target/Sparc/SparcInstrInfo.cpp
+4-4llvm/lib/Target/Sparc/SparcInstrInfo.h
+233-223 files

LLVM/project 8542514mlir/python/mlir/dialects ext.py, mlir/test/python/dialects ext.py

[MLIR][Python] Allow passing dialect as a class keyword argument (#182465)

Previously, we constructed new ops using the pattern `class
MyOp(MyInt.Operation)`.

Now we’ve added a new pattern: `class MyOp(Operation, dialect=MyInt)`,
which allows more flexible composition. For example:
```python
class BinOpBase(Operation): # it can be used in any dialect!
  res: Result[Any]
  lhs: Operand[Any]
  rhs: Operand[Any]
  
class MyInt(Dialect, name="myint"):
  pass

class AddOp(BinOpBase, dialect=MyInt, name="add"):
  ...
```
DeltaFile
+28-8mlir/python/mlir/dialects/ext.py
+1-1mlir/test/python/dialects/ext.py
+29-92 files

LLVM/project 8701cfcclang-tools-extra/clang-tidy/performance StringViewConversionsCheck.cpp, clang-tools-extra/docs/clang-tidy/checks/performance string-view-conversions.rst

[clang-tidy] perf-str-view-conv improvement: support c_str/data fixing (#181473)

Handle new cases:
```
foo_sv(42, std::string(sv).c_str(), 3.14);  -> foo_sv(42, sv, 3.14);
foo_sv(42, std::string(sv).data(), 2.71);  -> foo_sv(42, sv, 2.71);
```
DeltaFile
+43-13clang-tools-extra/clang-tidy/performance/StringViewConversionsCheck.cpp
+33-0clang-tools-extra/docs/clang-tidy/checks/performance/string-view-conversions.rst
+12-1clang-tools-extra/test/clang-tidy/checkers/performance/string-view-conversions.cpp
+88-143 files

LLVM/project be2588aclang/include/clang/Basic DiagnosticASTKinds.td, clang/lib/AST ExprConstant.cpp

[clang][ExprConst] Remove bogus diagnostic (#181792)

This diagnostic is untested and this code path should be dead.
DeltaFile
+3-6clang/lib/AST/ExprConstant.cpp
+0-6clang/include/clang/Basic/DiagnosticASTKinds.td
+3-122 files

LLVM/project 31daf5cllvm/include/llvm/CodeGen SelectionDAGISel.h, llvm/lib/CodeGen/SelectionDAG SelectionDAGISel.cpp

[TableGen] Add OPC_EmitIntegerByHwMode0 and OPC_CheckChildXTypeByHwMode0. NFC (#182686)

Add versions of these opcodes that implicitly call getValueTypeForHwMode
with index 0.

This reduces llc size by ~100K.
DeltaFile
+39-20llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+37-5llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+10-0llvm/include/llvm/CodeGen/SelectionDAGISel.h
+2-2llvm/test/TableGen/RegClassByHwMode.td
+88-274 files

LLVM/project ae8ea5fllvm/lib/Target/Hexagon HexagonGlobalScheduler.cpp, llvm/test/CodeGen/AMDGPU amdgpu-simplify-libcall-pow.ll

fix unittest

Created using spr 1.3.5-bogner
DeltaFile
+14,035-8,410llvm/test/CodeGen/RISCV/clmul.ll
+14,058-0llvm/test/CodeGen/RISCV/clmulr.ll
+13,835-0llvm/test/CodeGen/RISCV/clmulh.ll
+8,874-0llvm/test/CodeGen/PowerPC/clmul-vector.ll
+5,330-0llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
+4,143-746llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
+60,275-9,1561,994 files not shown
+150,859-39,1012,000 files

LLVM/project 6e9a308clang/lib/Basic DiagnosticIDs.cpp

[clang] Avoid calling isInSystemMacro() too often (#182217)

This caused a performance regression as reported in
https://github.com/llvm/llvm-project/pull/141950
DeltaFile
+2-2clang/lib/Basic/DiagnosticIDs.cpp
+2-21 files

LLVM/project a0f344fmlir/tools/mlir-tblgen OpDocGen.cpp

[mlir-tblgen] Remove `namespace {}` around OpDocGroup (#182721)

This is temporary workaround for Asan report #182720.
DeltaFile
+4-2mlir/tools/mlir-tblgen/OpDocGen.cpp
+4-21 files

LLVM/project e157537mlir/tools/mlir-tblgen OpDocGen.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-2mlir/tools/mlir-tblgen/OpDocGen.cpp
+4-21 files

LLVM/project d92011fclang/lib/Sema SemaBoundsSafety.cpp

[clang][NFC] Fix typo in SemaBoundsSafety.cpp comments (#181585)

Minor comment fix.
DeltaFile
+1-1clang/lib/Sema/SemaBoundsSafety.cpp
+1-11 files

LLVM/project 76af740clang/include/clang/Basic DiagnosticCommentKinds.td, clang/lib/AST CommentSema.cpp

[clang][diagnostics] Refactor `warn_doc_function_method_decl_mismatch` to use enum_select (#181769)

Related: https://github.com/llvm/llvm-project/issues/123121

This patch refactors the `warn_doc_function_method_decl_mismatch`
diagnostic to use `enum_select` instead of `select`. This gets rid of
magic numbers in its caller and improves readability.
DeltaFile
+10-12clang/lib/AST/CommentSema.cpp
+3-1clang/include/clang/Basic/DiagnosticCommentKinds.td
+13-132 files

LLVM/project 728a684libcxx/include/__atomic atomic.h

[libc++] Fix typo in atomic.h comment
DeltaFile
+2-2libcxx/include/__atomic/atomic.h
+2-21 files

LLVM/project d5b9417llvm/include/llvm/ADT SmallString.h, llvm/unittests/ADT SmallStringTest.cpp

[LLVM][ADT] Add some more `starts_with`, `ends_with`, and `contains` overloads to `SmallString` (#182692)

This makes `SmallString` consistent with `std::string`,
`std::string_view`, and `StringRef`.
DeltaFile
+31-0llvm/unittests/ADT/SmallStringTest.cpp
+14-0llvm/include/llvm/ADT/SmallString.h
+45-02 files

LLVM/project d04f380llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 phi.ll

Fix crashes

Created using spr 1.3.7
DeltaFile
+26-26llvm/test/Transforms/SLPVectorizer/X86/phi.ll
+4-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+30-272 files

LLVM/project c04b00dlld/ELF Relocations.cpp, lld/ELF/Arch ARM.cpp

[ELF] Add target-specific relocation scanning for ARM (#182440)

Implement ARM::scanSectionImpl, following the pattern established for
AArch64 and other targets. This merges the getRelExpr and TLS handling
for SHF_ALLOC sections into the target-specific scanner, enabling
devirtualization and eliminating abstraction overhead.

- Inline relocation classification into scanSectionImpl with a switch
  on relocation type, replacing the generic rs.scan() path.
- Use processR_PC/processR_PLT_PC for common PC-relative and PLT
  relocations.
- Handle TLS inline: checkTlsLe for TLS LE, handleTlsIe<false> for
  TLS IE (no IE-to-LE optimization for ARM), and direct flag/reloc
  emission for TLS GD/LD (no GD/LD optimization for ARM).
- Set hasGotOffRel for R_GOTREL/R_GOTONLY_PC relocations.
- Simplify getRelExpr to only handle relocations needed by
  relocateNonAlloc and preprocessRelocs.
DeltaFile
+157-82lld/ELF/Arch/ARM.cpp
+4-4lld/ELF/Relocations.cpp
+161-862 files

LLVM/project f912679flang/test/Lower/forall forall-construct.f90 forall-slice.f90

[flang][NFC] Converted five tests from old lowering to new lowering (part 19) (#182554)

Tests converted from test/Lower/forall: forall-construct-4.f90,
forall-construct.f90, forall-ranked.f90, forall-slice.f90,
forall-stmt.f90
DeltaFile
+34-80flang/test/Lower/forall/forall-construct.f90
+31-64flang/test/Lower/forall/forall-slice.f90
+22-51flang/test/Lower/forall/forall-ranked.f90
+28-35flang/test/Lower/forall/forall-stmt.f90
+5-5flang/test/Lower/forall/forall-construct-4.f90
+120-2355 files

LLVM/project 43d53a6llvm/lib/Target/ARM ARMBaseInstrInfo.cpp ARMISelLowering.cpp, llvm/lib/Target/ARM/AsmParser ARMAsmParser.cpp

[ARM] Fix more typos
DeltaFile
+9-9llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+9-9llvm/lib/Target/ARM/ARMISelLowering.cpp
+6-6llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+5-5llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+5-5llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
+4-4llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
+38-3823 files not shown
+69-6929 files

LLVM/project 9d9c7fclldb/source/Plugins/Process/FreeBSDKernel ProcessFreeBSDKernel.cpp ProcessFreeBSDKernel.h, llvm/docs ReleaseNotes.md

[lldb][Process/FreeBSDKernel] Print unread message buffer on start (#178027)

This is equivalent of kgdb_dmesg() in fbsd-kvm.c in FreeBSD kgdb(1)
port. Unread kernel messages is only printed in interactive mode (i.e.
not in batch mode) to mimic KGDB's behaviour.

Example output:
```
➜ sudo ./build/bin/lldb /boot/kernel/kernel -c /var/crash/vmcore.last
(lldb) target create "/boot/kernel/kernel" --core "/var/crash/vmcore.last"

Unread portion of the kernel message buffer:
panic: kdb_sysctl_panic
cpuid = 1
time = 1769364579
KDB: stack backtrace:
db_trace_self_wrapper() at db_trace_self_wrapper+0x2b/frame 0xfffffe01b435fa20
vpanic() at vpanic+0x136/frame 0xfffffe01b435fb50
panic() at panic+0x43/frame 0xfffffe01b435fbb0

    [16 lines not shown]
DeltaFile
+159-1lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.cpp
+5-1lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.h
+2-0llvm/docs/ReleaseNotes.md
+166-23 files

LLVM/project ec0eb2ellvm/lib/Target/AArch64 AArch64ISelLowering.cpp MachineSMEABIPass.cpp

[AArch64] Fix more typos
DeltaFile
+2-2llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2-2llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
+1-1llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+1-1llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
+1-1llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
+1-1llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp
+8-86 files not shown
+14-1412 files

LLVM/project fdce869llvm/test/tools/llvm-mca/AArch64/Apple darwin-subsections-via-symbols.s, llvm/tools/llvm-mca CodeRegionGenerator.h

[llvm-mca][Darwin] Fix crash on .subsections_via_symbols in asm input (#182694)

## Summary

This PR fixes an llvm-mca crash on Darwin assembly containing
`.subsections_via_symbols`. The directive is forwarded by
`DarwinAsmParser` to `emitSubsectionsViaSymbols()`, which crashes when
it hits the base `MCStreamer` `llvm_unreachable` path. The fix adds a
no-op override in `llvm/tools/llvm-mca/CodeRegionGenerator.h`, scoped to
llvm-mca only

## Problem manifestation

I ran across this while tinkering around with making an interactive
interpreter/code analyzer and implementing apple silicon support.

## Root cause

- `DarwinAsmParser::parseDirectiveSubsectionsViaSymbols` calls

    [77 lines not shown]
DeltaFile
+7-0llvm/test/tools/llvm-mca/AArch64/Apple/darwin-subsections-via-symbols.s
+1-0llvm/tools/llvm-mca/CodeRegionGenerator.h
+8-02 files

LLVM/project c6ade8allvm/lib/CodeGen/SelectionDAG LegalizeFloatTypes.cpp, llvm/test/CodeGen/AArch64 unsupported-fpext-x86-fp80.ll

[SelectionDAG] Emit error instead of asserting for unsupported FP_EXTEND (#182660)

Replace the assertion failure in
`DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND` with a user-friendly error
when no libcall is available for the requested

Fix
Replace the `assert` with an `emitError` call that reports the
unsupported
conversion gracefully and returns a poison value


Fixes: #182449
DeltaFile
+12-0llvm/test/CodeGen/AArch64/unsupported-fpext-x86-fp80.ll
+6-1llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+18-12 files