LLVM/project 68eddbbclang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsageTest.h

Update clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.h

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+1-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.h
+1-11 files

LLVM/project 2fc712dllvm/lib/Target/AArch64 AArch64.h AArch64PassRegistry.def, llvm/lib/Target/AArch64/GISel AArch64O0PreLegalizerCombiner.cpp

[NewPM] Adds a port for AArch64O0PreLegalizerCombiner (#189776)

Adds a standard porting for AArch64O0PreLegalizerCombiner.

Note:

- Moves the AArch64GenO0PreLegalizeGICombiner.inc import outside of
anonymous namespace to use it as a member in the NewPM class (which
needs to be declared in AArch64.h)
- Test update needed a requires directive for the libcall-lowering-info
dependency

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+81-21llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
+17-1llvm/lib/Target/AArch64/AArch64.h
+2-0llvm/lib/Target/AArch64/AArch64PassRegistry.def
+1-1llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+1-0llvm/test/CodeGen/AArch64/GlobalISel/salvage-debug-info-dead.mir
+102-235 files

LLVM/project 5980293clang/lib/CIR/Dialect/Transforms/TargetLowering LowerModule.cpp TargetLoweringInfo.h, clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets NVPTX.cpp

[CIR][NVPTX] NVPTX lowering info skeleton, PTX AS mapping and Poison attr lowering (#186562)
DeltaFile
+34-17clang/test/CIR/CodeGenCUDA/address-spaces.cu
+39-0clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/NVPTX.cpp
+15-8clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+3-0clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerModule.cpp
+2-0clang/lib/CIR/Dialect/Transforms/TargetLowering/TargetLoweringInfo.h
+1-0clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
+94-256 files

LLVM/project d8bfd7cclang/lib/Sema SemaOpenMP.cpp, clang/test/OpenMP loop_collapse_codegen.cpp for_non_rectangular_codegen.c

[OpenMP] Fix iteration count for nested triangular OpenMP loops (#190153)

This patch restricts the triangular loop iteration count optimization to
only apply to nested triangular loops (`depth >= 2`), not first-level
triangular loops.
The optimization computes iterations as `(Upper - Lower + 1`) for
triangular loops where the inner loop bound depends on an outer loop
counter. However, this formula only works correctly for deeply nested
triangular dependencies: `k` depends on `j`, and `j` itself depends on
`i` For first-level triangular loops: `k` depends directly on `i`, the
standard iteration count formula handles the calculation correctly.
DeltaFile
+525-272clang/test/OpenMP/loop_collapse_codegen.cpp
+111-95clang/test/OpenMP/for_non_rectangular_codegen.c
+17-17clang/test/OpenMP/for_private_reduction_codegen.cpp
+7-3clang/lib/Sema/SemaOpenMP.cpp
+660-3874 files

LLVM/project 2ef70c9clang/lib/CodeGen CGHLSLBuiltins.cpp

Update clang/lib/CodeGen/CGHLSLBuiltins.cpp

Co-authored-by: Helena Kotas <hekotas at microsoft.com>
DeltaFile
+3-3clang/lib/CodeGen/CGHLSLBuiltins.cpp
+3-31 files

LLVM/project 55ba8d8clang/test/Headers __clang_hip_math.hip, llvm/lib/Analysis DependenceAnalysis.cpp

Merge branch 'main' into users/s-perron/texture2d-get-dimension-hlsl
DeltaFile
+4,371-0llvm/test/CodeGen/AMDGPU/clmul.ll
+450-450clang/test/Headers/__clang_hip_math.hip
+291-490llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
+524-242llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.ll
+129-124llvm/lib/IR/Intrinsics.cpp
+57-140llvm/lib/Analysis/DependenceAnalysis.cpp
+5,822-1,44684 files not shown
+7,338-2,31990 files

LLVM/project 5124dd2llvm/include/llvm/IR IntrinsicsSPIRV.td, llvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

[SPIRV] Add get dimension intrinsics. (#189746)

Add the intrinsics in the wg-hlsl proposal
[[0033] - GetDimensions mapping to built-ins functions and LLVM
intrinsics](https://github.com/llvm/wg-hlsl/blob/main/proposals/0033-resources-get-dimensions.md#lowering-to-spir-v) to the SPIR-V backend. This enabled us to implement the GetDimensions
methods in textures in Clang.

Assisted-by: Gemini
DeltaFile
+163-0llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+106-0llvm/test/CodeGen/SPIRV/hlsl-resources/GetDimensions.ll
+14-0llvm/include/llvm/IR/IntrinsicsSPIRV.td
+283-03 files

LLVM/project a9158afllvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp

[AMDGPU][SIInsertWaitcnt][NFC] Replace LastFlat array with distinct variables (#185993)

We only seem to be using LastFlat[LOAD_CNT] and LastFlat[DS_CNT] so it
doesn't look like there is a good reason for using an array. Also, we
seem to be operating on all elements of the array while merging, which
is not great.
DeltaFile
+13-9llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+13-91 files

LLVM/project 24146cellvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/AArch64 srem-seteq-vec-nonsplat.ll

[TargetLowering] Remove INT_MIN special case from prepareSREMEqFold. (#188653)

If the divisor is INT_MIN, we can still treat it like any other power of
2. We'll fold i32 (seteq (srem X, INT_MIN)) to
(setule (rotr (add (mul X, 1), INT_MIN), 31), 1). Alive2 says this is
correct https://alive2.llvm.org/ce/z/vjzqKk.

The multiply is a NOP, the add toggles the sign bits. The rotate puts
the lowest 31 bits of into the upper 31 bits. The sign bit is now in the
LSB. The compare checks if the upper 31 bits are 0.

srem X, INT_MIN has a remainder of 0 if X is 0 or INT_MIN which is
equivalent to checking if the uppper 31 bits are 0 after the rotate.

I don't think we need to add any constant for power of 2 but toggling
the sign bit like we do now doesn't hurt.
DeltaFile
+291-490llvm/test/CodeGen/X86/srem-seteq-vec-nonsplat.ll
+42-45llvm/test/CodeGen/AArch64/srem-seteq-vec-nonsplat.ll
+7-62llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+340-5973 files

LLVM/project 8991ce9llvm/test/CodeGen/AMDGPU clmul.ll

[AMDGPU] Add basic clmul test coverage (#190205)
DeltaFile
+4,371-0llvm/test/CodeGen/AMDGPU/clmul.ll
+4,371-01 files

LLVM/project 42b6a6fclang/lib/Sema SemaTemplateDeduction.cpp, clang/test/C/C23 n3007.c n3006.c

[Clang] Fixed the behavior of C23 auto when an array type was specified for a `char *` (#189722)

At the time of the implementation of
[N3007](https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3007.htm) in
Clang, when an array type was specified, an error was emitted unless the
deduced type was a `char *`.
After further inspection in the C standard, it turns out that the
inferred type of an `char[]` should be deduced to a `char *`, which
should emit an error if an array type is specified with `auto`.

This now invalidates the following cases:
```c
auto s1[] = "test";
auto s2[4] = "test";
auto s3[5] = "test";
```

Fixes #162694
DeltaFile
+6-15clang/lib/Sema/SemaTemplateDeduction.cpp
+14-5clang/test/Sema/c2x-auto.c
+5-6clang/test/C/C23/n3007.c
+9-0clang/test/Sema/auto-type.c
+3-3clang/test/C/C23/n3006.c
+0-1clang/test/CodeGen/auto.c
+37-301 files not shown
+38-307 files

LLVM/project deaef1cllvm/lib/Transforms/Vectorize VPlanUtils.cpp VPlanUtils.h, llvm/unittests/Transforms/Vectorize VPlanUncountableExitTest.cpp VPlanTestBase.h

[LV] Adjust exit recipe detection to run on early vplan (#183318)

Splitting out some work from #178454; this covers the enums for
early exit loop type (none, readonly, readwrite) and the style
used (readonly with multiple exit blocks, or masking with the
last iteration done in scalar code), along with changing the early
exit recipe detection to suit moving the transform for handling
early exit readwrite loops earlier in the vplan pipeline.
DeltaFile
+61-47llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+74-16llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
+11-0llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
+3-3llvm/lib/Transforms/Vectorize/VPlanUtils.h
+149-664 files

LLVM/project 0d4bdf2llvm/lib/Target/AArch64 AArch64RegisterInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Implement Marian's suggestion to implement as XSeqPairsClass + [XZR, XZR]
DeltaFile
+54-82llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+32-71llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+12-9llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+8-1llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+0-7llvm/test/MC/AArch64/armv9a-sysp.s
+1-3llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+107-1736 files

LLVM/project 22615b7llvm/lib/Target/AArch64 AArch64RegisterInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Implement Marian's suggestion to implement as XSeqPairsClass + [XZR, XZR]
DeltaFile
+54-82llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+37-70llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+12-9llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+8-1llvm/lib/Target/AArch64/AArch64RegisterInfo.td
+0-7llvm/test/MC/AArch64/armv9a-sysp.s
+2-2llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
+113-1716 files

LLVM/project ef409e6clang/lib/AST/ByteCode InterpFrame.cpp

[clang][bytecode] Add an assertion in initScope() op (#189972)

I've run into a problem in a branch lately that would've benefitted from
this assertion.
DeltaFile
+1-0clang/lib/AST/ByteCode/InterpFrame.cpp
+1-01 files

LLVM/project 5ecc7e1llvm/lib/Target/AMDGPU VOP3PInstructions.td

[AMDGPU][NFC] Update gating target feature for SWMMAC instructions (#190012)
DeltaFile
+4-0llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+4-01 files

LLVM/project 7b8f913clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering address-space.cir

[CIR][Lowering] Handle address space cast in GlobalViewAttr lowering
DeltaFile
+38-0clang/test/CIR/Lowering/address-space.cir
+15-3clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+53-32 files

LLVM/project a064002flang-rt/lib/runtime time-intrinsic.cpp

Fixes for review
DeltaFile
+7-4flang-rt/lib/runtime/time-intrinsic.cpp
+7-41 files

LLVM/project 5092d5cflang-rt/lib/runtime time-intrinsic.cpp

Add digit separator to divisor for clarity
DeltaFile
+1-1flang-rt/lib/runtime/time-intrinsic.cpp
+1-11 files

LLVM/project 97dbf38llvm/include/llvm/Analysis ScalarEvolution.h ScalarEvolutionExpressions.h, llvm/include/llvm/Transforms/Utils ScalarEvolutionExpander.h

[SCEVExpander] Add SCEVUseVisitor and use it in SCEVExpander (NFC) (#188863)

Add SCEVUseVisitor, a new visitor class where all visit methods receive
a SCEVUse instead of a const SCEV*. Use it for SCEVExpander, so it can
use use-specific flags in the future.

PR: https://github.com/llvm/llvm-project/pull/188863
DeltaFile
+66-13llvm/include/llvm/Analysis/ScalarEvolution.h
+34-32llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
+65-0llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
+29-25llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
+0-16llvm/lib/Analysis/ScalarEvolution.cpp
+10-5llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
+204-916 files

LLVM/project 69db2b0llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp, llvm/test/MC/AArch64 armv9-sysp-diagnostics.s

fixup! Improve error parsing
DeltaFile
+46-25llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+12-12llvm/test/MC/AArch64/armv9-sysp-diagnostics.s
+58-372 files

LLVM/project 698ee55llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp, llvm/test/MC/AArch64 armv9a-sysp.s

fixup! Add no-alias tests
DeltaFile
+4-3llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+7-0llvm/test/MC/AArch64/armv9a-sysp.s
+11-32 files

LLVM/project 1745338llvm/lib/Target/AArch64 AArch64InstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Address PR comments
DeltaFile
+5-9llvm/lib/Target/AArch64/AArch64InstrFormats.td
+2-3llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-2llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+1-1llvm/test/MC/AArch64/armv9-sysp-diagnostics.s
+9-154 files

LLVM/project ca9c2acllvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td

fixup! Address Marian's PR comments: use imm0_6 predicate
DeltaFile
+9-1llvm/lib/Target/AArch64/AArch64InstrFormats.td
+2-2llvm/lib/Target/AArch64/AArch64InstrInfo.td
+11-32 files

LLVM/project 97b5c24llvm/lib/Target/AArch64 AArch64InstrFormats.td

fixup! Fixes after rebasing following Marian's change
DeltaFile
+3-3llvm/lib/Target/AArch64/AArch64InstrFormats.td
+3-31 files

LLVM/project 39baa48llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Remove SYSPxt_XZR and update code to reflect this
DeltaFile
+27-34llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+41-14llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+8-26llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+2-30llvm/lib/Target/AArch64/AArch64InstrInfo.td
+0-20llvm/test/MC/AArch64/armv9-sysp-invalid.s
+13-3llvm/test/MC/AArch64/armv9-sysp-diagnostics.s
+91-1274 files not shown
+105-13710 files

LLVM/project 5e4d955llvm/lib/Target/AArch64 AArch64InstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

fixup! Templatise bounds checking and improve tests
DeltaFile
+15-4llvm/test/MC/AArch64/armv9-sysp-diagnostics.s
+18-0llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+12-5llvm/lib/Target/AArch64/AArch64InstrFormats.td
+0-8llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+45-174 files

LLVM/project fd2bf31llvm/lib/Target/AArch64 AArch64InstrFormats.td AArch64InstrInfo.td, llvm/lib/Target/AArch64/Disassembler AArch64Disassembler.cpp

[AArch64][llvm] Tighten SYSP; don't disassemble invalid encodings

Tighten SYSP aliases, so that invalid encodings are disassembled
to `<unknown>`. This is because:

```
  Cn is a 4-bit unsigned immediate, in the range 8 to 9
  Cm is a 4-bit unsigned immediate, in the range 0 to 7
  op1 is a 3-bit unsigned immediate, in the range 0 to 6
  op2 is a 3-bit unsigned immediate, in the range 0 to 7
```

Ensure we check this when disassembling, and also constrain
tablegen for compile-time errors of invalid encodings.

Also adjust the testcases in `armv9-sysp-diagnostics.s` and
`llvm/test/MC/AArch64/armv9a-sysp.s` as they were invalid,
and added a few invalid (outside of range) SYSP-alikes to
test that `<unknown>` is printed
DeltaFile
+111-111llvm/test/MC/AArch64/armv9a-sysp.s
+25-1llvm/lib/Target/AArch64/AArch64InstrFormats.td
+25-0llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
+20-0llvm/test/MC/AArch64/armv9-sysp-invalid.s
+7-8llvm/test/MC/AArch64/armv9-sysp-diagnostics.s
+7-3llvm/lib/Target/AArch64/AArch64InstrInfo.td
+195-1233 files not shown
+207-1279 files

LLVM/project 87104eeclang/docs ReleaseNotes.rst, clang/include/clang/Basic DiagnosticSemaKinds.td

[Clang] [Sema] Diagnose returning an initializer list from a lambda with a return type of void (#188904)

We previously didn’t diagnose attempts to return an initializer list from
a lambda with an explicit return type of `void`. This patch fixes that. It also 
cleans up the error message so it actually says "lambda" instead of "block".

Fixes #188661

Signed off by: Kartik
DeltaFile
+25-0clang/test/SemaCXX/void-lambda-return-init.cpp
+12-8clang/lib/Sema/SemaStmt.cpp
+2-1clang/include/clang/Basic/DiagnosticSemaKinds.td
+3-0clang/docs/ReleaseNotes.rst
+42-94 files

LLVM/project bb2a63allvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Use m_Isa to improve code (NFC) (#190149)
DeltaFile
+6-9llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+6-91 files