LLVM/project 16e51f1 — utils/bazel/llvm-project-overlay/libc BUILD.bazel

[Bazel] Fixes 3036a4f (#231646)

This fixes 3036a4f16c6bffefe7e4ab75b06cef197a91f323 (#221349).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=3036a4f16c6bffefe7e4ab75b06cef197a91f323

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+2-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+2-01 files

LLVM/project 40d50e3 — llvm/lib/CAS UnifiedOnDiskCache.cpp, llvm/test/tools/llvm-cas plugin-validation-crash.test logging.test

HashName as subdirectory

Created using spr 1.3.7
DeltaFile
+82-85llvm/lib/CAS/UnifiedOnDiskCache.cpp
+16-18llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
+10-10llvm/test/tools/llvm-cas/validation.test
+7-7llvm/test/tools/llvm-cas/logging.test
+6-6llvm/test/tools/llvm-cas/plugin-validation-crash.test
+6-3llvm/tools/llvm-cas-fuzzer/cas-fuzzer.cpp
+127-1293 files not shown
+137-1389 files

LLVM/project b1a3b4c — clang/docs ReleaseNotes.md AllocToken.md, clang/lib/CodeGen CGExpr.cpp

[Clang][AllocToken] Support TypeFuncHash and TypeFuncHashPointerSplit modes (#228492)

Extend Clang to support the `-falloc-token-mode=typefunchash` and
`-falloc-token-mode=typefunchashpointersplit` modes, which were added 
to LLVM in #227686.

In these modes, CodeGen attaches the qualified name of the enclosing
function as the third operand of !alloc_token metadata. Allocations
outside functions use an empty function name. When type inference fails,
metadata is still emitted with an empty type name, so that a
function-based
token can be assigned. This allows distinguishing allocations that would
otherwise all share the fallback token.

Like the Increment and Random modes, `__builtin_infer_alloc_token()`
is not supported in constant expressions under these modes.
DeltaFile
+130-0clang/test/CodeGenCXX/alloc-token-typefunchash.cpp
+45-7clang/lib/CodeGen/CGExpr.cpp
+14-1clang/docs/AllocToken.md
+14-0clang/test/SemaCXX/alloc-token-typefunchash.cpp
+5-0clang/test/CodeGen/alloc-token-inline.c
+5-0clang/docs/ReleaseNotes.md
+213-83 files not shown
+217-129 files

LLVM/project d300b80 — lldb/include/lldb/Target BorrowedStackFrame.h, lldb/source/Target BorrowedStackFrame.cpp

[lldb] Forward step plans through BorrowedStackFrame (#231657)

When a frame provider returns an index relative to its input frames,
LLDB wraps that frame in a BorrowedStackFrame. BorrowedStackFrame
forwards most StackFrame methods to the frame it borrows, except for
GetThreadPlanForStepType, so a scripted frame lost its custom step plans
as soon as another provider was stacked on top of it.

Forward it like the methods, and test stepping with a pass-through
provider stacked on top of a provider whose frames have step plans.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+36-6lldb/test/API/functionalities/scripted_frame_provider/step_with_type/TestFrameProviderStepping.py
+28-0lldb/test/API/functionalities/scripted_frame_provider/step_with_type/frame_provider.py
+5-0lldb/source/Target/BorrowedStackFrame.cpp
+3-0lldb/include/lldb/Target/BorrowedStackFrame.h
+72-64 files

LLVM/project 2fe29ea — llvm/lib/Target/DirectX DXILLegalizePass.cpp, llvm/test/CodeGen/DirectX legalize-non-standard-integers-errors.ll legalize-i8-alloca.ll

Revert "[DirectX] Generalize DXIL integer legalization" (#231644)

Reverts llvm/llvm-project#225233
DeltaFile
+177-292llvm/lib/Target/DirectX/DXILLegalizePass.cpp
+0-373llvm/test/CodeGen/DirectX/legalize-non-standard-integers.ll
+79-133llvm/test/CodeGen/DirectX/legalize-i8.ll
+0-101llvm/test/CodeGen/DirectX/legalize-non-standard-integers-defined.ll
+11-60llvm/test/CodeGen/DirectX/legalize-i8-alloca.ll
+0-69llvm/test/CodeGen/DirectX/legalize-non-standard-integers-errors.ll
+267-1,0281 files not shown
+267-1,0957 files

LLVM/project 82f1833 — clang/test/OpenMP declare_variant_device_kind_codegen.cpp, flang/lib/Semantics openmp-utils.cpp

[flang][clang][OpenMP] Fix context selector matching and scoring

Fix how OMPContext matches and scores context selectors:

- Derive device selector weights from the depth of the construct context
  rather than from the candidate's construct selector count.
- Add each selector's score once, not once per property, using
  arbitrary-width arithmetic instead of 64-bit sums.
- Match construct selectors as an ordered subsequence of the context and
  score the highest-valued embedding. Keep partial matches for match_any.
- Apply the strict-subset rule to all applicable variants before choosing
  the best one, rather than only to break ties: a selector that is a
  strict subset of another compatible selector scores zero. Treat
  kind(any) as an absent kind selector, and compare ISA traits by property
  and name and user conditions by identity.
- Score an unknown property as unmatched instead of aborting. With two
  applicable candidates, one naming an unknown vendor, Flang aborted with
  "Unknown trait set is not to be used!".


    [17 lines not shown]
DeltaFile
+549-1llvm/unittests/Frontend/OpenMPContextTest.cpp
+223-138llvm/lib/Frontend/OpenMP/OMPContext.cpp
+64-8llvm/include/llvm/Frontend/OpenMP/OMPContext.h
+26-17clang/test/OpenMP/declare_variant_device_kind_codegen.cpp
+9-4flang/lib/Semantics/openmp-utils.cpp
+871-1685 files

LLVM/project 0249bd8 — orc-rt/include/orc-rt-internal/tools OptionParser.h, orc-rt/test/unit/tools OptionParserTest.cpp

[orc-rt] Describe connection specs in ogre's help. (#231665)

ogre's help described its argument only as "[positional arguments]",
though it takes exactly one connection spec, and never said what forms a
spec can take.

OptionParser gains setPositionalUsage, to name the positional arguments
in the usage line, and setEpilogue, for text printed after the options.
ogre uses them to name its <connection-spec> argument and to list the
forms it accepts. Other tools' help is unchanged.
DeltaFile
+23-0orc-rt/test/unit/tools/OptionParserTest.cpp
+21-1orc-rt/include/orc-rt-internal/tools/OptionParser.h
+14-1orc-rt/tools/ogre/ogre.cpp
+58-23 files

LLVM/project 6c67a96 — clang/lib/Frontend CompilerInvocation.cpp, clang/test/Modules context-hash-module-map-file.c

[clang][modules] Include `-fmodule-map-file=` in context hash (#227776)

The `-fmodule-map-file=` arguments change whether headers are treated as
textual or modular. Not considering these options in the context hash
can lead to mis-compiles. This PR fixes that.
DeltaFile
+44-0clang/test/Modules/context-hash-module-map-file.c
+2-0clang/lib/Frontend/CompilerInvocation.cpp
+46-02 files

LLVM/project 6c0c62f — llvm/test/Transforms/LoopVectorize extract-value-widen.ll struct-return.ll, llvm/test/Transforms/LoopVectorize/AArch64 struct-return-cost.ll struct-return-extractvalue.ll

[LV] Have ExtractValue match the shape of the operand. (#229927)

Previously, BuildStructVector would create a vector of a wide struct
type, where each element is widened.

This can cause issues, if a transform turns an extractvalue of a wide
call into a single-scalar (e.g. makeScalarizationDecisions), because we
currently cannot extract lane 0 from a struct of vectors.

Instead of relying on BuildStructVector, we can instead have the
ExtractValue match the shape of its operand (either widen if the operand
is wide, or replicated if the operand is scalar). If a vector value is
needed, we can directly use the existing BuildVector.

This fixes a number of crashes in the newly added tests, including
https://github.com/llvm/llvm-project/issues/229609.

Depends on https://github.com/llvm/llvm-project/pull/229925

PR: https://github.com/llvm/llvm-project/pull/229927
DeltaFile
+119-312llvm/test/Transforms/LoopVectorize/struct-return-replicate.ll
+348-0llvm/test/Transforms/LoopVectorize/AArch64/struct-return-extractvalue.ll
+254-26llvm/test/Transforms/LoopVectorize/struct-return.ll
+33-28llvm/test/Transforms/LoopVectorize/VPlan/struct-return-build-vector.ll
+51-0llvm/test/Transforms/LoopVectorize/extract-value-widen.ll
+24-24llvm/test/Transforms/LoopVectorize/AArch64/struct-return-cost.ll
+829-3908 files not shown
+878-46214 files

LLVM/project ff6a3dc — llvm/lib/Target/VE VEISelLowering.cpp, llvm/test/CodeGen/VE exception-model.ll

VE: Use i32 registers for 32-bit loads in the SjLj dispatch block

Fix verifier errors in exception test. The call site index and the
PIC jump table offset were loaded with ldl.zx, which defines an i32
register, into vregs with the i64 register class.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+19-4llvm/lib/Target/VE/VEISelLowering.cpp
+1-2llvm/test/CodeGen/VE/exception-model.ll
+20-62 files

LLVM/project f40ea12 — llvm/lib/Target/VE/MCTargetDesc VEMCAsmInfo.cpp, llvm/lib/TargetParser Triple.cpp

VE: Default to SjLj exception handling

The clang driver selects SjLj exceptions for VE (96d4ccf00c8f), but the
triple defaulted to no exception model. Make SjLj the default for the
triple and MCAsmInfo so llc agrees with the driver.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+20-0llvm/test/CodeGen/VE/exception-model.ll
+2-2llvm/unittests/TargetParser/TripleTest.cpp
+2-0llvm/lib/TargetParser/Triple.cpp
+1-0llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
+25-24 files

LLVM/project 496d6d3 — libc/src/__support/GPU fixedbuffer.h CMakeLists.txt, libc/src/__support/RPC CMakeLists.txt

[libc] Order GPU targets after the generated stdint.h (#231229)

Several GPU targets reach `<stdint.h>` without depending on the
generated header, so a fresh build can compile them before or while
`stdint.h` is written and fail with `unknown type name 'uint32_t'`. This
is the same race as #149993, but via headers that don't include
`<stdint.h>` directly.
 
- GPU utils: `utils.h` includes `<gpuintrin.h>`, which includes
`<stdint.h>`; depend on `libc.hdr.stdint_proxy`.
- rpc_client: `shared/rpc_util.h` includes `<stdint.h>` but is also used
outside libc, so it can't use the proxy header; declare the dependency
on the libc target instead.
- GPU time_utils: declare its existing dependency on GPU utils.
 
This also changes GPU fixedbuffer to include `hdr/stdint_proxy.h` rather
than `<stdint.h>`. fixedbuffer was added after #150303, so it was missed
by that conversion.


    [4 lines not shown]
DeltaFile
+5-0libc/src/__support/GPU/CMakeLists.txt
+1-2libc/src/__support/GPU/fixedbuffer.h
+1-0libc/src/__support/time/gpu/CMakeLists.txt
+1-0libc/src/__support/RPC/CMakeLists.txt
+8-24 files

LLVM/project 22ac549 — llvm/lib/Target/X86 X86TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/X86 div-rem-pair.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+107-0llvm/test/Transforms/SLPVectorizer/X86/divrem-scalar-pair.ll
+65-0llvm/test/Analysis/CostModel/X86/div-rem-pair.ll
+19-0llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+191-03 files

LLVM/project 9afb91f — llvm/lib/Target/AMDGPU VOP1Instructions.td SIInstrInfo.td

AMDGPU: Add vgpr32_lo16/vgpr32_hi16 OutPatFrags

Add OutPatFrags for extracting a 16-bit half of a value after copying
it to a VGPR_32, and use them for the existing open-coded instances.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+8-8llvm/lib/Target/AMDGPU/VOP3Instructions.td
+6-0llvm/lib/Target/AMDGPU/SIInstrInfo.td
+1-1llvm/lib/Target/AMDGPU/VOP1Instructions.td
+15-93 files

LLVM/project 11094f9 — llvm/docs AMDGPUUsage.rst

[AMDGPU][Doc] Add documentation about ABI occupancy

This PR introduces ABI occupancy in documentation. The actual code
implementation will be in follow-up PRs.
DeltaFile
+59-5llvm/docs/AMDGPUUsage.rst
+59-51 files

LLVM/project 7d0f852 — llvm/include/llvm/TargetParser CMakeLists.txt, llvm/lib/Target/ARM ARMSubtarget.h

ARM: Generate processor family and architecture lists in backend

ARMTargetParserDef.inc is only included by ARMSubtarget. It was
generated by the TargetParser library's tablegen step, which every
other LLVM library depends on, even when the ARM target is not
built. Generate it with the rest of the ARM backend's tablegen outputs
instead.

This removes 14% of the time in the TargetParser tablegen step, along
with a dependency on 71 ARM td files.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+4-12utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+10-0llvm/utils/gn/secondary/llvm/lib/Target/ARM/BUILD.gn
+0-8llvm/utils/gn/secondary/llvm/include/llvm/TargetParser/BUILD.gn
+2-2llvm/lib/Target/ARM/ARMSubtarget.h
+0-3llvm/include/llvm/TargetParser/CMakeLists.txt
+1-0llvm/utils/gn/secondary/llvm/unittests/Target/ARM/BUILD.gn
+17-252 files not shown
+18-268 files

LLVM/project 43a98e1 — offload/libompaccsupport device.cpp, offload/plugins-nextgen/amdgpu/dynamic_hsa hsa_ext_amd.h

[offload] Write small unordered host-to-device transfers directly on AMDGPU
DeltaFile
+135-2offload/plugins-nextgen/amdgpu/src/rtl.cpp
+73-0offload/test/offloading/kernel_launch_environment.c
+22-0offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
+6-3offload/plugins-nextgen/common/include/PluginInterface.h
+4-2offload/libompaccsupport/device.cpp
+3-2offload/plugins-nextgen/common/src/PluginInterface.cpp
+243-94 files not shown
+251-1310 files

LLVM/project b0c31fd — offload/include device.h, offload/libompaccsupport device.cpp

apply Alex's suggestion
DeltaFile
+44-29offload/libompaccsupport/device.cpp
+0-17offload/plugins-nextgen/common/src/PluginInterface.cpp
+8-0offload/include/device.h
+0-7offload/plugins-nextgen/common/include/PluginInterface.h
+52-534 files

LLVM/project 9524df2 — offload/libompaccsupport device.cpp, offload/plugins-nextgen/common/include PluginInterface.h

[offload] Add GenericDeviceTy::allocCtxMem for cached allocations
DeltaFile
+8-25offload/libompaccsupport/device.cpp
+17-0offload/plugins-nextgen/common/src/PluginInterface.cpp
+7-0offload/plugins-nextgen/common/include/PluginInterface.h
+32-253 files

LLVM/project cb52a52 — offload/libompaccsupport device.cpp

[offload] Cache the per-launch device allocations of libomptarget
DeltaFile
+27-12offload/libompaccsupport/device.cpp
+27-121 files

LLVM/project 31beca1 — llvm/lib/Target/VE VEISelLowering.cpp, llvm/test/CodeGen/VE exception-model.ll

VE: Use i32 registers for 32-bit loads in the SjLj dispatch block

Fix verifier errors in exception test. The call site index and the
PIC jump table offset were loaded with ldl.zx, which defines an i32
register, into vregs with the i64 register class.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+19-4llvm/lib/Target/VE/VEISelLowering.cpp
+1-2llvm/test/CodeGen/VE/exception-model.ll
+20-62 files

LLVM/project 6ff328f — flang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP distribute-parallel-do.f90 distribute-parallel-do-simd.f90

[flang][OpenMP] Destroy composite num_threads temporaries once

DISTRIBUTE PARALLEL DO and DISTRIBUTE PARALLEL DO SIMD evaluate the
PARALLEL clause operands before creating omp.parallel, using the
statement context of the dispatch. That context is finalized after the
returned omp.distribute, which is inside the parallel region, so every
thread destroyed the same num_threads temporary, for example for
num_threads(size(f())) where f returns an allocatable.

Evaluate these operands in a separate statement context and finalize it
after omp.parallel.

Fixes #230661

Assisted with Copilot and Claude Opus 5.5
DeltaFile
+27-9flang/lib/Lower/OpenMP/OpenMP.cpp
+32-0flang/test/Lower/OpenMP/distribute-parallel-do.f90
+32-0flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
+91-93 files

LLVM/project 3d2242c — llvm/lib/Target/AMDGPU DSInstructions.td VOP3Instructions.td

AMDGPU: Use lo16_to_vgpr32/hi16_to_vgpr32 OutPatFrags

Replace open-coded REG_SEQUENCE widenings of 16-bit values into a
VGPR_32 with the existing OutPatFrags.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+17-17llvm/lib/Target/AMDGPU/SIInstructions.td
+3-3llvm/lib/Target/AMDGPU/VOP1Instructions.td
+2-2llvm/lib/Target/AMDGPU/VOP3Instructions.td
+1-1llvm/lib/Target/AMDGPU/DSInstructions.td
+23-234 files

LLVM/project 0e27435 — clang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp, clang/test/CIR/CodeGen call-conv-lowering-x86_64-x87-union.cpp ternary-throw.cpp

[CIR] Move records through memory in x86_64 call lowering

CIR lowers a union to its storage type, so moving one as an SSA value
can drop bytes. An x86_fp80 member stores only 10 of its 16 bytes, for
example. The calling-convention rewriter now passes records through
memory at every coercion site, the way classic CodeGen does. That lets
us drop the union check #230302 added, which broke std::format.

Assisted-by: Cursor / Claude Opus 5.5
DeltaFile
+1,475-0clang/test/CIR/Transforms/abi-lowering/x86_64-record-copy.cir
+641-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-copy.c
+465-171clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+260-311clang/test/CIR/CodeGen/ternary-throw.cpp
+395-50clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
+428-0clang/test/CIR/CodeGen/call-conv-lowering-x86_64-x87-union.cpp
+3,664-53247 files not shown
+4,423-1,20253 files

LLVM/project e3ddf30 — llvm/lib/Target/VE/MCTargetDesc VEMCAsmInfo.cpp, llvm/lib/TargetParser Triple.cpp

VE: Default to SjLj exception handling

The clang driver selects SjLj exceptions for VE (96d4ccf00c8f), but the
triple defaulted to no exception model. Make SjLj the default for the
triple and MCAsmInfo so llc agrees with the driver.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+20-0llvm/test/CodeGen/VE/exception-model.ll
+2-2llvm/unittests/TargetParser/TripleTest.cpp
+2-0llvm/lib/TargetParser/Triple.cpp
+1-0llvm/lib/Target/VE/MCTargetDesc/VEMCAsmInfo.cpp
+25-24 files

LLVM/project 1f99182 — llvm/lib/Target/DirectX DXILLegalizePass.cpp, llvm/test/CodeGen/DirectX legalize-non-standard-integers-errors.ll legalize-i8-alloca.ll

Revert "[DirectX] Generalize DXIL integer legalization (#225233)"

This reverts commit 641a4f82bfa32be38e4dbcb5066a19ada9a4fc99.
DeltaFile
+177-292llvm/lib/Target/DirectX/DXILLegalizePass.cpp
+0-373llvm/test/CodeGen/DirectX/legalize-non-standard-integers.ll
+79-133llvm/test/CodeGen/DirectX/legalize-i8.ll
+0-101llvm/test/CodeGen/DirectX/legalize-non-standard-integers-defined.ll
+11-60llvm/test/CodeGen/DirectX/legalize-i8-alloca.ll
+0-69llvm/test/CodeGen/DirectX/legalize-non-standard-integers-errors.ll
+267-1,0281 files not shown
+267-1,0957 files

LLVM/project 3036a4f — libc/src/__support/File file.cpp file.h, libc/src/stdio/generic fgetpos.cpp

[libc] Implement fgetpos/fsetpos (#221349)

These functions read/write the file state, specifically the offset and
the multibyte state. This PR adds them as well as fpos_t, the struct
they manipulate, and thorough tests.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+458-0libc/test/src/stdio/fsetpos_test.cpp
+328-0libc/test/src/stdio/fgetpos_test.cpp
+70-34libc/src/__support/File/file.h
+71-0libc/test/src/stdio/CMakeLists.txt
+51-12libc/src/__support/File/file.cpp
+57-0libc/src/stdio/generic/fgetpos.cpp
+1,035-4616 files not shown
+1,278-5822 files

LLVM/project d6005ae — llvm/lib/Target/AMDGPU AMDGPUSplitModule.cpp, llvm/test/tools/llvm-split/AMDGPU non-kernels-unreachable-cycles.ll

[AMDGPU][SplitModule] Add entry points for unreachable call cycles

A function in a call cycle always has an incoming direct call, so
`SplitGraph` never makes it an entry point. If no kernel and no other
entry point reaches the cycle, the cycle is assigned to no partition.
This can hit an assertion in `verifyGraph`.

In this PR, we visit the unreached nodes in reverse post-order of the
direct call edges, and make each node that is still unreached an entry
point. Only the outermost unreached cycles get one, so their callees
are not copied into other partitions.
DeltaFile
+40-1llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
+15-6llvm/test/tools/llvm-split/AMDGPU/non-kernels-unreachable-cycles.ll
+55-72 files

LLVM/project 26090c4 — llvm/test/tools/llvm-split/AMDGPU non-kernels-unreachable-cycles.ll

[NFC][AMDGPU] Add a test showing unreachable call cycles in module splitting (#230983)

If no entry point reaches a call cycle, `AMDGPUSplitModule` creates no
entry point for it. In assertion builds, `verifyGraph()` fails. In
release builds, no partition defines the functions in the cycle.

Add a test that shows the current crash.
DeltaFile
+35-0llvm/test/tools/llvm-split/AMDGPU/non-kernels-unreachable-cycles.ll
+35-01 files

LLVM/project 6544686 — clang/lib/CIR/CodeGen CIRGenCall.cpp, clang/test/CIR/CodeGen restrict-noalias.c

[CIR] Add noalias on malloc-like function returns (#221817)

- Stamp `llvm.noalias` on function returns when the callee has
`RestrictAttr` (`__attribute__((malloc))` / `__declspec(restrict)`) and
no deallocator.
- Matches classic codegen in `CGCall.cpp`: return `noalias` on both
`define` and `call`, and skip `malloc(dealloc)`.
- Extends `restrict-noalias.c` with a malloc call, a malloc definition,
and a `malloc(dealloc)` negative.

Cursor assisted with this.
DeltaFile
+67-3clang/test/CIR/CodeGen/restrict-noalias.c
+6-2clang/lib/CIR/CodeGen/CIRGenCall.cpp
+73-52 files