LLVM/project 29afd5aclang-tools-extra/clang-tidy/readability InconsistentDeclarationParameterNameCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix false-positive in inconsistent-declaration-parameter-name (#170593)

Closes #169195
DeltaFile
+23-0clang-tools-extra/test/clang-tidy/checkers/readability/inconsistent-declaration-parameter-name.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+4-0clang-tools-extra/clang-tidy/readability/InconsistentDeclarationParameterNameCheck.cpp
+32-03 files

LLVM/project d21c334llvm/test/CodeGen/AMDGPU vgpr-lowering-gfx1250.mir

[AMDGPU] Improve VGPR lowering test around FMA[AK|MK]. NFC

Add asm comments checks for readability.
DeltaFile
+25-0llvm/test/CodeGen/AMDGPU/vgpr-lowering-gfx1250.mir
+25-01 files

LLVM/project fda85a1llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[DebugInfo][LoopVectorizer][NFC] Use unknown annotations for more instructions (#170522)

Some recent patches have added more non-annotated empty locations to the
loop vectorizer, resulting in errors reported on the DebugLoc coverage
tracking buildbot:
https://lab.llvm.org/staging/#/builders/222/builds/1938

This patch adds "unknown" annotations in place of the empty locations,
allowing the buildbot to ignore them for now.
DeltaFile
+7-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-61 files

LLVM/project e84fdbellvm/docs LangRef.rst, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

[IR] Add CallBr intrinsics support (#133907)

This commit adds support for using intrinsics with callbr. The uses of
this will most of the time look like this example:
```llvm
  callbr void @llvm.amdgcn.kill(i1 %c) to label %cont [label %kill]
kill:
  unreachable
cont:
  ...
```
DeltaFile
+101-0llvm/test/CodeGen/AMDGPU/callbr-intrinsics.ll
+55-18llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+57-0llvm/test/Verifier/callbr-intrinsic.ll
+33-3llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+28-5llvm/lib/IR/Verifier.cpp
+21-6llvm/docs/LangRef.rst
+295-323 files not shown
+320-339 files

LLVM/project 245c0demlir/include/mlir/Target/LLVMIR LLVMImportInterface.h, mlir/lib/Target/LLVMIR/Dialect/LLVMIR LLVMIRToLLVMTranslation.cpp

[MLIR][LLVM] Fix the import of LLVM IR metadata

Change `getSupportedMetadata` to return `SmallVector<unsigned>` instead
of `ArrayRef<unsigned>` and make the list non-static. This ensures
metadata identifiers are correctly obtained per LLVM context, preventing
incorrect import when multiple contexts are used (for metadata like
vector hints or work group sizes which have non-static IDs).
DeltaFile
+10-9mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
+8-4mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
+18-132 files

LLVM/project 8993c93llvm/lib/Target/AArch64 AArch64SchedNeoverseN1.td AArch64SchedNeoverseV1.td

[AArch64] Compare and branch set twice in Neoverse V1/N1 sched (NFC) (#170498)

The regex instruction match is unnecessary, these are already wired up
to the instructions via WriteBr.
DeltaFile
+0-3llvm/lib/Target/AArch64/AArch64SchedNeoverseN1.td
+0-3llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
+0-62 files

LLVM/project 38994f4llvm/test/tools/llvm-mca/AArch64/Neoverse V3AE-basic-instructions.s V3-basic-instructions.s

[llvm-mca][AArch64] Refactor Neoverse tests to split out common inputs (NFC) (#170324)

For many of these tests the inputs are very similiar with slight
divergences, ideally we'd have common sources where we can to avoid
subtle differences.

Changes:

- For basic tests there's a relatively large diff between V1 and all
other cores because of 24f0901 (#128892) which makes it more complete.
I've been thru the entire diff and 99% of the time V1 makes more sense,
except for a couple of small changes (might post a separate patch for).
Therefore I decided it's best to take V1-basic-instructions.s as the
common source.
- Split out FEAT_RCPC_IMMO tests from basic since N1 doesnt have this
feature.
- Split out FEAT_MTE tests. V2/V3 also have this feature but were
missing tests, so I've added them.
- Take 16-bit load/store register offset from V2/V3 (better coverage).

    [2 lines not shown]
DeltaFile
+240-1,495llvm/test/tools/llvm-mca/AArch64/Neoverse/V3AE-basic-instructions.s
+240-1,495llvm/test/tools/llvm-mca/AArch64/Neoverse/V3-basic-instructions.s
+240-1,495llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-basic-instructions.s
+240-1,453llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
+240-1,453llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
+240-1,453llvm/test/tools/llvm-mca/AArch64/Neoverse/N1-basic-instructions.s
+1,440-8,84414 files not shown
+3,939-10,54820 files

LLVM/project 1efb537bolt/lib/Passes IdenticalCodeFolding.cpp, bolt/test/AArch64 safe-icf.s

[BOLT][AArch64] Enable safe ICF (#170172)

All the pieces required seem to have already been in place so just
need to enable the option. Also added one more string prefix for
vtable recognition.
DeltaFile
+73-0bolt/test/AArch64/safe-icf.s
+5-3bolt/lib/Passes/IdenticalCodeFolding.cpp
+78-32 files

LLVM/project c439a45llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx shuffle-as-bswap.ll bitreverse.ll

[LoongArch] Custom legalize vector_shuffle to bswap
DeltaFile
+37-0llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+2-3llvm/test/CodeGen/LoongArch/lsx/shuffle-as-bswap.ll
+2-3llvm/test/CodeGen/LoongArch/lsx/bitreverse.ll
+2-3llvm/test/CodeGen/LoongArch/lasx/shuffle-as-bswap.ll
+2-3llvm/test/CodeGen/LoongArch/lasx/bitreverse.ll
+45-125 files

LLVM/project 4a79a4ellvm/docs ConvergenceAndUniformity.rst

add proof section uniformity is safe to use across transforms
DeltaFile
+307-0llvm/docs/ConvergenceAndUniformity.rst
+307-01 files

LLVM/project 186c9a7llvm/test/CodeGen/LoongArch/lasx shuffle-as-bswap.ll, llvm/test/CodeGen/LoongArch/lsx shuffle-as-bswap.ll

[LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors (#170621)

DeltaFile
+47-0llvm/test/CodeGen/LoongArch/lasx/shuffle-as-bswap.ll
+47-0llvm/test/CodeGen/LoongArch/lsx/shuffle-as-bswap.ll
+94-02 files

LLVM/project b36768amlir/include/mlir/Target/LLVMIR LLVMImportInterface.h, mlir/lib/Target/LLVMIR/Dialect/LLVMIR LLVMIRToLLVMTranslation.cpp

[MLIR][LLVM] Fix the import of LLVM IR metadata

Change `getSupportedMetadata` to return `SmallVector<unsigned>` instead
of `ArrayRef<unsigned>` and make the list non-static. This ensures
metadata identifiers are correctly obtained per LLVM context, preventing
incorrect import when multiple contexts are used (for metadata like
vector hints or work group sizes which have non-static IDs).
DeltaFile
+10-9mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMIRToLLVMTranslation.cpp
+5-3mlir/include/mlir/Target/LLVMIR/LLVMImportInterface.h
+15-122 files

LLVM/project 9a4cf36clang/include/clang/Analysis/Analyses/LifetimeSafety FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

std_move false positive
DeltaFile
+23-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+18-0clang/test/Sema/warn-lifetime-safety.cpp
+5-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+46-03 files

LLVM/project e66e8aallvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/lib/Target/RISCV/GISel RISCVInstructionSelector.cpp

[RISCV][GISel] Support select G_EXTRACT_SUBVECTOR (#169789)

DeltaFile
+383-0llvm/test/CodeGen/RISCV/GlobalISel/rvv/extract-subvector.ll
+42-0llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp
+2-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+427-03 files

LLVM/project 00d92d1llvm/test/CodeGen/LoongArch/lasx shuffle-as-bswap.ll, llvm/test/CodeGen/LoongArch/lsx shuffle-as-bswap.ll

[LoongArch][NFC] Pre-commit tests for shufflevector reversing within subvectors
DeltaFile
+47-0llvm/test/CodeGen/LoongArch/lasx/shuffle-as-bswap.ll
+47-0llvm/test/CodeGen/LoongArch/lsx/shuffle-as-bswap.ll
+94-02 files

LLVM/project b5fd161clang/lib/CodeGen CGObjCRuntime.h CGObjCRuntime.cpp

format
DeltaFile
+3-19clang/lib/CodeGen/CGObjCRuntime.h
+1-1clang/lib/CodeGen/CGObjCRuntime.cpp
+4-202 files

LLVM/project 13948c7clang/include/clang/Analysis/Analyses/LifetimeSafety FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp

std_move false positive
DeltaFile
+14-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+2-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+16-02 files

LLVM/project ceda23eclang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/test/Sema warn-lifetime-safety.cpp warn-lifetime-safety-dataflow.cpp

dereference_operator
DeltaFile
+11-11clang/test/Sema/warn-lifetime-safety.cpp
+6-0clang/test/Sema/warn-lifetime-safety-dataflow.cpp
+4-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+21-113 files

LLVM/project 0fa066bllvm/test/CodeGen/RISCV/rvv sifive_sf_vlte64.ll sifive_sf_vlte8.ll

[NFC][RISCV] Cleanup unused attributes in xsfmm tests (#170601)

This is followup patch of #170589
DeltaFile
+2-6llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte64.ll
+2-6llvm/test/CodeGen/RISCV/rvv/sifive_sf_vlte8.ll
+2-6llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettk.ll
+2-6llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettm.ll
+2-6llvm/test/CodeGen/RISCV/rvv/sifive_sf_vsettnt.ll
+2-6llvm/test/CodeGen/RISCV/rvv/sifive_sf_vste16.ll
+12-369 files not shown
+30-8815 files

LLVM/project c8a7a3aflang/include/flang/Evaluate intrinsics.h, flang/lib/Evaluate intrinsics.cpp

[flang][Evaluate] Add IntrinsicCall::impureFunction to RAND and IRAND (#170492)

This PR adds the` impureFunction` intrinsicClass for intrinsics wich are
function such as RAND and IRAND, which are not PURE functions in the GNU
extension and therefore cannot be called in a DO CONCURRENT (see
`test-suite::gfortran-regression-compile-regression__pr119836_2_f90.test`
). The `Pure` attribute will not be added for these intrinsics.
DeltaFile
+6-3flang/lib/Evaluate/intrinsics.cpp
+9-0flang/test/Semantics/doconcurrent01.f90
+1-1flang/include/flang/Evaluate/intrinsics.h
+16-43 files

LLVM/project c2be4fcclang/test/CodeGenObjC expose-direct-method.m expose-direct-method-visibility-linkage.m

tests
DeltaFile
+295-0clang/test/CodeGenObjC/expose-direct-method.m
+170-0clang/test/CodeGenObjC/expose-direct-method-visibility-linkage.m
+148-0clang/test/CodeGenObjC/expose-direct-method-opt-class-realization.m
+136-0clang/test/CodeGenObjC/expose-direct-method-linkedlist.m
+119-0clang/test/CodeGenObjC/expose-direct-method-consumed.m
+103-0clang/test/CodeGenObjC/expose-direct-method-varargs.m
+971-01 files not shown
+995-07 files

LLVM/project 110198aclang/lib/CodeGen CGObjCRuntime.cpp CGObjCRuntime.h

[ExposeObjCDirect] Optimizations

In many cases we can infer that class object has been realized
DeltaFile
+63-0clang/lib/CodeGen/CGObjCRuntime.cpp
+3-3clang/lib/CodeGen/CGObjCRuntime.h
+66-32 files

LLVM/project 81b0d80clang/lib/CodeGen CGObjCMac.cpp CGObjC.cpp

[ExposeDirectMethod] Nil chech thunk generation

- Generation
- Dispatch
DeltaFile
+241-2clang/lib/CodeGen/CGObjCMac.cpp
+12-5clang/lib/CodeGen/CGObjC.cpp
+7-0clang/lib/CodeGen/CodeGenFunction.h
+3-1clang/lib/CodeGen/CGDecl.cpp
+263-84 files

LLVM/project ff65d55clang/lib/CodeGen CGObjCMac.cpp CGObjCGNU.cpp

[ExposeObjCDirect] Setup helper functions

1. GenerateDirectMethodsPreconditionCheck: Move some functionalities to a separate functions.
Those functions will be reused if we move precondition checks into a thunk
2. Create `DirectMethodInfo`, which will be used to manage true implementation and its thunk
DeltaFile
+73-22clang/lib/CodeGen/CGObjCMac.cpp
+9-0clang/lib/CodeGen/CGObjCGNU.cpp
+6-0clang/lib/CodeGen/CGObjCRuntime.h
+88-223 files

LLVM/project 4fcb6e1llvm/lib/Target/RISCV RISCVVectorPeephole.cpp, llvm/test/CodeGen/RISCV/rvv vmv.v.v-peephole.mir vmv.v.v-peephole.ll

[RISCV] Commute Src in foldVMV_V_V (#170536)

In #156499 we taught the vmerge peephole to commute operands so that the
passthru operands lined up. We can do the same for the vmv.v.v peephole,
which allows us fold more vmv.v.vs away.

This is needed to prevent a regression in an upcoming patch that adds a
combine for vmerge.vvm to vmv.v.v.
DeltaFile
+21-2llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
+20-0llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
+11-0llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
+52-23 files

LLVM/project 6c73f5eflang/lib/Lower OpenACC.cpp, flang/test/Lower/OpenACC acc-loop.f90

[flang][acc] Add TODO for cache directive lowering (#170608)

The OpenACC cache directive is not yet fully implemented. Add a TODO to
emit a clear "not yet implemented" error during lowering.
DeltaFile
+15-0flang/test/Lower/OpenACC/Todo/acc-cache.f90
+0-9flang/test/Lower/OpenACC/acc-loop.f90
+2-0flang/lib/Lower/OpenACC.cpp
+17-93 files

LLVM/project 3c5fd49llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp

AMDGPU/PromoteAlloca: Extract getVectorTypeForAlloca helper (#170509)

DeltaFile
+28-17llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+28-171 files

LLVM/project a784187llvm/lib/Analysis Delinearization.cpp

[delinearize] clear Subscripts and Sizes vectors (NFC) (#156495)

DeltaFile
+10-0llvm/lib/Analysis/Delinearization.cpp
+10-01 files

LLVM/project 7648904clang/include/clang/AST DeclObjC.h, clang/include/clang/Options Options.td

[ExposeObjCDirect] Adding a flag to allow new objc direct ABI

1. Add a flag
2. Clean up and set up helper functions to implement later

Signed-off-by: Peter Rong <PeterRong at meta.com>
DeltaFile
+32-3clang/lib/CodeGen/CGObjCRuntime.h
+15-11clang/lib/CodeGen/CGObjCRuntime.cpp
+26-0clang/lib/CodeGen/CodeGenModule.h
+6-0clang/include/clang/AST/DeclObjC.h
+5-0clang/include/clang/Options/Options.td
+4-0clang/lib/Driver/ToolChains/Clang.cpp
+88-141 files not shown
+90-147 files

LLVM/project 41a6a0allvm/docs AMDGPUUsage.rst

[AMDGPU] Add some more product names for GPUs (#170469)

DeltaFile
+10-10llvm/docs/AMDGPUUsage.rst
+10-101 files