Revert "[lldb] Fix TSan report on Linux (#179115)"
This reverts commit cc7292056683f592c33055bb6456d509201654ec.
This patch causes two tests to unexpectedly pass:
1. lldb-api.functionalities/tsan/cpp_global_location/TestTsanCPPGlobalLocation.py
2. lldb-api.functionalities/tsan/global_location/TestTsanGlobalLocation.py
Reverting to fix premerge. Not fixing forward so someone who is familiar
with LLDB can take a look and make sure those tests now should pass.
[CIR][NEON] Add lowering support for `vceqzd_s64` (#179779)
Rather than creating a dedicated ClangIR test file, the original test file for
this intrinsic is effectively reused:
* clang/test/CodeGen/AArch64/neon-intrinsics.c
“Effectively” meaning that the corresponding test is moved (rather than
literally reused) to a new file within the original AArch64 builtins test
directory:
* clang/test/CodeGen/AArch64/neon/intrinsics.c
This is necessary to avoid lowering unsupported examples from intrinsics.c with
`-fclangir`. The new file will eventually replace the original one once all
builtins from it can be lowered via ClangIR.
To facilitate test re-use, new LIT "feature" is added so that CIR tests can be
run conditionally, e.g. the following will only run when `CLANG_ENABLE_CIR` is
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[lldb-dap] Fix the breakpoint events test. (#180518)
Previously the test was written in a way that may be flaky, fixed with
the following changes.
- The breakpoint are placed on functions and set during the
configuration stage of the protocol.
- Add the rpath to the test binary.
- Check we also hit the breakpoint we set directly using lldb.
[flang][OpenMP] Improve locality check when determining DSA
Follow-up to https://github.com/llvm/llvm-project/pull/178739.
The locality check assumed that immediately after the initial symbol
resolution (i.e. prior to the OpenMP code in resolve-directives.cpp),
the scope that owns a given symbol is the scope which owns the symbol's
storage. Turns out that this isn't necessarily true as illustrated by
the included testcase, roughly something like:
```
program main
integer :: j ! host j (storage-owning)
contains
subroutine f
!$omp parallel ! scope that owns j, but j is host-associated
do j = ...
end do
!$omp end parallel
end
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[lldb][windows] remove unneeded DeleteProcThreadAttributeList call (#180579)
Remove an unneeded call to `DeleteProcThreadAttributeList`, which is
already done in the `ProcThreadAttributeList` destructor.
[Profile] Enable binary profile correlation for Mach-O binaries (#179937)
The existing ELF/COFF correlation code mostly "just works" on Mach-O
files, with one gotcha: on disk, the pointers in `__llvm_covdata` are
stored in an encoded format due to dyld fixup chains. (In memory, they
would normally be fixed up at load time in a running binary, but the
correlator only looks at the on-disk values.)
LLVM's Mach-O reader knows how to decode the format, so this patch walks
the fixup table to create a set of mappings that the correlator can use
to resolve the values.
rdar://168259786
[SPARC] Add TTI implementation for getPopcntSupport (#178843)
This is to inform the middle-end transform passes about the capabilities
of the codegen backend.
This should solve the issue where popcount loops not gets converted
properly to `popc`, even if it's available
(https://github.com/llvm/llvm-project/issues/171969).
[NFC][lldb][windows] extract the UpdateProcThreadAttribute logic (#180565)
This NFC patch extracts the `UpdateProcThreadAttribute` logic to a
dedicated method be able to reuse it in
https://github.com/llvm/llvm-project/pull/180561.
[asan][AIX] Add vec_malloc and vec_calloc interceptors (#175584)
On AIX, when both the `__VEC__` and `_ALL_SOURCE` macros are defined
(they are defined by default), the malloc and calloc system calls are
mapped to vec_malloc and vec_calloc respectively, so we need the
following vec_malloc and vec_calloc interceptors.
Issue: #138916
Revert "[NFC][LLVM][IPO] Remove pass initialization from pass constructors" (#180571)
Reverts llvm/llvm-project#180154
It seems to cause llc build failures, likely due to missing `ipo`
dependency.
[llubi] Add initial support for llubi (#180022)
This patch implements the initial support for upstreaming
[llubi](https://github.com/dtcxzyw/llvm-ub-aware-interpreter). It only
provides the minimal functionality to run a simple main function. I hope
we can focus on the interface design in this PR, rather than trivial
implementations for each instruction.
RFC link:
https://discourse.llvm.org/t/rfc-upstreaming-llvm-ub-aware-interpreter/89645
Excluding the driver `llubi.cpp`, this patch contains three components
for better decoupling:
+ `Value.h/cpp`: Value representation
+ `Context.h/cpp`: Global state management (e.g., memory) and
interpreter configuration
+ `Interpreter.cpp`: The main interpreter loop
Compared to the out-of-tree version, the major differences are listed
below:
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[AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (#180535)
This means the load/store optimizer can generate pre and post increment
versions of these instructions.
AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sffbh (#180099)
Change test to use update_llc_test_checks.py and make `v_flbit` test
actually divergent.
workflows/release-task: Use less privileged token for uploading release notes (#180299)
We were using one token for both pushing to the llvmbot fork and for
creating a pull request against the www-releases repository, since the
fork and the repository have different owners, we were using a classic
access token which has very coarse-grained permissions. By using two
separate tokens, we limit the permissions to just what we need to do the
task.
Also, at the same time run the release-documentation job in an
environment, so we can limit the accessiblity to these secrets.
[flang] Warn if conditional compilation statements begin with a continuation line (#179802)
In fixed source form, allow conditional compilation statements to begin
with a continuation line and emit a warning. This behavior is similar
to that of regular statements and -E mode.
Fixes #129457
Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (#180231)
I'll merge this at the same time as some llvm-zorg changes that start
building the DeviceRTL.
We only see one new test passing because everything still fails because
of the issue described in
https://github.com/llvm/llvm-project/pull/178980
Once a fix for that issue is merged we will see many new passes.
[RISCV] Combine ADDD+WMULSU to WMACCSU (#180454)
Extend the existing combineADDDToWMACC DAG combine to also match
RISCVISD::WMULSU and produce RISCVISD::WMACCSU. This is similar to
how ADDD+UMUL_LOHI is combined to WMACCU and ADDD+SMUL_LOHI is
combined to WMACC.
This patch was generated by AI, but I reviewed it.
[AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine
Updated RUN lines and generated new `CHECK‑SME`/`CHECK‑SVE` lines in:
llvm/test/CodeGen/AArch64/arm64-cvt-simd-fptoi.ll
llvm/test/CodeGen/AArch64/arm64-cvtf-simd-itofp.ll
by adding `-force-streaming` and `-force-streaming-compatible` runs,
as pre-commit tests for a future change to enable FPRCVT streaming.
This triggers a SVE scalar-combine path which requires a code update.
FP_TO_*_SAT nodes require operand 1 (the saturation VT) to be present.
Without it the node is malformed and hits the SelectionDAG assertion
“Invalid child # of SDNode!”.
Also, skip the SVE combine if the scalar/custom op is already legal.
