LLVM/project 8a0cdb8llvm/lib/Target/RISCV RISCVInstrInfoXqci.td RISCVExpandPseudoInsts.cpp, llvm/test/CodeGen/RISCV short-forward-branch-opt-qcloads.ll

[RISCV] Add short forward branch support for `qc.e.lb(u)`, `qc.e.lh(u)` and `qc.e.lw` (#172629)

DeltaFile
+1,165-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-qcloads.ll
+20-1llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+10-0llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
+10-0llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+1,205-14 files

LLVM/project f34900blldb/tools/lldb-dap package.json

[lldb-dap] Bump the version to 0.4.1
DeltaFile
+1-1lldb/tools/lldb-dap/package.json
+1-11 files

LLVM/project cd081f8llvm/lib/Target/RISCV RISCVInstrInfoZb.td, llvm/test/MC/RISCV rv32p-valid.s rv64p-valid.s

[RISCV] Enable the zext.h alias for PACK with P. (#172756)

This keeps the alias in sync with the base instruction predicate.
DeltaFile
+8-2llvm/test/MC/RISCV/rv32p-valid.s
+2-2llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
+2-2llvm/test/MC/RISCV/rv64p-valid.s
+12-63 files

LLVM/project 6cd651alldb/include/lldb/Expression ExpressionVariable.h, lldb/source/Expression ExpressionVariable.cpp Materializer.cpp

Revert "Make result variables obey their dynamic values in subsequent expressions (#168611)" (#172780)

[Green Dragon's lldb incremental tests
(x86_64)](https://green.lab.llvm.org/job/llvm.org/view/LLDB/job/lldb-cmake/)
are failing beginning with
https://github.com/llvm/llvm-project/pull/168611. This commit reverts
that change. If the job continues to fail after committing this revert,
then I will recommit the original.

rdar://166741668

This reverts commit 6344e3aa8106dfdfb30cac36c8ca02bc4c52ce24.
DeltaFile
+0-173lldb/test/API/functionalities/expr-result-var/TestCPPExprResult.py
+6-72lldb/source/Expression/ExpressionVariable.cpp
+18-44lldb/include/lldb/Expression/ExpressionVariable.h
+0-55lldb/test/API/functionalities/expr-result-var/two-bases.cpp
+24-25lldb/source/Expression/Materializer.cpp
+5-9lldb/source/Expression/LLVMUserExpression.cpp
+53-3784 files not shown
+56-38610 files

LLVM/project cd75676llvm/lib/Target/RISCV/MCTargetDesc RISCVMatInt.cpp, llvm/test/CodeGen/RISCV rv32p.ll rv64p.ll

[RISCV] Prefer li over pli in RISCVMatInt. (#172778)

li is compressible, pli is not.
DeltaFile
+9-0llvm/test/CodeGen/RISCV/rv32p.ll
+9-0llvm/test/CodeGen/RISCV/rv64p.ll
+1-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+19-13 files

LLVM/project 35b2b24llvm/include/llvm/ExecutionEngine SectionMemoryManager.h, llvm/lib/ExecutionEngine SectionMemoryManager.cpp

Implement reserveAllocationSpace for SectionMemoryManager (#71968)

Implements `reserveAllocationSpace` and provides an option to enable
`needsToReserveAllocationSpace` for large-memory environments with
AArch64.

The [AArch64
ABI](https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst#7code-models)
has restrictions on the distance between TEXT and GOT sections as the
instructions to reference them are limited to 2 or 4GB. Allocating
sections in multiple blocks can result in distances greater than that on
systems with lots of memory. In those environments several projects
using SectionMemoryManager with MCJIT have run across assertion failures
for the R_AARCH64_ADR_PREL_PG_HI21 instruction as it attempts to address
across distances greater than 2GB (an int32).

Fixes #71963 by allocating all sections in a single contiguous memory
allocation, limiting the distance required for instruction offsets
similar to how pre-compiled binaries would be loaded into memory.

Co-authored-by: Lang Hames <lhames at gmail.com>
DeltaFile
+251-12llvm/unittests/ExecutionEngine/MCJIT/MCJITMemoryManagerTest.cpp
+95-2llvm/lib/ExecutionEngine/SectionMemoryManager.cpp
+17-1llvm/include/llvm/ExecutionEngine/SectionMemoryManager.h
+363-153 files

LLVM/project e88f3d8utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel] Port 2b9e47749ca1eb337ea26b8084dad52732dc7186 (#172776)

DeltaFile
+12-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+12-01 files

LLVM/project fa9b305utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[bazel] Port 7f1a30ebd242b2a55e8393717f1e594f9cd61569 (#172712)

DeltaFile
+11-4utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+11-41 files

LLVM/project 53490a8mlir/lib/Conversion/ArithAndMathToAPFloat MathToAPFloat.cpp

vectorize isop and abs (but not tests)
DeltaFile
+44-45mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
+44-451 files

LLVM/project 0e1cfaemlir/lib/Conversion/ArithAndMathToAPFloat ArithToAPFloat.cpp Utils.h

[mlir][math] Add vector support for math-to-apfloat
DeltaFile
+0-67mlir/lib/Conversion/ArithAndMathToAPFloat/ArithToAPFloat.cpp
+56-0mlir/lib/Conversion/ArithAndMathToAPFloat/Utils.h
+23-2mlir/lib/Conversion/ArithAndMathToAPFloat/Utils.cpp
+79-693 files

LLVM/project 457f93dllvm/lib/Target/LoongArch LoongArchOptWInstrs.cpp, llvm/test/CodeGen/LoongArch sextw-removal.ll

[LoongArch] Fix OptimizeW crash when MI operand is not a virtual register (#172604)

Fixes #172600
DeltaFile
+37-0llvm/test/CodeGen/LoongArch/sextw-removal.ll
+2-1llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
+39-12 files

LLVM/project 88461e8llvm/lib/Target/RISCV RISCVISelDAGToDAG.cpp

[RISCV] Prevent unnecessary calls to hasAllBUsers/AllHUsers. NFC (#172768)

Make sure the constant isn't already sign extended before calling these
functions.

Also add some elses to prevent checks where we already know the value
has been optimized.
DeltaFile
+5-4llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+5-41 files

LLVM/project 94e03a7llvm/lib/Target/RISCV/MCTargetDesc RISCVMatInt.cpp, llvm/test/CodeGen/RISCV rv64p.ll

[RISCV] Enable use of PACK in RISCVMatInt with P extension. (#172760)

DeltaFile
+10-0llvm/test/CodeGen/RISCV/rv64p.ll
+2-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp
+12-12 files

LLVM/project 54eee1emlir/lib/Conversion/ArithAndMathToAPFloat ArithToAPFloat.cpp MathToAPFloat.cpp, mlir/lib/Conversion/ArithToAPFloat ArithToAPFloat.cpp

Reapply "[mlir][math] Add FP software implementation lowering pass: math-to-apfloat" (#172714) (#172716)

Reapply https://github.com/llvm/llvm-project/pull/171221 - Fix builder
by linking `MLIRTransformUtils`. Also move headers to
`mlir/Conversion/ArithAndMathToAPFloat`.
DeltaFile
+0-665mlir/lib/Conversion/ArithToAPFloat/ArithToAPFloat.cpp
+623-0mlir/lib/Conversion/ArithAndMathToAPFloat/ArithToAPFloat.cpp
+0-329mlir/test/Conversion/ArithToApfloat/arith-to-apfloat.mlir
+329-0mlir/test/Conversion/ArithAndMathToAPFloat/arith-to-apfloat.mlir
+219-0mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
+68-0mlir/test/Integration/Dialect/Math/CPU/test-apfloat-emulation.mlir
+1,239-99415 files not shown
+1,582-1,03921 files

LLVM/project 796fafellvm/lib/IR Instructions.cpp, llvm/test/CodeGen/WinEH wineh-no-demotion.ll

[IR] Update `PHINode::removeIncomingValueIf()` to use the swap strategy like `PHINode::removeIncomingValue()` (#172639)

As suggested in https://github.com/llvm/llvm-project/pull/171963, update
`PHINode::removeIncomingValueIf()` to use the swap strategy too.
DeltaFile
+13-17llvm/lib/IR/Instructions.cpp
+12-12llvm/test/Transforms/DFAJumpThreading/dfa-unfold-select.ll
+6-6llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
+1-1llvm/test/CodeGen/WinEH/wineh-no-demotion.ll
+1-1llvm/test/Transforms/JumpThreading/select.ll
+1-1llvm/test/Transforms/PhaseOrdering/AArch64/hoist-load-from-vector-loop.ll
+34-386 files

LLVM/project 10d4e73llvm/utils/gn/secondary/lldb/source/Utility BUILD.gn

[gn build] Port e4c4498798b0
DeltaFile
+0-1llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
+0-11 files

LLVM/project 5766b8dllvm/utils/gn/secondary/clang/unittests/Analysis/Scalable BUILD.gn

[gn build] Port f58d2f32c0eb
DeltaFile
+1-0llvm/utils/gn/secondary/clang/unittests/Analysis/Scalable/BUILD.gn
+1-01 files

LLVM/project 5f4b9aeclang/include/clang/DependencyScanning DependencyScannerImpl.h, clang/lib/DependencyScanning DependencyScannerImpl.cpp

[clang][deps] Extract `CompilerInvocation` creation (#172744)

This PR extracts the modifications we make to the scanner's
`CompilerInvocation` from multiple spots into a single function.
DeltaFile
+67-62clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+0-3clang/include/clang/DependencyScanning/DependencyScannerImpl.h
+67-652 files

LLVM/project 5d1618bbolt/lib/Passes Aligner.cpp

[BOLT][AArch64] Use minimal code alignment for cold functions (#172598)

On AArch64, a larger cold code size can result in more veneers,
increasing potential overhead for hot code. This change minimizes cold
code size when the `--use-compact-aligner` option (default) is enabled.
DeltaFile
+7-0bolt/lib/Passes/Aligner.cpp
+7-01 files

LLVM/project 0036c67llvm/lib/CodeGen/SelectionDAG LegalizeFloatTypes.cpp LegalizeTypes.h, llvm/test/CodeGen/RISCV fp-fcanonicalize.ll

[RISCV]: Implemented softening of `FCANONICALIZE` (#169234)

The `ISD::FCANONICALIZE` is mapped to `llvm.minnum(x, x)`.

Closes https://github.com/llvm/llvm-project/issues/169216
DeltaFile
+1,749-121llvm/test/CodeGen/RISCV/fp-fcanonicalize.ll
+27-0llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+1,777-1213 files

LLVM/project b1d0e5fllvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool BUILD.gn

[gn] port a1d3cdc88aa2
DeltaFile
+1-0llvm/utils/gn/secondary/clang-tools-extra/clang-doc/tool/BUILD.gn
+1-01 files

LLVM/project f8377f5lldb/packages/Python/lldbsuite/test dotest.py

[lldb/test] Fix libcxx configuration handling for remote platforms (#172761)

When using --platform remote-* options, explicitly clear the libcxx
configuration variables instead of just warning and continuing with
potentially set values. This prevents the test suite from attempting to
use custom libcxx paths on remote platforms where they're not
applicable.

Also initialize libcxx variables to None when not specified, ensuring a
clean state regardless of how the arguments are parsed.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
DeltaFile
+11-1lldb/packages/Python/lldbsuite/test/dotest.py
+11-11 files

LLVM/project 76a17d9mlir/lib/IR AsmPrinter.cpp, mlir/test/IR print-attr-type-aliases.mlir

[MLIR] Fix AsmPrinter alias uniqueness check (#172734)

A sneaky operator precedence bug caused this resize operation to always
truncate to size 0 or 1:
```
probeAlias.resize(alias.size() + isdigit(alias.back()) ? 1 : 0);
```
Because `+` is associated more strongly than the ternary operator. This
eventually led to the asm printer repeating an alias name, generating
illegal IR.

It wasn't a problem in most cases because it required two things to
trigger:
- Two naturally generated aliases, one "xxx" the other "xxx1" (note the
trailing "1").
- A unique processing order such that we process "xxx", then "xxx1",
then "xxx" again. This can only happen if they happen to be at different
"alias depths", since otherwise the pre-sorting will make sure this
ordering never happens. See the added test case for how this works in

    [3 lines not shown]
DeltaFile
+16-0mlir/test/lib/Dialect/Test/TestDialectInterfaces.cpp
+13-0mlir/test/IR/print-attr-type-aliases.mlir
+8-0mlir/test/lib/Dialect/Test/TestAttrDefs.td
+5-2mlir/lib/IR/AsmPrinter.cpp
+42-24 files

LLVM/project 16036e6mlir/lib/Conversion/ArithAndMathToAPFloat MathToAPFloat.cpp

vectorize isop and abs (but not tests)
DeltaFile
+44-45mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
+44-451 files

LLVM/project 9c7708allvm/lib/CAS OnDiskCommon.cpp

[CAS] For `tryLockFileThreadSafe()` return immediately if timeout is 0 (#172729)

This matches the semantics of `tryLockFile()` as well.
DeltaFile
+2-0llvm/lib/CAS/OnDiskCommon.cpp
+2-01 files

LLVM/project 79ed37cmlir/lib/Dialect/Transform/SMTExtension SMTExtensionOps.cpp, mlir/test/python/dialects transform_smt_ext.py

[MLIR][Transform] Fix transform.smt.constrain_params's verifier (#172753)

Verifier was insisting on `!transform.param<...>` too early and hence
crashed on `!transform.any_param`.
DeltaFile
+2-3mlir/lib/Dialect/Transform/SMTExtension/SMTExtensionOps.cpp
+1-1mlir/test/python/dialects/transform_smt_ext.py
+3-42 files

LLVM/project 5acdf79clang/include/clang/Frontend CompilerInstance.h, clang/lib/Frontend CompilerInstance.cpp

[clang] NFC: Qualify argument with `const` (#172745)

DeltaFile
+1-1clang/include/clang/Frontend/CompilerInstance.h
+1-1clang/lib/Frontend/CompilerInstance.cpp
+2-22 files

LLVM/project bbf48d7llvm/test/MC/RISCV rv32zbkb-only-valid.s

[RISCV] Fix incorrect check-prefix in rv32zbkb-only-valid.s. NFC
DeltaFile
+1-1llvm/test/MC/RISCV/rv32zbkb-only-valid.s
+1-11 files

LLVM/project 9cc1585llvm/lib/Transforms/Vectorize VPlanUtils.h VPlan.cpp

[VPlan] Add VPBlockUtils::transferSuccessors (NFCI).

Add a new helper to transfer successors to a new, unconnected VPBB.
Helps to simplify existing code, and prepare for upcoming changes.
DeltaFile
+9-6llvm/lib/Transforms/Vectorize/VPlanUtils.h
+2-3llvm/lib/Transforms/Vectorize/VPlan.cpp
+11-92 files

LLVM/project 4014d83clang/lib/Headers __clang_cuda_runtime_wrapper.h, clang/test/Headers cuda_with_openmp.cu

clang: Remove unnecessary host-supports-cuda from test (#171174)

DeltaFile
+3-2clang/test/Headers/cuda_with_openmp.cu
+1-0clang/lib/Headers/__clang_cuda_runtime_wrapper.h
+4-22 files