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   match VT8261 SATA and another VT8251 SATA
   from Andrius V

   match more VIA ISA bridges when determining IDE DMA modes
   from Andrius V

   regen

   add more VIA SATA and ISA ids
   from Andrius V

   smtpmic(4)

   Add smtpmic(4), a driver for the SpacemiT P1 PMIC.

   ok jca@, mlarkin@

   remove incomplete/never finished loongson hibernate code

   This was started many years ago and never finished. Ongoing work in hibernate
   is complicated by having this old code present.

   ok miod

   Sadly the SpacemiT K1 has peripherals than can only do 32-bit DMA.

   ok jca@, mlarkin@, deraadt@

   zero direct map pages before populating

   Zero the DM PTE/PDE pages before use. Fixes a bug on machines with more than
   512GB RAM; those pages might contain previous data/junk and panic during
   pmap_randomize.

   Tested on various amd64 laptops, an openbsd amd64 vmm VM and an EPYC server
   with 1TB RAM.

   Fix supplied by Chris Cunningham, thanks!

   sync

   smtcomphy(4)

   smtiic(4)

   smtclock(4)

   Fix pasto.

   Add smtiic(4), a driver for the I2C controller found on the SpacemiT K1
   SoC.  This is a close relative of mviic(4), but the register layout
   changed and some bits moved within the registers.

   ok jca@

   Bring back the PXA2X0 variant; it resurfaced in the SpacemiT K1 SoC.
   Incorporate a fix inspired by NetBSD to keep the console enabled when
   userland closes the device.

   relayd: support TLS with multiple listeners

   Fix a bug in relay_inherit() which runs only
   relay_load_certfiles(conf, rb, NULL) unconditionally which isn't
   alligned with logic in parser when it parses relay block, where multiple
   certificates are load as relay_load_certfiles(conf, rb, NULL) only if
   here no tlscerts (for default host) and otherwise it loads keypairs.

   OK: rsadowski@

   x509v3.h: remove pointless #ifdef HEADER_CONF_H

   x509v3.h has included conf.h since June 20, 1999, OpenSSL commit ba404b5e,
   so HEADER_CONF_H has been defined since then. Also since then, CONF_VALUE
   (only available via conf.h) has been used outside of HEADER_CONF_H, making
   that #ifdef doubly pointless.

   ok bcook jsing kenjiro

   cms_local.h: remove #ifdef X509V3_HEADER_H

   All thirteen files including cms_local.h do that after including cms.h,
   which already includes x509v3.h, so this is always defined. While here
   make the cms_local.h a bit more selfstanding by including asn1.h and
   x509v3.h

   ok bcook jsing (who had the same diff) kenjiro

   Tweak vendor #define list to follow numerical ordering

   No functional change

   Follow the sparc64 lead and simply define curcpu in the kernel as the
   special register containing its value, this is a general register (x4)
   and therefore can be used directly

   Diff stolen from miod@ who is on strike but agreed to let me commit
   this.  ok kettenis@

   fix crash on invalid tags file

   If the tag entry points to the line number zero, less crashes because
   internally it uses that line number to imply that the tag is associated
   with a pattern.

   issue reported by Henry Ford (henryfordkjv at gmail), thanks!

   ok kirill@

   Treat "Instruction access fault" (EXCP_FAULT_FETCH) traps as PROT_EXEC.
   Fixes random SIGSEGV on the SpecemiT X60 cores.

   ok mlarkin@, deraadt@

   regen

   Add SpacemiT K1.

   Add smtcomphy(4), a driver for the USB3/PCIe combo PHY found on the
   SpacemiT K1 SoC.

   ok jsing@, jca@

   When a cell is cleared after having been moved, we cannot reuse its
   extended data, because that may still be in use. Add a flag to
   grid_clear_cell to indicate this. Fixes irritating problems with ICH
   (CSI @) mostly visible in emacs.

   Add extkeys feature to tmux itself so nested tmux works, GitHub issue 4960.

   Set less crazy limits (than INT_MAX) for pad and trim, makes ossfuzz happier.

   Hoist mips64 CPU accounting to get multiple softnet threads on MP systems

   Increment ncpus (hw.ncpu) in mips64 cpuattach() instead of octeon/loongson
   hw_cpu_hatch() running before, not after MI sofnet_percpu(), respectively.

   This matches what arm64, macppc and powerpc64 do.

   Local traffic may now be distributed across multiple threads, while physical
   drivers like cnmac(4/octeon) still lack multiqueue support to do so.

   loongson was not tested, but should behave the same.

   initial report Jordan Geoghegan
   tests kirill bluhm Janne Johansson
   feedback miod bluhm kettenis
   OK kirill visa