BSD Commit Log Search

rebase

Created using spr 1.3.4

[SPIR-V] Support SPV_INTEL_fp_max_error extension for `!fpmath` metadata (#130619)

Specification:

https://github.khronos.org/SPIRV-Registry/extensions/INTEL/SPV_INTEL_fp_max_error.html

Merge branch 'main' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Update OB name from `type` to `callee_type`.

Created using spr 1.3.6-beta.1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]

Update LTO compilation CodeGen flag for call-graph-section.

Created using spr 1.3.6-beta.1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]

Rebase, address comments

Created using spr 1.3.5

Merge branch 'main' into users/kparzysz/spr/o03-cancel-directive-name

Merge branch 'main' into users/ylzsx/r-tls-noie

Merge branch 'main' into users/kparzysz/spr/o02-metadirective-flush

Rebase

Created using spr 1.3.5

[SPIR-V] Add SPV_INTEL_memory_access_aliasing extension (#129800)

Spec can be found here https://github.com/intel/llvm/pull/15225
 TODO for future patches:
- During spec review need to decide whether only FunctionCall or Atomic
instructions can be decorated and if not - move the code around adding
handling for other instructions;
- Handle optional string metadata;
- Handle LLVM atomic instructions;
- Handle SPIR-V friendly atomic calls returning via sret argument.

Signed-off-by: Sidorov, Dmitry <dmitry.sidorov at intel.com>

reb

Created using spr 1.3.4

Merge branch 'main' into users/meinersbur/flang_runtime_premerge

[SPIRV] Avoid repeated hash lookups (NFC) (#129826)

Rebase, address comments

Created using spr 1.3.5

Reabse, address comments

Created using spr 1.3.5

Rebase, address comments

Created using spr 1.3.5

[SPIR-V] Stop using Register to represent target specific virtual registers. (#129362)

These were using the virtual register encoding in Register which
required including Register.h in MC layer code which is a layering
violation.

This also required converting Register with bit 31 set to MCRegister
which should be an error. Register with bit 31 set should only be used
for codegen virtual register. I'd like to add assertions to enforce
this.

Migrate to MCRegister and manually create an encoding with bit 31 set.
WebAssembly also does this.

We could consider adding interfaces to MCRegister for target specific
virtual registers.

rebase

Created using spr 1.3.5-bogner

Merge branch 'users/chapuni/mcdc/nest/nest-base' into users/chapuni/mcdc/nest/trunk

Merge branch 'users/chapuni/mcdc/nest/bitmapaddr' into users/chapuni/mcdc/nest/nest-base

Conflicts:
        clang/test/CoverageMapping/mcdc-single-cond.cpp

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/bitmapaddr

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/mcdcstate

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/lnot

Merge branch 'users/chapuni/mcdc/nest/tests' into users/chapuni/mcdc/nest/expect

Merge branch 'main' into users/chapuni/mcdc/nest/tests

Reabse, address comments

Created using spr 1.3.5

rebase

Created using spr 1.3.4