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rebase

Created using spr 1.3.4

SelectionDAG: neg (and x, 1)  -->  SIGN_EXTEND_INREG x, i1 (#131239)

The pattern
```LLVM
%shl = shl i32 %x, 31
%ashr = ashr i32 %shl, 31
```
would be combined to `SIGN_EXTEND_INREG %x, ValueType:ch:i1` by
SelectionDAG.
However InstCombine normalizes this pattern to:
```LLVM
%and = and i32 %x, 1
%neg = sub i32 0, %and
```
This adds matching code to DAGCombiner to catch this variant as well.

Merge branch 'main' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Reland "DAG: Preserve range metadata when load is narrowed" (#128144) (#130609)

Changes: Add guard to ensure truncation is strictly smaller than
original size.

---------

Signed-off-by: John Lu <John.Lu at amd.com>

Update OB name from `type` to `callee_type`.

Created using spr 1.3.6-beta.1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]

Update LTO compilation CodeGen flag for call-graph-section.

Created using spr 1.3.6-beta.1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]

Merge branch 'main' of https://github.com/llvm/llvm-project into remove-old-res-middle

Merge branch 'main' into users/vitalybuka/spr/ir-optimize-cfi-in-writecombinedglobalvaluesummary

[DAGCombiner] Don't ignore N2's undef elements in `foldVSelectOfConstants` (#129272)

Since N2 will be reused in the fold, we cannot skip N2's undef elements
if the corresponding element in N1 is well-defined.
For example:
```
t2: v4i32 = BUILD_VECTOR Constant:i32<0>, Constant:i32<0>, Constant:i32<0>, Constant:i32<0>
t24: v4i32 = BUILD_VECTOR undef:i32, undef:i32, Constant:i32<1>, undef:i32
t11: v4i32 = vselect t8, t2, t10
```
Before this patch, we fold t11 into:
```
t26: v4i32 = sign_extend t8
t27: v4i32 = add t26, t24
```
The last element of t27 is incorrect.

Closes https://github.com/llvm/llvm-project/issues/129181.

(cherry picked from commit 2709366f75b054e2cba4f61310de5a9605f4aa24)

Merge remote-tracking branch 'origin/main' into users/ccc03-08-_astmatcher_templateargumentcountis_support_functiondecl_

Rebase, address comments

Created using spr 1.3.5

Merge branch 'main' into users/kparzysz/spr/o03-cancel-directive-name

[DAG] fold AVGFLOORS to AVGFLOORU for non-negative operand (#84746) (#129678)

Fold ISD::AVGFLOORS to ISD::AVGFLOORU for non-negative operand. Cover test is modified for uhadd with zero extension.

Fixes #84746

Merge branch 'main' into users/ylzsx/r-tls-noie

Rebase

Created using spr 1.3.5

reb

Created using spr 1.3.4

[LLVM][DAGCombine] Remove combiner-vector-fcopysign-extend-round. (#129878)

This option was added to improve test coverage for SVE lowering code
that is impossible to reach otherwise. Given it is not possible to
trigger a bug without it and the generated code is universally worse
with it, I figure the option has no value and should be removed.

Merge branch 'main' into users/meinersbur/flang_runtime_premerge

Rebase, address comments

Created using spr 1.3.5

Rebase, address comments

Created using spr 1.3.5

Reabse, address comments

Created using spr 1.3.5

Reland "[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)"

This relands commit 7a06681398a33d53ba6d661777be8b4c1d19acb7.

Revert "[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)"

This reverts commit 2bef21f24ba932a757a644470358c340f4bcd113.

Multiple builtbot failures have been reported:
https://github.com/llvm/llvm-project/pull/127083

[DAGCombiner] Add generic DAG combine for ISD::PARTIAL_REDUCE_MLA (#127083)

Add generic DAG combine for ISD::PARTIAL_REDUCE_U/SMLA nodes. Transforms
the DAG from:
PARTIAL_REDUCE_MLA(Acc, MUL(EXT(MulOpLHS), EXT(MulOpRHS)), Splat(1)) to
PARTIAL_REDUCE_MLA(Acc, MulOpLHS, MulOpRHS).

Rebase, address comments

Created using spr 1.3.5

remove out-of-date comment

Created using spr 1.3.4

[DAGCombiner] Cleanup MatchFunnelPosNeg by using SDPatternMatch matchers (#129482)

Fixes issue: https://github.com/llvm/llvm-project/issues/129034

rebase

Created using spr 1.3.5-bogner