LLVM/project 552f6c9llvm/test/CodeGen/X86 vector-interleaved-store-i8-stride-7.ll vector-interleaved-store-i16-stride-6.ll, llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-ld1.ll

rebase

Created using spr 1.3.4
DeltaFile
+3,128-3,170llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
+2,487-2,510llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+2,099-2,096llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053-2,052llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+3,860-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,716-1,780llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
+15,343-11,6084,566 files not shown
+159,258-104,3134,572 files

LLVM/project 85e290bllvm/test/CodeGen/AMDGPU bf16.ll, llvm/test/CodeGen/NVPTX cmpxchg-sm90.ll cmpxchg-sm70.ll

Merge branch 'main' into users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+7,350-4,196llvm/test/CodeGen/AMDGPU/bf16.ll
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+90,478-10,3696,999 files not shown
+425,286-177,3787,005 files

LLVM/project 2ece26fllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Update OB name from `type` to `callee_type`.

Created using spr 1.3.6-beta.1
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+164,956-024,133 files not shown
+2,356,601-721,36324,139 files

LLVM/project 9c94049llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+164,956-024,129 files not shown
+2,356,435-721,19824,135 files

LLVM/project 05307cfllvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

Update LTO compilation CodeGen flag for call-graph-section.

Created using spr 1.3.6-beta.1
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-024,129 files not shown
+2,356,435-721,19824,135 files

LLVM/project de23806llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-024,128 files not shown
+2,356,423-721,19324,134 files

LLVM/project 2c57c89llvm/test/Analysis/CostModel/AArch64 arith-widening.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll

Merge branch 'main' of https://github.com/llvm/llvm-project into remove-old-res-middle
DeltaFile
+2,099-2,096llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053-2,052llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+1,434-1,828llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+2,915-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+1,434-1,418llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+940-1,896llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
+10,875-9,2902,274 files not shown
+97,298-62,3572,280 files

LLVM/project ed3f871llvm/test/Analysis/CostModel/AArch64 arith-widening.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-cttz-vp.ll

Merge branch 'main' into users/vitalybuka/spr/ir-optimize-cfi-in-writecombinedglobalvaluesummary
DeltaFile
+2,099-2,096llvm/test/MC/AMDGPU/gfx12_asm_sop2.s
+2,053-2,052llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop2.txt
+1,434-1,828llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+1,434-1,418llvm/test/MC/AMDGPU/gfx12_asm_sop1.s
+940-1,896llvm/test/Analysis/CostModel/AArch64/arith-widening.ll
+1,240-1,230llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sop1.txt
+9,200-10,5201,240 files not shown
+47,494-33,1451,246 files

LLVM/project 397c487llvm/test/CodeGen/AMDGPU global_atomics_scan_fadd.ll global_atomics_scan_fsub.ll, llvm/test/CodeGen/RISCV/rvv fixed-vectors-cttz-vp.ll

Merge remote-tracking branch 'origin/main' into users/ccc03-08-_astmatcher_templateargumentcountis_support_functiondecl_
DeltaFile
+1,434-1,828llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,214-1,214llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+1,214-1,214llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+726-1,509llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
+7,080-8,2571,023 files not shown
+37,140-28,4421,029 files

LLVM/project 8a8f135clang/include/clang/AST OpenACCClause.h, clang/lib/AST OpenACCClause.cpp

[OpenACC] Implement 'bind' ast/sema for 'routine' directive

The 'bind' clause allows the renaming of a function during code
generation.  There are a few rules about when this can/cannot happen,
and it takes either a string or identifier (previously mis-implemetned
as ID-expression) argument.

Note there are additional rules to this in the implicit-function routine
case, but that isn't implemented in this patch, as implicit-function
routine is not yet implemented either.
DeltaFile
+6-43clang/test/ParserOpenACC/parse-clauses.cpp
+45-0clang/include/clang/AST/OpenACCClause.h
+29-1clang/lib/AST/OpenACCClause.cpp
+26-3clang/test/SemaOpenACC/routine-construct-clauses.cpp
+19-9clang/lib/Sema/SemaOpenACCClause.cpp
+19-8clang/lib/Parse/ParseOpenACC.cpp
+144-6421 files not shown
+297-11727 files

LLVM/project dc66ca4llvm/test/CodeGen/AMDGPU llvm.amdgcn.smfmac.gfx950.ll, llvm/test/CodeGen/RISCV xqccmp-push-pop-popret.ll

Rebase, address comments

Created using spr 1.3.5
DeltaFile
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+3,951-0llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
+3,860-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,746-1,734llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+1,348-1,952llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+17,078-9,8592,714 files not shown
+131,118-67,3922,720 files

LLVM/project d4e79afllvm/test/CodeGen/AMDGPU global_atomics_scan_fsub.ll global_atomics_scan_fadd.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll qci-interrupt-attr-fpr.ll

Merge branch 'main' into users/kparzysz/spr/o03-cancel-directive-name
DeltaFile
+2,927-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+2,821-0llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
+1,246-1,246llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
+1,214-1,214llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
+1,214-1,214llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
+10,668-4,9201,301 files not shown
+51,893-31,2131,307 files

LLVM/project 7dc7264llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'main' into users/ylzsx/r-tls-noie
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+29,745-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+203,722-016,100 files not shown
+2,040,184-604,85516,106 files

LLVM/project 33f623dllvm/test/CodeGen/AMDGPU vni8-across-blocks.ll shufflevector-physreg-copy.ll, llvm/test/CodeGen/RISCV qci-interrupt-attr.ll qci-interrupt-attr-fpr.ll

Merge branch 'main' into users/kparzysz/spr/o02-metadirective-flush
DeltaFile
+2,927-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+2,821-0llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
+603-1,206llvm/test/CodeGen/X86/matrix-multiply.ll
+706-540llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
+812-407llvm/test/CodeGen/Thumb2/mve-vld3.ll
+795-0llvm/test/CodeGen/AMDGPU/shufflevector-physreg-copy.ll
+8,664-2,153747 files not shown
+23,408-10,802753 files

LLVM/project 2ff290bllvm/test/CodeGen/RISCV xqccmp-push-pop-popret.ll qci-interrupt-attr.ll, llvm/test/CodeGen/X86 vector-interleaved-store-i16-stride-7.ll vector-interleaved-store-i8-stride-7.ll

Rebase

Created using spr 1.3.5
DeltaFile
+3,951-0llvm/test/CodeGen/RISCV/xqccmp-push-pop-popret.ll
+3,860-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-ld1.ll
+1,746-1,734llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+1,532-1,534llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
+2,927-0llvm/test/CodeGen/RISCV/qci-interrupt-attr.ll
+2,821-0llvm/test/CodeGen/RISCV/qci-interrupt-attr-fpr.ll
+16,837-3,2681,830 files not shown
+73,594-27,5911,836 files

LLVM/project 1493f42clang/test/SemaOpenACC combined-construct-auto_seq_independent-clauses.c loop-construct-auto_seq_independent-clauses.c

[OpenACC] Add test changes missed in 7d8da04

Looks like I did a bad job with git and ended up having some failed
tests!  This should fix those.
DeltaFile
+6-6clang/test/SemaOpenACC/combined-construct-auto_seq_independent-clauses.c
+6-6clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
+2-2clang/test/SemaOpenACC/routine-construct-clauses.cpp
+1-2clang/test/SemaOpenACC/combined-construct-device_type-clause.c
+1-2clang/test/SemaOpenACC/compute-construct-device_type-clause.c
+1-2clang/test/SemaOpenACC/loop-construct-device_type-clause.c
+17-201 files not shown
+17-227 files

LLVM/project 1b75b9eclang/lib/Sema SemaOpenACCClause.cpp SemaTemplateInstantiateDecl.cpp, clang/test/AST ast-print-openacc-routine-construct.cpp

[OpenACC] Handle sema for gang, worker, vector, seq clauses on routine

These 4 clauses are mutually exclusive, AND require at least one of
them. Additionally, gang has some additional restrictions in that only
the 'dim' specifier is permitted. This patch implements all of this, and
ends up refactoring the handling of each of these clauses for
readabililty.
DeltaFile
+174-145clang/lib/Sema/SemaOpenACCClause.cpp
+144-144clang/test/SemaOpenACC/routine-construct.cpp
+98-31clang/test/SemaOpenACC/routine-construct-ast.cpp
+119-0clang/test/SemaOpenACC/routine-construct-clauses.cpp
+59-57clang/test/AST/ast-print-openacc-routine-construct.cpp
+61-10clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+655-38710 files not shown
+753-45816 files

LLVM/project df1e102clang/include/clang/AST DeclOpenACC.h, clang/lib/Parse ParseOpenACC.cpp

[OpenACC] implement AST/Sema for 'routine' construct with argument

The 'routine' construct has two forms, one which takes the name of a
function that it applies to, and another where it implicitly figures it
out based on the next declaration. This patch implements the former with
the required restrictions on the name and the function-static-variables
as specified.

What has not been implemented is any clauses for this, any of the A.3.4
warnings, or the other form.
DeltaFile
+400-0clang/test/SemaOpenACC/routine-construct.cpp
+204-0clang/test/SemaOpenACC/routine-construct-ast.cpp
+137-43clang/lib/Sema/SemaOpenACC.cpp
+89-0clang/test/AST/ast-print-openacc-routine-construct.cpp
+55-0clang/include/clang/AST/DeclOpenACC.h
+31-18clang/lib/Parse/ParseOpenACC.cpp
+916-6131 files not shown
+1,191-18737 files

LLVM/project 8cb72bdllvm/test/CodeGen/NVPTX cmpxchg-sm90.ll cmpxchg-sm70.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

reb

Created using spr 1.3.4
DeltaFile
+65,595-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm90.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm70.ll
+5,680-0llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
+88,808-6,1733,815 files not shown
+253,453-75,5073,821 files

LLVM/project b2e1758llvm/test/CodeGen/AMDGPU llvm.amdgcn.smfmac.gfx950.ll, llvm/test/Instrumentation/MemorySanitizer/AArch64 arm64-vmul.ll neon_vmul.ll

Rebase, address comments

Created using spr 1.3.5
DeltaFile
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+1,348-1,952llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+0-1,933llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
+1,933-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
+1,917-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1_lane.ll
+11,371-10,0581,125 files not shown
+41,367-24,0581,131 files

LLVM/project 5ea9c7eclang/lib/Headers avx10_2convertintrin.h, llvm/test/Instrumentation/MemorySanitizer/AArch64 neon_vmul.ll arm64-vmul.ll

Reabse, address comments

Created using spr 1.3.5
DeltaFile
+0-6,173llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vmul.ll
+6,173-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmul.ll
+2,854-51clang/lib/Headers/avx10_2convertintrin.h
+0-1,933llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst.ll
+1,933-0llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-st1.ll
+0-1,917llvm/test/Instrumentation/MemorySanitizer/AArch64/neon_vst_lane.ll
+10,960-10,0741,598 files not shown
+58,088-25,8271,604 files

LLVM/project 5d7d66bclang/include/clang/AST DeclOpenACC.h, clang/lib/Sema SemaOpenACCClause.cpp SemaTemplateInstantiateDecl.cpp

[OpenACC] Implement 'declare' construct AST/Sema

The 'declare' construct is the first of two 'declaration' level
constructs, so it is legal in any place a declaration is, including as a
statement, which this accomplishes by wrapping it in a DeclStmt. All
clauses on this have a 'same scope' requirement, which this enforces as
declaration context instead, which makes it possible to implement these
as a template.

The 'link' and 'device_resident' clauses are also added, which have some
similar/small restrictions, but are otherwise pretty rote.

This patch implements all of the above.
DeltaFile
+390-0clang/test/SemaOpenACC/declare-construct-ast.cpp
+308-0clang/test/SemaOpenACC/declare-construct.cpp
+220-34clang/lib/Sema/SemaOpenACCClause.cpp
+228-0clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+106-0clang/include/clang/AST/DeclOpenACC.h
+77-16clang/lib/Sema/SemaOpenACC.cpp
+1,329-5044 files not shown
+1,788-16950 files

LLVM/project e45a72allvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

refactor

Created using spr 1.3.4
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+164,956-015,561 files not shown
+1,914,489-576,76815,567 files

LLVM/project d9751a3llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Merge branch 'main' into users/chapuni/yaml/newgen

Conflicts:
        llvm/test/tools/llvm-cov/Inputs/branch-logical-mixed.cpp
        llvm/test/tools/llvm-cov/Inputs/branch-macros.cpp
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2p3.v8p3.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+164,956-030,003 files not shown
+3,294,806-1,187,82230,009 files

LLVM/project a63f09ellvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

rebase

Created using spr 1.3.4
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,139-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i16.v8i16.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i32.v8i32.ll
+25,933-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f32.v8f32.ll
+164,956-014,444 files not shown
+1,781,638-474,01214,450 files

LLVM/project 176d034llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Merge branch 'main' into users/zhaoqi5/opt-tlsle-mergebaseoffset
DeltaFile
+30,641-0llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2f16.v8f16.ll
+27,655-0llvm/test/CodeGen/AMDGPU/shufflevector.v2bf16.v8bf16.ll
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LLVM/project e80ef33llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

Merge branch 'main' into users/joaosaffran/123147
DeltaFile
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LLVM/project 3fad066llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

Rebase on top of main.

Created using spr 1.3.6-beta.1
DeltaFile
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LLVM/project 2d88d20llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2f16.v8f16.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.6-beta.1

[skip ci]
DeltaFile
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LLVM/project f38ce99llvm/test/CodeGen/AMDGPU shufflevector.v2i64.v8i64.ll shufflevector.v2bf16.v8bf16.ll

Rebase on top of main.

Created using spr 1.3.6-beta.1
DeltaFile
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