LLVM / project - FreshBSD

LLVM/project 4e5aa21 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Feb 15, 2024 by Fangrui Song on ⎇

users/MaskRay/spr/asan-isinterestingalloca-remove-the-isallocapromotable-condition

rename ClSkipPromotableAllocas

Created using spr 1.3.4

Delta		File
+22,204	-17,874	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,733	-6,530	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,621	-6,188	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,152	-6,073	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,429	-12,423	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+121,955	-68,900	13,344 files not shown
+1,256,033	-867,668	13,350 files

LLVM/project 3006cbb — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Feb 15, 2024 by Tom Stellard via Fangrui Song on ⎇

users/MaskRay/spr/main.asan-isinterestingalloca-remove-the-isallocapromotable-condition

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+22,204	-17,874	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,733	-6,530	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,621	-6,188	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,152	-6,073	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,429	-12,423	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+121,955	-68,900	13,344 files not shown
+1,256,028	-867,667	13,350 files

LLVM/project 0a312e8 — llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Feb 8, 2024 by John Demme on ⎇

users/teqdruid/mlir/python-liveobjects

Merge branch 'main' into users/teqdruid/mlir/python-liveobjects

Delta		File
+22,204	-17,874	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+22,733	-6,530	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,621	-6,188	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,152	-6,073	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,429	-12,423	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+14,732	-9,307	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+116,871	-58,395	8,530 files not shown
+1,045,605	-752,198	8,536 files

LLVM/project 1dfed45 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Feb 1, 2024 by wangpc via Wang Pengcheng on ⎇

users/wangpc-pp/spr/riscvnfc-simplify-callsll-and-autogenerate-checks-for-tail-callsll

Rebase

Created using spr 1.3.4

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,442	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+122,009	-68,858	6,022 files not shown
+734,177	-352,757	6,028 files

LLVM/project 3fb6535 — llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 30, 2024 by Fangrui Song on ⎇

users/MaskRay/spr/aarch64-implement-fno-plt-for-selectiondagglobalisel

fix FastISel failures by not classifying Addr.getGlobalValue(), which can be null

Created using spr 1.3.4

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+14,732	-9,307	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+116,931	-58,353	3,823 files not shown
+626,137	-302,198	3,829 files

LLVM/project 2e53d9a — llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 29, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpimprove-minbitwidth-analysis

Rebase

Created using spr 1.3.5

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+14,732	-9,307	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+116,931	-58,353	3,421 files not shown
+607,587	-296,133	3,427 files

LLVM/project 8527422 — llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 29, 2024 by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpimprove-findreusedorderedscalars-and-graph-rotation

Rebase

Created using spr 1.3.5

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+14,732	-9,307	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+116,931	-58,353	3,390 files not shown
+605,848	-295,476	3,396 files

LLVM/project 05d80b9 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 29, 2024 by Justin Bogner on ⎇

users/bogner/sprdirectxdocs-architecture-and-design-philosophy-of-dxil-support

Fix typos

Created using spr 1.3.5-bogner

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+122,015	-68,858	7,497 files not shown
+721,917	-350,725	7,503 files

LLVM/project f4bf742 — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 29, 2024 by Justin Bogner on ⎇

users/bogner/sprdirectx-move-dxil-resourcekind-and-elementtype-to-dxilabih-nfc

clang-format

Created using spr 1.3.5-bogner

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+122,015	-68,858	7,464 files not shown
+720,055	-349,198	7,470 files

LLVM/project 9a0cead — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 29, 2024 by Justin Bogner on ⎇

users/bogner/sprmain.directx-move-dxil-resourcekind-and-elementtype-to-dxilabih-nfc

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.5-bogner

[skip ci]

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+122,015	-68,858	7,463 files not shown
+720,054	-349,197	7,469 files

LLVM/project 93d7f2d — llvm/lib/Support UnicodeNameToCodepointGenerated.cpp, llvm/test/CodeGen/X86 vector-interleaved-store-i64-stride-7.ll vector-interleaved-load-i64-stride-8.ll

Jan 29, 2024 by Justin Bogner on ⎇

users/bogner/sprdirectx-rename-dxiloperationcommonh-to-dxilabih-nfc

Rebase

Created using spr 1.3.5-bogner

Delta		File
+22,203	-17,873	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
+19,816	-19,812	llvm/lib/Support/UnicodeNameToCodepointGenerated.cpp
+22,753	-6,518	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+21,619	-6,186	llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+21,176	-6,053	llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-7.ll
+14,448	-12,416	llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
+122,015	-68,858	7,463 files not shown
+720,054	-349,197	7,469 files

LLVM/project 402c84a — clang/include/clang/Basic Builtins.td, libcxx/test/libcxx/algorithms/alg.sorting bad_comparator_values.h

Jan 26, 2024 by Congcong Cai via GitHub on ⎇

users/ccc/69307-clang-ice-when-dealing-with-some-certain-requires-clauses-in-calculateconstraintsatisfaction

Merge branch 'main' into users/ccc/69307-clang-ice-when-dealing-with-some-certain-requires-clauses-in-calculateconstraintsatisfaction

Delta		File
+4,537	-0	clang/include/clang/Basic/Builtins.td
+3,565	-0	libcxx/test/libcxx/algorithms/alg.sorting/assert.sort.invalid_comparator/bad_comparator_values.h
+0	-3,565	libcxx/test/libcxx/algorithms/alg.sorting/bad_comparator_values.h
+1,665	-1,717	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
+1,889	-1,030	llvm/test/CodeGen/X86/apx/mul-i1024.ll
+180	-1,617	mlir/lib/Dialect/SparseTensor/Transforms/Utils/LoopEmitter.cpp
+11,836	-7,929	3,353 files not shown
+138,322	-53,510	3,359 files

LLVM/project 3641aa4 — libcxx/test/libcxx/algorithms/alg.sorting bad_comparator_values.h, libcxx/test/libcxx/algorithms/alg.sorting/assert.sort.invalid_comparator bad_comparator_values.h

Jan 24, 2024 by wangpc on ⎇

users/wangpc-pp/spr/riscv-add-experimental-support-of-zaamo-and-zalrsc

Rebase, fix tests, format predicates and remove unused predicates

Created using spr 1.3.4

Delta		File
+3,565	-0	libcxx/test/libcxx/algorithms/alg.sorting/assert.sort.invalid_comparator/bad_comparator_values.h
+0	-3,565	libcxx/test/libcxx/algorithms/alg.sorting/bad_comparator_values.h
+1,634	-1,663	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
+756	-764	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
+1,245	-0	llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
+1,245	-0	llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
+8,445	-5,992	1,482 files not shown
+59,752	-25,577	1,488 files

LLVM/project 2a19c16 — libcxx/test/libcxx/algorithms/alg.sorting bad_comparator_values.h, libcxx/test/libcxx/algorithms/alg.sorting/assert.sort.invalid_comparator bad_comparator_values.h

Jan 23, 2024 by Paul Kirth on ⎇

users/ilovepi/spr/clangfatlto-avoid-unifiedlto-until-it-can-support

Rebase

Created using spr 1.3.4

Delta		File
+0	-3,565	libcxx/test/libcxx/algorithms/alg.sorting/bad_comparator_values.h
+3,565	-0	libcxx/test/libcxx/algorithms/alg.sorting/assert.sort.invalid_comparator/bad_comparator_values.h
+1,634	-1,663	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
+756	-764	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
+1,245	-0	llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
+1,245	-0	llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
+8,445	-5,992	862 files not shown
+38,527	-14,112	868 files

LLVM/project 33e63ef — libcxx/include/__expected expected.h, llvm/test/CodeGen/AArch64 shift.ll arm64-vadd.ll

Jan 23, 2024 by Fangrui Song on ⎇

users/MaskRay/spr/elf-save-temps-lto-emit-asm-derive-elfasm-file-names-from-bitcode-file-names

address comments

Created using spr 1.3.4

Delta		File
+1,245	-0	llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll
+1,245	-0	llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll
+759	-399	libcxx/include/__expected/expected.h
+1,091	-0	llvm/test/CodeGen/AArch64/shift.ll
+689	-194	llvm/test/CodeGen/AArch64/arm64-vadd.ll
+815	-0	llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll
+5,844	-593	1,184 files not shown
+48,517	-10,167	1,190 files

LLVM/project a2d68b4 — llvm/include/llvm/Analysis TargetTransformInfo.h TargetTransformInfoImpl.h, llvm/lib/Analysis TargetTransformInfo.cpp

Jan 22, 2024 by David Green via GitHub on ⎇

main

[SelectOpt] Add handling for Select-like operations. (#77284)

Some operations behave like selects. For example `or(zext(c), y)` is the
same as select(c, y|1, y)` and instcombine can canonicalize the select
to the or form. These operations can still be worthwhile converting to
branch as opposed to keeping as a select or or instruction.

This patch attempts to add some basic handling for them, creating a
SelectLike abstraction in the select optimization pass. The backend can
opt into handling `or(zext(c),x)` as a select if it could be profitable,
and the select optimization pass attempts to handle them in much the
same way as a `select(c, x|1, x)`. The Or(x, 1) may need to be added as
a new instruction, generated as the or is converted to branches.

This helps fix a regression from selects being converted to or's
recently.

Delta		File
+274	-123	llvm/lib/CodeGen/SelectOptimize.cpp
+25	-6	llvm/test/CodeGen/AArch64/selectopt.ll
+15	-0	llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+10	-0	llvm/include/llvm/Analysis/TargetTransformInfo.h
+9	-0	llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+5	-0	llvm/lib/Analysis/TargetTransformInfo.cpp
+338	-129	1 files not shown
+340	-129	7 files

LLVM/project cd7c0be — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/bolt-add-callsiteinfo-entries-in-yamlbat-1

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,745 files not shown
+120,297	-60,587	2,751 files

LLVM/project a867b62 — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.bolt-add-callsiteinfo-entries-in-yamlbat-1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,745 files not shown
+120,276	-60,566	2,751 files

LLVM/project 5f2e47f — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/bolt-emit-intra-function-control-flow-in-yamlbat

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,985	-0	llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
+14,172	-12,740	2,745 files not shown
+120,276	-60,566	2,751 files

LLVM/project 89f0fc8 — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.bolt-emit-intra-function-control-flow-in-yamlbat

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project 79d4a9c — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/bolt-output-yaml-profile-in-bat-mode

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,985	-0	llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
+14,172	-12,740	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project a45754f — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.bolt-output-yaml-profile-in-bat-mode

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,985	-0	llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
+14,172	-12,740	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project ec9af66 — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/boltnfc-expose-yamlprofilewriterconvert-function

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project 8a7f721 — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.boltnfc-expose-yamlprofilewriterconvert-function

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project f03b0f4 — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.boltnfc-const-ify-dataaggregatorgetlocationname

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project 63c57d4 — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/boltnfc-const-ify-dataaggregatorgetlocationname

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,985	-0	llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
+14,172	-12,740	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project 83342dd — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/bolt-write-and-parse-bfbb-hashes-in-bat

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,985	-0	llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
+14,172	-12,740	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project 60332ea — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.bolt-write-and-parse-bfbb-hashes-in-bat

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,985	-0	llvm/test/Transforms/LoopIdiom/AArch64/byte-compare-index.ll
+14,172	-12,740	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project 5db275f — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/boltnfc-pass-bfbb-hashes-to-bat

rebase

Created using spr 1.3.4

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,744 files not shown
+120,263	-60,553	2,750 files

LLVM/project a371a2a — clang/www cxx_dr_status.html, llvm/lib/DWARFLinker DWARFLinker.cpp

Jan 11, 2024 by Amir Ayupov on ⎇

users/aaupov/spr/main.boltnfc-pass-bfbb-hashes-to-bat

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+5,833	-6,991	llvm/test/CodeGen/AMDGPU/bf16.ll
+2,112	-1,745	clang/www/cxx_dr_status.html
+0	-3,064	llvm/lib/DWARFLinker/DWARFLinker.cpp
+3,045	-0	llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+1,197	-940	mlir/test/Dialect/Transform/test-interpreter.mlir
+1,771	-214	llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
+13,958	-12,954	2,744 files not shown
+120,263	-60,553	2,750 files