LLVM/project 80a0c15clang/test/CodeGen/RISCV/rvv-intrinsics vluxseg.c vloxseg.c, clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded vluxseg.c vloxseg.c

Merge branch 'main' into irbuilder-extract-refactor
DeltaFile
+12,242-14,649llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+11,615-13,961llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+2-24,936clang/test/CodeGen/RISCV/rvv-intrinsics/vluxseg.c
+2-24,936clang/test/CodeGen/RISCV/rvv-intrinsics/vloxseg.c
+2-21,307clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxseg.c
+2-21,307clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg.c
+23,865-121,09630,598 files not shown
+2,090,526-1,305,42030,604 files

LLVM/project f766bc0llvm/include/llvm/IR IntrinsicsHexagonDep.td, llvm/lib/Target/Hexagon HexagonDepInstrInfo.td HexagonDepIICHVX.td

[Hexagon] Introduce Hexagon v69 ISA
DeltaFile
+1,136-117llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+1,018-0llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+768-0llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+493-45llvm/include/llvm/IR/IntrinsicsHexagonDep.td
+291-2llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
+67-5llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
+3,773-16917 files not shown
+4,017-21423 files

LLVM/project 0bb1985llvm/include/llvm/IR IntrinsicsHexagonDep.td, llvm/lib/Target/Hexagon HexagonDepInstrFormats.td HexagonDepMapAsm2Intrin.td

[Hexagon] Add LLVM instruction definitions for Hexagon V68
DeltaFile
+4,694-4,662llvm/include/llvm/IR/IntrinsicsHexagonDep.td
+3,187-3,844llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
+2,968-2,932llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
+862-605llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+713-150llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+336-79llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+12,760-12,27214 files not shown
+13,111-12,50520 files

LLVM/project 54818b3clang/test/AST ast-dump-expr-json.c, llvm/include/llvm/IR IntrinsicsHexagon.td

[DPWBS-1200] Merge community 'master' into HighTec 'htc/master'

Due to interface changes there were a few necessary changes to TriCore
specific files. The following table lists the changed files and the
corresponding community master commits:

TriCoreInstrInfo.h/.cpp:        e6c9a9af398baf40537d45498e0aaf417c1306dc
TriCoreInstPrinter.h/.cpp:      aa708763d30384c0da0b0779be96ba45f65773df
TriCoreRegisterBankInfo.h/.cpp: 21309eafdebaa0041a83a026ae011e305b2f52a0
TriCoreMCInstLower.cpp:         a transitive include of TargetMachine.h
                                was removed somewhere and had to be
                                included here
TriCoreDisassembler.cpp:        6fdd6a7b3f696972edc244488f59532d05136a27
TriCoreTargetMachine.cpp:       05da2fe52162c80dfa18aedf70cf73cb11201811
TriCore/*/CMakeLists.txt:       ab411801b82783eb7f652701ccfce81b16cf1811
legalize-phi.mir:               6da7dbb806dce9fbc05416482a5b895efdea96b0
DeltaFile
+12,682-4,910llvm/test/MC/AMDGPU/gfx10_asm_all.s
+5,448-5,431clang/test/AST/ast-dump-expr-json.c
+6,048-3,589llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+3,729-3,042llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
+3,173-3,161llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td
+50-6,126llvm/include/llvm/IR/IntrinsicsHexagon.td
+31,130-26,25913,033 files not shown
+920,816-262,06913,039 files

LLVM/project c12a591llvm/lib/Target/Hexagon HexagonDepIICScalar.td HexagonDepInstrFormats.td, llvm/test/MC/Hexagon/extensions v67_hvx.s

[Hexagon] Add support for Hexagon/HVX v67 ISA
DeltaFile
+6,048-3,589llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+3,729-3,042llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
+3,819-2,204llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+2,821-0llvm/lib/Target/Hexagon/HexagonDepMask.h
+2,810-0llvm/test/MC/Hexagon/extensions/v67_hvx.s
+492-1llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+19,719-8,83644 files not shown
+21,308-9,34250 files

LLVM/project 2c2a7bbclang/test/Analysis/Inputs/expected-plists retain-release.m.objcpp.plist retain-release.m.objc.plist, lldb/www/python_reference lldb-pysrc.html _lldb'-module.html

Merge community 'master' into HighTec htc/master
DeltaFile
+131,121-0llvm/test/MC/AMDGPU/gfx10_asm_all.s
+98,845-0llvm/test/MC/Disassembler/AMDGPU/gfx10_dasm_all.txt
+0-76,576lldb/www/python_reference/lldb-pysrc.html
+0-35,247lldb/www/python_reference/_lldb'-module.html
+26,304-0clang/test/Analysis/Inputs/expected-plists/retain-release.m.objcpp.plist
+26,235-0clang/test/Analysis/Inputs/expected-plists/retain-release.m.objc.plist
+282,505-111,82349,584 files not shown
+3,612,145-1,757,40149,590 files

LLVM/project 2946cd7clang-tools-extra/clang-tidy add_new_check.py, clang/include/clang-c CXString.h

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636
DeltaFile
+9-12compiler-rt/utils/generate_netbsd_syscalls.awk
+9-12clang-tools-extra/clang-tidy/add_new_check.py
+6-8compiler-rt/utils/generate_netbsd_ioctls.awk
+6-8llvm/utils/llvm-build/llvmbuild/main.py
+3-6clang/lib/AST/QualTypeNames.cpp
+4-4clang/include/clang-c/CXString.h
+37-5011,256 files not shown
+33,878-44,82911,262 files

LLVM/project 545a68cllvm/lib/Target/Hexagon HexagonDepIICScalar.td HexagonDepInstrInfo.td, llvm/test/CodeGen/Hexagon dfp.ll

[Hexagon] Add instruction definitions for Hexagon V66

llvm-svn: 348411
DeltaFile
+1,093-243llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+769-220llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+701-0llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+115-21llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
+41-0llvm/lib/Target/Hexagon/HexagonScheduleV66.td
+19-0llvm/test/CodeGen/Hexagon/dfp.ll
+2,738-48415 files not shown
+2,837-50121 files

LLVM/project 6290a73llvm/lib/Target/Hexagon HexagonDepIICScalar.td HexagonDepInstrInfo.td

[Hexagon] Update timing classes

llvm-svn: 348183
DeltaFile
+2,669-2,817llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+2,361-2,333llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+1,678-1,679llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+81-79llvm/lib/Target/Hexagon/HexagonDepTimingClasses.h
+4-4llvm/lib/Target/Hexagon/HexagonPseudo.td
+6,793-6,9125 files

LLVM/project a8ab1b7llvm/include/llvm/IR IntrinsicsHexagon.td, llvm/lib/Target/Hexagon HexagonDepInstrInfo.td HexagonDepIICScalar.td

[Hexagon] Add support for Hexagon V65

llvm-svn: 320404
DeltaFile
+4,233-2,838llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+4,116-2,430llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+856-97llvm/include/llvm/IR/IntrinsicsHexagon.td
+461-388llvm/lib/Target/Hexagon/HexagonDepMappings.td
+810-12llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
+718-4llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+11,194-5,76963 files not shown
+14,017-6,55869 files

LLVM/project 2af5037llvm/lib/Target/Hexagon HexagonDepInstrInfo.td HexagonDepInstrFormats.td

[Hexagon] Use automatically-generated scheduling information for HVX

Patch by Jyotsna Verma.

llvm-svn: 302073
DeltaFile
+3,396-3,033llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
+2,727-3,668llvm/lib/Target/Hexagon/HexagonDepInstrFormats.td
+2,504-0llvm/lib/Target/Hexagon/HexagonDepIICScalar.td
+1,143-0llvm/lib/Target/Hexagon/HexagonDepIICHVX.td
+175-127llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
+129-145llvm/lib/Target/Hexagon/HexagonPseudo.td
+10,074-6,97322 files not shown
+10,541-8,56728 files