LLVM / project - FreshBSD

LLVM/project f4fb73a — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime' into users/meinersbur/flang_runtime_shared

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,851	4,704 files

LLVM/project bed5b1f — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime_move-files' into users/meinersbur/flang_runtime

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,851	4,704 files

LLVM/project a8c87d7 — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime_flang_rt' into users/meinersbur/flang_runtime_move-files

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,851	4,704 files

LLVM/project 1f3d71e — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime_FLANG_INCLUDE_RUNTIME' into users/meinersbur/flang_runtime_flang_rt

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,851	4,704 files

LLVM/project b68700b — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime_Testing' into users/meinersbur/flang_runtime_FLANG_INCLUDE_RUNTIME

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,851	4,704 files

LLVM/project f007594 — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime_FortranSupport' into users/meinersbur/flang_runtime_Testing

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,851	4,704 files

LLVM/project a519f98 — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by U-BERGUFFLEN\meinersbur on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'users/meinersbur/flang_runtime_FortranDecimal' into users/meinersbur/flang_runtime_FortranSupport

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,698 files not shown
+229,000	-108,850	4,704 files

LLVM/project f2abcde — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 20 by Michael Kruse on ⎇

users/meinersbur/flang_runtime_remove-FLANG_INCLUDE_RUNTIME

Merge branch 'main' into users/meinersbur/flang_runtime_FortranDecimal

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+233	-6,579	llvm/test/DebugInfo/NVPTX/debug-info.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+19,871	-21,121	4,699 files not shown
+229,007	-108,850	4,705 files

LLVM/project df1b617 — clang/include/clang/Basic BuiltinsX86.td, llvm/test/CodeGen/AMDGPU dagcombine-fmul-sel.ll

Jan 20 by ZhaoQi via GitHub on ⎇

users/zhaoqi5/pre-commit-tlsle-mergebaseoffset-tests

Merge branch 'main' into users/zhaoqi5/pre-commit-tlsle-mergebaseoffset-tests

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+5,378	-4	clang/include/clang/Basic/BuiltinsX86.td
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+3,130	-1,856	llvm/test/CodeGen/AMDGPU/dagcombine-fmul-sel.ll
+25,717	-13,992	5,312 files not shown
+294,216	-135,084	5,318 files

LLVM/project 81234f6 — clang-tools-extra/clangd/unittests HeuristicResolverTests.cpp, lldb/unittests/SymbolFile/DWARF DWARFDIETest.cpp

Jan 18 by Vitaly Buka on ⎇

users/vitalybuka/spr/yaml-dont-validate-fillsize-after-error

rebase

Created using spr 1.3.4

Delta		File
+1,610	-1,545	llvm/test/DebugInfo/NVPTX/debug-info.ll
+876	-875	llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
+682	-644	llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
+640	-0	lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+0	-542	clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
+4,439	-3,606	663 files not shown
+19,930	-9,451	669 files

LLVM/project 239bae2 — clang-tools-extra/clangd/unittests HeuristicResolverTests.cpp, lldb/unittests/SymbolFile/DWARF DWARFDIETest.cpp

Jan 18 by Vitaly Buka on ⎇

users/vitalybuka/spr/main.yaml-dont-validate-fillsize-after-error

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+1,610	-1,545	llvm/test/DebugInfo/NVPTX/debug-info.ll
+876	-875	llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
+682	-644	llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
+640	-0	lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+0	-542	clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
+4,439	-3,606	663 files not shown
+19,930	-9,451	669 files

LLVM/project 11cc681 — clang-tools-extra/clangd/unittests HeuristicResolverTests.cpp, lldb/unittests/SymbolFile/DWARF DWARFDIETest.cpp

Jan 18 by Vitaly Buka on ⎇

users/vitalybuka/spr/yaml2obj-dont-use-uninitialized-type

update

Created using spr 1.3.4

Delta		File
+1,610	-1,545	llvm/test/DebugInfo/NVPTX/debug-info.ll
+876	-875	llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
+682	-644	llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
+640	-0	lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+0	-542	clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
+4,439	-3,606	664 files not shown
+19,948	-9,451	670 files

LLVM/project 9dcd3ed — clang-tools-extra/clangd/unittests HeuristicResolverTests.cpp, lldb/unittests/SymbolFile/DWARF DWARFDIETest.cpp

Jan 18 by Vitaly Buka on ⎇

users/vitalybuka/spr/main.yaml2obj-dont-use-uninitialized-type-1

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]

Delta		File
+1,610	-1,545	llvm/test/DebugInfo/NVPTX/debug-info.ll
+876	-875	llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
+682	-644	llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
+640	-0	lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+0	-542	clang-tools-extra/clangd/unittests/HeuristicResolverTests.cpp
+4,439	-3,606	664 files not shown
+19,934	-9,448	670 files

LLVM/project eab9b11 — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 17 by Alexey Bataev on ⎇

users/alexey-bataev/spr/lvfix-max-safe-elements-calculations

Rebase, address comments

Created using spr 1.3.5

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+2,263	-2,208	llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
+21,901	-16,750	3,291 files not shown
+182,635	-84,891	3,297 files

LLVM/project f1a1be0 — llvm/test/CodeGen/RISCV/rvv vfma-vp.ll, llvm/test/CodeGen/X86 vector-interleaved-load-i8-stride-8.ll

Jan 17 by Alexey Bataev on ⎇

users/alexey-bataev/spr/slpimproved-reduction-costcodegen

Rebase

Created using spr 1.3.5

Delta		File
+4,839	-5,345	llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll
+3,056	-4,201	llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
+6,647	-0	llvm/test/MC/AMDGPU/gfx12_asm_vop3c_dpp16-fake16.s
+2,667	-2,586	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
+2,429	-2,410	llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vopc.txt
+2,263	-2,208	llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
+21,901	-16,750	4,167 files not shown
+210,098	-98,516	4,173 files

LLVM/project 9c7987f — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/GlobalOpt resolve-fmv-ifunc.ll

Jan 17 by Stanislav Mekhanoshin via GitHub on ⎇

users/rampitec/01-16-_amdgpu_add_test_for_valu_hoisiting_from_wwm_region._nfc

Merge branch 'main' into users/rampitec/01-16-_amdgpu_add_test_for_valu_hoisiting_from_wwm_region._nfc

Delta		File
+682	-644	llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+365	-0	llvm/test/Transforms/GlobalOpt/resolve-fmv-ifunc.ll
+259	-1	llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
+252	-0	llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
+175	-0	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+2,364	-645	49 files not shown
+4,240	-857	55 files

LLVM/project 3b3590a — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/InstCombine fsqrtdiv-transform.ll

Jan 17 by Sushant Gokhale via GitHub on ⎇

main

Revert "Revert "[InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL"" (#123313)

Reverts llvm/llvm-project#123289

Delta		File
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+176	-0	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+807	-0	2 files

LLVM/project ba06cf8 — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/InstCombine fsqrtdiv-transform.ll

Jan 17 by Sushant Gokhale via GitHub on ⎇

revert-123289-revert-87474-GRCO-14

Revert "Revert "[InstCombine] Transform high latency, dependent FSQRT/FDIV in…"

This reverts commit 606d0a7cdc0c551df754eb4494a2c16861b6a9b9.

Delta		File
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+176	-0	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+807	-0	2 files

LLVM/project 606d0a7 — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/InstCombine fsqrtdiv-transform.ll

Jan 17 by Sushant Gokhale via GitHub on ⎇

main

Revert "[InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL" (#123289)

Reverts llvm/llvm-project#87474

Delta		File
+0	-631	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+0	-176	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+0	-807	2 files

LLVM/project b2a7179 — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/InstCombine fsqrtdiv-transform.ll

Jan 17 by Sushant Gokhale via GitHub on ⎇

revert-87474-GRCO-14

Revert "[InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL …"

This reverts commit 7253c6fde498c4c9470b681df47d46e6930d6a02.

Delta		File
+0	-631	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+0	-176	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+0	-807	2 files

LLVM/project 7253c6f — llvm/lib/Transforms/InstCombine InstCombineMulDivRem.cpp, llvm/test/Transforms/InstCombine fsqrtdiv-transform.ll

Jan 17 by Sushant Gokhale via GitHub on ⎇

main

[InstCombine] Transform high latency, dependent FSQRT/FDIV into FMUL (#87474)

The proposed patch, in general, tries to transform the below code
sequence:
x = 1.0 / sqrt (a);
r1 = x * x;  // same as 1.0 / a
r2 = a / sqrt(a); // same as sqrt (a)

TO

(If x, r1 and r2 are all used further in the code) 
r1 = 1.0 / a
r2 = sqrt (a)
x = r1 * r2

The transform tries to make high latency sqrt and div operations
independent and also saves on one multiplication.

The patch was tested with SPEC17 suite with cpu=neoverse-v2. The

    [6 lines not shown]

Delta		File
+631	-0	llvm/test/Transforms/InstCombine/fsqrtdiv-transform.ll
+176	-0	llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+807	-0	2 files