hwpmc/amd: replace static pmcdesc[] and pc_amdpmcs[] with dynamic allocation
AMD_NPMCS_MAX = 342 (16 core + 6 L3 + 64 DF + 256 UMC). On a Zen 4
EPYC 9654 with 6 core, 6 L3, 16 DF, and 4 UMC counters, only 32
descriptors are needed; the static arrays over-allocate by ~10x.
Replace both amd_pmcdesc[AMD_NPMCS_MAX] and per-CPU pc_amdpmcs[AMD_NPMCS_MAX]
with mallocarray() sized to the actual registered PMC count:
- amd_pmcdesc: allocated in pmc_amd_initialize()
- pc_amdpmcs: allocated per-CPU in amd_pcpu_init(), freed in fini()
Normalize amd_l3_npmcs and amd_df_npmcs against the AMDID2_PTSCEL2I
and AMDID2_PNXC feature bits before computing npmcs_total, so that
allocation, registration, and amd_get_msr() row offsets are all derived
from the same values. Previously the ternary in npmcs_total excluded
L3/DF from the allocation while the globals retained their defaults,
causing amd_get_msr() to miscompute DF row offsets when L3 is absent.
amd_umc_npmcs comes from CPUID Fn8000_0022h EBX[23:16] (NumUMCCounters)
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riscv: enable gpiopower driver
It is functional, and there are some RISC-V platforms which can benefit
from it.
Requested by: Brian Scott <bscott at bunyatech.com.au>
Sponsored by: The FreeBSD Foundation
eqos: Reduce RX error noisiness
Reduce very common console messages:
Receive error rdes3=30208000
As observed on the VisionFive v2 hardware after some large transfers.
Differentiate between overflow errors and others. Report the errors when
the length is non-zero (overflow errors).
Also, count errors for netstat purposes.
Reviewed by: mhorne
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D59479
Add entries for third-party projects I maintain
Add myself formally as the "maintainer" for atf, kyua, and lutok, both
in the GitHub CODEOWNERS and MAINTAINERS files.
This change matches the herald rules I recently setup for these
third-party components.
amd64/*sigtramp.S: re-enable some cfi annotations for special registers
Also explicitly specify .cfi_sections to emit the cfi bytecode into the
loadable .eh_frame section.
Reviewed by: mchoo
Sponsored by: The FreeBSD Foundation
MFC after: 1 week
Differential revision: https://reviews.freebsd.org/D59838
bhyve: fix boot device ordering
EDK2's QemuBootOrderLib inspects the bootorder file provided
via fw_cfg and requires it to be NUL-terminated. Otherwise,
it rejects the supplied bootorder and falls back to its
default boot order.
Currently, bhyve registers bootorder with qemu_fwcfg_add_file()
using bootorder_len returned by open_memstream(), which excludes
the trailing NUL byte.
Fix that by passing bootorder_len + 1 to qemu_fwcfg_add_file() so
the fw_cfg payload is properly NUL-terminated.
PR: 279720
Reviewed by: markj
Found with: codex (gpt-5.6-sol)
MFC after: 1 week
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59859
uhso.4: describe better, SYNOPSIS, HARDWARE, SPDX
+ Update SYNOPSIS to the new standard format
+ Give this a clearer description in apropos
+ Give this a clearer description in hardware note
+ Spinoff SYSCTL VARIABLES from HARDWARE
+ Pet linter for long lines and trailing punctuation
+ Tag SPDX
MFC after: 3 days
vmm: Fix a page wiring leak in MOVS emulation
When emulating a MOVS from MMIO to guest RAM, the kernel's
vm_copy_setup() wires the destination pages. If the subsequent
MMIO read fails, emulate_movs() skips vm_copy_teardown(), leaking
the page wire references acquired during setup.
Run vm_copy_teardown() regardless of the MMIO read result, and
only copy the value to guest memory if the read succeeds.
Preserve the existing error return.
This matches illumos change 13309.
Reviewed by: markj
Obtained from: illumos 83cd75bb2949d26e6eb38ddefc60fdeed1909643
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59823
vmm: Re-arm the PIT callout for square wave mode
The 8254's square wave mode (mode 3) is periodic, with the same
interrupt rate as the rate generator mode (mode 2), but
vatpit_callout_handler() only re-arms the channel 0 callout for
TIMER_RATEGEN. A guest that programs mode 3 therefore receives a
single IRQ0 and no further timer interrupts.
Re-arm the callout for TIMER_SQWAVE as well, matching illumos
change 13301.
Reviewed by: markj
Obtained from: illumos 93d78aba5b32996fc2ae893a6237a0d3972f86b2
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59816
vmm: Synchronize long-mode state when emulating CR0 writes
vmx_emulate_cr0_access() sets EFER.LMA and the IA-32e guest VM-entry
control when enabling paging with EFER.LME set, but does not clear them
when disabling paging. This can leave an inconsistent guest state that
fails VM entry.
Update both fields in either direction based on EFER.LME and the CR0
value written to the VMCS. Use the mask-adjusted CR0 value so the
resulting state remains consistent with the VMX fixed-bit requirements.
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59756
vmm: Normalize a zero PIT count before starting channel 0
pit_timer_start_cntr0() does not schedule a callout when the initial
count is zero. The counter write handler normalizes a programmed zero
count only after calling it, leaving an initially unarmed channel 0
without a scheduled timer event.
Move the existing normalization before the timer-start call. Retain the
historical 0xffff representation of a zero count.
Reviewed by: markj
MFC after: 2 weeks
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D59749
