FreeNAS/freenas fb061d9src/middlewared/middlewared/plugins sysdataset.py

Fix
DeltaFile
+1-1src/middlewared/middlewared/plugins/sysdataset.py
+1-11 files

LLVM/project 719006aclang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaHLSL.cpp

[HLSL][Sema] Validate that occupied register numbers never exceed UINT32_MAX (#174028)

This PR adds validation for register numbers.
Register numbers ought never to exceed UINT32_MAX, or 4294967295
Additionally, resource arrays will have each resource element bound
sequentially, and those resource's register numbers should not exceed
UINT32_MAX, or 4294967295. Even though not explicitly given a register
number, their effective register number is also validated.
This accounts for nested resource declarations and resource arrays too.

Fixes https://github.com/llvm/llvm-project/issues/136809
DeltaFile
+132-2clang/lib/Sema/SemaHLSL.cpp
+90-0clang/test/SemaHLSL/resource_binding_attr_error_uint32_max.hlsl
+15-0clang/test/SemaHLSL/resource_binding_attr_error.hlsl
+1-0clang/include/clang/Basic/DiagnosticSemaKinds.td
+238-24 files

LLVM/project eef8e79mlir/include/mlir/Dialect/Tosa/IR TosaShapeOps.td, mlir/lib/Dialect/Tosa/Transforms TosaValidation.cpp TosaProfileCompliance.cpp

[mlir][tosa] Add log2_ceil/log2_floor/exp2_shape ops (#175057)

This commit introduces new ext-shape operations,
- LOG2_CEIL_SHAPE
- LOG2_FLOOR_SHAPE
- EXP2_SHAPE

These additions include the operator definitions, same-rank
verification, and level checks during validation.

---------

Co-authored-by: Luke Hutton <luke.hutton at arm.com>
DeltaFile
+51-0mlir/include/mlir/Dialect/Tosa/IR/TosaShapeOps.td
+27-1mlir/test/Dialect/Tosa/level_check.mlir
+24-0mlir/test/Dialect/Tosa/ops.mlir
+16-0mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
+3-0mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
+3-0mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
+124-16 files

FreeNAS/freenas 4948e6esrc/middlewared/middlewared/plugins sysdataset.py

Fix
DeltaFile
+2-2src/middlewared/middlewared/plugins/sysdataset.py
+2-21 files

LLVM/project 102d672mlir/include/mlir/Conversion Passes.td, mlir/include/mlir/Conversion/ArithAndMathToAPFloat ArithToAPFloat.h

add source type pre-condition
DeltaFile
+54-30mlir/lib/Conversion/ArithAndMathToAPFloat/ArithToAPFloat.cpp
+30-16mlir/lib/Conversion/ArithAndMathToAPFloat/MathToAPFloat.cpp
+26-4mlir/lib/Conversion/ArithAndMathToAPFloat/Utils.cpp
+8-0mlir/include/mlir/Conversion/Passes.td
+6-1mlir/lib/Conversion/ArithAndMathToAPFloat/Utils.h
+1-0mlir/include/mlir/Conversion/ArithAndMathToAPFloat/ArithToAPFloat.h
+125-511 files not shown
+126-517 files

FreeBSD/ports 48eca17devel/mimalloc distinfo Makefile

devel/mimalloc: Update to 3.1.6
DeltaFile
+3-3devel/mimalloc/distinfo
+1-1devel/mimalloc/Makefile
+4-42 files

FreeBSD/src 247d24asys/dev/ata ata-pci.h

ata-serverworks: Fix incorrect port count for BCM5770 SATA controller

The 1166:0241 PCI device has 8 ports instead of 4.

Signed-off-by: Dmitry Borisov <di.sean at protonmail.com>
Reviewed by: imp, jlduran
Pull Request: https://github.com/freebsd/freebsd-src/pull/1883
DeltaFile
+2-2sys/dev/ata/ata-pci.h
+2-21 files

LLVM/project 014cdcdclang/include/clang/Basic DebugOptions.def

Add a TODO with a cleanup issue
DeltaFile
+1-0clang/include/clang/Basic/DebugOptions.def
+1-01 files

LLVM/project 47675d7clang/lib/CodeGen CGDebugInfo.cpp

clang format
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+2-2clang/lib/CodeGen/CGDebugInfo.cpp
+2-21 files

LLVM/project 0ff39cbclang/include/clang/Basic DebugOptions.def, clang/include/clang/Options Options.td

Address comments
DeltaFile
+14-22clang/lib/CodeGen/CGDebugInfo.cpp
+4-0clang/include/clang/Options/Options.td
+3-0clang/include/clang/Basic/DebugOptions.def
+1-1clang/test/DebugInfo/Generic/macro-info.c
+22-234 files

LLVM/project 94fbde7clang/lib/CodeGen CGDebugInfo.cpp

Add a flag to preserve the old macro behaviour.

This allows us to more accurately quantify the impact of this change in
isolation for sample based profiling which relies on debug information.
DeltaFile
+24-9clang/lib/CodeGen/CGDebugInfo.cpp
+24-91 files

LLVM/project 74bd4a2clang/lib/CodeGen CGDebugInfo.cpp, clang/test/DebugInfo/Generic macro-info.c

[Clang][DebugInfo] Add a flag to use expansion loc for macro params.

This patch adds a flag to allow users to preserve the old behaviour - use the macro expansion location for parameters. This is useful for wider testing of sample profile driven PGO which relies on debug information based mapping.
DeltaFile
+19-16clang/lib/CodeGen/CGDebugInfo.cpp
+12-6clang/test/DebugInfo/Generic/macro-info.c
+31-222 files

FreeNAS/freenas d9dd449src/middlewared/middlewared/plugins sysdataset.py

Fix
DeltaFile
+3-0src/middlewared/middlewared/plugins/sysdataset.py
+3-01 files

LLVM/project 55b6e09llvm/test/tools/llvm-mca/RISCV/SiFiveP400 vlseg-vsseg.s, llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv arithmetic.test

function name update

Created using spr 1.3.7
DeltaFile
+0-6,820llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s
+0-5,599llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-fp.s
+0-4,727llvm/test/tools/llvm-mca/RISCV/SiFiveP400/vlseg-vsseg.s
+0-4,725llvm/test/tools/llvm-mca/RISCV/SpacemitX60/vlseg-vsseg.s
+4,533-0llvm/test/tools/llvm-mca/RISCV/SiFiveP400/rvv/arithmetic.test
+4,522-0llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv/arithmetic.test
+9,055-21,8711,498 files not shown
+131,391-76,6161,504 files

FreeBSD/src d5e5fedsys/compat/linux linux_ioctl.c linux_ioctl.h

linux: add hidraw ioctl handler

First step towards getting the Linux version of SDL with HIDAPI gamepad
drivers to work. Not quite complte as SDL expects to find some
information in sysfs as well.

Signed-off-by: Alex S <iwtcex at gmail.com>
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1938
DeltaFile
+51-0sys/compat/linux/linux_ioctl.c
+19-0sys/compat/linux/linux_ioctl.h
+70-02 files

LLVM/project 25976e8llvm/test/ExecutionEngine/JITLink/AArch64 backtrace-symbolication.s, llvm/test/ExecutionEngine/JITLink/Generic backtrace-symbolication.ll

Revert "[llvm-jitlink] Replace IR backtrace symbolication testcase with asm." (#175242)

Reverts llvm/llvm-project#175117
DeltaFile
+0-42llvm/test/ExecutionEngine/JITLink/AArch64/backtrace-symbolication.s
+30-0llvm/test/ExecutionEngine/JITLink/Generic/backtrace-symbolication.ll
+30-422 files

FreeNAS/freenas 2ae61f8src/middlewared/middlewared/plugins/system_dataset mount.py

Fix
DeltaFile
+1-1src/middlewared/middlewared/plugins/system_dataset/mount.py
+1-11 files

LLVM/project 51e0248llvm/lib/Target/RISCV/Disassembler RISCVDisassembler.cpp

[RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (#175122)

The encoding scheme for 48-bit and larger instructions has not
been ratified yet. The RISC-V ISA manual previously included a
proposal that included 4 reserved major opcodes. LLVM's
disassembler implements this proposal as does binutils.

A vendor extension might have used the reserved opcodes,
as a non-conforming 32-bit extension. Try to decode as a
32-bit instruction first to catch these cases.

Should help with #174571.
DeltaFile
+12-6llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+12-61 files

FreeBSD/src 7b3fb3cstand/man loader.efi.8

loader.efi(8): clarify UEFI boot path and boot1.efi usage

Reorganise and clarify the legacy role of boot1.efi in DESCRIPTION to
improve clarity.

Add a minor missing word in the BUGS section ["...caution is required*..."].

See also - PR: 290794

Signed-off-by: Aaditya Singh <aadityavksingh at gmail.com>
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1939
DeltaFile
+22-23stand/man/loader.efi.8
+22-231 files

FreeNAS/freenas b424b98src/middlewared/middlewared/plugins/system_dataset mount.py

Fix
DeltaFile
+39-27src/middlewared/middlewared/plugins/system_dataset/mount.py
+39-271 files

FreeBSD/src 54ce6b2lib/libutil login.conf.5, usr.bin/login login.conf

login.conf.5: Remove mention of login copyright setting

PR: 291649
Fixes: 905571c03119 ("Remove copyright strings printed at login time via login(1) or sshd(8).")
Signed-off-by: Simon Wollwage rootnode+freebsd at wollwage.com
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1926
DeltaFile
+1-2lib/libutil/login.conf.5
+0-2usr.bin/login/login.conf
+0-2usr.sbin/etcupdate/tests/conflicts_test.sh
+0-1usr.sbin/etcupdate/tests/tests_test.sh
+1-74 files

LLVM/project 4a8a059offload/test/offloading/fortran dump_map_tables.f90

[Offload] Fix failing Fortran test w/ line number (#175247)

This test also depends on the line number. Following similar approach as
other with [[@LINE]] macro.
DeltaFile
+1-1offload/test/offloading/fortran/dump_map_tables.f90
+1-11 files

FreeBSD/src 4b2a8aalib/libc/stdlib getopt.3

getopt(3): be more explicit about :: extension

Make it possible to search for literal two colons (::) and actually
find something.  Make the "x"/"x:"/"x::" examples more explicit and
more visibile.

Signed-off-by: Simon Wollwage <rootnode+freebsd at wollwage.com>
Obtained from:  NetBSD, nbuwe <uwe at stderr.spb.ru>, 856d5b6
PR: 291374
Reviewed by: imp, jlduran
Pull Request: https://github.com/freebsd/freebsd-src/pull/1923
DeltaFile
+34-15lib/libc/stdlib/getopt.3
+34-151 files

LLVM/project 1117d2alldb/test/API/python_api/sbtarget_extensions TestSBTargetExtensions.py main.c

[LLDB] Swig python extensions tests for SBTargetExtention (#173473)

Implements part of #168920
DeltaFile
+138-0lldb/test/API/python_api/sbtarget_extensions/TestSBTargetExtensions.py
+7-0lldb/test/API/python_api/sbtarget_extensions/main.c
+3-0lldb/test/API/python_api/sbtarget_extensions/Makefile
+148-03 files

Dreckly/dreckly a13d358devel/at-spi2-core Makefile

at-spi2-core: Ensure putenv is visible
DeltaFile
+2-0devel/at-spi2-core/Makefile
+2-01 files

FreeBSD/src 85bf328sys/compat/linux linux_ioctl.c linux_ioctl.h

linux: support termios2 ioctls

Signed-off-by: mothcompute <mothcompute at protonmail.com>
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1949
DeltaFile
+68-1sys/compat/linux/linux_ioctl.c
+10-0sys/compat/linux/linux_ioctl.h
+78-12 files

Dreckly/dreckly c4a04abdevel/at-spi2-core distinfo, devel/at-spi2-core/patches patch-tests_at-spi2-atk_atk__test__util.c

at-spi2-core: Fix implicit declaration of putenv.
DeltaFile
+14-0devel/at-spi2-core/patches/patch-tests_at-spi2-atk_atk__test__util.c
+1-0devel/at-spi2-core/distinfo
+15-02 files

FreeBSD/src e881b8esys/dev/acpi_support acpi_ibm.c

acpi_ibm: register all appropriate sysctls as uint

All sysctls except thermal sensor readings and the handlerevents
whitelist-separated string are bitmasks or small integers. This avoids some
bitmasks being erroneously displayed as negative values.

Signed-off-by: Quentin Thébault <quentin.thebault at defenso.fr>
Reviewed by: imp
Pull Request: https://github.com/freebsd/freebsd-src/pull/1824
DeltaFile
+2-2sys/dev/acpi_support/acpi_ibm.c
+2-21 files

LLVM/project 42368f9lldb/source/ValueObject ValueObject.cpp, lldb/test/API/python_api/value/get_expr_path TestValueAPIGetExpressionPath.py main.c

[lldb] fix a problem in the ValueObject::GetExpressionPath method (#171521)

Consider the following program:
```
int main() {
  int foo[2][3][4];
  int (*bar)[3][4] = foo;
  return 0;
}
```
If we:
- compile this program
- launch an LLDB debugging session
- launch the process and let it stop at the `return 0;` statement
then the following LLDB command:
```
(lldb) script lldb.frame.FindVariable("bar").GetChildAtIndex(0).get_expr_path()
```
will produce the following output:

    [15 lines not shown]
DeltaFile
+51-0lldb/test/API/python_api/value/get_expr_path/TestValueAPIGetExpressionPath.py
+15-1lldb/source/ValueObject/ValueObject.cpp
+5-0lldb/test/API/python_api/value/get_expr_path/main.c
+3-0lldb/test/API/python_api/value/get_expr_path/Makefile
+74-14 files

LLVM/project d6d8622.github new-prs-labeler.yml

[flang][flang-rt] Add flang-rt autolabel check (#175240)

Add flang-rt to the autolabel github yaml.
DeltaFile
+5-0.github/new-prs-labeler.yml
+5-01 files