LLVM/project 74f023dllvm/test/tools/llvm-cov branch-templates.test, llvm/tools/llvm-cov CoverageReport.cpp CodeCoverage.cpp

[llvm-cov] Add show-function-summary option in coverage report (#172980)

Adds a command line argument to llvm-cov to optionally disable the
function summary in the coverage report (but maintaining existing
behavior by keeping it enabled by default).
DeltaFile
+19-15llvm/tools/llvm-cov/CoverageReport.cpp
+7-0llvm/test/tools/llvm-cov/branch-templates.test
+5-0llvm/tools/llvm-cov/CodeCoverage.cpp
+1-0llvm/tools/llvm-cov/CoverageViewOptions.h
+32-154 files

FreeNAS/freenas 7e6e805src/freenas/usr/local/libexec ctdb_ha_reclock.py, src/middlewared/middlewared/etc_files/ctdb ctdb.conf.mako nodes.mako

Add clustered SMB state

This commit adds working configuration for stateful SMB HA failover:

* reclock helper script - determines which node holds the cluster
  mutex lock based on presence of data pool system dataset.

* ctdb-related etc files. We can hard-code the nodes config based
  on our known HA nodes (this significantly eases past problems with
  gluster that we saw with dynamic nodes and ctdb stability).

* smbd will remain stopped on standby controller until it becomes
  standby.

* keepalived will continue to manage virtual IPs
DeltaFile
+107-0src/freenas/usr/local/libexec/ctdb_ha_reclock.py
+22-0src/middlewared/middlewared/etc_files/ctdb/ctdb.conf.mako
+11-0src/middlewared/middlewared/plugins/etc.py
+11-0src/middlewared/middlewared/etc_files/ctdb/nodes.mako
+11-0src/middlewared/middlewared/utils/ctdb.py
+8-0src/middlewared/middlewared/plugins/service_/services/ctdb.py
+170-06 files not shown
+192-812 files

FreeNAS/freenas e2fd7d6src/freenas/usr/lib/netdata/python.d truenas_disk_temp.chart.py truenas_pool.chart.py, src/freenas/usr/lib/netdata/python.d/python_modules/bases/FrameworkServices TNSimpleService.py

NAS-139251 / 25.10.2 / Fix netdata plugin startup delay for disk temp and pool stats (by Qubad786) (#17994)

## Problem

Currently when netdata is restarted, for each plugin it gives data after
`2 * update every frequency` seconds. So for example, if a plugin data
is to be collected every 5 min, we get datapoints after 10 minutes which
is an unnecessary delay added by how netdata implements `SimpleService`.

## Solution

We have overridden default `SimpleService` to not sleep as soon as it
runs but rather collect data after initialization and then sleep. This
means that we now get data after every `update every frequency` which if
it is 5 min, we will get data after 5 min instead of 10.

The 5 min delay which we still see is because of how netdata dbengine
stores/aligns data and there is no good way around that as that logic
lives in core netdata.

    [5 lines not shown]
DeltaFile
+65-0src/freenas/usr/lib/netdata/python.d/python_modules/bases/FrameworkServices/TNSimpleService.py
+3-3src/freenas/usr/lib/netdata/python.d/truenas_disk_temp.chart.py
+3-3src/freenas/usr/lib/netdata/python.d/truenas_pool.chart.py
+71-63 files

FreeNAS/freenas 7ba2604tests/api2 test_system_lifetime.py

NAS-139298 / 25.10.2 / Add 'limit' option to 'audit.query' call. (by mgrimesix) (#18019)

`audit.query` calls must include either a `count` or `limit` option,
else the test will fail.
Added the missing `limit` option for the `test_system_reboot` test in
`test_system_lifetime.py`

Original PR: https://github.com/truenas/middleware/pull/18018

Co-authored-by: Mark Grimes <mark.grimes at ixsystems.com>
DeltaFile
+1-0tests/api2/test_system_lifetime.py
+1-01 files

LLVM/project bbe906ellvm/lib/Target/AMDGPU SIISelLowering.cpp

AMDGPU: Handle FP in integer in argument lowering

This avoids an assertion when softPromoteHalfType is
enabled.
DeltaFile
+10-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+10-31 files

LLVM/project fe0a9a6llvm/lib/Target/AMDGPU SIInstructions.td

AMDGPU: Enable selection of strict_fp16_to_fp

This avoids regressions when softPromoteHalfType is switched on.
DeltaFile
+4-4llvm/lib/Target/AMDGPU/SIInstructions.td
+4-41 files

LLVM/project e9750f9llvm/lib/Target/AMDGPU SIInstrInfo.cpp VOP1Instructions.td, llvm/test/CodeGen/AMDGPU imm16.ll fma.f16.ll

[AMDGPU] Allow 16-bit imm folding in real true16
DeltaFile
+127-268llvm/test/CodeGen/AMDGPU/imm16.ll
+15-1llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+6-6llvm/test/CodeGen/AMDGPU/fma.f16.ll
+4-4llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
+2-2llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
+1-1llvm/lib/Target/AMDGPU/VOP1Instructions.td
+155-2826 files

LLVM/project 4958c4cllvm/lib/Target/X86 X86SpeculativeLoadHardening.cpp

[NewPM] Extract logic for X86 SLH into a separate class (#175718)

This will enable easier migration to NewPM
DeltaFile
+40-27llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
+40-271 files

NetBSD/pkgsrc-wip bbc575brust192 Makefile distinfo, rust192/patches patch-vendor_libc-0.2.168_src_unix_bsd_netbsdlike_netbsd_mod.rs patch-libc-0.2.168_src_unix_bsd_netbsdlike_netbsd_mod.rs

rust192: fix some pkglint
DeltaFile
+15-0rust192/patches/patch-vendor_libc-0.2.168_src_unix_bsd_netbsdlike_netbsd_mod.rs
+0-15rust192/patches/patch-libc-0.2.168_src_unix_bsd_netbsdlike_netbsd_mod.rs
+2-2rust192/Makefile
+1-1rust192/distinfo
+18-184 files

LLVM/project bd2cfc5llvm/include/llvm/IR PatternMatch.h, llvm/lib/Transforms/Vectorize VPlanPatternMatch.h

[PatternMatch] Implement match_fn using bind_back (NFC) (#175811)

Use llvm::bind_back landed in d2a521750 ([ADT] Introduce
bind_{front,back}, [not_]equal_to, #175056) to simplify implementations
of match_fn in PatternMatch and VPlanPatternMatch.
DeltaFile
+11-13llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+2-8llvm/include/llvm/IR/PatternMatch.h
+13-212 files

LLVM/project d73cd71llvm/lib/Target/RISCV RISCVInstrInfoXAIF.td RISCVInstrFormatsXAIF.td, llvm/test/MC/RISCV xaifet-amo-valid.s xaifet-simd-valid.s

[RISCV] AI Foundry ET extensions for RISC-V (#174571)

This patch is part of an ongoing effort for upstreaming the AI Foundry
ET
extensions for RISC-V, formerly known as the ET-SoC-1 Minion extensions
by
Esperanto Technologies.

Changes
=======

The changes in this patch are:

- Defining the XAIFET feature as an "umbrella" extension under which
  all the vendor extensions from ET-SoC-1 are included.

- Defining Esperanto Technologies's ET-SoC-1 Minion processor (et-soc1).

- Defining Ainekko's Erbium Minion processor (an-erbium), using the same

    [67 lines not shown]
DeltaFile
+939-0llvm/test/MC/RISCV/xaifet-amo-valid.s
+787-0llvm/lib/Target/RISCV/RISCVInstrInfoXAIF.td
+673-0llvm/test/MC/RISCV/xaifet-simd-valid.s
+265-0llvm/lib/Target/RISCV/RISCVInstrFormatsXAIF.td
+58-0llvm/lib/Target/RISCV/RISCVSystemOperands.td
+39-0llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+2,761-012 files not shown
+2,835-218 files

NetBSD/pkgsrc JCmOW8ldoc TODO CHANGES-2026

   doc: Updated lang/rust to 1.91.1
VersionDeltaFile
1.26666+4-2doc/TODO
1.312+2-1doc/CHANGES-2026
+6-32 files

NetBSD/pkgsrc 2PnY2lVlang/rust distinfo Makefile, lang/rust/patches patch-vendor_libc-0.2.175_src_unix_bsd_netbsdlike_netbsd_riscv64.rs patch-src_bootstrap_bootstrap.py

   rust: update to 1.91

   Based on wip/rust191 by he@, jperkin@, and adam@

   Changes:

   Add lint against dangling raw pointers from local variables

   Stabilized APIs

       Path::file_prefix
       AtomicPtr::fetch_ptr_add
       AtomicPtr::fetch_ptr_sub
       AtomicPtr::fetch_byte_add
       AtomicPtr::fetch_byte_sub
       AtomicPtr::fetch_or
       AtomicPtr::fetch_and
       AtomicPtr::fetch_xor
       {integer}::strict_add

    [61 lines not shown]
VersionDeltaFile
1.194+113-110lang/rust/distinfo
1.1+86-0lang/rust/patches/patch-vendor_libc-0.2.175_src_unix_bsd_netbsdlike_netbsd_riscv64.rs
1.352+38-22lang/rust/Makefile
1.28+5-24lang/rust/patches/patch-src_bootstrap_bootstrap.py
1.9+5-20lang/rust/patches/patch-src_bootstrap_src_lib.rs
1.1+22-0lang/rust/patches/patch-vendor_openssl-src-300.5.2+3.5.2_src_lib.rs
+269-17610 files not shown
+353-20216 files

FreeBSD/ports 86f9612math/libhomfly distinfo Makefile

math/libhomfly: upgrade to 1.03

This adds pkg-config support.
DeltaFile
+3-3math/libhomfly/distinfo
+3-2math/libhomfly/Makefile
+6-52 files

LLVM/project 51ec8b1llvm/include/llvm/ADT FloatingPointMode.h, llvm/lib/Support FloatingPointMode.cpp

ADT: Add utility functions for comparing FPClassTest (#175380)

Add utility functions for checking if less and greater queries
are known to not evaluate to true. This will permit more precise
folding of min/max intrinsics. The test is kind of a mess.
DeltaFile
+560-0llvm/unittests/ADT/FloatingPointMode.cpp
+51-0llvm/lib/Support/FloatingPointMode.cpp
+34-0llvm/include/llvm/ADT/FloatingPointMode.h
+645-03 files

FreeBSD/ports 7fd1fc7net-mgmt/telegraf distinfo Makefile

net-mgmt/telegraf: Update to 1.37.1

Release notes:  https://github.com/influxdata/telegraf/releases/tag/v1.37.1
DeltaFile
+5-5net-mgmt/telegraf/distinfo
+1-1net-mgmt/telegraf/Makefile
+6-62 files

LLVM/project bdb50b0llvm/lib/Support ThreadPool.cpp

[llvm] Fix comment references deprecated make_scope_exit (#175820)

After #173131 and #174030, make_scope_exit is no longer used in
ThreadPool. Fix comment that references old APIs and references the new
API instead.
DeltaFile
+1-1llvm/lib/Support/ThreadPool.cpp
+1-11 files

OPNSense/core d4e0109src/etc/inc interfaces.inc, src/www interfaces.php

interface: POC for multi-dhcp6c support

I'm not entirely sure why we settled for a single deamon of
dhcp6c back in the day, but there are certianly downsides to
it and I don't see something that wasn't fixed in the meantime
that makes this not work.

At the moment this splits off dhcp6c only but we need to
change the daemon's print a bit to avoid complaining about
"other" devices since the situation to ignore a non-listening
interface is normal and not "ignoring" something obvious as
the INFO log message suggests.

Remove the $id bootstrapping now that every service has its
own configuration and "0" cannot overlap and add some options
relavant to #7647.  The assoc-id principle and some other options
are now implemented.

rtsold still needs to be split to allow for HUP reload of

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DeltaFile
+53-84src/etc/inc/interfaces.inc
+46-2src/www/interfaces.php
+99-862 files

LLVM/project 4a807e8llvm/test/Transforms/LoopVectorize single_early_exit_live_outs.ll single-early-exit-interleave.ll, llvm/test/Transforms/PhaseOrdering/AArch64 std-find.ll

[VPlan] Optimize BranchOnTwoConds to chain of 2 simple branches. (#174016)

This patch improves the lowering for BranchOnTwoConds added in
https://github.com/llvm/llvm-project/pull/172750 by replacing the branch
on OR with a chain of 2 branches.

On Apple M cores, the new lowering is ~8-10% faster for std::find-like
loops. It also makes it easier to determine the early exits in VPlan. I
am also planning on extensions to support loops with multiple early
exits and early-exits at different positions, which should also be
slightly easier to do with the new representation.


PR: https://github.com/llvm/llvm-project/pull/174016
DeltaFile
+105-131llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
+134-24llvm/test/Transforms/PhaseOrdering/AArch64/std-find.ll
+36-45llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
+31-38llvm/test/Transforms/LoopVectorize/single_early_exit.ll
+28-35llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
+27-31llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
+361-30410 files not shown
+447-39616 files

OpenBSD/ports ybwEwwygraphics/kquickimageeditor Makefile, graphics/kquickimageeditor/pkg PLIST

   Add new dependency on opencv

   Pointed out by sthen@ (thanks!)
VersionDeltaFile
1.9+3-1graphics/kquickimageeditor/Makefile
1.7+0-2graphics/kquickimageeditor/pkg/PLIST
+3-32 files

LLVM/project d27d75ellvm/lib/Transforms/Vectorize VPlanTransforms.cpp LoopVectorize.cpp, llvm/unittests/Transforms/Vectorize VPlanUncountableExitTest.cpp VPlanHCFGTest.cpp

[VPlan] Use createHeaderPHIRecipes in native path (NFCI).

Simplify tryToBuildVPlan by using createHeaderPHIRecipes in the native
path as well.
DeltaFile
+9-23llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-6llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+3-5llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+2-4llvm/unittests/Transforms/Vectorize/VPlanUncountableExitTest.cpp
+1-2llvm/unittests/Transforms/Vectorize/VPlanHCFGTest.cpp
+22-405 files

LLVM/project 06dc02fclang-tools-extra Maintainers.rst

[clang-tools-extra] Update Maintainers for Clang-Doc

Currently, Erick Velez has been doing the bulk of clang-doc development.
The maintainer being removed hasn't participated in almost a year, so it
would be good to have active maintainers listed in the file.
DeltaFile
+2-2clang-tools-extra/Maintainers.rst
+2-21 files

LLVM/project 9f464f1llvm/test/CodeGen/AMDGPU fneg-combines.f16.ll bf16.ll

AMDGPU: Change ABI of 16-bit scalar values for gfx6/gfx7

Keep bf16/f16 values encoded as the low half of a 32-bit register,
instead of promoting to float. This avoids unwanted FP effects
from the fpext/fptrunc which should not be implied by just
passing an argument. This also fixes ABI divergence between
SelectionDAG and GlobalISel.

I've wanted to make this change for ages, and failed the last
few times. The main complication was the hack to return
shader integer types in SGPRs, which now needs to inspect
the underlying IR type.
DeltaFile
+372-419llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
+247-430llvm/test/CodeGen/AMDGPU/bf16.ll
+116-174llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
+139-139llvm/test/CodeGen/AMDGPU/constant-address-space-32bit.ll
+112-153llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll
+140-114llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
+1,126-1,42981 files not shown
+3,579-4,36087 files

LLVM/project 06a1b06llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.960bit.ll

AMDGPU: Change ABI of 16-bit element vectors on gfx6/7

Fix ABI on old subtargets so match new subtargets, packing
16-bit element subvectors into 32-bit registers. Previously
this would be scalarized and promoted to i32/float.

Note this only changes the vector cases. Scalar i16/half are
still promoted to i32/float for now. I've unsuccessfully tried
to make that switch in the past, so leave that for later.

This will help with removal of softPromoteHalfType.
DeltaFile
+47,697-51,378llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+14,474-16,242llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+16,328-12,881llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+13,036-14,705llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+11,668-13,311llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+10,558-11,908llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
+113,761-120,425151 files not shown
+200,132-204,069157 files

Illumos/gate cb541f8usr/src/cmd .gitignore, usr/src/test .gitignore

17819 Update gitignore files for recently added artefacts
Reviewed by: Robert Mustacchi <rm+illumos at fingolfin.org>
Approved by: Dan McDonald <danmcd at edgecast.io>
DeltaFile
+4-0usr/src/cmd/.gitignore
+3-0usr/src/test/.gitignore
+7-02 files

NetBSD/src yW9mwbnexternal/bsd/blocklist/bin blocklistd.conf.5

   the address is optional, the port is mandatory.
VersionDeltaFile
1.8+7-3external/bsd/blocklist/bin/blocklistd.conf.5
+7-31 files

LLVM/project fa1d723llvm/lib/Support ThreadPool.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/Support/ThreadPool.cpp
+1-11 files

LLVM/project a80cec9llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp, llvm/test/Transforms/InstCombine simplify-demanded-fpclass-fma.ll

InstCombine: Implement SimplifyDemandedFPClass for fma

This can't do much filtering on the sources, except for nans.
We can also attempt to introduce ninf/nnan.
DeltaFile
+65-14llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+16-31llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
+81-452 files

LLVM/project 57541fellvm/test/Transforms/InstCombine simplify-demanded-fpclass-fma.ll

InstCombine: Add baseline fma tests for SimplifyDemandedFPClass
DeltaFile
+316-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-fma.ll
+316-01 files

LLVM/project fe52072llvm/lib/Analysis ValueTracking.cpp

Fix regression
DeltaFile
+1-5llvm/lib/Analysis/ValueTracking.cpp
+1-51 files