FreeBSD/ports f2c67cadevel/py-reedsolo Makefile

devel/py-reedsolo: Drop maintainership

PR:     292052
DeltaFile
+1-1devel/py-reedsolo/Makefile
+1-11 files

FreeBSD/ports a5d0ffacomms/py-esptool Makefile

comms/py-esptool: Drop maintainership

It takes days to compile lang/rust on the armv7, aarch64 and riscv64
devices just to test a Python flasher script, I would prefer to spend
the time improving my own limited C implementation.

PR:     292052
DeltaFile
+1-1comms/py-esptool/Makefile
+1-11 files

LLVM/project deaed48llvm/lib/Transforms/InstCombine InstCombineSimplifyDemanded.cpp

InstCombine: Fix another wrong interested mask computeKnownFPClass call

Follow up from c436551d5283a8fc00ae880a5b76660b6f08e37b, this is another
instance of the same problem.
DeltaFile
+1-1llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+1-11 files

NetBSD/pkgsrc yMOQmnndoc pkgsrc.html pkgsrc.txt

   doc/pkgsrc.*: regen
VersionDeltaFile
1.387+2-2doc/pkgsrc.html
1.385+2-2doc/pkgsrc.txt
+4-42 files

NetBSD/pkgsrc BjIoaS7doc/guide/files pkgsrc.xml

   doc: bump copyright year for the guide
VersionDeltaFile
1.46+3-3doc/guide/files/pkgsrc.xml
+3-31 files

NetBSD/pkgsrc zT5ZiA2doc CHANGES-2026

   doc: add new CHANGES file for 2026
VersionDeltaFile
1.1+4-0doc/CHANGES-2026
+4-01 files

NetBSD/pkgsrc WZkK2kUwww Makefile

   www/Makefile: + freenginx
VersionDeltaFile
1.1896+2-1www/Makefile
+2-11 files

LLVM/project e2e2c50llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Disable few non useful passes (#172796)

Matches the legacy pipeline
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-2llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+5-52 files

LLVM/project ebb1c27mlir/lib/Dialect/Linalg/IR LinalgOps.cpp, mlir/python/mlir/dialects/linalg/opdsl/lang emitter.py

[mlir][linalg] Reject unsigned pooling on non-integer element types (#166070)

Fixes: #164800 

Ensures unsigned pooling ops in Linalg stay in the integer domain: the
lowering now rejects floating/bool inputs with a clear diagnostic, new
regression tests lock in both the error path and a valid integer
example, and transform decompositions are updated to reflect the integer
typing.

Signed-off-by: Akimasa Watanuki <mencotton0410 at gmail.com>
DeltaFile
+119-0mlir/test/Dialect/Linalg/invalid.mlir
+72-0mlir/test/Dialect/Linalg/named-ops.mlir
+48-0mlir/test/python/dialects/linalg/opdsl/emit_pooling.py
+14-14mlir/test/Dialect/Linalg/transform-op-decompose.mlir
+12-6mlir/python/mlir/dialects/linalg/opdsl/lang/emitter.py
+14-4mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
+279-242 files not shown
+279-388 files

HardenedBSD/src 9aea622. COPYRIGHT, sys/sys copyright.h

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+1-1sys/sys/copyright.h
+1-1COPYRIGHT
+2-22 files

OpenBSD/src Ip0l1nrsys/kern init_main.c

   copyright++;
VersionDeltaFile
1.331+2-2sys/kern/init_main.c
+2-21 files

FreeBSD/ports 9341890devel/py-ty distinfo Makefile, devel/py-ty/files patch-ruff_crates_ty_Cargo.toml patch-ruff_crates_ty_src_main.rs

devel/py-ty: Update to 0.0.8

Changelog: https://github.com/astral-sh/ty/blob/0.0.8/CHANGELOG.md

Reported by:    Repology
DeltaFile
+11-0devel/py-ty/files/patch-ruff_crates_ty_Cargo.toml
+10-0devel/py-ty/files/patch-ruff_crates_ty_src_main.rs
+3-3devel/py-ty/distinfo
+2-1devel/py-ty/Makefile
+26-44 files

LLVM/project 5d0730bllvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[CodeGen][NPM] Add "PhysicalRegisterUsageAnalysis" once
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+1-4llvm/include/llvm/Passes/CodeGenPassBuilder.h
+4-72 files

LLVM/project ac37230llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Complete fast regalloc pipeline
DeltaFile
+38-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+1-1llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+39-12 files

LLVM/project ce33105llvm/lib/CodeGen LiveIntervals.cpp

[CodeGen][NPM] dump slot index info with -debug while running LiveIntervals
DeltaFile
+4-2llvm/lib/CodeGen/LiveIntervals.cpp
+4-21 files

LLVM/project fd0d859llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp

[AMDGPU][NPM] Obey "enable-amdgpu-aa" option
DeltaFile
+2-1llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+2-11 files

LLVM/project f08174dllvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Disable few non useful passes
DeltaFile
+3-3llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-2llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+5-52 files

LLVM/project 30b5dd0llvm/lib/Target/AMDGPU AMDGPUTargetMachine.cpp, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[AMDGPU][NPM] Enable "AMDGPURewriteAGPRCopyMFMAPass"
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+2-0llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+4-22 files

LLVM/project 3428f10llvm/lib/CodeGen BranchFolding.cpp BranchRelaxation.cpp, llvm/lib/Target/AMDGPU SIPreEmitPeephole.cpp

[CodeGen][NPM] Update dominator tree and post dominator tree consistently
DeltaFile
+11-2llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
+11-1llvm/lib/CodeGen/BranchFolding.cpp
+10-1llvm/lib/CodeGen/BranchRelaxation.cpp
+7-4llvm/lib/CodeGen/MachineBlockPlacement.cpp
+39-84 files

OpenBSD/src Ygg3EZmlib/libcrypto/x509 x509.h

   x509.h: annotate why X509_PKEY cannot be made opaque
VersionDeltaFile
1.126+2-1lib/libcrypto/x509/x509.h
+2-11 files

LLVM/project d0076c9llvm/include/llvm/Passes CodeGenPassBuilder.h, llvm/test/CodeGen/AMDGPU llc-pipeline-npm.ll

[NPM] Update OptimizedRegAlloc and MachineLateOptimization pipelines (#172795)

1. add the StackSlotColoringPass to default pipeline
2. Introduce MachineLateInstrsCleanupPass at the beginning of
addMachineLateOptimization (matches the legacy default pipeline)
DeltaFile
+6-3llvm/include/llvm/Passes/CodeGenPassBuilder.h
+2-2llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
+8-52 files

NetBSD/src 15H6upvsys/conf copyright

   welcome to 2026
VersionDeltaFile
1.24+1-1sys/conf/copyright
+1-11 files

LLVM/project 14b1d77llvm/docs NVPTXUsage.rst, llvm/lib/IR NVVMIntrinsicUtils.cpp

[NVPTX] Add intrinsics and codegen for tensormap.replace (#172458)

This change adds NVVM intrinsics and NVPTX codegen for the
`tensormap.replace` PTX instructions.
Tests are added in `tensormap_replace.ll`,
`tensormap_replace_sm_100a.ll`,
and `tensormap_replace_sm_103a.ll` and tested through `ptxas-13.0`.

PTX Spec Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-tensormap-replace
DeltaFile
+289-0llvm/docs/NVPTXUsage.rst
+263-0llvm/test/CodeGen/NVPTX/tensormap_replace.ll
+84-0llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
+71-0llvm/lib/IR/NVVMIntrinsicUtils.cpp
+64-0llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
+60-0llvm/test/CodeGen/NVPTX/tensormap_replace_sm_100a.ll
+831-05 files not shown
+1,008-011 files

FreeBSD/ports 5f7b78cmath/R-cran-proxy distinfo Makefile

math/R-cran-proxy: Update to 0.4-29

Reported by:    portscout
DeltaFile
+3-3math/R-cran-proxy/distinfo
+1-1math/R-cran-proxy/Makefile
+4-42 files

OpenBSD/src kIFMD51sys/netinet tcp_output.c

   unifdef m_copypack() use

   These ifdefs date back to 1990 in CSRG (SCCS rev 7.20).
   m_copypack() never existed in CSRG releases as far as I can tell.

   ok deraadt@ mvs@
VersionDeltaFile
1.158+1-18sys/netinet/tcp_output.c
+1-181 files

LLVM/project 1e8f174llvm/utils profcheck-xfail.txt

[ProfCheck] Exclude test from e4722c6

This adds in a select that we should probably just mark with unknown
profdata. Exclude for now to get the bot back to green.
DeltaFile
+1-0llvm/utils/profcheck-xfail.txt
+1-01 files

LLVM/project f8140c3llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/CodeGen/AArch64 sme-framelower-use-bp.ll

rebase

Created using spr 1.3.7
DeltaFile
+28-742llvm/test/CodeGen/AArch64/sme-framelower-use-bp.ll
+755-5llvm/test/CodeGen/X86/pr162812.ll
+315-314llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+547-0llvm/test/Instrumentation/MemorySanitizer/AArch64/aarch64-matmul.ll
+439-97llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+510-0llvm/test/Transforms/InstCombine/simplify-demanded-fpclass-exp.ll
+2,594-1,158802 files not shown
+21,067-6,665808 files

FreeBSD/ports 534d64bnet/claws distinfo Makefile

net/claws: Update to 0.4.0
DeltaFile
+5-5net/claws/distinfo
+1-1net/claws/Makefile
+6-62 files

FreeBSD/ports 4bd9d66graphics/opencv Makefile

graphics/opencv: Fix typo in GTK3 option

PR:             292033
DeltaFile
+1-1graphics/opencv/Makefile
+1-11 files

LLVM/project c2c787cllvm/include/llvm/ABI Types.h, llvm/lib CMakeLists.txt

[LLVMABI] Implement the ABI Typesystem (#158329)

This PR implements the first part of the LLVM ABI lowering library,
proposed in [this
RFC](https://discourse.llvm.org/t/rfc-an-abi-lowering-library-for-llvm/84495).
It is split out of https://github.com/llvm/llvm-project/pull/140112,
which demonstrates how this is going to be used.

The ABI type system is intended to represent all the type information
that is necessary to make call lowering decisions. As such, it contains
less information than Clang QualTypes, but more information than LLVM IR
types. The current type system has enough information to implement the
x86_64 SysV ABI, but some extensions will likely be needed in the future
for other targets (e.g. unadjusted alignment).

The type system expects layout information (like size, offset and
alignment) to already be computed by the frontend.

The types are constructed using TypeBuilder, which uses a
BumpPtrAllocator. The types themselves are not uniqued -- instead we
cache the QualType -> ABI type translation (in future patches).
DeltaFile
+431-0llvm/include/llvm/ABI/Types.h
+14-0llvm/lib/ABI/CMakeLists.txt
+9-0llvm/lib/ABI/Types.cpp
+1-0llvm/lib/CMakeLists.txt
+455-04 files