LLVM/project 6bc6e1acompiler-rt/test/tsan signal_thread.cpp

[tsan][test] Switch setitimer(ITIMER_REAL, ...) to setitimer(ITIMER_VIRTUAL, ...)

Followup to #85188.
DeltaFile
+2-2compiler-rt/test/tsan/signal_thread.cpp
+2-21 files

LLVM/project 29cde04clang/docs ClangFormatStyleOptions.rst, clang/include/clang/Format Format.h

[clang-format] Fixed the warning in building document for TableGenBreakingDAGArgOperators. (#85760)

Intend to fix the `Test documentation build `, degraded here
https://github.com/llvm/llvm-project/pull/83149 .
DeltaFile
+1-1clang/docs/ClangFormatStyleOptions.rst
+1-1clang/include/clang/Format/Format.h
+2-22 files

LLVM/project e85bfa6clang/test/Driver aarch64-mcpu.c, clang/test/Misc target-invalid-cpu-note.c

[AArch64] Add support for Cortex-A520AE and Cortex-A720AE CPUs (#85401)

[AArch64] Add support for Cortex-A520AE and Cortex-A720AE CPUs

Cortex-A520AE and Cortex-A720AE are Armv9.2 AArch64 CPUs.

Technical Reference Manual for Cortex-A520AE:
   https://developer.arm.com/documentation/107726/latest/

Technical Reference Manual for Cortex-A720AE:
   https://developer.arm.com/documentation/102828/latest/
DeltaFile
+34-1llvm/unittests/TargetParser/TargetParserTest.cpp
+27-0llvm/lib/Target/AArch64/AArch64.td
+11-0llvm/include/llvm/TargetParser/AArch64TargetParser.h
+4-0clang/test/Driver/aarch64-mcpu.c
+2-2clang/test/Misc/target-invalid-cpu-note.c
+2-0llvm/docs/ReleaseNotes.rst
+80-32 files not shown
+84-38 files

FreeBSD/ports 2649834shells/v7sh Makefile pkg-plist, shells/v7sh/files Makefile

shells/v7sh: Move man pages to share/man

Approved by:    portmgr (blanket)
DeltaFile
+1-1shells/v7sh/Makefile
+1-1shells/v7sh/files/Makefile
+1-1shells/v7sh/pkg-plist
+3-33 files

FreeBSD/ports c31d1d1shells/nologinmsg Makefile pkg-plist, shells/nologinmsg/files Makefile

shells/nologinmsg: Move man pages to share/man

Approved by:    portmgr (blanket)
DeltaFile
+1-1shells/nologinmsg/Makefile
+1-1shells/nologinmsg/files/Makefile
+1-1shells/nologinmsg/pkg-plist
+3-33 files

FreeBSD/ports 91e58dasecurity/akmos Makefile pkg-plist, security/akmos/files patch-doc_man_CMakeLists.txt

security/akmos: Move man pages to share/man

Approved by:    portmgr (blanket)
DeltaFile
+9-0security/akmos/files/patch-doc_man_CMakeLists.txt
+1-1security/akmos/Makefile
+1-1security/akmos/pkg-plist
+11-23 files

FreeBSD/ports 1c94375ports-mgmt/portsreinstall pkg-plist Makefile, ports-mgmt/portsreinstall/files patch-Makefile

ports-mgmt/portsreinstall: Move man pages to share/man

Approved by:    portmgr (blanket)
DeltaFile
+27-0ports-mgmt/portsreinstall/files/patch-Makefile
+4-4ports-mgmt/portsreinstall/pkg-plist
+1-0ports-mgmt/portsreinstall/Makefile
+32-43 files

LLVM/project a4b2363mlir/lib/IR AffineExpr.cpp, mlir/unittests/IR AffineExprTest.cpp CMakeLists.txt

[mlir] Don't assert when simplifying certain `AffineExpr`s (#78855)

Currently, `simplifyMul()` asserts that either `lhs` or `rhs` is
symbolic or constant. This method is called by the overloaded `*`
operator for `AffineExpr`s which leads to a crash when building a
multiplication expression where neither operand is symbolic or constant.
This patch returns a `nullptr` from `simplifyMul()` to signal that the
expression could not be simplified instead.

Fix https://github.com/llvm/llvm-project/issues/75770
DeltaFile
+32-0mlir/unittests/IR/AffineExprTest.cpp
+2-1mlir/lib/IR/AffineExpr.cpp
+1-0mlir/unittests/IR/CMakeLists.txt
+35-13 files

LLVM/project 7f89e68libcxx/include/__chrono sys_info.h, libcxx/src time_zone.cpp

[libc++][chrono] Adds the sys_info class.

Adds the sys_info class and time_zone::get_info(). The code still
has a few quirks and has not been optimized for performance yet.

The returned sys_info is compared against the output of the zdump tool in
the test giving confidence the implementation is correct.

Implements parts of:
- P0355 Extending <chrono> to Calendars and Time Zones

Implements:
- LWGXXXX The sys_info range should be affected by save
DeltaFile
+1,374-0libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.members/get_info.sys_time.pass.cpp
+858-0libcxx/src/time_zone.cpp
+142-0libcxx/test/libcxx/time/time.zone/time.zone.timezone/time.zone.members/get_info.sys_time.pass.cpp
+127-0libcxx/test/std/time/time.zone/time.zone.timezone/time.zone.members/sys_info.zdump.pass.cpp
+53-0libcxx/include/__chrono/sys_info.h
+33-0libcxx/test/std/time/time.zone/time.zone.info/time.zone.info.sys/sys_info.members.compile.pass.cpp
+2,587-012 files not shown
+2,648-218 files

LLVM/project a0266a5mlir/lib/Dialect/LLVMIR/IR LLVMMemorySlot.cpp, mlir/test/Dialect/LLVMIR sroa.mlir

[MLIR][LLVM][SROA] Avoid splitting dynamically indexed allocas

This commit ensures that SROA does no longer attempt to split allocas
that are indexed into dynamically. Dynamic indices into arrays are
allowed to be negative or out-of-bounds, when the alloca containing the
array has memory backing these produced indices.
DeltaFile
+18-0mlir/test/Dialect/LLVMIR/sroa.mlir
+8-0mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
+26-02 files

LLVM/project 5e379b6llvm/lib/Target/AMDGPU AMDGPUPromoteAlloca.cpp

[AMDGPU][PromoteAlloca] Drop bitcast handling (#85747)

This is no longer needed with opaque pointers.
DeltaFile
+0-8llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
+0-81 files

LLVM/project db60491mlir/lib/Dialect/Bufferization/IR BufferizableOpInterface.cpp, mlir/lib/Dialect/Bufferization/Transforms Bufferize.cpp

[mlir][bufferization] Check OpFilter before casting to BufferizableOpInterface (#85690)

This doesn't change functionality, but lets us avoid attaching all the
interfaces after 513cdb82223a106f183b49a40d9acb1f7efbbe7e turned casting
without loading into an error.
DeltaFile
+2-2mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
+1-3mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
+3-52 files

LLVM/project 29849d5openmp/libomptarget/test/api ompx_dump_mapping_tables.cpp

[OpenMP] Fix ompx_dump_mapping_tables lit test (#85754)

Fixes ompx_dump_mapping_tables test by only using one device after
breaking built bots
DeltaFile
+10-15openmp/libomptarget/test/api/ompx_dump_mapping_tables.cpp
+10-151 files

LLVM/project 0d40de7clang/lib/AST/Interp Disasm.cpp InterpFrame.h

[clang][Interp][NFC] Add InterpFrame::dump()
DeltaFile
+27-0clang/lib/AST/Interp/Disasm.cpp
+3-0clang/lib/AST/Interp/InterpFrame.h
+30-02 files

LLVM/project 1a6953allvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass-implied-by-fcmp.ll

ValueTracking: Fix bug with fcmp false to nan constant

If we had a comparison to a literal nan with a false predicate,
we were incorrectly treating it as an unordered compare. This was
correct for fcmp true, but not fcmp false. I noticed this in the
review for e44d3b3e503fa12fdaead2936b28844aa36237c1 but misdiagnosed
the reason. Also change the test for the fcmp true case to be more
useful, but it wasn't wrong previously.
DeltaFile
+7-7llvm/lib/Analysis/ValueTracking.cpp
+6-6llvm/test/Transforms/Attributor/nofpclass-implied-by-fcmp.ll
+13-132 files

FreeBSD/ports 3e4d502science/afni distinfo Makefile

science/afni: update to 24.0.13
DeltaFile
+3-3science/afni/distinfo
+1-1science/afni/Makefile
+4-42 files

LLVM/project a747e86llvm/lib/Transforms/InstCombine InstCombineCasts.cpp, llvm/test/Transforms/InstCombine fpcast.ll

[InstCombine] Fold `fpto{s|u}i non-norm` to zero (#85569)

This patch enables more optimization after canonicalizing `fmul X, 0.0`
into a copysign.
I decide to implement this fold in InstCombine because
`computeKnownFPClass` may be expensive.

Alive2: https://alive2.llvm.org/ce/z/ASM8tQ
DeltaFile
+88-0llvm/test/Transforms/InstCombine/fpcast.ll
+19-0llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+107-02 files

LLVM/project 6aaf9c8clang/lib/AST/Interp ByteCodeExprGen.cpp

[clang][Interp][NFC] Sanitize collectBaseOffset parameters
DeltaFile
+2-0clang/lib/AST/Interp/ByteCodeExprGen.cpp
+2-01 files

FreeBSD/src 7622906. Makefile.inc1

pkgbase: fix kernel packing after switch ucl rework
DeltaFile
+12-11Makefile.inc1
+12-111 files

LLVM/project 9539532llvm/lib/Target/RISCV RISCVRegisterInfo.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+6-7llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
+6-71 files

OpenBSD/ports g4Dop25net/p5-Zonemaster/engine distinfo Makefile, net/p5-Zonemaster/engine/pkg PLIST

   update to p5-Zonemaster-engine-5.0.0
VersionDeltaFile
1.11+5-3net/p5-Zonemaster/engine/pkg/PLIST
1.13+2-2net/p5-Zonemaster/engine/distinfo
1.20+2-1net/p5-Zonemaster/engine/Makefile
+9-63 files

OpenBSD/ports qnrcC0lnet/p5-Zonemaster/cli Makefile distinfo

   update to zonemaster-6.1.0
VersionDeltaFile
1.17+2-2net/p5-Zonemaster/cli/Makefile
1.11+2-2net/p5-Zonemaster/cli/distinfo
+4-42 files

OpenBSD/ports AGsIUjfnet/p5-Zonemaster/ldns distinfo Makefile

   update to p5-Zonemaster-LDNS-4.0.0
VersionDeltaFile
1.11+2-2net/p5-Zonemaster/ldns/distinfo
1.18+1-1net/p5-Zonemaster/ldns/Makefile
+3-32 files

OpenBSD/ports 7FuNyOLsecurity/gopass distinfo modules.inc

   update to gopass-1.15.12
VersionDeltaFile
1.26+158-122security/gopass/distinfo
1.13+68-50security/gopass/modules.inc
1.37+1-1security/gopass/Makefile
+227-1733 files

LLVM/project 703920dllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 hadd-combine.ll

[DAG] Matched FixedWidth pattern for ISD::AVGFLOORU (#84903)

Fixes: #84749
DeltaFile
+21-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+12-0llvm/test/CodeGen/AArch64/hadd-combine.ll
+33-02 files

OpenBSD/ports twNCcXJdatabases/pspg distinfo Makefile

   update databases/pspg to 5.8.2
VersionDeltaFile
1.27+2-2databases/pspg/distinfo
1.29+1-1databases/pspg/Makefile
+3-32 files

LLVM/project 5e486d1llvm/include/llvm/Target TargetMacroFusion.td TargetSchedule.td

[TableGen][NFC] Move MacroFusion classes to TargetMacroFusion.td

To make structure clear.

Reviewers: dtcxzyw, arsenm

Reviewed By: arsenm

Pull Request: https://github.com/llvm/llvm-project/pull/85748
DeltaFile
+136-0llvm/include/llvm/Target/TargetMacroFusion.td
+0-127llvm/include/llvm/Target/TargetSchedule.td
+5-0llvm/include/llvm/Target/Target.td
+141-1273 files

LLVM/project b788e46clang/include/clang/Analysis/FlowSensitive RecordOps.h, clang/lib/Analysis/FlowSensitive RecordOps.cpp Transfer.cpp

[clang][dataflow] Model assignment to derived class from base. (#85064)

This is a relatively rare case, but

- It's still nice to get this right,
- We can remove the special case for this in
`VisitCXXOperatorCallExpr()` (that
  simply bails out), and
- With this in place, I can avoid having to add a similar special case
in an
  upcoming patch.
DeltaFile
+56-38clang/lib/Analysis/FlowSensitive/RecordOps.cpp
+44-2clang/unittests/Analysis/FlowSensitive/RecordOpsTest.cpp
+21-4clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
+0-9clang/lib/Analysis/FlowSensitive/Transfer.cpp
+5-1clang/include/clang/Analysis/FlowSensitive/RecordOps.h
+126-545 files

LLVM/project d9fc379llvm/include/llvm/Target TargetMacroFusion.td TargetSchedule.td

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.4

[skip ci]
DeltaFile
+136-0llvm/include/llvm/Target/TargetMacroFusion.td
+0-127llvm/include/llvm/Target/TargetSchedule.td
+5-0llvm/include/llvm/Target/Target.td
+141-1273 files

LLVM/project 939a7c7llvm/include/llvm/Target TargetMacroFusion.td TargetSchedule.td, llvm/test/TableGen MacroFusion.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.4
DeltaFile
+153-0llvm/include/llvm/Target/TargetMacroFusion.td
+0-127llvm/include/llvm/Target/TargetSchedule.td
+61-0llvm/test/TableGen/MacroFusion.td
+5-0llvm/include/llvm/Target/Target.td
+219-1274 files