LLVM/project 62118b5llvm/lib/Target/SPIRV SPIRVBuiltins.cpp

[NFC][SPIR-V] Fix unused-variable in SPIRVBuiltins (#200842)
DeltaFile
+1-1llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+1-11 files

LLVM/project fdff843clang/include/clang/Basic NoSanitizeList.h, clang/lib/Basic NoSanitizeList.cpp

improve names

Created using spr 1.3.7
DeltaFile
+4-4clang/lib/Basic/NoSanitizeList.cpp
+2-2clang/include/clang/Basic/NoSanitizeList.h
+1-1clang/lib/CodeGen/CGExpr.cpp
+1-1clang/test/CodeGen/ubsan-strict-flex-arrays-ignorelist.c
+8-84 files

LLVM/project 814826dclang/test/CodeGen ubsan-strict-flex-arrays-ignorelist.c

eol

Created using spr 1.3.7
DeltaFile
+1-1clang/test/CodeGen/ubsan-strict-flex-arrays-ignorelist.c
+1-11 files

LLVM/project 3f8df5fclang/lib/CodeGen CGExpr.cpp

you are a world-class engineer

Created using spr 1.3.7
DeltaFile
+18-12clang/lib/CodeGen/CGExpr.cpp
+18-121 files

LLVM/project 6d0b3fdllvm/utils instrumentor-config-wizard.py

[Instrumentor] Improve the config wizard script (#199108)

This makes the config wizard script more generic as we grow
instrumentation opportunities. Better output, e.g., clear paths, are
also displayed now.

Prepared with Claude (AI) and tested by me afterwards.
DeltaFile
+279-153llvm/utils/instrumentor-config-wizard.py
+279-1531 files

LLVM/project 10cd6cbllvm/include/llvm/Transforms/Utils TriggerCrashPass.h, llvm/lib/CodeGen TargetPassConfig.cpp

Revert "[LLVM] Add flags to crash the opt/codegen pipeline (#200967)"

This reverts commit 015d0479b94ce48e431398813525a59a16c6e4eb.
DeltaFile
+0-43llvm/lib/Transforms/Utils/TriggerCrashPass.cpp
+0-39llvm/include/llvm/Transforms/Utils/TriggerCrashPass.h
+22-1llvm/lib/Passes/PassBuilder.cpp
+0-13llvm/test/Other/trigger-crash-flags.ll
+0-10llvm/lib/CodeGen/TargetPassConfig.cpp
+0-8llvm/lib/Passes/PassBuilderPipelines.cpp
+22-1142 files not shown
+22-1168 files

LLVM/project 4ab99f1clang/lib/CodeGen CGExpr.cpp, clang/test/CodeGen ubsan-strict-flex-arrays-ignorelist.c

make no mistakes

Created using spr 1.3.7
DeltaFile
+25-8clang/test/CodeGen/ubsan-strict-flex-arrays-ignorelist.c
+15-10clang/lib/CodeGen/CGExpr.cpp
+40-182 files

LLVM/project c923538llvm/lib/Target/DirectX DirectXTargetMachine.cpp, llvm/test/CodeGen/DirectX llc-pipeline.ll

[DirectX] Disable DCE and DSE for -O0 (#192520)

These are optimisation passes which are inappropriate to run when the
user has requested no optimisations, and which make it more difficult to
write tests.

Co-authored-by: Andrew Savonichev <andrew.savonichev at gmail.com>
DeltaFile
+13-11llvm/test/CodeGen/DirectX/llc-pipeline.ll
+8-2llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
+21-132 files

LLVM/project 5bb1d35llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

clang-format, newer API
DeltaFile
+2-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-31 files

LLVM/project 007f19ellvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-insert-concat.ll

[SelectionDAG] Fold subvector inserts into concat operands

Push insert_subvector into the containing CONCAT_VECTORS operand when the insertion is wholly contained there.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+72-0llvm/test/CodeGen/AMDGPU/dagcombine-insert-concat.ll
+35-10llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+107-102 files

LLVM/project 40a615fllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

clang-format, use better API
DeltaFile
+4-6llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-61 files

LLVM/project 0f9a6cellvm/test/CodeGen/AArch64 sve-fixed-vector-llrint.ll sve-fixed-vector-lrint.ll, llvm/test/CodeGen/AMDGPU bf16.ll

[SelectionDAG] Fold extracts spanning concat operands

Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+992-904llvm/test/CodeGen/AMDGPU/bf16.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+196-176llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+142-140llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+120-120llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+1,824-1,79812 files not shown
+2,251-2,27118 files

LLVM/project aa37cbcllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

New API
DeltaFile
+2-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-51 files

LLVM/project 07aaeb9llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-extract-extract.ll

[SelectionDAG] Fold nonzero extract-of-extract indices

Generalize the extract_subvector-of-extract_subvector fold to compose
nonzero indices instead of only handling an outer index of zero.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+43-0llvm/test/CodeGen/AMDGPU/dagcombine-extract-extract.ll
+8-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+51-52 files

LLVM/project e9f0e06llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

VSELECT support
DeltaFile
+55-0llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+3-3llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+58-32 files

LLVM/project 297caf9llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

[SelectionDAG] Track demanded select elements in noundef checks

Propagate demanded elements through to the two arms of a select, and
check the condition with or without demanded elements depending on if
it's a vector or not.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+45-0llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+15-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+60-02 files

LLVM/project 254eee8llvm/test/CodeGen/AMDGPU dagcombine-freeze-bitcast-demanded-elts.ll

Add more tests
DeltaFile
+226-1llvm/test/CodeGen/AMDGPU/dagcombine-freeze-bitcast-demanded-elts.ll
+226-11 files

LLVM/project 09b0318llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-bitcast-demanded-elts.ll

[SelectionDAG] Track bitcast demanded elements in noundef tests

Bitcasts preserve undef/poison status, but vector bitcasts can change
which source lanes cover a demanded result lane. Map the demanded
element mask through fixed-length vector bitcasts before checking the
source where possible.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+102-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-bitcast-demanded-elts.ll
+41-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+143-02 files

LLVM/project 1b4e346llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/AMDGPU dagcombine-freeze-demanded-elts.ll

[SelectionDAG] Track demanded concat elements in noundef checks

Teach isGuaranteedNotToBeUndefOrPoison to distribute fixed-length
demanded element masks across CONCAT_VECTORS operands. This is part of
the series of fixes needed to resolve a SelectionDAG hang by making it
possible to prove certain values don't need to be frozen.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+80-0llvm/test/CodeGen/AMDGPU/dagcombine-freeze-demanded-elts.ll
+26-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+106-02 files

LLVM/project 84f4dc4llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

clang-format concat
DeltaFile
+2-2llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+2-21 files

LLVM/project d75af34llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-undef-demanded-elts.ll pr91005.ll

[SelectionDAG] Look through freeze in undef demanded checks

There were cycles where the freeze combiner and thet
demanded-elements simplification code would get into fights about
whethere the operands to a shuffle or a concat should be
`freeze undef` or `undef` once the simplifier had concluded zero
elements were demanded from some operation. This PR prevents such
cases.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+88-0llvm/test/CodeGen/X86/dagcombine-freeze-undef-demanded-elts.ll
+11-7llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+2-1llvm/test/CodeGen/X86/pr91005.ll
+101-83 files

LLVM/project 1830587clang/include/clang/Basic NoSanitizeList.h, clang/lib/Basic NoSanitizeList.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+30-0clang/test/CodeGen/ubsan-strict-flex-arrays-ignorelist.c
+11-0clang/lib/CodeGen/CGExpr.cpp
+6-0clang/lib/Basic/NoSanitizeList.cpp
+2-0clang/include/clang/Basic/NoSanitizeList.h
+49-04 files

LLVM/project accc4fcllvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

clang-format, newer API
DeltaFile
+2-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-31 files

LLVM/project 126faf4llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-insert-concat.ll

[SelectionDAG] Fold subvector inserts into concat operands

Push insert_subvector into the containing CONCAT_VECTORS operand when the insertion is wholly contained there.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+72-0llvm/test/CodeGen/AMDGPU/dagcombine-insert-concat.ll
+35-10llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+107-102 files

LLVM/project d8a0399llvm/test/CodeGen/AArch64 sve-fixed-vector-llrint.ll sve-fixed-vector-lrint.ll, llvm/test/CodeGen/AMDGPU bf16.ll

[SelectionDAG] Fold extracts spanning concat operands

Factor the extract_subvector-of-CONCAT_VECTORS logic and handle
extracts that cover multiple whole concat operands by rebuilding a
smaller concat directly.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+992-904llvm/test/CodeGen/AMDGPU/bf16.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-llrint.ll
+187-229llvm/test/CodeGen/AArch64/sve-fixed-vector-lrint.ll
+196-176llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
+142-140llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+120-120llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
+1,824-1,79812 files not shown
+2,251-2,27118 files

LLVM/project 17e741ellvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

clang-format, use better API
DeltaFile
+4-6llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-61 files

LLVM/project 045ad90llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

New API
DeltaFile
+2-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+2-51 files

LLVM/project 328d7e9llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU dagcombine-extract-extract.ll

[SelectionDAG] Fold nonzero extract-of-extract indices

Generalize the extract_subvector-of-extract_subvector fold to compose
nonzero indices instead of only handling an outer index of zero.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+43-0llvm/test/CodeGen/AMDGPU/dagcombine-extract-extract.ll
+8-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+51-52 files

LLVM/project 3a1acdallvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

VSELECT support
DeltaFile
+55-0llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+3-3llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+58-32 files

LLVM/project 2c53b65llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 dagcombine-freeze-select-demanded-elts.ll

[SelectionDAG] Track demanded select elements in noundef checks

Propagate demanded elements through to the two arms of a select, and
check the condition with or without demanded elements depending on if
it's a vector or not.

AI note: an LLM generated the code and the test, I've read them

Co-Authored-By: OpenAI Codex <codex at openai.com>
DeltaFile
+45-0llvm/test/CodeGen/X86/dagcombine-freeze-select-demanded-elts.ll
+15-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+60-02 files