LLVM - FreshBSD

LLVM/project 89b97e9 — llvm/lib/Target/RISCV RISCVInstrInfoXwch.td, llvm/test/MC/RISCV xwchc-valid.s

2026-09-06 05:55:18 UTC by Alexander Richardson via GitHub on ⎇

main

[RISC-V] Use an optional offset for Xwch instructions

Following up on the previous commits to remove unnecessary InstAlias.

This commit was prepared with the help of AI.

Reviewed By: lenary, ArcaneNibble

Pull Request: https://github.com/llvm/llvm-project/pull/215005

Delta		File
+12	-25	llvm/lib/Target/RISCV/RISCVInstrInfoXwch.td
+24	-0	llvm/test/MC/RISCV/xwchc-valid.s
+36	-25	2 files

LLVM/project 78baccc — clang/include/clang/Basic AttrDocs.td, llvm/test/CodeGen/AArch64 vector-ldst-align-float.ll

2026-09-06 05:54:45 UTC by Alexander Richardson on ⎇

users/arichardson/spr/main.risc-v-use-an-optional-offset-for-xwch-instructions

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1-arichardson

[skip ci]

Delta		File
+17,286	-3,454	llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+13,787	-6,856	llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-sve-instructions.s
+9,921	-0	llvm/test/CodeGen/AArch64/vector-ldst-align-float.ll
+7,985	-1,589	llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-neon-instructions.s
+6,355	-3,146	llvm/test/tools/llvm-mca/AArch64/Cortex/C1Nano-neon-instructions.s
+4,430	-4,297	clang/include/clang/Basic/AttrDocs.td
+59,764	-19,342	14,551 files not shown
+868,878	-452,112	14,557 files

LLVM/project 8e7fa6f — llvm/lib/Target/RISCV RISCVInstrInfo.td RISCVInstrInfoXqci.td, llvm/test/MC/RISCV xqciio-invalid.s xqcilo-pseudos-invalid.s

2026-09-06 05:52:11 UTC by Alexander Richardson via GitHub on ⎇

users/arichardson/spr/main.risc-v-use-an-optional-offset-for-xwch-instructions

[RISC-V] Use an optional offset for Xqc* instructions

Following up on the previous commits to remove unnecessary InstAlias.

This commit was prepared with the help of AI.

Reviewed By: lenary

Pull Request: https://github.com/llvm/llvm-project/pull/215002

Delta		File
+14	-78	llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+37	-25	llvm/test/MC/RISCV/xqcilsm-invalid.s
+11	-17	llvm/test/MC/RISCV/xqciio-invalid.s
+14	-14	llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
+6	-0	llvm/lib/Target/RISCV/RISCVInstrInfo.td
+82	-134	5 files

LLVM/project e16901c — clang/lib/AST/ByteCode Compiler.cpp

2026-09-06 05:27:08 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Use IsNonNull opcode in CXXNewExpr (#221515)

Instead of emitting a null pointer and checking that for equality.

Delta		File
+2	-4	clang/lib/AST/ByteCode/Compiler.cpp
+2	-4	1 files

LLVM/project 03ff69f — clang/lib/AST/ByteCode Compiler.cpp

2026-09-06 05:23:40 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Do pointer-to-bool convesions without classify() (#221516)

Delta		File
+6	-5	clang/lib/AST/ByteCode/Compiler.cpp
+6	-5	1 files

LLVM/project ad426ed — clang-tools-extra/docs/clang-tidy/checks/readability else-after-return.md

2026-09-06 04:09:28 UTC by Zeyi Xu via GitHub on ⎇

users/zeyi2/readability-docs-rewrite-1

Update clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.md

Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>

Delta		File
+1	-1	clang-tools-extra/docs/clang-tidy/checks/readability/else-after-return.md
+1	-1	1 files

LLVM/project 72417eb — llvm/lib/Target/Xtensa CMakeLists.txt

2026-09-06 03:43:10 UTC by Fangrui Song via GitHub on ⎇

main

[Xtensa] Depend on CodeGenTypes to fix BUILD_SHARED_LIBS=on build (#221511)

Delta		File
+1	-0	llvm/lib/Target/Xtensa/CMakeLists.txt
+1	-0	1 files

LLVM/project bf085fa — clang/lib/AST/ByteCode Record.h

2026-09-06 03:40:58 UTC by Timm Baeder via GitHub on ⎇

main

[clang][bytecode] Cache Is(Unnamed)BitFields bools in `Record::Field` (#221392)

We need to query those a lot and we can save them in the padding bytes
of `Record::Field`.

Delta		File
+8	-3	clang/lib/AST/ByteCode/Record.h
+8	-3	1 files

LLVM/project ad9259c — clang-tools-extra/include-cleaner/unittests WalkASTTest.cpp

2026-09-06 02:27:43 UTC by Dave MacLachlan via GitHub on ⎇

main

[include-cleaner] Add WalkAST unit tests for Objective-C constructs (#220763)

Adds test coverage for walking AST nodes related to:
- Objective-C interface inheritance (`@interface Derived : Base`)
- Forward class and protocol declarations (`@class` and `@protocol`)
- Objective-C interface types used as function arguments

This is just to make sure that current code is covered. No new features.

Delta		File
+48	-0	clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
+48	-0	1 files

LLVM/project 012428c — llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 divrem-by-select.ll masked-urem.ll

2026-09-06 01:27:06 UTC by Adam Scott via GitHub on ⎇

main

[X86] Lower i64 vector division and remainder through float division (#215043)

Follow up to #205263 which handled i8/i16/i32.

i64 needs a different algorithm because f64 cannot hold a 64 bit
quotient exactly. Instead of one divide the quotient is built from a
reciprocal and two rounded down multiplies plus a correction for the off
by one (https://sneller.ai/blog/avx512-int-div/). That needs the
directed rounding forms which only exist as 512 bit AVX512DQ
instructions, so the whole i64 path is gated on DQ and 512 bit types
being legal.

Operands that are provably narrow enough to fit the f64 mantissa skip
the chain entirely and take the same convert divide convert path as the
<=i32 case.

strictfp i64 uses the SAE forms the same way the <=i32 path does.

combineIntDivRem is now a small dispatcher over two helpers since the

    [4 lines not shown]

Delta		File
+414	-0	llvm/test/CodeGen/X86/vector-idiv-i64.ll
+310	-87	llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
+298	-48	llvm/test/CodeGen/X86/masked-udiv.ll
+292	-48	llvm/test/CodeGen/X86/masked-urem.ll
+189	-123	llvm/test/CodeGen/X86/divrem-by-select.ll
+195	-75	llvm/lib/Target/X86/X86ISelLowering.cpp
+1,698	-381	5 files not shown
+2,374	-480	11 files

LLVM/project 62e6fe8 — llvm/include/llvm/SandboxIR Context.h, llvm/lib/SandboxIR Context.cpp

2026-09-06 01:18:46 UTC by vporpo via GitHub on ⎇

main

Reapply "[SandboxIR] Callback registration now allows specifying order" (#221099)

This reverts commit f111407c0502851409a887c8e5dea4a3ec190d4e.
Should fix the sanitizer issue.

Delta		File
+98	-0	llvm/unittests/SandboxIR/SandboxIRTest.cpp
+57	-16	llvm/include/llvm/SandboxIR/Context.h
+33	-39	llvm/lib/SandboxIR/Context.cpp
+188	-55	3 files

LLVM/project fe38bab — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVMOpenCLMetadata.h LowerToLLVM.cpp, clang/test/CIR/CodeGenOpenCL version.cl

2026-09-06 01:03:15 UTC by mencotton via GitHub on ⎇

users/Men-cotton/cir/lower-opencl-language-version-metadata

[CIR][OpenCL] Lower OpenCL language version metadata to LLVM dialect

Propagate CIR OpenCL language version module attributes as LLVM dialect named metadata before LLVM IR translation.

Assisted-by: Codex / GPT-5.6 Sol

Delta		File
+43	-0	clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
+16	-0	clang/test/CIR/CodeGenOpenCL/version.cl
+16	-0	clang/test/CIR/Lowering/opencl-version-metadata.cir
+2	-0	clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
+2	-0	clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+79	-0	5 files

LLVM/project 9d25213 — clang/lib/CIR/CodeGen CIRGenModule.cpp, clang/lib/CodeGen CodeGenModule.cpp

2026-09-06 01:03:15 UTC by mencotton via GitHub on ⎇

users/Men-cotton/cir/emit-opencl-language-version-metadata

fix: Supply the HIP SPIR-V version only for metadata emission

Fix the assertion exposed by PR #214246 under the version invariant from PR #219687. Supply OpenCL 2.0 in classic CodeGen and CIRGen without changing HIP language options or enabling OpenCL-only Sema restrictions.

Assisted-by: Codex / GPT-6

Delta		File
+8	-0	clang/test/CodeGenHIP/hipspv-kernel.cpp
+8	-0	clang/test/SemaHIP/atomic-init.hip
+4	-2	clang/lib/CIR/CodeGen/CIRGenModule.cpp
+3	-1	clang/lib/CodeGen/CodeGenModule.cpp
+2	-0	clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
+25	-3	5 files

LLVM/project 980d3d1 — clang/test/CIR/CodeGenHIP amdgcnspirv-kernel.hip

2026-09-06 01:03:15 UTC by mencotton via GitHub on ⎇

users/Men-cotton/cir/lower-opencl-language-version-metadata

fix: Check HIP SPIR-V version metadata after lowering

Delta		File
+3	-0	clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
+3	-0	1 files

LLVM/project 1fe17e8 — clang/lib/CIR/CodeGen CIRGenModule.h CIRGenModule.cpp, clang/test/CIR/CodeGenOpenCL version.cl

2026-09-06 01:03:15 UTC by mencotton via GitHub on ⎇

users/Men-cotton/cir/emit-opencl-language-version-metadata

[CIR][OpenCL] Emit OpenCL language version metadata in CIR

Emit OpenCL and C++ for OpenCL language version attributes from CIRGen. Preserve the compatible OpenCL version and the C++ for OpenCL version separately so later lowering does not infer one from the other.

Assisted-by: Codex / GPT-5.6 Sol

Delta		File
+15	-0	clang/test/CIR/CodeGenOpenCL/version.cl
+13	-0	clang/lib/CIR/CodeGen/CIRGenModule.cpp
+4	-0	clang/test/CodeGenCUDASPIRV/kernel-cc.cu
+1	-0	clang/lib/CIR/CodeGen/CIRGenModule.h
+33	-0	4 files

LLVM/project 6cb27b6 — clang/lib/CIR/Dialect/IR CIRDialect.cpp

2026-09-06 01:03:14 UTC by mencotton via GitHub on ⎇

users/Men-cotton/cir/add-opencl-language-version-module-attributes

fix: separate CIR attribute dispatch from OpenCL verification

Delta		File
+20	-8	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+20	-8	1 files

LLVM/project 5e95dbe — clang/include/clang/CIR/Dialect/IR CIRDialect.td CIROpenCLAttrs.td, clang/lib/CIR/Dialect/IR CIROpenCLAttrs.cpp CIRDialect.cpp

2026-09-06 01:03:14 UTC by mencotton via GitHub on ⎇

users/Men-cotton/cir/add-opencl-language-version-module-attributes

[CIR][OpenCL] Add OpenCL language version module attributes

Add structured CIR module attributes for OpenCL and C++ for OpenCL language versions. Verify their module-level placement and version components so lowering can consume explicit source-language version state.

Assisted-by: Codex / GPT-5.6 Sol

Delta		File
+76	-0	clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+73	-0	clang/test/CIR/IR/invalid-version.cir
+28	-0	clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
+19	-0	clang/test/CIR/IR/version.cir
+15	-0	clang/lib/CIR/Dialect/IR/CIROpenCLAttrs.cpp
+5	-0	clang/include/clang/CIR/Dialect/IR/CIRDialect.td
+216	-0	1 files not shown
+219	-1	7 files

LLVM/project 419c22c — llvm/include/llvm/TableGen Record.h, llvm/lib/TableGen Record.cpp

2026-09-06 00:09:22 UTC by Fangrui Song via GitHub on ⎇

main

[TableGen] Unique the remaining Init pools in a UniquingSet. NFC (#221394)

Follow-up to #219630. Every one of these keys is a handful of scalars,
pointers and trailing-object arrays already stored in the node, so a
typed key removes the FoldingSetNodeID serialization on every get() and
the profile rebuild on every hit.

llvm-tblgen instructions retired, minimum of five interleaved runs:

```
  RISCV   -gen-asm-matcher     -3.492%
  RISCV   -gen-register-info   -4.027%
  X86     -gen-dag-isel        -1.573%
  AMDGPU  -gen-subtarget       -1.140%
```

Aided by Opus 5

Delta		File
+30	-185	llvm/lib/TableGen/Record.cpp
+30	-10	llvm/include/llvm/TableGen/Record.h
+60	-195	2 files

LLVM/project 5115f32 — llvm/lib/Transforms/Vectorize VPlan.h VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize replicate-region-branch-weights.ll

2026-09-05 21:29:42 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Preserve branch weights from VPlan0 through to codegen. (#213143)

This patch adds support for carrying through branch weights from the
original scalar loop through VPlan.

The flow is as follows:

1. On the scalar VPlan, we import the branch weights from the existing
   IR branches and add them as !prof metadata to VPInstruction terminators
2. The predicator dissolves the control flow and each block will get
     executed unconditionally. What remains are predicated recipes, with
     their lanes executing with probability relative to the header. Compute
     the executing probabilities as sum of probabilities of all incoming
     edges.
3. Each masked recipe gets the execution probability attached as custom
    !vplan.execution.frequency metadata 
4. When creating replicate regions, a predicated recipe is replaced by
    explicit control fold. The execution frequency from the recipe is
    converted to profile metadata and added to the newly introduced 

    [23 lines not shown]

Delta		File
+976	-0	llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
+342	-238	llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
+97	-0	llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+68	-0	llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+60	-2	llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+47	-13	llvm/lib/Transforms/Vectorize/VPlan.h
+1,590	-253	5 files not shown
+1,677	-272	11 files

LLVM/project 94cb123 — clang-tools-extra/include-cleaner/lib WalkAST.cpp, clang-tools-extra/include-cleaner/unittests WalkASTTest.cpp

2026-09-05 21:24:14 UTC by Dave MacLachlan via GitHub on ⎇

main

[include-cleaner] Support Objective-C literals and boxed expressions in WalkAST (#216201)

This change adds AST visitors for ObjCBoxedExpr, ObjCArrayLiteral,
ObjCDictionaryLiteral, and ObjCStringLiteral. This ensures that the
underlying class interfaces (such as NSNumber, NSArray, NSDictionary,
and NSString) and any associated categories used for these literals are
correctly reported as referenced. Unit tests are included to verify the
new behavior.

Delta		File
+75	-0	clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
+28	-0	clang-tools-extra/include-cleaner/lib/WalkAST.cpp
+103	-0	2 files

LLVM/project f42c87b — llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp, llvm/test/CodeGen/AMDGPU fmin_legacy.ll fmed3.ll

2026-09-05 20:19:14 UTC by Arseniy Obolenskiy via GitHub on ⎇

main

[AMDGPU] Fix legacy fmin/fmax combines to preserve NaN and zero ties (#220519)

Delta		File
+467	-6	llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll
+77	-60	llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+48	-37	llvm/test/CodeGen/AMDGPU/fmed3.ll
+58	-9	llvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
+54	-7	llvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
+19	-33	llvm/test/CodeGen/AMDGPU/fmin_legacy.ll
+723	-152	10 files not shown
+802	-196	16 files

LLVM/project 45b1e62 — llvm/lib/CodeGen TypePromotion.cpp, llvm/test/Transforms/TypePromotion/ARM casts.ll

2026-09-05 20:06:37 UTC by Vito Kortbeek via GitHub on ⎇

main

[TypePromotion] Support trunc-to-i1 conditions (#216311)

InstCombine may rewrite `icmp ne (X & 1), 0` to `trunc X to i1`
(#178977). Start TypePromotion searches from operands of scalar
trunc-to-i1 instructions, treating the trunc as a boolean boundary
without promoting its result or traversing its users.

Assisted-by: AI

Delta		File
+31	-9	llvm/lib/CodeGen/TypePromotion.cpp
+27	-0	llvm/test/Transforms/TypePromotion/ARM/casts.ll
+58	-9	2 files

LLVM/project 03de3d1 — llvm/include/llvm/Support/LSP Transport.h, llvm/unittests/Support/LSP Transport.cpp

2026-09-05 19:56:31 UTC by Aiden Grossman via GitHub on ⎇

main

[Support] Fix -Wunused-template from debugString

This is not used in the header (outside of a non-instantiated template),
so triggers -Wunused-template. Move it into the class definition to
prevent this without adding any namespace pollution.

Reviewers: MaskRay, kazutakahirata

Pull Request: https://github.com/llvm/llvm-project/pull/221478

Delta		File
+8	-7	llvm/include/llvm/Support/LSP/Transport.h
+1	-1	llvm/unittests/Support/LSP/Transport.cpp
+9	-8	2 files

LLVM/project b04639f — lldb/tools/lldb-fuzzer/lldb-target-fuzzer CMakeLists.txt target.dict

2026-09-05 19:55:38 UTC by Yao Qi via GitHub on ⎇

main

[lldb] Add a fuzzing dictionary for lldb-target-fuzzer (#221348)

target.dict gives the mutator the magic bytes and required keys for
every object file format.  Without a seed dictionary, blind mutation
essentially never lands the exact multi-byte magic these formats gate
on.

Assisted-by: claude

Delta		File
+52	-0	lldb/tools/lldb-fuzzer/lldb-target-fuzzer/target.dict
+1	-0	lldb/tools/lldb-fuzzer/lldb-target-fuzzer/CMakeLists.txt
+53	-0	2 files

LLVM/project 2e4ad2f — llvm/docs CodeReview.rst

2026-09-05 19:52:53 UTC by Stan Ulbrych via GitHub on ⎇

main

[docs] Fix a broken link in the 'Non-Experts Should Review Code' section (#221461)

Delta		File
+3	-2	llvm/docs/CodeReview.rst
+3	-2	1 files

LLVM/project f98cf8e — llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU div_i128.ll select-undef.ll

2026-09-05 19:46:28 UTC by Arseniy Obolenskiy via GitHub on ⎇

main

[AMDGPU] Freeze select condition before splitting into two halves (#219942)

Delta		File
+108	-72	llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-select.mir
+23	-0	llvm/test/CodeGen/AMDGPU/select-undef.ll
+12	-8	llvm/test/CodeGen/AMDGPU/div_i128.ll
+5	-3	llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1	-0	llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+149	-83	5 files

LLVM/project 3daf505 — llvm/docs MemProf.md

2026-09-05 19:35:30 UTC by Aiden Grossman via GitHub on ⎇

main

[MemProf][Docs] Add more information on static data partitioning (#220446)

Clarify some sentences that I found hard to parse. Also update the docs
now that a linker script is no longer required.

Delta		File
+1	-2	llvm/docs/MemProf.md
+1	-2	1 files

LLVM/project c744816 — llvm/include/llvm/Support/LSP Transport.h, llvm/unittests/Support/LSP Transport.cpp

2026-09-05 19:18:22 UTC by Aiden Grossman on ⎇

users/boomanaiden154/support-remove-static-from-debugstring-template

feedback

Created using spr 1.3.7

Delta		File
+8	-7	llvm/include/llvm/Support/LSP/Transport.h
+1	-1	llvm/unittests/Support/LSP/Transport.cpp
+9	-8	2 files

LLVM/project 8f270bc — llvm/test/Transforms/Attributor nofpclass-bitcast-int-to-fp.ll

2026-09-05 19:13:18 UTC by ZERICO2005 via GitHub on ⎇

main

[KnownFPClass] Add regression tests for #174869 (#220279)

This PR just adds regression tests for
https://github.com/llvm/llvm-project/issues/174869

Otherwise, the original issue was fixed by
https://github.com/llvm/llvm-project/pull/215708 for
`APFloat::isIEEELikeFP` types (bfloat16, and ieee16/32/64/128).

Delta		File
+28	-0	llvm/test/Transforms/Attributor/nofpclass-bitcast-int-to-fp.ll
+28	-0	1 files

LLVM/project 3cc6423 — llvm/test/Transforms/SLPVectorizer/AMDGPU inst-count-heuristic.ll

2026-09-05 19:09:37 UTC by Pablo Reble via GitHub on ⎇

main

[SLP][AMDGPU][NFC] Remove unreachable GFX940/GFX941 checks (#220745)

`inst-count-heuristic.ll` only runs
`-check-prefix=GFX950/GFX942/GFX906;` the `GFX941/GFX940 CHECK` blocks
had no matching `RUN` line and were never executed.

Delta		File
+0	-42	llvm/test/Transforms/SLPVectorizer/AMDGPU/inst-count-heuristic.ll
+0	-42	1 files