LLVM/project c754214 — llvm/test/CodeGen/LoongArch/lasx vec-reduce-xor.ll vec-reduce-umin.ll, llvm/test/CodeGen/LoongArch/lasx/ir-instruction extractelement.ll

[LoongArch] Add patterns for `[X]VSTELM_W` to adapt to LA32 (#165224)
DeltaFile
+27-58llvm/test/CodeGen/LoongArch/lasx/vec-trunc-combine.ll
+15-28llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
+9-32llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
+16-22llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+11-24llvm/test/CodeGen/LoongArch/lasx/vec-reduce-xor.ll
+11-24llvm/test/CodeGen/LoongArch/lasx/vec-reduce-umin.ll
+89-18823 files not shown
+253-52029 files

LLVM/project 6ffccfa — lldb/source/Plugins/SymbolFile/NativePDB SymbolFileNativePDB.h SymbolFileNativePDB.cpp, lldb/test/API/functionalities/breakpoint/breakpoint_language TestBreakpointLanguage.py

[lldb][NativePDB] Implement FindFunctions with a regular expression (#233467)

`SymbolFileNativePDB::FindFunctions(const RegularExpression &, ...)` is
an empty stub, so regex breakpoints never find a `Function` and fall
back to the symbol table. Symbols carry no language, so a breakpoint's
language filter cannot find anything
(`BreakpointCreateByRegex("func_from", eLanguageTypeC_plus_plus)`
resolves to both the C and the C++ function).

This patch matches the regex against the function basenames and full
names (which also contain the mangled names), as `SymbolFileDWARF` does
with its index.

Fixes `TestBreakpointLanguage` with PDB.

rdar://190426286
DeltaFile
+52-34lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
+4-0lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
+0-1lldb/test/API/functionalities/breakpoint/breakpoint_language/TestBreakpointLanguage.py
+56-353 files

LLVM/project 885e40a — mlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp, mlir/test/Conversion/TosaToLinalg tosa-to-linalg.mlir

[mlir][tosa] Don't broadcast non-constant mul shift and negate zero points (#233121)

When the `tosa.mul` shift or the `tosa.negate` zero points are not
constants,
the TosaToLinalg lowering passed them to the elementwise broadcasting
helpers,
which assume every operand has the rank of the input. These operands are
always
`tensor<1xT>`, so the lowering asserted for rank-0 inputs, for dynamic
shapes,
and for inputs with a size-1 dimension after the first (e.g. `3x1`).
Separately, when only one negate zero point was non-constant, the body
read both
zero points as block arguments although neither was passed to the
`linalg.generic`.
This patch keeps these single-element operands out of broadcasting and
passes
them to the `linalg.generic` with an indexing map that always reads
element 0.

    [12 lines not shown]
DeltaFile
+67-0mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
+38-19mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+105-192 files

LLVM/project 9098cdc — clang-tools-extra/clangd/unittests FeatureModulesTests.cpp DiagnosticsTests.cpp

[clangd][NFC] Add regression coverage for current clang-tidy integration (#231461)

While moving clang-tidy into a FeatureModule, I found coverage gaps that
made it easy to accidentally change existing behavior.
This PR adds several tests to address this gap to make sure following
clang-tidy integration move into feature module won't lead to any
regressions.
The following functionalities are covered with with tests from this PR:
- Compiler warnings with no tidy checks enabled: `NOLINT` and
`WarningsAsErrors` must not affect them.
- Warning options from `clang-tidy` configuration: both `ExtraArgs` and
`ExtraArgsBefore` lists must affect warnings emitted during frontend
initialization.
- Configuration lookup: use `clangd`s requested filename, even when the
frontend input has a relative or different spelling.
- Consumer initialization: running `clang-tidy` must not reinitialize an
already initialized AST consumer.

These changes prepare moving the clang-tidy implementation into a

    [2 lines not shown]
DeltaFile
+84-0clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
+33-0clang-tools-extra/clangd/unittests/FeatureModulesTests.cpp
+117-02 files

LLVM/project e57a96c — libc/src/__support/mathvec common_constants.h logf.h, libc/test/src/mathvec logf_test.cpp

[libc][mathvec] Vectorise logf (#231190)

Replaces loop over scalar logf with a fully vectorised implementation.
DeltaFile
+94-7libc/src/__support/mathvec/logf.h
+60-0libc/src/__support/mathvec/common_constants.h
+12-3libc/test/src/mathvec/logf_test.cpp
+8-1libc/test/src/mathvec/exhaustive/logf_test.cpp
+174-114 files

LLVM/project 17ea6e7 — .github/workflows libc-fullbuild-tests.yml

Change from aarch64 runner to x86
DeltaFile
+1-1.github/workflows/libc-fullbuild-tests.yml
+1-11 files

LLVM/project f8b3f7d — .github/workflows libc-fullbuild-tests.yml

[libc] Enable baremetal Armv7-M pre-merge tests

The tests are run using QEMU system emulation on AArch64 GitHub runners.

No strong reason to use AArch64 instead of x86_64 as it is via emulation
anyway. But AArch64 runners are cheaper, so that might prove beneficial.
DeltaFile
+2-2.github/workflows/libc-fullbuild-tests.yml
+2-21 files

LLVM/project f0ce553 — libc/cmake/caches armv7m-none-eabi.cmake

[libc] Application and testing support in baremetal Armv7-M CMake cache file

This patch adds support for linking and running applications, including
tests, targeting baremetal Armv7-M to the corresponding CMake cache
file.

The cache file takes into consideration if compiler-rt is enabled or
not. If it is, then linking applications is possible, and the relevant
CMake variables are set to enable test runs. If not, then only the libc
build is possible and enabled.

Particular libc configuration options, memory mappings, and QEMU options
are based on what Arm Toolchain for Embedded uses in its fully working
downstream testing.
DeltaFile
+47-1libc/cmake/caches/armv7m-none-eabi.cmake
+47-11 files

LLVM/project 74c0133 — .github/workflows/containers/libc Dockerfile

[libc] Add qemu-system-arm to libc Dockerfile for Arm baremetal testing

This patch adds `qemu-system-arm` to the packages installed into the
Docker image so that we can run Arm baremetal tests.

It is only installed on the AArch64 platforms because we intend to run
the tests on AArch64 GitHub runners. Therefore there is no need to
install on x86_64.
DeltaFile
+6-0.github/workflows/containers/libc/Dockerfile
+6-01 files

LLVM/project 8591405 — .github/workflows/containers/libc Dockerfile

Install qemu-system-arm in all host runners
DeltaFile
+2-7.github/workflows/containers/libc/Dockerfile
+2-71 files

LLVM/project 9dc7ebd — .github/workflows/containers/libc Dockerfile

Change from aarch64 to x86_64
DeltaFile
+2-2.github/workflows/containers/libc/Dockerfile
+2-21 files

LLVM/project be57c1d — lldb/source/Plugins/SymbolFile/NativePDB SymbolFileNativePDB.h SymbolFileNativePDB.cpp, lldb/test/API/python_api/frame/get-variables TestGetVariables.py

[lldb][NativePDB] Parse static variables declared in functions (#230561)

A static or `thread_local` variable declared in a function is an
`S_LDATA32`/`S_LTHREAD32` record in the scope of its procedure (or
block) in the module stream. `ParseVariablesForBlock` only handles
locals, register/frame-relative records and constants, so these
variables don't exist (`fr v static_var` fails).

This patch creates a static (or thread-local) variable owned by the
enclosing block for those records, with the same location expression as
a global.

Fixes `TestGetVariables` with PDB debug info.

rdar://190424226
DeltaFile
+85-0lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
+4-1lldb/test/Shell/SymbolFile/NativePDB/thread-locals.cpp
+2-0lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.h
+0-1lldb/test/API/python_api/frame/get-variables/TestGetVariables.py
+91-24 files

LLVM/project fd05eb8 — lldb/test tsan-suppressions.txt

[lldb][test] Fill out tsan-suppressions.txt with bot failures (#234155)

With this suppressions file, the bot should turn green and can actually
serve its purpose of prevent further regressions.

I decided to add both optimized and unoptimized markers as it only seems
to be necessary for one race. If this will become necessary for more
tests, then I think we need to come up with a policy where we only
maintain this file for unoptimized builds.

assisted-by: claude
DeltaFile
+21-0lldb/test/tsan-suppressions.txt
+21-01 files

LLVM/project c4a6940 — llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Transforms/IndVarSimplify implied-nonneg-from-unsigned-bound.ll

[SCEV] Derive x >=s 0 from x <u y and y <=u 2^(n-1)

Let n be the bit width of x and y. If x <u y and y <=u 2^(n-1), then
x <u 2^(n-1), so x >=s 0. Here y <=u 2^(n-1) means y >=s 0 or
y == INT_MIN. In the same way, if x <=u y and y <u 2^(n-1), then
x >=s 0.

This lets a guard like x <u len prove x >=s 0 when len is non-negative.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+22-35llvm/test/Transforms/IndVarSimplify/implied-nonneg-from-unsigned-bound.ll
+21-0llvm/lib/Analysis/ScalarEvolution.cpp
+43-352 files

LLVM/project 4f83cc8 — llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Transforms/IndVarSimplify implied-cond-different-signedness.ll

[SCEV] Prove signed/unsigned implications in either operand order

SCEV could prove these implications only with the operands in the same
order:
- If a <u b and a, b have the same sign, then a <s b.
- If a <s b and a, b have the same sign, then a <u b.
- If a <u b and b >=s 0, then a <s b.
- If a <s b and b <s 0, then a <u b.

For example, it proved a <s b from a <u b and b >=s 0, but not b >s a.
Now it proves them in either order.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+3-14llvm/test/Transforms/IndVarSimplify/implied-cond-different-signedness.ll
+7-1llvm/lib/Analysis/ScalarEvolution.cpp
+10-152 files

LLVM/project 79776da — llvm/include/llvm/Analysis ScalarEvolution.h, llvm/lib/Analysis ScalarEvolution.cpp

[SCEV][NFC] Factor isImpliedCondViaSignFlippedPred out of isImpliedCondBalancedTypes

Move the code that proves a condition from a found condition with the
other signedness into a new private function.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+39-39llvm/lib/Analysis/ScalarEvolution.cpp
+8-0llvm/include/llvm/Analysis/ScalarEvolution.h
+47-392 files

LLVM/project 9758dc2 — clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/Transforms/abi-lowering amdgpu-calling-conv.cir

[CIR] Support direct-in-registers aggregates and array coercions in call-conv lowering
DeltaFile
+126-2clang/test/CIR/Transforms/abi-lowering/amdgpu-calling-conv.cir
+19-2clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+145-42 files

LLVM/project 7d3f111 — mlir/lib/Dialect/Affine/Transforms SuperVectorize.cpp, mlir/test/Dialect/Affine/SuperVectorize uniform_divergent.mlir

[mlir][affine] Fix SuperVectorizer crash on uniforms from multi-result ops (#234531)

`registerValueVectorReplacement` registered the defining op of a uniform
as replaced by its broadcast, which led to an assert when said op had
several results. Since the defining op is outside the vectorized loop
and not replaced, only register the value replacement.

Fixes an assert on e.g.:
```mlir
// mlir-opt -affine-super-vectorize="virtual-vector-size=128"
func.func @uniform_multi_result(%in: memref<512xi32>, %a: i32, %b: i32) {
  %sum, %overflow = arith.addui_extended %a, %b : i32, i1
  affine.for %i = 0 to 512 {
    %ld = affine.load %in[%i] : memref<512xi32>
    %add = arith.addi %ld, %sum : i32
  }
  return
}
```
DeltaFile
+17-0mlir/test/Dialect/Affine/SuperVectorize/uniform_divergent.mlir
+3-5mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
+20-52 files

LLVM/project 531b9d2 — libcxx/docs VendorDocumentation.md

[libc++][docs] Fix the name of the availability attribute macro (#234380)

The vendor documentation had a typo (MARKUP vs ATTRIBUTE).
DeltaFile
+1-1libcxx/docs/VendorDocumentation.md
+1-11 files

LLVM/project 25dd486 — clang/unittests/CIR ControlFlowTest.cpp, mlir/lib/Interfaces ControlFlowInterfaces.cpp

Reland "[mlir] Fix false positive loops in RegionBranchOpInterface::hasLoop"

Relands #233784, reverted in #234573 because it broke two CIR unit
tests.

Those tests expected hasLoop() to be true for cir.await and
cir.coroutine, although neither has a cycle: resume is reachable from
ready both directly and through suspend, and the coroutine reaches exit
and destroy along several paths. That was the false positive this change
fixes. The relanded change updates both expectations to false.

Original description:

`RegionBranchOpInterface::hasLoop` reported a loop whenever its
traversal popped a region it had already visited. The worklist gets one
entry per successor of each terminator, so a region reachable along two
paths was popped twice even without a cycle, for example when two
terminators of a region branch to the same successor region.


    [8 lines not shown]
DeltaFile
+92-68mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+129-1mlir/unittests/Interfaces/ControlFlowInterfacesTest.cpp
+4-5clang/unittests/CIR/ControlFlowTest.cpp
+225-743 files

LLVM/project 322b1a2 — llvm/include/llvm/IR IRBuilder.h, llvm/lib/CodeGen AtomicExpandPass.cpp

[IRBuilder] Remove insertion block (#234245)

The insertion point already stores the block it belongs to, so we should
not be storing a separate insertion block.

Removing this requires some fixes, because there are a few places where
the insertion point gets invalidated, and the insertion block is still
accessed afterwards. In cases like this, we should save the insertion
block before iterator invalidation occurs.

Completes the work started in
https://github.com/llvm/llvm-project/pull/228117.
DeltaFile
+13-22llvm/include/llvm/IR/IRBuilder.h
+13-11llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+9-4mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+6-4llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+1-1llvm/lib/CodeGen/AtomicExpandPass.cpp
+1-0llvm/lib/IR/IRBuilder.cpp
+43-426 files

LLVM/project e037d7d — llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Transforms/IndVarSimplify implied-cond-different-signedness.ll

[SCEV] Try other implications when sign-flipped ones fail

SCEV's isImpliedCondBalancedTypes tries to prove an implication
through several rules. There are rules for when a predicate to prove
is sign-flipped from the found predicate, and also there are other
rules, which, for example, try to prove the implication through
ranges.

Before, if a proof for a sign-flipped rule implication returned false,
we wouldn't check other rules and just bail out with false result too.

Now make those rules fall-through - if one rule couldn't be proven,
try other rules in the function.

An example query is x - 5 <s 5 with x <u 10 known.
The implication "a <u b and b >=s 0 --> a <s b" matches it,
but x - 5 <u 5 with x <u 10 known does not hold (e.g. x = 0),
so SCEV gave up.


    [5 lines not shown]
DeltaFile
+13-10llvm/lib/Analysis/ScalarEvolution.cpp
+1-3llvm/test/Transforms/IndVarSimplify/implied-cond-different-signedness.ll
+14-132 files

LLVM/project 8716073 — llvm/lib/Analysis Loads.cpp, llvm/test/Transforms/InstCombine load-cmp.ll

[Loads] Avoid exit when mul/shl look-through fails (#234564)

Fixes a logical error introduced by #222574 where
decomposeLinearExpression would exit early if mul/shl look-through fails
to find a match.

In this fix, we instead avoid applying the constant index scale factor
to VarIndex.
DeltaFile
+26-0llvm/test/Transforms/InstCombine/load-cmp.ll
+11-7llvm/lib/Analysis/Loads.cpp
+37-72 files

LLVM/project 6e5ccf8 — clang/lib/CIR/Dialect/Transforms CallConvLoweringPass.cpp, clang/test/CIR/Transforms/abi-lowering amdgpu-indirect-nyi.cir amdgpu-byref.cir

update nyi tests
DeltaFile
+55-0clang/test/CIR/Transforms/abi-lowering/amdgpu-byref.cir
+1-16clang/test/CIR/Transforms/abi-lowering/amdgpu-indirect-nyi.cir
+2-3clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
+58-193 files

LLVM/project 1faf8db — clang/lib/Interpreter DeviceOffload.h DeviceOffload.cpp, clang/unittests/Interpreter DeviceOffloadTest.cpp

[clang-repl] Emit an AMDGPU object for the HIP device module (#234498)

This PR adds code generation to the `IncrementalHIPDeviceParser`. It
takes the last PTU's device module and converts it into an AMDGPU device
object in the memory. `GenerateOffloadBinary()` is updated to call it
and after that it returns the same error as before.
DeltaFile
+30-2clang/lib/Interpreter/DeviceOffload.cpp
+27-0clang/unittests/Interpreter/DeviceOffloadTest.cpp
+5-0clang/lib/Interpreter/DeviceOffload.h
+62-23 files

LLVM/project 43d83c3 — clang/docs ReleaseNotes.md, clang/lib/CodeGen CGCall.cpp

[clang][CodeGen] Emit return after musttail call to noreturn function

A musttail call to a noreturn function (`__attribute__((noreturn))`,
`_Noreturn`, `exit()`, `longjmp()`, ...) gets `unreachable` after it
instead of `ret`, which fails the verifier with "musttail call must
precede a ret". Release builds skip the verifier, so -O2 crashes with
"failed to perform tail call elimination on a call site marked musttail"
and -O0 silently emits a regular call. Sema only rejects `[[noreturn]]`
callees (#77727), so all other spellings get through.

Implicit musttail calls produce the same invalid IR: `swiftasynccall`,
and the `-fptrauth-calls` thunk for a pointer to a noreturn virtual
member function. The latter crashes even at -O0, without any `musttail`
in the source.

The noreturn path in `EmitCall` runs before the musttail one. This patch
skips it for musttail calls, so they get a `ret` like any other musttail
call. As a side effect, the musttail checks there (e.g. the noexcept
mismatch error) now apply to noreturn callees too.

    [15 lines not shown]
DeltaFile
+29-0clang/test/CodeGen/musttail-noreturn.c
+14-0clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
+3-2clang/lib/CodeGen/CGCall.cpp
+5-0clang/docs/ReleaseNotes.md
+51-24 files

LLVM/project c46c67e — llvm/test/CodeGen/LoongArch/lsx fptosi-sat.ll

update after rebase
DeltaFile
+2-4llvm/test/CodeGen/LoongArch/lsx/fptosi-sat.ll
+2-41 files

LLVM/project 54b5654 — llvm/lib/Transforms/Scalar LoopStrengthReduce.cpp, llvm/test/Transforms/LoopStrengthReduce/RISCV loop-exit-equality.ll

[LSR] Refine equality loop exit replacement

Add coverage for an exit count that reaches the recurrence period.

Simplify cleanup of the replaced comparison.

Assisted-by: TRAE CLI (GPT-5.6-Sol)
DeltaFile
+67-0llvm/test/Transforms/LoopStrengthReduce/RISCV/loop-exit-equality.ll
+1-3llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
+68-32 files

LLVM/project 4e28cc3 — clang/lib/CodeGen/TargetBuiltins RISCV.cpp, clang/test/CodeGen/RISCV rvp-intrinsics.c

[RISCV][P-ext] Support Packed Multiplication with Widening Horizontal Addition and Accumulate intrinsics (#234450)
DeltaFile
+94-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+86-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+72-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+52-0cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
+34-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+34-0clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
+372-03 files not shown
+401-09 files

LLVM/project a701b04 — llvm/test/CodeGen/LoongArch/lasx vec-reduce-xor.ll vec-reduce-umin.ll, llvm/test/CodeGen/LoongArch/lasx/ir-instruction extractelement.ll

[LoongArch] Add patterns for `[X]VSTELM_W` to adapt to LA32
DeltaFile
+27-58llvm/test/CodeGen/LoongArch/lasx/vec-trunc-combine.ll
+15-28llvm/test/CodeGen/LoongArch/lasx/ir-instruction/extractelement.ll
+9-32llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll
+16-22llvm/test/CodeGen/LoongArch/lasx/xvexth.ll
+11-24llvm/test/CodeGen/LoongArch/lasx/vec-reduce-xor.ll
+11-24llvm/test/CodeGen/LoongArch/lasx/vec-reduce-umin.ll
+89-18822 files not shown
+251-51628 files