[CIR] Handle scalar-type element GEP in GlobalView offset computation
computeGlobalViewIndicesFromFlatOffset navigated into array and record
types to convert a flat byte offset into structured GEP indices, but hit
llvm_unreachable("unexpected type") when the pointee was a scalar integer
(e.g. !s8i for const char *).
This happens when a constexpr struct has a pointer field initialized to a
global string-literal address plus a non-zero byte offset. Classic
CodeGen emits getelementptr i8, ptr @str, i64 N; CIR represents it as a
GlobalViewAttr with index [N]. getAddrOfConstantStringFromLiteral builds
the GlobalViewAttr with a ptr-to-char pointee (not ptr-to-array), so
applyOffset hands a char type to the offset navigator.
Add a cir::IntType case that computes offset / sizeof(element) as the flat
GEP index, mirroring the array-element logic, in both
computeGlobalViewIndicesFromFlatOffset and
computeOffsetFromGlobalViewIndices. llvm_unreachable is kept for
genuinely unexpected types.
[CIR] Fix const-array lowering for long double (#203617)
A global array constant of `long double` crashes CIR's lowering to LLVM.
`getZeroInitFromType<APFloat>` in LoweringHelpers seeds a zero-filled vector
for the const-array path but only handled `SingleType`/`DoubleType`, asserting
"only float and double supported" on every other CIR floating-point type. The
const-array dispatch already routes any `cir::FPTypeInterface` element type into
`getZeroInitFromType<APFloat>`, so `long double` (`x86_fp80`) hit the assert even
though classic codegen lowers it fine. The SingleSource ieee-copysign2 test
exercises exactly this.
The fix derives the zero from the element type's APFloat semantics via
`cir::FPTypeInterface::getFloatSemantics()`, the same construction `FPAttr::getZero`
uses, which covers float, double, long double, FP128, half, and bfloat. The test
pins all of those against classic codegen output.
[Support] Move the command-line Option constructor out of line (#202847)
Move the shared `Option` base constructor from `CommandLine.h` to
`CommandLine.cpp`. Typed `opt`, `list`, and `bits` constructors remain
unchanged; option construction gains one direct non-virtual call and
parsing behavior is unaffected.
A native AArch64 Release `opt` shrinks by 358,576 bytes, with `__text`
down 229,796 bytes and dyld fixups unchanged.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
[docs] Enforce unambiguous toctree in llvm/docs
It seems like using a non-`hidden` `toctree` for page navigation is a
bit of a trap, in that every doc must have a single unique path through
the global toctree to the root doc, and it is very easy to end up with
multiple.
This patch tries to address the warnings (actually infos, hence why it
does not fail the build) in llvm/docs/, namely:
$ sphinx-build -b html -jauto llvm/docs/ /tmp/sphinx-out
checking consistency...
llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md: document is referenced in multiple toctrees: ['UserGuides', 'AMDGPUUsage'], selecting: UserGuides <- AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack
llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst: document is referenced in multiple toctrees: ['UserGuides', 'AMDGPUUsage'], selecting: UserGuides <- AMDGPUDwarfExtensionsForHeterogeneousDebugging
llvm/docs/CommandGuide/llvm-reduce.rst: document is referenced in multiple toctrees: ['CommandGuide/index', 'CommandGuide/index', 'Reference'], selecting: Reference <- CommandGuide/llvm-reduce
llvm/docs/GitHub.rst: document is referenced in multiple toctrees: ['GettingInvolved', 'UserGuides'], selecting: UserGuides <- GitHub
llvm/docs/GlobalISel/IRTranslator.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/IRTranslator
llvm/docs/GlobalISel/InstructionSelect.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/InstructionSelect
llvm/docs/GlobalISel/Legalizer.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/Legalizer
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[docs] Create utils/docs
llvm-project is home to many sphinx documentation sites, each with
configuration quirks and bespoke extentions.
The sphinx config model makes sharing code somewhat difficult. There
are options like sphinx-multiproject, but some of our docs builds are
out of the source tree while some are done out of the binary tree, so
the multiproject configuration itself would need to be generated. It
also would impose more uniformity around extensions than required.
This change instead creates a python package at utils/docs/llvm_sphinx
and makes it available to all sphinx-build processes via PYTHONPATH.
Each conf.py does not modify its own sys.path because not all builds are
out of the source tree, so there isn't a stable relative path to use to
refer to the utils/docs/ directory.
Type checking via pyright in new package is pinned to being python 3.8
compatible.
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Bump minimum required sphinx Python to 3.8
There seems to be de-facto use of at least 3.6 in docs, namely:
* Use of pathlib (3.4) in various places
* Format f-strings (3.6) and used in clang/docs/ghlinks.py
I don't see a strong reason to maintain the divide in minimum version
between test/docs, especially considering the "FIXME" indicating
the 3.0 lower bound was just a guess to begin with.
Change-Id: I11e00295ae0a13ec0f1c5cefbb2fdd2db272b152
[docs] Add BOLTAArch64OptimizationStatus to toctree
Building docs-bolt-html fails with:
Warning, treated as error:
/home/slinder1/llvm-project/scratch/bolt/docs/BOLTAArch64OptimizationStatus.rst:document isn't included in any toctree
Just add the orphan document to the toctree in the index to silence
this. If there is a better parent it can be moved somewhere else in the
tree.
Change-Id: I1d26d96d5485d97d29231da89f8c8408b375c41f
[AArch64] Move the perfect-shuffle table out of line (#202617)
Move the generated `PerfectShuffleTable` from `AArch64PerfectShuffle.h`
to one hidden definition in `AArch64PerfectShuffle.cpp`. The three
consumers retain direct indexed access.
On Darwin arm64 Release, `__TEXT,__const` decreases by 26,240 bytes and
stripped AArch64-only `llc` decreases from 48,207,312 to 48,190,816
bytes (-16,496 bytes).
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
[X86] Replace alignedstore/alignedload custom predicates with MinAlignment. NFC (#201980)
These custom alignment predicates predate PatFrag's dedicated
MinAlignment field. Replace them with per-size fragments
(alignedstore128/256/512, alignedload128/256/512) so both SelectionDAG
and GlobalISel get the alignment check without hand-written predicate
code.
Stacked above https://github.com/llvm/llvm-project/pull/197860; stacked
below https://github.com/llvm/llvm-project/pull/197861.
[clangd] Keep ModuleCache alive for captured preamble AST (#203952)
Since #164889 made ModuleManager's ModuleCache reference non-owning, the
preamble's CompilerInstance solely owns the module buffers so retain the
shared_ptr<ModuleCache> in CapturedASTCtx.
Fixes #203799
[OpenMP] Introduce the ompx_name clause for kernel naming
This adds support for the ompx_name clause that allows users to specify
custom kernel names for OpenMP target offloading regions. The clause
accepts a string literal and overrides the default compiler-generated
kernel names.
Example usage:
#pragma omp target ompx_name("my_kernel")
{ ... }
Kernel names need to be unique or they are diagnosed at compile or link
time as errors.
Co-Authored-By: Claude (claude-sonnet-4.5) <noreply at anthropic.com>
[OpenMP] Use ext linkage for kernels handles and globals handles keep linkage
Host handles are now emmitted with external linkage to clash if two
kernels with the same name are registered. This could have happen right
now and silently corrupt the program, but it can happen more easily once
we allow users to name their kernels.
In the same patch we make global variable handles retain the linkage of
the global variable, forcing clashes for external ones and continue to
support weak use cases.
[Clang][BPF] Support btf_type_tag on typedef underlying types (#203089)
Emil Tsalapatis suggested to add type tag for typedef like below:
```
$ cat tag.c
#define __type_tag(x) __attribute__((btf_type_tag(x)))
struct bar { int c; int d; };
typedef struct bar __type_tag("a") bar_t;
int use(bar_t *v)
{
return v->c + v->d;
}
```
This makes the code simpler -- using `bar_t *v` instead of the longer
form `struct bar __type_tag("a") *v`.
So the goal is to allow type tag for typedef underlying types. The
following describes the main changes:
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[lldb][NFC] Remove FileSpec::GetPathAsConstString (#203428)
I'm trying to clean up the FileSpec API. Even if it is currently
implemented as a pair of ConstStrings, I think it would be better if
FileSpec users only created new ConstStrings as necessary.
[RFC][CodeGen] Add generic target feature checks for intrinsics
This PR adds target-independent infrastructure for annotating LLVM intrinsics
with required subtarget feature expressions.
It introduces a TargetFeatures string field to intrinsic TableGen records.
TableGen emits an intrinsic-to-feature mapping table.
Both SelectionDAG and GlobalISel now perform this check before lowering target
intrinsics. This allows targets to opt in by annotating intrinsic definitions
directly, rather than adding custom checks during lowering, legalization, or
instruction selection.
This PR uses one AMDGPU intrinsic as an example.
[RFC][CodeGen] Add generic target feature checks for intrinsics
This PR adds target-independent infrastructure for annotating LLVM intrinsics
with required subtarget feature expressions.
It introduces a TargetFeatures string field to intrinsic TableGen records.
TableGen emits an intrinsic-to-feature mapping table.
Both SelectionDAG and GlobalISel now perform this check before lowering target
intrinsics. This allows targets to opt in by annotating intrinsic definitions
directly, rather than adding custom checks during lowering, legalization, or
instruction selection.
This PR uses one AMDGPU intrinsic as an example.
[LangRef] allow omitting `va_end` (#203087)
In Rust we'd like to be able to omit `va_end`: it is a no-op on all
currently supported targets, and the requirement that it is paired
exactly with `va_start` and `va_copy` (in the same frame) cannot be
unified with a language with move semantics.
cc https://github.com/rust-lang/rust/pull/157627https://github.com/rust-lang/rust/pull/155697
[RFC][CodeGen] Add generic target feature checks for intrinsics
This PR adds target-independent infrastructure for annotating LLVM intrinsics
with required subtarget feature expressions.
It introduces a TargetFeatures string field to intrinsic TableGen records.
TableGen emits an intrinsic-to-feature mapping table.
Both SelectionDAG and GlobalISel now perform this check before lowering target
intrinsics. This allows targets to opt in by annotating intrinsic definitions
directly, rather than adding custom checks during lowering, legalization, or
instruction selection.
This PR uses one AMDGPU intrinsic as an example.
[AMDGPU][NFC] Templatise and roundtrip gfx12_asm_vop3_dpp16.s
This is effectively the changes between the non-template versions
of gfx11/12_asm_vop3_dpp16.s applied on top of the templatised
gfx11_asm_vop3_dpp16.s.
