LLVM/project 4a8b939clang/lib/Sema SemaLambda.cpp, clang/test/CodeGenCXX optnone-pragma-optimize-off.cpp

[Clang][Sema] Fix lambda attribute processing order with clang optimize off (#217194)

This PR fixes a regression from #215173 where an `always_inline` lambda
on a `#pragma clang optimize off` will throw a compiler error. For
example,

```
#pragma clang optimize off

// 1. function:
__attribute__((always_inline)) void front_func() {}

// 2. lambda:
auto trailing_lambda = []() __attribute__((always_inline)) { return 42; };
```

causes only an error for the lambda, not function:

```

    [16 lines not shown]
DeltaFile
+17-1clang/test/CodeGenCXX/optnone-pragma-optimize-off.cpp
+4-4clang/lib/Sema/SemaLambda.cpp
+21-52 files

LLVM/project 713b7c4llvm/lib/Target/X86/AsmParser X86AsmParser.cpp

[X86] Remove write-only variable OffsetOperatorLoc (NFC) (#217231)

This patch removes OffsetOperatorLoc and getOffsetLoc in
IntelExprStateMachine.  Nobody calls getOffsetLoc, so
OffsetOperatorLoc is write-only.

OffsetOperatorLoc and getOffsetLoc were introduced on Dec 30, 2019 in
commit 4a7aa252a32a94b1bb61b3dc7f027b4a27ae334f, but getOffsetLoc has
never been called.

Assisted-by: Antigravity
DeltaFile
+2-7llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+2-71 files

LLVM/project f652cd6mlir/lib/IR MLIRContext.cpp, mlir/lib/Support StorageUniquer.cpp

[mlir][IR] Add transient scope support for resettable MLIRContext. (#217320)

We have cases where we have many context being used to compile
independent modules. Creating a context per ends up being rather
expensive and the only reason to not reuse contexts more is bloat over
time. This changes adds a "transient" scope which can be used for such
cases. Initially I had tried a "cheap fork" approach for contexts, this
is complimentary to that (that one allows for independent contexts
cheaply), while this one is less invasive.

Introduce an overlay/layered state architecture in StorageUniquer and
MLIRContext to enable efficient scoping and rollback of transient types,
attributes, affine expressions, and distinct attributes added since
entering a transient scope.

When executing repeated compilation passes or running in long-lived
compiler services (e.g. JITs, servers, REPLs), allocating and destroying
an MLIRContext incurs significant overhead (~3.7 ms per context) to
re-register and load dialects. This change allows freezing an

    [4 lines not shown]
DeltaFile
+201-7mlir/lib/Support/StorageUniquer.cpp
+193-0mlir/unittests/IR/MLIRContextResetTest.cpp
+107-0mlir/lib/IR/MLIRContext.cpp
+105-0mlir/unittests/Support/StorageUniquerTest.cpp
+66-0mlir/test/python/ir/context_lifecycle.py
+50-0mlir/test/CAPI/ir.c
+722-713 files not shown
+949-1619 files

LLVM/project c9623a0llvm/lib/Transforms/Vectorize VPlanTransforms.cpp LoopVectorizationLegality.cpp, llvm/test/Transforms/LoopVectorize early_exit_combined_exits_epilogue.ll early_exit_with_stores.ll

[LV] Vectorize uncountable early exit store loops with combined conditions

Support the case where both the countable and uncountable exit conditions
have been combined by earlier passes.
DeltaFile
+362-9llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
+119-31llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+118-2llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+75-4llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
+73-0llvm/test/Transforms/LoopVectorize/early_exit_combined_exits_epilogue.ll
+71-0llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+818-4610 files not shown
+932-6116 files

LLVM/project de79344flang/lib/Optimizer/Transforms FIRToSCF.cpp, flang/test/Fir/FirToSCF do-extra.fir normalize.fir

[flang][FIRToSCF] Recompute a typed induction variable in closed form (#217051)

Example:
```fortran
do i = 1, n
  a(i) = a(i) + 1
end do
```

In this code, `fir.do_loop` carries `i` in its own integer type, but
`fir-to-scf` normalizes the loop to a canonical `index` loop and passes `i`
through `iter_args`.

Fix: recompute `i` in closed form from the canonical induction variable, for
every step sign. No `iter_arg` and no loop result are added; the closed form
does not inherit `nsw`. Loops with a final value keep carrying it, since
their result is observable after the loop.
DeltaFile
+85-19flang/test/Fir/FirToSCF/do-loop.fir
+19-18flang/lib/Optimizer/Transforms/FIRToSCF.cpp
+4-4flang/test/Fir/FirToSCF/normalize.fir
+3-3flang/test/Fir/FirToSCF/do-extra.fir
+111-444 files

LLVM/project 7678fadllvm/include/llvm/CodeGen/GlobalISel IRTranslator.h, llvm/lib/CodeGen/GlobalISel IRTranslator.cpp

[GISel] Move IRTranslatorImpl into cpp file (#217349)

This is not needed in the header and including it in the header
regresses compile times for PassBuilder.cpp.
DeltaFile
+0-779llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
+751-0llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
+751-7792 files

LLVM/project 668c44bllvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen/GlobalISel Localizer.h

[GISel][NewPM] Port localizer

Standard NewPM pass porting.

Reviewers: arsenm, aemerson, vikramRH, aengelke

Pull Request: https://github.com/llvm/llvm-project/pull/217209
DeltaFile
+86-15llvm/lib/CodeGen/GlobalISel/Localizer.cpp
+15-39llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+2-2llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+2-1llvm/test/CodeGen/AArch64/GlobalISel/localizer.mir
+1-1llvm/lib/CodeGen/GlobalISel/GlobalISel.cpp
+1-1llvm/include/llvm/InitializePasses.h
+107-593 files not shown
+110-609 files

LLVM/project 2c7ed97llvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmax.ll buffer-fat-pointer-atomicrmw-fadd.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,252-3,311llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,533-2,603llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+20,441-20,4681,028 files not shown
+73,008-66,1521,034 files

LLVM/project 8fe17ddmlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector invalid.mlir

[mlir][vector] Verify non-unit strides on `masked/expand/compress` ops (#216485)

Closes the stride-verification gap left open by #204611 and #205869
(**Stacked on #211004**).

`vector.maskedload`/`maskedstore`/`expandload`/`compressstore` lower to
LLVM masked intrinsics that read/write N *consecutive* elements from a
single pointer (see [LangRef](https://llvm.org/docs/LangRef.htm)), but
none of them verified the memref's minor-dim stride, so `strided<[2]>`
verified successfully and silently miscompiled. This PR rejects
statically-known non-unit and dynamic strides.

---

The original PR (#210952, **identical to this one**) has been reverted
(#215224) due to `Linalg/CPU/ArmSME/matmul.mlir` and
`Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir` e2e test failures
(see the
[buildbot](https://lab.llvm.org/buildbot/#/builders/121/builds/2588)).

    [33 lines not shown]
DeltaFile
+107-0mlir/test/Dialect/Vector/invalid.mlir
+24-0mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+131-02 files

LLVM/project 4ca21f7libc/test/src/stdio sprintf_test.cpp

[libc] Gate long double assertions that fail in long double = float64 targets (#217346)

Some assertions that involve long doubles fail if the type is
implemented with float64, such as in Arm 32 bits targets.

This patch gates these failing assertions under the proper macro.

Additionally, it fixes some uses of this same macro that were using an
incorrect spelling.
DeltaFile
+8-6libc/test/src/stdio/sprintf_test.cpp
+8-61 files

LLVM/project c1c0f9allvm/include/llvm/CodeGen/GlobalISel Localizer.h, llvm/lib/CodeGen/GlobalISel Localizer.cpp

[GISel] Remove DoNotRun hook from Localizer

No upstream targets use this, so remove it.

Reviewers: arsenm, aemerson

Pull Request: https://github.com/llvm/llvm-project/pull/217192
DeltaFile
+1-9llvm/lib/CodeGen/GlobalISel/Localizer.cpp
+0-5llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+1-142 files

LLVM/project b6480ddllvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmax.ll buffer-fat-pointer-atomicrmw-fadd.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,252-3,311llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,533-2,603llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+20,441-20,4681,030 files not shown
+73,099-66,2451,036 files

LLVM/project aaf3903llvm/include/llvm/CodeGen/GlobalISel LoadStoreOpt.h, llvm/lib/CodeGen/GlobalISel LoadStoreOpt.cpp

[GISel][NewPM] Port LoadStoreOpt

Standard NewPM pass porting.

Reviewers: aengelke, arsenm, aemerson, vikramRH

Pull Request: https://github.com/llvm/llvm-project/pull/217190
DeltaFile
+145-28llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+13-91llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+2-2llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+2-1llvm/test/CodeGen/AArch64/GlobalISel/store-merging.mir
+1-1llvm/test/CodeGen/AArch64/GlobalISel/store-merging-debug.mir
+1-1llvm/test/CodeGen/AArch64/GlobalISel/merge-stores-truncating.mir
+164-1244 files not shown
+168-12610 files

LLVM/project 6136e52clang/include/clang/Basic DiagnosticFrontendKinds.td, clang/lib/CodeGen CGExpr.cpp CGCall.h

[clang] Fix crash on no-prototype indirect calls with -fexperimental-call-graph-section (#210846)

Prior to this change `-fexperimental-call-graph-section` will hit
unreachable code in CGCall.cpp for indirect calls through C style
function pointers declared with no argument list (no prototype). In this
change, we reconstruct the function prototype at the call site and generate
the type ID based on the constructed prototype.

Assisted-by: Gemini 3.1 Pro
DeltaFile
+113-0clang/test/CodeGen/call-graph-section-noprototype.c
+60-1clang/lib/CodeGen/CGCall.cpp
+10-9clang/lib/CodeGen/CGCall.h
+7-7clang/test/CodeGen/call-graph-section.c
+3-2clang/lib/CodeGen/CGExpr.cpp
+4-0clang/include/clang/Basic/DiagnosticFrontendKinds.td
+197-196 files

LLVM/project 346d3eflibsycl/include/sycl/__impl queue.hpp, libsycl/src/detail queue_impl.hpp queue_impl.cpp

[libsycl] Initial prefetch implementation for queue (#212104)

Adds the `prefetch` API for `queue` class as per SYCL 2020
specifications.
Adds `unit tests` for prefetch use cases with the appropriate mock
additions

AI has been used to help with slight logic adjustments in
`QueueImpl::prefetch` and for the unit tests
DeltaFile
+52-0libsycl/unittests/queue/prefetch.cpp
+40-0libsycl/test/usm/prefetch.cpp
+35-0libsycl/include/sycl/__impl/queue.hpp
+26-0libsycl/src/detail/queue_impl.cpp
+13-1libsycl/unittests/mock/helpers.cpp
+9-0libsycl/src/detail/queue_impl.hpp
+175-14 files not shown
+194-110 files

LLVM/project 579840amlir/test/Integration/Dialect/EmitC regalloc-eviction-test-model-tosa.mlir inline-oz-test-model-tosa.mlir

Align TOSA->EmitC integration tests with MLGO config (#216787)

Adapt existing TOSA->EmitC integration tests to use exactly the same
pipeline as the MLGO CMake config proposes in
https://github.com/llvm/llvm-project/pull/212650.

The first `RUN` directive tests the TOSA->EmitC lowering.
The second tests class-based C++ code generation for MLGO. For this, the
pipeline needs extra passes helping transform the model function into a
class:
- `promote-buffers-to-stack`: heap-based -> stack-based allocations
- `wrap-emitc-func-in-class`: standalone `emitc.func` -> `emitc.class`
- `mlgo-add-reflection-map`: adds a reflection map + helper method to
`emitc.class` for runtime field lookup.
Therefore, we're now emitting a `.cpp` file instead of `.c`.

The missing `buffer-deallocation-pipeline` lead to a skipped
canonicalization that created `arith` ops, which the current pipeline
couldn't actually lower, due to recent changes in the `arith-expand`

    [2 lines not shown]
DeltaFile
+41-5mlir/test/Integration/Dialect/EmitC/inline-oz-test-model-tosa.mlir
+32-6mlir/test/Integration/Dialect/EmitC/regalloc-eviction-test-model-tosa.mlir
+73-112 files

LLVM/project 76bcfd7utils/bazel/llvm-project-overlay/libc BUILD.bazel, utils/bazel/llvm-project-overlay/libc/test/UnitTest BUILD.bazel

[Bazel] Fixes e84b8cf (#217352)

This fixes e84b8cf804ea41c7ed1c1c64c519b6355abafa31 (#211867).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=e84b8cf804ea41c7ed1c1c64c519b6355abafa31

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+2-02 files

LLVM/project 6b5312bclang/docs ReleaseNotes.md, clang/lib/Sema SemaType.cpp

[clang][Sema] Fixed a crash when an `address_space` attribute with a dependent argument was written after the declarator-id (#216348)

Fixes #196982
Fixes #111463 

When filling in source locations for a dependent `address_space` type,
we only looked at the declarator chunk being visited. But an attribute
written after the declarator-id appertains to the declared entity, so it
never lands on a chunk — it gets applied to the outermost type instead.
The search came up empty and we hit the `llvm_unreachable`. Nothing to
do with the malformed code in the bug report, by the way: plain template
`<int AS> void f() { void *p [[clang::address_space(AS)]]; }` crashes
too.

The lookup now searches every attribute list of the declarator (chunk,
declarator, decl-spec, declaration), passed as an `ArrayRef` by the
caller, so the attribute is always findable and the original
`llvm_unreachable` stays. Attributes that are invalid or malformed are
skipped, since they never produced a type. This matters when a malformed

    [3 lines not shown]
DeltaFile
+28-0clang/test/SemaTemplate/address_space-dependent.cpp
+16-6clang/lib/Sema/SemaType.cpp
+4-0clang/docs/ReleaseNotes.md
+48-63 files

LLVM/project 4db2d38llvm/lib/Target/AMDGPU GCNSubtarget.h GCNSubtarget.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-max-mii.ll swp-amdgpu-pipeline-regpressure-retry.mir

[AMDGPU] Configure the software pipeliner policy

Set the pipeliner policy in overridePipelinerPolicy(): raise the maximum MII
and opt into the generic register-pressure detector.

MFMA latencies push the MII of otherwise pipelineable loops past the generic
limit of 27, so AMDGPU raises it to 256, which covers the II distributions
observed across Composable Kernels and Triton workloads on gfx950. Removing
the limit entirely pipelines no additional loops on those workloads and costs
around 23% more compile time, so the bound stays finite.

Enable the generic register-pressure detector so schedules exceeding the
target-provided pressure-set limits are rejected and retried at a higher II.
DeltaFile
+181-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-regpressure-retry.mir
+5-5llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-max-mii.ll
+9-0llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+2-0llvm/lib/Target/AMDGPU/GCNSubtarget.h
+197-54 files

LLVM/project fc1f1b8llvm/include/llvm/CodeGen TargetSubtargetInfo.h MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Let targets configure the maximum MII

The pipeliner rejects a loop whose minimum initiation interval exceeds
-pipeliner-max-mii. Its default of 27 suits targets with short instruction
latencies, but is too small for others: on AMDGPU a couple of MFMA
instructions already push the MII past it, so the loop never pipelines.

Move the limit into a MachinePipelinerPolicy that targets customize by
implementing TargetSubtargetInfo::overridePipelinerPolicy(). The generic
default is unchanged and an explicit -pipeliner-max-mii still wins over the
target's choice, so no target changes behavior here. Exercised by the AMDGPU
adoption in a following commit.
DeltaFile
+12-3llvm/lib/CodeGen/MachinePipeliner.cpp
+14-0llvm/include/llvm/CodeGen/MachinePipeliner.h
+4-0llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
+30-33 files

LLVM/project 597e57cllvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU swp-amdgpu-pipeline-unpipeline-compare.mir swp-amdgpu-pipeline-loop-carried-mem.mir

[AMDGPU] Add MachinePipeliner support for AMDGPU

Implement the target hooks to enable MachinePipeliner for AMDGPU. The
pass is off by default and can be enabled with -amdgpu-enable-pipeliner
at -O2 and above.

Only uniform, single-basic-block counted loops with a scalar (SCC)
back-edge are pipelined; loops with a divergent (VCC/EXEC) back-edge, or
containing calls or inline asm, are rejected. Code is generated by the
default modulo schedule expander (DFA, window scheduler, and MVE
expansion are disabled for AMDGPU).

Validated on gfx942 and gfx950 with Composable Kernel and Triton workloads.
DeltaFile
+177-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-minimal.ll
+134-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-epilog-phi.mir
+78-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+71-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-gen-structure.mir
+58-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-loop-carried-mem.mir
+48-0llvm/test/CodeGen/AMDGPU/swp-amdgpu-pipeline-unpipeline-compare.mir
+566-014 files not shown
+952-020 files

LLVM/project 45e338dllvm/include/llvm/CodeGen MachinePipeliner.h, llvm/lib/CodeGen MachinePipeliner.cpp

[MachinePipeliner] Let targets enable the register-pressure detector

The generic MachinePipeliner register-pressure detector, added in #74807,
was only reachable through the global -pipeliner-register-pressure option.

Add MachinePipelinerPolicy::ShouldLimitRegPressure so targets can enable the
detector in TargetSubtargetInfo::overridePipelinerPolicy. An explicit command-
line option continues to override the target policy.

The policy defaults to false, preserving existing behavior for other targets.
It is exercised by the AMDGPU adoption in the following commit.
DeltaFile
+6-4llvm/lib/CodeGen/MachinePipeliner.cpp
+4-0llvm/include/llvm/CodeGen/MachinePipeliner.h
+10-42 files

LLVM/project 40f48bfmlir/include/mlir/Conversion/OpenACCToLLVM ACCToLLVM.h, mlir/lib/Conversion/OpenACCToLLVM CMakeLists.txt ACCToLLVM.cpp

[mlir][acc] Introduce acc atomic to llvm patterns (#217142)

Add support for lowering the OpenACC atomic operations - atomic.read,
atomic.write, atomic.update, and atomic.capture - to LLVM dialect.

Co-authored-by: Matsu <kmatsumura at nvidia.com>
DeltaFile
+783-0mlir/lib/Conversion/OpenACCToLLVM/ACCAtomicPatterns.cpp
+211-0mlir/test/Conversion/OpenACCToLLVM/atomic.mlir
+22-0mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
+7-0mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVM.cpp
+5-0mlir/lib/Conversion/OpenACCToLLVM/CMakeLists.txt
+1,028-05 files

LLVM/project 1d7d16bllvm/test/CodeGen/AMDGPU buffer-fat-pointer-atomicrmw-fmax.ll buffer-fat-pointer-atomicrmw-fadd.ll

[CodeGen] Avoid register pressure limit underflow (#216372)

RegisterClassInfo::computePSetLimit() subtracts an estimated
reserved-register weight from the target-provided pressure-set limit. If
the weight exceeds the limit, the unsigned subtraction wraps to a very
large value, effectively disabling register-pressure checks. An equal
weight produces zero, which is the uncomputed-limit sentinel.
    
MachineSink and MachineLICM exposed this underflow after switching to
RegisterClassInfo limits.
    
Preserve the target-provided nonzero limit when the approximate
adjustment would exhaust it. Non-underflowing adjustments remain
unchanged. Add an AMDGPU regression test and update the affected checks.
DeltaFile
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
+3,815-3,810llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
+3,513-3,467llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
+3,252-3,311llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
+2,533-2,603llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
+20,441-20,46853 files not shown
+46,226-47,04259 files

LLVM/project d92b3ddllvm/lib/CodeGen/GlobalISel Localizer.cpp

fix

Created using spr 1.3.7
DeltaFile
+1-0llvm/lib/CodeGen/GlobalISel/Localizer.cpp
+1-01 files

LLVM/project f2d08fallvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h

[LV][NFC] Fix up else-after-return introduced by PR #216981 (#217337)
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+1-11 files

LLVM/project e84b8cflibc/src/__support/wchar character_converter.h, libc/test/UnitTest LibcTest.cpp

[libc] Add support for wchar_t in StringConverter. (#211867)

This takes care of a TODO in LibcTest.cpp from #203355, allowing
`wstring_view` to be printed as UTF-8 in tests. It also enables updates
to __support/printf_core/ for implementing `swprintf`.

The change to `StringConverter` is enabled by extending the
`CharacterConverter` API when `wchar_t` is detected as being UTF-32.

The `StringConverter` unit test is updated so it no longer compiles to a
no-op on Windows.

Note: this change does not respect `-fwide-exec-charset`, which Clang still
does not support but GCC does. This is the existing libc behavior.
DeltaFile
+134-113libc/test/src/__support/wchar/string_converter_test.cpp
+44-16libc/test/src/__support/wchar/utf8_to_32_test.cpp
+33-11libc/test/src/__support/wchar/utf32_to_8_test.cpp
+21-15libc/test/src/__support/wchar/CMakeLists.txt
+30-0libc/src/__support/wchar/character_converter.h
+19-2libc/test/UnitTest/LibcTest.cpp
+281-1573 files not shown
+296-1579 files

LLVM/project 73a20f5llvm/include/llvm/CodeGen/GlobalISel Localizer.h

forward decls

Created using spr 1.3.7
DeltaFile
+0-5llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+0-51 files

LLVM/project 804d645llvm/include/llvm/CodeGen/GlobalISel Localizer.h LoadStoreOpt.h, llvm/lib/CodeGen/GlobalISel Localizer.cpp LoadStoreOpt.cpp

feedback

Created using spr 1.3.7
DeltaFile
+0-93llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+91-0llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+40-0llvm/lib/CodeGen/GlobalISel/Localizer.cpp
+0-36llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
+131-1294 files

LLVM/project 4c3c9c2llvm/include/llvm/CodeGen/GlobalISel LoadStoreOpt.h, llvm/lib/CodeGen/GlobalISel LoadStoreOpt.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-93llvm/include/llvm/CodeGen/GlobalISel/LoadStoreOpt.h
+91-0llvm/lib/CodeGen/GlobalISel/LoadStoreOpt.cpp
+91-932 files