[X86] Move PSHUF(SHIFT(X,C0),C1) -> SHIFT(PSHUF(X,C1),C0) to canonicalizeShuffleWithOp (#225313)
No need for this to be in combineTargetShuffle, and we can generalize it
to work with more shuffles in a future patch.
[AArch64] Fix position of nop inserted for +fix-cortex-a53-835769 under debug. (#224830)
Make sure that the position of the nop added for +fix-cortex-a53-835769
is not dependant on debug instructions at the start of the block.
Fixes #224661
[clang-repl] Support wasm64 execution (#225311)
Emscripten-forge is adding wasm64 builds on its emscripten 6-x branch
which exposed two wasm32 hardcoded assumptions in clang-repl's
WebAssembly execution path.
`IncrementalCompilerBuilder::CreateCpp()` currently hardcodes
`wasm32-unknown-emscripten`, even when clang-repl itself is built for
wasm64.
Once Clang emits a wasm64 object, the in-process linker must also select
the correct emulation. `wasm-ld` defaults to wasm32 and otherwise fails
in `InputFile::checkArch()` with:
```text
must specify -mwasm64 to process wasm64 object files
```
The pipeline is this
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[orc-rt] Make check-rt-process-info.test test more generic. (#225314)
Add %host-arch and %host-os substitutions to orc-rt-lit's config, and
use them to make the regression test platform agnostic.
[Clang] Stop using strip.invariant.group (#225072)
Clang currently emits calls to llvm.strip.invariant.group under
`-fstrict-vtable-pointers` whenever a pointer to a dynamic object is
used in a comparison or might be used in a comparison through operations
we cannot track.
The purpose of the llvm.strip.invariant.group intrinsic is to make sure
that if we have a dominating condition like `a ==
launder.invariant.group(a)`, we don't end up replacing the latter with
the former, as that would allow the optimizer to assume that the memory
stays invariant, despite going through a launder operation (e.g. on
placement new).
However, since this was introduced, we've come to the understanding that
replacing pointers based on equality comparison is generally only legal
if they have the same provenance, and stopped doing such replacements.
The specific strip.invariant.group/launder.invariant.group case was
still buggy due to an implementation bug, but this was fixed in
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[flang][cuda] Record implicit pinned attribution in module files
Under -gpu=mem:pinned an unattributed ALLOCATABLE is attributed as pinned by
the compiler, the same way -gpu=mem:managed attributes one as managed, but
only the latter recorded that it had done so. The module file therefore spelled
an implicitly applied PINNED the same as one the user wrote, and a reader
treated it as a user requirement: adding -gpu=mem:pinned to a module's build
rejected its OpenACC-only consumers over an attribute the user never wrote.
Record the attribution for pinned as well, so it is written as
PINNED(IMPLICIT) and consumers can tell the two apart.
[flang][cuda] Record implicit managed attribution in module files
An attribute the compiler applied under -gpu=mem:managed is written into the
module file the same way a user-written one is, so a reader cannot tell them
apart. It then treats the attribute as a user requirement: allocating such a
component in a DEVICE object is rejected, and the memory space the user did
ask for on the object no longer wins.
Spell the distinction in the module file as MANAGED(IMPLICIT), modelled on
INTENT(IN): CUDA-data-attr gains an optional parenthesized qualifier, carried
by a new CUDADataAttrSpec parse-tree node in AttrSpec and ComponentAttrSpec.
ATTRIBUTES(...) keeps the bare attribute, so the qualifier cannot be written
there.
The attribute itself is still written out, so a component keeps the same
memory space no matter which options a consumer is compiled with.
Also stop an implicitly applied attribute from making a module a definer of
CUDA symbols. Without this, adding -gpu=mem:managed to a module's build
rejects its OpenACC-only consumers over an attribute the user never wrote.
[LoopVectorize] Improve Vectorization of Low Trip Count Loops (#195823)
Currently, Small Loops with Trip Counts less than 16, and in situations
where the Trip Count (TC) is less than the Tail Folding Threshold are
harder to vectorize, its only possible where no epilogue will be
emitted. However, for loops with large bodies and small trip counts this
can be counterproductive to performance, often failing to vectorize
entirely. This is more prevalent with targets where
`getMinTripCountTailFoldingThreshold()` returns a value greater than 0.
To address this, the Small Loops where the TC == VF + 1 can now
vectorize, leading to a vectorized iteration (or loop if interleaving is
required) and a single scalar iteration. Later passes can then remove
the loop's entirely.
Testing an with OpenSource Fortran HPC Benchmark which includes multiple
loops with small trip counts, but large loop bodies, has shown
significant improvement to runtime after these changes.
Assisted-by: Claude Sonnet 4.6/Codex
[ARM] Fix swapped condition in PerformVSetCCToVCTPCombine. (#225112)
This was swapping the wrong condition to a SETUGT. Came up in #224857.
Also remove vctp64 as we cannot fold 64bit integers to vctp.
[AMDGPU][InstCombine] Canonicalize dot constant operands
Move constant dot product source operands to the right hand side
and add tests for signed and unsigned dot intrinsics.
[AMDGPU][InstCombine] Fold zero dot operands to accumulator
Fold AMDGPU dot intrinsics when either operand is zero.
`dot(a, 0) = 0` and `dot(0, b) = 0`, so replace the intrinsic with its accumulator.
This avoids unrelated clamp and add/sub reassociation cases.
[AMDGPU][InstCombine] Fold constant add/sub into the dot accumulator
`amdgcn.{s,u}dot{2,4,8}(a, b, C) +/- K -> dot(a, b, C +/- K)` when both the
accumulator C and K are constants. The new constant is computed with
wrapping APInt arithmetic to match the non-clamping accumulate.
Only applies when clamp is false (the saturating accumulate does not
reassociate) and the dot has a single use. K - dot is left alone since it
would need the dot product negated.
Share construct contexts for variant reachability
Use AppendDirectiveContextTraits when building reachable directive paths
so semantic checks and lowering apply the same construct-context rules.
This excludes informational directives such as ASSUME while retaining
executable loop transformations and the source order of combined constructs.
Make AppendConstructTraitsForDirective private again and add semantic
tests for TILE, UNROLL, ASSUME, and TEAMS DISTRIBUTE PARALLEL DO. These
complement the existing lowering tests. The ASSUME case detects the old
collector counting an extra position and skipping a required diagnostic.
[RISC-V] Update streamer ArchString in emitTargetFeaturePush()
Previously, RISCVAsmPrinter::emitTargetFeaturePush() only emitted `.option push`
and `.option arch` without updating the streamer's active ArchString. When
emitting an ELF object file directly (`-filetype=obj`),
RISCVTargetELFStreamer::emitDirectiveOptionArch() is a no-op while
emitTargetFeaturePop() resets ArchString back to the pushed ArchString, so
module-level inline assembly and functions with custom `target-features` failed
to emit updated `$x<arch>` mapping symbols.
Call RTS.setArchString() with the parsed ISA string in emitTargetFeaturePush()
so `-filetype=obj` records the active `$x<arch>` mapping symbol alongside
`.option arch`.
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