[HLSL][LongVector] Implement fmod (#224123)
resolves https://github.com/llvm/llvm-project/issues/220649
This is as much a refactor as it is adding long vector support.
I noticed the fmod helper had many issues. THe SPIR-V implementatiion
wasn't properly put into a SPIR-V macro
fmod had a scalar \ vector version that was unecessary.
The tests seemed to be raw register defines so
source code changes caused the names to all change.
Fixing this meant we could simplify the tablegen
and helpers.
Also the tests are much more clean with no -D defines
[libc] Add getgrnam and getgrgid entrypoints (#224858)
Add the non-reentrant group database lookup entrypoints getgrnam and
getgrgid.
Both entrypoints delegate to grp::find_by_name and grp::find_by_gid,
sharing the single static DynamicBuffer and struct group with getgrent
as permitted by POSIX. Because endgrent closes the file stream without
freeing the shared buffer, calling endgrent does not invalidate pointers
returned by getgrnam or getgrgid.
* Add getgrnam and getgrgid entrypoints
* Add non-reentrant find_by_name and find_by_gid overloads in grp_utils
* Define getgrnam and getgrgid in include/grp.yaml
* Add hermetic unit tests for getgrnam and getgrgid
Assisted-by: Automated tooling, human reviewed.
[compiler-rt][hwasan] Fix decorate-proc-maps.c test (#225496)
Avoid returning the heap pointer address from main, which causes the
process to exit with a non-zero exit status whenever the lowest byte of
the allocated address is non-zero.
Previously, `malloc(100)` (size class 112) was the first allocation in
its size class, returning page-aligned chunk 0 (`offset 0x00`, exit
code 0). Commit 5a50c15fa686 (#224953) removed `SinkOpts` (48 bytes)
from `llvm::cl::SubCommand`, shrinking `sizeof(SubCommand)` from 160 to
112 bytes. With the internal symbolizer enabled, two pre-main
`ManagedStatic<SubCommand>` allocations now take chunks 0 and 1 in the
112-byte size class, pushing `malloc(100)` to chunk 2 (`offset 0xe0`,
exit code 224).
Assisted-by: Gemini
[NFC][AMDGPU] Refactor isDPALU_DPP to only check if the instruction requires the feature (#224373)
Previously the helper function was a combination of checking if the
instruction required the feature and if the feature is available. This
behavior diverges from similar isDPALU_DPP32BitOpc and can cause
confusion. This refactor aligns the two for consistency, and users
should also check if the feature is available if needed.
[libc] Implement posix_fallocate in fcntl (#225475)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function
`posix_fallocate` in `<fcntl.h>`.
Fixes #225469
[mlir][docs] Regenerate Toy Ch6 sample output against current main (#225457)
The Ch6 tutorial tells you to run toyc-ch6 with `-emit=mlir-llvm` and
compare against the chapter, but the listings still show typed pointers
like `!llvm<"double*">` and a four-field memref descriptor, and some
lines don't parse at all. #224908 is a beginner hitting exactly that.
This replaces the three listings (LLVM dialect, LLVM IR, optimized LLVM
IR) with what the tool prints today on
`test/Examples/Toy/Ch6/llvm-lowering.mlir`. The LLVM IR listings leave
out the target triple, data layout and `!dbg` metadata since those
depend on the host machine, and the text now says so.
The C++ snippets in the same chapter quoted the old typed-pointer API
for the printf declaration and a pattern list without the memref
patterns, so I updated those to match what's in `examples/toy/Ch6` now,
along with the `dumpLLVMIR` and `runJit` listings. If you'd prefer this
PR stick to the IR output, I can drop those hunks.
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[SCEV] Use SCEVUse to access MulOpLists. (#225450)
After https://github.com/llvm/llvm-project/pull/224974, we can reach
this patch with SCEV Mul expressions with operands that have use-flags.
Update loop to access map with SCEVUse instead of const SCEV *.
Fixes a crash in the added test case.
[TableGen][AMDGPU][RFC] Write M68k register names too
M68k is an experimental target, so a build of all targets leaves it
out and the previous commit missed its six callers of getName() and
getRegAsmName(). Write the names instead, as everywhere else.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
DAG: Fix cross-block gc.relocate of constants and allocas (#222894)
This fixes latent "Register not marked live out of predecessor" verifier errors in
existing statepoint tests when LiveIntervals is run earlier in the pass pipeline. This
is observable today when using -verify-coalescing in statepoint tests. The verifier
check only runs with LiveIntervals, which is first computed as a dependency for the
RegisterCoalescer, but the coalescer happens to hide the problem before the first
verifier run with computed LiveIntervals in the existing testcases.
When constants and static allocas are relocated in an invoke statepoint's landing pad,
LowerAsSTATEPOINT places the virtual register definition after the STATEPOINT call:
bb.0.entry:
STATEPOINT ... ; unwinds to bb.2 before %0 is defined
%0:gr64 = MOV64ri 1
bb.2.lpad (landing-pad):
$rax = COPY %0:gr64 ; reads uninitialized %0 (folded to undef)
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[clang][test] Remove unnecessary `FileManager` arguments (#225467)
This test was introduced in commit
dfffaf579f2b4bc9184c23f271a57e1fa1ed6f01 and wrongly passed the file
size and modification time to a lookup function that takes two bools.
This PR fixes that by removing the superfluous arguments.
[ConstraintElim] Link values to decompositions during queries if needed. (#224623)
Decomposition is context sensitive and uses information at the query
point to determine if operations have the required wrap flags.
This can lead to situation where at the time facts are added, we fail to
decompose an operation (like `%y = add %x, 1`), and only add it as
variable `%y`.
If at query time, we can decompose `%y`, the query will contains `%x`
and `1`
as variable/constant, with no connection to the fact added earlier.
This can pessimize results in some cases. To avoid this, add additional
rows connecting the variable and the decomposition (e.g.` %y ==
decompose
(add %x, 1))` and re-try the query.
For now, only check top-level operands. This helps with a few cases in
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[TableGen][AMDGPU][RFC] Write register names rather than return them
MCRegisterInfo::getName() and TargetRegisterInfo::getRegAsmName()
return a std::string, which every caller pays for whether or not it
needs one. Replace them with printName() and printRegAsmName(), which
take the stream to write to.
Most callers print the name and are done, and they now write it where
it goes. Where a name goes in the middle of a message, the statement
that built the message becomes several. The callers that do need the
name as a string keep one in a local variable and write into that;
those that look a name up, among them the MIR parser building its map
of every register, reuse one SmallString across the lookups and
allocate less than they did.
DIDumpOptions::GetNameForDWARFReg takes a stream too and says whether
it wrote a name, which its callers used to ask by testing the returned
StringRef for emptiness. The three that fill it in kept a std::string
alive for the StringRef to point at, and no longer need one.
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