[Clang][Interpreter] Fix pch-pic-mismatch for darwin platforms (#209183)
Darwin enforce PIC by default and ignores all -fno-pic option. We calls
cc1 directly as its PIC level is 0 by default. This fixes the new
introduced test pch-pic-mismatch.cpp
[ConstraintElim] Check loop pred & invariance before SCEV query (NFC) (#209314)
Move cheap checks (check for loop predecessor and invariance) before
more expensive SCEV queries.
This slightly reduces the number we need to unnecessarily construct SCEV
expressions.
[RISCV][P-ext] Fix incorrect shift mask on variable shift instructions. (#209293)
The instructions are defined to read 5 bits regardless of element size.
I think we will also need to change the C intrinsics to allow 5 bit
shift amounts, but we can do that in a separate patch.
[mlir][acc] Add reduction utilities for acc to gpu lowering (#209316)
In preparation for the pass that converts `acc.compute_region` to GPU
dialect, this PR adds several utilities which are used in that pass
related to reductions. Doing so to simplify review and to ensure that
unit testing is added for the utilities.
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Co-authored-by: Scott Manley <rscottmanley at gmail.com>
clang/AMDGPU: Validate -target-cpu in cc1 is valid for the subarch (#206481)
Restrict the reported list of valid target-cpus based on the triple's
subarch. This is more consistent with how other targets validate the
target CPU name. Currently we have split handling validating the target
name for the triple in both the driver and here. The driver based
diagnostic seems to be an amdgpu-ism in 2 different places (though there
is one arm validation emitting the same diagnostic). In the future we could
probably drop those.
[SSAF][TypeConstrainedPointers] Add pointer parameters of 'main' as constrained pointers (#208578)
Similar to some pointer entities of operator new/delete overload
functions, pointer type parameters of the main function shall also
retain its type during clang-reforge transformation.
rdar://179151882
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Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
AMDGPU: Respect target assembler directives over command line
Mutate the global subtarget, using essentially the same code that ARM uses.
The main difference is we need to mutate the actual CPU name in addition
to just flipping the feature bits, so this needs a new setter in
MCSubtargetInfo. Liberalize the triple check so that after #206480,
old assembly files to not break on new assembler invocations.
For some reason we have 2 different assembler directives that indicate the
target, .amdgcn_target for amdhsa and .amd_amdgpu_isa for amdpal. Previously,
we would take the target from the command line and then error if the directive
did not exactly match. In order to move away from depending on the xnack and
sramecc subtarget features, start treating the directives as a change of target,
similar to ARM's .cpu and .arch directives.
Both .amdgcn_target and .amd_amdgpu_isa encode full triples, but unlike
.amdgcn_target, the PAL directive does not include xnack or sramecc. Ideally
we would introduce new independent directives for these.
Co-Authored-By: Claude Opus 4.6 <noreply at anthropic.com>
[flang][OpenMP] Fix metadirective loop semantic checks
This is a follow-up to #207088.
Post-merge review feedback:
* Rename mayVariantBeSelected to MayVariantBeSelected and move it to
the shared OpenMP semantic utilities so declare-variant checking can
reuse it.
* Explain why a WHEN selector is recorded only when its modifier list
contains exactly one element.
* Diagnose loop-associated variants that end a declaration-only
program unit, such as a module with no execution part.
Additional correctness fixes:
* Handle consecutive metadirectives and modules or submodules with
contained procedures without silently dropping an earlier
loop-associated variant.
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AMDGPU: Validate processor and features in TargetID parsing
TargetID::parseTargetIDString previously only checked that the string was
structurally a 4-component triple followed by a processor field. It
accepted unrecognized processors and silently ignored malformed or
unsupported feature modifiers. Work towards improving validation so in
the future clang's copy of TargetID can be replaced.
Co-authored-by: Claude (Opus 4.8)
[libcxx][test] Fingerprint the compiler when memoizing results (#208311)
This fixes a cache invalidation problem with flag support checks when
rebasing & re-building the just-built clang.
clang/AMDGPU: Stop passing redundant -target-cpu to cc1
Now that the exact target is encoded in the triple's subarch field,
-target-cpu is redundant. This avoids polluting the resultant IR with
unwanted "target-cpu" attributes. The net result is the desired codegen
when compiling libraries for a major subarch and linking it into a
program compiled for a specific arch. e.g., compiling for "gfx9-generic"
would pollute the IR with "target-cpu"="gfx9-generic", so codegen
would ultimately be performed for the generic target even after
linking into the concrete gfx9 cpu. The specialization will now be
achieved by merging the triples without the linker or optimization
passes needing to fixup function attributes.
