LLVM/project af479d6clang-tools-extra/clang-tidy ClangTidyModule.cpp

[clang-tidy][NFC] Use structured binding in `ClangTidyModule.cpp` (#172432)

DeltaFile
+6-7clang-tools-extra/clang-tidy/ClangTidyModule.cpp
+6-71 files

LLVM/project 6b4aa8cllvm/lib/Analysis DependenceAnalysis.cpp, llvm/test/Analysis/DependenceAnalysis infer_affine_domain_ovlf.ll

[DA] Introduce OverflowSafeSignedAPInt to prevent potential overflow
DeltaFile
+146-41llvm/lib/Analysis/DependenceAnalysis.cpp
+1-1llvm/test/Analysis/DependenceAnalysis/infer_affine_domain_ovlf.ll
+147-422 files

LLVM/project 685170dclang/lib/CodeGen CGVTables.cpp

[CGVTables] Use getSigned() for signed offset
DeltaFile
+2-2clang/lib/CodeGen/CGVTables.cpp
+2-21 files

LLVM/project ea9d44dclang/lib/CodeGen CGExpr.cpp

[CGExpr] Use getSigned() for negative constant
DeltaFile
+1-1clang/lib/CodeGen/CGExpr.cpp
+1-11 files

LLVM/project 5891921clang/lib/CodeGen CGExprScalar.cpp

[CGExprScalar] Use getSigned() for signed value
DeltaFile
+1-1clang/lib/CodeGen/CGExprScalar.cpp
+1-11 files

LLVM/project 1bc52c3clang/lib/CodeGen CGOpenMPRuntime.cpp

[CGOpenMP] Use getSigned() for NumTeams constant

This value may be -1.
DeltaFile
+1-1clang/lib/CodeGen/CGOpenMPRuntime.cpp
+1-11 files

LLVM/project 8485ea2llvm/lib/Target/AArch64 AArch64ExpandImm.cpp AArch64ExpandPseudoInsts.cpp, llvm/test/CodeGen/AArch64 arm64-movi.ll srem-seteq-illegal-types.ll

[AArch64] Improve expansion of immediates with shifted negated components. (#162286)

Improve the expansion of 64-bit immediates that consist of a smaller
immediate shifted and negated with itself. Generally, this allows
materialising the smaller immediate with MOVN+MOVK, and shifting and
negating the result with an EOR or EON, saving a MOVK instruction
compared to expanding the original immediate explicitly.

As a refinement, when the smaller immediate contains a 16-bit chunk of
ones or zeros, the intermediate MOVK can be omitted, also saving a MOVK
compared to the default expansion.
DeltaFile
+162-0llvm/test/CodeGen/AArch64/arm64-movi.ll
+73-0llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
+3-4llvm/test/CodeGen/AArch64/srem-seteq-illegal-types.ll
+2-0llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+240-44 files

LLVM/project cc1e92cclang-tools-extra/clang-tidy ClangTidyForceLinker.h, clang-tools-extra/clang-tidy/abseil AbseilMatcher.h

[clang-tidy][NFC] Switch to new file header style: attempt number two (#172451)

I somehow managed to miss these in #158497.
DeltaFile
+1-5clang-tools-extra/clang-tidy/readability/RedundantStringCStrCheck.cpp
+1-1clang-tools-extra/clang-tidy/readability/InconsistentDeclarationParameterNameCheck.h
+1-1clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.cpp
+1-1clang-tools-extra/clang-tidy/readability/RedundantStringInitCheck.h
+1-1clang-tools-extra/clang-tidy/abseil/AbseilMatcher.h
+1-1clang-tools-extra/clang-tidy/ClangTidyForceLinker.h
+6-104 files not shown
+10-1410 files

LLVM/project f1bf531llvm/test/Analysis/DependenceAnalysis infer_affine_domain_ovlf.ll

[DA] Add test where inferDomainOfAffine causes overflow (NFC) (#171990)

Add test case where a dependency is missed by Exact SIV test. The root
cause is an overflow in `inferDomainOfAffine`. This will be fixed by
#171991 .
DeltaFile
+65-0llvm/test/Analysis/DependenceAnalysis/infer_affine_domain_ovlf.ll
+65-01 files

LLVM/project 850a34cllvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[AArch64][GlobalISel] Modified comments to improve readability
DeltaFile
+12-18llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+12-181 files

LLVM/project d2a097dllvm/include/llvm/ExecutionEngine/JITLink JITLinkMemoryManager.h, llvm/include/llvm/ExecutionEngine/Orc/Debugging ELFDebugObjectPlugin.h

Reland: [ORC] Tailor ELF debugger support plugin to load-address patching only (#169482)

In 4 years the ELF debugger support plugin wasn't adapted to other
object formats or debugging approaches. After the renaming NFC in
https://github.com/llvm/llvm-project/pull/168343, this patch tailors the
plugin to ELF and section load-address patching. It allows removal of
abstractions and consolidate processing steps with the newly enabled
AllocActions from https://github.com/llvm/llvm-project/pull/168343.

The key change is to process debug sections in one place in a
post-allocation pass. Since we can handle the endianness of the ELF file
the single `visitSectionLoadAddresses()` visitor function now, we don't
need to track debug objects and sections in template classes anymore. We
keep using the `DebugObject` class and drop `DebugObjectSection`,
`ELFDebugObjectSection<ELFT>` and `ELFDebugObject`.

Furthermore, we now use the allocation's working memory for load-address
fixups directly. We can drop the `WritableMemoryBuffer` from the debug
object and most of the `finalizeWorkingMemory()` step, which saves one

    [4 lines not shown]
DeltaFile
+224-383llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
+12-22llvm/include/llvm/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.h
+7-0llvm/include/llvm/ExecutionEngine/JITLink/JITLinkMemoryManager.h
+243-4053 files

LLVM/project 41e39edllvm/test/Analysis/DependenceAnalysis gcd-miv-overflow.ll

fix miscalculation
DeltaFile
+5-5llvm/test/Analysis/DependenceAnalysis/gcd-miv-overflow.ll
+5-51 files

LLVM/project 16f41cbmlir/include/mlir-c/Dialect AMDGPU.h, mlir/lib/Bindings/Python DialectAMDGPU.cpp

[mlir][amdgpu] Add Python bindings for TDM types (#172309)

Add bindings for:
- `TDMBaseType`
- `TDMDescriptorType`
- `TDMGatherBaseType`
DeltaFile
+65-0mlir/lib/Bindings/Python/DialectAMDGPU.cpp
+53-0mlir/lib/CAPI/Dialect/AMDGPU.cpp
+33-0mlir/include/mlir-c/Dialect/AMDGPU.h
+26-0mlir/test/python/dialects/amdgpu.py
+15-0mlir/python/CMakeLists.txt
+1-0mlir/python/mlir/dialects/amdgpu.py
+193-06 files

LLVM/project 7447fbflibcxx/include __config, libcxx/include/__thread/support c11.h pthread.h

[libc++] Use the C++11 syntax for the no_thread_safety_analysis attribute (#171800)

Using the C++11 syntax makes the attribute placement more consistent.
DeltaFile
+8-8libcxx/include/__thread/support/c11.h
+8-8libcxx/include/__thread/support/pthread.h
+8-8libcxx/include/__thread/support/windows.h
+2-2libcxx/include/__config
+26-264 files

LLVM/project 3c100d5libcxx/src charconv.cpp atomic.cpp, libcxx/src/include from_chars_floating_point.h

[libc++] Enable -Wmissing-prototypes (#116261)

DeltaFile
+5-3libcxxabi/src/cxa_personality.cpp
+6-0libcxxabi/src/private_typeinfo.cpp
+4-1libcxx/src/charconv.cpp
+4-1libunwind/include/unwind_arm_ehabi.h
+2-2libcxx/src/include/from_chars_floating_point.h
+4-0libcxx/src/atomic.cpp
+25-711 files not shown
+40-1217 files

LLVM/project 1ba23ffclang/test/CodeGen/AArch64/sve2p2-intriniscs acle_sve2p2_expand.c acle_sve2p2_compact.c, clang/test/Sema/AArch64 arm_sve_feature_dependent_sve_AND_LP_sve2p2_OR_sme2p2_RP___sme_AND_sme2p2.c arm_sve_streaming_only_sme_AND_sme2p2.c

[AArch64] Add intrinsics support for SVE2p2 instructions (#163575)

This patch add intrinsics for SVE2p2 instructions defined in
[this](https://github.com/ARM-software/acle/pull/412) ACLE proposal.
Intrinsics added:

```
  // Variants are available for:
  // _s8, _s16, _u16, _mf8, _bf16, _f16
  svuint8_t svcompact[_u8](svbool_t pg, svuint8_t zn);

  // Variants are available for:
  // _s8, _s16, _u16, _s32, _u32, _s64, _u64
  // _mf8, _bf16, _f16, _f32, _f64
  svuint8_t svexpand[_u8](svbool_t pg, svuint8_t zn);

  // Variants are available for:
  // _b16, _b32, _b64
  int64_t svfirstp_b8(svbool_t pg, svbool_t pn);

    [12 lines not shown]
DeltaFile
+264-0clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_LP_sve2p2_OR_sme2p2_RP___sme_AND_sme2p2.c
+241-0clang/test/CodeGen/AArch64/sve2p2-intriniscs/acle_sve2p2_expand.c
+173-0llvm/test/CodeGen/AArch64/sve2p2-intrinsics.ll
+167-0clang/test/Sema/AArch64/arm_sve_streaming_only_sme_AND_sme2p2.c
+139-0clang/test/CodeGen/AArch64/sve2p2-intriniscs/acle_sve2p2_compact.c
+118-0clang/test/Sema/AArch64/arm_sve_streaming_only_sme_AND_sme2_AND_sve-bfscale.c
+1,102-010 files not shown
+1,489-1116 files

LLVM/project 44735e1mlir/test/Dialect/MemRef canonicalize.mlir

[mlir] Clean up leftovers from moving linalg::Expand/CollapseShapeOp to memref dialect (#172448)

DeltaFile
+2-2mlir/test/Dialect/MemRef/canonicalize.mlir
+2-21 files

LLVM/project 3ed5c19clang/docs SanitizerCoverage.rst, llvm/test/tools/sancov union-different-files.test union-same-file.test

[sancov] Add -diff and -union options to compute set difference and union of sancov files  (#171191)

Add two new actions for `.sancov` files:

`-diff`: Computes the difference between two `.sancov` files (A - B) and
writes the result to a new file. Requires exactly two inputs and an
`--output` option. The output preserves the binary format (magic number
and bitness) of the first input.

`-union`: Computes the union of one or more `.sancov` files and writes
the result to a new file. Requires at least one input and an `--output`
option. The output preserves the binary format of the first input.

A warning is shown if input files differ in bitness (32-bit vs 64-bit),
but the operation proceeds using the first file’s bitness.
DeltaFile
+154-4llvm/tools/sancov/sancov.cpp
+31-10clang/docs/SanitizerCoverage.rst
+11-0llvm/test/tools/sancov/union-different-files.test
+10-0llvm/test/tools/sancov/union-same-file.test
+8-0llvm/tools/sancov/Opts.td
+7-0llvm/test/tools/sancov/diff-different-files.test
+221-144 files not shown
+239-1410 files

LLVM/project a08a55cmlir/include/mlir/Dialect/Tosa/Transforms Passes.td, mlir/lib/Dialect/Tosa/Transforms TosaNarrowTypes.cpp TosaNarrowI64ToI32.cpp

[mlir][tosa] Extend narrowing pass (#170712)

- unify the i64->i32 and f64->f32 narrowing logic inside the shared
implementation
- register tosa::ConstOp in the non-aggressive rewrite set so standalone
constants are narrowed

---------

Signed-off-by: Vitalii Shutov <vitalii.shutov at arm.com>
Co-authored-by: Luke Hutton <Luke.Hutton at arm.com>
DeltaFile
+691-0mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
+0-348mlir/lib/Dialect/Tosa/Transforms/TosaNarrowI64ToI32.cpp
+180-0mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
+70-0mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
+25-0mlir/include/mlir/Dialect/Tosa/Transforms/Passes.td
+12-0mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
+978-3481 files not shown
+979-3497 files

LLVM/project ff3d477llvm/utils update_mir_regclass_numbers

[utils] Update update_mir_regclass_numbers usage (#172436)

Update usage instructions after #167700.
DeltaFile
+1-1llvm/utils/update_mir_regclass_numbers
+1-11 files

LLVM/project 1bfa250clang/include/clang/Basic DiagnosticParseKinds.td, clang/lib/Parse ParseDeclCXX.cpp

[Clang][C++26] Remove the notion of replaceability. (#172150)

In Kona, WG21 decided to revert trivial relocation (P2786).

Given that the notion of replaceability that was introduced at the same
time does not appear to be used by clang 21 users, and is less likely to
come back, it is easier to fully remove wholesale.

Subsequent patches will deal with relocation.
DeltaFile
+3-179clang/lib/Sema/SemaTypeTraits.cpp
+10-149clang/test/SemaCXX/type-traits-unsatisfied-diags.cpp
+11-80clang/test/SemaCXX/cxx2c-trivially-relocatable.cpp
+5-44clang/lib/Parse/ParseDeclCXX.cpp
+9-20clang/test/Parser/cxx2c-trivially-relocatable.cpp
+11-10clang/include/clang/Basic/DiagnosticParseKinds.td
+49-48212 files not shown
+58-56218 files

LLVM/project e60471dclang/test/Modules module-local-template-instantiation-in-namespace.cppm

[NFC] [C++20] [Modules] Add a test for module local template instantiation in namespace

This was found when debugging
https://github.com/llvm/llvm-project/issues/164466

I think more tests are always good. So I want to land this as a
regression check.
DeltaFile
+59-0clang/test/Modules/module-local-template-instantiation-in-namespace.cppm
+59-01 files

LLVM/project e220108llvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp

[AArch64][GlobalISel] SIMD fpcvt codegen for rounding nodes (#171446)

This is followup to patch to
https://github.com/llvm/llvm-project/pull/165546, which allowed simd
fpcvt instructions to be generated from l/llround and l/llrint nodes.
This patch extends this work to enable simd fpcvt instruction generation
with GlobalISel.
DeltaFile
+88-42llvm/lib/Target/AArch64/AArch64InstrInfo.td
+27-15llvm/test/CodeGen/AArch64/vector-lrint.ll
+12-6llvm/test/CodeGen/AArch64/vector-llrint.ll
+5-13llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+2-2llvm/test/CodeGen/AArch64/GlobalISel/regbank-lround.mir
+2-2llvm/test/CodeGen/AArch64/GlobalISel/regbank-llround.mir
+136-801 files not shown
+139-807 files

LLVM/project c7147a9llvm/docs LangRef.rst

[LangRef] Fix inequalities and add examples for `loop.dependence.*.mask` (#170861)

For both the war/raw mask, `>=` was used where it should have been `>`.

This change matches the current implementation.

The examples added in this patch should help clarify why this change is
needed.
DeltaFile
+59-4llvm/docs/LangRef.rst
+59-41 files

LLVM/project d119f50clang/include/clang/Basic PointerAuthOptions.h LangOptions.h

Moving things around
DeltaFile
+22-0clang/include/clang/Basic/PointerAuthOptions.h
+1-18clang/include/clang/Basic/LangOptions.h
+23-182 files

LLVM/project 200ea6cllvm/lib/Target/AMDGPU SIInsertWaitcnts.cpp, llvm/test/CodeGen/AMDGPU atomicrmw_usub_sat.ll atomicrmw_usub_cond.ll

refactor after rebase
DeltaFile
+0-30llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
+4-14llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+0-14llvm/test/CodeGen/AMDGPU/atomicrmw_usub_cond.ll
+0-5llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_cond.ll
+0-5llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-usub_sat.ll
+4-685 files

LLVM/project c0e72f6clang/include/clang/Basic BuiltinsAMDGPU.def, clang/test/SemaHIP amdgpu-ds-atomic-fadd-err.hip

[Clang] Remove 't' from __builtin_amdgcn_ds_atomic_fadd_f32/f64 (#172293)

Allows for type checking depending on the builtin signature.
DeltaFile
+33-0clang/test/SemaHIP/amdgpu-ds-atomic-fadd-err.hip
+29-0clang/test/SemaOpenCL/amdgpu-ds-atomic-fadd-err.cl
+2-2clang/include/clang/Basic/BuiltinsAMDGPU.def
+64-23 files

LLVM/project 3d06968clang/lib/CodeGen CGBuiltin.cpp CGOpenMPRuntimeGPU.cpp

[CodeGen] Use getAllOnesValue() for -1 constants
DeltaFile
+2-2clang/lib/CodeGen/CGBuiltin.cpp
+2-2clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+1-1clang/lib/CodeGen/CGCUDANV.cpp
+1-1clang/lib/CodeGen/CGGPUBuiltin.cpp
+6-64 files

LLVM/project 22f33f9clang/lib/CodeGen MicrosoftCXXABI.cpp

[MicrosoftCXXABI] Use getSigned() for signed vptr offset
DeltaFile
+18-15clang/lib/CodeGen/MicrosoftCXXABI.cpp
+18-151 files

LLVM/project af3f2daclang/lib/CodeGen CGExprScalar.cpp, clang/test/CodeGen/SystemZ zvector.c

[CGExprScalar] Fix inc/dec of vector larger than 64-bit (#172301)

Use getSigned() to create the 1 or -1 constant, so it gets properly sign
extended.

This miscompile was found while working on
https://github.com/llvm/llvm-project/pull/171456.
DeltaFile
+4-4clang/test/CodeGen/SystemZ/zvector.c
+1-1clang/lib/CodeGen/CGExprScalar.cpp
+5-52 files