LLVM/project 02bc04fclang/test/CodeGen/AArch64/sve2p2-intriniscs acle_sve2p2_expand.c acle_sve2p2_compact.c, clang/test/CodeGen/AArch64/sve2p2-intrinsics acle_sve2p2_expand.c acle_sve2p2_compact.c

Fix typo in 'clang/test/CodeGen/AArch64/sve2p2-intriniscs' folder name (#175481)

Fixes #175480.

Tests are merged with the correct
[sve2p2-intrinsics](https://github.com/llvm/llvm-project/tree/main/clang/test/CodeGen/AArch64/sve2p2-intrinsics)
folder.
DeltaFile
+241-0clang/test/CodeGen/AArch64/sve2p2-intrinsics/acle_sve2p2_expand.c
+0-241clang/test/CodeGen/AArch64/sve2p2-intriniscs/acle_sve2p2_expand.c
+139-0clang/test/CodeGen/AArch64/sve2p2-intrinsics/acle_sve2p2_compact.c
+0-139clang/test/CodeGen/AArch64/sve2p2-intriniscs/acle_sve2p2_compact.c
+99-0clang/test/CodeGen/AArch64/sve2p2-intrinsics/acle_sve2p2_lastp.c
+99-0clang/test/CodeGen/AArch64/sve2p2-intrinsics/acle_sve2p2_firstp.c
+578-3802 files not shown
+578-5788 files

LLVM/project eee8d54llvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/Target/PowerPC PPCInstrInfo.h

[CodeGen][InlineSpiller] Add SubReg argument to loadRegFromStackSlot for subreg-reload

This preparatory patch introduces an additional argument to the target hook
loadRegFromStackSlot. Ths is essential for targets to handle subregister-specific
reload in the future. See how this is used for AMDGPU target with PR #175002.
DeltaFile
+6-3llvm/include/llvm/CodeGen/TargetInstrInfo.h
+3-3llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+2-3llvm/lib/Target/X86/X86InstrInfo.h
+2-3llvm/lib/Target/XCore/XCoreInstrInfo.h
+1-2llvm/lib/Target/SystemZ/SystemZInstrInfo.h
+1-2llvm/lib/Target/PowerPC/PPCInstrInfo.h
+15-1642 files not shown
+57-5048 files

LLVM/project 3bcc768cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb pointer-union.test, libcxx/test/libcxx/mem/mem.res nodiscard.verify.cpp

Merge branch 'main' into users/kparzysz/add-traits-4
DeltaFile
+80-98llvm/lib/Analysis/ScalarEvolution.cpp
+112-35llvm/test/CodeGen/X86/isint.ll
+112-0llvm/test/CodeGen/RISCV/rda-liveins.mir
+86-0cross-project-tests/debuginfo-tests/llvm-prettyprinters/lldb/pointer-union.test
+74-0llvm/test/Transforms/InstCombine/X86/x86-scalar-max-min.ll
+57-11libcxx/test/libcxx/mem/mem.res/nodiscard.verify.cpp
+521-144310 files not shown
+1,513-737316 files

LLVM/project 01e9c20llvm/test/CodeGen/X86 isint.ll

[X86] isint.ll - ensure have test coverage for all x86-64 cpu levels (#175574)

DeltaFile
+112-35llvm/test/CodeGen/X86/isint.ll
+112-351 files

LLVM/project d5e610alldb/source/Plugins/Language/CPlusPlus LibCxx.cpp LibCxxUnorderedMap.cpp

[lldb][Formatters] Remove broken/redundant lookup into anonymous child when extracting from compressed pairs (#175564)

(brought to my attention in
https://github.com/llvm/llvm-project/pull/155153#discussion_r2682666325)

This patch removes the `anon_struct_idx` of
`GetValueOrOldCompressedPair`.

The latest `_LIBCPP_COMPRESSED_PAIR` wraps the members in an anonymous
structure. Around the time of the original patch that introduced
`GetValueOrOldCompressedPair`
(https://github.com/llvm/llvm-project/pull/155153),
`GetChildMemberWithName` wasn't capable of "seeing through" anonymous
structures when searching for children. However, around the same time as
https://github.com/llvm/llvm-project/pull/155153 landed, the
`GetChildMemberWithName` behaviour was fixed (in
https://github.com/llvm/llvm-project/pull/138487). So regardless of
whether the the compressed pair is wrapped in an anonymous structure,
simply calling `GetChildMemberWithName` is the right thing to do.

    [5 lines not shown]
DeltaFile
+7-16lldb/source/Plugins/Language/CPlusPlus/LibCxx.cpp
+6-6lldb/source/Plugins/Language/CPlusPlus/LibCxxUnorderedMap.cpp
+4-5lldb/source/Plugins/Language/CPlusPlus/GenericList.cpp
+2-2lldb/source/Plugins/Language/CPlusPlus/LibCxxVector.cpp
+2-2lldb/source/Plugins/Language/CPlusPlus/LibCxxMap.cpp
+1-2lldb/source/Plugins/Language/CPlusPlus/LibCxx.h
+22-336 files

LLVM/project 01e089eflang/include/flang/Parser parse-tree-visitor.h

[flang] Remove unnecessary overloads of Walk in parse tree visitor (#175563)

These actions are now performed by the trait-based Walk functions.
DeltaFile
+0-72flang/include/flang/Parser/parse-tree-visitor.h
+0-721 files

LLVM/project 48d1636libcxx/include/__memory_resource polymorphic_allocator.h synchronized_pool_resource.h, libcxx/test/libcxx/diagnostics memory_resource.nodiscard.verify.cpp

[libc++][memory_resource] Applied `[[nodiscard]]` (#172134)

`[[nodiscard]]` should be applied to functions where discarding the
return value is most likely a correctness issue.

- https://libcxx.llvm.org/CodingGuidelines.html
- https://wg21.link/mem.res

Towards #172124

---------

Co-authored-by: Hristo Hristov <zingam at outlook.com>
Co-authored-by: Nikolas Klauser <nikolasklauser at berlin.de>
DeltaFile
+57-11libcxx/test/libcxx/mem/mem.res/nodiscard.verify.cpp
+0-25libcxx/test/libcxx/diagnostics/memory_resource.nodiscard.verify.cpp
+4-2libcxx/include/__memory_resource/polymorphic_allocator.h
+4-2libcxx/include/__memory_resource/synchronized_pool_resource.h
+4-2libcxx/include/__memory_resource/memory_resource.h
+1-1libcxx/include/__memory_resource/monotonic_buffer_resource.h
+70-431 files not shown
+71-447 files

LLVM/project a3f6a10flang/include/flang/Parser parse-tree-visitor.h parse-tree.h, flang/lib/Lower/OpenMP Utils.cpp

[flang] Add traits to more AST nodes

Follow-up to PR175211.

There are still a few AST nodes that don't have any of the standard
traits (Wrapper/Tuple/etc). Because of that they require special
handling in the parse tree visitor.

Convert a subset of these nodes to the typical format, and remove the
special cases from the parse tree visitor.

The members of these nodes were frequently used, so instead of extracting
them by hand each time use helper member functions to access them.
DeltaFile
+40-38flang/lib/Semantics/expression.cpp
+0-65flang/include/flang/Parser/parse-tree-visitor.h
+21-24flang/include/flang/Parser/parse-tree.h
+20-19flang/lib/Semantics/resolve-names.cpp
+12-10flang/lib/Lower/OpenMP/Utils.cpp
+10-10flang/lib/Semantics/check-do-forall.cpp
+103-16617 files not shown
+194-24923 files

LLVM/project 669d71bllvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass.ll

ValueTracking: Fix handling of fadd with mixed denormal modes (#175454)

Fix case where the input mode is IEEE, the output flushes, and the
input could be subnormal. Also improves accuracy with positive zero
case.
DeltaFile
+45-1llvm/test/Transforms/Attributor/nofpclass.ll
+4-1llvm/lib/Analysis/ValueTracking.cpp
+49-22 files

LLVM/project 9ad052ellvm/test/MC/AMDGPU hsa-diag-v4.s unknown-target-cpu.s, llvm/test/MC/Disassembler/AMDGPU decode-err.txt

[AMDGPU] Remove unneeded -show-encoding option from MC tests. NFC. (#175569)

DeltaFile
+7-7llvm/test/MC/AMDGPU/hsa-diag-v4.s
+2-2llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+1-1llvm/test/MC/AMDGPU/unknown-target-cpu.s
+10-103 files

LLVM/project 9c5708cllvm/test/MC/AMDGPU smem.s gfx1030_err.s

[AMDGPU] Use -filetype=null for more MC tests. NFCI. (#175567)

Following on from #175543 which did the same only for tests not using
`FileCheck -implicit-check-not=error:` or similar.
DeltaFile
+7-7llvm/test/MC/AMDGPU/smem.s
+7-7llvm/test/MC/AMDGPU/gfx1030_err.s
+6-6llvm/test/MC/AMDGPU/sopk-err.s
+6-6llvm/test/MC/AMDGPU/ds_swizzle.s
+6-6llvm/test/MC/AMDGPU/gfx10_asm_err.s
+6-6llvm/test/MC/AMDGPU/sop2.s
+38-38249 files not shown
+444-444255 files

LLVM/project 9864022clang/examples/LLVMPrintFunctionNames CMakeLists.txt, clang/examples/PrintFunctionNames CMakeLists.txt

[CMake][NFC] Don't use uninitialized LLVM_REQUIRES_* (#175554)

LLVM_REQUIRES_* are per-target flags that are never set globally. Yet,
some files used these (undefined) flags for some logic. This patch
emoves these dead checks/unconditionally executes the logic. Note that
the referenced *.exports files are empty, so there is no need to make
related logic conditional on MSVC.
DeltaFile
+2-10clang/examples/LLVMPrintFunctionNames/CMakeLists.txt
+2-10clang/examples/PrintFunctionNames/CMakeLists.txt
+2-7llvm/tools/bugpoint-passes/CMakeLists.txt
+1-1offload/unittests/Conformance/lib/CMakeLists.txt
+7-284 files

LLVM/project a698f7eclang/lib/CrossTU CrossTranslationUnit.cpp

[clang] Prevent sandbox violations in `CrossTranslationUnitContext` (#175097)

This uses the VFS to load a file instead of using
`MemoryBuffer::getBufferForFile()` directly to avoid sandbox violation.
Sandbox is then disabled for `CreateASTUnitFromCommandLine()` which
invokes the driver which is not expected to be free of sandbox
violations.
DeltaFile
+4-1clang/lib/CrossTU/CrossTranslationUnit.cpp
+4-11 files

LLVM/project fd90b7cclang/lib/Frontend ModuleDependencyCollector.cpp

[clang] Bypass sandbox in `ModuleDependencyCollector` (#175220)

This PR disables the sandbox for file collection within
`ModuleDependencyCollector`. This is typically only invoked when the
`-module-dependency-dir` option is specified for generating a crash
report, where the sandbox is not as crucial as for regular compilation.
DeltaFile
+11-5clang/lib/Frontend/ModuleDependencyCollector.cpp
+11-51 files

LLVM/project e531f48llvm/lib/Target/SPIRV SPIRVPostLegalizer.cpp, llvm/test/CodeGen/SPIRV/instructions zext_sext_deduce_type.ll

[SPIRV] Deduce result type for `G_SEXT` and `G_ZEXT` (#175401)

During legalisation we can fold / combine `sext` followed by a widening
via `zext`. Unfortunately, this yields a new result register with no
SPIRV Type, which leads to incorrect behaviour during post legalisation
when we end up deducing the (narrower) type from the operand. This patch
corrects the behaviour in that it ensures that we use the (widened) type
of the result to yield the SPIRV Type for the register.
DeltaFile
+23-0llvm/test/CodeGen/SPIRV/instructions/zext_sext_deduce_type.ll
+2-0llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
+25-02 files

LLVM/project 68239d5llvm/cmake/modules AddLLVM.cmake

[CMake][NFC] Drop unnecessary GTest RTTI define (#175555)

gtest automatically determines GTEST_HAS_RTTI from pre-defined compiler
macros, there is no need to explicitly define this and especially no
need to define this for every single source file.
DeltaFile
+0-3llvm/cmake/modules/AddLLVM.cmake
+0-31 files

LLVM/project 123b6a2llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Give VPInstruction::ExplicitVectorLength name. NFC (#175493)

This makes it a tad easier to read VPlan dumps, e.g.

    WIDEN vp.store vp<%7>, ir<%val>, vp<%5>
    ->
    WIDEN vp.store vp<%7>, ir<%val>, vp<%evl>
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+1-11 files

LLVM/project 727ca13flang/include/flang/Parser parse-tree-visitor.h parse-tree.h, flang/lib/Lower/OpenMP Utils.cpp

[flang] Add traits to more AST nodes

Follow-up to PR175211.

There are still a few AST nodes that don't have any of the standard
traits (Wrapper/Tuple/etc). Because of that they require special
handling in the parse tree visitor.

Convert a subset of these nodes to the typical format, and remove the
special cases from the parse tree visitor.

The members of these nodes were frequently used, so instead of extracting
them by hand each time use helper member functions to access them.
DeltaFile
+40-38flang/lib/Semantics/expression.cpp
+0-65flang/include/flang/Parser/parse-tree-visitor.h
+21-24flang/include/flang/Parser/parse-tree.h
+20-19flang/lib/Semantics/resolve-names.cpp
+12-10flang/lib/Lower/OpenMP/Utils.cpp
+10-10flang/lib/Semantics/check-do-forall.cpp
+103-16617 files not shown
+194-24923 files

LLVM/project 04e5bc7clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/test/CodeGen builtins-arm64.c arm_acle.c

[AArch64] Add support for range prefetch intrinsic (#170490)

This patch adds support in Clang for the RPRFM instruction, by adding
the following intrinsics:

```
void __pldx_range(unsigned int *access_kind*, unsigned int retention_policy,
                               signed int length*, unsigned int count, signed int stride,
                               size_t reuse distance,  void const *addr);

void __pld_range(unsigned int access_kind*, unsigned int retention_policy,
                              uint64_t metadata, void const *addr);
```

The `__ARM_PREFETCH_RANGE` macro can be used to test whether these
intrinsics are implemented. If the RPRFM instruction is not available, this
instruction is a NOP.

This implements the following ACLE proposal:
https://github.com/ARM-software/acle/pull/423
DeltaFile
+54-0clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+49-0clang/test/CodeGen/builtins-arm64.c
+22-0clang/test/CodeGen/arm_acle.c
+18-0llvm/test/CodeGen/AArch64/range-prefetch.ll
+14-1clang/test/Sema/builtins-arm64.c
+14-0llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+171-112 files not shown
+254-118 files

LLVM/project 38023b2flang/include/flang/Parser parse-tree.h, flang/lib/Semantics resolve-names.cpp expression.cpp

format
DeltaFile
+3-3flang/lib/Semantics/resolve-names.cpp
+2-2flang/include/flang/Parser/parse-tree.h
+2-2flang/lib/Semantics/expression.cpp
+7-73 files

LLVM/project 3c45c54llvm/cmake/modules HandleLLVMOptions.cmake AddLLVM.cmake

[CMake] Move RTTI flag calculation to AddLLVM.cmake (#175553)

This should help users who use AddLLVM.cmake without HandleLLVMOptions.
Note that remains MSVC is unlikely to work.

Follow up of #174084.
DeltaFile
+3-12llvm/cmake/modules/HandleLLVMOptions.cmake
+12-0llvm/cmake/modules/AddLLVM.cmake
+15-122 files

LLVM/project 0899be9flang/lib/Parser parse-tree.cpp

Remove leftover comment
DeltaFile
+0-1flang/lib/Parser/parse-tree.cpp
+0-11 files

LLVM/project 16078f0llvm/include/llvm/Support JSON.h, llvm/lib/Support JSON.cpp

[Support][NFC] Move JSON::dump out-of-line (#175558)

Prevents redundant compilation into all objects that include the header.
DeltaFile
+7-0llvm/lib/Support/JSON.cpp
+1-4llvm/include/llvm/Support/JSON.h
+8-42 files

LLVM/project 527d0aflibcxx/include/__numeric midpoint.h

[libc++] Removed unused internal helper functions from the midpoint.h header (#175514)

DeltaFile
+0-5libcxx/include/__numeric/midpoint.h
+0-51 files

LLVM/project b22c149llvm/docs ReleaseNotes.md

[LLDB] Mention MSVC STL formatters in release notes (#175527)

We already had a few MSVC STL formatters at the last release, but we
postponed the release note entry until they support PDB. The formatters
now support PDB.

There are still some left (see
https://github.com/llvm/llvm-project/issues/24834#issuecomment-3049291996),
but the most common types are formatted.
DeltaFile
+1-0llvm/docs/ReleaseNotes.md
+1-01 files

LLVM/project f2ba54allvm/test/CodeGen/RISCV rda-liveins.mir

[ReachingDefAnalysis] Test RDA on live-in registers. (#175389)

We plan to track live-in registers in RDA. Precommit a test for that.
DeltaFile
+112-0llvm/test/CodeGen/RISCV/rda-liveins.mir
+112-01 files

LLVM/project 2b2772bllvm/test/CodeGen/AMDGPU regpressure-mitigation-with-subreg-reload.mir

compacted the virt-reg numbers
DeltaFile
+14-14llvm/test/CodeGen/AMDGPU/regpressure-mitigation-with-subreg-reload.mir
+14-141 files

LLVM/project b221906llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll ran-out-of-sgprs-allocation-failure.mir

[InlineSpiller][AMDGPU] Implement subreg reload during RA spill

Currently, when a virtual register is partially used, the
entire tuple is restored from the spilled location, even if
only a subset of its sub-registers is needed. This patch
introduces support for partial reloads by analyzing actual
register usage and restoring only the required sub-registers.
This improvement enhances register allocation efficiency,
particularly for cases involving tuple virtual registers.
For AMDGPU, this change brings considerable improvements
in workloads that involve matrix operations, large vectors,
and complex control flows.
DeltaFile
+3,429-4,107llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+81-102llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
+35-56llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
+91-0llvm/test/CodeGen/AMDGPU/skip-partial-reload-for-16bit-regaccess.mir
+40-40llvm/test/CodeGen/AMDGPU/ra-inserted-scalar-instructions.mir
+26-52llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+3,702-4,35767 files not shown
+4,021-4,57473 files

LLVM/project 1a83444llvm/lib/Target/AMDGPU SIRegisterInfo.cpp SIRegisterInfo.h

[AMDGPU] Put back ProperlyAlighedRC helper functions

Putting back the functions that are recently deleted
as they were found unused. They are needed for
implementing subreg reload during RA.
DeltaFile
+22-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+5-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+27-02 files

LLVM/project 2750ee4llvm/lib/Target/AMDGPU SIRegisterInfo.cpp SIInstrInfo.cpp

moved the implementation to SIInstrInfo.
DeltaFile
+1-149llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+146-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+3-0llvm/lib/Target/AMDGPU/SIInstrInfo.h
+0-2llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+150-1514 files