LLVM/project ea9cbd8llvm/utils/gn/secondary/llvm/lib/Target/Hexagon BUILD.gn

[gn] port 29f35ec01e8f53f4e (Hexagon SDNodeInfo)
DeltaFile
+7-0llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn
+7-01 files

LLVM/project 838a49dmlir/include/mlir/Interfaces ControlFlowInterfaces.h ControlFlowInterfaces.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir][draft] Consolidate patterns into RegionBranchOpInterface patterns

fix some tests

reorganize code
DeltaFile
+17-813mlir/lib/Dialect/SCF/IR/SCF.cpp
+483-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+11-13mlir/test/Dialect/SCF/canonicalize.mlir
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+4-4mlir/test/Transforms/remove-dead-values.mlir
+5-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+529-8306 files

LLVM/project a56e68fmlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+143-304mlir/lib/Transforms/RemoveDeadValues.cpp
+110-45mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+264-3494 files

LLVM/project 8913900llvm/lib/Target/AMDGPU VOP3PInstructions.td

[NFC][AMDGPU] Add comments for literal arguments of WMMA profiles (#174175)

Otherwise it is really hard to understand what those 0s and 1s correpond
to what.
DeltaFile
+74-53llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+74-531 files

LLVM/project 351f933llvm/test/Transforms/LoopVectorize iv-select-cmp-trunc.ll

[LV] Add FindFirstIV test with IV truncated to i1 (NFC).

Adds test case for  https://github.com/llvm/llvm-project/issues/173459.
DeltaFile
+228-0llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
+228-01 files

LLVM/project a2cd2dclldb/packages/Python/lldbsuite/test/tools/lldb-dap lldbdap_testcase.py, lldb/test/API/tools/lldb-dap/io TestDAP_io.py

[lldb-dap][NFC] change the dap log file extension (#173994)

DeltaFile
+1-1lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
+1-1lldb/test/API/tools/lldb-dap/io/TestDAP_io.py
+1-1lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
+3-33 files

LLVM/project 8d75f97llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 split-node-reduce-root.ll

[SLP]Consider split node as potential reduction root

Need to check the first split node as a potential reduction root to
prevent compiler crash
DeltaFile
+40-0llvm/test/Transforms/SLPVectorizer/X86/split-node-reduce-root.ll
+3-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+43-02 files

LLVM/project fba22camlir/include/mlir/Interfaces ControlFlowInterfaces.h ControlFlowInterfaces.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir][draft] Consolidate patterns into RegionBranchOpInterface patterns

fix some tests

reorganize code
DeltaFile
+17-813mlir/lib/Dialect/SCF/IR/SCF.cpp
+483-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+11-13mlir/test/Dialect/SCF/canonicalize.mlir
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+4-4mlir/test/Transforms/remove-dead-values.mlir
+5-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+529-8306 files

LLVM/project a6c7e40mlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+162-303mlir/lib/Transforms/RemoveDeadValues.cpp
+110-45mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+283-3484 files

LLVM/project 05aa443mlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+164-313mlir/lib/Transforms/RemoveDeadValues.cpp
+110-45mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+285-3584 files

LLVM/project 8cf9691mlir/lib/Conversion/ArithToSPIRV ArithToSPIRV.cpp, mlir/lib/Conversion/SPIRVCommon Pattern.h

[mlir][SPIRV] Move getDecorationString to common utilities. (#174145)

Moved getDecorationString() utility function from ArithToSPIRV.cpp to
the common SPIRVCommon/Pattern.h header to make it reusable across
SPIR-V conversion passes.
DeltaFile
+13-0mlir/lib/Conversion/SPIRVCommon/Pattern.h
+3-4mlir/lib/Conversion/SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp
+0-5mlir/lib/Conversion/ArithToSPIRV/ArithToSPIRV.cpp
+16-93 files

LLVM/project 6271978llvm/lib/TableGen Main.cpp

[TableGen] Remove unused parameter Parser from WriteOutput. NFC. (#174210)

DeltaFile
+4-4llvm/lib/TableGen/Main.cpp
+4-41 files

LLVM/project 346431cmlir/include/mlir/Interfaces ControlFlowInterfaces.h ControlFlowInterfaces.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir][draft] Consolidate patterns into RegionBranchOpInterface patterns

fix some tests

reorganize code
DeltaFile
+17-813mlir/lib/Dialect/SCF/IR/SCF.cpp
+483-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+11-13mlir/test/Dialect/SCF/canonicalize.mlir
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+4-4mlir/test/Transforms/remove-dead-values.mlir
+5-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+529-8306 files

LLVM/project 732b6f3mlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+166-318mlir/lib/Transforms/RemoveDeadValues.cpp
+110-45mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+287-3634 files

LLVM/project 7de3fb5mlir/lib/Transforms RemoveDeadValues.cpp

[mlir][Transforms][NFC] `remove-dead-values`: Erase ops at the end (#174208)

`remove-dead-values` performs various cleanups:
1. Erasing block arguments
2. Erasing successor operands
3. Erasing operations
4. Erasing function arguments / results
5. Erasing operands
6. Erasing results

This commit moves Step 3 (erasing operations) to the end. While that
does not fix any bugs by itself, it is potentially safer. If an
operation is erased, we must be careful that the operation is not
accessed in the following steps. That can no longer happen if IR is
erased only in the final step and not before.

This commit is prefetching a change from #173505 (to keep that PR
shorter). With #173505, it will become necessary to erase IR in the
final step.
DeltaFile
+19-18mlir/lib/Transforms/RemoveDeadValues.cpp
+19-181 files

LLVM/project 43e34b6mlir/include/mlir/Interfaces ControlFlowInterfaces.h ControlFlowInterfaces.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir][draft] Consolidate patterns into RegionBranchOpInterface patterns

fix some tests

reorganize code
DeltaFile
+17-813mlir/lib/Dialect/SCF/IR/SCF.cpp
+483-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+11-13mlir/test/Dialect/SCF/canonicalize.mlir
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+4-4mlir/test/Transforms/remove-dead-values.mlir
+5-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+529-8306 files

LLVM/project 33442eellvm/test/CodeGen/AArch64 arm64-csel.ll aarch64-isel-csinc.ll

[AArch64][GlobalISel] Add extra csel test coverage. NFC
DeltaFile
+245-109llvm/test/CodeGen/AArch64/arm64-csel.ll
+116-49llvm/test/CodeGen/AArch64/aarch64-isel-csinc.ll
+361-1582 files

LLVM/project 06e76fdllvm/lib/Analysis ValueTracking.cpp

ValueTracking: Avoid unnecessary denormal mode lookup for fadd

The mode was already queried, so don't do it again.
DeltaFile
+4-8llvm/lib/Analysis/ValueTracking.cpp
+4-81 files

LLVM/project 7d28062llvm/lib/Analysis ValueTracking.cpp

Neg 0 handling redundant
DeltaFile
+4-10llvm/lib/Analysis/ValueTracking.cpp
+4-101 files

LLVM/project cd82eecllvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass.ll

Consider output denorm mode
DeltaFile
+6-6llvm/test/Transforms/Attributor/nofpclass.ll
+5-2llvm/lib/Analysis/ValueTracking.cpp
+11-82 files

LLVM/project 0f22814llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass.ll

More accurate double 0 handling
DeltaFile
+4-4llvm/test/Transforms/Attributor/nofpclass.ll
+2-1llvm/lib/Analysis/ValueTracking.cpp
+6-52 files

LLVM/project 13b91f8llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass.ll

Check isGuaranteedNotToBeUndef
DeltaFile
+6-4llvm/lib/Analysis/ValueTracking.cpp
+2-2llvm/test/Transforms/Attributor/nofpclass.ll
+8-62 files

LLVM/project 589a458llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass.ll

ValueTracking: Improve handling of fadd in computeKnownFPClass.

This already recognized that if both inputs are positive, the
result is positive. Extend this to the mirror situation with
negative inputs.

Also special case fadd x, x. Canonically, fmul x, 2 is fadd x, x.
We can tell the sign bit won't change, and 0 will propagate.
DeltaFile
+29-29llvm/test/Transforms/Attributor/nofpclass.ll
+24-4llvm/lib/Analysis/ValueTracking.cpp
+53-332 files

LLVM/project c742955llvm/test/Transforms/Attributor nofpclass.ll

More mixed mode tests
DeltaFile
+110-21llvm/test/Transforms/Attributor/nofpclass.ll
+110-211 files

LLVM/project 28f0e10llvm/test/Transforms/Attributor nofpclass.ll

ValueTracking: Add more baseline tests for computeKnownFPClass of fadd

Test cases with fadd x, x. Also test cases where both inputs are known
negative.
DeltaFile
+665-106llvm/test/Transforms/Attributor/nofpclass.ll
+665-1061 files

LLVM/project 8c30a79mlir/include/mlir/Transforms Passes.td Passes.h, mlir/lib/Transforms RemoveDeadValues.cpp

tmp commit

simple test working

draft: do not erase IR, just replace uses
DeltaFile
+166-318mlir/lib/Transforms/RemoveDeadValues.cpp
+110-45mlir/test/Transforms/remove-dead-values.mlir
+10-0mlir/include/mlir/Transforms/Passes.td
+1-0mlir/include/mlir/Transforms/Passes.h
+287-3634 files

LLVM/project 29768f5mlir/lib/Transforms RemoveDeadValues.cpp

[mlir][Transforms][NFC] `remove-dead-values`: Erase ops at the end
DeltaFile
+19-18mlir/lib/Transforms/RemoveDeadValues.cpp
+19-181 files

LLVM/project 3b85a63llvm/lib/Transforms/Vectorize VectorCombine.cpp

[VectorCombine] scalarizeExtExtract - create bitmasks with APInt::getLowBitsSet to avoid UB (#174202)

If we're dealing with uint64 elements or larger, the existing `(1ull <<
SrcEltSizeInBits) - 1` mask can cause UB.

Fixes #174046
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+1-11 files

LLVM/project f2e2e00llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/PhaseOrdering/X86 loadcombine.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+32-228llvm/test/Transforms/SLPVectorizer/X86/bad-reduction.ll
+48-204llvm/test/Transforms/PhaseOrdering/X86/loadcombine.ll
+0-87llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-17llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
+4-17llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
+88-5535 files

LLVM/project 2b25e92libunwind/src UnwindCursor.hpp AddressSpace.hpp

[PAC][libunwind] Pass ptrauth-qualified values as const references (#173765)

For Apple's arm64e or Linux's pauthtest, `Registers_arm64::link_reg_t`
type is `__ptrauth`-qualified. When passing a value of such a type to a
function accepting non-`__ptrauth`-qualified parameter with `pint_t`
type, an authentication is performed. So, the corresponding callee
argument does not contain an embedded signature, making it prone to
substitution if spilled to the stack.

This patch prevents early authentication of signed values of
`link_reg_t` type by passing them as const l-value references instead of
passing by value with type `pint_t`. This way, the callee would operate
with a `__ptrauth`-qualified value containing a signature, allowing to
detect a substitution if the value is spilled to the stack.

Note that this approach was introduced previously in #143230 for some
other functions. In this patch, we apply the approach to the functions
which were not considered previously.
DeltaFile
+33-30libunwind/src/UnwindCursor.hpp
+21-11libunwind/src/AddressSpace.hpp
+17-11libunwind/src/DwarfParser.hpp
+23-0libunwind/src/Registers.hpp
+7-7libunwind/src/DwarfInstructions.hpp
+7-4libunwind/src/EHHeaderParser.hpp
+108-636 files