lldb-dap: Stop using replicated variable ids (#124232)
Closes #119784
Probably closes #147105 as well, but I couldn't test due to #156473:
This PR fixes two bugs:
1. It generates unique variable reference IDs per suspended debuggee
state.
2. It stores all created variables in a stopped state instead of
dropping variables in unselected scopes. So it can properly handle all
scope/variable requests
It does this by storing all variables in their respective scopes and
using that mapping in request handlers that relied on the old mapping.
It dynamically creates new variable/scope IDs instead of resetting IDs
whenever a new scope is created.
I also removed some unused code as well.
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[AArch64][SME] Add missing ZT0 transition (#179193)
This transition was missed off the switch, but is already supported (see
the test for the expected behavior).
(cherry picked from commit c7dd96e6f29b032a4879a7fe2fb0ff2ee1406aa5)
[VPlan] Create edge mask for single-destination switch (#179107)
When converting phis to blends, the `VPPredicator` expects to have edge
masks to the phi node if the phi node has different incoming blocks.
This was not the case if the predecessor of the phi was a switch where a
conditional destination was the same as the default destination.
This was because when creating edge masks in `createSwitchEdgeMasks`,
edge masks are set in a loop through the *non-default* destinations. But
when there are no non-default destinations (but at least one condition,
otherwise an earlier condition would trigger and just forward the source
mask), this loop is never executed, so the masks are never set.
To resolve this, we explicitly forward the source mask for these cases
as well, which is correct because it is an unconditional branch, just a
very convoluted one.
fixes #179074
(cherry picked from commit 3bbf748a63a3cb38271a478b520789be57d5e2c8)
[lldb] Remove --debug/-d option from lldb (#179978)
The functionality was removed in
d3173f4ab61c17337908eb7df3f1c515ddcd428c after being broken for a long
time.
There's a small risk someone is still passing the option, but I think
it's time to remove it and they can fix their scripts.
[flang] Use alias analysis in lowering record assignments (#180010)
Without alias analysis Flang assumes no aliasing in lowering record
assignments which can result in miscompilation of programs using
SEQUENCE types and EQUIVALENCE.
Use alias analysis to guard the fast path in `genRecordAssignment`;
otherwise fall back to element-wise expansion.
Update FIR FileCheck expectations
Add `FIRAnalysis` to `"flang/unittests/Optimizer/CMakeLists.txt"` to fix
the Windows x64 build failure (linker error).
Add `SEQUENCE` handling and update tests accordingly.
Fixes #175246 (and includes the fix to
flang/lib/Optimizer/Builder/CMakeLists.txt in PR #176483).
Co-authored-by: Matt P. Dziubinski <matt-p.dziubinski at hpe.com>
[libc++] Short-cut constraints of single-argument `any` constructor (#177082)
When a default template argument of a function template uses
`std::is_copy_constructible<T>::value` and `T` is convertible from and
to `any`, the changes in 21dc73f6a46cd786394f10f5aef46ec4a2d26175 would
introduce constraint meta-recursion when compiling with Clang.
This patch short-cuts constraints of the related constructor to avoid
computing `is_copy_constructible<T>` when `decay_t<T>` is `any`, which
gets rid of constraint meta-recursion in the overload resolution of copy
construction of `T`.
Fixes #176877.
(cherry picked from commit aa5428864e86f8e38806fc92d14cadc68b3d0667)
[DAGCombiner] Fix exact power-of-two signed division for large integers (#177340)
Previously, the DAG combiner did not optimize exact signed division by a
power-of-two constant divisor for integer types exceeding the size of
division supported by the target architecture (e.g., i128 on x86-64).
However, such an optimization was expected by the division expansion
logic, leading to unsupported division operations making it to
instruction selection.
This commit addresses this issue by making an exception to the existing
exclusion of signed division with the exact flag for the aforementioned
operations. That is, the DAG combiner will now optimize exact signed
division if the divisor is a power-of-two constant and the integer type
exceeds the size of division supported by the target architecture.
---------
Signed-off-by: Steffen Holst Larsen <HolstLarsen.Steffen at amd.com>
[NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (#179945)
PR #169040 already started using `TypeSize` for the return value of
`DataLayout::getType*Size` in the memset lowering, this PR adjusts other uses
in LowerMemIntrinsics to do the same. Currently, scalable vector types are not
supported as access types for the mem-intrinsic lowering.
[llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (#179908)
Adding FuncEmb API to ir2vec python bindings. Provide the IR name of a
function, and the API returns the func Embedding for it.
[clangd] Fix call hierarchy crash on malformed request (#179718)
The code for parsing a call hierarchy request was not using `ObjectMapper`
correctly: it was calling `map()` without first calling `operator bool()` to
check that an object was parsed at all.
Fixes #179109
[ELF][test] Consolidate .eh_frame FDE encoding tests
Merge eh-frame-value-format{1..9}.s into eh-frame-fde-encoding.s
(encoding is the DWARF term) using split-file. Add .eh_frame and
.eh_frame_hdr content verification for absptr, udata2, sdata4, udata4.
Move error test (9) to eh-frame-invalid-fde-encoding.s.
[NewPM] Port x86-indirect-branch-tracking (#179874)
Similar to other portings created by @aidenboom154. No specific test
coverage as there are no MIR->MIR tests that exercise this pass.
[X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (#180034)
combineVectorSizedSetCCEquality attempts to convert equality comparisons
of larger-than-legal scalar integers to PTEST/PMOVMSKB vector
comparisons.
However, combineSetCC has a number of other folds with more complex
icmp_eq/ne patterns that work with big integers (including bit test and
reduction patterns) that don't get a change to match as
combineVectorSizedSetCCEquality is run first, and the other folds are
then more difficult to match from PTEST/PMOVMSKB nodes.
This patch moves the combineVectorSizedSetCCEquality fold later to give
other icmp_eq/ne folds a chance to run first.
