[lldb] Guard DW_OP_convert against null DWARF unit and empty stack (#207008)
`Evaluate_DW_OP_convert` dereferenced `eval_ctx.dwarf_cu` (the
`DWARFExpression` Delegate) whenever the operand DIE offset was
non-zero,
and unconditionally read `eval_ctx.stack.back()`. When a DWARF
expression is evaluated without a DWARF unit (as the
lldb-dwarf-expression-fuzzer does), two operand shapes crash:
- `DW_OP_convert` with a non-zero offset calls
`dwarf_cu->GetDIEBitSizeAndSign(...)` on a null Delegate.
- `DW_OP_convert` with nothing on the stack reads the back of an empty
vector.
The unit test feeds both with `dwarf_cu == nullptr` and crashes:
```
[ RUN ] DWARFExpression.DW_OP_convert
#2 SignalHandler(int, __siginfo*, void*)
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[mlir][SPIR-V] Add SPIRVToLLVM conversion for GL.FClamp/SClamp/UClamp (#203831)
Lower the GLSL clamp ops as nested min/max following `min(max(x, y), z)`
---------
Co-authored-by: Igor Wodiany <dev at wodiany.com>
[clang][AMDGPU] Clean-up handling of named barrier type
- Do not allow the type in struct fields. This is more like a handle/resource than a real type. It does not follow the traditional C++ object model, and using it in a struct field can do some weird things if you instantiate too many of them.
- Use a `hip_barrier` LangAS for this type that currently maps to the local AS. This allows easy switching to the barrier AS in a future patch.
Alternative to #195612, see also #195613
[libc] Add struct ipv6_mreq and IPv6 socket options (#206448)
This patch adds struct ipv6_mreq and defines various IPv6 socket option
macros in <netinet/in.h>. I've also moved the existing option
definitions to the yaml file.
Assisted by Gemini.
[AMDGPU] Fix s.barrier.init/signal.var member count mask (#207660)
The count was shifted before masking, so bits above the low 6 could leak
past the member count field in M0
[X86] Attempt to narrow XMM->i64 (v)movq -> (v)movd if the upper 32-bits are known to be zero (#207615)
Add a custom 'X86upperzero' tablegen pattern to match vectors where the
upper half bits of every element is known zero.
Saves 1 byte by using (V)MOVD instead of (V)MOVQ - and avoids
differences in X86/X64 codegen that was bloating diffs in some upcoming
VECREDUCE_ADD work.
I've added an extra psadbw.ll test to ensure that the extractstore
pattern isn't being affected.
Cleanup for the upcoming VECREDUCE_ADD handling which will be using
PSADBW more aggressively (v2i64 result type but only 16 active bits for
element).
[ADT][NFC] Use isEqual for ImmutableSet/Map tree canonicalization (#207596)
`ImutAVLFactory::getCanonicalTree` deduplicates a newly built tree
against the trees already in its cache. On a digest collision it
confirmed structural equality with `compareTreeWithSection`, a plain
element-by-element in-order walk that is always linear in the tree size.
`ImutAVLTree` already provides `isEqual`, which performs the same
structural comparison but skips subtrees that are shared by pointer.
These persistent trees are heavily structurally shared -- a tree
produced by `add`/`remove` shares everything but the mutated spine with
its predecessor -- so switching `getCanonicalTree` to `isEqual` reduces
the confirmation from `O(tree size)` to `O(number of differing nodes)`
in the common case, and is never asymptotically worse. The comparison is
exact, so canonicalization behavior is unchanged.
This builds on the recent iterator rewrite in #205552 ("Rewrite
ImmutableSet/Map in-order iterator without per-node state"), which made
in-order traversal and `skipSubTree` ~2x faster. That change is a
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[LoopPeel] Peel last iteration to enable load widening
In loops that contain multiple consecutive small loads (e.g., 3 bytes
loading i8's), peeling the last iteration makes it safe to read beyond
the accessed region, enabling the use of a wider load (e.g., i32) for
all other N-1 iterations.
Patterns such as:
```
%a = load i8, ptr %p
%b = load i8, ptr %p+1
%c = load i8, ptr %p+2
...
%p.next = getelementptr i8, ptr %p, 3
```
Can be transformed to:
```
%wide = load i32, ptr %p ; Read 4 bytes
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[BOLT] Fixed PerfScript unittest for X86 (#207408)
The test was not prepared to run on X86 target.
This change parameterized the test function to ensure proper
initialization for different targets.
[libc] Implement sockatmark (#205400)
This patch implements sockatmark as a simple wrapper around
ioctl(SIOCATMARK).
I don't test it with actual out of band data, as that requires a TCP
connection, which is more complicated to set up.
Assisted by Gemini.
[AArch64][Bitcode] Use target memory for SME state (#205829)
Model AArch64 ZA and ZT0 intrinsic state using target_mem instead of
inaccessiblemem.
Bump the bitcode memory-attribute encoding and upgrade old AArch64
bitcode so prior inaccessiblemem effects are preserved on the new target
memory locations. Non-AArch64 bitcode keeps the old interpretation.
[Clang] Require X86 backend for some coroutine tests (#207681)
The wrapper functions are generated without target features.
They can still be inlined based on target-specific logic, but this
requires the target to be available.
We should fix this by properly generating the target features,
but for now add a REQUIRES to unbreak the tests.
[NVPTX] Add missing Range attr to tensormap.replace intrinsics. (#207099)
Add missing `Range=[0, 5)` for `%ord imm` operand in
`nvvm.tensormap.replace` intrinsics.
