LLVM/project 2105f9f — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/CodeGenCUDA device-stub.cu

by David Rivera on ⎇
[CIR][CUDA] Do Runtime Kernel Registration
DeltaFile
+119-2clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+28-2clang/test/CIR/CodeGenCUDA/device-stub.cu
+147-42 files

LLVM/project 6095417 — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

by David Rivera on ⎇
unreachable on RDC compilation
DeltaFile
+2-1clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+2-11 files

LLVM/project 82086d6 — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/CodeGenCUDA device-stub.cu

by David Rivera on ⎇
[CIR][CUDA] Handle CUDA module constructor and destructor emission.
DeltaFile
+121-2clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+41-0clang/test/CIR/CodeGenCUDA/device-stub.cu
+162-22 files

LLVM/project 67c0715 — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

by David Rivera on ⎇
fix twine crashes
DeltaFile
+5-6clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+5-61 files

LLVM/project 0fff8db — clang/include/clang/CIR/Dialect/IR CIRCUDAAttrs.td, clang/lib/CIR/CodeGen CIRGenModule.cpp

by David Rivera on ⎇
Avoid copies from `std::string`
DeltaFile
+23-17clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+7-4clang/lib/CIR/CodeGen/CIRGenModule.cpp
+1-1clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
+31-223 files

LLVM/project beb2302 — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/CodeGenCUDA device-stub.cu kernel-stub-name.cu

by David Rivera on ⎇
Fix conflicts and add section to fatbin globals
DeltaFile
+9-1clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+3-4clang/test/CIR/CodeGenCUDA/device-stub.cu
+3-3clang/test/CIR/CodeGenCUDA/kernel-stub-name.cu
+2-2clang/test/CIR/CodeGenCUDA/kernel-call.cu
+1-1clang/test/CIR/CodeGenHIP/simple.cpp
+18-115 files

LLVM/project 74ff77f — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/test/CIR/CodeGenCUDA device-stub.cu

by David Rivera on ⎇
fix tests and remove unnecessary comments.
DeltaFile
+0-3clang/test/CIR/CodeGenCUDA/device-stub.cu
+0-1clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+0-42 files

LLVM/project 3b1cadf — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

by David Rivera on ⎇
fix fmt
DeltaFile
+1-1clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+1-11 files

LLVM/project 9930dd3 — clang/include/clang/CIR/Dialect/IR CIRCUDAAttrs.td, clang/lib/CIR/CodeGen CIRGenCall.cpp

by David Rivera on ⎇
address more string copies stuff yo
DeltaFile
+4-3clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+4-2clang/lib/CIR/CodeGen/CIRGenCall.cpp
+1-1clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
+9-63 files

LLVM/project 0c6b853 — clang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp

by David Rivera on ⎇
fix global builder ordering
DeltaFile
+8-7clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+8-71 files

LLVM/project 2e61735 — clang/include/clang/CIR MissingFeatures.h, clang/include/clang/CIR/Dialect/IR CIRCUDAAttrs.td CIRDialect.td

by David Rivera on ⎇
[CIR][CUDA] Global emission for fatbin symbols
DeltaFile
+154-0clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+50-0clang/test/CIR/CodeGenCUDA/device-stub.cu
+17-0clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
+10-0clang/lib/CIR/CodeGen/CIRGenModule.cpp
+2-0clang/include/clang/CIR/MissingFeatures.h
+1-0clang/include/clang/CIR/Dialect/IR/CIRDialect.td
+234-06 files

LLVM/project 3fc4d44 — llvm/test/MC/Disassembler/AMDGPU gfx1250_dasm_vop3cx.txt

by Stanislav Mekhanoshin via GitHub on ⎇
[AMDGPU] Update gfx1250_dasm_vop3cx.txt test for true16. NFC (#190240)
DeltaFile
+114-57llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
+114-571 files

LLVM/project c30fa21 — clang/lib/Driver/ToolChains Clang.cpp

by Matt Arsenault on ⎇
clang: Use MakeArgStringRef more often

Avoid an intermediate copy by using MakeArgStringRef. Also
use better use of Twine with MakeArgString.
DeltaFile
+10-12clang/lib/Driver/ToolChains/Clang.cpp
+10-121 files

LLVM/project 2f9ac44 — clang/lib/Driver/ToolChains Clang.cpp

by Matt Arsenault via GitHub on ⎇
clang: Reorder linker aux-triple handling (#189462)

Move the IsCuda check out from the IsCuda || isHIP block. Keep
this from splitting the aux-triple handling for future convenience.
DeltaFile
+20-19clang/lib/Driver/ToolChains/Clang.cpp
+20-191 files

LLVM/project eed1f27 — libclc/clc/lib/generic/math clc_atan2.inc clc_atan2.cl

by Matt Arsenault via GitHub on ⎇
libclc: Use special division for atan2 for DAZ (#190248)

The AMDGPU DAZ fdiv works fine in this case, so there's
maybe something better we could do here.
DeltaFile
+7-1libclc/clc/lib/generic/math/clc_atan2.inc
+2-0libclc/clc/lib/generic/math/clc_atan2.cl
+9-12 files

LLVM/project 45ac2db — clang/include/clang/Sema Initialization.h, clang/lib/Sema SemaDeclCXX.cpp SemaExprCXX.cpp

by Eli Friedman via GitHub on ⎇
[clang][NFC] Clean up InitializedEntity booleans. (#185335)

As discussed in #182203, use enums instead.

I tried to name/use them appropriately, but I'm not sure sure I'm really
happy with the results; suggestions welcome.
DeltaFile
+69-43clang/include/clang/Sema/Initialization.h
+5-9clang/lib/Sema/SemaDeclCXX.cpp
+5-4clang/lib/Sema/SemaExprCXX.cpp
+1-1clang/lib/Sema/SemaInit.cpp
+80-574 files

LLVM/project 75a354b — llvm/lib/Transforms/InstCombine InstCombineCasts.cpp, llvm/test/Transforms/InstCombine fpcast.ll

by Valeriy Savchenko via GitHub on ⎇
[InstCombine] Use ComputeNumSignBits in isKnownExactCastIntToFP (#190235)

For signed int-to-FP casts, ComputeNumSignBits can prove exactness where
computeKnownBits cannot -- e.g. through ashr(shl x, a), b where sign propagation is
tracked precisely but individual known bits are all unknown.
DeltaFile
+36-0llvm/test/Transforms/InstCombine/fpcast.ll
+10-2llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+46-22 files

LLVM/project 148cb22 — llvm/test/CodeGen/NVPTX asm-printer-ptx-module-directives.ll

by Karthik Senthil via GitHub on ⎇
[NVPTX] Fix missing arch version for ptxas in LIT test. (#190231)

Recently added LIT test in #188539 missed -arch option for ptxas causing
post commit build failure. This PR addresses that failure.
DeltaFile
+1-1llvm/test/CodeGen/NVPTX/asm-printer-ptx-module-directives.ll
+1-11 files

LLVM/project eee70fd — libclc/clc/lib/generic/math clc_atan2.inc clc_atan2.cl

by Matt Arsenault on ⎇
libclc: Use special division for atan2 for DAZ

The AMDGPU DAZ fdiv works fine in this case, so there's
maybe something better we could do here.
DeltaFile
+7-1libclc/clc/lib/generic/math/clc_atan2.inc
+2-0libclc/clc/lib/generic/math/clc_atan2.cl
+9-12 files

LLVM/project 86bf4d1 — clang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenRecordLayoutBuilder.cpp, clang/test/CIR/CodeGen no-unique-address.cpp assign-operator.cpp

by xlauko on ⎇
[CIR] Fix record layout for [[no_unique_address]] fields
DeltaFile
+81-24clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+53-0clang/test/CIR/CodeGen/no-unique-address.cpp
+28-2clang/test/CIR/CodeGen/assign-operator.cpp
+12-6clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+5-2clang/test/CIR/CodeGen/dtors.cpp
+179-345 files

LLVM/project b2d3a65 — flang-rt/lib/runtime io-api-server.cpp, libc/shared rpc.h

by Joseph Huber via GitHub on ⎇
[libc] Rename rpc::Status to rpc::RPCStatus to reduce conflicts (#190239)

Summary:
`Status` is unfortunately heavily overloaded in practice. Things like
X11 define it as a macro. Best to just remove that possibility entirely.
DeltaFile
+9-9offload/plugins-nextgen/common/src/RPC.cpp
+3-3libc/src/__support/RPC/rpc_server.h
+1-1flang-rt/lib/runtime/io-api-server.cpp
+1-1libc/shared/rpc.h
+14-144 files

LLVM/project 1ce2513 — llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

by Jonathan Thackray on ⎇
fixup! Ensure GCSPUSHM, GCSSS1, GCSPOPM and GCSSS2 are all converted
DeltaFile
+9-41llvm/lib/Target/AArch64/AArch64InstrInfo.td
+19-4llvm/lib/Target/AArch64/AArch64InstrFormats.td
+9-6llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+11-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+2-1llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+1-1llvm/lib/Target/AArch64/AArch64SchedFalkorDetails.td
+51-566 files

LLVM/project bc23dfd — llvm/test/MC/AMDGPU vop3-literal.s

by Stanislav Mekhanoshin on ⎇
[AMDGPU] Update vop3-literal.s to use fake16 on gfx1250. NFC

16-bit instructions there are in fake16 mode and shall also be
compatible with older targets. The purpose of the test is to
check literals, so fake16 or real16 is not important.
DeltaFile
+2-2llvm/test/MC/AMDGPU/vop3-literal.s
+2-21 files

LLVM/project 1474e3e — mlir/include/mlir/Dialect/LLVMIR NVVMOps.td, mlir/test/Target/LLVMIR/Import nvvmir.ll

by xys-syx via GitHub on ⎇
[MLIR][NVVM] Derive NVVM_SyncWarpOp from NVVM_IntrOp for import support (#188415)

Change `NVVM_SyncWarpOp` base class from `NVVM_Op` to
`NVVM_IntrOp<"bar.warp.sync">`, which auto-generates `llvmEnumName =
nvvm_bar_warp_sync` and registers it with
`-gen-intr-from-llvmir-conversions` and
`-gen-convertible-llvmir-intrinsics`. This enables LLVM IR to MLIR
import. The hand-written `llvmBuilder` is removed as the default
`LLVM_IntrOpBase` builder is equivalent.
DeltaFile
+9-0mlir/test/Target/LLVMIR/Import/nvvmir.ll
+1-4mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+10-42 files

LLVM/project a68ae7b — clang/include/clang/Basic Diagnostic.h, llvm/include/llvm/IR DiagnosticInfo.h

by Matt Arsenault via GitHub on ⎇
DiagnosticInfo: Use Twine for resource name (#190228)

Allow more flexibility in phrasing of the overallocated
resource.
DeltaFile
+19-0clang/include/clang/Basic/Diagnostic.h
+3-3llvm/include/llvm/IR/DiagnosticInfo.h
+1-1llvm/lib/IR/DiagnosticInfo.cpp
+23-43 files

LLVM/project 43a8b7d — llvm/include/llvm/IR Intrinsics.h Intrinsics.td, llvm/lib/IR Intrinsics.cpp

by Rahul Joshi via GitHub on ⎇
[NFC][LLVM] Rename several `ArgsTys` arguments to `OverloadTys`. (#190210)

Rename several arguments to intrinsic related functions from `ArgsTys`
to `OverloadTys` to better reflect their meaning. The only variables
left with name `ArgTys` now actually mean function argument types.

Also reamove an incorrect comment in Intrinsics.td. Dependent types do
allow forward references starting with
https://github.com/llvm/llvm-project/commit/7957fc6547e1b8af8e6586e2c25446b724eabb75
DeltaFile
+45-42llvm/lib/IR/Intrinsics.cpp
+11-11llvm/include/llvm/IR/Intrinsics.h
+1-2llvm/include/llvm/IR/Intrinsics.td
+57-553 files

LLVM/project 6ee2aac — clang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenRecordLayoutBuilder.cpp, clang/test/CIR/CodeGen no-unique-address.cpp assign-operator.cpp

by xlauko on ⎇
[CIR] Fix record layout for [[no_unique_address]] fields
DeltaFile
+78-24clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+53-0clang/test/CIR/CodeGen/no-unique-address.cpp
+28-2clang/test/CIR/CodeGen/assign-operator.cpp
+12-6clang/lib/CIR/CodeGen/CIRGenRecordLayoutBuilder.cpp
+5-2clang/test/CIR/CodeGen/dtors.cpp
+176-345 files

LLVM/project 2ec19b8 — llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor nofpclass-fmul.ll

by Matt Arsenault via GitHub on ⎇
ValueTracking: x - floor(x) cannot introduce overflow (#189003)

This returns a value with an absolute value less than 1 so it
should be possible to propagate no-infs.
DeltaFile
+42-0llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+13-5llvm/lib/Analysis/ValueTracking.cpp
+55-52 files

LLVM/project 9b42c99 — llvm/test/MC/Disassembler/AMDGPU gfx1250_dasm_vop3cx.txt

by Stanislav Mekhanoshin on ⎇
[AMDGPU] Update gfx1250_dasm_vop3cx.txt test for true16. NFC
DeltaFile
+114-57llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_vop3cx.txt
+114-571 files

LLVM/project 0abef30 — llvm/lib/Analysis DependenceAnalysis.cpp

by Ehsan Amiri via GitHub on ⎇
[DA] Fix warning introduced by #189740 (#190226)

The following warning is issued for llvm/lib/Analysis/DependenceAnalysis.cpp:2004

warning: suggest parentheses around ‘&&’ within ‘||’
DeltaFile
+2-2llvm/lib/Analysis/DependenceAnalysis.cpp
+2-21 files