LLVM/project d8b2a2f — flang/lib/Lower OpenACC.cpp, flang/test/Lower/OpenACC acc-reduction-remapping.f90

[flang][acc] Prefer the reduction mapping when remapping region symbols (#233938)

When a variable appears on several data clauses of one compute
construct, `AccDataMap::remapDataOperandSymbols` bound the region's
symbol to the first data operation result, on the assumption that every
result for a symbol addresses the same memory.

For a reduction the results are not interchangeable. The reduction
clause carries bounds for the section while the data clause maps the
whole variable, so for

```fortran
!$acc parallel loop copy(rarr) reduction(+:rarr(3:10))
```

The variable has two mappings and only the reduction one describes the
accumulator. Binding the region to the whole-array `copy` meant accesses
inside it, including the `acc.reduction` rooted on that declare, were
expressed against the variable's mapping rather than the accumulator's.

    [11 lines not shown]
DeltaFile
+38-0flang/test/Lower/OpenACC/acc-reduction-remapping.f90
+16-3flang/lib/Lower/OpenACC.cpp
+54-32 files

LLVM/project cdfd88a — llvm/lib/Support KnownFPClass.cpp, llvm/test/Transforms/Attributor nofpclass-fadd-fsub.ll

[KnownFPClass] Fix fsub input denormal handling (#225605)

Fixes https://github.com/llvm/llvm-project/issues/225587

Refactors the output/input denormal handling for `KnownFPClass::fadd`
and `KnownFPClass::fsub`.

`fadd`/`fadd_self`/`fsub` handle the flushing of output/input denormals,
and will pass the flushed inputs to `fadd_impl` (which uses IEEE
subnormal handling).

`KnownFPClass::fma` remains unchanged (note that the `DenormalMode`
parameter was unused by `fadd_impl`).
DeltaFile
+97-25llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
+41-29llvm/lib/Support/KnownFPClass.cpp
+138-542 files

LLVM/project b008371 — flang/include/flang/Optimizer/Dialect/CUF CUFOps.td CUFOps.h, flang/test/Fir/CUDA cuda-device-is-active.mlir

[flang][cuda] Mark cuf.device_is_active as a read-only query (#233987)

`cuf.device_is_active` declared no memory effects, so an unused query
could never be removed even though it only reads the CUDA context state.
Give it `MemoryEffects<[MemRead]>` so canonicalization erases it when
dead, for example once the `if (cuf.device_is_active) { ... }` cleanup
it guards has been emptied.

The runtime probe it lowers to must stay free of observable effects; a
comment on `deviceContextTornDown` records that.
DeltaFile
+49-8flang/test/Fir/CUDA/cuda-device-is-active.mlir
+10-0flang/include/flang/Optimizer/Dialect/CUF/CUFOps.h
+7-1flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
+66-93 files

LLVM/project 42c4dc0 — llvm/lib/Target/BPF BPFMIPeephole.cpp BPFAsmPrinter.cpp, llvm/test/CodeGen/BPF unwind-far-pad.ll cleanup-section.ll

[BPF] Lower unwinding to unwind_goto and unwind_exit (#233649)

Replace the .bpf_cleanup table with two new instructions, so that
neither a loader nor the kernel has to dispatch landing pads.

  unwind_goto pad    BPF_JMP | BPF_JCOND, src_reg = 1
  unwind_exit        BPF_JMP | BPF_EXIT,  src_reg = 1

'call f; unwind_goto pad' goes to the pad when f left with unwind_exit
and falls through when it left with exit. No register says which one it
was: how one instruction tells the other is up to the JIT. In everything
else unwind_exit is exit.

  ret                           exit
  invoke f() unwind pad         call f; unwind_goto pad
  resume                        r0 = 0; unwind_exit
  call _Unwind_RaiseException   r0 = 0; unwind_exit
  invoke _Unwind_RaiseException goto pad


    [56 lines not shown]
DeltaFile
+340-0llvm/test/CodeGen/BPF/unwind.ll
+315-0llvm/lib/Target/BPF/BPFUnwind.cpp
+0-160llvm/test/CodeGen/BPF/cleanup-section.ll
+0-55llvm/lib/Target/BPF/BPFAsmPrinter.cpp
+36-0llvm/test/CodeGen/BPF/unwind-far-pad.ll
+7-24llvm/lib/Target/BPF/BPFMIPeephole.cpp
+698-23917 files not shown
+859-27123 files

LLVM/project 9bc3109 — clang/test/CIR/CodeGen dtor-alias.cpp virtual-destructor-calls.cpp, mlir/test/Target/LLVMIR alias.mlir

[mlir][LLVMIR] Translate dso_local on llvm.mlir.alias

MLIR's LLVM IR translation now sets dso_local on the aliases it creates
from llvm.mlir.alias, the same way it already does for globals, functions
and ifuncs. The importer already reads the flag, so it now survives a
round trip.

Assisted-by: Cursor / claude-opus-5.5
DeltaFile
+19-0mlir/test/Target/LLVMIR/alias.mlir
+16-0mlir/test/Target/LLVMIR/Import/alias.ll
+3-3clang/test/CIR/CodeGen/attr-alias.c
+3-3clang/test/CIR/CodeGen/attr-alias-no-proto.c
+2-2clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
+1-1clang/test/CIR/CodeGen/dtor-alias.cpp
+44-92 files not shown
+46-108 files

LLVM/project a44f885 — llvm/lib/Target/RISCV RISCVFrameLowering.cpp, llvm/test/CodeGen/RISCV shadow-stack-frame-opts-v.ll shadow-stack-frame-opts.ll

[RISCV] Correctly restore libcall CSRs with SCS (#233338)

Fixes #233318

Before this change, we were restoring some callee-saved registers twice
when using save/restore libcalls with shadow call stack (SCS), and the
second restore was happening after the stack was deallocated using the
wrong register and offset calculation, which was causing lots of access
problems.

The problems were:
- We were using the entire list of Callee Saves rather than just the
  subset that would have been restored by the libcall. This caused
  duplicate restores because of how the CSI subsetting works.
- We were not using the correct offset calculation in
  eliminateFrameIndex, which was causing us to calculate the wrong
  address for the saves/restores.

Assisted-by: AI
Co-authored-by: Mitch Briles <mitchbriles at gmail.com>
DeltaFile
+986-20llvm/test/CodeGen/RISCV/shadow-stack-frame-opts.ll
+136-0llvm/test/CodeGen/RISCV/shadow-stack-frame-opts-v.ll
+16-3llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+1,138-233 files

LLVM/project 0e536c9 — llvm/lib/Support SourceMgrDiagnosticVerifier.cpp, llvm/unittests/Support SourceMgrDiagnosticVerifierTest.cpp

[nspr] initial commit
DeltaFile
+11-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+2-2llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+13-22 files

LLVM/project daabda7 — llvm/lib/Support SourceMgrDiagnosticVerifier.cpp, llvm/unittests/Support SourceMgrDiagnosticVerifierTest.cpp

[nspr] initial commit
DeltaFile
+33-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+15-6llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+48-62 files

LLVM/project a9456d1 — llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h, llvm/lib/Support SourceMgrDiagnosticVerifier.cpp

[nspr] initial commit
DeltaFile
+12-6llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+17-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+12-0llvm/test/tools/llvm-mc/verify/basic.s
+2-2llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+43-84 files

LLVM/project e974064 — llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h, llvm/lib/Support SourceMgrDiagnosticVerifier.cpp

[nspr] initial commit
DeltaFile
+13-11llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+17-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+6-6llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+36-173 files

LLVM/project e766039 — llvm/lib/Support SourceMgrDiagnosticVerifier.cpp, llvm/test/tools/llvm-mc/verify basic.s

[nspr] initial commit
DeltaFile
+36-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+21-4llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+10-1llvm/test/tools/llvm-mc/verify/basic.s
+67-53 files

LLVM/project 9835278 — llvm/docs/CommandGuide llvm-mc.md, llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h

[nspr] initial commit
DeltaFile
+24-4llvm/test/tools/llvm-mc/verify/basic.s
+21-3llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+19-1llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+5-2llvm/docs/CommandGuide/llvm-mc.md
+5-0llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+1-1mlir/lib/IR/Diagnostics.cpp
+75-116 files

LLVM/project 0ca4040 — llvm/tools/llvm-mc llvm-mc.cpp

[nspr] update
DeltaFile
+1-1llvm/tools/llvm-mc/llvm-mc.cpp
+1-11 files

LLVM/project d4d9c93 — llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h, llvm/lib/Support SourceMgrDiagnosticVerifier.cpp

[nspr] initial commit
DeltaFile
+28-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+10-1llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+5-2llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+43-33 files

LLVM/project c8500b1 — llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h, llvm/lib/Support SourceMgrDiagnosticVerifier.cpp

[nspr] initial commit
DeltaFile
+14-1llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+10-2llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+4-3llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+28-63 files

LLVM/project a2b05e6 — llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h, llvm/lib/Support SourceMgrDiagnosticVerifier.cpp

[nspr] initial commit
DeltaFile
+32-14llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+20-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+7-4llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+59-183 files

LLVM/project 2b95f0e — llvm/include/llvm/Support SourceMgrDiagnosticVerifier.h, llvm/lib/Support SourceMgrDiagnosticVerifier.cpp

[nspr] initial commit
DeltaFile
+71-55llvm/lib/Support/SourceMgrDiagnosticVerifier.cpp
+123-0llvm/unittests/Support/SourceMgrDiagnosticVerifierTest.cpp
+49-46llvm/include/llvm/Support/SourceMgrDiagnosticVerifier.h
+12-17mlir/lib/IR/Diagnostics.cpp
+1-0llvm/utils/gn/secondary/llvm/unittests/Support/BUILD.gn
+1-0llvm/unittests/Support/CMakeLists.txt
+257-1186 files

LLVM/project dcdcfb1 — clang/lib/CodeGen CGExpr.cpp CGExprCXX.cpp, clang/lib/Sema SemaOverload.cpp SemaHLSL.cpp

[HLSL] Allow a groupshared struct to be passed as an implicit parameter (#229939)

If the implicit object parameter is in the groupshared address space and
the function is const then perform an LValue to RValue cast.
If the implicit object parameter is in the groupshared address space
then create an HSLOutArgExpr which handles the writeback of the object
from the temporary.
Adds an AST test and a Codegen test.
Closes #228563
DeltaFile
+102-0clang/test/CodeGenHLSL/BasicFeatures/StructPassing.hlsl
+72-0clang/test/AST/HLSL/StructPassing-AST.hlsl
+37-28clang/lib/Sema/SemaHLSL.cpp
+14-2clang/lib/CodeGen/CGExprCXX.cpp
+14-1clang/lib/Sema/SemaOverload.cpp
+4-2clang/lib/CodeGen/CGExpr.cpp
+243-332 files not shown
+247-348 files

LLVM/project c4cf048 — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering opaque-pointer-address-spaces.cir unlowered-address-spaces.cir

fix: [CIR] Check only the converted pointer's address space

Limit opaque pointer conversion to its own address space and diagnose unsupported pointee types where their layout is required. Emit type-specific errors for failed pointer conversions.

Validate pointee memory conversion before deriving copy sizes, alignments, or pointer-difference strides from CIR layout. Keep deeper pointee types opaque when their layouts are not needed.

Assisted-by: Codex / GPT-6
DeltaFile
+151-96clang/test/CIR/Lowering/unlowered-address-spaces.cir
+153-0clang/test/CIR/Lowering/opaque-pointer-address-spaces.cir
+36-55clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+2-1clang/utils/TableGen/CIRLoweringEmitter.cpp
+342-1524 files

LLVM/project 3999f6e — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering unlowered-address-spaces.cir

[CIR] Reject language address spaces in DirectToLLVM pointer conversion

Reject unlowered language address spaces in pointer types when bypassing TargetLowering. Guard pointer-producing lowerings, including generated patterns, so failed conversions report legalization failures instead of silently selecting address space zero or constructing invalid LLVM operations.

Assisted-by: Codex / GPT-6
DeltaFile
+504-0clang/test/CIR/Lowering/unlowered-address-spaces.cir
+64-0clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+2-0clang/utils/TableGen/CIRLoweringEmitter.cpp
+570-03 files

LLVM/project 3d93220 — clang/include/clang/CIR LoweringHelpers.h, clang/include/clang/CIR/Dialect/IR CIROps.td

[CIR] Propagate initializer type adjustment failures

Reject initializers whose active members have no LLVM representation, including when an enclosing union's storage type is convertible. Propagate recursive adjustment failures before querying data layout or constructing LLVM operations.

Assisted-by: Codex / GPT-6
DeltaFile
+66-0clang/test/CIR/Lowering/unsupported-initializer-types.cir
+13-2clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+12-0clang/lib/CIR/Lowering/LoweringHelpers.cpp
+2-1clang/include/clang/CIR/LoweringHelpers.h
+1-1clang/include/clang/CIR/Dialect/IR/CIROps.td
+94-45 files

LLVM/project 6d95d08 — clang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.h LowerToLLVM.cpp, clang/test/CIR/Lowering unsupported-type-conversions.cir

[CIR] Propagate type conversion failures in DirectToLLVM (#224237)

Propagate failed type and constant conversions through DirectToLLVM so
unsupported types produce legalization failures instead of invalid LLVM
operations or a void function result.

Assisted-by: Codex / GPT-6
DeltaFile
+223-0clang/test/CIR/Lowering/unsupported-type-conversions.cir
+76-21clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+4-3clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.h
+303-243 files

LLVM/project a9d8f68 — llvm/lib/Target/AMDGPU VOP3Instructions.td SIInstructions.td

[AMDGPU][True16] Use the right 16-bit operand classes in med3 and sub (#233632)

Int16Med3Pat hardcoded VSrc_b16 instead of using the outputSrcType
parameter it already takes, so the true16 instantiations named the
non-true16 operand class for V_MED3_I16_t16_e64 and V_MED3_U16_t16_e64.
The true16 V_SUB_NC_U16_t16_e64 pattern named VSrc_b16 for the same
reason, where VSrcT_b16 is the true16 operand class.

No test changed

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+2-1llvm/lib/Target/AMDGPU/SIInstructions.td
+1-1llvm/lib/Target/AMDGPU/VOP3Instructions.td
+3-22 files

LLVM/project 8204f7a — lldb/include/lldb/Host HostInfoBase.h, lldb/source/Host/macosx/objcxx HostInfoMacOSX.mm

[lldb] Fix shared cache segment mapping leak (#232370)

`map_shared_cache_binary_segments` never released the dispatch_data
returned by dispatch_data_create_map. SharedCacheInfo also returned
copies of SharedCacheImageInfo, so the extractor cached by
GetExtractor() was dropped and every lookup mapped the image again.

Keep the mappings alive in a DataBuffer that releases them on
destruction, and share a lazily created extractor between copies so each
image is mapped once.

rdar://189874911

Assisted-by: Claude
DeltaFile
+40-7lldb/source/Host/macosx/objcxx/HostInfoMacOSX.mm
+18-12lldb/include/lldb/Host/HostInfoBase.h
+12-0lldb/unittests/ObjectFile/MachO/TestObjectFileMachO.cpp
+70-193 files

LLVM/project 111a72c — llvm/test/CodeGen/AMDGPU combine_andor_with_cmps.ll llvm.is.fpclass.bf16.ll

[AMDGPU][True16] Select V_CNDMASK_B16_t16 for i1 to i16 extensions (#233646)

In real true16 mode an i16 result lives in a VGPR_16, but the zext,
anyext and sext of i1 to i16 patterns selected V_CNDMASK_B32_e64, which
defines a 32-bit register. Add true16 variants selecting
V_CNDMASK_B16_t16_e64 and guard the existing patterns with
NotUseRealTrue16Insts.

---------

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+1,465-1,512llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-widen.ll
+349-170llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
+93-98llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
+79-87llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
+22-22llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
+20-20llvm/test/CodeGen/AMDGPU/combine_andor_with_cmps.ll
+2,028-1,9097 files not shown
+2,127-1,99513 files

LLVM/project be3d85f — lldb/source/Plugins/ObjectFile/Mach-O ObjectFileMachO.cpp, lldb/test/API/macosx/lc-note/additional-registers TestMetadataRegisters.py

[lldb][Mach-O] Accept zlib-compressed LC_NOTE payloads (#231745)

LC_NOTE payloads such as "process metadata" can be large and compress
well. A compressed payload uses the layout of a GNU .zdebug section: the
magic "ZLIB", the uncompressed size as a big-endian uint64_t, then an
RFC 1950 zlib stream. Uncompressed payloads keep working. Only "process
metadata" reads its payload through this path for now.

Alternatives considered:

- zstd and xz compress better, but neither is available in every LLDB
build.
- libcompression codecs are Darwin-only.
- An ELF Elf64_Chdr has no magic, so detection would be inferred from
the data, which only holds for JSON.
- A separate note name for compressed payloads would make every reader
look for both names.

The size comes from the file, so it is checked against deflate's maximum

    [2 lines not shown]
DeltaFile
+127-73lldb/test/API/macosx/lc-note/additional-registers/TestMetadataRegisters.py
+58-10lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
+185-832 files

LLVM/project 31e6124 — mlir/lib/Transforms Canonicalizer.cpp, mlir/test/Pass pass-timing.mlir

[mlir][Canonicalizer] Preserve analyses when there is no change (#232159)

Call `markAllAnalysesPreserved` when there is no change in `applyPatternsGreedily`. 

Assisted-by: gpt 6 luna
DeltaFile
+4-1mlir/lib/Transforms/Canonicalizer.cpp
+0-4mlir/test/Pass/pass-timing.mlir
+4-52 files

LLVM/project 7f21307 — llvm/test/CodeGen/AMDGPU sext-in-reg-vector-shuffle.ll scmp.ll

[AMDGPU][True16] Use vgpr32_lo16 for fcopysign and sext_inreg results (#233517)

The true16 fcopysign and DivergentSextInreg patterns produce an i16 from
V_BFI_B32_e64 / V_BFE_I32_e64, which define a 32-bit register. Wrap the
result in the vgpr32_lo16 OutPatFrag so the extracted low half is
anchored to a VGPR_32 instead of relying on type inference, and give the
f64 fcopysign source EXTRACT_SUBREG an explicit i32 type.

---------

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+98-170llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
+98-170llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
+42-46llvm/test/CodeGen/AMDGPU/idot4u.ll
+42-45llvm/test/CodeGen/AMDGPU/idot4s.ll
+20-25llvm/test/CodeGen/AMDGPU/scmp.ll
+13-15llvm/test/CodeGen/AMDGPU/sext-in-reg-vector-shuffle.ll
+313-4711 files not shown
+323-4817 files

LLVM/project f703824 — llvm/lib/Transforms/IPO GlobalOpt.cpp, llvm/test/Transforms/GlobalOpt globalsra-comdat.ll

Use poison instead of undef
DeltaFile
+1-1llvm/test/Transforms/GlobalOpt/globalsra-comdat.ll
+1-1llvm/lib/Transforms/IPO/GlobalOpt.cpp
+2-22 files

LLVM/project 7543a1e — llvm/lib/Transforms/InstCombine InstCombineAndOrXor.cpp, llvm/test/Transforms/InstCombine xor.ll

[InstCombine] Fix ctlz/cttz xor folding for non-power-of-two widths (#233746)

The ctlz/cttz xor fold for power-of-two inputs relies on
k ^ (BW - 1) == BW - 1 - k, which only holds when BW is a
power of two. Require a power-of-two scalar bit width for
both directions.

Fixes #233232.

Assisted-by: Codex.
DeltaFile
+51-0llvm/test/Transforms/InstCombine/xor.ll
+3-1llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+54-12 files