LLVM/project 5b8e869llvm/test/tools/llc save-stats.ll

[llc] Fix save-stats test in read only directories (#167403)

The save stats test would fail downstream due to the tests being run
from a read only directory. The cwd flag would attempt to place the
statistics in that read only directory, causing an error. This patch
ensures that the tests are always run from a temp directory.
DeltaFile
+1-0llvm/test/tools/llc/save-stats.ll
+1-01 files

LLVM/project da996a3llvm/lib/Support SpecialCaseList.cpp

[NFC][SpecialCaseList] Refactor error handling (#167277)

Will help in future patches.
DeltaFile
+7-5llvm/lib/Support/SpecialCaseList.cpp
+7-51 files

LLVM/project 11ab23cllvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/CodeGen TargetInstrInfo.cpp

CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo (#158224)

Both conceptually belong to the same subtarget, so it should not
be necessary to pass in the context TargetRegisterInfo to any
TargetInstrInfo member. Add this reference so those superfluous
arguments can be removed.

Most targets placed their TargetRegisterInfo as a member
in TargetInstrInfo. A few had this owned by the TargetSubtargetInfo,
so unify all targets to look the same.
DeltaFile
+27-41llvm/lib/CodeGen/TargetInstrInfo.cpp
+8-3llvm/include/llvm/CodeGen/TargetInstrInfo.h
+6-3llvm/utils/TableGen/InstrInfoEmitter.cpp
+7-2llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+6-2llvm/lib/Target/Mips/MipsInstrInfo.h
+1-5llvm/lib/Target/Mips/Mips16InstrInfo.cpp
+55-5644 files not shown
+126-11250 files

LLVM/project ad9eb0d. .clang-tidy

Add default empty header filter regex to root .clang-tidy (#167386)

After https://github.com/llvm/llvm-project/pull/164165, we emit warnings
from non-system headers by default.
This change only preserves functionality of `clang-tidy` as it was
before the change.
DeltaFile
+1-0.clang-tidy
+1-01 files

LLVM/project 1e18d02llvm/include/llvm/CodeGen AsmPrinter.h

[llvm][asmprinter] Make call graph section deterministic

The call-graph-section-assembly.ll tests in CodeGen/X86 and
CodeGen/Aarch64 bot fail under LLVM_REVERSE_ITERATION. These sets should
use SmallSetVector to avoid non-determinism in the ouput.
DeltaFile
+3-3llvm/include/llvm/CodeGen/AsmPrinter.h
+3-31 files

LLVM/project bf3b704flang/include/flang/Optimizer/Dialect FIROps.td, flang/lib/Optimizer/Analysis AliasAnalysis.cpp

[flang][NFC] Characterize allocation based on MemAlloc effect instead of pattern matching (#166806)

Flang alias analysis used to find allocation site by pattern matching
allocation ops in mainly FIR dialect. This MR extends the
characterization to instead characterize based on whether the result of
an op has MemAlloc effect.
DeltaFile
+84-47flang/test/Transforms/stack-arrays.fir
+42-15flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
+8-9flang/test/Lower/forall/forall-allocatable.f90
+6-6flang/include/flang/Optimizer/Dialect/FIROps.td
+11-0flang/test/Lower/character-local-variables.f90
+9-0flang/test/Fir/alloc.fir
+160-7713 files not shown
+172-9619 files

LLVM/project 7b12a08llvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/test/CodeGen/AArch64 icmp-ult-eq-fold.ll arm64-regress-opt-cmp-signed.mir

[AArch64] Allow peephole to optimize AND + signed compare with 0 (#153608)

This should be the peephole's job. Because and sets V flag to 0, this is
why signed comparisons with 0 are okay to replace with tst. Note this is
only for AArch64, because ANDS on ARM leaves the V flag the same.

Fixes: https://github.com/llvm/llvm-project/issues/154387
DeltaFile
+332-0llvm/test/CodeGen/AArch64/icmp-ult-eq-fold.ll
+55-0llvm/test/CodeGen/AArch64/arm64-regress-opt-cmp-signed.mir
+47-1llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+434-13 files

LLVM/project d5125b3flang/include/flang/Optimizer/Builder CUFCommon.h, flang/lib/Optimizer/Builder CUFCommon.cpp

[flang][CUDA] Unify element size computation in CUF helpers (#167398)

Refactor computeWidth from CUFOpConversion into a shared helper function
computeElementByteSize in CUFCommon.
DeltaFile
+3-25flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
+23-0flang/lib/Optimizer/Builder/CUFCommon.cpp
+5-0flang/include/flang/Optimizer/Builder/CUFCommon.h
+31-253 files

LLVM/project 95db31eclang/test/CodeGen basic-block-sections.c, llvm/include/llvm/CodeGen BasicBlockSectionsProfileReader.h

Treat specifying a function in the bbsection profile without any directive as noop. (#167359)

DeltaFile
+8-54llvm/test/CodeGen/X86/basic-block-sections-list.ll
+10-13llvm/lib/CodeGen/BasicBlockSections.cpp
+9-7llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
+6-10llvm/include/llvm/CodeGen/BasicBlockSectionsProfileReader.h
+5-3llvm/test/CodeGen/X86/basic-block-sections-source-drift.ll
+4-2clang/test/CodeGen/basic-block-sections.c
+42-891 files not shown
+45-907 files

LLVM/project 8b1cc2dllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[VPlan] Update canNarrowLoad to check WidenMember0's op first (NFCI).

This hardens the code to check based on WideMember0's operands. This
ensures each call will go through the same check. Should be NFC
currently but needed when generalizing in follow-up patches.
DeltaFile
+7-7llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-71 files

LLVM/project 046ae85compiler-rt/lib/scudo/standalone memtag.h combined.h, compiler-rt/lib/scudo/standalone/tests secondary_test.cpp wrappers_cpp_test.cpp

[scudo] Small cleanup of memory tagging code. (#166860)

Make the systemSupportsMemoryTagging() function return even on system
that don't support memory tagging. This avoids the need to always check
if memory tagging is supported before calling th function.

Make systemSupportsMemoryTagging() cache the getauxval return value
instead of calling the function every time.

Updated the code that calls systemSupportsMemoryTagging().
DeltaFile
+3-4compiler-rt/lib/scudo/standalone/memtag.h
+1-3compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp
+1-2compiler-rt/lib/scudo/standalone/combined.h
+1-2compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp
+0-1compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp
+6-125 files

LLVM/project 1d2ba82clang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

rebase

Created using spr 1.3.7
DeltaFile
+9,644-0clang/include/clang/Options/Options.td
+0-9,644clang/include/clang/Driver/Options.td
+3,123-3,158llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
+3,106-0llvm/test/CodeGen/LoongArch/expandmemcmp.ll
+2,633-0clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
+1,220-1,178llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+19,726-13,980910 files not shown
+46,554-32,729916 files

LLVM/project 6e9364bclang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+0-9,644clang/include/clang/Driver/Options.td
+9,644-0clang/include/clang/Options/Options.td
+3,123-3,158llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
+3,106-0llvm/test/CodeGen/LoongArch/expandmemcmp.ll
+2,633-0clang/test/OpenMP/target_dyn_groupprivate_codegen.cpp
+1,220-1,178llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
+19,726-13,980910 files not shown
+46,554-32,729916 files

LLVM/project 94cfc2fllvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/lib/Target/Mips MipsSEFrameLowering.cpp MipsSEInstrInfo.cpp

CodeGen: Remove TRI arguments from stack load/store hooks

This is directly available in TargetInstrInfo
DeltaFile
+20-29llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
+20-19llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+13-15llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+14-13llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+12-12llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+13-11llvm/lib/Target/X86/X86InstrInfo.cpp
+92-9956 files not shown
+314-34462 files

LLVM/project f5c4967llvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/CodeGen TargetInstrInfo.cpp

CodeGen: Remove TRI argument from reMaterialize
DeltaFile
+4-4llvm/lib/CodeGen/TargetInstrInfo.cpp
+3-3llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+2-3llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+1-2llvm/lib/Target/X86/X86InstrInfo.h
+1-2llvm/include/llvm/CodeGen/TargetInstrInfo.h
+1-2llvm/lib/Target/AMDGPU/SIInstrInfo.h
+12-165 files not shown
+17-2411 files

LLVM/project e87e215llvm/lib/CodeGen MachineVerifier.cpp, llvm/lib/CodeGen/SelectionDAG InstrEmitter.cpp

CodeGen: Remove TRI argument from getRegClass

TargetInstrInfo now directly holds a reference to TargetRegisterInfo
and does not need TRI passed in anywhere.
DeltaFile
+14-16llvm/lib/Target/X86/X86InstrInfo.cpp
+6-6llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
+4-7llvm/lib/CodeGen/MachineVerifier.cpp
+5-6llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+4-6llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
+4-5llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
+37-4639 files not shown
+97-12045 files

LLVM/project 0ac7277

CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo

Both conceptually belong to the same subtarget, so it should not
be necessary to pass in the context TargetRegisterInfo to any
TargetInstrInfo member. Add this reference so those superfluous
arguments can be removed.

Most targets placed their TargetRegisterInfo as a member
in TargetInstrInfo. A few had this owned by the TargetSubtargetInfo,
so unify all targets to look the same.
DeltaFile
+0-00 files

LLVM/project bb2322ellvm/lib/Target/ARM ARMBaseInstrInfo.cpp Thumb2InstrInfo.cpp

ARM: Remove TRI argument from AddDReg
DeltaFile
+43-43llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+4-4llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
+1-2llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+48-493 files

LLVM/project c687df3llvm/include/llvm/CodeGen TargetInstrInfo.h, llvm/lib/CodeGen TargetInstrInfo.cpp

CodeGen: Keep reference to TargetRegisterInfo in TargetInstrInfo

Both conceptually belong to the same subtarget, so it should not
be necessary to pass in the context TargetRegisterInfo to any
TargetInstrInfo member. Add this reference so those superfluous
arguments can be removed.

Most targets placed their TargetRegisterInfo as a member
in TargetInstrInfo. A few had this owned by the TargetSubtargetInfo,
so unify all targets to look the same.
DeltaFile
+27-41llvm/lib/CodeGen/TargetInstrInfo.cpp
+8-3llvm/include/llvm/CodeGen/TargetInstrInfo.h
+6-3llvm/utils/TableGen/InstrInfoEmitter.cpp
+7-2llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+6-2llvm/lib/Target/Mips/MipsInstrInfo.h
+1-5llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+55-5644 files not shown
+126-11250 files

LLVM/project ec59e3cllvm/test/CodeGen/AMDGPU llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll llvm.amdgcn.smfmac.gfx950.ll

AMDGPU: Select VGPR MFMAs by default

AGPRs are undesirable since they are only usable by a
handful instructions like loads, stores and mfmas and everything
else requires copies to/from VGPRs. Using the AGPR form should be
a measure of last resort if we must use more than 256 VGPRs.
DeltaFile
+2,436-4,283llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
+2,297-2llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
+1,018-1,120llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
+952-1,160llvm/test/CodeGen/AMDGPU/mfma-loop.ll
+540-740llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx942.ll
+168-1,050llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.16x16x128.f8f6f4.ll
+7,411-8,35522 files not shown
+10,561-10,94528 files

LLVM/project 3ed8954llvm/test/CodeGen/AMDGPU reg-coalescer-subreg-liveness.mir

Update llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
DeltaFile
+1-1llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir
+1-11 files

LLVM/project a1934eellvm/include/llvm/Support SpecialCaseList.h, llvm/lib/Support SpecialCaseList.cpp

[NFC][SpecialCaseList] Replace callback with return value (#165943)

This commit introduces `SpecialCaseList::Match`, a small struct to hold
the matched rule and its line number. This simplifies the `match`
methods by allowing them to return a single value instead of using a
callback.

---------

Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
DeltaFile
+36-35llvm/lib/Support/SpecialCaseList.cpp
+9-15llvm/include/llvm/Support/SpecialCaseList.h
+45-502 files

LLVM/project 48abc8fclang/lib/CodeGen CGHLSLRuntime.cpp HLSLBufferLayoutBuilder.cpp, clang/lib/CodeGen/Targets SPIR.cpp DirectX.cpp

[HLSL] Wrap offset info into a dedicated type. NFC

Rather than using a nullable SmallVector, use a wrapper class for offset
info. This simplifies places that need to handle whether or not there's
any offset information.
DeltaFile
+16-30clang/lib/CodeGen/CGHLSLRuntime.cpp
+25-14clang/lib/CodeGen/HLSLBufferLayoutBuilder.cpp
+32-3clang/lib/CodeGen/CGHLSLRuntime.h
+6-4clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
+4-5clang/lib/CodeGen/Targets/SPIR.cpp
+4-5clang/lib/CodeGen/Targets/DirectX.cpp
+87-611 files not shown
+90-647 files

LLVM/project f729055clang/lib/CodeGen HLSLBufferLayoutBuilder.h

clang-format
DeltaFile
+2-3clang/lib/CodeGen/HLSLBufferLayoutBuilder.h
+2-31 files

LLVM/project 0767c64llvm/lib/Transforms/Vectorize VPlan.cpp

[VPlan] Use getDefiningRecipe instead of directly accessing Def. (NFC)

Use getDefiningRecipe to future-proof the code. Split off from
https://github.com/llvm/llvm-project/pull/156262 as suggested.
DeltaFile
+3-3llvm/lib/Transforms/Vectorize/VPlan.cpp
+3-31 files

LLVM/project 8c86bc8llvm/lib/Target/AMDGPU AMDGPURegisterBankInfo.cpp

AMDGPU/GlobalISel: Fix AGPR regbank check for mfma_scale (#167393)

Fixes regressions with #159493 after 476a6ea9575
DeltaFile
+6-6llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+6-61 files

LLVM/project 9fabf9dllvm/include/llvm/CodeGen AsmPrinter.h

[llvm][asmprinter] Make call graph section deterministic

The call-graph-section-assembly.ll tests in CodeGen/X86 and
CodeGen/Aarch64 bot fail under LLVM_REVERSE_ITERATION. These sets should
use SetVector to avoid non-determinism in the ouput.
DeltaFile
+3-2llvm/include/llvm/CodeGen/AsmPrinter.h
+3-21 files

LLVM/project a6bc19fllvm/lib/Transforms/IPO LowerTypeTests.cpp, llvm/test/Other new-pm-O0-defaults.ll

[LTT][profcheck] Set branch weights for complex llvm.type.test lowering
DeltaFile
+38-11llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+21-2llvm/test/Transforms/LowerTypeTests/section.ll
+1-0llvm/test/Other/new-pm-O0-defaults.ll
+60-133 files

LLVM/project 0c5994bllvm/lib/Transforms/IPO LowerTypeTests.cpp, llvm/test/Transforms/LowerTypeTests function-weak.ll

[LTT] Mark as unkown weak function tests.
DeltaFile
+3-2llvm/test/Transforms/LowerTypeTests/function-weak.ll
+3-0llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+6-22 files

LLVM/project 4b9d7e1libc/src/__support/OSUtil/linux fcntl.cpp, libc/test/src/fcntl fcntl_test.cpp

Reapply "[libc] Return errno from OFD failure paths in fcntl." (#166658) (#166846)

The previous implementation in #166252 (rolled back in #166658) caused
buildbot failures due to a bug in an added test. The modified
`UseAfterClose` did not pass a `struct flock` value to `fcntl`:


https://github.com/llvm/llvm-project/blob/2d5170594147b42a37698760d6e0194eec4f1390/libc/test/src/fcntl/fcntl_test.cpp#L175

Which ASAN caught and errored in the `fcntl` implementation when the
unspecified argument was accessed:


https://github.com/llvm/llvm-project/blob/c12cb2892c808af459eaa270b8738a2b375ecc9b/libc/src/__support/OSUtil/linux/fcntl.cpp#L59
DeltaFile
+86-49libc/test/src/fcntl/fcntl_test.cpp
+1-1libc/src/__support/OSUtil/linux/fcntl.cpp
+87-502 files