Revert "[llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage" (#207703)
Reverts llvm/llvm-project#195342
Change resulted in build errors resulting from not finding the
parseIRFile symbol while linking, example:
https://lab.llvm.org/buildbot/#/builders/67/builds/7988
[FIRToMemRef] Doc collectSliceInfoFrom, getMemrefIndices, canonicalizeIndex
Also drops the unused `converted` parameter from getMemrefIndices.
Co-Authored-By: Claude Sonnet 4.6 noreply at anthropic.com
[llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage (#195342)
Patch 3 of 3 to add to llvm-dwarfdump the ability to measure DWARF
coverage of local variables in terms of source lines, as discussed in
this RFC:
https://discourse.llvm.org/t/rfc-debug-info-coverage-tool-v2/83266
This patch adds an IR-level analysis in order to more accurately compute
the defined ranges for each variable. This avoids the problem of the
more naïve approach relying on source scopes, which overcounts as
coverable those lines where the variable is not yet defined (e.g. stack
variables).
The IR analysis requires IR to be provided to llvm-dwarfdump as a
separate `--variable-coverage-bitcode-file` argument (either textual IR
or bitcode; can be produced by various means e.g. `--save-temps
--emit-llvm`, `-ffat-lto-objects`,
[wllvm](https://github.com/travitch/whole-program-llvm)). The
recommended way to obtain a whole-program bitcode file is to use wllvm
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[AMDGPU] Improve SelectionDAG codegen around barrier intrinsics (#207688)
When lowering some intrinsics use generic AND/OR nodes instead of
specific machine instructions. This allows DAG combines and ISel to
select better instructions like S_BFE_U32.
[LV] Tests for combined exit conditions (#205104)
Some initial tests for loops where earlier scalar transforms have
combined a countable exit with an uncountable one.
[AssumeBundleQueries] Remove unused code (#203927)
Some of the utilities in AssumeBundleQueris was only ever used in tests
for them, so there isn't much point in keeping the code around.
[offload] Fix duplicate __llvm_write_custom_profile on Windows PGO builds (#207366)
MSVC/clang-cl lack __attribute__((weak)), so GlobalHandler.cpp provided
a strong stub for __llvm_write_custom_profile. When clang_rt.profile is
linked (e.g. instrumented/PGO builds) lld-link rejects the duplicate
strong symbol.
Replace the stub + CMake workaround with the /alternatename linker
pragma, which is the standard Windows weak-symbol equivalent used by
compiler-rt itself. The linker picks compiler-rt's strong definition
when present.
Fix the guard: use _WIN32 && !__MINGW32__ (not _MSC_VER) so the stub and
/alternatename pragma apply to plain clang-on-Windows too, while MinGW
(which supports __attribute__((weak)) natively) continues to use the
real weak declaration.
Also fix the stub signature from 8 to 10 parameters to match the header.
Assisted-by: Claude
[lldb] Reintroduce ConstString stats (#207694)
These stats were removed in ca59c69132eef55cc42bf8854706590dfddf5584 .
This patch restores the stats in their original form by tracking the
removed value in our own LLDB-specific counter.
[RISCV][NFC] Remove unnecessary ZIP/VISNI checks (#207683)
We should remove them when removing `XRivosVizip` and `XRivosVisni`
but it seems UTC failed to do that.
[AArch64][InstCombine] xor(cmpne) -> cmpeq (#207007)
Fold xor(cmpne(pg, v, 0), pg) into cmpeq(pv, v, 0)
Created after initially trying as a DAGCombine in #206931.
[MCP] Fix bug in spill copy elimination folding chain across a call. (#206858)
findLastSeenDefInCopy interface does not check for possible register
clobbering between the def and current instruction. That may lead to not
having a caller preserved register being preserved across a call.
Replaced with findAvailCopy that also does checks for a regmask operand
between the def and current instruction.
[mlir][x86] AMX memref source check (#206785)
Adds extra checks to AMX lowering to ensure data is read from memrefs as
tensors are not supported by x86 dialect ops.
Reapply [IR] Explicitly specify target feature for module asm (#204548) (#207677)
Reapply with a use-after-free fix. The MC subtarget used for inline
assembly has to stay alive until finalization, not only during the
emitInlineAsm() call.
-----
Support specifying additional properties on module-level inline
assembly. In particular, the target features and target CPU can now be
specified as follows:
module asm(target_features: "+foo", target_cpu: "bar")
"asm line 1"
"asm line 2"
There may be multiple module inline assembly blocks with different
properties.
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[lldb] Reject NULL key in PythonDictionary::GetItem (#205753)
A `breakpoint set -P <class>` with an invalid-UTF-8 class name crashes
lldb with `EXC_BAD_ACCESS`. The class name is passed through
unmodified, so the byte sequence `\xd0p` (an incomplete two-byte UTF-8
sequence) reaches the Python layer:
```
./bin/lldb -b -o $'breakpoint set -P \xd0p -f main.cpp' ./bin/lldb
...
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/
Stack dump:
#4 PythonDictionary::GetItem(PythonObject const&) const
#6 PythonDictionary::GetItemForKey(PythonObject const&) const
#7 PythonObject::ResolveNameWithDictionary(StringRef, PythonDictionary const&)
#9 ScriptedPythonInterface::CreatePluginObject<...>(...)
```
`ResolveNameWithDictionary` builds a `PythonString` from the class name
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[lldb][test] Add expedited-stack-memory backtrace/locals packet test (#205897)
Add a Darwin API test that checks which gdb-remote packets lldb sends
while
inspecting the stack at a public stop, using the gdb-remote packet log
(the
same approach as TestExpeditedThreadPCs.py).
debugserver expedites the frame-pointer backchain in the `jThreadsInfo`
reply
at a public stop and lldb caches it, so:
- A backtrace (`GetNumFrames` + `GetFrameAtIndex` over every frame)
sends no
packets at all. With the memory cache disabled it must read the
backchain
frame by frame, which confirms the test exercises the unwinder's memory
reads.
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[lldb] Guard DW_OP_convert against null DWARF unit and empty stack (#207008)
`Evaluate_DW_OP_convert` dereferenced `eval_ctx.dwarf_cu` (the
`DWARFExpression` Delegate) whenever the operand DIE offset was
non-zero,
and unconditionally read `eval_ctx.stack.back()`. When a DWARF
expression is evaluated without a DWARF unit (as the
lldb-dwarf-expression-fuzzer does), two operand shapes crash:
- `DW_OP_convert` with a non-zero offset calls
`dwarf_cu->GetDIEBitSizeAndSign(...)` on a null Delegate.
- `DW_OP_convert` with nothing on the stack reads the back of an empty
vector.
The unit test feeds both with `dwarf_cu == nullptr` and crashes:
```
[ RUN ] DWARFExpression.DW_OP_convert
#2 SignalHandler(int, __siginfo*, void*)
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[mlir][SPIR-V] Add SPIRVToLLVM conversion for GL.FClamp/SClamp/UClamp (#203831)
Lower the GLSL clamp ops as nested min/max following `min(max(x, y), z)`
---------
Co-authored-by: Igor Wodiany <dev at wodiany.com>
[clang][AMDGPU] Clean-up handling of named barrier type
- Do not allow the type in struct fields. This is more like a handle/resource than a real type. It does not follow the traditional C++ object model, and using it in a struct field can do some weird things if you instantiate too many of them.
- Use a `hip_barrier` LangAS for this type that currently maps to the local AS. This allows easy switching to the barrier AS in a future patch.
Alternative to #195612, see also #195613
[libc] Add struct ipv6_mreq and IPv6 socket options (#206448)
This patch adds struct ipv6_mreq and defines various IPv6 socket option
macros in <netinet/in.h>. I've also moved the existing option
definitions to the yaml file.
Assisted by Gemini.
[AMDGPU] Fix s.barrier.init/signal.var member count mask (#207660)
The count was shifted before masking, so bits above the low 6 could leak
past the member count field in M0
[X86] Attempt to narrow XMM->i64 (v)movq -> (v)movd if the upper 32-bits are known to be zero (#207615)
Add a custom 'X86upperzero' tablegen pattern to match vectors where the
upper half bits of every element is known zero.
Saves 1 byte by using (V)MOVD instead of (V)MOVQ - and avoids
differences in X86/X64 codegen that was bloating diffs in some upcoming
VECREDUCE_ADD work.
I've added an extra psadbw.ll test to ensure that the extractstore
pattern isn't being affected.
Cleanup for the upcoming VECREDUCE_ADD handling which will be using
PSADBW more aggressively (v2i64 result type but only 16 active bits for
element).
