LLVM/project a8cd1aclldb/cmake/modules LLDBConfig.cmake, lldb/source/Plugins/Process CMakeLists.txt

[lldb][Process/FreeBSDKernel] Remove libfbsdvmcore support (#181283)

Due to libfbsdvmcore, adding new features requires modifying both
`ProcessFreeBSDKernelFVC` and `ProcessFreeBSDKernelKVM` which also
requires testing on both. This is highly inefficient while the user base
of fvc is currently invisible since most package manager don't ship
libfbsdvmcore with LLDB.

There is still demand for cross-platform kernel dump debugging. This
will be implemented in future either by cloning and embedding kvm
interface into LLDB or unifying dump formats to ELF core with
minidump-to-elf conversion tool on FreeBSD side.

---------

Signed-off-by: Minsoo Choo <minsoochoo0122 at proton.me>
DeltaFile
+12-109lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.cpp
+1-14lldb/source/Plugins/Process/FreeBSDKernel/CMakeLists.txt
+13-1lldb/source/Plugins/Process/FreeBSDKernel/ProcessFreeBSDKernel.h
+3-0llvm/docs/ReleaseNotes.md
+1-1lldb/source/Plugins/Process/CMakeLists.txt
+0-1lldb/cmake/modules/LLDBConfig.cmake
+30-1266 files

LLVM/project 025e11emlir/test/Dialect/Tosa tosa-narrow-f64-to-f32.mlir tosa-narrow-f64-to-f32-aggressive.mlir

[mlir][tosa] Use 0 values for the dense resource in tosa-narrow-* tests (#182321)

For the test portability between little-endian and big-endian, just use
zeros as the dense resource values. It doesn't test the actual narrowing
but tests that the other conversions went well.
DeltaFile
+2-2mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
+2-2mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
+2-2mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
+2-2mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
+8-84 files

LLVM/project b0bf771clang/test/CodeGenHIP builtins-amdgcn-vi-f16.hip

[AMDGPU] Removed _hip suffix from test names
DeltaFile
+22-22clang/test/CodeGenHIP/builtins-amdgcn-vi-f16.hip
+22-221 files

LLVM/project 793bb3fclang/include/clang/Basic BuiltinsAMDGPU.td, clang/test/CodeGenHIP builtins-amdgcn-vi-f16.hip

[AMDGPU] Update f16 builtin definitions to use _Float16 instead of __fp16
DeltaFile
+235-0clang/test/CodeGenHIP/builtins-amdgcn-vi-f16.hip
+11-11clang/include/clang/Basic/BuiltinsAMDGPU.td
+246-112 files

LLVM/project 663398dllvm/lib/Target/SPIRV SPIRVInstructionSelector.cpp

[NFC][SPIRV] Replace removeFromParent by eraseFromParent

`removeFromParent` doesn't deallocate the resources associated with the
`MachineInstruction`.

I was not able to remove all the uses of `removeFromParent` in the file.
DeltaFile
+3-3llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
+3-31 files

LLVM/project 4ce9587llvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)"

This reverts commit aab9412a69a07787e9ec98b25709d709b7b537a6.
DeltaFile
+4-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+4-41 files

LLVM/project 10a594dllvm/tools/bugpoint CrashDebugger.cpp Miscompilation.cpp

llvm: Delete bugpoint

For crash reduction, I don't think it does anything that llvm-reduce
can't. Pass pipeline reduction also has a separate reduction script.
The main thing there isn't a replacement tool is the miscompilation
reducer, but I'm not sure that's actually functioned for years.

There are still some references to bugpoint in various comments
and pieces of documentation that don't all necessarily make sense
to replace or remove. In particular there are a few passes documented
as "only for bugpoint", but I've left those alone in case they are
useful for manual reductions.
DeltaFile
+0-1,412llvm/tools/bugpoint/CrashDebugger.cpp
+0-1,080llvm/tools/bugpoint/Miscompilation.cpp
+0-849llvm/tools/bugpoint/ToolRunner.cpp
+0-451llvm/tools/bugpoint/ExecutionDriver.cpp
+0-410llvm/tools/bugpoint/ExtractFunction.cpp
+0-290llvm/tools/bugpoint/BugDriver.h
+0-4,49238 files not shown
+17-6,70644 files

LLVM/project 2a62585clang/lib/CIR/CodeGen CIRGenCUDANV.cpp, clang/test/CIR/CodeGenCUDA kernel-call.cu

[CIR][HIP] Add Stub body emission test coverage and Fix kernelHandle storage
DeltaFile
+12-3clang/test/CIR/CodeGenCUDA/kernel-call.cu
+5-8clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
+17-112 files

LLVM/project 6e9a736clang/lib/Analysis/LifetimeSafety Origins.cpp FactsGenerator.cpp, clang/test/Sema warn-lifetime-safety-suggestions.cpp

[LifetimeSafety] Fix 'this' origin handling in lambdas (#182300)

Fixes https://github.com/llvm/llvm-project/issues/182291
DeltaFile
+10-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+10-0clang/test/Sema/warn-lifetime-safety-suggestions.cpp
+4-4clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+24-103 files

LLVM/project f437315llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalizeHelper.h, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-waterfall-call.mir regbankselect-call.ll

[AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (#165747)

DeltaFile
+215-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
+158-0llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
+55-19llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+12-5llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
+12-5llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+5-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.h
+457-296 files

LLVM/project 015ea59llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions (#179435)

A recent specification update has removed `FEAT_XS` gating for `tlbip *nxs`
instructions. It remains gated on `FEAT_XS` for `tlbi *nxs` instructions.
DeltaFile
+6-18llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+8-9llvm/test/MC/AArch64/armv9a-tlbip.s
+0-8llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+1-1llvm/lib/Target/AArch64/AArch64SystemOperands.td
+15-364 files

LLVM/project 010ac16llvm/utils/emacs tablegen-mode.el

[emacs] Rework tablegen mode

This commit reworks tablegen-mode to be derived from prog-mode and
removes a lot of the manual work that define-derived-mode does for you
these days, along with fixing other lints (such as an over-long
summary).

This is a major version bump because td-decorators-face has been
renamed to tablegen-decorators-face in order to not pollute other
namespaces.
DeltaFile
+43-62llvm/utils/emacs/tablegen-mode.el
+43-621 files

LLVM/project bcfff58llvm/include/llvm/Transforms/InstCombine InstCombiner.h, llvm/lib/Target/AMDGPU AMDGPUInstCombineIntrinsic.cpp

AMDGPU: Strip sign bit operations on llvm.amdgcn.trig.preop uses (#179712)

The instruction ignores the sign bit, so we can find the magnitude
source. The real library use has a fabs input which this avoids.

stripSignOnlyFPOps should probably go directly into PatternMatch in some
form.
DeltaFile
+64-0llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
+11-0llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
+0-9llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+5-0llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+80-94 files

LLVM/project 680b56allvm/utils/emacs llvm-mir-mode.el llvm-mode.el, mlir/utils/emacs mlir-mode.el

[NFC][emacs] Fix emacs lints in the LLVM and MLIR modes (#182074)

This mainly involved explicitly declaring minimum emacs versions for
setq-local and adding a lexical-binding annotaton.

The commit also removes some workarounds from the MLIR mode for Emacs 23
(!).
DeltaFile
+5-9mlir/utils/emacs/mlir-mode.el
+3-1llvm/utils/emacs/llvm-mir-mode.el
+3-1llvm/utils/emacs/llvm-mode.el
+11-113 files

LLVM/project fab8cb4clang/lib/CIR/CodeGen CIRGenBuiltin.cpp, clang/test/CIR/CodeGen builtins-x86.c

[CIR]Upstream support for IITDescriptor::Pointer and Vector types (#182112)

DeltaFile
+27-0clang/test/CIR/CodeGen/builtins-x86.c
+11-0clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+38-02 files

LLVM/project f446cbbllvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.bitop3.ll

AMDGPU/GlobalISel: RegBankLegalize for amdgcn_bitop3 (#181877)

DeltaFile
+6-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+3-3llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitop3.ll
+9-32 files

LLVM/project 38d8047llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 inversed-icmp-to-gather.ll

[SLP]Do not mark for transforming to buildvector inversed compares

Inversed compares must remain vector nodes, they should be converted to
gathers to generate correct code.

Fixes issue reported in https://github.com/llvm/llvm-project/pull/181580#issuecomment-3926951332
DeltaFile
+36-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-1llvm/test/Transforms/SLPVectorizer/X86/inversed-icmp-to-gather.ll
+37-22 files

LLVM/project ac16ce3llvm/test/CodeGen/ARM machine-sink-multidef.mir

[ARM] Regenerate checks in machine-sink-multidef.mir (#182314)

DeltaFile
+23-18llvm/test/CodeGen/ARM/machine-sink-multidef.mir
+23-181 files

LLVM/project c3745fellvm/docs HowToSubmitABug.rst

docs: Delete incorrect code generation section of HowToSubmitABug (#182315)

I've never used this. Based on the description here, I'm assuming
it relied on the C backend, which was removed in 2012.
DeltaFile
+0-68llvm/docs/HowToSubmitABug.rst
+0-681 files

LLVM/project 6fdbcf6llvm/docs/CommandGuide llc.rst lli.rst, llvm/tools/llc llc.cpp

tools: Remove untested PluginLoader includes (#117644)

As far as I can tell there are 2 parallel plugin mechanisms.
opt -load=plugin does not work, and is ignored. opt -load-pass-plugin
does work. PluginLoader.h forces a static definition of the "load"
cl::opt into included TUs. Delete the cases with no tests.
DeltaFile
+0-6llvm/docs/CommandGuide/llc.rst
+0-5llvm/docs/CommandGuide/lli.rst
+0-1llvm/tools/llc/llc.cpp
+0-1llvm/tools/lli/lli.cpp
+0-134 files

LLVM/project 8e85a42mlir/include/mlir/Dialect/OpenACC OpenACCCGAttributes.td OpenACC.h, mlir/lib/Dialect/OpenACC/IR OpenACCCG.cpp

[mlir][acc] Add attributes for parallelism dimensions (#182209)

As OpenACC gets lowered to eventually mapping to GPU (via GPU dialect),
we need to track parallelism assignment which we can use in how
variables get privatized, how barriers and synchronizations are inserted
to ensure appropriate OpenACC execution model, and for loop
work-sharing. This adds GPUParallelDimAttr and GPUParallelDimsAttr for
this.
DeltaFile
+282-0mlir/lib/Dialect/OpenACC/IR/OpenACCCG.cpp
+94-0mlir/include/mlir/Dialect/OpenACC/OpenACCCGAttributes.td
+79-0mlir/test/Dialect/OpenACC/ops-cg.mlir
+21-0mlir/test/Dialect/OpenACC/invalid-cg.mlir
+1-0mlir/include/mlir/Dialect/OpenACC/OpenACC.h
+1-0mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
+478-06 files

LLVM/project 7d9d392llvm/lib/Target/WebAssembly WebAssemblyISelLowering.cpp WebAssemblyAsmPrinter.cpp, llvm/test/CodeGen/WebAssembly select-reftype.ll

[WebAssembly] Fix SELECT_CC lowering for reference types (#181622)

SELECT_CC nodes with externref or funcref return types were not being
expanded, causing "Cannot select" errors during instruction selection.

This adds SELECT_CC to the list of operations that should be expanded
for reference types, similar to how it's already handled for scalar
types (i32, i64, f32, f64). This allows the SELECT_CC to be lowered to a
SELECT node, which already has instruction patterns defined in
WebAssemblyInstrRef.td.
DeltaFile
+50-0llvm/test/CodeGen/WebAssembly/select-reftype.ll
+10-5llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
+6-0llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+66-53 files

LLVM/project e80e940llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 cmov-fp.ll select_const.ll

[X86] combineCMov - fold CMOV(LOAD(PTR0),LOAD(PTR1)) -> LOAD(CMOV(PTR0,PTR1)) (#182084)

As discussed on #182021 - if we have equivalent simple loads (chain,
addressspace etc.), just with different pointers then we can select
between the pointers directly and perform just a single load, which in
most cases will avoid branching.

A future patch might be able to further simplify some (mainly stack?)
address math with CMOV(X,ADD(X,C1)) -> ADD(X,CMOV(0,C1)) /
CMOV(ADD(X,C0),ADD(X,C1)) -> ADD(X,CMOV(C0,C1))
DeltaFile
+172-444llvm/test/CodeGen/X86/cmov-fp.ll
+14-22llvm/test/CodeGen/X86/select_const.ll
+31-0llvm/lib/Target/X86/X86ISelLowering.cpp
+12-18llvm/test/CodeGen/X86/dagcombine-select.ll
+5-20llvm/test/CodeGen/X86/sse-load-ret.ll
+4-7llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
+238-5112 files not shown
+245-5248 files

LLVM/project cbfb034mlir/lib/Dialect/Linalg/TransformOps LinalgTransformOps.cpp

[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in LinalgTransformOps.cpp (NFC)
DeltaFile
+5-5mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
+5-51 files

LLVM/project b284d61llvm/tools/bugpoint CrashDebugger.cpp Miscompilation.cpp

llvm: Delete bugpoint

For crash reduction, I don't think it does anything that llvm-reduce
can't. Pass pipeline reduction also has a separate reduction script.
The main thing there isn't a replacement tool is the miscompilation
reducer, but I'm not sure that's actually functioned for years.

There are still some references to bugpoint in various comments
and pieces of documentation that don't all necessarily make sense
to replace or remove. In particular there are a few passes documented
as "only for bugpoint", but I've left those alone in case they are
useful for manual reductions.
DeltaFile
+0-1,412llvm/tools/bugpoint/CrashDebugger.cpp
+0-1,080llvm/tools/bugpoint/Miscompilation.cpp
+0-849llvm/tools/bugpoint/ToolRunner.cpp
+0-451llvm/tools/bugpoint/ExecutionDriver.cpp
+0-410llvm/tools/bugpoint/ExtractFunction.cpp
+0-290llvm/tools/bugpoint/BugDriver.h
+0-4,49236 files not shown
+15-6,70342 files

LLVM/project 4f70e83llvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Remove `+xs` gating for `tlbip *nxs` instructions

A recent specification update has removed FEAT_XS gating for `tlbip *nxs`
instructions. It remains gated on FEAT_XS for `tlbi *nxs` instructions.
DeltaFile
+6-18llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+8-9llvm/test/MC/AArch64/armv9a-tlbip.s
+0-8llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+1-1llvm/lib/Target/AArch64/AArch64SystemOperands.td
+15-364 files

LLVM/project 85e6134mlir/lib/Dialect/Linalg/Transforms ElementwiseOpFusion.cpp, mlir/test/Dialect/Linalg collapse-dim.mlir

[MLIR] Fix a crash in CollapseLinalgDimensions (#181715)

This patch fixes #181610 
Added a check in areDimSequencesPreserved()
to verify that each map is a projected permutation before calling
isDimSequencePreserved().
If a map is not a projected permutation, the
function returns false (dimension sequences cannot be preserved in
non-projected-permutation maps).
DeltaFile
+29-0mlir/test/Dialect/Linalg/collapse-dim.mlir
+5-2mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp
+34-22 files

LLVM/project 7ae0a6emlir/lib/Interfaces IndexingMapOpInterface.cpp, mlir/test/Dialect/Linalg invalid.mlir

[mlir][Interface] Allow scalar operands and require ranked shaped operands in IndexingMapOpInterface (#179072)

This change adjusts `IndexingMapOpInterface::verifyImpl`: Scalars are
allowed as operands (treated as rank-0), vectors remain allowed,
unranked tensors/memrefs are rejected with explicit diagnostics.

Fixes https://github.com/llvm/llvm-project/issues/179043
DeltaFile
+48-3mlir/lib/Interfaces/IndexingMapOpInterface.cpp
+18-0mlir/test/Dialect/Linalg/invalid.mlir
+66-32 files

LLVM/project 070db69lldb/test/API/tools/lldb-dap/variables TestDAP_variables.py, lldb/tools/lldb-dap DAP.cpp

Reapply "[lldb-dap] Validate utf8 protocol messages." (#181930) (#182056)

This reverts commit 977d910d005c47f884ecf838e504da301b1124b9.

Addressing build issues with gcc.
DeltaFile
+67-67lldb/tools/lldb-dap/Protocol/ProtocolTypes.h
+94-9lldb/tools/lldb-dap/Protocol/ProtocolBase.h
+50-50lldb/tools/lldb-dap/Protocol/ProtocolRequests.h
+42-13lldb/tools/lldb-dap/Protocol/ProtocolBase.cpp
+33-13lldb/test/API/tools/lldb-dap/variables/TestDAP_variables.py
+17-20lldb/tools/lldb-dap/DAP.cpp
+303-17220 files not shown
+397-23026 files

LLVM/project 1f08252llvm/utils/emacs llvm-mode.el

Fix typo
DeltaFile
+1-1llvm/utils/emacs/llvm-mode.el
+1-11 files