LLVM/project 0d7bccfllvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/ARM atomic-load-store.ll

[AtomicExpand] Add bitcasts when expanding store atomic vector

AtomicExpand fails for aligned \`store atomic <n x T>\` because it
does not find a compatible library call. This change adds appropriate
ptrtoint + bitcast so that the call can be lowered, mirroring the
load-side handling from #148900.
DeltaFile
+99-6llvm/test/CodeGen/X86/atomic-load-store.ll
+98-0llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
+49-0llvm/test/CodeGen/ARM/atomic-load-store.ll
+4-2llvm/lib/CodeGen/AtomicExpandPass.cpp
+250-84 files

LLVM/project 222484bclang/include/clang/Basic CodeGenOptions.def, clang/include/clang/Options Options.td

Remove default setting signaling_nan attribute for strictfp functions

We cannot describe such behavior in Clang User Manual, strictfp is not
visible for a user.
DeltaFile
+8-9clang/include/clang/Options/Options.td
+4-8clang/lib/Driver/ToolChains/Clang.cpp
+5-5clang/test/CodeGen/fp-floatcontrol-stack.cpp
+4-4clang/test/Driver/fp-model.c
+1-6clang/lib/CodeGen/CodeGenFunction.cpp
+1-4clang/include/clang/Basic/CodeGenOptions.def
+23-366 files not shown
+30-4412 files

LLVM/project d90baa0lldb/source/Commands CommandObjectBreakpoint.cpp CommandObjectTarget.cpp

[lldb] Make CommandObject::GetTarget filter out the dummy target (#198026)

Follow-up to #197805. Make CommandObject::GetTarget the canonical target
accessor for command code, and tighten its semantics so that DoExecute
methods can't accidentally operate on the dummy target.

GetTarget now returns Target* instead of Target&. The result is the
target from the command's frozen execution context, falling back to the
interpreter's execution context. The dummy target is filtered out and
replaced with nullptr unless the command opts in via one of the
eCommandRequires{Target,Process,Thread,Frame} flags (in which case
CheckRequirements has already guaranteed a real target) or via the new
eCommandAllowsDummyTarget flag.

This is the first half of the cleanup discussed at the end of #197805. A
follow-up will audit DoExecute methods that still reach for
GetSelectedTarget or m_exe_ctx.GetTargetPtr() directly and migrate them
to GetTarget.
DeltaFile
+161-149lldb/source/Commands/CommandObjectBreakpoint.cpp
+143-114lldb/source/Commands/CommandObjectTarget.cpp
+55-48lldb/source/Commands/CommandObjectWatchpoint.cpp
+49-46lldb/source/Commands/CommandObjectSource.cpp
+20-23lldb/source/Commands/CommandObjectProcess.cpp
+24-18lldb/source/Commands/CommandObjectFrame.cpp
+452-39814 files not shown
+578-49120 files

LLVM/project b110a11llvm/include/llvm/Target TargetSelectionDAG.td, llvm/lib/Target/X86 X86InstrFragmentsSIMD.td X86InstrAVX512.td

[X86] Cast atomic vectors in IR to support floats

Extend the X86 \`alignedstore\` PatFrag to also match \`atomic_store\`
with vector-size alignment, so existing MOVAPS/MOVAPD/MOVDQA-family
aligned-store patterns cover 128-bit aligned vector atomic stores on
SSE/AVX/AVX-512 without per-type duplicates. \`<4 x float>\`,
\`<2 x double>\`, \`<2 x i64>\`, \`<4 x i32>\`, \`<8 x half>\`, \`<8 x bfloat>\`
all codegen to a single \`movaps\`/\`movapd\` on AVX+ via this.

Adds v8f16/v8bf16 bitconvert variants to the widen-path
\`atomic_store_32\` / \`atomic_store_64\` patterns so \`<2 x half>\`,
\`<2 x bfloat>\`, \`<4 x half>\`, \`<4 x bfloat>\` atomic stores reaching
the PR4 widen path also collapse to a single instruction on AVX+
targets.

Vectors whose \`getTypeAction\` is split rather than widen still rely
on PR6's \`SplitVecOp_ATOMIC_STORE\` — that path bitcasts the vector
to a scalar integer and issues an integer \`atomic_store_N\`, picked
up by the pre-existing scalar atomic-store patterns. The two

    [4 lines not shown]
DeltaFile
+86-0llvm/test/CodeGen/X86/atomic-load-store.ll
+5-4llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+1-1llvm/include/llvm/Target/TargetSelectionDAG.td
+1-1llvm/lib/Target/X86/X86InstrAVX512.td
+93-64 files

LLVM/project e4c9611llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp LegalizeTypes.h, llvm/test/CodeGen/X86 atomic-load-store.ll

[SelectionDAG] Split vector types for atomic store

Vector types that aren't widened are split so that a single ATOMIC_STORE
is issued for the entire vector at once. This enables SelectionDAG to
translate vectors with type bfloat,half.
DeltaFile
+440-0llvm/test/CodeGen/X86/atomic-load-store.ll
+20-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+461-03 files

LLVM/project 95ab456llvm/test/Transforms/JumpTableToSwitch profile-no-guid-metadata.ll

[JTS] Drop test for multiple zero values in VP metadata

This will soon become a verifier failure. Drop the test so that we can
actually enforce this in the verifier without causing test failures.

Reviewers: mtrofin

Pull Request: https://github.com/llvm/llvm-project/pull/197617
DeltaFile
+4-38llvm/test/Transforms/JumpTableToSwitch/profile-no-guid-metadata.ll
+4-381 files

LLVM/project f587a58llvm/lib/Transforms/Instrumentation PGOMemOPSizeOpt.cpp

[PGO] Remove pgo-memop-opt VP metadata verification

This is no longer necessary now that we are explicitly deduplicating
values at construction time. This will also soon be enforced in the
verifier.

https://reviews.llvm.org/D92074 and https://reviews.llvm.org/D136211
have more context on the introduction of this check/its evolution.

Reviewers: mtrofin

Pull Request: https://github.com/llvm/llvm-project/pull/197616
DeltaFile
+0-7llvm/lib/Transforms/Instrumentation/PGOMemOPSizeOpt.cpp
+0-71 files

LLVM/project 1d14696llvm/lib/ProfileData InstrProf.cpp, llvm/test/Transforms/PGOProfile consecutive-zeros-metadata.ll

[InstrProf] Deduplicate VP values

Zero VP values can come up in some places. They are intentional around
external symbols for indirect call sites, and it seems like they might
be unintentional around memop VP metadata
(https://reviews.llvm.org/D92074). This patch combines them so that we
can enforce the variant that there are no duplicate values in VP
metadata, which allows passes to make some simplifying assumptions. We
also deduplicate non-zero values, because there is error handling for
them and still some undebugged cases where they show up
(https://reviews.llvm.org/D136211).

This ended up being a bit messier than I would like due to the need to
handle non-zero duplicate values and preserve existing error handling
behavior in llvm-profdata. I've left comments explaining this so we can
hopefully clean this up when llvm-profdata eventually gets fixed. The
error has shown up in some places
(https://issues.chromium.org/issues/353702041), so does still exist, but
I still have not been able to find profraw files to be able to fix the

    [6 lines not shown]
DeltaFile
+30-4llvm/lib/ProfileData/InstrProf.cpp
+25-0llvm/test/Transforms/PGOProfile/Inputs/consecutive-zeros-metadata.proftext
+21-0llvm/test/Transforms/PGOProfile/consecutive-zeros-metadata.ll
+76-43 files

LLVM/project 77f0918clang-tools-extra/test/clang-tidy/checkers/modernize macro-to-enum-headers.cpp, clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/macro-to-enum modernize-macro-to-enum3.h

[clang-tidy][NFC] Fix modernize-macro-to-enum testcases (#198093)

Previously these header files are not tested, the new added test case
fixes the problem.

As of AI Usage: Codex is used to suggest the new tests
Closes https://github.com/llvm/llvm-project/issues/173530
DeltaFile
+15-0clang-tools-extra/test/clang-tidy/checkers/modernize/macro-to-enum-headers.cpp
+8-0clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/macro-to-enum/modernize-macro-to-enum3.h
+23-02 files

LLVM/project eeff32fllvm/test/CodeGen/X86 vector-shift-ashr-sub128.ll vector-shift-ashr-256.ll

[X86] Add vXi8 sra-by-one tests (#198096)

Test coverage for #198061
DeltaFile
+213-0llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
+97-0llvm/test/CodeGen/X86/vector-shift-ashr-256.ll
+71-0llvm/test/CodeGen/X86/vector-shift-ashr-128.ll
+28-0llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
+409-04 files

LLVM/project 77cf17ellvm/test/CodeGen/X86 vector-fshr-rot-256.ll vector-fshr-rot-128.ll

[X86] Add vXi8 rot-by-one tests (#198095)

Test coverage for #198059 and #198060
DeltaFile
+89-0llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
+86-0llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
+86-0llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
+80-0llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
+56-0llvm/test/CodeGen/X86/vector-fshl-rot-512.ll
+56-0llvm/test/CodeGen/X86/vector-fshr-rot-512.ll
+453-06 files

LLVM/project 1fb6c22mlir/include/mlir/IR Operation.h, mlir/lib/IR Operation.cpp

[mlir] Cleanup Operation.cpp (NFC) (#197712)

This PR cleans up the Operation.cpp based on clangd suggestions. It
removes unused headers, fixes incorrect comments, and improves
performance by applying std::move where appropriate.
DeltaFile
+2-3mlir/lib/IR/Operation.cpp
+0-1mlir/include/mlir/IR/Operation.h
+2-42 files

LLVM/project 10756d3llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/test/CodeGen/AArch64 andorxor.ll neon-dotreduce.ll

[AArch64][GlobalISel] Fold buildvector of bitcast (#141553)

This adds a combine for buildvectors from bitcast values, sinking the
bitcast and generating a buildvector from the original scalar type.
```
  %5:_(<4 x s8>) = G_BITCAST %16:_(s32)
  %18:_(s8), %19:_(s8), %20:_(s8), %21:_(s8) = G_UNMERGE_VALUES %5:_(<4 x s8>)
  %22:_(s8) = G_IMPLICIT_DEF
  %23:_(<8 x s8>) = G_BUILD_VECTOR %18:_(s8), %19:_(s8), %20:_(s8), %21:_(s8), %22:_(s8), %22:_(s8), %22:_(s8), %22:_(s8)
=>
  %undef:_(s32) = G_IMPLICIT_DEF
  %bv:_(<2 x s32>) = G_BUILD_VECTOR %16:_(s32), %undef:_(s32)
  %23:_(<8 x s8>) = G_BITCAST %bv:_(<2 x s32>)
```

It helps clean up some of the inefficiencies from widening scalar types.
DeltaFile
+30-117llvm/test/CodeGen/AArch64/andorxor.ll
+64-0llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+10-50llvm/test/CodeGen/AArch64/neon-dotreduce.ll
+12-38llvm/test/CodeGen/AArch64/bitcast.ll
+8-37llvm/test/CodeGen/AArch64/add.ll
+8-37llvm/test/CodeGen/AArch64/sub.ll
+132-27912 files not shown
+183-44818 files

LLVM/project 4d46a64llvm/tools/llvm-ir2vec CMakeLists.txt

Fixup"[llvm-ir2vec] Breaking up llvm-ir2vec lib implementation to clean up MIR deps from ir2vec python bindings (#194414)" (#198077)

llvm-ir2vec and LLVMMIREmbUtils was missing some deps which show up when
-DBUILD_SHARED_LIBS=ON. Fixed the Cmakelists.txt to reflect accurate
dependencies
DeltaFile
+6-0llvm/tools/llvm-ir2vec/CMakeLists.txt
+6-01 files

LLVM/project fd78840llvm/tools/llvm-ir2vec CMakeLists.txt, llvm/tools/llvm-ir2vec/lib CMakeLists.txt

Fix build with shared libraries

Add missing library dependencies in llvm-ir2vec.
DeltaFile
+4-0llvm/tools/llvm-ir2vec/CMakeLists.txt
+3-0llvm/tools/llvm-ir2vec/lib/CMakeLists.txt
+7-02 files

LLVM/project f8fcdedclang-tools-extra/clangd TidyFastChecks.inc

[clangd] Add llvm-formatv-string to TidyFastChecks (#197829)

Enables `llvm-formatv-string` (#195974) in clangd.
DeltaFile
+1-0clang-tools-extra/clangd/TidyFastChecks.inc
+1-01 files

LLVM/project 080b744offload/libacctarget Interface.cpp CfiDataRuntimeInterface.cpp

[offload] Add `libacctarget` OpenACC runtime

The implementation is subject to change.
DeltaFile
+2,043-0offload/libacctarget/Interface.cpp
+297-0offload/libacctarget/CfiDataRuntimeInterface.cpp
+270-0offload/libacctarget/Interface.h
+248-0offload/libacctarget/RuntimeInterface.cpp
+231-0offload/libacctarget/DeviceManager.cpp
+204-0offload/libacctarget/DataRuntimeInterface.cpp
+3,293-011 files not shown
+4,203-017 files

LLVM/project 0e9c3ccoffload/include omptarget.h, offload/libompaccsupport PluginManager.cpp Mapping.cpp

[offload] Add new features to libompaccsupport for OpenACC

AsyncInfoTy STATIC_NON_BLOCKING type.

Strided array copies and mapping.

No create mapping type.

Refactoring intialization.

Loading offload objects with OpenACC offloading kind.
DeltaFile
+171-0offload/plugins-nextgen/common/src/PluginInterface.cpp
+123-32offload/libompaccsupport/PluginManager.cpp
+45-39offload/libomptarget/interface.cpp
+65-7offload/libompaccsupport/Mapping.cpp
+22-45offload/libomptarget/omptarget.cpp
+52-9offload/include/omptarget.h
+478-13214 files not shown
+733-17420 files

LLVM/project 249ded0offload/libompaccsupport Mapping.cpp PluginManager.cpp, offload/libompaccsupport/OMPT Callback.cpp

[offload] Move omptarget files to ompaccsupport
DeltaFile
+0-584offload/libomptarget/OpenMP/Mapping.cpp
+584-0offload/libompaccsupport/Mapping.cpp
+573-0offload/libompaccsupport/PluginManager.cpp
+0-573offload/libomptarget/PluginManager.cpp
+0-538offload/libomptarget/OpenMP/OMPT/Callback.cpp
+538-0offload/libompaccsupport/OMPT/Callback.cpp
+1,695-1,69510 files not shown
+2,330-2,26716 files

LLVM/project 0141e28offload/libompaccsupport PluginManager.cpp, offload/libomptarget omptarget.cpp

[offload] Move AsyncInfoTy implementation from omptarget to PluginManager
DeltaFile
+49-0offload/libompaccsupport/PluginManager.cpp
+0-49offload/libomptarget/omptarget.cpp
+49-492 files

LLVM/project 2cfd548offload/test/mapping map_ordering_tgt_alloc_present_tofrom.c, offload/test/mapping/present target_array_extension.c target.c

[offload] Remove `omptarget` references from tests

Make check lines more generic so that we can move and rename components
without breaking the tests
DeltaFile
+29-29offload/test/offloading/struct_mapping_with_pointers.cpp
+6-6offload/test/mapping/present/target_array_extension.c
+5-5offload/test/mapping/map_ordering_tgt_alloc_present_tofrom.c
+5-5offload/test/mapping/present/target.c
+5-5offload/test/mapping/present/zero_length_array_section.c
+4-4offload/test/mapping/present/target_data_array_extension.c
+54-5417 files not shown
+86-8623 files

LLVM/project 7e99897clang/tools/clang-linker-wrapper ClangLinkerWrapper.cpp, llvm/include/llvm/Frontend/Offloading OffloadWrapper.h

[offload][clang][llvm] Add new openacc offload kind

The OpenACC offloading kind is equivalent to OpenMP except for which
initialization functino is called at initialization time.
DeltaFile
+31-9llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
+7-5llvm/include/llvm/Frontend/Offloading/OffloadWrapper.h
+5-3clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
+3-2llvm/tools/llvm-offload-wrapper/llvm-offload-wrapper.cpp
+3-1llvm/include/llvm/Object/OffloadBinary.h
+3-0llvm/lib/Object/OffloadBinary.cpp
+52-206 files

LLVM/project 3f38dballvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/X86 freeze-binary.ll

[DAG] SimplifyDemandedBits - remove ISD::FREEZE node if all demanded elements are not undef/poison (#198084)

Similar to what we already do in SimplifyDemandedVectorElts
DeltaFile
+2-8llvm/test/CodeGen/X86/freeze-binary.ll
+7-0llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+9-82 files

LLVM/project b15b438llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/ARM atomic-load-store.ll

[AtomicExpand] Add bitcasts when expanding store atomic vector

AtomicExpand fails for aligned \`store atomic <n x T>\` because it
does not find a compatible library call. This change adds appropriate
ptrtoint + bitcast so that the call can be lowered, mirroring the
load-side handling from #148900.
DeltaFile
+99-6llvm/test/CodeGen/X86/atomic-load-store.ll
+98-0llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
+49-0llvm/test/CodeGen/ARM/atomic-load-store.ll
+4-2llvm/lib/CodeGen/AtomicExpandPass.cpp
+250-84 files

LLVM/project 48ba9b2llvm/include/llvm/Target TargetSelectionDAG.td, llvm/lib/Target/X86 X86InstrFragmentsSIMD.td X86InstrAVX512.td

[X86] Cast atomic vectors in IR to support floats

Extend the X86 \`alignedstore\` PatFrag to also match \`atomic_store\`
with vector-size alignment, so existing MOVAPS/MOVAPD/MOVDQA-family
aligned-store patterns cover 128-bit aligned vector atomic stores on
SSE/AVX/AVX-512 without per-type duplicates. \`<4 x float>\`,
\`<2 x double>\`, \`<2 x i64>\`, \`<4 x i32>\`, \`<8 x half>\`, \`<8 x bfloat>\`
all codegen to a single \`movaps\`/\`movapd\` on AVX+ via this.

Adds v8f16/v8bf16 bitconvert variants to the widen-path
\`atomic_store_32\` / \`atomic_store_64\` patterns so \`<2 x half>\`,
\`<2 x bfloat>\`, \`<4 x half>\`, \`<4 x bfloat>\` atomic stores reaching
the PR4 widen path also collapse to a single instruction on AVX+
targets.

Vectors whose \`getTypeAction\` is split rather than widen still rely
on PR6's \`SplitVecOp_ATOMIC_STORE\` — that path bitcasts the vector
to a scalar integer and issues an integer \`atomic_store_N\`, picked
up by the pre-existing scalar atomic-store patterns. The two

    [4 lines not shown]
DeltaFile
+92-12llvm/test/CodeGen/X86/atomic-load-store.ll
+5-4llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+1-1llvm/lib/Target/X86/X86InstrAVX512.td
+1-1llvm/include/llvm/Target/TargetSelectionDAG.td
+99-184 files

LLVM/project e0dca2bllvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp LegalizeTypes.h, llvm/test/CodeGen/X86 atomic-load-store.ll

[SelectionDAG] Split vector types for atomic store

Vector types that aren't widened are split so that a single ATOMIC_STORE
is issued for the entire vector at once. This enables SelectionDAG to
translate vectors with type bfloat,half.
DeltaFile
+450-0llvm/test/CodeGen/X86/atomic-load-store.ll
+20-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+471-03 files

LLVM/project a730eafllvm/lib/Target/X86 X86InstrSSE.td X86InstrAVX512.td, llvm/test/CodeGen/X86 atomic-load-store.ll atomic-unordered.ll

[X86] Remove extra MOV after widening atomic store

This change adds patterns to optimize out an extra MOV present after
widening the atomic store. Covers <2 x i8> (SSE4.1+), <2 x i16>,
<4 x i8>, <2 x i32>, <2 x float>, <4 x i16>, <2 x ptr addrspace(270)>.
DeltaFile
+47-64llvm/test/CodeGen/X86/atomic-load-store.ll
+30-24llvm/test/CodeGen/X86/atomic-unordered.ll
+10-10llvm/lib/Target/X86/X86InstrSSE.td
+6-6llvm/lib/Target/X86/X86InstrAVX512.td
+5-0llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+1-1llvm/lib/Target/X86/X86ISelLowering.cpp
+99-1056 files

LLVM/project 740f199llvm/lib/CodeGen/SelectionDAG LegalizeVectorTypes.cpp LegalizeTypes.h, llvm/test/CodeGen/X86 atomic-load-store.ll

[SelectionDAG] Widen <2 x T> vector types for atomic store

Vector types of 2 elements must be widened. This change does this
for vector types of atomic store in SelectionDAG so that it can
translate aligned vectors of >1 size.
DeltaFile
+198-0llvm/test/CodeGen/X86/atomic-load-store.ll
+56-0llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+255-03 files

LLVM/project 7027fd5mlir/docs PrivateNameObfuscation.md, mlir/include/mlir/TableGen PrivateName.h

strip op and pass names
DeltaFile
+164-0mlir/test/mlir-tblgen/private-name-obfuscation.td
+151-0mlir/docs/PrivateNameObfuscation.md
+144-0mlir/lib/TableGen/PrivateName.cpp
+75-0mlir/test/mlir-tblgen/private-pass-strip.td
+55-13mlir/tools/mlir-tblgen/PassGen.cpp
+68-0mlir/include/mlir/TableGen/PrivateName.h
+657-1320 files not shown
+890-3426 files

LLVM/project b527137mlir/docs PrivateNameObfuscation.md, mlir/include/mlir/TableGen PrivateName.h

strip op and pass names
DeltaFile
+144-0mlir/lib/TableGen/PrivateName.cpp
+125-0mlir/docs/PrivateNameObfuscation.md
+75-0mlir/test/mlir-tblgen/private-pass-strip.td
+74-0mlir/test/mlir-tblgen/private-name-obfuscation.td
+55-13mlir/tools/mlir-tblgen/PassGen.cpp
+68-0mlir/include/mlir/TableGen/PrivateName.h
+541-1320 files not shown
+758-3326 files