LLVM/project b6cad62llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU gfx1250_dasm_lit64_err.txt

[AMDGPU][MC] Check lit64 availability because decode

Fixes #214953.
DeltaFile
+30-0llvm/test/MC/Disassembler/AMDGPU/gfx1250_dasm_lit64_err.txt
+7-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+37-02 files

LLVM/project 35193c2.github/workflows release-tasks.yml

Fix
DeltaFile
+1-1.github/workflows/release-tasks.yml
+1-11 files

LLVM/project 92a8705llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp AMDGPUBaseInfo.h

[AMDGPU][MC] Check availability of certain registers

Fixes #214952.
DeltaFile
+33-26llvm/test/MC/AMDGPU/literals.s
+40-11llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+30-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+14-1llvm/test/MC/AMDGPU/gfx1250_asm_operands.s
+6-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+5-0llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+128-381 files not shown
+130-397 files

LLVM/project 1b2490b.github/workflows release-tasks.yml

release-tasks: Disable lit publishing for release candidates

There is no rc in the lit version string, so release candiates
get published using the non-rc version number.
DeltaFile
+1-0.github/workflows/release-tasks.yml
+1-01 files

LLVM/project 86a69b3llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.cpp, llvm/test/MC/Disassembler/AMDGPU decode-err.txt

[AMDGPU] Fix a decoder crash in disassembler

Fixes #214915.
DeltaFile
+10-0llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
+2-1llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+12-12 files

LLVM/project af83c91clang/test/Driver amdgpu-assembler-xnack-sramecc.s, llvm/include/llvm/TargetParser AMDGPUTargetParser.h

maintain cc1 behavior
DeltaFile
+24-29clang/test/Driver/amdgpu-assembler-xnack-sramecc.s
+44-8llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+5-19llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+8-0llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+81-564 files

LLVM/project f249d87llvm/lib/Target/AMDGPU/Disassembler AMDGPUDisassembler.h AMDGPUDisassembler.cpp, llvm/test/tools/llvm-objdump/ELF/AMDGPU kd-gfx12.s kd-gfx11.s

AMDGPU: Only disassemble .amdhsa_reserve_xnack_mask on xnack targets

The disassembler unconditionally printed .amdhsa_reserve_xnack_mask when
emitting a kernel descriptor. Targets that do not support xnack have no
xnack mask to reserve, and the assembler streamer already only emits the
directive when the subtarget supports xnack. Match that behavior in the
disassembler so the round-trip is consistent and gfx11/gfx12 descriptors
no longer carry a spurious directive.

As a guard against a malformed binary, if the object's ELF e_flags
erroneously select xnack "on" for a target that does not support xnack,
still print the directive so the invalid state remains visible in the
disassembly rather than being silently dropped.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+55-0llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-xnack-unsupported-eflags.yaml
+10-4llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
+0-4llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx11.s
+3-0llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
+0-2llvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-gfx12.s
+68-105 files

LLVM/project 884e8f6clang/test/Driver amdgpu-assembler-xnack-sramecc.s, lld/test/ELF amdgpu-tid.s

AMDGPU: Remove xnack and sramecc subtarget features

Now that these are controlled by module flags, the subtarget
features were just used for assembler and disassembler controls.
Now that the assembler and disassembler can infer these from
the e_flags and target directives, they are no longer necessary.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+26-70llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+38-24llvm/test/MC/AMDGPU/amdgcn-target-directive-conflict.s
+44-14llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
+29-24clang/test/Driver/amdgpu-assembler-xnack-sramecc.s
+30-14lld/test/ELF/amdgpu-tid.s
+29-8llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+196-15423 files not shown
+316-26229 files

LLVM/project 35854f8compiler-rt/test/profile instrprof-coroutine-profile.cpp, compiler-rt/test/profile/Inputs mock-coroutine.h

[compiler-rt][pgo] Use mock coroutine header in instrprof-coroutine-profile.cpp (#214593)
DeltaFile
+114-0compiler-rt/test/profile/Inputs/mock-coroutine.h
+1-1compiler-rt/test/profile/instrprof-coroutine-profile.cpp
+115-12 files

LLVM/project 6c9a513. 2

2

Change-Id: I97cdda01c130435eff88c76d1d6a00885f5a0274
DeltaFile
+5-02
+5-01 files

LLVM/project 5506a9aclang/lib/Basic/Targets AMDGPU.cpp

clang/AMDGPU: Mark more capability target features read-only (#214954)

Really all amdgpu subtarget features should be read-only, except
for a handful of legitimately configurable modes which should be moved
out of subtarget features. Add a few special cases here which will help
unblock progressing towards using the new generated feature bitset.
DeltaFile
+3-1clang/lib/Basic/Targets/AMDGPU.cpp
+3-11 files

LLVM/project 4e27428clang-tools-extra/clang-tidy/bugprone StdNamespaceModificationCheck.cpp, clang-tools-extra/docs ReleaseNotes.md

[clang-tidy] Fix a crash in bugprone-std-namespace-modification (#214704)

Check the namespaces of template argument types directly from their
declarations. This avoids querying the AST parent map (since it may not
contain lambda closure types) and fixes the crash.

Fixes #213981
DeltaFile
+16-2clang-tools-extra/clang-tidy/bugprone/StdNamespaceModificationCheck.cpp
+10-0clang-tools-extra/test/clang-tidy/checkers/bugprone/std-namespace-modification-no-crash.cpp
+4-1clang-tools-extra/docs/ReleaseNotes.md
+30-33 files

LLVM/project c845a70clang/lib/StaticAnalyzer/Checkers DanglingPtrDeref.cpp

[analyzer] Add aggregate lifetime source binding to DanglingPtrDeref
DeltaFile
+8-0clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
+8-01 files

LLVM/project d7a3105clang/lib/StaticAnalyzer/Checkers LifetimeModeling.cpp, clang/test/Analysis lifetime-bound.cpp

[analyzer] Only bind aggregate lifetime sources in LifetimeModeling for annotated functions
DeltaFile
+32-0clang/test/Analysis/lifetime-bound.cpp
+17-4clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
+49-42 files

LLVM/project 62d4f3cclang/lib/StaticAnalyzer/Checkers LifetimeModeling.h LifetimeModeling.cpp, clang/test/Analysis lifetime-bound.cpp

Address review comments.
DeltaFile
+54-30clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
+27-12clang/test/Analysis/lifetime-bound.cpp
+2-2clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
+83-443 files

LLVM/project c7ad682llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fshr.ll fshl.ll

Merge branch 'users/aokblast/lldb/fix_auxilary_handle' into users/aokblast/lldb/mmap_fix_for_reexport
DeltaFile
+5,162-5,142llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+4,767-4,791llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+4,321-4,345llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+3,572-3,745llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+3,314-3,041llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+3,245-2,737llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+24,381-23,801437 files not shown
+57,494-46,240443 files

LLVM/project a3dac80llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel fshr.ll fshl.ll

Merge branch 'main' into users/aokblast/lldb/fix_auxilary_handle
DeltaFile
+5,162-5,142llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+4,767-4,791llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+4,321-4,345llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+3,572-3,745llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
+3,314-3,041llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+3,245-2,737llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+24,381-23,801437 files not shown
+57,494-46,240443 files

LLVM/project 117faf0clang/lib/Basic/Targets AMDGPU.cpp

clang/AMDGPU: Mark more capability target features read-only

Really all amdgpu subtarget features should be read-only, except
for a handful of legitimately configurable modes which should be moved
out of subtarget features. Add a few special cases here which will help
unblock progressing towards using the new generated feature bitset.
DeltaFile
+3-1clang/lib/Basic/Targets/AMDGPU.cpp
+3-11 files

LLVM/project d2bd3fbllvm/include/llvm/IR RuntimeLibcalls.h RuntimeLibcalls.td, llvm/lib/IR RuntimeLibcalls.cpp

RuntimeLibcalls: Only provide fp128 long double libcalls when long double is fp128

The l-suffixed long double math functions (e.g, acosl, sqrtl, ...) are fp128 only
when the target's long double is fp128. The default set provided them on every
target that was not x87 or ppc_fp128, so targets using double as long
double wrongly reported the fp128 l-suffixed functions.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+22-3llvm/include/llvm/IR/RuntimeLibcalls.td
+10-6llvm/lib/IR/RuntimeLibcalls.cpp
+4-2llvm/include/llvm/IR/RuntimeLibcalls.h
+1-1llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+1-1llvm/test/TableGen/RuntimeLibcallEmitter.td
+1-1llvm/test/TableGen/RuntimeLibcallEmitter-calling-conv.td
+39-146 files

LLVM/project 5e30da9lldb/source/Plugins/LanguageRuntime/CPlusPlus CommonABIRuntime.h

[lldb] Remove duplicate declarations after merge (#214949)

I'm not sure why Git decided to add two duplicate declarations when
merging #212015, but this removes the duplicate ones.
DeltaFile
+0-5lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.h
+0-51 files

LLVM/project 6685d79lldb/source/Plugins/LanguageRuntime/CPlusPlus CPPLanguageRuntime.h ItaniumABIRuntime.cpp

[lldb] Allow multiple ABI runtimes for C++ (#212015)

This allows `CPPLanguageRuntime` to contain more than one ABI runtime.
For dynamic types, we ask each runtime if it knows how to deal with a
vtable symbol. For exception breakpoints, we will create all
breakpoints. Note that the MS ABI will only be added on Windows targets.
So the MS ABI will not be added to `m_abi_runtimes` on other targets.
DeltaFile
+36-16lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.cpp
+31-0lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.h
+8-6lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.h
+5-2lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
+3-2lldb/source/Plugins/LanguageRuntime/CPlusPlus/CPPLanguageRuntime.h
+83-265 files

LLVM/project b9d5b85clang/docs/CIR index.md

[clang][CIR][docs] Fix invalid MyST toctree 'numbered' option (#213898)

Similar to #207217

The RST-to-Markdown migration (#206181) converted the RST flag
`:numbered:` into `:numbered: true`.

MyST parses the toctree `numbered` option as `int_or_nothing`, so the
string `true` fails with:

```
'toctree': Invalid option value for 'numbered': true:
invalid literal for int() with base 10: 'true'
```

This breaks the `-W` (warnings-as-errors) `docs-clang-html` build. Make
`numbered` a valueless flag, which MyST accepts (equivalent to the
original RST behavior of numbering all levels).
DeltaFile
+1-1clang/docs/CIR/index.md
+1-11 files

LLVM/project 9ee9cedllvm/unittests/IR ModuleTest.cpp

drop unit test
DeltaFile
+0-24llvm/unittests/IR/ModuleTest.cpp
+0-241 files

LLVM/project ecfb690clang/lib/CodeGen CodeGenModule.cpp

Use helper in clang
DeltaFile
+2-6clang/lib/CodeGen/CodeGenModule.cpp
+2-61 files

LLVM/project e4b9301lldb/source/Plugins/LanguageRuntime/CPlusPlus ItaniumABIRuntime.h CommonABIRuntime.h

[lldb] Move dynamic type cache to common ABI runtime (#212014)

Both the Itanium and the MS ABI want some cache for dynamic types. This
moves the functionality from the Itanium ABI to the base class.
DeltaFile
+0-16lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.cpp
+16-0lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.cpp
+11-0lldb/source/Plugins/LanguageRuntime/CPlusPlus/CommonABIRuntime.h
+0-9lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABIRuntime.h
+27-254 files

LLVM/project e416b09llvm/lib/IR Instructions.cpp

[IR] Set Number of Hungoff Uses after allocation (#213304)

If allocation of the Use[] in allocHungoffUses fails (e.g. due to OOM),
it may happen that the destructor of User is called with NumUserOperands
> 0. Then `Use::zap` tries to destruct Uses that were not constructed in
the first place.

Example scenario for SwitchInst:
`SwitchInst::init()` is called, which means the constructor of the
parent class User went through successfully, which means the destructor
of User will be called eventually. If now `SwitchInst::init()` calls
first `setNumHungOffUseOperands(2)` and then `allocHungoffUses()` and
the allocation there fails, `~User()` is called and tries to destruct 2
Uses, which can lead to problems.

This patch consequently ensures that first the allocation happens and
then NumUserOperands is set accordingly, so that this problem is
prevented.
DeltaFile
+8-8llvm/lib/IR/Instructions.cpp
+8-81 files

LLVM/project 21bcdabllvm/test/Analysis/CostModel/X86 reduce-xor.ll reduce-or.ll, llvm/test/Transforms/PhaseOrdering/X86 avg.ll

[CostModel][X86] Update logic vector reduction costs to match llvm-mca estimates (#214191)

Replaces the olds costs which were just instruction counts

Still working on the bool reduction costs - these will be handled in a followup
DeltaFile
+146-155llvm/test/Transforms/VectorCombine/X86/fold-signbit-reduction-cmp.ll
+102-84llvm/test/Analysis/CostModel/X86/reduce-xor.ll
+102-84llvm/test/Analysis/CostModel/X86/reduce-or.ll
+102-84llvm/test/Analysis/CostModel/X86/reduce-and.ll
+34-122llvm/test/Transforms/PhaseOrdering/X86/avg.ll
+69-57llvm/test/Transforms/VectorCombine/X86/fold-reduction-zero-test.ll
+555-58610 files not shown
+731-73216 files

LLVM/project bc529d7libc/test/src/__support/FPUtil float80_test.cpp

clang-format
DeltaFile
+1-4libc/test/src/__support/FPUtil/float80_test.cpp
+1-41 files

LLVM/project acc96e6libc/test/src/__support/FPUtil float80_test.cpp

add edge cases test
DeltaFile
+39-1libc/test/src/__support/FPUtil/float80_test.cpp
+39-11 files

LLVM/project 1838717llvm/include/llvm/IR IntrinsicsNVVM.td, llvm/lib/IR AutoUpgrade.cpp

[NVPTX] Add Rubin extensions to tcgen05.commit (#211577)

The Rubin architecture extends `tcgen05.commit` operations with two
additional features: support for 32-bit CTA multicast masks and the
ability to track completion of Matrix A reads from shared memory for all
prior `tcgen05.mma` operations.

This change adds support for these features to the `tcgen05.commit`
intrinsics. In addition, it also replaces generic/shared variants with
overloaded intrinsics.
DeltaFile
+438-0llvm/test/CodeGen/NVPTX/tcgen05-commit-sm107.ll
+31-12llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
+35-0llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
+35-0llvm/lib/IR/AutoUpgrade.cpp
+16-16llvm/test/CodeGen/NVPTX/tcgen05-commit.ll
+10-18llvm/include/llvm/IR/IntrinsicsNVVM.td
+565-465 files not shown
+600-7211 files