[M68k] Fix Instruction Verifier errors related to `MOVEM` and `PHI` lowering (#219011)
This fixes some errors reported by the Instruction Verifier when
building with `-verify-machineinstrs`.
- The `MOVM` pseudos are given an 8-bit variant so that the IV can
correctly see 8-bit physical registers being defined/used. Without this,
8-bit register spills fail IV by attempting to load/store an undefined
physical register (the 16-bit superclass of the 8-bit register). Codegen
is not affected by this change.
- During `CollapseMOVEMPass`, the implicit ops are now copied over from
the old deleted instructions into the new combined instruction. This
fixes IV failing in cases where an instruction wants to use registers
that were defined by the collapsed `MOVEM`. Codegen is not affected by
this change.
- CCR is now marked as non-allocatable (which is true anyway). The
custom inserter for `CMOV` (`emitLoweredSelect()`) has logic where CCR
is added as a live-in for the newly-created blocks that are expected to
use it. This would cause IV to fail, because IV doesn't allow non-entry
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workflow/release-binaries: Hard-code Wix install path (#219328)
Searching for the candle.exe executable is very slow and we know the
install path will always be the same since we have version pinned the
install.
[LV] Remove dead attachRuntimeChecks call for the epilogue plan (NFC). (#219575)
The runtime check blocks are attached to the main plan, and executing it
gives them predecessors in the generated IR. attachRuntimeChecks only
attaches check blocks without predecessors, so the call for the epilogue
plan never does anything. Remove it.
[CIR][NFC] Add tests for Vector of bool in GV, Shuffle (#218135)
Add extra tests for a vector of booleans in the global variable with
zero attr, shuffle, and dynamic shuffle
[AMDGPU] Code clean up and denorm check removal for bf16 omod folding (#219042)
This is the follow-up PR to address the additional comments and
suggestions from https://github.com/llvm/llvm-project/pull/218286
Use FP64FP16Denormals to check the output denomal flushing because
BF16 is usig the default.
Also clean up the surrounding code:
- src0_modifiers/src1_modifiers are always present on these packed
opcodes (VOP3P_Profile sets HasModifiers), so drop the null checks and
dereference the operands directly.
- Fix the comment on the modifier check: rather than "modifiers other
than op_sel_hi block folding", the point is that when omod is applied to
a packed instruction it only applies to the low half of the input and
output.
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[flang][OpenMP] Track reachable metadirective paths
Semantic checks currently consider each statically applicable replacement
independently. This can diagnose lower-ranked replacements that selection can
never reach. It also prevents nested construct selectors from observing
directives selected by enclosing metadirectives.
Consider an enclosing dynamic metadirective and a nested selector:
```text
outer: when(flag: target) default(parallel)
inner: when(construct={parallel}: simd) default(nothing)
```
The enclosing selection creates mutually exclusive effective paths:
```text
enclosing metadirective
/ \
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[lldb] Fix ProcessProperties reading the wrong experimental collection (#218939)
`ePropertyExperimental` was defined as one past the last generated
process
property, on the assumption that "experimental" is appended next.
lldb/source/Target/Process.cpp:
```
enum {
#define LLDB_PROPERTIES_process
#include "TargetPropertiesEnum.inc" // 0..20
ePropertyExperimental, // 21
};
```
However, the global collection appends "thread" first in
`ProcessProperties::ProcessProperties`,
```
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[CIR] Layout _BitInt types in record/array in CIR as it is in LLVM-IR (#219487)
I've worked through this quite a bit, and spent some time working on
seeing if I could do this during LowerToLLVM, however this causes a ton
of complication, as this level of change affects basically every
member-access invariant that we have. Additionally, we have prior art
(bool -> 8 bits, FP80 -> 128 bits), that I think it makes sense at least
to 'put it with the rest'.
The problem is that the 'i' types for bitint(which they are lowered to)
don't match alignment-wise to the BitInt types. As a result, unless we
do a bunch of transformations to change the struct/array/etc types (plus
the get-member/initialization, etc stuff this entails), we're going
to be reprensenting these types incorrectly. We have prior art for this
as well, particularly around zero-length bitfields (which we represent
as a field in the LLVM-IR to prevent the above conflicts).
This patch does this layout at the CIR level, which gives us layout
parity to LLVM-IR, as well as making sure we represent things correctly
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[CIR] Skip ABI classification for an incomplete-record declaration (#218786)
A `cir.func` declaration whose signature carries an incomplete record by
value caused the pass to fail the whole module.
C++ requires a complete type at any call or definition, so only a
declaration can carry this shape, and no translation unit anywhere can
ever call or define it with real argument data. Classic CodeGen skips
full ABI lowering rather than attempting one. We now leave such a
declaration unclassified and match classic.
Assisted-by: Cursor / claude-opus-5
[PowerPC] Update MIR syntax for INSERT_SUBREG in tests (#219523)
Use names instead of numbers for the subreg index operands in
INSERT_SUBREG instructions.
[PowerPC] Remove assumptions about subreg index values. NFC. (#219524)
Use subreg index names instead of hard coded values in a few places in
the backend.
[SROA] Reject illegal vector memset promotion (#216772)
SROA can select vector promotion for an `alloca` partition containing a
memset and vector accesses whose element type is an unstable pointer.
We discovered this while building Julia with LLVM 21 and assertions
enabled. SROA crashed in `convertValue` because `canConvertValue`
rejected converting an integer splat to a non-integral pointer:
```
Assertion `canConvertValue(DL, OldTy, NewTy, VScale) &&
"Value not convertable to type"' failed.
```
Current main no longer asserts because `convertValue` was replaced by
`CreateBitPreservingCastChain`. However, the underlying unsupported
transformation remains.
For example:
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[CIR] Drop call-conv-lowering opt-out from coro-task.cpp (#218990)
coro-task.cpp opted out of CallConvLowering because the pass did not
handle parameters of an empty or tag class. CallConvLowering handles
them now, so the test can run the pass and pin what it produces.
complex_co_await has one non-empty value in the modified CHECK lines. We
now lower complex correctly as well.
Assisted-by: Cursor / claude-opus-5
[AMDGPU][NFC] Unify getImmOrMaterializedImm and getFoldableImm (#219522)
`getImmOrMaterializedImm` and `getFoldableImm` both determine if an
operand has a constant value. Make a unified implementation that
supports the interfaces of both using the `getImmOrMaterializedImm`
name.
Signed-off-by: John Lu <John.Lu at amd.com>
[AMDGPU] Add the 3-dword image_gather4 variant for packed D16 + TFE (#215972)
MIMG_Gather only defined V2/V4/V5 destination-dword variants, so a d16
gather4 with tfe (which needs 3 dwords on packed-D16 targets) hit
"Cannot select" on gfx10+
[RISCV] Move combineANDOfSETCCToCZERO to isel patterns. (#219318)
This allows us to reuse RISCVDAGToDAGISel::selectSETCC to pick
the best instruction when comparing against a constant.
[lldb] Fix SBAPI breakage in SBFrame::GetValueForVariablePath (#218565)
SBFrame::GetValueForVariablePath added new parameters in commit
80fffd527c20ac8970fbffc37c674caa17faa815.
This caused an ABI break because
the ABI is based on the function's mangled name, which changes when
parameters are added. Existing users depend on the original symbol being
present in the library.
changing the ABI from:
```cpp
// _ZN4lldb7SBFrame23GetValueForVariablePathEPKcNS_16DynamicValueTypeE
lldb::SBFrame::GetValueForVariablePath(char const*, lldb::DynamicValueType)
```
to
```cpp
// _ZN4lldb7SBFrame23GetValueForVariablePathEPKcNS_16DynamicValueTypeENS_7DILModeE`
lldb::SBFrame::GetValueForVariablePath(char const*, lldb::DynamicValueType, lldb::DILMode)
```
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[clang-format] Add BraceWrapping.AfterRequiresExpression option (#216465)
Thir PR adds a `BraceWrapping.AfterRequiresExpression` sub-option that
wraps the opening brace of requires expressions, and enable it in the
`Allman`, `Whitesmiths`, and `GNU` presets of `BreakBeforeBraces`.
The brace is only wrapped if the requires expression doesn't fit on a
single line, matching the behavior of `BeforeLambdaBody`. The wrapped
brace is aligned with its closing brace:
```cpp
template <typename T>
concept Uart = requires(T a)
{
{ a.write() } -> std::convertible_to<std::size_t>;
a.flush();
};
```
Closes: #202901
[llvm] Change the implementation of isValidFeatureListFormat (#219266)
This is mostly to change the function-local static variable because some
programs are having static initialization order problems. Also the
coding standard states statics with ctor/dtor should be avoided. The new
implementation also does not use Regex anymore.
