[VPlan] Generalize folding IV increment into phi start value (NFC). (#223260)
simplifyRecipe folds
X = phi(0, IVInc)
IVInc = X + Step
Def = IVInc + Y
into a phi starting at Y, but only if Y is a live-in. Also allow values
defined in the block the phi's start value is coming from, which is
where the value conservatively has to be available.
NFC today, but preparation for modeling the full epilogue skeleton in
VPlan.
[IR] Move the LLVMContext out of ReplaceableMetadataImpl. NFC (#222085)
No ReplaceableMetadataImpl method reads its LLVMContext reference, and
ValueAsMetadata reaches the context through the wrapped Value. Keep the
reference in a derived ReplaceableUsesWithContext, used by the two
owners with no other route to it: MDNode's on-demand RAUW support and
DIArgList.
Rename the base to ReplaceableUses: it is the use map behind RAUW for
the metadata kinds that support it, not a pimpl, and the name matches
ContextAndReplaceableUses and getReplaceableUses().
Make the base destructor protected, since getOrCreate() hands out
ReplaceableUses pointers that must never be deleted. Delete copy
assignment explicitly; the LLVMContext reference suppresses it
implicitly.
sizeof(ValueAsMetadata) 152 -> 144.
Aided by Opus 5
[ConstraintElim] Derive an unsigned IV bound from a signed relational latch. (#222762)
For a known non-negative backedge (either via isKnownNonNegative or
because the increment is increasing), 0 <=s PN <= B holds and implies
that B is non-negative as well.
Use that to translate a signed condition to the equivalent unsigned one.
Note that the general signed->unsigned rewrite cannot catch this,
because the precondition also needs rewriting to unsigned.
No llvm-opt-benchmark-nightly impact, but it can help remove runtime
checks generated by sanitizers or Swift code. An end-to-end C example is
https://clang.godbolt.org/z/vbd91MjaM.
Alive2 Proof: https://alive2.llvm.org/ce/z/G3Mv7t
PR: https://github.com/llvm/llvm-project/pull/222762
[mlir][vector] Don't fold in_bounds for negative constant indices (#219681)
`isInBounds` checked only that the transfer *ends* inside the source:
return cstOp.value() + vectorSize <= sourceSize;
The `in_bounds` attribute promises more than that. Its definition in
VectorOps.td says accesses "(including the starting point)" may run
out-of-bounds when it is "false", so setting it to "true" is a claim
about the start of the transfer as well as its end.
With a negative constant index the two disagree. For
vector.transfer_read %m[-1] : memref<8xf32>, vector<4xf32>
`-1 + 4 <= 8` holds, so the fold set `in_bounds = [true]`, even though
element -1 is read from outside `%m`.
The same expression also overflows for a large enough index: at `index =
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[ASan] Convert pointer-pair operands based on type (#218494)
`CreatePointerCast` was being called on everything without checking what
it actually is, so if the operand came from ptrtoint ... to i32 it just
crashes (its not a pointer).
now it check the type first - pointers get pointer-cast, ints get
zext/trunc'd to intptr width.
Fixes #217544
also edited regression tests for this
[Mips] Handle division by zero trap on MIPS1 (#201133)
LLVM currently emits the `teq` instruction for every arch version, but
`teq` is unsupported on MIPS1.
This special cases MIPS1 so that `bne(z)` and `break` are emitted
instead.
Compared to https://github.com/llvm/llvm-project/pull/81311, this should
also handle liveness as far as I can tell.
I didn't want to add another bool to the argument list so I combined
`IsMicroMips` and what was supposed to be `IsMips1` into an enum, which
feels much nicer in this case.
Besides that and the main change, I also changed the `hasSideEffects`
bit for `PseudoSDIV` and `PseudoUDIV`,
which allows the delay slot to be usefully filled - well, at least with
`-O1`+. This seems to be in line with what GCC does:
https://godbolt.org/z/zqcG5ha35
Tested using clang directly and through Zig's LLVM backend.
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[AMDGPU] Fix MAI hazard scan missing 19-instruction-old hazards (#222040)
The scan only looked back 19 instructions, but gfx950 can need a gap of
20 after some MFMAs
A hazard exactly 19 instructions back was missed, so no wait was
inserted
[clang][SPIR-V][AMDGPU] Fix variadic aggregate ABI classification for AMDGCN (#216326)
Mirror AMDGPUABIInfo fixed/variadic split
AMDGCNSPIRVABIInfo::classifyArgumentType did not distinguish fixed from
variadic arguments, so aggregates passed through `...` were
misclassified as indirect byref instead of direct
[MIRParser] Reject a one-element fixed-length vector type (#213290)
MIParser accepts `<1 x sN>` and then asserts while building the LLT, so
llc aborts during parsing instead of reporting a parse error:
```
Assertion `!EC.isScalar() && "invalid number of vector elements"' failed.
```
LLT has no one-element fixed-length vector. `getLLTForType`,
`getLLTForMVT` and
`LLT::changeElementCount` all map a one-element `ElementCount` to the
element
type through `LLT::scalarOrVector`, nothing calls `LLT::fixed_vector(1,
...)`,
and no in-tree .mir test uses the syntax. `verifyVectorElementCount`
already rejects 0 and anything above 2^16, so 1 was the remaining hole; it now
gets the same diagnostic instead of aborting the parser.
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[AggressiveInstCombine] Fix terminology in a few comments (NFC) (#222327)
Fix the comments (and a debug print) that say "dominated by trunc"
rather than "post-dominated".
Also fixes a Doxygen syntax (use \p instead of /p) and fix
capitalization in the middle of a sentence.
[ConstraintElim] Fold sadd.with.overflow with a constant op. (#223239)
Generalize the overflow-math simplification to also allow simplifying
sadd.with.overflow if the second operand is constant, using
makeGuaranteedNoWrapRegion.
Note that this partially overlaps with the flag strengthening logic.
I'll share a patch soon to try to unify the code more.
No improvements in llvm-opt-benchmarks-nightly. It improves end-to-end
optimizations for Swift (which emits a lot of checked arithmetic) and
also Clang + UBsan.
An end-to-end improvement with overflow intrinsics is
https://llvm.godbolt.org/z/6nrj7aodd.
PR: https://github.com/llvm/llvm-project/pull/223239
RegisterCoalescer: Remove empty subranges after merging subranges (#222050)
Merging subranges in joinVirtRegs didn't try to clear empty ranges after
refineSubRanges, manifesting in an assert in overlaps checks later.
Exposed with subregister liveness once LiveIntervals runs before
TwoAddress.
Co-authored-by: Claude (Claude-Opus-4.8)
[KnownFPClass] Unify and refine interested classes for `KnownFPClass::log` (#219751)
Previously, `ValueTracking` and `GISelValueTracking` only called
`KnownFPClass::log` when the requested classes included NaN or infinity.
As a result, narrowly interested queries could miss unconditional
deductions, for example, `log(x)` is never subnormal or negative zero
(With the exception of `PPCDoubleDouble`
https://github.com/llvm/llvm-project/issues/217658).
This change makes the interested-class handling consistent between
`ValueTracking` and `GISelValueTracking`. The source is queried only
when its classes are needed, but `KnownFPClass::log` is always called so
its unconditional deductions are preserved.
Future work:
- Fixing `KnownFPClass::log` for `PPCDoubleDouble`.
AI disclosure:
I used OpenAI Codex (sol 5.6) to help write the unit tests, which I
reviewed and ran locally.
[SLP]Model copyable lanes of idempotent binops as op(V, V) when the operand column has a constant lane
The op(V, identity) form lets the reorder move the lane out of the
joined column, breaking the opcode-peer node; the symmetric form is
reorder-proof.
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/220252
[SLP]Reduce logical and/or reductions in the wide leaf type
Logical and/or reductions on i1 with booleanized wide leaves (truncs
of same-op chains, zero-tests of values from [0, 1]) are performed in
the wide type, exposing the underlying consecutive values to the tree;
bit 0 of the result is the final value. Fixes the fragmented reduction
and the gather-of-scalars regression for compile-time-expanded Boolean
reductions.
Fixes #221167
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/221321
[NFC][ModuleUtils] Move externalize() from module splitting utilities (#221181)
`SplitModule.cpp` and `AMDGPUSplitModule.cpp` each carry an identical
static `externalize()` helper that promotes local-linkage globals to
external + hidden visibility and assigns a stable name to unnamed
entities, so they are named consistently across module partitions.
This patch removes the duplication by moving the helper into
`ModuleUtils` as `llvm::externalize`, and updates both users to call the
shared implementation. No functional changes are intended.
This also prepares for upcoming module splitting utilities to reuse a
single, canonical implementation.
Development of this patch was assisted by AI and reviewed by me.
[OpenMP] Add definitions for REDUCTION_KIND and SHIFT clauses (#222745)
This is a barebones change to introduce the enum identifiers for these
clauses.
[OpenMP] Change association of some directives from "none" to "explicit" (#222703)
Certain declarative directives are associated with base language
declarations by having the declared entities explicitly listed as
arguments.
Previously these had "none" in OMP.td. Change them to "explicit" to be
consistent with the spec. The existing code does not require any
changes, since the only potentially affected code would be that which
checked the assocation for "none", and the only such cases were applied
to executable directives.
[SelectionDAG] Remove unused float promotion in DAGTypeLegalizer (NFC) (#223219)
This patch removes PromotedFloats along with GetPromotedFloat and
SetPromotedFloat. The Mapped bitmask in PerformExpensiveChecks is
adjusted accordingly, shifting the bit for SoftPromotedHalfs.
The last uses of DAGTypeLegalizer::GetPromotedFloat and
DAGTypeLegalizer::SetPromotedFloat were removed on January 26, 2026 in
commit a7d48bd305ef3aa4bd543da6f4cd8682a3d35c32 when TypePromoteFloat
and its associated DAG machinery were removed.
With these accessors gone, DAGTypeLegalizer::PromotedFloats is no longer
populated.
Assisted-by: Antigravity