LLVM/project 12d319ellvm/test/Transforms/WholeProgramDevirt virtual-const-prop-end.ll virtual-const-prop-check.ll

[WPD] Use getGetElementPtr() overload accepting DataLayout (#225754)

To produce constant GEPs in canonical ptradd form.
DeltaFile
+8-8llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
+8-8llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
+6-6llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
+6-6llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
+6-6llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
+4-4llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
+38-381 files not shown
+42-427 files

LLVM/project decb0eellvm/test/TableGen RegisterInfoEmitter-noncovered-subreg-lanemask.td, llvm/utils/TableGen/Common CodeGenRegisters.cpp

[TableGen] Handle the non-`CoveredBySubRegs` case in `computeRegUnitLaneMasks` (#223653)

Currently `computeRegUnitLaneMasks` ignores non-leaf subregisters as
"their lane masks are fully covered by the leaf subregisters". However
this only holds when `CoveredBySubRegs` is set to true. Otherwise it
causes subregisters with `CoveredBySubRegs` set to false to have missing
lanes.

For example removing `hi16` from SGPR in AMDGPU causes `sub1` to have a
lane mask of `0x8`, which is equal to `sub1_lo16`, whereas the correct
mask should be `0xC` as although `hi16` is not addressable `sub1` covers
both halves.

This patch adds a logic that identifies unclaimed lanes and backfills
them into appropriate subregister units.

Assisted-by: Claude Code
DeltaFile
+71-0llvm/test/TableGen/RegisterInfoEmitter-noncovered-subreg-lanemask.td
+28-1llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+99-12 files

LLVM/project 3c63fcblibcxx/src std_stream.h, libcxx/test/libcxx/input.output/iostream.objects cin-read-stdio-sync.sh.cpp

[libcxx] Speed up xsgetn for always_noconv (#212010)
DeltaFile
+102-0libcxx/test/libcxx/input.output/iostream.objects/cin-read-stdio-sync.sh.cpp
+21-0libcxx/src/std_stream.h
+123-02 files

LLVM/project a5bc26fmlir/lib/Conversion/MemRefToSPIRV MemRefToSPIRV.cpp, mlir/test/Conversion/MemRefToSPIRV atomic.mlir

[mlir][SPIR-V] Support atomic_rmw xori in MemRefToSPIRV (#213204)
DeltaFile
+10-0mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
+1-0mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
+11-02 files

LLVM/project e7e7fcbmlir/include/mlir/IR BuiltinDialect.td BuiltinOps.td, mlir/test/IR module-op.mlir

[mlir] Enable strict assembly properties for the builtin dialect

Print ModuleOp visibility in the property dictionary and retain its
separate discardable attribute dictionary. Update affected assembly tests.

Assisted-by: Codex
DeltaFile
+6-0mlir/test/IR/module-op.mlir
+2-2mlir/test/Transforms/test-symbol-dce.mlir
+1-1mlir/test/python/dialects/ml_program.py
+1-1mlir/test/Transforms/sccp-callgraph.mlir
+1-1mlir/include/mlir/IR/BuiltinOps.td
+1-0mlir/include/mlir/IR/BuiltinDialect.td
+12-56 files

LLVM/project c6155a5llvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-vector-repeat.ll

Change lowering for 64b vector_repeats

This avoids VECTOR_CONCAT and directly exposes a d -> z.d splat
DeltaFile
+4-8llvm/test/CodeGen/AArch64/sve-vector-repeat.ll
+5-6llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+9-142 files

LLVM/project bbde247llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp LegalizeVectorTypes.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp

Address comments and restore newline
DeltaFile
+8-0llvm/test/Verifier/vector-repeat-intrinsic-valid.ll
+0-6llvm/test/Verifier/vector-repeat-intrinsic.ll
+1-5llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
+1-2llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+1-1llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+0-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+11-152 files not shown
+12-168 files

LLVM/project 4b7523dllvm/include/llvm/ADT APInt.h, llvm/include/llvm/IR DebugProgramInstruction.h

[llvm][NFC] Fix extra semicolon warnings (#224317)

Found while cleaning up additional warnings enabled for libsycl.
DeltaFile
+3-3llvm/include/llvm/IR/DebugProgramInstruction.h
+2-2llvm/include/llvm/ADT/APInt.h
+1-1llvm/include/llvm/Object/Binary.h
+6-63 files

LLVM/project e202f77llvm/include/llvm/Support AutoConvert.h

Fix the error on Windows.
DeltaFile
+18-4llvm/include/llvm/Support/AutoConvert.h
+18-41 files

LLVM/project 5cf984cmlir/test/Dialect/Tosa tosa-validation-version-1p0-invalid.mlir ops.mlir

[mlir][tosa] Update reverse tests for direct axis syntax (#225751)

Use the axis(...) assembly syntax in block-scaled reverse tests. This
matches the existing TOSA operation format and restores test parsing.

Fix post merge #225058 

Assisted-by: Codex
DeltaFile
+6-6mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
+4-4mlir/test/Dialect/Tosa/verifier.mlir
+2-2mlir/test/Dialect/Tosa/canonicalize.mlir
+1-1mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
+1-1mlir/test/Dialect/Tosa/ops.mlir
+1-1mlir/test/Dialect/Tosa/invalid_extension.mlir
+15-156 files

LLVM/project 3028b7fllvm/include/llvm/Transforms/Vectorize LoopVectorizationLegality.h

Add ABI visibility attribute
DeltaFile
+2-1llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
+2-11 files

LLVM/project 46aa014flang/lib/Lower Bridge.cpp, flang/test/Lower do-loop-branch-to-loop-header.f90 do_loop_unstructured.f90

[flang] Lower loops whose branching is confined to their body structurally

Such a loop was classified separately by a previous change but still
lowered as a raw CFG, so its structured form was lost.

Lower it structurally instead, with its body folded into a region that can
hold the branching. The loop keeps its bounds on the op, so it remains
available to whatever transforms or parallelizes it. Only the body is
folded: the loop control statements are emitted as they are for any
structured loop, since a branch from outside may target either of them.

Loops an OpenACC or OpenMP directive owns are lowered the same way, so
they keep their form too.
DeltaFile
+20-134flang/test/Lower/do_loop_unstructured.f90
+119-11flang/lib/Lower/Bridge.cpp
+73-0flang/test/Lower/OpenACC/acc-unstructured-internals.f90
+34-28flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
+55-0flang/test/Lower/do-loop-branch-to-loop-header.f90
+50-0flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
+351-17310 files not shown
+453-24116 files

LLVM/project e1d35e3flang/include/flang/Lower PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Detect loops whose branching is confined to their body

A DO loop is classified as either structured or unstructured, and a single
raw branch anywhere in its body forces the loop -- and every construct
enclosing it -- onto the unstructured path.

That is stronger than necessary. A loop keeps its structured control flow
as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.

This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
DeltaFile
+191-23flang/lib/Lower/PFTBuilder.cpp
+137-0flang/test/Lower/pre-fir-tree-unstructured-internals.f90
+51-6flang/include/flang/Lower/PFTBuilder.h
+9-6flang/test/Lower/trailing-cycle.f90
+388-354 files

LLVM/project 3579bb7flang/include/flang/Lower PFTDefs.h PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Record the evaluations that branch to each evaluation

The PFT records where each branch goes, but not where it comes from, so
asking whether anything branches into a construct means walking the whole
procedure.

Record the reverse edges beside the forward ones, and print them in PFT
dumps so both directions of the branch graph are visible.
DeltaFile
+68-0flang/test/Lower/pre-fir-tree-incoming-branches.f90
+20-0flang/lib/Lower/PFTBuilder.cpp
+8-8flang/test/Lower/assigned-goto-labeled-end.f90
+3-3flang/test/Lower/trailing-cycle.f90
+3-0flang/include/flang/Lower/PFTDefs.h
+3-0flang/include/flang/Lower/PFTBuilder.h
+105-111 files not shown
+106-127 files

LLVM/project 7f4790fclang/docs ConcurrencySanitizer.md, compiler-rt/lib/csan csan_report.cpp csan.cpp

[compiler-rt] Add 'csan' library for the concurrency sanitizer

Summary:
Adds the runtime for the concurrency sanitizer, both CPU and GPU.
Fundamentally, this works using the following pseudocode:

```c
static u64 watchpoints[N]; // Hash-indexed, zero is empty.

// Emitted before the access, so we never trip on our own write.
void check_access(volatile void *addr, u32 size, u32 type) {
    // Every access probes. A read conflicts only with a watched write, a
    // write conflicts with either.
    if (u64 *wp = find_watchpoint(addr, size, type))
        consume(wp, this_pc()); // Hand our location to the owner.

    if (!should_sample()) // Wave-uniform, 1-in-N chance.
        return;


    [17 lines not shown]
DeltaFile
+456-0compiler-rt/lib/csan/csan_gpu.cpp
+370-0compiler-rt/lib/csan/offload/csan_offload_hsa_interceptors.cpp
+334-0compiler-rt/lib/csan/csan.cpp
+279-0compiler-rt/lib/csan/csan_report.cpp
+212-0clang/docs/ConcurrencySanitizer.md
+184-0compiler-rt/lib/csan/offload/csan_offload_report.cpp
+1,835-052 files not shown
+3,244-558 files

LLVM/project 4435881llvm/test/CodeGen/AMDGPU finalize-isel-vadd-co-u32-dead-carry.mir

test subrev
DeltaFile
+21-0llvm/test/CodeGen/AMDGPU/finalize-isel-vadd-co-u32-dead-carry.mir
+21-01 files

LLVM/project 96384d2llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU si-instr-info-correct-implicit-operands.ll opt-sgpr-to-vgpr-copy.mir

AMDGPU: Mark dead carry-out when rewriting scalar carry op to VALU

If an operation is expanded with a dead scc def, the resultant vcc def will
also be dead, so preserve the dead flag. Reduces implicit reliance on
LiveVariables recomputing dead flags later.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+116-0llvm/test/CodeGen/AMDGPU/move-scalar-carry-to-valu-dead-vcc.mir
+18-4llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-5llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
+2-2llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
+2-2llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
+1-1llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
+144-146 files

LLVM/project 9120c13libsycl/src/detail program_manager.cpp program_manager.hpp

[libsycl][NFC] Suppress shadow warnings from LLVM headers (#225089)

The warning for a local variable shadowing a class member is enabled for
libsycl, but not LLVM as a whole. Suppress those for included LLVM
headers.
DeltaFile
+25-0libsycl/src/detail/suppress_extra_warnings.hpp
+4-0libsycl/src/detail/device_image_wrapper.hpp
+3-0libsycl/src/detail/program_manager.hpp
+2-0libsycl/src/detail/program_manager.cpp
+34-04 files

LLVM/project c21cfc8llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU si-instr-info-correct-implicit-operands.ll opt-sgpr-to-vgpr-copy.mir

AMDGPU: Mark dead carry-out when rewriting scalar carry op to VALU

If an operation is expanded with a dead scc def, the resultant vcc def will
also be dead, so preserve the dead flag. Reduces implicit reliance on
LiveVariables recomputing dead flags later.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+116-0llvm/test/CodeGen/AMDGPU/move-scalar-carry-to-valu-dead-vcc.mir
+18-4llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+5-5llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
+2-2llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
+2-2llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
+1-1llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
+144-146 files

LLVM/project f156d88llvm/lib/Transforms/Vectorize LoopVectorizationLegality.cpp LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize early_exit_store_legality.ll uncountable-single-exit-loops.ll

Address comments
DeltaFile
+44-0llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
+8-8llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
+4-4llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+2-2llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
+1-1llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
+1-1llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+60-161 files not shown
+60-177 files

LLVM/project 8e4e5f9llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU si-instr-info-correct-implicit-operands.ll change-scc-to-vcc.mir

AMDGPU: Mark dead carry-out when rewriting scalar carry op to VALU

If an operation is expanded with a dead scc def, the resultant vcc def will
also be dead, so preserve the dead flag. Reduces implicit reliance on
LiveVariables recomputing dead flags later.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+116-0llvm/test/CodeGen/AMDGPU/move-scalar-carry-to-valu-dead-vcc.mir
+11-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+2-2llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
+1-1llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
+130-34 files

LLVM/project 3c29429orc-rt/test/unit DirectCaller.h BedrockTestUtils.h, orc-rt/test/unit/bedrock SocketTestUtils.h

[orc-rt] Move test utils into orc_rt::test, drop qualification (#225733)

Move unit test helpers from the global namespace into orc_rt::test. This
makes them consistent with the newly added ErrorMatchers.h utils, and
allows us to drop the 'orc_rt::' qualification on a lot if identifiers.
DeltaFile
+13-11orc-rt/test/unit/SimplePackedSerializationTestUtils.h
+9-8orc-rt/test/unit/CommonTestUtils.h
+9-6orc-rt/test/unit/AllocActionTestUtils.h
+8-5orc-rt/test/unit/DirectCaller.h
+8-5orc-rt/test/unit/BedrockTestUtils.h
+7-3orc-rt/test/unit/bedrock/SocketTestUtils.h
+54-3820 files not shown
+80-4626 files

LLVM/project b24530ellvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU sdiv64.ll finalize-isel-vadd-co-u32-dead-carry.mir

AMDGPU: Preserve carry-out dead flag in V_ADD_CO_U32 custom inserter

EmitInstrWithCustomInserter rebuilds V_ADD/SUB_CO_U32_e32 but did
not carry over the dead flag. Preserve the flag to reduce implicitly
depending on dead flags recomputed by LiveVariables.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+72-0llvm/test/CodeGen/AMDGPU/finalize-isel-vadd-co-u32-dead-carry.mir
+9-3llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+4-6llvm/test/CodeGen/AMDGPU/sdiv64.ll
+85-93 files

LLVM/project a60a77cmlir/include/mlir/Dialect/OpenMP OpenMPOpsInterfaces.td CMakeLists.txt, mlir/lib/Dialect/OpenMP/IR OpenMPOutlinedOps.cpp OpenMPGeneratedOps.cpp

[mlir][OpenMP] Split generated operation definitions into three TUs

Compile independent and helper-backed OpenMP op definitions separately from
the handwritten dialect implementation. Move shared assembly helpers into
the dialect namespace and keep registration in the independent TU.

Outline the repeated block-argument interface body once for all 15 models.
The generated operation partitions cover all 72 OpenMP operations.

Assisted-by: Codex
DeltaFile
+109-79mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+159-0mlir/lib/Dialect/OpenMP/IR/OpenMPOpsHelpers.h
+34-0mlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
+24-0mlir/lib/Dialect/OpenMP/IR/OpenMPGeneratedOps.cpp
+7-15mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
+16-0mlir/lib/Dialect/OpenMP/IR/OpenMPOutlinedOps.cpp
+349-942 files not shown
+354-948 files

LLVM/project 5a11b16llvm/lib/CodeGen PHIElimination.cpp, llvm/test/CodeGen/X86 phi-elimination-dead-def.mir

CodeGen: Mark dead PHI destination copies dead in the LiveIntervals path

When PHIElimination lowers a PHI whose destination is dead, it records a
dead def in LiveIntervals but did not set the dead flag on the lowered copy's
def operand. The LiveVariables path set this via addVirtualRegisterDead.

Avoids "Instruction ending live segment on dead slot has no dead flag" verifier
errors once LiveVariables is removed.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+57-0llvm/test/CodeGen/X86/phi-elimination-dead-def.mir
+5-0llvm/lib/CodeGen/PHIElimination.cpp
+62-02 files

LLVM/project 4a78e9eflang/include/flang/Lower PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Detect loops whose branching is confined to their body

A DO loop is classified as either structured or unstructured, and a single
raw branch anywhere in its body forces the loop -- and every construct
enclosing it -- onto the unstructured path.

That is stronger than necessary. A loop keeps its structured control flow
as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.

This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
DeltaFile
+191-23flang/lib/Lower/PFTBuilder.cpp
+137-0flang/test/Lower/pre-fir-tree-unstructured-internals.f90
+51-6flang/include/flang/Lower/PFTBuilder.h
+9-6flang/test/Lower/trailing-cycle.f90
+388-354 files

LLVM/project 93523caflang/lib/Lower Bridge.cpp, flang/test/Lower do-loop-branch-to-loop-header.f90 do_loop_unstructured.f90

[flang] Lower loops whose branching is confined to their body structurally

Such a loop was classified separately by a previous change but still
lowered as a raw CFG, so its structured form was lost.

Lower it structurally instead, with its body folded into a region that can
hold the branching. The loop keeps its bounds on the op, so it remains
available to whatever transforms or parallelizes it. Only the body is
folded: the loop control statements are emitted as they are for any
structured loop, since a branch from outside may target either of them.

Loops an OpenACC or OpenMP directive owns are lowered the same way, so
they keep their form too.
DeltaFile
+20-134flang/test/Lower/do_loop_unstructured.f90
+119-11flang/lib/Lower/Bridge.cpp
+73-0flang/test/Lower/OpenACC/acc-unstructured-internals.f90
+34-28flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
+55-0flang/test/Lower/do-loop-branch-to-loop-header.f90
+50-0flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
+351-17310 files not shown
+453-24116 files

LLVM/project f8b0206flang/include/flang/Lower PFTDefs.h PFTBuilder.h, flang/lib/Lower PFTBuilder.cpp

[flang] Record the evaluations that branch to each evaluation

The PFT records where each branch goes, but not where it comes from, so
asking whether anything branches into a construct means walking the whole
procedure.

Record the reverse edges beside the forward ones, and print them in PFT
dumps so both directions of the branch graph are visible.
DeltaFile
+68-0flang/test/Lower/pre-fir-tree-incoming-branches.f90
+20-0flang/lib/Lower/PFTBuilder.cpp
+8-8flang/test/Lower/assigned-goto-labeled-end.f90
+3-3flang/test/Lower/trailing-cycle.f90
+3-0flang/include/flang/Lower/PFTDefs.h
+3-0flang/include/flang/Lower/PFTBuilder.h
+105-111 files not shown
+106-127 files

LLVM/project 2795d4coffload/plugins-nextgen/common/include GenericProfiler.h

Review: Improve naming and documentation
DeltaFile
+48-23offload/plugins-nextgen/common/include/GenericProfiler.h
+48-231 files

LLVM/project 29ce634lldb/unittests/tools/lldb-server/tests LLGSTest.cpp TestClient.cpp

[lldb] [Windows] Let LLGS TestClient tolerate async `O` output packets (#225521)

My PR (swiftlang/llvm-project#14269) has a pre-merge test failure on
Windows, and that lead me looking at test LLGSTest.cpp deeply

  ```
  Send Packet: vCont;c
  Read Packet: O1b5b3f32356c
  lldb-server exiting...
LLGSTest.cpp(30): error: Value of:
llvm::detail::TakeError(Client.ContinueAll())
  Expected: succeeded
    Actual: failed  (Unable to parse StopReply: Invalid packet)
  ```

`TestClient::SendMessage` read exactly one packet and had no handling
for `O`
(inferior stdout) packets, but inferior output arriving before a stop
reply

    [35 lines not shown]
DeltaFile
+8-2lldb/unittests/tools/lldb-server/tests/TestClient.cpp
+0-4lldb/unittests/tools/lldb-server/tests/LLGSTest.cpp
+8-62 files