LLVM/project 4302024 — flang/lib/Semantics check-omp-structure.h check-omp-structure.cpp

[flang][OpenMP] Move leftover functions from structure to loop, NFC

There were some loop-related functions still left in the
check-omp-structure.cpp file. Move them to check-omp-loop.cpp.
DeltaFile
+0-142flang/lib/Semantics/check-omp-structure.cpp
+142-0flang/lib/Semantics/check-omp-loop.cpp
+2-2flang/lib/Semantics/check-omp-structure.h
+144-1443 files

LLVM/project 1e60b85 — llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/PowerPC ppcf128-constant-bitcast.ll

[PowerPC][SDAG] fix bitcast on ppc_f128 swapping the two halves (#208969)

fixes https://github.com/llvm/llvm-project/issues/44482

This is a long-standing issue
https://github.com/llvm/llvm-project/issues/44482, you can also see the
discrepancy in this small C program compiled with clang and GCC
https://godbolt.org/z/KK1q1EozM.

The representation of ppc_fp128 is endian-agnostic in that its
high-order double is stored at the lower address.

For example, 27.0 is represented in memory as `[0x403b000000000000,
0x0000000000000000]`. Bitcasting these 128 bits as an i128 on
little-endian means the upper 64 bits are `0x0000000000000000`, the
lower are `0x403b000000000000`.

But on big-endian the interpretation of the bytes is flipped, the upper
bits are now `0x403b000000000000` while the lower are in

    [8 lines not shown]
DeltaFile
+89-0llvm/test/CodeGen/PowerPC/ppcf128-constant-bitcast.ll
+17-1llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+106-12 files

LLVM/project 2c7b0d1 — orc-rt/test/unit/bedrock InProcessControllerAccessTest.cpp

[orc-rt] Use the Error matchers in InProcessControllerAccessTest (#228702)

Use the Error matchers introduced in 4c8a437d0487 in place of cantFail
on calls that can fail, so that a failure is reported as a test failure
rather than aborting the test binary (or, with assertions disabled,
going unnoticed).
DeltaFile
+3-1orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
+3-11 files

LLVM/project 1a2b0e2 — offload/plugins-nextgen/amdgpu/dynamic_hsa hsa.h hsa_ext_amd.h, offload/plugins-nextgen/amdgpu/src rtl.cpp

[offload] Use HSA SVM for AMDGPU shared memory
DeltaFile
+162-21offload/plugins-nextgen/amdgpu/src/rtl.cpp
+68-0offload/test/api/omp_device_managed_memory_ops.c
+31-0offload/test/api/amdgpu_managed_memory_accessible.c
+23-1offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa_ext_amd.h
+13-0openmp/docs/design/Runtimes.md
+1-0offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
+298-221 files not shown
+299-227 files

LLVM/project 21970fa — llvm/lib/Target/Mips MipsScheduleP5600.td MipsScheduleI6400.td, llvm/test/CodeGen/Mips/GlobalISel/llvm-ir fabs_vec.ll

[Mips][MSA] Lower vector fabs to BCLRI (#228532)

FMAX_A selects an original operand by magnitude and preserves its sign,
so fmax_a(x, x) does not implement fabs. Expand FABS_W and FABS_D to
clear bit 31 and bit 63 with BCLRI, and update their scheduling to match
the bit-clear instructions.

Fixes #228384.
DeltaFile
+2-4llvm/lib/Target/Mips/MipsMSAInstrInfo.td
+2-2llvm/test/CodeGen/Mips/msa/arithmetic_float.ll
+2-2llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs_vec.ll
+2-2llvm/lib/Target/Mips/MipsScheduleI6400.td
+1-1llvm/test/CodeGen/Mips/msa/buildvector-undef-loop.ll
+1-1llvm/lib/Target/Mips/MipsScheduleP5600.td
+10-121 files not shown
+11-137 files

LLVM/project 321fea5 — llvm/lib/Target/Mips MipsMSAInstrInfo.td, llvm/test/CodeGen/Mips/msa compare_float.ll

[Mips][MSA] Fix commutability of unordered comparisons (#228567)

Remove IsCommutable from FCULT_W/D and FCULE_W/D, whose predicates are
directional. Extend the existing floating-point comparison tests to
check that reversed comparisons produce separate results.

Fixes: #228422
DeltaFile
+37-12llvm/test/CodeGen/Mips/msa/compare_float.ll
+4-8llvm/lib/Target/Mips/MipsMSAInstrInfo.td
+41-202 files

LLVM/project e500488 — orc-rt/test/unit/tools OptionParserTest.cpp

[orc-rt] Use the Error matchers in OptionParserTest (#228701)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in OptionParserTest.
DeltaFile
+27-33orc-rt/test/unit/tools/OptionParserTest.cpp
+27-331 files

LLVM/project cb474be — llvm/test/CodeGen/X86 win64-eh-unwindv3-split-large.ll win64-eh-unwindv2-push-pop-stack-alloc.mir

[X86] Don't skip frame setup/destroy on SEH pseudos and regenerate tests (#225445)

As in title. Skipping setting setup/destroy flags caused pseudos to be
wrongly reordered by scheduling
DeltaFile
+34-34llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-epilog-ops.mir
+28-28llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
+23-21llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-epilogs.mir
+26-18llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
+18-18llvm/test/CodeGen/X86/win64-eh-unwindv2-push-pop-stack-alloc.mir
+18-0llvm/test/CodeGen/X86/win64-eh-unwindv3-split-large.ll
+147-1197 files not shown
+171-13613 files

LLVM/project ef0f6d0 — llvm/include/llvm/Support CRC.h

[Support] Add assert for DataBytes in calculateReflectedCRC32 (#228688)

Add an assertion to calculateReflectedCRC32 to check DataBytes is one of
the expected value (1, 2, 4, or 8 bytes).

Co-authored-by: Jared Wyles <jared.wyles at gmail.com>
DeltaFile
+4-0llvm/include/llvm/Support/CRC.h
+4-01 files

LLVM/project a7ac947 — flang/lib/Lower Bridge.cpp, flang/lib/Parser Fortran-parsers.cpp

[flang] Plugin directives: address review comments

- Accept as procedure arguments only subprograms and external procedures:
  reject dummy procedures, procedure pointers, statement functions and
  intrinsics; a generic name stands for its specific procedure of the same
  name, and is an error without one. Accept as variable arguments only
  variables (not e.g. derived types or module names). Lowering no longer
  calls mangleName on anything else, which aborted.
- Make a malformed argument list of a directive with a registered prefix a
  parse error instead of an ignored, unrecognized directive.
- Leave out of a module file a directive whose arguments are not visible in
  the module (e.g. an internal procedure or a dummy argument), with a
  warning, instead of writing a module file that cannot be read.
- In a function without a RESULT clause, take its name as the function, not
  its result variable, where a procedure may be meant.
- Record a directive on the host's symbol when its subject is host
  associated (a module procedure naming itself), so it is written to the
  module file.

Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+72-16flang/lib/Semantics/resolve-names.cpp
+43-9flang/lib/Semantics/mod-file.cpp
+24-3flang/lib/Parser/Fortran-parsers.cpp
+22-3flang/lib/Lower/Bridge.cpp
+161-314 files

LLVM/project 41618ea — orc-rt/test/unit/support/sps SimplePackedSerializationTest.cpp

[orc-rt] Use the Error matchers in SimplePackedSerializationTest (#228696)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimplePackedSerializationTest.
DeltaFile
+7-18orc-rt/test/unit/support/sps/SimplePackedSerializationTest.cpp
+7-181 files

LLVM/project b028ea8 — llvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/ARM inline-asm-clobber.ll

[ARM] fix `r14` aliasing `lr` on `thumb-1` (#225746)

Since https://github.com/llvm/llvm-project/pull/179740 `r14` is accepted
as an alias for `lr`, which works on `arm` and `thumb-2` targets, but
not on `thumb-1`

https://godbolt.org/z/WEEjMMj93

```llvm
; -mtriple=thumbv6m-none-eabi
define i32 @read_r14() nounwind {
start:
  %1 = tail call i32 asm sideeffect alignstack "", "=&{r14},~{cc},~{memory}"()
  ret i32 %1
}
```

Gives


    [11 lines not shown]
DeltaFile
+33-17llvm/test/CodeGen/ARM/inline-asm-clobber.ll
+1-1llvm/lib/Target/ARM/ARMISelLowering.cpp
+34-182 files

LLVM/project 2bdc29f — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 duplicated-lane-consecutive-loads.ll

[SLP]Pack unique consecutive loads instead of gathering duplicated lanes

A load bundle with duplicated lanes whose unique loads are consecutive
was kept as is and emitted as a masked gather. Pack the unique loads
into a single wide load plus a reuse shuffle, unless the target reports
the masked gather as cheaper.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/228698
DeltaFile
+27-5llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-5llvm/test/Transforms/SLPVectorizer/X86/duplicated-lane-consecutive-loads.ll
+31-102 files

LLVM/project c6b9e8e — llvm/test/Transforms/SLPVectorizer/X86 duplicated-lane-consecutive-loads.ll

[SLP][NFC]Add a test with non-profitable vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/228695
DeltaFile
+70-0llvm/test/Transforms/SLPVectorizer/X86/duplicated-lane-consecutive-loads.ll
+70-01 files

LLVM/project 3389fff — llvm/test/Transforms/SLPVectorizer/X86 duplicated-lane-consecutive-loads.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+70-0llvm/test/Transforms/SLPVectorizer/X86/duplicated-lane-consecutive-loads.ll
+70-01 files

LLVM/project 6b3bdfe — llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Collect loop guards at most once in howManyLessThans (NFC). (#228687)

Add helper to collect loop guards once in howManyLessThans to avoid
repeated collections to limit compile-time increases if collection gets
more expensive (https://github.com/llvm/llvm-project/pull/228135) and
additional uses of loop guards are added to howManyLessThans (follow up)

Compile-time impact currently is in the noise

https://llvm-compile-time-tracker.com/compare.php?from=f81414dbe2ba478fa489730079263dbd546d18c0&to=171115fa4fa837b7ad9f9a6398e929a1a5866350&stat=instructions:u

PR: https://github.com/llvm/llvm-project/pull/228687
DeltaFile
+13-4llvm/lib/Analysis/ScalarEvolution.cpp
+13-41 files

LLVM/project 67910b2 — llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp, llvm/lib/Transforms/Scalar ScalarizeMaskedMemIntrin.cpp

[IRBuilder] Use SetInsertPoint without redundant BasicBlock argument (#228476)

Replace calls of `SetInsertPoint(BB, It)` with just
`SetInsertPoint(It)`. In preparation for deprecating that overload.
DeltaFile
+18-31llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+20-24llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+12-14polly/lib/CodeGen/BlockGenerators.cpp
+11-13polly/lib/CodeGen/IslNodeBuilder.cpp
+12-12llvm/unittests/Analysis/MemorySSATest.cpp
+8-8llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
+81-10261 files not shown
+195-22967 files

LLVM/project 9783769 — llvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU narrow-int-to-bfloat.ll narrow-int-to-fp.ll

Price the extension of a buffer load in int to fp casts
DeltaFile
+72-0llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
+32-0llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
+12-7llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+116-73 files

LLVM/project fdd93c0 — llvm/lib/CodeGen TargetLoweringBase.cpp, llvm/lib/LTO ThinLTOCodeGenerator.cpp LTOBackend.cpp

CodeGen: Prefer getting the Triple from the Module (#228620)

Take the triple from the contextual module rather than TargetMachine 
when it's already readily available.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+4-4llvm/lib/CodeGen/TargetLoweringBase.cpp
+2-2llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+1-1llvm/lib/Target/X86/X86ISelLowering.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
+1-1llvm/lib/LTO/ThinLTOCodeGenerator.cpp
+1-1llvm/lib/LTO/LTOBackend.cpp
+10-101 files not shown
+11-117 files

LLVM/project 13b5de3 — llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp

[AArch64] Stop count cost once force-unroll threshold is reached (NFC). (#228247)

The cost is only used to compare against Aarch64ForceUnrollThreshold.
Stop counting when we reach it, to avoid unnecessary cost queries.

Reduces compile-time on AArch64 by -0.08%.


https://llvm-compile-time-tracker.com/compare.php?from=5ffb13d6d1f87195bba8af13366a152a7de2bfe0&to=18f3cab804f98653c6b3a56b6ac02c9f6960b672&stat=instructions:u
DeltaFile
+3-0llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+3-01 files

LLVM/project de20437 — clang/lib/AST ExprConstant.cpp, clang/lib/AST/ByteCode InterpBuiltin.cpp

[clang] Refactor CRC32 helper for x86 CRC builtins (#225774)

Move the reflected CRC32 calculation used by the x86 CRC builtins into
llvm::calculateReflectedCRC32() and reuse it from both the AST
interpreter and constant expression evaluator.

This removes duplicated CRC32 implementation logic from Clang. This is
planned to be used for implementing const folding CRC instructions for
x86 and AArch64 in the future in LLVM.

Based on suggestion in
https://github.com/llvm/llvm-project/pull/219452#discussion_r4070846498
DeltaFile
+20-0llvm/include/llvm/Support/CRC.h
+3-9clang/lib/AST/ExprConstant.cpp
+3-9clang/lib/AST/ByteCode/InterpBuiltin.cpp
+26-183 files

LLVM/project 5109478 — orc-rt/test/unit/support AllocActionTest.cpp

[orc-rt] Use the Error matchers in AllocActionTest (#228680)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in AllocActionTest.
DeltaFile
+15-21orc-rt/test/unit/support/AllocActionTest.cpp
+15-211 files

LLVM/project ac9ee31 — llvm/lib/CodeGen TargetLoweringObjectFileImpl.cpp TailDuplicator.cpp, llvm/lib/Target/AArch64 AArch64FrameLowering.cpp

CodeGen: Prefer getting the Triple from the Module

Continue replacing TargetMachine::getTargetTriple() with the module's
triple at sites where a Module is one hop away through an available
Function, GlobalValue or MachineModuleInfo.

Where the surrounding class already holds a Subtarget, use its triple
rather than routing through the Module.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+6-6llvm/lib/Target/ARM/ARMISelLowering.cpp
+6-3llvm/lib/CodeGen/TailDuplicator.cpp
+4-4llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
+2-2llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+1-2llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+2-1llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp
+21-1814 files not shown
+35-3220 files

LLVM/project f71f2b8 — llvm/lib/CodeGen Analysis.cpp TargetLoweringBase.cpp, llvm/lib/LTO ThinLTOCodeGenerator.cpp LTOBackend.cpp

CodeGen: Prefer getting the Triple from the Module

Take the triple from the contextual module rather than TargetMachine
when it's already readily available.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+4-4llvm/lib/CodeGen/TargetLoweringBase.cpp
+2-2llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
+1-1llvm/lib/Target/X86/X86ISelLowering.cpp
+1-1llvm/lib/LTO/ThinLTOCodeGenerator.cpp
+1-1llvm/lib/LTO/LTOBackend.cpp
+1-1llvm/lib/CodeGen/Analysis.cpp
+10-101 files not shown
+11-117 files

LLVM/project 4aaffe8 — flang/test/Semantics/OpenMP requires06.f90 requires05.f90

[Flang][OpenMP] Reset REQUIRES directive with new program unit (#227829)

A REQUIRES directive with unified_address, unified_shared_memory, or
reverse_offload must appear lexically before any device construct or
device routine is scoped to a program unit.
DeltaFile
+31-0flang/test/Semantics/OpenMP/requires11.f90
+6-11flang/test/Semantics/OpenMP/requires08.f90
+6-11flang/test/Semantics/OpenMP/requires07.f90
+5-11flang/test/Semantics/OpenMP/requires03.f90
+3-5flang/test/Semantics/OpenMP/requires06.f90
+3-5flang/test/Semantics/OpenMP/requires05.f90
+54-432 files not shown
+61-488 files

LLVM/project 1e80bdc — llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp, llvm/lib/Target/AArch64 AArch64AsmPrinter.cpp

CodeGen: Prefer getting the Triple from the Module when convenient (#228429)

Take the triple from the contextual module rather than TargetMachine when it's 
already readily available.
DeltaFile
+17-16llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+5-4llvm/lib/Target/X86/X86AsmPrinter.cpp
+4-4llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
+3-3llvm/lib/Target/ARM/ARMAsmPrinter.cpp
+3-3llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+3-2llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
+35-325 files not shown
+41-3811 files

LLVM/project 283cb39 — orc-rt/test/unit/bedrock/sys/darwin StandaloneMachOUnwindInfoRegistrarTest.cpp

[orc-rt] Use the Error matchers in StandaloneMachOUnwindInfoRegistrar… (#228679)

…Test

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in StandaloneMachOUnwindInfoRegistrarTest.
DeltaFile
+51-42orc-rt/test/unit/bedrock/sys/darwin/StandaloneMachOUnwindInfoRegistrarTest.cpp
+51-421 files

LLVM/project edeaf21 — llvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/Thumb optional-def-dead-cpsr.ll

ARM: Preserve the dead flag when activating the optional CPSR def (#227655)

This did not preserve the original dead flag, so it would be recomputed later by 
LiveVariables or RegAllocFast.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
DeltaFile
+46-0llvm/test/CodeGen/Thumb/optional-def-dead-cpsr.ll
+1-0llvm/lib/Target/ARM/ARMISelLowering.cpp
+47-02 files

LLVM/project 8673f8d — offload/plugins-nextgen/amdgpu/dynamic_hsa hsa.h hsa.cpp, offload/plugins-nextgen/amdgpu/src rtl.cpp

[offload][AMDGPU] Add dynamic HSA version and symbol checks
DeltaFile
+39-2offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
+15-0offload/plugins-nextgen/amdgpu/src/rtl.cpp
+2-0offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.h
+56-23 files

LLVM/project 92ee379 — orc-rt/test/unit/bedrock/sps SimpleRemoteCATest.cpp

[orc-rt] Use the Error matchers in SimpleRemoteCATest (#228672)

Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleRemoteCATest.
DeltaFile
+16-16orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
+16-161 files