[RISCV] Make $rs an output of PseudoTAILReg. (#237443)
It's used as the temporary register for the AUIPC when expanded so it
should be an output.
Assisted-by: Claude
[RISCV] Add Defs to PseudoTAIL and PseudoTAILX7.
Annonyingly PseudoTAIL can def either X6 or X7 depending on Zicfilp
and the version of the assembler being used.
Part of fixing #235697.
[libunwind] Support extended amd64 segment registers on FreeBSD (#237265)
Raise the amd64 DWARF register limit to 59 and add RFLAGS, all six
segment selectors, FS.base, and GS.base to the register model. Capture
the extended state and restore it when resuming, using setcontext on
FreeBSD to restore selectors and bases together. Pack the state into the
existing context buffers without changing their public sizes or the
Windows XMM offsets.
Add tests for register access, signal-frame CFI recovery, register
bounds, and resume behavior.
Assisted-by: GPT
Check stack are register context in ThreadPlanCallFunction::DoTakedown (#217759)
I get a couple of crashes a year in ThreadPlanCallFunction::DoTakedown
on the line where we get the PC from the thread. It looks like the
RegisterContext (or maybe GetStackFrameAtIndex(0)) are returning null.
The crashes are when the UI calls UnwindInnermostFrame so I know that
thread has to be valid. So the only possibilities I can think of are
that we couldn't reconstruct the stack frame at index 0 or its register
context. I don't know how that would happen, but there's no harm in
being more careful accessing the register context.
[RISCV] Make $rs an output of PseudoTAILReg.
It's used as the temporary register for the AUIPC when expanded
so it should be an output.
Assisted-by: Claude
[tsan] Increase per-thread held lock limit in DeadlockDetectorTLS to 512 (#232882)
When running under ThreadSanitizer with deadlock detection enabled
(`detect_deadlocks=1`), `DeadlockDetectorTLS::addLock` enforces a hard
limit on the number of distinct locks a single thread may hold
simultaneously via `CHECK_LT(n_all_locks_,
ARRAY_SIZE(all_locks_with_contexts_))`.
Although #116409 previously raised this limit from 64 to 128, workloads
that initialize large RPC frameworks, worker pools, or sharded data
structures (such as C++ extensions under free-threaded Python) can hold
more than 128 locks simultaneously on one thread during initialization,
triggering a fatal `CHECK` failure.
Increase `all_locks_with_contexts_` capacity from 128 to 512. Each
`LockWithContext` entry is 8 bytes (`u32 lock; u32 stk;`), adding 3 KB
per heap-allocated `DDLogicalThread` when `detect_deadlocks=1` while
remaining well below `TwoLevelBitVector` capacity (`DDBV::kSize`, which
is 4096 on 64-bit platforms and 1024 on 32-bit platforms).
[3 lines not shown]
[ci] Collect profiles in the LLVM test-suite LNT runs on Linux
Run the test-suite with `--use-perf all` on Linux, which collects profiling
data and submits it to LNT. Bump both machines since the version of the
test suite also changes.
Assisted by Claude
[SHT_LLVM_BB_ADDR_MAP] Emit the function GUID for local-linkage functions (#237345)
Add the `-basic-block-address-map-emit-func-guid` flag to emit the
function GUID (the `FuncGUID` feature added in #231675) in the
SHT_LLVM_BB_ADDR_MAP section. The GUID is only emitted for functions
with local linkage, whose symbol names may not be unique across
translation units. Other functions can be identified by their symbol
names, so the feature bit is left unset for them.
The GUID assigned by AssignGUIDPass (`!guid` metadata) is used when
available. Otherwise, it is computed from the module's source file name
and the function's current name, since AssignGUIDPass only runs in the
(Thin)LTO pre-link pipelines.
This also bumps the emitted SHT_LLVM_BB_ADDR_MAP version to 6, which is
required for the FuncGUID feature.
Assisted-by: Claude Opus 5.5
[clang][DepScan] Introduce API to find modulemaps without loading
Introduce a way to batch look up the modulemap that defines
each of a set of module names.
`getModuleMapsForModules` builds a compiler instance from the same
command line as a by-name scan, then does every lookup in a separate
header search with lazy modulemap loading turned on and diagnostics
ignored.
The main use case is to let the Swift dependency scanner
invalidate its serialized dependency graph without the cost of loading
the referenced modules.
* Modulemaps passed with `-fmodule-map-file` are parsed first, all
other modules are resolved by by-name header search.
[clang][HeaderSearch] Introduce API to find a module's module map without loading (#235835)
Add a new public interface `lookupModuleMapFileForModule` that behaves
like `lookupModule` but only relies on parsing modulemaps, except in the
inferred framework case.
* Add a public `parseModuleMapFile` that can parse files passed through
`-fmodule-map-file`.
* Both APIs require lazy modulemap loading enablement.
* Introduce several helpers to support the new API.
[AMDGPU] Assert that RewriteAGPRCopyMFMA sees current reserved registers
AMDGPURewriteAGPRCopyMFMA reads allocation orders from the shared
RegisterClassInfo after the VGPR allocator. If a change to the reserved
registers was not published to the analysis, it can be offered a reserved
register: its spill slot elimination then trips an assertion in VirtRegMap if it
happens to pick that register, and silently clobbers it without assertions.
Check on entry, before the subtarget early exit, that the analysis matches MRI's
frozen set, so every AMDGPU pipeline reaching the pass verifies it. Add
RegisterClassInfo::hasCurrentReservedRegs() for the comparison; it recomputes
nothing.
AI-assisted.
[AMDGPU] Stop publishing reserved registers from AMDGPUReserveWWMRegs
Remove the update, the TRI->getReservedRegs() call needed to produce it, and the
pass's RegisterClassInfo dependency.
Since #226523, the allocator immediately following this pass publishes the
reserved register set it freezes. Publishing here duplicates the computation and
leaves a window in which the shared analysis and MRI's frozen set disagree.
AI-assisted.
Address review: don't look up a '\01' name without the global prefix
A symbol without the target's global prefix has no C name, so looking it up
by the rest of its name found a different symbol (e.g. "\01printf" on Darwin
called libc's printf). Fall back to the IR name instead, as ORC's
DynamicLibrarySearchGenerator skips such symbols, and reword the comment. In
the test, drop the redundant -jit-kind=mcjit and add a case for this.
Assisted-by: Claude Opus 5.5
[AMDGPU] Avoid illegal types in the zero/any extend to perm combine (#235846)
performZeroOrAnyExtendCombine runs after type legalization and converts
the byte providers of the extended i16 to i32 with
getBitcastedAnyExtOrTrunc.
A provider can be a vector wider than 32 bits, for example a v8i16
bitcast of a v2i64 half of a <4 x i64> kernel argument.
Bitcasting it to an integer of the same width creates an i128, and
LegalizeDAG asserts with "Unexpected illegal type!".
Both bytes come from the first dword of their provider, so extract that
dword with getDWordFromOffset, as matchPERM does.
Providers of up to 32 bits take the same path as before.
AI-assisted.
[AArch64] Support virtual registers in SME clustering (#233892)
Previously we iterated over physical registers and used
`definesRegister` and `readsRegister` to test exact match with virtual
registers which would always be false. This patch changes the method to
test register class membership directly, and adds support for virtual
registers. The new pre-RA test would fail before this patch
(specifically `fuse_z_write`). The behavior is unchanged for physical
registers. We intentionally do not walk sub-regs/super-regs inside the
helpers because we dont need to as the callers provide exact class
lists. The new helpers takes an array of classes to reduce repeated
def/use iteration overhead.
[DAG] LowerShiftByScalarImmediate - early out for shift-by-zero cases (#237365)
Also, add assertions to getGFNICtrlImm that we don't try to shift by
zero
Fixes #235663
[Offload] Manage all allocations through PluginCtx (#234758)
The current Memory Manager was making allocations through the
GenericDevice interface. In the cases, where the PlugintContext
interface calls that interface directly didn't matter, but when there's
a plugin implementation of PluginContext allocations they went through a
different path and were not tracked correctly.
In this PR we change the Memory Manager through alwasy allocate (pooled
& unpooled) memory through the PluginContext (still will go to a simple
device allocation by default) and all tracking done by the
GenericInterface and the Plugins is handled there to ensure consistency
through all paths.
Additionaly, libomptarget no longer uses the default context that was
artificially introduced for it as it has a now a context it can use.
Assisted by Claude.
[clang][deps] Fix printing of object-like macros from dep directives (#200458)
Preserve the necessary whitespace between the macro name and the body
when an object-like macro starts with lparen. Otherwise it accidentally
turns into an invalid function-like macro.
Incidentally extend some tests to verify the resulting printed
directives are valid preprocessing input.
[LV] Model memory runtime checks for inner loops of loop nests in VPlan. (#232794)
Remove the restriction that kept the IR-generated memcheck block for
loops with a parent loop. When hoisting runtime checks, they are
rewritten so they hold across the outer loop and are expanded before the
entry block to the VPlan, using the regular IR expander.
This patch exposes getRuntimeCheckBounds, which does the rewrite, and
marks such rewritten bounds as requiring expansion in IR. VPSCEVExpander
takes a loop as optional argument and uses VPExpandSCEVRecipes for
expressions that are invariant in the loop.
PR: https://github.com/llvm/llvm-project/pull/232794
Merge branch 'main' into users/void/pbqp-inline-asm-error
bd51cc5c5556 (#226523) made RegAllocBase::RegClassInfo a pointer to the
shared RegisterClassInfo, so the call to assignFailedVirtReg() dereferences it.
Assisted-by: Claude Opus 5.5
