LLVM/project b1f8c28 — mlir/include/mlir/IR BuiltinAttributes.td, mlir/unittests/IR AttributeTest.cpp

by Mehdi Amini via GitHub on ⎇
[MLIR] Validate APInt bitwidth in IntegerAttr::get(Type, APInt) (#188725)

IntegerAttr::get(Type, APInt) did not validate that the APInt's bit
width matched the expected bit width for the given type. For integer
types, the APInt width must equal the integer type's width. For index
types, the APInt width must equal IndexType::kInternalStorageBitWidth
(64 bits).

Passing an APInt with the wrong bit width could cause a
non-deterministic crash in StorageUniquer when comparing two IntegerAttr
instances for the same type but with different APInt widths.

This commit adds assertions in the get(Type, APInt) builder to catch
such misuse early in debug builds, providing a clear error message at
the call site rather than a cryptic crash in the storage uniquer.

Fixes #56401

Assisted-by: Claude Code
DeltaFile
+42-0mlir/unittests/IR/AttributeTest.cpp
+8-0mlir/include/mlir/IR/BuiltinAttributes.td
+50-02 files

LLVM/project bc44e9b — clang/lib/Headers hvx_hexagon_protos.h, clang/test/Headers hexagon-hvx-ieee-headers.c

by Alexey Karyakin via Cullen Rhodes on ⎇
[Hexagon] Use __HVX_IEEE_FP__ to guard protos that need -mhvx-ieee-fp (#184422)

Hexagon clang recently started to define __HVX_IEEE_FP__ when the
-mhvx-ieee-fp option is specified. Guard the intrinsic macros for
instructions that should only be available with -mhvx-ieee-fp with
__HVX_IEEE_FP__.

Additionally, the following NFC changes are included:

- NFC: Remove guards around HVX v60 intrinsic macros
  Hexagon v60 is the oldest Hexagon version that supports HVX so these
  guards were redundant. Presence of HVX is guarded separately, once
  per the whole file.

- Remove comments from closing guards (HVX protos)
  These comments served very limited function as they only guard
  one macro. Also, they were incorrect. Instead of fixing remove them.
  This will also reduce by the factor of two the amount of changes
  when guarding conditions change.
DeltaFile
+287-891clang/lib/Headers/hvx_hexagon_protos.h
+20-0clang/test/Headers/hexagon-hvx-ieee-headers.c
+307-8912 files

LLVM/project e6e5974 — clang/lib/Basic/Targets Hexagon.cpp Hexagon.h, clang/test/Preprocessor hexagon-predefines.c

by Ankit Aggarwal via Cullen Rhodes on ⎇
[Hexagon] Define __HVX_IEEE_FP__ when -mhvx-ieee-fp is enabled (#183829)

Add a __HVX_IEEE_FP__ define when the compiler is invoked with
-mhvx-ieee-fp flag
DeltaFile
+13-0clang/test/Preprocessor/hexagon-predefines.c
+6-0clang/lib/Basic/Targets/Hexagon.cpp
+1-0clang/lib/Basic/Targets/Hexagon.h
+20-03 files

LLVM/project 1926270 — llvm/include/llvm/IR GlobalObject.h Value.h, llvm/lib/IR Metadata.cpp Instruction.cpp

by Alexis Engelke on ⎇
[spr] initial version

Created using spr 1.3.8-wip
DeltaFile
+35-2llvm/include/llvm/IR/GlobalObject.h
+3-32llvm/include/llvm/IR/Value.h
+10-19llvm/lib/IR/Metadata.cpp
+8-3llvm/lib/IR/Instruction.cpp
+3-6llvm/lib/IR/Value.cpp
+7-1llvm/lib/IR/Globals.cpp
+66-631 files not shown
+70-667 files

LLVM/project 5722455 — llvm/docs AMDGPUUsage.rst

by pvanhout on ⎇
Comments
DeltaFile
+11-15llvm/docs/AMDGPUUsage.rst
+11-151 files

LLVM/project 2313989 — clang/test/CodeGen ubsan-aggregate-null-align.c

by VASU SHARMA via GitHub on ⎇
[UBSAN] [NFC] pre-commit tests for null, alignment, bounds checks (#176210)

PR to add precommit tests to document current UBSAN behavior for
aggregate copy operations.

The test covers:
- Sanitizers: null, alignment, bounds
- Type variants: plain, _Atomic (C), volatile (C)
- Operand forms: arr[idx], *ptr
- Operations: assignment, initialization, initializer list, variadic
args, nested member access
- C++ specific: direct/brace/copy-list init, new expressions, casts,
operator=, virtual base init
- Bounds checking: in-bounds access, past-the-end access (index ==
size), beyond bounds access, dynamic index

---------

Co-authored-by: vasu-ibm <Vasu.Sharma2 at ibm.com>
Co-authored-by: Tony Varghese <tonypalampalliyil at gmail.com>
DeltaFile
+235-0clang/test/CodeGen/ubsan-aggregate-null-align.c
+235-01 files

LLVM/project eeb2fae — llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp, llvm/test/CodeGen/AArch64 dup.ll

by David Green via GitHub on ⎇
[AArch64][GISel] Do not bitcast nonpower2 element size G_CONCATs (#189911)

This currently gets stuck in a loop, unable to make progress throught
the
bitcast concat. Limit it to legal element sizes so that we always make
progress
and at least fall back to SDAG as opposed to crashing or getting stuck.
DeltaFile
+13-1llvm/test/CodeGen/AArch64/dup.ll
+2-0llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+15-12 files

LLVM/project 2e51fda — lldb/include/lldb/Target MemoryRegionInfo.h, lldb/source/Plugins/Process/FreeBSD NativeProcessFreeBSD.cpp

by David Spickett via GitHub on ⎇
[lldb] Replace OptionalBool with LazyBool (#189652)

The only difference between them is that OptionalBool's third state
is "unknown" and LazyBool's is "calculate". We don't need to tell
the difference in a single context, so I've made a new eLazyBoolDontKnow
which is an alias of eLazyBoolCalculate.
DeltaFile
+101-115lldb/unittests/Process/Utility/LinuxProcMapsTest.cpp
+42-41lldb/include/lldb/Target/MemoryRegionInfo.h
+25-25lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
+19-19lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
+15-17lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
+15-15lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
+217-23220 files not shown
+352-37326 files

LLVM/project 6a31be6 — mlir/include/mlir/IR OperationSupport.h

by Lukas Sommer via GitHub on ⎇
[mlir][NFC] Remove conditionally unused type alias (#189894)

The `RawType` type alias is unused (`-Wunused-local-typedef`) in build
with asserts deactivated. In combination with `-Werror`, this causes
builds to fail.

Signed-off-by: Lukas Sommer <lukas.sommer at amd.com>
DeltaFile
+2-2mlir/include/mlir/IR/OperationSupport.h
+2-21 files

LLVM/project 21f9495 — compiler-rt/test/sanitizer_common/TestCases/Linux soft_rss_limit_mb_test.cpp

by Hans Wennborg via GitHub on ⎇
[compiler-rt] Try bumping soft_rss_limit again (#188441)

Previous instance: #171469
DeltaFile
+3-3compiler-rt/test/sanitizer_common/TestCases/Linux/soft_rss_limit_mb_test.cpp
+3-31 files

LLVM/project ca8645f — llvm/lib/Transforms/Scalar NaryReassociate.cpp

by padivedi on ⎇
delay fetching unifromity for target which don't need it
DeltaFile
+10-7llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+10-71 files

LLVM/project 8edbf23 — clang/lib/AST/ByteCode Compiler.cpp Compiler.h, clang/test/AST/ByteCode cxx26.cpp codegen-constexpr-unknown.cpp

by Timm Baeder via GitHub on ⎇
[clang][bytecode] Revisit reference variables as constexpr-unknown in C++26 (#187918)

When revisiting `const T& range = f(T());`, we do mark the variable for
`range` as constexpr-unknown, but not the temporary variable we create
for `T()`. Change that.

Then we also need to ignore constexpr-unknown pointers in
`CheckInvoke()`.

Fixes https://github.com/llvm/llvm-project/issues/187775
DeltaFile
+23-22clang/lib/AST/ByteCode/Compiler.cpp
+6-8clang/lib/AST/ByteCode/Compiler.h
+11-0clang/test/AST/ByteCode/cxx26.cpp
+3-3clang/lib/AST/ByteCode/Interp.cpp
+1-4clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
+44-375 files

LLVM/project a10ef8f — llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/Target/AMDGPU AMDGPUISelLowering.cpp

by Daniil Fukalov on ⎇
Removed shouldExpandPowerOf2DivRem, rebased, fixed conflicts
DeltaFile
+1,099-947llvm/test/CodeGen/AMDGPU/rem_i128.ll
+726-612llvm/test/CodeGen/AMDGPU/div_i128.ll
+102-15llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
+9-27llvm/test/CodeGen/AMDGPU/select-phi-s16-fp.ll
+0-7llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+0-5llvm/include/llvm/CodeGen/TargetLowering.h
+1,936-1,6131 files not shown
+1,936-1,6157 files

LLVM/project c55542b — clang/test/CodeGenCUDA fp-contract.cu

by Daniil Fukalov on ⎇
Fixed test, addressed comment.
DeltaFile
+5-5clang/test/CodeGenCUDA/fp-contract.cu
+5-51 files

LLVM/project 4a4fc56 — llvm/test/CodeGen/AMDGPU memory-legalizer-private-wavefront.ll memory-legalizer-private-singlethread.ll

by Daniil Fukalov on ⎇
[AMDGPU] Disable generic DAG combines at -O0 to preserve debuggability.

Disable generic DAG combines for AMDGPU at -O0 via disableGenericCombines()
to preserve instructions that users may want to set breakpoints
on during debugging.

Since power-of-2 division/remainder for types > i64 was dependent on
DAG combine optimizations, added shouldExpandPowerOf2DivRem()
to request IR-level expansion for these cases at -O0.

Made-with: Cursor
DeltaFile
+8,544-1,366llvm/test/CodeGen/AMDGPU/memory-legalizer-private-wavefront.ll
+8,544-1,366llvm/test/CodeGen/AMDGPU/memory-legalizer-private-singlethread.ll
+8,544-1,366llvm/test/CodeGen/AMDGPU/memory-legalizer-private-workgroup.ll
+8,449-1,355llvm/test/CodeGen/AMDGPU/memory-legalizer-private-cluster.ll
+8,449-1,355llvm/test/CodeGen/AMDGPU/memory-legalizer-private-agent.ll
+8,069-1,315llvm/test/CodeGen/AMDGPU/memory-legalizer-private-system.ll
+50,599-8,12370 files not shown
+189,658-24,55076 files

LLVM/project 7e8449a — llvm/lib/Transforms/Coroutines CoroFrame.cpp

by Weibo He via GitHub on ⎇
[CoroSplit] Drop assumption that promise alloca is not accessed before coro.begin (NFC) (#189521)

There is an inconsistency in that the code assumes the promise alloca is
not modified before coro.begin, yet it handles such accesses later. This
patch proposes dropping that assumption and analyzing accesses before
coro.begin from the outset, allowing #189295 to erase promise alloca
without analyse it afterwards.
DeltaFile
+40-47llvm/lib/Transforms/Coroutines/CoroFrame.cpp
+40-471 files

LLVM/project f6a4796 — clang/include/clang/Basic BuiltinsLoongArchLSX.def BuiltinsLoongArchLASX.def, clang/test/CodeGen/LoongArch/lasx lasxintrin-lax-vector-conversions.c

by wanglei on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+528-0clang/test/CodeGen/LoongArch/lasx/lasxintrin-lax-vector-conversions.c
+463-0clang/test/CodeGen/LoongArch/lsx/lsxintrin-lax-vector-conversions.c
+20-20clang/include/clang/Basic/BuiltinsLoongArchLSX.def
+18-18clang/include/clang/Basic/BuiltinsLoongArchLASX.def
+1,029-384 files

LLVM/project 3068132 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp

by Ramkumar Ramachandra via GitHub on ⎇
[LV] Use bind_front in tryToOptimizeInductionTruncate (NFC) (#189763)
DeltaFile
+3-8llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+3-81 files

LLVM/project dfeb02b — clang/lib/Sema SemaChecking.cpp, clang/test/CodeGenCUDA amdgpu-atomic-ops.cu

by Sameer Sahasrabuddhe on ⎇
[Clang][HIP] Deprecate __hip_atomic_* builtins

Emit -Wdeprecated-builtins warnings for all __hip_atomic_* builtins,
pointing users to their __scoped_atomic_* equivalents.

Provide a fixit when the scope is a compile-time constant and there is a direct
mapping from the HIP builtin to a Clang builtin. The compare_exchange builtins
differ in how they accept the desired value, so only a warning (without a fixit)
is emitted for those.

Assisted-By: Claude Opus 4.6
DeltaFile
+88-0clang/lib/Sema/SemaChecking.cpp
+58-0clang/test/SemaHIP/atomic-deprecated.hip
+38-0clang/test/CodeGenHIP/atomic-deprecated-fixit.hip
+8-3clang/test/CodeGenCUDA/amdgpu-atomic-ops.cu
+1-1clang/test/SemaCUDA/spirv-amdgcn-atomic-ops.cu
+1-1clang/test/SemaCUDA/atomic-ops.cu
+194-51 files not shown
+195-67 files

LLVM/project 1d52ab4 — clang/test/CodeGenOpenCL incorrect-atomic-scope.cl

by Sameer Sahasrabuddhe on ⎇
don't use gfx1250 with spirv target
DeltaFile
+5-7clang/test/CodeGenOpenCL/incorrect-atomic-scope.cl
+5-71 files

LLVM/project 1d549d9 — llvm/lib/CodeGen ExpandVectorPredication.cpp, llvm/lib/Target/RISCV RISCVISelLowering.cpp

by Luke Lau via GitHub on ⎇
[RISCV] Remove codegen for vp_lrint, vp_llrint (#189714)

Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999

This splits off two intrinsics from #179622.

We need to use the other intrinsic constructor in
ExpandVectorPredication.cpp because llrint has multiple overloaded types
DeltaFile
+55-70llvm/test/CodeGen/RISCV/rvv/lrint-vp.ll
+60-60llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint-vp.ll
+40-40llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint-vp.ll
+19-34llvm/test/CodeGen/RISCV/rvv/llrint-vp.ll
+7-3llvm/lib/CodeGen/ExpandVectorPredication.cpp
+1-8llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+182-2151 files not shown
+182-2177 files

LLVM/project cfd79a7 — clang/unittests/Format AlignmentTest.cpp FormatTest.cpp, llvm/test/CodeGen/AMDGPU fract-match.ll

by Sameer Sahasrabuddhe on ⎇
Merge remote-tracking branch 'upstream/main' into new/opencl-scope-test
DeltaFile
+3,566-0clang/unittests/Format/AlignmentTest.cpp
+19-3,544clang/unittests/Format/FormatTest.cpp
+2,210-1,106llvm/test/MC/AMDGPU/gfx10_unsupported.s
+2,161-458llvm/test/CodeGen/X86/addcarry.ll
+2,524-3llvm/test/CodeGen/AMDGPU/fract-match.ll
+863-863llvm/test/MC/AMDGPU/gfx7_unsupported.s
+11,343-5,9743,236 files not shown
+110,211-46,8773,242 files

LLVM/project 44b37e5 — clang/test/CodeGenHIP incorrect-atomic-scope.hip, clang/test/CodeGenOpenCL incorrect-atomic-scope.cl

by Sameer Sahasrabuddhe on ⎇
remove dependency on amdgpu target
DeltaFile
+0-1clang/test/CodeGenOpenCL/incorrect-atomic-scope.cl
+0-1clang/test/CodeGenHIP/incorrect-atomic-scope.hip
+0-22 files

LLVM/project fe6d15d — clang/lib/Serialization ASTWriterDecl.cpp, clang/test/Modules pr189415.cppm

by Chuanqi Xu via GitHub on ⎇
[C++20] [Modules] Fix thread_local variable handling in modules (#189796)

Close https://github.com/llvm/llvm-project/issues/189415

The function shouldVarGenerateHereOnly should also handle thread_local
variables, not just static variables. This fixes incorrect code
generation for thread_local variables in named modules.
DeltaFile
+34-0clang/test/Modules/pr189415.cppm
+2-1clang/lib/Serialization/ASTWriterDecl.cpp
+36-12 files

LLVM/project 5120719 — llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rv64p.ll rv32p.ll

by Craig Topper via GitHub on ⎇
[RISCV] Add codegen support for SATI and USATI. (#189532)

Implementation is largely based on ARM which has similar instructions.
DeltaFile
+285-0llvm/test/CodeGen/RISCV/rv64p.ll
+145-0llvm/test/CodeGen/RISCV/rv32p.ll
+59-4llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+20-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+3-0llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+512-45 files

LLVM/project aefca76 — llvm/lib/Transforms/Instrumentation MemorySanitizer.cpp, llvm/test/Instrumentation/MemorySanitizer/X86 avx512vl-intrinsics.ll

by Thurston Dang via GitHub on ⎇
[msan] Add missing non-mem PMOV handling (#189768)

This adds support for the remaining non-memory PMOV intrinsics, using
the existing handlers.

handleAVX512VectorDownConvert() is slightly updated to handle cases
where there are fewer than 8 output elements (for which the mask is
still supplied as 8 bits).
DeltaFile
+385-931llvm/test/Instrumentation/MemorySanitizer/X86/avx512vl-intrinsics.ll
+105-10llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
+490-9412 files

LLVM/project 585e2a0 — mlir/include/mlir/Bytecode BytecodeDialectInterface.td BytecodeImplementation.h, utils/bazel/llvm-project-overlay/mlir BUILD.bazel

by AidinT via GitHub on ⎇
[MLIR] Convert BytecodeDialectInterface to ods (#188852)

This PR converts `BytecodeDialectInterface` to ODS.
DeltaFile
+93-0mlir/include/mlir/Bytecode/BytecodeDialectInterface.td
+2-75mlir/include/mlir/Bytecode/BytecodeImplementation.h
+15-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+4-0mlir/include/mlir/Bytecode/CMakeLists.txt
+1-0utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
+115-755 files

LLVM/project a1af5c0 — llvm/lib/Analysis DependenceAnalysis.cpp

by Ruoyu Qiu on ⎇
update
DeltaFile
+8-5llvm/lib/Analysis/DependenceAnalysis.cpp
+8-51 files

LLVM/project d52a5e8 — mlir/include/mlir/Conversion/ConvertToEmitC ConvertToEmitCPatternInterface.td ToEmitCInterface.h, mlir/lib/Conversion/ArithToEmitC ArithToEmitC.cpp

by AidinT via GitHub on ⎇
[MLIR] convert ConvertToEmitCPatternInterface to ODS (#188621)

This PR converts `ConvertToEmitCPatternInterface` dialect interface to ODS. Also makes changes to derived classes.
DeltaFile
+22-0mlir/include/mlir/Conversion/ConvertToEmitC/ConvertToEmitCPatternInterface.td
+2-13mlir/include/mlir/Conversion/ConvertToEmitC/ToEmitCInterface.h
+11-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+2-1mlir/lib/Conversion/SCFToEmitC/SCFToEmitC.cpp
+2-1mlir/lib/Conversion/ArithToEmitC/ArithToEmitC.cpp
+3-0mlir/include/mlir/Conversion/ConvertToEmitC/CMakeLists.txt
+42-154 files not shown
+48-1710 files

LLVM/project 6581d58 — llvm/test/Analysis/DependenceAnalysis PR188098.ll

by Ryotaro Kasuga via GitHub on ⎇
[DA] Revise test `PR188098.ll` (NFC) (#189564)

This patch revises the test `Analysis/DependenceAnalysis/PR188098.ll`
added in #189428, primary to improve readability. I confirmed that this
test cashes without the change added in #188098.
DeltaFile
+51-36llvm/test/Analysis/DependenceAnalysis/PR188098.ll
+51-361 files