[MLIR] Add missing MLIRPass dep when DMLIR_ENABLE_PDL_IN_PATTERNMATCH=OFF used (NFC) (#208289)
When PDL dialect is disabled during build stage
(`DMLIR_ENABLE_PDL_IN_PATTERNMATCH=OFF`) we got a compiler errors due to
some of pdl deps transitively includes `MLIRPass` but without PDL this
dep missing and lead to compile errors
[mlir][acc] Specialize acc.on_device with constant arg for device (#208099) (#208351)
Fold known result acc.on_device to a constant in device-side code.
Re-submitted PR due to accidental stack PR merge
[clang] add triple to `test/SemaCXX/deduced-return-type-cxx14.cpp` (#208340)
Fixes issue reported here:
https://github.com/llvm/llvm-project/pull/208285#issuecomment-4919717057
Since that test file now uses the `cdecl` attribute, which is not
supported in some targets, pin that test to x86_64 triple.
[flang][acc] Emit acc.on_device operation for acc_on_device call (#208098)
It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
[flang][acc] Emit acc.on_device operation for acc_on_device call (#208098)
It is important we recognize acc_on_device calls as they need to be
folded during compilation. Emitting this operation helps with the
recognition of the runtime call in the optimizer.
[clang] Fix type of the MaterializeTemporaryExpr with incomplete array type. (#187618)
This affects constructs like `int f(int (&&x)[]); int z = f({1});`.
A temporary logically can't have incomplete type: if we don't know the
type, we can't materialize it. Rearrange the casts to make more sense.
I'm not sure this has any practical effects at the moment due to the way
we use skipRValueSubobjectAdjustments; we usually end up ignoring the
type of the MaterializeTemporaryExpr.
[LLDB] Add an API to check whether a variable is writable (#208042)
IDEs may offer functionality to set a variable to a specific value.
There are many situations where this isn't actually possible, for
example, if the variable's value is a constant or the result of a
complex DWARF expression. Instead of offering to change a value only to
have it fail with an error, this API lets the IDE query whether setting
a value is generally feasible so it can hide the action where it isn't
applicable.
rdar://142358140
Assisted-by: claude
[X86] Split FLDEXP when AVX512 is not available (#208292)
Mark the 512-bit types Custom only under useAVX512Regs(); otherwise
generic type legalization splits FLDEXP into the legal narrower halves
that LowerFLDEXP handles.
Add a LIT test for the v8f64 -> two 256-bit vscalefpd split.
Co-authored-by: Yanliang Mu <yanliang.mu at intel.com>
[flang][cuda] Register device/constant globals as device-resident under -gpu=mem:unified (#208336)
```fortran
module m
integer, device :: aaa; bind(c, name='aaa_from_c') :: aaa
integer, constant :: zzz; bind(c, name='zzz_from_c') :: zzz
end module
```
```c
extern int aaa_from_c;
#pragma acc declare create(aaa_from_c) // same for zzz_from_c
```
In this code, under `-gpu=mem:unified` a module-scope device/constant
global is registered only as a CUDA variable. Another translation unit
that declares the same symbol on the host can make it be treated as host
memory, so the device symbol is unresolved at run time.
Fix: emit `cuf.register_variable_static` for device/constant globals
under `mem:unified` so they are additionally registered as
device-resident.
[SSAF] Replace std::set with SetVector for deterministic order of contributor Decls
The container `std::set<const NamedDecl *>` created a
non-deterministic traversal order for a contributor's `Decls`, making
the resulting representative `Decls[0]` non-deterministic as well.
Also fix typos in assertion messages.
Follow-up to #204482.
[SSAF][WPA] Operator new/delete overload entities that shall retain their types
A follow-up change to #206600. This commit adds the WPA
implementation for those operator new/delete overload entities that
shall retain their types. This WPA result will later be used to
filter unsafe buffer analysis results.
rdar://179151541
[flang][cuda] Switch CUFAllocDelay to operate on fir.declare (#208334)
CUFAllocDelay previously matched hlfir.declare, requiring it to run
before HLFIR-to-FIR lowering. Match fir.declare instead so the pass can
be scheduled with the other CUF preparation passes (which also operate
on fir.declare), before cuf.alloc is lowered. The delay logic is
unchanged.
[ConstraintEli] Add more tests with latch guarded loops+overflows (NFC) (#208328)
Add additional tests with latch controlled loops and cases where we
currently bail out due to constraint-system overflows.
[clang] add triple to `test/SemaCXX/deduced-return-type-cxx14.cpp`
Fixes issue reported here: https://github.com/llvm/llvm-project/pull/208285#issuecomment-4919717057
Since that test file now uses the `cdecl` attribute, which is not supported
in some targets, pin that test to x86_64 triple.
[DirectX] Expand {u,s}mul.with.overflow in DXILIntrinsicExpansion (#207297)
DXIL has no op for the llvm.{u,s}mul.with.overflow intrinsics. These can
be emulated by performing the full multiply using double-width values
and then checking the high-part of the result. However, this should be
avoided for 32-bit values since we don't want to make the shader start
using 64-bit values if it wasn't before. In this case we can use the
UMul and IMul DXIL operations that return the result as separate low &
high values.
Wider (64-bit) multiplies, which can't widen further, compute the high
half with same-width arithmetic instead.
Fixes #207090
---------
Co-authored-by: Copilot <223556219+Copilot at users.noreply.github.com>
Co-authored-by: Farzon Lotfi <farzonl at gmail.com>
[clang][docs] Fix coro_await_elidable bullet list rendering
Add the blank line required before the reStructuredText bullet list and indent the continuation line for the second item. Without this, the generated AttributeReference page does not render the coro_await_elidable safe-elide-context bullets correctly.
Revert "[Clang] support friend declarations with a dependent nested-name-specifier" (#208302)
Reverts llvm/llvm-project#191268
---
Revert dependent friend support due to a crash in access checking
https://github.com/llvm/llvm-project/issues/208290
[flang][OpenACC] Fix host fallback for acc.atomic.update (#207597)
The host fallback for `acc.atomic.update` only processed the first
operation in the region and used its result for the store, ignoring the
remaining operations and the `acc.yield` terminator. This generated
invalid IR when the region contained multiple operations.
1.Fix this by cloning all operations in the region and using the operand
of `acc.yield` as the final result to store.
2.Add tests for atomic read, write, update, and capture operations to
cover the host fallback path.
---------
Co-authored-by: ES3Q <ES3Q at QQ.COM>
[VPlan] Model initial header mask as region value. (#196199)
Introduce a new VPRegionValue for the header mask, managed by loop
regions similar to the canonical IV.
The main benefit is we do not need to materialize the mask early and it
is trivial to find (no more need for patterns hard-coded in findHeaderMask).
It is currently materialized before computing costs, as we compute costs
for part of it currently.
PR: https://github.com/llvm/llvm-project/pull/196199
