LLVM/project 1e985b6 — llvm/lib/Target/AVR AVRInstrInfo.td AVRInstrFormats.td

by Ben Shi via GitHub on ⎇
[AVR] Explicitly set flag 'hasSideEffects' of instructions (#173660)
DeltaFile
+129-121llvm/lib/Target/AVR/AVRInstrInfo.td
+2-1llvm/lib/Target/AVR/AVRInstrFormats.td
+131-1222 files

LLVM/project a7d8b88 — llvm/lib/Transforms/InstCombine InstCombineSelect.cpp, llvm/test/Transforms/InstCombine select-binop-foldable-floating-point.ll

by Yunbo Ni via GitHub on ⎇
[InstCombine] Add check for flag propagation in `foldSelectIntoOp` (#173735)

Fixes
https://github.com/llvm/llvm-project/pull/162003#issuecomment-3693943568.

The current flag propagation assumes that if a select has both `ninf`
and `nnan`, then the operands of the folded operation must be finite.
While this assumption holds for `fadd`, `fsub`, and `fmul`, it does not
hold for `fdiv`.

For example, assume we have: 

```
A = 1.0, B = +Inf
A / B = 0.0  (finite, non-NaN)
```

The current transform would turn `fdiv A, B; select ninf nnan cond, A/B,
A;` into `A / (select ninf nnan cond, B, 1.0)`. If `cond` is true, the

    [6 lines not shown]
DeltaFile
+11-0llvm/test/Transforms/InstCombine/select-binop-foldable-floating-point.ll
+8-1llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+19-12 files

LLVM/project ad68ae9 — llvm/lib/Target/X86 X86PassRegistry.def

by Aiden Grossman on ⎇
feedback

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/Target/X86/X86PassRegistry.def
+1-11 files

LLVM/project 2ffd942 — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+83-47llvm/lib/Target/X86/X86OptimizeLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+49-28llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+63-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+377-17025 files not shown
+481-22231 files

LLVM/project c0608f8 — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+49-28llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+63-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+17-4llvm/lib/Target/X86/X86.h
+311-12722 files not shown
+383-16728 files

LLVM/project 80e92f0 — llvm/lib/Target/AMDGPU SILowerI1Copies.cpp AMDGPULowerVGPREncoding.cpp, llvm/lib/Target/X86 X86DynAllocaExpander.cpp X86FloatingPoint.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-3llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+1-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+1-3llvm/lib/Target/X86/X86DynAllocaExpander.cpp
+1-3llvm/lib/Target/X86/X86FloatingPoint.cpp
+1-3llvm/lib/Target/X86/X86AvoidTrailingCall.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
+6-161 files not shown
+7-177 files

LLVM/project cf58694 — llvm/lib/CodeGen MachineInstrBundle.cpp, llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp SILowerI1Copies.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+1-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+1-3llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
+1-1llvm/lib/CodeGen/MachineInstrBundle.cpp
+4-84 files

LLVM/project a9be4ff — llvm/lib/CodeGen MachineInstrBundle.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+1-1llvm/lib/CodeGen/MachineInstrBundle.cpp
+1-11 files

LLVM/project e313b28 — llvm/lib/CodeGen MachineInstrBundle.cpp, llvm/lib/Target/AMDGPU AMDGPULowerVGPREncoding.cpp SILowerI1Copies.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-3llvm/lib/Target/AMDGPU/AMDGPULowerVGPREncoding.cpp
+1-3llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
+1-1llvm/lib/CodeGen/MachineInstrBundle.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUWaitSGPRHazards.cpp
+4-84 files

LLVM/project dab5a8e — llvm/lib/CodeGen MachineInstrBundle.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/CodeGen/MachineInstrBundle.cpp
+1-11 files

LLVM/project 74161c1 — llvm/include/llvm/CodeGen AsmPrinter.h

by Aiden Grossman on ⎇
fix

Created using spr 1.3.7
DeltaFile
+2-0llvm/include/llvm/CodeGen/AsmPrinter.h
+2-01 files

LLVM/project 48f1612 — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+271-10518 files not shown
+315-13424 files

LLVM/project 01fd9c5 — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+49-28llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+17-4llvm/lib/Target/X86/X86.h
+309-12722 files not shown
+381-16728 files

LLVM/project dd4083a — llvm/lib/Target/X86 X86FixupLEAs.cpp

by Aiden Grossman on ⎇
fix

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/Target/X86/X86FixupLEAs.cpp
+1-11 files

LLVM/project 1765a95 — mlir/python/mlir/dialects nvgpu.py nvvm.py

by Twice via GitHub on ⎇
[MLIR][Python] Ensure `_Dialect` is imported for all dialects (#173729)

`from ._xxx_ops_gen import _Dialect` appears in some dialect modules,
like builtin, scf, irdl.. but not all of them. This PR ensures that for
upstream dialects, `<dialect module>._Dialect` is availble, like
`arith._Dialect`.

This PR is a prerequisite for the work I’m currently doing. Later on,
I’d like to use these `_Dialect` objects via something like
`conversion_target.add_legal_dialect(arith._Dialect)` (we could of
course just use strings like `add_legal_dialect("arith")`, but compared
to using a defined symbol, I think that’s more prone to typos).
DeltaFile
+1-0mlir/python/mlir/dialects/nvgpu.py
+1-0mlir/python/mlir/dialects/nvvm.py
+1-0mlir/python/mlir/dialects/openacc.py
+1-0mlir/python/mlir/dialects/openmp.py
+1-0mlir/python/mlir/dialects/python_test.py
+1-0mlir/python/mlir/dialects/rocdl.py
+6-019 files not shown
+25-025 files

LLVM/project f59e2b2 — llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen GCEmptyBasicBlocks.h Passes.h

by paperchalice via GitHub on ⎇
[CodeGen] Port gc-empty-basic-blocks to new pass manager (#137585)

Co-authored-by: Aiden Grossman <aidengrossman at google.com>
DeltaFile
+51-0llvm/test/CodeGen/X86/gc-empty-basic-blocks.mir
+23-9llvm/lib/CodeGen/GCEmptyBasicBlocks.cpp
+24-0llvm/include/llvm/CodeGen/GCEmptyBasicBlocks.h
+1-1llvm/include/llvm/InitializePasses.h
+1-1llvm/include/llvm/CodeGen/Passes.h
+1-1llvm/include/llvm/Passes/MachinePassRegistry.def
+101-122 files not shown
+103-138 files

LLVM/project a270907 — llvm/test/DebugInfo/MIR/InstrRef x86-lea-fixup.mir x86-lea-fixup-2.mir

by Aiden Grossman on ⎇
fix

Created using spr 1.3.7
DeltaFile
+3-3llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
+1-1llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
+4-42 files

LLVM/project 61f232a — llvm/test/CodeGen/X86 basic-block-sections-mir-parse.mir

by Aiden Grossman on ⎇
fix

Created using spr 1.3.7
DeltaFile
+1-1llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+1-11 files

LLVM/project e020d40 — llvm/test/CodeGen/X86 basic-block-sections-mir-parse.mir

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1-1llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+1-11 files

LLVM/project ad7c8a5 — llvm/test/CodeGen/X86 basic-block-sections-mir-parse.mir

by Aiden Grossman on ⎇
fix

Created using spr 1.3.7
DeltaFile
+1-1llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+1-11 files

LLVM/project 9d90e1a — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+8-7llvm/include/llvm/Passes/CodeGenPassBuilder.h
+191-609 files not shown
+204-7015 files

LLVM/project 949cb11 — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+271-10516 files not shown
+311-13022 files

LLVM/project 5671aba — llvm/lib/Target/X86 X86CodeGenPassBuilder.cpp

by Aiden Grossman on ⎇
fix sigsegv

Created using spr 1.3.7
DeltaFile
+2-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+2-21 files

LLVM/project e904250 — llvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

by Aiden Grossman on ⎇
[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+8-7llvm/include/llvm/Passes/CodeGenPassBuilder.h
+191-609 files not shown
+204-7015 files

LLVM/project 3b3db01 — utils/bazel/llvm-project-overlay/mlir BUILD.bazel

by makslevental on ⎇
remove stray newline
DeltaFile
+0-1utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+0-11 files

LLVM/project 4cc1cc1 — mlir/include/mlir/Bindings/Python IRCore.h, mlir/lib/Bindings/Python IRCore.cpp MainModule.cpp

by makslevental on ⎇
move impls
DeltaFile
+454-0mlir/lib/Bindings/Python/IRCore.cpp
+65-379mlir/include/mlir/Bindings/Python/IRCore.h
+20-0mlir/lib/Bindings/Python/MainModule.cpp
+539-3793 files

LLVM/project f22a225 — mlir/include/mlir/Bindings/Python IRCore.h, mlir/lib/Bindings/Python IRCore.cpp MainModule.cpp

by makslevental on ⎇
move impls
DeltaFile
+709-0mlir/lib/Bindings/Python/IRCore.cpp
+80-623mlir/include/mlir/Bindings/Python/IRCore.h
+20-0mlir/lib/Bindings/Python/MainModule.cpp
+809-6233 files

LLVM/project 30c6034 — mlir/cmake/modules AddMLIRPython.cmake, mlir/docs/Bindings Python.md

by makslevental on ⎇
address
jpienaar comments
DeltaFile
+8-5mlir/include/mlir/Bindings/Python/IRCore.h
+4-4mlir/cmake/modules/AddMLIRPython.cmake
+2-2mlir/docs/Bindings/Python.md
+1-2mlir/lib/Bindings/Python/IRCore.cpp
+15-134 files

LLVM/project 1ee3178 — llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp

by Craig Topper via GitHub on ⎇
[LegalizeDAG] Remove unnecessary EVT->MVT->EVT conversion. NFC (#173707)

There doesn't appear to be any reason to use MVT here. All of the uses
expect an EVT.
DeltaFile
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+2-21 files

LLVM/project 2c376ff — clang/test/CodeGenOpenCL builtins-amdgcn-gfx1250-wmma-w32.cl, llvm/lib/IR AutoUpgrade.cpp

by Muhammad Abdul via GitHub on ⎇
[AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (#171069)

Fixes #166989 

- Adds a clamp immediate operand to the AMDGPU WMMA iu8 intrinsic and
threads it through LLVM IR, MIR lowering, Clang builtins/tests, and MLIR
ROCDL dialect so all layers agree on the new operand
- Updates AMDGPUWmmaIntrinsicModsAB so the clamp attribute is emitted,
teaches VOP3P encoding to accept the immediate, and adjusts Clang
codegen/builtin headers plus MLIR op definitions and tests to match
- Documents what the WMMA clamp operand do
- Implement bitcode AutoUpgrade for source compatibility on WMMA IU8
Intrinsic op

Possible future enhancements:
- infer clamping as an optimization fold based on the use context

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+32-0llvm/lib/IR/AutoUpgrade.cpp
+12-12llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
+21-0llvm/test/Bitcode/amdgpu-wmma-iu8-clamp-upgrade.ll
+10-10llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
+11-7mlir/test/Target/LLVMIR/rocdl.mlir
+13-2clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
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