LLVM/project 7a39236compiler-rt/test/asan/TestCases/Darwin interface_symbols_darwin.cpp

[ASan] Fix interface_symbols_darwin.cpp on internal shell

This test turned out to not actually be that interested. There was just a
subshell usage that needed replacing with readfile, and then the test just
works.

Reviewers: fmayer, DanBlackwell, ndrewh

Reviewed By: ndrewh

Pull Request: https://github.com/llvm/llvm-project/pull/168654
DeltaFile
+11-7compiler-rt/test/asan/TestCases/Darwin/interface_symbols_darwin.cpp
+11-71 files

LLVM/project 9cd40daflang/test/Lower default-initialization.f90 charconvert.f90

[flang][NFC] Strip trailing whitespace from tests (7 of N)

Only some fortran source files in flang/test/Lower have been modified.
The other files in the directory will be cleaned up in subsequent
commits
DeltaFile
+9-9flang/test/Lower/default-initialization.f90
+9-9flang/test/Lower/charconvert.f90
+7-7flang/test/Lower/dispatch.f90
+6-6flang/test/Lower/derived-allocatable-components.f90
+6-6flang/test/Lower/host-associated.f90
+4-4flang/test/Lower/derived-types.f90
+41-4117 files not shown
+62-6223 files

LLVM/project 86a82f2mlir CMakeLists.txt, mlir/examples/standalone/python CMakeLists.txt

[MLIR][Python] make sure stubs get installed with LLVM_DISTRIBUTION_COMPONENTS (#168407)

Fixes https://github.com/llvm/llvm-project/issues/168393. Also adds
top-level `MLIR_PYTHON_STUBGEN_ENABLED` CMake option.
DeltaFile
+12-19mlir/python/CMakeLists.txt
+13-0mlir/CMakeLists.txt
+3-8mlir/examples/standalone/python/CMakeLists.txt
+28-273 files

LLVM/project b79a665llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll

[AMDGPU] Remove leftover implicit operands from SI_SPILL/SI_RESTORE. (#168546)

Remove leftover implicit operands from SI_SPILL/SI_RESTORE.

---------

Signed-off-by: John Lu <John.Lu at amd.com>
DeltaFile
+1,055-1,055llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+31-31llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+22-22llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll
+21-21llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
+20-20llvm/test/CodeGen/AMDGPU/preserve-wwm-copy-dst-reg.ll
+8-8llvm/test/CodeGen/AMDGPU/fold-reload-into-exec.mir
+1,157-1,1577 files not shown
+1,168-1,17113 files

LLVM/project b11b7b3clang/lib/StaticAnalyzer/Checkers BlockInCriticalSectionChecker.cpp, clang/test/Analysis block-in-critical-section.cpp

[clang][analyzer] Add defer_lock_t modelling to BlockInCriticalSectionChecker (#168338)

Fixes #166573

---------

Co-authored-by: Donát Nagy <donat.nagy at ericsson.com>
Co-authored-by: Alan Li <me at alanli.org>
DeltaFile
+17-1clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
+9-0clang/test/Analysis/block-in-critical-section.cpp
+26-12 files

LLVM/project 71e3de8mlir/lib/Dialect/Linalg/Transforms Vectorization.cpp, mlir/test/Dialect/Linalg/vectorization linalg-ops-with-patterns.mlir

[mlir][vector] Missing indices on vectorization of 1-d reduction to 1-ranked memref (#166959)

Vectorization of a 1-d reduction where the output variable is a 1-ranked
memref can generate an invalid `vector.transfer_write` with no indices
for the memref, e.g.:

vector.transfer_write"(%vec, %buff) <{...}> : (vector<f32>,
memref<1xf32>) -> ()

This patch solves the problem by providing the expected amount of
indices (i.e. matching the rank of the memref).
DeltaFile
+60-8mlir/test/Dialect/Linalg/vectorization/linalg-ops-with-patterns.mlir
+4-4mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+64-122 files

LLVM/project c62fc06compiler-rt/lib/asan asan_aix.cpp asan_posix.cpp, compiler-rt/lib/asan/scripts asan_symbolize.py

[asan] Implement address sanitizer on AIX: platform support (#139587)

Adds some general changes for supporting asan on AIX.

Issue: #138916
DeltaFile
+48-0compiler-rt/lib/asan/asan_aix.cpp
+9-1compiler-rt/lib/asan/scripts/asan_symbolize.py
+1-1compiler-rt/lib/asan/asan_posix.cpp
+1-0compiler-rt/lib/asan/CMakeLists.txt
+59-24 files

LLVM/project 1723a51mlir/lib/Dialect/Tensor/Transforms ReshapePatterns.cpp

[mlir][tensor] Drop unused AffineExpr variable (NFC) (#168651)

DeltaFile
+2-2mlir/lib/Dialect/Tensor/Transforms/ReshapePatterns.cpp
+2-21 files

LLVM/project 93a1327lldb/test/API/lang/cpp/libcxx-internals-recognizer TestLibcxxInternalsRecognizer.py

[lldb] Skip TestLibcxxInternalsRecognizer on asan + MacOS

Unfortunately, in this configuration, the bots are forced to use the
system libcxx, which is too old for what this test is verifying.
In the future, we should re-enable building libcxx with asan on MacOS.
DeltaFile
+1-0lldb/test/API/lang/cpp/libcxx-internals-recognizer/TestLibcxxInternalsRecognizer.py
+1-01 files

LLVM/project a7ba8dcclang-tools-extra/docs/clang-tidy/checks/objc nsdate-formatter.rst, clang-tools-extra/docs/clang-tidy/checks/performance noexcept-swap.rst

[clang-tidy][docs][NFC] Enforce 80 characters limit (4/4) (#168049)

Fix documentation in `mpi`, `objc`, `openmp`, `performance`,
`portability`, `readability` and `zircon`.

This is part of the codebase cleanup described in
https://github.com/llvm/llvm-project/issues/167098
DeltaFile
+204-100clang-tools-extra/docs/clang-tidy/checks/readability/identifier-naming.rst
+45-23clang-tools-extra/docs/clang-tidy/checks/objc/nsdate-formatter.rst
+13-11clang-tools-extra/docs/clang-tidy/checks/portability/template-virtual-member-function.rst
+8-8clang-tools-extra/docs/clang-tidy/checks/portability/simd-intrinsics.rst
+8-7clang-tools-extra/docs/clang-tidy/checks/readability/math-missing-parentheses.rst
+7-7clang-tools-extra/docs/clang-tidy/checks/performance/noexcept-swap.rst
+285-15627 files not shown
+362-22133 files

LLVM/project ad31e11libcxx/docs/ReleaseNotes 22.rst, libcxx/include/__ranges iota_view.h

[libc++] Make views::iota aware of __int128 (#167869)

Fixes #167991
DeltaFile
+10-4libcxx/include/__ranges/iota_view.h
+9-0libcxx/test/std/ranges/range.factories/range.iota.view/iterator/member_typedefs.compile.pass.cpp
+3-0libcxx/docs/ReleaseNotes/22.rst
+0-1libcxx/test/std/ranges/range.factories/range.iota.view/indices.pass.cpp
+22-54 files

LLVM/project 48dca1eclang/include/clang/AST StmtOpenACC.h, clang/lib/AST StmtOpenACC.cpp

[OpenACC][CIR] Implement 'atomic capture' lowering (#168422)

The 'atomic capture' variant of the `atomic` construct accepts either a
single statement, or a compound statement containing two statements.
Each of the statements it accepts meet a form of the previous
read/write/update forms, or is a combination of two.

The IR node for atomic capture takes two separate other acc.atomics,
plus a terminator.

This patch implements all of the lowering for these.

Note: This gets the postfix-increment/decrement wrong, but the effort
to do so is enough that I believe we can do that in a followup patch, so
I'll be doing so in the next patch.
DeltaFile
+508-0clang/test/CIR/CodeGenOpenACC/atomic-capture.cpp
+222-52clang/lib/AST/StmtOpenACC.cpp
+132-56clang/lib/CIR/CodeGen/CIRGenStmtOpenACC.cpp
+46-3clang/include/clang/AST/StmtOpenACC.h
+1-5clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
+909-1165 files

LLVM/project 2fc42c7clang/lib/CodeGen CGHLSLRuntime.cpp CGHLSLRuntime.h, clang/test/CodeGenHLSL sret_output.hlsl

[HLSL] Add initial support for output semantics (#168095)

This commits adds the first part of the output semantics. It only
considers return values (and sret), but does not handle `inout` or `out`
parameters yet.
Those missing bits will reuse the same code, but will require additional
testing & some fixups, so planning on adding them separately.
DeltaFile
+164-7clang/lib/CodeGen/CGHLSLRuntime.cpp
+56-0clang/test/CodeGenHLSL/semantics/semantic.struct.output.hlsl
+37-0clang/test/CodeGenHLSL/semantics/semantic.array.output.hlsl
+35-0clang/test/CodeGenHLSL/semantics/semantic-struct-2-output.hlsl
+34-0clang/lib/CodeGen/CGHLSLRuntime.h
+22-10clang/test/CodeGenHLSL/sret_output.hlsl
+348-1720 files not shown
+427-7526 files

LLVM/project 7b8eee6llvm/test/CodeGen/RISCV sincos-expansion.ll

[RISCV][test] Add sincos-expansion.ll test case
DeltaFile
+178-0llvm/test/CodeGen/RISCV/sincos-expansion.ll
+178-01 files

LLVM/project 5da0445llvm/include/llvm/Transforms/Vectorize LoopVectorizationLegality.h, llvm/lib/Transforms/Vectorize LoopVectorize.cpp LoopVectorizationLegality.cpp

[LV] Consolidate shouldOptimizeForSize and remove unused BFI/PSI. NFC (#168697)

#158690 plans on passing BFI as a lazy lambda to avoid computing
BlockFrequencyInfo when not needed.

In preparation for that, this PR removes BFI and PSI from some
constructors that aren't used. It also consolidates the two calls to
llvm::shouldOptimizeForSize so that the result is computed once and
passed where needed.

This also renames OptForSize in LoopVectorizationLegality to clarify
that it's to prevent runtime SCEV checks, see
https://reviews.llvm.org/D68082
DeltaFile
+38-51llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+10-14llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
+1-3llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+49-683 files

LLVM/project 9eee396flang/lib/Optimizer/Builder/Runtime Character.cpp

[flang] "Almost NFC" changes to fir::runtime::genCharCompare() (#168563)

As part of investigating a related issue, I made the following changes
to fir::runtime::genCharCompare():
- Renamed a variable
- Added an error check for the same kind of input args
- Updated another error check to use the same error found elsewhere in
this source file
DeltaFile
+15-8flang/lib/Optimizer/Builder/Runtime/Character.cpp
+15-81 files

LLVM/project 7fe3564clang/lib/Headers/llvm_libc_wrappers ctype.h string.h, libc/cmake/modules LLVMLibCHeaderRules.cmake

[Clang] Gut the libc wrapper headers and simplify (#168438)

Summary:
These were originally intended to represent the functions that are
present on the GPU as to be provided by the LLVM libc implementation.
The original plan was that LLVM libc would report which functions were
supported and then the offload interface would mark those as supported.
The problem is that these wrapper headers are very difficult to make
work given the various libc extensions everyone does so they were
extremely fragile.

OpenMP already declares all functions used inside of a target region as
implicitly host / device, while these headers weren't even used for CUDA
/ HIP yet anyway. The only things we need to define right now are the
stdio FILE types. If we want to make this work for CUDA we'd need to
define these manually, but we're a ways off and that's way easier
because they do proper overloading.
DeltaFile
+3-115clang/lib/Headers/llvm_libc_wrappers/ctype.h
+2-70clang/lib/Headers/llvm_libc_wrappers/string.h
+0-54libc/utils/hdrgen/hdrgen/gpu_headers.py
+10-38clang/lib/Headers/llvm_libc_wrappers/stdio.h
+3-24clang/lib/Headers/llvm_libc_wrappers/stdlib.h
+0-15libc/cmake/modules/LLVMLibCHeaderRules.cmake
+18-3166 files not shown
+31-35112 files

LLVM/project a2ddb02llvm/lib/Transforms/Scalar LoopInterchange.cpp, llvm/test/Transforms/LoopInterchange pr57148.ll loopnest-with-outer-btc0.ll

[LoopInterchange] Don't consider loops with BTC=0 (#167113)

Do not consider loops with a zero backedge taken count as candidates for
interchange. This seems like a sensible thing because it suggests the loop
doesn't execute and there is no point in interchanging. As a bonus, this
seems to avoid triggering an assert about phis and their uses from source
code, so this is a partial fix for #163954 but it needs more work to properly
fix that.
DeltaFile
+48-34llvm/test/Transforms/LoopInterchange/pr57148.ll
+74-0llvm/test/Transforms/LoopInterchange/loopnest-with-outer-btc0.ll
+54-0llvm/test/Transforms/LoopInterchange/zero-btc.ll
+18-0llvm/lib/Transforms/Scalar/LoopInterchange.cpp
+3-3llvm/test/Transforms/LoopInterchange/pr43326.ll
+197-375 files

LLVM/project 68d2ce8llvm/lib/Analysis DependenceAnalysis.cpp, llvm/test/Analysis/DependenceAnalysis StrongSIV.ll Coupled.ll

[DA] Replace delinearization for fixed size array (#161822)

This patch replaces the delinearization function used in DA, switching
from one that depends on type information in GEPs to one that does not.
There are three types of changes in regression tests: improvements,
degradations, and degradations but the related features will be
removed. Since there were very few cases that are classified into the
second category, I believe the impact of this change should be
practically insignificant.
DeltaFile
+16-18llvm/lib/Analysis/DependenceAnalysis.cpp
+4-10llvm/test/Analysis/DependenceAnalysis/StrongSIV.ll
+6-5llvm/test/Transforms/LoopInterchange/outer-dependency-lte.ll
+2-4llvm/test/Analysis/DependenceAnalysis/Coupled.ll
+3-3llvm/test/Analysis/DependenceAnalysis/Separability.ll
+5-0llvm/test/Transforms/LoopFusion/pr164082.ll
+36-409 files not shown
+57-5015 files

LLVM/project 6fc48dellvm/lib/Target/AArch64 AArch64SchedNeoverseN3.td AArch64SchedNeoverseN2.td, llvm/test/tools/llvm-mca/AArch64/Neoverse N3-sve-instructions.s V1-zero-dependency.s

[AArch64] Update zero latency instructions in Neoverse scheduling tables (#165690)

NeoverseZeroMove was introduced for Neoverse-V2 and was added to V3 and
V3AE.
Use NeoverseZeroMove for Neoverse-V1, N2, N3 in the same way, including
these instructions:
MOV Xd|Wd, #0|XZR|WZR

For all the above Neoverse targets, the following instructions are also
decoded as not utilizing the scheduling and execution resources of the
machine:
MOV Wd,Wn
MOV Xd,Xn

For Neoverse-N3 only, these instructions also have zero latency 
FMOV Dd, Dn
FMOV Sd, Sn
MOV Vd, Vn (vector)
MOV Zd.D, Zn.D
PTRUE
PFALSE
DeltaFile
+28-28llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-sve-instructions.s
+34-7llvm/lib/Target/AArch64/AArch64SchedNeoverseN3.td
+20-20llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-zero-dependency.s
+15-15llvm/test/tools/llvm-mca/AArch64/Neoverse/N2-basic-instructions.s
+15-15llvm/test/tools/llvm-mca/AArch64/Neoverse/N3-basic-instructions.s
+25-3llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
+137-885 files not shown
+189-10911 files

LLVM/project 655662emlir/include/mlir/IR Properties.td

[MLIR][ODS] Fully qualify namespace for mlir::Attribute in ODS generated code (#168536)

ODS generate code can be included and used outside of the `mlir`
namespace and so references to symbols in the mlir namespace
must be fully qualified.
DeltaFile
+3-3mlir/include/mlir/IR/Properties.td
+3-31 files

LLVM/project 267c93abolt/test/AArch64 inline-pauth-lr.s

[BOLT] Add unittest for inliner using retaasppc <label>
DeltaFile
+19-3bolt/test/AArch64/inline-pauth-lr.s
+19-31 files

LLVM/project dce6002clang/include/clang/Basic Builtins.h, clang/lib/Basic Builtins.cpp

[Clang][Codegen] Move floating point math intrinsic check to separate function [NFC] (#168198)

This PR moves the code that checks whether an LLVM intrinsic should be
generated instead of a call to floating point math functions to a
separate function. This simplifies `EmitBuiltinExpr` in `CGBuiltin.cpp`
and will allow us to reuse the logic in ClangIR.
DeltaFile
+90-0clang/lib/Basic/Builtins.cpp
+6-76clang/lib/CodeGen/CGBuiltin.cpp
+17-0clang/include/clang/Basic/Builtins.h
+113-763 files

LLVM/project bdcaa00llvm/lib/Target/AArch64 AArch64PerfectShuffle.h, llvm/test/CodeGen/AArch64 reduce-shuffle.ll arm64-trn.ll

[AArch64] match TRN starting from undef elements (#167955)

When the first element of a trn mask is undef, the `isTRNMask` function
assumes `WhichResult = 1`. That has a 50% chance of being wrong, so we
fail to match some valid trn1/trn2.

This patch introduces a more precise test to determine the correct value
of `WhichResult`, based on corresponding code in the `isZIPMask` and
`isUZPMask` functions.

- This change is based on #89578. I'd like to follow it up with a
further change along the lines of #167235.
DeltaFile
+228-230llvm/test/CodeGen/AArch64/reduce-shuffle.ll
+113-1llvm/test/CodeGen/AArch64/arm64-trn.ll
+10-10llvm/test/CodeGen/AArch64/insert-extend.ll
+10-10llvm/test/CodeGen/AArch64/vldn_shuffle.ll
+17-2llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
+378-2535 files

LLVM/project c32c1d0compiler-rt/cmake base-config-ix.cmake, offload CMakeLists.txt

[Runtimes] Default build must use its own output dirs (#168266)

Post-commit fix of #164794 reported at
https://github.com/llvm/llvm-project/pull/164794#issuecomment-3536253493

`LLVM_LIBRARY_OUTPUT_INTDIR` and `LLVM_RUNTIME_OUTPUT_INTDIR` is used by
`AddLLVM.cmake` as output directories. Unless we are in a
bootstrapping-build, It must not point to directories found by
`find_package(LLVM)` which may be read-only directories. MLIR for
instance sets thesese variables to its own build output
directory, so should the runtimes.
DeltaFile
+12-6runtimes/CMakeLists.txt
+6-6offload/CMakeLists.txt
+4-4openmp/CMakeLists.txt
+2-2compiler-rt/cmake/base-config-ix.cmake
+2-2offload/cmake/OpenMPTesting.cmake
+2-2openmp/cmake/OpenMPTesting.cmake
+28-222 files not shown
+30-248 files

LLVM/project 7b94dd3llvm/lib/Transforms/Vectorize VPlan.h

[VPLan] Reduce duplication in VPHeaderPHIRecipe::classof. (NFCI)

Implement VPHeaderPHIRecipe::classof(const VPValue *V)  in terms of the
variant taking VPRecipeBase.

Reduces some duplication, split off from
https://github.com/llvm/llvm-project/pull/141431.
DeltaFile
+4-6llvm/lib/Transforms/Vectorize/VPlan.h
+4-61 files

LLVM/project 42e24cfclang/include/clang/Driver Options.td, clang/include/clang/Options Options.td

Merge branch 'main' into users/s.barannikov/decoder-operands-7-arm
DeltaFile
+36,400-36,393llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+11,724-10,707llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+5,202-5,039llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+4,719-5,242llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
+9,668-0clang/include/clang/Options/Options.td
+0-9,644clang/include/clang/Driver/Options.td
+67,713-67,0256,017 files not shown
+299,678-208,4906,023 files

LLVM/project 58e6d02llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[AArch64][GlobalISel] Check unmergeSrc is a vector in matchCombineBuildUnmerge (#168692)

This aims to fix the crash in #168495, my combine rule was
missing a check that the source vector was in fact a vector. This then
caused the legality check to fail in this example as the concat was
trying to concat a non vector.

I have also gated the bitcast of the concat to only work on non-scalable
vectors as the mutation calls `getNumElements` which crashes when called
on a scalable vector.

Fixes #168495
DeltaFile
+72-0llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge-undef.mir
+3-1llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+3-0llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+78-13 files

LLVM/project 5343dd9clang/include/clang/Analysis/Analyses/LifetimeSafety Facts.h, clang/lib/Analysis/LifetimeSafety LiveOrigins.cpp Checker.cpp

[LifetimeSafety] Detect use-after-return (#165370)

Adding "use-after-return" in Lifetime Analysis.

Detecting when a function returns a reference to its own stack memory:
[UAR Design
Doc](https://docs.google.com/document/d/1Wxjn_rJD_tuRdejP81dlb9VOckTkCq5-aE1nGcerb_o/edit?usp=sharing)

Consider the following example:

```cpp
std::string_view foo() {
    std::string_view a;
    std::string str = "small scoped string";
    a = str;
    return a;
}
```


    [35 lines not shown]
DeltaFile
+283-0clang/unittests/Analysis/LifetimeSafetyTest.cpp
+155-1clang/test/Sema/warn-lifetime-safety.cpp
+28-10clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+24-8clang/lib/Analysis/LifetimeSafety/Checker.cpp
+14-4clang/lib/Analysis/LifetimeSafety/Facts.cpp
+12-6clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
+516-299 files not shown
+567-4415 files

LLVM/project 50791c3clang/include/clang/Basic BuiltinsX86.td, clang/lib/AST ExprConstant.cpp

[Clang][X86] allow VPERMILPD/S imm intrinsics to be used in constexpr (#168044)

Resolves #166529
DeltaFile
+53-0clang/test/CodeGen/X86/avx512vl-builtins.c
+32-0clang/test/CodeGen/X86/avx512f-builtins.c
+23-1clang/lib/AST/ExprConstant.cpp
+19-0clang/lib/AST/ByteCode/InterpBuiltin.cpp
+7-5clang/include/clang/Basic/BuiltinsX86.td
+5-0clang/test/CodeGen/X86/avx-builtins.c
+139-66 files