LLVM/project 1dd849bllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/X86 known-pow2.ll

[DAG] isKnownToBeAPowerOfTwo - add DemandedElts + OrZero handling to ISD::ZERO_EXTEND cases (#207697)

Fixes #181648
DeltaFile
+3-5llvm/test/CodeGen/X86/known-pow2.ll
+1-1llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+4-62 files

LLVM/project 4226a8cllvm/docs/CommandGuide llvm-dwarfdump.rst, llvm/test/tools/llvm-dwarfdump/X86 coverage.test

Revert "[llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage" (#207703)

Reverts llvm/llvm-project#195342

Change resulted in build errors resulting from not finding the
parseIRFile symbol while linking, example:
https://lab.llvm.org/buildbot/#/builders/67/builds/7988
DeltaFile
+17-218llvm/tools/llvm-dwarfdump/Coverage.cpp
+0-24llvm/test/tools/llvm-dwarfdump/X86/coverage.test
+4-10llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
+0-6llvm/docs/CommandGuide/llvm-dwarfdump.rst
+2-2llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
+23-2605 files

LLVM/project b6e8e1dflang/lib/Optimizer/Transforms FIRToMemRef.cpp

[FIRToMemRef] Doc collectSliceInfoFrom, getMemrefIndices, canonicalizeIndex

Also drops the unused `converted` parameter from getMemrefIndices.

Co-Authored-By: Claude Sonnet 4.6 noreply at anthropic.com
DeltaFile
+187-4flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
+187-41 files

LLVM/project 5f4940ellvm/docs/CommandGuide llvm-dwarfdump.rst, llvm/test/tools/llvm-dwarfdump/X86 coverage.test

[llvm-dwarfdump][LineCov 3/3] Add IR analysis for variable coverage (#195342)

Patch 3 of 3 to add to llvm-dwarfdump the ability to measure DWARF
coverage of local variables in terms of source lines, as discussed in
this RFC:
https://discourse.llvm.org/t/rfc-debug-info-coverage-tool-v2/83266

This patch adds an IR-level analysis in order to more accurately compute
the defined ranges for each variable. This avoids the problem of the
more naïve approach relying on source scopes, which overcounts as
coverable those lines where the variable is not yet defined (e.g. stack
variables).

The IR analysis requires IR to be provided to llvm-dwarfdump as a
separate `--variable-coverage-bitcode-file` argument (either textual IR
or bitcode; can be produced by various means e.g. `--save-temps
--emit-llvm`, `-ffat-lto-objects`,
[wllvm](https://github.com/travitch/whole-program-llvm)). The
recommended way to obtain a whole-program bitcode file is to use wllvm

    [5 lines not shown]
DeltaFile
+218-17llvm/tools/llvm-dwarfdump/Coverage.cpp
+24-0llvm/test/tools/llvm-dwarfdump/X86/coverage.test
+10-4llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
+6-0llvm/docs/CommandGuide/llvm-dwarfdump.rst
+2-2llvm/tools/llvm-dwarfdump/llvm-dwarfdump.h
+260-235 files

LLVM/project 292c99cllvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU s-barrier.ll s-barrier-signal-var-gep.ll

[AMDGPU] Improve SelectionDAG codegen around barrier intrinsics (#207688)

When lowering some intrinsics use generic AND/OR nodes instead of
specific machine instructions. This allows DAG combines and ISel to
select better instructions like S_BFE_U32.
DeltaFile
+28-20llvm/test/CodeGen/AMDGPU/s-barrier.ll
+11-22llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+13-17llvm/test/CodeGen/AMDGPU/s-barrier-signal-var-gep.ll
+1-3llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll
+1-1llvm/test/CodeGen/AMDGPU/lds-link-time-codegen-named-barrier.ll
+54-635 files

LLVM/project eac4725llvm/test/Transforms/LoopVectorize early_exit_combined_exits.ll early_exit_store_legality.ll, llvm/test/Transforms/LoopVectorize/VPlan early_exit_with_stores_vplan.ll

[LV] Tests for combined exit conditions (#205104)

Some initial tests for loops where earlier scalar transforms have
combined a countable exit with an uncountable one.
DeltaFile
+408-0llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
+75-0llvm/test/Transforms/PhaseOrdering/AArch64/countable-and-uncountable-exits-combined.ll
+24-0llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
+23-0llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
+530-04 files

LLVM/project 07e9838clang/lib/Headers riscv_packed_simd.h, clang/test/CodeGen/RISCV rvp-intrinsics.c

[RISCV][P-ext] Support packed reverse intrinsics (#207574)

Following X86, this patch uses general shuffles for packed reverse
intrinsics.
DeltaFile
+188-0clang/test/CodeGen/RISCV/rvp-intrinsics.c
+127-0llvm/test/CodeGen/RISCV/rvp-reverse.ll
+32-0clang/lib/Headers/riscv_packed_simd.h
+347-03 files

LLVM/project dc9edebllvm/include/llvm/Analysis AssumeBundleQueries.h, llvm/lib/Analysis AssumeBundleQueries.cpp

[AssumeBundleQueries] Remove unused code (#203927)

Some of the utilities in AssumeBundleQueris was only ever used in tests
for them, so there isn't much point in keeping the code around.
DeltaFile
+0-168llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
+0-27llvm/lib/Analysis/AssumeBundleQueries.cpp
+2-21llvm/include/llvm/Analysis/AssumeBundleQueries.h
+2-2163 files

LLVM/project 3ce39bboffload/plugins-nextgen/common/src GlobalHandler.cpp

[offload] Fix duplicate __llvm_write_custom_profile on Windows PGO builds (#207366)

MSVC/clang-cl lack __attribute__((weak)), so GlobalHandler.cpp provided
a strong stub for __llvm_write_custom_profile. When clang_rt.profile is
linked (e.g. instrumented/PGO builds) lld-link rejects the duplicate
strong symbol.

Replace the stub + CMake workaround with the /alternatename linker
pragma, which is the standard Windows weak-symbol equivalent used by
compiler-rt itself. The linker picks compiler-rt's strong definition
when present.

Fix the guard: use _WIN32 && !__MINGW32__ (not _MSC_VER) so the stub and
/alternatename pragma apply to plain clang-on-Windows too, while MinGW
(which supports __attribute__((weak)) natively) continues to use the
real weak declaration.

Also fix the stub signature from 8 to 10 parameters to match the header.

Assisted-by: Claude
DeltaFile
+14-12offload/plugins-nextgen/common/src/GlobalHandler.cpp
+14-121 files

LLVM/project c196103lldb/include/lldb/Utility ConstString.h, lldb/source/Target Statistics.cpp

[lldb] Reintroduce ConstString stats (#207694)

These stats were removed in ca59c69132eef55cc42bf8854706590dfddf5584 .
This patch restores the stats in their original form by tracking the
removed value in our own LLDB-specific counter.
DeltaFile
+11-4lldb/source/Utility/ConstString.cpp
+3-0lldb/include/lldb/Utility/ConstString.h
+2-0lldb/source/Target/Statistics.cpp
+2-0lldb/test/API/commands/statistics/basic/TestStats.py
+18-44 files

LLVM/project 18c0f3alibcxx/include future

[libc++] Use _LIBCPP_KEEP_TRANSITIVE_INCLUDES_LLVM23 in <future> (#207668)

`_LIBCPP_REMOVE_TRANSITIVE_INCLUDES` was used accidentally.
DeltaFile
+1-1libcxx/include/future
+1-11 files

LLVM/project 335a584lldb/test/API/tools/lldb-dap/utils TestDAPUtils_EventHistory.py TestDAPUtils_DAPConnection.py

[lldb-dap] Add tests for DAPConnection and EventHistory (#207037)

Add tests for DAPConnection and EventHistory
DeltaFile
+255-0lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_EventHistory.py
+85-0lldb/test/API/tools/lldb-dap/utils/TestDAPUtils_DAPConnection.py
+38-0lldb/test/API/tools/lldb-dap/utils/sample_dap_log.json
+378-03 files

LLVM/project 57b1519llvm/test/CodeGen/RISCV/rvv vector-interleave.ll vector-interleave-fixed.ll

[RISCV][NFC] Remove unnecessary ZIP/VISNI checks (#207683)

We should remove them when removing `XRivosVizip` and `XRivosVisni`
but it seems UTC failed to do that.
DeltaFile
+0-1,645llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll
+0-442llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
+0-119llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract.ll
+0-95llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
+0-54llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll
+0-48llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave2.ll
+0-2,4031 files not shown
+0-2,4487 files

LLVM/project f9f11ebllvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/InstCombine/AArch64 sve-intrinsic-opts-cmpne.ll

[AArch64][InstCombine] xor(cmpne) -> cmpeq (#207007)

Fold xor(cmpne(pg, v, 0), pg) into cmpeq(pv, v, 0)

Created after initially trying as a DAGCombine in #206931.
DeltaFile
+59-0llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-cmpne.ll
+34-0llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+93-02 files

LLVM/project 9de8a97llvm/lib/CodeGen MachineCopyPropagation.cpp, llvm/test/CodeGen/AArch64 machine-cp-spill-chain-across-call.mir

[MCP] Fix bug in spill copy elimination folding chain across a call. (#206858)

findLastSeenDefInCopy interface does not check for possible register
clobbering between the def and current instruction. That may lead to not
having a caller preserved register being preserved across a call.
Replaced with findAvailCopy that also does checks for a regmask operand
between the def and current instruction.
DeltaFile
+13-9llvm/test/CodeGen/AArch64/machine-cp-spill-chain-across-call.mir
+9-6llvm/test/CodeGen/PowerPC/mcp-elim-eviction-chain.mir
+1-1llvm/lib/CodeGen/MachineCopyPropagation.cpp
+23-163 files

LLVM/project 58bc8dfmlir/lib/Dialect/X86/Transforms VectorContractToAMXDotProduct.cpp, mlir/test/Dialect/X86/AMX vector-contract-to-tiled-dp.mlir

[mlir][x86] AMX memref source check (#206785)

Adds extra checks to AMX lowering to ensure data is read from memrefs as
tensors are not supported by x86 dialect ops.
DeltaFile
+144-0mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
+29-6mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
+173-62 files

LLVM/project fcfc916llvm/docs LangRef.rst, llvm/include/llvm/IR Module.h

Reapply [IR] Explicitly specify target feature for module asm (#204548) (#207677)

Reapply with a use-after-free fix. The MC subtarget used for inline
assembly has to stay alive until finalization, not only during the
emitInlineAsm() call.

-----

Support specifying additional properties on module-level inline
assembly. In particular, the target features and target CPU can now be
specified as follows:

    module asm(target_features: "+foo", target_cpu: "bar")
        "asm line 1"
        "asm line 2"

There may be multiple module inline assembly blocks with different
properties.


    [10 lines not shown]
DeltaFile
+85-11llvm/include/llvm/IR/Module.h
+38-36llvm/lib/Object/ModuleSymbolTable.cpp
+29-12llvm/lib/IR/AsmWriter.cpp
+36-3llvm/lib/AsmParser/LLParser.cpp
+29-0llvm/test/Bitcode/module-asm.ll
+21-6llvm/docs/LangRef.rst
+238-6855 files not shown
+573-18061 files

LLVM/project 4ffcfdflldb/source/Plugins/ScriptInterpreter/Python PythonDataObjects.cpp, lldb/unittests/ScriptInterpreter/Python PythonDataObjectsTests.cpp

[lldb] Reject NULL key in PythonDictionary::GetItem (#205753)

A `breakpoint set -P <class>` with an invalid-UTF-8 class name crashes
lldb with `EXC_BAD_ACCESS`.  The class name is passed through
unmodified, so the byte sequence `\xd0p` (an incomplete two-byte UTF-8
sequence) reaches the Python layer:

```
 ./bin/lldb -b -o $'breakpoint set -P \xd0p -f main.cpp' ./bin/lldb
...
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/
Stack dump:
 #4 PythonDictionary::GetItem(PythonObject const&) const
 #6 PythonDictionary::GetItemForKey(PythonObject const&) const
 #7 PythonObject::ResolveNameWithDictionary(StringRef, PythonDictionary const&)
 #9 ScriptedPythonInterface::CreatePluginObject<...>(...)
```

`ResolveNameWithDictionary` builds a `PythonString` from the class name

    [41 lines not shown]
DeltaFile
+24-0lldb/unittests/ScriptInterpreter/Python/PythonDataObjectsTests.cpp
+1-1lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
+25-12 files

LLVM/project 8e85d1flldb/packages/Python/lldbsuite/test gdbclientutils.py, lldb/test/API/macosx/expedited-stack-memory TestExpeditedStackMemory.py main.c

[lldb][test] Add expedited-stack-memory backtrace/locals packet test (#205897)

Add a Darwin API test that checks which gdb-remote packets lldb sends
while
inspecting the stack at a public stop, using the gdb-remote packet log
(the
same approach as TestExpeditedThreadPCs.py).

debugserver expedites the frame-pointer backchain in the `jThreadsInfo`
reply
at a public stop and lldb caches it, so:

- A backtrace (`GetNumFrames` + `GetFrameAtIndex` over every frame)
sends no
packets at all. With the memory cache disabled it must read the
backchain
frame by frame, which confirms the test exercises the unwinder's memory
    reads.


    [17 lines not shown]
DeltaFile
+279-0lldb/test/API/macosx/expedited-stack-memory/TestExpeditedStackMemory.py
+88-0lldb/test/API/macosx/expedited-stack-memory/main.c
+50-2lldb/packages/Python/lldbsuite/test/gdbclientutils.py
+3-0lldb/test/API/macosx/expedited-stack-memory/Makefile
+420-24 files

LLVM/project 8470dfblldb/source/Expression DWARFExpression.cpp, lldb/unittests/Expression DWARFExpressionTest.cpp

[lldb] Guard DW_OP_convert against null DWARF unit and empty stack (#207008)

`Evaluate_DW_OP_convert` dereferenced `eval_ctx.dwarf_cu` (the
`DWARFExpression` Delegate) whenever the operand DIE offset was
non-zero,
and unconditionally read `eval_ctx.stack.back()`.  When a DWARF
expression is evaluated without a DWARF unit (as the
lldb-dwarf-expression-fuzzer does), two operand shapes crash:

- `DW_OP_convert` with a non-zero offset calls
  `dwarf_cu->GetDIEBitSizeAndSign(...)` on a null Delegate.
- `DW_OP_convert` with nothing on the stack reads the back of an empty
  vector.

The unit test feeds both with `dwarf_cu == nullptr` and crashes:

```
[ RUN      ] DWARFExpression.DW_OP_convert
 #2 SignalHandler(int, __siginfo*, void*)

    [15 lines not shown]
DeltaFile
+13-0lldb/unittests/Expression/DWARFExpressionTest.cpp
+3-0lldb/source/Expression/DWARFExpression.cpp
+16-02 files

LLVM/project 65bbeffmlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp, mlir/test/Conversion/SPIRVToLLVM gl-ops-to-llvm.mlir

[mlir][SPIR-V] Add SPIRVToLLVM conversion for GL.FClamp/SClamp/UClamp (#203831)

Lower the GLSL clamp ops as nested min/max following `min(max(x, y), z)`

---------

Co-authored-by: Igor Wodiany <dev at wodiany.com>
DeltaFile
+36-0mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
+26-0mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+62-02 files

LLVM/project 334eb77mlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp, mlir/test/Conversion/SPIRVToLLVM gl-ops-to-llvm.mlir cl-ops-to-llvm.mlir

[mlir][SPIR-V] Add SPIRVToLLVM conversions for GL.FMix and CL.mix (#206935)
DeltaFile
+51-1mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+26-0mlir/test/Conversion/SPIRVToLLVM/gl-ops-to-llvm.mlir
+20-0mlir/test/Conversion/SPIRVToLLVM/cl-ops-to-llvm.mlir
+97-13 files

LLVM/project 0efe9d7clang/lib/AST Type.cpp, clang/lib/CodeGen CodeGenModule.cpp

[clang][AMDGPU] Clean-up handling of named barrier type

- Do not allow the type in struct fields. This is more like a handle/resource than a real type. It does not follow the traditional C++ object model, and using it in a struct field can do some weird things if you instantiate too many of them.
- Use a `hip_barrier` LangAS for this type that currently maps to the local AS. This allows easy switching to the barrier AS in a future patch.

Alternative to #195612, see also #195613
DeltaFile
+23-14clang/test/CodeGenHIP/amdgpu-barrier-type.hip
+13-1clang/lib/AST/Type.cpp
+9-1clang/lib/Sema/SemaDecl.cpp
+6-0clang/lib/CodeGen/CodeGenModule.cpp
+5-0clang/test/SemaOpenCL/amdgpu-barrier.cl
+5-0clang/test/SemaHIP/amdgpu-barrier.hip
+61-1616 files not shown
+89-2022 files

LLVM/project 26e2b67llvm/include/llvm/Analysis ModuleSummaryAnalysis.h, llvm/lib/Analysis StackSafetyAnalysis.cpp ModuleSummaryAnalysis.cpp

[NPM] Port ImmutableModuleSummaryAnalysis to NPM
DeltaFile
+29-0llvm/include/llvm/Analysis/ModuleSummaryAnalysis.h
+5-2llvm/lib/Analysis/StackSafetyAnalysis.cpp
+2-0llvm/lib/Passes/PassRegistry.def
+1-0llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
+37-24 files

LLVM/project 818fe1fllvm/include/llvm/Analysis ModuleSummaryAnalysis.h

provide default nullptr to Index
DeltaFile
+1-1llvm/include/llvm/Analysis/ModuleSummaryAnalysis.h
+1-11 files

LLVM/project 04157a3llvm/include/llvm/CodeGen UnreachableBlockElim.h, llvm/lib/Target/AMDGPU AMDGPU.h GCNPreRALongBranchReg.h

[NPM] Make few more passes Required
DeltaFile
+4-4llvm/lib/Target/AMDGPU/AMDGPU.h
+2-2llvm/include/llvm/CodeGen/UnreachableBlockElim.h
+1-1llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
+1-1llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
+1-1llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
+1-1llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
+10-1014 files not shown
+24-2420 files

LLVM/project 831ad2elibc/hdr/types struct_ipv6_mreq.h CMakeLists.txt, libc/include/llvm-libc-macros netinet-in-macros.h

[libc] Add struct ipv6_mreq and IPv6 socket options (#206448)

This patch adds struct ipv6_mreq and defines various IPv6 socket option
macros in <netinet/in.h>. I've also moved the existing option
definitions to the yaml file.

Assisted by Gemini.
DeltaFile
+44-0libc/include/netinet/in.yaml
+26-0libc/hdr/types/struct_ipv6_mreq.h
+24-0libc/include/llvm-libc-types/struct_ipv6_mreq.h
+9-0libc/hdr/types/CMakeLists.txt
+0-8libc/include/llvm-libc-macros/netinet-in-macros.h
+7-0libc/test/src/netinet/in_test.cpp
+110-83 files not shown
+113-89 files

LLVM/project b81a4c1llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU s-barrier.ll

[AMDGPU] Fix s.barrier.init/signal.var member count mask (#207660)

The count was shifted before masking, so bits above the low 6 could leak
past the member count field in M0
DeltaFile
+76-0llvm/test/CodeGen/AMDGPU/s-barrier.ll
+2-2llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+78-22 files

LLVM/project a0b14a1clang/unittests/Lex PPMemoryAllocationsTest.cpp, llvm/include/llvm/Support Allocator.h PerThreadBumpPtrAllocator.h

Revert "[Allocator] Drop RedZoneSize (non-sanitizer) and BytesAllocated membe…"

This reverts commit ca59c69132eef55cc42bf8854706590dfddf5584.
DeltaFile
+28-19llvm/include/llvm/Support/Allocator.h
+47-0llvm/unittests/ADT/ConcurrentHashtableTest.cpp
+12-0llvm/unittests/DebugInfo/MSF/MappedBlockStreamTest.cpp
+4-7clang/unittests/Lex/PPMemoryAllocationsTest.cpp
+10-0llvm/include/llvm/Support/PerThreadBumpPtrAllocator.h
+5-3llvm/unittests/Support/PerThreadBumpPtrAllocatorTest.cpp
+106-2911 files not shown
+130-3817 files

LLVM/project 46367bbllvm/test/CodeGen/X86 ucmp.ll vector-reduce-ctpop.ll

[X86] Attempt to narrow XMM->i64 (v)movq -> (v)movd if the upper 32-bits are known to be zero (#207615)

Add a custom 'X86upperzero' tablegen pattern to match vectors where the
upper half bits of every element is known zero.

Saves 1 byte by using (V)MOVD instead of (V)MOVQ - and avoids
differences in X86/X64 codegen that was bloating diffs in some upcoming
VECREDUCE_ADD work.

I've added an extra psadbw.ll test to ensure that the extractstore
pattern isn't being affected.

Cleanup for the upcoming VECREDUCE_ADD handling which will be using
PSADBW more aggressively (v2i64 result type but only 16 active bits for
element).
DeltaFile
+190-188llvm/test/CodeGen/X86/ucmp.ll
+21-21llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+16-16llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
+30-2llvm/test/CodeGen/X86/psadbw.ll
+10-10llvm/test/CodeGen/X86/vector-reduce-add-zext.ll
+8-8llvm/test/CodeGen/X86/divrem-by-select.ll
+275-24510 files not shown
+330-26916 files