[lldb] Immediately connect in webinspector-wasm (#196368)
Call `EnsureConnected` in the `PlatformWebInspectorWasm` ctor so the
platform reports being connected after selecting in. The lazy approach
resulted in confusion due to the "Connected: no" in the `platform
select` output:
```
(lldb) platform select webinspector-wasm
Platform: webinspector-wasm
Connected: no
```
[AMDGPU] Remove unused argument of DataExtractor constructor (NFC) (#196362)
`AddressSize` parameter is not used by `DataExtractor` and will be
removed in the future. See #190519 for more context.
[CIR][CUDA] Implement NVVM math builtins (fabs, ex2_approx) (#195663)
Replace errorNYI stubs with actual cir::LLVMIntrinsicCallOp calls for:
- __nvvm_fabs_f, __nvvm_fabs_d, __nvvm_fabs_ftz_f (+ f16/bf16 variants)
- __nvvm_ex2_approx_f, __nvvm_ex2_approx_d, __nvvm_ex2_approx_ftz_f
__nvvm_fabs_d maps to standard llvm.fabs (matching classic CodeGen),
while the rest map to their respective nvvm.* intrinsics.
Part of #179278
[offload] add tests for event synchronization (#193927)
This patch adds:
- a new kernel `void single_counter(int32_t init_loop, int32_t addend,
uint32_t *init_val, uint32_t *out)`
- a new test suite `olLaunchKernelSingleCounterSyncEventTest`, with two
tests
The test `SuccessSyncEvent` verifies whether `olSyncEvent(Event)` awaits
the completion of `Event`.
The test `SuccessTwoQueues` checks the correctness of the
synchronization between queues using events. Enqueueing the kernel on
the queue `Q1` should produce `Result1`, which is used as an initial
value for the queue `Q2`. Therefore, before executing any future work,
`Q2` should wait for the event `Event1`, which is created after
submitting work on `Q1`. The required synchronization is ensured by
`olWaitEvents(Q2, &Event1, 1)`. If `Q2` uses the value passed as
`Result1` before the work on `Q1` has completed, the result of the
kernel enqueued on `Q2` would be incorrect.
Add support for GenericARM. (#190221)
Uses `CIRGenItaniumCXXABI` when generating IR for the ABI target.
Co-authored-by: Justin A. Wilson <waj334 at gmsil.com>
[flang] Use __builtin_int for integer conversions (#195748)
Frontend inserted conversions may conflict with variable names.
Avoid this for integer conversions by using `__builtin_int` instead
of `int`.
Fixes #188879
[lldb] Audit DWARF 5 expression evaluator and add per-opcode tests (#196218)
Add a dedicated unit test for every standard DWARF 5 expression operator
(plus the GNU extensions in use), so each opcode in the evaluator's
switch has explicit coverage. Tests for opcodes that require execution
context not available in a standalone evaluation (process, frame,
compile unit, object address) assert that evaluation fails cleanly
rather than crashing.
This PR fixes one bug surfaced by the audit: DW_OP_deref_size only
rejected sizes greater than 8, not sizes greater than the target's
address size. The DWARF 5 spec requires the operand to be no larger than
the generic type. The new check returns a clean diagnostic instead of
silently dereferencing beyond the address-sized window on 32-bit
targets.
Assisted-by: Claude
[ASan] MSVC test compatibility fixes (#196319)
Fixes a few tests with the MSVC toolchain due to incompatibilities:
1. `asan_and_llvm_coverage_test.cpp`: Adds MSVC-specific linker flags
(/link /NODEFAULTLIB:libcmt ...) alongside the
existing clang-cl -Wl flags. It is probably better to convert these
later to substitution changes in `lit.cfg.py`, but that will require
upstreaming more test changes.
1. `debug_invalid_pointer_pair.cpp`: Marks the test `UNSUPPORTED: MSVC`
because `-mllvm` and codegen isn't supported with MSVC.
1. `debug_memcpy_overlap.cpp` : Adds `/Oi` (enable intrinsics) when
building with MSVC, so `memcpy` is emitted as a call
that ASan can intercept.
[Analysis] use forward DFS in `isEphemeralValueOf` (#196232)
Resolves #128152.
The old algorithm runs a backward DFS from `I` and marks `E` as
ephemeral iff every user of `E` has already been visited. This fails
when `E` has a user that the backward walk never reaches. Switch to a
forward DFS from `E` so that ephemeral values are identified when the
condition has other uses off the assume chain.
[PassManager] Mark Loop RequireAnalysis as OptionalPassInfoMixin (#196345)
\#192120 marked this as RequiredPassInfoMixin, deviating from previous
behavior. This is probably fine for Function/Module analyses, but
doesn't work well for loop analyses in the case that we have a loop in
an optnone function that is not in LCSSA. The LCSSA pass will not run
because it is optional, the analysis will get computed, and then we
assert because the loop is out of LCSSA at the end of the LPM.
Restore the old behavior of just not marking the pass as required as it
seems reasonable enough.
[flang] Implement -Wno-<warning> flags for driver diagnostics
Utilize clang::ProcessWarningOptions function to process -Wno-... options.
This has the side effect that without additional changes it would cause
driver warnings to become errors with -Werror. That would be a change
from the existing behavior, so make sure that these warnings remain
uneffected.
Modify the diagnostic emitter to add the disabling option at the end of
the emitted diagnostic.
Fixes https://github.com/llvm/llvm-project/issues/195921
[libclc] Fix using normalized triple for the directory name (#194607)
Summary:
libclc needs to normalize triples, mostly on account of the fact that
things like spv and clspv aren't real triples but are used anyway. That
is, we convert the user-value to whatever is passed to `--target=`. The
problem is that we were not using the normal triple for the installation
directory, so something like `spirv64-mesa32-unknown` would be installed
in `spirv64--`.
This *might* have the side effect of putting these in
`spirv64-unknown-unknown`. I actually do not know if that's a problem
with the clang handling, I'll double check.
[MSP430] Compute c+1 at the operand bit width in EmitCMP (#195892)
EmitCMP folds `c CMP rhs` into `rhs CMP' c+1` for four condition codes.
The `c+1` must wrap modulo the i16 operand width, but the current code
does `DAG.getConstant(C->getSExtValue() + 1, dl, MVT::i16)`:
sign-extending to `int64_t`, adding there, then handing the result to
the unsigned
`getConstant(uint64_t, ..., MVT::i16)` overload.
For constants with bit 15 set the negative `int64_t` is reinterpreted as
a huge `uint64_t`, which
trips the `isUIntN(16, val)` assertion in the APInt constructor under
`LLVM_ENABLE_ASSERTIONS` and yields an APInt with non-zero bits past its
declared width otherwise.
Switching to `DAG.getSignedConstant(C->getSExtValue() + 1, ...)` routes
through the signed `APInt` constructor, which checks `isIntN(16, val)`
and accepts the negative `c+1` produced when the high bit is set. The
four EmitCMP fold branches (SETUGE, SETULT, SETGE, SETLT) are updated
identically.
