LLVM/project 5b95e89 — llvm/lib/Target/VE VETargetMachine.cpp VEISelDAGToDAG.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+8-1llvm/lib/Target/VE/VE.h
+5-1llvm/lib/Target/VE/VEISelDAGToDAG.cpp
+1-1llvm/lib/Target/VE/VETargetMachine.cpp
+14-33 files

LLVM/project dd61e45 — .github/workflows llvm-bugs.yml

Update dependency node to v26 (#237800)

This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
| [node](https://redirect.github.com/actions/node-versions) | uses-with
| major | `24` → `26` |
DeltaFile
+1-1.github/workflows/llvm-bugs.yml
+1-11 files

LLVM/project 53b8c50 — .github/workflows release-binaries.yml

Update dependency python to v3.15.2 (#237799)

This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
| [python](https://redirect.github.com/actions/python-versions) |
uses-with | patch | `3.15.1` → `3.15.2` |
DeltaFile
+1-1.github/workflows/release-binaries.yml
+1-11 files

LLVM/project 7c9511f — llvm/test/CodeGen/X86 ushl_sat_vec-512.ll sshl_sat_vec-512.ll

Merge branch 'users/void/asm-_Complex-bugs' into users/void/asm-mask-reg-output
DeltaFile
+462-240llvm/test/CodeGen/X86/sshl_sat_vec.ll
+346-163llvm/test/CodeGen/X86/ushl_sat_vec.ll
+437-0llvm/test/CodeGen/X86/sshl_sat_vec-256.ll
+347-0llvm/test/CodeGen/X86/ushl_sat_vec-256.ll
+277-0llvm/test/CodeGen/X86/sshl_sat_vec-512.ll
+206-0llvm/test/CodeGen/X86/ushl_sat_vec-512.ll
+2,075-403135 files not shown
+6,494-1,226141 files

LLVM/project 1293be1 — llvm/test/CodeGen/X86 ushl_sat_vec-512.ll sshl_sat_vec-512.ll

Merge branch 'users/void/asm-mask-reg-output' into users/void/asm-goto-_Complext-types
DeltaFile
+462-240llvm/test/CodeGen/X86/sshl_sat_vec.ll
+346-163llvm/test/CodeGen/X86/ushl_sat_vec.ll
+437-0llvm/test/CodeGen/X86/sshl_sat_vec-256.ll
+347-0llvm/test/CodeGen/X86/ushl_sat_vec-256.ll
+277-0llvm/test/CodeGen/X86/sshl_sat_vec-512.ll
+206-0llvm/test/CodeGen/X86/ushl_sat_vec-512.ll
+2,075-403135 files not shown
+6,494-1,226141 files

LLVM/project a429736 — llvm/test/CodeGen/X86 ushl_sat_vec-512.ll sshl_sat_vec-512.ll

Merge branch 'main' into users/void/asm-_Complex-bugs
DeltaFile
+462-240llvm/test/CodeGen/X86/sshl_sat_vec.ll
+346-163llvm/test/CodeGen/X86/ushl_sat_vec.ll
+437-0llvm/test/CodeGen/X86/sshl_sat_vec-256.ll
+347-0llvm/test/CodeGen/X86/ushl_sat_vec-256.ll
+277-0llvm/test/CodeGen/X86/sshl_sat_vec-512.ll
+206-0llvm/test/CodeGen/X86/ushl_sat_vec-512.ll
+2,075-403135 files not shown
+6,494-1,226141 files

LLVM/project c723356 — compiler-rt/test/builtins/Unit mulxc3_test.c mulsc3_test.c, libc/config/gpu/spirv entrypoints.txt

[compiler-rt][libc][GPU] Fix 7 builtin unit test build failure for spirv64 targets (#236324)

When building compiler-rt builtin unit test for spirv64 target, we
encountered a bunch of build failure due to missing symbols from libm
and libc. This PR adds part of required symbols needed by those tests
which can make 7 failed unit tests to build pass.
Using following command to build llvm-project:
cmake ../llvm -G Ninja -DLLVM_ENABLE_PROJECTS="clang"
-DRUNTIMES_spirv64-unknown-unknown_LLVM_ENABLE_RUNTIMES="compiler-rt;libc"
-DLLVM_RUNTIME_TARGETS="default;spirv64-unknown-unknown"
-DRUNTIMES_spirv64-unknown-unknown_COMPILER_RT_INCLUDE_TESTS=ON
-DRUNTIMES_spirv64-unknown-unknown_COMPILER_RT_EMULATOR=/bin/true
ninja all
ninja check-compiler-rt-spirv64-unknown-unknown
Before the fix, the build result was:
Total Discovered Tests: 275
  Unsupported: 125 (45.45%)
  Passed     : 123 (44.73%)
  Failed     :  27 (9.82%)

    [14 lines not shown]
DeltaFile
+18-0libc/config/gpu/spirv/entrypoints.txt
+13-2compiler-rt/test/builtins/Unit/lit.cfg.py
+1-1compiler-rt/test/builtins/Unit/mulxc3_test.c
+1-1compiler-rt/test/builtins/Unit/mulsc3_test.c
+1-1compiler-rt/test/builtins/Unit/muldc3_test.c
+1-1compiler-rt/test/builtins/Unit/divxc3_test.c
+35-62 files not shown
+37-88 files

LLVM/project 08398b1 — llvm/docs Contributing.md

Revise patch submission guidelines in Contributing.md (#235729)

There have been a few people who have been confused by the single commit
rule in this document.
Meaning they think they need to rebase/squash on every commit. This
hopefully clarifies it is only for the first commit. I also took the
liberty while in this file to just remove some duplication and link to
the actual areas that provide more detail.
DeltaFile
+3-2llvm/docs/Contributing.md
+3-21 files

LLVM/project 37a8dd4 — bolt/lib/Rewrite RewriteInstance.cpp

[BOLT] Avoid temporary sections during symbol discovery (#237150)

`discoverFileObjects()` constructs a temporary `BinarySection` for every
candidate symbol merely to test allocation flags. This is expensive for
binaries with tens of millions of symbols (e.g. large RISC-V binaries
linked with `--emit-relocs,` which retain many local symbols referenced
by relocations needed to support linker relaxation). Inspect the ELF
section flags directly and reuse the retrieved symbol flags.
DeltaFile
+8-3bolt/lib/Rewrite/RewriteInstance.cpp
+8-31 files

LLVM/project c3afab1 — llvm/lib/Transforms/Utils SimplifyCFG.cpp, llvm/test/Transforms/PhaseOrdering single-iteration-loop-oz.ll

[SimplifyCFG] Thread loop header edges when the loop remains canonical (#232541)

When NeedCanonicalLoop is set, foldCondBranchOnValueKnownInPredecessor
rejected all loop headers to avoid redirecting a backedge into the
middle
of a loop and forming a cycle that bypasses the header.

Allow threading when every threaded predecessor is dominated by the
header and the destination cannot reach those predecessors without
passing through the header (e.g. a latch edge branching to a loop exit).
DeltaFile
+107-0llvm/test/Transforms/SimplifyCFG/thread-loop-header-latch-to-exit.ll
+43-8llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+49-0llvm/test/Transforms/PhaseOrdering/single-iteration-loop-oz.ll
+199-83 files

LLVM/project 7ce6061 — clang/lib/Headers __clang_hip_math.h, clang/test/Headers amdgcn_openmp_device_math.c

[clang][OpenMP] Don't declare HIP's ::min and ::max in an OpenMP TU (#225162)

`__clang_hip_math.h` declares templated `::min` and `::max` as a CUDA
source-compatibility extension. `openmp_wrappers/math.h` includes that
header inside the `amdgcn` declare variant, so the amdgcn device pass of
an *OpenMP* translation unit — ordinary C++ that never opted into HIP or
CUDA — also gets them.

An unqualified `min(a, b)` after `using namespace std` is then ambiguous
against `std::min`, so the TU fails to compile in the device pass while
compiling fine in the host pass:

```c++
#include <algorithm>
using namespace std;
long f(long a, long b) { return min(a, b); }   // error: call to 'min' is ambiguous
```

`::min` and `::max` are not names the implementation may reserve in a

    [17 lines not shown]
DeltaFile
+47-6clang/test/Headers/amdgcn_openmp_device_math.c
+2-0clang/lib/Headers/__clang_hip_math.h
+49-62 files

LLVM/project 1d318ab — llvm/test/Transforms/SLPVectorizer/X86 sese-region-non-schedulable.ll

[SLP][NFC]Add extra test for SESE vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/237810
DeltaFile
+73-0llvm/test/Transforms/SLPVectorizer/X86/sese-region-non-schedulable.ll
+73-01 files

LLVM/project d228883 — llvm/lib/Target/AMDGPU AMDGPUAttributor.cpp

[NFC][AMDGPU] Don't create call site AACallEdges for direct calls (#237633)

`AAAMDGPUMinAGPRAlloc` and `AAAMDGPUNoLDSDMA` asked for a call site
`AACallEdges` for every call that is not an intrinsic, only to get its
callees. For a direct call whose callee has no callback metadata, that
callee is the only one, so use it directly, like `AACallEdgesFunction`
does since #232616. Calls to callback brokers still use `AACallEdges`,
because the broker also calls the callback target.

On a generated module with 2,001 functions and 15,986 calls,
`-passes=amdgpu-attributor` creates 2,001 instead of 11,987 abstract
attributes, and the median wall time goes from 95 ms to 84 ms.

This PR was assisted by AI but I reviewed all the changes.
DeltaFile
+36-27llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+36-271 files

LLVM/project 63dd23c — libcxx/docs/Status Cxx26Issues.csv, libcxx/include/__ranges lazy_split_view.h

[libc++][ranges] Implement LWG3904: `lazy_split_view::outer-iterator`'s const-converting constructor isn't setting `trailing_empty_` (#237550)

Copy `trailing_empty_` in `outer-iterator`'s const-converting
constructor. Previously, converting an iterator that points at the
trailing empty subrange (e.g. the second element of `"a,"` split by
`","`) made it compare equal to `default_sentinel`, so that subrange was
lost.

Fixes #105276
DeltaFile
+13-0libcxx/test/std/ranges/range.adaptors/range.lazy.split/range.lazy.split.outer/ctor.copy.pass.cpp
+1-1libcxx/include/__ranges/lazy_split_view.h
+1-1libcxx/docs/Status/Cxx26Issues.csv
+15-23 files

LLVM/project fe2fb5f — lld/MachO ICF.cpp, lld/test/MachO icf-safe-missing-addrsig.s icf-undef.s

[lld] Migrate away from PointerUnion::dyn_cast in ICF.cpp (NFC) (#234844)

PointerUnion::dyn_cast has been soft-deprecated in favor of
llvm::dyn_cast and llvm::dyn_cast_if_present.  This patch replaces it
with llvm::dyn_cast_if_present in ICF.cpp.  Note that
Relocation::referent can be null when an external relocation
references a symbol defined in a section that is not split into
subsections, such as __DATA,__objc_imageinfo, for which
ObjFile::parseSymbols leaves the entry in ObjFile::symbols as nullptr.

Assisted-by: Antigravity
DeltaFile
+18-0lld/test/MachO/icf-undef.s
+13-0lld/test/MachO/icf-safe-missing-addrsig.s
+2-2lld/MachO/ICF.cpp
+33-23 files

LLVM/project 31c42cc — llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoP.td

[RISCV][P-ext] Combine RISCVISD::PMULH_H_B0/PMULH_W_H0/MULH_H0 into a single ISD opcode. NFC

This matches how MHACC opcodes are implemented.
DeltaFile
+30-39llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+15-52llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+45-912 files

LLVM/project 385ba95 — llvm/include/llvm/TargetParser Host.h, llvm/lib/TargetParser Host.cpp

[Support][AArch64] detect more host CPU SME features. (#234870)

Add detaction for SME related features. The features align with the
handling in AArch64TargetInfo::computeFeatureLookup()
DeltaFile
+110-85llvm/lib/TargetParser/Host.cpp
+45-0llvm/unittests/TargetParser/Host.cpp
+5-0llvm/include/llvm/TargetParser/Host.h
+160-853 files

LLVM/project f0f690f — lld/MachO ICF.cpp, lld/test/MachO icf-regular-eh-frame.yaml

[lld][MachO] Don't collect FDEs twice in ICF (#236372)

`ld -r` emits __eh_frame as S_REGULAR instead of S_COALESCED, so ICF
treated it as foldable and collected each FDE again on top of its
function's unwind entry.

The test case was made by an LLM.
DeltaFile
+72-0lld/test/MachO/icf-regular-eh-frame.yaml
+12-10lld/MachO/ICF.cpp
+84-102 files

LLVM/project c897b99 — lld/MachO SyntheticSections.cpp, lld/test/MachO objc-category-merging-minimal.s

[lld][MachO] Drop dead inputs from __objc_methlist (#237185)

Category merging marks the method lists of merged categories and their
symbols dead, but they were still emitted by ObjCMethListSection, and
-map hit an assertion on their symbols.
DeltaFile
+10-1lld/test/MachO/objc-category-merging-minimal.s
+5-0lld/MachO/SyntheticSections.cpp
+15-12 files

LLVM/project 985f258 — llvm/lib/Target/AMDGPU AMDGPUAttributor.cpp

[NFC][AMDGPU] Don't create call site AACallEdges for direct calls

AAAMDGPUMinAGPRAlloc and AAAMDGPUNoLDSDMA asked for a call site AACallEdges for
every call that is not an intrinsic, only to get its callees. For a direct call
whose callee has no callback metadata, that callee is the only one, so use it
directly, like AACallEdgesFunction does since #232616. Calls to callback brokers
still use AACallEdges, because thebroker also calls the callback target.

On a generated module with 2,001 functions and 15,986 calls,
-passes=amdgpu-attributor creates 2,001 instead of 11,987 abstract attributes,
and the median wall time goes from 95 ms to 84 ms.

This PR was assisted by AI but I reviewed all the changes.
DeltaFile
+36-27llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+36-271 files

LLVM/project 322af98 — llvm/lib/Transforms/IPO AttributorAttributes.cpp

[NFC][Attributor] Reach fixpoint in call site AACallEdges for direct calls (#237632)

A direct call whose callee has no callback metadata only calls its
callee, so its call site `AACallEdges` cannot change after
initialization. Add the edge in initialize and reach a fixpoint there,
instead of updating the attribute twice to find out.
`AACallEdgesFunction` already skips the call site attribute for such
calls since #232616; both now share `getOnlyCallee()`.

Other attributes still create call site AACallEdges for direct calls,
e.g., `AAInterFnReachability` and the AMDGPU attributor. On a generated
module with 2,001 functions and 15,986 calls, this removes all updates
of call site `AACallEdges`. The total number of updates goes from
304,263 to 272,291 with `-passes=attributor`, from 207,815 to 175,843
with `-passes=attributor-light`, and from 35,977 to 16,005 with
`-passes=amdgpu-attributor`. The wall time does not change measurably on
that module, because these updates are cheap.

This PR was assisted by AI but I reviewed all the changes.
DeltaFile
+20-2llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+20-21 files

LLVM/project 701670d — llvm/include/llvm/Transforms/IPO Attributor.h, llvm/lib/Target/AMDGPU AMDGPUAttributor.cpp

[NFC][Attributor] Remove "See AbstractAttribute::..." comments

Most overridden methods have a comment like
`/// See AbstractAttribute::initialize(...).` that only points to the
base class declaration. Remove them, including those in OpenMPOpt and
AMDGPUAttributor.

This PR was assisted by AI but I reviewed all the changes.
DeltaFile
+0-329llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+0-154llvm/include/llvm/Transforms/IPO/Attributor.h
+0-19llvm/lib/Transforms/IPO/OpenMPOpt.cpp
+0-13llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+0-5154 files

LLVM/project 9695059 — clang/lib/CodeGen CGStmt.cpp, clang/test/CodeGen/X86 inline-asm-output-tbaa.c

[Clang][CodeGen] Update the TBAA info for potential aliases (#236701)

The stores were tagged as "unsigned long", but loads were tagged as
"float". TBAA reports no aliases if the store and loads went through
different pointers and GVN forwards a stale value.

Fix this by giving the "store" the "omnipotent char" tag, so that TBAA
treats it as aliasing every access to the destination's members. Using
that tag over "Dest.getTBAAInfo()" because it doesn't depend on how
CodeGenTBAA happens to tag struct and complex types.

Assisted-by: Claude for testcases.
DeltaFile
+21-0clang/test/CodeGen/X86/inline-asm-output-tbaa.c
+5-1clang/lib/CodeGen/CGStmt.cpp
+26-12 files

LLVM/project 7be0cc1 — llvm/test/CodeGen/AMDGPU memintrinsic-unroll.ll amdgcn.bitcast.832bit.ll

Rebase, improvements

Created using spr 1.3.7
DeltaFile
+88,705-91,244llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+25,383-26,405llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+9,311-9,381llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+8,998-9,209llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+8,016-8,194llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+7,335-7,432llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+147,748-151,8653,947 files not shown
+398,246-335,7183,953 files

LLVM/project 75f7ac6 — llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/AArch64 dead-vector-loop-trip-count.ll

[LV] Use loop guards for the maximum trip count from the SCEV range. (#237792)

Apply loop guards before computing the unsigned range, so the bound used
to clamp the VF and select the IC is as tight as possible.

This avoids choosing excessive VF/IC for loops where bounds refine the
max trip counts.
DeltaFile
+6-8llvm/test/Transforms/LoopVectorize/AArch64/dead-vector-loop-trip-count.ll
+2-1llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+8-92 files

LLVM/project 98740cc — llvm/test/Transforms/SLPVectorizer/X86 vector-call-nonpow2-revec.ll vector-call-linear-parts.ll

[SLP][NFC]Add extra tests for linear pointers calls vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/237795
DeltaFile
+141-0llvm/test/Transforms/SLPVectorizer/X86/vector-call-linear-parts.ll
+78-0llvm/test/Transforms/SLPVectorizer/X86/vector-call-nonpow2-revec.ll
+219-02 files

LLVM/project e5fc6fb — llvm/lib/Transforms/Vectorize LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize outer-loop-scev-predicates.ll

[LV] Generate SCEV runtime checks for outer loops. (#237780)

Update GenerateRTChecks::create to generate SCEV predicate checks for
outer loops as well. Memory checks are not supported yet, but we must
respect the SCEV predicates added to PSE.
DeltaFile
+104-0llvm/test/Transforms/LoopVectorize/outer-loop-scev-predicates.ll
+18-12llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+122-122 files

LLVM/project 70a35c3 — llvm/test/Transforms/LoopVectorize/AArch64 dead-vector-loop-trip-count.ll

[LV] Add tests with trip counts known less than VF x UF. (#237777)

Add tests where trip counts are known to be less than VF x UF, but we
still pick a VF that exceeds the trip count.
DeltaFile
+183-0llvm/test/Transforms/LoopVectorize/AArch64/dead-vector-loop-trip-count.ll
+183-01 files

LLVM/project bb762db — flang/lib/Lower/Support ReductionProcessor.cpp, llvm/lib/Target/Sparc DelaySlotFiller.cpp

Rebase, improvements

Created using spr 1.3.7
DeltaFile
+405-387flang/lib/Lower/Support/ReductionProcessor.cpp
+379-392llvm/lib/Target/Sparc/DelaySlotFiller.cpp
+549-179llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+462-240llvm/test/CodeGen/X86/sshl_sat_vec.ll
+346-163llvm/test/CodeGen/X86/ushl_sat_vec.ll
+437-0llvm/test/CodeGen/X86/sshl_sat_vec-256.ll
+2,578-1,361433 files not shown
+15,721-3,994439 files

LLVM/project 15204b5 — llvm/lib/Transforms/Scalar GVN.cpp, llvm/test/Transforms/GVN invariant.group.ll metadata.ll

[GVN] Preserve per-bit `poison` and provenance when forwarding a load
DeltaFile
+59-52llvm/test/Transforms/GVN/load-poison.ll
+102-1llvm/lib/Transforms/Scalar/GVN.cpp
+26-27llvm/test/Transforms/GVN/PRE/rle.ll
+7-7llvm/test/Transforms/GVN/rle-coerced-noalias.ll
+6-4llvm/test/Transforms/GVN/metadata.ll
+3-2llvm/test/Transforms/GVN/invariant.group.ll
+203-931 files not shown
+206-957 files