LLVM/project 0f60cdflld/ELF Relocations.cpp SyntheticSections.h, lld/ELF/Arch AArch64.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+32-44lld/ELF/Relocations.cpp
+29-5lld/ELF/SyntheticSections.h
+8-24lld/ELF/Arch/AArch64.cpp
+5-15lld/ELF/Writer.cpp
+5-1lld/ELF/SyntheticSections.cpp
+2-0lld/ELF/InputSection.cpp
+81-891 files not shown
+82-897 files

LLVM/project 0eb9c6clld/ELF Relocations.cpp SyntheticSections.h, lld/ELF/Arch AArch64.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+32-44lld/ELF/Relocations.cpp
+8-24lld/ELF/Arch/AArch64.cpp
+25-2lld/ELF/SyntheticSections.h
+2-1lld/ELF/Writer.cpp
+2-0lld/ELF/InputSection.cpp
+1-0lld/ELF/Relocations.h
+70-711 files not shown
+70-727 files

LLVM/project e3905a4llvm/lib/Transforms/Instrumentation MemProfUse.cpp, llvm/test/Transforms/PGOProfile memprof_annotate_indirect_call.test

[MemProf] Merge all callee guids for indirect call VP metadata (#170964)

When matching memprof profiles, for indirect calls we use the callee
guids recorded on callsites in the profile to synthesize indirect call
VP metadata when none exists. However, we only do this for the first
matching CallSiteEntry from the profile.

In some case there can be multiple, for example when the current
function was eventually inlined into multiple callers. Profile
generation propagates the CallSiteEntry from those callers into the
inlined callee's profile as it may not yet have been inlined in the
new compile.

To capture all of these potential indirect call targets, merge callee
guids across all matching CallSiteEntries.
DeltaFile
+40-41llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
+14-2llvm/test/Transforms/PGOProfile/memprof_annotate_indirect_call.test
+54-432 files

LLVM/project 1e16f4eflang/include/flang/Optimizer/Builder FIRBuilder.h, flang/lib/Optimizer/Builder FIRBuilder.cpp

[flang] add simplification for ProductOp intrinsic (#169575)

Add simplification for `ProductOp`, by implementing support for
`ReductionConversion` and adding it to the pattern list in
`SimplifyHLFIRIntrinsics` pass.

Closes:
https://github.com/issues/recent?issue=llvm%7Cllvm-project%7C169433

---------

Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>
DeltaFile
+457-0flang/test/HLFIR/simplify-hlfir-intrinsics-product.fir
+49-0flang/lib/Optimizer/HLFIR/Transforms/SimplifyHLFIRIntrinsics.cpp
+20-0flang/lib/Optimizer/Builder/FIRBuilder.cpp
+10-0flang/include/flang/Optimizer/Builder/FIRBuilder.h
+536-04 files

LLVM/project d17f3b5compiler-rt/test/xray/TestCases/Posix basic-filtering.cpp fdr-mode.cpp

[XRay] Disable two more tests on armhf

Similar to d6f92050c0c2f60e78f3c8bcf557c5e69b025d7a. Needed now that
these tests are actually running more broadly.
DeltaFile
+2-0compiler-rt/test/xray/TestCases/Posix/basic-filtering.cpp
+1-0compiler-rt/test/xray/TestCases/Posix/fdr-mode.cpp
+3-02 files

LLVM/project 2ba52c1clang/test/Headers __clang_hip_math.hip, llvm/test/CodeGen/X86 shift-i512.ll bitcnt-big-integer.ll

reb

Created using spr 1.3.7
DeltaFile
+2,027-185llvm/test/CodeGen/X86/shift-i512.ll
+1,563-413llvm/test/CodeGen/X86/bitcnt-big-integer.ll
+1,005-956clang/test/Headers/__clang_hip_math.hip
+0-1,298openmp/runtime/src/include/omp_lib.h.var
+1,298-0openmp/module/omp_lib.h.var
+0-1,183openmp/runtime/src/include/omp_lib.F90.var
+5,893-4,035725 files not shown
+21,447-12,890731 files

LLVM/project 41363b4clang/unittests/Analysis/FlowSensitive MockHeaders.cpp

[NFC] [FlowSensitive] Add mock unique_ptr header (#170942)

DeltaFile
+90-0clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp
+90-01 files

LLVM/project bb79b35clang/include/clang/Analysis/FlowSensitive/Models UncheckedStatusOrAccessModel.h, clang/lib/Analysis/FlowSensitive/Models UncheckedStatusOrAccessModel.cpp

[FlowSensitive] [StatusOr] [11/N] Assume const accessor calls are stable (#170935)

This is not necessarily correct, but prevents us from flagging lots of
false positives because code usually abides by this.
DeltaFile
+173-0clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+168-0clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
+3-1clang/include/clang/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.h
+344-13 files

LLVM/project b802fdbllvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVISelLowering.h

[RISCV] Remove unnecesary override of getVectorTypeBreakdownForCallingConv. NFC (#171155)

There used to be code in here to make i32 legal on RV64, but it was
removed.

Also remove unnecessary temporary variable from
getRegisterTypeForCallingConv.
DeltaFile
+1-12llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+0-6llvm/lib/Target/RISCV/RISCVISelLowering.h
+1-182 files

LLVM/project 324d589utils/bazel/llvm-project-overlay/libc BUILD.bazel

Fix bazel build for 2a5420ea5184a334c2af9f2f9f43de4dfc6b76d3
DeltaFile
+9-16utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+9-161 files

LLVM/project 7ecc9eellvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/lib/Target/X86/GISel X86LegalizerInfo.cpp

[X86][GlobalISel] Set Dst register correctly when narrowing G_ICMP (#169947)

Due to untested branch in #119335

Fixes #167326
DeltaFile
+172-6llvm/test/CodeGen/X86/isel-icmp.ll
+1-1llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+1-0llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+174-73 files

LLVM/project 863a4e4llvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/test/Verifier/AMDGPU test-cvt-fp4f6f8-immarg-ranges.ll

[AMDGPU] Add argument range annotations to intrinsics where applicable (#170958)

This commit adds annotations to AMDGPU intrinscis that take arguments
which are documented to lie within a specified range, ensuring that
invalid instances of these intrinsics don't pass verification.

(Note that certain intrinsics that could have range annothations don't,
as their existing behavior is to clamp out-of-range values silently.)

Disclaimer: tests generated by LLM (code is mine)
DeltaFile
+147-0llvm/test/Verifier/AMDGPU/test-cvt-fp4f6f8-immarg-ranges.ll
+10-8llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+157-82 files

LLVM/project 5d53085clang/unittests/Analysis/FlowSensitive MockHeaders.cpp

[NFC] [FlowSensitive] Fix missing namespace in MockHeaders (#170954)

This happened to work because we were missing both a namespace close and
open and things happened to be included in the correct order.
DeltaFile
+4-0clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp
+4-01 files

LLVM/project 56fdc61mlir/lib/Dialect/SCF/IR SCF.cpp

[MLIR] Apply clang-tidy fixes for llvm-qualified-auto in SCF.cpp (NFC)
DeltaFile
+4-4mlir/lib/Dialect/SCF/IR/SCF.cpp
+4-41 files

LLVM/project 83fd2c9llvm/tools/dsymutil dsymutil.cpp

[dsymutil] Remove spurious exit when falling back to fat64 header (#171189)

In #118898 I changed dsymutil to emit a warning instead of an error when
exceeding the 4GB limit for a slice and automatically fall back to using
the fat64 header. However, while doing so, I forgot to remove the return
which defeats the whole purpose.

rdar://140998416
DeltaFile
+0-1llvm/tools/dsymutil/dsymutil.cpp
+0-11 files

LLVM/project 85194c0utils/bazel/llvm-project-overlay/mlir BUILD.bazel

Fix bazel build for 5dbd049662001535a475cdb7d290dfb63a0515fc
DeltaFile
+11-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+11-01 files

LLVM/project ba7cf49lld/ELF Relocations.cpp SyntheticSections.h, lld/ELF/Arch AArch64.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.5

[skip ci]
DeltaFile
+32-44lld/ELF/Relocations.cpp
+24-1lld/ELF/SyntheticSections.h
+1-13lld/ELF/Arch/AArch64.cpp
+2-0lld/ELF/InputSection.cpp
+1-0lld/ELF/Relocations.h
+0-1lld/ELF/SyntheticSections.cpp
+60-596 files

LLVM/project 7027c91lld/ELF Relocations.cpp SyntheticSections.h, lld/ELF/Arch AArch64.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.5
DeltaFile
+32-44lld/ELF/Relocations.cpp
+8-24lld/ELF/Arch/AArch64.cpp
+25-2lld/ELF/SyntheticSections.h
+2-1lld/ELF/Writer.cpp
+2-0lld/ELF/InputSection.cpp
+0-1lld/ELF/SyntheticSections.cpp
+69-721 files not shown
+70-727 files

LLVM/project 9848692utils/bazel/llvm-project-overlay/llvm BUILD.bazel

Fix bazel build for 979462c876c96c3023c0b5e42c8eda88323fd745
DeltaFile
+2-12utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+2-121 files

LLVM/project 3ccd672llvm/lib/Target/AMDGPU SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU inlineasm-mismatched-size-error.ll

[AMDGPU] Fix a crash when a bool variable is used in inline asm (#171004)

Fixes SWDEV-570184.
DeltaFile
+24-0llvm/test/CodeGen/AMDGPU/inlineasm-mismatched-size-error.ll
+4-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+28-02 files

LLVM/project 9d8fda3clang/lib/Headers __clang_cuda_runtime_wrapper.h

clang-format
DeltaFile
+1-1clang/lib/Headers/__clang_cuda_runtime_wrapper.h
+1-11 files

LLVM/project b8a50c7clang/lib/Headers __clang_hip_math.h, clang/test/Headers __clang_hip_math.hip

clang/HIP: Avoid using ocml logb (#171186)

We have special case handling for the logb builtins, so use them.
DeltaFile
+110-40clang/test/Headers/__clang_hip_math.hip
+2-2clang/lib/Headers/__clang_hip_math.h
+112-422 files

LLVM/project b966209clang/test/Headers cuda_with_openmp.cu

Test x86 and systemz hosts
DeltaFile
+2-1clang/test/Headers/cuda_with_openmp.cu
+2-11 files

LLVM/project 80fa3ccclang/docs SanitizerCoverage.rst

[sancov] Refreshed CLI for sancov in docs.
DeltaFile
+30-10clang/docs/SanitizerCoverage.rst
+30-101 files

LLVM/project 3f3d679llvm/test/tools/sancov diff-different-files.test diff-same-file.test, llvm/tools/sancov sancov.cpp Opts.td

[sancov] Add -diff option to compute set difference of sancov files

Add a new -diff action that computes the difference between two sancov
coverage files (A - B) and writes the result to a new .sancov file.

The option takes exactly two input .sancov files and requires an
--output option to specify the output file. The output file preserves
the binary format (magic number and bitness) from the first input file.

A warning is emitted if the two input files have different bitness
(32-bit vs 64-bit), though the operation proceeds using the bitness
from file A.
DeltaFile
+100-0llvm/tools/sancov/sancov.cpp
+7-0llvm/test/tools/sancov/diff-different-files.test
+6-0llvm/test/tools/sancov/diff-same-file.test
+6-0llvm/tools/sancov/Opts.td
+119-04 files

LLVM/project 25825a2clang/lib/Headers __clang_cuda_runtime_wrapper.h

Add missing climits include
DeltaFile
+1-0clang/lib/Headers/__clang_cuda_runtime_wrapper.h
+1-01 files

LLVM/project 7dfe599llvm/lib/Target/PowerPC PPCISelLowering.cpp, llvm/test/CodeGen/PowerPC aix64-cc-abi-vaarg-mir.ll aix32-cc-abi-vaarg-mir.ll

Fix VarArgs FixedStack object on AIX. (#170240)

Create a mutable aliased fixed stack object for the va_list when any of
the optional arguments are passed in gprs. Since we need to spill the
gpr registers into the parameter save area the stack object is not
immutable, and since the values will almost certainly be accessed
through the IR value for a va_list make the stack object aliased as
well.
DeltaFile
+27-27llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg-mir.ll
+28-8llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+11-11llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg-mir.ll
+9-9llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
+5-5llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
+5-5llvm/test/CodeGen/PowerPC/aix64-vector-vararg-callee.ll
+85-652 files not shown
+91-718 files

LLVM/project 0959bb3llvm/include/llvm/CodeGen TargetLowering.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

[DAG] Generate UMULH/SMULH with wider vector types (#170283)

The existing code for generating umulh/smulh was checking that that the
getTypeToTransformTo was a LegalOrCustom operation. This only takes a
single legalization step though, so if v4i32 was legal, a v8i32 would be
transformed but a v16i32 would not.

This patch introduces a getLegalTypeToTransformTo that performs
getTypeToTransformTo until a legal type is reached. The umulh/smulh code
can then use it to check if the final resultant type will be legal.
DeltaFile
+64-239llvm/test/CodeGen/Thumb2/mve-vmulh.ll
+5-6llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+11-0llvm/include/llvm/CodeGen/TargetLowering.h
+80-2453 files

LLVM/project 08be98bclang/include/clang/Analysis/FlowSensitive/Models UncheckedStatusOrAccessModel.h, clang/lib/Analysis/FlowSensitive/Models UncheckedStatusOrAccessModel.cpp

reb

Created using spr 1.3.7
DeltaFile
+0-621clang/unittests/Analysis/FlowSensitive/UncheckedStatusOrAccessModelTestFixture.cpp
+0-526clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
+0-90clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp
+1-3clang/include/clang/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.h
+1-1,2404 files

LLVM/project 7be3973llvm/test/ThinLTO/X86 pr35472.ll

[DebugInfo][test] Fix llvm/test/ThinLTO/X86/pr35472.ll (NFC) (#170952)

The test is intended to verify lazy loading of debug-location scope
metadata. However, after d5d3eb16b7ab72529c83dacb2889811491e48909,
DILexicalScope that was expected to be lazily loaded was not used in IR,
so lazy loading did not occur.

This patch fixes that, and adds an extra bcanalyzer check to ensure that
DILexicalScope record is emitted.
DeltaFile
+26-2llvm/test/ThinLTO/X86/pr35472.ll
+26-21 files