LLVM/project 81d4e20bolt/lib/Passes LongJmp.cpp

[BOLT] Fix param order
DeltaFile
+2-2bolt/lib/Passes/LongJmp.cpp
+2-21 files

LLVM/project 182a59dmlir/include/mlir/Dialect/Bufferization/Pipelines Passes.h, mlir/lib/Dialect/Bufferization/Pipelines BufferizationPipelines.cpp

[mlir][bufferization][NFC] Add convenience overload for `buildBufferDeallocationPipeline` (#171305)

Add an overload that does not take any options and uses the default
options instead.
DeltaFile
+7-1mlir/lib/Dialect/Bufferization/Pipelines/BufferizationPipelines.cpp
+1-0mlir/include/mlir/Dialect/Bufferization/Pipelines/Passes.h
+8-12 files

LLVM/project 0768068llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlanUnroll.cpp, llvm/test/Transforms/LoopVectorize interleave-and-scalarize-only.ll

[VPlan] Remove ExtractLastLane for plans with scalar VFs. (#171145)

ExtractLastLane is a no-op for scalar VFs. Update simplifyRecipe to
remove them. This also requires adjusting the code in VPlanUnroll.cpp to
split off handling of ExtractLastLane/ExtractPenultimateElement for
scalar VFs, which now needs to match ExtractLastPart.

PR: https://github.com/llvm/llvm-project/pull/171145
DeltaFile
+10-6llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+7-5llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
+1-2llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
+18-133 files

LLVM/project dc18b90bolt/lib/Passes LongJmp.cpp, bolt/lib/Rewrite GNUPropertyRewriter.cpp

[BOLT][BTI] Add needed BTIs in LongJmp or refuse to optimize binary

This patch adds BTI landing pads to ShortJmp/LongJmp targets in the
LongJmp pass when optimizing BTI binaries.

BOLT does not have the ability to add BTI to all types of functions.
This patch aims to insert the landing pad where possible, and emit an
error where it currently is not.

BOLT cannot insert BTIs into several function "types", including:
- ignored functions,
- PLT functions,
- other functions without a CFG.

Additional context:

In #161206, BOLT gained the ability to decode the .note.gnu.property
section, and warn about lack of BTI support for BOLT. However, this
warning is misleading: the emitted binary may not need extra BTI landing

    [3 lines not shown]
DeltaFile
+50-3bolt/lib/Passes/LongJmp.cpp
+46-0bolt/test/AArch64/long-jmp-bti.s
+35-0bolt/test/AArch64/long-jmp-bti-ignored.s
+2-2bolt/test/AArch64/bti-note.test
+2-2bolt/test/AArch64/no-bti-note.test
+1-2bolt/lib/Rewrite/GNUPropertyRewriter.cpp
+136-91 files not shown
+138-97 files

LLVM/project 4ef7a5abolt/include/bolt/Core MCPlusBuilder.h, bolt/lib/Target/AArch64 AArch64MCPlusBuilder.cpp

[BOLT] Rename function to isCallCoveredByBTI

- this way the order of the parameters matches the order in the name of
  the function
DeltaFile
+2-2bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+1-1bolt/include/bolt/Core/MCPlusBuilder.h
+3-32 files

LLVM/project 7675fc7flang-rt/lib/runtime cudadevice.f90 __ppc_intrinsics.f90, flang/module cudadevice.f90 __ppc_intrinsics.f90

[Flang] Move builtin .mod generation into runtimes (Reapply #137828) (#169638)

Reapplication of #137828, changes:
* Workaround CMAKE_Fortran_PREPROCESS_SOURCE issue for CMake < 2.24: The
issue is that `try_compile` does not forward manually-defined compiler
flang variables to the test build environment; instead of just a
negative test result, it aborts the configuration step itself. To be
fair, manually defining these variables is deprecated since at least
CMake 3.6.
* Missing flang cmd line flags for CMake < 3.28 `-target=`, `-O2`, `-O3`
* It is now possible to set FLANG_RT_ENABLED_STATIC=OFF and
FLANG_RT_ENABLE_SHARED=OFF at the same and is the default for amdgpu and
nvptx targets. In this mode, only the .mod files are compiled --
necessary for module files in
lib/clang/22/finclude/flang/(nvptx64-nvidia-cuda|amdgpu-amd-amdhsa)/*.mod
to be available.
* For compiling omp_lib.mod for nvptx and amdgpu, the module build
functionality must be hoisted out if openmp's runtime/ directory which
is only included for host targets. This PR now requires #169909.

    [72 lines not shown]
DeltaFile
+2,242-0flang-rt/lib/runtime/cudadevice.f90
+0-2,242flang/module/cudadevice.f90
+0-1,911flang/module/__ppc_intrinsics.f90
+1,911-0flang-rt/lib/runtime/__ppc_intrinsics.f90
+1,122-0flang-rt/lib/runtime/mma.f90
+0-1,122flang/module/mma.f90
+5,275-5,27582 files not shown
+8,051-7,76988 files

LLVM/project d8e651fclang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sme2p2-intrinsics acle_sme2p2_fmul.c

[AArch64] Add intrinsics support for multi-vector FMUL (#163397)

This patch adds intrinsics for multi-vector FMUL instructions introduced
in armv9.6, based on
[this](https://github.com/ARM-software/acle/pull/412) ACLE proposal.

Depends on #163536

Intrinsics implemented:

//BFMUL:
svbfloat16x2_t svmul[_bf16_x2](svbfloat16x2_t zd, svbfloat16x2_t zm) __arm_streaming;
svbfloat16x2_t svmul[_single_bf16_x2](svbfloat16x2_t zd, svbfloat16_t zm) __arm_streaming;
svbfloat16x4_t svmul[_bf16_x4](svbfloat16x4_t zd, svbfloat16x4_t zm) __arm_streaming;
svbfloat16x4_t svmul[_single_bf16_x4](svbfloat16x4_t zd, svbfloat16_t zm) __arm_streaming;
DeltaFile
+198-0clang/test/CodeGen/AArch64/sme2p2-intrinsics/acle_sme2p2_fmul.c
+164-0llvm/test/CodeGen/AArch64/sme2p2-intrinsics-fmul.ll
+20-4llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+8-0clang/include/clang/Basic/arm_sve.td
+390-44 files

LLVM/project ca9f43fllvm/include/llvm/Transforms/Utils SSAUpdaterBulk.h, llvm/lib/Transforms/Utils SSAUpdaterBulk.cpp

llvm: Export EliminateNewDuplicatePHINodes (#169564)

This is needed for tests, when building with `LLVM_BUILD_LLVM_DYLIB` so
LLVM can be built as a DLL on Windows.

This effort is tracked in #109483.
DeltaFile
+5-1llvm/include/llvm/Transforms/Utils/SSAUpdaterBulk.h
+4-0llvm/lib/Transforms/Utils/SSAUpdaterBulk.cpp
+0-3llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp
+9-43 files

LLVM/project edf80dcllvm/lib/LTO LTOBackend.cpp UpdateCompilerUsed.cpp, llvm/test/LTO/AArch64 veclib-armpl-lto2.ll veclib-armpl-lto.ll

[LTO][Veclib] Fix vector library handling with LTO (#170638)

Commit #167996 moved VecLib into TargetOptions and ensured clang
properly sets it. However, some LTO backend code paths were still
creating _TargetLibraryInfoImpl_ without passing the VecLib parameter
from `TargetMachine::Options`.

This PR completes the fix by ensuring that:

_LTOBackend.cpp, ThinLTOCodeGenerator.cpp, UpdateCompilerUsed.cpp_ all
pass `TM->Options.VecLib` when constructing _TargetLibraryInfoImpl_.

Without this fix, vector library information (e.g., -fveclib=ArmPL)
would not be properly recognized during LTO optimization and code
generation, potentially causing incorrect optimizations or linker errors
when vector library functions are referenced.
DeltaFile
+26-0llvm/test/LTO/AArch64/veclib-armpl-lto2.ll
+24-0llvm/test/LTO/AArch64/veclib-armpl-lto.ll
+19-0llvm/test/LTO/AArch64/frem-scalable-veclib.ll
+2-2llvm/lib/LTO/LTOBackend.cpp
+1-1llvm/lib/LTO/UpdateCompilerUsed.cpp
+1-1llvm/lib/LTO/ThinLTOCodeGenerator.cpp
+73-46 files

LLVM/project 358c4d8utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy BUILD.bazel

[clang-tidy][Bazel] Add missing dependency after ff59ecd8856f550
DeltaFile
+1-0utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
+1-01 files

LLVM/project d9754f0bolt/lib/Passes LongJmp.cpp, bolt/lib/Rewrite GNUPropertyRewriter.cpp

[BOLT][BTI] Add needed BTIs in LongJmp or refuse to optimize binary

This patch adds BTI landing pads to ShortJmp/LongJmp targets in the
LongJmp pass when optimizing BTI binaries.

BOLT does not have the ability to add BTI to all types of functions.
This patch aims to insert the landing pad where possible, and emit an
error where it currently is not.

BOLT cannot insert BTIs into several function "types", including:
- ignored functions,
- PLT functions,
- other functions without a CFG.

Additional context:

In #161206, BOLT gained the ability to decode the .note.gnu.property
section, and warn about lack of BTI support for BOLT. However, this
warning is misleading: the emitted binary may not need extra BTI landing

    [3 lines not shown]
DeltaFile
+50-3bolt/lib/Passes/LongJmp.cpp
+46-0bolt/test/AArch64/long-jmp-bti.s
+35-0bolt/test/AArch64/long-jmp-bti-ignored.s
+2-2bolt/test/AArch64/bti-note.test
+2-2bolt/test/AArch64/no-bti-note.test
+1-2bolt/lib/Rewrite/GNUPropertyRewriter.cpp
+136-91 files not shown
+138-97 files

LLVM/project 5446eb9cross-project-tests/debuginfo-tests/dexter/dex/debugger DAP.py

[Dexter] Adjust launch sequencing to align closer with DAP spec (#170523)

Following PR #169744 the DAP launch sequencing of Dexter was changed to
complete a launch request/response before performing configuration
steps. This matches LLDB's current behaviour, but is not compatible with
the DAP specification and causes issues interfacing with other
debuggers.

This patch tries to bridge the gap by using a sequencing that is mostly
DAP-compliant while still interfacing correctly with lldb-dap: we send a
launch request first, then perform all configuration steps and send
configurationDone, and then await the launch response. For lldb-dap, we
do not wait for the launch response and may send configuration requests
before it is received, but lldb-dap appears to handle this without
issue. For other debug adapters, the launch request will be ignored
until the configurationDone request is received and responded to, at
which point the launch request will be acted upon and responded to.

As an additional note, the initialized event should be sent after the

    [5 lines not shown]
DeltaFile
+25-9cross-project-tests/debuginfo-tests/dexter/dex/debugger/DAP.py
+25-91 files

LLVM/project 6f63c8dbolt/lib/Target/AArch64 AArch64MCPlusBuilder.cpp, bolt/unittests/Core MCPlusBuilder.cpp

[BOLT] allow adding BTI to empty BBs
DeltaFile
+36-40bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+3-6bolt/unittests/Core/MCPlusBuilder.cpp
+39-462 files

LLVM/project 9210908clang/docs SanitizerCoverage.rst

[sancov] Refreshed CLI for sancov in docs.
DeltaFile
+31-10clang/docs/SanitizerCoverage.rst
+31-101 files

LLVM/project 829db2allvm/test/tools/sancov union-different-files.test union-same-file.test, llvm/tools/sancov sancov.cpp Opts.td

[sancov] Add -union option to merge multiple sancov files

Add a new -union action that computes the union of multiple sancov
coverage files and writes the result to a new .sancov file.

The option takes one or more input .sancov files and requires an
--output option to specify the output file. The output file preserves
the binary format (magic number and bitness) from the first input file.

A warning is emitted if any input file has different bitness (32-bit
vs 64-bit) than the first file, though the operation proceeds using
the bitness from the first file.
DeltaFile
+61-1llvm/tools/sancov/sancov.cpp
+11-0llvm/test/tools/sancov/union-different-files.test
+10-0llvm/test/tools/sancov/union-same-file.test
+3-1llvm/tools/sancov/Opts.td
+85-24 files

LLVM/project 9bfb3bellvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp, llvm/test/CodeGen/AArch64 arm64-vshift.ll neon-addlv.ll

[AArch64][GlobalISel] Added support for neon left shift intrinsics on single-element vector types (#170827)

Previously, the left shift family of intrinsics would fail to lower for
<1 x i64> / <1 x i32> vector types, as IRTranslation lowers these to
scalars. Marking these intrinsics as only using fp operands ensures the
RegBankSelect phase places the vector on an fpr bank, instead of a gpr
bank.
DeltaFile
+433-256llvm/test/CodeGen/AArch64/arm64-vshift.ll
+20-9llvm/test/CodeGen/AArch64/neon-addlv.ll
+1-9llvm/test/CodeGen/AArch64/arm64-int-neon.ll
+8-0llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+462-2744 files

LLVM/project 6b59a95clang-tools-extra/docs/clang-tidy/checks/google readability-casting.rst, clang-tools-extra/docs/clang-tidy/checks/modernize avoid-c-style-cast.rst

[clang-tidy] Fix documentation in `modernize-avoid-c-style-cast` (#171413)

Related discussion:
https://github.com/llvm/llvm-project/pull/171058#discussion_r2602100364
DeltaFile
+2-0clang-tools-extra/docs/clang-tidy/checks/google/readability-casting.rst
+1-0clang-tools-extra/docs/clang-tidy/checks/modernize/avoid-c-style-cast.rst
+3-02 files

LLVM/project 110a2d1llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 fp-to-int-to-fp.ll

[DAGCombiner] Extend fp->int->fp optimizations to include clamping
DeltaFile
+140-0llvm/test/CodeGen/AArch64/fp-to-int-to-fp.ll
+62-19llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+202-192 files

LLVM/project 629939bbolt/lib/Passes LongJmp.cpp, bolt/lib/Rewrite GNUPropertyRewriter.cpp

[BOLT][BTI] Add needed BTIs in LongJmp or refuse to optimize binary

This patch adds BTI landing pads to ShortJmp/LongJmp targets in the
LongJmp pass when optimizing BTI binaries.

BOLT does not have the ability to add BTI to all types of functions.
This patch aims to insert the landing pad where possible, and emit an
error where it currently is not.

BOLT cannot insert BTIs into several function "types", including:
- ignored functions,
- PLT functions,
- other functions without a CFG.

Additional context:

In #161206, BOLT gained the ability to decode the .note.gnu.property
section, and warn about lack of BTI support for BOLT. However, this
warning is misleading: the emitted binary may not need extra BTI landing

    [3 lines not shown]
DeltaFile
+50-3bolt/lib/Passes/LongJmp.cpp
+46-0bolt/test/AArch64/long-jmp-bti.s
+35-0bolt/test/AArch64/long-jmp-bti-ignored.s
+2-2bolt/test/AArch64/bti-note.test
+2-2bolt/test/AArch64/no-bti-note.test
+1-2bolt/lib/Rewrite/GNUPropertyRewriter.cpp
+136-91 files not shown
+138-97 files

LLVM/project 046edf0bolt/lib/Target/AArch64 AArch64MCPlusBuilder.cpp, bolt/unittests/Core MCPlusBuilder.cpp

[BOLT] allow adding BTI to empty BBs
DeltaFile
+6-8bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+3-6bolt/unittests/Core/MCPlusBuilder.cpp
+9-142 files

LLVM/project e60a332compiler-rt/test/orc/TestCases/Linux/systemz priority-static-initializer.S trivial-atexit.S

 [JITLink] Add orc-runtime support for SystemZ (#171062)

Add orc-runtime support and tests for SystemZ.

Co-authored-by: anoopkg6 <anoopkg6 at github.com>
DeltaFile
+100-0compiler-rt/test/orc/TestCases/Linux/systemz/priority-static-initializer.S
+42-0compiler-rt/test/orc/TestCases/Linux/systemz/trivial-atexit.S
+41-0compiler-rt/test/orc/TestCases/Linux/systemz/trivial-cxa-atexit.S
+35-0compiler-rt/test/orc/TestCases/Linux/systemz/trivial-static-initializer.S
+32-0compiler-rt/test/orc/TestCases/Linux/systemz/lljit-initialize-deinitialize.ll
+15-0compiler-rt/test/orc/TestCases/Linux/systemz/ehframe-libunwind.cpp
+265-06 files not shown
+305-312 files

LLVM/project 86755ddllvm/lib/Analysis MemoryBuiltins.cpp LoopAccessAnalysis.cpp, llvm/lib/Frontend/Offloading OffloadWrapper.cpp

[llvm] Use ConstantInt::getAllOnesValue()

Prefer getAllOnesValue() over get(-1). This is good practice to
avoid issues with sign extension for large types.
DeltaFile
+7-7llvm/lib/Frontend/Offloading/OffloadWrapper.cpp
+5-4llvm/lib/Target/NVPTX/NVPTXCtorDtorLowering.cpp
+2-2llvm/lib/Analysis/MemoryBuiltins.cpp
+2-1llvm/lib/Analysis/LoopAccessAnalysis.cpp
+2-1llvm/lib/Target/AMDGPU/AMDGPUAsanInstrumentation.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
+19-164 files not shown
+23-2010 files

LLVM/project 195669abolt/test/runtime/AArch64 pacret-synchronous-unwind.cpp

[BOLT] Fix pacret-synchronous-unwind.cpp test

The test case build a binary from C++, and checks for the number of
functions the PointerAuthCFIFixup pass runs on.
This can change based on the platform. To account for this, the patch
changes the number to a regex.
DeltaFile
+5-4bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
+5-41 files

LLVM/project fc1e8ecclang/docs SanitizerCoverage.rst

[sancov] Refreshed CLI for sancov in docs.
DeltaFile
+30-10clang/docs/SanitizerCoverage.rst
+30-101 files

LLVM/project ae1650fllvm/test/tools/sancov diff-different-files.test diff-same-file.test, llvm/tools/sancov sancov.cpp Opts.td

[sancov] Add -diff option to compute set difference of sancov files

Add a new -diff action that computes the difference between two sancov
coverage files (A - B) and writes the result to a new .sancov file.

The option takes exactly two input .sancov files and requires an
--output option to specify the output file. The output file preserves
the binary format (magic number and bitness) from the first input file.

A warning is emitted if the two input files have different bitness
(32-bit vs 64-bit), though the operation proceeds using the bitness
from file A.
DeltaFile
+101-0llvm/tools/sancov/sancov.cpp
+7-0llvm/test/tools/sancov/diff-different-files.test
+6-0llvm/test/tools/sancov/diff-same-file.test
+6-0llvm/tools/sancov/Opts.td
+120-04 files

LLVM/project 2c3ca10llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/google BUILD.gn, llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/modernize BUILD.gn

[gn build] Port ff59ecd8856f
DeltaFile
+0-1llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/google/BUILD.gn
+1-0llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/modernize/BUILD.gn
+1-12 files

LLVM/project ff59ecdclang-tools-extra/clang-tidy/google AvoidCStyleCastsCheck.cpp AvoidCStyleCastsCheck.h, clang-tools-extra/clang-tidy/modernize AvoidCStyleCastCheck.cpp AvoidCStyleCastCheck.h

[clang-tidy] Rename `google-readability-casting` to `modernize-avoid-c-style-cast` (#171058)

Rename `google-readability-casting` to `modernize-avoid-c-style-cast`

The old name is kept as an alias for backward compatibility.

Fixes #170978
DeltaFile
+370-0clang-tools-extra/test/clang-tidy/checkers/modernize/avoid-c-style-cast.cpp
+0-370clang-tools-extra/test/clang-tidy/checkers/google/readability-casting.cpp
+0-291clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.cpp
+290-0clang-tools-extra/clang-tidy/modernize/AvoidCStyleCastCheck.cpp
+0-41clang-tools-extra/clang-tidy/google/AvoidCStyleCastsCheck.h
+41-0clang-tools-extra/clang-tidy/modernize/AvoidCStyleCastCheck.h
+701-70214 files not shown
+788-74720 files

LLVM/project 71a9502llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[AArch64][GlobalISel] Fixed formatting
DeltaFile
+48-32llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+48-321 files

LLVM/project 9955779llvm/test/CodeGen/AArch64 arm64-vshift.ll arm64-int-neon.ll

[AArch64][GlobalISel] Updated test checks
DeltaFile
+9-14llvm/test/CodeGen/AArch64/arm64-vshift.ll
+2-1llvm/test/CodeGen/AArch64/arm64-int-neon.ll
+11-152 files

LLVM/project ca12d1dllvm/lib/Target/SystemZ SystemZISelLowering.cpp, llvm/test/CodeGen/SystemZ condfolding.ll

[SystemZ] Improve CCMask optimization (#171137)

This commit addresses a shortcoming in the implementation of
`combineBR_CCMASK` and `combineSELECT_CCMASK`. In cases where
`combineCCMask` was able to reduce the ccmask going into the select or
branch to either true (`ccvalid`) or false (`0`), a trivial instruction
would be emitted (i.e. either a select that would only ever select one
side, or a conditional branch with `true` or `false` as the branch
condition).
This led under certain circumstances to, e.g., `BRC` instructions being
emitted that triggered an assert in the AsmPrinter meant to exclude such
branch conditions.
For the select case, this commit introduces an early bailout that simply
returns the value that would "always" be selected. For the branch case,
the commit introduces an additional guard that prevents the DAGCombine
from taking effect, thereby preventing the illegal instruction from
being emitted.
DeltaFile
+28-0llvm/test/CodeGen/SystemZ/condfolding.ll
+13-1llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
+41-12 files