[flang] Undefine HUGE after including cmath (#236221)
Older glibc versions expose HUGE through <cmath> after Flang's headers
have undefined it. This breaks the RealValueImpl::HUGE definition and
calls, as well as the RealValue unit tests and their HUGE test name.
The glibc version I could reproduce the issue on was 2.26.
[InstCombine] Generalize existing pattern from "abs(val) != 0 -> val != 0" to "abs(val) == 0 -> val == 0" (#233763)
Generalize fold of `(c ? x : -x) != 0` to `x != 0` by moving the pattern
to stripNullTest() and thus also supporting `==` predicates and other
patterns supported by that helper.
The missed pattern is noticed in Google Abseil's demangler
(https://github.com/abseil/abseil-cpp/blob/master/absl/debugging/internal/demangle.cc).
Proof: https://alive2.llvm.org/ce/z/7WQeXT
Fixes #233753
Assisted-by: Qwen3.7-Plus, which helps me locate the existing pattern
instead of opening a new pattern.
[AMDGPU] Custom lower dynamic insertelt on wide vectors of 16-bit elements (#232288)
Currently, in case of dynamic-index `insertelement` into v8, v16 and v32
of i16, f16 and bf16 was set to Expand. At -O1 and above, single inserts
were expanded into a select per element and chains of inserts were
folded into a stack temporary. At -O0, every insert went through the
stack unconditionally.
This patch extends the existing `v_bfi_b32` custom lowering, previously
limited to 64-bit vectors, to the 16-bit wide vectors as well, making
`INSERT_VECTOR_ELT` as now Custom for them, so legalization uses the
custom lowering at all optimization levels, and the generic DAGCombiner
chain fold, which only applies to Expand types, no longer fires.
In 'lowerINSERT_VECTOR_ELT' each 64-bit sized piece updates with `(Mask
& splat(Val)) | (~Mask & Piece)`, where only the piece holding the index
gets a nonzero mask, alongwith skipping `performInsertVectorEltCombine`
that use select-per-element expansion for such types, since the custom
lowering is cheaper. wider i8 vectors still use the stack.
[flang][AddAliasTags] OpenMP privatization is a local allocation (#236201)
OpenMP privatization generates code which looks a bit like this
```
%host = ...
omp.parallel private(@privatizer %host -> %private_copy : !fir.ref<type>) {
%priv = fir.declare %private_copy ... -> !fir.ref<type>
}
```
`fir::AliasAnalysis` already correctly categorises accesses to these
private variables (`%priv` in this example) as local allocations. It
reports the source operation for the allocation as being the
`fir.declare` operation (as there is no allocation operation visible in
mlir).
When AddAliasTags processed this access it did not handle allocations
having `fir.declare` as their source and so was not able to give it the
local allocation tag. This commit fixes that by treating `fir.declare`
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[MLIR] Fix regression in linking to `MLIRAnalysisBase` via dylib (#236359)
Fix the regression introduced in #232793 where the `MLIRTestIR` library
ends up linking directly to `MLIRAnalysisBase` rather than to `MLIR`
dylib, and therefore duplicate it and all the static libraries it
depends on the linker command line.
Signed-off-by: Michał Górny <mgorny at gentoo.org>
[AArch64][ISel] Fix crash for partial reduction actions (#236179)
getPartialReduceMLAAction assumed that the provided VTs would always be
simple, and crashed if not. So we should just bail out in such cases
(e.g. invalid non-power-of-two element types) by defaulting to Expand.
[AArch64] Allow selecting shifted register from and with UBFX. (#233882)
For LSL/LSR, it required a mask or field extending to MSB, but UBFX can
extract smaller fields.
[libc++] Make __thread_hardware_concurrency() an alias to an existing symbol (#234575)
This PR changes `__thread_hardware_concurrency()` to be an alias to
`std::thread::hardware_concurrency()`, which is already exported from
the ABI.
Also adds the `_LIBCPP_ABI_NAMESPACE_LEN` macro to simplify the name
mangling.
[CVP] Restructure pass to use `CVPImpl` implementation class, unify style (NFC) (#236038)
CorrelatedValuePropagation instruction-processing routines and helpers
have been abstracted out into a dedicated implementation class, so as to
avoid threading LVI, among other things. Minor opportunity to modernize
code and unify style where possible.
[mlir] Read the attr dictionary directly in getDialectAttrs (#236339)
getAttrs also copies attrs from properties on every call, but dialect
attrs are never stored there
LLVM IR translation calls getDialectAttrs() on every op, skipping the
dictionary rebuild for ops with properties makes translation faster,
visible on large modules
[lldb][test] Disable TestAttachWaitConnected.py on Linux (#236357)
It has been flaky on the AArch64 Linux buildbot and I do not think the
reason will be related to the architecture.
See #236354.
[AMDGPU] Count only the requested register kind in dumpMaxRegPressure()
dumpMaxRegPressure() found the instruction with the most registers of the requested kind from the maximum of an upward tracker. That maximum takes the VGPR and AVGPR components from the same point, so for Kind == VGPR it can miss the VGPR peak. When no instruction had a VGPR in the maximum, the function dereferenced a null instruction.
The function now counts the registers of the requested kind from the live sets at the early-clobber and register slots of each instruction, as it already did for the chosen instruction. It prints a short message when no register of that kind is live.
Add print-max-reg-pressure-av-vgpr.mir.
[SPARC] Enable +ua2007 for -Av8plusd/-Av9d (#234060)
FMA instructions are modeled under ua2007, but the mappings for
-Av8plusd/-Av9d omitted it, so `fmadds` failed to assemble with
"instruction requires a CPU feature not currently enabled". Add +ua2007
to match GNU as.
Fix #225925.
[SCEV][NFC] Factor getMonotonicPredicate out of getLoopInvariantPredicate
Move the code that finds a monotonic predicate into a private utility.
For a compare of an AddRec against an invariant, it returns the
predicate with the AddRec on the left, and whether the predicate
turns to false or to true as the loop runs.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[SCEV] Prove monotonic predicates from loop entry
SCEV's isKnownOnEveryIteration proves a predicate on every iteration
of a loop by proving it on loop entry and on the backedge. The
backedge part often fails, e.g. when the loop exit only bounds the IV
from above.
Now, if the predicate compares a recurrence of the loop with a
loop-invariant value and can only change from false to true as the
loop runs, prove it from loop entry alone.
In iv-widen-elim-ext.ll, the comment on @foo3 said its zext must stay.
The zext is now removed: the add it extends is non-negative on every
iteration.
One exit truncation loses nuw: the exit test is now on the wide IV,
so IndVars rewrites it with a new truncation that has no nuw. It is
marked with TODO.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
[SCEV][NFC] Factor isKnownOnEveryIteration out of isKnownViaInduction
Move the check that proves a predicate on loop entry and on the backedge
from isKnownViaInduction into a private utility isKnownOnEveryIteration.
Co-Authored-By: Claude Opus 5.5 <noreply at anthropic.com>
