[InstCombine][CmpInstAnalysis] Use consistent spelling and function names. NFC. (#171645)
Both `decomposeBitTestICmp` and `decomposeBitTest` have a parameter
called `lookThroughTrunc`. This was spelled in full (i.e. `lookThroughTrunc`)
in the header. However, in the implementation, it's written as `lookThruTrunc`.
I opted to convert all instances of `lookThruTrunc` into
`lookThroughTrunc` to reduce surprise while reading the code and for
conformity.
---
The other change in this PR is the renaming of the wrapper around
`decomposeBitTest()`. Even though it was a wrapper around
`CmpInstAnalysis.h`'s `decomposeBitTest`, the function was called
`decomposeBitTestICmp`. This is quite confusing because such a function
_also_ exists in `CmpInstAnalysis.h`, but it is _not_ the one actually
being used in `InstCombineAndOrXor.cpp`.
[Linalg] Add *Conv2D* matchers (#168362)
-- This commit is the fourth in the series of adding matchers
for linalg.*conv*/*pool*. Refer:
https://github.com/llvm/llvm-project/pull/163724
-- In this commit all variants of Conv2D convolution ops have been
added.
-- It also refactors the way these matchers work to make adding more
matchers concise.
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
---------
Signed-off-by: Abhishek Varma <abhvarma at amd.com>
Signed-off-by: hanhanW <hanhan0912 at gmail.com>
Co-authored-by: hanhanW <hanhan0912 at gmail.com>
[ConstantFolding] Support ptrtoaddr in ConstantFoldCompareInstOperands (#162653)
This folds `icmp (ptrtoaddr x, ptrtoaddr y)` to `icmp (x, y)`, matching
the existing ptrtoint fold. Restrict both folds to only the case where
the result type matches the address type.
I think that all folds this can do in practice end up actually being
valid for ptrtoint to a type large than the address size as well, but I
don't really see a way to justify this generically without making
assumptions about what kind of folding the recursive calls may do.
This is based on the icmp semantics specified in
https://github.com/llvm/llvm-project/pull/163936.
[Verifier] Make sure all constexprs in instructions are visited (#171643)
Previously this only happened for constants of some types and missed
incorrect ptrtoaddr.
[ValueTracking] Enhance overflow computation for unsigned mul (#171568)
Changed the range computation in computeOverflowForUnsignedMul to use
computeConstantRange as well.
This expands the patterns that InstCombine manages to narrow a mul that
has values that come from zext, for example if a value comes from a div
operation then the known bits doesn't give the narrowest possible range
for that value.
---------
Co-authored-by: Adar Dagan <adar.dagan at mobileye.com>
[RISCV] Generate Xqcilsm LWMI/SWMI load/store multiple instructions (#171079)
This patch adds support for generating the Xqcilsm load/store multiple
instructions as a part of the RISCVLoadStoreOptimizer pass. For now we
only combine two load/store instructions into a load/store multiple.
Support for converting more loads/stores will be added in follow-up
patches. These instructions are only applicable for 32-bit loads/stores
with an alignment of 4-bytes.
[LoongArch] Add support for the ud macro instruction (#171583)
This patch adds support for the `ud ui5` macro instruction. The `ui5`
operand must be inthe range `0-31`. The macro expands to:
`amswap.w $rd, $r1, $rj`
where `ui5` specifies the register number used for `$rd` in the expanded
instruction, and `$rd` is the same as `$rj`.
Relevant binutils patch:
https://sourceware.org/pipermail/binutils/2025-December/146042.html
[RISCV] Add Xsfmm vlte and vste intrinsics to getTgtMemIntrinsics. (#171747)
Replace dyn_cast with cast. The dyn_cast can never fail now. Previously
it never succeeded.
[NFC] isOSGlibc: musl is not glibc. (#171734)
Previously, `isOSGlibc()` was returning true for musl triples as well.
This commit changes `isOSGlibc()` to return false for musl triples, and
updates all existing `isOSGlibc()` checks to call `isOSGlibc() ||
isMusl()`, in order to preserve existing behaviour.
[Tooling] Fix misleading progress report when files have multiple compile commands (#169640)
This patch fixes an issue in progress reporting where the processed item
counter could exceed the total item count, leading to confusing outputs
like [22/18].
Closes [#169168](https://github.com/llvm/llvm-project/issues/169168)
[RISCV] Use sew and vec_policy for Rivos vector instruction operands. (#171721)
This enables MachineVerifier and MachineIR printing support for these
operands.
[compiler-rt] follow-up to 166837, rename COMPILER_RT_FORCE_TEST_BUILTINS_DIR to COMPILER_RT_TEST_BUILTINS_DIR (#171741)
Co-authored-by: David Tenty <daltenty at ibm.com>