LLVM/project 2a72cd8llvm/unittests/Support GlobPatternTest.cpp

[NFC][Support] Add test for inverted slash-agnostic matching (#203290)

Add a test case to GlobPatternTest to verify that inverted character
classes containing slashes (e.g. [^/] or [^\\]) behave correctly
under SlashAgnostic mode (i.e. they do not match either slash).

Assisted-by: Gemini
DeltaFile
+14-0llvm/unittests/Support/GlobPatternTest.cpp
+14-01 files

LLVM/project 869c99allvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.h

[AMDGPU] NFC: Drop constexpr from getFlavor*Name functions

Change-Id: I6936feedf1af27d348e7b0e9787bbb291e4cf862
DeltaFile
+2-2llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+2-21 files

LLVM/project 5036a80clang/lib/CodeGen CGHLSLRuntime.cpp CGExpr.cpp

[HLSL][NFC] Remove unused location argument (#203467)

The location argument was just passed around but never used.
DeltaFile
+12-17clang/lib/CodeGen/CGHLSLRuntime.cpp
+4-8clang/lib/CodeGen/CGExpr.cpp
+2-3clang/lib/CodeGen/CGHLSLRuntime.h
+18-283 files

LLVM/project f2957d7flang/lib/Semantics check-omp-structure.cpp

[flang][OpenMP] Add missing check for empty argument list (#203592)
DeltaFile
+4-0flang/lib/Semantics/check-omp-structure.cpp
+4-01 files

LLVM/project 5a52d68llvm/lib/MC/MCParser COFFMasmParser.cpp, llvm/lib/Target/X86/AsmParser X86AsmParser.cpp

[llvm-ml] Add MASM unwind v3 support for x64 exception handling and improve MSVC compat (#202809)

New command-line options:
- `/unwindv3`: Enable V3 unwind information format

New MASM directives:
- `.push2reg` / `.pop2reg`: Push/pop register pairs (PUSH2/POP2)
- `.beginepilog` / `.endepilog`: Delimit epilog unwind regions
- `.popreg`, `.freestack`, `.restorereg`, `.restorexmm128`,
`.unsetframe`: Epilog counterparts of existing prolog directives
- `.pushframe code`: MASM syntax for interrupt handlers with error codes

New built-in symbol:
- `@UnwindVersion`: Returns the current x64 unwind version being used.

Error diagnostics:
- Prolog directives after `.endprolog` are diagnosed
- Epilog directives outside `.beginepilog`/`.endepilog` are diagnosed
- Nested `.beginepilog` is diagnosed
- Unwind v3 directives or using extended registers in directives without
unwind v3 are diagnosed
DeltaFile
+278-0llvm/test/tools/llvm-ml/epilog_directives.asm
+177-0llvm/test/tools/llvm-ml/proc_frame_v3.asm
+87-2llvm/lib/MC/MCParser/COFFMasmParser.cpp
+74-12llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+61-0llvm/test/tools/llvm-ml/unwindv3_required_errors.asm
+45-0llvm/test/tools/llvm-ml/prolog_directive_errors.asm
+722-1410 files not shown
+930-1416 files

LLVM/project 0ab7800clang/lib/ScalableStaticAnalysisFramework/Analyses SSAFAnalysesCommon.h, clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowExtractor.cpp

Reland "[SSAF][Extractor] Make hard errors in PointerFlow and UnsafeBufferUsage Extractors quiet (#201953)"

Reverted 7dcd1d2ad104c3f9748370a42dc775cd6e7e34dc and
added '#ifndef NDEBUG' guards for tests using 'llvm::setCurrentDebugType'.

Original message:

Hard errors were used in extractors during development to quickly
identify unsupported language constructs. This commit converts them to
DEBUG_WITH_TYPE so that these errors are silenced in release builds.

In addition, translating unsupported language constructs now silently
results in an empty EntityPointerLevelSet. The PointerFlowExtractor will
skip empty sets for either the source or the destination when building
edges to avoid an ill-formed edge set data structure.

rdar://178747892
DeltaFile
+45-2clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowTest.cpp
+28-0clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageTest.cpp
+15-12clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
+11-11clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageExtractor.cpp
+9-0clang/lib/ScalableStaticAnalysisFramework/Analyses/SSAFAnalysesCommon.h
+108-255 files

LLVM/project 660771dllvm/include/llvm/ADT Bitset.h, llvm/unittests/ADT BitsetTest.cpp

Reapply "[ADT] Bitset: add shift operators, word accessors, and etc" (#195874)

Reapplies #193400, which was reverted in #195848 because it broke
buildbots with:

```
Bitset.h:271: error: static assertion failed: Unsupported word size
```

Root cause: a `static_assert(BitwordBits == 32, ...)` inside the
discarded `else` branch of `if constexpr (BitwordBits == 64)` in
`getWord64()`. The assert's condition is non-template-dependent
(`BitwordBits` derives from `sizeof(uintptr_t)`, not from `NumBits`), so
it is checked even though the branch is discarded, and fires on 64-bit
hosts. Related:
https://stackoverflow.com/questions/38304847/how-does-a-failed-static-assert-work-in-an-if-constexpr-false-block

Fix: drop the redundant inner `static_assert`. The class-level
`static_assert(BitwordBits == 64 || BitwordBits == 32, ...)` already

    [6 lines not shown]
DeltaFile
+313-111llvm/unittests/ADT/BitsetTest.cpp
+97-4llvm/include/llvm/ADT/Bitset.h
+410-1152 files

LLVM/project 0451b65clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Track per-field origins for record types
DeltaFile
+315-5clang/test/Sema/warn-lifetime-safety.cpp
+69-37clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+93-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+31-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+4-6clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+0-2clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+512-566 files

LLVM/project ab2ddf7clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety Origins.cpp

[LifetimeSafety][NFC] Collect accessed fields in a unified pre-scan
DeltaFile
+22-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+15-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+37-122 files

LLVM/project 8566733clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Facts.cpp

[LifetimeSafety][NFC] Add field-labeled child edges to OriginNode and generalize subtree walks
DeltaFile
+76-33clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+38-18clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+18-8clang/lib/Analysis/LifetimeSafety/Facts.cpp
+8-3clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+7-3clang/lib/Analysis/LifetimeSafety/Origins.cpp
+147-655 files

LLVM/project 9196bd6llvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

[𝘀𝗽𝗿] initial version

Created using spr 1.3.8-beta.1
DeltaFile
+465-0llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+274-12llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+209-0llvm/utils/TableGen/Common/CodeGenHwModes.cpp
+199-0llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+144-0llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+79-38llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+1,370-5042 files not shown
+2,615-23948 files

LLVM/project 65e8d41llvm/lib/Target/RISCV RISCVInstrInfoY.td RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+465-0llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+274-12llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+199-0llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+144-0llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+123-1llvm/lib/Target/RISCV/RISCVInstrInfoY.td
+79-38llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+1,284-5133 files not shown
+2,005-17339 files

LLVM/project bb5efe8llvm/lib/Target/RISCV RISCVInstrInfoY.td RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

[𝘀𝗽𝗿] initial version

Created using spr 1.3.8-beta.1
DeltaFile
+465-0llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+274-12llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+199-0llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+144-0llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+123-1llvm/lib/Target/RISCV/RISCVInstrInfoY.td
+79-38llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+1,284-5133 files not shown
+2,005-17339 files

LLVM/project f8d5660llvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+465-0llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+274-12llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+199-0llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+144-0llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+79-38llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+93-0llvm/test/MC/RISCV/rvy/rvy-invalid-load-store.s
+1,254-5031 files not shown
+1,889-17337 files

LLVM/project e4a6342compiler-rt/lib/builtins/cpu_model/riscv hwprobe.inc, llvm/lib/Target/RISCV RISCVFeatures.td

[RISC-V] Add newer Linux hwprobe extensions detection (#192761)
DeltaFile
+54-0compiler-rt/lib/builtins/cpu_model/riscv/hwprobe.inc
+26-13llvm/lib/Target/RISCV/RISCVFeatures.td
+26-12llvm/lib/TargetParser/Host.cpp
+106-253 files

LLVM/project 0a9cf8cutils/bazel/llvm-project-overlay/mlir BUILD.bazel

[Bazel] Fixes fdd939d (#203593)

This fixes fdd939dce1eb145e386dc3242661c3a73b759e4f.

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+3-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+3-01 files

LLVM/project 0fe996allvm/test/CodeGen/AMDGPU fcanonicalize.ll maximumnum.ll, llvm/test/MC/AMDGPU gfx1251_asm_vop3p.s gfx1251_err.s

[AMGDPU] Add gfx1251 V_PK_MIN/MAX_NUM_F64

Also legalizes v2f64 fcanonicalize.
DeltaFile
+2,760-227llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
+1,357-0llvm/test/CodeGen/AMDGPU/maximumnum.ll
+1,317-0llvm/test/CodeGen/AMDGPU/minimumnum.ll
+552-0llvm/test/CodeGen/AMDGPU/packed-fp64.ll
+96-0llvm/test/MC/AMDGPU/gfx1251_asm_vop3p.s
+78-0llvm/test/MC/AMDGPU/gfx1251_err.s
+6,160-2275 files not shown
+6,260-23111 files

LLVM/project a7b3bdellvm/docs AMDGPUUsage.rst

Document buffer OOB access modes
DeltaFile
+45-2llvm/docs/AMDGPUUsage.rst
+45-21 files

LLVM/project 3eb5480clang/test/Sema warn-lifetime-safety.cpp, clang/test/Sema/LifetimeSafety safety.cpp

Merge remote-tracking branch 'origin/main' into slashy
DeltaFile
+3,204-3,450llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+1,905-2,037llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
+3,711-0clang/test/Sema/LifetimeSafety/safety.cpp
+0-3,653clang/test/Sema/warn-lifetime-safety.cpp
+1,813-654llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
+2,214-0llvm/test/CodeGen/AMDGPU/float-sopc-vopc.ll
+12,847-9,794851 files not shown
+55,633-28,708857 files

LLVM/project 6dbe068llvm/lib/MC MCWin64EH.cpp

[Win][x64] Fix -Wunused-variable (#203591)

BaseEpiFlags is only used in assertions, so mark it maybe_unused to
avoid the warning in release builds.
DeltaFile
+1-1llvm/lib/MC/MCWin64EH.cpp
+1-11 files

LLVM/project 74dfc03flang/lib/Semantics check-omp-structure.cpp

[flang][OpenMP] Add missing check for empty argument list
DeltaFile
+4-0flang/lib/Semantics/check-omp-structure.cpp
+4-01 files

LLVM/project fdd939dmlir/include/mlir/Dialect/XeGPU/Utils XeGPUUtils.h, mlir/lib/Dialect/XeGPU/Transforms XeGPUWgToSgDistribute.cpp XeGPUBlocking.cpp

[MLIR][XeGPU] Use context-aware type converter in WgToSgDistribute and Blocking pass (#194685)

This PR replaces the TypeConverter in xegpu-wg-to-sg-distribute and
xegpu-blocking with a context-aware converter that picks each value's
converted type from the layout attached to its defining op/use, removing
the need for the UnrealizedConversionCastOpPattern workaround for scf
ops.
DeltaFile
+223-148mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
+67-149mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp
+100-110mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
+33-95mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
+79-0mlir/test/Dialect/XeGPU/sg-to-lane-distribute.mlir
+48-11mlir/include/mlir/Dialect/XeGPU/Utils/XeGPUUtils.h
+550-5136 files not shown
+608-53112 files

LLVM/project 473ca91clang/include/clang/Options Options.td, clang/lib/ScalableStaticAnalysisFramework/Frontend TUSummaryExtractorFrontendAction.cpp

[clang][ssaf] Add --ssaf-compilation-unit-id= flag (#203345)

The TU summary extractor previously sourced the CompilationUnit
namespace name from clang's `InFile` argument, which made the identity
of a TU summary depend on the file path the build system passed to
clang. Have the build system pass the identifier directly:

- New driver/cc1 option `--ssaf-compilation-unit-id=<id>`, marshalled
into `FrontendOptions::SSAFCompilationUnitId`.
- `TUSummaryRunner` builds its `BuildNamespace(CompilationUnit, ...)`
from the new option's value; `InFile` is no longer threaded into the
runner.
- New diagnostic `warn_ssaf_tu_summary_requires_compilation_unit_id`
(under `-Wscalable-static-analysis-framework`, `DefaultError`) fires
when `--ssaf-tu-summary-file=` is set without a non-empty
`--ssaf-compilation-unit-id=`. The runner falls back to the wrapped
consumer alone in that case, matching the existing setup-time SSAF
diagnostics.

Assisted-By: Claude Opus 4.7
DeltaFile
+131-0clang/unittests/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendActionTest.cpp
+51-0clang/test/Analysis/Scalable/cli-errors-compilation-unit-id.cpp
+14-10clang/lib/ScalableStaticAnalysisFramework/Frontend/TUSummaryExtractorFrontendAction.cpp
+10-10clang/test/Analysis/Scalable/command-line-interface.cpp
+10-0clang/include/clang/Options/Options.td
+3-5clang/test/Analysis/Scalable/PointerFlow/external-inline-function-in-multi-tu.test
+219-257 files not shown
+240-2913 files

LLVM/project e476b23compiler-rt/test/fuzzer merge-sigusr.test fork-sigusr.test

[Fuzzer] Make signal tests work with internal shell (#203445)

Wrap some commands in bash as it seemed like the least bad option. The
alternative is to use setsid and run the other commands in the internal
shell, but them it's impossible to use wait and we run into reliability
issues because of that.
DeltaFile
+4-4compiler-rt/test/fuzzer/merge-sigusr.test
+3-3compiler-rt/test/fuzzer/fork-sigusr.test
+3-3compiler-rt/test/fuzzer/sigint.test
+3-3compiler-rt/test/fuzzer/sigusr.test
+13-134 files

LLVM/project eaef650clang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenFunction.cpp, clang/test/CIR/CodeGen cxx-construct-lvalue.cpp

[CIR] Implement handling for CXXConstructLValue expressions (#203402)

This implements the handling to emit an l-value for CXXConstructExpr and
CXXTemporaryObjectExpr expressions. This is a simple copy from the
equivalent code in classic codegen and uses existing CIR code for most
of the actual work.

A multi-argument constructor call written with explicit type syntax
produces a CXXTemporaryObjectExpr. Using it as the base of a member
access reaches emitLValue with that expression class. A single-argument
constructor call performs a constructor conversion, so the base of the
member access is a CXXFunctionalCastExpr whose subexpression is a
CXXConstructExpr. emitCastLValue forwards to the subexpression, reaching
emitLValue with the CXXConstructExpr class.
DeltaFile
+66-0clang/test/CIR/CodeGen/cxx-construct-lvalue.cpp
+8-0clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+1-3clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+1-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+76-34 files

LLVM/project 9240c64llvm/include/llvm/IR BundleAttributes.h, llvm/lib/Analysis ValueTracking.cpp LazyValueInfo.cpp

[LVI][ValueTracking] Merge checking whether assumes imply nonnull (#203523)
DeltaFile
+3-18llvm/lib/Analysis/ValueTracking.cpp
+2-18llvm/lib/Analysis/LazyValueInfo.cpp
+18-0llvm/lib/IR/BundleAttributes.cpp
+4-0llvm/include/llvm/IR/BundleAttributes.h
+27-364 files

LLVM/project 961f92dclang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaLifetimeSafety.h

users/usx95/helpful-invalidations
DeltaFile
+74-74clang/test/Sema/LifetimeSafety/invalidations.cpp
+14-6clang/lib/Sema/SemaLifetimeSafety.h
+4-4clang/test/Sema/LifetimeSafety/safety.cpp
+4-4clang/include/clang/Basic/DiagnosticSemaKinds.td
+96-884 files

LLVM/project 5fb8711llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td, llvm/test/MC/AArch64 arm64-aliases.s

[AArch64] Define GCS operations as SYS and SYSL aliases

Move the remaining `GCS` instructions from dedicated opcodes to `SYSxt/SYSLxt`
aliases, keeping a tied `SYSL` pseudo for codegen where `GCS` preserves the`
input register when disabled at runtime.

Update `GCS` intrinsic selection, scheduling, disassembly aliases, and MC
coverage for the generic `SYS/SYSL` encodings.
DeltaFile
+23-49llvm/lib/Target/AArch64/AArch64InstrInfo.td
+27-0llvm/test/MC/AArch64/arm64-aliases.s
+19-4llvm/lib/Target/AArch64/AArch64InstrFormats.td
+9-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+78-564 files

LLVM/project 528e6f9llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp, llvm/test/CodeGen/AArch64 sme-intrinsics-mova-insert.ll

[AArch64] Avoid creating a new generic constant in SelectSMETileSlice (#203344)

This was creating a new ISD::Constant node during instruction selection,
which may also need lowering (e.g., to a `mov gpr, wzr`). The issue with
this is the new constant node will not end up on the instruction
selection worklist, as the complex pattern executes after the worklist
has been prepared. This means the constant will lower directly to an
immediate. This issue was hidden in some cases by `getConstant()`
returning a pre-existing `ISD::Constant` node already within the
instruction selection worklist.

This patch works around this by directly emitting a `CopyFromReg WZR`
within SelectSMETileSlice, which does not need further instruction
selection.

Fixes #203295
DeltaFile
+12-13llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+11-0llvm/test/CodeGen/AArch64/sme-intrinsics-mova-insert.ll
+23-132 files

LLVM/project 9445c05llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64InstrFormats.td, llvm/test/MC/AArch64 arm64-aliases.s brbe.s

[AArch64] Define APAS, BRB and TRCIT as SYS aliases

`APAS`, `BRB IALL/INJ` and `TRCIT` use `SYS` encodings, so define them
as aliases of SYSxt instead of separate instructions.

Check that the preferred architectural aliases are printed when their
features are enabled and that disassembly falls back to the generic SYS
spelling when not enabled.
DeltaFile
+27-0llvm/test/MC/AArch64/arm64-aliases.s
+8-13llvm/lib/Target/AArch64/AArch64InstrInfo.td
+0-19llvm/lib/Target/AArch64/AArch64InstrFormats.td
+4-0llvm/test/MC/AArch64/brbe.s
+39-324 files