LLVM/project 74161c1llvm/include/llvm/CodeGen AsmPrinter.h

fix

Created using spr 1.3.7
DeltaFile
+2-0llvm/include/llvm/CodeGen/AsmPrinter.h
+2-01 files

LLVM/project 48f1612llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+271-10518 files not shown
+315-13424 files

LLVM/project 01fd9c5llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+49-28llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+17-4llvm/lib/Target/X86/X86.h
+309-12722 files not shown
+381-16728 files

LLVM/project dd4083allvm/lib/Target/X86 X86FixupLEAs.cpp

fix

Created using spr 1.3.7
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+1-1llvm/lib/Target/X86/X86FixupLEAs.cpp
+1-11 files

LLVM/project 1765a95mlir/python/mlir/dialects nvgpu.py nvvm.py

[MLIR][Python] Ensure `_Dialect` is imported for all dialects (#173729)

`from ._xxx_ops_gen import _Dialect` appears in some dialect modules,
like builtin, scf, irdl.. but not all of them. This PR ensures that for
upstream dialects, `<dialect module>._Dialect` is availble, like
`arith._Dialect`.

This PR is a prerequisite for the work I’m currently doing. Later on,
I’d like to use these `_Dialect` objects via something like
`conversion_target.add_legal_dialect(arith._Dialect)` (we could of
course just use strings like `add_legal_dialect("arith")`, but compared
to using a defined symbol, I think that’s more prone to typos).
DeltaFile
+1-0mlir/python/mlir/dialects/nvgpu.py
+1-0mlir/python/mlir/dialects/nvvm.py
+1-0mlir/python/mlir/dialects/openacc.py
+1-0mlir/python/mlir/dialects/openmp.py
+1-0mlir/python/mlir/dialects/python_test.py
+1-0mlir/python/mlir/dialects/rocdl.py
+6-019 files not shown
+25-025 files

LLVM/project f59e2b2llvm/include/llvm InitializePasses.h, llvm/include/llvm/CodeGen GCEmptyBasicBlocks.h Passes.h

[CodeGen] Port gc-empty-basic-blocks to new pass manager (#137585)

Co-authored-by: Aiden Grossman <aidengrossman at google.com>
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+51-0llvm/test/CodeGen/X86/gc-empty-basic-blocks.mir
+23-9llvm/lib/CodeGen/GCEmptyBasicBlocks.cpp
+24-0llvm/include/llvm/CodeGen/GCEmptyBasicBlocks.h
+1-1llvm/include/llvm/InitializePasses.h
+1-1llvm/include/llvm/CodeGen/Passes.h
+1-1llvm/include/llvm/Passes/MachinePassRegistry.def
+101-122 files not shown
+103-138 files

LLVM/project a270907llvm/test/DebugInfo/MIR/InstrRef x86-lea-fixup.mir x86-lea-fixup-2.mir

fix

Created using spr 1.3.7
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+3-3llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup.mir
+1-1llvm/test/DebugInfo/MIR/InstrRef/x86-lea-fixup-2.mir
+4-42 files

LLVM/project 61f232allvm/test/CodeGen/X86 basic-block-sections-mir-parse.mir

fix

Created using spr 1.3.7
DeltaFile
+1-1llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+1-11 files

LLVM/project e020d40llvm/test/CodeGen/X86 basic-block-sections-mir-parse.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
DeltaFile
+1-1llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+1-11 files

LLVM/project ad7c8a5llvm/test/CodeGen/X86 basic-block-sections-mir-parse.mir

fix

Created using spr 1.3.7
DeltaFile
+1-1llvm/test/CodeGen/X86/basic-block-sections-mir-parse.mir
+1-11 files

LLVM/project 9d90e1allvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+8-7llvm/include/llvm/Passes/CodeGenPassBuilder.h
+191-609 files not shown
+204-7015 files

LLVM/project 949cb11llvm/include/llvm/CodeGen AsmPrinter.h, llvm/lib/CodeGen/AsmPrinter AsmPrinter.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+88-52llvm/lib/Target/X86/X86FixupLEAs.cpp
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+271-10516 files not shown
+311-13022 files

LLVM/project 5671aballvm/lib/Target/X86 X86CodeGenPassBuilder.cpp

fix sigsegv

Created using spr 1.3.7
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+2-2llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+2-21 files

LLVM/project e904250llvm/include/llvm/CodeGen AsmPrinter.h, llvm/include/llvm/Passes CodeGenPassBuilder.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+57-39llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+61-3llvm/include/llvm/CodeGen/AsmPrinter.h
+37-1llvm/lib/Target/X86/X86AsmPrinter.h
+15-5llvm/lib/Target/X86/X86AsmPrinter.cpp
+13-5llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+8-7llvm/include/llvm/Passes/CodeGenPassBuilder.h
+191-609 files not shown
+204-7015 files

LLVM/project 3b3db01utils/bazel/llvm-project-overlay/mlir BUILD.bazel

remove stray newline
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+0-1utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+0-11 files

LLVM/project 4cc1cc1mlir/include/mlir/Bindings/Python IRCore.h, mlir/lib/Bindings/Python IRCore.cpp MainModule.cpp

move impls
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+454-0mlir/lib/Bindings/Python/IRCore.cpp
+65-379mlir/include/mlir/Bindings/Python/IRCore.h
+20-0mlir/lib/Bindings/Python/MainModule.cpp
+539-3793 files

LLVM/project f22a225mlir/include/mlir/Bindings/Python IRCore.h, mlir/lib/Bindings/Python IRCore.cpp MainModule.cpp

move impls
DeltaFile
+709-0mlir/lib/Bindings/Python/IRCore.cpp
+80-623mlir/include/mlir/Bindings/Python/IRCore.h
+20-0mlir/lib/Bindings/Python/MainModule.cpp
+809-6233 files

LLVM/project 30c6034mlir/cmake/modules AddMLIRPython.cmake, mlir/docs/Bindings Python.md

address
jpienaar comments
DeltaFile
+8-5mlir/include/mlir/Bindings/Python/IRCore.h
+4-4mlir/cmake/modules/AddMLIRPython.cmake
+2-2mlir/docs/Bindings/Python.md
+1-2mlir/lib/Bindings/Python/IRCore.cpp
+15-134 files

LLVM/project 1ee3178llvm/lib/CodeGen/SelectionDAG LegalizeDAG.cpp

[LegalizeDAG] Remove unnecessary EVT->MVT->EVT conversion. NFC (#173707)

There doesn't appear to be any reason to use MVT here. All of the uses
expect an EVT.
DeltaFile
+2-2llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+2-21 files

LLVM/project 2c376ffclang/test/CodeGenOpenCL builtins-amdgcn-gfx1250-wmma-w32.cl, llvm/lib/IR AutoUpgrade.cpp

[AMDGPU] add clamp immediate operand to WMMA iu8 intrinsic (#171069)

Fixes #166989 

- Adds a clamp immediate operand to the AMDGPU WMMA iu8 intrinsic and
threads it through LLVM IR, MIR lowering, Clang builtins/tests, and MLIR
ROCDL dialect so all layers agree on the new operand
- Updates AMDGPUWmmaIntrinsicModsAB so the clamp attribute is emitted,
teaches VOP3P encoding to accept the immediate, and adjusts Clang
codegen/builtin headers plus MLIR op definitions and tests to match
- Documents what the WMMA clamp operand do
- Implement bitcode AutoUpgrade for source compatibility on WMMA IU8
Intrinsic op

Possible future enhancements:
- infer clamping as an optimization fold based on the use context

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
DeltaFile
+32-0llvm/lib/IR/AutoUpgrade.cpp
+12-12llvm/test/CodeGen/AMDGPU/wmma-coececution-valu-hazards.mir
+21-0llvm/test/Bitcode/amdgpu-wmma-iu8-clamp-upgrade.ll
+10-10llvm/test/CodeGen/AMDGPU/wmma-hazards-gfx1250-w32.mir
+11-7mlir/test/Target/LLVMIR/rocdl.mlir
+13-2clang/test/CodeGenOpenCL/builtins-amdgcn-gfx1250-wmma-w32.cl
+99-3115 files not shown
+172-6121 files

LLVM/project d777b1allvm/lib/Transforms/Vectorize LoopVectorize.cpp

[VPlan] Skip phi recipes in tryToBuildVPlan (NFC).

No phi recipes are being transformed in the main loop any longer, so
skip phi recipes.

This also allows to clarify which recipes need skipping explicitly.
Those are recipes that have been already transformed.

Follow-up to post-commit comment in
https://github.com/llvm/llvm-project/pull/168291.
DeltaFile
+7-6llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+7-61 files

LLVM/project c381a09clang-tools-extra/clang-tidy/misc UseInternalLinkageCheck.cpp, clang-tools-extra/docs/clang-tidy/checks/misc use-internal-linkage.rst

[clang-tidy] Add C support to `misc-use-internal-linkage` (#173196)

Right now, this check simply doesn't work in C, because we exclude
anything that `isExternC` from analysis (in C, everything `isExternC`).

Besides that, the docs and diagnostic message talk about anonymous
namespaces, which don't exist in C (this was noted in #97969, I'm just
summarizing).

The existing tests use abbreviated `// CHECK-MESSAGES` assertions (e.g.
`// CHECK-MESSAGES: :[[@LINE-1]]:16: warning: function 'cxf'`), but I've
expanded them out. Yes, it's verbose, but now that the diagnostic
message has an important difference between C and C++, I feel it's
important that we test it.
DeltaFile
+21-14clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
+33-0clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage.c
+12-12clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-func.cpp
+9-6clang-tools-extra/docs/clang-tidy/checks/misc/use-internal-linkage.rst
+6-6clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-var.cpp
+2-2clang-tools-extra/test/clang-tidy/checkers/misc/use-internal-linkage-fix-mode-none.cpp
+83-405 files not shown
+88-4411 files

LLVM/project bd5cb73clang-tools-extra/clang-tidy/misc UseInternalLinkageCheck.cpp

formatting
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+12-11clang-tools-extra/clang-tidy/misc/UseInternalLinkageCheck.cpp
+12-111 files

LLVM/project 9959239llvm/test/CodeGen/AMDGPU rsq.f64.ll, llvm/test/tools/llvm-mca/AArch64/Olympus sve-instructions.s neon-instructions.s

Merge branch 'main' into c-use-internal-linkage
DeltaFile
+10,680-0llvm/test/tools/llvm-mca/AArch64/Olympus/sve-instructions.s
+4,532-3,195llvm/test/CodeGen/AMDGPU/rsq.f64.ll
+6,837-0llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
+5,616-0llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fp.s
+5,310-0llvm/test/tools/llvm-mca/AArch64/Olympus/neon-instructions.s
+4,742-0llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-vlseg-vsseg.s
+37,717-3,1951,067 files not shown
+110,840-15,2821,073 files

LLVM/project 87e8e7dllvm/lib/Target/SPIRV SPIRVCombinerHelper.cpp SPIRVPostLegalizer.cpp, llvm/test/CodeGen/SPIRV/llvm-intrinsics matrix-multiply.ll matrix-transpose.ll

[SPIRV] Implement lowering for llvm.matrix.transpose and llvm.matrix.multiply (#172050)

This patch implements the lowering for the llvm.matrix.transpose and
llvm.matrix.multiply intrinsics in the SPIR-V backend.

- llvm.matrix.transpose is lowered to a G_SHUFFLE_VECTOR with a
  mask calculated to transpose the elements.
- llvm.matrix.multiply is lowered by decomposing the operation into
  dot products of rows and columns:
  - Rows and columns are extracted using G_UNMERGE_VALUES or shuffles.
  - Dot products are computed using OpDot for floating point vectors
    or standard arithmetic for scalars/integers.
  - The result is reconstructed using G_BUILD_VECTOR.

This change also updates SPIRVPostLegalizer to improve type deduction
for G_UNMERGE_VALUES, enabling correct type assignment for the
intermediate virtual registers generated during lowering.

New tests are added to verify support for various matrix sizes and
element types (float and int).
DeltaFile
+189-0llvm/lib/Target/SPIRV/SPIRVCombinerHelper.cpp
+168-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-multiply.ll
+124-0llvm/test/CodeGen/SPIRV/llvm-intrinsics/matrix-transpose.ll
+46-49llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
+21-0llvm/lib/Target/SPIRV/SPIRVCombinerHelper.h
+16-2llvm/lib/Target/SPIRV/SPIRVCombine.td
+564-511 files not shown
+567-557 files

LLVM/project 5aee01acompiler-rt/lib/builtins CMakeLists.txt

[compiler-rt] Rework 08debd7f4461 [-Wno-c2y-extensions]
DeltaFile
+3-1compiler-rt/lib/builtins/CMakeLists.txt
+3-11 files

LLVM/project 26cc61ellvm/utils/lit/tests shtest-ulimit-nondarwin.py

[lit] Disable ulimit-nodarwin test on FreeBSD (#173155)

FreeBSD does not support using ulimit to grow up max file number per
process. This characteristic is inherited by Darwin and thus we pass
this test on FreeBSD as well.
DeltaFile
+1-1llvm/utils/lit/tests/shtest-ulimit-nondarwin.py
+1-11 files

LLVM/project 2c13075mlir/lib/Analysis DataFlowFramework.cpp

[mlir][dataflow] Fix DataFlowFramework crash by add isBlockEnd logic in the ProgramPoint::print (#173471)

Running -test-dead-code-analysis -debug on the following IR will trigger
a data-flow analysis framework assert, you can see
https://github.com/llvm/llvm-project/blob/2d6b1b174194198498eb10ae811632b3dd945ecf/mlir/include/mlir/Analysis/DataFlowFramework.h#L110
Fix DataFlowFramework crash by add isBlockEnd logic in the
ProgramPoint::print.
```
func.func @trs(%idx1: index, %idx2: index, %s: f32) {
  scf.parallel (%i) = (%idx1) to (%idx2) step (%idx2) {
    %r = memref.alloca() : memref<10xf32>
    scf.forall (%e2) in (%idx2) {
      %a = memref.load %r[%idx2] : memref<10xf32>
    }
  }
  return
}
```
DeltaFile
+6-2mlir/lib/Analysis/DataFlowFramework.cpp
+6-21 files

LLVM/project 1f54d26mlir/docs Canonicalization.md

address comments: link to Linalg forms
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+5-4mlir/docs/Canonicalization.md
+5-41 files

LLVM/project b9ada74.github/workflows pr-code-lint.yml

[Github][CI] Trigger `code-lint` for clang-tidy documentations (#173700)

Previously we added `doc8` to `code-lint` workflow. However, PRs contain
only documentation changes won't trigger this workflow.

An example: https://github.com/llvm/llvm-project/pull/173699/checks
didn't trigger `code-lint`.

This commit fixes the issue.
DeltaFile
+1-0.github/workflows/pr-code-lint.yml
+1-01 files