[mlir][spirv] (De)serialize Offset, XfbBuffer and XfbStride decorations (#181835)
Process decorations number 35, 36 and 37 in SPIR-V deserializer and
serializer; add a simple test case.
[X86] combineSETCC - drop unnecessary shift amount bounds check for larger-than-legal ICMP_ZERO(AND(X,SHL(1,IDX))) folds (#182021)
For i128 etc. bittest patterns, we split the pattern into a i32
extraction + i32 bittest.
But we were unnecessarily limiting this to inbounds shift amounts. I
wrote this fold at the same time as narrowBitOpRMW where we needed the
bounds check for safe memory access, which isn't necessary in
combineSETCC.
Fix 2 of 2 for #147216
[RDF] Fix DenseMap reference invalidation in computePhiInfo (#182144)
In Liveness::computePhiInfo, the reference `RefMap &RUM =
RealUseMap[PA.Id]` can be invalidated when the inner loop inserts into
RealUseMap via `RealUseMap[P.first][SS.Id]`. If `P.first` is a new key,
the DenseMap may rehash, invalidating the RUM reference and any
iterators into it.
Fix by making a copy of the map value instead of holding a reference.
This is detected by _GLIBCXX_DEBUG (enabled via EXPENSIVE_CHECKS) which
tracks iterator validity on std::unordered_map (RefMap).
[LV] NFCI: Add RecurKind to VPPartialReductionChain (#181705)
This avoids having to pass around the RecurKind or re-figure it out from
the VPReductionPHI node.
This is useful in a follow-up PR, where we need to distinguish between a
`Sub` and `AddWithSub` recurrence, which can't be deduced from the
`ReductionBinOp` field.
[mlir][tosa] Fix dense_resource data alignment in tosa-narrow-* tests (#182253)
The alignment of int64 and float64 dense resource should be 8 and not 4
[RegisterCoalescer] Prefer copy over rematerialization when smaller
When the source register has multiple uses, compare instruction sizes
before rematerializing. If the copy is smaller than the rematerialized
instruction, prefer keeping the copy to reduce code size.
Additionally, register-to-register copies are often eliminated by
register renaming on modern out-of-order CPUs, making them effectively
free at runtime.
[flang][OpenMP] Push context for all directives in resolve-directives.cpp (#181736)
The visitors for loop and simple-standalone constructs had switch
statements that explicitly listed all directives in the category, and
pushed the context for them.
The visitor for OmpBlockConstruct listed a selection of block-associated
directives, but they are the only ones for which OmpBlockConstruct is
created directly without a subclass.
Disable shared builds for tests failing on Windows (#182249)
PR #181720 introduced shared builds for LLDB API tests to improve test
efficiency. But several data formatter tests requiring PDB debug info
are failing on Windows x64 and AArch64 platforms.
This patch disables shared builds for these tests by setting
SHARED_BUILD_TESTCASE = False
The shared build optimization breaks these tests because they reuse
build artifacts between test methods
The test runs may could use multiple methods with different debug
formats or compiler flags. When a test runs first it builds with one set
of flags, but then it runs again but **make** sees the source unchanged
so it skips rebuilding and reuses the same old binary instead of
rebuilding with correct flags.
[analyzer] Add BranchCondition callback to 'switch' (#182058)
Previously the condition of a 'switch' statement did not trigger a
`BranchCondition` callback. This commit resolves this old FIXME and e.g.
lets the checker `core.uninitialzed.Branch` report code where the
condition of a `switch` statement is undefined.
This commit also contains a very small unrelated change that removes a
short fragment of dead code from `processBranch`.
[llubi] Add support for GEP/alloca/inttoptr (#181861)
This patch mainly adds support for GEP. To test GEP functionality,
alloca/inttoptr are also introduced.
[SPIRV] Fix crash due to incorrect state of the SPIRVGlobalRegistry.
Also, simplified checks in test that were not stricly necessary and were failing with this fix.
--Added support for the extension SPV_KHR_non_semantic_info
--Added support for the extension SPV_KHR_relaxed_extended_instruction
--Added instructions from the documentation of the extension.
--Added supporting tests for the same.
[RISCV] Ensure false dominates in vmerge peephole (#181664)
When folding vmerge into it's true operand, true will eventually use the
false operand as its passthru, but we don't check that the instruction
defining false dominates true. This can cause a use before def.
Fix this by sinking true past false. We already do this for the mask, so
this does it in the same call to ensureDominates.
We don't seem to run into this with current codegen but upcoming changes
to RISCVVLOptimizer expose it.
