LLVM/project 9e13720libcxx CREDITS.TXT, libcxx/docs/ReleaseNotes 22.rst

[libc++] Add MSVC's implementation of exception_ptr for Windows (#94977)

Microsoft is happy to contribute our implementation of exception_ptr for
Windows, under the Apache License v2.0 with LLVM Exception that our STLs
share.

* excptptr.cpp, copied verbatim as:
https://github.com/microsoft/STL/blob/e36ee6c2b9bc6f5b1f70776c18cf5d3a93a69798/stl/src/excptptr.cpp
* <exception>, copied verbatim as:
https://github.com/microsoft/STL/blob/e36ee6c2b9bc6f5b1f70776c18cf5d3a93a69798/stl/inc/exception

The implementation was integrated into libc++:
* Deleted STL copy of <exception>. All standard exception classes are
  already provided by libc++'s standard headers.
* Replaced MSVC STL naming conventions and macros (_STD,
  _CRTIMP2_PURE, _Ref_count_base, _Ptr_base, _EXCEPTION_RECORD, etc.)
  with standard libc++ style and identifiers (_LIBCPP_EXPORTED_FROM_ABI,
  __double_leading_underscore variable/function names).
* Replaced internal MSVC CRT headers (<trnsctrl.h>,

    [16 lines not shown]
DeltaFile
+425-35libcxx/src/support/runtime/exception_pointer_msvc.ipp
+4-29libcxx/include/__exception/exception_ptr.h
+6-0libcxx/docs/ReleaseNotes/22.rst
+1-1libcxx/CREDITS.TXT
+436-654 files

LLVM/project 188b9a3llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/InstCombine frexp-implied-exponent-range-dominating-conditions.ll

ValueTracking: Generalize known frexp exponent range to any constant (#208316)

Extend computeKnownExponentRangeFromContext beyond the special case of a
dominating fabs(V) compare against exactly 1.0 to any finite limit.

Generalizing below 1.0 exposes a soundness issue: frexp(0) has exponent
0, so a bound derived assuming a nonzero value could wrongly exclude it
when the limit implies a negative maximum exponent. Query fcZero and
clamp the maximum exponent to at least 0 when the source may be zero.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+485-38llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
+34-19llvm/lib/Analysis/ValueTracking.cpp
+519-572 files

LLVM/project 2396c15clang/unittests/Analysis/FlowSensitive TransferTest.cpp

[NFC][clang][dataflow] Add explanatory comment to test. (#208779)
DeltaFile
+3-0clang/unittests/Analysis/FlowSensitive/TransferTest.cpp
+3-01 files

LLVM/project 92d9e0dlldb/source/Commands CommandObjectRegister.cpp, lldb/test/Shell/Commands command-register-read-alignment.test

[lldb] Improved formatting of 'register read' command. (#188049)

Made alignment of 'register read' command's output to be dynamic to the
register's name lengths -> `=` signs of different registers align when
printed as sets, also aligned when picked in some custom ordering. No
alignment between separate sets is included (i.e, each set is aligned to
itself only). Sample change:

```
Micro-architectural Registers:
      r_pc = 0x0000108c  main.xexe`main + 20 at main.c:5:5
  instr_trace_r_init_print = 0x00
  wb_csr_file_r_mstatus = 0x00000000
  wb_csr_file_r_mie = 0x00000000
```

This example is changed into:

```

    [9 lines not shown]
DeltaFile
+67-6lldb/source/Commands/CommandObjectRegister.cpp
+46-0lldb/test/Shell/Commands/command-register-read-alignment.test
+113-62 files

LLVM/project 22ca91cclang/include/clang/AST DeclCXX.h, clang/lib/AST DeclCXX.cpp

[clang] more useful error message for decomposition declaration missing initializer (#127924)

#90107

Diagnostic message for decomposition declaration missing an initializer
only highlights the declared identifier. This change adds an additional
diagnostic message to highlight the token found where the initializer
was expected. So, for example:

auto [a, b] S = {1, 2}

The new error points to 'S' and says that 'S' was found where an
initializer was expected.
DeltaFile
+9-11clang/lib/AST/DeclCXX.cpp
+15-4clang/test/Parser/cxx1z-decomposition.cpp
+10-5clang/include/clang/AST/DeclCXX.h
+8-3clang/lib/Sema/SemaDecl.cpp
+3-3clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+4-2clang/test/PCH/cxx1z-decomposition.cpp
+49-284 files not shown
+55-3110 files

LLVM/project 8709f6fllvm/include module.modulemap, llvm/include/llvm/TargetParser TripleName.def

Triple: Move OS/vendor/environment names into a def file (#208722)

Extract the component name lists into a macro .def file, similar
to how many targets do for CPU names. The arch/subarch names are
left alone because they have trickier manual parsing logic.

Co-Authored-By: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+20-356llvm/lib/TargetParser/Triple.cpp
+198-0llvm/include/llvm/TargetParser/TripleName.def
+1-0llvm/include/module.modulemap
+219-3563 files

LLVM/project 93737c9clang/lib/Driver/ToolChains AMDGPU.cpp, clang/test/Driver hip-include-path.hip

clang/AMDGPU: Forward host system includes in offload compiles (#208783)

Commit 640079288c5e merged the AMDGPU toolchain subclasses but dropped
the HIPAMDToolChain::AddClangSystemIncludeArgs override, which forwarded to
the host toolchain.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+10-0clang/test/Driver/hip-include-path.hip
+7-0clang/lib/Driver/ToolChains/AMDGPU.cpp
+17-02 files

LLVM/project 340bd05lldb/include/lldb/Target DynamicRegisterInfo.h, lldb/source/Target DynamicRegisterInfo.cpp

[lldb] Simplify creating RegisterSets in DynamicRegisterInfo (#208592)

`DynamicRegisterInfo::GetRegisterSetIndexByName` is only used in
`DynamicRegisterInfo::SetRegisterInfo` so I inlined it and removed the
function. I also noticed that `m_set_names` is only used in this
function for setup, so I made it a local variable instead of a member.
DeltaFile
+19-24lldb/source/Target/DynamicRegisterInfo.cpp
+0-5lldb/include/lldb/Target/DynamicRegisterInfo.h
+19-292 files

LLVM/project d1dbd48clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

[CIR] Generalize the special member attribute into func_info and add a callee resolver (#207261)

The `cxx_special_member` slot on `cir.func` becomes a general slot named
`func_info`, so facts about a function that are not special member facts
can join later without redesign.

Nothing about the special member forms changes. The attribute stays the
same union of the constructor, destructor, and assignment forms. Each
form keeps its shape and its embedded record type, and the CXX ABI
lowering still replaces that type with the converted one. The FuncOp
helpers keep their names, so passes that read the special member facts
do not change.

The printed keyword on `cir.func` changes from `special_member` to
`func_info`, so the old spelling no longer parses. The existing tests
update their check lines with no other change.

Calls gain a resolver named `resolveCallee` that returns the function a
direct call targets, so a pass standing at a call can read the facts

    [5 lines not shown]
DeltaFile
+97-0clang/unittests/CIR/CallOpTest.cpp
+21-16clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+12-12clang/test/CIR/Transforms/cxx-abi-lowering-attrs.cir
+8-8clang/test/CIR/CodeGen/cxx-special-member-attr.cpp
+15-1clang/include/clang/CIR/Dialect/IR/CIROps.td
+8-8clang/test/CIR/IR/func.cir
+161-457 files not shown
+190-5913 files

LLVM/project cc0f756compiler-rt/test/asan/TestCases/Posix new_array_cookie_with_new_from_class.cpp

[asan][test] Fix Posix/new_array_cookie_with_new_from_class.cpp to work for arm targets (#208378)

arm targets, and arm64 targets on Darwin, use a 2-pointer array cookie
size. Update the test to support that.

Assisted-by: Claude Code

rdar://181775880
DeltaFile
+8-5compiler-rt/test/asan/TestCases/Posix/new_array_cookie_with_new_from_class.cpp
+8-51 files

LLVM/project 5b9d51futils/bazel/llvm-project-overlay/lldb BUILD.bazel

[Bazel] Fixes 5ddad72 (#208792)

This fixes 5ddad72b154e4c4ddc2547b6cd17abd7b9a6ae53.

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=5ddad72b154e4c4ddc2547b6cd17abd7b9a6ae53

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+7-2utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
+7-21 files

LLVM/project 29174c0llvm/test/Analysis/CostModel/AMDGPU fadd.ll minimumnum.ll

AMDGPU: Migrate Analysis/Transforms tests to amdgpu subarch triple (1)

Mechanically migrate the command-line target spelling on RUN lines from
-mtriple=amdgcn ... -mcpu=<gfx> to the folded subarch triple form (e.g.
-mtriple=amdgpu9.00-amd-amdhsa), dropping the redundant -mcpu.

This first batch covers Analysis and Transforms tests. Tests whose output
materially depends on -mcpu (e.g. opt runs that record a target-cpu attribute,
or cost-model tests whose default subtarget differs) are left for separate
handling. This begins a series of ~62 PRs covering backend tests.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+10-10llvm/test/Analysis/CostModel/AMDGPU/fadd.ll
+10-10llvm/test/Analysis/CostModel/AMDGPU/minimumnum.ll
+10-10llvm/test/Analysis/CostModel/AMDGPU/maximumnum.ll
+10-10llvm/test/Analysis/CostModel/AMDGPU/fma.ll
+10-10llvm/test/Analysis/CostModel/AMDGPU/canonicalize.ll
+10-10llvm/test/Analysis/CostModel/AMDGPU/fdiv.ll
+60-6073 files not shown
+405-40579 files

LLVM/project 03e19abllvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/InstCombine frexp-implied-exponent-range-dominating-conditions.ll

ValueTracking: Generalize known frexp exponent range to any constant

Extend computeKnownExponentRangeFromContext beyond the special case of a
dominating fabs(V) compare against exactly 1.0 to any finite limit.

Generalizing below 1.0 exposes a soundness issue: frexp(0) has exponent
0, so a bound derived assuming a nonzero value could wrongly exclude it
when the limit implies a negative maximum exponent. Query fcZero and clamp
the maximum exponent to at least 0 when the source may be zero.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+485-38llvm/test/Transforms/InstCombine/frexp-implied-exponent-range-dominating-conditions.ll
+34-19llvm/lib/Analysis/ValueTracking.cpp
+519-572 files

LLVM/project 5ddad72lldb/include/lldb/Protocol/MCP Protocol.h, lldb/source/Plugins/Protocol/MCP ProtocolServerMCP.cpp

[lldb-mcp] Replace byte forwarding with a protocol-aware multiplexer (#208506)

To serve several LLDB instances behind one endpoint it has to act as a
multiplexer. This PR adds a Multiplexer that presents a unified MCP
server to the client. It answers initialize and tools/list locally, and
forwards tools/call and the resource requests to the different instances
through an mcp::Client (added in #208371), relaying the answer back.

For now, this still drives a single backend. Discovering and routing
across several instances is coming next.

Assisted-by: Claude
DeltaFile
+173-0lldb/tools/lldb-mcp/Multiplexer.cpp
+86-0lldb/tools/lldb-mcp/Multiplexer.h
+37-36lldb/tools/lldb-mcp/lldb-mcp.cpp
+4-0lldb/include/lldb/Protocol/MCP/Protocol.h
+2-2lldb/source/Plugins/Protocol/MCP/ProtocolServerMCP.cpp
+3-0lldb/source/Protocol/MCP/Protocol.cpp
+305-381 files not shown
+306-387 files

LLVM/project 94fa636llvm/docs ORCv2.md Remarks.md

[docs] Finish MyST migration for selected docs
DeltaFile
+261-274llvm/docs/ORCv2.md
+218-239llvm/docs/Remarks.md
+208-157llvm/docs/AMDGPUExecutionSynchronization.md
+127-122llvm/docs/SPIRVUsage.md
+77-104llvm/docs/NVPTXUsage.md
+56-58llvm/docs/CompileCudaWithLLVM.md
+947-95413 files not shown
+1,097-1,10319 files

LLVM/project 1e3ea26llvm/docs NVPTXUsage.md JITLink.md

[docs] Convert selected rst docs with rst2myst
DeltaFile
+2,408-2,922llvm/docs/NVPTXUsage.md
+509-575llvm/docs/JITLink.md
+475-496llvm/docs/ORCv2.md
+469-488llvm/docs/Instrumentor.md
+356-333llvm/docs/Remarks.md
+313-346llvm/docs/HowToUpdateDebugInfo.md
+4,530-5,16013 files not shown
+6,592-7,31719 files

LLVM/project b766b85llvm/docs NVPTXUsage.md NVPTXUsage.rst

[docs] Rename selected LLVM docs to Markdown
DeltaFile
+4,767-0llvm/docs/NVPTXUsage.md
+0-4,767llvm/docs/NVPTXUsage.rst
+0-1,177llvm/docs/JITLink.rst
+1,177-0llvm/docs/JITLink.md
+0-974llvm/docs/ORCv2.rst
+974-0llvm/docs/ORCv2.md
+6,918-6,91832 files not shown
+13,451-13,45138 files

LLVM/project d981ae2llvm/lib/Transforms/Utils CallPromotionUtils.cpp, llvm/test/Transforms/SampleProfile icp_target_feature.ll

Reapply "[PGO][ICP] Prevent indirect call promotion to functions with incompatible target features" (#208774)

Reverts llvm/llvm-project#208079

We're still seeing build failures without this, so reapply for now.
DeltaFile
+61-0llvm/test/Transforms/SampleProfile/icp_target_feature.ll
+21-0llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
+82-02 files

LLVM/project 7c35673mlir/lib/Conversion/VectorToXeGPU VectorToXeGPU.cpp, mlir/test/Conversion/VectorToXeGPU transfer-read-to-xegpu.mlir transfer-write-to-xegpu.mlir

[mlir][xegpu] Add support for 1D SLM case in vector-to-xepgu (#208276)

Currently vector-to-xegpu only support 2D SLM buffers. However
load/store_matrix op definition allows 1D access.

Assisted by: Claude
DeltaFile
+24-19mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
+15-5mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
+6-6mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
+45-303 files

LLVM/project 6868477llvm/utils amdgpu-migrate-test-triples.py

utils/AMDGPU: Fold -mcpu across piped tools and llvm-objdump triples

Generalize the triple migration to RUN lines that pipe several tools (e.g. opt | llc, or llc | llvm-objdump), each carrying its own matching triple and -mcpu. When every -mcpu on the line names the same foldable target and there is one amdgcn triple per -mcpu, fold them all. Also recognize the llvm-objdump --triple= form (not just -mtriple=).

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+13-9llvm/utils/amdgpu-migrate-test-triples.py
+13-91 files

LLVM/project 3f99ca6llvm/utils amdgpu-migrate-test-triples.py

utils/AMDGPU: Handle generic targets in triple migration script

Map the gfx*-generic -mcpu values to their major-subarch triples (e.g. gfx9-4-generic -> amdgpu9.4, gfx12-generic -> amdgpu12) and widen the -mcpu regex to match hyphenated generic names, so RUN lines using -mtriple=amdgcn -mcpu=<generic> fold into the subarch triple.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+14-1llvm/utils/amdgpu-migrate-test-triples.py
+14-11 files

LLVM/project 0cb9d24llvm/utils amdgpu-migrate-test-triples.py amdgpu-migrate-test-triples-batch.sh

utils/AMDGPU: Add test triple migration helper scripts

Add scripts to incrementally migrate AMDGPU lit tests from the
`-mtriple=amdgcn ... -mcpu=<gfx>` command-line form to the folded
sub-architecture triple form (e.g. -mtriple=amdgpu9.00-amd-amdhsa).

amdgpu-migrate-test-triples.py rewrites RUN lines, folding the -mcpu
subtarget into the triple subarch and dropping -mcpu. It is conservative:
only lines with a single plain gfx (or device-alias) -mcpu and a single
amdgcn -mtriple are touched. amdgpu-migrate-test-triples-batch.sh drives a
batch: rewrite, run lit, and revert any file that fails so only passing
migrations remain. A README documents usage.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+184-0llvm/utils/amdgpu-migrate-test-triples.py
+71-0llvm/utils/amdgpu-migrate-test-triples-batch.sh
+65-0llvm/utils/amdgpu-migrate-test-triples-README.md
+320-03 files

LLVM/project 39858bcllvm/utils amdgpu-migrate-test-triples.py

utils/AMDGPU: Also migrate disabled RUN lines (XUN/xUN/RUNX)

Recognize commented-out RUN line variants (XUN:, xUN:, RUNX:) kept for future re-enabling, so their amdgcn triples are folded into the subarch form along with the active RUN lines.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+4-1llvm/utils/amdgpu-migrate-test-triples.py
+4-11 files

LLVM/project db25816llvm/utils amdgpu-pin-default-subtarget.py

AMDGPU: Add script to pin default subtarget in tests

Adds amdgpu-pin-default-subtarget.py, which rewrites a bare amdgcn
-mtriple (one with no subarch, which now errors with "cannot codegen
with no subarch") to the subarch triple matching the historical per-OS
default subtarget: amdhsa -> amdgpu7.00 (gfx700), everything else ->
amdgpu6.00 (gfx600). Only RUN lines without an explicit -mcpu are
touched; lines that name a CPU are fold cases left to the triple
migration tooling.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+90-0llvm/utils/amdgpu-pin-default-subtarget.py
+90-01 files

LLVM/project 3e662fbllvm/utils amdgpu-migrate-test-target-cpu.py

utils/AMDGPU: Add target-cpu attribute migration script

Add amdgpu-migrate-test-target-cpu.py, which migrates tests that set the subtarget via a uniform "target-cpu" IR function attribute into the amdgpu subarch triple: it folds the cpu into the RUN-line triple (or strips the attribute when the triple already encodes it), and removes now-empty attribute groups and their references. Handles both .ll and .mir (indented attribute defs).

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+160-0llvm/utils/amdgpu-migrate-test-target-cpu.py
+160-01 files

LLVM/project af1ef67llvm/utils amdgpu-migrate-test-triples.py

utils/AMDGPU: Handle --mcpu/--mtriple double-dash in migration script

The migration helper only matched the single-dash -mcpu/-mtriple spelling. Some tests use the GNU-style --mcpu/--mtriple form; handle both so those RUN lines fold correctly instead of being mangled.

Co-Authored-By: Claude <noreply at anthropic.com> (Claude-Opus-4.8)
DeltaFile
+8-9llvm/utils/amdgpu-migrate-test-triples.py
+8-91 files

LLVM/project b90c095llvm/test/CodeGen/AMDGPU hsa-generic-target-features.ll generic-targets-require-v6.ll

AMDGPU: Use subarch in tests using generic arches
DeltaFile
+21-21llvm/test/CodeGen/AMDGPU/hsa-generic-target-features.ll
+18-18llvm/test/CodeGen/AMDGPU/generic-targets-require-v6.ll
+1-1llvm/test/CodeGen/AMDGPU/convergent.mir
+40-403 files

LLVM/project e21abf9llvm/test/CodeGen/AMDGPU pr155452.ll fmuladd.f32.ll, llvm/test/CodeGen/AMDGPU/GlobalISel flat-scratch-init.ll

AMDGPU: Convert tests to use subarch from triples in the file

This set was using target triple in the source rather than command
line arguments.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+51-55llvm/test/CodeGen/AMDGPU/pr155452.ll
+14-15llvm/test/CodeGen/AMDGPU/fmuladd.f32.ll
+2-5llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.ll
+2-4llvm/test/CodeGen/AMDGPU/callee-special-input-vgprs-packed.ll
+2-4llvm/test/CodeGen/AMDGPU/addrspacecast.ll
+2-3llvm/test/CodeGen/AMDGPU/vgpr-count-compute.ll
+73-8617 files not shown
+94-12423 files

LLVM/project b1db85dllvm/test/CodeGen/AMDGPU directive-amdgcn-target.ll directive-amdgcn-target-legacy-triples.ll

AMDGPU: Migrate target id tests to use new subarch triples
DeltaFile
+0-239llvm/test/CodeGen/AMDGPU/directive-amdgcn-target.ll
+239-0llvm/test/CodeGen/AMDGPU/directive-amdgcn-target-legacy-triples.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-any.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-not-supported.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-off.ll
+11-11llvm/test/CodeGen/AMDGPU/tid-mul-func-xnack-all-on.ll
+283-2839 files not shown
+380-37815 files

LLVM/project efec9e9clang/lib/Driver/ToolChains AMDGPU.cpp, clang/test/Driver hip-include-path.hip

clang/AMDGPU: Forward host system includes in offload compiles

Commit 640079288c5e merged the AMDGPU toolchain subclasses but dropped the
HIPAMDToolChain::AddClangSystemIncludeArgs override, which forwarded to the
host toolchain.

Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
DeltaFile
+10-0clang/test/Driver/hip-include-path.hip
+7-0clang/lib/Driver/ToolChains/AMDGPU.cpp
+17-02 files