LLVM/project 496a450llvm/lib/Analysis ValueTracking.cpp, llvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-rsq.ll

ValueTracking: Handle amdgcn.rsq intrinsic in computeKnownFPClass

We have other target intrinsics already in ValueTracking functions,
and no access to TTI.
DeltaFile
+42-42llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-rsq.ll
+31-0llvm/lib/Analysis/ValueTracking.cpp
+73-422 files

LLVM/project aa828ccllvm/test/Transforms/Attributor/AMDGPU nofpclass-amdgcn-rsq.ll

ValueTracking: Add baseline test for fpclass handling of amdgcn.rsq
DeltaFile
+220-0llvm/test/Transforms/Attributor/AMDGPU/nofpclass-amdgcn-rsq.ll
+220-01 files

LLVM/project 85fafd5llvm/include/llvm/Transforms/Utils ScalarEvolutionExpander.h, llvm/lib/CodeGen HardwareLoops.cpp

[SCEVExp] Get DL from SE, strip constructor arg (NFC) (#171823)

DeltaFile
+15-25llvm/lib/CodeGen/HardwareLoops.cpp
+15-15llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp
+6-6llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
+6-6polly/lib/Support/ScopHelper.cpp
+5-5llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+4-5llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
+51-6219 files not shown
+78-10725 files

LLVM/project 8689282llvm/lib/Target/AMDGPU SIInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU insert_vector_dynelt.ll extract_vector_dynelt.ll

Reapply "[AMDGPU][SDAG] Add missing cases for SI_INDIRECT_SRC/DST (#170323)"

This reverts commit 4f94941dc101b5d45b53c3efe361cd7b4b916517.
DeltaFile
+5,963-0llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
+3,310-0llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+9,297-04 files

LLVM/project c1ef7c7llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU/GlobalISel inst-select-insert-vector-elt.mir inst-select-extract-vector-elt.mir

[AMDGPU] Add missing cases for V_INDIRECT_REG_{READ/WRITE}_GPR_IDX and V/S_INDIRECT_REG_WRITE_MOVREL

A buildbot failure in https://github.com/llvm/llvm-project/pull/170323
when expensive checks were used highlighted that some of these patterns
were missing.

This patch adds V_INDIRECT_REG_{READ/WRITE}_GPR_IDX and
V/S_INDIRECT_REG_WRITE_MOVREL for V6 and V7 vector sizes
DeltaFile
+139-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
+126-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
+24-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+8-0llvm/lib/Target/AMDGPU/SIInstructions.td
+297-04 files

LLVM/project 36fff3cllvm/test/tools/sancov diff-different-bitness.test union-different-bitness.test, llvm/test/tools/sancov/Inputs dummy-32bits.0.sancov

[Review] Update RawCoverage so it keeps track of their source bitness.

In this way, we can properly warn about possible data loss.
DeltaFile
+39-50llvm/tools/sancov/sancov.cpp
+6-0llvm/test/tools/sancov/diff-different-bitness.test
+6-0llvm/test/tools/sancov/union-different-bitness.test
+0-0llvm/test/tools/sancov/Inputs/dummy-32bits.0.sancov
+51-504 files

LLVM/project 2705ba1offload/libomptarget PluginManager.cpp, offload/libomptarget/OpenMP Mapping.cpp

Address comments
DeltaFile
+2-2offload/libomptarget/PluginManager.cpp
+1-1offload/libomptarget/OpenMP/Mapping.cpp
+3-32 files

LLVM/project cdce445llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 single_elt_vector_memory_operation.ll

[X86] isLoadBitCastBeneficial - its only beneficial to bitcast between vector types if the new type is legal (#171813)

Prevents us from attempting to store illegal types like <2 x i128> that will force scalarization/splitting

Noticed while trying to avoid some split stores mentioned in #171616
DeltaFile
+7-12llvm/test/CodeGen/X86/single_elt_vector_memory_operation.ll
+6-4llvm/lib/Target/X86/X86ISelLowering.cpp
+13-162 files

LLVM/project a6b9a93llvm/lib/Target/AMDGPU SIInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU insert_vector_dynelt.ll extract_vector_dynelt.ll

Reapply "[AMDGPU][SDAG] Add missing cases for SI_INDIRECT_SRC/DST (#170323)"

This reverts commit 4f94941dc101b5d45b53c3efe361cd7b4b916517.
DeltaFile
+5,963-0llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
+3,310-0llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+9,297-04 files

LLVM/project f582fc6libcxx/test CMakeLists.txt, libcxxabi/test CMakeLists.txt

[libc++] Simplify how we install test-suite dependencies (#171504)

Based on comments in #171474, it was brought to my attention that we can
modernize and simplify how we perform the test suite installation in
libc++ and libc++abi.
DeltaFile
+15-47libcxxabi/test/CMakeLists.txt
+13-47libcxx/test/CMakeLists.txt
+28-942 files

LLVM/project c8d5ae5llvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU/GlobalISel inst-select-insert-vector-elt.mir inst-select-extract-vector-elt.mir

[AMDGPU] Add missing cases for V_INDIRECT_REG_{READ/WRITE}_GPR_IDX and V/S_INDIRECT_REG_WRITE_MOVREL

A buildbot failure in https://github.com/llvm/llvm-project/pull/170323
when expensive checks were used highlighted that some of these patterns
were missing.
DeltaFile
+139-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
+126-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
+24-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+305-04 files

LLVM/project e0387b7.github/workflows libcxx-build-and-test.yaml

[libc++][Github] Move back to main runner set (#171771)

This moves us back to the main runner set so that the next runner set
can be used for upgrading again when we want to do that. This also
captures the Github Runner version upgrade.
DeltaFile
+8-8.github/workflows/libcxx-build-and-test.yaml
+8-81 files

LLVM/project a9fadb3libcxx/modules CMakeLists.txt, libcxx/src CMakeLists.txt

[runtimes] Modernize installation targets (#171677)

This patch moves away from using cmake_install scripts to install the
various targets when building runtimes, since those have been deprecated
by CMake. Instead, we use `cmake --install` which is the prefered
method.

This patch also localizes how we set dependencies on the various
installation targets, allowing the removal of a few global variables
that were used as lists.

Finally, it makes the way we set up installation targets for libc++,
libc++abi and libunwind consistent again.
DeltaFile
+31-36libcxx/src/CMakeLists.txt
+33-32libcxxabi/src/CMakeLists.txt
+26-28libunwind/src/CMakeLists.txt
+2-4libcxxabi/include/CMakeLists.txt
+2-4libcxx/modules/CMakeLists.txt
+2-4libunwind/include/CMakeLists.txt
+96-1081 files not shown
+98-1127 files

LLVM/project dd63dffflang/include/flang/Parser parse-tree.h dump-parse-tree.h, flang/lib/Parser unparse.cpp openmp-parsers.cpp

[flang][OpenMP] Parse OpenMP 6.0 syntax of INIT clause (#171702)

This includes `FR(...)` for foreign runtime identifiers and `ATTR(...)`
for extensions. Do not store string runtime ids as character literals in
the AST. Use parser::Expr instead, since lowering would require
evaluate::Expr for these ids, and we get evaluate::Expr from
parser::Expr automatically.

Use OpenMP 6.0 naming for AST nodes (since it's the "current" one).
DeltaFile
+81-136flang/test/Parser/OpenMP/interop-construct.f90
+41-29flang/lib/Parser/unparse.cpp
+32-14flang/include/flang/Parser/parse-tree.h
+16-16flang/lib/Semantics/openmp-modifiers.cpp
+19-12flang/lib/Parser/openmp-parsers.cpp
+3-2flang/include/flang/Parser/dump-parse-tree.h
+192-2092 files not shown
+196-2128 files

LLVM/project b2dae2blldb/unittests/Host JSONTransportTest.cpp

[lldb][test] Skip all of JSONTransportTest.cpp file on Windows

We were cutting out the tests but leaving the utility functions,
leading to warnings like:
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Host\JSONTransportTest.cpp(65,6): warning: unused function 'operator==' [-Wunused-function]
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Host\JSONTransportTest.cpp(72,6): warning: unused function 'PrintTo' [-Wunused-function]

I've moved the ifndef to the start of the file to fix those.
DeltaFile
+4-3lldb/unittests/Host/JSONTransportTest.cpp
+4-31 files

LLVM/project ce86d9dclang/lib/Sema SemaConcept.cpp, clang/unittests/Support TimeProfilerTest.cpp

[Clang] Add TimeTraceScope to Sema::CheckConstraintSatisfaction (#170264)

Evaluating concepts can take quite a bit of time and it's not
necessarily obvious what's part of that and what not. This scope makes
it clear which parts are concept evaluation and where they are invoked.
DeltaFile
+5-0clang/lib/Sema/SemaConcept.cpp
+3-0clang/unittests/Support/TimeProfilerTest.cpp
+8-02 files

LLVM/project 90c340alldb/unittests/Platform/Android AdbClientTest.cpp

[lldb[test] Fix compiler warning in AdbClientTest.cpp

C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\unittests\Platform\Android\AdbClientTest.cpp(100,17): warning: unused function 'FindUnusedPort' [-Wunused-function]

Function is used by a test that is disabled on Windows.
DeltaFile
+1-1lldb/unittests/Platform/Android/AdbClientTest.cpp
+1-11 files

LLVM/project c28992aclang/include/clang/Basic DiagnosticSemaKinds.td Attr.td, clang/lib/Sema SemaTemplate.cpp SemaDeclCXX.cpp

[Clang] Allow simpler visibility annotations when targeting win32 and mingw (#133699)

MinGW and Win32 disagree on where the `__declspec(dllexport)` should be
placed on extern template instantiations. However, there doesn't
fundamentally seem to be a problem with putting the annotation in both
places. This patch adds a new diagnostic group and `-Wattribute-ignored`
warnings about where the attribute is placed if the attribute is
different on the declaration and definition. There is another new
warning group `-Wdllexport-explicit-instantiation` that also diagnoses
places where the attribute is technically ignored, even though the
correct place is also annotated. This makes it possible to significantly
simplify libc++'s visibility annotations (see #133704).
DeltaFile
+18-2clang/lib/Sema/SemaTemplate.cpp
+19-0clang/test/SemaCXX/dllexport-explicit-instantiation.cpp
+11-1clang/include/clang/Basic/DiagnosticSemaKinds.td
+8-0clang/include/clang/Basic/Attr.td
+5-1clang/include/clang/Basic/DiagnosticGroups.td
+4-1clang/lib/Sema/SemaDeclCXX.cpp
+65-51 files not shown
+66-67 files

LLVM/project 60b5d06lldb/tools/lldb-dap/tool lldb-dap.cpp

[lldb][lldb-dap] Remove unused variable

Fixes warning:
C:\Users\tcwg\llvm-worker\lldb-aarch64-windows\llvm-project\lldb\tools\lldb-dap\tool\lldb-dap.cpp(446,27): warning: unused variable 'dap_sessions_condition' [-Wunused-variable]

Variable is unused since #163653 / 5ab3375b2cf461ab02704d129a1f4d5ba1a1e275.
DeltaFile
+0-1lldb/tools/lldb-dap/tool/lldb-dap.cpp
+0-11 files

LLVM/project f66a5f8flang/include/flang/Parser parse-tree.h, flang/lib/Parser unparse.cpp

Use spec names for member type aliases
DeltaFile
+7-5flang/include/flang/Parser/parse-tree.h
+5-3flang/lib/Parser/unparse.cpp
+12-82 files

LLVM/project bc9c193llvm/lib/Target/AMDGPU SIInstructions.td SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU insert_vector_dynelt.ll extract_vector_dynelt.ll

Reapply "[AMDGPU][SDAG] Add missing cases for SI_INDIRECT_SRC/DST (#170323)"

This reverts commit 4f94941dc101b5d45b53c3efe361cd7b4b916517.
DeltaFile
+5,963-0llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
+3,310-0llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+8-0llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+9,297-04 files

LLVM/project de8603bllvm/lib/Target/AMDGPU SIInstrInfo.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU/GlobalISel inst-select-insert-vector-elt.mir inst-select-extract-vector-elt.mir

[AMDGPU][SDAG] Add missing cases for V/S_INDIRECT_REG_READ/WRITE_GPR_IDX and V/S_INDIRECT_REG_WRITE_MOVREL
DeltaFile
+70-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
+62-0llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
+24-0llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+16-0llvm/lib/Target/AMDGPU/SIInstructions.td
+172-04 files

LLVM/project 87345d2mlir/include/mlir/Conversion/AMDGPUToROCDL AMDGPUToROCDL.h, mlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp

[mlir][amdgpu] Add type conversion to populate method (NFC) (#171708)

* Renames populateAMDGPUMemorySpaceAttributeConversions to
populateAMDGPUTypeAndAttributeConversions.
* Adds TDMBaseType conversion to
populateAMDGPUTypeAndAttributeConversions.
DeltaFile
+6-6mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+3-4mlir/include/mlir/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.h
+9-102 files

LLVM/project dec52b2libcxx/src CMakeLists.txt

[libc++] Fix incorrect install component for the libc++ linker script (#171663)

This patch fixes the name of the install component for the libc++ linker
script. Every other target mentions the cxx component, and that one
mentions libcxx. I believe that was a typo in 4bd3d16c2d62.
DeltaFile
+1-1libcxx/src/CMakeLists.txt
+1-11 files

LLVM/project 54b62d7libcxx/test/libcxx clang_tidy.gen.py clang_tidy.sh.py

[libc++][NFC] Wrap line endings for clang-tidy tests (#171688)

Otherwise, the lines are extremely long and basically impossible to
read.
DeltaFile
+5-1libcxx/test/libcxx/clang_tidy.gen.py
+5-1libcxx/test/libcxx/clang_tidy.sh.py
+10-22 files

LLVM/project a3aaa1allvm/include/llvm/IR RuntimeLibcalls.td, llvm/lib/CodeGen TargetLoweringBase.cpp

DAG: Use RuntimeLibcalls to legalize vector frem calls (#170719)

This continues the replacement of TargetLibraryInfo uses in codegen
with RuntimeLibcallsInfo started in
821d2825a4f782da3da3c03b8a002802bff4b95c.
The series there handled all of the multiple result calls. This
extends for the other handled case, which happened to be frem.

For some reason the Libcall for these are prefixed with "REM_", for
the instruction "frem", which maps to the libcall "fmod".
DeltaFile
+36-80llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
+49-4llvm/lib/IR/RuntimeLibcalls.cpp
+23-13llvm/test/Transforms/Util/DeclareRuntimeLibcalls/sleef.ll
+22-13llvm/test/Transforms/Util/DeclareRuntimeLibcalls/armpl.ll
+11-11llvm/include/llvm/IR/RuntimeLibcalls.td
+22-0llvm/lib/CodeGen/TargetLoweringBase.cpp
+163-1211 files not shown
+167-1217 files

LLVM/project 7c328d8llvm/lib/Target/AMDGPU GCNHazardRecognizer.cpp, llvm/test/CodeGen/AMDGPU hazards-gfx1250.mir

[AMDGPU][GCNHazardRecognizer] Remove instances of hardcoded S_WAITCNT_DEPCTR operand values (#171811)

Two S_WAITCNT_DEPCTR instructions are constructed with hardcoded operand
values. Replace these with appropriate calls to
AMDGPU::DepCtr::encodeFieldVmVsrc().

NFC, except that the original code was setting reserved operand bits
that should-be-zero, and this is now corrected.
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/hazards-gfx1250.mir
+2-2llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+4-42 files

LLVM/project 6e84eb0clang/lib/Driver/ToolChains HIPAMD.cpp HIPAMD.h, clang/test/Driver spirv-amd-toolchain.c

[clang][Driver] SPIRVAMDToolChain must not require device libs.

Prior to this changes, the toolchain was looking for device libs and failing.
This is fixed by not looking for device libs (for SPIR-V).
DeltaFile
+9-0clang/lib/Driver/ToolChains/HIPAMD.cpp
+5-0clang/lib/Driver/ToolChains/HIPAMD.h
+1-1clang/test/Driver/spirv-amd-toolchain.c
+15-13 files

LLVM/project f406210llvm/lib/Target/AArch64 AArch64FrameLowering.cpp, llvm/test/CodeGen/AArch64 arm64ec-reservedregs.ll preserve_mostcc.ll

[AArch64] Use Windows-style prologue/epilogue regardless of CFI. (#156467)

To reduce the number of combinations to support, always use the same 
prologue/epilogue lowering on windows regardless of whether unwind info
is required.

This also fixes an issue where a function with SVE callee-saves and 
`nounwind` led to a compilation failure, because the SVE lowering makes
assumptions that only hold when using the Windows style
prologue/epilogue.

---------

Co-authored-by: Benjamin Maxwell <benjamin.maxwell at arm.com>
DeltaFile
+38-39llvm/test/CodeGen/AArch64/arm64ec-reservedregs.ll
+43-26llvm/test/CodeGen/AArch64/preserve_mostcc.ll
+31-27llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+24-24llvm/test/CodeGen/AArch64/llvm.frexp.ll
+21-22llvm/test/CodeGen/AArch64/swift-async-win.ll
+20-21llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_win64.ll
+177-1595 files not shown
+244-19611 files

LLVM/project d33d80fllvm/lib/CodeGen/SelectionDAG FastISel.cpp, llvm/test/CodeGen/X86 stack-protector-msvc-oz.ll stack-protector-msvc.ll

[FastISel] Don't force SDAG fallback for libcalls (#171782)

The fast instruction selector should should not force an SDAG fallback
to potentially make use of optimized libcall implementations.

Looking at
https://github.com/llvm/llvm-project/commit/3e6fa462f3c617ca8202162da2a3990c97b9ec36,
part of the motivation was to avoid libcalls in unoptimized builds for
targets that don't have them, but I believe this should be handled by
Clang directly emitting intrinsics instead of libcalls (which it already
does). FastISel should not second guess this.

Followup to https://github.com/llvm/llvm-project/pull/171288.
DeltaFile
+0-8llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+3-4llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
+3-4llvm/test/CodeGen/X86/stack-protector-msvc.ll
+6-163 files