LLVM/project 5cafc12clang/test/Analysis/Scalable/ssaf-linker/Inputs tu-2.json tu-1.json, clang/test/Analysis/Scalable/ssaf-linker/Outputs lu-1+2.json lu-2.json

[clang][ssaf] Implement Entity Linker CLI and patching for JSON Format

This PR implements Entity ID patching for the JSON serialization format
and introduces `ssaf-linker`, a command-line tool that drives the
`EntityLinker`.

1. Entity ID references inside summary blobs use the sentinel
representation `{"@": <uint64>}`. Patching walks the JSON value tree
recursively, recognizes sentinels, and rewrites their indices using the
`EntityResolutionTable` provided by the linker.
2. An object with an `@` key but extra keys `(size != 1)`, an `@` value
that is not a valid `uint64`, and an entity ID not present in the
resolution table, lead to patching errors.
3. `JSONFormat::EntityIdConverter` is replaced with two `function_ref`
typedefs to eliminate the wrapper class.
4.`ssaf-linker` is implemented in `clang/tools/ssaf-linker/` and gets
built at `bin/ssaf-linker`.
5. lit tests check CLI, verbose output, timing output, validation
errors, I/O errors, linking errors, and successful linking.

rdar://162570931
DeltaFile
+652-0clang/test/Analysis/Scalable/ssaf-linker/Outputs/lu-1+2.json
+370-0clang/test/Analysis/Scalable/ssaf-linker/Outputs/lu-2.json
+364-0clang/test/Analysis/Scalable/ssaf-linker/Outputs/lu-1.json
+352-0clang/test/Analysis/Scalable/ssaf-linker/Inputs/tu-2.json
+346-0clang/test/Analysis/Scalable/ssaf-linker/Inputs/tu-1.json
+329-0clang/tools/ssaf-linker/SSAFLinker.cpp
+2,413-039 files not shown
+3,115-10645 files

LLVM/project 7dbd143llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Fix comment

Created using spr 1.3.7
DeltaFile
+1-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+1-11 files

LLVM/project a6bd72fllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 bswap-i64-by-i32-chunks.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+42-4llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+5-14llvm/test/Transforms/SLPVectorizer/X86/bswap-i64-by-i32-chunks.ll
+47-182 files

LLVM/project 298ef51clang/lib/CIR/CodeGen CIRGenExprAggregate.cpp, clang/test/CIR/CodeGen instantiate-init.cpp

[CIR] Add support for CXXStdInitializerListExpr (#185279)

Add support for the CXXStdInitializerListExpr
DeltaFile
+105-0clang/test/CIR/CodeGen/instantiate-init.cpp
+49-2clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
+154-22 files

LLVM/project 3671fadmlir/lib/Dialect/OpenACC/Utils OpenACCUtilsLoop.cpp, mlir/unittests/Dialect/OpenACC OpenACCUtilsLoopTest.cpp

[mlir][OpenACC] Normalize loop bounds in convertACCLoopToSCFFor for negative steps (#184935)

`convertACCLoopToSCFFor` was passing `acc.loop` bounds directly to
`scf.for`, which produces an `scf.for` with a negative step when the
source is a Fortran DO loop counting down (e.g. `DO k = n, 1, -1`).
Since `scf.for` requires a positive step, this generated invalid IR that
caused downstream crashes during LLVM lowering.

`convertACCLoopToSCFParallel` already normalizes all loops
unconditionally to `lb=0, step=1, ub=tripCount`, but
`convertACCLoopToSCFFor` did not. This patch applies the same
normalization to `convertACCLoopToSCFFor`, with IV denormalization in
the loop body (`original_iv = normalized_iv * orig_step + orig_lb`), and
lets later passes fold away constants.
DeltaFile
+31-45mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsLoop.cpp
+55-19mlir/unittests/Dialect/OpenACC/OpenACCUtilsLoopTest.cpp
+86-642 files

LLVM/project 7a85921libc/src/string strncmp.cpp strcmp.cpp, libc/test/src/string strcoll_test.cpp strncmp_test.cpp

[libc] Use unsigned char in strcmp, strncmp, and strcoll comparisons (#185393)

According to section 7.24.1 of the C standard, character comparison in
string functions must be performed as if the characters had the type
`unsigned char`.

The previous implementations of `strcmp`, `strncmp`, and `strcoll` were
doing a direct subtraction of `char` values. On platforms where `char`
is signed, this resulted in incorrect negative values being returned
when characters exceeding 127 were being compared.

This patch fixes the comparison functions to explicitly cast the
character values to `unsigned char` prior to computing their difference.
It also adds regression tests to ensure the comparison behaves correctly
for ASCII values greater than 127.
DeltaFile
+7-0libc/test/src/string/strcoll_test.cpp
+7-0libc/test/src/string/strncmp_test.cpp
+7-0libc/test/src/string/strcmp_test.cpp
+4-1libc/src/string/strncmp.cpp
+3-1libc/src/string/strcmp.cpp
+1-1libc/src/string/strcoll.cpp
+29-36 files

LLVM/project 76daf31llvm/lib/Target/AMDGPU AMDGPULowerKernelAttributes.cpp, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.h AMDGPUBaseInfo.cpp

AMDGPU: Annotate group size ABI loads with range metadata (#185420)

We previously did the same for the grid size when annotated.
The group size is easier, so it's weird that this wasn't implemented
first.
DeltaFile
+122-15llvm/test/CodeGen/AMDGPU/implicit-arg-v5-opt.ll
+48-19llvm/lib/Target/AMDGPU/AMDGPULowerKernelAttributes.cpp
+8-7llvm/test/CodeGen/AMDGPU/amdgpu-max-num-workgroups-load-annotate.ll
+8-7llvm/test/CodeGen/AMDGPU/implicit-arg-block-count.ll
+5-2llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
+0-5llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+191-552 files not shown
+193-578 files

LLVM/project f1a2fd2clang/lib/CodeGen CGExprScalar.cpp, clang/test/CodeGenHLSL/BasicFeatures MatrixElementTypeCast.hlsl

[HLSL][Matrix] Make HLSLElementwiseCast respect matrix memory layout (#184429)

Fixes #184379

Changes the implementation of HLSLElementwiseCast to respect matrix
memory layout.
The new implementation reads from the `LoadList` array in row-major
order as opposed to column-major in the old implementation, which makes
more sense because `LoadList` is always interpreted in row-major order
when read as a matrix.
The writes to the allocation `V` for the destination matrix now respects
the default matrix memory layout.

Assisted-by: claude-opus-4.6
DeltaFile
+38-22clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
+19-13clang/lib/CodeGen/CGExprScalar.cpp
+57-352 files

LLVM/project d3a22eaclang/lib/CIR/Dialect/Transforms FlattenCFG.cpp, clang/test/CIR/CodeGen virtual-fn-calls-eh.cpp virtual-function-calls.cpp

[CIR] Fix try_call replacement for indirect calls (#185095)

We had a bug in the FlattenCFG pass where if an indirect call occurred
within a cleanup scope that required exception handling, the indirect
callee was not being preserved in the cir.try_call. This fixes that.
DeltaFile
+124-0clang/test/CIR/CodeGen/virtual-fn-calls-eh.cpp
+49-0clang/test/CIR/Transforms/flatten-try-op.cir
+47-0clang/test/CIR/CodeGen/virtual-function-calls.cpp
+17-6clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
+237-64 files

LLVM/project e167356llvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp AMDGPUCoExecSchedStrategy.h

Use AMDGPU namespace + const ref

Change-Id: Ie4ca27528c92dbd0f3cf6293d9bc25d13b7d31fc
DeltaFile
+17-16llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+12-8llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.h
+29-242 files

LLVM/project 8b8e35cclang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp

[CIR][AArch64] Add lowering for remaining `vabd_*` builtins

Implement the missing CIR lowerings for the AdvSIMD (Neon) `vabd_*`
(absolute difference) intrinsic group.

Most `vabd` variants were already supported (see #183595); this patch
completes the remaining cases listed in [1].

Move the corresponding tests from:
  * clang/test/CodeGen/AArch64/neon_intrinsics.c

to:
  * clang/test/CodeGen/AArch64/neon/intrinsics.c

The implementation mirrors the existing lowering in
CodeGen/TargetBuiltins/ARM.cpp. To support this, add the
`emitCommonNeonSISDBuiltinExpr` helper.

Reference:
[1] https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#absolute-difference
DeltaFile
+351-2clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+21-3clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-20clang/test/CodeGen/AArch64/neon-intrinsics.c
+0-1clang/include/clang/CIR/MissingFeatures.h
+372-264 files

LLVM/project fe8ad88clang/include/clang/Options Options.td

format
DeltaFile
+3-4clang/include/clang/Options/Options.td
+3-41 files

LLVM/project 89d150allvm/docs/TableGen ProgRef.rst, llvm/lib/TableGen TGParser.cpp TGParser.h

[TableGen] Add let append/prepend syntax for field concatenation (#182382)

## Motivation

LLVM TableGen currently lacks a way to **accumulate** field values
across class hierarchies. When a derived class sets a field via `let`,
it completely replaces the parent's value. This forces users into
verbose workarounds like:

```tablegen
class Op { // This is generic MLIR Base 
  code extraClassDeclaration = ?;
}

// Some Generic shared base
class MyShared1OpClass : Op {
  code shared1ExtraClassDeclaration = [{ some generic code 1 }];
}


    [157 lines not shown]
DeltaFile
+224-0llvm/test/TableGen/let-append.td
+91-14llvm/lib/TableGen/TGParser.cpp
+63-0llvm/test/TableGen/let-append-toplevel.td
+45-2llvm/docs/TableGen/ProgRef.rst
+22-4llvm/lib/TableGen/TGParser.h
+12-0llvm/test/TableGen/let-prepend-error.td
+457-202 files not shown
+481-208 files

LLVM/project f7a48fbclang/lib/CodeGen/TargetBuiltins PPC.cpp, clang/test/CodeGen/PowerPC builtins-ppc-amo.c builtins-amo-err.c

[PowerPC] Add AMO load with Compare and Swap Not Equal (#178061)

This commit adds support for lwat/ldat atomic operations with function
code 16 (Compare and Swap Not Equal) via 4 clang builtins:

__builtin_amo_lwat_csne for 32-bit unsigned operations 
__builtin_amo_ldat_csne for 64-bit unsigned operations
 __builtin_amo_lwat_csne_s for 32-bit signed operations 
__builtin_amo_ldat_csne_s for 64-bit signed operations
DeltaFile
+82-0llvm/test/CodeGen/PowerPC/amo-enable.ll
+76-0clang/test/CodeGen/PowerPC/builtins-ppc-amo.c
+44-1llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+21-0llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
+16-0clang/test/CodeGen/PowerPC/builtins-amo-err.c
+14-0clang/lib/CodeGen/TargetBuiltins/PPC.cpp
+253-14 files not shown
+270-110 files

LLVM/project ae8f614compiler-rt/lib/scudo/standalone mem_map_fuchsia.cpp

[scudo] Add missing class name specifier in mem_map_fuchsia (#185389)
DeltaFile
+3-1compiler-rt/lib/scudo/standalone/mem_map_fuchsia.cpp
+3-11 files

LLVM/project 687d5c5lldb/source/Plugins/ExpressionParser/Clang CMakeLists.txt ClangExpressionDeclMap.cpp

[LLDB] Remove C++ language runtime dependency of Clang expression parser (#185450)

From
https://github.com/llvm/llvm-project/pull/169225#issuecomment-4024377289:
There was a dependency cycle involving the C++ language runtime:
```
  //lldb/source/Plugins/TypeSystem/Clang:Clang ->
  //lldb/source/Plugins/ExpressionParser/Clang:Clang ->
  //lldb/source/Plugins/LanguageRuntime/CPlusPlus:CPlusPlus ->
  //lldb/source/Plugins/TypeSystem/Clang:Clang
```

`ExpressionParserClang` doesn't need to depend on the C++ language
runtime. It only included a file, but didn't use it. This PR removes
that dependency.
DeltaFile
+0-1lldb/source/Plugins/ExpressionParser/Clang/CMakeLists.txt
+0-1lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionDeclMap.cpp
+0-22 files

LLVM/project b7a0445llvm/test/MC/AMDGPU gfx1170_asm_vop3_dpp16.s gfx1170_asm_vop3.s

[AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (#184601)
DeltaFile
+1,273-36llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp16.s
+1,219-12llvm/test/MC/AMDGPU/gfx1170_asm_vop3.s
+1,081-0llvm/test/MC/AMDGPU/gfx1170_asm_vop3-fake16.s
+1,054-0llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp16-fake16.s
+1,010-16llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp8.s
+835-0llvm/test/MC/AMDGPU/gfx1170_asm_vop3_dpp8-fake16.s
+6,472-6436 files not shown
+9,422-53042 files

LLVM/project 7fd291bllvm/lib/MC MCAsmInfoGOFF.cpp, llvm/lib/Target/SystemZ SystemZAsmPrinter.cpp

[GOFF] Set reference to ADA (#179734)

Function symbols must have a reference to the ADA, because this becomes
the value of the r5 register when the function is called. Simply get the
value from the begin symbol of the section.
DeltaFile
+22-6llvm/lib/MC/MCAsmInfoGOFF.cpp
+8-6llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMAsmStreamer.cpp
+7-3llvm/test/CodeGen/SystemZ/zos-symbol-1.ll
+10-0llvm/lib/Target/SystemZ/MCTargetDesc/SystemZTargetStreamer.h
+3-0llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
+1-1llvm/test/CodeGen/SystemZ/zos-func-alias.ll
+51-163 files not shown
+54-189 files

LLVM/project 4e26602clang-tools-extra/clang-doc CMakeLists.txt, clang-tools-extra/clang-doc/benchmarks CMakeLists.txt

[clang-doc] Cleanup CMake files and ensure benchmarks build

There's some poor formatting, and ClangDocBenchmark references several
targets that are required, but only because they're required for
clang-doc itself. We can just get those requirements from the clangDoc
target.

Additionally, we can make sure the benchmark builds as part of testing
when LLVM_INCLUDE_BENCHMARKS is set.
DeltaFile
+0-5clang-tools-extra/clang-doc/benchmarks/CMakeLists.txt
+4-0clang-tools-extra/test/clang-doc/CMakeLists.txt
+1-1clang-tools-extra/clang-doc/CMakeLists.txt
+5-63 files

LLVM/project 0ea734dclang/include/clang/CIR/Dialect/IR CIROps.td

[CIR] Extract CIR_VAOp base class for VAStartOp and VAEndOp (#185258)

Both ops share identical arguments and assembly format. Extract a common
base class to eliminate the duplication.
DeltaFile
+10-13clang/include/clang/CIR/Dialect/IR/CIROps.td
+10-131 files

LLVM/project c4431d4llvm/utils/TableGen/Common CodeGenRegisters.cpp

[TableGen] Fix ordering of register classes with artificial members. (#185448)

The current implementation wouldn't advance IB to skip artificial
registers once IA has reached the end.
DeltaFile
+8-10llvm/utils/TableGen/Common/CodeGenRegisters.cpp
+8-101 files

LLVM/project 83c55c3llvm/test/Transforms/SandboxVectorizer external_uses.ll

[SandboxVec][NFC] Precommit test

For a follow-up patch on handling of external uses.
DeltaFile
+31-0llvm/test/Transforms/SandboxVectorizer/external_uses.ll
+31-01 files

LLVM/project 2d6124cllvm/include/llvm/Transforms/Utils MemoryTaggingSupport.h, llvm/lib/Target/AArch64 AArch64StackTagging.cpp

[MTE] [HWASan] do not remove lifetimes for unterminated lifetime

The reasoning for this was incorrect. Return is an implicit lifetime
end of all allocas, so we are not inserting outside of a lifetime.

Reviewers: pcc, usama54321

Reviewed By: pcc

Pull Request: https://github.com/llvm/llvm-project/pull/184387
DeltaFile
+22-4llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope.ll
+4-13llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
+2-7llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
+1-6llvm/lib/Target/AArch64/AArch64StackTagging.cpp
+1-1llvm/test/CodeGen/AArch64/stack-tagging-split-lifetime.ll
+1-1llvm/include/llvm/Transforms/Utils/MemoryTaggingSupport.h
+31-326 files

LLVM/project 37881bamlir/lib/Conversion/TosaToLinalg TosaToLinalg.cpp, mlir/test/Conversion/TosaToLinalg tosa-to-linalg-resize.mlir

[mlir][tosa][tosa-to-linalg] Fix resize bilinear delta computation for negative offsets (#184799)

Use floor-consistent remainder when lowering floating-point tosa.resize
to linalg: compute `r = in - floor(in/scale_n)*scale_n` instead of
RemSIOp. This keeps bilinear deltas in-range for negative offsets and
avoids invalid interpolation weights.
DeltaFile
+8-4mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-resize.mlir
+5-3mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
+13-72 files

LLVM/project d6ee4c9clang/include/clang/CIR/Dialect/IR CIROps.td, clang/test/CIR/Transforms pure-ptr-arithmetic.cir

[CIR] Fix spurious MemRead on pure pointer-arithmetic ops (#185154)

Remove incorrect [MemRead] annotations from seven CIR ops that only
perform pointer arithmetic, and add the Pure trait where missing.

- VTableGetVPtrOp computes the address of the vptr slot within an
object. Since the vptr is always at offset zero, this is a bitcast —
confirmed by the lowering which does replaceOp(op, srcVal). No memory
access.

- VTableGetVirtualFnAddrOp takes an already-loaded !cir.vptr value and
an index, computes the address of the nth vtable entry. Lowers to a
GEPOp. No memory access.

- VTableGetTypeInfoOp takes an already-loaded !cir.vptr value, computes
the address of the type_info entry at a known ABI offset. Pointer
arithmetic only. No memory access.

- GetMemberOp computes the address of a struct/class member given a base

    [16 lines not shown]
DeltaFile
+65-0clang/test/CIR/Transforms/pure-ptr-arithmetic.cir
+12-13clang/include/clang/CIR/Dialect/IR/CIROps.td
+77-132 files

LLVM/project 9b04a3clibcxx/utils/ci/docker linux-builder-base.dockerfile docker-compose.yml

[libc++] Use compiler explorer for Clang as well and update to LLVM 23 as head (#185168)

Using the compiler explorer infrastucture simplifies the dockerfile a
bit, since we have a single source for compilers now instead of two
independent ones. compiler explorer is also usually significantly faster
at providing new versions than apt.llvm.org.
DeltaFile
+28-28libcxx/utils/ci/docker/linux-builder-base.dockerfile
+1-1libcxx/utils/ci/docker/docker-compose.yml
+29-292 files

LLVM/project ffdb484llvm/lib/Target/RISCV RISCVTargetTransformInfo.cpp RISCVTargetTransformInfo.h, llvm/test/Transforms/InstCombine/RISCV riscv-vmv-v-x.ll

[InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (#182630)

Constant-fold bitcast(vmv.v.x) to avoid creating redundant masks.

llc run showing vsetvli eliminated: https://godbolt.org/z/d1Gx3KqaT
DeltaFile
+186-0llvm/test/Transforms/InstCombine/RISCV/riscv-vmv-v-x.ll
+52-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
+3-0llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+241-03 files

LLVM/project c5fac6ellvm/test/CodeGen/AMDGPU coexec-sched-effective-stall.mir

Fix mir test

Change-Id: I1b3dba10ea74c98454c433ecd52b165836929075
DeltaFile
+2-1llvm/test/CodeGen/AMDGPU/coexec-sched-effective-stall.mir
+2-11 files

LLVM/project 4a8e172mlir/lib/Dialect/Linalg/Transforms Vectorization.cpp, mlir/test/Dialect/Linalg/vectorization unsupported.mlir

[mlir][Linalg] Prevent vectorization of generic Conv with dynamic dims (#185415)

-- We should use `isaConvolutionOpInterface` instead as it accommodates
both named as well as generic convolution ops.
-- https://github.com/llvm/llvm-project/pull/176339 missed making one
such update to `vectorizeDynamicLinalgOpPrecondition` and it got exposed
in a downstream project.
-- This commit therefore aims to fix the same.

Signed-off-by: Abhishek Varma <abhvarma at amd.com>
DeltaFile
+30-0mlir/test/Dialect/Linalg/vectorization/unsupported.mlir
+1-1mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
+31-12 files

LLVM/project c21a5acmlir/lib/Dialect/Vector/Transforms VectorTransferOpTransforms.cpp, mlir/lib/Dialect/Vector/Utils VectorUtils.cpp

[mlir][vector] Flatten transfer - support multi-dim scalar element (#185417)

Adds support for flattening multi-dimensional scalar vector transfers.

The addition prevents pattern crashes on such inputs and allows for
cleaner lowering of scalar vectors.
DeltaFile
+41-0mlir/test/Dialect/Vector/vector-transfer-flatten.mlir
+22-6mlir/lib/Dialect/Vector/Transforms/VectorTransferOpTransforms.cpp
+4-0mlir/lib/Dialect/Vector/Utils/VectorUtils.cpp
+67-63 files