LLVM/project 4ef3f8dllvm/lib/CodeGen MachineBasicBlock.cpp, llvm/lib/CodeGen/MIRParser MIParser.cpp MILexer.cpp

[MIR] Add parsing for ehscope_entry. (#175592)

This makes sure that IsEHScopeEntry is written and can be re-parsed.
DeltaFile
+16-0llvm/test/CodeGen/MIR/Generic/machine-basic-block-ehscope-entry.mir
+6-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+5-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+1-0llvm/lib/CodeGen/MIRParser/MILexer.cpp
+1-0llvm/lib/CodeGen/MIRParser/MILexer.h
+29-05 files

LLVM/project 9339d41llvm/lib/CodeGen TwoAddressInstructionPass.cpp

[TwoAddressInstruction] Track MadeChange when eliminating REG_SEQUENCE (#173535)

When `eliminateRegSequence()` is called, the pass modifies the
`MachineFunction` but `MadeChange` was not being set to true.
This causes the pass to incorrectly return `PreservedAnalyses::all()`
even though changes were made.
DeltaFile
+3-1llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+3-11 files

LLVM/project b0445a1clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode cxx11.cpp

[clang][bytecode] Diagnose regular CK_LValueBitCast cast nodes (#175721)

We already do this similarly for CXXReinterpretCastExprs, except in that
case we try harder to make things work.
DeltaFile
+4-0clang/test/AST/ByteCode/cxx11.cpp
+3-0clang/lib/AST/ByteCode/Compiler.cpp
+7-02 files

LLVM/project ef90ba6clang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeAnnotations.h, clang/lib/Analysis/LifetimeSafety LifetimeAnnotations.cpp

[LifetimeSafety] Merge lifetimebound attribute on implicit 'this' across method redeclarations (#172146)

Followup on https://github.com/llvm/llvm-project/pull/107627  
Fixes https://github.com/llvm/llvm-project/issues/62072  
Fixes https://github.com/llvm/llvm-project/issues/172013
Fixes https://github.com/llvm/llvm-project/issues/175391

This PR adds support for merging the `lifetimebound` attribute on the implicit `this` parameter when merging method declarations. Previously, if a method was declared with `lifetimebound` on its function type (which represents the implicit `this` parameter), this attribute would not be propagated to the method definition, causing lifetime safety warnings to be missed.

The implementation adds helper functions to extract the `lifetimebound` attribute from a function type and to merge this attribute from an old method declaration to a new one when appropriate.
DeltaFile
+138-0clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
+40-6clang/lib/Sema/SemaDecl.cpp
+17-12clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
+22-0clang/test/Sema/warn-lifetime-safety.cpp
+21-0clang/test/SemaCXX/attr-lifetimebound.cpp
+7-0clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
+245-186 files

LLVM/project f8d0108llvm/lib/ExecutionEngine/JITLink ELF_loongarch.cpp

Fix call30 linking
DeltaFile
+1-1llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
+1-11 files

LLVM/project e884a44lldb/include/lldb/Target Platform.h, lldb/source/Plugins/ABI/RISCV ABISysV_riscv.cpp

[lldb][RISCV] Implement trap handler unwind plan (#166531)

This patch introduces special unwind plan for trap handling for RISC-V
and fixes `TestHandleAbort`
DeltaFile
+87-4lldb/source/Plugins/Platform/Linux/PlatformLinux.cpp
+4-4lldb/include/lldb/Target/Platform.h
+2-3lldb/source/Plugins/Platform/AIX/PlatformAIX.cpp
+4-0lldb/source/Plugins/ABI/RISCV/ABISysV_riscv.cpp
+2-2lldb/source/Target/RegisterContextUnwind.cpp
+1-1lldb/source/Plugins/Platform/AIX/PlatformAIX.h
+100-141 files not shown
+101-157 files

LLVM/project 620e479llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV] Sync Inst{30-27} assignment into RVPWideningBase. NFC (#175705)

2 of the 3 subclases can pass 'f' straight through from their
instantiations. The third case just needs to concatenate 1b1 to widen f
to 4 bits.
DeltaFile
+8-14llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+8-141 files

LLVM/project 7946fb5llvm/test/MC/LoongArch/Macros macros-call.s

Add la32-specific tests
DeltaFile
+35-20llvm/test/MC/LoongArch/Macros/macros-call.s
+35-201 files

LLVM/project b598dcbclang/lib/Analysis/LifetimeSafety FactsGenerator.cpp, clang/unittests/Analysis LifetimeSafetyTest.cpp

[LifetimeSafety] Add support for derived-to-base conversions (#175631)

Add support for derived-to-base conversions in lifetime analysis.

Added handling for `CK_UncheckedDerivedToBase` and `CK_DerivedToBase` cast kinds in the `FactsGenerator::VisitImplicitCastExpr` method. These cast kinds are now treated similarly to other conversions by flowing origins from source to destination.

Added a unit test `DerivedToBaseThisArg` that verifies lifetime information is correctly propagated through derived-to-base conversions when using member functions inherited from a base class.
DeltaFile
+23-0clang/unittests/Analysis/LifetimeSafetyTest.cpp
+2-0clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+25-02 files

LLVM/project b685bf0clang/test/Sema constexpr.c

[Clang] add long double test to cover constant expression evaluation (#175645)

Fixes
https://github.com/llvm/llvm-project/pull/174113#discussion_r2683013358

--- 

This patch adds a test to cover the `long double` case during constant
expression evaluation
DeltaFile
+10-3clang/test/Sema/constexpr.c
+10-31 files

LLVM/project e9f758allvm/lib/Transforms/Vectorize VPlanVerifier.cpp, llvm/test/Transforms/LoopVectorize/RISCV pointer-induction-rv32.ll

[VPlan] Allow VPInstruction::PtrAdd as a user of EVL (#175506)

Fixes #175058

Similar to #175028, on RV64 we insert a zext in between most uses of EVL
so most of the VPlanVerifier EVL checks don't fire unless we're
compiling for RV32.
In this case, we're experiencing a crash because we can have a PtrAdd
that uses EVL. This fixes it by adding PtrAdd to the list of allowed
instructions
DeltaFile
+47-0llvm/test/Transforms/LoopVectorize/RISCV/pointer-induction-rv32.ll
+1-0llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
+48-02 files

LLVM/project afd7d13clang/lib/AST/ByteCode Program.cpp, clang/test/AST/ByteCode codegen.cpp

[clang][bytecode] Fix crash on arrays with excessive size (#175402)

The bytecode interpreter was crashing when seeing arrays with sizes that
exceed Descriptor::MaxArrayElemBytes. The bounds check in
Program::createDescriptor was using std::numeric_limits<unsigned>::max()
instead of the correct limit Descriptor::MaxArrayElemBytes.

This caused the check to pass for sizes that would later fail the
assertion in the Descriptor constructor.

Fixes #175293
DeltaFile
+4-0clang/test/AST/ByteCode/codegen.cpp
+1-1clang/lib/AST/ByteCode/Program.cpp
+5-12 files

LLVM/project e3156c5clang/lib/Basic/Targets RISCV.h, clang/test/CodeGen ext-int-cc.c

[RISCV] Support RISCV BitInt larger than 128 (#175515)

fa57074d146925a303263905af415cc78f58f353 constraint the RISCV BitInt
with 128 bits.

It is due to fp <-> int convension will crash in backend.
(https://godbolt.org/z/9o1qr4rje)

This patch enable larger than 128 bits BitInt type by
`setMaxLargeFPConvertBitWidthSupported`.
DeltaFile
+5,392-849llvm/test/CodeGen/RISCV/fpclamptosat.ll
+2,175-0llvm/test/CodeGen/RISCV/bitint-fp-conv-200.ll
+218-36clang/test/CodeGen/RISCV/bitint.c
+4-0clang/lib/Basic/Targets/RISCV.h
+0-2clang/test/CodeGen/ext-int-cc.c
+2-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+7,791-8876 files

LLVM/project 6cbf9ceclang/lib/AST/ByteCode Interp.h, clang/test/AST/ByteCode c.c

[clang][bytecode] Check for non-block pointers in CopyArray (#175710)

Fixes https://github.com/llvm/llvm-project/issues/175674
DeltaFile
+6-0clang/test/AST/ByteCode/c.c
+3-0clang/lib/AST/ByteCode/Interp.h
+9-02 files

LLVM/project c4750d0mlir/include/mlir/Interfaces ControlFlowInterfaces.h ControlFlowInterfaces.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir] Consolidate patterns into `RegionBranchOpInterface` patterns (#174094)

Instead of op-specific cleanup patterns for region branch ops to remove
unused results / block arguments, etc., add a set of patterns that can
handle all `RegionBranchOpInterface` ops. These patterns are enabled
only for selected SCF dialect ops at the moment:
* `scf.execute_region`
* `scf.for`
* `scf.if`
* `scf.index_switch`
* `scf.while`

It is currently not possible to register canoncalization patterns for op
interfaces and some ops have incorrect interface implementations. In
follow-up PRs, the set of ops will be gradually extended within the SCF
dialect (`scf.forall`) and across other dialects
(`gpu.warp_execute_on_lane0`, (maybe) various affine dialect ops, ...),
and maybe eventually to apply to all `RegionBranchOpInterface` ops.


    [16 lines not shown]
DeltaFile
+17-813mlir/lib/Dialect/SCF/IR/SCF.cpp
+496-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+47-13mlir/test/Dialect/SCF/canonicalize.mlir
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+4-4mlir/test/Transforms/remove-dead-values.mlir
+5-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+578-8306 files

LLVM/project dc1a886clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode complex.cpp

[clang][bytecode] Fix CK_ToVoid casts for Complex values (#175709)

We need to remove the pointer to the local variable we've created
specifically for this complex binary operator.

Fixes https://github.com/llvm/llvm-project/issues/175670
DeltaFile
+4-0clang/lib/AST/ByteCode/Compiler.cpp
+4-0clang/test/AST/ByteCode/complex.cpp
+8-02 files

LLVM/project 8988068mlir/include/mlir/Interfaces ControlFlowInterfaces.h ControlFlowInterfaces.td, mlir/lib/Dialect/SCF/IR SCF.cpp

[mlir][draft] Consolidate patterns into RegionBranchOpInterface patterns

fix some tests

reorganize code

address comments
DeltaFile
+17-813mlir/lib/Dialect/SCF/IR/SCF.cpp
+496-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+47-13mlir/test/Dialect/SCF/canonicalize.mlir
+9-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
+4-4mlir/test/Transforms/remove-dead-values.mlir
+5-0mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
+578-8306 files

LLVM/project 2001da6llvm/lib/Target/AArch64 AArch64RegisterInfo.cpp, llvm/test/CodeGen/AArch64 arm64-addrmode.ll subreg_to_reg_coalescing_issue.mir

[AArch64] Disable coalescing of SUBREG_TO_REG with subreg liveness. (#174185)

Handling of SUBREG_TO_REG is currently broken, see #168353 for details.
DeltaFile
+90-40llvm/test/CodeGen/AArch64/arm64-addrmode.ll
+34-0llvm/test/CodeGen/AArch64/subreg_to_reg_coalescing_issue.mir
+10-5llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
+7-1llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+1-0llvm/test/CodeGen/AArch64/register-coalesce-update-subranges-remat.mir
+142-465 files

LLVM/project 576127fllvm/include/llvm/ExecutionEngine/JITLink loongarch.h, llvm/lib/ExecutionEngine/JITLink ELF_loongarch.cpp loongarch.cpp

Rename PCAdd{20,12} to PCAdd{Hi20,Lo12}
DeltaFile
+10-10llvm/lib/ExecutionEngine/JITLink/ELF_loongarch.cpp
+8-8llvm/include/llvm/ExecutionEngine/JITLink/loongarch.h
+3-3llvm/lib/ExecutionEngine/JITLink/loongarch.cpp
+21-213 files

LLVM/project af98aadlld/MachO ObjC.cpp InputFiles.cpp

[LLD][MachO][NFC] Rename Reloc to Relocation (#175586)

Due to heavy use of using namespace llvm, Reloc is often ambiguous with
llvm::Reloc, the relocation model. Previously, this was sometimes
disambiguated with macho::Reloc. This ambiguity is even more problematic
when using pre-compiled headers, where it's no longer "obvious" whether
it should be Reloc or macho::Reloc.

Therefore, rename Reloc to Relocation. This is also consistent with
lld/ELF, where the type is also named Relocation.
DeltaFile
+19-18lld/MachO/ObjC.cpp
+10-9lld/MachO/InputFiles.cpp
+7-7lld/MachO/InputSection.cpp
+7-6lld/MachO/Relocations.h
+6-5lld/MachO/ConcatOutputSection.cpp
+6-5lld/MachO/Relocations.cpp
+55-5014 files not shown
+97-9120 files

LLVM/project ef2ec1fllvm/include/llvm/Transforms/Utils SampleProfileLoaderBaseImpl.h

[CSSPGO][NFC] Remove unused code in finalizeWeightPropagation() (#175521)

Remove unused code since the usage of `EntryWeight` was dropped in
[D134756](https://reviews.llvm.org/D134756).
DeltaFile
+0-1llvm/include/llvm/Transforms/Utils/SampleProfileLoaderBaseImpl.h
+0-11 files

LLVM/project dc257a4clang-tools-extra/clang-doc/assets class-template.mustache comment-template.mustache, clang-tools-extra/test/clang-doc/json class.cpp class-template.cpp

[clang-doc] Fix misnamed, mismatched, or incorrect tags (#175112)

This is mostly a chore patch that fixes misnamed, mismatched,
or non-existant tags. That includes renaming the function tags in the
class template to `Has*Methods` instead of `Has*Functions`. The "method"
style was already preferred in the template HTML.

Some extraneous tags were removed from the enum template. All templates
should use
`Description` for rendering comments, but it was still using an old tag
name. Also, the JSON generator currently doesn't serialize individual
enum value comments, so that tag was removed. Same for public members.

`Description` is removed for friends due to the way Mustache handles
missing
tags. If `Description` isn't present, it will use the parent's
description which is undesirable.
DeltaFile
+21-29clang-tools-extra/clang-doc/assets/class-template.mustache
+17-23clang-tools-extra/test/clang-doc/json/class.cpp
+11-11clang-tools-extra/unittests/clang-doc/JSONGeneratorTest.cpp
+1-13clang-tools-extra/clang-doc/assets/comment-template.mustache
+3-9clang-tools-extra/clang-doc/assets/enum-template.mustache
+8-3clang-tools-extra/test/clang-doc/json/class-template.cpp
+61-8811 files not shown
+99-12117 files

LLVM/project 124cb2ellvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV] Merge the 'f' and 'r' field argument of the RVPPairBase class. (#175694)

I don't think the spec ever calls this field 'r' for any of the
instructions that use this class. The bit is either a constant 0/1 or
part of 'f'. Make it a 4-bit 'f' and make the derived classes
concatenate the 0/1 when they need to widen from 3 bits to 4.
DeltaFile
+11-12llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+11-121 files

LLVM/project 2b839f6llvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchMachineFunctionInfo.h, llvm/test/CodeGen/LoongArch musttail.ll tail-calls.ll

[LoongArch] Enable tail calls for sret and byval functions (#168506)

Allow tail calls for functions returning via sret when the caller's sret
pointer can be reused. Also support tail calls for byval arguments.
    
The previous restriction requiring exact match of caller and callee
arguments is relaxed: tail calls are allowed as long as the callee does
not use more stack space than the caller.

Fixes #168152
DeltaFile
+566-0llvm/test/CodeGen/LoongArch/musttail.ll
+79-25llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+14-0llvm/lib/Target/LoongArch/LoongArchMachineFunctionInfo.h
+4-9llvm/test/CodeGen/LoongArch/tail-calls.ll
+663-344 files

LLVM/project 7cbc8a4llvm/unittests/IR MetadataTest.cpp

clang format
DeltaFile
+6-3llvm/unittests/IR/MetadataTest.cpp
+6-31 files

LLVM/project c282cb5llvm/unittests/IR MetadataTest.cpp

Revert "Drop the summation unittest since it's already covered by the gvn lit tests"

This reverts commit fb0d7df21794ab50eaab4cb6e249679089a5a501.
DeltaFile
+26-0llvm/unittests/IR/MetadataTest.cpp
+26-01 files

LLVM/project d9c523eclang/include/clang/Basic BuiltinsAMDGPU.def, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

[AMDGPU] Add builtins for wave reduction intrinsics
DeltaFile
+84-0clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+8-0clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+4-0clang/include/clang/Basic/BuiltinsAMDGPU.def
+96-03 files

LLVM/project 4885673llvm/docs AMDGPUUsage.rst

[AMDGPU] Update documentation for wave reduction intrinsics
DeltaFile
+118-2llvm/docs/AMDGPUUsage.rst
+118-21 files

LLVM/project 8e64fd7llvm/lib/Target/AMDGPU SIISelLowering.cpp

Use enum values for src modifiers.
DeltaFile
+8-8llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+8-81 files

LLVM/project a0e0775llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV] Add isCommutable=1 to some binary P extension instructions. (#175692)

This allows MachineCSE to commute these instructions if it would allow
CSE.
DeltaFile
+104-92llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+104-921 files