[Flang][Driver] Add support for option -f[no-]split-machine-functions in flang (#216637)
Added support for the `-fsplit-machine-functions` flag in the
Flang driver.
- The Flang driver forwards `-fsplit-machine-functions` to `-fc1` and
the negative flag `-fno-split-machine-functions` is used at the driver
level only.
- Flang `-fc1` driver sets `TargetOptions.EnableMachineFunctionSplitter`,
which causes LLVM's MachineFunctionSplitterPass to be added to the
codegen pipeline
[offload] Split strictness for threads and blocks (#211400)
This commit splits the strictness for the number of threads and blocks. This will be needed to support `dims` modifier in OpenMP 6.1.
[flang] Do not branch to a FORMAT statement from an assigned GO TO
Label analysis already classifies which labeled statements may be named by
a statement that branches. Record the positions of those statements in the
semantics context and consult it when lowering records the targets of an
assigned GO TO, so that a FORMAT statement is not given a target block.
A GO TO whose variable holds only a format label now reaches the run-time
error instead of branching into the FORMAT statement.
The label analysis is built once and shared: AnalyzeLabels() runs the
constraint checks first and records the branch targets only if they pass,
since a program with fatal errors is not lowered.
Co-Authored-By: Claude Opus 5 (1M context) <noreply at anthropic.com>
[flang][PFT-to-MLIR] Do not wrap the DO of an OpenMP loop construct (#216280)
A DO attached to an OpenMP loop directive is driven directly into the
loop op by OpenMPLoopConstruct lowering, so folding it into an
scf.execute_region hides the iteration from that op and crashes lowering
when the loop body is unstructured.
Extend the wrappability check with isOmpLoopBody(), the OpenMP analogue
of the existing isAccLoopBody(): the immediate body DO, or one of the N
associated iterator DOs under collapse(N) / ordered(N), is not
wrappable. The shared parts of both checks -- collecting the enclosing
DO chain, evaluating a clause's loop count, and the depth test -- are
factored into helpers.
Co-authored-by: Claude
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
[VectorCombine] Fold deinterleave/interleave pairs (#211022)
Fold matched `vector.deinterleaveN` / `vector.interleaveN` pairs through
equivalent elementwise operation chains.
When every deinterleaved field is transformed by the same elementwise
chain, rebuild that chain at the original vector width and remove the
deinterleave/interleave pair.
This eliminates redundant shuffle-like operations and enables improved
SVE code generation on AArch64 targets.
---------
Co-authored-by: Benjamin Maxwell <benjamin.maxwell at arm.com>
[ASan][Darwin] Support gapless shadow layout for iOS 27.0
When the shadow can be placed entirely above app memory (as on the
new iOS 27.0 embedded VM layout, where debug memory pushes shadow
past kHighMemEnd), there is no need to split shadow into low/high
halves with a middle gap.
- Add kGaplessShadow (Apple-only) to detect this configuration.
- Teach InitializeShadowMemory to reserve one contiguous shadow
region and protect only the shadow-of-shadow when kGaplessShadow
is true, with CHECKs asserting the mapping preconditions.
- Update PrintAddressSpaceLayout to print the single-region layout.
rdar://167657399
[flang] - Call _FortranAAssignSimple instead of _FortranAAssign for intrinsic-type array assignments.
This patch adds support for calling _FortranAAssignSimple, a faster-path for array assignments.
`_FortranAAssignSimple` is called when ALL the following conditions are true:
1. Intrinsic element type (not derived type)
2. Matching ranks (no scalar-to-array broadcasting)
3. Non-volatile
4. Not polymorphic
5. Not explicit-length character
6. Not temporary LHS
Otherwise, uses `_FortranAAssign` (or specialized variants like `_FortranAAssignPolymorphic`, `_FortranAAssignExplicitLengthCharacter`).
This is a (perhaps final) part of the fix for https://github.com/llvm/llvm-project/issues/203915
Reject CHARACTER types in AssignSimple and add death tests
AssignSimple is only intended for trivial intrinsic types (integer, real,
complex, logical). Add a guard that crashes on CHARACTER type input,
matching the existing derived-type guard.
Add death tests covering all five crash paths in AssignSimple: rank
mismatch, element-bytes mismatch, derived type, character type, and
non-allocatable element count mismatch.
Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
[ORC] Move simple lookupAndRecordAddrs uses to lookupAndApply (#217509)
Mechanical conversions in ReOptimizeLayer, PerfSupportPlugin,
COFFVCRuntimeSupport and COFFPlatform::bootstrapCOFFRuntime: each (name,
ExecutorAddr *) pair becomes a recordAddr.
NFCI.
[clang][Sema] Warn on explicit conversion functions in C++20 with -Wc++98-compat (#217342)
The explicit(bool) patch (76b9027f352a) added a
`!getLangOpts().CPlusPlus20` guard here, so this `-Wc++98-compat`
warning stopped firing in C++20 and later. C++11 through C++17 still
warn, and the test even has a FIXME asking for the warning in C++20.
Drop the guard so every mode behaves the same, update the test, and
remove the FIXME.
Fixes #161689
[RISCV] Fix incorrect stride computation in concat_vectors-of-loads combine (#217401)
performCONCAT_VECTORSCombine's computed the stride between two loads as
BIO2.getOffset() - BIO1.getOffset(), but getOffset() only returns each
load's own trailing offset component, not the base-to-base displacement.
For loads based on two distinct fixed FrameIndex objects (e.g. an
illegal, non-power-of-2 vector argument scalarized into per-element
stack slots), this always computed 0 regardless of the true distance
between the slots, since equalBaseIndex computes the correct relative
offset separately and returns it via an out-parameter that was being
discarded.
Use the 3 argument equalBaseIndex overload and its computed offset
instead.
Fixes #217369.
Assisted-by: Claude
[analyzer][z3] Fix SMTConstraintManager.h removeDeadBindings (#215240)
removeDeadBindings did not properly keep track of constraint
dependencies, causing still-in-use constraints to be incorrectly
removed.
This PR stops constraints that are indirectly related to a live symbol
from being removed by removeDeadBindings.
Assisted-by: Codex
[PAC][ELF] Make non-preemptible IFUNC GOT assertion an error and extend (#214456)
Support for R_AARCH64_AUTH_IRELATIVE is not yet present in LLD, but we
accept various input that would give rise to needing it. For the direct
reloc case, replaceWithDefined asserts (rather than give an error
message) this was not requested, whilst for the non-direct reloc case it
silently ignores which GOT type was requested. In the latter case, and
the former when assertions are disabled, this results in mis-linking the
object, producing one with a non-AUTH GOT entry, that would presumably
then fail the AUTDA operation in any user of it (aside from the IPLT
entry generated by LLD).
Fixes: 417d2d7ce694 ("[PAC][lld][AArch64][ELF] Support signed GOT
(#113815)")
[CodeGen] Replace CodeGenPassBuilder CRTP with virtual hooks (#216468)
Make the hooks that were dispatched through derived() virtual, drop both
template parameters, and outline the pipeline into
lib/Passes/CodeGenPassBuilder.cpp, mirroring TargetPassConfig. The pass
headers move out of CodeGenPassBuilder.h.
The outlined bodies are moved verbatim, apart from dropping
now-redundant
std::move on returned Errors.
MSP430CodeGenPassBuilder.cpp.o .text: 84685 -> 11240 (-87%); compile
time: 1.75s -> 0.64s. llc .text: -293824 bytes; .data.rel.ro: +2784 (the
9 new vtables). The vtable slots are link-time constants in the default
non-PIE llc; with -pie they become 333 relative relocations, which RELR
packs into 40 bytes.
Overriding is now compiler-checked, which surfaced
AMDGPUCodeGenPassBuilder::addPreEmitRegAlloc (not a hook, never defined
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[Clang][RISC-V] Warn on duplicate interrupt attribute types (#217358)
The RISC-V interrupt attribute previously accepted the same type more
than once. This commit emits a warning instead (since a duplicate is
almost certainly a mistake).
The warning is emitted at most once per attribute and is controlled by
the new `-Wduplicate-interrupt-type` flag.
Follow up of #216159
[Mips] Legalize vector UNDEF instead of expanding to zero BUILD_VECTOR (#211503)
Currently, MIPS MSA expands ISD::UNDEF into a BUILD_VECTOR of all zeros
during legalization. This creates an infinite loop in DAGCombiner when
the following occurs:
1.Mips lower BUILD_VECTOR expands non-splat vectors into
INSERT_VECTOR_ELT with creating undef node
2.Then legalization expands UNDEF back to BUILD_VECTOR zero
3.Mips lower BUILD_VECTOR converts zero vector to BITCAST
4.DAGCombiner optimizes BITCAST(zero) to UNDEF
5.Back to step 2, infinite loop
Fix #210229.
[Mips] Fix getInstSizeInBytes for instructions with delay slots (#216665)
MIPS branch/jump instructions (B, BEQ, JALR64Pseudo, PseudoReturn64,
etc.) have a delay slot. The actual encoded size is 8 bytes (instr +
NOP). This fixes "out of range PC16 fixup" errors on large functions.
This issue was exposed in llvm 23 by commit pr #191460 which changed
MipsBranchExpansion to use MBB::iterator instead of instr_iterator,
making the MBB size calculation more accurate and revealing the
pre-existing bug.
Thanks for the pr #187703 `AllowOverEstimate` to help find instr which
actual size mismatch expected size .
Fix #112010.
[BOLT] Fix overflow issue when using absolute addressing in LSDA (#216654)
Currently, in the emitLSDA() flow, signed data is used when using
absolute addresses to update the LSDA for non PIE/DSO. But when the PC
is higher than 0x7fffffff(2GB), this will be sign-extended into an
invalid 64-bit address. Especially when the output binary is large,
silent errors can easily occur (we have met this problem in real
scenarios).
So this patch changes the signed data to unsigned data, thereby fixing
the incorrect address extension like this:
```
.gcc_except_table
LSDA:
LPStartEncoding: DW_EH_PE_omit // No LPStart
CallSiteEncoding: DW_EH_PE_sdata4 -> udata4 // Changed from sdata4 to udata4
call-site table:
call-site 1:
start = ...
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