LLVM/project 5b2eb0dclang/lib/AST/ByteCode Compiler.cpp Compiler.h

[clang][bytecode][NFC] Add FullExpression scopes (#170705)

And use them instead of the extending decl. This is close to what the
current interpreter is doing.

This is NFC right now but fixes a problem I encountered while looking
into the expansion statement stuff.
DeltaFile
+40-31clang/lib/AST/ByteCode/Compiler.cpp
+5-32clang/lib/AST/ByteCode/Compiler.h
+45-632 files

LLVM/project cc5b07cllvm/lib/IR Verifier.cpp, llvm/test/Verifier invalid-splice.ll

[IR] Fix vector.splice verifier scaling by vscale for fixed length vectors (#170807)

Currently we multiply the known minimum number of elements by vscale
even if the vector in question is fixed, so sometimes we miss some fixed
vectors with out of bounds indices.
DeltaFile
+2-1llvm/lib/IR/Verifier.cpp
+1-1llvm/test/Verifier/invalid-splice.ll
+3-22 files

LLVM/project 2a3eeaeclang/include/clang/Basic BuiltinsAMDGPU.def, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

[AMDGPU] Add builtins for wave reduction intrinsics
DeltaFile
+84-0clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+8-0clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+4-0clang/include/clang/Basic/BuiltinsAMDGPU.def
+96-03 files

LLVM/project 4a5ed5fllvm/lib/Target/AMDGPU SIISelLowering.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fadd.ll llvm.amdgcn.reduce.fsub.ll

[AMDGPU] Add wave reduce intrinsics for double types - 2

Supported Ops: `add`, `sub`
DeltaFile
+1,111-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+1,098-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+80-19llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-0llvm/lib/Target/AMDGPU/SIInstructions.td
+2,291-194 files

LLVM/project c266d8cclang/include/clang/Basic BuiltinsAMDGPU.def, clang/lib/CodeGen/TargetBuiltins AMDGPU.cpp

[AMDGPU] Add builtins for wave reduction intrinsics
DeltaFile
+84-0clang/test/CodeGenOpenCL/builtins-amdgcn.cl
+8-0clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp
+4-0clang/include/clang/Basic/BuiltinsAMDGPU.def
+96-03 files

LLVM/project eb48a61mlir/include/mlir/Bindings/Python Nanobind.h, mlir/lib/Bindings/Python MainModule.cpp

[mlir:python] Add manual typing annotations to `mlir.register_*` functions. (#170627)

This PR adds a manual typing annotations to the `register_operation` and
`register_(type|value)_caster` functions in the main `mlir` module.
Since those functions return the result `nb::cpp_function`, which is of
type `nb::object`, the automatic typing annocations are of the form `def
f() -> object`. This isn't particularly precise and leads to type
checking errors when the functions are used. Manually defining the
annotation with `nb::sig` solves the problem.

Signed-off-by: Ingo Müller <ingomueller at google.com>
DeltaFile
+14-0mlir/lib/Bindings/Python/MainModule.cpp
+1-0mlir/include/mlir/Bindings/Python/Nanobind.h
+15-02 files

LLVM/project 8c7edb5llvm/lib/Target/AMDGPU SIISelLowering.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fadd.ll llvm.amdgcn.reduce.fsub.ll

[AMDGPU] Add wave reduce intrinsics for double types - 2

Supported Ops: `add`, `sub`
DeltaFile
+1,111-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
+1,098-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
+81-19llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-0llvm/lib/Target/AMDGPU/SIInstructions.td
+2,292-194 files

LLVM/project fbdfe55llvm/lib/Target/AMDGPU SIISelLowering.cpp SIInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.reduce.fmax.ll llvm.amdgcn.reduce.fmin.ll

[AMDGPU] Add wave reduce intrinsics for double types - 1

Supported Ops: `min`, `max`
DeltaFile
+1,268-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmax.ll
+1,268-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fmin.ll
+65-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+2-0llvm/lib/Target/AMDGPU/SIInstructions.td
+2,603-14 files

LLVM/project 4c6b882llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/AArch64 rem-by-const.ll srem-lkk.ll

[DAG] Fold mul 0 -> 0 when expanding mul into parts. (#168780)

If the upper bits are zero, but we expand multiply then immediately
convert the multiple into a libcall, there is no opportunity to optimize
away the mul. Do so in getNode to make sure extending multiplies
optimise cleanly.
DeltaFile
+32-60llvm/test/CodeGen/Thumb/umulo-128-legalisation-lowering.ll
+25-41llvm/test/CodeGen/RISCV/mul.ll
+27-27llvm/test/CodeGen/AArch64/rem-by-const.ll
+9-9llvm/test/CodeGen/AArch64/srem-lkk.ll
+3-2llvm/test/CodeGen/AArch64/combine-sdiv.ll
+2-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+98-1396 files

LLVM/project c9ebc89llvm/include/llvm/ExecutionEngine/Orc CallSPSViaEPC.h CallViaEPC.h, llvm/unittests/ExecutionEngine/Orc CallSPSViaEPCTest.cpp

[ORC] Add void function support to CallViaEPC, CallSPSViaEPC. (#170800)

Adds support for calling void functions. Calls to void functions return
Error to capture any IPC/RPC failure.
DeltaFile
+30-14llvm/include/llvm/ExecutionEngine/Orc/CallSPSViaEPC.h
+24-6llvm/include/llvm/ExecutionEngine/Orc/CallViaEPC.h
+26-0llvm/unittests/ExecutionEngine/Orc/CallSPSViaEPCTest.cpp
+80-203 files

LLVM/project 7220268clang/docs LanguageExtensions.rst, clang/include/clang/Basic DiagnosticSemaKinds.td

[Clang] Extend __builtin_counted_by_ref to support pointers with 'counted_by' (#170750)

The __builtin_counted_by_ref builtin was previously limited to flexible
array members (FAMs). This change extends it to also support pointer
members that have the 'counted_by' attribute.

The 'counted_by' attribute can be applied to both FAMs and pointer
members:

    struct fam_struct {
        int count;
        int array[] __attribute__((counted_by(count)));
    };

    struct ptr_struct {
        int count;
        int *buf __attribute__((counted_by(count)));
    };


    [24 lines not shown]
DeltaFile
+75-12clang/test/Sema/builtin-counted-by-ref.c
+58-0clang/test/CodeGen/builtin-counted-by-ref.c
+19-16clang/lib/Sema/SemaChecking.cpp
+9-10clang/docs/LanguageExtensions.rst
+3-3clang/lib/CodeGen/CGBuiltin.cpp
+3-2clang/include/clang/Basic/DiagnosticSemaKinds.td
+167-436 files

LLVM/project 5911754llvm/include/llvm/CodeGen BasicBlockMatchingAndInference.h, llvm/include/llvm/Transforms/Utils SampleProfileInference.h

Adding Matching and Inference Functionality to Propeller-PR4: Implement matching and inference and create clusters (#167622)

This PR re-submits the previously reverted
PR(https://github.com/llvm/llvm-project/pull/165868) and fixes the
return type mismatch error.

Co-authored-by: lifengxiang1025 <lifengxiang at kuaishou.com>
Co-authored-by: zcfh <wuminghui03 at kuaishou.com>
DeltaFile
+196-0llvm/lib/CodeGen/BasicBlockMatchingAndInference.cpp
+93-0llvm/test/CodeGen/X86/basic-block-sections-clusters-bb-hash.ll
+81-2llvm/lib/CodeGen/BasicBlockSections.cpp
+62-0llvm/include/llvm/CodeGen/BasicBlockMatchingAndInference.h
+16-0llvm/include/llvm/Transforms/Utils/SampleProfileInference.h
+15-0llvm/lib/CodeGen/BasicBlockSectionsProfileReader.cpp
+463-27 files not shown
+490-613 files

LLVM/project 785caddclang/lib/AST/ByteCode Disasm.cpp

[clang][bytecode] Fix InterpFrame::dump() (#170682)

We should only call getThis() and getRVOPtr() if the frame has them.
DeltaFile
+8-2clang/lib/AST/ByteCode/Disasm.cpp
+8-21 files

LLVM/project 14bf95blibc/config/linux config.json

[libc] Remove extra commas in linux/config.json. (#170801)

DeltaFile
+2-2libc/config/linux/config.json
+2-21 files

LLVM/project eecdd4bclang-tools-extra/clang-tidy/bugprone UseAfterMoveCheck.cpp UseAfterMoveCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Extend `bugprone-use-after-move` to allow custom invalidation functions (#170346)

DeltaFile
+50-26clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.cpp
+60-2clang-tools-extra/test/clang-tidy/checkers/bugprone/use-after-move.cpp
+10-0clang-tools-extra/docs/clang-tidy/checks/bugprone/use-after-move.rst
+5-2clang-tools-extra/clang-tidy/bugprone/UseAfterMoveCheck.h
+4-0clang-tools-extra/docs/ReleaseNotes.rst
+129-305 files

LLVM/project 290b32aflang/test/Lower/OpenMP wsloop-linear.f90 simd-linear.f90, mlir/lib/Dialect/OpenMP/IR OpenMPDialect.cpp

[llvm][mlir][OpenMP] Support translation for linear clause in omp.wsloop and omp.simd (#139386)

This patch adds support for LLVM translation of linear clause on
omp.wsloop (except for linear modifiers).
DeltaFile
+80-53mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+74-0mlir/test/Target/LLVMIR/openmp-llvm.mlir
+60-0flang/test/Lower/OpenMP/wsloop-linear.f90
+57-0flang/test/Lower/OpenMP/simd-linear.f90
+0-26mlir/test/Target/LLVMIR/openmp-todo.mlir
+13-13mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
+284-924 files not shown
+300-11410 files

LLVM/project e48d49fllvm/test/CodeGen/RISCV/rvv vfsub-sdnode.ll vfmul-sdnode.ll

[RISCV][llvm] Support VFADD, VFSUB, VFMUL codegen for Zvfbfa (#170612)

Support both fixed-length vectors and scalable vectors.

Note: VP version is not gonna be supported for trivial instructions
since they're going to be removed soon.
DeltaFile
+653-177llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
+653-177llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
+163-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-sdnode.ll
+163-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-sdnode.ll
+163-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-sdnode.ll
+19-125llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
+1,814-4796 files not shown
+2,031-49212 files

LLVM/project af4098bllvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVInstrInfoP.td, llvm/test/CodeGen/RISCV rvp-ext-rv32.ll rvp-ext-rv64.ll

[RISCV][llvm] Support PSLL codegen for P extension (#170074)

There's no instruciton for vector shift amount, so we have to scalarize
it and rebuild the vector.
DeltaFile
+109-0llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
+36-0llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+13-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+13-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+171-04 files

LLVM/project 71de783llvm/lib/Target/RISCV RISCVInstrInfo.cpp, llvm/test/CodeGen/RISCV branch-relaxation-rv32.ll branch-relaxation-rv64.ll

[RISCV] Inserting indirect jumps with X7 for Zicfilp (#170683)

`BranchRelxation` uses `RISCVInstrInfo::insertIndirectBranch` to insert
an indirect branch if the jump target is out of range. Currently it uses
register scavenging to find a free register to use for the indirect
target. If Zicfilp is enabled, we need to use X7 so that the jump will
be treated as a software guarded branch.

Co-authored-by: Yeting Kuo <46629943+yetingk at users.noreply.github.com>
DeltaFile
+794-7llvm/test/CodeGen/RISCV/branch-relaxation-rv32.ll
+788-0llvm/test/CodeGen/RISCV/branch-relaxation-rv64.ll
+7-1llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+1,589-83 files

LLVM/project d8ad3c1.github CODEOWNERS

Remove myself from CODEOWNERS (#170799)

DeltaFile
+7-7.github/CODEOWNERS
+7-71 files

LLVM/project edcb815.github CODEOWNERS

Remove myself from CODEOWNERS
DeltaFile
+7-7.github/CODEOWNERS
+7-71 files

LLVM/project c2242bdutils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc BUILD.bazel

[bazel][clang-doc] Port 9349cb1523ddb88ca9d82bad497bb98082eb6c8d (#170797)

DeltaFile
+1-0utils/bazel/llvm-project-overlay/clang-tools-extra/clang-doc/BUILD.bazel
+1-01 files

LLVM/project 45af50dmlir/include/mlir/Interfaces TilingInterface.td, mlir/lib/Dialect/Linalg/Transforms TilingInterfaceImpl.cpp Tiling.cpp

[MLIR] Add fusability query to TilingInterface (#166502)

This introduces `isOpFusableWithProducer/Consumer` methods to the
TilingInterface that enable querying whether a tilable op can be fused
into a given set of producer slices or consumer slice without generating
IR. This is needed to enable use of the tiling interface in pattern
rewrites, as without this any pattern rewrite that tries to invoke the
method to tile is allowed to generate IR and fail.
DeltaFile
+105-0mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp
+70-0mlir/test/Interfaces/TilingInterface/query-fusability.mlir
+45-1mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.td
+37-0mlir/include/mlir/Interfaces/TilingInterface.td
+27-1mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
+1-2mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
+285-46 files

LLVM/project b32e067compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp

[compiler-rt] [UBSan] Fix missing preserve handlers (#170788)

DeltaFile
+3-3compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
+3-31 files

LLVM/project 79620d8libclc/clc/include/clc/float definitions.h, libclc/opencl/include/clc/opencl as_type.h types.h

[libclc] Add OpenCL atomic_*_explicit builtins (#168318)

Implement atomic_*_explicit (e.g. atomic_store_explicit) with
memory_order plus optional memory_scope.

OpenCL memory_order maps 1:1 to Clang (e.g. OpenCL memory_order_relaxed
== Clang __ATOMIC_RELAXED), so we pass it unchanged to clc_atomic_*
function which forwards to Clang _scoped_atomic* builtins.

Other changes:
* Add __opencl_get_clang_memory_scope helper in opencl/utils.h (OpenCL
scope -> Clang scope).
* Correct atomic_compare_exchange return type to bool.
* Fix atomic_compare_exchange to return true when value stored in the
pointer equals expected value.
* Remove volatile from CLC functions so that volatile isn't present in
LLVM IR.
* Add '-fdeclare-opencl-builtins -finclude-default-header' flag to
include

    [3 lines not shown]
DeltaFile
+115-19libclc/opencl/lib/generic/atomic/atomic_def.inc
+0-92libclc/opencl/include/clc/opencl/as_type.h
+82-9libclc/opencl/include/clc/opencl/atomic/atomic_decl.inc
+48-0libclc/clc/include/clc/float/definitions.h
+0-48libclc/opencl/include/clc/opencl/types.h
+0-18libclc/opencl/include/clc/opencl/synchronization/cl_mem_fence_flags.h
+245-18658 files not shown
+367-34064 files

LLVM/project 7f01d72llvm/unittests/IR ConstantsTest.cpp

[NFC] Fix memory leak in ConstantsTest (#170789)

Leak introduced with #164381.
DeltaFile
+1-0llvm/unittests/IR/ConstantsTest.cpp
+1-01 files

LLVM/project 711edb8compiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+3-3compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
+3-31 files

LLVM/project 40ac8ebcompiler-rt/lib/ubsan_minimal ubsan_minimal_handlers.cpp, compiler-rt/test/ubsan_minimal/TestCases handlers-link.c

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+170-0compiler-rt/test/ubsan_minimal/TestCases/handlers-link.c
+3-3compiler-rt/lib/ubsan_minimal/ubsan_minimal_handlers.cpp
+173-32 files

LLVM/project 9342d03clang-tools-extra/clang-tidy/readability UseStdMinMaxCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Preserve comments in `readability-use-std-min-max` (#169908)

Closes [#121613](https://github.com/llvm/llvm-project/issues/121613)
DeltaFile
+96-0clang-tools-extra/test/clang-tidy/checkers/readability/use-std-min-max.cpp
+60-8clang-tools-extra/clang-tidy/readability/UseStdMinMaxCheck.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+161-83 files

LLVM/project 5deea85llvm/test/TableGen RegClassByHwMode.td RegClassByHwModeErrors.td, llvm/test/TableGen/Common RegClassByHwModeCommon.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.8-beta.1
DeltaFile
+6-53llvm/test/TableGen/RegClassByHwMode.td
+47-0llvm/test/TableGen/RegClassByHwModeErrors.td
+38-0llvm/test/TableGen/Common/RegClassByHwModeCommon.td
+16-16llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
+8-6llvm/utils/TableGen/Common/CodeGenTarget.cpp
+8-6llvm/utils/TableGen/CompressInstEmitter.cpp
+123-813 files not shown
+137-859 files