LLVM/project 4fa2e19llvm/lib/Transforms/Vectorize LoopVectorize.cpp

RUN_VPLAN_PASS_NO_VERIFY->RUN_VPLAN_PASS
DeltaFile
+3-4llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+3-41 files

LLVM/project 95fbc36llvm/test/Transforms/LoopVectorize make-scalarization-decisions.ll make_scalarization_decisions.ll

Rename test
DeltaFile
+43-0llvm/test/Transforms/LoopVectorize/make-scalarization-decisions.ll
+0-43llvm/test/Transforms/LoopVectorize/make_scalarization_decisions.ll
+43-432 files

LLVM/project 10def77llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp

[AArch64][GlobalISel] Tighten up some legal types (#194785)

This tightens up some of the legal types from scalar any types to the
correct
integer or floating point types. Some are still not changed, like trunc
and
zext/sext. Type independant operations like loads, stores, vector
operations,
selects etc all still correctly use scalar any types.
DeltaFile
+36-32llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+36-321 files

LLVM/project 566b728flang/lib/Semantics type.cpp tools.cpp, flang/test/Semantics typesstress5.f90

[flang] Avoid exponential traversal in deep type extensions (#191955)

`HasDestruction()` and `IsFinalizable()` walked component iterators that
already descend into parent scopes, and then also recursed through
derived-type components. With deep type extension chains, that caused
the same inheritance structure to be traversed repeatedly and compile
time to grow exponentially.

Iterate only over the current type scope instead. The scope contains the
type's own components plus its parent component, so the existing
recursion through derived-type components still handles inheritance
without double traversal.

Add a regression test with a deep type extension hierarchy.

Co-authored-by: Sairudra More <moresair at pe31.hpc.amslabs.hpecorp.net>
DeltaFile
+257-0flang/test/Semantics/typesstress5.f90
+10-5flang/lib/Semantics/type.cpp
+9-5flang/lib/Semantics/tools.cpp
+276-103 files

LLVM/project bcc5d96clang-tools-extra/clangd FindTarget.cpp Selection.cpp, clang-tools-extra/clangd/unittests FindTargetTests.cpp HoverTests.cpp

[clangd] Resolve __builtin_offsetof designator components precisely (#194407)

Building on the new TraverseOffsetOfNode hook in RecursiveASTVisitor and
the OffsetOfNode DynTypedNode kind, teach SelectionTree, FindTarget, and
the explicit-references collector to address each designator component
individually. Cursor positions inside a nested designator (for example
the 'B' in __builtin_offsetof(A, B.c)) now resolve to the corresponding
field instead of always picking the innermost component.

- SelectionTree: wrap each OffsetOfNode visit in traverseNode so it
  becomes a selectable node alongside its enclosing OffsetOfExpr.
- FindTarget::allTargetDecls: resolve OffsetOfNode (Field kind) to its
  FieldDecl, and drop the OffsetOfExpr fallback so non-component
  selections do not guess a field target.
- ExplicitReferenceCollector: emit one ReferenceLoc per component via a
  new VisitOffsetOfNode hook, replacing the manual component loop in
  refInStmt.

Tests:

    [12 lines not shown]
DeltaFile
+74-5clang-tools-extra/clangd/unittests/FindTargetTests.cpp
+56-0clang-tools-extra/clangd/unittests/HoverTests.cpp
+17-22clang-tools-extra/clangd/FindTarget.cpp
+34-0clang-tools-extra/clangd/unittests/XRefsTests.cpp
+12-0clang-tools-extra/clangd/Selection.cpp
+193-275 files

LLVM/project 19a3d7bllvm/lib/Target/AMDGPU SIProgramInfo.cpp AMDGPUAsmPrinter.cpp, llvm/test/CodeGen/AMDGPU amdhsa-kernarg-preload-num-sgprs.ll

[AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (#192579)

When we work on the triton kernel with tensor descriptor created on the
host side, there is a error message `amdgpu_user_sgpr_count smaller than
than implied by enabled user SGPRs`.

After some debugging, we find the `USER_SGPR_COUNT` is not updated with
GFX125 and this patch updates it for USER_SGPR_COUNT from
https://llvm.org/docs/AMDGPUUsage.html#amdgpu-amdhsa-compute-pgm-rsrc2-gfx6-gfx12-table.

On GFX125, COMPUTE_PGM_RSRC2::USER_SGPR_COUNT is 6 bits wide. The MC
helper S_00B84C_USER_SGPR only masks to 5 bits; when the true user SGPR
count is 32 or more, the masked value wraps (e.g. 32 -> 0).
`AMDGPUAsmPrinter` then emits a .amdhsa_user_sgpr_count with 0, that
disagrees with the implied count from enabled user SGPRs (including
kernarg preload), and finally assembling llc output with `llvm-mc` fails
in `AMDGPUAsmParser`

---------

Co-authored-by: Shilei Tian <i at tianshilei.me>
DeltaFile
+26-14llvm/lib/Target/AMDGPU/SIProgramInfo.cpp
+27-0llvm/test/MC/AMDGPU/user-sgpr-count-gfx1250.s
+21-0llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
+6-5llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+4-2llvm/lib/Target/AMDGPU/SIProgramInfo.h
+3-3llvm/test/MC/AMDGPU/user-sgpr-count-diag.s
+87-242 files not shown
+92-258 files

LLVM/project e42c2feclang/lib/Basic/Targets OSTargets.cpp OSTargets.h

[clang][Fuchsia] Factor getFuchsiaDefines out of FuchsiaTargetInfo class (#194775)

Most of the template class's getOSDefines definition is not
template-dependent, so move it to a shared subroutine that's
outside the header file and reused by all the FuchsiaTargetInfo
instantiations.
DeltaFile
+11-0clang/lib/Basic/Targets/OSTargets.cpp
+4-7clang/lib/Basic/Targets/OSTargets.h
+15-72 files

LLVM/project f1822camlir/lib/Conversion/XeVMToLLVM XeVMToLLVM.cpp

[mlir][xevm] Fix greedy rewriter crash in HandleVectorExtractPattern matches shuffles on block arguments (#192213)

`HandleVectorExtractPattern` could report `success()` without rewriting
the IR when `llvm.shufflevector` extracted a contiguous slice from a
**block argument** (no defining op). The greedy rewriter’s expensive
checks then aborted with *“pattern returned success but IR did not
change”*.

The pattern only performs work when the shuffle’s operand is defined by
another op (`FPExt`, `FPTrunc`, `bitcast`, nested `shufflevector`, or
`load`). For operands like function arguments, `getDefiningOp()` is
null, so nothing is rewritten; the function still fell through to
`return success()` without changing the IR and would crash when
`MLIR_ENABLE_EXPENSIVE_PATTERN_API_CHECKS` is on. `mlir-opt
--convert-xevm-to-llvm --split-input-file
mlir/test/Conversion/XeVMToLLVM/xevm_mx-to-llvm.mlir` no longer hits the
fatal error.

Assisted-by: Cursor (Composer 2)
DeltaFile
+3-0mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
+3-01 files

LLVM/project be693a5llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-ext-rv64.ll

[RISCV] Rename rvp-ext-rv32/64.ll to rvp-simd-32/64.ll. Shorten check prefixes. NFC (#194770)

The rv32/rv64 here were the length of the vector types. The
rvp-ext-rv32.ll test has rv32 and rv64 RUN lines. Rename to make this
clearer.

I want to add rv32 RUN lines to the rvp-simd-64.ll, but we need to fix
some crashes first.
DeltaFile
+2,727-0llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+0-2,727llvm/test/CodeGen/RISCV/rvp-ext-rv64.ll
+0-2,113llvm/test/CodeGen/RISCV/rvp-ext-rv32.ll
+2,113-0llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+4,840-4,8404 files

LLVM/project d3fec10llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll shuffle-as-xvshuf.ll

[LoongArch] Custom legalize vector_shuffle to `[x]vpermi.w` (#164945)
DeltaFile
+138-21llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+4-8llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
+4-8llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+4-8llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+6-3llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
+2-5llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
+158-532 files not shown
+170-548 files

LLVM/project f217197llvm/lib/CodeGen SpillPlacement.cpp

[CodeGen] Use SmallMapVector for SpillPlacement::Node::Links (#194653)

Previously, `SpillPlacement::Node::Links` was implemented as a
`SmallVector` of `(Weight, BundleNo)` pairs.

This patch replaces the `SmallVector` with a `SmallMapVector<unsigned,
BlockFrequency, 4>`, which stores `(BundleNo, Weight)` pairs. This
allows for more efficient lookups and weight accumulations when multiple
links to the same bundle are added.
DeltaFile
+14-20llvm/lib/CodeGen/SpillPlacement.cpp
+14-201 files

LLVM/project 69c38bellvm/lib/ProfileData ETMTraceDecoder.cpp CMakeLists.txt, llvm/test/tools/llvm-profgen etm-arch.test

Reapply "Reland "[llvm-profgen] Add support for ETM trace decoding"" … (#194730)

…(#194695)

This relands the original commit
e3bd61890e68303a33fdd33fbdd9abeda1037450 (#191584).

The original change was reverted in the following commits:

1) ec9d7d18bdfe21c30c94c02f14f3613f7b69a17b (#194087) 
2) c26ae41c8765fdd073c71061f21a83a161598901 (#194695)

This reland incorporates the following fixes:

1) Change LLVM_ENABLE_OPENCSD to default to OFF (opt-in).

2) Parse the OpenCSD version from ocsd_if_version.h and gate OpenCSD
support on a minimum version of 1.5.4 to avoid compilation errors.


    [2 lines not shown]
DeltaFile
+251-0llvm/lib/ProfileData/ETMTraceDecoder.cpp
+71-36llvm/tools/llvm-profgen/llvm-profgen.cpp
+72-17llvm/tools/llvm-profgen/PerfReader.cpp
+81-0llvm/test/tools/llvm-profgen/etm-arch.test
+57-0llvm/lib/ProfileData/CMakeLists.txt
+48-0llvm/test/tools/llvm-profgen/Inputs/etm-opencsd.yaml
+580-5310 files not shown
+703-7216 files

LLVM/project 3cab3bcllvm/lib/Target/WebAssembly WebAssemblyCFGStackify.cpp

[WebAssembly] Fix -Wunused-function (#194776)

After 4aee20b8caa9b8477aef94d10c37b2f00805de07, getBBName is only used
within an assertion so mark it [[maybe_unused]] so it does not cause a
-Wunused-function warning in non-asserts builds.
DeltaFile
+1-1llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
+1-11 files

LLVM/project a6187c0.github/workflows prune-branches.yml

[Github] Disable prune-unused-branches workflow (#194773)

It decided to delete 237 branches today which is probably not correct
and at least one of them was tied to an open PR which is definitely not
correct, so disable for now until we can investigate fully.
DeltaFile
+0-2.github/workflows/prune-branches.yml
+0-21 files

LLVM/project c6a3c37clang/lib/Interpreter IncrementalExecutor.cpp, llvm/include/llvm/ExecutionEngine/Orc LLJIT.h EPCGenericJITLinkMemoryManager.h

[ORC] Move JITLinkMemoryManager ownership out of ExecutorProcessControl. (#192665)

Removes the JITLinkMemoryManager pointer and getMemMgr() accessor from
ExecutorProcessControl, replacing them with a
createDefaultMemoryManager() virtual factory method. This follows the
same decoupling pattern applied to DylibManager and MemoryAccess in
earlier patches.

JITLinkMemoryManager ownership moves to the client:
- LLJIT gains a MemMgr member and a MemoryManagerCreator builder hook.
- EPCIndirectionUtils takes a JITLinkMemoryManager& parameter.
- LinkGraphLinkingLayer and ObjectLinkingLayer lose their no-arg
constructors (MemMgr is now required).
- SimpleRemoteEPC::Setup is removed; custom memory manager selection now
happens at the client level rather than during EPC setup.
DeltaFile
+34-31llvm/tools/llvm-jitlink/llvm-jitlink.cpp
+17-28clang/lib/Interpreter/IncrementalExecutor.cpp
+21-22llvm/lib/ExecutionEngine/Orc/EPCIndirectionUtils.cpp
+24-0llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
+11-13llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
+5-17llvm/include/llvm/ExecutionEngine/Orc/EPCGenericJITLinkMemoryManager.h
+112-11123 files not shown
+255-20529 files

LLVM/project bf51625llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lsx/ir-instruction fptrunc.ll

avoid regression
DeltaFile
+20-7llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+4-8llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
+24-152 files

LLVM/project 29de6c9llvm/test/CodeGen/LoongArch/lsx/ir-instruction fptrunc.ll

update tests
DeltaFile
+8-4llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fptrunc.ll
+8-41 files

LLVM/project 7594924llvm/lib/Target/LoongArch LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll shuffle-as-xvshuf.ll

fix
DeltaFile
+6-3llvm/test/CodeGen/LoongArch/lsx/widen-shuffle-mask.ll
+4-4llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+4-4llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+4-2llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
+3-3llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
+2-2llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+23-186 files

LLVM/project b69daf8llvm/lib/Target/LoongArch LoongArchISelLowering.cpp LoongArchLSXInstrInfo.td, llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll shuffle-as-xvshuf.ll

[LoongArch] Custom legalize vector_shuffle to `[x]vpermi.w`
DeltaFile
+118-14llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+3-7llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+3-7llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+2-8llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vshuf.ll
+3-6llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvshuf.ll
+7-0llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+136-422 files not shown
+144-468 files

LLVM/project 4e05294llvm/test/CodeGen/LoongArch/lasx/ir-instruction shuffle-as-xvpermi.ll, llvm/test/CodeGen/LoongArch/lsx/ir-instruction shuffle-as-vpermi.ll

[LoongArch][NFC] Pre-commit tests for `[x]vpermi.w` (#164944)
DeltaFile
+41-0llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shuffle-as-xvpermi.ll
+41-0llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shuffle-as-vpermi.ll
+82-02 files

LLVM/project f2cb2a1utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Update WebAssemblyGenGlobalISel.inc -gisel-extended-llt (#194768)

Fixup for #193047
DeltaFile
+4-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-11 files

LLVM/project 478db95llvm/test/CodeGen/AArch64/Atomics aarch64-atomicrmw-rcpc.ll aarch64-atomicrmw-lse2.ll, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

New approach

Created using spr 1.3.6-beta.1
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+3,230-456llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
+14,911-8,5332,821 files not shown
+114,962-49,1242,827 files

LLVM/project 740e3a0llvm/test/CodeGen/AArch64/Atomics aarch64-atomicrmw-lse2.ll aarch64-atomicrmw-rcpc3.ll, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

Merge branch 'main' into users/zhaoqi5/test-vpermiw
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+3,230-456llvm/test/CodeGen/WebAssembly/strided-int-mac.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-lse2.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc3.ll
+1,250-1,305llvm/test/CodeGen/AArch64/Atomics/aarch64-atomicrmw-rcpc.ll
+14,911-8,5333,247 files not shown
+129,959-53,8373,253 files

LLVM/project 0e3c4c4utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel] Update WebAssemblyGenGlobalISel.inc -gisel-extended-llt

Fixup for #193047
DeltaFile
+4-1utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-11 files

LLVM/project 8e9fc75clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_subp.c, llvm/test/CodeGen/AMDGPU regalloc-hoist-spill-live-range-upd.ll

dynamic version

Created using spr 1.3.8-beta.1
DeltaFile
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+2,870-0llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.ll
+1,509-924mlir/utils/vscode/package-lock.json
+1,779-131llvm/test/CodeGen/SystemZ/memset-08.ll
+970-0llvm/test/CodeGen/SystemZ/memmove-01.ll
+928-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_subp.c
+13,117-5,2171,757 files not shown
+62,781-22,0421,763 files

LLVM/project 9e4748eclang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow connected_units_by_ret.cpp disconnected_units.cpp

[SSAF][UnsafeBufferReachableAnalysis] add end-to-end testing
DeltaFile
+183-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_ret.cpp
+138-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/disconnected_units.cpp
+117-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_calls.cpp
+111-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_global.cpp
+83-0clang/test/Analysis/Scalable/EndToEnd/UnsafeBufferFlow/connected_units_by_class_and_clients.cpp
+632-05 files

LLVM/project 8419579clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis SourcePassAnalysis.h, clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis WPASuite.h

[SSAF] Add UnsafeBufferReachableDebugAnalysis--a source pass analysis

Also added temporary workaround for LUNamespace and Entity linkage info
DeltaFile
+103-1clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+26-0clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/WPASuite.cpp
+5-1clang/test/Analysis/Scalable/help.cpp
+5-0clang/include/clang/ScalableStaticAnalysisFramework/Core/WholeProgramAnalysis/WPASuite.h
+4-1clang/lib/ScalableStaticAnalysisFramework/Core/TUSummary/TUSummaryBuilder.cpp
+2-0clang/include/clang/ScalableStaticAnalysisFramework/Core/SourcePassAnalysis/SourcePassAnalysis.h
+145-318 files not shown
+164-324 files

LLVM/project e555021orc-rt/unittests SimpleNativeMemoryMapSPSCITest.cpp

[orc-rt] Remove explicit addSimpleNativeMemoryMap call. NFCI. (#194766)

The SimpleNativeMemoryMap::Create call two lines below will add this
interface anyway, so the explicit call is redundant.
DeltaFile
+0-1orc-rt/unittests/SimpleNativeMemoryMapSPSCITest.cpp
+0-11 files

LLVM/project 8da581dclang/lib/CodeGen CGException.cpp CGDecl.cpp, clang/test/CodeGenCXX exceptions-seh.cpp

[WinEH] Diagnose SEH object unwinding in skipped __except bodies (#187718)

When an SEH __except block has no EH branches, CodeGen skips emitting the handler
body. This also skipped the existing diagnostic for local variables that require destruction
under C++ exceptions

Diagnose those variables before dropping the skipped handler body, and add coverage
for both sync and async exception modes
DeltaFile
+11-14clang/test/CodeGenCXX/exceptions-seh.cpp
+11-0clang/lib/CodeGen/CGException.cpp
+0-2clang/lib/CodeGen/CGDecl.cpp
+22-163 files

LLVM/project c7e805cclang/include/clang/Frontend FrontendOptions.h, clang/include/clang/Options Options.td

[SSAF] Add CLI option for SourcePassAnalysis
DeltaFile
+78-0clang/lib/ScalableStaticAnalysisFramework/Frontend/SourcePassAnalysisFrontendAction.cpp
+33-0clang/include/clang/ScalableStaticAnalysisFramework/Frontend/SourcePassAnalysisFrontendAction.h
+14-0clang/include/clang/Options/Options.td
+6-0clang/include/clang/Frontend/FrontendOptions.h
+4-0clang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
+1-0clang/lib/ScalableStaticAnalysisFramework/Frontend/CMakeLists.txt
+136-06 files