TargetLibraryInfo: Split off VectorLibrary enum and flag (#166980)
Move this to a new shared header to facilitate the eventual
merger of RuntimeLibcallsInfo and TargetLibraryInfo. Ideally
this would be replaced with a module flag. For now put it into
a common header both can use.
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
For predicated SVE instructions where we know that the inactive lanes
are undef, it is better to pick a destination register that is not
unique. This avoids introducing a movprfx to copy a unique register to
the destination operand, which would be needed to comply with the tied
operand constraints.
For example:
```
%src1 = COPY $z1
%src2 = COPY $z2
%dst = SDIV_ZPZZ_S_UNDEF %p, %src1, %src2
```
Here it is beneficial to pick $z1 or $z2 as the destination register,
because if it would have chosen a unique register (e.g. $z0) then the
pseudo expand pass would need to insert a MOVPRFX to expand the
operation into:
```
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[X86] BuiltinsX86.td - move the SSE constexpr builtins together. NFC. (#167323)
Makes it much easier to workout what still needs to be converted to be constexpr compatible
[clang] Refactor option-related code from clangDriver into new clangOptions library (#163659)
This change moves option-related code from clangDriver into a new
clangOptions library.
This refactoring is part of a broader effort to support driver-managed
builds for compilations using C++ named modules and/or Clang modules.
It is required for linking the dependency scanning tooling against the
driver without introducing cyclic dependencies, which would otherwise
cause build failures when dynamic linking is enabled.
In particular, clangFrontend must no longer depend on clangDriver
for this to be possible.
This PR is motivated by the following review comment:
https://github.com/llvm/llvm-project/pull/152770#discussion_r2430756918
Include the cost of the select/predication in the cost of the partial reduction.
In practice this won't make much difference, because VPExpressions already accounts
for the cost of the predication.
[LV] Move condition to VPPartialReductionRecipe::execute
This means that VPExpressions will now be constructed for
VPPartialReductionRecipe's when the loop has tail-folding predication.
Note that control-flow (if/else) predication is not yet handled
for partial reductions, because of the way partial reductions
are recognised and built up.
[Flang][driver] Do not emit -latomic on link line on Windows (#164648)
Flang on Windows added `-latomic` to the link line. This library does
not exist on Windows and the linker gives a warning.
Revert "Match shift to signbit pattern instead of computeKnownBits"
This reverts commit 49e2c3aa7a861fc8864c2d045b3804e31e1f13cc.
One case is slighly more sophisticated
DAG: Fold copysign with a known signmask to a disjoint or
If the sign bit is a computed sign mask (i.e., we know it's
either +0 or -0), turn this into a disjoint or. This pattern
appears in the pow implementations.
We also need to know the sign bit of the magnitude is 0 for
the or to be disjoint. Unfortunately the DAG's FP tracking is
weak and we did not have a way to check if the sign bit is known
0, so add something for that. Ideally we would get a complete
computeKnownFPClass implementation.
This is intended to help avoid the regression which caused
d3e7c4ce7a3d7 to be reverted.
DAG: Add AssertNoFPClass from call return attributes
This defends against regressions in future patches. This excludes
the target intrinsic case for now; I'm worried introducing an intermediate
AssertNoFPClass is likely to break combines.
DAG: Handle AssertNoFPClass in computeKnownBits
It's possible to determine the sign bit if the value is known
one of the positive/negative classes and not-nan.
Rename indirect to recurse and keep in original file -- invalid for gfx1200. Move fp_all test to fp-nosave since it compiles on both gfx942 and gfx1200.
[BOLT][PAC] Warn about synchronous unwind tables
BOLT currently ignores functions with synchronous PAuth DWARF info.
When more than 10% of functions get ignored for inconsistencies, we
should emit a warning to only use asynchronous unwind tables.
See also: #165215
[BOLT][NFC] Rename Pointer Auth DWARF rewriter passes
Original names were "working titles". After initial patches are merged,
I'd like to rename these passes to names that reflect their intent
better and show their relationship to each other:
InsertNegateRAStatePass renamed to PointerAuthCFIFixup,
MarkRAStates renamed to PointerAuthCFIAnalyzer.
