LLVM/project 182181cmlir/include/mlir/IR BuiltinTypeInterfaces.td

[mlir][NFC] Improve `ShapedTypeInterface` documentation (#225282)

Document that each dimension size must be not larger than "signed int64
max".

Related discussion:
https://discourse.llvm.org/t/rfc-vector-should-vector-transfer-read-transfer-write-indices-be-treated-as-unsigned-non-negative/91869/6
DeltaFile
+6-5mlir/include/mlir/IR/BuiltinTypeInterfaces.td
+6-51 files

LLVM/project febece3mlir/lib/Dialect/MemRef/IR MemRefOps.cpp, mlir/test/Dialect/MemRef invalid.mlir

[mlir][memref] Reject empty collapse_shape and expand_shape reassociation groups (#225348)

`memref.collapse_shape` and `memref.expand_shape` both accept an empty
reassociation group, which is not a valid reassociation: every group
must be a
non-empty, contiguous segment of dimensions.

* `memref.collapse_shape` with an empty group aborts the compiler for a
  non-identity source layout. `CollapseShapeOp::verify` forwards the
reassociation to `computeCollapsedLayoutMap`, which calls
`ArrayRef::back()`
  on each group and asserts on the empty one:

      mlir-opt: llvm/include/llvm/ADT/ArrayRef.h:151:
      const T& llvm::ArrayRef<T>::back() const [with T = long int]:
      Assertion `!empty()' failed.

  With an identity source layout the op is instead silently accepted.


    [18 lines not shown]
DeltaFile
+31-0mlir/test/Dialect/MemRef/invalid.mlir
+17-0mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
+48-02 files

LLVM/project 82ea1d2llvm/test/CodeGen/X86 no-split-size.ll 2008-04-16-ReMatBug.ll, llvm/test/CodeGen/X86/AMX amx-spill-merge.ll

[RegAlloc] [X86] Enable callee saved register optimization for x86 (#220090)

Enable callee saved register optimization implemented in
RAGreedy::tryAssignCSRFirstTime() for x86. It can replace save/restore
instructions in prologue/epilogue with register spill/reload in cold
blocks or register splits.

Spec cpu 2006 int result with fdo on skylake.
```
regalloc-csr-cost-scale                                 0     30

400.perlbench                                          42.0  42.7   
401.bzip2                                              25.5  26.3   
403.gcc                                                42.1  41.4   
429.mcf                                                45.0  44.4   
456.hmmer                                              38.2  38.2   
458.sjeng                                              32.3  32.0   
462.libquantum                                         68.0  68.9   
471.omnetpp                                            26.9  27.3   

    [5 lines not shown]
DeltaFile
+68-68llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
+61-72llvm/test/CodeGen/X86/speculative-load-hardening.ll
+48-42llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
+39-31llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
+29-38llvm/test/CodeGen/X86/no-split-size.ll
+34-32llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
+279-28322 files not shown
+512-51928 files

LLVM/project 71122e7llvm/lib/CodeGen/SelectionDAG SelectionDAGDumper.cpp

[SelectionDAG] Add ISD::ARITH_FENCE to SelectionDAGDumper. (#225485)

We seem to have no consistency on CamelCase or snake_case in node
naming. I've gone with CamelCase to match the nearby nodes, but happy to
change.
DeltaFile
+1-0llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+1-01 files

LLVM/project 838c705clang/docs ReleaseNotes.md, clang/lib/AST ExprConstant.cpp

[clang] Return early if a value dependent recovery init appeared in constant evaluation context in legacy constant evaluator (#225027)

A recovery default member initializer can be value-dependent even when
the expression referring to the variable is not. Clang should return
early to avoid crash.

This fix the issue found in
https://github.com/llvm/llvm-project/issues/185874#issuecomment-4058045596.

---------

Signed-off-by: yronglin <yronglin777 at gmail.com>
DeltaFile
+25-2clang/test/SemaCXX/recovery-expr-type.cpp
+15-7clang/lib/AST/ExprConstant.cpp
+3-0clang/docs/ReleaseNotes.md
+43-93 files

LLVM/project a3cba3cbolt/lib/Core DebugNames.cpp

Close a loose end for synthesized debug (anonymous namespace) strings that happen to be already in the main CU debug_str section.
DeltaFile
+4-7bolt/lib/Core/DebugNames.cpp
+4-71 files

LLVM/project c2b3813orc-rt/include/orc-rt/support bit.h

[orc-rt] Simplify bit.h countl_zero and bit_width (#225547)

The old countl_zero algorithm wasn't recognized / optimized by clang on
arm64 or x86-64. Switch to a simpler loop that clang recognizes and
rewrite bit_width in terms of countl_zero. NFCI.
DeltaFile
+8-19orc-rt/include/orc-rt/support/bit.h
+8-191 files

LLVM/project 1adcce1clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver sanitize-trap-loop.c

[Driver] Link ubsan_loop_detect with --whole-archive (#225498)

`addSanitizerRuntimes` places sanitizer archives before user object
files on the linker command line.

Because `ubsan_loop_detect` was in `NonWholeStaticRuntimes` without `-u`
symbols, single-pass linkers like GNU `ld.bfd` discarded
`libclang_rt.ubsan_loop_detect.a` before seeing references to
`__ubsan_install_trap_loop_detection` or `__ubsan_is_trap_loop`. Move
`ubsan_loop_detect` to `StaticRuntimes` so it is linked with
`--whole-archive`.
DeltaFile
+1-1clang/test/Driver/sanitize-trap-loop.c
+1-1clang/lib/Driver/ToolChains/CommonArgs.cpp
+2-22 files

LLVM/project e02ef74llvm/lib/Target/RISCV RISCVISelLowering.cpp

fixup! Typo
DeltaFile
+1-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+1-11 files

LLVM/project 429bc4eclang/lib/CIR/CodeGen CIRGenCleanup.cpp CIRGenExprScalar.cpp, clang/test/CIR/CodeGen cleanup-conditional.cpp dtors.cpp

[CIR] Use cleanup active flag with logical operators (#225554)

When temporary expressions are created within a logical binary
operation, we need to use a "cleanup active" flag to guard any cleanups
that are created in the right-hand side of the expression because the
expression may short-circuit and not evaluate the RHS. Failure to do so
had been leading to destructors being called for objects that had never
been constructed.

This fix introduces a regression in destructor call ordering when both
sides of a logical operation create temporaries that require cleanup.
This is a known ordering bug that preceeded this PR but was incidentally
avoided by the previous incorrect handling. The orderig bug will be
fixed in a follow-up change.

Assisted-by: Cursor / various models
DeltaFile
+107-105clang/test/CIR/CodeGen/dtors.cpp
+86-0clang/test/CIR/CodeGen/cleanup-conditional.cpp
+8-2clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+8-0clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
+209-1074 files

LLVM/project 0ff5abdclang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/Lowering not.cir

[CIR] Fix 'cir.not' lowering behavior for >64 bit size (#225541)

We were only inverting the lower 64 bits because we used the
int64_t/uint64_t overload, which only filled in 64 bits. This patch
replaces that with a 'getAllOnes' of the right size.
DeltaFile
+33-0clang/test/CIR/Lowering/not.cir
+3-1clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+36-12 files

LLVM/project 4c320dcclang/lib/CIR/Lowering/DirectToLLVM LowerToLLVM.cpp, clang/test/CIR/CodeGen nobuiltin-replaceable-allocation.cpp

[CIR] Lower nobuiltin attribute (#225545)

This causes a problem in tests for global allocation functions, but we
are not currently lowering the 'nobuiltin' attribute to LLVM-IR. This
patch adds the lowering.
DeltaFile
+25-0clang/test/CIR/CodeGen/nobuiltin-replaceable-allocation.cpp
+3-1clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+28-12 files

LLVM/project c0be35fclang/lib/CIR/CodeGen CIRGenFunction.cpp CIRGenExpr.cpp, clang/test/CIR/CodeGen lambda-explicit-obj.cpp

[CIR] Fix lambda explicit object parameters (#225518)

We seem to have diverged significantly from classic compiler here,
likely because the incubator missed these changes. The result was the
exmaple given in the test would crash because the 'this' argument wasn't
set right.

This patch copy/pastes/lightly modifies classic codegen to get these
lambdas done correctly.
DeltaFile
+92-0clang/test/CIR/CodeGen/lambda-explicit-obj.cpp
+31-7clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+11-14clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+134-213 files

LLVM/project 2382abcclang/lib/CIR/Dialect/Transforms LoweringPrepare.cpp, clang/lib/CIR/Lowering LoweringHelpers.cpp

[CIR] Implement lowering for BitInt that needs to be an array (#225470)

On bitint types that are not powers of 2, we have to represent them as
an array. This patch modifies 'convertTypeForMemory' to do that.
However, that ends up causing a couple of problems, that this also ends
up fixing:

First: constant init needs to also lower to this type/get that correct,
  so this introduces 'getBitIntStorageAttr' to manage that

Second: The 'copy' op lowering was getting its layout from the lowered
type, which is no longer correct. Since this is suposed to be the same
as what we get from CIR, this is jsut switched to use that instead.

Third: this ran into an issue with cir.copy in LoweringPrepare where we
didn't properly copy the alignment over. The result was our copy
operation didn't get alignment correct. This patch fixes that too.

Fourth: Load/Store/VecMaskedLoad all had to change how they got the type

    [10 lines not shown]
DeltaFile
+145-0clang/test/CIR/CodeGen/bitint-wide.c
+0-65clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
+45-4clang/lib/CIR/Lowering/LoweringHelpers.cpp
+27-20clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
+28-0clang/test/CIR/CodeGen/global-const-alignment.cpp
+13-3clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
+258-926 files not shown
+280-10112 files

LLVM/project 1b44201mlir/include/mlir-c Analysis.h, mlir/lib/CAPI/IR Analysis.cpp

[mlir-c] Add getBlocksSortedByDominance and topologicalSort
DeltaFile
+77-0mlir/test/CAPI/ir.c
+24-0mlir/include/mlir-c/Analysis.h
+23-0mlir/lib/CAPI/IR/Analysis.cpp
+124-03 files

LLVM/project c3af701mlir/include/mlir-c Analysis.h, mlir/lib/CAPI/IR Analysis.cpp

[mlir-c] Add backward slice analysis
DeltaFile
+65-0mlir/test/CAPI/ir.c
+30-0mlir/lib/CAPI/IR/Analysis.cpp
+20-0mlir/include/mlir-c/Analysis.h
+115-03 files

LLVM/project 0c81409mlir/include/mlir-c Analysis.h, mlir/lib/CAPI/IR CMakeLists.txt Analysis.cpp

[mlir-c] Add forward slice analysis
DeltaFile
+75-0mlir/test/CAPI/ir.c
+51-0mlir/include/mlir-c/Analysis.h
+43-0mlir/lib/CAPI/IR/Analysis.cpp
+2-0mlir/lib/CAPI/IR/CMakeLists.txt
+171-04 files

LLVM/project 97458f6clang/include/clang/CIR/Dialect/Analysis CIRBasicAliasAnalysis.h, clang/lib/CIR/Dialect/Analysis CIRBasicAliasAnalysis.cpp

[CIR] Compare access ranges of pointers into the same object (#225166)

Two pointers at different offsets into the same object were previously
reported as MayAlias, because whether they overlap depends on how many
bytes each access touches. This change extends the analysis to use the
access size from the pointee type and compare the byte ranges the two
accesses cover. Disjoint ranges don't alias, overlapping ranges
partially alias. Access to different members of a record are now
reported as NoAlias, while a member compared against the record it
belongs to is reported as PartialAlias.

Accesses whose extent isn't statically known, such as those through a
pointer to void, keep the conservative answer.

Assisted-by: Cursor / various models
DeltaFile
+109-62clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
+34-5clang/lib/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.cpp
+4-4clang/include/clang/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.h
+147-713 files

LLVM/project d6d4b20mlir/include/mlir-c Analysis.h, mlir/lib/CAPI/IR Analysis.cpp

[mlir-c] Add getBlocksSortedByDominance and topologicalSort
DeltaFile
+76-0mlir/test/CAPI/ir.c
+21-1mlir/include/mlir-c/Analysis.h
+20-0mlir/lib/CAPI/IR/Analysis.cpp
+117-13 files

LLVM/project c29ad0fmlir/include/mlir-c Analysis.h, mlir/lib/CAPI/IR Analysis.cpp

[mlir-c] Add backward slice analysis
DeltaFile
+63-0mlir/test/CAPI/ir.c
+14-0mlir/lib/CAPI/IR/Analysis.cpp
+14-0mlir/include/mlir-c/Analysis.h
+91-03 files

LLVM/project 1031461mlir/include/mlir-c Analysis.h, mlir/lib/CAPI/IR CMakeLists.txt Analysis.cpp

[mlir-c] Add forward slice analysis
DeltaFile
+74-0mlir/test/CAPI/ir.c
+44-0mlir/include/mlir-c/Analysis.h
+40-0mlir/lib/CAPI/IR/Analysis.cpp
+2-0mlir/lib/CAPI/IR/CMakeLists.txt
+160-04 files

LLVM/project 943c30ellvm/test/Transforms/SLPVectorizer/AArch64 fadd-with-gathered-fmul-operands.ll loop-accumulator-reduction.ll, llvm/test/Transforms/SLPVectorizer/X86 fmul-fused-into-scalar-fadd.ll

[SLP][NFC]Update/add some new tests for fmuladd cases, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/225553
DeltaFile
+70-7llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
+59-0llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
+10-9llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
+5-6llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
+144-224 files

LLVM/project e9c29efllvm/docs FuzzingLLVM.md ConvergentOperations.md

[LLVM][docs] Address batch 10 Markdown review feedback
DeltaFile
+8-7llvm/docs/HowToSubmitABug.md
+5-5llvm/docs/MLGO.md
+3-3llvm/docs/HowToSetUpLLVMStyleRTTI.md
+2-2llvm/docs/GwpAsan.md
+1-1llvm/docs/FuzzingLLVM.md
+1-1llvm/docs/ConvergentOperations.md
+20-196 files

LLVM/project 8a25130llvm/utils/git code-format-helper.py

[CI] Ignore ';' comments in .ll files in undef deprecator (#225509)

Without this patch, UndefGetFormatHelper matches across ';' comment
markers on added lines in .ll files, flagging false positives whenever
the word 'undef' appears in a test comment.

This patch stops matching at ';' on added lines in .ll files so comments
are ignored while uses of undef in IR instructions are still caught.

Assisted-by: Antigravity
DeltaFile
+3-3llvm/utils/git/code-format-helper.py
+3-31 files

LLVM/project e35a45fclang/lib/Headers avx10v2auxintrin.h, clang/test/CodeGen/AArch64 neon-ldst-one.c

Merge cascade
DeltaFile
+4,372-0clang/test/OpenMP/structured-bindings-codegen.cpp
+1,413-1,413clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+1,403-1,403clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+1,403-1,403clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+0-2,567clang/test/CodeGen/AArch64/neon-ldst-one.c
+2,403-0clang/lib/Headers/avx10v2auxintrin.h
+10,994-6,7862,292 files not shown
+124,200-58,5842,298 files

LLVM/project 8ff7119clang/lib/Headers avx10v2auxintrin.h, clang/test/CodeGen/AArch64 neon-ldst-one.c

Merge cascade
DeltaFile
+4,372-0clang/test/OpenMP/structured-bindings-codegen.cpp
+1,413-1,413clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+1,403-1,403clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+1,403-1,403clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+0-2,567clang/test/CodeGen/AArch64/neon-ldst-one.c
+2,403-0clang/lib/Headers/avx10v2auxintrin.h
+10,994-6,7862,292 files not shown
+124,200-58,5842,298 files

LLVM/project bb16509

Update after cascade merge
DeltaFile
+0-00 files

LLVM/project 13e6f62llvm/test/TableGen AMDGPUTargetDefGenericClassification.td

[AMDGPU] Avoid repeated parsing in generic classification test

Parse AMDGPU.td once and assert real feature classifications directly. Keep validation of real generic targets and use AMDGPUTargetDefGenericFeatures.td for validation diagnostics.

Addresses the timeout reported on #223179. Local test time drops from 79.59s to 11.28s; both classification and generic feature validation tests pass.

Change-Id: Ic93ed7843d48230cf61c196502b51d7900dc3329
DeltaFile
+33-64llvm/test/TableGen/AMDGPUTargetDefGenericClassification.td
+33-641 files

LLVM/project 3c707d7clang/lib/Headers avx10v2auxintrin.h, clang/test/CodeGen/AArch64 neon-ldst-one.c

Merge cascade
DeltaFile
+4,372-0clang/test/OpenMP/structured-bindings-codegen.cpp
+1,413-1,413clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp
+1,403-1,403clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp
+1,403-1,403clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp
+0-2,567clang/test/CodeGen/AArch64/neon-ldst-one.c
+2,403-0clang/lib/Headers/avx10v2auxintrin.h
+10,994-6,7862,372 files not shown
+130,857-60,3112,378 files

LLVM/project 035c786clang/test/CIR/CodeGen attr-target-x86.c

[CIR] Fix target attr test (#225534)

After #206888 our printed checks are broken.  Fix them.
DeltaFile
+4-4clang/test/CIR/CodeGen/attr-target-x86.c
+4-41 files