LLVM/project c908037llvm/test/Transforms/LoopVectorize intrinsic.ll if-reduction.ll, llvm/test/Transforms/LoopVectorize/ARM mve-reductions.ll

[LV][NFC] Remove "; preds = " comments from tests (#191163)

The "; preds = " comments in tests add no value so I've removed them.
DeltaFile
+130-130llvm/test/Transforms/LoopVectorize/intrinsic.ll
+87-87llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
+75-75llvm/test/Transforms/LoopVectorize/if-reduction.ll
+64-64llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
+61-61llvm/test/Transforms/LoopVectorize/ARM/mve-reductions.ll
+58-58llvm/test/Transforms/LoopVectorize/gcc-examples.ll
+475-475418 files not shown
+3,332-3,332424 files

LLVM/project f2e54efllvm/include/llvm/Transforms/Scalar NaryReassociate.h, llvm/lib/Transforms/Scalar NaryReassociate.cpp

review
DeltaFile
+5-1llvm/include/llvm/Transforms/Scalar/NaryReassociate.h
+1-0llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+6-12 files

LLVM/project a8a83ecclang/docs ReleaseNotes.rst, clang/lib/AST ItaniumMangle.cpp

[Clang] Fix Itanium mangling crash for local lambda in ctor/dtor (#181068)

Fixes #176395 

Note: I need someone to help me merge this PR, since I don't have commit
access.
DeltaFile
+74-39clang/lib/AST/ItaniumMangle.cpp
+33-0clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
+1-0clang/docs/ReleaseNotes.rst
+108-393 files

LLVM/project 728de5cllvm/lib/Target/AArch64 AArch64SVEInstrInfo.td, llvm/test/CodeGen/AArch64 sve-streaming-mode-fixed-length-fp-compares.ll sve-hadd.ll

[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)

This relies on the identity NOT (x) = -1 - x, which can be lowered as
byte SUBR (x, 255). The recently added pseudos for SUBR (immediate)
should avoid cases where we would risk emitting a MOV.
DeltaFile
+25-30llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-compares.ll
+18-34llvm/test/CodeGen/AArch64/sve-hadd.ll
+5-10llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll
+3-6llvm/test/CodeGen/AArch64/sve-int-log.ll
+2-5llvm/test/CodeGen/AArch64/sve2-bsl.ll
+4-0llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+57-856 files

LLVM/project 3ac5c07llvm/include/llvm/IR CallingConv.h, llvm/test/Bitcode calling-conventions.3.2.ll calling-conventions.3.2.ll.bc

[NVPTX] Do not permit calls to ptx_kernel CC (#190434)

Summary:
Removes support for calling the ptx_kernel CC. Regenerate bitcode that
used it, no auto upgrade because this never worked, it just wasn't
diagnosed.
DeltaFile
+48-0llvm/test/Verifier/call-to-non-callable-functions.ll
+0-6llvm/test/Bitcode/calling-conventions.3.2.ll
+1-0llvm/include/llvm/IR/CallingConv.h
+0-0llvm/test/Bitcode/calling-conventions.3.2.ll.bc
+49-64 files

LLVM/project 9e8ea56lldb/test/API/functionalities/scripted_frame_provider/thread_filter main.cpp

[lldb] Fix flaky test TestFrameProviderThreadFilter on Windows (#191133)

This is the update for #191046.
DeltaFile
+8-2lldb/test/API/functionalities/scripted_frame_provider/thread_filter/main.cpp
+8-21 files

LLVM/project b59912cllvm/include/llvm/Transforms/Scalar NaryReassociate.h, llvm/lib/Transforms/Scalar NaryReassociate.cpp

review: address suggestion
DeltaFile
+8-6llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+1-1llvm/include/llvm/Transforms/Scalar/NaryReassociate.h
+9-72 files

LLVM/project 8341e62llvm/lib/Target/AMDGPU SIMachineFunctionInfo.cpp

[NFC][AMDGPU] Fix a compiler warning caused by a small typo (#191107)
DeltaFile
+2-2llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+2-21 files

LLVM/project d8dc619llvm/test/Transforms/LoopVectorize find-last-iv-sinkable-expr.ll

[VPlan] Test tail folding with find-last-iv-sinkable-expr.ll tests. NFC (#191176)

I believe these are being miscompiled after #183911 since we're no
longer using the original select on the header mask added in
addReductionResultComputation

This is additional test coverage for #191166
DeltaFile
+1,352-731llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
+1,352-7311 files

LLVM/project 0ab4d85clang/lib/Lex PPDirectives.cpp

[clang][Lex] don't run -Wnonportable-include-path-separator if disabled (#191148)

The diagnostic's addition caused a perf regression:
https://llvm-compile-time-tracker.com/compare.php?from=b9149823d85891044bf34e8654d1a45870e55174&to=e2294efaabcc745bf6beacbefbd371595cf3e87f&stat=instructions:u

So, only run its logic if it's actually enabled:

https://llvm-compile-time-tracker.com/compare.php?from=e2294efaabcc745bf6beacbefbd371595cf3e87f&to=52bd4e1441b75b617cf81dfffcb149966616a34a&stat=instructions:u
DeltaFile
+3-0clang/lib/Lex/PPDirectives.cpp
+3-01 files

LLVM/project acc07d5libsycl/src/detail event_impl.hpp

add file comment to event_impl

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+6-0libsycl/src/detail/event_impl.hpp
+6-01 files

LLVM/project 4cf672dlibsycl/include/sycl/__impl event.hpp queue.hpp, libsycl/src/detail queue_impl.cpp event_impl.cpp

fix comments

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+1-5libsycl/include/sycl/__impl/event.hpp
+1-3libsycl/include/sycl/__impl/queue.hpp
+1-1libsycl/src/detail/queue_impl.cpp
+1-1libsycl/src/detail/event_impl.cpp
+4-104 files

LLVM/project bbf31adclang/docs ReleaseNotes.rst, clang/lib/Sema SemaTemplate.cpp

[Clang] Do not try to create invalid variable specializations. (#190960)

When a variable specialization is ambiguous,
we would still create a node for it.

If the first such specialization takes places in a sfinae context, ie
when appearing in a concept, the initial diagnostic was silence, but no
further errors were emitted on that specialization as the variable was
created anyway.

Instead we do not create a specialization in this case.

Fixes #132592
DeltaFile
+37-19clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
+9-11clang/lib/Sema/SemaTemplate.cpp
+1-0clang/docs/ReleaseNotes.rst
+47-303 files

LLVM/project 537f29ellvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sme-disable-gisel-fisel.ll

[AArch64] Fix broken SME code with GlobalISel (#191140)

The checks introduced in #190135 are too restrictive because no SVE or
SME is required to compile streaming-compatible or agnostic-ZA
functions. Now it generates incorrect code for
streaming-compatible/agnostic-ZA functions when the function has no
`+sve` or `+sme`.
DeltaFile
+25-22llvm/test/CodeGen/AArch64/sme-disable-gisel-fisel.ll
+4-1llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+29-232 files

LLVM/project 7fbd3f8clang/lib/Headers/hlsl hlsl_alias_intrinsics.h, llvm/test/tools/llvm-mca/RISCV/SiFiveX390 vector-fp.s

Merge branch 'main' into users/KseniyaTikhomirova/event_wait_1
DeltaFile
+0-4,851llvm/test/tools/llvm-mca/RISCV/SiFiveX390/vector-fp.s
+4,526-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/arithmetic.test
+4-3,871clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
+3,706-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/fp.test
+3,126-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/vlseg-vsseg.test
+2,878-0llvm/test/tools/llvm-mca/RISCV/SiFiveX390/rvv/bitwise.test
+14,240-8,7221,676 files not shown
+97,826-43,1081,682 files

LLVM/project 4b9b52ellvm/include/llvm/Transforms/Scalar NaryReassociate.h

Update llvm/include/llvm/Transforms/Scalar/NaryReassociate.h

Co-authored-by: Jay Foad <jay.foad at amd.com>
DeltaFile
+1-1llvm/include/llvm/Transforms/Scalar/NaryReassociate.h
+1-11 files

LLVM/project 3c7c6fblibsycl/include/sycl/__impl aspect.hpp, libsycl/src/detail program_manager.hpp program_manager.cpp

[libsycl] Fix comments and align names & types (#190781)

follow-up for https://github.com/llvm/llvm-project/pull/187528

---------

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+17-11libsycl/src/detail/program_manager.hpp
+15-11libsycl/src/detail/program_manager.cpp
+7-3libsycl/src/detail/device_binary_structures.hpp
+9-1libsycl/src/detail/platform_impl.hpp
+7-1libsycl/src/detail/device_impl.hpp
+6-0libsycl/include/sycl/__impl/aspect.hpp
+61-2712 files not shown
+120-2918 files

LLVM/project 3b5b8ecllvm/test/CodeGen/SPIRV llc-pipeline.ll, llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine prelegalizercombiner-length-to-distance.mir prelegalizercombiner-select-to-faceforward.mir

[NFC][SPIR-V] Remove unnecessary 'REQUIRES: asserts' from tests (#190986)

Remove `REQUIRES: asserts` from tests that don't use any assertions-only
functionality and should run for all build configurations
DeltaFile
+0-2llvm/test/CodeGen/SPIRV/llc-pipeline.ll
+0-2llvm/test/CodeGen/SPIRV/opencl/device_execution/execute_block.ll
+0-1llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-length-to-distance.mir
+0-1llvm/test/CodeGen/SPIRV/GlobalISel/InstCombine/prelegalizercombiner-select-to-faceforward.mir
+0-64 files

LLVM/project 8cc24d3llvm/lib/Transforms/Scalar NaryReassociate.cpp

review: address suggestions
DeltaFile
+16-15llvm/lib/Transforms/Scalar/NaryReassociate.cpp
+16-151 files

LLVM/project 5185fb3llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/RISCV combine-is_fpclass.ll

[DAG] computeKnownFPClass - add ISD::FNEG handling + test coverage (#190325)

Fixes #189483 

- Implement computeKnownFPClass for ISD::FNEG in SelectionDAG.cpp
- Add tests for RISC-V in llvm/test/CodeGen/RISCV/known-fpclass-fneg.ll
DeltaFile
+40-0llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
+6-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+46-02 files

LLVM/project 42166b6llvm/test/Transforms/LoopVectorize epilog-vectorization-reductions.ll epilog-iv-select-cmp.ll, llvm/test/Transforms/LoopVectorize/AArch64 check-prof-info.ll epilog-vectorization-widen-inductions.ll

[LV] Update forced epilogue VF options to allow different VFs than main. (#190393)

Previously, forced epilogue vector factors via the command line options
required to match the forced main VF (or the VF to be built in general).
This leads to a number of akward tests, where we end up with dead
epilogue vector loops.

Update the logic to build an additional VPlan with the epilogue vector
factor, and require the provided epilogue VF to be < IC * MainLoopVF.
Otherwise, epilogue vectorization is skipped.

This only impacts the forced epilogue VF option used for testing and
ensures epilogue tests to cover more realistic scenarios and make them
more robust w.r.t. to additional VPlan-based folding.

PR: https://github.com/llvm/llvm-project/pull/190393
DeltaFile
+173-175llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
+97-97llvm/test/Transforms/LoopVectorize/AArch64/check-prof-info.ll
+97-81llvm/test/Transforms/LoopVectorize/epilog-iv-select-cmp.ll
+76-68llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
+70-57llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
+57-57llvm/test/Transforms/LoopVectorize/select-min-max-last-index-epilogue.ll
+570-53510 files not shown
+785-63916 files

LLVM/project 93c349bllvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp, llvm/test/CodeGen/RISCV known-fpclass.ll

[DAG] computeKnownFPClass - Add handling for AssertNoFPClass (#190185)

Resolves #189478

Adds code to handle AssertNoFPClass in computeKnownFPClass and adds IR
test coverage for RISC-V.
DeltaFile
+72-0llvm/test/CodeGen/RISCV/known-fpclass.ll
+8-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+80-02 files

LLVM/project 87dda6aclang/docs ReleaseNotes.rst, clang/lib/Sema SemaTemplateInstantiateDecl.cpp

[Clang] Do not create a NoSFINAETrap for variable specialization. (#191000)

There is no thing in the standard that says this should happen outside
of the immediate context.

Fixes #54439
DeltaFile
+26-0clang/test/SemaCXX/cxx1y-variable-templates_top_level.cpp
+0-1clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+1-0clang/docs/ReleaseNotes.rst
+27-13 files

LLVM/project ebc5607llvm/docs AMDGPUUsage.rst, llvm/lib/Target/AMDGPU SIMemoryLegalizer.cpp AMDGPULowerIntrinsics.cpp

[AMDGPU] Use wavefront scope for single-wave workgroup synchronization (#187673)

Workgroup-scoped fences and non-relaxed workgroup atomics were
previously legalized with synchronization strong enough for multi-wave
workgroups.
When the kernel's maximum flat work-group size does not exceed the
wavefront size, the workgroup contains only a single wavefront, so
workgroup-scoped synchronization is equivalent to wavefront scope and
the stronger legalization is unnecessary.
SIMemoryLegalizer now demotes workgroup scope to wavefront scope
in this case for workgroup-scoped fences and for non-relaxed atomic
load, store, atomicrmw, and cmpxchg operations.
This allows subsequent legalization to operate at wavefront scope.
The decision is based on AMDGPUSubtarget::isSingleWavefrontWorkgroup.

---------

Co-authored-by: Barbara Mitic <Barbara.Mitic at amd.com>
DeltaFile
+2,759-0llvm/test/CodeGen/AMDGPU/memory-legalizer-single-wave-workgroup-memops.ll
+176-496llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
+80-104llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
+28-7llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
+12-0llvm/docs/AMDGPUUsage.rst
+2-4llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
+3,057-6112 files not shown
+3,065-6118 files

LLVM/project 9cf8152llvm/include/llvm/Transforms/Vectorize SLPVectorizer.h, llvm/lib/Transforms/Vectorize SLPVectorizer.cpp

Revert "[SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls" (#191153)

Reverts llvm/llvm-project#189784
DeltaFile
+169-133llvm/test/Transforms/SLPVectorizer/AMDGPU/notriviallyvectorizableintrinsicoperands.ll
+6-137llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+4-3llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
+0-5llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
+179-2784 files

LLVM/project 629bd87llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp, llvm/unittests/Frontend OpenMPIRBuilderTest.cpp

[OMPIRBuilder] Move debug records to correct blocks. (#157125)

Consider the following small OpenMP target region:

```
!$omp target map(tofrom: x)
  x = x + 1
!$omp end target

```
Currently, when compiled with `flang`, it will generate an outlined
function like below (with irrelevant bits removed).

```
void @__omp_offloading_10303_14e8afc__QQmain_l13(ptr %0, ptr %1) { entry:
  %2 = alloca ptr, align 8, addrspace(5)
  %3 = addrspacecast ptr addrspace(5) %2 to ptr
...
  br i1 %exec_user_code, label %user_code.entry, label %worker.exit

    [36 lines not shown]
DeltaFile
+151-0llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
+47-0mlir/test/Target/LLVMIR/omptarget-debug-record-pos.mlir
+28-1llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+5-5mlir/test/Target/LLVMIR/omptarget-debug-var-1.mlir
+231-64 files

LLVM/project 8506466clang/lib/StaticAnalyzer/Checkers CStringChecker.cpp, clang/test/Analysis bstring.c bstring.cpp

[analyzer] Fix crash in CStringChecker on zero-size element types (#191061)

Move the null check of Offset before its dereference in checkInit. When
the element type has zero size (e.g., an empty struct in C), the
division returns an empty optional, which was dereferenced
unconditionally.

Fixes #190457
DeltaFile
+14-0clang/test/Analysis/bstring.c
+9-0clang/test/Analysis/bstring.cpp
+3-3clang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
+26-33 files

LLVM/project b78da18clang/test/Analysis/Scalable extraction-works-alongside-compilation.cpp

[clang][ssaf][test] Fix the extraction-works-alongside-compilation.cpp test (#191162)

I forgot that we need this `REQUIRES: asserts` for the test.

Fixes build bots not setting `LLVM_ENABLE_ASSERTIONS=ON`.
For example:
https://lab.llvm.org/buildbot/#/builders/11/builds/37623

This fixes up #191058
DeltaFile
+1-0clang/test/Analysis/Scalable/extraction-works-alongside-compilation.cpp
+1-01 files

LLVM/project 9456cedllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[LV] NFCI: Create VPExpressions in transformToPartialReductions.

With this change, all logic to generate partial reductions and
recognising them as VPExpressions is contained in
`transformToPartialReductions`, without the need for a second
transform pass.
The PR intends to be a non-functional change.
DeltaFile
+57-18llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+57-181 files

LLVM/project 18d5b9ellvm/lib/Transforms/Vectorize VPlanTransforms.cpp

[LV] Simplify costing partial reduction chain links (NFCI) (#190980)

Previously, `getPartialReductionLinkCost()` needed to figure out what
case `matchExtendedReductionOperand()` matched to compute a cost. This
made adding new cases to `matchExtendedReductionOperand()` more complex
and added some redundancy.

This patch updates `ExtendedReductionOperand` so that it contains all
the information needed to compute the cost ready to pass to
`getPartialReductionCost()`. This means matching new operand forms only
needs to be done in `matchExtendedReductionOperand()`.

This is split off from #188043 (this change simplifies matching absolute
difference operands).
DeltaFile
+60-67llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+60-671 files