LLVM/project 06e692c — lldb/source/Core Module.cpp, lldb/test/API/functionalities/gdb_remote_client TestWasm.py

[lldb] Unload Wasm modules the stub no longer reports (#227814)

When a Wasm engine such as JavaScriptCore reloads a page, the modules it
ran go away and new instances take their place. LLDB kept two kinds of
stale module around.

ProcessGDBRemote::LoadModules never unloads the target's executable,
which no library list includes. A Wasm target has no executable, so
Target::GetExecutableModule falls back to the first module, and the
first module the stub ever reported stayed in the image list for good.
Let the dynamic loader say whether the process runs a main executable,
and have the Wasm loader say it does not.

A module reloaded under the same name matched the module read from
memory at its old address, and LLDB then moved that module to the new
one. That trips an assertion in ObjectFileWasm::SetLoadAddress, and
otherwise leaves a module whose image came from an instance that is
gone. A module read from memory now only matches a spec at the address
it was read from, like ModuleSpec::Matches already does for two specs.

rdar://175013476
DeltaFile
+94-0lldb/test/API/functionalities/gdb_remote_client/TestWasm.py
+5-0lldb/source/Core/Module.cpp
+99-02 files

LLVM/project 3c50f79 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp

fixup! Use plain getOpcode
DeltaFile
+1-2llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1-21 files

LLVM/project c48231b — clang/lib/Analysis/FlowSensitive/Models CMakeLists.txt GtestModelHelpers.h

[FlowSensitive] add handling for AssertionResultExpectation

In a follow up, this will be used by the StatusOr and Optional models.

Assisted-By: Gemini
DeltaFile
+45-0clang/lib/Analysis/FlowSensitive/Models/GtestModelHelpers.cpp
+19-0clang/lib/Analysis/FlowSensitive/Models/GtestModelHelpers.h
+2-0clang/lib/Analysis/FlowSensitive/Models/CMakeLists.txt
+66-03 files

LLVM/project 6e7f597 — clang/lib/Analysis/FlowSensitive/Models UncheckedStatusOrAccessModel.cpp UncheckedOptionalAccessModel.cpp, clang/unittests/Analysis/FlowSensitive MockHeaders.cpp

[FlowSensitive] [Optional] [StatusOr] handle AssertionResultExpectation

Assisted-By: Gemini
DeltaFile
+14-4clang/unittests/Analysis/FlowSensitive/MockHeaders.cpp
+9-0clang/lib/Analysis/FlowSensitive/Models/UncheckedStatusOrAccessModel.cpp
+9-0clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
+32-43 files

LLVM/project d615ec8 — llvm/include/llvm/Support KnownFPClass.h, llvm/lib/Support KnownFPClass.cpp

[KnownFPClass] Fix input/output subnormal handling for `propagateXorSign` (#219837)
DeltaFile
+215-13llvm/test/Transforms/Attributor/nofpclass-fmul.ll
+209-10llvm/test/Transforms/Attributor/nofpclass-fdiv.ll
+13-5llvm/include/llvm/Support/KnownFPClass.h
+2-2llvm/lib/Support/KnownFPClass.cpp
+439-304 files

LLVM/project 520d1b4 — llvm/lib/Target/AMDGPU GCNHazardRecognizer.cpp, llvm/test/CodeGen/AMDGPU wmma-coexecution-valu-hazards.mir

[AMDGPU] Fix missed WMMA C-operand co-exec hazard

The gfx1250 WMMA co-execution hazard check treats only A, B and the
SWMMAC index as registers the in-flight MMA still reads. C (src2 of a
non-SWMMAC WMMA) is missing, so a VALU scheduled into the MMA's shadow
can clobber C and the MMA consumes the new value.

This is latent while C is tied to vdst, since the existing D check then
covers it. It miscompiles where the tie does not hold: for
v_wmma_bf16f32_16x16x32_bf16, whose D is narrower than C, and for the
_threeaddr form of any WMMA.
DeltaFile
+171-2llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
+3-4llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+174-62 files

LLVM/project f4157b5 — clang/lib/Analysis/FlowSensitive/Models CMakeLists.txt GtestModelHelpers.h

[FlowSensitive] add handling for AssertionResultExpectation

In a follow up, this will be used by the StatusOr and Optional models.

Assisted-By: Gemini
DeltaFile
+45-0clang/lib/Analysis/FlowSensitive/Models/GtestModelHelpers.cpp
+19-0clang/lib/Analysis/FlowSensitive/Models/GtestModelHelpers.h
+2-0clang/lib/Analysis/FlowSensitive/Models/CMakeLists.txt
+66-03 files

LLVM/project 6e912f5 — mlir/docs ReleaseNotes.md, mlir/include/mlir/Dialect/GPU/Pipelines Passes.h

Review feedback
DeltaFile
+6-3mlir/docs/ReleaseNotes.md
+4-4mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
+10-72 files

LLVM/project 179a0cc — compiler-rt/test/lsan/TestCases/Linux detached_thread_dlsym.c

[NFC][lsan] Disable HWASan on key_destructor in detached_thread_dlsym.c (#229266)

Test-only change fixing the test added in
https://github.com/llvm/llvm-project/pull/228930.

In `detached_thread_dlsym.c`, `key_destructor` intentionally runs on the
final (`PTHREAD_DESTRUCTOR_ITERATIONS`) TSD destruction pass after
`HwasanTSDDtor` has called `Thread::Destroy()` and zeroed
`__hwasan_tls`.

Mark `key_destructor` with `__attribute__((no_sanitize("hwaddress")))`.

Fixes https://lab.llvm.org/buildbot/#/builders/51/builds/45276.

Assisted-by: Gemini
DeltaFile
+4-1compiler-rt/test/lsan/TestCases/Linux/detached_thread_dlsym.c
+4-11 files

LLVM/project d5d9d9d — flang/lib/Optimizer/OpenACC/Support FIROpenACCTypeInterfaces.cpp, flang/test/Fir/OpenACC recipe-populate-private.mlir recipe-populate-firstprivate.mlir

[flang][acc] Preserve association status of privatized pointers (#228581)

Privatization allocated a target and copied it even when a Fortran
pointer or allocatable was unassociated or unallocated. That reads
through a null address. The private allocation now follows the original
association status. A reduction stores its initial value only when that
storage exists. The target is copied only when one exists.

Before:
```
%private = fir.allocmem f32
// Box %private into the private descriptor.
hlfir.assign %src to %private temporary_lhs : f32, !fir.heap<f32>
```

After:
```
%private = fir.if %is_associated -> !fir.heap<f32> {
  %allocation = fir.allocmem f32

    [9 lines not shown]
DeltaFile
+93-39flang/test/Lower/OpenACC/acc-reduction.f90
+82-19flang/lib/Optimizer/OpenACC/Support/FIROpenACCTypeInterfaces.cpp
+98-0flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
+52-14flang/test/Lower/OpenACC/acc-private.f90
+41-17flang/test/Fir/OpenACC/recipe-populate-private.mlir
+366-895 files

LLVM/project fc036d8 — llvm/include/llvm/Analysis TargetTransformInfoImpl.h TargetTransformInfo.h, llvm/lib/Target/X86 X86TargetTransformInfo.h X86TargetTransformInfo.cpp

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+64-80llvm/test/Transforms/SLPVectorizer/X86/fused-alt-fmul.ll
+37-16llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+46-7llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+12-5llvm/include/llvm/Analysis/TargetTransformInfo.h
+7-5llvm/lib/Target/X86/X86TargetTransformInfo.h
+7-5llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+173-1181 files not shown
+179-1237 files

LLVM/project 0ec50e1 — clang/lib/CIR/CodeGen CIRGenFunction.h CIRGenStmtOpenMP.cpp, clang/test/CIR/CodeGenOpenMP target-parallel-for.c

[CIR][OpenMP] Add support for host_eval so that SPMD kernels can be used

This patch adds support for host_eval so that SPMD kernels and in the future
num_threads etc. can be implemented correctly.

Assisted-by: Cursor / Claude Sonnet 5 High
DeltaFile
+199-27clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
+33-29clang/test/CIR/CodeGenOpenMP/target-parallel-for.c
+10-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+242-563 files

LLVM/project d4a1007 — mlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp, mlir/lib/Conversion/GPUToROCDL LowerGpuOpsToROCDLOps.cpp

[mlir] Migrate AMDGPU/ROCDL to targets, not chipset versions

**migration tl;dr:** Replace usages of `amdgpu::Chipset` with `ROCDL::TargetInfo`, ideally move from `chipset=` to `arch=`. If you don't use upstream pipelines, call 'TargetInfo::migrateArchFeaturesToModuleFlags` at the appropriate location.

Further note: if you've got a build pipeline that's getting a `gfxXXX` name from something like `rocm_agent_enumerator`, using a full triple name like the ones you get from `rocminfo` is preferred.

`amdgpu::Chipset` was an awkward hack that was hard to keep up to date
with changes in the compiler/new architectures, and didn't properly
support generic targets (and has been strongly disfavored by the
compiler team).

This PR replaces `amdgpu::Chipset` with `ROCDL::TargetInfo`, a
structure that uses LLVM's TargetParser and the underlying LLVM
features tables to get the real nature of the target being compiled
for.

This also helps MLIR move to
new-style (`-mtriple=amdgpuX.YZ-amd-amdhsa`) over "old
style" (`-mtriple=amdgcn-amd-amdhsa -mcpu=gfxXYZ`) triples.

    [36 lines not shown]
DeltaFile
+316-323mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+105-0mlir/test/Dialect/LLVMIR/rocdl-attach-target-arch.mlir
+87-4mlir/lib/Dialect/GPU/Transforms/ROCDLAttachTarget.cpp
+46-40mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
+49-24mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir
+30-30mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+633-421103 files not shown
+1,179-718109 files

LLVM/project f213f7c — mlir/docs ReleaseNotes.md, mlir/include/mlir/Conversion Passes.td

Review feedback and typo fixes
DeltaFile
+22-7mlir/include/mlir/Conversion/Passes.td
+9-8mlir/docs/ReleaseNotes.md
+4-5mlir/unittests/Dialect/AMDGPU/AMDGPUUtilsTest.cpp
+6-1mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
+1-2mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
+1-2mlir/lib/Conversion/ArithToAMDGPU/ArithToAMDGPU.cpp
+43-251 files not shown
+44-277 files

LLVM/project a33341a — lldb/include/lldb/Symbol UnwindPlan.h, lldb/source/Plugins/UnwindAssembly/x86 x86AssemblyInspectionEngine.cpp

[lldb] Remove ConstString from UnwindPlan (#227914)
DeltaFile
+8-8lldb/source/Symbol/UnwindPlan.cpp
+3-4lldb/include/lldb/Symbol/UnwindPlan.h
+1-1lldb/source/Target/RegisterContextUnwind.cpp
+1-1lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
+13-144 files

LLVM/project f11d83b — lldb/include/lldb/Core ModuleSpec.h, lldb/include/lldb/Target PathMappingList.h

[lldb] Remove ConstString from PathMappingList (#227896)
DeltaFile
+20-31lldb/unittests/Target/PathMappingListTest.cpp
+22-24lldb/source/Target/PathMappingList.cpp
+6-7lldb/include/lldb/Target/PathMappingList.h
+5-5lldb/source/Commands/CommandObjectTarget.cpp
+2-3lldb/source/Target/Target.cpp
+1-0lldb/include/lldb/Core/ModuleSpec.h
+56-706 files

LLVM/project 7481a9d — compiler-rt/test/lsan/TestCases/Linux detached_thread_dlsym.c

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-1compiler-rt/test/lsan/TestCases/Linux/detached_thread_dlsym.c
+4-11 files

LLVM/project 5451bff — llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/RISCV can-split-reduction.ll

[SLP] Clear VectorizableTree in before calling canBuildSplitNode() from tryToReduce() (#220014)

The tree may be left-over from the prior vectorization attempt in this case which can affect the decision.
DeltaFile
+8-6llvm/test/Transforms/SLPVectorizer/RISCV/can-split-reduction.ll
+3-0llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+11-62 files

LLVM/project 2d833f2 — lldb/source/Plugins/ObjectContainer/BSD-Archive ObjectContainerBSDArchive.h ObjectContainerBSDArchive.cpp

[lldb] Remove ConstString from ObjectContainerBSDArchive (#226604)
DeltaFile
+20-29lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.cpp
+4-4lldb/source/Plugins/ObjectContainer/BSD-Archive/ObjectContainerBSDArchive.h
+24-332 files

LLVM/project 6607cce — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 interleaved-accesses.ll

[DAG] Add basic deinterleave/interleave(poison) -> poison combines. (#228858)

This mirrors the existing combine currently performed for shuffles,
converting a deinterleave or interleave with all undef inputs to a undef
output.

The st3 combine currently sometimes overeagerly triggers first.
DeltaFile
+45-0llvm/test/CodeGen/AArch64/interleaved-accesses.ll
+23-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+6-16llvm/test/CodeGen/RISCV/rvv/pr141907.ll
+74-163 files

LLVM/project 8d2ff45 — clang/lib/CIR/CodeGen CIRGenFunction.h CIRGenStmtOpenMP.cpp, clang/test/CIR/CodeGenOpenMP target-parallel-for.c

[CIR][OpenMP] Add support for host_eval so that SPMD kernels can be used

This patch adds support for host_eval so that SPMD kernels and in the future
num_threads etc. can be implemented correctly.

Assisted-by: Cursor / Claude Sonnet 5 High
DeltaFile
+199-27clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
+33-29clang/test/CIR/CodeGenOpenMP/target-parallel-for.c
+10-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+242-563 files

LLVM/project 7b40ce8 — llvm/test/Transforms/SLPVectorizer/X86 fused-alt-fmul.ll

[SLP][NFC]Add a test with missed addsub optimizations, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/229261
DeltaFile
+279-0llvm/test/Transforms/SLPVectorizer/X86/fused-alt-fmul.ll
+279-01 files

LLVM/project b884123 — llvm/test/Transforms/SLPVectorizer/X86 fused-alt-fmul.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+279-0llvm/test/Transforms/SLPVectorizer/X86/fused-alt-fmul.ll
+279-01 files

LLVM/project a0a2866 — llvm/lib/CodeGen MachineBasicBlock.cpp, llvm/lib/CodeGen/MIRParser MILexer.h MILexer.cpp

MIR: Serialize MachineBasicBlock::IsEHContTarget (#227196)

Co-Authored-By: Claude Sonnet 5 <noreply at anthropic.com>
DeltaFile
+16-0llvm/test/CodeGen/MIR/Generic/machine-basic-block-ehcont-target.mir
+6-0llvm/lib/CodeGen/MIRParser/MIParser.cpp
+5-0llvm/lib/CodeGen/MachineBasicBlock.cpp
+1-0llvm/lib/CodeGen/MIRParser/MILexer.h
+1-0llvm/lib/CodeGen/MIRParser/MILexer.cpp
+29-05 files

LLVM/project 546e4f9 — clang/lib/CIR/Dialect/Transforms RecordTypeConverter.h RecordTypeConverter.cpp, clang/test/CIR/CodeGenOpenCL record-address-space.cl

[CIR] Lower language address spaces nested in record members (#228934)

TargetLowering now derives from RecordRewritingTypeConverter, so it
rebuilds records whose members reach a language address space and keeps
the rest. This fixes "member type mismatch" for OpenCL and SYCL records
with address-space qualified pointer members.
DeltaFile
+82-80clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
+77-0clang/test/CIR/CodeGenOpenCL/record-address-space.cl
+50-0clang/lib/CIR/Dialect/Transforms/RecordTypeConverter.cpp
+34-0clang/test/CIR/CodeGenSYCL/record-address-space.cpp
+15-0clang/lib/CIR/Dialect/Transforms/RecordTypeConverter.h
+258-805 files

LLVM/project 8374529 — llvm/lib/Target/AMDGPU SIInstructions.td, llvm/test/CodeGen/AMDGPU fcopysign.f16.ll fcopysign.bf16.ll

[AMDGPU] Split the true16 fcopysign pattern by uniformity (#226898)

A uniform 16-bit value already lives in the low half of an SGPR, so it can go straight to V_BFI_B32_e64. Only a divergent VGPR_16 operand needs the widening REG_SEQUENCE, which was ill-formed for the uniform case (operand wider than the lo16 slot it names) and confused DetectDeadLanes.

Fixes: ROCM-31212
DeltaFile
+1,609-1,040llvm/test/CodeGen/AMDGPU/frem.ll
+69-0llvm/test/CodeGen/AMDGPU/true16-uniform-f16-phi-copysign.ll
+29-24llvm/test/CodeGen/AMDGPU/llvm.round.ll
+19-27llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
+13-13llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
+9-3llvm/lib/Target/AMDGPU/SIInstructions.td
+1,748-1,1076 files

LLVM/project f97b083 — clang/lib/CIR/Dialect/IR CIRDialect.cpp, clang/test/CIR/Transforms sccp-external-call.cir

[CIR][SSCP] Return null callable region for function declarations (#228641)

Declarations and aliases have empty bodies; returning them made SCCP
treat external calls as never returning and fold their results to
constants.
DeltaFile
+26-0clang/test/CIR/Transforms/sccp-external-call.cir
+5-2clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+31-22 files

LLVM/project 8df22c7 — lldb/source/Symbol Symtab.cpp Symbol.cpp, lldb/test/API/functionalities/module_cache/reexport-symbols main.c Makefile

[lldb] For Mach-O re-export symbols, save target binary FileSpec (#228266)

Mach-O re-export symbols specify the name of the target function to call
AND the binary name to find it in. I didn't correctly save the binary
name in the DataFileCache representation. This change does that, and
adds a new test (only runs on Darwin) which does a `target modules dump
symtab` on a system dylib that has many re-export symbols, then creates
a DataFileCache of that binary, loads a new target using the DFC and
re-executes `target modules dump symtab`, and checks that the output is
identical between them.

rdar://187739510
DeltaFile
+87-0lldb/test/API/functionalities/module_cache/reexport-symbols/TestReexportSymbolsDataFileCache.py
+12-9lldb/source/Symbol/Symbol.cpp
+4-1lldb/unittests/Symbol/SymtabTest.cpp
+4-0lldb/test/API/functionalities/module_cache/reexport-symbols/Makefile
+3-0lldb/test/API/functionalities/module_cache/reexport-symbols/main.c
+1-1lldb/source/Symbol/Symtab.cpp
+111-116 files

LLVM/project 75549ee — clang/test/CodeGenCXX auto-var-init-max-size.cpp

[clang] Precommit test for auto-init of small struct fields (#229225)

Currently when using the -ftrivial-auto-var-init-max-size flag, record
types are either fully initialized if they are smaller than the max
size, or left fully uninitialized even if they have individual fields
smaller than the max size. This change extends existing tests for
auto-init max size to cover the case where a struct contains a struct
containing a small field, in preparation for changes to automatically
initialize small fields inside structs.
DeltaFile
+15-10clang/test/CodeGenCXX/auto-var-init-max-size.cpp
+15-101 files

LLVM/project e3661a2 — clang/lib/CIR/CodeGen CIRGenFunction.h CIRGenStmtOpenMP.cpp, clang/test/CIR/CodeGenOpenMP target-parallel-for.c

[CIR][OpenMP] Add support for host_eval so that SPMD kernels can be used

This patch adds support for host_eval so that SPMD kernels and in the future
num_threads etc. can be implemented correctly.

Assisted-by: Cursor / Claude Sonnet 5 High
DeltaFile
+200-27clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
+33-29clang/test/CIR/CodeGenOpenMP/target-parallel-for.c
+10-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+243-563 files