LLVM/project c3e612ellvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

feedback

Created using spr 1.3.7
DeltaFile
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+6,993-6,921llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
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+216,579-146,6172,101 files

LLVM/project 97581e4llvm/test/CodeGen/AMDGPU llvm.amdgcn.permlane.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-global.mir legalize-load-local.mir

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.7

[skip ci]
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+9,398-9,218llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+6,993-6,921llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
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LLVM/project 155689amlir/lib/Conversion/SPIRVToLLVM SPIRVToLLVM.cpp, mlir/test/Conversion/SPIRVToLLVM control-flow-ops-to-llvm.mlir

[mlir][SPIRV] Add SPIRVToLLVM conversion for selection with yielding values (#210600)

The current SPIRVToLLVM conversion for SelectionOp does not handle merge
blocks with yielding values. This change implements that by adding
arguments to the continue block in the SelectionPattern.

Closes #204714
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+8-0mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+67-02 files

LLVM/project 02c51adlibcxx/test/benchmarks/algorithms lexicographical_compare_three_way.bench.cpp

[libc++] Remove redundant benchmarks for lexicographical_compare_three_way (#210268)

We already test the `_slow_path` and `_fast_path` functions through the
generic `BM_lexicographical_compare_three_way`. We don't need to
benchmark them again.
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+0-44libcxx/test/benchmarks/algorithms/lexicographical_compare_three_way.bench.cpp
+0-441 files

LLVM/project 8ad500f.github/workflows release-documentation.yml

workflows/release-documentation: Add missing checkout (#211082)

We need to checkout the upload-release-artifact composite action before
using it.
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+7-0.github/workflows/release-documentation.yml
+7-01 files

LLVM/project 3a1f2e1lldb/test/API/functionalities/builtin-debugtrap TestBuiltinDebugTrap.py, lldb/test/API/functionalities/thread/state TestThreadStates.py

[lldb][test] Skip stop-reason tests unsupported on WebAssembly (#211266)

TestThreadStates::test_process_state expects a signal stop reason after
"process interrupt", but the trap from the single step used to step off
the breakpoint is reported as a trace stop. It is already skipped on
Linux and Darwin for the same reason.

TestBuiltinDebugTrap expects to continue past __builtin_debugtrap, but
on WebAssembly that lowers to the unreachable instruction, a fatal trap
that cannot be resumed.
DeltaFile
+3-0lldb/test/API/functionalities/builtin-debugtrap/TestBuiltinDebugTrap.py
+1-0lldb/test/API/functionalities/thread/state/TestThreadStates.py
+4-02 files

LLVM/project 165c472libcxx/include/__vector layout.h vector.h, libcxx/test/libcxx/containers/sequences/vector incomplete_type.compile.pass.cpp

[libc++] Don't require complete types in vector<T>::empty() (#210754)

This was previously not required, but the patch to introduce a new
size-based vector layout unintentionally added this new requirement. We
almost certainly not want to promise this guarantee going forward, but
we should actually land this change explicitly and consider the
transition story, not do it as a fallout of another refactoring.

Fixes #210732

(cherry picked from commit 17ac8fdd95283110a14f1de8c15a0fc661119296)
DeltaFile
+27-0libcxx/test/libcxx/containers/sequences/vector/incomplete_type.compile.pass.cpp
+11-0libcxx/include/__vector/layout.h
+1-1libcxx/include/__vector/vector.h
+39-13 files

LLVM/project b2628f0flang/lib/Lower/Support ReductionProcessor.cpp, flang/test/Lower/OpenMP reduction-array-section.f90

[flang][Lower][OpenMP] Fix reduction on array sections aborting in lowering (#209701)

**Summary**

This regression was introduced by #196094, which added a special
lowering path for reductions on a single array element, such as `a(2)`.

The problem is that Flang also treated an array section like `a(2:96)`
as if it were a single element. Because of this, the section was sent to
a code path that only supports scalar elements.

That path produced an array type that the reduction initialization code
could not handle, so Flang reached a `TODO` and aborted with a “not yet
implemented” error.

**Fix**

The fix is to use the special element path only when the expression has
rank 0, which means it represents one single value. Array sections have

    [9 lines not shown]
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+5-1flang/lib/Lower/Support/ReductionProcessor.cpp
+44-12 files

LLVM/project ed059dallvm/lib/Target/RISCV RISCVZilsdOptimizer.cpp, llvm/test/CodeGen/RISCV zilsd-ldst-opt-prera.mir

[RISCV] Avoid forming Zilsd pairs with x0 for non-x0 register classes (#211019)

The pre-RA Zilsd optimizer allowed a pair when both stored values came
from the same virtual register if that virtual register was defined by a
copy from X0. This is only valid when the virtual register class can
actually contain X0.

Check the virtual register class before treating the value as `x0_pair`.
This prevents forming an invalid paired store for register classes such
as `GPRNoX0`.

Without this change we were hitting the following assertion in
`RISCVLoadStoreOptimizer`:

```
assert(
    FirstReg != SecondReg &&
    "First register and second register is impossible to be same register");
```

    [2 lines not shown]
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+42-0llvm/test/CodeGen/RISCV/zilsd-ldst-opt-prera.mir
+2-1llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
+44-12 files

LLVM/project 6c81062llvm/lib/Target/RISCV RISCVExpandPseudoInsts.cpp, llvm/test/CodeGen/RISCV short-forward-branch-opt-with-branch-with-immediates_32_uge.ll short-forward-branch-opt-with-branch-with-immediates_32_ult.ll

[RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (#210955)

`expandCCOpToCMov` was only accepting signed 5-bit immediates before
forming `Xqcicm` conditional-move pseudos. Valid `uimm5` operands for
unsigned compare forms such as `QC_MVGEUI` and `QC_MVLTUI` were not
being handled leading to a crash.

Track whether the selected conditional-move opcode expects a signed or
unsigned immediate, and validate the RHS against the matching range.

(cherry picked from commit 9bcb851e86941117ec9e82db8986ed301f929647)
DeltaFile
+20-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_uge.ll
+20-0llvm/test/CodeGen/RISCV/short-forward-branch-opt-with-branch-with-immediates_32_ult.ll
+8-1llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
+48-13 files

LLVM/project 75e6377mlir/lib/Conversion/MemRefToSPIRV MemRefToSPIRV.cpp, mlir/test/Conversion/MemRefToSPIRV memref-to-spirv.mlir

[mlir][SPIR-V] Lower memref.copy to spirv.CopyMemory (#206016)
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+85-0mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
+57-5mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
+142-52 files

LLVM/project 6f033fellvm/test/tools/llvm-readobj/ELF call-graph-info.test call-graph-info-warn-malformed.test, llvm/tools/llvm-readobj ELFDumper.cpp

[llvm-readobj] Print all callgraph sections (#198929)

Ensure that `llvm-readobj` / `llvm-readelf` processes and dumps all
SHT_LLVM_CALL_GRAPH sections present in an object file, rather
than just the first one.

**Motivation:**
Consider this `foo.s` file
```
.pushsection .text, "axG", %progbits, foo
  .globl foo
  foo:
  ret
  .pushsection .llvm.callgraph, "?", %llvm_call_graph
    .byte 0, 0
    .dc.a foo
    .quad 0
  .popsection
.popsection

    [19 lines not shown]
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+114-109llvm/tools/llvm-readobj/ELFDumper.cpp
+215-0llvm/test/tools/llvm-readobj/ELF/call-graph-info.test
+2-81llvm/test/tools/llvm-readobj/ELF/call-graph-info-warn-malformed.test
+331-1903 files

LLVM/project e23de94clang/lib/StaticAnalyzer/Checkers StdVariantChecker.cpp, clang/test/Analysis std-variant-checker.cpp

[analyzer] Fix StdVariantChecker crash on std::get with a non-ptr arg (#210167)

When `std::get` is called on a dereferenced integer-to-pointer cast, the
checker `alpha.core.StdVariant` crashes. Minimal reproducer:

```
std::get<int>(*(std::variant<int, char> *)11);
```

Godbolt reproducer - https://godbolt.org/z/4EKe1PrKb

The root cause is that `StdVariantChecker::handleStdGetCall()` calls
`SVal::getType()` on any non-unknown argument, then calls
`getPointeeType()` on the result while assuming it is a pointer type. In
the case of a concrete integer cast to a pointer and then dereferenced,
it is modeled as `loc::ConcreteInt`, whose recovered type is an integer.
`getPointeeType()` on such an input returns a null QualType, on which
`getTypePtr()` crashes.


    [4 lines not shown]
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+1-6clang/lib/StaticAnalyzer/Checkers/StdVariantChecker.cpp
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+5-62 files

LLVM/project b82e355clang/lib/StaticAnalyzer/Core RegionStore.cpp ExprEngine.cpp, clang/test/Analysis issue-210183.cpp initializer.cpp

[analyzer] Fix crash in RegionStoreManager::bindArray from constructor array-to-pointer decay (#210649)

ProcessInitializer() strips implicit casts from a CXXCtorInitializer's
init expression via IgnoreImplicit(), then decides whether to treat the
initializer as a direct array-to-array member copy by checking
Init->getType()->isArrayType(). For a pointer member initialized via
array-to-pointer decay of a reference-to-array constructor parameter
(e.g. `Foo(T (&arr)[N]) : ptr_(arr) {}`), IgnoreImplicit() strips the
ArrayToPointerDecay cast, exposing the underlying array-typed
expression, so this check misfires even though the field itself is a
pointer, not an array. That branch fetches the raw region address of the
whole array, bypassing the normal decay logic (which produces an
ElementRegion), so the pointer member ends up holding the address of the
whole array typed as the array itself, instead of an ElementRegion at
index 0.

Later, dereferencing and storing through that mistyped pointer routes
into RegionStoreManager::bindArray() (instead of bindScalar()), which
unconditionally casts its Init value to nonloc::CompoundVal, asserting

    [37 lines not shown]
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+34-0clang/test/Analysis/issue-210183.cpp
+9-1clang/lib/StaticAnalyzer/Core/RegionStore.cpp
+3-5clang/test/Analysis/initializer.cpp
+1-1clang/lib/StaticAnalyzer/Core/ExprEngine.cpp
+47-74 files

LLVM/project 69873d3lldb/source/Utility Policy.cpp

[lldb] Gate `PolicyStack::Current()` log behind verbose (#209527)

`Process::GetState()` calls `PolicyStack::Get().Current()` on every
prompt redraw, so the previous unconditional LLDB_LOG at the read site
fired on every keypress once `log enable lldb process` was on, drowning
out any other process log output. Keep the dump for when it's actually
wanted, but only fire it if the log is set to verbose.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
(cherry picked from commit c7a0afe5049a3d4789f34a8d746c6a45d73557b4)
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+8-3lldb/source/Utility/Policy.cpp
+8-31 files

LLVM/project 37532c3llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp

[SDAG] Use DAG.getTokenFactor in more places (#210949)

This will cause the TokenFactor to be split into nodes of at most
SDNode::getMaxNumOperands() size.

This fixes #189161 but I have not added a test case as the output is
in excess of 160000 lines long.

(cherry picked from commit ba836590ffed1305a770fc18f4a3f676f9829df1)
DeltaFile
+4-4llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+4-41 files

LLVM/project 2f8eaf6clang/include/clang/Basic DiagnosticParseKinds.td DiagnosticGroups.td, clang/lib/Parse ParseStmt.cpp

[clang][Parser] Warn when the body of expansion statement is not a compound statement (#209229)

<https://eel.is/c++draft/stmt.expand#nt:expansion-statement>:

_expansion-statement_:
template for ( _init-statement<sub>opt</sub>_ _for-range-declaration_ :
_expansion-initializer_ ) _compound-statement_

(cherry picked from commit d13b8625eef0941f48b5af74e9fab953b6430eb2)
DeltaFile
+47-0clang/test/Parser/cxx2c-expansion-statements-non-compound-stmt-body.cpp
+11-0clang/lib/Parse/ParseStmt.cpp
+6-0clang/include/clang/Basic/DiagnosticParseKinds.td
+1-0clang/include/clang/Basic/DiagnosticGroups.td
+65-04 files

LLVM/project a94ef18clang/docs ReleaseNotes.md, llvm/docs ReleaseNotes.md

[docs][Hexagon] Add 23.x release notes for Hexagon changes (NFC)
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+13-0clang/docs/ReleaseNotes.md
+41-02 files

LLVM/project 84301ddclang/lib/Lex Lexer.cpp, llvm/include/llvm/Support Compiler.h

[Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (#180631)

This PR reopens #175452 after it was merged then reverted by #177322
because of compilation failures and compatibility issues.

This change attempts to maximize usage of the SSE fast path in
`fastParseASCIIIdentifier`.

If the binary is compiled with SSE4.2 enabled, or if we are not
compiling for x86, then the behavior is the exact same, ensuring we have
no regressions.
Otherwise, we compile both the SSE fast path and the scalar loop. At
runtime, we check if SSE4.2 is available and dispatch to the right
function by using `__builtin_cpu_supports`. If it _is_ available, this
allows a net performance improvement. Otherwise, there's a very slight
but negligible regression... I believe that's perfectly reasonable for a
non-SSE4.2-supporting processor.

The benchmark results are available here:
https://llvm-compile-time-tracker.com/compare.php?from=3192fe2c7b08912cc72c86471a593165b615dc28&to=8960c57a2e5880616d2dd549f8422ca91c864e86&stat=instructions%3Au.
DeltaFile
+29-14clang/lib/Lex/Lexer.cpp
+32-0llvm/include/llvm/Support/Compiler.h
+61-142 files

LLVM/project 2462eacllvm/lib/DWARFLinker/Parallel SyntheticTypeNameBuilder.cpp

[DWARFLinker] Make synthetic type names deterministic under threading (#209553)

(cherry picked from commit 6bcdcb39c57ea926d3082ec3ecae74bf59b4658e)
DeltaFile
+7-4llvm/lib/DWARFLinker/Parallel/SyntheticTypeNameBuilder.cpp
+7-41 files

LLVM/project e241e18llvm/lib/DWARFLinker/Parallel DWARFLinkerCompileUnit.cpp DWARFLinkerUnit.h

[DWARFLinker] Fix data race on the per-unit file-name cache (#208967)

CompileUnit::getDirAndFilenameFromLineTable reads and mutates the unit's
FileNames DenseMap without synchronization. During the parallel
type-name assignment phase a unit's cache is touched both by its own
worker and, through cross-unit type-name references
(addReferencedODRDies calling addDieNameFromDeclFileAndDeclLine) by
other units' workers.

The concurrent find/insert/grow corrupts the map and trips the
assertion:

```
Assertion failed: (TheBucket), function findBucketForInsertion, DenseMap.h
```

Guard the cache with a mutex. Store each entry in a heap-allocated pair
so the StringRefs handed back to callers stay valid across a concurrent
rehash. Otherwise a short (small-string-optimized) file name would move

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+11-2llvm/lib/DWARFLinker/Parallel/DWARFLinkerUnit.h
+24-142 files

LLVM/project 881e1cblibcxx/src/support/runtime exception_pointer_msvc.ipp

[libcxx][NFC] Address -Wmicrosoft-cast in MSVC's exception_ptr (#210570)

This was introduced as part of #94977. Rather than suppressing the
warning with `#pragma clang diagnostic ignored`, we use
`reinterpret_cast` to avoid the implicit conversion.

(cherry picked from commit 16ffd27e3737c01cbabad6eed77b919dc977ad6c)
DeltaFile
+3-2libcxx/src/support/runtime/exception_pointer_msvc.ipp
+3-21 files

LLVM/project 2d5e670clang/lib/Basic/Targets X86.cpp, clang/test/CodeGen attr-target-x86.c attr-target-mv.c

[X86] Support apxf in attribute target (#184078)

As in title. This adds support for using apxf in attribute target.
Individual features are not supported for FMV but are supported for
enabling a feature for the function

Patch done with usage of Claude Code.

(cherry picked from commit 1d55a816c6dddfaacfd39f3235519a2389b56423)
DeltaFile
+55-0clang/test/CodeGen/attr-target-x86.c
+16-0clang/test/Sema/attr-target.c
+15-0clang/test/Sema/attr-target-mv.c
+9-0clang/lib/Basic/Targets/X86.cpp
+7-0clang/test/CodeGen/attr-target-mv.c
+2-2llvm/include/llvm/TargetParser/X86TargetParser.def
+104-26 files

LLVM/project 2cb2b29llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 pr209714.ll

[X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (#210281)

VectorCombine may have folded:
  icmp_eq(vecreduce_or(splatsign(x)),0) --> icmp_sgt(vecreduce_umax(x),-1)

which DAG folds to:
  srl(vecreduce_umax(x),bw-1).

This match attempts to lower:
  srl(vecreduce_umax(x),bw-1) --> icmp_ne(movmsk(x),0) "any_of negative"
  srl(not(vecreduce_umax(x)),bw-1) --> icmp_eq(movmsk(x),0) "none_of negative"

The correct fix would be to improve vecreduce_or costs to prevent
VectorCombine doing this, but that change is far too big to be merged
into 23.x - so I've created the narrow backend fix.

Fixes #209714

(cherry picked from commit 8abc26930cf9ee0f059228acdbd1d22cd1c325e3)
DeltaFile
+1,407-0llvm/test/CodeGen/X86/pr209714.ll
+32-0llvm/lib/Target/X86/X86ISelLowering.cpp
+1,439-02 files

LLVM/project c22ddf0llvm/lib/Transforms/Scalar MemCpyOptimizer.cpp, llvm/test/Transforms/MemCpyOpt callslot.ll

[MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment

A destination alloca's alignment could have been unconditionally
overwritten, letting a lower-aligned source incorrectly undo a
previous alignment increase. This issue has been addressed by
considering the maximum alignment between the new source target
and current destination, adhering to what the existing comment
already promises.
DeltaFile
+18-0llvm/test/Transforms/MemCpyOpt/callslot.ll
+2-1llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
+20-12 files

LLVM/project 7bd74c1llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Transforms/LoopVectorize/AArch64 sve-interleave-low-vf-cost.ll

[AArch64][LV] Adjust costs for low-VF interleaved access (#209441)

Addressing regression introduced by #205844 in which a significantly
slower SVE tail loop is generated.

The cost model for the case where the interleave factor is larger than
the VF has been adjusted to more accurately reflect the cost of the uzp
instructions generated by the deinterleave tree, and the cost of
legalizing the type of each subvector.

(cherry picked from commit 79e05f4aff2e5b9f0513c0539d146e44cc80193c)
DeltaFile
+70-9llvm/test/Transforms/LoopVectorize/AArch64/sve-interleave-low-vf-cost.ll
+16-7llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+86-162 files

LLVM/project 2ca1deellvm/lib/Target/X86 X86InstrTBM.td, llvm/test/CodeGen/X86 tbm_patterns.ll

X86: Add pattern for optimized BLSIC IR form (#209814)

Add DAG pattern to recognize the optimized IR form of BLSIC: (xor (and
x, -x), -1)

Fixes #209718 - matches the IR form produced after InstCombine
optimizations

Added tests for both 32-bit and 64-bit BLSIC patterns

Assisted by: Claude Code, helped me understand
pattern-matching/intrinsics, and some file structure. As well as how
testing for LLVM works.

(cherry picked from commit 466503dcf2ae2e43126c1a6d8a5b204883d5b0c1)
DeltaFile
+34-12llvm/test/CodeGen/X86/tbm_patterns.ll
+5-0llvm/lib/Target/X86/X86InstrTBM.td
+39-122 files

LLVM/project a82f94bclang/lib/Sema SemaDecl.cpp, clang/test/Parser cxx1z-decomposition.cpp

[clang][sema] Fix crash on decomposition decl missing initializer (#210151)

ActOnUninitializedDecl dereferenced the std::optional<Token> from
Lexer::findNextToken() unconditionally when diagnosing a structured
binding with no initializer. Guard the optional and fall back to the
declaration's location.

(cherry picked from commit 0e3852f73ab75639b76bad2c8a735d46241768f3)
DeltaFile
+9-6clang/lib/Sema/SemaDecl.cpp
+3-0clang/test/Parser/cxx1z-decomposition.cpp
+12-62 files

LLVM/project 9a93aaeclang/lib/Parse ParseDecl.cpp, clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general p2.cpp

[Clang] Fixed auto parsing regression with brace initialization (#210347)

The PR #208552 has introduced a regression where brace initialization
was not taken into account `auto foo{12}`. It was also breaking
`dcl.type.general` p2 rules, which is also now tested.

(cherry picked from commit d592aa5a10f44164cd403257270802eb2a4b123a)
DeltaFile
+11-0clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.type.general/p2.cpp
+4-4clang/lib/Parse/ParseDecl.cpp
+15-42 files

LLVM/project 201044alld/COFF InputFiles.cpp Driver.cpp, lld/test/COFF link-dll-arm64x.s

[LLD] [COFF] Fix linking directly against an ARM64X DLL without import library (#210311)

In mingw mode, when linking against a DLL, the user can either provide a
regular import library, or provide the actual DLL. When linking against
an ARM64X image, add both native and EC views to the symbol table on EC
targets. Also getMachine() on such images returns ARM64X, treat it as
ARM64 instead.

(cherry picked from commit 30f270edb42c5d37e4c4a413ebfc7a6513565b30)
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+81-0lld/test/COFF/link-dll-arm64x.s
+3-15lld/COFF/InputFiles.cpp
+15-1lld/COFF/Driver.cpp
+4-2lld/COFF/InputFiles.h
+103-184 files