LLVM/project 88b2053 — llvm/lib/Target/RISCV RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV/rvv vxrm-insert-out-of-loop.ll vaaddu-sdnode.ll

[RISCV] Add subtarget feature to disable use of vector avgceil/floor nodes. (#231609)

The cost of the vxrm write makes using these instruction not profitable
on 525.x264_r on current SiFive OoO cores.
DeltaFile
+278-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
+278-0llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaadd.ll
+225-0llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
+225-0llvm/test/CodeGen/RISCV/rvv/vaadd-sdnode.ll
+0-134llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll
+13-8llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+1,019-1423 files not shown
+1,032-1469 files

LLVM/project 15fe652 — llvm/test/CodeGen/AMDGPU schedule-regpressure-ilp-metric-spills.mir high-RP-reschedule.mir

Addressed reviewer feedback about tests.

high-RP-reschedule.mir: Added new positive CHECK lines.
schedule-regpressure-ilp-metric-spills.mir: Removed unnecessary comment.
DeltaFile
+14-5llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
+0-2llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir
+14-72 files

LLVM/project b49d43c — clang/docs ReleaseNotes.md, clang/lib/AST ExprConstant.cpp

[Clang] Avoid assertions for unevaluatable object size kinds (#231793)

Constant-evaluated calls to __builtin_object_size and
__builtin_dynamic_object_size may have a second argument that cannot be
evaluated. The legacy evaluator incorrectly assumed it was a known
constant integer, which could trigger an assertion.

Evaluate the argument through the current evaluator and propagate
evaluation failures instead of calling EvaluateKnownConstInt.

Add regression coverage for division by zero, function calls, runtime
parameters, volatile reads, and null pointer dereferences. The tests
cover both object-size builtins and both constant evaluators.

AI assistance was used to generate additional regression test cases,
which I reviewed and adapted.

Fixes https://github.com/llvm/llvm-project/issues/231108


    [2 lines not shown]
DeltaFile
+16-0clang/test/Sema/builtin-object-size.c
+3-1clang/lib/AST/ExprConstant.cpp
+3-0clang/docs/ReleaseNotes.md
+22-13 files

LLVM/project c68a651 — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp, llvm/test/CodeGen/AMDGPU amdgpu-sw-lower-lds-flat-arg-kernel-id.ll

update
DeltaFile
+4-2llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+3-1llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-flat-arg-kernel-id.ll
+7-32 files

LLVM/project ba3544d — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp

update
DeltaFile
+2-2llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+2-21 files

LLVM/project 9337155 — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp, llvm/test/CodeGen/AMDGPU amdgpu-sw-lower-lds-flat-arg-kernel-id.ll

[AMDGPU][SwLowerLDS] Lower non-kernels with LDS instructions and assign kernel IDs to their callers
DeltaFile
+122-84llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+152-0llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-flat-arg-kernel-id.ll
+274-842 files

LLVM/project f9f400b — llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-avgsub.ll

[RISCV][P-ext] Use ISD::AVGSUBFLOOR(S/U) for (p)asub(u).

This replaces RISCVISD::ASUB(U) with ISD::AVGSUBFLOOR(S/U).

Co-Authored-By: Claude Sonnet 5.5 <noreply at anthropic.com>
DeltaFile
+469-0llvm/test/CodeGen/RISCV/rvp-avgsub.ll
+23-25llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+14-18llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+506-433 files

LLVM/project 9aab145 — llvm/lib/CodeGen TargetLoweringBase.cpp, llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp DAGCombiner.cpp

[SelectionDAG] Add AVGSUBFLOORS/AVGSUBFLOORU opcodes

These represent a halving subtract: trunc(shr(sub(ext(X), ext(Y)), 1)),
rounding towards negative infinity. They correspond to AArch64 shsub/uhsub
and RISC-V P extension asub/asubu.

Includes some legalization, known bits, constant folding, and
a DAGCombiner fold from (sr[al] (sub nsw/nuw x, y), 1).

The operation is not legal any target yet. That will be done in
follow ups.

Co-Authored-By: Claude Sonnet 5.5 <noreply at anthropic.com>
DeltaFile
+41-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+33-0llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
+23-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+22-0llvm/unittests/ADT/APIntTest.cpp
+10-0llvm/lib/Support/APInt.cpp
+4-4llvm/lib/CodeGen/TargetLoweringBase.cpp
+133-48 files not shown
+162-614 files

LLVM/project d7b3e3b — llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp

fixup! stray change
DeltaFile
+1-0llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+1-01 files

LLVM/project 3431373 — llvm/lib/Target/AMDGPU AMDGPUSwLowerLDS.cpp, llvm/test/CodeGen/AMDGPU amdgpu-sw-lower-lds-flat-to-lds-cast-roundtrip.ll amdgpu-sw-lower-lds-flat-to-lds-cast.ll

[AMDGPU][SwLowerLDS] Rebase flat to LDS addrspacecasts to buffer offsets (#227985)

**Issue:**
In `amdgpu-sw-lower-lds` pass:
- LDS is moved/lowered into an `__asan_malloc_impl` buffer. AS3 pointers
hold offsets into it, and each LDS access is rewritten to `buf +
offset`.
- LDS to flat casts produce `buf + offset`. Casting that back to AS3
kept the full address, so the next access went out of bounds.

**Fix:**
- Collect flat to LDS casts and rewrite them as
`inttoptr(trunc(ptrtoaddr(flat) - ptrtoaddr(buf)))` to get the offset
back. The existing translation handles the users.
- Covers kernels and already-lowered non-kernels. 

**Note :** 
- Non-kernels that only take a flat pointer are handled in a follow-up
#228043.

Assisted by: claude opus 5.5
DeltaFile
+206-0llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-flat-to-lds-cast.ll
+89-0llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-flat-to-lds-cast-roundtrip.ll
+40-8llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+335-83 files

LLVM/project 092be5d — compiler-rt/lib/csan csan.cpp, compiler-rt/test/csan access-sizes.cpp

Use unaligned loads when snapshotting watched values
DeltaFile
+22-0compiler-rt/test/csan/access-sizes.cpp
+3-3compiler-rt/lib/csan/csan.cpp
+25-32 files

LLVM/project 62383e3 — compiler-rt/cmake config-ix.cmake, compiler-rt/cmake/Modules AllSupportedArchDefs.cmake

comments
DeltaFile
+13-9compiler-rt/lib/csan/csan_gpu.cpp
+3-3compiler-rt/cmake/config-ix.cmake
+2-2compiler-rt/lib/csan/CMakeLists.txt
+1-1compiler-rt/test/csan/CMakeLists.txt
+1-1compiler-rt/lib/csan/offload/CMakeLists.txt
+1-0compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
+21-166 files

LLVM/project 7449d39 — compiler-rt/lib/csan csan_gpu.cpp csan.cpp, compiler-rt/test/csan volatile.cpp

Remove separate volatile entry points
DeltaFile
+49-0compiler-rt/test/csan/volatile.cpp
+22-0compiler-rt/test/csan/AMDGPU/volatile.hip
+0-4compiler-rt/lib/csan/csan_gpu.cpp
+0-4compiler-rt/lib/csan/csan.cpp
+71-84 files

LLVM/project ae169f6 — compiler-rt/lib/csan CMakeLists.txt, compiler-rt/lib/csan/offload csan_offload_preinit.cpp CMakeLists.txt

[compiler-rt] Remove dlsym interceptor and support `-shared-libsan` for CSan

Summary:
Follow the UBSan offload runtime. Offload now resolves HSA through the
global scope, so the `dlsym` interceptor is no longer needed. The real
HSA entry points are still taken from the loaded HSA library rather than
`RTLD_NEXT`, since every DSO with a static runtime exports the same
wrappers and they would otherwise chain back into each other.

Build `libclang_rt.csan.so` with the offload objects folded in. The
exported HSA wrappers report failure when HSA is absent and warn when HSA
was loaded ahead of the runtime. The preinit hook moves to a separate
`csan_offload-preinit` archive for executables.
DeltaFile
+34-98compiler-rt/lib/csan/offload/csan_offload_hsa_interceptors.cpp
+84-9compiler-rt/lib/csan/CMakeLists.txt
+35-0compiler-rt/test/csan/hsa-load-order.cpp
+22-4compiler-rt/lib/csan/offload/CMakeLists.txt
+24-0compiler-rt/test/csan/hsa-missing.cpp
+22-0compiler-rt/lib/csan/offload/csan_offload_preinit.cpp
+221-1115 files not shown
+241-11111 files

LLVM/project 6ad29a0 — compiler-rt/lib/csan csan_watch.h csan_report.cpp, compiler-rt/lib/csan/offload csan_offload_report.cpp csan_offload_hsa_interceptors.cpp

[compiler-rt] Add 'csan' library for the concurrency sanitizer

Summary:
Adds the runtime for the concurrency sanitizer, both CPU and GPU.
Fundamentally, this works using the following pseudocode:

```c
static u64 watchpoints[N]; // Hash-indexed, zero is empty.

// Emitted before the access, so we never trip on our own write.
void check_access(volatile void *addr, u32 size, u32 type) {
    // Every access probes. A read conflicts only with a watched write, a
    // write conflicts with either.
    if (u64 *wp = find_watchpoint(addr, size, type))
        consume(wp, this_pc()); // Hand our location to the owner.

    if (!should_sample()) // Wave-uniform, 1-in-N chance.
        return;


    [17 lines not shown]
DeltaFile
+456-0compiler-rt/lib/csan/csan_gpu.cpp
+370-0compiler-rt/lib/csan/offload/csan_offload_hsa_interceptors.cpp
+334-0compiler-rt/lib/csan/csan.cpp
+279-0compiler-rt/lib/csan/csan_report.cpp
+184-0compiler-rt/lib/csan/offload/csan_offload_report.cpp
+163-0compiler-rt/lib/csan/csan_watch.h
+1,786-044 files not shown
+2,940-250 files

LLVM/project cc1b3fd — clang/lib/Driver/ToolChains CommonArgs.cpp, clang/test/Driver fsanitize.c fsanitize-concurrency-offload.c

[Clang] Support `-shared-libsan` for offload CSan

Summary:
Follow the UBSan handling. The shared runtime embeds the HSA
interceptors, so `csan_offload` is only linked with static runtimes and
executables pull in `csan_offload-preinit` to initialize early.
DeltaFile
+38-0clang/test/Driver/fsanitize-concurrency-offload.c
+9-4clang/lib/Driver/ToolChains/CommonArgs.cpp
+3-1clang/test/Driver/fsanitize.c
+50-53 files

LLVM/project b7bbcd4 — clang/lib/Driver SanitizerArgs.cpp, clang/lib/Driver/ToolChains AMDGPU.cpp CommonArgs.cpp

Comments
DeltaFile
+48-0clang/test/Driver/fsanitize-concurrency-offload.c
+27-0clang/test/Driver/fsanitize.c
+16-7clang/lib/Driver/ToolChains/Clang.cpp
+11-4clang/lib/Driver/SanitizerArgs.cpp
+5-6clang/lib/Driver/ToolChains/CommonArgs.cpp
+3-2clang/lib/Driver/ToolChains/AMDGPU.cpp
+110-195 files not shown
+112-2111 files

LLVM/project ca0a50d — clang/test/CodeGen sanitize-concurrency.c, clang/test/CodeGen/Inputs sanitize-concurrency-ignorelist.txt

ignore
DeltaFile
+29-0clang/test/CodeGen/sanitize-concurrency.c
+2-0clang/test/CodeGen/Inputs/sanitize-concurrency-ignorelist.txt
+31-02 files

LLVM/project cd831ad — clang/docs ConcurrencySanitizer.md, clang/lib/CodeGen CodeGenFunction.cpp

[Clang] Add support for the `-fsanitize=concurrency` runtime

Summary:
Add the frontend sanitizer kind, function attributes, pass pipeline
integration, predefined macro, driver handling, and documentation for
ConcurrencySanitizer.
DeltaFile
+207-0clang/docs/ConcurrencySanitizer.md
+73-0clang/test/CodeGen/sanitize-concurrency.c
+32-8clang/lib/Driver/ToolChains/CommonArgs.cpp
+15-0clang/test/Driver/fsanitize.c
+10-4clang/lib/Driver/SanitizerArgs.cpp
+10-3clang/lib/CodeGen/CodeGenFunction.cpp
+347-1510 files not shown
+375-1616 files

LLVM/project b527dd0 — llvm/lib/Transforms/Instrumentation ConcurrencySanitizer.cpp, llvm/test/Instrumentation/ConcurrencySanitizer selection.ll

comments
DeltaFile
+38-0llvm/test/Instrumentation/ConcurrencySanitizer/selection.ll
+7-5llvm/lib/Transforms/Instrumentation/ConcurrencySanitizer.cpp
+45-52 files

LLVM/project a506683 — llvm/test/CodeGen/LoongArch/lasx vselect.ll, llvm/test/CodeGen/LoongArch/lsx vselect.ll

update after rebase
DeltaFile
+23-19llvm/test/CodeGen/LoongArch/lsx/vselect.ll
+4-8llvm/test/CodeGen/LoongArch/lasx/vselect.ll
+27-272 files

LLVM/project e633c7d — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/CodeGen CIRGenCoroutine.cpp

[ClangIR] Support bool-returning await_suspend (#227527)

Support bool-returning `await_suspend` in ClangIR:

- Add an optional boolean condition operand to `cir.coro.suspend_point`
to signal whether suspension takes effect or is vetoed.
- In CIRGen, evaluate the `await_suspend` expression as boolean when
`SuspendReturnType::SuspendBool` and pass the condition to
`cir.coro.suspend_point`.
- Update control flow and successor regions for `cir.await` accordingly.
- Add MLIR and CodeGen test coverage.

Closes #227404
DeltaFile
+44-0clang/test/CIR/CodeGenCoroutines/coro-await-suspend-bool.cpp
+37-0clang/test/CIR/IR/await.cir
+17-9clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
+17-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+9-2clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+124-135 files

LLVM/project 8612284 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

fix typo
DeltaFile
+1-1llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+1-11 files

LLVM/project 93bceeb — llvm/lib/Target/LoongArch LoongArchISelLowering.h LoongArchISelLowering.cpp, llvm/test/CodeGen/LoongArch/lasx vselect.ll

[LoongArch] Custom legalize vselect to vector_shuffle for most constant condition cases
DeltaFile
+48-36llvm/test/CodeGen/LoongArch/lasx/vselect.ll
+44-34llvm/test/CodeGen/LoongArch/lsx/vselect.ll
+49-2llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+1-0llvm/lib/Target/LoongArch/LoongArchISelLowering.h
+142-724 files

LLVM/project 80fd3e8 — llvm/include/llvm/CodeGen MachineScheduler.h, llvm/lib/CodeGen MachineScheduler.cpp

Address comments

Created using spr 1.3.6-beta.1
DeltaFile
+15-27llvm/lib/CodeGen/MachineScheduler.cpp
+12-2llvm/include/llvm/CodeGen/MachineScheduler.h
+2-2llvm/test/CodeGen/RISCV/postmisched-antidep-region.mir
+29-313 files

LLVM/project a5f1fba — .github/workflows libcxx-lnt-pipeline-libstdcxx.yml libcxx-lnt-pipeline.yml

[libc++] Extract running the benchmarks into reusable workflows (#232168)

This patch moves the jobs that actually run the benchmarks into their
own workflows and defines the full "benchmarking pipeline" in a
dedicated workflow as well. This allows seeing the full set of steps in
the pipeline in a concise way, and removes most of the remaining
duplication of logic.
DeltaFile
+0-183.github/workflows/libcxx-benchmark-commit.yml
+153-0.github/workflows/libcxx-run-benchmarks.yml
+0-145.github/workflows/libcxx-benchmark-libstdcxx.yml
+115-0.github/workflows/libcxx-run-libstdcxx-benchmarks.yml
+75-0.github/workflows/libcxx-lnt-pipeline.yml
+73-0.github/workflows/libcxx-lnt-pipeline-libstdcxx.yml
+416-3283 files not shown
+422-3349 files

LLVM/project 8ec2b01 — llvm/lib/CodeGen/SelectionDAG TargetLowering.cpp, llvm/test/CodeGen/X86 mask-beforefirst.ll

[DAG] Handle widened step vectors in expandGetActiveLaneMask

On AVX512 getLegalMaskAndStepVector will need to widen the step vector type. Handle this in expandGetActiveLaneMask, so we don't crash on AVX512 which widens e.g. v8i1 -> v16i1. We don't actually use Mask, it's just a dummy poison value to work out what type the final mask result should be.
DeltaFile
+69-2llvm/test/CodeGen/X86/mask-beforefirst.ll
+6-3llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+75-52 files

LLVM/project 6f33990 — llvm/test/CodeGen/X86 mask-beforefirst.ll

Don't use mask types in arguments or return
DeltaFile
+207-180llvm/test/CodeGen/X86/mask-beforefirst.ll
+207-1801 files

LLVM/project 63e1060 — llvm/test/CodeGen/X86 alias_mask.ll mask-beforefirst.ll

Use mask-beforefirst to test expansion
DeltaFile
+301-9llvm/test/CodeGen/X86/mask-beforefirst.ll
+0-26llvm/test/CodeGen/X86/alias_mask.ll
+301-352 files

LLVM/project 5e24884 — mlir/lib/Dialect/Bufferization/Transforms OneShotAnalysis.cpp

[mlir][bufferization] Skip read collection when no writes exist (#231771)

Collect aliasing writes before reads in the One-Shot Bufferization RaW
interference check. When there are no in-place writes, return without
collecting aliasing reads.

This avoids unnecessary read scans during pre-bufferization checks and
other cases without writes.
DeltaFile
+11-5mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
+11-51 files