Reapply "[NFC][bugpoint] Namespace cleanup in `bugpoint`" (#168961) (#169055)
This reverts commit b83e458fe5330227581e1e65f3866ddfcd597837.
Also undo the use of namespace qualifier for `ReducePassList` as that
seems to cause build failures.
[AMDGPU] Implement CFI for CSR spills
Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.
Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs
These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
[AMDGPU] Implement CFI for non-kernel functions
This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
[Clang] Default to async unwind tables for amdgcn
To avoid codegen changes when enabling debug-info (see
https://bugs.llvm.org/show_bug.cgi?id=37240) we want to
enable unwind tables by default.
There is some pessimization in post-prologepilog scheduling, and a
general solution to the problem of CFI_INSTRUCTION-as-scheduling-barrier
should be explored.
[AMDGPU] Emit entry function Dwarf CFI
Entry functions represent the end of unwinding, as they are the
outer-most frame. This implies they can only have a meaningful
definition for the CFA, which AMDGPU defines using a memory location
description with a literal private address space address. The return
address is set to undefined as a sentinel value to signal the end of
unwinding.
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
[MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU
While these can be represented with .cfi_escape, using these pseudo-cfi
instructions makes .s/.mir files more readable, and it is necessary to
support updating registers in CFI instructions (something that the
AMDGPU backend requires).
[MC] Use a variant to hold MCCFIInstruction state (NFC)
AMDGPU requires more complex CFI rules, normally these would be
expressed with .cfi_escape, however this would make the CFI unreadable
and makes it difficult to update registers in CFI instructions (also
something AMDGPU requires).
[mlir][acc] Adds attr to acc.present to identify default clause origin (#169114)
The `acc.present` Op as generated by ACCImplicitData does not provide a
way to differentiate between `acc.present` ops that are generated
implicitly and the ones that are generated as result of an explicit
`default(present)` clause in the source code. This differentiation would
allow for better communication to the user on the decisions made by the
compiler while managing data automatically between the host and the
device. This commit adds this information as a discardable attribute on
the `acc.present` op.
[LV] Pre-commit test for #128062 (#164801)
In preparation to extend the work done by dfa665f ([VPlan] Add
transformation to narrow interleave groups) to make the narrowing more
powerful, pre-commit a test case from #128062.
Reland [VPlan] Handle WidenGEP in narrowToSingleScalars (#167880)
Changes: Fix a missed update to WidenGEP::usesFirstLaneOnly, and include
reduced-case test that was previously hitting the new assert: the
underlying reason was that VPWidenGEP::usesScalars was too weak, and the
single-scalar WidenGEP was not narrowed by narrowToSingleScalarRecipes.
This allows us to strip a special case in VPWidenGEP::execute.
[clang-doc] Add Mustache HTML output to namespace test (#169107)
This patch adds Mustache HTML tests alongside the legacy HTML backend
for namespace output. This way, we can see exactly where the output
currently differs before replacing the legacy backend.
The same thing will be done for all other tests where the legacy HTML
backend is tested.
[Clang][TypePrinter] Make printNestedNameSpecifier look at typedefs (#169364)
This is to resolve a regression caused by #168534.
Now when we have an anonymous object like a struct or union that has a
typedef attached, we print the typedef name instead of listing it as
anonymous.
[clang-doc] Add Mustache HTML output to namespace test
This patch adds Mustache HTML tests alongside the legacy HTML backend
for namespace output. This way, we can see exactly where the output
currently differs before replacing the legacy backend.
The same thing will be done for all other tests where the legacy HTML
backend is tested.
Add support for llvm.dbg.declare_value in the CoroSplitter pass. (#168134)
Make sure the CoroSplitter pass correctly handles `#dbg_declare_value`
intrinsics. Which means, it should identify them, and convert them to
`#dbg_declares` so that any subsequent passes do not need to be amended
to support the `#dbg_declare_value` intrinsic.
More information here:
https://discourse.llvm.org/t/rfc-introduce-new-llvm-dbg-coroframe-entry-intrinsic/88269
This patch is the second and last in a stack of patches, with the one
preceding it being: https://github.com/llvm/llvm-project/pull/168132
[MLIR][LLVM] Support named barrier as a global variable type in llvm dialect (#169194)
Enables `amdgcn.named.barrier` target extension type as a global
variable type in MLIR.
