LLVM/project 044e21fclang/lib/Headers vecintrin.h, clang/test/CodeGen/SystemZ builtins-systemz-zvector2.c

[SystemZ] Fix wrong mask for float vec_insert (#192967)

This commit fixes an error in vec_insert, where the index masking
effectively made the last two float elements of a vector non-insertable.

co-authored-by: @Andreas-Krebbel
DeltaFile
+4-1clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
+1-1clang/lib/Headers/vecintrin.h
+5-22 files

LLVM/project cf1f7c5llvm/test/Transforms/Attributor dereferenceable-2-inseltpoison.ll dereferenceable-2.ll, llvm/test/Transforms/Attributor/ArgumentPromotion musttail.ll

[Attributor] Regenerate test checks (NFC) (#193192)

To avoid spurious invariant.load changes in future changes.
DeltaFile
+44-22llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
+12-8llvm/test/Transforms/Attributor/ArgumentPromotion/musttail.ll
+9-7llvm/test/Transforms/Attributor/dereferenceable-2-inseltpoison.ll
+9-7llvm/test/Transforms/Attributor/dereferenceable-2.ll
+10-6llvm/test/Transforms/Attributor/align.ll
+8-6llvm/test/Transforms/Attributor/call-simplify-pointer-info.ll
+92-565 files not shown
+117-6711 files

LLVM/project 8e132f7cmake/Modules GetToolchainDirs.cmake, flang-rt/cmake/modules AddFlangRT.cmake

[runtimes][CMake] Move Fortran support code from flang-rt (#171610)

Common CMake code to be used by flang-rt and openmp to emit Flang module
files. Most of the code is not yet used within this PR.

Extracted out of #171515 for review by @petrhosek.
DeltaFile
+250-0runtimes/cmake/config-Fortran.cmake
+15-0runtimes/CMakeLists.txt
+14-0flang-rt/cmake/modules/AddFlangRT.cmake
+11-0cmake/Modules/GetToolchainDirs.cmake
+290-04 files

LLVM/project 7f72a8dllvm/lib/Target/AArch64 AArch64SystemOperands.td, llvm/lib/Target/AArch64/AsmParser AArch64AsmParser.cpp

[AArch64][llvm] Remove support for FEAT_MPAMv2_VID

`FEAT_MPAMv2_VID` instructions and system registers, as introduced
in change d30f18d2c, are being removed at this time, as they've been
removed from the latest Arm ARM, which doesn't preclude them returning
in some form in future.

Other system registers introduced with `FEAT_MPAMv2` are unaffected,
and these continue to be ungated, but since `+mpamv2` gating is now empty,
I'm removing this superfluous gating code.
DeltaFile
+5-86llvm/test/MC/AArch64/armv9.7a-mpamv2.s
+0-36llvm/lib/Target/AArch64/AArch64SystemOperands.td
+5-17llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+0-18llvm/test/MC/AArch64/armv9.7a-mpamv2-diagnostics.s
+2-12llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+0-10llvm/test/CodeGen/AArch64/aarch64-sys-intrinsic.ll
+12-1797 files not shown
+13-20513 files

LLVM/project af5fb38llvm/lib/Transforms/IPO AttributorAttributes.cpp, llvm/test/Transforms/Attributor undefined_behavior.ll

[Attributor] Clarify volatile null pointer behavior (NFCI) (#193190)

The comment was referring to volatile stores in particular, which
are specified as non-willreturn. However, allowing volatile accesses
on null (independently of null_pointer_is_valid) is a general
provision that is independent of the access kind.

The actual behavior was still correct, because volatile loads are
considered as writing inaccessible memory, so the mayWriteToMemory()
check was ultimately redundant.

Add a test to make sure volatile load is handled correctly.
DeltaFile
+62-85llvm/test/Transforms/Attributor/undefined_behavior.ll
+2-2llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+64-872 files

LLVM/project 47918c2clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/CodeGen CIRGenBuilder.cpp

[CIR] Make array decay and get_element op perserve address spaces (#192361)

This patch makes sure that the maybeBuildArrayDecay function takes
address spaces into account and makes the get_element op preserve the
address space of the base pointer.

Assisted-by: Cursor / claude-4.6-opus-high
DeltaFile
+50-0clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
+9-2clang/include/clang/CIR/Dialect/IR/CIROps.td
+2-1clang/lib/CIR/CodeGen/CIRGenBuilder.cpp
+61-33 files

LLVM/project c2139f1llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/X86 copyable_reorder.ll

Revert "[SLP] Normalize copyable operand order to group loads for better vectorization"

This reverts commit 6c35bdbea235fa7f5dd10497b049ed5f328b9124 to fix
issues, reported in https://github.com/llvm/llvm-project/pull/189181#issuecomment-4286829960

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/193186
DeltaFile
+26-12llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
+7-26llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+33-382 files

LLVM/project b3647ebclang-tools-extra/clang-tidy/readability IdentifierLengthCheck.cpp IdentifierLengthCheck.h, clang-tools-extra/docs ReleaseNotes.rst

Revert "[clang-tidy][readability-identifier-length] Add a line count threshold" (#193182)

Reverts llvm/llvm-project#185319
DeltaFile
+0-85clang-tools-extra/test/clang-tidy/checkers/readability/identifier-length-line-count-threshold.cpp
+1-55clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
+0-18clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
+0-5clang-tools-extra/docs/ReleaseNotes.rst
+0-2clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.h
+1-1655 files

LLVM/project 3600cd8llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU wave.reduce.ll

[AMDGPU] Unmark wave reduce intrinsics for constant folding (#193142)

The `add`, `sub`, and `xor` wave reduction intrinsics
cannot be constant folded, as `add` and `sub` need
to be multipled by the number of active lanes, and
`xor` depends on the parity of the number of
active lanes.
DeltaFile
+54-39llvm/test/Transforms/InstSimplify/ConstProp/AMDGPU/wave.reduce.ll
+0-6llvm/lib/Analysis/ConstantFolding.cpp
+54-452 files

LLVM/project 853d7c9llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeHelper.cpp AMDGPURegBankLegalize.cpp

AMDGPU/GlobalISel: RegbankLegalize rules for merge-like opcodes (#193026)

Move RegbankLegalize handling for G_BUILD_VECTOR, G_MERGE_VALUES and
G_CONCAT_VECTORS from AMDGPURegBankLegalize to AMDGPURegBankLegalizeRules
by implementing rules for all supported types.
DeltaFile
+0-22llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
+0-10llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+10-0llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+0-3llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.h
+10-354 files

LLVM/project fc7c257libcxx/src any.cpp

[libc++] Fix any.cpp not compiling with the minimum header version >= 7 (#193183)

The namespace was accidentally closed outside the header version check
while it was opened inside the check. This moves the closing code into
the check.
DeltaFile
+2-2libcxx/src/any.cpp
+2-21 files

LLVM/project 45db5e4llvm/lib/TargetParser RISCVISAInfo.cpp

[RISCV][NFC] Remove unused RISCVExtBit (#193153)

It seems I forgot to remove it in #135600.
DeltaFile
+0-6llvm/lib/TargetParser/RISCVISAInfo.cpp
+0-61 files

LLVM/project d1f4b79llvm/lib/Transforms/Scalar LICM.cpp, llvm/test/Transforms/LICM call-hoisting.ll pr54495.ll

[LICM] Remove unnecessary check during store hoisting (#187529)

When hoisting stores, we check for interfering uses. This is done
by getting the clobbering def for the use and checking whether it
is outside the loop, which implies that no store in the loop can
interfere with it.

However, in addition to that, we check that the memory use does
not occur before the store. I believe that this additional check
is unnecessary, as if the use could be affected by the store, the
clobber walk would have pointed to the memory phi, not outside the
loop.

I think this check was added because MemorySSA had trouble with
loop-carried dependencies in the past (like in #54682), but this
should no longer be a problem.

This allows store hoisting in cases where there are unrelated
loads before the store.
DeltaFile
+31-0llvm/test/Transforms/LICM/call-hoisting.ll
+0-6llvm/lib/Transforms/Scalar/LICM.cpp
+1-1llvm/test/Transforms/LICM/pr54495.ll
+32-73 files

LLVM/project b460f29llvm/lib/Target/RISCV RISCVISelLowering.cpp RISCVTargetTransformInfo.h, llvm/test/CodeGen/RISCV/rvv vfsqrt-vp.ll fixed-vectors-vfsqrt-vp.ll

[RISCV] Remove codegen for vp_sqrt (#191837)

Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999

This splits off vp_sqrt from #179622.
DeltaFile
+129-218llvm/test/CodeGen/RISCV/rvv/vfsqrt-vp.ll
+63-88llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsqrt-vp.ll
+0-5llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+0-1llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
+192-3124 files

LLVM/project c8af57bclang-tools-extra/clang-tidy/readability IdentifierLengthCheck.cpp IdentifierLengthCheck.h, clang-tools-extra/docs ReleaseNotes.rst

Revert "[clang-tidy][readability-identifier-length] Add a line count threshol…"

This reverts commit 3c88abe3206bb944566ff4b62aa4b9874327f37d.
DeltaFile
+0-85clang-tools-extra/test/clang-tidy/checkers/readability/identifier-length-line-count-threshold.cpp
+1-55clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
+0-18clang-tools-extra/docs/clang-tidy/checks/readability/identifier-length.rst
+0-5clang-tools-extra/docs/ReleaseNotes.rst
+0-2clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.h
+1-1655 files

LLVM/project 337ad44llvm/lib/Debuginfod BuildIDFetcher.cpp, llvm/lib/Object BuildID.cpp

[llvm] Errorize DebuginfodFetcher for inspection at call-sites (#191191)

Failure to fetch debuginfod is rarely an error, but there are cases where
we want to distinguish error reasons down the line, for example in order
to test connection timeouts.
DeltaFile
+9-11llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
+11-9llvm/lib/Debuginfod/BuildIDFetcher.cpp
+9-3llvm/tools/llvm-objdump/llvm-objdump.cpp
+8-3llvm/lib/ProfileData/InstrProfCorrelator.cpp
+6-4llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
+6-2llvm/lib/Object/BuildID.cpp
+49-323 files not shown
+57-379 files

LLVM/project 9584e9cllvm/lib/Target/AArch64 AArch64ISelLowering.cpp, llvm/test/CodeGen/AArch64 sve-insert-element.ll

[LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (#192494)

Fixes https://github.com/llvm/llvm-project/issues/180497
DeltaFile
+22-14llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+36-0llvm/test/CodeGen/AArch64/sve-insert-element.ll
+58-142 files

LLVM/project a47551flldb/source/Plugins/ScriptInterpreter/Python ScriptInterpreterPython.cpp, lldb/test/Shell/ScriptInterpreter/Python io.test

[lldb][windows] fix script interpreter file parsing (#193006)
DeltaFile
+4-1lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
+0-5lldb/tools/driver/Driver.cpp
+0-2lldb/test/Shell/ScriptInterpreter/Python/io.test
+4-83 files

LLVM/project a99dd83llvm/test/Transforms/LoopVectorize gep_with_bitcast.ll consec_no_gep.ll, llvm/test/Transforms/LoopVectorize/AArch64 sve-epilog-vect-vscale-tune.ll

[LV][NFC] Remove unnecessary extra passes from some tests (#193155)

Many tests were running extra passes after loop-vectorize, but they made
no difference to the outcome. If tests don't require these extra passes,
then we shouldn't run them because it increases the testing time.
DeltaFile
+120-117llvm/test/Transforms/LoopVectorize/X86/small-size.ll
+3-3llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-vscale-tune.ll
+2-2llvm/test/Transforms/LoopVectorize/gep_with_bitcast.ll
+2-2llvm/test/Transforms/LoopVectorize/X86/gcc-examples.ll
+2-2llvm/test/Transforms/LoopVectorize/consec_no_gep.ll
+2-2llvm/test/Transforms/LoopVectorize/X86/unroll-small-loops.ll
+131-12860 files not shown
+194-19066 files

LLVM/project b78a0a0llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 sve-zext.ll

[AArch64][SelectionDAG] Improve codegen for and(sext(Op), splat(1)) (#192405)

For vector ops, post vector ops legalization,
`and(sext(Op), splat(1)) -> zext(Op)`

Acts  as enabler for PR #192052 in some of the cases
DeltaFile
+254-0llvm/test/CodeGen/AArch64/sve-zext.ll
+4-3llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+258-32 files

LLVM/project bf24d74llvm/test/TableGen riscv-target-def.td, llvm/utils/TableGen/Basic RISCVTargetDefEmitter.cpp

[RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (#193151)
DeltaFile
+27-33llvm/utils/TableGen/Basic/RISCVTargetDefEmitter.cpp
+4-1llvm/test/TableGen/riscv-target-def.td
+31-342 files

LLVM/project 5cc7956llvm/test/CodeGen/RISCV/rvv vfadd-vp.ll vfmul-vp.ll

[RISCV] Remove codegen for vp_fadd, vp_fmul (#191842)

Part of the work to remove trivial VP intrinsics from the RISC-V
backend, see
https://discourse.llvm.org/t/rfc-remove-codegen-support-for-trivial-vp-intrinsics-in-the-risc-v-backend/87999

This splits off 2 intrinsics from #179622. These are removed in lockstep
as there are some combines that depend on these nodes like fadd + fmul
-> fma.
DeltaFile
+764-1,229llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
+235-328llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
+138-146llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
+135-143llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll
+36-30llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
+13-31llvm/test/CodeGen/RISCV/rvv/vfma-vp-combine.ll
+1,321-1,9078 files not shown
+1,368-1,98114 files

LLVM/project 06e70f6flang/include/flang/Optimizer/Dialect FIROps.td, flang/lib/Lower Bridge.cpp PFTBuilder.cpp

[flang][debug] Handle USE statements inside modules (#186184)

Previously, we only generated `fir.use_stmt` when a USE statement was
inside a function. USE statements inside modules were not handled,
resulting in missing debug information for transitive module
dependencies.

The problem can be seen with the following testcase:

```
  module mod_a
    integer :: x = 10
  end module mod_a

  module mod_b
    use mod_a
    integer :: y = 20
  end module mod_b


    [16 lines not shown]
DeltaFile
+101-66flang/lib/Lower/Bridge.cpp
+67-23flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
+42-0flang/test/Lower/debug-use-stmt-module-multiple.f90
+31-0flang/test/Transforms/debug-module-use-imports.fir
+21-6flang/lib/Lower/PFTBuilder.cpp
+23-0flang/include/flang/Optimizer/Dialect/FIROps.td
+285-953 files not shown
+310-979 files

LLVM/project 49f159fclang-tools-extra/clangd ProjectModules.cpp, clang-tools-extra/clangd/unittests PrerequisiteModulesTest.cpp

[clangd] [C++20] [Modules] Read module mappings from commands (#193158)

A problem in the design of supporting modules in clangd is, we assume
there is no duplicated module name for different module units in a
single project. But this is not techniquelly correct.

What ISO disallow is, duplicated module name with different module units
in a linked program. But in a project, we can have multiple program.

And also in practice, the program will still work if users hidden
certain symbols. Tools can't detect that.

After all, we need to support the duplicated module unit within
different module units. The solution in the patch is to lookup into the
compile commands in compilation database.

e.g.,

```C++

    [28 lines not shown]
DeltaFile
+370-1clang-tools-extra/clangd/ProjectModules.cpp
+247-0clang-tools-extra/clangd/unittests/PrerequisiteModulesTest.cpp
+617-12 files

LLVM/project 3db991bclang-tools-extra/clang-tidy/readability IdentifierLengthCheck.cpp

[clang-tidy][NFC] add numeric include for transform_reduce (#193165)

Should probably fix this failure:

```
FAILED: tools/clang/tools/extra/clang-tidy/readability/CMakeFiles/obj.clangTidyReadabilityModule.dir/IdentifierLengthCheck.cpp.o 
ccache /usr/bin/clang++ -D_DEBUG -D_GLIBCXX_ASSERTIONS -D_GLIBCXX_USE_CXX11_ABI=1 -D_GNU_SOURCE -D_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clang-tidy/readability -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/clang-tools-extra/clang-tidy/readability -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/tools/extra/clang-tidy -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/clang/include -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/tools/clang/include -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/include -I/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/llvm/include -fPIC -fno-semantic-interposition -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -pedantic -Wno-long-long -Wc++98-compat-extra-semi -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wno-pass-failed -Wmisleading-indentation -Wctad-maybe-unsupported -fno-omit-frame-pointer -gline-tables-only -fsanitize=thread -fdiagnostics-color -ffunction-sections -fdata-sections -Xclang -fno-pch-timestamp -fno-common -Woverloaded-virtual -Wno-nested-anon-types -O3 -DNDEBUG -UNDEBUG -fno-exceptions -funwind-tables -fno-rtti -std=c++17 -Winvalid-pch -Xclang -include-pch -Xclang /vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/lib/Support/CMakeFiles/LLVMSupport.dir/cmake_pch.hxx.pch -Xclang -include -Xclang /vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/build/lib/Support/CMakeFiles/LLVMSupport.dir/cmake_pch.hxx -MD -MT tools/clang/tools/extra/clang-tidy/readability/CMakeFiles/obj.clangTidyReadabilityModule.dir/IdentifierLengthCheck.cpp.o -MF tools/clang/tools/extra/clang-tidy/readability/CMakeFiles/obj.clangTidyReadabilityModule.dir/IdentifierLengthCheck.cpp.o.d -o tools/clang/tools/extra/clang-tidy/readability/CMakeFiles/obj.clangTidyReadabilityModule.dir/IdentifierLengthCheck.cpp.o -c /vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
/vol/worker/clangd-ubuntu-clang/clangd-ubuntu-tsan/llvm-project/clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp:104:37: error: no member named 'transform_reduce' in namespace 'std'
  104 |   const unsigned LastUseLine = std::transform_reduce(
      |                                ~~~~~^
1 error generated.
```

https://github.com/llvm/llvm-project/pull/185319
DeltaFile
+1-0clang-tools-extra/clang-tidy/readability/IdentifierLengthCheck.cpp
+1-01 files

LLVM/project dac2cb9utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[LLVM][BUILD] Fix for #192887 (#193167)

Build fix for #192887
DeltaFile
+2-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+2-01 files

LLVM/project 6209c8fllvm/test/CodeGen/AArch64 sve-fixed-length-masked-expandloads.ll sve-streaming-mode-fixed-length-masked-expandload.ll, llvm/test/Transforms/LoopVectorize find-last-iv-sinkable-expr.ll

Merge branch 'main' into users/KseniyaTikhomirova/kernel_submit_single_3
DeltaFile
+26,606-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-expandloads.ll
+4,078-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-masked-expandload.ll
+1,604-1,567llvm/test/CodeGen/AArch64/clmul-scalable.ll
+731-1,359llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
+1,957-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-rem.ll
+1,693-0llvm/test/CodeGen/AArch64/sve-fixed-length-masked-div.ll
+36,669-2,9262,074 files not shown
+96,932-35,5712,080 files

LLVM/project f8ddbb2libsycl/test/basic get_backend.cpp submit_fn_ptr.cpp

add tests

Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
DeltaFile
+53-0libsycl/test/basic/get_backend.cpp
+20-0libsycl/test/basic/submit_fn_ptr.cpp
+73-02 files

LLVM/project 12fc684mlir/include/mlir/Dialect/Arith/IR ArithOps.td

improve docs
DeltaFile
+5-0mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
+5-01 files

LLVM/project 357d61fllvm/lib/CodeGen MIRPrinter.cpp, llvm/utils update_mir_regclass_numbers

[MIR] Always print symbolic INLINEASM operands (#192991)

We don't need the flag now that all tests are updated to use symbolic
operands.

Remove the update_mir_regclass_numbers script as it shouldn't be needed
anymore.
DeltaFile
+0-27llvm/utils/update_mir_regclass_numbers
+1-7llvm/lib/CodeGen/MIRPrinter.cpp
+1-342 files