[MLIR][Transform] Return empty handles when the included sequence fails (#169782)
This fixes a bug in the interpreter for transform.include op, which
crashes when attempting to copy out the handles from the yield op of a
failing sequence.
[clang][NFC] Declare `CXXBasePaths::isAmbiguous` as `const`
To make this change, we have to use `lookup` instead of `operator[]` on a map. They both return the same thing: a default constructed value. The difference is that `lookup` default constructs a value and then returns it, whereas `operator[]` default constructs a value, inserts it into the map, and then returns a reference to that. Given that we are using a by-value return, the only way this is different is if a later use of the map depends on a value being at that key.
The map is a private variable of the class, so the only possible users are are other member functions. The only other use of the map that cares about the contents of the map is in `lookupInBases`, and it accesses the map with `operator[]`. This means that attempting to access the same element in this function will default construct the value before doing anything with it, which means it would do the exact thing it needs to do in the case where we are looking up a non-existent key, therefore no behavior has changed.
In terms of performance, this would either be a win or neutral. The benefit is that in some cases, we can avoid a memory allocation just read the contents of a 32-bit `0`. If a call to `isAmbiguous` is always followed up with a call to `lookupInBases`, then we allocate the memory just a little bit later for no difference in performance.
[clang][NFC] Use range-based for loop and algorithms in `SemaDeclCXX.cpp`
This changes most for loops in `SemaDeclCXX.cpp` to use a range-based for loop or a named algorithm. The ones unchanged were more complicated loops that used an index to iterate over multiple ranges, used an index to handle elements being added during insertion, or otherwise were not obvious how to transform them.
[LLDB][PDB] Relax check for resolving breakpoint (#169932)
The test was flaky, because it assumed that the breakpoint was always
resolved before `r` was executed
(https://github.com/llvm/llvm-project/pull/169728#issuecomment-3589799783).
This PR removes the check for this order. It still checks that the
breakpoint is resolved before it is hit.
[BOLT][PAC] Warn about synchronous unwind tables
BOLT currently ignores functions with synchronous PAuth DWARF info.
When more than 10% of functions get ignored for inconsistencies, we
should emit a warning to only use asynchronous unwind tables.
See also: #165215
[BOLT][NFC] Rename Pointer Auth DWARF rewriter passes
Original names were "working titles". After initial patches are merged,
I'd like to rename these passes to names that reflect their intent
better and show their relationship to each other:
InsertNegateRAStatePass renamed to PointerAuthCFIFixup,
MarkRAStates renamed to PointerAuthCFIAnalyzer.
[AMDGPU] Add support for HW_REG_WAVE_SCHED_MODE (#169840)
Expose HW_REG_WAVE_SCHED_MODE to the s_getreg_b32, s_setreg_b32,
s_setreg_imm32_b32 instructions.
[clang][Tooling] Fix `getFileRange` returning a range spanning macro invocation (#169842)
A followup to 40991215f4aba37fd43b65d96ad0a445dcd041b2.
When the start or end token is inside a macro argument and the other is
outside of the macro, we want to reject the range for a similar reason.
The range will include half of the macro call, either the closing paren
or the macro name and open paren.
Reapply "[BOLT][BTI] Skip inlining BasicBlocks containing indirect tailcalls" (#169881)
This reverts commit 9bffb10e8b77b00033f2e997731193f81676cd60.
Fix: added assertions to the requirements of the test
--------
Original commit message:
In the Inliner pass, tailcalls are converted to calls in the inlined
BasicBlock. If the tailcall is indirect, the `BR` is converted to `BLR`.
These instructions require different BTI landing pads at their targets.
As the targets of indirect tailcalls are unknown, inlining such blocks
is unsound for BTI: they should be skipped instead.
[lldb-dap] Add data breakpoints for bytes (#167237)
This patch adds support for `dataBreakpointInfoBytes` capability from
DAP. You can test this feature in VSCode (`Add data breakpoint at
address` button in breakpoints tab).
[AArch64] Fix throughout of 64-bit SVE gather loads (#168572)
In the Neoverse N3 Software Optimisation Guide, SVE non termporal gather
load, vector+scalar 64-bit element size and gather load, vector + imm,
64-bit element size both show throughput of 4/5. However, it currently
shows as 2/3. This patch adds a new resource group in order to show the
correct throughput.
