LLVM / project - FreshBSD

LLVM/project dbac421 — libc/test/src/math/exhaustive sin_test.cpp CMakeLists.txt, libc/utils/mathtools wc_to_bin.py

2026-09-14 02:49:38 UTC by lntue via GitHub on ⎇

main

[libc][math] Fix fast path with small inputs for double precision sin/cos. (#221012)

https://github.com/llvm/llvm-project/pull/201748 added a fast branch for
small inputs to double precision sin/cos,
but the Ziv error bounds were too tight.

Fixes in this PR:
- Updating the Ziv error bounds to accommodate rounding errors.
- Copy binary64 sin/cos hard-to-round cases from the CORE-MATH project.
- Add python tool to convert textual hard to round cases to binary
files, and add those binary files.
- Add hard-to-round tests for double precision sin/cos in the exhaustive
test folder.

Fixes https://github.com/llvm/llvm-project/issues/220934.

Assisted-by: Gemini is used to generate the worst-case text-to-binary
tool.

Delta		File
+1,091,085	-0	libc/test/src/math/exhaustive/sin.wc
+1,090,178	-0	libc/test/src/math/exhaustive/cos.wc
+330	-0	libc/test/src/math/exhaustive/worst_case_test.h
+302	-0	libc/utils/mathtools/wc_to_bin.py
+44	-0	libc/test/src/math/exhaustive/CMakeLists.txt
+26	-0	libc/test/src/math/exhaustive/sin_test.cpp
+2,181,965	-0	10 files not shown
+2,182,045	-7	16 files

LLVM/project 291b60a — llvm/test/MC/LoongArch/Relocations sub-expr.s

2026-09-14 02:33:26 UTC by wanglei via GitHub on ⎇

main

[LoongArch][test] Test 1- and 2-byte subtraction relocations. NFC (#222825)

Add MC tests for 1- and 2-byte subtraction relocations enabled by
#211754.

Delta		File
+24	-2	llvm/test/MC/LoongArch/Relocations/sub-expr.s
+24	-2	1 files

LLVM/project 9e70d8f — clang/test/SemaCXX blocks.cpp

2026-09-14 02:07:59 UTC by Oleksandr Tarasiuk via GitHub on ⎇

main

[Clang][NFC] add additional test coverage for default argument parsing errors (#222556)

Fixes #115280

Delta		File
+10	-0	clang/test/SemaCXX/blocks.cpp
+10	-0	1 files

LLVM/project 6d7e7fb — llvm/lib/Transforms/InstCombine InstCombineCasts.cpp, llvm/test/Transforms/InstCombine uitofp.ll

2026-09-14 00:58:49 UTC by Harrison Hao via GitHub on ⎇

main

[InstCombine] Fold uitofp of masked truncations (#222592)

Fold an unsigned integer-to-floating-point conversion of a masked
truncation by widening the mask and eliminating the truncation:

`uitofp((trunc X) & C)` → `uitofp(X & zext(C))`

Apply the fold when the intermediate instructions have one use and
widening the integer operation is desirable.

This reduces the instruction count on both AMDGPU and NVPTX.

AMDGPU example: https://godbolt.org/z/rTYhM61ce
NVPTX example: https://godbolt.org/z/fWhsrne19

Delta		File
+129	-0	llvm/test/Transforms/InstCombine/uitofp.ll
+20	-0	llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+149	-0	2 files

LLVM/project 32a0ee2 — llvm/docs TypeMetadata.md QualGroup.md

2026-09-14 00:39:46 UTC by Reid Kleckner on ⎇

users/rnk/llvm-md-11b

[LLVM][docs] Convert remaining batch 11 tables to MyST

Delta		File
+109	-98	llvm/docs/ScudoHardenedAllocator.md
+39	-41	llvm/docs/QualGroup.md
+19	-23	llvm/docs/TypeMetadata.md
+167	-162	3 files

LLVM/project 8986fca — llvm/docs SecurityTransparencyReports.md VectorizationPlan.md, llvm/docs/Proposals GitHubMove.md TestSuite.md

2026-09-14 00:39:46 UTC by Reid Kleckner on ⎇

users/rnk/llvm-md-11b

[LLVM][docs] Finish MyST migration for remaining docs (batch 11)

Delta		File
+92	-93	llvm/docs/Projects.md
+86	-85	llvm/docs/Proposals/TestSuite.md
+62	-62	llvm/docs/TableGen/ProgRef.md
+53	-51	llvm/docs/VectorizationPlan.md
+52	-44	llvm/docs/SecurityTransparencyReports.md
+48	-44	llvm/docs/Proposals/GitHubMove.md
+393	-379	19 files not shown
+532	-533	25 files

LLVM/project 2cc0aef — llvm/docs Statepoints.md YamlIO.md, llvm/docs/Proposals GitHubMove.md

2026-09-14 00:39:29 UTC by Reid Kleckner on ⎇

users/rnk/llvm-md-11b

[LLVM][docs] Convert remaining reST docs with rst2myst (batch 11)

Delta		File
+1,431	-1,308	llvm/docs/TableGen/ProgRef.md
+682	-725	llvm/docs/YamlIO.md
+620	-706	llvm/docs/TableGen/BackEnds.md
+615	-612	llvm/docs/Proposals/GitHubMove.md
+412	-498	llvm/docs/TableGen/BackGuide.md
+329	-361	llvm/docs/Statepoints.md
+4,089	-4,210	24 files not shown
+6,892	-7,462	30 files

LLVM/project a13af68 — llvm/docs/Proposals GitHubMove.rst GitHubMove.md, llvm/docs/TableGen BackEnds.rst BackEnds.md

2026-09-14 00:39:29 UTC by Reid Kleckner on ⎇

users/rnk/llvm-md-11b

[LLVM][docs] Rename reST docs to Markdown (batch 11)

Delta		File
+0	-2,287	llvm/docs/TableGen/ProgRef.rst
+2,287	-0	llvm/docs/TableGen/ProgRef.md
+0	-1,213	llvm/docs/TableGen/BackEnds.rst
+1,213	-0	llvm/docs/TableGen/BackEnds.md
+0	-1,083	llvm/docs/Proposals/GitHubMove.rst
+1,083	-0	llvm/docs/Proposals/GitHubMove.md
+4,583	-4,583	54 files not shown
+14,002	-14,002	60 files

LLVM/project 1b0b6b1 — llvm/docs CodeReview.md CIBestPractices.md

2026-09-13 23:42:47 UTC by Reid Kleckner on ⎇

users/rnk/llvm-md-10b

[LLVM][docs] Address batch 10 Markdown review feedback

Delta		File
+72	-372	llvm/docs/ConvergenceAndUniformity.md
+23	-27	llvm/docs/ConvergentOperations.md
+17	-18	llvm/docs/GitBisecting.md
+12	-12	llvm/docs/CIBestPractices.md
+4	-4	llvm/docs/CodeReview.md
+128	-433	5 files

LLVM/project 63d2e62 — clang/include/clang/Lex Preprocessor.h MacroInfo.h, clang/lib/Lex PPMacroExpansion.cpp

2026-09-13 23:42:21 UTC by Kazu Hirata via GitHub on ⎇

main

[clang][Lex] Unique ModuleMacros with a UniquingSet (NFC) (#223270)

This patch migrates ModuleMacros in Preprocessor from llvm::FoldingSet
to llvm::UniquingSet.

ModuleMacro keys on a pair of Module * and const IdentifierInfo *.
Switching to UniquingSet allows us to look up macros with a typed key,
eliminating FoldingSetNodeID serialization at lookup sites and removing
ModuleMacro::Profile.

Assisted-by: Antigravity

Delta		File
+3	-9	clang/include/clang/Lex/MacroInfo.h
+2	-8	clang/lib/Lex/PPMacroExpansion.cpp
+1	-1	clang/include/clang/Lex/Preprocessor.h
+6	-18	3 files

LLVM/project bce20f5 — clang/test/Preprocessor riscv-target-features.c, llvm/lib/Target/RISCV RISCVFeatures.td

2026-09-13 23:11:02 UTC by Zeyi Xu via GitHub on ⎇

main

[RISCV][MC] Add experimental Smidctrl, Ssidctrl, Smnip, and Ssnip support (#218108)

Add experimental MC support for Smidctrl, Ssidctrl, Smnip, and Ssnip
extensions.

This completes MC support for the ACLIC v0.20 extensions.

Delta		File
+46	-0	clang/test/Preprocessor/riscv-target-features.c
+42	-0	llvm/test/MC/RISCV/supervisor-csr-names.s
+42	-0	llvm/test/MC/RISCV/machine-csr-names.s
+18	-0	llvm/lib/Target/RISCV/RISCVFeatures.td
+16	-0	llvm/test/CodeGen/RISCV/attributes.ll
+12	-0	llvm/test/MC/RISCV/attribute-arch.s
+176	-0	6 files not shown
+198	-8	12 files

LLVM/project c577c6c — lldb/test/Shell/Unwind signal-frame-undefined-ra.test, lldb/test/Shell/Unwind/Inputs signal-frame-undefined-ra.s

2026-09-13 22:29:21 UTC by Minsoo Choo via GitHub on ⎇

main

[lldb] Test undefined return addresses in signal frames (#223046)

Signal-frame CFI can explicitly mark its return-address register
undefined to represent a terminal synthetic context. This is useful for
contexts such as newly created FreeBSD kernel threads that do not have
an interrupted caller.

Verify that LLDB keeps the signal frame in the backtrace and terminates
the unwind without creating a caller.

Assisted-by: GPT

Delta		File
+19	-0	lldb/test/Shell/Unwind/Inputs/signal-frame-undefined-ra.s
+18	-0	lldb/test/Shell/Unwind/signal-frame-undefined-ra.test
+37	-0	2 files

LLVM/project 462535b — llvm/test/Transforms/InstCombine known-bits.ll known-bits-bitcast-from-fp.ll

2026-09-13 22:08:25 UTC by Eric Ross via GitHub on ⎇

main

[InstCombine][NFC] Move bitcast from float tests into their own file (#223196)

Delta		File
+360	-0	llvm/test/Transforms/InstCombine/known-bits-bitcast-from-fp.ll
+0	-358	llvm/test/Transforms/InstCombine/known-bits.ll
+360	-358	2 files

LLVM/project 0c4e1a6 — llvm/lib/Transforms/Vectorize VPlanUtils.cpp VPlan.h, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

2026-09-13 22:03:15 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Set the containing plan when creating blocks (NFC). (#223269)

Now that we funnel all VP block creation through VPlan helpers, make
sure the Plan field is set for each block. This means we can remove the
CFG walk to find a Plan's entry.

Also drop an assertion in VPSlotTracker::getOrCreateName: a block now
knows its plan as soon as it is created.

This has a very small positive compile-time impact.

Delta		File
+2	-35	llvm/lib/Transforms/Vectorize/VPlan.cpp
+9	-7	llvm/lib/Transforms/Vectorize/VPlan.h
+2	-2	llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+3	-1	llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+16	-45	4 files

LLVM/project cc6d78e — llvm/lib/Transforms/Vectorize VPlanTransforms.cpp VPlanPatternMatch.h, llvm/test/Transforms/LoopVectorize uniform_across_vf_induction1.ll uniform_across_vf_induction2.ll

2026-09-13 22:00:23 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Fold shifts by zero. (#223276)

Add trivial folds of shifts by zero. This allows us to match IR SCEV
behavior (which looks through trivial shifts), w/o explicitly handling
those in getSCEVExprForVPValue.

Delta		File
+86	-112	llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1_lshr.ll
+12	-36	llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction2.ll
+10	-16	llvm/test/Transforms/LoopVectorize/uniform_across_vf_induction1.ll
+3	-3	llvm/test/Transforms/LoopVectorize/VPlan/vplan-scev-address-idioms.ll
+6	-0	llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+6	-0	llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
+123	-167	3 files not shown
+126	-173	9 files

LLVM/project e33c1e8 — llvm/test/Transforms/LoopVectorize narrow-to-per-lane-replicates.ll

2026-09-13 22:00:14 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Add tests for narrowing users of a widened induction (NFC). (#223277)

Add additional narrowing tests for wide IV including pointer inductions
and FP inductions.

Delta		File
+446	-0	llvm/test/Transforms/LoopVectorize/narrow-to-per-lane-replicates.ll
+446	-0	1 files

LLVM/project e476e76 — bolt/lib/Target/AArch64 AArch64MCPlusBuilder.cpp, llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64ExpandImm.h

2026-09-13 21:32:59 UTC by David Green via GitHub on ⎇

main

[AArch64] Make ImmInsnModel operands optional. NFC (#223280)

This helps make sure we do not use them incorrectly, and should allow
them to
be checked for values in the future.

Delta		File
+18	-17	llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+8	-8	bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+4	-4	llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
+2	-2	llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+2	-2	llvm/lib/Target/AArch64/AArch64ExpandImm.h
+34	-33	5 files

LLVM/project 14acdc2 — flang/docs conf.py

2026-09-13 21:29:16 UTC by Reid Kleckner on ⎇

users/rnk/flang-furo

[flang][docs] Avoid HTML static paths in man-page builds

The Flang man-page source tree intentionally omits HTML static assets. Only add the local Furo stylesheet path for non-man builders so warnings-as-errors documentation builds remain clean.

Delta		File
+1	-1	flang/docs/conf.py
+1	-1	1 files

LLVM/project 4b08871 — clang/test/Analysis/Scalable/source-edit-generation multi-tu-edits-merge.cpp multi-tu-conflict-edits-merge.cpp

2026-09-13 21:08:56 UTC by Ziqing Luo via GitHub on ⎇

main

[SSAF][SourceEdit] Wire in 'clang-ssaf-src-edit-merge' and add multi-TU tests (#220372)

With 'clang-ssaf-src-edit-merge', we can test source edits over multiple
translation units: their Replacements are merged before apply. This
covers both clean merges and conflicts.

Delta		File
+288	-0	clang/test/Analysis/Scalable/source-edit-generation/multi-tu-conflict-edits-merge.cpp
+206	-0	clang/test/Analysis/Scalable/source-edit-generation/multi-tu-edits-merge.cpp
+494	-0	2 files

LLVM/project 4ef24ac — clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations CppBoundedBuffers.cpp, clang/unittests/ScalableStaticAnalysis/SourceTransformation CppBoundedBuffersTest.cpp

2026-09-13 21:06:09 UTC by Ziqing Luo on ⎇

users/ziqingluo/PR-187125348-4

[SSAF][SourceTransformation] Add transformation for new[] and malloc

For a PointerFlowPair, if RHS is an array-new or malloc call and LHS
has bounded type, transform RHS to the bounded-producing alternative
to new[]/malloc.

4th step of
rdar://187125348

Delta		File
+149	-0	clang/unittests/ScalableStaticAnalysis/SourceTransformation/CppBoundedBuffersTest.cpp
+105	-5	clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations/CppBoundedBuffers.cpp
+254	-5	2 files

LLVM/project cf53006 — lldb/source/Plugins/Process/FreeBSD-Kernel-Core ProcessFreeBSDKernelCore.cpp

2026-09-13 21:02:43 UTC by Minsoo Choo via GitHub on ⎇

main

[lldb][Process/FreeBSD-Kernel-Core] Dereference stoppcbs based on target kernel version (#222977)

As of `__FreeBSD_version 1400089` stoppcbs is a pointer to the pcbs
array. Dereference stoppcbs on sufficiently new kernels.

Obtained-from:
https://cgit.freebsd.org/src/commit/?id=0f2bb40bc7ddee7ba329d9b344623e2a186b4046

Delta		File
+14	-0	lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
+14	-0	1 files

LLVM/project 9bf40ce — llvm/lib/Target/AMDGPU SIISelLowering.h AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.s.buffer.load.illegal-types.ll llvm.amdgcn.ptr.s.buffer.load.illegal-types.ll

2026-09-13 20:57:50 UTC by Arseniy Obolenskiy via GitHub on ⎇

main

[AMDGPU] Fix s_buffer_load crash for illegal result types (#215483)

i1, i4, v2i1, v3i16, v6i8, and i128 had no SBUFFER_LOAD selection
pattern and crashed

Load a legal i32/vNi32 carrier instead and narrow/bitcast down to the
requested type

Delta		File
+101	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.illegal-types.ll
+101	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.s.buffer.load.illegal-types.ll
+38	-46	llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+15	-1	llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+6	-0	llvm/lib/Target/AMDGPU/SIISelLowering.h
+261	-47	5 files

LLVM/project 82a18cf — clang/lib/Driver/ToolChains MinGW.cpp, clang/test/Driver mingw.cpp

2026-09-13 20:53:58 UTC by Tomohiro Kashiwada via GitHub on ⎇

main

[Clang][MinGW] Link default-manifest.o if exists (#223084)

Some MinGW distributions provide a pre-compiled manifest xml to disable
the UAC escalation dialog.
Link automatically the manifest only if it exists when linking an
executable.
Do the same as Cygwin (#220875) and align with GCC.

Delta		File
+10	-0	clang/test/Driver/mingw.cpp
+5	-0	clang/lib/Driver/ToolChains/MinGW.cpp
+0	-0	clang/test/Driver/Inputs/mingw_msys2_tree/msys64/mingw32/lib/default-manifest.o
+15	-0	3 files

LLVM/project 89c4368 — llvm/lib/Transforms/Vectorize LoopVectorizationPlanner.h VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize trunc-extended-icmps.ll

2026-09-13 20:53:46 UTC by Florian Hahn via GitHub on ⎇

main

[VPlan] Don't create no-op casts in truncateToMinimalBitwidths. (#223271)

No-op casts get folded to the input operand, which caused applyFlags to
crash if that was not a cast. Fix by avoiding creating such trivial
casts in the first place.

Delta		File
+48	-0	llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
+6	-12	llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+2	-0	llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
+56	-12	3 files

LLVM/project 8497b7a — llvm/lib/Target/AMDGPU SIISelLowering.h BUFInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll llvm.amdgcn.struct.ptr.buffer.load.format.d16.tfe.ll

2026-09-13 20:46:50 UTC by Arseniy Obolenskiy via GitHub on ⎇

main

[AMDGPU] Support TFE D16 format buffer loads on gfx8/10/11/12 (#211465)

gfx90a has no hardware encoding for TFE D16 format buffer loads, so
reject the combination there with a diagnostic. Other targets
(gfx8/10/11/12) do have real encodings, so add codegen support for them
instead of rejecting unconditionally.

Delta		File
+763	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.load.format.d16.tfe.ll
+78	-24	llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+61	-23	llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+26	-0	llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.format.i8.xfail.ll
+14	-0	llvm/lib/Target/AMDGPU/BUFInstructions.td
+2	-2	llvm/lib/Target/AMDGPU/SIISelLowering.h
+944	-49	6 files not shown
+955	-50	12 files

LLVM/project ac8aca0 — llvm/lib/CodeGen/GlobalISel GISelValueTracking.cpp, llvm/test/CodeGen/AArch64/GlobalISel knownbits-insert-subvector.mir

2026-09-13 20:30:14 UTC by Yousef via GitHub on ⎇

main

[GlobalISel] Add KnownBits support for G_INSERT_SUBVECTOR (#215048)

## Summary

Add KnownBits support for `G_INSERT_SUBVECTOR` in GlobalISel value
tracking.

The implementation splits the demanded elements between the original
vector and inserted subvector, ignores overwritten source elements, and
intersects the KnownBits information from the contributing operands.

Part of #150515.

## Testing

- `llvm-lit
llvm/test/CodeGen/AArch64/GlobalISel/knownbits-insert-subvector.mir`
- `llvm-lit llvm/test/CodeGen/AArch64/GlobalISel/knownbits-*.mir`
  - 40/40 passed

Delta		File
+105	-0	llvm/test/CodeGen/AArch64/GlobalISel/knownbits-insert-subvector.mir
+37	-0	llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+36	-0	llvm/unittests/CodeGen/GlobalISel/KnownBitsVectorTest.cpp
+178	-0	3 files

LLVM/project a129f83 — llvm/utils/TableGen AsmMatcherEmitter.cpp

2026-09-13 20:27:05 UTC by Kazu Hirata via GitHub on ⎇

main

[TableGen] Use BitVector for RegisterSet in AsmMatcherEmitter (NFC) (#222525)

This patch replaces std::set with BitVector for RegisterSet in
AsmMatcherEmitter.

Without this patch, RegisterSet is represented as
std::set<const Record *, LessRecordByID>.  On targets with large
register files like AMDGPU (~3,000 registers), repeatedly computing set
intersections and subset checks using std::set nodes incurs
significant overhead.

This patch assigns each register record a dense bit index ordered by
LessRecordByID.  This allows us to represent RegisterSet as a
BitVector, enabling fast bitwise operations for set intersections and
subset checks.

This reduces the wall-clock time of generating AMDGPUGenAsmMatcher.inc
from 39.53s to 31.32s (a 20.8% speedup) across 3 runs while producing
bit-for-bit identical output across all targets.

Assisted-by: Antigravity

Delta		File
+60	-32	llvm/utils/TableGen/AsmMatcherEmitter.cpp
+60	-32	1 files

LLVM/project da57c79 — clang/lib/StaticAnalyzer/Core CallEvent.cpp

2026-09-13 19:59:50 UTC by benedekaibas on ⎇

users/benedekaibas/base-const-obj

[analyzer][NFC] Determine object parameter constness for getExtraInvalidatedValues

Delta		File
+11	-1	clang/lib/StaticAnalyzer/Core/CallEvent.cpp
+11	-1	1 files

LLVM/project eb5c148 — llvm/lib/CodeGen MachineScheduler.cpp, llvm/test/CodeGen/AArch64 cluster-frame-index.mir

2026-09-13 19:44:57 UTC by zhouguangyuan0718 via GitHub on ⎇

main

[MachineScheduler] Order fixed-FI memory operations by object offset (#219669)

## Summary

- sort fixed frame-index memory operands by their explicit stack offsets
- preserve the existing frame-index ordering for ordinary stack objects
and as a tie-breaker
- add an AArch64 MIR regression with fixed objects created out of offset
order

## Background

`BaseMemOpClusterMutation` currently orders frame-index bases by
frame-index number, adjusted for the stack growth direction. Fixed frame
objects are different from ordinary stack objects: they carry explicit
offsets, and their creation order is not required to match address
order.

As a result, a target clustering hook can receive two fixed objects in

    [22 lines not shown]

Delta		File
+49	-0	llvm/test/CodeGen/AArch64/cluster-frame-index.mir
+19	-0	llvm/lib/CodeGen/MachineScheduler.cpp
+68	-0	2 files

LLVM/project 8d2fef4 —

2026-09-13 19:17:45 UTC by Ziqing Luo on ⎇

users/ziqingluo/PR-187125348-3

Merge branch 'users/ziqingluo/PR-187125348-3' of github.com:llvm/llvm-project into users/ziqingluo/PR-187125348-3

 Conflicts:
        clang/lib/ScalableStaticAnalysis/Analyses/PointerFlow/PointerFlowExtractor.cpp
        clang/lib/ScalableStaticAnalysis/SourceTransformation/Transformations/CppBoundedBuffers.cpp

Delta		File
+0	-0	0 files