LLVM/project b5fa9eelibcxx/docs/Status Cxx26Issues.csv, libcxx/include/__memory uninitialized_algorithms.h

[libc++] Implement LWG3918: copy elision in `std::uninitialized_move/_n` (#207692)

This implements [LWG3918](https://wg21.link/LWG3918), which guarantees
copy elision for rvalues in `std::uninitialized_move/_n`. It also
implements [LWG4452](https://wg21.link/LWG4452), a minor correction that
makes the helper added by LWG3918 constexpr.

This additionally fixes a bug in `std::uninitialized_move/_n` where they
could create and then access dangling references. The previous
implementation used the following lambda as an implementation detail:
```c++
[](auto&& __iter) -> decltype(auto) { return std::move(*__iter); }
```
When `__iter` is a prvalue, this creates a temporary object within the
lambda's body and `std::move` then returns a reference to that object.
The reference dangles as soon as control leaves the lambda. This
behavior was not permitted by the standard even before LWG3918.

The new implementation fixes the bug by using a helper,

    [4 lines not shown]
DeltaFile
+63-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move_n.pass.cpp
+60-0libcxx/test/std/utilities/memory/specialized.algorithms/uninitialized.move/uninitialized_move.pass.cpp
+11-2libcxx/include/__memory/uninitialized_algorithms.h
+2-2libcxx/docs/Status/Cxx26Issues.csv
+136-44 files

LLVM/project adfb3bellvm/test/CodeGen/X86 srem-vector-lkk.ll vector-idiv-udiv-512.ll

[X86] Add vXi64 MULHU/MULHS lowering, keeping full-width products scalar (#206983)

Based on the discussion in the PR #169819. 
This lands the unsigned (`MULHU`) and signed (`MULHS`)
`vXi64` high-multiply lowering, plus a guard so full 128-bit products
stay scalar.

### What this does

1. **Lower `ISD::MULHU` for `v4i64`/`v8i64`** via `forceExpandMultiply`
(a `vpmuludq` schoolbook), as in #169819.
2. **Lower `ISD::MULHS` for `v4i64`/`v8i64`, gated on AVX512DQ.** The
signed low multiply is `vpmullq`, so `MULHS` is only marked `Custom`
when DQ (and VL for `v4i64`) is available.
3. **Guard the full-width-product case.** When the *low* half of the
product is also used (a `wyhash`-style `lo ^ hi`), vectorizing just the
high half is redundant with the low half's wide multiply. So, this guard
let a single scalar multiply per lane yield both halves, likewise the
unpatched target already did.

    [31 lines not shown]
DeltaFile
+159-85llvm/test/CodeGen/X86/srem-vector-lkk.ll
+40-174llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+104-88llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
+30-117llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
+70-75llvm/test/CodeGen/X86/urem-vector-lkk.ll
+128-0llvm/test/CodeGen/X86/mulhu-v4i64-umul-lohi-guard.ll
+531-5393 files not shown
+600-6279 files

LLVM/project ac1af12llvm/lib/Target/X86 X86ISelLowering.cpp X86ISelLowering.h, llvm/test/CodeGen/X86/apx ccmp.ll

[X86][CCMP] Lower select(and/or(setcc,...), T, F) as a CCMP chain (#207929)

Fixes: #207886

Assisted-by: Claude Sonnet 4.6
DeltaFile
+118-1llvm/lib/Target/X86/X86ISelLowering.cpp
+112-0llvm/test/CodeGen/X86/apx/ccmp.ll
+3-0llvm/lib/Target/X86/X86ISelLowering.h
+233-13 files

LLVM/project 852286dllvm/lib/Target/Hexagon HexagonISelLowering.cpp

Fix unused variable build failure in Release build (#208195)

Fixes build failure introduced by commit [736771b]
(https://github.com/llvm/llvm-project/commit/736771b6a017b5a18c03819a3348ff793c473261)
into llvm:main

Ref : https://github.com/llvm/llvm-project/pull/207148
Failure : https://lab.llvm.org/buildbot/#/builders/228/builds/4056
DeltaFile
+2-4llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
+2-41 files

LLVM/project 7205d7cclang/docs ReleaseNotes.md, clang/include/clang/Basic ABIVersions.def

[clang][ItaniumMangle] Fix mangling of lambdas in default member initializers of local classes (#206740)

Lambdas appearing in default member initializers of members of local
classes were previously mangled as if they belonged only to the class
scope, ignoring the enclosing function-local context.

This caused different (but same-named) local classes to produce
identical closure type mangling and corresponding RTTI/IR collisions.

Consider the following example:
```
  void foo() {
    {
      struct T {
        std::function<void()> a = [](){ std::cout << "a"; };
      } t;
      t.a();
    }
    {

    [12 lines not shown]
DeltaFile
+79-0clang/test/CodeGenCXX/mangle-lambdas-in-dmi-local-class.cpp
+13-7clang/lib/AST/ItaniumMangle.cpp
+6-6clang/test/CodeGenCXX/mangle-lambdas-gh88906.cpp
+3-3clang/test/CodeGenCXX/dtor-local-lambda-mangle.cpp
+5-0clang/include/clang/Basic/ABIVersions.def
+3-0clang/docs/ReleaseNotes.md
+109-166 files

LLVM/project 6008f67llvm/test/CodeGen/AArch64/GlobalISel knownbits-vector.mir knownbits-fshl-fshr.mir

[AArch64][GlobalISel] Update scalar types in knownbits tests. NFC (#208199)
DeltaFile
+447-447llvm/test/CodeGen/AArch64/GlobalISel/knownbits-vector.mir
+95-95llvm/test/CodeGen/AArch64/GlobalISel/knownbits-fshl-fshr.mir
+87-87llvm/test/CodeGen/AArch64/GlobalISel/knownbits-uadde.mir
+87-87llvm/test/CodeGen/AArch64/GlobalISel/knownbits-sadde.mir
+80-80llvm/test/CodeGen/AArch64/GlobalISel/knownbits-add.mir
+79-79llvm/test/CodeGen/AArch64/GlobalISel/knownbits-rotl-rotr.mir
+875-87527 files not shown
+1,622-1,62233 files

LLVM/project 2abc195libc/fuzzing/arpa/inet inet_ntop_differential_fuzz.cpp CMakeLists.txt

[libc] Add a differential fuzzer for inet_ntop (#207977)

The first byte of the input is used to select the address class and the
size of the output buffer. The rest is used as the input.

We compare the results and also check that our implementation does not
overflow the buffer.

Assisted by Gemini.
DeltaFile
+106-0libc/fuzzing/arpa/inet/inet_ntop_differential_fuzz.cpp
+9-0libc/fuzzing/arpa/inet/CMakeLists.txt
+115-02 files

LLVM/project 0470117llvm/lib/Target/AArch64 SVEInstrFormats.td AArch64SVEInstrInfo.td, llvm/test/CodeGen/AArch64 sve-pred-ldst.ll sve-calling-convention-byref.ll

[LLVM][CodeGen][SVE] Make use of predicate load/store "mul vl" addressing mode. (#206997)
DeltaFile
+193-0llvm/test/CodeGen/AArch64/sve-pred-ldst.ll
+17-47llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
+28-13llvm/lib/Target/AArch64/SVEInstrFormats.td
+0-20llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+0-18llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+0-2llvm/lib/Target/AArch64/AArch64InstrFormats.td
+238-1006 files

LLVM/project 179badcflang/docs FAQ.md

[flang][docs] Add a mention about -fsafe-trampoline to FAQ.md (#207656)

Co-authored-by: Tarun Prabhu <tarunprabhu at gmail.com>
DeltaFile
+4-0flang/docs/FAQ.md
+4-01 files

LLVM/project 95eef8cllvm/include/llvm/IR Instructions.h IRBuilder.h, llvm/lib/CodeGen AtomicExpandPass.cpp

[IR][NFC] Add LoadStoreProperties to copy load/store attrs (#206470)

Introduce a small `LoadStoreProperties` struct plus get/setAttributes on
`LoadInst` and `StoreInst` so volatile/align/ordering/syncscope can be
copied together instead of one field at a time. Switch the obvious load->load
and store->store clone sites over to it.
DeltaFile
+40-0llvm/include/llvm/IR/Instructions.h
+11-20llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
+12-0llvm/lib/IR/Instructions.cpp
+11-0llvm/include/llvm/IR/IRBuilder.h
+4-6llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+2-8llvm/lib/CodeGen/AtomicExpandPass.cpp
+80-346 files

LLVM/project 2d829f6llvm/docs HowToUpdateDebugInfo.rst, llvm/include/llvm/Transforms/Utils Debugify.h

[Debugify] Simplify debugify for locations (#207374)

This patch attempts to improve the performance of debugify for
locations, by relying on coverage tracking to replace most of the
functionality provided via the DILocations map, in exchange for losing
the ability to distinguish between "dropped" and "not-generated" bugs,
and requiring coverage tracking to determine when new bugs appear in a
pass instead of reporting the same bug repeatedly across passes.

This patch is not without cost; the justifications for using it are
that:
- Debugify locations is incredibly expensive; on a local build, without
using any coverage-tracking, this patch takes the build time for sqlite3
down from ~15 minutes to ~10 seconds.
- The difference between "dropped" and "not-generated" is a minor detail
of a bug - besides helping to determine the cause of the bug, which
origin-tracking can do with more accuracy, there's no fundamental
difference in the correctness of either. Furthermore, almost no
"dropped" bugs appear in the compiler anymore (since the debug location

    [4 lines not shown]
DeltaFile
+54-104llvm/lib/Transforms/Utils/Debugify.cpp
+7-7llvm/docs/HowToUpdateDebugInfo.rst
+0-2llvm/include/llvm/Transforms/Utils/Debugify.h
+1-1llvm/unittests/Transforms/Utils/DebugifyTest.cpp
+62-1144 files

LLVM/project b4b9fbblibc/hdr/types sa_family_t.h CMakeLists.txt, libc/test/src/sys/socket/linux CMakeLists.txt sockaddr_storage_test.cpp

[libc] Add a proxy header for sa_family_t (#207736)

This patch adds `hdr/types/sa_family_t.h` and updates socket tests and
helpers to use it instead of directly including `<sys/socket.h>` or
`include/llvm-libc-types/sa_family_t.h`.

The patch also adds a couple of includes of `hdr/types/socklen_t.h` for
files that are using the type, but not including it directly.

Assisted by Gemini.
DeltaFile
+27-0libc/hdr/types/sa_family_t.h
+8-0libc/hdr/types/CMakeLists.txt
+7-0libc/test/src/sys/socket/linux/CMakeLists.txt
+2-3libc/test/src/sys/socket/linux/sockaddr_storage_test.cpp
+1-1libc/test/src/sys/socket/linux/sockaddr_storage_helper.cpp
+2-0libc/test/src/sys/socket/linux/connect_accept_test.cpp
+47-42 files not shown
+50-48 files

LLVM/project 5166feallvm/lib/Target/AArch64/GISel AArch64PreLegalizerCombiner.cpp, llvm/test/CodeGen/AArch64/GlobalISel uaddo-8-16-bits.mir

[AArch64][GlobalISel] Use integer types in applySimplifyUADDO (#207962)

This avoids creating some scalar types in the IR, using integer types
for constants from a uaddo combine instead.
DeltaFile
+12-12llvm/test/CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir
+2-2llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
+14-142 files

LLVM/project 76f49f8llvm/lib/Transforms/Scalar DFAJumpThreading.cpp, llvm/test/Transforms/DFAJumpThreading br-debuglocs.ll br-debuglocs2.ll

[DFAJumpThreading] Propagate DebugLocs to branches in select unfolding (#205851)

When DFAJumpThreading replaces a select with control flow, it generates
new blocks, new branches in those blocks, and potentially replaces the
branch in an existing block. Prior to this patch, none of these branches
were assigned debug locations; this patch replaces them as follows:

For the case where we generate two new blocks between the select block
and use block, and use a PHI of those blocks to replace the select, we
use the select's debug location for the branch instructions, since they
are doing the work of the select.

For the case where we generate one new block and replace the
unconditional branch from the select block with a conditional branch to
the new block and the use block, we treat the new branches as replacing
both the select and the original branch, so each branch takes the merged
location of the original select+br.

This patch also ensures that when we create a new path which would end

    [2 lines not shown]
DeltaFile
+97-0llvm/test/Transforms/DFAJumpThreading/br-debuglocs.ll
+77-0llvm/test/Transforms/DFAJumpThreading/br-debuglocs2.ll
+17-3llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
+191-33 files

LLVM/project c1fd542llvm/lib/Transforms/InstCombine InstCombineCasts.cpp, llvm/test/Transforms/InstCombine zext-sub-trunc.ll rotate.ll

[InstCombine] Fold zext(sub(0, trunc(X))) to and(sub(0, X), mask) (#207564)

Problem: vector rotate and funnel shift fails to fold for vectors > 16
bytes on AVX-512. This is because of the `trunc` and `zext`
instructions.

Example:
```llvm
define dso_local <8 x i64> @baz(<8 x i64> %0, <8 x i64> %1) local_unnamed_addr {
Entry:
  %2 = trunc <8 x i64> %1 to <8 x i6>
  %3 = sub <8 x i6> zeroinitializer, %2
  %4 = zext <8 x i6> %3 to <8 x i64>
  %5 = shl <8 x i64> %0, %4
  %6 = and <8 x i64> %1, splat (i64 63)
  %7 = lshr <8 x i64> %0, %6
  %8 = or <8 x i64> %5, %7
  ret <8 x i64> %8
}

    [5 lines not shown]
DeltaFile
+57-0llvm/test/Transforms/InstCombine/zext-sub-trunc.ll
+32-0llvm/test/Transforms/InstCombine/rotate.ll
+9-0llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+98-03 files

LLVM/project 0f17499llvm/lib/CodeGen/SelectionDAG SelectionDAGISel.cpp

[CodeGen][NFC] Remove stray SDag BFI computation with NewPM (#208181)

This looks like an accident -- there's no need to compute the
BlockFrequencyInfo unconditionally and then discarding it. After this,
enabling the NewPM CodeGen pipeline is faster than the legacy PM.
DeltaFile
+0-1llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+0-11 files

LLVM/project 9a465c3orc-rt CMakeLists.txt

[orc-rt] Refactor CMakeLists.txt for readability. NFCI. (#208156)

Groups related options, adds comments and separators.
DeltaFile
+19-11orc-rt/CMakeLists.txt
+19-111 files

LLVM/project 4ddfd96llvm/lib/IR Instruction.cpp, llvm/test/Transforms/SimplifyCFG hoist-with-metadata.ll

[IR] Preserve !nofpclass in dropUBImplyingAttrsAndMetadata (#208186)

`!nofpclass` is a poison-generating metadata kind, so it should be
preserved by dropUBImplyingAttrsAndMetadata().
DeltaFile
+39-18llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll
+6-5llvm/lib/IR/Instruction.cpp
+45-232 files

LLVM/project 024a691llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/AArch64 vector-reverse.ll

[VPlan] Pull out reverses and splice.lefts from elementwise operations (#199234)

InstCombine pulls reverses up and out of operations, e.g.
`binop(reverse(x), reverse(y)) -> reverse(binop(x,y))`. This reduces the
overall number of reverses, and also allows the `reverse(reverse(x))`
combine to kick in much more.

This implements the same canonicalization in VPlan which allows for more
vectorization due to cost model improvements, and generally handles more
cases when there's predication involved. 

If we have a reversed load and reversed store whose stores are now
eliminated, we will be left with just two reversed masks on the load and
store. But with EVL tail folding this will leave behind a
`splice.right(ops(splice.left(...)))` pair on the value from memory.

InstCombine can fold away a pair of `vp.reverse(ops(vp.reverse(...)))`,
but it can't fold a pair of splices. So to prevent regressions we also
have to pull splice.lefts like `ops(splice.left(poison, x, evl)) ->

    [2 lines not shown]
DeltaFile
+139-54llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
+86-55llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
+36-36llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
+18-50llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
+66-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+18-12llvm/test/Transforms/LoopVectorize/AArch64/vector-reverse.ll
+363-20712 files not shown
+401-26618 files

LLVM/project 2f07e6bclang/include/clang/AST TypeBase.h, clang/lib/AST Type.cpp

[Clang] Fix missing vtable for `dynamic_cast<FinalClass &>(*this)` in a function template (#207349)

This is a follow-up to #202594, which fixed a pointer cast, but not
a reference cast. Surprisingly, `CXXDynamicCastExpr::getType()`
for a reference cast is a `RecordType` and not a `ReferenceType`.

How this happens:
In `Sema::BuildCXXNamedCast`, a `CastOperation Op` variable
is constructed. The `CastOperation` constructor initializes
`ResultType(destType.getNonLValueExprType(S.Context))`
where `QualType::getNonLValueExprType` turns a `ReferenceType` into
a `RecordType`. `Sema::BuildCXXNamedCast` then passes `Op.ResultType`
to `CXXDynamicCastExpr::Create`.
DeltaFile
+14-0clang/test/CodeGenCXX/dynamic-cast-exact.cpp
+4-1clang/lib/Sema/SemaTemplateInstantiate.cpp
+1-1clang/include/clang/AST/TypeBase.h
+1-1clang/lib/AST/Type.cpp
+20-34 files

LLVM/project 5f33a29llvm/lib/Transforms/Vectorize VPlanValue.h VPlanTransforms.cpp

[VPlan] Introduce VPConstant VPIRValue (NFC) (#207387)

There a gap in the VPIRValue class hierarchy, where constant live-ins
are absent, when this is in fact a very common case. The motivation of
introducing this new class is to refine optimizations to account for the
fact that non-constant live-ins need broadcast.
DeltaFile
+19-5llvm/lib/Transforms/Vectorize/VPlanValue.h
+3-4llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+22-92 files

LLVM/project d582a7dflang-rt/lib/runtime io-api-server.cpp

[flang-rt] Fix io-api-server when building for arm64ec (#207998)
DeltaFile
+5-0flang-rt/lib/runtime/io-api-server.cpp
+5-01 files

LLVM/project dd37265llvm/include/llvm/Transforms/Utils Local.h BasicBlockUtils.h, llvm/lib/CodeGen CodeGenPrepare.cpp

[CodeGenPrepare] Cache known-live PHIs when deleting dead PHI chains (#207191)

This patch fixes a compile-time issue in CodeGenPrepare for huge
functions.

`DeleteDeadPHIs` may repeatedly prove overlapping PHI chains non-dead.
For very large functions, many PHIs can share the same non-dead def-use
suffix, causing the same suffix to be scanned many times.

Add an `KnownNonDeadPHIs` cache to `RecursivelyDeleteDeadPHINode`
and `DeleteDeadPHIs`. When a chain is proven non-dead, visited PHIs are
recorded so later queries can stop once they reach one of them.

This reduces the pathological CodeGenPrepare case from ~30mins to ~30s.
DeltaFile
+14-5llvm/lib/Transforms/Utils/BasicBlockUtils.cpp
+16-3llvm/lib/Transforms/Utils/Local.cpp
+5-4llvm/include/llvm/Transforms/Utils/Local.h
+4-3llvm/include/llvm/Transforms/Utils/BasicBlockUtils.h
+2-1llvm/lib/CodeGen/CodeGenPrepare.cpp
+41-165 files

LLVM/project 0b8d6efflang/lib/Optimizer/OpenMP HostOpFiltering.cpp, flang/test/Lower/OpenMP function-filtering-4.f90 host-eval.f90

[Flang][MLIR][OpenMP] Move host op filtering to the omp dialect

The MLIR pass that removes operations exclusively intended for the host
from OpenMP target offload modules is currently defined as part of
Flang. However, this is a feature that would benefit from being reusable
by other frontends, as removing such operations is a requirement for all
OpenMP target device modules prior to LLVM IR translation.

By moving the `omp-host-op-filtering` pass out of Flang, it had to be
updated to work on a lower-level LLVM dialect-based representation,
rather than FIR. This simplified some of the existing edge cases, such
as `fir.declare` ops and `fir.boxchar` type handling. In addition, new
function arguments are introduced as placeholders and return values from
host-only functions are removed, producing a cleaner result and
simplifying the pass as compared to previously.

As a result of a later execution of this pass, dynamic dispatch of host
functions via dispatch table using `fir.dispatch`, `fir.type_info` and
`fir.dt_entry` ops would break due to the removal of `fir.dt_entry`

    [6 lines not shown]
DeltaFile
+0-560flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
+500-0mlir/test/Dialect/OpenMP/host-op-filtering.mlir
+0-422flang/lib/Optimizer/OpenMP/HostOpFiltering.cpp
+292-0mlir/lib/Dialect/OpenMP/Transforms/HostOpFiltering.cpp
+63-0flang/test/Lower/OpenMP/function-filtering-4.f90
+18-32flang/test/Lower/OpenMP/host-eval.f90
+873-1,0147 files not shown
+920-1,04613 files

LLVM/project fdfdcb6flang/lib/Optimizer/OpenMP HostOpFiltering.cpp, flang/test/Transforms/OpenMP function-filtering-host-ops.mlir

[Flang][MLIR][OpenMP] Fix declare_target globals visibility

This patch introduces various changes to the handling of
`declare_target` global variables in Flang:
- Non-`declare_target` globals are unconditionally made "internal" when
  compiling for an OpenMP offload target. This prevents potential symbol
  redefinition issues related to globals that don't actually exist on the
  device.
- Local SAVE variables handling for OpenMP offloading programs is fixed to
  prevent their associated "internal" linkage from producing broken
  device code for `declare_target enter(...)`.
- When globals are indirectly accessed from the target device (e.g.
  `declare_target link(...)`), the associated and unused full-storage
  global is marked with "internal" linkage to facilitate later removal.
- `declare_target device_type(host) enter(...)` variables are set to
  external linkage when compiling for a target device, causing linker
  errors if accessed. This mirrors Clang's behavior.
DeltaFile
+252-0mlir/test/Target/LLVMIR/omptarget-declare-target-all-device-types-device.mlir
+44-9mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+20-5flang/lib/Optimizer/OpenMP/HostOpFiltering.cpp
+17-4flang/test/Transforms/OpenMP/function-filtering-host-ops.mlir
+1-0mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-device.mlir
+334-185 files

LLVM/project cd85482llvm/lib/Target/AArch64 AArch64MacroFusion.cpp, llvm/test/CodeGen/AArch64 misched-fusion-arith-cbz.mir misched-fusion-arith-cbz.ll

[AArch64] Add missing arithmetic to arith+cb(n)z clustering (#203721)

This patch adds a few missing opcodes for arithmetic+CB(N)Z clustering.
Most of them complement an already existing rr/rs variant for
pre/post-RA coverage. The only one which is completely new is ORN which
I think can be reasonably expected to behave similarly on AArch64
targets.
DeltaFile
+506-0llvm/test/CodeGen/AArch64/misched-fusion-arith-cbz.mir
+144-0llvm/test/CodeGen/AArch64/misched-fusion-arith-cbz.ll
+10-0llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+660-03 files

LLVM/project 293a55cllvm/test/CodeGen/AArch64/GlobalISel inline-memcpy.mir inline-memmove.mir

[GlobalISel][AArch64] Remove IRs from inline-{memcpy,memmove} tests (NFC) (#208066)
DeltaFile
+62-111llvm/test/CodeGen/AArch64/GlobalISel/inline-memcpy.mir
+43-85llvm/test/CodeGen/AArch64/GlobalISel/inline-memmove.mir
+105-1962 files

LLVM/project dcf1b8fclang/include/clang/AST DeclFriend.h, clang/lib/AST ASTImporter.cpp

[Clang] support friend declarations with a dependent nested-name-specifier (#191268)

Fixes #104057

---

This patch adds support for friend declarations with a dependent NNS
DeltaFile
+658-105clang/lib/Sema/SemaAccess.cpp
+257-10clang/test/CXX/temp/temp.decls/temp.friend/p5.cpp
+131-90clang/lib/Sema/SemaDeclCXX.cpp
+137-58clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+24-101clang/include/clang/AST/DeclFriend.h
+92-18clang/lib/AST/ASTImporter.cpp
+1,299-38235 files not shown
+1,822-59241 files

LLVM/project eb4690cflang/include/flang/Evaluate tools.h, flang/lib/Evaluate tools.cpp

[flang][Lower] Add alternative real expression lowering (#207371)

This is opt-in by an engineering option and disabled by default.

In section 10.1.5.2.4 of the 2023 Fortran standard "Evaluation of
numerical intrinsic operations", the standard explicitly allows
alternate mathematically equivalent lowerings. For example the source
expression X + Y + Z could be evaluated (X + Y) + Z, X + (Y + Z) or even
(X + Z) + Y, etc.

The open source benchmark SNBone shows significantly better results with
classic flang because classic flang emits real arithmetic expressions in
a different order. In the case of this benchmark it reduces dependency
depth for instructions issued to the vector unit, allowing for more of
the arithmetic to be parallelised over multiple vector execution units
in the ALU.

The lowering added by this patch tries to mimic the way classic flang
orders instructions for these expressions. I did not read any classic

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DeltaFile
+748-0flang/test/Lower/split-sum-expression-tree-lowering.f90
+148-0flang/lib/Evaluate/tools.cpp
+21-0flang/include/flang/Evaluate/tools.h
+16-1flang/lib/Lower/Bridge.cpp
+1-0flang/lib/Lower/ConvertExprToHLFIR.cpp
+934-15 files

LLVM/project e1f7b53lld/COFF Driver.cpp, lld/test/COFF arm64x-hybridobj.s

[LLD][COFF] Add support for multi-arch ARM64X object files (#207868)
DeltaFile
+98-0lld/test/COFF/arm64x-hybridobj.s
+12-0lld/COFF/Driver.cpp
+110-02 files