LLVM/project 38d2732llvm/include/llvm/Transforms/Scalar DropUnnecessaryAssumes.h, llvm/lib/Transforms/Scalar DropUnnecessaryAssumes.cpp

[DropAssumes] Print drop-deref in pipeline where appropriate (#211905)

drop-deref was added as an option in #166947 and is parsed correctly,
but is not serialized. This can make it difficult to reduce test cases,
especially automatically with llvm/utils/reduce_pipeline.py.

This patch implements printPipeline() to serialize drop-deref where
appropriate.
DeltaFile
+8-0llvm/lib/Transforms/Scalar/DropUnnecessaryAssumes.cpp
+3-0llvm/test/Other/new-pm-print-pipeline.ll
+3-0llvm/include/llvm/Transforms/Scalar/DropUnnecessaryAssumes.h
+14-03 files

LLVM/project 458b207mlir/lib/Dialect/OpenACC/Transforms ACCRoutineLowering.cpp

[OpenACC][NFC] Minor clean up in ACCRoutineLowering. (#213333)

Minor NFC clean up after recent changes to remove nohost handling from
ACCRoutineLowering.

Assisted-by: Codex
DeltaFile
+8-12mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineLowering.cpp
+8-121 files

LLVM/project d0d8c85llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 vector-shuffle-combining.ll

[X86] getTargetConstantBitsFromNode - ensure constant data is from a vector type (#213360)

Fixes #213251
DeltaFile
+58-2llvm/test/CodeGen/X86/vector-shuffle-combining.ll
+17-15llvm/lib/Target/X86/X86ISelLowering.cpp
+75-172 files

LLVM/project b1d084bflang/test/Semantics modfile84.f90 modfile85.f90

[flang][NFC] Rename modfile84.f90 to modfile85.f90
DeltaFile
+0-46flang/test/Semantics/modfile84.f90
+46-0flang/test/Semantics/modfile85.f90
+46-462 files

LLVM/project 1cf3b70llvm/include/llvm/Analysis IRSimilarityIdentifier.h, llvm/include/llvm/Transforms/IPO IROutliner.h

[IPO] Remove IR Outliner (#211971)

The IR Outliner has major bugs and no active maintainer, and is disabled
by default. The new LLVM Policy states the pass should be removed.

This commit removes:
- The IROutliner pass
- The IRSimilarity analysis
- The `llvm-sim` executable, used for understanding the latter
- All tests of the above

Related discussion:
https://discourse.llvm.org/t/ir-outliner-status-interest/89672
DeltaFile
+0-2,975llvm/lib/Transforms/IPO/IROutliner.cpp
+0-2,850llvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
+0-1,519llvm/lib/Analysis/IRSimilarityIdentifier.cpp
+0-1,192llvm/include/llvm/Analysis/IRSimilarityIdentifier.h
+0-469llvm/include/llvm/Transforms/IPO/IROutliner.h
+0-405llvm/test/Transforms/IROutliner/opt-remarks.ll
+0-9,410123 files not shown
+3-18,737129 files

LLVM/project 6ac9761llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/lib/Transforms/Vectorize/SLPVectorizer SLPCompatibilityAnalysis.cpp SLPCompatibilityAnalysis.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+47-54llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-fmul.ll
+64-9llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+19-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.h
+13-0llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
+143-634 files

LLVM/project 5ca2b93flang-rt/lib/cuda allocator.cpp, flang/test/Lower/CUDA cuda-return01.cuf

[flang-rt][cuda] Skip scope-exit cleanup when the context has a sticky error (#213184)

A sticky CUDA error (e.g. an illegal memory access in a kernel) leaves
the primary context active but unusable, so CUFDeviceIsActive() reports
it as fine and the compiler-generated scope-exit frees abort a program
that ran to completion: 'cudaFree(p)' failed with
'cudaErrorIllegalAddress'.

Detect this by freeing a null pointer, a no-op that still reports the
sticky error. It runs only once the primary context is known active, so
it cannot lazily create one.
DeltaFile
+7-0flang-rt/lib/cuda/allocator.cpp
+6-0flang/test/Lower/CUDA/cuda-return01.cuf
+13-02 files

LLVM/project 36187cellvm/test/Transforms/SLPVectorizer/X86 fmuladd-copyable-fmul.ll

[SLP][NFC]Add an extra check for fmul to fmuladd promotion, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213361
DeltaFile
+138-0llvm/test/Transforms/SLPVectorizer/X86/fmuladd-copyable-fmul.ll
+138-01 files

LLVM/project 96c356allvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 runtime-alias-checks-scheduled-order.ll

[SLP]Keep scheduled order when moving body in alias-check versioning

The scheduler physically reorders the block before versioning, and
emission insertion points depend on that order. Moving the body by the
pre-scheduling snapshot scrambled it and produced use-before-def IR.
Move in the block's current order instead, filtered to the original
body so the emitted check instructions stay in the header block.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/213358
DeltaFile
+100-0llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-scheduled-order.ll
+6-4llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+106-42 files

LLVM/project a10e70bclang/lib/Driver/ToolChains Cuda.cpp, clang/test/Driver cuda-cross-compiling.c cuda-external-tools.cu

[NVPTX] Pass `-Xcuda-ptxas` to the nvlink wrapper for LTO (#213351)

Summary:
This allows `-foffload-lto -fgpu-rdc -Xcuda-ptxas` to work properly by
forwarding it.
DeltaFile
+13-0clang/test/OffloadTools/clang-nvlink-wrapper/nvlink-wrapper.c
+9-0clang/test/Driver/cuda-external-tools.cu
+6-0clang/lib/Driver/ToolChains/Cuda.cpp
+4-0clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
+4-0clang/test/Driver/cuda-cross-compiling.c
+2-0clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
+38-06 files

LLVM/project 320164dlldb/source/ValueObject ValueObject.cpp, lldb/test/API/python_api/value/change_ptr Makefile main.c

[lldb] Avoid returning a stale AddressOf (#212915)

The 'ValueObject::AddressOf()' method assumes that the address of a
value object cannot change, so when it is calculated once, it does not
need to be updated afterwards. However, this is not the case if the
'ValueObject' is a dependent object obtained by calling 'Dereference()'
of another 'ValueObject'. If the latter object is changed, the dependent
value object should return a new address from the 'AddressOf()' method
to reflect the change.
DeltaFile
+65-0lldb/test/API/python_api/value/change_ptr/TestChangePtr.py
+31-0lldb/test/API/python_api/value/change_ptr/main.c
+4-3lldb/source/ValueObject/ValueObject.cpp
+3-0lldb/test/API/python_api/value/change_ptr/Makefile
+103-34 files

LLVM/project 9f97974clang/include/clang/Basic OffloadArch.h, clang/lib/Basic Cuda.cpp

clang: Replace Is*OffloadArch free functions with OffloadArch methods

Drop the IsNVIDIAOffloadArch/IsAMDOffloadArch/IsIntel*OffloadArch free
functions in favor of the OffloadArch member predicate functions.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+29-19clang/unittests/Basic/OffloadArchTest.cpp
+6-6clang/lib/Driver/Driver.cpp
+0-9clang/include/clang/Basic/OffloadArch.h
+4-4clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
+2-2clang/lib/Basic/Cuda.cpp
+1-1clang/lib/Driver/ToolChains/Clang.cpp
+42-411 files not shown
+43-427 files

LLVM/project 13a962cclang/include/clang/Basic OffloadArch.h, clang/lib/Basic Cuda.cpp OffloadArch.cpp

clang: Store vendor GPU kinds in OffloadArch instead of re-listing GPUs

OffloadArch was a flat enum that hand-duplicated every AMDGPU and NVPTX
targets, plus a few edge cases. This was yet another place that needed
updating every time a new target is added, which should now be avoided.
Replace with a tagged union-like scheme.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
DeltaFile
+103-143clang/include/clang/Basic/OffloadArch.h
+73-136clang/lib/Basic/OffloadArch.cpp
+42-19clang/unittests/Basic/OffloadArchTest.cpp
+12-28clang/lib/Basic/Cuda.cpp
+12-14clang/lib/Driver/Driver.cpp
+12-13clang/lib/Driver/ToolChains/Cuda.cpp
+254-3537 files not shown
+277-37113 files

LLVM/project e423bac.github/workflows/require-team-membership action.yml

workflows/require-team-membership: Fix typo (#212686)
DeltaFile
+1-1.github/workflows/require-team-membership/action.yml
+1-11 files

LLVM/project c260047llvm/lib/Transforms/Vectorize VPlanTransforms.h

Drop now unnecessary include
DeltaFile
+0-1llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+0-11 files

LLVM/project 230e5d9llvm/lib/Target/AArch64 AArch64FrameLowering.cpp AArch64InstrInfo.cpp, llvm/test/CodeGen/AArch64 zero-call-used-regs-no-neon.ll

[AArch64] Fix zero-call-used-regs crash on targets without NEON (#211603)

## Summary

`-fzero-call-used-regs=all` crashes on AArch64 targets without NEON
support, such as `-mgeneral-regs-only` or `-march=armv8-a+nosimd`. The
former is a common configuration used by the Linux kernel.

```c
int p(int a) { return a + 1; }
```

```sh
$ clang --target=aarch64-linux-gnu -O2 -S -mgeneral-regs-only \
        -fzero-call-used-regs=all test.c -o -

Assertion failed: (STI.hasNEON() && "Expected to have NEON."),
buildClearRegister
```

    [17 lines not shown]
DeltaFile
+138-0llvm/test/CodeGen/AArch64/zero-call-used-regs-no-neon.ll
+4-4llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+4-1llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+146-53 files

LLVM/project bdfc8aellvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Clamp later
DeltaFile
+20-16llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+20-161 files

LLVM/project 7ee607fllvm/lib/Transforms/Vectorize VPlanTransforms.cpp

Add a comment per code review
DeltaFile
+3-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+3-01 files

LLVM/project ec2bf56clang/lib/Sema SemaDeclCXX.cpp, clang/test/AST ast-dump-union-copy-move-assign.cpp ast-dump-union-assign-explicit-object.cpp

[Clang][Sema] Synthesize a memcpy body for defaulted union assignment (#206579)

A defaulted copy or move assignment operator for a union is synthesized
with an empty body. `DefineImplicitCopyAssignment` /
`DefineImplicitMoveAssignment` skip union members in the memberwise
loop, and the implied copy of the object representation has no AST
representation, a FIXME that has sat at that skip for a long time. The
operator ends up copying nothing.

Classic CodeGen hides this at ordinary call sites by lowering a trivial
assignment to a memcpy at the call site, so `u1 = u2` works even though
the operator body is a no-op. But when the operator is genuinely called,
through a pointer-to-member for instance, it silently copies nothing.
ClangIR calls the assignment operator at the call site rather than
eliding it, so it hits the empty body directly and drops every union
assignment. The no-op is then deleted at `-O3`. That is the MultiSource
`kc` miscompile, where a `YYSTYPE` union assignment (`*++yyvsp =
yylval`) becomes a no-op.


    [37 lines not shown]
DeltaFile
+59-0clang/test/CodeGenCXX/union-copy-move-assignment.cpp
+44-4clang/lib/Sema/SemaDeclCXX.cpp
+35-0clang/test/AST/ast-dump-union-assign-explicit-object.cpp
+34-0clang/test/AST/ast-dump-union-copy-move-assign.cpp
+33-0clang/test/SemaCXX/union-assign-memcpy-nontrivial.cpp
+33-0clang/test/CIR/CodeGen/union-copy-move-assignment.cpp
+238-48 files not shown
+340-3314 files

LLVM/project 6512cd9compiler-rt/www index.html

[compiler-rt] [docs] Clean up explanation of `__fixunsdfdi` (#212624)

Replace "is compiling into" with "results in"

---------

Co-authored-by: hulxv <hulxxv at gmail.com>
DeltaFile
+1-1compiler-rt/www/index.html
+1-11 files

LLVM/project e1871dclibc/src/__support freestore.h, libc/test/src/__support freestore_test.cpp freelist_heap_test.cpp

[libc][__support] Implement exact linear binning for TLSFFreeStoreImpl

Previously, size_to_bit_index used size >> UNIT_SIZE_LOG2 for linear bins,
which mapped size 24 to bin 1 and size 17 to bin 1, causing a mismatch
between allocation request sizes and physical block bucket sizes.

This change introduces exact mapping for linear bins:
- Introduces LINEAR_BINS to compute the exact number of linear bins needed
  to reach the exponential table boundary (29 on MSVC Windows where UNIT_SIZE is 8,
  31 on Linux where UNIT_SIZE is 16).
- Sizes <= MIN_INNER_SIZE map to bin 0.
- Larger linear sizes map to ((size - MIN_INNER_SIZE - 1) >> UNIT_SIZE_LOG2) + 1.
- Uses LINEAR_BINS as the base index for exponential bins in size_to_bit_index,
  index_to_min_size, and find_and_remove_fit, ensuring strict monotonicity
  across all indices without runtime clamping.
- Adds NegativeTestForFullHeap unit test in freelist_heap_test.cpp and updates
  freestore_test.cpp.

TAG=agy
CONV=cff84e8c-ee22-4f39-af3c-344d1e6f417b
DeltaFile
+37-18libc/src/__support/freestore.h
+9-0libc/test/src/__support/freelist_heap_test.cpp
+3-2libc/test/src/__support/freestore_test.cpp
+49-203 files

LLVM/project 56f0811libc/src/__support freestore.h

[libc][__support] Clean up index_to_min_size clamping by introducing LINEAR_BINS

Instead of forcing EXP_BASE (32) linear bins and clamping min_size with cpp::min,
this change introduces LINEAR_BINS to calculate the exact number of linear bins
needed to reach the exponential table boundary (29 on MSVC Windows where UNIT_SIZE is 8,
31 on Linux where UNIT_SIZE is 16).

Using LINEAR_BINS as the transition threshold in size_to_bit_index, index_to_min_size,
and find_and_remove_fit eliminates all runtime clamping, padding bins, and overshooting
while preserving strict monotonicity across all indices.

TAG=agy
CONV=cff84e8c-ee22-4f39-af3c-344d1e6f417b
DeltaFile
+11-7libc/src/__support/freestore.h
+11-71 files

LLVM/project f99ee4fflang/lib/Semantics mod-file.cpp, flang/test/Semantics modfile84.f90

[flang][cuda][openacc] Emit an error when CUDA symbols are imported with CUDA disabled (#205427)

Only look for for module symbols.
DeltaFile
+46-0flang/test/Semantics/modfile84.f90
+28-0flang/lib/Semantics/mod-file.cpp
+74-02 files

LLVM/project 68b7feaclang/lib/AST/ByteCode InterpBuiltin.cpp Compiler.cpp, clang/test/Sema offsetof-unsigned-index.c

[clang] Follow-up fixes for offsetof unsigned index change (#207808)

- Rename CastNoOverflow to CastAPToOffsetIndex for clarity
- Add parentheses in overflow guard condition in InterpBuiltin.cpp
- Improve comment explaining why 0x8000000000000000 is rejected

AI Tool Use: GitHub Copilot (Claude Sonnet 4.6) was used to assist in
identifying and drafting the fix. The fix was reviewed, tested, and
validated manually.

---------

Co-authored-by: Cadanus da Costa <maccosta at beenox.com>
DeltaFile
+4-3clang/lib/AST/ByteCode/Interp.h
+3-2clang/lib/AST/ByteCode/Opcodes.td
+3-1clang/test/Sema/offsetof-unsigned-index.c
+1-1clang/lib/AST/ByteCode/InterpBuiltin.cpp
+1-1clang/lib/AST/ByteCode/Compiler.cpp
+12-85 files

LLVM/project 582f924utils/bazel/llvm-project-overlay/mlir BUILD.bazel

[Bazel] Fixes 71e5cb7 (#213330)

This fixes 71e5cb7526151701f2e2c4e37eaa20d1763c7cd4 (#213165).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=71e5cb7526151701f2e2c4e37eaa20d1763c7cd4

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+32-1utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+32-11 files

LLVM/project 02bde07.github/workflows release-binaries.yml

workflows/release-binaries: Move environment declaration to upload job (#212687)

This is the only job that actually needs to use the environment secrets,
so the environment must be declared. We were using secrets in the
prepare job to do a permissions check, but this is unnecessary, because
that job does not do anything that is security sensitive.

Only the upload job needs to have these permission checks and these are
already included in the upload-release-artifact composite action.
DeltaFile
+3-11.github/workflows/release-binaries.yml
+3-111 files

LLVM/project 8631e82llvm/lib/Transforms/Scalar LoopFuse.cpp, llvm/test/Transforms/LoopFusion loop_invariant.ll

[LoopFusion] Allow loop fusion for idempotent output dependency (#206401)

Loop Fusion incorrectly blocks fusion of loops that write the same value
to two arrays.  Writing the same value twice produces identical observable results
regardless of execution order, so fusion is safe (whether the two arrays are aliased or not). 

Fixes #94676

Co-authored-by: AntonyCJ30 <cj6186609 at gmail@gmail.com>
DeltaFile
+82-1llvm/test/Transforms/LoopFusion/loop_invariant.ll
+8-0llvm/lib/Transforms/Scalar/LoopFuse.cpp
+90-12 files

LLVM/project e0162eallvm/lib/Target/AMDGPU SIISelLowering.h SIISelLowering.cpp, llvm/test/CodeGen/AMDGPU fcanonicalize-elimination.bf16.ll

[AMDGPU] Do not treat bitcast across FP types as canonicality-preserving (#203560)

isCanonicalized recursed through ISD::BITCAST ignoring the type change,
so value canonical as v2bf16 was wrongly treated as canonical when
bitcast to v2f16 (that has different exponent width), dropping a
required fcanonicalize
DeltaFile
+41-15llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+21-0llvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.bf16.ll
+9-0llvm/lib/Target/AMDGPU/SIISelLowering.h
+71-153 files

LLVM/project b53cccfllvm/lib/Target/AMDGPU AMDGPUImageIntrinsicOptimizer.cpp, llvm/test/CodeGen/AMDGPU llvm.amdgcn.image.load.2dmsaa.ll

[AMDGPU] Fix ImageIntrinsicOptimizer DMask check starting at wrong arg index (#213264)
DeltaFile
+27-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
+1-1llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
+28-12 files

LLVM/project 6bc4a8cllvm/lib/Transforms/IPO OpenMPOpt.cpp

const -> constexpr
DeltaFile
+1-1llvm/lib/Transforms/IPO/OpenMPOpt.cpp
+1-11 files