LLVM/project edc5f47utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[bazel][AVR] Fix 930a46d2379914172f9e9e5e108510aa43fb7934 (#204264)

Add AVR to the intrinsics list
DeltaFile
+4-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+4-01 files

LLVM/project 8bea2ffclang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat TUSummaryEncoding.cpp LUSummary.cpp, clang/unittests/ScalableStaticAnalysisFramework EntityLinkerTest.cpp

Reland "[clang][ssaf] Track target triple in TU and LU summaries. #204027" (#204259)

This commit introduces the following changes:

- Add `TargetTriple` field to `TUSummary`, `LUSummary`, and their encodings.
- Frontend captures the triple from `CompilerInstance::getTarget()` when extracting a TU summary.
- JSON format reads/writes a `target_triple` field at the root of each summary; reader rejects strings not in `llvm::Triple::normalize` form.
- All TU/LU JSON test inputs/outputs and unit tests updated to include the new field.
    
`clang-ssaf-linker` uses a hardcoded triple value for the link unit; surfacing the triple through the tool will be handled in a follow-up PR.
    
rdar://179403011
DeltaFile
+24-1clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/TUSummaryEncoding.cpp
+24-1clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/LUSummary.cpp
+24-1clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/LUSummaryEncoding.cpp
+24-1clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/TUSummary.cpp
+12-9clang/unittests/ScalableStaticAnalysisFramework/EntityLinkerTest.cpp
+16-0clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
+124-13177 files not shown
+573-175183 files

LLVM/project 0852756lldb/test/API/lang/cpp/abi_tag_structors TestAbiTagStructors.py, lldb/test/API/lang/cpp/namespace TestNamespaceLookup.py

[lldb][test] Skip even more unsupported tests on WebAssembly (#204255)

A second pass over the full API suite for tests that depend on features
unavailable on wasm32-wasip1 or in LLDB's Wasm support:

- Expression evaluation (skipIfWasm) for the C++ tests that the
"expression" category doesn't cover, since that category only applies to
commands/expression/*.

- Attaching to a running process (skipIfWasm). These tests have the
harness spawn the inferior as a host process and then attach, but a
.wasm module isn't a native executable, so exec'ing it fails with
ENOEXEC ("Exec format error"). The wasm module only runs inside the
runtime (e.g. iwasm) that LLDB launches, so there is no host process to
attach to.

Where a test also has supported, passing cases, the decorator is applied
per method.
DeltaFile
+4-1lldb/test/API/lang/cpp/symbols/TestSymbols.py
+4-1lldb/test/API/lang/cpp/operators/TestCppOperators.py
+4-1lldb/test/API/lang/cpp/printf/TestPrintf.py
+3-0lldb/test/API/lang/cpp/abi_tag_structors/TestAbiTagStructors.py
+3-0lldb/test/API/lang/cpp/namespace/TestNamespaceLookup.py
+2-0lldb/test/API/python_api/hello_world/TestHelloWorld.py
+20-318 files not shown
+39-524 files

LLVM/project dec01d8llvm/lib/Target/DirectX DXContainerPDB.cpp

Use c_str for formatv
DeltaFile
+2-2llvm/lib/Target/DirectX/DXContainerPDB.cpp
+2-21 files

LLVM/project 9ededdaclang/lib/CodeGen CGCall.cpp, clang/test/CodeGenHLSL/resources cbuffer_struct_passing.hlsl

[HLSL] Codegen for passing cbuffer structs as function args (#203961)

Constant buffer structs are in `hlsl_constant` address space and have a
different layout than structs in default address space. They need to be
copied element-by-element and not by `memcpy`.

This change adds a check for the `hlsl_constant` address space to the
code path that avoids materializing a temporary copy for simple
`CK_LValueToRValue ` casts. This makes sure the constant buffer structs
is copied element-by-element to a temporary before being passed to a
function.
DeltaFile
+120-0clang/test/CodeGenHLSL/resources/cbuffer_struct_passing.hlsl
+11-7clang/lib/CodeGen/CGCall.cpp
+131-72 files

LLVM/project 2208263lldb/bindings/python CMakeLists.txt, lldb/examples/python delayed_enable.py

Add a useful command to the python examples & "lldb.utils" (#204251)

When debugging GUI programs where you have a bunch of breakpoints set
that you only want to have trigger when in the middle of some UI
interaction (a drag and drop for example) but not before, you need a way
to have the breakpoints disabled till a certain point, then re-enabled.
But since you are in the middle of the interaction, you can't interact
with the debugger to do that.

This little command disables your breakpoints, continues if you were
stopped, waits for a prescribed interval, then re-enables them.
DeltaFile
+69-0lldb/examples/python/delayed_enable.py
+1-0lldb/bindings/python/CMakeLists.txt
+70-02 files

LLVM/project 33b2aa3llvm/lib/Target/Mips/AsmParser MipsAsmParser.cpp, llvm/lib/Target/RISCV RISCVInstrInfoY.td RISCVInstrInfoZc.td

rebase

Created using spr 1.3.8-beta.1
DeltaFile
+171-0llvm/test/TableGen/getRegClassFromMatchKind.td
+80-0llvm/utils/TableGen/AsmMatcherEmitter.cpp
+0-22llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+8-8llvm/lib/Target/RISCV/RISCVInstrInfoY.td
+5-5llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
+1-0llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+265-359 files not shown
+274-3515 files

LLVM/project 6d2a201llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

Merge branch 'main' into users/ilovepi/clang-trap-unreachable
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+92,890-85,927llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+44,396-53,126llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+28,845-27,920llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+643,593-166,97338,347 files not shown
+4,718,876-1,847,02438,353 files

LLVM/project 5639b33compiler-rt/lib/scudo/standalone combined.h, compiler-rt/lib/scudo/standalone/tests combined_test.cpp

[scudo] For a realloc that shrinks, retag the extra. (#204031)

When MTE is enabled and an allocations is reallocated from a large size
to a smaller size, zero tag the rest of the allocation. Before this
change only a single granule after the new size was zero tagged. This
adds extra security and use after realloc protection if code would have
tried to read/write into the old size, past the new size.
DeltaFile
+38-0compiler-rt/lib/scudo/standalone/tests/combined_test.cpp
+17-7compiler-rt/lib/scudo/standalone/combined.h
+55-72 files

LLVM/project 1e3b03dllvm/lib/Target/BPF/AsmParser BPFAsmParser.cpp, llvm/lib/Target/M68k/AsmParser M68kAsmParser.cpp

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+171-0llvm/test/TableGen/getRegClassFromMatchKind.td
+80-0llvm/utils/TableGen/AsmMatcherEmitter.cpp
+1-0llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp
+1-0llvm/lib/Target/BPF/AsmParser/BPFAsmParser.cpp
+1-0llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
+1-0llvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
+255-06 files not shown
+261-012 files

LLVM/project 212ae44llvm/lib/Target/AMDGPU/Disassembler CMakeLists.txt

AMDGPU: Add TargetParser to disassembler dependencies (#204250)

Should fix build failure after #203979, but should be reverted
in #204150
DeltaFile
+1-0llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
+1-01 files

LLVM/project e604dbellvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

restack on top of main instead

Created using spr 1.3.8-beta.1
DeltaFile
+0-465llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+12-274llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+0-199llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+0-144llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+38-78llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+0-93llvm/test/MC/RISCV/rvy/rvy-invalid-load-store.s
+50-1,25340 files not shown
+170-1,85146 files

LLVM/project f2d2d98bolt/runtime instr.cpp, bolt/test/runtime setup-race.cpp

[BOLT] Delay indirect call pointer setup (#204229)

There is a race in the instrumentation runtime during setup. The setup
initializes the function pointers for indirect call instrumentation
before the indirect call counters array. If the application spawns a
background thread through a constructor (as does jemalloc), the
background thread has a chance to derefence that uninitialized array
pointer. Defer initialization of these function pointers to prevent this
race.

Fixes #198181.

Co-authored-by: Fabian Parzefall <parzefall at meta.com>
DeltaFile
+45-0bolt/test/runtime/setup-race.cpp
+6-2bolt/runtime/instr.cpp
+51-22 files

LLVM/project 312bd8allvm/include/llvm/IR IntrinsicsAMDGPU.td, llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp SIISelLowering.cpp

[AMDGPU] Guard more intrinsics with target features
DeltaFile
+1-51llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+0-42llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+0-24llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+15-2llvm/include/llvm/IR/IntrinsicsAMDGPU.td
+4-4llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
+4-4llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
+24-12712 files not shown
+45-14318 files

LLVM/project 9486b07clang/lib/CodeGen CodeGenAction.cpp, llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp

[RFC][CodeGen] Add generic target feature checks for intrinsics

This PR adds target-independent infrastructure for annotating LLVM intrinsics
with required subtarget feature expressions.

It introduces a TargetFeatures string field to intrinsic TableGen records.
TableGen emits an intrinsic-to-feature mapping table.

Both SelectionDAG and GlobalISel now perform this check before lowering target
intrinsics. This allows targets to opt in by annotating intrinsic definitions
directly, rather than adding custom checks during lowering, legalization, or
instruction selection.

This PR uses one AMDGPU intrinsic as an example.
DeltaFile
+96-3llvm/lib/MC/MCSubtargetInfo.cpp
+37-0clang/lib/CodeGen/CodeGenAction.cpp
+36-0llvm/lib/IR/DiagnosticInfo.cpp
+33-1llvm/utils/TableGen/Basic/IntrinsicEmitter.cpp
+28-0llvm/test/TableGen/intrinsic-target-features.td
+25-0llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+255-414 files not shown
+391-920 files

LLVM/project 2ff7220llvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/MC/RISCV/rvy rvyc-valid-load-store.s rvy-valid-load-store.s

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+0-465llvm/test/MC/RISCV/rvy/rvyc-valid-load-store.s
+12-274llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+0-199llvm/test/MC/RISCV/rvy/rvy-valid-load-store.s
+0-144llvm/test/MC/RISCV/rvy/rvyc-invalid-load-store.s
+38-78llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+0-93llvm/test/MC/RISCV/rvy/rvy-invalid-load-store.s
+50-1,25328 files not shown
+157-1,86934 files

LLVM/project ac131ebclang/lib/CodeGen CodeGenModule.cpp, clang/test/CodeGenCXX cxx20-nttp-object-layout.cpp

[Clang][CodeGen] Fix C++20 NTTP object field indexing (#204174)

C++20 allows a class object to be used as a non-type template
parameter. For example, a template can take an object of a struct like
`{ char A; long long B; char C; char First[2]; char Second[2]; }`.

That struct has padding before `B`. The constant emitter can represent
the value with an ordinary LLVM struct and let LLVM provide that padding
implicitly. Normal record CodeGen instead uses the memory type for the
record, which may contain explicit padding fields so C++ fields have
stable LLVM field numbers.

The bytes are laid out the same, but the LLVM field numbers are not.
For the normal padded record type, `First` has one field index. For the
compact constant type, that same index names a later field. Clang was
computing the field index for the padded record type, then applying it
to the compact template parameter object type. As a result, reading
`First` could read from the bytes for `Second` instead.


    [3 lines not shown]
DeltaFile
+44-0clang/test/CodeGenCXX/cxx20-nttp-object-layout.cpp
+3-2clang/lib/CodeGen/CodeGenModule.cpp
+47-22 files

LLVM/project e6a0490clang/lib/Format DefinitionBlockSeparator.cpp, clang/unittests/Format DefinitionBlockSeparatorTest.cpp

[clang-format] Stop inserting blank line in disabled region (#201995)

Previously, a blank got inserted before the `// clang-format off`
comment with the `SeparateDefinitionBlocks` option set.

Fixes #106983 and #146317.
DeltaFile
+30-0clang/unittests/Format/DefinitionBlockSeparatorTest.cpp
+5-0clang/lib/Format/DefinitionBlockSeparator.cpp
+35-02 files

LLVM/project e6f0dfbllvm/lib/Target/AMDGPU/Disassembler CMakeLists.txt

AMDGPU: Add TargetParser to disassembler dependencies

Should fix build failure after #203979, but should be reverted
in #204150
DeltaFile
+1-0llvm/lib/Target/AMDGPU/Disassembler/CMakeLists.txt
+1-01 files

LLVM/project 0b0e0b4lldb/test/API/commands/target/create-deps TestTargetCreateDeps.py, lldb/test/API/functionalities/always-run-threads TestAlwaysRunThreadNames.py

[lldb][test] Skip unsupported tests on WebAssembly (#204245)

Mark more tests that rely on features unavailable on wasm32-wasip1 (or
in LLDB's Wasm support): expression evaluation (skipIfWasm), shared
libraries (skipIfTargetDoesNotSupportSharedLibraries), threads
(skipIfTargetDoesNotSupportThreads), and llvm-strip --keep-symbol, which
the Wasm object format doesn't support. Where a test also has supported,
passing cases, the decorator is applied per method.

The "expression" category is already skipped for Wasm, but that only
covers commands/expression/*, where the category is set by a
"categories" file. The tests in this PR live elsewhere and merely use
expression evaluation incidentally, so they aren't in that category and
need skipIfWasm directly.
DeltaFile
+2-1lldb/test/API/lang/c/register_variables/test.c
+1-1lldb/test/API/lang/c/struct_types/TestStructTypes.py
+2-0lldb/test/API/python_api/unnamed_symbol_lookup/TestUnnamedSymbolLookup.py
+1-0lldb/test/API/tools/lldb-dap/module/TestDAP_module.py
+1-0lldb/test/API/commands/target/create-deps/TestTargetCreateDeps.py
+1-0lldb/test/API/functionalities/always-run-threads/TestAlwaysRunThreadNames.py
+8-210 files not shown
+18-216 files

LLVM/project e443271clang/lib/Driver/ToolChains Clang.cpp, clang/test/Driver objc-constant-literals.m

[Driver] Re-enable -fobjc-constant-literals by default (#204208)

This reverts 4d154f6ea5eb ([Driver] Disable -fobjc-constant-literals by
default (#195000)), which was a temporary measure to unblock a project
that the original constant-literal change (#185130) broke.

For background on the feature and the discussion that led to disabling
and then re-enabling it, see
https://github.com/llvm/llvm-project/pull/185130.

rdar://179823193
DeltaFile
+4-4clang/test/Driver/objc-constant-literals.m
+1-1clang/lib/Driver/ToolChains/Clang.cpp
+5-52 files

LLVM/project 790dee3clang/test/Analysis/Scalable/PointerFlow multi-dim-pointer-flow-constraint.test

[SSAF][WPA] Add a lit test for the WPA improvement of #198889 (#204018)

This commit adds a lit test, which is an example of the issue solved by
#198889 and was discovered independently when applying the analysis to a
real project.

rdar://179754164
DeltaFile
+41-0clang/test/Analysis/Scalable/PointerFlow/multi-dim-pointer-flow-constraint.test
+41-01 files

LLVM/project 4f8ee48llvm/test/CodeGen/RISCV clmul.ll clmulr.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll clmul-sdnode.ll

rebase

Created using spr 1.3.8-beta.1
DeltaFile
+38,494-84,026llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+22,388-22,086llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+19,087-24,391llvm/test/CodeGen/RISCV/clmul.ll
+10,473-12,572llvm/test/CodeGen/RISCV/clmulr.ll
+10,281-12,374llvm/test/CodeGen/RISCV/clmulh.ll
+8,361-8,920llvm/test/CodeGen/RISCV/rvv/expandload.ll
+109,084-164,3697,614 files not shown
+712,306-458,3407,620 files

LLVM/project 6d4d7eallvm/test/CodeGen/RISCV clmul.ll clmulr.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll clmul-sdnode.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+38,494-84,026llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+22,388-22,086llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+19,087-24,391llvm/test/CodeGen/RISCV/clmul.ll
+10,473-12,572llvm/test/CodeGen/RISCV/clmulr.ll
+10,281-12,374llvm/test/CodeGen/RISCV/clmulh.ll
+8,361-8,920llvm/test/CodeGen/RISCV/rvv/expandload.ll
+109,084-164,3697,614 files not shown
+712,311-458,3457,620 files

LLVM/project 107e314llvm/test/CodeGen/AMDGPU llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll, llvm/test/CodeGen/X86 fptosi-sat-vector-512.ll fptoui-sat-vector-512.ll

rebase after factoring out cleanup commit

Created using spr 1.3.8-beta.1
DeltaFile
+7,323-0llvm/test/CodeGen/X86/fptosi-sat-vector-512.ll
+6,132-0llvm/test/CodeGen/X86/fptoui-sat-vector-512.ll
+5,788-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
+4,289-1,259llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
+3,840-1,215llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
+3,473-0llvm/test/CodeGen/X86/fptosi-sat-vector-256.ll
+30,845-2,475681 files not shown
+57,240-7,629687 files

LLVM/project 9230b21llvm/test/CodeGen/AMDGPU llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll, llvm/test/CodeGen/X86 fptosi-sat-vector-512.ll fptoui-sat-vector-512.ll

[𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.8-beta.1

[skip ci]
DeltaFile
+7,323-0llvm/test/CodeGen/X86/fptosi-sat-vector-512.ll
+6,132-0llvm/test/CodeGen/X86/fptoui-sat-vector-512.ll
+5,788-1llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
+4,289-1,259llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
+3,840-1,215llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
+3,473-0llvm/test/CodeGen/X86/fptosi-sat-vector-256.ll
+30,845-2,475689 files not shown
+57,307-7,694695 files

LLVM/project 9006a2cllvm/lib/Target/RISCV RISCVRegisterInfo.td, llvm/test/MC/RISCV rv32c-invalid.s rv64c-invalid.s

[RISC-V][MC] Improve the diagnostic for invalid compressed register number

Instead of a generic `invalid operand for instruction`, print
`register must be a GPR from x8 to x15` instead.

Pull Request: https://github.com/llvm/llvm-project/pull/204237
DeltaFile
+12-12llvm/test/MC/RISCV/rv32c-invalid.s
+4-4llvm/test/MC/RISCV/rv64c-invalid.s
+2-2llvm/test/MC/RISCV/rvc-hints-invalid.s
+2-2llvm/test/MC/RISCV/xqcibm-invalid.s
+1-0llvm/lib/Target/RISCV/RISCVRegisterInfo.td
+21-205 files

LLVM/project 6b52ab2llvm/lib/Target/RISCV RISCVInstrInfoC.td RISCVInstrInfoXqci.td

[RISC-V] Rename GPRCMem operand to BasePtrC. NFC

This is in preparation for https://github.com/llvm/llvm-project/pull/177073
where these operands can refer to either a GPR or YGPR depending on the
current HwMode.

Pull Request: https://github.com/llvm/llvm-project/pull/204241
DeltaFile
+30-30llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+25-25llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
+18-18llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
+16-16llvm/lib/Target/RISCV/RISCVInstrInfoXwch.td
+6-6llvm/lib/Target/RISCV/RISCVInstrInfoZclsd.td
+1-1llvm/lib/Target/RISCV/RISCVInstrInfo.td
+96-966 files

LLVM/project 6e8c2dcclang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat TUSummary.cpp LUSummaryEncoding.cpp, clang/unittests/ScalableStaticAnalysisFramework EntityLinkerTest.cpp

Revert "Reland "[clang][ssaf] Track target triple in TU and LU summaries"" (#204236)

Reverts llvm/llvm-project#204218

Fails amdgpu buildbots
DeltaFile
+1-24clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/TUSummary.cpp
+1-24clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/LUSummaryEncoding.cpp
+1-24clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/LUSummary.cpp
+1-24clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/TUSummaryEncoding.cpp
+9-12clang/unittests/ScalableStaticAnalysisFramework/EntityLinkerTest.cpp
+0-16clang/lib/ScalableStaticAnalysisFramework/Core/Serialization/JSONFormat/JSONFormatImpl.cpp
+13-124170 files not shown
+175-566176 files

LLVM/project 3aea0a0llvm/utils/gn/secondary/clang/lib/CodeGen BUILD.gn

[gn build] Port 930a46d23799 (#204244)
DeltaFile
+1-0llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn
+1-01 files