LLVM/project 953e8ebllvm/lib/Target/AArch64 AArch64PerfectShuffle.cpp AArch64PerfectShuffle.h, llvm/test/CodeGen/X86 vector-interleaved-store-i16-stride-7.ll

Merge branch 'main' into users/zero9178/mlir-llvm-byte-type
DeltaFile
+8,699-3,233llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
+3,944-4,148llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
+6,583-0llvm/lib/Target/AArch64/AArch64PerfectShuffle.cpp
+3-6,571llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
+0-6,200llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16.txt
+4,380-0llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16-fake16.txt
+23,609-20,1523,153 files not shown
+182,663-91,3293,159 files

LLVM/project 41a6f5dclang CMakeLists.txt

[clang][CMake][Darwin] Make HOST_LINK_VERSION a CACHE option on Darwin  (#203917)

This allows specifying a fixed host linker version during Clang
configuration (e.g. -DHOST_LINK_VERSION=1249), bypassing the default
auto-detection. This is useful for hermetic packaging scripts where the
auto-detected host linker might differ from the intended target linker,
and we do not want certain features to be enabled that depends on the
host linker version -- e.g.
https://github.com/llvm/llvm-project/issues/203385
DeltaFile
+5-2clang/CMakeLists.txt
+5-21 files

LLVM/project 0a0e758mlir/lib/Dialect/LLVMIR/IR LLVMTypes.cpp, mlir/test/Dialect/LLVMIR types-invalid.mlir

also reject 0-bit bitwidth
DeltaFile
+5-3mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
+8-0mlir/test/Dialect/LLVMIR/types-invalid.mlir
+13-32 files

LLVM/project 7395107mlir/include/mlir/Dialect/LLVMIR LLVMTypes.td, mlir/lib/Dialect/LLVMIR/IR LLVMTypes.cpp

add verifier for bitwidth
DeltaFile
+12-1mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp
+8-0mlir/test/Dialect/LLVMIR/types-invalid.mlir
+1-0mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
+21-13 files

LLVM/project 4c3f839clang/test/Analysis/Scalable/PointerFlow multi-dim-pointer-flow-constraint.test

[SSAF][WPA] Add a lit test for the WPA improvement of #198889

This commit adds a lit test, which is an example of the issue solved
by #198889 and was discovered independently when applying the analysis
to a real project.

rdar://179754164
DeltaFile
+41-0clang/test/Analysis/Scalable/PointerFlow/multi-dim-pointer-flow-constraint.test
+41-01 files

LLVM/project 2c4b18butils/bazel/llvm-project-overlay/libc BUILD.bazel

[Bazel] Fixes 96f1b89 (#204010)

This fixes 96f1b89a90613b16f4b9346b60dd81038cb8d86d.

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+3-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+3-01 files

LLVM/project db420c0clang/test/Analysis/Scalable/PointerFlow multi-dim-pointer-flow-constraint.test

[SSAF][WPA] Add a lit test for the WPA improvement of #198889

This commit adds a lit test, which is an example of the issue solved
by #198889 and was discovered independently when applying the analysis
to a real project.

rdar://179754164
DeltaFile
+35-0clang/test/Analysis/Scalable/PointerFlow/multi-dim-pointer-flow-constraint.test
+35-01 files

LLVM/project 3768c52mlir/include/mlir/Dialect/LLVMIR LLVMTypes.td

Update mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td

Co-authored-by: Fabian Mora <fmora.dev at gmail.com>
DeltaFile
+1-1mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.td
+1-11 files

LLVM/project ca7933elibcxx/include optional, libcxx/test/std/utilities/optional/optional.object optional_helper_types.h

[libc++] Disable mistakenly enabled `optional<T&>` constructors for `optional<T>` (#194446)

Resolves #194415

- A constructor specifically meant for `optional<T&>` was left enabled
for `optional<T>`
- Fix it, and add a test to check for regression.
- This patch also corrects the constraints for `optional(optional<U>&)`
and `optional(const optional<U>&)` , as they were incorrectly
disallowing [valid conversions](https://godbolt.org/z/1r5Ea7z5M)
- Also, correct the `noexcept` specification.
- Add tests for both corrections.

(cherry picked from commit 239189ca28847aa4797368827107c22c32080509)
DeltaFile
+38-1libcxx/test/std/utilities/optional/optional.object/optional_helper_types.h
+35-0libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/optional_U.pass.cpp
+31-0libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_optional_U.pass.cpp
+15-11libcxx/include/optional
+3-5libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/ref_constructs_from_temporary.verify.cpp
+122-175 files

LLVM/project c2047f9llvm/lib/Transforms/InstCombine InstCombineCalls.cpp, llvm/test/Transforms/InstCombine modular-format.ll

[LLVM] Fix vprintf modular format with constant format string (#203422)

The vprintf family of functions cannot readily have their arguments
scanned for type, but this isn't an obstacle when the format string is a
known constant. This change only requires argument examination as a
fallback when the format string is unknown.

Generated by Gemini; edited and reviewed by hand.
DeltaFile
+12-7llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+12-0llvm/test/Transforms/InstCombine/modular-format.ll
+24-72 files

LLVM/project 23a60f1libc/shared/math cbrtf16.h, libc/src/__support/math cbrtf16.h

[libc][math][c23] Implement higher math function `cbrtf16` in LLVM libc (#132484)

This PR implements `cbrtf16` for half precision float (`float16`).

Closes #132199.

---------

Signed-off-by: Krishna Pandey <kpandey81930 at gmail.com>
DeltaFile
+185-0libc/src/__support/math/cbrtf16.h
+56-0libc/test/src/math/cbrtf16_test.cpp
+33-0libc/test/src/math/smoke/cbrtf16_test.cpp
+28-0libc/shared/math/cbrtf16.h
+21-0libc/src/math/cbrtf16.h
+19-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+342-022 files not shown
+427-128 files

LLVM/project 1c3cc84lldb/source/Commands CommandObjectTarget.cpp, lldb/source/Symbol FuncUnwinders.cpp

[lldb] Enforce that ArchDefaultUnwindPlans declare other regs unfetch (#203684)

I noticed a few of the ABI plugins were not setting
UnspecifiedRegistersAreUndefined()==true in their UnwindPlan rows. This
prevents the unwind engine from trying to fetch registers from any newer
stack frames.

The arch default unwind plans are used by lldb when it doesn't have any
accurate information about the registers a function has spilled to
stack, or where -- it only knows enough to continue walking the stack,
assuming all the functions have stored the caller's pc & fp to stack. It
is the last-ditch fallback when we backtrace through no-symbol /
no-unwind info code.

Normally when the unwind engine does not see a non-volatile aka
callee-preserved register mentioned in an UnwindPlan, that means this
function did not save the register to stack, it left the reg contents
unmodified. So if we are looking for x12 in frame 3, and frame 2 doesn't
mention x12 in its UnwindPlan, we will look in frame 1 to see if it

    [11 lines not shown]
DeltaFile
+31-1lldb/source/Target/RegisterContextUnwind.cpp
+24-3lldb/test/API/macosx/riscv32-corefile/TestRV32MachOCorefile.py
+16-2lldb/test/API/macosx/riscv32-corefile/riscv32-registers.yaml
+8-1lldb/source/Symbol/FuncUnwinders.cpp
+6-0lldb/tools/yaml2macho-core/Utility.cpp
+5-0lldb/source/Commands/CommandObjectTarget.cpp
+90-78 files not shown
+105-914 files

LLVM/project 97009b9mlir/lib/Dialect/Affine/IR AffineOps.cpp, mlir/test/Dialect/Affine canonicalize.mlir

[mlir][affine] Fix crash in `SplitDelinearizeSpanningLastLinearizeArg` (#201879)

`SplitDelinearizeSpanningLastLinearizeArg` reads the last element of the
source `affine.linearize_index`'s static basis via
`linearizeOp.getStaticBasis().back()` without checking that the basis is
non-empty.

Other canonicalization patterns can legitimately create an
`affine.linearize_index` with no inputs (and therefore an empty basis):
`CancelDelinearizeOfLinearizeDisjointExactTail` peels the matched
trailing
basis off both the linearize and the delinearize, and when every
linearize
input is part of the matched tail the rewritten linearize is left with
no
inputs. When the resulting delinearize is then visited by
`SplitDelinearizeSpanningLastLinearizeArg`, `.back()` is called on an
empty
`ArrayRef`, tripping the `assert(!empty())` in `ArrayRef::back()` (or

    [16 lines not shown]
DeltaFile
+18-0mlir/test/Dialect/Affine/canonicalize.mlir
+7-0mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+25-02 files

LLVM/project 559fbb0llvm/test/Transforms/SLPVectorizer/X86 masked-stores.ll

[SLP][NFC]Add a test with masked stores, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/204004
DeltaFile
+534-0llvm/test/Transforms/SLPVectorizer/X86/masked-stores.ll
+534-01 files

LLVM/project 96f1b89llvm/include/llvm/ADT APFloat.h, llvm/lib/Support APFloat.cpp

[llvm] Add floating point exception status for APFloat's exp function. (#203066)

- Add extra Status return parameter for possible float point exceptions.
- Use `LIBC_NAMESPACE::shared::check::exp_exceptions(x, rm)` to test for
floating point exceptions.
- Change `exp` return type to `std::optional<APFloat>` to avoid
`llvm_unreachable` and be able to tell other callers like clang's
`ExprConstant` about currently unsupported types and rounding modes.
DeltaFile
+73-22llvm/unittests/ADT/APFloatTest.cpp
+38-6llvm/lib/Support/APFloat.cpp
+4-2llvm/include/llvm/ADT/APFloat.h
+115-303 files

LLVM/project cfae8adlldb/cmake/modules AddLLDB.cmake LLDBConfig.cmake, lldb/source/API CMakeLists.txt

[lldb] Decouple LLDB_EXPORT_ALL_SYMBOLS from dynamic interpreters (#203997)

With #201392, we generate a minimal export list when LLDB_ENABLE_
DYNAMIC_SCRIPTINTERPRETERS is set. We therefore no longer need to force
LLDB_EXPORT_ALL_SYMBOLS.

This PR makes the two options independent again. LLDB_EXPORT_ALL_SYMBOLS
now defaults to OFF and, when set, is honored regardless of whether the
script interpreters are built as static or dynamic libraries. otherwise,
when disabled, liblldb exports the generated subset if dynamic
interpreters are enabled, otherwise only the public lldb namespace.
DeltaFile
+19-16lldb/source/API/CMakeLists.txt
+6-4lldb/cmake/modules/AddLLDB.cmake
+2-6lldb/cmake/modules/LLDBConfig.cmake
+27-263 files

LLVM/project d58b5a9llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstructionSelector.cpp

[AMDGPU] Guard against opsel selection in V_PK_*64 (#203986)

These instructions do not have OPSEL or ABS so bail on selection.
This does not affect any tests now because v2f64/v2i64 are not legal
for BUILD_VECTOR and alike, but if it is legal it will silently
produce incorrect code. GlobalISel already has this guard.
DeltaFile
+8-0llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+9-12 files

LLVM/project 088e3c7clang/lib/Driver/ToolChains Hexagon.cpp, clang/test/Driver hexagon-toolchain-linux.c

[Hexagon] Skip CRT start files for relocatable (-r) links on musl (#201262)

Guard the dynamic-linker, crt1.o, and crti.o additions with OPT_r,
consistent with Gnu.cpp and the existing -pie suppression in this file.
CRT start files must not appear in partial links (-r) as they define
_start, causing duplicate-symbol errors when the output is later linked
into an executable.
DeltaFile
+19-0clang/test/Driver/hexagon-toolchain-linux.c
+4-3clang/lib/Driver/ToolChains/Hexagon.cpp
+23-32 files

LLVM/project de6f07flibcxx/test/std/atomics/atomics.ref fetch_min.pass.cpp fetch_max.pass.cpp, libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req atomic_fetch_min_explicit.pass.cpp atomic_fetch_min.pass.cpp

Port test coverage from #186694

Assisted by Claude, reviewed manually.
DeltaFile
+147-0libcxx/test/support/atomic_fetch_max_helper.h
+147-0libcxx/test/support/atomic_fetch_min_helper.h
+38-27libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min_explicit.pass.cpp
+38-26libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_fetch_min.pass.cpp
+18-42libcxx/test/std/atomics/atomics.ref/fetch_min.pass.cpp
+18-42libcxx/test/std/atomics/atomics.ref/fetch_max.pass.cpp
+406-1372 files not shown
+474-1688 files

LLVM/project e52cad0mlir/lib/Dialect/OpenACC/Transforms ACCRecipeMaterialization.cpp, mlir/test/Dialect/OpenACC acc-recipe-materialization-firstprivate.mlir acc-recipe-materialization-private.mlir

[ACCRecipeMaterialization] add tests for private/firstprivate destroy (#203990)

While working on #203935, I noticed that private and firstprivate
recipes with destroy regions were not tested. Add these tests and fix a
bug from the previous commit that would have been caught had these tests
been fixed by generating the destroy region at the correct insertion
point
DeltaFile
+5-0mlir/test/Dialect/OpenACC/acc-recipe-materialization-firstprivate.mlir
+5-0mlir/test/Dialect/OpenACC/acc-recipe-materialization-private.mlir
+2-2mlir/lib/Dialect/OpenACC/Transforms/ACCRecipeMaterialization.cpp
+12-23 files

LLVM/project 0c8725fllvm/test/Analysis/CostModel/AArch64 sve-arith.ll

[AArch64] Add scalable i128 costmodel test coverage. NFC (#203996)

This also adds some basic sub costs, similar to the others, and sorts
the
operations into a more standard order.
DeltaFile
+71-42llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
+71-421 files

LLVM/project 68fb2e7llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/PowerPC insertvalue-with-copyable-args.ll

[SLP] Fix insert point for insertvalue buildvector with copyable operands

Use the last insertvalue as the insert point (like insertelement) so the
vec2struct store/load are not emitted before the vectorized operand.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/203994
DeltaFile
+37-0llvm/test/Transforms/SLPVectorizer/PowerPC/insertvalue-with-copyable-args.ll
+2-1llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+39-12 files

LLVM/project 4f6af6ellvm/docs/CommandGuide index.rst, llvm/docs/GlobalISel index.rst Pipeline.rst

[docs] Enforce unambiguous toctree in llvm/docs

It seems like using a non-`hidden` `toctree` for page navigation is a
bit of a trap, in that every doc must have a single unique path through
the global toctree to the root doc, and it is very easy to end up with
multiple.

This patch tries to address the warnings (actually infos, hence why it
does not fail the build) in llvm/docs/, namely:

  $ sphinx-build -b html -jauto llvm/docs/ /tmp/sphinx-out
  checking consistency...
  llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md: document is referenced in multiple toctrees: ['UserGuides', 'AMDGPUUsage'], selecting: UserGuides <- AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack
  llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst: document is referenced in multiple toctrees: ['UserGuides', 'AMDGPUUsage'], selecting: UserGuides <- AMDGPUDwarfExtensionsForHeterogeneousDebugging
  llvm/docs/CommandGuide/llvm-reduce.rst: document is referenced in multiple toctrees: ['CommandGuide/index', 'CommandGuide/index', 'Reference'], selecting: Reference <- CommandGuide/llvm-reduce
  llvm/docs/GitHub.rst: document is referenced in multiple toctrees: ['GettingInvolved', 'UserGuides'], selecting: UserGuides <- GitHub
  llvm/docs/GlobalISel/IRTranslator.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/IRTranslator
  llvm/docs/GlobalISel/InstructionSelect.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/InstructionSelect
  llvm/docs/GlobalISel/Legalizer.rst: document is referenced in multiple toctrees: ['GlobalISel/index', 'GlobalISel/Pipeline'], selecting: GlobalISel/index <- GlobalISel/Legalizer

    [35 lines not shown]
DeltaFile
+88-39llvm/docs/CommandGuide/index.rst
+30-21llvm/docs/GlobalISel/index.rst
+50-0utils/docs/llvm_sphinx/ext/checks.py
+21-21llvm/tools/llvm-debuginfo-analyzer/README.md
+0-14llvm/docs/tutorial/MyFirstLanguageFrontend/index.rst
+0-8llvm/docs/GlobalISel/Pipeline.rst
+189-1035 files not shown
+191-11211 files

LLVM/project 47f1dc2clang/docs ghlinks.py conf.py, lldb/docs conf.py

[docs] Create utils/docs

llvm-project is home to many sphinx documentation sites, each with
configuration quirks and bespoke extentions.

The sphinx config model makes sharing code somewhat difficult. There
are options like sphinx-multiproject, but some of our docs builds are
out of the source tree while some are done out of the binary tree, so
the multiproject configuration itself would need to be generated. It
also would impose more uniformity around extensions than required.

This change instead creates a python package at utils/docs/llvm_sphinx
and makes it available to all sphinx-build processes via PYTHONPATH.
Each conf.py does not modify its own sys.path because not all builds are
out of the source tree, so there isn't a stable relative path to use to
refer to the utils/docs/ directory.

Type checking via pyright in new package is pinned to being python 3.8
compatible.

    [29 lines not shown]
DeltaFile
+0-273clang/docs/ghlinks.py
+151-0utils/docs/llvm_sphinx/ext/ghlinks/__init__.py
+72-0utils/docs/llvm_sphinx/__init__.py
+7-39lldb/docs/conf.py
+5-38llvm/docs/conf.py
+10-30clang/docs/conf.py
+245-38023 files not shown
+419-64329 files

LLVM/project 4f55655flang/lib/Semantics check-omp-structure.h

[flang][OpenMP] Remove unused variable 'noWaitClauseNotAllowedSet', NFC (#203973)
DeltaFile
+0-11flang/lib/Semantics/check-omp-structure.h
+0-111 files

LLVM/project 1b49912clang/lib/CIR/CodeGen CIRGenExprScalar.cpp, clang/test/CIR/CodeGen bitfield-postinc.cpp

[CIR] Fix bitfield post-increment return value (#201723)

In \`emitScalarPrePostIncDec\`, the bitfield branch called
\`emitStoreThroughBitfieldLValue\` and returned its result directly,
bypassing the \`return e->isPrefix() ? value : input\` logic that
selects old vs new for post vs pre-increment. For post-increment on a
bitfield, this returned the new (incremented) value instead of the old
one, so \`if (s->nRefs++)\` always evaluated true even when \`nRefs\`
was zero on entry.

Fix by assigning the store result to \`value\` and falling through to
the existing prefix/postfix selector, mirroring the non-bitfield path.

Found via the SPEC CPU 2026 abc_r benchmark: \`Cnf_ManScanMapping_rec\`
uses \`if (pObj->nRefs++)\` on a 26-bit bitfield to detect
already-visited AIG nodes. With the bug, every call returned true
(already visited) immediately, producing an empty CNF mapping and a
spuriously satisfiable SAT problem (133 variables instead of 3018).
DeltaFile
+63-0clang/test/CIR/CodeGen/bitfield-postinc.cpp
+1-1clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
+64-12 files

LLVM/project 010ff4fclang/lib/CIR/Dialect/Transforms/TargetLowering CIRABIRewriteContext.cpp

[CIR] NFC: Clarify Expand insertion-point guard

Gate the field-store insertion point on the same destAlloca condition
that gates emitting the stores.  This makes it explicit that when the
CIRGen spill is absent (DCE removed it) the Expand path only reshapes
the signature and emits no stores, so no insertion point is consulted.
When the spill survives, the insertion point is its old slot, which sits
after the CIRGen allocas.  No functional change.
DeltaFile
+7-4clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
+7-41 files

LLVM/project 9ffa02dclang/include/clang/CIR/Dialect/IR CIROps.td CIRTypeConstraints.td, clang/lib/CIR/CodeGen CIRGenBuiltin.cpp

[CIR] Lower __builtin_bswapg (#203618)

C++23 `std::byteswap` lowers every value wider than a single byte
through the type-generic `__builtin_bswapg` builtin, which CIRGen had no
case for, so `std/numerics/bit/byteswap.pass.cpp` hit `errorBuiltinNYI`.

This handles `__builtin_bswapg` the way classic CodeGen does
(`CGBuiltin.cpp`): a bool or single-byte integer is returned unchanged,
and wider values go through `cir.byte_swap`. Unlike the unsigned-only
`__builtin_bswap16/32/64`, the generic builtin also accepts signed
operands, so a signed argument is reinterpreted as unsigned of the same
width before the swap and cast back afterward.

`cir.byte_swap` previously accepted only 16/32/64-bit operands, but
`std::byteswap` instantiates it for `__int128` and wide `_BitInt` too
(the libc++ test reaches `_BitInt(256)`). The operand constraint is
widened to any unsigned integer whose width is a multiple of 16 bits --
which is what `llvm.bswap` requires -- and the existing CIR-to-LLVM
lowering already handles any such width. With the fix,
`byteswap.pass.cpp` passes under `-fclangir`.
DeltaFile
+139-0clang/test/CIR/CodeGenBuiltins/builtin-bit.cpp
+21-0clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+12-0clang/test/CIR/IR/invalid-bit.cir
+3-3clang/include/clang/CIR/Dialect/IR/CIROps.td
+4-0clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
+179-35 files

LLVM/project 14eff09llvm/test/CodeGen/AMDGPU ldsdmacnt_sched.mir

Update lit

Change-Id: Idd5437cccc1d1db229acff7b2a519d1188f98833
DeltaFile
+2-2llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
+2-21 files

LLVM/project 37d4ee5llvm/lib/Target/AMDGPU AMDGPUISelDAGToDAG.cpp AMDGPUInstructionSelector.cpp

[AMDGPU] Guard against opsel selection in V_PK_*64

These instructions do not have OPSEL or ABS so bail on selection.
This does not affect any tests now because v2f64/v2i64 are not legal
for BUILD_VECTOR and alike, but if it is legal it will silently
produce incorrect code. GlobalISel already has this guard.
DeltaFile
+8-0llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+1-1llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+9-12 files