LLVM/project 80b62cbclang/lib/Driver/ToolChains Clang.cpp

Enable c++20 modules support for c++23preview in clang-cl (#173663)

Fixes https://github.com/llvm/llvm-project/issues/173544

Co-authored-by: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
DeltaFile
+4-3clang/lib/Driver/ToolChains/Clang.cpp
+4-31 files

LLVM/project 993054dllvm/lib/Transforms/InstCombine InstCombineCompares.cpp, llvm/test/Transforms/InstCombine fcmp-select.ll

[InstCombine] Fold redundant FP clamp selects; relax min-max-pattern bailout in visitFCmp (#173452)

visitFCmp() previously bailed out when a following select matched a
clamp pattern. This blocks simplifications when the clamp is provably
redundant.

This PR allows simplification for clamp selects of flavor SPF_FMAXNUM/
SPF_FMINNUM when one arm is a constant and the other is a sitofp/uitofp
of an integer value, and the constant equals the exact min/max of that
integer domain:
* SPF_FMAXNUM (pattern max(X,C)): redundant if C is the minimum integer
mapped exactly to FP (e.g. X = sitofp i8, C = -128.0f).
* SPF_FMINNUM (pattern min(X,C)): redundant if C is the maximum integer
mapped exactly to FP (e.g. X = uitofp i8, C = 255.0f).

This fixes a regression in #173454

---------

Co-authored-by: Copilot <175728472+Copilot at users.noreply.github.com>
Co-authored-by: Yingwei Zheng <dtcxzyw at qq.com>
DeltaFile
+44-0llvm/test/Transforms/InstCombine/fcmp-select.ll
+32-1llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+76-12 files

LLVM/project 05b8a36clang/include/clang/Basic DiagnosticSemaKinds.td, clang/lib/Sema SemaExprCXX.cpp

[Clang][Diagnostics] Mention 'import std' in typeid diagnostic (#173236)

Previously, the diagnostic only suggested including `<typeinfo>`. Since
C++20,the standard library may also be made available via `import std;`.

This change updates the diagnostic to mention `import std` as an
alternative and adds a test to cover the new wording.
DeltaFile
+10-0clang/test/SemaCXX/typeid-requires-typeinfo.cpp
+6-3clang/lib/Sema/SemaExprCXX.cpp
+1-1clang/include/clang/Basic/DiagnosticSemaKinds.td
+17-43 files

LLVM/project 1b43f5cllvm/include/llvm/CodeGen ISDOpcodes.h, llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp LegalizeIntegerTypes.cpp

[RISCV][SelectionDAG] Add a ISD::CTLS node for count leading redundant sign bits. Use it to select CLS(W). (#173417)

The RISC-V P extension adds an instruction equivalent to
__builtin_clrsb. AArch64 has a similar instruction that we currently fail to
select when using the builtin.

This patch adds a combine based on the canonical version of the pattern
emitted by clang for the builtin, (add (ctlz (xor x, (sra x, bw-1)))),
-1). I'm starting the combine at the ctlz because the outer add can
easily be combined into other nodes obscuring the full pattern. So we
generate (add (ctls x), 1) and hope the add will be combined away.

I've also added a combine for the pattern AArch64 recognizes
(ctlz_zero_undef (or (shl (xor x, (sra x, bw-1)), 1), 1)).

I've only enabled the combines when the target has a Legal or Custom
action for the operation, taking into account type promotion. We
can relax this in the future by adding a default expansion to
LegalizeDAG and adding more type legalization rules.
DeltaFile
+136-0llvm/test/CodeGen/RISCV/rv32p.ll
+108-0llvm/test/CodeGen/RISCV/rv64p.ll
+44-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+23-4llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+14-0llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+4-0llvm/include/llvm/CodeGen/ISDOpcodes.h
+329-45 files not shown
+336-411 files

LLVM/project f5dab90mlir/cmake/modules MLIRDetectPythonEnv.cmake

[mlir][Python] Bump MLIR Python minimum version to 3.10 (#163499)

This PR bumps the minimum Python version required for MLIR to be Python
3.10. See
https://discourse.llvm.org/t/rfc-adopt-regularly-scheduled-python-minimum-version-bumps/88841
for a discussion about the expected bump schedule going forward.
DeltaFile
+4-3mlir/cmake/modules/MLIRDetectPythonEnv.cmake
+4-31 files

LLVM/project 112df6allvm/bindings/ocaml/llvm llvm.ml llvm.mli, llvm/test/Bindings/OCaml core.ml

[ocaml] Fixed typo error about set_module_identifier in llvm ocaml binding (#77479)

DeltaFile
+2-2llvm/bindings/ocaml/llvm/llvm.ml
+1-1llvm/bindings/ocaml/llvm/llvm.mli
+1-1llvm/test/Bindings/OCaml/core.ml
+4-43 files

LLVM/project bada581llvm/lib/Target/RISCV RISCVSchedAndes45.td, llvm/test/tools/llvm-mca/RISCV/Andes45 rvv-vlseg-vsseg.s rvv-vlxe-vsxe.s

[RISCV] Update Andes45 vector load/stores scheduling info (#173806)

This PR adds latency/throughput for all RVV load/stores to the Andes45
series scheduling model.
DeltaFile
+1,541-1,541llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-vlseg-vsseg.s
+177-177llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-vlxe-vsxe.s
+183-25llvm/lib/Target/RISCV/RISCVSchedAndes45.td
+100-100llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-vle-vse-vlm.s
+89-89llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-vlse-vsse.s
+2,090-1,9325 files

LLVM/project dc43062llvm/test/Transforms/LoopVectorize multiple-early-exits.ll

[LV] Add tests with multiple early exits. (NFC)

Adds test coverage with vectorizable loops with early exits.
DeltaFile
+1,180-0llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
+1,180-01 files

LLVM/project fd0bf4aclang-tools-extra/clang-tidy ClangTidyDiagnosticConsumer.cpp

[clang-tidy] Speed up deduplicating warnings from alias checks (#174237)

Right now, the deduplication algorithm runs in O(n²) time, because it
goes warning-by-warning (an O(n) operation), removing duplicates using
`std::vector::erase` (another O(n) operation). This starts taking up a
noticeable amount of time as you start getting a lot of warnings. For
example, running all checks over `clang/lib/Sema/Sema.cpp` and the
headers it includes:

```sh
time ./build/release/bin/clang-tidy -p build/debug --checks=* clang/lib/Sema/Sema.cpp -header-filter=.* > /dev/null
```

...takes 2m9s on my system before this change and 1m52s after. Now, this
scenario *is* a bit artificial; I imagine runs with so many warnings are
uncommon in practice. On the other hand, the change is quite small,
so we're not really going out of our way to improve it.
DeltaFile
+27-31clang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
+27-311 files

LLVM/project e9ac1d1clang-tools-extra/docs ReleaseNotes.rst

Change chrono -> ranges in release notes
DeltaFile
+1-1clang-tools-extra/docs/ReleaseNotes.rst
+1-11 files

LLVM/project 39ae1callvm/lib/Target/X86 X86FastPreTileConfig.cpp X86.h, llvm/test/CodeGen/X86/AMX amx-fastconfig-phi2.mir amx-fastconfig-phi.mir

[X86][NewPM] Port x86-fast-pre-tile-config (#174323)

DeltaFile
+47-22llvm/lib/Target/X86/X86FastPreTileConfig.cpp
+10-2llvm/lib/Target/X86/X86.h
+2-2llvm/lib/Target/X86/X86TargetMachine.cpp
+2-1llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
+2-1llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
+2-1llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
+65-295 files not shown
+73-3411 files

LLVM/project a73de98lldb/source/Core SourceManager.cpp

[lldb] Handle not being able to read a file in the SourceManager (#174346)

Even if a file has a valid modification time, it's possible that reading
the data fails. The SourceManager wasn't accounting for that, which
would result in a crash due to an unchecked read from a null `data_sp`.

We were seeing the issue when trying to read from a buggy virtual file
system, but presumably the same thing can happen with a poorly timed
unmount of a drive.

rdar://166414707
DeltaFile
+11-2lldb/source/Core/SourceManager.cpp
+11-21 files

LLVM/project 58822a6llvm/lib/Transforms/InstCombine InstructionCombining.cpp InstCombineAndOrXor.cpp, llvm/test/Transforms/InstCombine binop-select.ll

[InstCombine] Fold `(select C, (x bin_op a), x) bin_op b` into `x bin_op select C, (a bin_op b), b` (#173511)

Fixes #154246.

The original pattern in the issue was the following:
```llvm
define i8 @src(i8 %arg0, i8 %arg1) {
  %v0 = icmp eq i8 %arg1, -1
  %v1 = or i8 %arg0, 4
  %v2 = select i1 %v0, i8 %v1, i8 %arg0
  %v3 = or i8 %v2, 1
  ret i8 %v3
}
```
to
```llvm
define i8 @tgt(i8 %arg0, i8 %arg1) {
  %v0 = icmp eq i8 %arg1, -1
  %v3.v = select i1 %v0, i8 5, i8 1

    [6 lines not shown]
DeltaFile
+776-0llvm/test/Transforms/InstCombine/binop-select.ll
+44-0llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+6-0llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+3-0llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
+3-0llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+2-0llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+834-06 files

LLVM/project ac300dd

Merge branch 'users/chapuni/mcdc/nest/lnot' into users/chapuni/mcdc/nest/trunk
DeltaFile
+0-00 files

LLVM/project 6de643e

Merge branch 'users/chapuni/mcdc/nest/expect' into users/chapuni/mcdc/nest/trunk
DeltaFile
+0-00 files

LLVM/project 93ca3d5llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/PowerPC vector-popcnt-128-ult-ugt.ll

Merge branch 'users/chapuni/mcdc/nest/nest' into users/chapuni/mcdc/nest/trunk
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+22,442-22,606llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+508,892-22,60662,984 files not shown
+7,272,157-2,626,23762,990 files

LLVM/project 2b9ab09clang/include/clang/Basic DiagnosticFrontendKinds.td

Prune warn_pgo_nested_boolean_expr
DeltaFile
+0-5clang/include/clang/Basic/DiagnosticFrontendKinds.td
+0-51 files

LLVM/project 6648a46llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/nest-base' into users/chapuni/mcdc/nest/nest

Conflicts:
        clang/lib/CodeGen/CodeGenPGO.cpp (#172557)
        clang/test/Frontend/custom-diag-werror-interaction.c
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+65,599-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+552,049-067,059 files not shown
+8,075,972-3,085,89167,065 files

LLVM/project 09e881ellvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/PowerPC vector-popcnt-128-ult-ugt.ll

Merge commit '64cbe975bf1a9425a5bfad0e03f9e0ea26769979' into users/chapuni/mcdc/nest/nest-base
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+22,442-22,606llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+508,892-22,60662,984 files not shown
+7,272,163-2,626,24362,990 files

LLVM/project 64cbe97clang/lib/CodeGen CoverageMappingGen.cpp CodeGenPGO.cpp, clang/test/Profile c-mcdc-logicalop-ternary.c

Merge branches 'users/chapuni/mcdc/nest/covmapdesc', 'users/chapuni/mcdc/nest/covgen', 'users/chapuni/mcdc/nest/logopstack' and 'users/chapuni/mcdc/nest/bitmapaddr' into HEAD
DeltaFile
+142-175llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
+189-126clang/lib/CodeGen/CoverageMappingGen.cpp
+51-11clang/lib/CodeGen/CodeGenPGO.cpp
+14-26clang/lib/CodeGen/CGExprScalar.cpp
+17-5clang/lib/CodeGen/CodeGenPGO.h
+10-8clang/test/Profile/c-mcdc-logicalop-ternary.c
+423-3518 files not shown
+476-39214 files

LLVM/project bd784b6clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode typeid.cpp

[clang][bytecode] Fix typeid test under msan (#174317)

The original problem description sounded sane but it was lacking a bit.
What happens where is that the global block is ultimately not
initialized simply because it was already created before and its
initializer failed, causing us to call invokeDtor() in a previous
evaluation.

Check for the initialion state earlier and abort there instead of
accessing the (now uninitialized) data of the block, causing msan
failures.

See the failed msan build at
https://lab.llvm.org/buildbot/#/builders/164/builds/17206
DeltaFile
+11-0clang/test/AST/ByteCode/typeid.cpp
+4-1clang/lib/AST/ByteCode/Compiler.cpp
+15-12 files

LLVM/project eeee678llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/PowerPC vector-popcnt-128-ult-ugt.ll

Merge branch 'users/chapuni/mcdc/nest/mcdcstate' into users/chapuni/mcdc/nest/bitmapaddr

Conflicts:
        clang/lib/CodeGen/CodeGenFunction.h (#142155)
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+22,442-22,606llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+508,892-22,60662,983 files not shown
+7,272,006-2,626,05762,989 files

LLVM/project 76b00fcflang/lib/Semantics check-call.cpp, flang/test/Semantics cuf23.cuf

[flang][cuda] Skip sizeof intrinsic in check (#174339)

#174025 introduced a new semantic check for host intrinsic with device
variable.`sizeof` intrinsic extension should be skipped for this check.
DeltaFile
+1-1flang/lib/Semantics/check-call.cpp
+1-0flang/test/Semantics/cuf23.cuf
+2-12 files

LLVM/project 545c684llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/mcdcstate' into users/chapuni/mcdc/nest/covgen

Conflicts:
        clang/lib/CodeGen/CoverageMappingGen.cpp (#172557)
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+65,599-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+552,049-067,059 files not shown
+8,075,845-3,085,61667,065 files

LLVM/project ba73eb8clang/lib/CodeGen CodeGenPGO.cpp CodeGenFunction.h

clangCodeGen: Follow #142155
DeltaFile
+6-0clang/lib/CodeGen/CodeGenPGO.cpp
+2-4clang/lib/CodeGen/CodeGenFunction.h
+8-42 files

LLVM/project 7a5760fllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'users/chapuni/mcdc/nest/mcdcstate' into users/chapuni/mcdc/nest/logopstack
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+65,599-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+552,049-067,059 files not shown
+8,075,845-3,085,61667,065 files

LLVM/project 2702f3dllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/PowerPC vector-popcnt-128-ult-ugt.ll

Merge branch 'main' into users/chapuni/mcdc/nest/mcdcstate
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+22,442-22,606llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+508,892-22,60662,983 files not shown
+7,272,001-2,626,05362,989 files

LLVM/project b65f6bfllvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites long-spec-const-composite.ll

Merge branch 'main' into users/chapuni/mcdc/nest/covmapdesc
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+65,599-0llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_long_composites/long-spec-const-composite.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+552,049-067,058 files not shown
+8,075,844-3,085,61567,064 files

LLVM/project 7a95385llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/PowerPC vector-popcnt-128-ult-ugt.ll

Merge branch 'main' into users/chapuni/mcdc/nest/lnot
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+22,442-22,606llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+508,892-22,60662,983 files not shown
+7,272,001-2,626,05362,989 files

LLVM/project e93fb04llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/PowerPC vector-popcnt-128-ult-ugt.ll

Merge branch 'main' into users/chapuni/mcdc/nest/expect
DeltaFile
+241,284-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+95,651-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+53,948-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+49,842-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+45,725-0llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
+22,442-22,606llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll
+508,892-22,60662,983 files not shown
+7,272,001-2,626,05362,989 files