LLVM/project f5186aemlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp

format

Signed-off-by: Eric Feng <Eric.Feng at amd.com>
DeltaFile
+5-2mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+5-21 files

LLVM/project e1ee69bmlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp

nit

Signed-off-by: Eric Feng <Eric.Feng at amd.com>
DeltaFile
+2-2mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+2-21 files

LLVM/project 51d2a66clang/test/Analysis/Scalable/ssaf-analyzer analyzer.test, clang/test/Analysis/Scalable/ssaf-analyzer/Inputs lu.json

[clang][ssaf] Add `clang-ssaf-analyzer` (#188881)

This patch introduces `clang-ssaf-analyzer`, a new SSAF tool that runs whole-program analyses over an `LUSummary` and writes the resulting `WPASuite` to an output file.
DeltaFile
+141-0clang/test/Analysis/Scalable/ssaf-analyzer/analyzer.test
+134-0clang/tools/clang-ssaf-analyzer/SSAFAnalyzer.cpp
+126-0clang/test/Analysis/Scalable/ssaf-analyzer/Inputs/lu.json
+90-0clang/test/Analysis/Scalable/ssaf-analyzer/Outputs/all.json
+81-0clang/test/Analysis/Scalable/ssaf-analyzer/Outputs/both.json
+70-0clang/test/Analysis/Scalable/ssaf-analyzer/Outputs/pairs.json
+642-015 files not shown
+931-021 files

LLVM/project d724231mlir/lib/Conversion/AMDGPUToROCDL AMDGPUToROCDL.cpp, mlir/test/Conversion/AMDGPUToROCDL sparse-mfma-gfx950.mlir

support gfx942 bf16 sparse mfma in gfx950

Signed-off-by: Eric Feng <Eric.Feng at amd.com>
DeltaFile
+7-5mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+10-1mlir/test/Conversion/AMDGPUToROCDL/sparse-mfma-gfx950.mlir
+17-62 files

LLVM/project b8362b2clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowExtractor.cpp

[SSAF] Fix -Wunused-variable (#195975)

Add [[maybe_unused]] given the operation is side effecting/returns
multiple values.
DeltaFile
+1-1clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
+1-11 files

LLVM/project 2c27433libc/include sched.yaml, libc/test/include sched_test.cpp

[libc][sched] Fix generated scheduler prototypes (#195332)

Fixes generated <sched.h> prototypes for
sched_getscheduler/sched_setscheduler and adds compile-time
public-header coverage
DeltaFile
+8-0libc/test/include/sched_test.cpp
+2-2libc/include/sched.yaml
+10-22 files

LLVM/project 289bef6llvm/include/llvm/MC MCPseudoProbe.h, llvm/lib/MC MCPseudoProbe.cpp MCObjectFileInfo.cpp

[PseudoProbe] Include function hash in descriptor COMDAT key (#190296)

The .pseudo_probe_desc section uses COMDAT to deduplicate descriptors
for the same function across translation units. On COFF, the COMDAT key
is uniquely determined by the function name. The COMDAT selection type
is EXACT_MATCH, which requires byte-identical content. This holds for
applications that strictly follow C/C++ ODR rules.

Unfortunately, we consistently observe .pseudo_probe_desc COMDAT
duplicate symbol errors on Windows (see also #177540). Most of them are
due to hash mismatches, meaning two non-internal functions with the same
name but different bodies — a violation of ODR rules. Some of these
functions are generated by the compiler (e.g., TU-local optimizations
that alter the CFG of a linkonce_odr function), and some are caused by
source code issues (e.g., different preprocessor settings or
optimization pragmas across TUs).

It is hard to fix all of them, but they seriously affect the user
experience of using pseudo probe on Windows due to the endless COFF

    [12 lines not shown]
DeltaFile
+101-0llvm/test/tools/llvm-profgen/pseudo-probe-desc-mismatch.test
+27-2llvm/lib/MC/MCPseudoProbe.cpp
+14-14llvm/test/Transforms/SampleProfile/pseudo-probe-emit.ll
+17-10llvm/lib/MC/MCObjectFileInfo.cpp
+12-12llvm/test/Transforms/SampleProfile/pseudo-probe-emit-inline.ll
+2-1llvm/include/llvm/MC/MCPseudoProbe.h
+173-394 files not shown
+179-4310 files

LLVM/project 2d7bfcdlld/ELF/Arch TargetImpl.h

ELF: Use dyn_cast to access sym field.

dyn_cast_or_null is unnecessary because this field is non-null.

Reviewers: MaskRay

Pull Request: https://github.com/llvm/llvm-project/pull/195785
DeltaFile
+1-1lld/ELF/Arch/TargetImpl.h
+1-11 files

LLVM/project 2384593mlir/lib/Dialect/XeGPU/IR XeGPUOps.cpp, mlir/lib/Dialect/XeGPU/Transforms XeGPUUnroll.cpp XeGPUBlocking.cpp

[MLIR][XeGPU] Unroll Dpasmx Op (#195179)

This PR adds support to unroll Dpasmx. 

Assisted by Claude

---------

Co-authored-by: Claude Sonnet 4.5 <noreply at anthropic.com>
DeltaFile
+164-47mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
+110-39mlir/lib/Dialect/XeGPU/Transforms/XeGPUUnroll.cpp
+117-9mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
+92-9mlir/test/Dialect/XeGPU/invalid.mlir
+48-0mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
+32-2mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToWiDistributeExperimental.cpp
+563-1061 files not shown
+589-1067 files

LLVM/project 5435995libcxx/test/std/strings/basic.string/string.modifiers/string_insert iter_iter_iter.pass.cpp

[libcxx][string] Test: fix copy&paste typo for safe_allocator (#195820)

In
test/std/strings/basic.string/string.modifiers/string_insert/iter_iter_iter.pass.cpp

Was missing the test for safe_allocator (test for min_allocator was
called twice) safe_allocator would be consistent with the rest of that
PR.
DeltaFile
+1-1libcxx/test/std/strings/basic.string/string.modifiers/string_insert/iter_iter_iter.pass.cpp
+1-11 files

LLVM/project d2fd5a7llvm/test/CodeGen/NVPTX machine-cse-predicate-inversion.ll machine-cse-predicate-no-inversion.ll

Move inversion/no inversion tests to one file. Fixup issue in machine-cse-predicate-inversion-multiple-users.ll
DeltaFile
+3,997-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion.ll
+1,525-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion.ll
+0-695llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
+0-695llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
+0-679llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
+0-663llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
+5,522-2,73211 files not shown
+5,526-5,58317 files

LLVM/project bb9b7cdllvm/test/CodeGen/NVPTX machine-cse-predicate-inversion-bfloat16.ll machine-cse-predicate-inversion-float16.ll

[NVPTX] Add commutativity to SETP instructions to enable MachineCSE of inverted predicates

Inverted predicates can be used freely in PTX. If we can invert a
predicate and CSE the generating instruction we can save calculating
the inverse.

Teach the NVPTX commuteInstructionImpl that SETP instructions can be
inverted to allow CSEing with previous SETP that match the inverted
form. This also inverts the branch users of the predicate to maintain
correctness.

Currently only allow the SETP inversion if all users are branches.
Future work can extend this to sel and not instructions.

Made-with: Cursor
DeltaFile
+695-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
+695-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
+679-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
+663-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
+437-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
+437-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
+3,606-013 files not shown
+5,908-419 files

LLVM/project 6e85668llvm/lib/Target/NVPTX NVPTXInstrInfo.td NVPTXInstrInfo.cpp, llvm/lib/Target/NVPTX/MCTargetDesc NVPTXInstPrinter.cpp

Revert "move cmp modes into td and update users"

This reverts commit 5950d9fcd6b2053e71929972b89cc983ce2cccaa, restoring
the hand-written PTXCmpMode enum in NVPTX.h and the switch-based
implementations of invertIntegerCmpMode, invertScalarFloatCmpMode,
NVPTXInstPrinter::printCmpMode and NVPTXDAGToDAGISel::getPTXCmpMode.

The TableGen GenericTable migration consolidated the comparison-mode
data but at the cost of an extra .inc file, an ODR-driven split between
NVPTXCodeGen and NVPTXDesc, and indirection through a generated lookup
where the local switches were already self-contained. Reverting until a
broader cleanup of NVPTX::PTXCmpMode is taken on as part of a larger
refactor.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+102-18llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+4-60llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+56-2llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+19-15llvm/lib/Target/NVPTX/NVPTX.h
+17-17llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+0-1llvm/lib/Target/NVPTX/CMakeLists.txt
+198-1136 files

LLVM/project 338f2c3llvm/lib/Target/NVPTX NVPTXInstrInfo.td NVPTXInstrInfo.cpp, llvm/lib/Target/NVPTX/MCTargetDesc NVPTXInstPrinter.cpp

move cmp modes into td and update users
DeltaFile
+18-102llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+60-4llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-56llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+15-19llvm/lib/Target/NVPTX/NVPTX.h
+17-17llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+1-0llvm/lib/Target/NVPTX/CMakeLists.txt
+113-1986 files

LLVM/project 34c1821llvm/lib/Target/NVPTX NVPTXInstrInfo.cpp NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX machine-cse-predicate-inversion-rollback.mir machine-cse-predicate-inversion-multiple-users.ll

update rollback logic and add test exercising it
DeltaFile
+66-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-rollback.mir
+17-19llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+9-7llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
+1-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+93-274 files

LLVM/project 351ae4cllvm/lib/Target/NVPTX NVPTXInstrInfo.td

Update NVPTXInstrInfo.td
DeltaFile
+2-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-11 files

LLVM/project 38e0639llvm/docs AMDGPUUsage.rst, llvm/include/llvm/Support AMDGPUAddrSpace.h

[NFC][AMDGPU] Reserve address space 16 (#195946)

This is used in downstream.
DeltaFile
+2-0llvm/include/llvm/Support/AMDGPUAddrSpace.h
+1-0llvm/docs/AMDGPUUsage.rst
+3-02 files

LLVM/project 4c1d0eellvm/lib/Target/NVPTX NVPTXInstrInfo.td NVPTXInstrInfo.cpp, llvm/lib/Target/NVPTX/MCTargetDesc NVPTXInstPrinter.cpp

Revert "move cmp modes into td and update users"

This reverts commit 5950d9fcd6b2053e71929972b89cc983ce2cccaa, restoring
the hand-written PTXCmpMode enum in NVPTX.h and the switch-based
implementations of invertIntegerCmpMode, invertScalarFloatCmpMode,
NVPTXInstPrinter::printCmpMode and NVPTXDAGToDAGISel::getPTXCmpMode.

The TableGen GenericTable migration consolidated the comparison-mode
data but at the cost of an extra .inc file, an ODR-driven split between
NVPTXCodeGen and NVPTXDesc, and indirection through a generated lookup
where the local switches were already self-contained. Reverting until a
broader cleanup of NVPTX::PTXCmpMode is taken on as part of a larger
refactor.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+102-18llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+4-60llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+56-2llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+19-15llvm/lib/Target/NVPTX/NVPTX.h
+17-17llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+0-1llvm/lib/Target/NVPTX/CMakeLists.txt
+198-1136 files

LLVM/project de26666llvm/test/CodeGen/NVPTX machine-cse-predicate-inversion.ll machine-cse-predicate-no-inversion.ll

Move inversion/no inversion tests to one file. Fixup issue in machine-cse-predicate-inversion-multiple-users.ll
DeltaFile
+3,997-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion.ll
+1,525-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-no-inversion.ll
+0-695llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
+0-695llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
+0-679llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
+0-663llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
+5,522-2,73211 files not shown
+5,526-5,58317 files

LLVM/project 08d1202llvm/lib/Target/NVPTX NVPTXInstrInfo.td

Update NVPTXInstrInfo.td
DeltaFile
+2-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-11 files

LLVM/project 896c96allvm/lib/Target/NVPTX NVPTXInstrInfo.td NVPTXInstrInfo.cpp, llvm/lib/Target/NVPTX/MCTargetDesc NVPTXInstPrinter.cpp

move cmp modes into td and update users
DeltaFile
+18-102llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
+60-4llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+2-56llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+15-19llvm/lib/Target/NVPTX/NVPTX.h
+17-17llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
+1-0llvm/lib/Target/NVPTX/CMakeLists.txt
+113-1986 files

LLVM/project ab563e9llvm/lib/Target/NVPTX NVPTXInstrInfo.cpp NVPTXInstrInfo.td, llvm/test/CodeGen/NVPTX machine-cse-predicate-inversion-rollback.mir machine-cse-predicate-inversion-multiple-users.ll

update rollback logic and add test exercising it
DeltaFile
+66-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-rollback.mir
+17-19llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
+9-7llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
+1-1llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
+93-274 files

LLVM/project a849bfcllvm/test/CodeGen/NVPTX machine-cse-predicate-inversion-float16.ll machine-cse-predicate-inversion-bfloat16.ll

[NVPTX] Add commutativity to SETP instructions to enable MachineCSE of inverted predicates

Inverted predicates can be used freely in PTX. If we can invert a
predicate and CSE the generating instruction we can save calculating
the inverse.

Teach the NVPTX commuteInstructionImpl that SETP instructions can be
inverted to allow CSEing with previous SETP that match the inverted
form. This also inverts the branch users of the predicate to maintain
correctness.

Currently only allow the SETP inversion if all users are branches.
Future work can extend this to sel and not instructions.

Made-with: Cursor
DeltaFile
+695-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float16.ll
+695-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-bfloat16.ll
+679-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float64.ll
+663-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-float32.ll
+437-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int16.ll
+437-0llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-int64.ll
+3,606-013 files not shown
+5,908-419 files

LLVM/project a529b4cllvm/lib/Target/RISCV RISCVCallingConv.cpp

[RISCV] Fix inconsistent usage of ValVT and LocVT in CC_RISCV_Impl. NFCI (#195368)

I think all of our checks should be against LocVT. If LocVT is different
than ValVT, that means the location has already been changed and we
should be acting on that changed type. For the most part, I don't think
that happens for RISC-V.
DeltaFile
+18-17llvm/lib/Target/RISCV/RISCVCallingConv.cpp
+18-171 files

LLVM/project 1cbe709clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis UnsafeBufferReachableAnalysisTest.cpp

Remove partition enumeration code
DeltaFile
+8-106clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
+8-1061 files

LLVM/project 2fe6e15clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis UnsafeBufferReachableAnalysisTest.cpp

Use a simple partition for distributing edges into contributors
DeltaFile
+50-16clang/unittests/ScalableStaticAnalysisFramework/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
+50-161 files

LLVM/project 8b10c26clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow PointerFlowAnalysis.cpp, clang/test/Analysis/Scalable/PointerFlow/Inputs wpa-result.json

Merge branch 'main' into users/shiltian/reserve-as-16
DeltaFile
+93-95flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
+140-0clang/unittests/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowWPATest.cpp
+131-0clang/unittests/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageWPATest.cpp
+128-0clang/test/Analysis/Scalable/PointerFlow/Inputs/wpa-result.json
+115-0clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
+110-0llvm/test/Transforms/LoopVectorize/VPlan/AArch64/call-decisions.ll
+717-9579 files not shown
+2,278-30385 files

LLVM/project 2af88e8clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel EntityPointerLevelFormat.h, clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage UnsafeBufferUsageAnalysis.h

[NFC][SSAF][EntityPointerLevel] Move EntityID-to-EPL map serialization to the EPL module (#193092)

Factor out the serialization of `std::map<EntityId,
EntityPointerLevelSet>` to `EntityPointerLevelFormat.h`.

---------

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
Co-authored-by: Jan Korous <jkorous at apple.com>
DeltaFile
+50-0clang/lib/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.cpp
+6-40clang/lib/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
+14-0clang/include/clang/ScalableStaticAnalysisFramework/Analyses/EntityPointerLevel/EntityPointerLevelFormat.h
+4-1clang/include/clang/ScalableStaticAnalysisFramework/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.h
+2-3clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowAnalysis.cpp
+1-1clang/lib/ScalableStaticAnalysisFramework/Analyses/PointerFlow/PointerFlowExtractor.cpp
+77-451 files not shown
+78-457 files

LLVM/project c00f40elld/test/MachO arm64-thunks-multi-text-stubs.s

remove extra test
DeltaFile
+0-50lld/test/MachO/arm64-thunks-multi-text-stubs.s
+0-501 files

LLVM/project 20d1074lld/docs ReleaseNotes.rst, lld/test/MachO arm64-thunks-multi-text-stubs.s

add release notes
DeltaFile
+50-0lld/test/MachO/arm64-thunks-multi-text-stubs.s
+2-0lld/docs/ReleaseNotes.rst
+52-02 files