LLVM/project 9ed0d62.github/workflows release-binaries.yml

workflows/release-binaries: Add missing action to checkout (#211720)

The upload-release-artifact action uses the require-team-membership
action so we need to make sure that latter is checkout out when calling
upload-release-artifact.

(cherry picked from commit 3c6d9cdb08c9245bb4d80e3262f74ea372046bcb)
DeltaFile
+1-0.github/workflows/release-binaries.yml
+1-01 files

LLVM/project 7e17195llvm/lib/Analysis IVDescriptors.cpp, llvm/lib/Transforms/Utils LoopUtils.cpp

[LoopUnroll] Allow vector types for minmax reductions (#207630)

Our downstream patched RecurrenceDescriptor in IVDescriptors.cpp to
recognize min/max reductions on vector-typed phis. After ffa02793,
vector min/max intrinsic reductions now flow into getReductionIdentity()
with vector type and then runtime-unroll-reductions-min-max.ll test
crashed.
This PR upstreams our RecurrenceDescriptor change to avoid further
downstream change to LoopUtils.cpp (in this PR) that fixes the crash.

LIT change in runtime-unroll-reductions-min-max.ll shows a long serial
reduction chain now breaks into two independent ones, which is the
purpose of unroll-add-parallel-reductions.

---------

Co-authored-by: skozhukh <sergey.s.kozhukhov at intel.com>
DeltaFile
+346-9llvm/test/Transforms/LoopUnroll/runtime-unroll-reductions-min-max.ll
+47-0llvm/unittests/Analysis/IVDescriptorsTest.cpp
+1-1llvm/lib/Transforms/Utils/LoopUtils.cpp
+1-1llvm/lib/Analysis/IVDescriptors.cpp
+395-114 files

LLVM/project f181815llvm/unittests/CAS OnDiskCASLoggerTest.cpp

[llvm][cas] Fix OnDiskCASLoggerTest.cpp compilation on NetBSD (#212113)

`CAS/OnDiskCASLoggerTest.cpp` doesn't compile on NetBSD/amd64:

```
In member function `virtual void OnDiskCASLoggerTest_MultiProcess_Test::TestBody()':
llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:230:19: error: reference to `Wait' is ambiguous
  230 |     auto Result = Wait(PI, /*Timeout=*/15, &Error);
      |                   ^~~~
In file included from llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:15:
llvm/include/llvm/Support/Program.h:212:22: note: candidates are: `llvm::sys::ProcessInfo llvm::sys::Wait(const llvm::sys::ProcessInfo&, std::optional<unsigned int>, std::string*, std::optional<llvm::sys::ProcessStatistics>*, bool)'
  212 | LLVM_ABI ProcessInfo Wait(
      |                      ^~~~
In file included from llvm/include/llvm/Support/RWMutex.h:17,
                 from llvm/include/llvm/Support/ThreadPool.h:21,
                 from llvm/unittests/CAS/OnDiskCASLoggerTest.cpp:16:
llvm/include/llvm/Support/Threading.h:60:40: note:                 `llvm::InitStatus llvm::Wait'
   60 |   enum InitStatus { Uninitialized = 0, Wait = 1, Done = 2 };
      |                                        ^~~~

    [7 lines not shown]
DeltaFile
+1-1llvm/unittests/CAS/OnDiskCASLoggerTest.cpp
+1-11 files

LLVM/project 01f5362llvm/test/CodeGen/Hexagon swp-epilog-phi12.mir

[Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (#212062)

(cherry picked from commit 0a7d5c755e6280ca94f09b3fe2301133c0a9f9a2)
DeltaFile
+1-0llvm/test/CodeGen/Hexagon/swp-epilog-phi12.mir
+1-01 files

LLVM/project a1194bellvm/lib/Target/SPIRV/MCTargetDesc SPIRVInstPrinter.cpp, llvm/test/CodeGen/SPIRV literals.ll

[SPIR-V] Fix hex float exponent for f64 Inf/NaN literals (#212295)

The asm printer hardcoded the f32 exponent (+128) when printing Inf/NaN
as hex floats, so f64 Inf/NaN literals were misencoded and silently
reassembled as finite values by consumers

Derive the exponent from the operand actual semantic instead
DeltaFile
+11-9llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
+9-0llvm/test/CodeGen/SPIRV/literals.ll
+20-92 files

LLVM/project 636d8a2lldb/source/Plugins/Process/Linux NativeRegisterContextLinux_arm64.h NativeRegisterContextLinux_arm64.cpp

[lldb][AArch64][Linux] Track all register cache validity in one place (#197113)

In this change I've expanded the existing RegisterSetType enum
to be used as part of a singular cache tracking object which replaces
all the separate booleans. These booleans were hard to track and 
set/reset in the right places.

This new validity object can be reset by default constructing,
and uses a member initialiser so everything starts out as invalid.

RegisterSetType is now a bitmask enum for easier storage.
It's 32-bit now which is enough for now. Just in case we expand it. 
(and I previously updated all sizeof calls to use RegisterSetType
instead of the raw type)

The SME and SME 2 entries have been renamed to ZA and ZT
as this is what ptrace calls them. Note that SME's pseudo registers
are still managed in their own unique way, I hope to address that
later.

    [32 lines not shown]
DeltaFile
+89-115lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
+50-26lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h
+139-1412 files

LLVM/project 2d7aaf6libc/test/src/semaphore/linux CMakeLists.txt semaphore_test.cpp, libc/test/src/unistd truncate_test.cpp chown_test.cpp

[libc] Fix path collisions between unit and hermetic tests (#212425)

Use the APPEND_LIBC_TEST macro to ensure each test gets a unique path to
operate on. Enable the affected tests in hermetic mode.
DeltaFile
+10-6libc/test/src/unistd/syscall_test.cpp
+3-3libc/test/src/unistd/CMakeLists.txt
+3-3libc/test/src/semaphore/linux/semaphore_test.cpp
+1-1libc/test/src/unistd/truncate_test.cpp
+1-1libc/test/src/unistd/chown_test.cpp
+1-1libc/test/src/semaphore/linux/CMakeLists.txt
+19-156 files

LLVM/project 6520ac7lldb/test/API/linux/aarch64/aarch32_compat Makefile main.s

[lldb][test][AArch64] Add test for AArch32 compatibility execution (#211793)

This should catch obvious problems like the one in #211692 in
future.

To run AArch32 programs on AArch64 you need a few things:
* Hardware that has AArch32 mode at EL0.
* A kernel built with CONFIG_COMPAT on.
* (usually) A bunch of 32-bit libraries installed.

We are dodging the 3rd one by compiling a standalone assembly
program that doesn't use any other libraries.

With clang being a cross-compiler and lld a cross-linker,
we should be able to do this without any 32-bit compatibility
libraries being installed.

To check for the first 2, we run that program normally.
If it fails to run, we don't have them. If it does run,

    [22 lines not shown]
DeltaFile
+117-0lldb/test/API/linux/aarch64/aarch32_compat/TestAArch64LinuxAArch32Compat.py
+89-0lldb/test/API/linux/aarch64/aarch32_compat/main.s
+21-0lldb/test/API/linux/aarch64/aarch32_compat/Makefile
+227-03 files

LLVM/project b349befllvm/lib/CodeGen/GlobalISel LegalizerHelper.cpp, llvm/test/CodeGen/AArch64/GlobalISel legalize-cttz.mir

[AArch64][GlobalISel] Use integer type for cttz icmp type. (#212327)
DeltaFile
+6-6llvm/test/CodeGen/AArch64/GlobalISel/legalize-cttz.mir
+2-2llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
+1-1llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+9-93 files

LLVM/project 437b42fllvm/lib/TableGen TGParser.cpp, llvm/test/TableGen eof-after-endif.td

[TableGen] don't print redundant diagnostic when parser sees Error token at end of file. (#212410)

Fixes #151476. 

Currently TableGen parser emits `error: Unexpected token at top level`
when it sees `tgtok::Error` token after failing to parse the object
list, even though that token's corresponding diagnostics were already
emitted during lexing. This change makes `ParseFile` return true when it
sees `tgtok::Error` at end of file, thereby avoiding the redundant
diagnostic.
DeltaFile
+3-0llvm/lib/TableGen/TGParser.cpp
+1-1llvm/test/TableGen/eof-after-endif.td
+4-12 files

LLVM/project 410b573clang/test/OffloadTools/clang-offload-bundler basic.c

test
DeltaFile
+11-0clang/test/OffloadTools/clang-offload-bundler/basic.c
+11-01 files

LLVM/project c00e365clang/lib/Basic/Targets AMDGPU.cpp, clang/lib/Driver OffloadBundler.cpp

fixes
DeltaFile
+0-10clang/lib/Basic/Targets/AMDGPU.cpp
+4-3clang/lib/Driver/OffloadBundler.cpp
+4-132 files

LLVM/project acc9e8cclang/include/clang/Basic TargetID.h, clang/lib/Basic TargetID.cpp

Fix offload bundler usage of getConflictTargetIDCombination
DeltaFile
+14-9clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
+11-9clang/include/clang/Basic/TargetID.h
+12-2clang/lib/Driver/OffloadBundler.cpp
+9-4clang/lib/Driver/Driver.cpp
+2-3clang/lib/Basic/TargetID.cpp
+48-275 files

LLVM/project 1a08717clang/include/clang/Basic TargetID.h, clang/lib/Basic TargetID.cpp

clang: Use TargetID parsing from AMDGPUTargetParser

We had grown 2 parallel parsing implementations for
triple+gpu name+feature flag target ID strings. Mostly
eliminate the redundant clang version.

Co-authored-by: Claude (Opus 4.8)
DeltaFile
+30-165clang/lib/Basic/TargetID.cpp
+49-51clang/lib/Driver/ToolChains/AMDGPU.cpp
+27-41clang/lib/Driver/OffloadBundler.cpp
+7-33clang/include/clang/Basic/TargetID.h
+18-14clang/lib/Basic/Targets/AMDGPU.h
+17-14clang/lib/Basic/Targets/AMDGPU.cpp
+148-3185 files not shown
+173-34211 files

LLVM/project 10d1b41llvm/lib/ExecutionEngine/Orc Core.cpp

[ORC] Fix buildSimpleReexportsAliasMap signature. (#212420)

The header declared a `const SymbolNameSet&` argument, but the
implementation took a `SymbolNameSet` by value. Update the
implementation to also take a `const SymbolNameSet&`.

No testcase. The corrected implementation will be used in an upcoming
commit.
DeltaFile
+2-2llvm/lib/ExecutionEngine/Orc/Core.cpp
+2-21 files

LLVM/project 564be89clang/test/OffloadTools/clang-offload-bundler asserts-on.c basic.c

clang: Fix subarchless amdgpu triples in offload bundler tests (#212424)
DeltaFile
+52-52clang/test/OffloadTools/clang-offload-bundler/basic.c
+8-8clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
+60-602 files

LLVM/project c6603ccclang/include/clang/Basic TokenKinds.h, clang/utils/TableGen ClangTraitsEmitter.cpp

[clang][NFC] generate TokenKey from tablegen (#210857)

Currently the enumerator constants of `TokenKey` are duplicated between
TokenKinds.h and Traits.td. This patch generates the `TokenKey` enum
from tablegen.

This is a followup patch for
https://github.com/llvm/llvm-project/pull/201491#discussion_r3567423553
DeltaFile
+2-34clang/include/clang/Basic/TokenKinds.h
+11-1clang/utils/TableGen/ClangTraitsEmitter.cpp
+13-352 files

LLVM/project 6aeeec8lldb/test/API/commands/gui/spawn-threads TestGuiSpawnThreads.py

[lldb][test] Skip TestGuiSpawnThreads.py on Linux (#212431)

See https://github.com/llvm/llvm-project/issues/209874.

We are still hitting the larger timeout.
DeltaFile
+2-0lldb/test/API/commands/gui/spawn-threads/TestGuiSpawnThreads.py
+2-01 files

LLVM/project 45b3492llvm/lib/Target/RISCV RISCVInstrInfoZilx.td, llvm/test/CodeGen/RISCV zilx-opt-w-instrs.mir

Add IsSignExtendingOpW = 1

Created using spr 1.3.6-beta.1
DeltaFile
+110-0llvm/test/CodeGen/RISCV/zilx-opt-w-instrs.mir
+9-0llvm/lib/Target/RISCV/RISCVInstrInfoZilx.td
+119-02 files

LLVM/project 697f989llvm/test/CodeGen/AArch64/GlobalISel regbank-insert-vector-elt.mir regbankselect-fp-loads.mir

[AArch64][GlobalISel] Update regbank tests with concrete types. NFC (#212367)
DeltaFile
+187-186llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-default.mir
+135-135llvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir
+96-96llvm/test/CodeGen/AArch64/GlobalISel/regbankselect-fp-loads.mir
+96-96llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-zext.mir
+96-96llvm/test/CodeGen/AArch64/GlobalISel/regbank-assert-sext.mir
+72-72llvm/test/CodeGen/AArch64/GlobalISel/regbank-insert-vector-elt.mir
+682-68126 files not shown
+1,305-1,30432 files

LLVM/project 8e9802blldb/test/API/functionalities/gdb_remote_client TestGdbClientModuleLoad.py

[lldb][test] Do not return a PID in TestGdbClientModuleLoad (#212256)

This test has been flaky on x86 Github CI. It expects: 
[  0] {{.*}} 0x0000000000ee0000 {{.*}}module_load
[  1] {{.*}} 0x0000000000ef0000 {{.*}}[vdso]

However in one run it got:
[ 0] 98FC07B8 0x0000000000ef0000 [vdso] (0xef0000)
[ 1] 75B11BBB-EF8B-5645-B9B1-A7261EC8ABCF-05413284 0x0000000000ed8ed0
/home/gha/actions-runner/bin/Runner.Worker

This happened because the responder says it's debugging PID 0x47, which
is usually some root process that we cannot read the /proc/pid/exe link
for. However when it is readable, we will assume that is the program
file and it replaces the "module_load" entry (this never happened on
AArch64 because an AArch64 program file is never compatible with an x86
triple).

In the failing case, 0x47 happened to be a github runner process that

    [10 lines not shown]
DeltaFile
+10-5lldb/test/API/functionalities/gdb_remote_client/TestGdbClientModuleLoad.py
+10-51 files

LLVM/project 162cdf4llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Analysis/ScalarEvolution trip-count-minmax.ll max-backedge-taken-count-guard-info.ll

[SCEV] Rewrite more SCEVAddExpr when applying guards. (#159942)

When re-writing SCEVAddExprs to apply information from guards, check if
we have information for the expression itself. If so, apply it.

When we have an expression of the form (Const + A),  check if we have
have guard info for (Const + 1 + A) and use it. This is needed to avoid
regressions in a few cases, where we have BTCs with a subtracted
constant.

Rewriting expressions could cause regressions, e.g. when comparing 2
SCEV expressions where we are only able to rewrite one side, but I could
not find any cases where this happens more with this patch in practice.

Depends on https://github.com/llvm/llvm-project/pull/160012.

Proofs for some of the test changes: https://alive2.llvm.org/ce/z/RPX6t_



    [14 lines not shown]
DeltaFile
+32-10llvm/lib/Analysis/ScalarEvolution.cpp
+6-6llvm/test/Analysis/ScalarEvolution/trip-count-minmax.ll
+6-6llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
+1-7llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+2-4llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
+3-3llvm/test/Transforms/LoopIdiom/add-nsw-zext-fold.ll
+50-362 files not shown
+54-408 files

LLVM/project 7c58d4dlldb/source/Host/linux HostInfoLinux.cpp, lldb/unittests/Host HostInfoTest.cpp

[lldb][AArch64] Fix launching Arm32 applications on AArch64 Linux (#211692)

When LLDB runs on an AArch64 Linux, it adds both 64- and 32-bit
architectures as supported; see `PlatformLinux` ctor. The triple for the
32-bit variant is computed by replacing the architecture while keeping
all other fields; i.e., for the main host triple
`aarch64-unknown-linux-gnu`, the generated 32-bit triple is
`arm-unknown-linux-gnu`.

When a 32-bit target is created, its triple would be something like
`arm--linux-eabihf`. This triple is incompatible with the one added to
the supported architectures per condition in `ArchSpec::IsMatch()`,
which checks for compatibility between environments. As a result, LLDB
fails to launch this target:

```
> arm-linux-gnueabihf-g++ -g test.cpp -o test.out
> lldb
(lldb) file test.out

    [10 lines not shown]
DeltaFile
+10-0lldb/source/Host/linux/HostInfoLinux.cpp
+8-0lldb/unittests/Host/HostInfoTest.cpp
+18-02 files

LLVM/project 69eb70dclang/test/OffloadTools/clang-offload-bundler asserts-on.c basic.c

clang: Fix subarchless amdgpu triples in offload bundler tests
DeltaFile
+52-52clang/test/OffloadTools/clang-offload-bundler/basic.c
+8-8clang/test/OffloadTools/clang-offload-bundler/asserts-on.c
+60-602 files

LLVM/project 0bcff14libc/test/src/sys/mman/linux pkey_test.cpp CMakeLists.txt

[libc] Make <sys/mman.h> tests hermetic (#210697)

The only issue was in pkey_test, which uses function-local static to do
lazy initialization. This requires the c++ runtime
(__cxa_guard_acquire/release).

There are no threads in this test, so we can just use the
(non-thread-safe) hand-rolled version of that. This is currently our
only test with such a pattern.

This would be something that in gtest would go into a SetUpTestSuite
method, but our test framework currently doesn't have an equivalent.
DeltaFile
+12-12libc/test/src/sys/mman/linux/CMakeLists.txt
+7-1libc/test/src/sys/mman/linux/pkey_test.cpp
+19-132 files

LLVM/project 499ea57llvm/lib/Target/AMDGPU SIPreEmitPeephole.cpp, llvm/test/CodeGen/AMDGPU wmma-set-reuse-bits.mir

[AMDGPU] Set WMMA source-operand reuse bits in SIPreEmitPeephole

gfx1250 WMMA instructions can set matrix_a_reuse / matrix_b_reuse bits
that keep the A or B source operand in a high-temporality state in the
VALU source-operand cache, so a later WMMA reusing the same registers
hits in the cache instead of re-reading the register file.

Add a late, post-RA peephole in the existing pre-emit peephole pass that
scans each basic block and, for every WMMA, sets the A/B reuse bit when
one of the next few WMMAs reuses the same physical registers as its A or B
operand and those registers are not redefined in between.

Stale sticky entries in the cache are cleared when a register is used in
an instruction without a reuse bit being set. Therefore, the final WMMA
use of the same source should not set the bit.
DeltaFile
+105-0llvm/test/CodeGen/AMDGPU/wmma-set-reuse-bits.mir
+101-1llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
+206-12 files

LLVM/project 39549cdclang/include/clang/Sema ScopeInfo.h, clang/lib/Sema TreeTransform.h SemaLambda.cpp

[clang] Fixed predefined expressions after lambda parameters (#211811)

After the parameter declaration of a lambda expression, `Sema` enters
the declaration context of the lambda call operator (in
`ActOnLambdaClosureParameters`), so the lambda specifiers and the
trailing return type are analyzed within that context. Because of this,
predefined expressions such as `__func__` resolve to the lambda call
operator, and not to the possibly enclosing function. (issue #122657)

Added a member to `LambdaScopeInfo` to mark whether or not the compound
statement of the lambda expression has been entered, to be used when
resolving a `PredefinedExpr`
DeltaFile
+53-0clang/test/SemaCXX/source_location.cpp
+24-4clang/lib/Sema/SemaExpr.cpp
+2-0clang/include/clang/Sema/ScopeInfo.h
+1-0clang/lib/Sema/TreeTransform.h
+1-0clang/lib/Sema/SemaLambda.cpp
+1-0clang/lib/Sema/SemaDecl.cpp
+82-41 files not shown
+83-47 files

LLVM/project b53f2d5utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[Bazel] Fixes 1e1274b (#212405)

This fixes 1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d (#212318).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1e1274b2ddfe4643eefdd1c6c83d6c2d61dace1d

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+13-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+13-01 files

LLVM/project f5437c4clang/include/clang/Sema Sema.h, clang/lib/Sema SemaDecl.cpp

[clang][NFC] Refactor flag enum caching (#210632)

Extracts cache insertion logic from `IsValueInFlagEnum`. This allows us
to drop `mutable` on `FlagBitsCache` while making it reusable as work
list for additional flag_enum diagnostics.
DeltaFile
+15-11clang/lib/Sema/SemaDecl.cpp
+1-1clang/include/clang/Sema/Sema.h
+16-122 files

LLVM/project 7bc2770libc/test/src/assert CMakeLists.txt assert_test.cpp

[libc] Make assert_test hermetic (#210700)

Call our own close() instead of the system one.
DeltaFile
+2-3libc/test/src/assert/assert_test.cpp
+2-1libc/test/src/assert/CMakeLists.txt
+4-42 files