LLVM/project e69fb46llvm/lib/DebugInfo/GSYM GsymReader.cpp, llvm/tools/llvm-gsymutil llvm-gsymutil.cpp Opts.td

[gsymutil] Disable readahead in `GsymReader::openFile()` (#199230)

`GsymReader::lookup()` has random access pattern (i.e. binary search an
address, then spot-load/parse info from rest of the GSYM data).
Readahead strategies in kernels (which was enabled by default) don't
necessarily improve (and may degrade) performance. This patch disables
readahead.

In a production system, similar change has seen 5% improvement on IOPS
and data reads. An offline performance test on a Linux machine shows
similar results - it reduces 14.3% total data read, 3.5% CPU%, and 2.9%
wall time (while adding 9.4% page faults). The reduction of total data
read and CPU % may help the performance of a heavily-loaded production
system.
```
  ┌────────────────┬─────────────┬─────────┬────────┐
  │     Metric     │ MADV_RANDOM │ Default │  Diff  │
  ├────────────────┼─────────────┼─────────┼────────┤
  │ Wall (s)       │ 0.286       │ 0.294   │ -2.9%  │

    [18 lines not shown]
DeltaFile
+41-7llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
+6-2llvm/tools/llvm-gsymutil/Opts.td
+3-1llvm/lib/DebugInfo/GSYM/GsymReader.cpp
+50-103 files

LLVM/project 9d16447llvm/lib/Target/DirectX/DXILWriter DXILValueEnumerator.cpp DXILBitcodeWriter.cpp, llvm/lib/Target/DirectX/DirectXIRPasses DXILDebugInfo.cpp DXILDebugInfo.h

[DirectX] Add an "offset" operand to llvm.dbg.value (#197478)

Offset operand was removed in abe04759a6, so we need to bring it back
for DXIL. If offset is not specified, it should be zero.

---------

Co-authored-by: Andrew Savonichev <andrew.savonichev at gmail.com>
DeltaFile
+65-26llvm/lib/Target/DirectX/DXILWriter/DXILValueEnumerator.cpp
+50-0llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.cpp
+48-0llvm/test/tools/dxil-dis/dbg-value.ll
+40-3llvm/lib/Target/DirectX/DirectXIRPasses/DXILDebugInfo.h
+16-9llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
+3-3llvm/test/tools/dxil-dis/debug-info.ll
+222-412 files not shown
+229-418 files

LLVM/project 9409c07lldb/source/Plugins/DynamicLoader/MacOSX-DYLD DynamicLoaderDarwin.h DynamicLoaderDarwin.cpp

[lldb][Darwin] Read Mach-O binaries out of memory more efficiently (#200072)

When lldb needs to read a Mach-O binary out of memory, it first reads
512 bytes to get the mach header, which includes the size of the load
commands, and then does a second read to get the mach header and load
commands.

I am changing the initial read to get 3192 bytes, which will include the
full load commands for most binaries.

In April I changed debugserver to return the correct size of the mach
header and load commands in a `sizeof_mh_and_loadcmds` key. If this
number is provided, refine the amount we read to this size.

This reduces the number of memory read packets we issue from 2 to 1 for
a memory module, outside of packets that may be needed to get the symbol
table.
DeltaFile
+9-1lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
+6-1lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
+15-22 files

LLVM/project eb0cb0cclang/include/clang/Analysis/Analyses/LifetimeSafety LifetimeAnnotations.h, clang/lib/Analysis/LifetimeSafety LifetimeAnnotations.cpp FactsGenerator.cpp

[LifetimeSafety] Propagate inner origins through std::move and related casts (#199600)

std::move and related casts (std::forward, std::forward_like,
std::move_if_noexcept, std::as_const) are reference casts: the result
refers to the same object as the argument. Flow all origin levels for
this family.
  
Fixes #191954
DeltaFile
+37-5clang/test/Sema/warn-lifetime-safety.cpp
+15-0clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
+10-2clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+5-0clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeAnnotations.h
+3-0clang/test/Sema/Inputs/lifetime-analysis.h
+70-75 files

LLVM/project a88e378clang/include/clang/AST DeclTemplate.h, clang/lib/AST DeclTemplate.cpp

[clang] fix getTemplateInstantiationArgs

This implements a new strategy for collecting the template arguments, by
relying on the qualifiers and template parameter lists to navigate the template
context of out-of-line definitions.

This greatly simplifies the signature of that function, by removing a bunch
of workarounds, and simpliffying a couple that weren't removed yet.

Since this now relies on qualifiers and template parameter lists,
this patch expends most of its effort making sure these are placed,
transformed and propagated to template instantiations.

Also makes the explicit specialization AST nodes stop abusing the template
parameter lists by storing it's own template parameter list, creating a
dedicated field for them, similar to partial specializations.
DeltaFile
+197-433clang/lib/Sema/SemaTemplateInstantiate.cpp
+257-164clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
+161-161clang/lib/Sema/SemaTemplate.cpp
+100-99clang/include/clang/AST/DeclTemplate.h
+59-129clang/lib/Sema/SemaConcept.cpp
+60-92clang/lib/AST/DeclTemplate.cpp
+834-1,07850 files not shown
+1,476-1,74256 files

LLVM/project f13305bllvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine/RISCV vector-deinterleave2.ll

[VectorCombine] Fold deinterleave2 with smaller effective element size (#192121)

Found in real-world code where this sequence:
```
%d = llvm.vector.deinterleave2 <vscale x 16 x i32> %v
%f0 = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } %d, 0
%f1 = extractvalue { <vscale x 8 x i32>, <vscale x 8 x i32> } %d, 1

%low0 = and <vscale x 8 x i32> %f0, splat (i32 65535)
%low1 = shl <vscale x 8 x i32> %f1, splat (i32 16)
%merge0 = or disjoint <vscale x 8 x i32> %low0, %low1

%high0 = and <vscale x 8 x i32> %f1, splat (i32 -65536)
%high1 = lshr <vscale x 8 x i32> %f0, splat (i32 16)
%merge1 = or disjoint <vscale x 8 x i32> %high0, %high1
```
is really just doing `deinterleave2` but on `<vscale x 32 x i16>`. That
is, the same total vector size but with half the element width. So we
can turn it into:

    [11 lines not shown]
DeltaFile
+135-0llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+135-0llvm/test/Transforms/VectorCombine/RISCV/vector-deinterleave2.ll
+270-02 files

LLVM/project 7f82efbllvm/include module.modulemap

[Object] Add missing BBAddrMap.def to module map (#199961)

Added in 532940bdee66bf5f36a70578698aab66f16919af.
DeltaFile
+2-0llvm/include/module.modulemap
+2-01 files

LLVM/project 00b4695llvm/lib/CodeGen CodeGenPrepare.cpp, llvm/test/CodeGen/AArch64 fast-isel-branch-cond-split.ll

[CodeGenPrepare] Use recomputed split-branch weights. (#199822)

splitBranchCondition computes new branch weights after splitting an
and/or condition into two branches, but then passed the original weights
to createBranchWeights at each metadata update. The recomputed values
were discarded.

Pass the scaled NewTrueWeight/NewFalseWeight values when installing
metadata on both generated branches.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
DeltaFile
+66-0llvm/test/Transforms/CodeGenPrepare/X86/split-branch-cond-weights.ll
+21-21llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
+8-25llvm/lib/CodeGen/CodeGenPrepare.cpp
+95-463 files

LLVM/project e8cc37eclang/lib/DependencyScanning DependencyScannerImpl.cpp

[clang][deps] Disable app extensions during scanning (#200041)

Application extension contributes to the context hash, but only affects
the availability attribute on declarations. Since it cannot affect
dependencies, disable it for the scan to reduce the number of scanning
PCM variants.
DeltaFile
+4-0clang/lib/DependencyScanning/DependencyScannerImpl.cpp
+4-01 files

LLVM/project e1dd984flang/lib/Optimizer/Transforms FIRToMemRef.cpp, flang/test/Transforms/FIRToMemRef slice-projected.mlir

[flang][FIRToMemRef] fix stride calculation for complex lowering (#200035)

**Summary**
When `fir.array_coor` targets a projected slice of a complex array (path
0 = real, 1 = imag), FIRToMemRef must not treat the result as a dense
memref.

**Bug:** The pass stopped after fir.convert to `memref<…×complex>` (or
static-shape fast path) and used default/dense strides. Loads/stores
then stepped by sizeof(complex) instead of sizeof(re)/sizeof(im).

**Fix:** For constant `%re/%im` on `complex<T>` storage:

`fir.convert` storage to `memref<…×2×T>` and index the component (0 or
1).
Read layout from `fir.box_dims` on the box (even if the memref shape is
static).
Set each memref stride to `box_dims_byte_stride / sizeof(T)`.

Advised by Cursor
DeltaFile
+111-16flang/test/Transforms/FIRToMemRef/slice-projected.mlir
+23-15flang/lib/Optimizer/Transforms/FIRToMemRef.cpp
+134-312 files

LLVM/project 8fc12f1flang-rt/cmake/modules AddFlangRTOffload.cmake

[flang-rt][cuda] Set RT_CUDA_THIN_IO=1 only for PTX object (#200063)
DeltaFile
+1-1flang-rt/cmake/modules/AddFlangRTOffload.cmake
+1-11 files

LLVM/project 9fa9ab3llvm/lib/Target/RISCV RISCVFeatures.td

[RISCV] Remove unused Predicates for Zicfilp. NFC (#200028)
DeltaFile
+0-5llvm/lib/Target/RISCV/RISCVFeatures.td
+0-51 files

LLVM/project 055a4baclang/www cxx_dr_status.html

[clang] Update C++ DR status page (#200053)

Updates from 2026-05-19 CWG telecon.
DeltaFile
+44-16clang/www/cxx_dr_status.html
+44-161 files

LLVM/project 78987e8lldb/include/lldb/Core DataFileCache.h Module.h, lldb/include/lldb/Symbol ObjectFile.h Symbol.h

[lldb] Edits and clarifications to DataFileCache comments, NFC (#199787)

I was reading through Greg Clayton's DataFileCache PR and fixed a few
small typeos as I went along.

I also had a little trouble understanding the two types of hashes that
are calculated for a file, at first, and I tried to write comments for
the relevant methods (in Module, ObjectFile, and DataFileCache) to be
more explicit about their role and the role of the other hashes that are
calculated. It may be more detail than necessary, but it would have been
helpful for me while reading this through.
DeltaFile
+15-7lldb/include/lldb/Core/DataFileCache.h
+9-5lldb/include/lldb/Core/Module.h
+8-4lldb/include/lldb/Symbol/ObjectFile.h
+4-4lldb/source/Core/DataFileCache.cpp
+2-2lldb/source/Core/Mangled.cpp
+2-2lldb/include/lldb/Symbol/Symbol.h
+40-243 files not shown
+45-299 files

LLVM/project 5ae73b9lldb/include/lldb/Core Module.h, lldb/source/Commands CommandObjectTarget.cpp

[lldb] Keep addr for Memory Modules separate (#199810)

This change is to make DataFileCache symbol table caching work with
memory-read binary modules.

When we read a Module out of memory, we keep the address of the module
in Module's m_object_name field as a string. This is normally the name
of a file in a ranlib/static library/.a archive like the "main.o" in
"foo.a(main.o)". The address is most often seen in the "image list"
output, and is the only easy way to distinguish in that output which
binaries were read out of memory, versus found on local disk. The "name"
of the Module ends up being the combination of the FileSpec plus this
m_object_name.

Reading a binary out of memory is expensive, primarily because of
reading the symbol table. The DataFileCache feature that Greg introduced
five years ago can cache the Symbol Table for a binary locally, and when
we see the same binary loaded again in a future debug session/lldb
session, we can skip parsing the symbol table (or in the case of Memory

    [26 lines not shown]
DeltaFile
+15-15lldb/source/Core/Module.cpp
+7-0lldb/include/lldb/Core/Module.h
+3-0lldb/source/Commands/CommandObjectTarget.cpp
+25-153 files

LLVM/project b6161b9libc/include CMakeLists.txt

[libc] Add missing struct_mmsghdr dependency to sys_socket (#200051)

Updated libc/include/CMakeLists.txt to add
.llvm-libc-types.struct_mmsghdr to the sys_socket dependency list. This
ensures that the generated sys/socket.h correctly includes the
struct_mmsghdr.h type header.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+1-0libc/include/CMakeLists.txt
+1-01 files

LLVM/project 5a7e4a0llvm/lib/CodeGen MachineFunction.cpp, llvm/lib/MC MCDwarf.cpp

[AMDGPU][MC] Replace shifted registers in CFI instructions (#183147)

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
DeltaFile
+67-67llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+33-0llvm/lib/MC/MCDwarf.cpp
+15-15llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+10-0llvm/lib/CodeGen/MachineFunction.cpp
+4-4llvm/test/CodeGen/AMDGPU/debug-frame.ll
+2-2llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+131-885 files not shown
+143-9011 files

LLVM/project 4e39ea3llvm/lib/Target/AMDGPU SIFrameLowering.cpp SIMachineFunctionInfo.h, llvm/test/CodeGen/AMDGPU amdgpu-spill-cfi-saved-regs.ll

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs (#183149)

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+2,926-0llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
+12-0llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-0llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+9-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+2,959-05 files

LLVM/project 4fe4d98llvm/lib/IR Instructions.cpp, llvm/test/Transforms/SimpleLoopUnswitch trivial-unswitch-profmd.ll

[IR] Handle `expected` tag in switch branch weights. (#200025)

Switch branch weight metadata has an optional `expected` tag.
SwitchInstProfUpdateWrapper::getSuccessorWeight() did not handle this
tag; if it was present, it would return nullopt, effectively ignoring
the metadata.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
DeltaFile
+143-0llvm/test/Transforms/SimpleLoopUnswitch/trivial-unswitch-profmd.ll
+5-5llvm/lib/IR/Instructions.cpp
+148-52 files

LLVM/project b0516c5llvm/lib/Transforms/Scalar SeparateConstOffsetFromGEP.cpp, llvm/test/Transforms/SeparateConstOffsetFromGEP split-gep-sub.ll

[SeparateConstOffsetFromGEP] Set `inbounds` correctly. (#199304)

swapGEPOperand reorders the GEPs (ptr+off)+const into (ptr+const)+off.
When it does so, it needs to determine if the inner GEP is inbounds.

Previously the way it did this was to call
stripAndAccumulateInBoundsConstantOffsets on (ptr+const), and then check
if this offset was indeed in-bounds.

However, this GEP was not necessarily marked as `inbounds` itself. If it
was not, stripAndAccumulateInBoundsConstantOffsets would return 0 for
the offset (instead of `const`), in which case we'd check if
`0 < [obj width]`, which is trivially true, and then incorrectly mark
the GEP as inbounds.

This bug was found by a large run of Opus 4.7 looking for bugs in LLVM.
DeltaFile
+29-11llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
+38-0llvm/test/Transforms/SeparateConstOffsetFromGEP/split-gep-sub.ll
+1-1llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/lower-gep.ll
+68-123 files

LLVM/project 9ca1941flang-rt/cmake/modules AddFlangRTOffload.cmake, flang-rt/lib/runtime CMakeLists.txt

[flang-rt][cuda] Move thin I/O to ptx only (#200054)
DeltaFile
+6-1flang-rt/cmake/modules/AddFlangRTOffload.cmake
+0-3flang-rt/lib/runtime/CMakeLists.txt
+6-42 files

LLVM/project 7c3c0ddllvm/lib/Target/AMDGPU SIInstrInfo.td VOPDInstructions.td, llvm/lib/Target/AMDGPU/Utils AMDGPUBaseInfo.cpp

[AMDGPU] Speedup canBeVOPD()

Generate static table from tablegen instead of trying to
create a full VOPD opcode just to see if that is possible.

Ideally it shall be single table with info for both X and
Y components and non-VOPD opcode as a primary key, although
I do not think we can genere it now.
DeltaFile
+8-23llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
+11-1llvm/lib/Target/AMDGPU/SIInstrInfo.td
+2-0llvm/lib/Target/AMDGPU/VOPDInstructions.td
+21-243 files

LLVM/project e3d8bfbflang/lib/Semantics resolve-directives.cpp, flang/test/Semantics/OpenMP detach-symbols.f90

[flang][OpenMP] Event handles are not predetermined shared

Am event-handle variable that appears in a DETACH has its data-sharing
attributes determined according to the usual rules in the constructs
enclosing the clause.
DeltaFile
+0-17flang/test/Semantics/OpenMP/detach-symbols.f90
+0-11flang/lib/Semantics/resolve-directives.cpp
+0-282 files

LLVM/project bf005a1clang/lib/StaticAnalyzer/Checkers/WebKit ASTUtils.cpp PtrTypesSemantics.cpp, clang/test/Analysis/Checkers/WebKit unretained-call-args-member.mm call-args.cpp

[alpha.webkit.UnretainedCallArgsChecker] Emit a warning for a non-const RetainPtr member (#184243)

This PR fixes a bug in UnretainedCallArgsChecker that it wouldn't emit a
warning when calling a function with the return value of a getter of a
RetainPtr non-const member variable even if such a member variable could
be mutated during such a function call.

The bug caused by tryToFindPtrOrigin treating any call of a getter on a
smart pointer member variable as safe. Fixed the bug by limiting this to
only when the variable is a local variable or a function parameter.

In addition, this PR fixes a bug in WebKit checkers that it would
erroneously emit a warning when calling a getter on a const RetainPtr
member variable beacuse isOwnerPtr was returning false for RetainPtr.
This false negative was previously masked / hidden by the false positive
fixed in this PR.

---------

Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
DeltaFile
+184-0clang/test/Analysis/Checkers/WebKit/unretained-call-args-member.mm
+42-0clang/test/Analysis/Checkers/WebKit/call-args.cpp
+8-3clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
+2-2clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
+4-0clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
+240-55 files

LLVM/project ab1c644flang/lib/Lower/OpenMP OpenMP.cpp Utils.cpp, flang/test/Lower/OpenMP metadirective-user.f90

Place dynamic condition cleanups before branching

A dynamic user condition can create expression temporaries before the
selected variant is lowered. For example, a metadirective condition
such as:

  when(user={condition(getbool("hello"))}: barrier)

passes a character literal through an associated temporary. That
temporary belongs to evaluating the condition, so it must be cleaned
up before lowering enters the generated fir.if that selects between
variants.

Finalize the statement context after evaluating the condition and
before creating the branch. Keep the condition expression and source
location together as DynamicUserCondition, use that source for
generated operations, and add a regression for the temporary-producing
condition case.
DeltaFile
+23-18flang/lib/Lower/OpenMP/OpenMP.cpp
+20-17flang/lib/Lower/OpenMP/Utils.cpp
+30-0flang/test/Lower/OpenMP/metadirective-user.f90
+9-5flang/lib/Lower/OpenMP/Utils.h
+82-404 files

LLVM/project 982dd0bflang/lib/Lower/OpenMP OpenMP.cpp, flang/test/Lower/OpenMP metadirective-user.f90

Clarify dynamic metadirective selection lowering

Explain that statically applicable variants are ranked before dynamic
user conditions. When a dynamic condition is selected, it is lowered to a
runtime branch whose else region continues selection among the remaining
candidates.

Add a begin/end variant test that includes clauses, and tighten checks
for the empty `nothing` fallback.
DeltaFile
+27-2flang/test/Lower/OpenMP/metadirective-user.f90
+12-0flang/lib/Lower/OpenMP/OpenMP.cpp
+39-22 files

LLVM/project ab95769llvm/lib/CodeGen MachineFunction.cpp, llvm/lib/MC MCDwarf.cpp

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
DeltaFile
+67-67llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+33-0llvm/lib/MC/MCDwarf.cpp
+15-15llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+10-0llvm/lib/CodeGen/MachineFunction.cpp
+4-4llvm/test/CodeGen/AMDGPU/debug-frame.ll
+2-2llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+131-885 files not shown
+143-9011 files

LLVM/project 825ef10llvm/lib/Target/AMDGPU SIFrameLowering.cpp SIMachineFunctionInfo.h, llvm/test/CodeGen/AMDGPU amdgpu-spill-cfi-saved-regs.ll

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
DeltaFile
+2,926-0llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
+12-0llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-0llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+9-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+2,959-05 files

LLVM/project b639988

[AMDGPU] Use register pair for PC spill

Change-Id: Ibedeef926f7ff235a06de65a83087c151f66a416
DeltaFile
+0-00 files

LLVM/project 3d76e07

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+0-00 files