LLVM/project 24be73bclang/test/CodeGen attr-target-clones-ppc.c

test all supported CPUs
DeltaFile
+13-2clang/test/CodeGen/attr-target-clones-ppc.c
+13-21 files

LLVM/project 2cfce29clang/test/Sema attr-target-clones-ppc.c

fix test
DeltaFile
+3-1clang/test/Sema/attr-target-clones-ppc.c
+3-11 files

LLVM/project 3b7e5b9clang/lib/Sema SemaPPC.cpp

create PPCTargetInfo::isTargetClonesSupportedCPU to filter out unsupported CPUs during Sema
DeltaFile
+6-3clang/lib/Sema/SemaPPC.cpp
+6-31 files

LLVM/project 5b1eed6clang/lib/CodeGen CGException.cpp, clang/test/CodeGen windows-seh-arg-capture-crash.cpp

[WinEH] Fix crash when aligning parameters larger than ABI (#180905)

Fix #180648 caused by an unhandled `Argument` for parameters exceeding
ABI size limits. This patch explicitly emits an `alloca` for the `Argument` in 
the entry block to ensure correct address resolution.
DeltaFile
+56-0clang/test/CodeGen/windows-seh-arg-capture-crash.cpp
+27-7clang/lib/CodeGen/CGException.cpp
+83-72 files

LLVM/project 0535075llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVInstrInfo.td

[RISCV] Use PatGprImm for riscv_psslai. NFC (#185996)

Relax PatGprImm to allow any SDPatternOperator insead of ImmLeaf.
DeltaFile
+2-4llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+1-1llvm/lib/Target/RISCV/RISCVInstrInfo.td
+3-52 files

LLVM/project 0e314eflldb/tools/lldb-fuzzer/lldb-commandinterpreter-fuzzer lldb-commandinterpreter-fuzzer.cpp, lldb/tools/lldb-fuzzer/lldb-target-fuzzer lldb-target-fuzzer.cpp

[LLDB] Ensure plugins are destroyed at end of fuzz tests (#186012)
DeltaFile
+22-0lldb/tools/lldb-fuzzer/utils/SBDebuggerContextManager.h
+5-5lldb/tools/lldb-fuzzer/lldb-commandinterpreter-fuzzer/lldb-commandinterpreter-fuzzer.cpp
+3-5lldb/tools/lldb-fuzzer/lldb-target-fuzzer/lldb-target-fuzzer.cpp
+30-103 files

LLVM/project 0e45e69clang/test/Layout ms-x86-bitfields-overflow.c

[Clang][layout] Update tests after #182792 (#186019)

\#182792 makes it so that these structs have an alignment of 1. This
needs to be fixed in a recently added test (landed after the most recent
premerge run of the test).

This test update is expected behavior.
DeltaFile
+2-2clang/test/Layout/ms-x86-bitfields-overflow.c
+2-21 files

LLVM/project 3ca069cllvm/include/llvm/CodeGen BasicTTIImpl.h, llvm/test/Analysis/CostModel/AArch64 fshl.ll fshr.ll

[CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (#184942)

The Sub instruction cost and the shift-by-zero handling costs (ICmp +
Select) are only needed when the shift amount is non-constant. Move them
inside the `!OpInfoZ.isConstant()` guard to avoid overestimating cost
for constant shift amounts.

The overestimated scalar cost caused SLP vectorizer to incorrectly
prefer vectorizing funnel shifts with constant shift amounts, since SLP
compares vector cost against scalar cost and a falsely high scalar cost
makes vectorization appear more profitable than it actually is.

Fixes #181308.
DeltaFile
+405-440llvm/test/Analysis/CostModel/X86/fshl.ll
+405-440llvm/test/Analysis/CostModel/X86/fshr.ll
+95-0llvm/test/Transforms/SLPVectorizer/RISCV/funnel-shift-cost.ll
+16-15llvm/include/llvm/CodeGen/BasicTTIImpl.h
+15-15llvm/test/Analysis/CostModel/AArch64/fshl.ll
+15-15llvm/test/Analysis/CostModel/AArch64/fshr.ll
+951-9251 files not shown
+961-9357 files

LLVM/project 0b332dellvm/lib/Target/RISCV RISCVSchedAndes45.td, llvm/test/tools/llvm-mca/RISCV/Andes45 rvv-permutation.s rvv-fp.s

[RISCV] Update Andes45 vector permutation scheduling info (#185591)

This PR adds latency/throughput for all RVV permutation instructions to
the andes45 series scheduling model.

We use the default cycle for permutation instructions since we are
unable to model the Latency and ReleaseAtCycles accurately now.
DeltaFile
+343-343llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
+41-22llvm/lib/Target/RISCV/RISCVSchedAndes45.td
+30-30llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fp.s
+414-3953 files

LLVM/project b72a812clang-tools-extra/clang-tidy/modernize UseTrailingReturnTypeCheck.cpp, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Fix spurious errors from builtin macros in modernize-use-trailing-return-type (#184022)

## Summary

I hit the same issue as in #168360 when upgrading to LLVM 21 with
clang-tidy reporting cryptic:

`error: missing '(' after '__has_feature'`

Further investigation confirmed that the issue is localized to
`modernize-use-trailing-return-type` and only happens with C++20+ and llvm
21 system headers (where `__has_feature` started to be used by libc++).
Initial non-localized repro had this error firing 7k+ on LLVM 21, but
when I switched to HEAD the incidence dropped to just 5 'check()' calls
firing. The drop in incidence is likely to be related to 
https://github.com/llvm/llvm-project/pull/151035 as there are no other 
plausibly relevant changes.

However, as I was still hitting the issue with HEAD, this helped develop

    [20 lines not shown]
DeltaFile
+11-0clang-tools-extra/test/clang-tidy/checkers/modernize/use-trailing-return-type.cpp
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+1-3clang-tools-extra/clang-tidy/modernize/UseTrailingReturnTypeCheck.cpp
+17-33 files

LLVM/project da3efc7clang/lib/AST RecordLayoutBuilder.cpp, clang/test/CodeGen ms_struct-packed.c ms_struct-bitfield.c

Fix packed being ignored on ms_struct bitfields (#182792)

For ms_struct structs on Itanium layout targets, the packed attribute is
ignored on bit-fields (2014 commit
76e1818a2b1248579557de2927c135c322577c82), mismatching the GCC behavior.
Remove the `!IsMsStruct` guard to fix it.
DeltaFile
+18-0clang/test/CodeGen/ms_struct-packed.c
+2-2clang/test/CodeGen/ms_struct-bitfield.c
+1-1clang/lib/AST/RecordLayoutBuilder.cpp
+21-33 files

LLVM/project 26f9bf5llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

fixes according reviews
DeltaFile
+12-14llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+12-141 files

LLVM/project c56410fllvm/test/Transforms/SLPVectorizer/RISCV basic-strided-stores.ll

[SLP] Pre-commit tests for constant strided stores (#185990)

Tests for #185964
DeltaFile
+879-0llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-stores.ll
+879-01 files

LLVM/project 472c8f8llvm/lib/Target/Mips MipsSetMachineRegisterFlags.cpp MipsSEInstrInfo.cpp, llvm/test/CodeGen/MIR/Mips mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir

MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (#185820)

There may be some BB to COPY fgr64cc register, and the fgr64cc register
is set by the previous BB.
We add a new pass called MipsSetMachineRegisterFlags, in which we set

We introduce a new pass called MipsSetMachineRegisterFlags, in which we
set NoSWrap flag for all instructions that works with fgr64cc registers.

And in copyPhyRegister, we allow the COPY instruction with NoSignWrap
from the double float registers to gpr32.
DeltaFile
+111-0llvm/lib/Target/Mips/MipsSetMachineRegisterFlags.cpp
+16-5llvm/test/CodeGen/MIR/Mips/mips32r6-copyPhysReg-fcmp-f64-to-gpr.mir
+2-1llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
+2-0llvm/lib/Target/Mips/MipsTargetMachine.cpp
+2-0llvm/lib/Target/Mips/Mips.h
+1-0llvm/lib/Target/Mips/CMakeLists.txt
+134-66 files

LLVM/project 92623c5flang/lib/Parser expr-parsers.cpp, flang/test/Parser bug2364.f90

[flang] Improve error message for missing primary expression (#185484)

Don't mention the possible expectation that the extension %LOC() could
appear when emitting the error messages for a completely missing primary
expression; it's just confusing.
DeltaFile
+7-4flang/lib/Parser/expr-parsers.cpp
+8-0flang/test/Parser/bug2364.f90
+15-42 files

LLVM/project 79026d2flang/lib/Semantics mod-file.cpp, flang/test/Semantics modfile55.cuf

[flang][cuda] Emit CUDA attributes in type declarations in mod files (#185462)

The compiler implements CUDA object entity attributes in module files by
emitting "attributes()" statements after the type declaration statement
for the object. This works fine for variables, but not at all for
derived type components -- the "attributes()" statement is not allowed
in a derived type definition, and the module file isn't readable later
when USE'd. The fix is to emit the attribute as part of the type
declaration statement or component declaration statement instead.
DeltaFile
+15-15flang/test/Semantics/modfile55.cuf
+5-4flang/lib/Semantics/mod-file.cpp
+20-192 files

LLVM/project 6c217bblldb/test/API/functionalities/process_crash_info TestProcessCrashInfo.py

[lldb] Update TestProcessCrashInfo for MTE (#185808)

With MTE, the issue is caught by hardware and libmalloc records a
different message: "BUG IN CLIENT OF LIBMALLOC: MTE tag mismatch
(probable double-free)". Update the test accordingly.
DeltaFile
+1-0lldb/test/API/functionalities/process_crash_info/TestProcessCrashInfo.py
+1-01 files

LLVM/project c30e11clldb/source/Commands CommandObjectMemory.cpp

[lldb] Use raw address in "memory history" command (#185812)

The `memory history` command was using `ToAddress` for its address
argument, which strips non-addressable bits (including MTE tag bits) via
`FixAnyAddress`. This caused us to pass a stripped address to
`__asan_get_alloc_stack`/`__asan_get_free_stack`, which is incorrect.
Switch to `ToRawAddress` to preserve the complete address, including the
MTE tag, so we can look up the correct address.
DeltaFile
+1-1lldb/source/Commands/CommandObjectMemory.cpp
+1-11 files

LLVM/project 85bdc27lldb/test/API/python_api/find_in_memory address_ranges_helper.py

[lldb] Use SBProcess.FixAddress in address_ranges_helper.py (#185802)

Use `SBProcess.FixAddress` in `address_ranges_helper.py` to support
arm64e and ARM's Memory Tagging Extension (MTE) which rely on TBI to
encode data in the top byte, which in this mode is ignored by the HW.

This fixes TestFindInMemory.py and TestFindRangesInMemory.py when
running the LLDB test suite with MTE.
DeltaFile
+6-6lldb/test/API/python_api/find_in_memory/address_ranges_helper.py
+6-61 files

LLVM/project 2b6ca07clang/lib/CodeGen CodeGenModule.cpp, clang/lib/Sema SemaPPC.cpp

diagnose non-cpu strings in target_clones in Sema
DeltaFile
+3-5clang/lib/Sema/SemaPPC.cpp
+1-1clang/lib/CodeGen/CodeGenModule.cpp
+4-62 files

LLVM/project b2c5e6fclang/test/CodeGen scoped-atomic-ops.c, llvm/test/CodeGen/AArch64 clmul-fixed.ll

Merge branch 'main' into users/kparzysz/e05-intervening-code
DeltaFile
+853-1,663llvm/test/CodeGen/AArch64/clmul-fixed.ll
+927-1,424llvm/test/tools/dsymutil/AArch64/stmt-seq-macho.test
+706-1,470llvm/test/CodeGen/X86/funnel-shift-i512.ll
+1,769-0llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
+1,189-529llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
+1,419-130clang/test/CodeGen/scoped-atomic-ops.c
+6,863-5,2162,130 files not shown
+79,062-28,3022,136 files

LLVM/project 6c30fe3flang/lib/Semantics openmp-utils.cpp

Fix/add comments
DeltaFile
+12-4flang/lib/Semantics/openmp-utils.cpp
+12-41 files

LLVM/project f0cba9dclang/lib/CodeGen CGOpenMPRuntime.cpp, llvm/include/llvm/Frontend/OpenMP OMPIRBuilder.h

[mlir][OpenMP] Translate omp.declare_simd to LLVM IR

This mod aim to generate same vector ABI [1] for declare simd as Clang
and reuse function paramater mangling and codegen logic authored by
@alexey-bataev in [2].
Codegen for AArch64 is not included in this patch.

For each omp.declare_simd, lowering computes:

ParamAttrs: one entry per function argument, classifying it as
Vector / Uniform / Linear (+ step or var-stride) / Aligned.
Branch kind: Undefined / Inbranch / Notinbranch.
VLEN: either from simdlen(...) or derived from the CDT size.
llvm then emits x86 declare-simd variants by attaching mangled
function attributes of the form:

_ZGV _

where:

    [11 lines not shown]
DeltaFile
+205-0mlir/test/Target/LLVMIR/openmp-declare-simd-x86.mlir
+174-0mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+57-104clang/lib/CodeGen/CGOpenMPRuntime.cpp
+160-0llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+66-0llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+662-1045 files

LLVM/project 49a8f37clang/lib/CIR/Dialect/Transforms FlattenCFG.cpp, clang/test/CIR/CodeGen invoke-attrs.cpp try-catch.cpp

[CIR] Preserve attributes when converting call to try_call (#185782)

This adds code to preserve any attributes, including parameter and
return value attributes, that were present on a call operation that is
being replaced with a try_call operation.
DeltaFile
+129-0clang/test/CIR/Transforms/flatten-preserve-attrs.cir
+77-0clang/test/CIR/CodeGen/invoke-attrs.cpp
+22-1clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
+8-8clang/test/CIR/CodeGen/try-catch.cpp
+3-3clang/test/CIR/CodeGen/new-delete.cpp
+2-2clang/test/CIR/CodeGen/virtual-fn-calls-eh.cpp
+241-146 files

LLVM/project 6e93c4aclang/test/CodeGenHLSL ArrayAssignable.hlsl, clang/test/CodeGenHLSL/resources MatrixElement_cbuffer.hlsl CBufferMatrixSingleSubscriptSwizzle.hlsl

[DirectX] Specify element-aligned vectors (#180622)

Use the new "ve" Data Layout specifier to indicate that vectors are
element-aligned for the target.

Part of #123968
DeltaFile
+20-20llvm/test/CodeGen/DirectX/MemIntrinsics/memcpy-pointee.ll
+16-16clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
+8-8llvm/test/CodeGen/DirectX/MemIntrinsics/memcpy-struct.ll
+8-8clang/test/CodeGenHLSL/resources/CBufferMatrixSingleSubscriptSwizzle.hlsl
+5-5clang/test/CodeGenHLSL/resources/cbuffer_geps.hlsl
+4-4clang/test/CodeGenHLSL/ArrayAssignable.hlsl
+61-6111 files not shown
+77-8117 files

LLVM/project eae80c6llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV][P-ext] Remove unncessary patterns for setgt/setugt. NFC (#185971)

We mark these CondCodes as Expand so LegalizeDAG will turn them into
setlt/setult.
DeltaFile
+0-5llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+0-51 files

LLVM/project 6903a58lldb/examples/python formatter_bytecode.py, lldb/test/Shell/ScriptInterpreter/Python python-bytecode.test

[lldb][bytecode] Add swift output to Python->bytecode compiler (#185773)

For swift projects using the compiler, having a swift output option will
make it easier to integrate bytecode formatters into the build.
DeltaFile
+100-33lldb/examples/python/formatter_bytecode.py
+38-0lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterC.txt
+0-38lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatter.txt
+36-0lldb/test/Shell/ScriptInterpreter/Python/Inputs/FormatterBytecode/RigidArrayLLDBFormatterSwift.txt
+4-2lldb/test/Shell/ScriptInterpreter/Python/python-bytecode.test
+178-735 files

LLVM/project 7c134b4lldb/source/ValueObject ValueObject.cpp

[LLDB] Fix null pointer dereference. (#185985)

The code was declaring a shared poiner and then immediately trying to
dereference it to initialize it's contents, but the dereference was
giving a seg fault. This fixes that issue.
DeltaFile
+3-4lldb/source/ValueObject/ValueObject.cpp
+3-41 files

LLVM/project 0779914clang/include/clang/Options Options.td, clang/lib/CodeGen CGObjCMac.cpp

[ObjC] Emit class msgSend stub calls (#183923)

Instead of translating class messages to `objc_msgSend` calls, clang now
emits calls to stub functions that are synthesized by the linker. Each
stub loads the class reference and the selector name and forwards them
to `objc_msgSend`.

The stub function is named using the following format:
`objc_msgSendClass$selName$_OBJC_CLASS_$_className`

Note that the optimization is disabled in the following cases:
- When the class name is unknown at compile time (e.g, `[id
classMethod]`).
- The selector name contains a `$`, which serves as the delimiter in
stub
   function names.
- The class is annotated with either `objc_class_stub` or
  `objc_runtime_visible`.


    [14 lines not shown]
DeltaFile
+125-12clang/test/CodeGenObjC/method-selector-stub.m
+51-13clang/lib/CodeGen/CGObjCMac.cpp
+31-8clang/test/Driver/darwin-objc-selector-stubs.m
+9-0clang/lib/Driver/ToolChains/Darwin.cpp
+6-1clang/lib/Driver/ToolChains/Clang.cpp
+4-0clang/include/clang/Options/Options.td
+226-341 files not shown
+227-347 files

LLVM/project eeef27elibclc/clc/lib/generic/conversion clc_convert_int2float.cl, libclc/clc/lib/generic/math clc_lgamma_r.cl clc_atan2pi.cl

Revert "[libclc][NFC] Change include style from <...> to "..."" (#185888)

Reverts llvm/llvm-project#185788. This change is causing test
regressions in libclc, so it's definitely not "NFC", and with its size
it's hard to figure out what exactly went wrong.
DeltaFile
+26-26libclc/clc/lib/generic/conversion/clc_convert_int2float.cl
+17-17libclc/clc/lib/generic/math/clc_lgamma_r.cl
+17-17libclc/clc/lib/generic/math/clc_atan2pi.cl
+17-17libclc/clc/lib/generic/math/clc_atan2.cl
+16-16libclc/clc/lib/generic/math/clc_sincos_helpers.cl
+16-16libclc/clc/lib/generic/math/clc_remainder.cl
+109-109679 files not shown
+2,412-2,417685 files