[mlir][tosa] Add constant block scaled support (#205506)
This commit adds support for block scaled tensors.
In particular, the block scaled type has been extended with the
`DenseElementTypeInterface` to allow block scaled data values to be
specified in dense element attributes.
The block scaled type has also been extended to allow optional scale
values to be specified by the type. For now, scale values are not
expected to be propagated beyond their use in the attribute input of a
constant operation. In the future, we may want to propagate these values
to allow certain optimizations.
The `tosa.const` operation has also been updated in the validation pass.
cmake: Try to derive CMAKE_SYSTEM_NAME from unnormalized triples
get_triple_cmake_system_name() assumed a fully-normalized triple of the form
arch-vendor-os[-env] and read the OS and environment from fixed positions.
Unnormalized triples often omit the vendor and/or environment
(e.g. "aarch64-linux-android21", "aarch64-linux-gnu", "wasm32-wasi"),
so those fixed positions are wrong, and the function returned
bogus results, e.g.. "aarch64-linux-android21" -> Generic.
This was expecting to get a normalized triple by running clang -print-target-triple,
but that may not always work.
Scan all triple components for the known OS and environment tokens instead of
reading fixed positions. Ideally we would have a full triple normalization
function in cmake that mirrors the normalization in Triple.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
[offload] Add olMemPrefetch to liboffload (#206752)
Adds olMemPrefetch and the OL_MEM_MIGRATION_FLAG_* enum, wired through a
new dataPrefetchImpl on the plugin interface with Level Zero and CUDA
implementations. Backends without prefetch support inherit the default
no-op.
Prefetch is a hint that migrates a USM allocation between the host and a
device so subsequent accesses on the target side are faster.
Assisted-by: Claude
[VectorCombine] Fix bailing out of the foldSingleElementStore with a freeze-pending index (#207702)
`foldSingleElementStore` calls `canScalarizeAccess` to decide whether a
single-element store can be scalarized. When the insert index is not a
constant, is provably in-bounds and may be poison, `canScalarizeAccess`
returns `SafeWithFreeze` and stashes a `ToFreeze` value that must later
be consumed by `freeze()` or cleared by `discard()`.
The bail-out for memory being modified between the load and store was
folded into same condition as the scalarizability check:
```cpp
auto ScalarizableIdx = canScalarizeAccess(...);
if (ScalarizableIdx.isUnsafe() || isMemModifiedBetween(...))
return false;
```
When the index took the `SafeWithFreeze` path and memory was modified
between the load and the store, `isMemModifiedBetween` returns true and
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[libc++] Update the label for FreeBSD in CI to version 15.1 (#205417)
The FreeBSD libc++ CI has been bumped to the new FreeBSD release. The
remaining task to do is to bump the description in CI yaml file.
[clang][docs] Fix coro_await_elidable bullet list rendering (NFC) (#208333)
Add the blank line required before the reStructuredText bullet list and
indent the continuation line for the second item. Without this, the
generated AttributeReference page does not render the
coro_await_elidable safe-elide-context bullets correctly.
[Flang][OpenMP] add Apply clause for OpenMP Flang (#204225)
This patch adds a parser and basic checks for the Apply clause from
OpenMP 6.0 in Flang.
It is missing semantic checks for nesting loop transformations that are
being worked on.
[X86] Add v16i16 shuffle tests for "shift + blend" pack patterns (#208481)
Shuffles that could be expanded by shifting one input and blending with
the second inplace input
[CIR] Represent 'empty' fields in structs/unions (#207033)
Since we do field based GEPs, it isn't really possible to do a
get-address-of a field without representing all the fields in a CIR
struct. This patch makes sure we do that, so we can do the proper GEPs.
This patch also as a drive-by fixes the case where we were searching for
the 'path' inside of an empty base, which we don't represent (and
probably should not need to?).
This patch ALSO adds some NYI diagnostics for cases where we try to get
the address of a `no-unique-address` field, which we are not currently
representing. In the future, we are going to have to start representing
no-unique-address fields inside of a struct as well (plus figure out how
to lower it properly in a way that gets the offsets right), but it isn't
clear this is immediately necessary (as you'd have to take an address of
one to notice?).
offload: Use amdgpu triple name in plugin build (#208455)
The PGO tests expect the produced filename to match the triple.
The tool pulls the triple name from the binary's triple name, and the
RUN lines expect it to match the triple the build was configured with.
[RISCV][P-ext] Rewrite intrinsic widening code to be more agnostic to number of operands. NFC (#208335)
Copy the operands to a vector and use a loop to widen them.
[IR] Allow integer vector atomicrmw (#190716)
Previously, we allowed floating-point vector atomicrmw, but not
integer-vector atomicrmw. Relax this restriction. By default, integer
vector atomicrmw will cmpxchg expand.
Assisted by AI
BPF: Fix misfolding subregisters
This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.
The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
[mlir][IR] Avoid Clang 21 crash during SFINAE overload resolution (#208359)
Clang 21.1.8 segfaults during SFINAE overload resolution for
T::getChecked
when matching non-pointer arguments against an unconstrained
MLIRContext*
parameter.
This patch avoids the crash by adding an explicit SFINAE constraint to
the second overload of StorageUserBase::getChecked, ensuring that it is
only considered when the second argument is convertible to MLIRContext*.
Assisted-by: Antigravity
[Clang] Define `__WCHAR_MIN__` and related macros (#208135)
Define `__WCHAR_MIN__`, `__WINT_MIN__`, and `__SIG_ATOMIC_MIN__` for
compatibility with GCC.
This also fixes targets such as `riscv*-netbsd` that define `WCHAR_MIN`
from `__WCHAR_MIN__`.
Reference:
https://gcc.gnu.org/onlinedocs/gcc-16.1.0/cpp/Common-Predefined-Macros.html
Closes #199678
BPF: Fix misfolding subregisters
This would end up introducing a copy between registers
with mismatched sizes previously. Defends against verifier
failures in a future change.
The actual transform here should be deleted. Optimizations should
not be trying to introduce SUBREG_TO_REG.
[NVVM][MLIR] Fixed valgrind leak in MMAOp (#208063)
MmaOp::getIntrinsicID triggers an uninitialized-read warning under
Valgrind. `intOverflowBehavior` is optional; in the generated selector
its `has_value()` guarded access can be speculatively loaded before the
guard, reading the empty std::optional's uninitialized payload.
The read is benign: the payload is correctly stack-allocated but
uninitialized while empty, and the loaded value is discarded by the
guard, so this is not incorrect / undefined behavior.
This MR keeps the attribute as optional, but the lowering now resolves
it to a concrete value (wrapped when omitted) before calling
getIntrinsicID, so the selector always reads an initialized value.
`wrapped` matches the PTX spec and the existing lowering, where an
omitted attribute already selected the non-satfinite intrinsic;
intrinsic selection and printed IR are unchanged. Documentation updated
to correct the stale default.
[SPIR-V] Tie Int64ImageEXT to R64i/R64ui image format, not sampled type (#203005)
The capability is required by the R64i/R64ui Image Format per
SPV_EXT_shader_image_int64 spec, not by a 64-bit integer sampled type
Related SPIRV-LLVM-Translator PR that fixes this issue there:
https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/3773
