LLVM/project bab211d — utils/bazel MODULE.bazel MODULE.bazel.lock

[Bazel] Update mpfr to 4.2.2.bcr.4 (#242184)

Updates the BCR mpfr dependency from 4.2.2.bcr.3 to 4.2.2.bcr.4 to
restore float128 detection when building MPFR from source
(bazelbuild/bazel-central-registry#11691).

Fixes #240663

See https://github.com/bazelbuild/bazel-central-registry/issues/11691
DeltaFile
+4-2utils/bazel/MODULE.bazel.lock
+1-1utils/bazel/MODULE.bazel
+5-32 files

LLVM/project 588ffbc — llvm/lib/Target/AMDGPU AMDGPURegisterBankInfo.cpp AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU stacksave_stackrestore.ll

[AMDGPU][GISel] Capture the stack pointer at stacksave
DeltaFile
+254-190llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
+15-8llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+8-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+6-2llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-stacksave-stackrestore.mir
+0-3llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+283-2045 files

LLVM/project 437fb30 — llvm/lib/Target/AMDGPU SIInstrInfo.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-amdgpu-wave-address.mir inst-select-amdgpu-wave-address.mir

Relax the verifier to accept VRegs for G_AMDGPU_WAVE_ADDRESS
DeltaFile
+20-15llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-wave-address.mir
+5-9llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
+3-2llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+28-263 files

LLVM/project cacd2b4 — llvm/test/CodeGen/AMDGPU stacksave_stackrestore.ll

Pre-commit tests for the stackrestore fix
DeltaFile
+1,529-0llvm/test/CodeGen/AMDGPU/stacksave_stackrestore.ll
+1,529-01 files

LLVM/project 31fcaa5 — llvm/test/CodeGen/AMDGPU/GlobalISel regbankselect-amdgpu-wave-address.mir inst-select-amdgpu-wave-address.mir

Pre-commit tests for relaxing verifier
DeltaFile
+43-2llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-wave-address.mir
+20-1llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-wave-address.mir
+63-32 files

LLVM/project a9c7213 — lld/COFF PDB.cpp

[COFF] Parallelize PDB Section Contrib. NFC

PDB's createSectionContrib was computed serially.
This contains a CRC over data which can be expensive
for large binaries.
DeltaFile
+9-4lld/COFF/PDB.cpp
+9-41 files

LLVM/project 8de2ab5 — lldb/source/Core FormatEntity.cpp, lldb/test/API/functionalities/return-value-synthetic Makefile synthetic.py

Reapply "[lldb] Show synthetic children in the return value of the thread (#241947) (#242173)

This reverts commit e65a8642d426d82f145fbaac0575f4e0f6e2aa46.

https://github.com/llvm/llvm-project/pull/242068 should have fixed the
original problem.
DeltaFile
+26-0lldb/test/API/functionalities/return-value-synthetic/TestReturnValueSynthetic.py
+14-0lldb/test/API/functionalities/return-value-synthetic/main.c
+9-0lldb/test/API/functionalities/return-value-synthetic/synthetic.py
+7-1lldb/source/Core/FormatEntity.cpp
+3-0lldb/test/API/functionalities/return-value-synthetic/Makefile
+59-15 files

LLVM/project e2ab475 — clang/include/clang/CIR/Dialect/IR CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp

[CIR] Wire unreachable, return, and switch to MemoryEffectsOpInterface

These operations should be naturally Pure. However, cir.return and
cir.unreachable can inside cir.scope and cir.if. Making it create side
effect if it jump out of scope.

As a result, we check its parent. If it is a function, we make it
pure. Otherwise, we define read an write.

Notice that it is a ground work rather than enable some optimization
now. Currently, Core MLIR doesn't eliminiate now. However, Enzyme MLIR
did a much more optimization and require this feature. I think it
makes sense to have this in upstream now.

Assisted-by: Claude # Test
DeltaFile
+46-0clang/test/CIR/Transforms/canonicalize.cir
+23-0clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+6-3clang/include/clang/CIR/Dialect/IR/CIROps.td
+75-33 files

LLVM/project 9987313 — clang-tools-extra/docs/clang-tidy/checks/modernize use-designated-initializers.md use-default-member-init.md

[clang-tidy][docs] Rewrite modernize check docs to Markdown [2/4] (#232214)

Tracking issue: #201242

See the [migration guide] for more information.

[migration guide]:

https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines

This is the second part of rewriting check documentations in modernize
module from reST to MyST Markdown.

AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted (both Codex and AmpCode) cleanup.
I manually verified that the documentation renders as expected.

Preview site:
https://broken.life/llvm-staging/modernize-markdown-port/index.html
DeltaFile
+148-153clang-tools-extra/docs/clang-tidy/checks/modernize/use-auto.md
+96-107clang-tools-extra/docs/clang-tidy/checks/modernize/pass-by-value.md
+50-55clang-tools-extra/docs/clang-tidy/checks/modernize/replace-auto-ptr.md
+48-49clang-tools-extra/docs/clang-tidy/checks/modernize/use-constraints.md
+49-46clang-tools-extra/docs/clang-tidy/checks/modernize/use-default-member-init.md
+39-40clang-tools-extra/docs/clang-tidy/checks/modernize/use-designated-initializers.md
+430-4504 files not shown
+557-58510 files

LLVM/project 7126386 — clang-tools-extra/docs/clang-tidy/checks/modernize replace-auto-ptr.rst replace-auto-ptr.md

[clang-tidy][docs] Rename modernize check docs to Markdown [2/4] (#232213)

Tracking issue: #201242

See the [migration guide] for more information.

[migration guide]:

https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines

This is the second part of the mechanical rename of the check
documentations in modernize module.
The rewrite is provided by the next PR in this stack.
DeltaFile
+0-234clang-tools-extra/docs/clang-tidy/checks/modernize/use-auto.rst
+234-0clang-tools-extra/docs/clang-tidy/checks/modernize/use-auto.md
+0-171clang-tools-extra/docs/clang-tidy/checks/modernize/pass-by-value.rst
+171-0clang-tools-extra/docs/clang-tidy/checks/modernize/pass-by-value.md
+0-81clang-tools-extra/docs/clang-tidy/checks/modernize/replace-auto-ptr.rst
+81-0clang-tools-extra/docs/clang-tidy/checks/modernize/replace-auto-ptr.md
+486-48614 files not shown
+919-91920 files

LLVM/project 897dfd6 — clang/lib/CodeGen CGClass.cpp, clang/test/CodeGenCXX cfi-ignorelist.cpp cfi-vcall-type-checked-load.cpp

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+62-68clang/test/CodeGenCXX/cfi-vcall-type-checked-load.cpp
+24-14clang/lib/CodeGen/CGClass.cpp
+2-2clang/test/CodeGenCXX/cfi-ignorelist.cpp
+0-3compiler-rt/test/cfi/same-layout-delete.cpp
+88-874 files

LLVM/project 3d68cfd — clang/lib/CodeGen CGDebugInfo.h

[NFC][Clang][CodeGen] Take const& in deleted copy assignment operators (#241713)

436f391d1d56 (#154671) deleted the copy assignment operators of
`ApplyInlineDebugLocation` and `SanitizerDebugLocation` with a non-const
parameter. That still leaves the classes non-copyable, but it breaks
`std::optional<SanitizerDebugLocation>`: libstdc++ fails to default the
copy assignment of its storage.

Use `const &`, matching the deleted copy constructors.

Needed by #241646.

Assisted-by: Gemini
DeltaFile
+3-2clang/lib/CodeGen/CGDebugInfo.h
+3-21 files

LLVM/project ee66637 — llvm/include/llvm/ExecutionEngine/Orc Core.h, llvm/include/llvm/ExecutionEngine/Orc/Shared JITDylibLookupFlags.h

[ORC] Add SPS serialization for JITDylibLookupFlags (#242152)

JITDylibLookupFlags moves from Core.h into a new
Shared/JITDylibLookupFlags.h (still in the llvm::orc namespace),
alongside a new SPSJITDylibLookupFlags tag that serializes it as a bool:
true for MatchAllSymbols, false for MatchExportedSymbolsOnly. This
matches the ORC runtime's encoding, and will be used by an upcoming
call-controller handler that receives lookup flags from the executor.

The enum has to move because headers in Shared/ can't include Core.h.
Core.h includes the new header, so existing users are unaffected. The
enum's doc comment is also fixed to name its actual enumerators.
DeltaFile
+58-0llvm/include/llvm/ExecutionEngine/Orc/Shared/JITDylibLookupFlags.h
+23-0llvm/unittests/ExecutionEngine/Orc/SimplePackedSerializationTest.cpp
+1-8llvm/include/llvm/ExecutionEngine/Orc/Core.h
+82-83 files

LLVM/project d47aa72 — clang/lib/CodeGen CGExpr.cpp

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+15-14clang/lib/CodeGen/CGExpr.cpp
+15-141 files

LLVM/project d57c09d — clang/lib/CodeGen CGExpr.cpp, clang/test/CodeGen ubsan-enum-type-descriptor.cpp

[ubsan] Improve scoped enum diagnostic printer (#216460)

Noticed that ubsan diagnostic which print out enum underlying value,
default to `<unknown>` for scoped enum.

**Why**
The original code path in `EmitCheckTypeDescriptor` checks against
whether the type is integer via `isIntegerType(),
isSignedIntegerType()`. Per language, enum class types are never
considered integer types so that always fails and then the UBSan runtime
default prints `<unknown>` instead of the real value.

**Fix**
Simply extract the enum's underlying integer type up front and use that
for the int checks instead of the enum type itself.

**before**
`error: load of value <unknown>, which is not a valid value for type
'enum EBool'`

    [12 lines not shown]
DeltaFile
+40-0clang/test/CodeGen/ubsan-enum-type-descriptor.cpp
+11-3clang/lib/CodeGen/CGExpr.cpp
+1-1compiler-rt/test/ubsan/TestCases/Misc/enum.cpp
+52-43 files

LLVM/project f54ead3 — llvm/lib/CodeGen/SelectionDAG SelectionDAGBuilder.cpp, llvm/test/CodeGen/X86 mem-cache-hint-intrinsics.ll

preserve cacheh ints with intrinsics
DeltaFile
+1-4llvm/test/CodeGen/X86/mem-cache-hint-intrinsics.ll
+2-1llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+3-52 files

LLVM/project e015ec3 — bolt/test/X86 cfi-signal-frame.s, llvm/lib/CodeGen/AsmPrinter DwarfDebug.cpp

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+113-0llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-cse.ll
+0-87llvm/test/DebugInfo/dwarf-version-defaults.ll
+18-30llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+40-0bolt/test/X86/cfi-signal-frame.s
+0-27llvm/test/DebugInfo/NVPTX/no-dwarf-version-flag.ll
+9-11llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
+180-15514 files not shown
+227-19020 files

LLVM/project 3242551 — bolt/test/X86 cfi-signal-frame.s, llvm/lib/CodeGen/AsmPrinter DwarfDebug.cpp

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+113-0llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-cse.ll
+0-87llvm/test/DebugInfo/dwarf-version-defaults.ll
+18-30llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+40-0bolt/test/X86/cfi-signal-frame.s
+0-27llvm/test/DebugInfo/NVPTX/no-dwarf-version-flag.ll
+9-11llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
+180-15514 files not shown
+227-19020 files

LLVM/project 5c436af — bolt/test/X86 cfi-signal-frame.s, llvm/lib/CodeGen/AsmPrinter DwarfDebug.cpp

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+113-0llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-cse.ll
+0-87llvm/test/DebugInfo/dwarf-version-defaults.ll
+18-30llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+40-0bolt/test/X86/cfi-signal-frame.s
+0-27llvm/test/DebugInfo/NVPTX/no-dwarf-version-flag.ll
+9-11llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
+180-15514 files not shown
+227-19020 files

LLVM/project 753ac30 — bolt/test/X86 cfi-signal-frame.s, llvm/lib/CodeGen/AsmPrinter DwarfDebug.cpp

[spr] update

Created using spr 2.0.0-beta.2
DeltaFile
+113-0llvm/test/CodeGen/AMDGPU/fadd-fma-fmul-cse.ll
+0-87llvm/test/DebugInfo/dwarf-version-defaults.ll
+18-30llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+40-0bolt/test/X86/cfi-signal-frame.s
+0-27llvm/test/DebugInfo/NVPTX/no-dwarf-version-flag.ll
+9-11llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
+180-15514 files not shown
+227-19020 files

LLVM/project c51162f — llvm/test/CodeGen/X86 mem-cache-hint-intrinsics.ll, llvm/test/CodeGen/X86/GlobalISel irtranslator-mem-cache-hint.ll

[GlobalISel] Address cache hint test review feedback

Remove redundant intrinsic declarations and add a separate SelectionDAG test documenting the currently dropped X86 target-intrinsic cache hint.
DeltaFile
+26-0llvm/test/CodeGen/X86/mem-cache-hint-intrinsics.ll
+0-5llvm/test/CodeGen/X86/GlobalISel/irtranslator-mem-cache-hint.ll
+26-52 files

LLVM/project a0aa257 — clang/test/CodeGen cfi-check-fail-nomerge.c cleanup-destslot-simple.c, clang/test/CodeGen/AArch64 ABI-align-packed.c

clang: Don't set redundant intrinsic callsite attributes

Clang has a bad habit of spamming unnecessary callsite attributes that
are redundant with the function declaration. Fix one common source on
emitted intrinsics.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+1,728-1,728clang/test/Headers/__clang_hip_math.hip
+286-278clang/test/CodeGen/ubsan-trap-merge.c
+132-111clang/test/CodeGen/AArch64/ABI-align-packed.c
+162-81clang/test/CodeGen/cleanup-destslot-simple.c
+120-107clang/test/CodeGen/cfi-check-fail-nomerge.c
+96-96clang/test/OpenMP/nvptx_target_parallel_reduction_codegen_tbaa_PR46146.cpp
+2,524-2,40146 files not shown
+2,997-2,87552 files

LLVM/project f0a808d — bolt/include/bolt/Core BinaryFunction.h, bolt/lib/Core Exceptions.cpp BinaryEmitter.cpp

[BOLT] Preserve .cfi_signal_frame when rewriting .eh_frame (#242044)

BOLT dropped the "S" CIE augmentation emitted by .cfi_signal_frame, so
every rewritten FDE was placed under a plain "zR" CIE. Unwinders that
detect signal trampolines from CFI (lldb after #237016) then fail
to recognize them in BOLTed binaries.

Record the signal frame flag from the input CIE and re-emit it with
emitCFISignalFrame().

Assisted-by: Claude Opus 5.5

Test Plan: added bolt/test/X86/cfi-signal-frame.s
DeltaFile
+40-0bolt/test/X86/cfi-signal-frame.s
+10-0bolt/include/bolt/Core/BinaryFunction.h
+2-0bolt/lib/Core/Exceptions.cpp
+2-0bolt/lib/Core/BinaryEmitter.cpp
+54-04 files

LLVM/project 2ca6d12 — llvm/include/llvm/Analysis VectorUtils.h, llvm/lib/IR MemCacheHint.cpp

[VectorUtils] Preserve cache-hint metadata
DeltaFile
+103-0llvm/unittests/IR/MemCacheHintTest.cpp
+85-1llvm/unittests/Analysis/VectorUtilsTest.cpp
+52-1llvm/lib/IR/MemCacheHint.cpp
+9-20llvm/test/Transforms/LoadStoreVectorizer/NVPTX/cache-hint.ll
+9-14llvm/test/Transforms/SLPVectorizer/X86/cache-hint.ll
+3-8llvm/include/llvm/Analysis/VectorUtils.h
+261-442 files not shown
+277-448 files

LLVM/project 16b6867 — llvm/test/Transforms/LoadStoreVectorizer/NVPTX cache-hint.ll, llvm/test/Transforms/SLPVectorizer/X86 cache-hint.ll

[VectorUtils] Add cache-hint tests
DeltaFile
+313-0llvm/test/Transforms/LoadStoreVectorizer/NVPTX/cache-hint.ll
+239-0llvm/test/Transforms/SLPVectorizer/X86/cache-hint.ll
+552-02 files

LLVM/project b0e1309 — llvm/include/llvm/IR MemCacheHint.h, llvm/lib/CodeGen CodeGenCommonISel.cpp

[IR] Centralize cache-hint metadata helpers
DeltaFile
+145-0llvm/unittests/IR/MemCacheHintTest.cpp
+64-0llvm/lib/IR/MemCacheHint.cpp
+32-0llvm/include/llvm/IR/MemCacheHint.h
+3-20llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
+0-19llvm/lib/CodeGen/CodeGenCommonISel.cpp
+9-10llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+253-495 files not shown
+261-6211 files

LLVM/project 00315e9 — llvm/lib/Target/LoongArch LoongArchISelLowering.cpp

[LoongArch][NFC] Move XOR combine into performXORCombine

Extract the inline ISD::XOR handling in PerformDAGCombine into a
dedicated performXORCombine helper, matching how the other opcodes
(AND, OR, SETCC, ...) are structured. No functional change.

Also fix a clang-format issue in emitPseudoVMSKCOND.

Assisted-By: LLM
DeltaFile
+35-33llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+35-331 files

LLVM/project 76162fb — llvm/lib/CodeGen/AsmPrinter DwarfDebug.h DwarfDebug.cpp, llvm/lib/Target/NVPTX NVPTXDwarfDebug.cpp

Revert "[DwarfDebug] Add applyDwarfVersion() so the targets like NVPTX can recompute the version-derived state" (#242150)

Reverts llvm/llvm-project#234510 as this PR introduce build breakage on
pre/post submit builders.
DeltaFile
+0-87llvm/test/DebugInfo/dwarf-version-defaults.ll
+18-30llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+0-27llvm/test/DebugInfo/NVPTX/no-dwarf-version-flag.ll
+0-5llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
+1-1llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
+19-1505 files

LLVM/project f7f2ed9 — llvm/lib/CodeGen/AsmPrinter DwarfDebug.h DwarfDebug.cpp, llvm/lib/Target/NVPTX NVPTXDwarfDebug.cpp

Revert "[DwarfDebug] Add applyDwarfVersion() so the targets like NVPTX can re…"

This reverts commit 7daaee963b2f5cabbc3beea88039cca412ed727f.
DeltaFile
+0-87llvm/test/DebugInfo/dwarf-version-defaults.ll
+18-30llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+0-27llvm/test/DebugInfo/NVPTX/no-dwarf-version-flag.ll
+0-5llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
+1-1llvm/lib/Target/NVPTX/NVPTXDwarfDebug.cpp
+19-1505 files

LLVM/project aa071b7 — llvm/include/llvm/IR GlobalValue.h, llvm/lib/IR Globals.cpp

[llvm][GlobalOpt] Preserve COMDATs for Dead GVs
DeltaFile
+52-0llvm/test/Transforms/GlobalOpt/deadfunction-comdat.ll
+26-2llvm/lib/Transforms/IPO/GlobalOpt.cpp
+24-0llvm/test/Transforms/GlobalOpt/comdat-available-externally.ll
+22-0llvm/test/Transforms/GlobalOpt/deadglobal-comdat.ll
+8-0llvm/include/llvm/IR/GlobalValue.h
+6-0llvm/lib/IR/Globals.cpp
+138-26 files