LLVM/project 3316c0bllvm/test/Analysis/LoopAccessAnalysis depend_diff_types.ll

[LAA] SCEV-licm-reduce depend_diff_types test (NFC) (#213875)

Reduce a couple of tests in depend_diff_types in a way that preserves
SCEV expressions, by creating invariants that we hoist outside the loop.
This makes the tests a bit clearer.

Illustration: https://godbolt.org/z/eTqdoPPzn

Co-authored-by: Andrei Elovikov <andrei.elovikov at sifive.com>
DeltaFile
+22-22llvm/test/Analysis/LoopAccessAnalysis/depend_diff_types.ll
+22-221 files

LLVM/project 8de3384libc/include/llvm-libc-macros/linux sched-macros.h fcntl-macros.h, libc/src/__support/threads/linux CMakeLists.txt thread.cpp

[libc] Add more Linux-specific macro for fcntl and sched. (#213727)

* Add more `O_` flags (in particular, `O_LARGEFILE`) to fcntl-macros and
group all creation/status flags (shared and arch-specific) together.
* Add Linux `CLONE_` flags to sched-macros (to be exposed from
`<sched.h>`). Those are also provided in `<linux/sched.h>` kernel
header, but the libc users often expect to find them in regular
`<sched.h>` as those are passed to `clone()` syscall wrapper. Migrate
internal Linux thread implementation to use our own header (instead of
Linux kernel) for these macro.
DeltaFile
+23-23libc/include/llvm-libc-macros/linux/fcntl-macros.h
+28-0libc/include/llvm-libc-macros/linux/sched-macros.h
+1-1libc/src/__support/threads/linux/thread.cpp
+1-0libc/src/__support/threads/linux/CMakeLists.txt
+53-244 files

LLVM/project 1f80cafflang/lib/Evaluate fold-implementation.h, flang/lib/Semantics check-io.cpp mod-file.cpp

Updated with the following changes:
  - Modified to report an error on boundary condition.
  - Modified tests for the boundary error message.
  - Corrected accessibility attributes by giving explicit attributes as needed.
  - Added regression test for attributes.
  - Reworded incorrect comment.
  - Switched to originalTypeSymbol to use in-scope name.
  - Added test case to verify pre-built mod name usage.
DeltaFile
+82-0flang/test/Semantics/enumeration-type-mod-readback.F90
+20-16flang/test/Semantics/enumeration-type-intrinsics.f90
+10-14flang/lib/Semantics/mod-file.cpp
+14-7flang/lib/Evaluate/fold-implementation.h
+11-6flang/lib/Semantics/check-io.cpp
+10-0flang/test/Semantics/enumeration-type-mod.f90
+147-431 files not shown
+151-447 files

LLVM/project 7b01214llvm/test/CodeGen/AArch64 misched-fusion-fmin-fmax-post-ra.mir misched-fusion-fmin-fmax-pre-ra.mir

[AArch64] Use only virtual registers in pre-RA test(NFC) (#213951)

And add missing label boundaries checks.
DeltaFile
+164-132llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-pre-ra.mir
+68-4llvm/test/CodeGen/AArch64/misched-fusion-fmin-fmax-post-ra.mir
+232-1362 files

LLVM/project 0376ce3llvm/test/CodeGen/AArch64 misched-fusion-aes-pre-ra.mir misched-fusion-aes-post-ra.mir

[AArch64] Improve AES clustering tests(NFC) (#213950)

- post-RA: rename test cases, reorder them, add artificially interfering
instruction in between pairs, add negative runlines
- add pre-RA test
- add missing label boundaries checks
DeltaFile
+53-43llvm/test/CodeGen/AArch64/misched-fusion-aes-post-ra.mir
+89-0llvm/test/CodeGen/AArch64/misched-fusion-aes-pre-ra.mir
+142-432 files

LLVM/project d53a591clang/include/clang/Basic CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+9-1llvm/tools/llc/llc.cpp
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+0-4llvm/test/CodeGen/Lanai/codemodel.ll
+4-0llvm/include/llvm/Target/TargetMachine.h
+32-627 files not shown
+39-3533 files

LLVM/project b6bab38clang/include/clang/Basic CodeGenOptions.def CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+9-1llvm/tools/llc/llc.cpp
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+4-0llvm/include/llvm/Target/TargetMachine.h
+2-1clang/include/clang/Basic/CodeGenOptions.def
+34-32 files not shown
+37-48 files

LLVM/project 5b9d9d3clang/include/clang/Basic CodeGenOptions.def CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+9-1llvm/tools/llc/llc.cpp
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+4-0llvm/include/llvm/Target/TargetMachine.h
+2-1clang/include/clang/Basic/CodeGenOptions.def
+34-32 files not shown
+37-48 files

LLVM/project 6534b11clang/include/clang/Basic CodeGenOptions.def CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+9-1llvm/tools/llc/llc.cpp
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+4-0llvm/include/llvm/Target/TargetMachine.h
+2-1clang/include/clang/Basic/CodeGenOptions.def
+34-31 files not shown
+35-47 files

LLVM/project cbe51eeclang/include/clang/Basic CodeGenOptions.def CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+4-0llvm/include/llvm/Target/TargetMachine.h
+2-1clang/include/clang/Basic/CodeGenOptions.def
+1-1clang/test/CodeGen/X86/newpm.c
+26-36 files

LLVM/project 82426e2clang/include/clang/Basic CodeGenOptions.def CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+9-1llvm/tools/llc/llc.cpp
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+4-0llvm/include/llvm/Target/TargetMachine.h
+2-1clang/include/clang/Basic/CodeGenOptions.def
+34-31 files not shown
+35-47 files

LLVM/project 8e91c8cclang/include/clang/Basic CodeGenOptions.def CodeGenOptions.h, clang/include/clang/Options Options.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+8-0clang/include/clang/Options/Options.td
+5-1clang/lib/CodeGen/BackendUtil.cpp
+6-0clang/include/clang/Basic/CodeGenOptions.h
+4-0llvm/include/llvm/Target/TargetMachine.h
+2-1clang/include/clang/Basic/CodeGenOptions.def
+1-1clang/test/CodeGen/X86/newpm.c
+26-36 files

LLVM/project 6961103llvm/include/llvm/Target TargetMachine.h

[𝘀𝗽𝗿] changes to main this commit is based on

Created using spr 1.3.7

[skip ci]
DeltaFile
+4-0llvm/include/llvm/Target/TargetMachine.h
+4-01 files

LLVM/project 777fd8dllvm/include/llvm/Target TargetMachine.h

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+4-0llvm/include/llvm/Target/TargetMachine.h
+4-01 files

LLVM/project 90edcecclang/lib/Analysis IssueHash.cpp, clang/unittests/Analysis IssueHashTest.cpp

clean up
DeltaFile
+6-6clang/unittests/Analysis/IssueHashTest.cpp
+0-1clang/lib/Analysis/IssueHash.cpp
+6-72 files

LLVM/project 2ff1d37clang/lib/Analysis IssueHash.cpp, clang/unittests/Analysis CMakeLists.txt IssueHashTest.cpp

add unit test
DeltaFile
+315-0clang/unittests/Analysis/IssueHashTest.cpp
+4-32clang/lib/Analysis/IssueHash.cpp
+1-0clang/unittests/Analysis/CMakeLists.txt
+320-323 files

LLVM/project 5e8ac69llvm/lib/Target/AMDGPU AMDGPUInstructionSelector.cpp AMDGPUISelDAGToDAG.cpp, llvm/test/CodeGen/AMDGPU fpext-free.ll mad-mix-bf16.ll

[AMDGPU] Fold fsub into fma_mix via free neg_lo modifier (#212305)

Rewrite the fsub->fma_mix pattern as `fma((-y), 1.0, x)` using the free
neg_lo modifier

instead of multiplying by -1.0 (which doesn't always flip the sign of
NaN), use the hardware free neg_lo bit, which does a true sign flip. As
a result, now the fold always matches fsub actual behavior instead of
only in the common case (non-NaN FP numbers)
DeltaFile
+117-124llvm/test/CodeGen/AMDGPU/mad-mix.ll
+38-0llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
+34-0llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+16-16llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
+22-10llvm/test/CodeGen/AMDGPU/mad-mix-bf16.ll
+14-14llvm/test/CodeGen/AMDGPU/fpext-free.ll
+241-1647 files not shown
+280-18013 files

LLVM/project b3946b5llvm/lib/CodeGen Rematerializer.cpp

[CodeGen] Fix null pointer dereferencing issue (#214543)

Fixes #197580.  Fixes 99f7018958ed3daf2abf8d49178c24fbf1eb1010.

In Rematerializer::isRegIdenticalAtUses(), handle case when DefVN is
null.
DeltaFile
+2-0llvm/lib/CodeGen/Rematerializer.cpp
+2-01 files

LLVM/project 0f962d8llvm/lib/Target/AMDGPU SILowerControlFlow.cpp, llvm/test/CodeGen/AMDGPU lower-control-flow-other-terminators.mir

[AMDGPU] Fix combineMasks dropping condition (#203180)

The problem is related to `S_AND (S_AND x, x), exec` case

When the nested mask op is the outer S_AND/S_OR first operand with two
identical operands, combineMasks kept exec instead of a nested operand,
folding to S_AND exec, exec and dropping the condition
DeltaFile
+72-0llvm/test/CodeGen/AMDGPU/lower-control-flow-other-terminators.mir
+38-18llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
+110-182 files

LLVM/project 9bbd728clang/docs ReleaseNotes.md, clang/lib/Driver/ToolChains AMDGPU.cpp

[HIP] Add libhipcxx to the default header search path (#214279)

libhipcxx provides C++ library support for HIP device code, similar to
libcudacxx for CUDA. CUDA toolchains make libcudacxx available through
the
toolkit include path by default. HIP users should likewise be able to
include libhipcxx headers without an installation-specific include
option.

Add include/libhipcxx from the selected ROCm installation when the
directory exists. It follows the same search order and controls as the
other HIP include paths.
DeltaFile
+20-0clang/test/Driver/hip-include-path.hip
+6-0clang/lib/Driver/ToolChains/AMDGPU.cpp
+6-0clang/docs/ReleaseNotes.md
+1-0clang/test/Driver/Inputs/rocm/include/libhipcxx/cuda/std/atomic
+33-04 files

LLVM/project 92e1f6allvm/lib/Target/AMDGPU SIFoldOperands.cpp, llvm/test/CodeGen/AMDGPU do-not-fold-copy.mir

[AMDGPU] Fix SIFoldOperands miscompiling values that leave a divergent loop (#203256)

A scalar value latched per-lane inside a divergent loop was being folded
into a use after the loop, so every lane wrongly read the same value
DeltaFile
+54-11llvm/test/CodeGen/AMDGPU/do-not-fold-copy.mir
+53-8llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+107-192 files

LLVM/project 7220098lldb/test/API/macosx/expedited-stack-memory TestExpeditedStackMemory.py

[lldb][test] Skip the frame 0 expedite test with an out-of-tree debugserver (#214448)

`test_memory_reads_when_examining_frame0_locals` asserts that examining
frame 0's locals reads no stack memory, which only holds when
debugserver
expedites the stopped frame's stack in `jThreadsInfo`.  That is
added in b631e0cbd1c9, so the assertion only holds for an in-tree
debugserver.

The GreenDragon `lldb-cmake-sanitized` bot configures with
`-DLLDB_USE_SYSTEM_DEBUGSERVER=ON`, so it tests against the debugserver
shipped in Xcode.  That one predates the expedite, so test fails:

```
FAIL: test_memory_reads_when_examining_frame0_locals
AssertionError: 2 != 0 : expected NO stack memory reads for frame 0 (its
stack is expedited in jThreadsInfo).
memory reads while examining locals: stack=2 heap=1 other=1 (total=4)
  stack region: [0x16b540000,0x16f53c000)

    [7 lines not shown]
DeltaFile
+1-0lldb/test/API/macosx/expedited-stack-memory/TestExpeditedStackMemory.py
+1-01 files

LLVM/project 429b2a7clang/lib/Basic/Targets SPIR.h, clang/test/CodeGenSPIRV spirv-host-adaptation-valist.cpp

[SYCL][SPIR-V][Windows] Extend BaseSPIRTargetInfo host-adaptation for Windows support (#208196)

The existing host-adaptation mechanism in BaseSPIRTargetInfo copies type
properties from the host but has gaps causing incorrect behavior on
Windows:

1. PointerWidth/PointerAlign, SizeType, PtrDiffType, IntPtrType were not
  copied from the host; derived classes hardcoded LP64 defaults.
  2. getBuiltinVaListKind() returned VoidPtr unconditionally instead of
  delegating to the host's va_list kind.
  3. Derived-class constructors unconditionally overwrote host-adapted
  values, working on Linux only by coincidence.

  This patch addresses these issues by copying pointer-related types
from the host in BaseSPIRTargetInfo, delegating va_list kind to the
host,
and setting architecture-appropriate defaults in derived classes when no
host is
  present or when host and device pointer widths differ.

    [2 lines not shown]
DeltaFile
+86-0clang/test/SemaSPIRV/spirv-host-adaptation-types.cpp
+73-0clang/test/Preprocessor/spirv-host-adaptation-macros.cpp
+49-8clang/lib/Basic/Targets/SPIR.h
+36-0clang/test/Preprocessor/spir-host-adaptation-macros.cpp
+29-0clang/test/SemaSPIRV/spirv-host-adaptation-valist.cpp
+24-0clang/test/CodeGenSPIRV/spirv-host-adaptation-valist.cpp
+297-83 files not shown
+319-89 files

LLVM/project fc33de1llvm/lib/Analysis IVDescriptors.cpp

remove ;
DeltaFile
+1-1llvm/lib/Analysis/IVDescriptors.cpp
+1-11 files

LLVM/project 0ef679dllvm/lib/Transforms/Vectorize VPlanRecipes.cpp, llvm/test/Transforms/LoopVectorize compress-idioms-negative-tests.ll compress-idioms.ll

Move negative tests to new file
DeltaFile
+0-105llvm/test/Transforms/LoopVectorize/compress-idioms.ll
+94-0llvm/test/Transforms/LoopVectorize/compress-idioms-negative-tests.ll
+0-1llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
+94-1063 files

LLVM/project fcef276llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/VPlan vplan-based-stride-mv.ll

Don't multiversion `i1 %stride`
DeltaFile
+12-22llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
+10-0llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+22-222 files

LLVM/project 9ef3985llvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/VPlan vplan-based-stride-mv.ll

Fix replace logic to use proper casts
DeltaFile
+12-7llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+2-2llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
+14-92 files

LLVM/project 53ad2aeclang/lib/StaticAnalyzer/Checkers BuiltinFunctionChecker.cpp, clang/test/Analysis builtin_overflow.c

[clang][StaticAnalysis] Fix an false negative bug in handling '__builtin*overflow'

For a binary operation 'A op B' and a result type 'T', these builtins
return true/false for whether the operation's result is a value 'T'
cannot hold. CSA models this by computing the operation's result in a
temporary type and comparing it against the bounds of 'T'.  However,
the temporary type is only twice as wide as 'T', not the
operands. When either operand is wider than 'T's doubled width, the
result of 'A op B' can silently wrap around before the comparison,
producing a false negative.

The solution is to find the proper type to temporarily hold the result
of 'A op B' from types of 'A' and 'B'.
DeltaFile
+23-6clang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
+9-0clang/test/Analysis/builtin_overflow.c
+32-62 files

LLVM/project 38ca11fcompiler-rt/lib/scudo/standalone linux.cpp primary32.h

[scudo] Add check to verify locking is correct. (#214377)

Added checks that at the end of lockSlow, the lock is held and when
doing an unlock, the lock is held.

This found a bug in primary32.h:unmapTestOnly where the lock is not
held, so fixed that.
DeltaFile
+7-5compiler-rt/lib/scudo/standalone/primary32.h
+6-0compiler-rt/lib/scudo/standalone/linux.cpp
+13-52 files

LLVM/project c659479llvm/test/Transforms/LoopVectorize/VPlan vplan-based-stride-mv.ll

Add tests where speculation would be performed on `i1 %stride`
DeltaFile
+161-0llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
+161-01 files