LLVM/project 4d14e96mlir/lib/Conversion/MathToSPIRV MathToSPIRV.cpp, mlir/test/Conversion/MathToSPIRV math-to-gl-spirv.mlir

[mlir][MathToSPIRV] Allow math.cttz lowering for non-i32 integer widths (#206400)

Co-authored-by: Igor Wodiany <dev at wodiany.com>
DeltaFile
+22-0mlir/test/Conversion/MathToSPIRV/math-to-gl-spirv.mlir
+20-1mlir/test/Target/SPIRV/gl-ops.mlir
+10-5mlir/lib/Conversion/MathToSPIRV/MathToSPIRV.cpp
+52-63 files

LLVM/project 88d986cllvm/cmake config-ix.cmake, llvm/test lit.site.cfg.py.in lit.cfg.py

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+3-14llvm/cmake/config-ix.cmake
+3-7llvm/test/lit.cfg.py
+1-0llvm/test/lit.site.cfg.py.in
+7-213 files

LLVM/project bd7bb26clang/docs ReleaseNotes.md, clang/include/clang/AST RecordLayout.h

[clang] Match MSVC ABI for over-aligned base tail padding on Arm64 (#210461)

When targeting aarch64-pc-windows-msvc, clang laid out a base following
an over-aligned, non-standard-layout base at the wrong offset. MSVC on
Arm64 reuses the over-aligned base's tail padding for the subsequent
base, but clang rounded the base up to a full slot, so the two disagreed
on member offsets, breaking interop between clang- and MSVC-built
binaries.

Fix: store each record's natural non-virtual alignment (excluding
`alignas`/`__declspec(align)` over-alignment) as
`getNonRequiredNVAlignment()`, and on Arm64 fold in a base's natural
alignment rather than its full alignment. This is gated to Arm64 only;
Arm64EC and x64 follow the x64 rule (no reuse) and are unchanged.

Validated against MSVC (Hostx64\arm64\cl.exe
/d1reportSingleClassLayout): clang now matches MSVC Arm64 exactly for
the reduced repro, the original polymorphic case (vftable + empty base +
template), and a range of probe cases covering natural vs.

    [3 lines not shown]
DeltaFile
+107-0clang/test/Layout/ms-arm64-aligned-base-tail-padding.cpp
+68-19clang/lib/AST/RecordLayoutBuilder.cpp
+16-0clang/include/clang/AST/RecordLayout.h
+6-5clang/lib/AST/RecordLayout.cpp
+6-0clang/docs/ReleaseNotes.md
+203-245 files

LLVM/project c2b2264llvm/lib/Target/AArch64 AArch64MacroFusion.cpp

[AArch64][MacroFusion] Add per cluster kind statistic (#212103)

So we can easily differentiate between different cluster kinds on
AArch64 backend.
DeltaFile
+61-14llvm/lib/Target/AArch64/AArch64MacroFusion.cpp
+61-141 files

LLVM/project b8a1592clang/docs LanguageExtensions.md, clang/include/clang/Basic Builtins.td

[clang] Add __builtin_convert_to_arbitrary_fp

Expose the llvm.convert.to.arbitrary.fp intrinsic as a target-independent
builtin, the inverse of __builtin_convert_from_arbitrary_fp:

  unsigned _BitInt(8) b =
      __builtin_convert_to_arbitrary_fp(f, "Float8E4M3FN", "round.tonearest", 1);

The result type is derived from the format, so unlike the "from" direction this
is an ordinary CustomTypeChecking builtin with no parser or AST support needed.
It is unsigned _BitInt(N) for a scalar operand and an ext_vector_type of that
for a vector operand.

The rounding mode is a string literal validated with convertStrToRoundingMode,
matching what the IR verifier accepts, and the saturation flag must be an
integer constant expression equal to 0 or 1 since the intrinsic marks it ImmArg.

Clang only permits _BitInt vector elements of power-of-two width, so vector
operands are rejected for the 6-bit formats.

    [3 lines not shown]
DeltaFile
+76-0clang/test/Sema/builtins-convert-to-arbitrary-fp.c
+76-0clang/test/CodeGen/builtins-convert-to-arbitrary-fp.c
+70-0clang/lib/Sema/SemaChecking.cpp
+53-0clang/docs/LanguageExtensions.md
+20-0clang/lib/CodeGen/CGBuiltin.cpp
+6-0clang/include/clang/Basic/Builtins.td
+301-03 files not shown
+310-19 files

LLVM/project 460dbfcllvm/lib/Analysis HashRecognize.cpp, llvm/test/Analysis/HashRecognize cyclic-redundancy-check.ll

[HashRecognize] Use loop latch to determine step/start for conditional recurrence (#211916)

The function `matchConditionalRecurrence` iterates over both PHI inputs
and attempts to match each one to determine which is `Start` and which
is `Step`. However, some of the failure conditions in the loop `return
false`, which has the potential to classify some valid CRC loops as not
having a conditional recurrence. The loop here is not really needed at
all-- instead, use `L.getLoopLatch()` to determine `Start`/`Step`, since
the incoming value from the latch block will always be the `Step`. This
also avoids the aforementioned false negative classifications.

Assisted-by: Claude Opus 5
DeltaFile
+25-24llvm/lib/Analysis/HashRecognize.cpp
+48-0llvm/test/Analysis/HashRecognize/cyclic-redundancy-check.ll
+73-242 files

LLVM/project a950d4allvm/include/llvm/TargetParser AMDGPUTargetParser.h

AMDGPU: Use uint8_t for IsaVersion fields (#212311)
DeltaFile
+3-3llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
+3-31 files

LLVM/project 894392dllvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize/VPlan vplan-based-stride-mv.ll

Outline widenUnitStridedLoadStore helper

Reuses it for both normal and speculative unit-strided memaccesses widening.

Apparently, I misread `createVectorPointer` interface (or maybe it changed
throughout the life of this PR), so this also fixes a bug in the new code.
DeltaFile
+44-55llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+26-26llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
+70-812 files

LLVM/project f0562e5llvm/test/CodeGen/AMDGPU/GlobalISel lshr.ll shl.ll

[AMDGPU][GISel] Remove redundant AND on scalar shift amounts

A scalar shift only consumes the low log2(bitwidth) bits of its amount,
so an explicit (and amt, mask) feeding the amount is redundant whenever
mask has all of those low bits set. SelectionDAG already achieves this
via SimplifyDemandedBits on the shift-amount operand; this adds the
equivalent to the postlegalizer combiner for G_SHL/G_LSHR/G_ASHR.

Co-authored-by: Cursor <cursoragent at cursor.com>
DeltaFile
+2,745-3,283llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+2,524-2,997llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
+303-0llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizer-combiner-redundant-shift-amount-mask.mir
+7-40llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
+7-38llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
+3-24llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
+5,589-6,3823 files not shown
+5,641-6,3959 files

LLVM/project b824a69clang/docs LanguageExtensions.md, clang/include/clang/AST Expr.h

[clang] Add __builtin_convert_from_arbitrary_fp

Expose the llvm.convert.from.arbitrary.fp intrinsic as a target-independent
builtin. It reinterprets an integer as the bits of a narrow floating-point
format that has no corresponding C type, and widens it to a native
floating-point type:

  _Float16 h = __builtin_convert_from_arbitrary_fp(b, "Float8E4M3FN", _Float16);

Since the destination type cannot be derived from the arguments, it is passed
as a type argument and the builtin is parsed as a keyword, following the
__builtin_convertvector precedent.

The format is a string literal validated with
APFloatBase::isValidArbitraryFPFormat, so every format the IR verifier accepts
is accepted here; formats that no target lowers yet keep being reported by the
backend. The integer operand may be any integer type whose width matches the
format, which covers char/unsigned char for the 8-bit formats and _BitInt for
the narrower ones. Vector operands are supported with matching element counts.

    [5 lines not shown]
DeltaFile
+203-0clang/test/CodeGen/builtins-convert-from-arbitrary-fp.c
+69-0clang/lib/Sema/SemaChecking.cpp
+66-0clang/include/clang/AST/Expr.h
+60-0clang/test/Sema/builtins-convert-from-arbitrary-fp.c
+59-0clang/docs/LanguageExtensions.md
+42-0clang/lib/Parse/ParseExpr.cpp
+499-030 files not shown
+744-036 files

LLVM/project b705dabclang/lib/CodeGen CGOpenMPRuntime.cpp, clang/test/OpenMP target_map_nested_ptr_member_mapper_codegen.cpp

[OpenMP] Propagate PRESENT to pointee entries in mapper codegen

Extend map-type-modifier propagation in emitUserDefinedMapper to the PRESENT
modifier, but only for entries that have an attach ptr (the pointee data, whose
storage differs from the struct's own). A present modifier on the outer clause
must require that pointee to be present on the device.

This is gated on a new PropagatePresentToPointee argument, which Clang sets from
CGM.getLangOpts().OpenMP >= 60. Before 6.0 the present modifier is treated as
not applying to the pointee: the spec committee confirmed the divergence
between the present motion modifier (to/from) and the present map-type modifier
(map) was unintentional, to be fixed as an OpenMP 6.0 erratum. Only propagation
is gated; present written directly in a mapper's own clause applies at all
versions.

A TODO notes PRESENT should also propagate to the struct's own members, which
is blocked while pointer members use PTR_AND_OBJ.

Update the present-check tests to their final 6.0-gated behavior.

    [2 lines not shown]
DeltaFile
+36-11llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+10-17offload/test/mapping/mapper_target_update_present_ptee.c
+14-13offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
+13-4llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
+6-9clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+12-3clang/lib/CodeGen/CGOpenMPRuntime.cpp
+91-576 files

LLVM/project cd434d7clang/lib/CodeGen CGOpenMPRuntime.cpp, clang/test/OpenMP declare_mapper_codegen.cpp target_map_nested_ptr_member_mapper_codegen.cpp

[OpenMP][Clang] Enable ATTACH-style maps for mappers.

Track per-entry attach-ptr info (HasAttachPtr) through mapper codegen so that
emitUserDefinedMapper does not add a new outer MEMBER_OF to pointee/combined
entries (which occupy different storage than the struct) or to ATTACH entries.
Clang and the MLIR translator populate the per-entry array in parallel with the
other MapInfosTy arrays.

Address review:
  - Rename MapSkipMemberOfArrayTy to MapHasAttachPtrArrayTy to match the
    HasAttachPtr field it backs.
  - Restructure the emitUserDefinedMapper comment into a bulleted (*)/(**)/(***)
    list keyed to the example entries.
  - Reword the Clang comments: HasAttachPtr marks pointee entries that have a
    base attach-ptr; a combined entry has a base attach-ptr if its constituents
    do; cross-reference emitUserDefinedMapper for the MEMBER_OF rationale.
  - Update the moved present-check tests to their now-correct behavior (the
    attach-style maps make the inbounds present checks pass and remove the
    "explicit extension" errors).

    [2 lines not shown]
DeltaFile
+196-160clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+68-60clang/test/OpenMP/declare_mapper_codegen.cpp
+56-15llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+65-5clang/lib/CodeGen/CGOpenMPRuntime.cpp
+18-24offload/test/mapping/mapper_enter_data_always_present_ptee.c
+18-22offload/test/mapping/mapper_map_mbr_then_present_mbr_ptee.c
+421-28611 files not shown
+493-36117 files

LLVM/project acafa3cclang/test/OpenMP declare_mapper_codegen.cpp target_map_array_section_of_structs_with_nested_mapper_codegen.cpp, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

[OpenMP] Propagate ALWAYS/DELETE/CLOSE map-type modifiers to mapper entries

When a map clause uses a user-defined mapper, the map-type-modifying bits
(ALWAYS, DELETE, CLOSE) on the outer clause must apply to each map the mapper
inserts (OpenMP 6.0:281:34). Propagate them in emitUserDefinedMapper by OR-ing
the imported modifier bits into each pushed component, except ATTACH entries
(ATTACH|ALWAYS is reserved for attach(always) and the other bits are
meaningless for ATTACH).

PRESENT is intentionally not propagated here yet (a TODO notes it is handled in
a follow-on, since it requires distinguishing pointee entries from the struct's
own storage).

Update offload mapper_map_always_from.c to its now-correct behavior: ALWAYS
forces a member copy-back that the ref count would otherwise suppress, so s.y
reads back as 111 (it was 0 before this change).

Co-Authored-By: Claude Opus 4.8 <noreply at anthropic.com>
DeltaFile
+152-136clang/test/OpenMP/target_map_nested_ptr_member_mapper_codegen.cpp
+87-77clang/test/OpenMP/target_map_array_section_of_structs_with_nested_mapper_codegen.cpp
+87-77clang/test/OpenMP/target_map_array_of_structs_with_nested_mapper_codegen.cpp
+38-2llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+27-9clang/test/OpenMP/declare_mapper_codegen.cpp
+8-15offload/test/mapping/mapper_map_always_from.c
+399-3165 files not shown
+422-33711 files

LLVM/project 289a2d9mlir/include/mlir/Dialect/Linalg Passes.td, mlir/include/mlir/Dialect/Linalg/Transforms Transforms.h

[mlir][LinalgBlockPackMatmul] Add support for scalable block factors (#211354)

Assisted by: Claude Sonnet 4.6

---------

Co-authored-by: Adam Siemieniuk <adam.siemieniuk at intel.com>
DeltaFile
+272-0mlir/test/Dialect/Linalg/block-pack-matmul-scalable.mlir
+51-3mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
+5-3mlir/include/mlir/Dialect/Linalg/Passes.td
+5-0mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
+333-64 files

LLVM/project a41a335flang/include/flang/Evaluate characteristics.h, flang/lib/Evaluate characteristics.cpp

[flang][cuda] Do not check dummy in stmt function in device code (#212037)
DeltaFile
+11-0flang/test/Semantics/CUDA/cuf02.cuf
+3-2flang/lib/Semantics/check-call.cpp
+3-0flang/include/flang/Evaluate/characteristics.h
+1-0flang/lib/Evaluate/characteristics.cpp
+18-24 files

LLVM/project 79ea87cllvm/test/tools/llubi bytes_undef.ll loadstore_le.ll, llvm/tools/llubi/lib Value.h Context.cpp

[llubi] Add support for byte types (#200672)

This patch implements the support for byte types. The byte order depends
on the endianness for better performance in the fast path. For
non-byte-sized byte types, high bits are zeroed out.
DeltaFile
+120-1llvm/tools/llubi/lib/Value.cpp
+112-6llvm/tools/llubi/lib/Context.cpp
+88-0llvm/test/tools/llubi/loadstore_le.ll
+88-0llvm/test/tools/llubi/loadstore_be.ll
+85-1llvm/tools/llubi/lib/Value.h
+21-0llvm/test/tools/llubi/bytes_undef.ll
+514-810 files not shown
+606-1716 files

LLVM/project f83fcfbllvm/lib/CodeGen MachineVerifier.cpp, llvm/test/CodeGen/MIR/X86 machine-verifier-nophi.mir

[MachineVerifier] do not use !NoPHI to check if a MF has phi nodes (#211941)

We were violating the property expressed in MachineFunction.h:

```
The properties are stated in "positive" form; i.e. a pass could require
that the property hold, but not that it does not hold.
```

Resolves a false positive "MBB has allocatable live-in, [...]" error in
our downstream target.
DeltaFile
+21-0llvm/test/CodeGen/MIR/X86/machine-verifier-nophi.mir
+9-2llvm/lib/CodeGen/MachineVerifier.cpp
+30-22 files

LLVM/project fb8afd2llvm/test/tools/llvm-objcopy/ELF cross-arch-headers.test

[llvm-objcopy] Fix AMDGPU arch string in test: amdgpu not amdgcn

llvm-readobj reports 'Arch: amdgpu' for EM_AMDGPU ELF files
(the generic AMDGPU ELF format used by elf64-amdgpu). The test
was incorrectly expecting 'amdgcn', which is the AMDGCN-specific
arch string used by ROCm HSA code objects.
DeltaFile
+1-1llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
+1-11 files

LLVM/project 68e94c9clang/lib/StaticAnalyzer/Checkers LifetimeModeling.h LifetimeModeling.cpp, clang/test/Analysis dangling-ptr-deref.cpp

[analyzer] Improve dangling value tracking in DanglingPtrDeref (#211818)

Improve dangling value tracking in the `DanglingPtrDeref` checker by
adding `trackExpressionValue`. The report with this change now tracks
the dangling value and shows where the value originated from. Currently
the checker only points at the destruction and use sites which isn't
always useful for the user.
DeltaFile
+25-24clang/test/Analysis/dangling-ptr-deref.cpp
+13-15clang/lib/StaticAnalyzer/Checkers/DanglingPtrDeref.cpp
+8-0clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.cpp
+4-0clang/lib/StaticAnalyzer/Checkers/LifetimeModeling.h
+50-394 files

LLVM/project 7336a38clang/lib/AST TypeLoc.cpp, clang/test/SemaCXX atomic-auto.cpp

[clang] Add missing VisitAtomicTypeLoc to TypeLoc.cpp GetContainedAutoTypeLocVisitor (#211752)

Adds the missing `VisitAtomicTypeLoc` method to TypeLoc.cpp `GetContainedAutoTypeLocVisitor`.

Fixes: https://github.com/llvm/llvm-project/issues/211556 ICE.

Assisted-by: Codex
DeltaFile
+7-0clang/test/SemaCXX/atomic-auto.cpp
+4-0clang/lib/AST/TypeLoc.cpp
+11-02 files

LLVM/project b2f9129llvm/test/CodeGen/AMDGPU maximumnum.ll amdgcn.bitcast.1024bit.ll, llvm/test/CodeGen/AMDGPU/GlobalISel legalize-load-private.mir legalize-load-local.mir

Merge remote-tracking branch 'origin/main' into vplan-based-stride-mv-rt-guard
DeltaFile
+9,398-9,218llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
+6,993-6,921llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
+13,068-0llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
+6,560-6,119llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+5,803-5,808llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
+5,575-5,393llvm/test/CodeGen/AMDGPU/maximumnum.ll
+47,397-33,4598,628 files not shown
+471,777-349,8588,634 files

LLVM/project f918c28clang/lib/Sema SemaStmt.cpp, clang/test/SemaCXX cxx2c-expansion-stmts.cpp

[Clang] [Sema] Use getCurFunctionDecl() to get the current function (#211938)

In `BuildReturnStmt()`, use `getCurFunctionDecl()` to get the current
function rather than attempting to cast `CurContext` to a
`FunctionDecl`, which breaks inside an expansion statement because the
current `DeclContext` will be that of the expansion statement, not the
function. `getCurFunctionDecl()` knows how to handle this case and we
already call it earlier in that function, so just reuse the result of
that call.

Fixes #211917.

(cherry picked from commit a891a5c40c7d2ed62d97fc6563cf256e7bab3ffb)
DeltaFile
+17-0clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
+3-4clang/lib/Sema/SemaStmt.cpp
+20-42 files

LLVM/project 6781c9cllvm/lib/IR Constants.cpp

[IR] Slightly optimize getElementAsInteger() (#211550)

This regressed with the introduction of the byte type, because
getElementPointer() calls getElementByteSize() calls
getPrimitiveSizeInBits(), but the switch used getScalarTypeInBits(),
which means we need to do two separate calls for the element size. Use
getElementByteSize() in both places so these can be CSEd.

(cherry picked from commit bb22aa8127450930eb27215eb9f2c70acdee69fc)
DeltaFile
+10-10llvm/lib/IR/Constants.cpp
+10-101 files

LLVM/project a0177f7clang/lib/Analysis ThreadSafety.cpp, clang/test/Sema warn-thread-safety-analysis.c

Thread Safety Analysis: Don't warn at joins that re-branch on a try-lock result (#209796)

Previously, when the result of a try-lock call is branched on more than
once, the paths between the branches would disagree on whether the
capability is held while remaining consistent at each branch. The analysis
then gave a false positive warning at the intermediate join:

    mutex 'lock' is not held on every path through here

Create getTerminatorTrylockCall() helper from getEdgeLockset(); if the terminator
of a block branches on the result of a call to a try_acquire_capability-function
(perhaps negated or stored in a local variable), this helper returns that call and
its callee.

Use this new helper in getTerminatorTrylockCaps(), which will return the
capabilities acquired by a trylock; feed these capabilites to intersectAndWarn()
during a branch join, in order to avoid false positives.

Soundness is preserved because intersectAndWarn() still removes the

    [7 lines not shown]
DeltaFile
+102-31clang/lib/Analysis/ThreadSafety.cpp
+54-0clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+15-0clang/test/Sema/warn-thread-safety-analysis.c
+171-313 files

LLVM/project b229b35clang/lib/Analysis ThreadSafety.cpp, clang/test/SemaCXX warn-thread-safety-analysis.cpp

Thread Safety Analysis: Handle statement expressions in try-lock conditions (#209330)

Previously, statement expressions (`({ bool b = mu.TryLock(); b; })`)
used as try-lock conditions were not supported. Handle StmtExpr in
getTrylockCallExpr() by recursively analyzing the last statement of the
statement expression.
DeltaFile
+14-0clang/test/SemaCXX/warn-thread-safety-analysis.cpp
+5-0clang/lib/Analysis/ThreadSafety.cpp
+19-02 files

LLVM/project 82db1fellvm/include/llvm/TargetParser CMakeLists.txt, llvm/lib/Target/AMDGPU AMDGPUTargetParser.td R600Processors.td

AMDGPU: Add -gen-amdgpu-target-def TableGen backend

Currently subtarget information is duplicated between a def file and
the backend. There are also increasingly unwieldy mapping tables
for subarches. Work towards unifying these, starting with r600. This
mirrors aarch64 and riscv's existing custom targetparser backends (i.e.,
the prompt was copy what riscv does).

Co-authored-by: Claude (Claude-Opus-4.8)
DeltaFile
+135-0llvm/utils/TableGen/Basic/AMDGPUTargetDefEmitter.cpp
+24-21llvm/lib/Target/AMDGPU/R600Processors.td
+42-0llvm/test/TableGen/AMDGPUTargetDefErrors.td
+31-0llvm/lib/Target/AMDGPU/AMDGPUTargetParser.td
+4-4llvm/lib/TargetParser/AMDGPUTargetParser.cpp
+3-0llvm/include/llvm/TargetParser/CMakeLists.txt
+239-252 files not shown
+242-258 files

LLVM/project c86b1c1llvm/docs ReleaseNotes.md

Add David's suggestion
DeltaFile
+1-1llvm/docs/ReleaseNotes.md
+1-11 files

LLVM/project 56a1c9dllvm/docs ReleaseNotes.md

Add release note for LLDB_ENABLE_DYNAMIC_SCRIPTINTERPRETERS
DeltaFile
+2-0llvm/docs/ReleaseNotes.md
+2-01 files

LLVM/project 0600aeallvm/lib/CodeGen/GlobalISel InlineAsmLowering.cpp, llvm/test/CodeGen/AArch64/GlobalISel irtranslator-inline-asm.ll

[AArch64][GlobalISel] Use integer types for inline assembly lowering (#212214)

If we need to generate a trunc then we can use an integer type for the
lowering.
DeltaFile
+14-14llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
+3-5llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
+17-192 files

LLVM/project 852577bllvm/test/tools/llvm-objcopy/ELF cross-arch-headers.test, llvm/tools/llvm-objcopy ObjcopyOptions.cpp

[AMDGPU] Add AMDGPU support for llvm-objcopy
DeltaFile
+11-2llvm/test/tools/llvm-objcopy/ELF/cross-arch-headers.test
+2-0llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
+13-22 files