LLVM/project 569280fcompiler-rt CMakeLists.txt, compiler-rt/cmake base-config-ix.cmake config-ix.cmake

compiler-rt: Stop using APPLE cmake variable

Use a variable derived from the target triple instead.
This is a partial fix for cross compiling the GPU runtimes
on macos. Previously on mac hosts, the build system would go
down completely wrong paths. This improves the situation by
moving the failures to compilation pulling in host flags which
shouldn't be forwarded.

Despite the cmake documentation claiming the APPLE constant
is "Set to True when the target system is an Apple platform",
this appears to be true when the host is apple. Not sure if this
is worth reporting as a cmake bug, or if it's an artifact of some
runtimes build specifics. Change to using a new variable computed
from the target triple. Presumably the same bug exists for the various
WIN32 and ANDROID checks around, there are just fewer of them.
DeltaFile
+9-9compiler-rt/cmake/Modules/AddCompilerRT.cmake
+8-9compiler-rt/cmake/base-config-ix.cmake
+8-8compiler-rt/CMakeLists.txt
+7-7compiler-rt/lib/builtins/CMakeLists.txt
+6-6compiler-rt/lib/asan/tests/CMakeLists.txt
+6-6compiler-rt/cmake/config-ix.cmake
+44-4544 files not shown
+139-13450 files

LLVM/project 96eb0cbclang/test/AST undocumented-attrs.cpp, clang/utils/TableGen ClangAttrEmitter.cpp TableGen.cpp

Forcefully require new attributes to be documented (#203296)

Several years ago we began to require all new attributes be documented,
but we never had anything enforcing the requirement. However, despite
reviewers requesting this documentation, it's been missed often enough
that enforcement makes sense in order to reduce maintenance burden.

This adds a new tablegen option to spit out the list of undocumented
attributes, and a test which lists all of the existing undocumented
ones. If a new attribute is added, this test should catch the failure.
DeltaFile
+94-0clang/test/AST/undocumented-attrs.cpp
+43-0clang/utils/TableGen/ClangAttrEmitter.cpp
+7-0clang/utils/TableGen/TableGen.cpp
+2-0clang/utils/TableGen/TableGenBackends.h
+146-04 files

LLVM/project 08fea04lldb/test/API/tools/lldb-dap/locations TestDAP_locations.py

[lldb] Skip TestDAP_locations.py on arm64e (#203130)

See: https://github.com/llvm/llvm-project/issues/203127
DeltaFile
+3-0lldb/test/API/tools/lldb-dap/locations/TestDAP_locations.py
+3-01 files

LLVM/project 74abe83llvm/lib/Target/RISCV/MCTargetDesc RISCVBaseInfo.cpp RISCVELFStreamer.cpp, llvm/test/MC/RISCV target-abi-valid.s target-abi-invalid.s

[RISCV][CHERIoT] Define ABI_CHERIOT. (#192929)

These correspond to the CHERIoT ABI, documented here:
https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf
In particular, CHERIoT is an RV32E-based architecture extended with
CHERI support that is not binary compatible with the proposed RV Y base.
Amongst other changes, it has customized calling conventions, such as
passing f64 in capability registers.
DeltaFile
+9-0llvm/test/MC/RISCV/target-abi-valid.s
+8-1llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
+8-0llvm/test/MC/RISCV/target-abi-invalid.s
+1-0llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
+1-0llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
+27-15 files

LLVM/project f647e0dllvm/lib/Target/DirectX DXContainerPDB.cpp DXContainerGlobals.cpp

Address HLSL Tests issues
DeltaFile
+0-4llvm/lib/Target/DirectX/DXContainerPDB.cpp
+1-0llvm/lib/Target/DirectX/DXContainerGlobals.cpp
+1-42 files

LLVM/project d853197llvm/test/CodeGen/RISCV clmul.ll clmulr.ll, llvm/test/CodeGen/RISCV/rvv clmulh-sdnode.ll clmul-sdnode.ll

Rebase

Created using spr 1.3.7
DeltaFile
+38,494-84,026llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+22,388-22,086llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
+19,087-24,391llvm/test/CodeGen/RISCV/clmul.ll
+10,473-12,572llvm/test/CodeGen/RISCV/clmulr.ll
+10,281-12,374llvm/test/CodeGen/RISCV/clmulh.ll
+8,361-8,920llvm/test/CodeGen/RISCV/rvv/expandload.ll
+109,084-164,3692,975 files not shown
+336,365-326,9172,981 files

LLVM/project 582643flibc/src/__support/FPUtil dyadic_float.h, libc/test/UnitTest FPMatcher.h

[libc][math] Adding LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY option (#201154)

This PR adds a new option ~~`LIBC_MATH_ALWAYS_ROUND_NEAREST`~~
`LIBC_MATH_ASSUME_ROUND_NEAREST_ONLY` to LLVM libm.

There are some UBs that I kept as-is from the original code to keep the
changes non-disruptive (which I've marked with TODO comments)

Benchmarks (from `files.zip` in the comment
https://github.com/llvm/llvm-project/issues/198276#issue-4468816457):
- System libm:
```
overflow (>710)                1.55 ns/call  (644M ops/sec)
underflow to 0 (<-746)         1.34 ns/call  (747M ops/sec)
normal [-10,10]                4.41 ns/call  (227M ops/sec)
denormals [-740,-735]          2.25 ns/call  (444M ops/sec)
near-uflow [-700,-690]         2.25 ns/call  (444M ops/sec)
```
- LLVM libm (without the option being set):

    [20 lines not shown]
DeltaFile
+295-0libc/test/UnitTest/FPMatcher.h
+59-115libc/test/src/math/RoundToIntegerTest.h
+81-10libc/utils/MPFRWrapper/MPFRUtils.h
+38-53libc/test/src/math/RIntTest.h
+28-54libc/test/src/math/smoke/RoundToIntegerTest.h
+48-22libc/src/__support/FPUtil/dyadic_float.h
+549-25449 files not shown
+885-27755 files

LLVM/project d6e9232libc/src/__support freetrie.h freestore.h, libc/test/src/__support freetrie_test.cpp

Refactor FreeTrie to be intrusive proxy, add pop_min and tests

- Make FreeTrie a proxy holding root by reference.
- Move root and range storage outside FreeTrie (into FreeStore).
- Add find_min and pop_min implementations.
- Update tests and add pop_min test.

TAG=agy
CONV=7d0c366e-7fef-4a10-adb5-c96b98f5f2e2
DeltaFile
+73-20libc/test/src/__support/freetrie_test.cpp
+54-11libc/src/__support/freetrie.h
+13-6libc/src/__support/freestore.h
+140-373 files

LLVM/project ba7f7a6lldb/unittests/Host ProcessRunLockTest.cpp, llvm/test/CodeGen/AArch64/GlobalISel combine-max-min.mir

Merge branch 'main' into users/kparzysz/detach-type-param
DeltaFile
+352-572llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
+90-134llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
+86-130llvm/test/Transforms/SLPVectorizer/AArch64/aarch64-vector-functions.ll
+185-0lldb/unittests/Host/ProcessRunLockTest.cpp
+158-0llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.mir
+6-126llvm/test/Transforms/SLPVectorizer/X86/powi.ll
+877-962118 files not shown
+2,603-1,802124 files

LLVM/project 3b67307offload/plugins-nextgen/level_zero/dynamic_l0/level_zero ze_api.h, offload/plugins-nextgen/level_zero/include L0Event.h

[OFFLOAD][L0] Use counter-based events for inorder queues (#202301)

Inorder queues can use counter-based events which have better
performance and provide early-reused semantics.

Assisted by Claude.
DeltaFile
+16-0offload/plugins-nextgen/level_zero/dynamic_l0/level_zero/ze_api.h
+13-2offload/plugins-nextgen/level_zero/src/L0Event.cpp
+11-3offload/plugins-nextgen/level_zero/include/L0Event.h
+13-1offload/plugins-nextgen/level_zero/src/L0Context.cpp
+53-64 files

LLVM/project 5c8e727flang/test/Integration/OpenMP map-types-and-sizes.f90, flang/test/Lower/OpenMP optional-argument-map-2.f90 target-map-complex.f90

Revert "[Flang][OpenMP] remove enable-delayed-privatization-staging to suppor…" (#203348)

Reverts llvm/llvm-project#200952

test added in commit llvm/llvm-project#200952
`/offload/test/offloading/fortran/target-firstprivate.f90` on x86
offload, will fix test and open new PR with fixed changes
DeltaFile
+0-50offload/test/offloading/fortran/target-firstprivate.f90
+35-1flang/test/Lower/OpenMP/optional-argument-map-2.f90
+0-33flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate.f90
+10-6flang/test/Lower/OpenMP/target-map-complex.f90
+8-4flang/test/Integration/OpenMP/map-types-and-sizes.f90
+10-1flang/test/Lower/OpenMP/target.f90
+63-9524 files not shown
+129-12430 files

LLVM/project 86aaf7bllvm/test/Transforms/SLPVectorizer/AArch64 accelerate-vector-functions-inseltpoison.ll aarch64-vector-functions.ll, llvm/test/Transforms/SLPVectorizer/RISCV math-function.ll

[SLP] Cost struct-returning intrinsic calls with a vector library mapping

getVectorCallCosts queried the vector intrinsic cost with a type-based-only
IntrinsicCostAttributes. That path always scalarizes struct-returning
intrinsics (e.g. llvm.sincos), which have no VFDatabase name mapping.
Retry with an argument-aware query when the type-based cost looks scalarized.

Fixes #200644

Reviewers: hiraditya, bababuck, RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/201389
DeltaFile
+352-572llvm/test/Transforms/SLPVectorizer/RISCV/math-function.ll
+90-134llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
+86-130llvm/test/Transforms/SLPVectorizer/AArch64/aarch64-vector-functions.ll
+6-126llvm/test/Transforms/SLPVectorizer/X86/powi.ll
+17-42llvm/test/Transforms/SLPVectorizer/X86/call.ll
+17-41llvm/test/Transforms/SLPVectorizer/X86/intrinsic.ll
+568-1,0459 files not shown
+666-1,22915 files

LLVM/project 31613bfllvm/include/llvm/IR BundleAttributes.h, llvm/lib/IR BundleAttributes.cpp

[InstCombine] Drop redundant noundef assume bundles (#203309)
DeltaFile
+17-0llvm/test/Transforms/InstCombine/assume.ll
+7-1llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+6-0llvm/include/llvm/IR/BundleAttributes.h
+5-0llvm/lib/IR/BundleAttributes.cpp
+35-14 files

LLVM/project beb2021compiler-rt/test/cfi lit.cfg.py

fix python formatting

Created using spr 1.3.7
DeltaFile
+1-1compiler-rt/test/cfi/lit.cfg.py
+1-11 files

LLVM/project 42393d7flang/test/Integration/OpenMP map-types-and-sizes.f90, flang/test/Lower/OpenMP optional-argument-map-2.f90 target-map-complex.f90

Revert "[Flang][OpenMP] remove enable-delayed-privatization-staging to suppor…"

This reverts commit 1ee93f9e1ab7578c94ebd5f7e6aecaba9a33537d.
DeltaFile
+0-50offload/test/offloading/fortran/target-firstprivate.f90
+35-1flang/test/Lower/OpenMP/optional-argument-map-2.f90
+0-33flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate.f90
+10-6flang/test/Lower/OpenMP/target-map-complex.f90
+8-4flang/test/Integration/OpenMP/map-types-and-sizes.f90
+10-1flang/test/Lower/OpenMP/target.f90
+63-9524 files not shown
+129-12430 files

LLVM/project fa888b3lldb/test/API/commands/platform/process/launch TestPlatformProcessLaunch.py

[lldb/test] Skip TestPlatformProcessLaunch on remote-darwin targets (#203070)
DeltaFile
+3-1lldb/test/API/commands/platform/process/launch/TestPlatformProcessLaunch.py
+3-11 files

LLVM/project 2e757b8compiler-rt/test/cfi summary.cpp lit.cfg.py

fix formatting issues

Created using spr 1.3.7
DeltaFile
+5-5compiler-rt/test/cfi/summary.cpp
+3-1compiler-rt/test/cfi/lit.cfg.py
+8-62 files

LLVM/project a114ffdlldb/include/lldb/Host ProcessRunLock.h, lldb/source/Host/common ProcessRunLock.cpp

[lldb] Make ProcessRunLock recursive on the read side per-thread (#201685)
DeltaFile
+185-0lldb/unittests/Host/ProcessRunLockTest.cpp
+129-0lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/TestRunLockReentrantDeadlock.py
+106-3lldb/source/Host/common/ProcessRunLock.cpp
+33-40lldb/include/lldb/Host/ProcessRunLock.h
+44-0lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/bkpt_resolver.py
+32-0lldb/test/API/functionalities/scripted_frame_provider/runlock_reentrant_deadlock/frame_provider.py
+529-433 files not shown
+551-439 files

LLVM/project 70beebdllvm/include/llvm/Target/GlobalISel Combine.td, llvm/test/CodeGen/AArch64 combine-max-min.ll

[GIsel] import min/max rewrites (#188267)

this PR imports the rewrites for min/max operations existing in the
SelectionDAG
[combine](https://github.com/llvm/llvm-project/blob/20aff2085c358d3e112b245494161ddb9ffe0410/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4272)
to GlobalISel

---------

Co-authored-by: Osman Yasar <osmanyas05 at gmail.com>
DeltaFile
+158-0llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.mir
+92-0llvm/test/CodeGen/AArch64/combine-max-min.ll
+87-0llvm/test/CodeGen/AArch64/GlobalISel/combine-max-min.ll
+28-1llvm/include/llvm/Target/GlobalISel/Combine.td
+365-14 files

LLVM/project f01cbe7llvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 recalc-copyable-operand-deps-direct-use.ll

[SLP] Recompute deps of copyable-modeled operands used directly

An instruction modeled as a copyable element elsewhere can also be used
directly by a later-built node sharing an instruction with the copyable
nodes. The direct use was not counted, so the scheduler over-decremented
the operand and tripped the unscheduled-deps assertion. Defer
recomputation whenever the operand is modeled as a copyable element
anywhere.

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/203342
DeltaFile
+123-0llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-operand-deps-direct-use.ll
+20-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+143-22 files

LLVM/project dbd31cbllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/AArch64 recalc-copyable-operand-deps-direct-use.ll

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+123-0llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-operand-deps-direct-use.ll
+20-2llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+143-22 files

LLVM/project 5244b87compiler-rt/lib/ubsan ubsan_handlers_cxx.cpp ubsan_handlers.cpp, compiler-rt/test/cfi summary.cpp lit.cfg.py

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+111-0compiler-rt/test/cfi/summary.cpp
+20-1compiler-rt/lib/ubsan/ubsan_handlers_cxx.cpp
+10-2compiler-rt/lib/ubsan/ubsan_handlers.cpp
+8-2compiler-rt/test/cfi/lit.cfg.py
+6-1compiler-rt/lib/ubsan/ubsan_checks.inc
+155-65 files

LLVM/project 7cfe3bdllvm/tools/dsymutil Options.td

[𝘀𝗽𝗿] initial version

Created using spr 1.3.7
DeltaFile
+1-1llvm/tools/dsymutil/Options.td
+1-11 files

LLVM/project 854a6f9llvm/include/llvm/IR GlobalValue.h, llvm/include/llvm/Transforms/Utils AssignGUID.h

Reland #184065
DeltaFile
+61-17llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+45-30llvm/lib/LTO/LTO.cpp
+64-2llvm/lib/IR/Globals.cpp
+49-3llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+45-5llvm/include/llvm/IR/GlobalValue.h
+49-0llvm/include/llvm/Transforms/Utils/AssignGUID.h
+313-57116 files not shown
+848-401122 files

LLVM/project e737bebllvm/lib/Transforms/IPO ThinLTOBitcodeWriter.cpp WholeProgramDevirt.cpp, llvm/test/ThinLTO/X86 devirt_function_alias2.ll

cfi creates alias
DeltaFile
+20-33llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
+17-5llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
+10-7llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
+16-0llvm/lib/Transforms/IPO/LowerTypeTests.cpp
+6-4llvm/test/ThinLTO/X86/devirt_function_alias2.ll
+5-4llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal2.ll
+74-533 files not shown
+82-589 files

LLVM/project ea1d7e3clang/lib/CIR/CodeGen CIRGenExpr.cpp CIRGenFunction.cpp, clang/test/CIR/CodeGen bind-temporary-lvalue.cpp

[CIR] Implement bind temporary lvalue (#202755)

This change implements the handling to emit a CXXBindTemporaryExpr
l-value. This is a very direct port from the classic codegen
implementation, leveraging existing functions in CIR.
DeltaFile
+42-0clang/test/CIR/CodeGen/bind-temporary-lvalue.cpp
+10-0clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+1-3clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+2-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+55-34 files

LLVM/project 988778dclang/lib/CIR/CodeGen CIRGenDecl.cpp, clang/test/CIR/CodeGen static-local-nested-reference.cpp

[CIR] Force emission of static local enclosing functions (#201941)

When getOrCreateStaticVarDecl is called, we need to call
`getAddressOfGlobal` to trigger the emission of the enclosing function.
In most cases this has already happened, but there are cases where the
enclosing function would not otherwise have been emitted. See
https://bugs.llvm.org/show_bug.cgi?id=18020 for details.

It appears that this was mistakenly seen as OpenMP-specific behavior
because of an OpenMP RAII guard that surrounds it in classic codegen,
but that actually is there to skip the behavior when generating OpenMP
device code.

We also needed to insert the static local decl into CIRGenModule's map
by calling `setStaticLocalDeclAddress`. To avoid a duplicate emission.

Assisted-by: Cursor / claude-opus-4.8
DeltaFile
+26-0clang/test/CIR/CodeGen/static-local-nested-reference.cpp
+10-3clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+36-32 files

LLVM/project 2029ec5llvm/test/CodeGen/AMDGPU si-insert-hard-clause-bundle-fail.ll

add test
DeltaFile
+59-0llvm/test/CodeGen/AMDGPU/si-insert-hard-clause-bundle-fail.ll
+59-01 files

LLVM/project 57e2393clang/test/OpenMP target_codegen.cpp target_simd_codegen.cpp, llvm/include/llvm/Frontend/Offloading Utility.h

Revert "[OpenMP] Use ext linkage for kernels handles and globals handles keep…" (#203327)

Reverts llvm/llvm-project#202827

This change is breaking omp target template support:

https://github.com/ROCm/aomp/tree/aomp-dev/test/smoke/unique-kernel-name

```
[~/git/aomp/test/smoke/unique-kernel-name]$ AOMP=/COD/LATEST/trunk make run
/COD/LATEST/trunk/bin/clang++  -O2    -fopenmp --offload-arch=gfx90a   -D__OFFLOAD_ARCH_gfx90a__ b.cpp a.cpp -o unique-kernel-name
ld.lld: error: duplicate symbol: .offloading.entry.__omp_offloading_811_5962ffa__ZN3fooIfEC1Ev_l7
>>> defined at b.cpp
>>>            /tmp/b-1462b7.o:(.offloading.entry.__omp_offloading_811_5962ffa__ZN3fooIfEC1Ev_l7)
>>> defined at a.cpp
>>>            /tmp/a-40aac4.o:(llvm_offload_entries+0x0)
/mnt/COD/2026-06-11/trunk_23.0-0/bin/clang-linker-wrapper: error: 'ld.lld' failed
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
make: *** [../Makefile.rules:62: unique-kernel-name] Error 1

    [18 lines not shown]
DeltaFile
+11-11clang/test/OpenMP/target_codegen.cpp
+6-12llvm/lib/Frontend/Offloading/Utility.cpp
+8-8clang/test/OpenMP/target_simd_codegen.cpp
+8-8mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-host.mlir
+4-4clang/test/OpenMP/target_indirect_codegen.cpp
+4-4llvm/include/llvm/Frontend/Offloading/Utility.h
+41-4714 files not shown
+68-7520 files

LLVM/project 2af4354offload/plugins-nextgen/level_zero/include L0Options.h, offload/plugins-nextgen/level_zero/src L0Device.cpp L0Options.cpp

[OFFLOAD][L0] Add control for Copy Offload Hint (#203203)

In some cases setting ZE_COMMAND_QUEUE_FLAG_COPY_OFFLOAD_HINT reduces
performance. Here we introduce
LIBOFFLOAD_LEVEL_ZERO_USE_COPY_OFFLOAD_HINT env var to allow users to
control the hint (which continues to be on by default).
DeltaFile
+4-1offload/plugins-nextgen/level_zero/src/L0Device.cpp
+3-2offload/plugins-nextgen/level_zero/include/L0Options.h
+3-0offload/plugins-nextgen/level_zero/src/L0Options.cpp
+10-33 files