LLVM/project e816381llvm/include/llvm/Analysis LoopInfo.h

[LoopInfo] Remove redundant LLVM_ABI from Loop member functions (#195863)

Remove redundant `LLVM_ABI` from `addStringLoopAttribute` and
`addIntLoopAttribute`.

Addresses post-merge feedback on #194676.

This patch was generated with the help of Claude and reviewed by a
human.

Co-authored-by: Claude Opus 4 (1M context) <noreply at anthropic.com>
DeltaFile
+4-6llvm/include/llvm/Analysis/LoopInfo.h
+4-61 files

LLVM/project dafdee4llvm/lib/Target/PowerPC PPCISelLowering.cpp

Reviewer comment
DeltaFile
+2-3llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+2-31 files

LLVM/project 2be7a1bclang/lib/Driver Driver.cpp, clang/test/Driver darwin-dsymutil.c darwin-verify-debug.c

clang: Print effective triple in -ccc-print-bindings

Previously this would print the original triple, rather
than the adjusted triple for the tool invocation which I found
confusing.
DeltaFile
+10-10clang/test/Driver/darwin-dsymutil.c
+5-5clang/test/Driver/darwin-verify-debug.c
+2-2clang/lib/Driver/Driver.cpp
+1-1clang/test/Driver/bindings.c
+18-184 files

LLVM/project 6e2d30bllvm/lib/Target/RISCV/GISel RISCVInlineAsmLowering.cpp

[RISCV][GISel][NFC] Fix file header comment in RISCVInlineAsmLowering.cpp (#195805)
DeltaFile
+1-1llvm/lib/Target/RISCV/GISel/RISCVInlineAsmLowering.cpp
+1-11 files

LLVM/project fa8724blldb/test/API/tools/lldb-dap/source TestDAP_source.py, lldb/tools/lldb-dap/Handler SourceRequestHandler.cpp

[lldb-dap] Fix crash in source request handler (#195847)

Check optional argument source has a value before getting the source
reference.
DeltaFile
+6-0lldb/test/API/tools/lldb-dap/source/TestDAP_source.py
+3-2lldb/tools/lldb-dap/Handler/SourceRequestHandler.cpp
+9-22 files

LLVM/project 8fb9a6cclang/include/clang/Basic BuiltinsPPC.def, clang/lib/CodeGen/TargetBuiltins PPC.cpp

[PowerPC] Add AES Builtins (#186895)

Add the following AES builtins:

__vector_pair __builtin_aes_encrypt_paired (__vector_pair,
__vector_pair, uint2);
__vector_pair __builtin_aes128_encrypt_paired (__vector_pair,
__vector_pair);
__vector_pair __builtin_aes192_encrypt_paired (__vector_pair,
__vector_pair);
__vector_pair __builtin_aes256_encrypt_paired (__vector_pair,
__vector_pair);

__vector_pair __builtin_aes_decrypt_paired (__vector_pair,
__vector_pair, uint2);
__vector_pair__builtin_aes128_decrypt_paired (__vector_pair,
__vector_pair);
__vector_pair __builtin_aes192_decrypt_paired (__vector_pair,
__vector_pair);

    [10 lines not shown]
DeltaFile
+251-0clang/test/Sema/PowerPC/builtins-aes-acceleration-error.c
+174-0llvm/test/CodeGen/PowerPC/builtins-ppc-aes-acceleration.ll
+141-0clang/test/CodeGen/PowerPC/builtins-aes-acceleration.c
+87-16clang/lib/CodeGen/TargetBuiltins/PPC.cpp
+38-0clang/include/clang/Basic/BuiltinsPPC.def
+25-9llvm/lib/Target/PowerPC/PPCInstrFuture.td
+716-251 files not shown
+737-257 files

LLVM/project f363444clang/include/clang/AST FormatString.h, clang/lib/Sema SemaChecking.cpp

[clang] Consistently store format specifiers in execution encoding (#195876)

`DecomposePrintfHandler::HandlePrintfSpecifier()` parses the format
string and collects specifiers into `Specs`. In most cases the collected
specifiers are in the execution encoding, but there were to places that
used string literals in "host" encoding.

Change them to use a part of the parsed `StringLiteral` instead so that
`Specs` always contain text in the execution encoding. This is achieved
by adding `getCharacters()` method to `OptionalAmount` class, following
`ConversionSpecifier::getCharacters()`.

This is to make #169803 smaller and is an NFC before that PR lands.
DeltaFile
+11-11clang/lib/Sema/SemaChecking.cpp
+4-0clang/include/clang/AST/FormatString.h
+15-112 files

LLVM/project ed79468llvm/unittests/DWARFLinkerParallel CMakeLists.txt

[UnitTests] Fix shared build. NFC (#195906)
DeltaFile
+4-1llvm/unittests/DWARFLinkerParallel/CMakeLists.txt
+4-11 files

LLVM/project 60e3203cmake/Modules LLVMVersion.cmake, libcxx/include __config

Bump version to 22.1.6
DeltaFile
+1-1cmake/Modules/LLVMVersion.cmake
+1-1libcxx/include/__config
+1-1llvm/utils/gn/secondary/llvm/version.gni
+1-1llvm/utils/lit/lit/__init__.py
+1-1llvm/utils/mlgo-utils/mlgo/__init__.py
+5-55 files

LLVM/project 761f76bllvm/unittests/DWARFLinkerParallel CMakeLists.txt

[llvm] Fix the DWARFLinkerParallel unit tests (#195902)
DeltaFile
+1-0llvm/unittests/DWARFLinkerParallel/CMakeLists.txt
+1-01 files

LLVM/project a0f8102clang/include/clang/Basic TargetInfo.h, clang/lib/AST ASTContext.cpp

convert to exec-charset inside getPredefinedStringLiteralFromCache, test __builtin_FILE()
DeltaFile
+28-0clang/test/CodeGen/systemz-charset.cpp
+10-0clang/lib/AST/ASTContext.cpp
+5-4clang/lib/Lex/TextEncodingConfig.cpp
+3-0clang/lib/Basic/TargetInfo.cpp
+2-0clang/include/clang/Basic/TargetInfo.h
+48-45 files

LLVM/project df6be39clang/lib/AST PrintfFormatString.cpp FormatString.cpp, clang/lib/Sema SemaChecking.cpp

add format string handling
DeltaFile
+58-31clang/lib/AST/PrintfFormatString.cpp
+46-40clang/lib/AST/FormatString.cpp
+33-21clang/lib/Sema/SemaChecking.cpp
+25-11clang/lib/AST/FormatStringParsing.h
+15-8clang/lib/AST/ScanfFormatString.cpp
+19-0llvm/lib/Support/TextEncoding.cpp
+196-11113 files not shown
+260-12419 files

LLVM/project 3270d27clang/include/clang/Sema Sema.h, clang/lib/Parse ParseDeclCXX.cpp ParseExpr.cpp

do not translate unevaluated strings
DeltaFile
+15-0clang/test/CodeGen/systemz-charset.c
+9-0clang/test/CodeGen/systemz-charset-diag.cpp
+3-4clang/lib/Sema/SemaExpr.cpp
+1-3clang/include/clang/Sema/Sema.h
+1-3clang/lib/Parse/ParseDeclCXX.cpp
+1-2clang/lib/Parse/ParseExpr.cpp
+30-121 files not shown
+30-157 files

LLVM/project 4ee6a08clang/include/clang/Sema Sema.h, clang/lib/Parse ParseDecl.cpp ParseExpr.cpp

add ParserConversionAction
DeltaFile
+13-0clang/lib/Parse/ParseDecl.cpp
+7-5clang/lib/Sema/SemaExpr.cpp
+5-4clang/lib/Parse/ParseExpr.cpp
+6-2clang/include/clang/Sema/Sema.h
+5-1clang/lib/Parse/ParseDeclCXX.cpp
+4-0clang/lib/Parse/Parser.cpp
+40-121 files not shown
+41-127 files

LLVM/project 0667896utils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel] fix #193207 (#195898)

fix #193207
DeltaFile
+1-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-01 files

LLVM/project eb899dcllvm/lib/Transforms/Vectorize VPlanUtils.cpp, llvm/test/Transforms/LoopVectorize/X86 induction-step.ll

[VPlan] Check for VInstruction in findCanonicalIVIncrement. (#195845)

There are cases where findCanonicalIVIncrement may discover a
non-VPInstruction add that matches the expected shape, but we expect a
VPInstruction. Add explicit check to fix crash.
DeltaFile
+173-82llvm/test/Transforms/LoopVectorize/X86/induction-step.ll
+2-1llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+175-832 files

LLVM/project 4a28ba6flang/include/flang/Optimizer/Dialect/CUF/Attributes CUFAttr.h, flang/lib/Semantics expression.cpp check-cuda.cpp

[flang][cuda][openacc] Add UseDevice attribute to model host_data use_device symbols (#195182)

Symbols appearing in `!$acc host_data use_device(...)` were previously
marked with `CUDADataAttr::Device`, which caused generic resolution to
fail.

Introduce a new CUDADataAttr::UseDevice enumerator and use it in
`CopySymbolWithDevice` / `CloneDerivedTypeForUseDeviceImpl` instead of
Device. The new attribute is:

1. Compatible with any dummy in AreCompatibleCUDADataAttrs.
2. Ranked in the matching distance table (GetMatchingDistance): prefers
Device dummies (0), accepts Managed/Unified (2), and allows host dummies
(3).
3. Not user-spellable — only set internally during OpenACC name
resolution, never parsed from source or written to module files.
4. Treated like Device for non-host-array checks, I/O restrictions, and
MLIR lowering (mapped to `cuf::DataAttribute::Device`).
DeltaFile
+85-0flang/test/Semantics/cuf27.cuf
+18-0flang/lib/Semantics/expression.cpp
+8-3flang/lib/Semantics/check-cuda.cpp
+4-2flang/lib/Semantics/resolve-names.cpp
+3-0flang/include/flang/Optimizer/Dialect/CUF/Attributes/CUFAttr.h
+3-0flang/lib/Support/Fortran.cpp
+121-53 files not shown
+125-79 files

LLVM/project 6b80b27clang/test/Driver clang-sycl-linker-test.cpp, clang/test/Driver/Inputs/SYCL two-kernels.ll

[clang-sycl-linker] Add per-kernel device code splitting (#195362)

Introduce a --sycl-module-split-mode option for clang-sycl-linker that
selects how the fully linked device module is split into device images:
  - none (default): one device image containing all kernels
- kernel: one device image per kernel function, built by taking the
transitive closure of each kernel's dependencies

The split is implemented by delegating to
llvm::splitModuleTransitiveFromEntryPoints, providing a categorizer that
assigns each kernel definition a unique integer id.

Symbol collection now happens during splitting while the Module is still
in memory, avoiding a round-trip through disk to re-read the bitcode for
symbol extraction.

As part of this change, the splitModuleTransitiveFromEntryPoints API is
updated to accept an Error-returning callback and propagate errors from
it, replacing the previous void callback signature. The existing caller

    [10 lines not shown]
DeltaFile
+150-38clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
+30-2clang/test/Driver/clang-sycl-linker-test.cpp
+23-0clang/test/Driver/Inputs/SYCL/two-kernels.ll
+5-3llvm/lib/Transforms/Utils/SplitModuleByCategory.cpp
+4-4llvm/tools/llvm-split/llvm-split.cpp
+6-0clang/tools/clang-sycl-linker/SYCLLinkOpts.td
+218-472 files not shown
+222-498 files

LLVM/project 5e275efllvm/lib/Transforms/Vectorize VPlanTransforms.cpp LoopVectorize.cpp, llvm/test/Transforms/LoopVectorize/VPlan vplan-print-after-all.ll

[NFC][VPlan] Split `makeMemOpWideningDecisions` into subpasses

The idea is to have handling of strided memory operations (either from
https://github.com/llvm/llvm-project/pull/147297 or for VPlan-based
multiversioning for unit-strided accesses) done after some mandatory
processing has been performed (e.g., some types **must** be scalarized)
but before legacy CM's decision to widen (gather/scatter) or scalarize
has been committed.

And in longer term, we can uplift all other memory widening decision to
be done here directly at VPlan level. I expect this structure would also
be beneficial for that.
DeltaFile
+69-28llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+0-10llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+10-0llvm/lib/Transforms/Vectorize/VPlanTransforms.h
+3-0llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-after-all.ll
+82-384 files

LLVM/project 10db733mlir/lib/Dialect/Transform/IR Utils.cpp, mlir/test/Dialect/Transform inliner-legality.mlir

[MLIR][Transform] Don't error when a structurally inlinable call exists (#195770)

Fixes bug introduced in https://github.com/llvm/llvm-project/pull/192956

Specifically transform-interpreter would crash if any op in the region
it is applied to is marked as no-inline via the inliner interface. This
is because the check added does a post processing to verify that all
operations can be inlined [and there isn't an issue due to symbol
merging]. However, it fails to account for the case where an operation
was already not inlinable (and not an error introduced by the transform
symbol merging).
DeltaFile
+30-2mlir/lib/Dialect/Transform/IR/Utils.cpp
+18-0mlir/test/Dialect/Transform/inliner-legality.mlir
+48-22 files

LLVM/project ad72a39utils/bazel/llvm-project-overlay/llvm BUILD.bazel

[Bazel] Fixes bb51440 (#195851)

This fixes bb51440ffe693007fee40df9c9227432ebc5e0f0.

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
DeltaFile
+1-0utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
+1-01 files

LLVM/project 6726ce2llvm/include/llvm/Analysis LoopAccessAnalysis.h

unsigned->uint64_t for AbsCommonStrideInBytes
DeltaFile
+2-2llvm/include/llvm/Analysis/LoopAccessAnalysis.h
+2-21 files

LLVM/project 3e6654dllvm/include/llvm/Analysis LoopAccessAnalysis.h, llvm/lib/Analysis LoopAccessAnalysis.cpp

[LAA] Enable diff checks for non-unit constant stride

This can be extended to non-constant loop-invariant strides but that is
left to a separate change.
DeltaFile
+19-55llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-runtime-checks.ll
+26-44llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+12-7llvm/lib/Transforms/Utils/LoopUtils.cpp
+7-5llvm/lib/Analysis/LoopAccessAnalysis.cpp
+4-5llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
+4-1llvm/include/llvm/Analysis/LoopAccessAnalysis.h
+72-1176 files

LLVM/project 0beb9f4llvm/include/llvm/SandboxIR Values.def Value.h, llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer SandboxVectorizerIR.h SandboxVectorizerIRValues.def

[SandboxVec] SandboxVectorizerIR Boilerplate (#189515)

This patch introduces a new specialization of SandboxIR named
SandboxVectorizerIR that contains the new Pack instruction (though it is
just a placeholder for now). It also implements the necessary
boilerplate in SandboxIR to support adding such specializations.

Each specialization requires its own *Values.def file defining its new
instructions. The new .def file also needs to be added to
ValuesDefFilesList.def which allows SandboxIR to include entries from
all specializations and populate structures like the Opcode enum,
ClassID and others.

Given that we need to include both .def files in several places, I had
to (i) change the .def file to undefine its locally defined macros so
that they won't get redefined in the next #include .def, and (ii) add
the DEF_DISABLE_AUTO_UNDEF option to disable undefining the macros at
the end because otherwise the user-specified DEF_ macros would be
undefined by the time we reach the second .def file.
DeltaFile
+57-18llvm/include/llvm/SandboxIR/Values.def
+59-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIR.h
+57-0llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIRTest.cpp
+48-0llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIR.cpp
+40-0llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizerIRValues.def
+22-3llvm/include/llvm/SandboxIR/Value.h
+283-2111 files not shown
+336-4117 files

LLVM/project 602f2a5llvm/lib/DWARFLinker Utils.cpp, llvm/lib/DWARFLinker/Classic DWARFLinker.cpp

Revert "[DWARFLinker] Patch DW_AT_LLVM_stmt_sequence in the parallel linker (…"

This reverts commit 7ff811a88e3157aa32dddb147d9b264ef8870c75.
DeltaFile
+59-159llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
+107-14llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+0-118llvm/unittests/DWARFLinkerParallel/DWARFLinkerTest.cpp
+0-100llvm/lib/DWARFLinker/Utils.cpp
+2-64llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.h
+2-33llvm/lib/DWARFLinker/Parallel/DIEAttributeCloner.cpp
+170-4886 files not shown
+191-58112 files

LLVM/project 3bbc3acllvm/lib/CodeGen MachineFunction.cpp, llvm/lib/MC MCDwarf.cpp

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c
DeltaFile
+67-67llvm/test/CodeGen/AMDGPU/sgpr-spill-overlap-wwm-reserve.mir
+33-0llvm/lib/MC/MCDwarf.cpp
+15-15llvm/test/CodeGen/AMDGPU/dwarf-multi-register-use-crash.ll
+10-0llvm/lib/CodeGen/MachineFunction.cpp
+4-4llvm/test/CodeGen/AMDGPU/debug-frame.ll
+2-2llvm/test/CodeGen/AMDGPU/pei-vgpr-block-spill-csr.mir
+131-885 files not shown
+143-9011 files

LLVM/project 4c0b0b0llvm/lib/Target/AMDGPU SIFrameLowering.cpp SIMachineFunctionInfo.h, llvm/test/CodeGen/AMDGPU amdgpu-spill-cfi-saved-regs.ll

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder scott.linder at amd.com
Co-authored-by: Venkata Ramanaiah Nalamothu VenkataRamanaiah.Nalamothu at amd.com
DeltaFile
+2,998-0llvm/test/CodeGen/AMDGPU/amdgpu-spill-cfi-saved-regs.ll
+17-0llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
+10-0llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+9-0llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+2-0llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+3,036-05 files

LLVM/project 1382906llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll gfx-callable-argument-types.ll

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>
DeltaFile
+3,568-2,598llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+1,912-1,913llvm/test/CodeGen/AMDGPU/gfx-callable-argument-types.ll
+2,700-12llvm/test/CodeGen/AMDGPU/accvgpr-spill-scc-clobber.mir
+631-631llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+505-510llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
+394-399llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
+9,710-6,063108 files not shown
+14,825-9,527114 files

LLVM/project 9cf264fllvm/lib/Target/SPIRV SPIRVInstrInfo.td SPIRVRegisterInfo.td

[NFC][SPIR-V] Rename vID register class to viID (#195711)

Rename the v2i64 register and its class from vID/vID0 to viID/viID0 so
it follows the same `v<element-kind>ID` convention as vfID (v2f64) and
vpID (v2p64) for better consistency
DeltaFile
+8-8llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
+3-3llvm/lib/Target/SPIRV/SPIRVRegisterInfo.td
+2-2llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
+1-1llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+1-1llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
+15-155 files

LLVM/project e63548eclang/lib/Driver/ToolChains AMDGPU.cpp

clang: Print full triple arch name in error (#195889)

More instances of pattern from 58f94f0a4648a5d8d624c05a51dea8c37e5fe7bc
DeltaFile
+2-4clang/lib/Driver/ToolChains/AMDGPU.cpp
+2-41 files