LLVM/project 4d676e5flang/include/flang/Optimizer/Dialect CUDAKernelOpInterface.td CUDAKernelOpInterface.h, flang/lib/Optimizer/Dialect CUDAKernelOpInterface.cpp FIROps.cpp

[flang][cuda] Preserve fir.rebox captured by cuf.kernel via CUDAKernelOpInterface (#193890)

Reland of #193837 (reverted in #193855), now using a marker op interface
to avoid the link cycle that broke `BUILD_SHARED_LIBS=ON` builds.

`SimplifyArrayCoorOp` folded `fir.rebox` into `fir.array_coor` across a
`cuf.kernel` boundary. CUF lowering needs the captured rebox to
materialize a managed-memory descriptor for the kernel; folding it away
makes the kernel dereference the host-side descriptor and crash with
`cudaErrorIllegalAddress`.

Fix is to add `fir::CUDAKernelOpInterface`, a marker op interface
defined in FIRDialect and implemented by `cuf.kernel`. The
canonicalization guard queries the interface, so the `TypeIDResolver`
symbol lives in `libFIRDialect.so` and no `FIR -> CUF` link edge is
introduced.
DeltaFile
+66-0flang/test/Fir/array-coor-canonicalization-cuf.fir
+34-0flang/include/flang/Optimizer/Dialect/CUDAKernelOpInterface.td
+21-0flang/include/flang/Optimizer/Dialect/CUDAKernelOpInterface.h
+15-0flang/lib/Optimizer/Dialect/CUDAKernelOpInterface.cpp
+10-0flang/lib/Optimizer/Dialect/FIROps.cpp
+5-0flang/include/flang/Optimizer/Dialect/CMakeLists.txt
+151-03 files not shown
+156-19 files

LLVM/project 3c14034flang/lib/Semantics check-omp-structure.cpp, flang/test/Semantics/OpenMP device-omp-initial-invalid.f90 device-pre-52.f90

[Flang][OpenMP] Validate `omp_initial_device` `omp_invalid_device` as device IDs (#193669)

As per OpenMP 5.2/6.0 the below are valid device values in a `#pragma
omp target` directive:

omp_initial_device (-1) -> refers to the host CPU.
omp_invalid_device (-2) -> an intentionally invalid device, used to
trigger a runtime error.

For the 2 values discussed above flang fails with:

```
error: The device expression of the DEVICE clause must be a positive integer expression
      !$OMP TARGET DEVICE(-1)
error: Must have INTEGER type, but is REAL(4)
      !$OMP TARGET DEVICE(OMP_INVALID_DEVICE)

```
Issue: https://github.com/llvm/llvm-project/issues/192989
DeltaFile
+82-0flang/test/Semantics/OpenMP/device-omp-initial-invalid.f90
+36-0flang/test/Semantics/OpenMP/device-pre-52.f90
+15-3flang/test/Semantics/OpenMP/device-constructs.f90
+14-2flang/lib/Semantics/check-omp-structure.cpp
+5-0openmp/module/omp_lib.h.var
+3-0openmp/module/omp_lib.F90.var
+155-56 files

LLVM/project ae81339llvm/utils/TableGen/Basic DirectiveEmitter.cpp

Update DirectiveEmitter.cpp
DeltaFile
+1-1llvm/utils/TableGen/Basic/DirectiveEmitter.cpp
+1-11 files

LLVM/project 5320bdallvm/lib/Target/AMDGPU AMDGPUCoExecSchedStrategy.cpp, llvm/test/CodeGen/AMDGPU coexec-scheduler.ll

[AMDGPU] Enable lane masks tracking in coexec scheduler. (#194578)

Prevents the scheduler to silently produce invalid IR.
DeltaFile
+69-69llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
+1-0llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
+70-692 files

LLVM/project d7ed6d8libcxx/test/benchmarks spec.gen.py, libcxx/utils/ci/lnt run-benchbot run-benchmarks

[libc++] Improvements to the benchmark runners (#194659)

- Run the ref workloads on SPEC
- Record the SPEC version in the machine info
- Allow filtering which benchmarks are run in run-benchbot
DeltaFile
+12-0libcxx/utils/ci/lnt/run-benchbot
+3-3libcxx/test/benchmarks/spec.gen.py
+4-0libcxx/utils/ci/lnt/run-benchmarks
+19-33 files

LLVM/project ec06755clang/lib/StaticAnalyzer/Checkers/WebKit RetainPtrCtorAdoptChecker.cpp PtrTypesSemantics.cpp, clang/test/Analysis/Checkers/WebKit objc-mock-types.h retain-ptr-ctor-adopt-use.mm

Add the support for adoptCFNullable/adoptNSNullable (#194539)

These are two new "adopt" functions to be introduced in WebKit.
DeltaFile
+20-0clang/test/Analysis/Checkers/WebKit/objc-mock-types.h
+6-0clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use.mm
+6-0clang/test/Analysis/Checkers/WebKit/retain-ptr-ctor-adopt-use-arc.mm
+3-1clang/lib/StaticAnalyzer/Checkers/WebKit/RetainPtrCtorAdoptChecker.cpp
+2-1clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
+2-0clang/test/Analysis/Checkers/WebKit/unretained-call-args.mm
+39-26 files

LLVM/project 251ed1ellvm/lib/Transforms/Vectorize VPlanTransforms.cpp, llvm/test/Transforms/LoopVectorize tail-folding-vectorization-factor-1.ll first-order-recurrence.ll

[VPlan] Optz WideCanIV with SIVSteps over CanIV (#191276)

Replace WideCanonicalIV with a ScalarIVSteps over the CanonicalIV when
only the first lane is used. This is a preparatory step in enabling
expansion of WideCanonicalIV into executable recipes.
DeltaFile
+59-41llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
+59-0llvm/test/Transforms/LoopVectorize/AArch64/tail-folding-counting-down.ll
+7-8llvm/test/Transforms/LoopVectorize/tail-folding-vectorization-factor-1.ll
+2-2llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
+2-2llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+129-535 files

LLVM/project 7ceac4bllvm/utils/lit/lit TestRunner.py

[Lit] Open sub-processes with text=`False` (#194577)

This PR is part of a series of patches upgrading Lit's in-process
built-ins to be able to run with piped input/output and full redirection
support, and to allow custom in-process builtns to be provided via the
Lit config. The remaining patches to Lit's test runner can be found here:
https://github.com/BStott6/llvm-project/compare/lit-inproc-builtins.

This is part of the Lit daemonized testing project:
https://discourse.llvm.org/t/88612

This PR makes Lit open all sub-processes with `text=False`, so that the
Python code will be able to read and write binary data to and from their
IO streams. This currently causes no functional change, as when Lit
reads output from the sub-processes, it already handles the case that
the read output is `bytes` by decoding it, but we will need to be able
to read binary data from a sub-process's STDIN if its output, which may
be binary, is piped into an in-process built-in, and we will need to be
able to write binary data to a sub-process's STDOUT if its input is

    [5 lines not shown]
DeltaFile
+1-2llvm/utils/lit/lit/TestRunner.py
+1-21 files

LLVM/project 40ad10aflang/include/flang/Support Fortran-features.h, flang/lib/Frontend CompilerInvocation.cpp

[Flang] Fix -Wopen-mp-* and -Wopen-acc-* flag spellings (#188434)

The CamelCase-to-hyphenated conversion was incorrectly splitting
"OpenMP" and "OpenACC" into "open-mp" and "open-acc", producing wrong -W
flag names like -Wopen-mp-usage instead of -Wopenmp-usage. Fix the
conversion to treat these as compound names, keep the old spellings as
deprecated aliases, and emit a warning when deprecated spellings are
used.

---------

Co-authored-by: Claude Opus 4.6 <noreply at anthropic.com>
DeltaFile
+72-6flang/lib/Support/Fortran-features.cpp
+15-15flang/test/Semantics/OpenMP/declare-target02.f90
+13-13flang/test/Semantics/OpenMP/declare-target01.f90
+23-0flang/test/Driver/deprecated-w-spelling.f90
+15-2flang/lib/Frontend/CompilerInvocation.cpp
+15-0flang/include/flang/Support/Fortran-features.h
+153-3618 files not shown
+200-7924 files

LLVM/project fd3c8c2llvm/lib/Target/AArch64/MCTargetDesc AArch64InstPrinter.cpp, llvm/test/MC/AArch64 brbe.s

fixup! Address Carol's comments
DeltaFile
+40-55llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
+11-2llvm/test/MC/AArch64/brbe.s
+51-572 files

LLVM/project eecec86llvm/test/Transforms/SLPVectorizer/RISCV basic-strided-loads.ll

[SLP] Add tests for boundary case with MinProfitableStridedOps (#194507)

Currently we don't vectorize runtime strided loads when `VF == MinProfitableStridedOps`.
DeltaFile
+28-0llvm/test/Transforms/SLPVectorizer/RISCV/basic-strided-loads.ll
+28-01 files

LLVM/project 4c6ae8fmlir/lib/Dialect/Tosa/IR TosaOps.cpp, mlir/test/Dialect/Tosa verifier.mlir

[mlir][tosa] Verify the output shape of tosa.mul and tosa.rescale (#193952)

Verifying the provided output shape against an expected shape helps
diagnose issues on op construction.
DeltaFile
+56-47mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
+21-0mlir/test/Dialect/Tosa/verifier.mlir
+77-472 files

LLVM/project d769ce2llvm/utils/lit/lit InprocBuiltins.py ShellEnvironment.py, llvm/utils/lit/tests shtest-glob.py

[Lit] Change processRedirects to open all files in binary mode (#194368)

This PR is the second in a series of patches upgrading Lit's in-process
built-ins to be able to run with piped input/output and full redirection
support, and to allow custom in-process builtns to be provided via the
Lit config. The remaining patches to Lit's test runner can be found here@
https://github.com/BStott6/llvm-project/compare/lit-inproc-builtins.

This is part of the Lit daemonized testing project:
https://discourse.llvm.org/t/88612.

This PR makes Lit's `processRedirects` function open all input/output
files in binary mode. This makes sure that in-process builtins have the
expected behaviour when reading and writing from them:

Newline translation is not required for any of the current in-process
built-ins, in fact, the in-process built-in for `echo`, which is the
only one that writes to `stdout`, explicitly re-opens the output file
with `newline=""` on Windows, to avoid newline translation. Also,

    [7 lines not shown]
DeltaFile
+13-13llvm/utils/lit/lit/InprocBuiltins.py
+9-8llvm/utils/lit/lit/ShellEnvironment.py
+3-3llvm/utils/lit/lit/TestRunner.py
+1-1llvm/utils/lit/tests/shtest-glob.py
+26-254 files

LLVM/project b308757clang/test/Sema/aarch64-sve2p3-intrinsics acle_sve2p3_target_lane.c acle_sve2p3_target.c, llvm/lib/Target/AArch64 AArch64InstrInfo.td

fixup! Move tests
DeltaFile
+0-54clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+38-3clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target.c
+1-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+39-573 files

LLVM/project 4720639clang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_luti6.c

fixup! Adjust definitions after ACLE updates from @rockdreamer
DeltaFile
+12-12clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+4-4clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target.c
+1-1clang/include/clang/Basic/arm_sve.td
+17-173 files

LLVM/project 09b630cclang/include/clang/Basic arm_sve.td, clang/test/Sema/aarch64-sme2p3-intrinsics acle_sme2p3_target_lane.c acle_sme2p3_target.c

fixup! Address more PR comments
DeltaFile
+15-9clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+0-16clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_target_lane.c
+5-5llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+3-3clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_target.c
+1-4llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+4-0clang/include/clang/Basic/arm_sve.td
+28-371 files not shown
+28-387 files

LLVM/project cfcbcddclang/lib/Sema SemaARM.cpp, clang/test/Sema/aarch64-sve2p3-intrinsics acle_sve2p3_target_lane.c

fixup! More small PR fixes
DeltaFile
+0-44llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+6-9llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+5-8llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+8-1clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+1-4llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+1-2clang/lib/Sema/SemaARM.cpp
+21-682 files not shown
+23-698 files

LLVM/project 1122c9dclang/include/clang/Basic arm_sve.td arm_sme.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Adjust `def`s and split out tests
DeltaFile
+0-158clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+138-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6_lane_x2.c
+5-5clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+0-4clang/include/clang/Basic/arm_sve.td
+1-0clang/include/clang/Basic/arm_sme.td
+144-1675 files

LLVM/project f741673clang/include/clang/Basic arm_sme.td arm_sve.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Fix more PR comments
DeltaFile
+10-13llvm/include/llvm/IR/IntrinsicsAArch64.td
+4-4clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+2-2clang/include/clang/Basic/arm_sme.td
+1-1clang/include/clang/Basic/arm_sve.td
+17-204 files

LLVM/project 514e570clang/test/Sema/aarch64-sve2p3-intrinsics acle_sve2p3_target_lane.c acle_sve2p3_imm.cpp, llvm/test/CodeGen/AArch64 sve2p3-intrinsics-luti6.ll

fixup! Add some more _bf16 tests
DeltaFile
+27-0clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+11-0llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+3-0clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_imm.cpp
+41-03 files

LLVM/project cca8355clang/include/clang/Basic arm_sve.td, clang/lib/Sema SemaARM.cpp

fixup! Address more PR comments
DeltaFile
+3-20clang/lib/Sema/SemaARM.cpp
+0-9clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+4-1clang/include/clang/Basic/arm_sve.td
+1-1clang/test/Sema/aarch64-sme2p3-intrinsics/acle_sme2p3_target_lane.c
+8-314 files

LLVM/project 1640ff8llvm/include/llvm/IR IntrinsicsAArch64.td, llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Fix PR comments
DeltaFile
+24-70llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+19-55llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+17-36llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+15-33llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+0-1llvm/include/llvm/IR/IntrinsicsAArch64.td
+75-1955 files

LLVM/project f81b7abclang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_luti6.c

fixup! Fix final PR comments for now
DeltaFile
+118-8clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+5-0llvm/lib/Target/AArch64/SVEInstrFormats.td
+1-1clang/include/clang/Basic/arm_sve.td
+1-0llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+125-94 files

LLVM/project 67b0343clang/lib/Sema SemaARM.cpp, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Address more PR comments
DeltaFile
+21-3clang/lib/Sema/SemaARM.cpp
+12-4clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+4-11llvm/include/llvm/IR/IntrinsicsAArch64.td
+6-6clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+9-0clang/test/Sema/aarch64-sve2p3-intrinsics/acle_sve2p3_target_lane.c
+2-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+54-274 files not shown
+59-3310 files

LLVM/project 2f57e13llvm/lib/Target/AArch64 AArch64InstrInfo.td AArch64SVEInstrInfo.td

fixup! Address PR comments
DeltaFile
+1-10llvm/lib/Target/AArch64/AArch64InstrInfo.td
+2-2llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+3-122 files

LLVM/project c77aa45llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Add overloaded AArch64DAGToDAGISel::EmitMultiVectorLutiLane() for reuse
DeltaFile
+39-50llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+39-501 files

LLVM/project a6616b7llvm/lib/Target/AArch64 AArch64ISelDAGToDAG.cpp

fixup! Reuse SelectMultiVectorLuti()
DeltaFile
+6-36llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+6-361 files

LLVM/project 2f817e0clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c, clang/test/CodeGen/AArch64/sve2p3-intrinsics acle_sve2p3_luti6.c

[AArch64][clang][llvm] Add support for Armv9.7-A lookup table intrinsics

Add support for the following Armv9.7-A Lookup Table (lut)
instruction intrinsics:

SVE2.3
```c
  // Variant is  also available for: _u8 _mf8
  svint8_t svluti6[_s8](svint8x2_t table, svuint8_t indices);
```

SVE2.3 and SME2.3
``` c
  // Variants are also available for _u16_x2 and _f16_x2.
  svint16_t svluti6_lane[_s16_x2](svint16x2_t table, svuint8_t indices, uint64_t imm_idx);
```

SME2.3
```c

    [9 lines not shown]
DeltaFile
+175-0clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+112-0clang/test/CodeGen/AArch64/sve2p3-intrinsics/acle_sve2p3_luti6.c
+105-0llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+102-0llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+79-0llvm/test/Verifier/AArch64/luti6-intrinsics.ll
+55-0llvm/test/CodeGen/AArch64/sve2p3-intrinsics-luti6.ll
+628-016 files not shown
+873-622 files

LLVM/project 4249384clang/lib/Basic/Targets AArch64.cpp, clang/test/Preprocessor aarch64-target-features.c

fixup! Address PR comments
DeltaFile
+18-12llvm/lib/Target/AArch64/SVEInstrFormats.td
+0-29clang/lib/Basic/Targets/AArch64.cpp
+0-23clang/test/Preprocessor/aarch64-target-features.c
+13-9llvm/lib/Target/AArch64/SMEInstrFormats.td
+1-6llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+1-4llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
+33-831 files not shown
+33-857 files

LLVM/project 5d48370mlir/lib/Dialect/MemRef/Transforms EmulateNarrowType.cpp

[mlir][memref] Pass TypeConverter to ConvertMemrefStore (#194356)

Commit 20b925a28a29 dropped the TypeConverter from ConvertMemrefStore
when adding the disableAtomicRMW flag. Restore it.
DeltaFile
+5-3mlir/lib/Dialect/MemRef/Transforms/EmulateNarrowType.cpp
+5-31 files