clang/AMDGPU: Migrate cc1 tests to subarch triples (8) (#211870)
Rewrite SemaHIP cc1 test RUN lines to the new subarch triple form,
dropping the redundant -target-cpu.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
TableGen: Use a compact table for CPU aliases
Previously each ProcessorAlias was emitted as a full SubtargetSubTypeKV
entry in the processor subtype table, duplicating the canonical
processor's feature masks and scheduling model index. At 104 bytes per
entry: AArch64's 18 aliases added ~1.8KB, and X86 will add more as aliases
are introduced.
Emit aliases into a separate SubtargetSubTypeAliasKV table instead. Each
alias is just a name string offset plus the index of the canonical
processor it resolves to.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
X86: Use ProcessorAlias for duplicated processor names
Many X86 processors were defined multiple times under different names,
emitting an identical ProcessorModel for each spelling and duplicating
the feature masks, tune features, and scheduling model index in the subtype
table.
Define each processor once under its canonical name and express the
alternate spellings with ProcessorAlias, using the tablegen alias
mechanism. This deduplicates the redundant subtype table entries and saves
about 4.6k with the new alias table.
Co-Authored-By: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
AMDGPU: Use ProcessorAlias for legacy arch names
Older targets have aliasing names which were previously implemented
by defining a second copy of the processor, identical except for the name
Use the recently improved tablegen mechanism for defining name-only aliases.
This dedupliates some redundant table entries, like the sched model.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
TableGen: Add first class support for processor aliases
Previously isCPUStringValid was virtual so TableGen could emit an
AArch64 specific hack for recognizing cpu aliases. Teach tablegen
about aliases, and insert each alias into the CPU subtype table as its
own entry (sorted by name, carrying the canonical processor's features
and scheduling model).
There is further opportunity for code sharing improvements. AArch64's
aliases are consumed by ARMTargetDefEmitter to emit a custom inc file
in TargetParser which should be universalized.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
[Passes] Replace PassInfoMixin with {Optional,Required}PassInfoMixin
There were a couple passes that landed after the mass migration that
need to be updated to eventually make PassInfoMixin private. For backend
passes I looked at whether LegacyPM passes called skipFunction rather
than whether or not they should be enabled to try and preserve existing
behavior where possible.
We still need to wait a bit in order to avoid PassInfoMixin to a detail
namespace and fully remove isRequired from PassInfoMixin given there are
a lot of out-of-tree passes that have not yet been moved over. I'm
hoping to have patches out within a week.
Reviewers: arsenm, aeubanks
Pull Request: https://github.com/llvm/llvm-project/pull/211874
[clang][NFC]Remove unused variable (#211983)
The patch resolves the following warning.
```bash
clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountDiagnostics.cpp:504:16: warning: variable ‘i’ set but not used [-Wunused-but-set-variable=]
504 | unsigned i = 0;
| ^
```
A count variable was set and incremented inside of a for loop but never
actually used inside of the loop or anywhere else in its scope.
[CIR] Add support for atomic fmaximum/fminimum/fmaximumnum/fminimumnum (#211845)
This patch adds CIR support for the following atomic builtin functions:
- `__atomic_fetch_fmaximum`
- `__atomic_fetch_fminimum`
- `__atomic_fetch_fmaximumnum`
- `__atomic_fetch_fminimumnum`
The scoped versions of these atomic builtin functions are supported as
well.
Specifically, this patch contains the following changes:
- It updates the `cir.atomic.fetch` operation and adds new fetch
operators including `maximum`, `minimum`, `maximumnum`, and
`minimumnum`. These operators accept floating-point inputs only.
- It updates the LLVM lowering of the `cir.atomic.fetch` operation. The
LLVM lowering now will lower `maximum`, `minimum`, `maximumnum`, and
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[MLIR][Python] Support IsIsolatedFromAbove trait for python-defined operations (#211849)
This PR adds dynamic `IsIsolatedFromAbove` trait support and exposes it
to Python as `IsIsolatedFromAboveTrait`.
The test verifies that a region with the trait cannot capture an SSA
value from above, while a region without the trait can.
Assisted by Codex/GPT 5.6 Sol (for writing test cases).
[libclang/python] Remove CompletionString.AvailabilityKindCompat (#210682)
This completes the fourth step of
https://github.com/llvm/llvm-project/pull/156680
This change is a follow-up to
https://github.com/llvm/llvm-project/pull/160296, following the release
branching, to ensure a one release-cycle deprecation period.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
[mlir][xegpu] Make convert_layout input_layout optional (#210833)
Make the `input_layout` attribute of `xegpu.convert_layout` optional.
When it is not set, the effective input layout defaults to
`target_layout`, i.e. the source is assumed to already be in the target
distribution.
assisted-by-Claude
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
[mlir] [vector] Allow element/broadcast re-order for FMA if the source is a vector (#211208)
The diagnostic says the transform is not performed as the source may be
a scalar. But we can make it if we can check the source is not a scalar.
AI assisted.
[lldb] Fix heap-use-after-free in FileSpec usage (#211908)
After #211394, `FileSpec` stores m_filename as a `SmallString` instead
of `ConstString`. When the `FileSpec` goes out of scope / is destructed,
a `StringRef` pointing to m_filename is now invalid. Previously it would
have worked even after `FileSpec` goes out of scope since `ConstString`
stores the string in a global buffer which is never destructed.
This causes heap-use-after-free in `CommandInterpreter` when we use the
result of `GetFilename()` on a temporary `FileSpec`. Store the result of
`HostInfo::GetProgramFileSpec()` as a variable to prevent it from going
out of scope before we're able to call `GetHomeInitFile()`.
Although #211394 introduces this failure, technically speaking this is
an existing bug, it was just masked because of how `FileSpec` used to
use `ConstString` to force a long lifetime.
[LoopInfo] Store blocks using Euler tour representation (#211485)
Block list construction appends each block to all enclosing loops
(O(depth) per block), and each loop owns a separately allocated vector.
Switch to an Euler tour representation: one BlockLayout array per
LoopInfo holding the in-loop blocks in a loop-contiguous reverse
postorder, each loop's list a [begin, end) slice of it, subloop slices
nested inside their parent's. Headers remain first;
`SubLoops`/`TopLevelLoops` orders are unchanged. A few tests observe the
order and are updated. (Previously a loop's list was the function's
reverse postorder restricted to its members, so a subloop's blocks were
interleaved with the parent's own blocks at their RPO positions.)
Mutations first copy a borrowed slice into private storage from
LoopInfo's allocator. `contains(BlockT *)` remains map-based: a
materialized loop's slice is not a membership test. This copy is rare:
across default<O2> over dagcombiner and sqlite3, only 12--14% of loops
built by analyze() are ever mutated; the rest keep the borrowed slice.
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[flang][cuda] Accept statement function in device code (#211957)
Statement functions are inlined during lowering, so they should not be
treated as host procedure calls. Recursively validate their expressions
to reject any host procedure calls within the body.
[libc] Add symbolic constants for si_code values. (#211945)
Extend SIGCHLD-specific `si_code` values, already available in
`signal-macros.h` with Linux values for the rest of the signal-specific
codes specified in the POSIX.1-2024.
