[AMDGPU] Fix noalias metadata for calls that capture a pointer earlier (#219887)
A call could get `!noalias` against a kernel noalias argument even when
that argument was captured into a global earlier and the call can reach
it that way
Only calls that touch just their own argument pointees are actually safe
to mark this way
[mlir][xegpu] Fix lane-local classification for packed-lane-data reductions (#223077)
isReductionLaneLocal decided whether a subgroup vector.multi_reduction
reduces within a lane by comparing the result vector type against its
distributed type. This assumes the lane_layout along the non-reduction
dim is always larger than 1, which is not always true.
This PR fixes it by checking the source's lane_layout along the
reduction dimension is 1.
assisted-by-claude
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
[flang] Fix RecordType sizes, TRANSFER lowering, and BIND(C) ABI on SystemZ/PPC64le (#220377)
### Summary
`fir::getTypeSizeAndAlignment` had two bugs in its `RecordType` branch:
1. **Packed records**: `isPacked()` was ignored. LLVM packed structs
advance by `getTypeAllocSize` per field (not `getTypeStoreSize`), so
each component occupies `alignTo(storeSize, ABIalign)` bytes with no
inter-field or tail padding, and the struct ABI alignment is 1. For
example, a packed `{i32, f64}` on x86-64 is 12 bytes, not 16.
2. **Tail padding**: the unpacked field loop returned the raw summed
size without the final `alignTo(size, align)`. For example, `{i32, i8}`
(sum = 5 bytes, align = 4) was returned as 5 bytes instead of the
correct allocation size 8 bytes.
### Changes
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[clang-tidy] Fix readability-redundant-parentheses false positive on typeof (#223512)
Preserve the required parentheses around the operand of `typeof`,
`typeof_unqual`, and GNU `__typeof__` by skipping `ParenExpr` nodes
whose immediate parent is a `TypeOfExprTypeLoc`. Redundant inner
parentheses such as those in `typeof((x))` are still diagnosed.
Fixes #220899.
[Github] Remove additional cmake install from test-suite (#224486)
Now that we are on ubuntu 26.04 we can resolve this todo as the system
CMake is new enough and already installed.
[Github] Fix container references from #224471 (#224490)
I screwed up some of the references (copying and pasting added an extra
sh256:) and they didn't show up because the workflow definitions for all
of these jobs only comes from main.
[MLIR][XeGPU] Fix insert_strided_slice distribution divisor for partial-lane dims (#223060)
SgToLaneVectorInsertStridedSlice divided the distributed dimension's
size and offset by the full subgroup size. That divisor holds only when
the dimension spans every lane. When it spans a subset (lane_layout[dim]
< subgroupSize) — say size 2 across 2 lanes — 2 % 16 != 0 made the
pattern reject the op and failing legalization.
This PR divides the dimension size by lane_layout[destDistDim], the
number of lanes actually covering that dimension.
assisted-by-claude
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
[SlotIndexes] Add queries for stale indexes
An erased instruction leaves its index list entry in place, making the
index indistinguishable from a block boundary entry. Add
isBlockBoundaryIndex() and isStaleIndex() to tell the two apart, and
canonicalizeIndex() to resolve a stale index to the closest preceding
instruction's register slot, or the block start if none survives.
NFC. No caller yet. LiveDebugVariables is next.
[LiveDebugVariables] Repair stale SlotIndexes
The analysis keeps its indexes from before the first register allocator
until DBG_VALUEs are emitted, by which point passes in between have
erased some of the instructions they point at. Resolve them at the
start of each allocator run and before emitting.
SlotIndexes can then reclaim the entries of erased instructions without
sparing the ones held here, which would have made generated code depend
on -g. Emitted locations are unchanged, except that intervals resolving
to one position now emit a single DBG_VALUE rather than identical
consecutive ones.
[Github] Bump build workflows to Ubuntu 26.04 (#224455)
To pull in the new version of CMake and also now that the 24.04 images
won't recieve any new updates.
[lldb] Don't dereference a possibly null DataExtractor in FindPlugin (#224347)
Restore the behavior from before e4c83b7b119c, which changed the
parameter from a DataBufferSP the branch guaranteed to be null-or-empty
into a DataExtractorSP it unconditionally dereferences.
No in-tree caller reaches this branch with a null extractor, so there is
no test.
rdar://168105064
[LiveDebugVariables] Repair stale SlotIndexes
The analysis keeps its indexes from before the first register allocator
until DBG_VALUEs are emitted, by which point passes in between have
erased some of the instructions they point at. Resolve them at the
start of each allocator run and before emitting.
SlotIndexes can then reclaim the entries of erased instructions without
sparing the ones held here, which would have made generated code depend
on -g. Emitted locations are unchanged, except that intervals resolving
to one position now emit a single DBG_VALUE rather than identical
consecutive ones.
[SlotIndexes] Add queries for stale indexes
An erased instruction leaves its index list entry in place, making the
index indistinguishable from a block boundary entry. Add
isBlockBoundaryIndex() and isStaleIndex() to tell the two apart, and
canonicalizeIndex() to resolve a stale index to the closest preceding
instruction's register slot, or the block start if none survives.
NFC. No caller yet. LiveDebugVariables is next.
Revert "[CodeGen][AArch64] Avoid duplicate hints in register allocation (#219007)" (#224451)
This reverts commit 6396f14184cb506420503e0a46fcf681fd91a90a.
Newly added CodeGen/MLRegAlloc/aarch64-evict-advisor-duplicate-hints.ll
is failing downstream CI's where the model name is not `release`.
Link: #219007
[ORC] Share one Mangler across a lookupAndApply group (#224285)
LookupPrepareFn now receives a Mangler that lookupAndApply builds once
from the search order's target triple, rather than each recordAddr /
recordProxy constructing its own per entry.
[OpenACC] Honor precomputed active par dims on a predicate region (#224390)
Example:
```mlir
acc.predicate_region {
memref.store %updated, %shared[] : memref<f64>
} {acc.active_par_dims = #acc<active_par_dims[]>}
```
Code outside a gang-level loop runs on every thread block, so the block
dims are treated as active and never predicated away. That is right for a
redundant computation, but not for an in-place update of memory the whole
launch shares: every block applies it. The attribute above was ignored
here, because only a privatization could state which dims run it
unpredicated.
Fix: honor a precomputed active set on a predicate region too. An empty
set leaves one block and one thread performing the update; listing the
thread dims of the enclosing loops keeps a work-shared update distributing
its iterations. Behavior is unchanged for a region without the attribute.
[LiveDebugVariables] Repair stale SlotIndexes
The analysis keeps its indexes from before the first register allocator
until DBG_VALUEs are emitted, by which point passes in between have
erased some of the instructions they point at. Resolve them at the
start of each allocator run and before emitting.
SlotIndexes can then reclaim the entries of erased instructions without
sparing the ones held here, which would have made generated code depend
on -g. Emitted locations are unchanged, except that intervals resolving
to one position now emit a single DBG_VALUE rather than identical
consecutive ones.
[SlotIndexes] Add queries for stale indexes
An erased instruction leaves its index list entry in place, making the
index indistinguishable from a block boundary entry. Add
isBlockBoundaryIndex() and isStaleIndex() to tell the two apart, and
canonicalizeIndex() to resolve a stale index to the closest preceding
instruction's register slot, or the block start if none survives.
NFC. No caller yet. LiveDebugVariables is next.
[OpenACC] Add a map flag for the attach/detach clause (#224433)
Example:
```fortran
!$acc enter data create(arr)
p => arr(:,1)
!$acc enter data attach(p)
```
In this code, computeDataClauseMapFlags returns no flag for
acc_attach/detach, so the resulting acc.map_info is indistinguishable
from one formed for a create/delete of the target, and the clause itself
is gone by that point.
Fix: give the attach/detach clause its own map flag.
[LiveDebugVariables] Repair stale SlotIndexes
The analysis keeps its indexes from before the first register allocator
until DBG_VALUEs are emitted, by which point passes in between have
erased some of the instructions they point at. Resolve them at the
start of each allocator run and before emitting.
SlotIndexes can then reclaim the entries of erased instructions without
sparing the ones held here, which would have made generated code depend
on -g. Emitted locations are unchanged, except that intervals resolving
to one position now emit a single DBG_VALUE rather than identical
consecutive ones.
[SlotIndexes] Add queries for stale indexes
An erased instruction leaves its index list entry in place, making the
index indistinguishable from a block boundary entry. Add
isBlockBoundaryIndex() and isStaleIndex() to tell the two apart, and
canonicalizeIndex() to resolve a stale index to the closest preceding
instruction's register slot, or the block start if none survives.
NFC. No caller yet. LiveDebugVariables is next.
[libc] Embeddeding API for seek and close (#221880)
This change introduces two new symbols to the embedding API hooks:
__llvm_libc_stdio_seek and __llvm_libc_stdio_close. These are used to
implement fclose, fseek, fseeko, ftell and ftello for baremetal.
The implementation was extracted from #221211.
Authored-by: voltur01
[LLVMABI][AARCH64] Support homogeneous aggregate arguments (#224138)
This adds support for handling homogeneous aggregate arguments in the
AArch64 implementation of the LLVM ABI library.
This required adding a new field to the llvm::abi::Type class to track
the unadjusted alignment of the field. This meant I needed to make
updates to the CIR calling convention lowering pass, but AArch64 isn't
supported in the CIR pass yet, so that part of the change is strictly
NFC at this point.
I'm removing the aarch64-pc-windows-msvc run lines from the
abi-classify-arg-types.cpp test because the new test cases added would
land in NYI diagnostic in isPermittedToBeHomogeneousAggregate(), and
they weren't adding any unique coverage.
Assisted-by: Cursor / various models
