[RISCV] Add assembler support to lower `la/lla` to `qc.e.li` (#205782)
This patch updates the `RISCVAsmParser::emitLoadLocalAddress` function
to enable lowering of the `la/lla` pseudos to `qc.e.li` from the
Qualcomm uC Xqcili extension.
[CIR] Add invariant attribute to cir.load (#204283)
Model LLVM's `!invariant.load` metadata on `cir.load` via an optional
`invariant` UnitAttr, lower it to the `llvm.load isInvariant` flag.
Update existing `LoadOp::create` call sites with new parameter.
[libc++] Cast 0 to `__locale_t` in `text_encoding.cpp` (#205882)
- As mentioned
https://github.com/llvm/llvm-project/pull/141312#issuecomment-4799649766,
platforms which define `locale_t` as not a pointer fail would fail to
compile. This should fix the picolibc case.
- As an aside, also disable the `encoding.pass.cpp` test for llvm-libc
as that also uses `__get_locale_encoding()`
[X86] Add target verifier with subtarget-dependent checks
Add an X86 TargetVerify, registered by triple, so the target-independent
TargetVerifierPass dispatches to it for X86 modules.
These checks depend on the features in a function's target-cpu /
target-features attributes, which the generic triple-only IR verifier
cannot see. The MCSubtargetInfo is built from those attributes, so no
TargetMachine is needed and the pass runs from generic pipelines:
- x86 instruction-set intrinsics (llvm.x86.avx/avx2/avx512.*) require
the matching AVX/AVX2/AVX-512 feature.
- 128/256-bit AVX-512 intrinsics additionally require AVX512VL.
- The x86_amx type requires AMX-TILE.
[DAGCombiner] Fold multiplication through vp_merge into `partial_reduce_*mla` (#205890)
DAGCombiner is already doing this right now:
```
partial_reduce_*mla(acc, sel(p, mul(*ext(a), *ext(b)), splat(0)), splat(1))
-> partial_reduce_*mla(acc, sel(p, a, splat(0)), b)
```
We should be able to have drop-in support for vp_merge (not for
vp_select though) as the select in the pattern above. This patch adds
such support.
The test is checking whether RISC-V's Zvdot4a8i instruction is
generated, as it depends on this pattern to fold away not just the
multiplication but also the sign / zero extensions.
[Hexagon] Add ShadowCallStack support (#200508)
Implement the software ShadowCallStack for Hexagon.
On Hexagon, r19 is used as the shadow stack pointer (reserved via
-ffixed-r19). On function entry the LR (r31) is saved to the shadow
stack and the pointer is advanced; on exit the LR is restored from the
shadow stack before returning.
Prologue sequence:
r19 = add(r19, #4)
memw(r19+#-4) = r31
Epilogue sequence (between deallocframe/jumpr r31):
r31 = memw(r19+#-4)
r19 = add(r19, #-4)
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[AMDGPU] Fix overlapping insert crash during rewrite-agpr-copy-mfma
Fixes https://github.com/llvm/llvm-project/issues/204224
Guard against a possibly wrong interference result for a discontiguous
stack slot interval by using the entire range.
A spilled stack slot can have a discontiguous live interval, e.g. a single
value live across several disjoint segments:
[a, b) [c, d) ........gap........ [e, f)
with gaps where the slot is dead. The interference check previously only
considered the covered segments, so it could pick a PhysReg that is free
within them but busy inside a gap. Unspilling replaces the slot with a vreg
whose recomputed interval is continuous over [a, f) (it fills the gaps),
so assigning that PhysReg could overlap the value live in the gap and trip
the "Overlapping insert" assertion in LiveRegMatrix::assign. Checking
interference over the whole [a, f) hull avoids this.
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[llubi] Add support for byval pointer arguments (#201852)
This patch adds support for the byval attribute. The hidden copy is
implemented as memcpy with the allocation size of the specified type.
See https://github.com/llvm/llvm-project/pull/205576 for more
information.
Revert "[Instrumentor] Add runtime examples: [1/N] A flop counter" (#205960)
This reverts commit 61cbfabb7ade682a64f516c871b2bacb1e3e324a.
Fails compiler-rt standalone builds, though, locally it works fine :(
[X86][APX] Implement push+push2+push pre-alignment strategy for PP2 (#205031)
Replace the dummy "push %rax" stack-alignment padding for APX push2/pop2
(PP2) with a push+push2+push strategy: when an even number of callee-saved
GPRs is involved, a single CSR push provides the 16-byte alignment instead
of a throwaway push %rax, and the remaining registers use push2/pop2. The
padForPush2Pop2 flag and its associated dummy push, SUB/LEA padding, and
SEH_StackAlloc emission in spill/restoreCalleeSavedRegisters are removed.
BuildStackAdjustment now uses NF (no-flags) variants of ADD/SUB, but
only as a smaller replacement for LEA, i.e. only when EFLAGS must be preserved
across the adjustment. When EFLAGS is dead the plain SUB/ADD is kept, which is
shorter than the EVEX-encoded NF form. The NF opcodes are 64-bit
(SUB64ri32_NF/ADD64ri32_NF), so they are not used for the x32 ABI, and
they are recognized in mergeSPUpdates and the epilogue backward scan.
Update LIT tests accordingly.
Assisted-by: Claude Opus 4.8 (1M context) <noreply at anthropic.com>
[VectorCombine] Fold zero tests of or/umax reductions (#205622)
Recognize equality and inequality tests against zero on vector.reduce.or
and vector.reduce.umax. When profitable, replace the scalar reduction
and
compare with a lane-wise comparison followed by an i1 reduce.or or
reduce.and.
Run the existing zero-preserving reduction fold first to retain its more
specific canonicalization opportunities.
Proof: https://alive2.llvm.org/ce/z/pyoTwP
Fixed https://github.com/llvm/llvm-project/issues/205028
[Instrumentor] Add runtime examples: [1/N] A flop counter (#205698)
This adds a instrumentor-tools folder into compiler RT to showcase use
cases of the instrumentor. The initial example is a program that, via
instrumentation, counts the number of flops performed. Call and
intrinsic support will follow after #198042.
This is the second try with more CMake magic after
https://github.com/llvm/llvm-project/pull/205221 failed on some
platforms.
Partially developped by Claude (AI), tested and verified by me.
[flang][openacc] add acc.routine op for external names added in bind clauses. (#205591)
This adds acc.routine ops for the func.func ops that declare external
functions bound for device specific. This is needed to get the
ACCRoutineToGPUFunc pass to move the function declaration into the
correct region.
This is a follow-up from
[#203088](https://github.com/llvm/llvm-project/pull/203088) which
unblocked the original pass that was stalling bind clauses, but failed
further down the pipeline.
[CIR] Implement Direct+canFlatten in CallConvLowering
ArgKind::Direct with a multi-field coerced struct and the canFlatten flag
means the coerced struct is passed as one scalar wire argument per field.
CallConvLowering was passing it as a single aggregate, ignoring canFlatten.
A new getFlattenedCoercedType helper recognizes the Direct+canFlatten arg
shape. At the callee, insertArgCoercion replaces the single block argument
with N scalar block args, stores each into an alloca of the coerced struct
type, reloads it, and coerces back to the original argument type when the
coerced struct type differs from the original. The Ignore-drop loop and
updateArgAttrs account for the N block-argument slots a flattened arg
occupies; updateArgAttrs also shapes them on the sret return path.
At the call site, when the operand type differs from the coerced struct
type the operand is coerced through a memory slot and each field is read
from that slot with cir.get_member + cir.load (via a new emitCoercionToMemory
helper that returns the coerce-slot pointer without loading the whole
aggregate); when the types already match each field is extracted directly
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Revert "[libc++] P3798R1: The unexpected in std::expected (#204826)" (#205597)
Reverts 45a65bb48b5925707f43d08e30df2263a5e4e268.
Currently, there is no consensus among LWG and standard library
maintainers that P3798R1 should be applied as a Defect Report. So it is
better to revert the paper application for now and then reapply it as an
addition in C++29 when C++29 mode is ready.
[llvm][GVNSink] Avoid non-determistic iteration order over NeededPHIs
The iteration order of DenseSet is not guaranteed, which affects the
output of code generated with GVNSink enabled. This can cause code to be
emitted in differing order, affect section ordering and in some cases
was reported to sometimes result in larger binaries due to increased
padding between sections.
This patch addresses this by using SetVector, which has a deterministic
iteration order.
[CIR] Implement Direct+canFlatten in CallConvLowering
ArgKind::Direct with a multi-field coerced struct and the canFlatten flag
means the coerced struct is passed as one scalar wire argument per field.
CallConvLowering was passing it as a single aggregate, ignoring canFlatten.
A new getFlattenedCoercedType helper recognizes the Direct+canFlatten arg
shape. At the callee, insertArgCoercion replaces the single block argument
with N scalar block args, stores each into an alloca of the coerced struct
type, reloads it, and coerces back to the original argument type when the
coerced struct type differs from the original. The Ignore-drop loop and
updateArgAttrs account for the N block-argument slots a flattened arg
occupies; updateArgAttrs also shapes them on the sret return path.
At the call site, when the operand type differs from the coerced struct
type the operand is coerced through a memory slot and each field is read
from that slot with cir.get_member + cir.load (via a new emitCoercionToMemory
helper that returns the coerce-slot pointer without loading the whole
aggregate); when the types already match each field is extracted directly
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[flang][semantics][OpenACC] Warn for DEFAULT(NONE) scalars by default (#205683)
Change OpenACC `DEFAULT(NONE)` scalar handling to use the
pre-OpenACC-3.2 scalar behavior by default while emitting a warning.
Scalars referenced in a `default(none)` compute region without an
explicit data clause now warn by default instead of erroring. Arrays and
other non-scalars still error under `default(none)`.
Users can opt into OpenACC 3.2 strict scalar behavior with:
`-fopenacc-default-none-scalars-strict` and the default scalar warning
can be suppressed with: `-Wno-openacc-default-none-scalars-strict`
[CIR] Wire const goto labels into indirect branch (#201644)
A computed goto through a constant dispatch table -- the GNU static
dispatch-table idiom `static const void *tbl[] = {&&L1, &&L2}; goto *tbl[i];`
-- reached `errorNYI("Indirect goto without a goto block")` in
`emitIndirectGotoStmt`. #203644 emits the label-address constant (the
value-like `#cir.block_addr_info`) into the table, but it takes a label's
address in a constant context without registering the label as address-taken,
so no indirect-goto block exists for the following `goto *tbl[i]` to branch to.
(#203644 landed the constant attribute, its lowering, and the GotoSolver label
retention; this is the remaining dispatch wiring.)
`VisitAddrLabelExpr` in the constant emitter now records each label via
`takeAddressOfConstantLabel`, which instantiates the indirect-goto block and
tracks the label; `finishIndirectBranch` then adds those labels as
`cir.indirect_br` successors alongside the existing op-form labels. A label
named more than once in a table is kept as a distinct successor each time, to
match classic codegen.
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Revert "[Clang] Optionally use NewPM to run CodeGen Pipeline" (#205943)
Reverts llvm/llvm-project#205928
Is missing dependencies in a shared libraries build. Will investigate
offline.
