LLVM/project 62fd4ffllvm/unittests/Target/AMDGPU CMakeLists.txt

[AMDGPU] Add missing CMake link component (#196579)

The issue was triggered by #196547.
DeltaFile
+1-0llvm/unittests/Target/AMDGPU/CMakeLists.txt
+1-01 files

LLVM/project a7591efllvm/test/Transforms/SLPVectorizer struct-return-revec.ll

[SLP][NFC]Add a test with the revectorization of the struct-returning intrinsics



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/196581
DeltaFile
+65-0llvm/test/Transforms/SLPVectorizer/struct-return-revec.ll
+65-01 files

LLVM/project ebf4b14llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine fold-multi-use-select-packed-constants.ll pr80597.ll

[InstCombine] Fold binop into multi-use select when one select arm and the other operand are constant
DeltaFile
+15-15llvm/test/Transforms/InstCombine/fold-multi-use-select-packed-constants.ll
+10-2llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+2-7llvm/test/Transforms/InstCombine/pr80597.ll
+2-7llvm/test/Transforms/InstCombine/pr72433.ll
+3-3llvm/test/Transforms/InstCombine/shift.ll
+1-4llvm/test/Transforms/InstCombine/extractelement.ll
+33-382 files not shown
+35-408 files

LLVM/project 2b97000llvm/lib/Target/AArch64/GISel AArch64LegalizerInfo.cpp AArch64RegisterBankInfo.cpp, llvm/test/CodeGen/AArch64 bf16-instructions.ll bf16-v8-instructions.ll

[AArch64][GlobalISel] Legalize F64 to BF16 fptruncates (#196077)

This two-step expansion of bf16 fptrunc steps needs to be careful to
avoid double-rounding error. Under AArch64 we can apparently convert to
a fcvtxn that performs round-to-odd, followed by a standard fp truncate
to bf16 to make sure the rounding from there is done correctly. This
reuses the existing lowering added for vector operations.
DeltaFile
+78-37llvm/test/CodeGen/AArch64/bf16-instructions.ll
+54-26llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+33-17llvm/test/CodeGen/AArch64/bf16-v4-instructions.ll
+16-3llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+6-5llvm/test/CodeGen/AArch64/arm64-vcvt_f.ll
+2-0llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+189-886 files

LLVM/project 6c5f5c1clang/lib/Serialization ASTReader.cpp

[Clang][Modules] Fix -Wunused-variable (#196577)

Mark some variables [[maybe_unused]] and inline others that do not have
side effects to avoid -Wunused-variable in non-assert builds.
DeltaFile
+4-4clang/lib/Serialization/ASTReader.cpp
+4-41 files

LLVM/project 6c083a6llvm/lib/Target/AMDGPU VOP3PInstructions.td, llvm/test/MC/AMDGPU gfx13_asm_vop3p.s gfx13_asm_vop3p_features.s

[AMDGPU] Add VOP3P encoding to gfx13 (#196252)

Co-authored-by: Ivan Kosarev <ivan.kosarev at amd.com>
DeltaFile
+1,608-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p.s
+125-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p_features.s
+60-42llvm/lib/Target/AMDGPU/VOP3PInstructions.td
+34-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p_dpp8.s
+18-0llvm/test/MC/AMDGPU/gfx13_asm_vop3p_dpp16.s
+1-0llvm/test/MC/AMDGPU/gfx12_asm_vop3p_aliases.s
+1,846-426 files

LLVM/project 64f9bb5llvm/lib/Object WasmObjectFile.cpp, llvm/test/tools/llvm-readobj/wasm invalid-data-segment-name-index.test

[Object][Wasm] Fix off-by-one in data segment name index validation (#196338)

The check `Index > DataSegments.size()` in `parseNameSection()` allows
`Index == DataSegments.size()`, which is an out-of-bounds access.

In an assertions-disabled ASan build, a malformed wasm object with one
data segment and a data segment name entry using index 1 triggers a
heap-buffer-overflow READ in `WasmObjectFile::parseNameSection()`.

Fix by checking `Index >= DataSegments.size()` instead.

Also add a regression test that verifies the malformed input is rejected
with "invalid data segment name entry".
DeltaFile
+25-0llvm/test/tools/llvm-readobj/wasm/invalid-data-segment-name-index.test
+2-2llvm/lib/Object/WasmObjectFile.cpp
+27-22 files

LLVM/project 003846blibc/test/src/string/memory_utils op_tests.cpp

[libc] Fix op_tests Memcmp guard to require SSE4.1 (#196572)

The is_vector<__m128i> specialisation in op_x86.h is gated on
__SSE4_1__, but op_tests.cpp included generic::Memcmp<__m128i> under the
weaker __SSE2__ guard. On baseline x86-64 (where __SSE2__ is always
defined but __SSE4_1__ may not be), this caused a static_assert failure
in is_element_type_v.

Changed the guard from __SSE2__ to __SSE4_1__ to match the
specialisation requirement, consistent with how BcmpImplementations
already guards its __m128i entry.

Assisted-by: Automated tooling, human reviewed.
DeltaFile
+1-1libc/test/src/string/memory_utils/op_tests.cpp
+1-11 files

LLVM/project 8d0e5e8llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine fold-multi-use-select-packed-constants.ll pr80597.ll

[InstCombine] Fold binop into multi-use select when one select arm and the other operand are constant
DeltaFile
+15-15llvm/test/Transforms/InstCombine/fold-multi-use-select-packed-constants.ll
+10-2llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+2-7llvm/test/Transforms/InstCombine/pr80597.ll
+2-7llvm/test/Transforms/InstCombine/pr72433.ll
+3-3llvm/test/Transforms/InstCombine/shift.ll
+1-4llvm/test/Transforms/InstCombine/extractelement.ll
+33-382 files not shown
+35-408 files

LLVM/project 4771770llvm/lib/CodeGen/SelectionDAG SelectionDAG.cpp DAGCombiner.cpp, llvm/test/CodeGen/X86 freeze-unary.ll

[DAG] canCreateUndefOrPoison - ISD::FCEIL/FFLOOR/FTRUNC/FRINT/FNEARBYINT/FROUND/FROUNDEVEN can never create poison/undef (#196543)

Also add missing fold support for ftrunc(fround(x)) -> fround(x)
DeltaFile
+14-49llvm/test/CodeGen/X86/freeze-unary.ll
+7-0llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+1-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+22-493 files

LLVM/project a80491blldb/unittests/Expression DWARFExpressionTest.cpp, llvm/test/CodeGen/AMDGPU amdgpu-simplify-libcall-pow.ll pseudo-scalar-transcendental.ll

Merge upstream/main into users/mariusz-sikora-at-amd/add-feature-min-max-mad
DeltaFile
+4,634-367llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll
+0-775llvm/utils/Reviewing/find_interesting_reviews.py
+666-0llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-costs.ll
+329-329llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow.ll
+507-0lldb/unittests/Expression/DWARFExpressionTest.cpp
+440-61llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
+6,576-1,5321,418 files not shown
+30,851-14,5551,424 files

LLVM/project 935b7eaclang/include/clang/Driver Action.h, clang/lib/Driver/ToolChains Clang.cpp

clang: Consolidate -aux-triple handling

All of the offload languages were essentially doing the
same thing, with overcomplicated conditions conditional on
the language.
DeltaFile
+41-51clang/lib/Driver/ToolChains/Clang.cpp
+3-0clang/include/clang/Driver/Action.h
+1-1clang/test/Driver/sycl-offload-jit-xarch.cpp
+45-523 files

LLVM/project 65ba09fllvm/lib/Target/AArch64 AArch64InstrInfo.cpp, llvm/unittests/Target/AArch64 InstSizes.cpp

[AArch64] Report accurate sizes for MOVaddr and MOVimm pseudos
DeltaFile
+89-0llvm/unittests/Target/AArch64/InstSizes.cpp
+25-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+114-02 files

LLVM/project d4712bellvm/unittests/Target/AMDGPU GCNRegPressureTest.cpp CMakeLists.txt

[AMDGPU] Pre-commit unit test for RP tracking reset/advance behavior

This adds a new AMDGPU unit test file for testing the behavior of
`GCNRPTracker` and its related classes. The two test showcase confusing
return value and behavioral semantics for variants of the advance and
reset functions, which will be clarified in a follow up commit.

This also moves some common test helpers from other AMDGPU unit tests to
the `AMDGPUUnitTests` TU to avoid repetition between unit tests.
DeltaFile
+156-0llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
+1-0llvm/unittests/Target/AMDGPU/CMakeLists.txt
+157-02 files

LLVM/project 1430e83llvm/lib/Target/AArch64 AArch64ExpandPseudoInsts.cpp AArch64ExpandImm.cpp

[NFC][AArch64] Extract MOVaddr* expansion model into common header

This makes the expansion logic reusable by getInstSizeInBytes in a
follow-up patch.
DeltaFile
+72-53llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
+46-26llvm/lib/Target/AArch64/AArch64ExpandImm.cpp
+8-1llvm/lib/Target/AArch64/AArch64ExpandImm.h
+1-0llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+127-804 files

LLVM/project 803074fclang/docs LanguageExtensions.rst, clang/include/clang/Options Options.td

Enable driver changes for fexec-charset
DeltaFile
+14-6clang/lib/Driver/ToolChains/Clang.cpp
+14-4clang/include/clang/Options/Options.td
+11-3clang/test/Driver/clang_f_opts.c
+10-0llvm/lib/Support/TextEncoding.cpp
+4-3clang/test/Driver/cl-options.c
+3-3clang/docs/LanguageExtensions.rst
+56-193 files not shown
+60-199 files

LLVM/project d1b40cdclang/include/clang/Basic TargetInfo.h, clang/lib/AST ASTContext.cpp

convert to exec-charset inside getPredefinedStringLiteralFromCache, test __builtin_FILE()
DeltaFile
+28-0clang/test/CodeGen/systemz-charset.cpp
+10-0clang/lib/AST/ASTContext.cpp
+5-4clang/lib/Lex/TextEncodingConfig.cpp
+3-0clang/lib/Basic/TargetInfo.cpp
+2-0clang/include/clang/Basic/TargetInfo.h
+48-45 files

LLVM/project 4db2f4fclang/lib/AST PrintfFormatString.cpp FormatString.cpp, clang/lib/Sema SemaChecking.cpp

Add format string handling
DeltaFile
+58-31clang/lib/AST/PrintfFormatString.cpp
+46-40clang/lib/AST/FormatString.cpp
+33-21clang/lib/Sema/SemaChecking.cpp
+25-11clang/lib/AST/FormatStringParsing.h
+15-8clang/lib/AST/ScanfFormatString.cpp
+19-0llvm/lib/Support/TextEncoding.cpp
+196-11112 files not shown
+258-12118 files

LLVM/project 7c7f5bellvm/unittests/CodeGen CodeGenTestBase.h RematerializerTest.cpp, llvm/unittests/Target/AMDGPU LiveRegUnits.cpp AMDGPUUnitTests.cpp

[CodeGen][AMDGPU] Move boilerplate unit test code to base class (NFC) (#196547)

This adds the `CodeGenTestBase` class to handle boilerplate code for
codegen unit tests and makes use of it wherever possible, in particular
in AMDGPU unit tests.

Furthermore, this makes all AMDGPU unit tests rely on GoogleTest's API
for "run once per test-suite" code, instead of re-implementing that
behavior using a `std::once` flag. As a consequence all TEST(...) become
TEST_F(...).
DeltaFile
+91-0llvm/unittests/CodeGen/CodeGenTestBase.h
+7-71llvm/unittests/CodeGen/RematerializerTest.cpp
+5-72llvm/unittests/CodeGen/MachineDomTreeUpdaterTest.cpp
+9-43llvm/unittests/Target/AMDGPU/LiveRegUnits.cpp
+19-21llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.cpp
+18-5llvm/unittests/Target/AMDGPU/AMDGPUUnitTests.h
+149-2126 files not shown
+159-25212 files

LLVM/project 3e059e2clang/include/clang/Sema Sema.h

Remove old include
DeltaFile
+0-1clang/include/clang/Sema/Sema.h
+0-11 files

LLVM/project f29a959clang/docs LanguageExtensions.rst, clang/include/clang/Options Options.td

Enable driver changes for fexec-charset
DeltaFile
+14-6clang/lib/Driver/ToolChains/Clang.cpp
+14-4clang/include/clang/Options/Options.td
+11-3clang/test/Driver/clang_f_opts.c
+10-0llvm/lib/Support/TextEncoding.cpp
+4-3clang/test/Driver/cl-options.c
+3-3clang/docs/LanguageExtensions.rst
+56-193 files not shown
+60-199 files

LLVM/project 5d6451cclang/include/clang/Basic TargetInfo.h, clang/lib/AST ASTContext.cpp

convert to exec-charset inside getPredefinedStringLiteralFromCache, test __builtin_FILE()
DeltaFile
+28-0clang/test/CodeGen/systemz-charset.cpp
+10-0clang/lib/AST/ASTContext.cpp
+5-4clang/lib/Lex/TextEncodingConfig.cpp
+3-0clang/lib/Basic/TargetInfo.cpp
+2-0clang/include/clang/Basic/TargetInfo.h
+48-45 files

LLVM/project 5f9b389clang/lib/AST PrintfFormatString.cpp FormatString.cpp, clang/lib/Sema SemaChecking.cpp

Add format string handling
DeltaFile
+58-31clang/lib/AST/PrintfFormatString.cpp
+46-40clang/lib/AST/FormatString.cpp
+33-21clang/lib/Sema/SemaChecking.cpp
+25-11clang/lib/AST/FormatStringParsing.h
+15-8clang/lib/AST/ScanfFormatString.cpp
+19-0llvm/lib/Support/TextEncoding.cpp
+196-11112 files not shown
+258-12218 files

LLVM/project f720469clang/lib/Parse ParseDecl.cpp ParseExpr.cpp, clang/lib/Sema SemaExpr.cpp

add ParserConversionAction, do not translate unevaluated strings
DeltaFile
+15-0clang/test/CodeGen/systemz-charset.c
+6-5clang/lib/Sema/SemaExpr.cpp
+10-0clang/lib/Parse/ParseDecl.cpp
+9-0clang/test/CodeGen/systemz-charset-diag.cpp
+3-3clang/lib/Parse/ParseExpr.cpp
+4-0clang/lib/Parse/Parser.cpp
+47-83 files not shown
+53-99 files

LLVM/project 5860944clang/include/clang/Lex TextEncodingConfig.h LiteralSupport.h, clang/lib/Lex LiteralSupport.cpp TextEncodingConfig.cpp

This patch enables the fexec-charset option to control the execution charset of string literals. It sets the default internal charset, system charset, and execution charset for z/OS and UTF-8 for all other platforms.
DeltaFile
+139-31clang/lib/Lex/LiteralSupport.cpp
+58-0clang/test/CodeGen/systemz-charset.c
+46-0clang/test/CodeGen/systemz-charset.cpp
+45-0clang/lib/Lex/TextEncodingConfig.cpp
+34-0clang/include/clang/Lex/TextEncodingConfig.h
+12-7clang/include/clang/Lex/LiteralSupport.h
+334-3813 files not shown
+385-4619 files

LLVM/project c733dedllvm/test/Transforms/InstCombine fold-multi-use-select-packed-constants.ll

pre-commit tests
DeltaFile
+182-0llvm/test/Transforms/InstCombine/fold-multi-use-select-packed-constants.ll
+182-01 files

LLVM/project 28b1ebcmlir/lib/Pass IRPrinting.cpp, mlir/test/Pass ir-printing.mlir dynamic-pipeline.mlir

Revert "[mlir][core] in -mlir-print-ir-*, dump the pass options as well (#195…"

This reverts commit 11e91bdcc6e1ddc81d95fa592e09728d4b346f2b.
DeltaFile
+32-35mlir/test/Pass/ir-printing.mlir
+18-22mlir/lib/Pass/IRPrinting.cpp
+8-8mlir/test/Pass/dynamic-pipeline.mlir
+5-5mlir/test/Pass/run-reproducer.mlir
+4-4mlir/test/Pass/dynamic-pipeline-nested.mlir
+3-3mlir/test/python/pass_manager.py
+70-776 files

LLVM/project ee44ba8lldb/include/lldb/Host/common NativeProcessProtocol.h, lldb/source/Host/common NativeProcessProtocol.cpp

Revert "[lldb] Do not refcount breakpoints in lldb-server" (#196561)

Reverts llvm/llvm-project#195858 due to breakage on arm(32).
DeltaFile
+10-4lldb/source/Host/common/NativeProcessProtocol.cpp
+2-11lldb/test/API/functionalities/multi-breakpoint/TestMultiBreakpoint.py
+1-0lldb/include/lldb/Host/common/NativeProcessProtocol.h
+13-153 files

LLVM/project 435957aflang/docs HLFIRTransition.md HighLevelFIR.md

[flang][docs] Removed HighLevelFIR transition plan section (#196227)

Removed the "Transition Plan" section from flang/docs/HighLevelFIR.md,
since the transition has completed a long time ago and the legacy
lowering code is being removed now.
DeltaFile
+55-0flang/docs/HLFIRTransition.md
+0-50flang/docs/HighLevelFIR.md
+9-0flang/docs/index.md
+64-503 files

LLVM/project cd2b1a1llvm/test/CodeGen/X86 blend-of-shift.ll shuffle-of-shift.ll

[X86] Remove tests for non-existant intrinsics. NFC (#196237)

There is no PSRAQ instruction until AVX512. The incorrect intrinsic
names were just being interpreted as a call to an external functional.
DeltaFile
+4-160llvm/test/CodeGen/X86/blend-of-shift.ll
+4-96llvm/test/CodeGen/X86/shuffle-of-shift.ll
+8-2562 files