LLVM/project b8a8ed8 — llvm/lib/Target/AMDGPU SIOptimizeExecMaskingPreRA.cpp, llvm/test/CodeGen/AMDGPU optimize-exec-masking-pre-ra.mir

by Matt Arsenault via GitHub on ⎇
AMDGPU: Fix double interval removal in SIOptimizeExecMaskingPreRA (#242790)

An exec copy folded after its use was erased from an s_endpgm block
had its interval removed twice. Fixes an assert after 6a483810f0da.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+46-0llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
+1-0llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
+47-02 files

LLVM/project 6b74096 — libc/test/src/math CMakeLists.txt

by Sachin 🗲 via GitHub on ⎇
[libc][math][NFC] Remove unused dependency from dmulf128_test DEPENDS list. (#242833)
DeltaFile
+0-1libc/test/src/math/CMakeLists.txt
+0-11 files

LLVM/project 962480b — llvm/lib/Target/BPF BPFUnwind.cpp, llvm/test/CodeGen/BPF unwind-dead-blocks.ll

by Matt Arsenault on ⎇
BPF: Fix removing the blocks after the start of an unwind

BPFUnwindLower erased each dead block as soon as it unlinked it, so a
dead block that was a successor of a later one was used after being
freed. It also kept an address-taken block but not the blocks it
branches to, leaving a branch to an erased block.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+107-0llvm/test/CodeGen/BPF/unwind-dead-blocks.ll
+17-6llvm/lib/Target/BPF/BPFUnwind.cpp
+124-62 files

LLVM/project d2a1594 — llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify bitcast-vector-fold.ll

by Pedro Lobo on ⎇
[ConstantFolding] Fold constant vector `bitcast`s to scalar bytes
DeltaFile
+20-8llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
+19-5llvm/lib/Analysis/ConstantFolding.cpp
+2-4llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+41-173 files

LLVM/project 49fd242 — llvm/test/Transforms/InstSimplify bitcast-vector-fold.ll

by Pedro Lobo on ⎇
[ConstantFolding] Add test for `inttoptr` byte element in vector `bitcast`
DeltaFile
+8-0llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
+8-01 files

LLVM/project d060838 — llvm/test/Transforms/InstSimplify bitcast-vector-fold.ll, llvm/test/Transforms/InstSimplify/ConstProp bitinsert-bitextract.ll

by Pedro Lobo on ⎇
[ConstantFolding] Pre-commit tests for constant vector `bitcast`s to scalar bytes
DeltaFile
+69-0llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
+20-0llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+89-02 files

LLVM/project 6f77100 — llvm/lib/Analysis InstructionSimplify.cpp

by Pedro Lobo on ⎇
[InstSimplify] Use variadic `isa` in `isPoisonBitRange`
DeltaFile
+1-1llvm/lib/Analysis/InstructionSimplify.cpp
+1-11 files

LLVM/project b8bc143 — llvm/test/Transforms/InstSimplify bitcast-vector-fold.ll

by Pedro Lobo on ⎇
[ConstantFolding] Add test for `inttoptr` byte element in vector `bitcast`
DeltaFile
+8-0llvm/test/Transforms/InstSimplify/bitcast-vector-fold.ll
+8-01 files

LLVM/project cc7ab9e — llvm/lib/Target/AMDGPU R600ISelLowering.h AMDGPURegisterBankInfo.h

by Kazu Hirata via GitHub on ⎇
[AMDGPU] Remove unused functions (NFC) (#242850)

AMDGPURegisterBankInfo::splitBufferOffsets: The last caller was removed
on November 14, 2021 in commit a84a401f7e73b0fca629858d94205a8d208f41a2.
This patch also removes static getBaseWithConstantOffset as
splitBufferOffsets is the only caller.

R600TargetLowering::getStackAddress: The last callers were removed on
January 6, 2017 in commit 06200bd7bcee74d6268d4a499f45eaa9a511fc06.

SIRegisterInfo::getCompatibleSubRegClass: The last caller was removed
on September 11, 2026 in commit
0bf534a7b76c7623edb7785cd8b21d89ec63e5d9.

Assisted-by: Antigravity
DeltaFile
+0-60llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
+0-29llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+0-10llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+0-9llvm/lib/Target/AMDGPU/SIRegisterInfo.h
+0-3llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h
+0-2llvm/lib/Target/AMDGPU/R600ISelLowering.h
+0-1136 files

LLVM/project 3da1843 — llvm/lib/Analysis ConstantFolding.cpp, llvm/test/Transforms/InstSimplify/ConstProp bitinsert-bitextract.ll

by Pedro Lobo via GitHub on ⎇
[ConstantFolding] Fold vector `bitinsert` and `bitextract` (#242812)

#229115 added constant folding for scalar `bitinsert` and `bitextract`.
This extends it to vectors by folding each element with the scalar fold.

- An element with an out-of-range or `poison` offset becomes `poison`.
- If an element can't be folded, the vector isn't folded either.

```llvm
%a = bitextract <2 x i8>, <2 x b32> <b32 305419896, b32 305419896>, <2 x i32> <i32 0, i32 8>                         ; <i8 120, i8 86>
%b = bitextract <3 x i8>, <3 x b32> splat (b32 305419896), <3 x i32> <i32 8, i32 32, i32 poison>                     ; <i8 86, i8 poison, i8 poison>
%c = bitinsert <vscale x 4 x b32> zeroinitializer, <vscale x 4 x i8> splat (i8 1), <vscale x 4 x i32> splat (i32 8)  ; splat (b32 256)
```
DeltaFile
+106-9llvm/test/Transforms/InstSimplify/ConstProp/bitinsert-bitextract.ll
+67-6llvm/lib/Analysis/ConstantFolding.cpp
+173-152 files

LLVM/project d5b9a79 — lldb/source/Plugins/Process/FreeBSD NativeRegisterContextFreeBSD_x86.h

by Minsoo Choo via GitHub on ⎇
[lldb][FreeBSD] Fix file header and header guard (#242686)

5e5b799853af (#180624) changed renamed
`NativeRegisterContextFreeBSD_x86_64.h` to
`NativeRegisterContextFreeBSD_x86.h`, but the file header and header
guard remained the same. Match the new filename and file header/header
guard.

Fixes: 5e5b799853af (#180624)
DeltaFile
+4-4lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_x86.h
+4-41 files

LLVM/project af69667 — llvm/include/llvm/IR Attributes.td, llvm/lib/IR Attributes.cpp

by Matt Arsenault on ⎇
IR: Check inline compatibility on the function attribute sets

hasCompatibleFnAttrs queried each attribute on the caller and callee
through which needs to find the function attributes in the
AttributeList. Instead pass the AttributeSet once and use them for the
inline rules, which only look at function attributes.

callgrind instructions, opt -O3: SPASS cnf.bc -0.20%, sqlite3 -0.12%,
kimwitu++ k.bc -0.11%. CTMark instructions:u: O3 -0.04%, ThinLTO -0.04%.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+22-14llvm/lib/IR/Attributes.cpp
+6-6llvm/include/llvm/IR/Attributes.td
+3-1llvm/utils/TableGen/Basic/Attributes.cpp
+31-213 files

LLVM/project 369422f — llvm/lib/Target/AMDGPU SIISelLowering.cpp

by Matt Arsenault on ⎇
Drop isFloatingPoint checks in AExt argument handling
DeltaFile
+3-11llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+3-111 files

LLVM/project 21736b7 — llvm/lib/Target/RISCV/GISel RISCVLegalizerInfo.cpp, llvm/test/CodeGen/RISCV/GlobalISel bitmanip.ll

by Florian Drescher via GitHub on ⎇
[RISCV][GISel] Correctly legalize bitreverse for odd bitwidths (#241773)

RISC-V incorrectly legalizes/lowers bitreverse of odd bitwidths. This,
e.g., breaks leela benchmark from SPECcpu2017 (bitreverse of i20). The
legalizer helper in
https://github.com/llvm/llvm-project/blob/d5311d181267086e337e4dcf44630494f365140f/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L10498
only works for multiples of 8 bit; however, the subsequently invoked
legalizer of bswap only works properly on multiples of 16 bit. It would
be sufficient to widen the scalar to the next multiple of 16 (according
to my digging) but widening to next power of 2 seems safer with barely
any differences (8 and less is fine anyways as handled by a different
path).
DeltaFile
+134-50llvm/test/CodeGen/RISCV/GlobalISel/bitmanip.ll
+98-27llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv64.mir
+33-29llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-bitreverse-rv32.mir
+2-0llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+267-1064 files

LLVM/project 569bbd5 — llvm/lib/Transforms/InstCombine InstCombineCompares.cpp, llvm/test/Transforms/InstCombine load-cmp.ll

by Ömer Sinan Ağacan via GitHub on ⎇
[InstCombine] Relax pointer operand type check in foldCmpLoadFromIndexedGlobal (#242819)

This simplifies code and allows handling `GetElementPtrConstantExpr`.
DeltaFile
+12-0llvm/test/Transforms/InstCombine/load-cmp.ll
+3-6llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+15-62 files

LLVM/project f1a89f0 — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU int_to_fp_narrow_i64.ll

by Matt Arsenault via GitHub on ⎇
DAG: Allow narrowing sint_to_fp source to the sext source type (#242783)

Same as 241c94e3919e for uint_to_fp. The narrowing fold skipped
sint_to_fp (sext x) when the narrow type matched x, so sitofp (sext i32
to i64) was expanded as a 64-bit conversion on AMDGPU.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+10-257llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
+0-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+10-2622 files

LLVM/project 0082f3a — llvm/lib/Target/CSKY CSKYTargetMachine.h CSKYTargetMachine.cpp

by Matt Arsenault on ⎇
CSKY: Use LastSubtargetCache in getSubtargetImpl

Migrate to the new common pattern for targets to cache the last
result.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+25-14llvm/lib/Target/CSKY/CSKYTargetMachine.cpp
+15-0llvm/lib/Target/CSKY/CSKYTargetMachine.h
+40-142 files

LLVM/project f585d72 — lld/COFF Driver.cpp, lld/ELF Driver.cpp

by Fangrui Song via GitHub on ⎇
[lld] Don't reset LLVM options before parsing -mllvm (#242717)

https://reviews.llvm.org/D70378 added cl::ResetAllOptionOccurrences so
that a second in-process link would not fail with "may only occur zero
or one times!" on a repeated -mllvm option. That error was removed in
https://reviews.llvm.org/D120455

Remove the reset:

* Library options are unaffected: they are parsed into a fresh
`LibraryOptionsContext` for
  each link
* In-tree cl::opt variables are no longer reset. A link without -mllvm
  will see the previous link with -mllvm specified value. This is
  acceptable. Most high-profile options have been ported.
* cl::opt defined by a program that links in lld will no longer be
  reset. This fixes a regression from https://reviews.llvm.org/D70378
DeltaFile
+0-2lld/MachO/Driver.cpp
+0-2lld/ELF/Driver.cpp
+0-1lld/wasm/Driver.cpp
+0-1lld/COFF/Driver.cpp
+0-64 files

LLVM/project 080e525 — llvm/test/CodeGen/AMDGPU optimize-exec-masking-pre-ra.mir

by Matt Arsenault via GitHub on ⎇
No tracksRegLiveness
DeltaFile
+0-1llvm/test/CodeGen/AMDGPU/optimize-exec-masking-pre-ra.mir
+0-11 files

LLVM/project 25241fd — llvm/lib/Target/Xtensa XtensaTargetMachine.h XtensaTargetMachine.cpp

by Matt Arsenault on ⎇
Xtensa: Use LastSubtargetCache in getSubtargetImpl

Migrate to the new common target pattern.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+19-5llvm/lib/Target/Xtensa/XtensaTargetMachine.cpp
+13-0llvm/lib/Target/Xtensa/XtensaTargetMachine.h
+32-52 files

LLVM/project fe077b6 — llvm/include/llvm/Bitstream BitstreamReader.h, llvm/lib/Bitstream/Reader BitstreamReader.cpp

by Matt Arsenault via GitHub on ⎇
Bitstream: Move the slow path of Read out of line (#242772)

SimpleBitstreamCursor::Read was too large to inline into its
callers. Separate out the slow error path.

CTMark instructions:u: ThinLTO -0.23% (kimwitu++ -0.72%)

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+29-0llvm/lib/Bitstream/Reader/BitstreamReader.cpp
+4-22llvm/include/llvm/Bitstream/BitstreamReader.h
+33-222 files

LLVM/project 0261406 — llvm/lib/Transforms/Scalar ConstraintElimination.cpp, llvm/test/Transforms/ConstraintElimination vector-with-overflow.ll add-nsw.ll

by Jon Roelofs via GitHub on ⎇
Revert "[ConstraintElim] A signed sum of operands with opposite signs cannot wrap" (#242741)

Reverts llvm/llvm-project#235159

It introduced a runaway recursion bug in long chains of adds via the
recursive chain: `decomposeImpl` -> `isKnownNoWrap` -> `isKnownNoWrap` -
> `getKnownSign` -> `doesHold` -> `getConstraintForSolving` ->
`getConstraint` -> `decompose` -> `decomposeImpl`.

https://github.com/llvm/llvm-project/pull/235159#issuecomment-6887062333
DeltaFile
+0-62llvm/test/Transforms/ConstraintElimination/sadd-with-overflow.ll
+9-25llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
+6-3llvm/test/Transforms/ConstraintElimination/add-nsw.ll
+3-1llvm/test/Transforms/ConstraintElimination/vector-with-overflow.ll
+18-914 files

LLVM/project 144e594 — llvm/lib/Target/Sparc SparcTargetMachine.h SparcTargetMachine.cpp

by Matt Arsenault on ⎇
Sparc: Use LastSubtargetCache in getSubtargetImpl

Adopt new common pattern for targets to lookup subtargets.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+32-15llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+14-0llvm/lib/Target/Sparc/SparcTargetMachine.h
+46-152 files

LLVM/project e0aa9e1 — mlir/lib/Dialect/Vector/IR VectorOps.cpp, mlir/test/Dialect/Vector canonicalize.mlir

by Zhijie Wang on ⎇
[mlir][vector] Do not fold contiguous gather/scatter on non-unit strides

Assisted-by: Claude Opus 5.5
DeltaFile
+44-0mlir/test/Dialect/Vector/canonicalize.mlir
+12-2mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+56-22 files

LLVM/project 83ad44a — mlir/lib/Conversion/VectorToLLVM ConvertVectorToLLVM.cpp, mlir/test/Conversion/VectorToLLVM vector-load-store-to-llvm.mlir

by Zhijie Wang on ⎇
Address review comments
DeltaFile
+28-0mlir/test/Conversion/VectorToLLVM/vector-load-store-to-llvm.mlir
+5-5mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
+33-52 files

LLVM/project 6cd3ff3 — llvm/lib/ExecutionEngine ExecutionEngineBindings.cpp, llvm/lib/ExecutionEngine/Orc OrcV2CBindings.cpp

by Fangrui Song via GitHub on ⎇
[llvm-c] Point C API target machines at the C API library options (#242692)

LLVMParseCommandLineOptions parses library options into
cl::getCAPILibraryOptions() and replays them into T::Global, which
target machines, JITs, and disassemblers created through the LLVM and
MLIR C APIs read since their MCTargetOptions::LibraryOptions is null.
Point them at getCAPILibraryOptions() and remove the replay.

LLM-aided
DeltaFile
+11-35llvm/lib/Support/CommandLine.cpp
+22-1llvm/lib/ExecutionEngine/Orc/OrcV2CBindings.cpp
+13-0mlir/test/CAPI/execution_engine.c
+10-2llvm/lib/ExecutionEngine/ExecutionEngineBindings.cpp
+8-0llvm/unittests/ExecutionEngine/MCJIT/MCJITCAPITest.cpp
+6-0llvm/unittests/Target/TargetMachineOptionsTest.cpp
+70-386 files not shown
+79-4612 files

LLVM/project 2673b75 — llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Analysis/ScalarEvolution sext-to-zext.ll increasing-or-decreasing-iv.ll

by Florian Hahn via GitHub on ⎇
[SCEV] Use the union of the constants as range of selects of constants. (#242706)

A select of two constants that is not modeled as min/max becomes a
SCEVUnknown. Use union of constants as result range.

This improves precision in a number of cases in practice (218 files
changed): https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/2043

Only constant operands are handled; using the ranges of arbitrary
operands, via SCEV or computeConstantRange, is more costly and most
improvements seen in practice seem to come from selects of constants.

PR: https://github.com/llvm/llvm-project/pull/242706
DeltaFile
+86-0llvm/test/Analysis/ScalarEvolution/ranges.ll
+15-15llvm/test/Analysis/ScalarEvolution/increasing-or-decreasing-iv.ll
+2-3llvm/test/Analysis/StackSafetyAnalysis/local.ll
+5-0llvm/lib/Analysis/ScalarEvolution.cpp
+2-2llvm/test/Analysis/ScalarEvolution/sext-to-zext.ll
+2-1llvm/test/Analysis/StackSafetyAnalysis/memintrin.ll
+112-212 files not shown
+114-238 files

LLVM/project d00608a — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AMDGPU int_to_fp_narrow_i64.ll

by Matt Arsenault on ⎇
DAG: Allow narrowing sint_to_fp source to the sext source type

Same as 241c94e3919e for uint_to_fp. The narrowing fold skipped
sint_to_fp (sext x) when the narrow type matched x, so sitofp (sext i32
to i64) was expanded as a 64-bit conversion on AMDGPU.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+10-257llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
+0-5llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+10-2622 files

LLVM/project 48bb557 — llvm/test/CodeGen/AMDGPU int_to_fp_narrow_i64.ll

by Matt Arsenault via GitHub on ⎇
AMDGPU: Add more sitofp of sext from i32 tests (#242782)

These currently get the full i64 conversion expansion.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+543-0llvm/test/CodeGen/AMDGPU/int_to_fp_narrow_i64.ll
+543-01 files

LLVM/project 4766f35 — llvm/lib/Target/Mips MipsTargetMachine.h MipsTargetMachine.cpp

by Matt Arsenault via GitHub on ⎇
Mips: Use LastSubtargetCache in getSubtargetImpl (#242775)

Migrate to use the new common infrastructure and pattern which caches
based on the last used subtarget.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+27-13llvm/lib/Target/Mips/MipsTargetMachine.cpp
+17-0llvm/lib/Target/Mips/MipsTargetMachine.h
+44-132 files