workflows/release-binaries: Add missing action to checkout (#211720)
The upload-release-artifact action uses the require-team-membership
action so we need to make sure that latter is checkout out when calling
upload-release-artifact.
(cherry picked from commit 3c6d9cdb08c9245bb4d80e3262f74ea372046bcb)
[LoopUnroll] Allow vector types for minmax reductions (#207630)
Our downstream patched RecurrenceDescriptor in IVDescriptors.cpp to
recognize min/max reductions on vector-typed phis. After ffa02793,
vector min/max intrinsic reductions now flow into getReductionIdentity()
with vector type and then runtime-unroll-reductions-min-max.ll test
crashed.
This PR upstreams our RecurrenceDescriptor change to avoid further
downstream change to LoopUtils.cpp (in this PR) that fixes the crash.
LIT change in runtime-unroll-reductions-min-max.ll shows a long serial
reduction chain now breaks into two independent ones, which is the
purpose of unroll-add-parallel-reductions.
---------
Co-authored-by: skozhukh <sergey.s.kozhukhov at intel.com>
[SPIR-V] Fix hex float exponent for f64 Inf/NaN literals (#212295)
The asm printer hardcoded the f32 exponent (+128) when printing Inf/NaN
as hex floats, so f64 Inf/NaN literals were misencoded and silently
reassembled as finite values by consumers
Derive the exponent from the operand actual semantic instead
[lldb][AArch64][Linux] Track all register cache validity in one place (#197113)
In this change I've expanded the existing RegisterSetType enum
to be used as part of a singular cache tracking object which replaces
all the separate booleans. These booleans were hard to track and
set/reset in the right places.
This new validity object can be reset by default constructing,
and uses a member initialiser so everything starts out as invalid.
RegisterSetType is now a bitmask enum for easier storage.
It's 32-bit now which is enough for now. Just in case we expand it.
(and I previously updated all sizeof calls to use RegisterSetType
instead of the raw type)
The SME and SME 2 entries have been renamed to ZA and ZT
as this is what ptrace calls them. Note that SME's pseudo registers
are still managed in their own unique way, I hope to address that
later.
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[libc] Fix path collisions between unit and hermetic tests (#212425)
Use the APPEND_LIBC_TEST macro to ensure each test gets a unique path to
operate on. Enable the affected tests in hermetic mode.
[lldb][test][AArch64] Add test for AArch32 compatibility execution (#211793)
This should catch obvious problems like the one in #211692 in
future.
To run AArch32 programs on AArch64 you need a few things:
* Hardware that has AArch32 mode at EL0.
* A kernel built with CONFIG_COMPAT on.
* (usually) A bunch of 32-bit libraries installed.
We are dodging the 3rd one by compiling a standalone assembly
program that doesn't use any other libraries.
With clang being a cross-compiler and lld a cross-linker,
we should be able to do this without any 32-bit compatibility
libraries being installed.
To check for the first 2, we run that program normally.
If it fails to run, we don't have them. If it does run,
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[TableGen] don't print redundant diagnostic when parser sees Error token at end of file. (#212410)
Fixes #151476.
Currently TableGen parser emits `error: Unexpected token at top level`
when it sees `tgtok::Error` token after failing to parse the object
list, even though that token's corresponding diagnostics were already
emitted during lexing. This change makes `ParseFile` return true when it
sees `tgtok::Error` at end of file, thereby avoiding the redundant
diagnostic.
clang: Use TargetID parsing from AMDGPUTargetParser
We had grown 2 parallel parsing implementations for
triple+gpu name+feature flag target ID strings. Mostly
eliminate the redundant clang version.
Co-authored-by: Claude (Opus 4.8)
[ORC] Fix buildSimpleReexportsAliasMap signature. (#212420)
The header declared a `const SymbolNameSet&` argument, but the
implementation took a `SymbolNameSet` by value. Update the
implementation to also take a `const SymbolNameSet&`.
No testcase. The corrected implementation will be used in an upcoming
commit.
[clang][NFC] generate TokenKey from tablegen (#210857)
Currently the enumerator constants of `TokenKey` are duplicated between
TokenKinds.h and Traits.td. This patch generates the `TokenKey` enum
from tablegen.
This is a followup patch for
https://github.com/llvm/llvm-project/pull/201491#discussion_r3567423553
[lldb][test] Do not return a PID in TestGdbClientModuleLoad (#212256)
This test has been flaky on x86 Github CI. It expects:
[ 0] {{.*}} 0x0000000000ee0000 {{.*}}module_load
[ 1] {{.*}} 0x0000000000ef0000 {{.*}}[vdso]
However in one run it got:
[ 0] 98FC07B8 0x0000000000ef0000 [vdso] (0xef0000)
[ 1] 75B11BBB-EF8B-5645-B9B1-A7261EC8ABCF-05413284 0x0000000000ed8ed0
/home/gha/actions-runner/bin/Runner.Worker
This happened because the responder says it's debugging PID 0x47, which
is usually some root process that we cannot read the /proc/pid/exe link
for. However when it is readable, we will assume that is the program
file and it replaces the "module_load" entry (this never happened on
AArch64 because an AArch64 program file is never compatible with an x86
triple).
In the failing case, 0x47 happened to be a github runner process that
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[SCEV] Rewrite more SCEVAddExpr when applying guards. (#159942)
When re-writing SCEVAddExprs to apply information from guards, check if
we have information for the expression itself. If so, apply it.
When we have an expression of the form (Const + A), check if we have
have guard info for (Const + 1 + A) and use it. This is needed to avoid
regressions in a few cases, where we have BTCs with a subtracted
constant.
Rewriting expressions could cause regressions, e.g. when comparing 2
SCEV expressions where we are only able to rewrite one side, but I could
not find any cases where this happens more with this patch in practice.
Depends on https://github.com/llvm/llvm-project/pull/160012.
Proofs for some of the test changes: https://alive2.llvm.org/ce/z/RPX6t_
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[lldb][AArch64] Fix launching Arm32 applications on AArch64 Linux (#211692)
When LLDB runs on an AArch64 Linux, it adds both 64- and 32-bit
architectures as supported; see `PlatformLinux` ctor. The triple for the
32-bit variant is computed by replacing the architecture while keeping
all other fields; i.e., for the main host triple
`aarch64-unknown-linux-gnu`, the generated 32-bit triple is
`arm-unknown-linux-gnu`.
When a 32-bit target is created, its triple would be something like
`arm--linux-eabihf`. This triple is incompatible with the one added to
the supported architectures per condition in `ArchSpec::IsMatch()`,
which checks for compatibility between environments. As a result, LLDB
fails to launch this target:
```
> arm-linux-gnueabihf-g++ -g test.cpp -o test.out
> lldb
(lldb) file test.out
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[libc] Make <sys/mman.h> tests hermetic (#210697)
The only issue was in pkey_test, which uses function-local static to do
lazy initialization. This requires the c++ runtime
(__cxa_guard_acquire/release).
There are no threads in this test, so we can just use the
(non-thread-safe) hand-rolled version of that. This is currently our
only test with such a pattern.
This would be something that in gtest would go into a SetUpTestSuite
method, but our test framework currently doesn't have an equivalent.
[AMDGPU] Set WMMA source-operand reuse bits in SIPreEmitPeephole
gfx1250 WMMA instructions can set matrix_a_reuse / matrix_b_reuse bits
that keep the A or B source operand in a high-temporality state in the
VALU source-operand cache, so a later WMMA reusing the same registers
hits in the cache instead of re-reading the register file.
Add a late, post-RA peephole in the existing pre-emit peephole pass that
scans each basic block and, for every WMMA, sets the A/B reuse bit when
one of the next few WMMAs reuses the same physical registers as its A or B
operand and those registers are not redefined in between.
Stale sticky entries in the cache are cleared when a register is used in
an instruction without a reuse bit being set. Therefore, the final WMMA
use of the same source should not set the bit.
[clang] Fixed predefined expressions after lambda parameters (#211811)
After the parameter declaration of a lambda expression, `Sema` enters
the declaration context of the lambda call operator (in
`ActOnLambdaClosureParameters`), so the lambda specifiers and the
trailing return type are analyzed within that context. Because of this,
predefined expressions such as `__func__` resolve to the lambda call
operator, and not to the possibly enclosing function. (issue #122657)
Added a member to `LambdaScopeInfo` to mark whether or not the compound
statement of the lambda expression has been entered, to be used when
resolving a `PredefinedExpr`
[clang][NFC] Refactor flag enum caching (#210632)
Extracts cache insertion logic from `IsValueInFlagEnum`. This allows us
to drop `mutable` on `FlagBitsCache` while making it reusable as work
list for additional flag_enum diagnostics.