LLVM/project d6e883a — llvm/test/CodeGen/AMDGPU freeze.ll integer-mad-patterns.ll, llvm/test/CodeGen/AMDGPU/GlobalISel extractelement.ll insertelement.i8.ll

[GlobalISel] Simplify demanded bits through constant shifts (#230636)
DeltaFile
+224-265llvm/test/CodeGen/AMDGPU/integer-mad-patterns.ll
+164-243llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
+151-230llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
+150-214llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
+161-168llvm/test/CodeGen/AMDGPU/freeze.ll
+0-328llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
+850-1,44871 files not shown
+2,656-3,55177 files

LLVM/project c98b2e5 — llvm/lib/Analysis ScalarEvolution.cpp

[SCEV] Avoid predicate switch (NFC) (#236157)

The logic is basically the same in all four cases, implement it
once using getNonStrictPredicate + getSwappedPredicate.
DeltaFile
+7-33llvm/lib/Analysis/ScalarEvolution.cpp
+7-331 files

LLVM/project 1682f0c — llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/test/CodeGen/AArch64 neon-insert-sve-elt.ll sve-extract-scalar-to-vector.ll

[DAGCombiner] Fold extract + scalar2vec at lane 0 (#233856)

When extracting a scalar at index 0 from a vector and immediately
creating a new fixed-length vector with one lane only, we can just fold
that pattern into an extract_subvector pattern, given that the vector
element types align.

This removes redundant moves for vector reductions when the return is
handled as a one element vector.
These moves are not required when the result is in lane 0 already.

I used codex to generate the test cases.
DeltaFile
+190-0llvm/test/CodeGen/AArch64/sve-extract-scalar-to-vector.ll
+11-2llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+4-2llvm/test/CodeGen/AArch64/neon-insert-sve-elt.ll
+205-43 files

LLVM/project b81b29e — clang/include/clang/AST StmtOpenMP.h, clang/lib/AST StmtOpenMP.cpp

[clang][OpenMP] Extend no-loop promotion to the split teams loop

Widen the no-loop promotion to apply not only to the fused target teams
distribute parallel for but include the same region written as separate
directives, other directives promotable to parallel for, and regions
carrying a schedule clause that asks for a mapping a no-loop kernel
already provides.

Use the SPMD_NO_LOOP kernel tag to carry the promotion decision, based
on whether the kernel can get fully promoted to a no-loop kernel. This
eliminates the previous discrepancy where a clause got the tag but not
the promotion.
DeltaFile
+95-24clang/test/OpenMP/target_no_loop.cpp
+63-13clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+39-28clang/lib/CodeGen/CGStmtOpenMP.cpp
+10-1clang/include/clang/AST/StmtOpenMP.h
+2-1clang/lib/Sema/SemaOpenMP.cpp
+2-1clang/lib/AST/StmtOpenMP.cpp
+211-682 files not shown
+213-688 files

LLVM/project dd8c840 — flang/lib/Optimizer/Transforms LoopInvariantCodeMotion.cpp

Add TODO comment for loop scheduling workaround

Added a TODO comment regarding a workaround in loop scheduling.
DeltaFile
+1-0flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
+1-01 files

LLVM/project d29114c — llvm/test/Transforms/IndVarSimplify loop-invariant-predicate-samesign.ll

[IndVarSimplify][NFC] Add tests for loop-invariant samesign compares (#236092)

Add tests for replacing a samesign compare of an IV with a
loop-invariant value by its value on loop entry.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+160-0llvm/test/Transforms/IndVarSimplify/loop-invariant-predicate-samesign.ll
+160-01 files

LLVM/project a34e25b — llvm/lib/Analysis ScalarEvolution.cpp, llvm/test/Transforms/IndVarSimplify loop-invariant-predicate-samesign.ll

[SCEV] Drop samesign in getLoopInvariantPredicate (#236093)

SCEV's `getLoopInvariantPredicate` tries to replace a comparison of an
IV against a loop-invariant value with the comparison value on loop
entry.

For that it tries to prove that the comparison is:
 - (A) monotonic: i.e. if `c_i` is true, then `c_{i+1}` is true,
- (B) guards the backedge: the backedge is taken only if `c_i` is true.

Then each `c_i` may be replaced with `c_0`.

It works for the `icmp` instruction without the `samesign` flag.

With the `samesign` flag, however, the comparison is poison when its
operands have different signs.

To prove the backedge guard (B), we may rely on picking that poison as
true, while proving the monotonicity (A) may need the same poison to be

    [28 lines not shown]
DeltaFile
+8-6llvm/test/Transforms/IndVarSimplify/loop-invariant-predicate-samesign.ll
+4-0llvm/lib/Analysis/ScalarEvolution.cpp
+12-62 files

LLVM/project 2d76a1d — clang/lib/CodeGen CGStmtOpenMP.cpp

Add braces around loop body with nested if
DeltaFile
+3-2clang/lib/CodeGen/CGStmtOpenMP.cpp
+3-21 files

LLVM/project 63f4cc6 — clang/lib/CodeGen CGOpenMPRuntimeGPU.cpp CGStmtOpenMP.cpp, clang/test/OpenMP target_no_loop.cpp

[clang][OpenMP] Emit lastprivate final copies in no-loop kernels

Promotion rejected lastprivate because the no-loop branch leaves the
worksharing path before it privatizes or copies out, so the clause would
have been silently dropped.

Privatize the non-counter variables in the parallel region and copy them
out under the last iteration that applyWorkshareLoop publishes, forcing
the exit barrier the copy reads through. Loop counters stay at the
distribute level and reach EmitOMPSimdFinal.
DeltaFile
+76-20clang/test/OpenMP/target_no_loop.cpp
+52-4clang/lib/CodeGen/CGStmtOpenMP.cpp
+48-0offload/test/offloading/target-no-loop.c
+0-2clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+176-264 files

LLVM/project 1f3315e — llvm/lib/Target/AMDGPU GCNRegPressure.h, llvm/test/CodeGen/AMDGPU sched-max-pressure-different-points.mir llvm.amdgcn.mfma.ll

[AMDGPU] Take the VGPR and AVGPR maximum pressure from one point

max() of two GCNRegPressure values takes the VGPR and AVGPR counts from the operand with the larger sum of both. It does the same for the VGPR and AVGPR tuple weights. The SGPR and AGPR components still take the maximum of each component.

dumpMaxRegPressure() resets the maximum of the tracker before each instruction. It now compares the pressure of single instructions and does not depend on how max() combines two values.

Fix the expectations of the GCNRegPressureTest tests for this case. Add sched-max-pressure-different-points.mir and update the checks of the affected tests. rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir now uses the basic register allocator, as its sibling .ll test does since #226913.
DeltaFile
+384-350llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
+80-83llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
+74-74llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
+131-0llvm/test/CodeGen/AMDGPU/sched-max-pressure-different-points.mir
+5-8llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
+13-0llvm/lib/Target/AMDGPU/GCNRegPressure.h
+687-5154 files not shown
+699-52310 files

LLVM/project 75cc76f — llvm/unittests/Target/AMDGPU GCNRegPressureTest.cpp

[AMDGPU][NFC] Add unit tests for the maximum of GCNRegPressure over a block

The tests run GCNDownwardRPTracker and GCNUpwardRPTracker over one block and check the accumulated maximum pressure. In the block, an AV register is live first and a VGPR is live after it, so only one vector register is live at any point. The tests use 32-bit registers, and 64-bit registers for the tuple weights. The expectations show the current results, with a FIXME: the maximum adds the AV peak to the VGPR peak.
DeltaFile
+80-0llvm/unittests/Target/AMDGPU/GCNRegPressureTest.cpp
+80-01 files

LLVM/project b01b1e6 — llvm/include/llvm/BinaryFormat ELF.def, llvm/test/tools/llvm-readobj/ELF file-header-machine-types.test

[spr] initial version

Created using spr 2.0.0-beta.2
DeltaFile
+210-482llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
+58-30llvm/include/llvm/BinaryFormat/ELF.def
+268-5122 files

LLVM/project c4c1338 — llvm/lib/IR ConstantFold.cpp

[ConstantFold] Use isImpliedByMatchingCmp() (NFC) (#236149)

Instead of reimplementing it, badly. The non-strict cases had some
incorrect entries (e.g. ule does not imply that ult is true). We got
away with this because those predicates are never returned by
evaluateICmpRelation().
DeltaFile
+5-84llvm/lib/IR/ConstantFold.cpp
+5-841 files

LLVM/project 50934bf — llvm/lib/Transforms/InstCombine InstCombineShifts.cpp

[InstCombine] Remove redundant fold for shift of add of zexts (NFCI) (#236141)

The earlier `(X + Y) / 2 --> (X & Y) iff (X u<= 1) && (Y u<= 1)` fold
subsumes this special case where X/Y are zext of i1.
DeltaFile
+0-12llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+0-121 files

LLVM/project 5967e71 — mlir/test/Conversion/MathToXeVM lit.local.cfg

[MLIR][MathToXeVM][NFC] Remove a dead lit.local.cfg (#232911)

The lit.local.cfg in test/Conversion/MathToXeVM excludes
native-spirv-builtins.mlir when the SPIRV target is not built. #189494
deleted that test, so the file now excludes nothing. Remove it.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+0-7mlir/test/Conversion/MathToXeVM/lit.local.cfg
+0-71 files

LLVM/project 4122ec6 — clang/docs ReleaseNotes.md, clang/lib/Lex PPDirectives.cpp

[clang][Lex] Skip to the end of directive after diagnosing 'defined' in an #embed parameter (#235934)

The `EvaluatedDefined` error path in `LexEmbedParameters` returned
without
discarding the rest of the directive, the only error path in the
function that didn't.
With any token following the parameter's closing paren, e.g.

    #embed <f> limit(defined(x)),

`HandleEmbedDirective` hit its "expected success or to be at the end of
the directive"
assertion (a no-assert build would resume lexing mid-directive).

Discard the remaining tokens like the neighboring error paths do, and
add coverage
for both the `#embed` and `__has_embed` forms.

Fixes #212075
DeltaFile
+13-0clang/test/Preprocessor/embed___has_embed_parsing_errors.c
+6-0clang/test/Preprocessor/embed_parameter_limit.c
+3-0clang/docs/ReleaseNotes.md
+2-0clang/lib/Lex/PPDirectives.cpp
+24-04 files

LLVM/project 5186c65 — clang/docs ReleaseNotes.md, clang/lib/AST ASTStructuralEquivalence.cpp

[clang] Fix acceptance of redefinition of a struct with different bit-field width (#235265)

The bug comes from `IsStructurallyEquivalent(Context,
Field1->getBitWidth(), Field2->getBitWidth())`
returning true when both `Field1->getBitWidth()` and
`Field2->getBitWidth()` are ConstantExpr types. Two bit fields were
treated as structurally equivalent even though their widths are
different.

This PR makes sure that two bit-fields with different bit-field width
are treated as structurally unequivalent under `-std=c23`.

Fixes #232748.
DeltaFile
+15-0clang/test/C/C23/n3037.c
+7-5clang/lib/AST/ASTStructuralEquivalence.cpp
+1-0clang/docs/ReleaseNotes.md
+23-53 files

LLVM/project 5110131 — llvm/test/CodeGen/AMDGPU amdgcn.bitcast.96bit.ll amdgcn.bitcast.128bit.ll, llvm/test/CodeGen/X86 bfloat-calling-conv.ll

[SelectionDAG] avoid rounding exact f32->bf16 (STRICT_)FP_ROUND (#230557)

For f32-to-bf16, DAGTypeLegalizer::SoftPromoteHalfRes_FP_ROUND currently
ignores the Trunc flag and unconditionally lowers ISD::FP_ROUND to
ISD::FP_TO_BF16 as follows:

- On X86 targets with +avx512bf16 or +avxneconvert, ISD::FP_TO_BF16
lowers to vcvtneps2bf16, which is lossy (it flushes subnormals to zero
and quietens sNaNs.)

- On targets without hardware bf16 conversion instructions, it performs
rounding via a runtime libcall (e.g. __truncsfbf2) or a software
rounding sequence (which can also be lossy, e.g. quieting sNaNs).

The above is unnecessary and lossy; bitcasting to i32 and extracting the
upper 16 bits is cheaper and lossless. Do that.

Tested:


    [11 lines not shown]
DeltaFile
+14,649-17,027llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+4,663-5,725llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+1,624-2,114llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
+747-992llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
+282-732llvm/test/CodeGen/X86/bfloat-calling-conv.ll
+424-549llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
+22,389-27,13932 files not shown
+25,474-32,41538 files

LLVM/project 35dff90 — llvm/include/llvm/BinaryFormat ELF.h ELF.def, llvm/lib/BinaryFormat ELF.cpp

[ELF] Move ELF machine definitions to separate file (#236143)

Unify all definitions and uses with a single file to avoid
inconsistencies. Besides refactoring and deduplication, this:

- Fixes a few typos.
- Adds some names to llvm-readobj that were previously missing.
- Makes arch names consistently lower case.
- Replaces the large slow-to-compile StringSwitch with a static table.
DeltaFile
+13-547llvm/lib/BinaryFormat/ELF.cpp
+203-0llvm/include/llvm/BinaryFormat/ELF.def
+2-194llvm/include/llvm/BinaryFormat/ELF.h
+2-167llvm/tools/llvm-readobj/ELFDumper.cpp
+2-166llvm/lib/ObjectYAML/ELFYAML.cpp
+3-3llvm/test/tools/llvm-readobj/ELF/file-header-machine-types.test
+225-1,0779 files not shown
+236-1,08815 files

LLVM/project a51490d — libc/src/net/if/linux CMakeLists.txt if_nameindex_impl.h, libc/src/net/linux CMakeLists.txt if_nameindex_impl.h

[libc] Move <net/if.h> code and tests to net/if subdirectories (#236126)

This aligns the directory structure with other two-level headers like
<arpa/inet.h> and <netinet/ether.h> (which live in src/arpa/inet and
src/netinet/ether, respectively). It also makes docgen happy, as it
looks for function implementations in src/<header> (src/net/if here).
Previously, it would report all net/if functions as unimplemented.

The test suite is renamed to libc-net-if-tests, to match the directory
name (similar to libc-arpa-inet-tests).

Assisted-by: Gemini
DeltaFile
+0-593libc/test/src/net/linux/if_nameindex_test.cpp
+593-0libc/test/src/net/if/linux/if_nameindex_test.cpp
+0-202libc/src/net/linux/if_nameindex_impl.h
+202-0libc/src/net/if/linux/if_nameindex_impl.h
+0-93libc/src/net/linux/CMakeLists.txt
+93-0libc/src/net/if/linux/CMakeLists.txt
+888-88829 files not shown
+1,394-1,39235 files

LLVM/project c94114f — llvm/include/llvm/Analysis IVDescriptors.h, llvm/lib/Analysis LoopInfo.cpp IVDescriptors.cpp

[IVDesc] Return APInt for const-step (NFC) (#236039)

Rename getConstIntStepValue to getConstStepValue, and make it return an
APInt instead of a ConstantInt, improving code.
DeltaFile
+4-4llvm/lib/Analysis/IVDescriptors.cpp
+2-2llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+2-2llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
+1-1llvm/lib/Analysis/LoopInfo.cpp
+1-1llvm/include/llvm/Analysis/IVDescriptors.h
+10-105 files

LLVM/project 3b9677b — libc/src/__support/CPP CMakeLists.txt unique_ptr.h, libc/test/src/__support/CPP CMakeLists.txt unique_ptr_test.cpp

Reapply "[libc] Assert non-nullness in cpp::unique_ptr dereference operators" (#236083)

Reverts llvm/llvm-project#235768, re-applying #235658. Allocator
mismatches under asan have been fixed by #235777.

The original commit message was:

Add LIBC_ASSERTs to operator*, operator-> and (for the array version)
operator[]. Dereferencing an empty unique_ptr is UB, so we might as well
catch it in debug builds.

The death test is a bit awkward because LIBC_ASSERT fails differently
depending on the build mode. In full builds it exits with 0xFF, while in
overlay builds (or with LIBC_COPT_USE_C_ASSERT) it calls the system
assert, which raises SIGABRT. I've added a small helper macro to the
test to handle both cases.

Assisted-by: Gemini
DeltaFile
+24-0libc/test/src/__support/CPP/unique_ptr_test.cpp
+10-2libc/src/__support/CPP/unique_ptr.h
+1-0libc/test/src/__support/CPP/CMakeLists.txt
+1-0libc/src/__support/CPP/CMakeLists.txt
+36-24 files

LLVM/project 0ba7764 — llvm/lib/ExecutionEngine ExecutionEngine.cpp, llvm/lib/ExecutionEngine/Interpreter Execution.cpp

[ExecutionEngine] Remove handling for removed constant expressions (NFC) (#236147)

All of these are no longer supported.
DeltaFile
+7-164llvm/lib/ExecutionEngine/ExecutionEngine.cpp
+0-4llvm/lib/ExecutionEngine/Interpreter/Execution.cpp
+7-1682 files

LLVM/project 88d25eb — llvm/lib/Target/AArch64/MCTargetDesc AArch64AsmBackend.cpp

[AArch64][NFC] Replace StringSwitch with EnumStrings (#236142)

Large StringSwitches generate a lot of code, which takes a long time to
compile (JumpThreadingPass on this function is the slowest pass
invocation in LLVM). Replace the StringSwitch with static strings.

This reduces the size of the object file by ~70 kiB and its compile time
by ~33%.
DeltaFile
+12-10llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
+12-101 files

LLVM/project bfe0c5c — llvm/lib/Analysis ConstantFolding.cpp

[ConstantFolding] Remove explicit inttoptr of ptrtoint fold (NFCI) (#236137)

Since #162279 this is already handled by DataLayout-aware
isEliminableCastPair().
DeltaFile
+0-18llvm/lib/Analysis/ConstantFolding.cpp
+0-181 files

LLVM/project 8118be9 — llvm/lib/Target/ARM ARMISelLowering.cpp, llvm/test/CodeGen/Thumb2 mve-vector-deinterleave-load.ll

[ARM] Check the alignment of generated vld2/4 with MVE. (#235675)

MVE requires element sized alignment on loads and stores, which we
usually work around by using byte size element instructions for larger
element sizes loads. As the same trick cannot be done for vld2/vld4, add
an alignment check which mirrors the code in
ARMTargetLowering::isLegalInterleavedAccessType.
DeltaFile
+91-0llvm/test/CodeGen/Thumb2/mve-vector-deinterleave-load.ll
+4-0llvm/lib/Target/ARM/ARMISelLowering.cpp
+95-02 files

LLVM/project 32ed21c — libc/shared/math copysignf80.h, libc/src/__support/math fabsf80.h copysignf80.h

[libc] Make sign functions use the emulated float80 type  (#235073)

adds following functions
- `fabsf80`
- `copysignf80`
DeltaFile
+39-0utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+33-0libc/src/__support/math/copysignf80.h
+31-0libc/src/__support/math/fabsf80.h
+29-0libc/test/src/math/smoke/CMakeLists.txt
+29-0libc/src/math/generic/copysignf80.cpp
+28-0libc/shared/math/copysignf80.h
+189-027 files not shown
+447-033 files

LLVM/project 85a2e8e — clang/include/clang/AST HLSLResource.h DeclTemplate.h, clang/lib/AST/ByteCode Compiler.h

[clang] Remove forward and friend declarations of non-existent types (NFC) (#236009)

This patch removes forward and friend declarations of classes that are
not defined anywhere in the codebase.

Assisted-by: Antigravity
DeltaFile
+0-6clang/lib/AST/ByteCode/Compiler.h
+0-3clang/include/clang/AST/OpenACCClause.h
+1-2clang/include/clang/AST/Stmt.h
+0-1clang/include/clang/AST/HLSLResource.h
+0-1clang/include/clang/AST/DeclTemplate.h
+0-1clang/include/clang/AST/DeclBase.h
+1-142 files not shown
+1-168 files

LLVM/project 1c4f765 — clang/lib/APINotes APINotesManager.cpp, clang/test/APINotes search-order.m

[clang] Replace PointerUnion::dyn_cast with llvm::dyn_cast_if_present (NFC) (#236007)

PointerUnion::dyn_cast has been soft-deprecated in favor of
llvm::dyn_cast and llvm::dyn_cast_if_present.  This patch replaces
PointerUnion::dyn_cast with llvm::dyn_cast_if_present in
APINotesManager::findAPINotes.

Note that Readers[*Dir] is set to nullptr for the framework directory
when public or private API notes are found.  If a private header is
included from a framework that only provides public API notes, Dir is
not redirected to PrivateDir, and Readers[*Dir] remains null.

This patch also adds a test case to cover that code path.

Assisted-by: Antigravity
DeltaFile
+8-0clang/test/APINotes/Inputs/Frameworks/SomeOtherKit.framework/PrivateHeaders/SomeOtherKit_Private.h
+6-0clang/test/APINotes/search-order.m
+1-1clang/lib/APINotes/APINotesManager.cpp
+15-13 files

LLVM/project 19347b4 — lld/MachO InputFiles.cpp, lld/test/MachO arm64e-input-abi.s

[lld-macho] Reject incompatible arm64e object ABI markers

The CPU subtype of an arm64e object carries a pointer authentication ABI
marker. In a dynamic link, ld64 accepts only objects marked userland ABI
version 0, even on macOS and Mac Catalyst, whose executables are marked
version 1. It names any other marker as another architecture
(arm64e.old, arm64e.v1, arm64e.kernel, arm64e.kernel.v1 or unknown) and,
as with an arm64 object, ignores the file with a warning, or reports an
error with -arch_errors_fatal. This applies to archive members too.

lld linked these objects. Check the marker in the same way. ld64 accepts
unversioned and kernel-ABI objects in static links, so those links are
not checked.

Assisted-by: Claude Code



DeltaFile
+134-0lld/test/MachO/arm64e-input-abi.s
+31-11lld/MachO/InputFiles.cpp
+165-112 files