LLVM/project a2b7e3c — flang/lib/Semantics openmp-utils.cpp, flang/test/Lower/OpenMP metadirective-loop.f90

[flang][OpenMP] Compare metadirective conditions by symbol identity (#233581)

When a METADIRECTIVE condition is false at runtime, the later candidates
that test the same condition are dropped. Conditions were compared with
evaluate::Expr equality, which treats dummy arguments of different
procedures at the same position as equal, so that procedure
characteristics can be compared. A condition on a host-associated dummy
argument and one on a local dummy argument were therefore the same, and
the second variant was never tried. For the same reason, `a .and. b` was
normalized to `a`.

This patch also requires the two conditions to reference the same
symbols in the same order.

Fixes #233562.

Assisted-by: GitHub Copilot (Claude Opus 5.5)
DeltaFile
+72-0flang/test/Lower/OpenMP/metadirective-loop.f90
+28-2flang/lib/Semantics/openmp-utils.cpp
+100-22 files

LLVM/project 68ca288 — llvm/test/Transforms/AtomicExpand/AMDGPU expand-atomic-v2f16-agent.ll expand-atomic-v2bf16-agent.ll

[AtomicExpand] Update AMDGPU checks for preserved denormal metadata
DeltaFile
+104-104llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-agent.ll
+90-90llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-agent.ll
+82-82llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f32-system.ll
+72-72llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-f64-system.ll
+48-48llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2bf16-agent.ll
+44-44llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-v2f16-agent.ll
+440-4404 files not shown
+530-53010 files

LLVM/project bb716e3 — lldb/packages/Python/lldbsuite/test decorators.py, lldb/test/API/functionalities/process_save_core_minidump TestProcessSaveCoreMinidump64b.py TestProcessSaveCoreMinidump.py

[lldb][test] Add requireMinidumpSave test decorator (#233775)

So we don't have to remember to add all the supported architectures to
new tests.

You can confirm the supported architectures for
saving specifically by looking at
ArchThreadContexts::prepareRegisterContext.
Only x86_64 and AArch64 are handled.

(I think we can read for other architectures,
but I haven't confirmed that)

TestMinidumpReloadCrash.py also checked for "arm64" and "arm64e". So
I've included those in the require as well. This might result in more
tests running
where they didn't before.
DeltaFile
+8-8lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
+10-0lldb/packages/Python/lldbsuite/test/decorators.py
+2-2lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump64b.py
+1-2lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
+1-1lldb/test/API/tools/lldb-dap/save-core/TestDAP_save_core.py
+1-1lldb/test/API/functionalities/process_save_core_minidump_size_of_image/TestMinidumpSizeOfImage.py
+23-146 files

LLVM/project c015030 — flang/lib/Semantics check-omp-structure.h check-omp-structure.cpp, flang/test/Semantics/OpenMP metadirective-declare-reduction.f90

Verify DECLARE_REDUCTION in METADIRECTIVE
DeltaFile
+13-0flang/lib/Semantics/check-omp-variant.cpp
+7-2flang/lib/Semantics/check-omp-structure.cpp
+9-0flang/test/Semantics/OpenMP/metadirective-declare-reduction.f90
+1-0flang/lib/Semantics/check-omp-structure.h
+30-24 files

LLVM/project a5cfa5d — llvm/test/Transforms/AtomicExpand/X86 expand-atomic-rmw-elementwise.ll

[AtomicExpand] Regenerate X86 elementwise RMW checks
DeltaFile
+2-21llvm/test/Transforms/AtomicExpand/X86/expand-atomic-rmw-elementwise.ll
+2-211 files

LLVM/project 9574c66 — libcxx/utils/ci/lnt requirements.txt README.md

[libc++] Add a tool to find when a benchmark result changed (#233656)

Add `detect-changepoints`, which reads a time series line-by-line and
reports the changepoints in the time series.

The method is E-Divisive (Matteson & James, 2014), which has been used
for similar applications (e.g. MongoDB performance tooling similar to
what we're doing here, see [1]). Note that we're not using the
`signal-processing-algorithms` package [2] since that repo seems barely
maintained and does not support Python > 3.11.

[1]: https://dl.acm.org/doi/10.1145/3491204.3527488
[2]: https://github.com/mongodb/signal-processing-algorithms

Assisted by Claude
DeltaFile
+441-0libcxx/utils/ci/lnt/detect-changepoints
+30-0libcxx/utils/ci/lnt/README.md
+1-0libcxx/utils/ci/lnt/requirements.txt
+472-03 files

LLVM/project 0c2d390 — lldb/bindings/python python.swig, lldb/docs doxygen.cfg.in index.md

[lldb][docs] Use project-local documentation links (#228623)

Replace same-project absolute URLs with relative Markdown links and
Sphinx
cross-references so local and archived documentation stays
self-contained.
Update generated Python API docstrings at their header and SWIG inputs,
and repair stale Python and frame-recognizer destinations.

Validated by building LLDB docs with the new project self-link warning
in the upcoming PR.

Part of #214861

Assisted-by: Codex
DeltaFile
+4-4lldb/docs/use/lldbdap.md
+4-4lldb/docs/resources/lldbdap-contributing.md
+3-3lldb/docs/man/lldb.rst
+5-0lldb/bindings/python/python.swig
+2-2lldb/docs/index.md
+2-1lldb/docs/doxygen.cfg.in
+20-149 files not shown
+31-2215 files

LLVM/project 2ec1d14 — llvm/lib/Target/AArch64 AArch64AsmPrinter.cpp AArch64InstrAtomics.td, llvm/test/CodeGen/AArch64 rcpc3.ll

[AArch64] Support FP atomic stores with memory hints

This patch extends the atomic-store-hint pseudos to accept preserved
floating-point atomic stores. It adds an FPR16 pseudo family and direct
half, bfloat, float, and double patterns for the supported addressing
modes.

The pseudos expand relaxed stores to STR and RCPC3 release and
sequentially consistent stores to STLUR, retaining memory hints without
cross-register-bank copies.

The existing AArch64::ATOMIC_STORE_HINT_H is renamed to
AArch64::ATOMIC_STORE_HINT_HH and AArch64::ATOMIC_STORE_HINT_H now means
FP16 instead of it's old association with integer half-word.
DeltaFile
+145-0llvm/test/CodeGen/AArch64/rcpc3.ll
+65-6llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+43-11llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
+8-24llvm/test/CodeGen/AArch64/Atomics/aarch64-relaxed-store-hint.ll
+2-6llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-hint.ll
+4-4llvm/test/CodeGen/AArch64/Atomics/atomic-store-pseudo.mir
+267-512 files not shown
+273-588 files

LLVM/project 472606d — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrAtomics.td, llvm/test/CodeGen/AArch64 rcpc3.ll atomic-fp-cast.ll

[AArch64] Support direct RCPC3 FP atomic loads and stores

Preserve half, bfloat, float, and double atomic loads and stores
through AtomicExpand for acquire and release orderings, and preserve
sequentially consistent stores, when RCPC3 and NEON are available.

Add SelectionDAG patterns for the RCPC3 LDAPUR and STLUR operations,
including unscaled offsets, and update the existing FP lane patterns to
match the preserved floating-point atomic nodes. Targets without the
required features continue to use integer lowering.
DeltaFile
+182-0llvm/test/CodeGen/AArch64/atomic-fp-store.ll
+118-0llvm/test/CodeGen/AArch64/atomic-fp-load.ll
+65-8llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+45-5llvm/test/CodeGen/AArch64/atomic-fp-cast.ll
+20-12llvm/test/CodeGen/AArch64/rcpc3.ll
+9-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+439-256 files

LLVM/project e09cb2c — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrAtomics.td, llvm/test/CodeGen/AArch64 sincos-stack-slots.ll v8.4-atomic.ll

[AArch64] Support direct relaxed FP atomic loads and stores

This patch preserves half, bfloat, float, and double atomic loads and
stores through AtomicExpand when they use unordered or monotonic
ordering and the target supports floating point.

It adds SelectionDAG patterns that select the accesses directly in the
floating-point register bank. Unsupported targets, stronger orderings,
and stores carrying memory hints continue to use integer lowering.
DeltaFile
+116-32llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+68-0llvm/test/CodeGen/AArch64/atomic-fp-cast.ll
+41-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+16-16llvm/test/CodeGen/AArch64/relaxed-fp-atomics.ll
+8-8llvm/test/CodeGen/AArch64/v8.4-atomic.ll
+3-4llvm/test/CodeGen/AArch64/sincos-stack-slots.ll
+252-601 files not shown
+256-607 files

LLVM/project 57a1551 — llvm/lib/Target/AMDGPU BUFInstructions.td, llvm/test/CodeGen/AMDGPU llvm.amdgcn.struct.tbuffer.store.d16.ll llvm.amdgcn.raw.ptr.buffer.store.format.d16.ll

[AMDGPU][True16] Fix tbuffer d16 store patterns in true16 mode (#232567)

In real true16 mode a 16-bit value lives in a `VGPR_16`, but the d16
format
buffer pseudos take (stores) or define (loads) a 32-bit data register.
Several
patterns matched the 16-bit value directly against the 32-bit operand
class, so
isel emitted bare `VGPR_16` <-> `VGPR_32` copies with no subregister
index.

  Thread an `isTrue16` flag through the affected multiclasses:

- `MUBUF_StoreIntrinsicPat` / `MTBUF_StoreIntrinsicPat` use
`lo16_to_vgpr32` to
    widen `$vdata` into the low half of a `VGPR_32`.
- `MTBUF_LoadIntrinsicPat` takes the low half of the 32-bit result with
`vgpr32_lo16`. Unlike `buffer_load_d16_format_x`, there is no `_t16`
pseudo

    [8 lines not shown]
DeltaFile
+166-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
+166-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.format.d16.ll
+120-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.format.d16.ll
+120-0llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.format.d16.ll
+67-34llvm/lib/Target/AMDGPU/BUFInstructions.td
+53-24llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
+692-583 files not shown
+780-1059 files

LLVM/project b184b00 — llvm/lib/Target/AArch64 AArch64FrameLowering.cpp

[AArch64] Avoid use-after-free in FrameLowering (#233864)

`RGI.getRegisters()` returns a temporary small vector, which is
destroyed after `reverse_conditionally` returns.

See #233826
DeltaFile
+2-2llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+2-21 files

LLVM/project 1d58700 — clang/lib/CIR/CodeGen CIRGenStmtOpenMP.cpp, clang/test/CIR/CodeGenOpenMP not-yet-implemented.c teams-distribute.c

[CIR][OpenMP] Add initial support for distribute

This patch adds initial support for the OpenMP 'distribute' directive. Basic
code generation for the standalone and combined cases is introduced. Support
for clauses will be added in the future. The composite 'teams distribute
parallel for' form will be added in a subsequent patch.

Assisted-by: Cursor / Claude Sonnet 5 High
DeltaFile
+405-0clang/test/CIR/CodeGenOpenMP/target-teams-distribute.c
+146-29clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
+154-0clang/test/CIR/CodeGenOpenMP/teams-distribute.c
+12-0clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
+717-294 files

LLVM/project 272fedd — offload/test/offloading target-no-loop.c, offload/test/offloading/fortran target-no-loop.f90

Extend no-loop test coverage with large tripcount to check correct runtime grid-sizing
DeltaFile
+17-3offload/test/offloading/target-no-loop.c
+18-0offload/test/offloading/fortran/target-no-loop.f90
+35-32 files

LLVM/project 2e929ed — offload/test/offloading target-no-loop.c, offload/test/offloading/fortran target-no-loop.f90

Check teams and threads set by clauses in the default run
DeltaFile
+3-0offload/test/offloading/target-no-loop.c
+3-0offload/test/offloading/fortran/target-no-loop.f90
+6-02 files

LLVM/project 84dd35b — offload/test/offloading target-no-loop.c, offload/test/offloading/fortran target-no-loop.f90

[offload][OpenMP][NFC] Add a default-grid run to the no-loop tests

Add a run without OMP_NUM_TEAMS and OMP_TEAMS_THREAD_LIMIT to show the
kernels are promoted with the runtime's default grid as well.
DeltaFile
+9-0offload/test/offloading/target-no-loop.c
+9-0offload/test/offloading/fortran/target-no-loop.f90
+18-02 files

LLVM/project e52a8f5 — clang/include/clang/CIR/Dialect/IR CIRAttrs.td CIROps.td, clang/lib/CIR/Dialect/IR CIRDialect.cpp CIRTypes.cpp

[CIR] Admit only CIR types as nested CIR types

FuncType::verify required every type reachable from a signature to be a
CIR type, and proved it with a deep walk on every !cir.func construction.
#232863 memoized the walk in the dialect behind a mutex, but a record
that is still incomplete cannot be cached, and during CIRGen most of them
are.

The walk was needed because !cir.ptr, !cir.array, !cir.data_member,
!cir.bitfield and the record types took unconstrained mlir::Type
parameters. Constrain them to CIR types instead. Each type then checks
only its own parameters, a CIR type holds only CIR types at any depth,
and FuncType::verify checks only its inputs and result. The walk, the
cache and the mutex go away.

- Pointee, array element and data member types use a new
  CIR_DialectType constraint.
- Bit-field storage, record members and union padding are checked in
  their verifiers.

    [12 lines not shown]
DeltaFile
+55-0clang/test/CIR/IR/invalid-nested-types.cir
+36-14clang/lib/CIR/Dialect/IR/CIRTypes.cpp
+21-21clang/include/clang/CIR/Dialect/IR/CIROps.td
+0-34clang/test/CIR/IR/invalid-func.cir
+1-28clang/lib/CIR/Dialect/IR/CIRDialect.cpp
+9-9clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
+122-1066 files not shown
+157-12212 files

LLVM/project 7c52f3c — clang/include/clang/CIR/Dialect/IR CIRTypes.td, clang/unittests/CIR CMakeLists.txt RecordTypeVerifyTest.cpp

[CIR] Run record verifiers on get()

StructType and UnionType pulled in StorageUserBase's no-op
verifyInvariants template with `using Base::verifyInvariants`. get()
passes a unique_function as the diagnostic emitter, which matches the
template exactly, while the generated verifier takes a function_ref and
needs a conversion. Overload resolution picked the no-op, so record
verifiers only ran through getChecked(), i.e. in the parser.

The using-declaration was there so sub-element replacement could rebuild
an anonymous record with Base::get(ctx, key). Replace it with an overload
that takes the storage key and forwards to the generated verifier. In
builds with assertions, get() and replacement now verify records the same
way they verify every other CIR type.

Assisted-by: Claude Code (Claude Opus 5.5)
DeltaFile
+94-0clang/unittests/CIR/RecordTypeVerifyTest.cpp
+18-2clang/include/clang/CIR/Dialect/IR/CIRTypes.td
+1-0clang/unittests/CIR/CMakeLists.txt
+113-23 files

LLVM/project 0c9699e — llvm/lib/Target/AMDGPU VOP3Instructions.td, llvm/test/CodeGen/AMDGPU mad-mix-lo-bf16.ll float-to-arbitrary-fp-fp8-hw.ll

[AMDGPU][True16] Use vgpr32_lo16 for the scalar bf16 fpround result (#233659)

V_CVT_PK_BF16_F32_e64 defines a 32-bit register, so the single value
bf16 fpround pattern needs to take its low half in real true16 mode.
Split the pattern on True16Predicate and wrap the true16 form in
vgpr32_lo16.

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
DeltaFile
+214-382llvm/test/CodeGen/AMDGPU/bf16.ll
+49-53llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
+11-23llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
+4-0llvm/lib/Target/AMDGPU/VOP3Instructions.td
+278-4584 files

LLVM/project a915001 — flang/lib/Semantics resolve-names.cpp tools.cpp, flang/test/Semantics/OpenMP reduction14.f90 declare-reduction-bad-operator.f90

[flang][OpenMP] Improve diagnosing invalid operators in DECLARE_REDUCTION

Move the check out of the common MakeNameFromOperator function and
into OmpStructureChecker. Remove the no longer needed SemanticsContext
parameter in MakeNameFromOperator.

This will allow reusing at least some parts of the the name-mangling
code in DECLARE_INDUCTION.
DeltaFile
+51-19flang/lib/Semantics/check-omp-structure.cpp
+3-5flang/lib/Semantics/tools.cpp
+3-2flang/test/Semantics/OpenMP/reduction-subtract.f90
+2-2flang/test/Semantics/OpenMP/declare-reduction-bad-operator.f90
+1-2flang/lib/Semantics/resolve-names.cpp
+2-1flang/test/Semantics/OpenMP/reduction14.f90
+62-317 files not shown
+70-3913 files

LLVM/project 3bffd76 — clang/lib/Sema SemaDecl.cpp, clang/test/Sema/LifetimeSafety annotation-suggestions.cpp

[LifetimeSafety] Fix assertion failure inferring lifetimebound 'this' for deduced return types (#233558)

When the TU-wide inference decides a method's implicit object parameter
should be `[[clang::lifetimebound]]`, `addLifetimeBoundToImplicitThis`
wraps the method's function type in an AttributedType and rebuilds its
TypeLoc. It built the AttributedType from the method's (resolved) type
but copied the inner TypeLoc from the method's TypeSourceInfo.

For a method with a deduced 'auto' return type in a template
instantiation, the TypeSourceInfo still carries the written 'auto'
placeholder while the method's type has already been resolved to the
deduced type. The two disagree, so the wrapping AttributedTypeLoc's
inner type did not match the pushed inner TypeLoc, tripping a
TypeLocBuilder assertion (clang/lib/Sema/TypeLocBuilder.cpp):

```
Assertion failed: (TLast == LastTy && "mismatch between last type and new type's inner type")
```


    [25 lines not shown]
DeltaFile
+14-0clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
+11-1clang/lib/Sema/SemaDecl.cpp
+25-12 files

LLVM/project 5b6e697 — lldb/source/Plugins/Process/Utility lldb-riscv-register-enums.h, lldb/source/Register/Arch lldb-riscv-register-enums.h

Merge branch 'main' into users/usx95/10-14-experimental-group
DeltaFile
+0-4,730lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h
+4,730-0lldb/source/Register/Arch/lldb-riscv-register-enums.h
+4,185-0llvm/test/Transforms/LoopVectorize/WebAssembly/dequantize.ll
+820-1,000llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
+1,079-468llvm/test/Analysis/CostModel/AArch64/free-widening-casts.ll
+1,174-0llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-fp-to-int.ll
+11,988-6,1981,498 files not shown
+72,658-31,9181,504 files

LLVM/project ff9a490 — mlir/lib/Dialect/ArmSVE/Transforms LowerContractToSVEPatterns.cpp

[mlir][ArmSVE][NFC] Remove redundant scalability checks in contract lowering (#233868)

Replace
```cpp
if ( ... || !rhsType.getScalableDims()[0]) ...
  !rhsType.getScalableDims()[0])
```
with
```cpp
if ( ... || !rhsType.getScalableDims()[0]) ... )
```
DeltaFile
+2-4mlir/lib/Dialect/ArmSVE/Transforms/LowerContractToSVEPatterns.cpp
+2-41 files

LLVM/project e67b241 — flang/lib/Semantics canonicalize-omp.cpp, flang/test/Parser/OpenMP metadirective-dirspec.f90

[flang][OpenMP] Make sure that exec METADIRECTIVE is in execution part (#233147)

A METADIRECTIVE can be in either the specification part or the execution
part, depending on whether the variant directives contained in it are
declarative or executable. The OmpMetadirectiveDirective AST node can
hold any combination of variants, that is it can represent both kinds.
When the parser builds the specification part and attempts to create an
OmpMetadirectiveDirective, once it gets one it puts it in the
specification part regardless of the contents.

When an executable METADIRECTIVE is the first statement of the execution
part, it will end up in the specification part. This is an identical
situation as that for utility directives.

Recognize executable METADIRECTIVEs at the end of the specification part
and move them over to the beginning of the execution part.
DeltaFile
+86-21flang/lib/Semantics/canonicalize-omp.cpp
+59-2flang/test/Parser/OpenMP/metadirective-dirspec.f90
+145-232 files

LLVM/project f68ff0b — libc/src/__support/OSUtil/linux/syscall_wrappers setresuid.h setresgid.h, libc/src/unistd/linux setegid.cpp seteuid.cpp

[libc] Implement seteuid and setegid in unistd (#233088)

Implement the standard POSIX functions `seteuid` and `setegid` in
`<unistd.h>`.

Fixes #232380.

Assisted by Antigravity and reviewed by Aman Maurya.
DeltaFile
+40-0libc/src/__support/OSUtil/linux/syscall_wrappers/setresuid.h
+40-0libc/test/src/unistd/setegid_test.cpp
+40-0libc/test/src/unistd/seteuid_test.cpp
+40-0libc/src/__support/OSUtil/linux/syscall_wrappers/setresgid.h
+35-0libc/src/unistd/linux/setegid.cpp
+35-0libc/src/unistd/linux/seteuid.cpp
+230-011 files not shown
+396-017 files

LLVM/project 319e9a6 — llvm/include/llvm/IR RuntimeLibcallsImpl.td RuntimeLibcalls.td, llvm/lib/IR RuntimeLibcalls.cpp

RuntimeLibcalls: Use a single LibcallImpl for long double functions

Replace the per-format <func>l_{f80|f128|ppcf128} implementations with
a single <func>l implementaton. The concrete type is now derived from
the module/triple's LongDoubleFormat, so this is no longer a static
property.

On targets where long double is double, the l-suffixed functions do
not provide a libcall. This could be fixed in principle, but nothing
would use it in the compiler.

Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
DeltaFile
+37-77llvm/include/llvm/IR/RuntimeLibcalls.td
+33-9llvm/utils/TableGen/Basic/RuntimeLibcallsEmitter.cpp
+20-0llvm/lib/IR/RuntimeLibcalls.cpp
+17-1llvm/utils/TableGen/Basic/RuntimeLibcalls.h
+4-10llvm/unittests/IR/RuntimeLibcallsTest.cpp
+12-0llvm/include/llvm/IR/RuntimeLibcallsImpl.td
+123-977 files not shown
+142-11313 files

LLVM/project d491a36 — llvm/lib/Target/AArch64 AArch64ISelLowering.cpp AArch64InstrAtomics.td, llvm/test/CodeGen/AArch64 rcpc3.ll atomic-fp-cast.ll

[AArch64] Support direct RCPC3 FP atomic loads and stores

Preserve half, bfloat, float, and double atomic loads and stores
through AtomicExpand for acquire and release orderings, and preserve
sequentially consistent stores, when RCPC3 and NEON are available.

Add SelectionDAG patterns for the RCPC3 LDAPUR and STLUR operations,
including unscaled offsets, and update the existing FP lane patterns to
match the preserved floating-point atomic nodes. Targets without the
required features continue to use integer lowering.
DeltaFile
+182-0llvm/test/CodeGen/AArch64/atomic-fp-store.ll
+118-0llvm/test/CodeGen/AArch64/atomic-fp-load.ll
+65-8llvm/lib/Target/AArch64/AArch64InstrAtomics.td
+45-5llvm/test/CodeGen/AArch64/atomic-fp-cast.ll
+20-12llvm/test/CodeGen/AArch64/rcpc3.ll
+9-0llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+439-256 files

LLVM/project a207c14 — clang/lib/CodeGen CGOpenMPRuntimeGPU.cpp CGStmtOpenMP.cpp, clang/test/OpenMP target_loop_promotion.cpp

[NFC] Change strided loop name

Changes strided loop to be named grid-stride loop instead for less
ambiguity as stride describes the jump distance in general.
DeltaFile
+26-26clang/test/OpenMP/target_loop_promotion.cpp
+8-8offload/test/offloading/target-no-loop.c
+8-8offload/test/offloading/small_trip_count.c
+7-7clang/lib/CodeGen/CGOpenMPRuntimeGPU.h
+6-5clang/lib/CodeGen/CGStmtOpenMP.cpp
+5-5clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
+60-598 files not shown
+75-7314 files

LLVM/project fa32483 — llvm/lib/CodeGen/GlobalISel CombinerHelper.cpp, llvm/test/CodeGen/AArch64 fsh.ll overflow-vec.ll

feat(gisel): mirror trunc/xor/select demanded bits

Mirror SelectionDAG demand propagation, traversal, known-bits folding,
truncation of logical shifts, and XOR narrowing and simplifications.
Respect shared producers, legality and target profitability. Preserve
integer LLTs when narrowing and recognize known-constant shift amounts.

Share shift-amount validation, XOR/shift profitability, and target XOR
constant searches between selectors without an instruction variant.
Enable demanded-bits combining for RISC-V and preserve legal constant
types after legalization. Cover target immediates and shared-mask
bypasses with MIR and code-generation regressions.
DeltaFile
+3,378-4,562llvm/test/CodeGen/RISCV/GlobalISel/wide-scalar-shift-by-byte-multiple-legalization.ll
+508-508llvm/test/CodeGen/AArch64/overflow-vec.ll
+951-0llvm/test/CodeGen/AArch64/GlobalISel/combine-simplify-demanded-bits-trunc-xor-select.mir
+365-365llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
+292-43llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+159-172llvm/test/CodeGen/AArch64/fsh.ll
+5,653-5,65045 files not shown
+6,742-6,57151 files

LLVM/project 8b5f9c4 — flang/lib/Semantics check-omp-structure.cpp, flang/test/Semantics/OpenMP depobj-construct-v60.f90

Handle alternative syntax of DEPOBJ
DeltaFile
+50-0flang/test/Semantics/OpenMP/depobj-construct-v60.f90
+12-0flang/lib/Semantics/check-omp-structure.cpp
+62-02 files