LLVM/project d611791llvm/include/llvm/IR Function.h InstructionListener.h, llvm/lib/IR Function.cpp Value.cpp

refactoring
DeltaFile
+15-9llvm/include/llvm/IR/Function.h
+11-4llvm/lib/IR/Function.cpp
+6-2llvm/include/llvm/IR/InstructionListener.h
+1-3llvm/lib/IR/Value.cpp
+33-184 files

LLVM/project b4aa4d4llvm/lib/Target/X86 X86ISelLowering.cpp, llvm/test/CodeGen/X86 avx512-skx-insert-subvec.ll

[X86] combineINSERT_SUBVECTOR - only fold vXi1 zero-widening if scalar mask source has one use (#197125)

Fixes infinite loop reported on #192699
DeltaFile
+21-0llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll
+2-2llvm/lib/Target/X86/X86ISelLowering.cpp
+23-22 files

LLVM/project fccd6famlir/lib/Interfaces ControlFlowInterfaces.cpp

[mlir][Interfaces] Disallow tokens in `BranchOpInterface` / `RegionBranchOpInterface` verifiers
DeltaFile
+14-0mlir/lib/Interfaces/ControlFlowInterfaces.cpp
+14-01 files

LLVM/project 9ca55c0llvm/lib/Transforms/InstCombine InstCombineAddSub.cpp, llvm/test/Transforms/InstCombine sub-xor.ll

[InstCombine] Relax the requirements for (X ^ C2) + C -> (C2 + C) - X (#196897)

If (C2 - X) has no borrow between bits, it is equivalent to (X ^ C2).
A borrow would occur when c2_bit=0 and x_bit=1.
It follows that c2_bit=1 or x_bit=0 means no borrow.

Remove an artificial condition that C2 must be a low bits mask.

Proof: https://alive2.llvm.org/ce/z/uNMsg_
DeltaFile
+78-0llvm/test/Transforms/InstCombine/sub-xor.ll
+6-7llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
+84-72 files

LLVM/project 87cba87clang/test/AST ast-dump-templates.cpp, llvm/test/CodeGen/AArch64 bf16-v8-instructions.ll

Merge branch 'main' into users/jmmartinez/error_on_prune
DeltaFile
+652-9,305clang/test/AST/ast-dump-templates.cpp
+5,061-4,162llvm/test/CodeGen/Thumb2/mve-clmul.ll
+7,601-671llvm/test/CodeGen/AArch64/bf16-v8-instructions.ll
+8,195-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+8,182-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+6,873-0llvm/test/tools/llvm-mca/AArch64/Cortex/C1Premium-sve-instructions.s
+36,564-14,13810,621 files not shown
+527,596-229,59610,627 files

LLVM/project 3f88ed1llvm/test/MC/AMDGPU gfx13_asm_vop3.s gfx13_asm_vop3-fake16.s

Merge branch 'main' into users/jakos-sec/spr/safestack-add-sigaction-interceptor
DeltaFile
+8,195-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+8,182-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+5,587-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+5,574-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16-fake16.s
+4,106-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
+3,524-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp8.s
+35,168-0476 files not shown
+59,727-10,327482 files

LLVM/project c956013lld/ELF SyntheticSections.cpp

[lld] Remove unused argument of DataExtractor constructor (NFC) (#196361)

`AddressSize` parameter is not used by `DataExtractor` and will be
removed in the future. See #190519 for more context.
DeltaFile
+1-2lld/ELF/SyntheticSections.cpp
+1-21 files

LLVM/project fb18fe7clang/lib/CodeGen/TargetBuiltins ARM.cpp, clang/test/CodeGen/AArch64 cpu-supports-target.c

[AArch64] Guard against vector invalidation in EmitAArch64CpuSupports. (#196909)

This prevents the Vector from being invalidated whilst iterator over it.
As far as I can tell we were adding elements twice.

Fixes #196789
DeltaFile
+15-0clang/test/CodeGen/AArch64/cpu-supports-target.c
+3-2clang/lib/CodeGen/TargetBuiltins/ARM.cpp
+18-22 files

LLVM/project 9f3d304clang-tools-extra/clang-tidy/misc StaticInitializationCycleCheck.cpp StaticInitializationCycleCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] Add new check 'misc-static-initialization-cycle' (#175342)
DeltaFile
+395-0clang-tools-extra/clang-tidy/misc/StaticInitializationCycleCheck.cpp
+277-0clang-tools-extra/test/clang-tidy/checkers/misc/static-initialization-cycle.cpp
+63-0clang-tools-extra/docs/clang-tidy/checks/misc/static-initialization-cycle.rst
+31-0clang-tools-extra/clang-tidy/misc/StaticInitializationCycleCheck.h
+5-0clang-tools-extra/docs/ReleaseNotes.rst
+3-0clang-tools-extra/clang-tidy/misc/MiscTidyModule.cpp
+774-02 files not shown
+776-08 files

LLVM/project a469fe9llvm/test/Transforms/LoopVectorize skip-iterations.ll

[LV] Regenerate skip-iterations checks (NFC) (#197105)
DeltaFile
+154-8llvm/test/Transforms/LoopVectorize/skip-iterations.ll
+154-81 files

LLVM/project 58a639dclang-tools-extra/clang-tidy/hicpp HICPPTidyModule.cpp, clang-tools-extra/clang-tidy/tool check_alphabetical_order_test.py

[clang-tidy] Remove hicpp module [3/4] (#197076)

This is part three of removing the hicpp-* checks.

RFC:
https://discourse.llvm.org/t/rfc-regarding-the-current-status-of-hicpp-checks/89883

Part of https://github.com/llvm/llvm-project/issues/183462
DeltaFile
+16-11clang-tools-extra/docs/ReleaseNotes.rst
+0-24clang-tools-extra/clang-tidy/hicpp/HICPPTidyModule.cpp
+0-23clang-tools-extra/docs/clang-tidy/checks/hicpp/undelegated-constructor.rst
+10-10clang-tools-extra/test/clang-tidy/infrastructure/config-file.cpp
+10-6clang-tools-extra/clang-tidy/tool/check_alphabetical_order_test.py
+0-11clang-tools-extra/test/clang-tidy/checkers/hicpp/no-assembler-msvc.cpp
+36-8514 files not shown
+57-16720 files

LLVM/project ace5004clang/test/Headers wasm.c __clang_hip_math.hip, llvm/lib/Analysis ValueTracking.cpp

[ValueTracking] Handle sext, zext in computeConstantRange

Propagate constant ranges through sign extension, zero extension.
Extends the existing handling for truncations.
DeltaFile
+42-42clang/test/Headers/wasm.c
+57-0llvm/unittests/Analysis/ValueTrackingTest.cpp
+24-25clang/test/Headers/__clang_hip_math.hip
+17-4llvm/lib/Analysis/ValueTracking.cpp
+140-714 files

LLVM/project 51893b4llvm/lib/CodeGen MachineBlockPlacement.cpp

[MachineBlockPlacement] Fix use-after-erase (#197109)

`ComputedEdges.erase(FoundEdge)` invalidates `FoundEdge`, but the
function then returns `FoundEdge->second`. Read the bucket value into
a local before erasing.
DeltaFile
+6-5llvm/lib/CodeGen/MachineBlockPlacement.cpp
+6-51 files

LLVM/project e51bb36llvm/include/llvm/Analysis AliasAnalysis.h, llvm/lib/Analysis BasicAliasAnalysis.cpp AliasAnalysis.cpp

[AA] Respect potential synchronization effects of inline asm (#196965)

Respect potential synchronization effects of inline assembly calls on
not-yet-escaped memory.

We only do this if the call is both non-nosync and ModRefs "other"
memory. This is consistent with the atomic memory effects established in
https://github.com/llvm/llvm-project/pull/193768 and makes sure that
things like readonly/argmemonly continue to work as expected even for
frontends that do not emit nosync (which, right now, is all of them).

The limitation to inline asm should not actually exist: The issue
applies to all calls. This just fixes a particularly important case in a
targeted way. (The fact that inline asm memory barrier do not work as
expected is a problem for making optimizations of monotonic accesses
more aggressive, e.g. it caused issues for
https://github.com/llvm/llvm-project/pull/195015.)

The ability of inline asm (with a `~{memory}` clobber) to synchronize
was explicitly specified in
https://github.com/llvm/llvm-project/pull/150191.
DeltaFile
+35-0llvm/test/Analysis/BasicAA/atomics.ll
+15-1llvm/lib/Analysis/BasicAliasAnalysis.cpp
+2-4llvm/lib/Analysis/AliasAnalysis.cpp
+5-0llvm/include/llvm/Analysis/AliasAnalysis.h
+57-54 files

LLVM/project c85f29fllvm/lib/Target/PowerPC PPCISelLowering.cpp, llvm/test/CodeGen/PowerPC pr175297.ll

[PowerPC] Fix types when emitting ppc_altivec_vupklsw (#187789)

When lowering BUILD_VECTOR, we produce this intrinsic node, but fail to
adjust the input/output types to ensure ISel works.
This patch simply adds the necessary bitcasts.

Fixes: https://github.com/llvm/llvm-project/issues/175297
DeltaFile
+92-0llvm/test/CodeGen/PowerPC/pr175297.ll
+4-1llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+96-12 files

LLVM/project cc7353bllvm/test/MC/AMDGPU gfx13_asm_vop3.s gfx13_asm_vop3-fake16.s

[AMDGPU] Add VOP3 encoding for gfx13 (#196258)

Co-authored-by: Ivan Kosarev <ivan.kosarev at amd.com>
DeltaFile
+8,195-0llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
+8,182-0llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
+5,587-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16.s
+5,574-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp16-fake16.s
+4,106-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1-fake16.s
+3,524-0llvm/test/MC/AMDGPU/gfx13_asm_vop3_dpp8.s
+35,168-010 files not shown
+39,596-29816 files

LLVM/project 7fddf99clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode fixed-point.cpp

[clang][bytecode] Pass correct QualType to getFixedPointSemantics() (#196952)

The expression type might be different, so pass the QualType we have at
hand.
DeltaFile
+5-0clang/test/AST/ByteCode/fixed-point.cpp
+1-1clang/lib/AST/ByteCode/Compiler.cpp
+6-12 files

LLVM/project 4ef1ef5llvm/test/TableGen aarch64-apple-tuning-features.td

[AArch64] Add a regression test for Apple tuning features(NFC) (#196792)

This patch adds a TableGen regression test that directly checks complete
featrure lists per generation for Apple CPUs, to guard against changes
that can break the <CPU,features> association if we lack indirect
coverage.
    
A followup patch should introduce generational delta encoding for Apple
tuning features that this test should help verify.
DeltaFile
+28-0llvm/test/TableGen/aarch64-apple-tuning-features.td
+28-01 files

LLVM/project 05f1fd3.github/workflows release-doxygen.yml

[github] Fix invalid local action invocation in release-doxygen workflow (#197107)

Fix the `Validate Input` step in `.github/workflows/release-doxygen.yml`
to use a valid local action invocation.

Before:
```yaml
- name: Validate Input
  ./.github/workflows/validate-release-version
  with:
    release-version: ${{ inputs.release-version }}
```

After:
```yaml
- name: Validate Input
  uses: ./.github/workflows/validate-release-version
  with:
    release-version: ${{ inputs.release-version }}

    [9 lines not shown]
DeltaFile
+1-1.github/workflows/release-doxygen.yml
+1-11 files

LLVM/project 8789401clang/lib/AST/ByteCode Compiler.cpp, clang/test/AST/ByteCode arrays.cpp

[clang][bytecode] Fix a crash with invalid ArraySubscriptExprs (#196964)

In the attached test case, `arr` becomes the _index_, not the base,
which causes us later to run into issues because the index is a pointer
and not an integer.
DeltaFile
+8-0clang/test/AST/ByteCode/arrays.cpp
+1-1clang/lib/AST/ByteCode/Compiler.cpp
+9-12 files

LLVM/project 4917810llvm/runtimes CMakeLists.txt

libclc: Pass LLVM_NATIVE_TOOL_DIR to runtime builds (#196498)

This patch sets `LLVM_NATIVE_TOOL_DIR` in the runtime build
configuration to point to the directory containing the just-built LLVM
tools, allowing libclc to find them without requiring them to be
installed on the host system.

Fixes build errors like:

```
  Error evaluating generator expression: $<TARGET_FILE:opt>
  No target "opt"
```

A few lines above this change, `extra_deps` list of dependencies for
libclc is created. But those tools don't get build in the runtime build.
We build libclc in the monolithic build and there we have all the tools
which is why I've added the path to discover the tools.
DeltaFile
+6-0llvm/runtimes/CMakeLists.txt
+6-01 files

LLVM/project 0312369llvm/lib/CodeGen/GlobalISel RegBankSelect.cpp

[GlobalISel] Defer RegBankSelect operand mapper creation (#196985)

RegBankSelect::applyMapping constructs an OperandsMapper before applying
repairs. Default mappings that only need Reassign repairs only update
the register bank and do not create replacement operands, so the generic
applyDefaultMapping path has no rewriting work to do in that case.

Defer OperandsMapper creation until an Insert repair actually needs new
virtual registers. If no mapper was needed for a default mapping, return
after applying the repairs.

CTMark geomean -0.23% improvement on aarch64-O0-g.

https://llvm-compile-time-tracker.com/compare.php?from=ed50ea52004259af958bb3e5636268342c49ee62&to=1a4730426e14969626cad43c6b06e93bde707bd1&stat=instructions%3Au

Assisted-by: Codex
DeltaFile
+15-5llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+15-51 files

LLVM/project 8ecec45clang/lib/Basic TargetInfo.cpp, clang/lib/Basic/Targets AArch64.cpp

[clang] Fix x86_64-windows-msvc over- and under-alignment (#196505)

This fixes two issues where Clang was both over- and under-aligning
variables:

1) We were applying the x86_64 Sys V psABI "large array" alignment increase
(default when inheriting from X86_64TargetInfo), but MSVC doesn't follow
that ABI.

2) MSVC implements a similar scheme though, where it increases the
alignment of large objects. This is documented for ARM64 [1] and was
implemented in Clang b7c6d95af5e295c560d1445e7090e31eb9289932, but it
also applies to x86_64. ([2] says "MSVC does size (total size, not
element size) based alignment for global symbols on ARM64 *which is
copied from AMD64*").

This patch stops doing 1) and implements 2) for x86_64-windows-msvc.

[1]

    [4 lines not shown]
DeltaFile
+0-27clang/test/CodeGen/arm64-microsoft-struct-align.cpp
+27-0clang/test/CodeGen/microsoft-64bit-struct-align.cpp
+17-0clang/lib/Basic/TargetInfo.cpp
+8-8clang/test/CodeGenSYCL/kernel-caller-entry-point.cpp
+1-12clang/lib/Basic/Targets/AArch64.cpp
+10-0clang/test/CodeGen/align-x68_64.c
+63-476 files not shown
+84-5212 files

LLVM/project ccf8ba9clang/lib/CodeGen CGStmt.cpp, clang/test/CIR/CodeGen try-catch-non-trivial-copy.cpp

Merge upstream/main into users/mariusz-sikora-at-amd/gfx13/add-vop3
DeltaFile
+323-314llvm/test/Instrumentation/MemorySanitizer/X86/avx512-intrinsics-upgrade.ll
+329-277clang/lib/CodeGen/CGStmt.cpp
+212-394llvm/test/Transforms/LoopVectorize/RISCV/strided-accesses.ll
+541-0clang/test/CIR/CodeGen/try-catch-non-trivial-copy.cpp
+528-1clang/test/CodeGen/AArch64/neon/perm.c
+1-421clang/test/CodeGen/AArch64/neon-perm.c
+1,934-1,407368 files not shown
+17,840-9,361374 files

LLVM/project e0fc8f9llvm/docs AMDGPUUsage.rst, llvm/test/CodeGen/AMDGPU amdgcn-av-scopes.ll unsupported-av-load.ll

expanded wgp mode, with tests
DeltaFile
+660-8llvm/test/CodeGen/AMDGPU/amdgcn-av-scopes.ll
+25-20llvm/docs/AMDGPUUsage.rst
+6-6llvm/test/CodeGen/AMDGPU/unsupported-av-load.ll
+6-6llvm/test/CodeGen/AMDGPU/unsupported-av-store.ll
+697-404 files

LLVM/project 475f620llvm/docs AMDGPUUsage.rst

fix the tables for the lowering of cache bits
DeltaFile
+37-30llvm/docs/AMDGPUUsage.rst
+37-301 files

LLVM/project a5d8825llvm/lib/Transforms/Vectorize VPlanUtils.cpp, llvm/unittests/Transforms/Vectorize VPlanTest.cpp

[VPlan] Add SCEV support for abs intrinsic (#195678)

Teach `getSCEVExprForVPValue` to model `llvm.abs` via
`ScalarEvolution::getAbsExpr`, preserving the intrinsic's
is_int_min_poison flag as the SCEV IsNSW argument. Add a unit test
covering both poison and wrapping llvm.abs forms.
DeltaFile
+38-0llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
+7-0llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
+45-02 files

LLVM/project 358b5e8llvm/lib/Transforms/IPO Instrumentor.cpp InstrumentorConfigFile.cpp, llvm/test/Instrumentation/Instrumentor multi_config.ll alloca_and_function.ll

[Instrumentor] Allow multiple config files with different filters

To instrument different functions in different ways we allow to provide
multiple config files now. Each file will result in one instrumentation
run. Multiple files can be passed via command line option or listed in
a "summary" file that is passed via command line option (to keep the
command length managable).
DeltaFile
+53-14llvm/lib/Transforms/IPO/Instrumentor.cpp
+56-0llvm/test/Instrumentation/Instrumentor/multi_config.ll
+20-20llvm/test/Instrumentation/Instrumentor/alloca_and_function.ll
+37-0llvm/lib/Transforms/IPO/InstrumentorConfigFile.cpp
+16-0llvm/test/Instrumentation/Instrumentor/multi_config_4.json
+12-0llvm/test/Instrumentation/Instrumentor/multi_config_2.json
+194-3416 files not shown
+248-4622 files

LLVM/project b4d906fllvm/include/llvm/Transforms/IPO Instrumentor.h, llvm/lib/Transforms/IPO Instrumentor.cpp

[Instrumentor] Add a global function regexp to limit the instrumentation

Only functions that match the "function_regex" will be instrumented,
or if they have the instrumentation attribute.
DeltaFile
+57-0llvm/test/Instrumentation/Instrumentor/function_regex.ll
+26-0llvm/test/Instrumentation/Instrumentor/function_regex.json
+26-0llvm/test/Instrumentation/Instrumentor/bad_function_regex.json
+22-4llvm/lib/Transforms/IPO/Instrumentor.cpp
+13-0llvm/test/Instrumentation/Instrumentor/bad_function_regexp.ll
+7-1llvm/include/llvm/Transforms/IPO/Instrumentor.h
+151-51 files not shown
+154-67 files

LLVM/project a2b1b2dclang/test/Instrumentor UnreachableRT.cpp InstrumentorUnreachable.cpp, llvm/include/llvm/Transforms/IPO Instrumentor.h

[Instrumentor] Add unreachable support; unreachable stack trace printing

Allow to instrument unreachable and provide a use case for stack trace
printing.
DeltaFile
+22-0clang/test/Instrumentor/UnreachableRT.cpp
+21-0llvm/include/llvm/Transforms/IPO/Instrumentor.h
+20-0clang/test/Instrumentor/InstrumentorUnreachable.cpp
+15-0clang/test/Instrumentor/UnreachableRT.json
+12-0llvm/lib/Transforms/IPO/Instrumentor.cpp
+5-1clang/test/Instrumentor/lit.local.cfg
+95-11 files not shown
+100-17 files