LLVM/project 82ecbebclang/lib/Driver Driver.cpp, clang/test/Driver crash-diagnostics-tar.c crash-diagnostics-modules.c

Revert "[clang] Add -fcrash-diagnostics-tar for tarball of crash reproducer f…"

This reverts commit e44d060dfd617e8a5e37b61adcb38ed4ac5d782d.
DeltaFile
+7-73clang/lib/Driver/Driver.cpp
+0-36clang/test/Driver/crash-diagnostics-tar.c
+0-16clang/test/Driver/crash-diagnostics-modules.c
+2-2clang/test/Driver/crash-report-modules.m
+2-2clang/test/Driver/lld-repro.c
+2-2clang/test/Driver/crash-report-null.test
+13-13127 files not shown
+37-17033 files

LLVM/project 9a423a2llvm/lib/Transforms/InstCombine InstructionCombining.cpp, llvm/test/Transforms/InstCombine select_meta.ll

[InstCombine] Avoid propagating invalid metadata in FoldOpIntoSelect (#199155)

Fixes #186471

FoldOpIntoSelect may create a select with a different result type from
the original instruction. The existing implementation blindly copied all
metadata from the original select, which could propagate invalid
type-specific metadata to the transformed instruction.

In particular, folding an fcmp over a floating-point select could copy
!fpmath metadata onto a non-FP select, producing invalid IR and causing
verifier failures.

This change preserves only metadata that remains valid for the
transformed select and propagates !fpmath only for FP-typed selects.
Debug locations are also preserved explicitly.
DeltaFile
+16-1llvm/test/Transforms/InstCombine/select_meta.ll
+11-1llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+27-22 files

LLVM/project 8b140d4llvm/include/llvm/Target/GlobalISel Combine.td, llvm/lib/Target/AArch64 AArch64Combine.td

[AArch64][GlobalISel] Add select to and combines (#200131)

This adds combines for
// select c, x, 0 -> and c, x
// select c, 0, x -> and (not c), x
// select (not c), x, y -> select c, y, x

We need to freeze the value in the first two. The second is only
profitable if hasAndNot, so it excluded from all_combines.
https://alive2.llvm.org/ce/z/eG-aHT

This helps alleviate regressions when G_SELECT is made legal for vector
operations under AArch64. The AMD tests I am not sure about - let me
know if they look worse. The third combine is mostly useful
post-legalize.
DeltaFile
+73-0llvm/test/CodeGen/AArch64/GlobalISel/combine-select-zero.mir
+30-1llvm/include/llvm/Target/GlobalISel/Combine.td
+16-14llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
+10-9llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
+3-3llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
+3-1llvm/lib/Target/AArch64/AArch64Combine.td
+135-286 files

LLVM/project 6d1eed6llvm/lib/CodeGen ReachingDefAnalysis.cpp

[RDA] Slightly optimize enterBasicBlock() (NFC) (#201608)

Instead of initializing LiveRegs and doing an elementwise std::max with
the first incoming predecessor, directly copy the data for the first
predecessor.
DeltaFile
+13-5llvm/lib/CodeGen/ReachingDefAnalysis.cpp
+13-51 files

LLVM/project 01dbfa0flang-rt/lib/runtime io-stmt.cpp edit-input.cpp, flang-rt/unittests/Runtime Namelist.cpp ListInputTest.cpp

[flang-rt] Extension: accept '!' as value separator in NAMELIST input (#200441)

Treat '!' as a self-delimiting value separator when reading NAMELIST
input, so that "name=value!comment" is accepted without an intervening
blank, comma, slash, or end of record. This matches gfortran, ifx, and
classic nvfortran behavior on real-world namelist input files.

F2023 13.11.3.6 p.1 requires a value separator before a '!' comment
introducer in namelist input, so this is a documented extension. The
change does not affect '!' characters inside character literal
constants, which continue to be taken literally.

The extension was documented in flang/docs/Extensions.md.

Assisted-by: AI
DeltaFile
+50-0flang-rt/unittests/Runtime/Namelist.cpp
+18-0flang-rt/unittests/Runtime/ListInputTest.cpp
+9-0flang/docs/Extensions.md
+8-0flang-rt/lib/runtime/io-stmt.cpp
+1-1flang-rt/lib/runtime/edit-input.cpp
+86-15 files

LLVM/project e44d060clang/include/clang/Options Options.td, clang/lib/Driver Driver.cpp

[clang] Add -fcrash-diagnostics-tar for tarball of crash reproducer files (#198838)

Makes it easier to move around crash diagnostics.
DeltaFile
+73-7clang/lib/Driver/Driver.cpp
+36-0clang/test/Driver/crash-diagnostics-tar.c
+16-0clang/test/Driver/crash-diagnostics-modules.c
+2-2clang/tools/driver/driver.cpp
+4-0clang/include/clang/Options/Options.td
+2-2clang/test/Driver/lld-repro.c
+133-1127 files not shown
+170-3733 files

LLVM/project fbe7392mlir/lib/Dialect/X86/Transforms VectorContractToAMXDotProduct.cpp VectorContractToPackedTypeDotProduct.cpp, mlir/test/Dialect/X86 vector-contract-to-packed-type-dotproduct.mlir

[mlir][x86] Fix - replace `vector.load` with `vector.transfer_read` (#201503)

This patch replaces `vector.load` with `vector.transfer_read` to load
elements as `vector<2x32xi8>` instead of `vector<64xi8>`. This fixes the
online shuffling for `int8` and `f8` types.
DeltaFile
+34-15mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
+17-4mlir/lib/Dialect/X86/Transforms/VectorContractToPackedTypeDotProduct.cpp
+10-0mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
+6-0mlir/test/Dialect/X86/vector-contract-to-packed-type-dotproduct.mlir
+67-194 files

LLVM/project 48f50e8llvm/lib/CodeGen MachineCopyPropagation.cpp

[MCP] Early exit if no copies (NFC) (#201602)

These two functions do expensive per-regunit work, but are no-ops if
there are no Copies, so short-circuit this case.
DeltaFile
+10-0llvm/lib/CodeGen/MachineCopyPropagation.cpp
+10-01 files

LLVM/project 1e87cdfutils/bazel/llvm-project-overlay/compiler-rt BUILD.bazel

Include AArch64 SME builtins to compiler-rt for Bazel. (#196607)

Include the AArch64 SME (Scalable Matrix Extension) source files in the
compiler-rt builtins library when targeting aarch64. Added a selection
based on OS platform to use either Apple or Non-Apple sources.
DeltaFile
+9-0utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
+9-01 files

LLVM/project a314c10utils/bazel/llvm-project-overlay/libc BUILD.bazel

[bazel][NFC] Run buildifier on libc/BUILD.bazel (#201616)

Out of order deps
DeltaFile
+1-1utils/bazel/llvm-project-overlay/libc/BUILD.bazel
+1-11 files

LLVM/project 27d0d76llvm/lib/Target/X86 X86InstrSystem.td, llvm/test/MC/Disassembler/X86 ibhf-64.txt

[X86] Add encoding support for indirect branch history fence (#200918)

This patch introduces ISA under BHI_CTRL CPUID.
The following tech paper is published in May, 2025:


[intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html#ibhf](https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/branch-history-injection.html#ibhf)

As shown in the paper, The encoding is F3 48 0F 1E F8.
It does not need c-intrinsic.

---------

Co-authored-by: mattarde <mattarde at intel.com>
DeltaFile
+7-0llvm/lib/Target/X86/X86InstrSystem.td
+5-0llvm/test/MC/X86/ibhf-64.s
+5-0llvm/test/MC/Disassembler/X86/ibhf-64.txt
+17-03 files

LLVM/project f9a408cclang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp Origins.cpp

[LifetimeSafety] Track per-field origins for record types
DeltaFile
+315-5clang/test/Sema/warn-lifetime-safety.cpp
+68-37clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+91-6clang/lib/Analysis/LifetimeSafety/Origins.cpp
+17-0clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+4-6clang/test/Sema/warn-lifetime-safety-dangling-field.cpp
+0-1clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+495-556 files

LLVM/project f0887a2clang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h, clang/lib/Analysis/LifetimeSafety Origins.cpp

[LifetimeSafety][NFC] Collect accessed fields in a unified pre-scan
DeltaFile
+22-8clang/lib/Analysis/LifetimeSafety/Origins.cpp
+15-4clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+37-122 files

LLVM/project e847e5fclang/include/clang/Analysis/Analyses/LifetimeSafety Origins.h FactsGenerator.h, clang/lib/Analysis/LifetimeSafety FactsGenerator.cpp LiveOrigins.cpp

[LifetimeSafety][NFC] Add field-labeled child edges to OriginNode and generalize subtree walks
DeltaFile
+58-25clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
+26-10clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
+21-12clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
+16-8clang/lib/Analysis/LifetimeSafety/Facts.cpp
+7-3clang/lib/Analysis/LifetimeSafety/Origins.cpp
+3-0clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
+131-586 files

LLVM/project 816e292clang/docs ReleaseNotes.rst, clang/include/clang/Basic DiagnosticSemaKinds.td

[Clang] Correct diagnostic notes for C++11 range-based for statements with invalid iterator types (#201461)

Previously, diagnostic notes issued for errors encountered due to invalid
iterator types in C++11 range-based for statements reported the range type
as the iterator type instead of the invalid iterator type.  Now fixed.
DeltaFile
+42-0clang/test/SemaCXX/for-range-dereference.cpp
+6-3clang/lib/Sema/SemaStmt.cpp
+5-1clang/include/clang/Basic/DiagnosticSemaKinds.td
+2-2clang/test/SemaCXX/co_await-range-for.cpp
+3-0clang/docs/ReleaseNotes.rst
+1-1clang/test/CXX/stmt.stmt/stmt.iter/stmt.ranged/p1.cpp
+59-76 files

LLVM/project 017380dllvm/lib/Target/AArch64 AArch64InstrInfo.td, llvm/lib/Target/AArch64/GISel AArch64RegisterBankInfo.cpp

[AArch64][GlobalISel] Add pattern to prevent scalar uqxtn fallback (#201546)

Previously, attempting to select the intrinsic
@llvm.aarch64.neon.scalar.uqxtn would cause GlobalISel to fall back to
SDAG.
This was both due to:
1. RegBankSelect placing the operands on gpr banks.
2. No instruction selection patterns for the intrinsic.
Add pattern, and fix RegBankSelect to place operands on the correct
banks.
DeltaFile
+8-1llvm/test/CodeGen/AArch64/arm64-arith-saturating.ll
+3-0llvm/lib/Target/AArch64/AArch64InstrInfo.td
+1-0llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
+12-13 files

LLVM/project 9f53175llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV][P-ext] Support packed bswap/bitreverse. (#200448)

We can implement these using combinations of rev, rev8, and ppairoe.*.

Rename REV16->REV16_RV64. A hypothetical REV16 on RV32 would have a
different encoding like REV and REV8.

Long term we should probably custom lower these instead of having
complex isel patterns. That would allow additional optimizations. But I
think the isel patterns are fine as a starting point.
DeltaFile
+17-146llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+14-45llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+39-1llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+6-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+76-1934 files

LLVM/project 8858dddclang/include/clang/Basic AttrDocs.td Attr.td

[Clang][Docs] Documented sentinel attribute (#196088)

The documentation of the sentinel attribute was missing, this PR
documents the behavior of the sentinel attribute.
DeltaFile
+64-2clang/include/clang/Basic/AttrDocs.td
+1-1clang/include/clang/Basic/Attr.td
+65-32 files

LLVM/project 6530683clang/lib/CIR/CodeGen CIRGenBuiltinAArch64.cpp, clang/test/CodeGen/AArch64 neon-intrinsics.c neon-across.c

[CIR] Maximum across vector (IEEE754) (#199779)

Part of https://github.com/llvm/llvm-project/issues/185382

Move the test cases to

[intrinsics.c](https://github.com/llvm/llvmproject/pull/clang/test/CodeGen/AArch64/neon/intrinsics.c)
Removed the test cases from

[neon-intrinsics.c](https://github.com/llvm/llvmproject/pull/clang/test/CodeGen/AArch64/neon/intrinsics.c)

Removed [neon-across.c](clang/test/CodeGen/AArch64/neon-across.c)

---------

Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
DeltaFile
+35-0clang/test/CodeGen/AArch64/neon/intrinsics.c
+0-20clang/test/CodeGen/AArch64/neon-intrinsics.c
+0-18clang/test/CodeGen/AArch64/neon-across.c
+3-0clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
+38-384 files

LLVM/project ef86984utils/bazel MODULE.bazel.lock extensions.bzl, utils/bazel/third_party_build zlib-ng.BUILD zstd.BUILD

[Bazel]: Pull from Bazel-Central-Registry for third party deps. (#197316)

The majority of these dependencies are available in the
[Bazel-Central-Registry](https://github.com/bazelbuild/bazel-central-registry)
(BCR) and to improve build performance for bzlmod users, llvm-project
should pull from the BCR to consolidate targets.
DeltaFile
+34-83utils/bazel/MODULE.bazel.lock
+0-105utils/bazel/third_party_build/zlib-ng.BUILD
+16-70utils/bazel/extensions.bzl
+0-44utils/bazel/third_party_build/zstd.BUILD
+0-43utils/bazel/third_party_build/pfm.BUILD
+0-38utils/bazel/third_party_build/nanobind.BUILD
+50-38312 files not shown
+91-55718 files

LLVM/project 1fe66fcllvm/include/llvm/Target/GlobalISel Combine.td, llvm/test/CodeGen/AMDGPU/GlobalISel prelegalizer-combiner-redundant-bitcast.mir

[GlobalISel] Add bitcast chain combine (#200694)
DeltaFile
+8-1llvm/include/llvm/Target/GlobalISel/Combine.td
+3-4llvm/test/CodeGen/AMDGPU/GlobalISel/prelegalizer-combiner-redundant-bitcast.mir
+11-52 files

LLVM/project 9d3f50allvm/test/CodeGen/X86 machine-block-hash.mir

[X86] Fix MachineBlockInfo hash for machine-block-hash.mir (#201039)

I looked at llvm/include/llvm/CodeGen/MachineBlockHashInfo.h,
BlendedBlockHash function and rewrote failing test.

---------

Co-authored-by: mattarde <mattarde at intel.com>
DeltaFile
+16-6llvm/test/CodeGen/X86/machine-block-hash.mir
+16-61 files

LLVM/project 2e9f45aclang/include/clang/Driver Driver.h, clang/lib/Driver Driver.cpp

[clang][driver] Rename ClangExecutable and getClangProgramPath (NFC) (#200814)

This patch is to rename ClangExecutable to DriverExecutable and 
getClangProgramPath to getDriverProgramPath. This makes the 
name more neutral and less confusing when used in flang.
DeltaFile
+5-7clang/include/clang/Driver/Driver.h
+6-6clang/lib/Driver/Driver.cpp
+5-5clang/lib/Driver/ToolChains/Clang.cpp
+4-4clang/unittests/Driver/ToolChainTest.cpp
+2-2clang/lib/Driver/ToolChains/CommonArgs.cpp
+1-2clang/lib/Driver/ToolChains/AIX.cpp
+23-266 files not shown
+29-3212 files

LLVM/project 6e58021llvm/include/llvm/CodeGen ScheduleDAGInstrs.h, llvm/lib/CodeGen ScheduleDAGInstrs.cpp

[MachineScheduler] Rework dag-maps-huge-region (#200945)

For compile time/memory reasons, dag-maps-huge-region is the number of
memory instructions at which we create a barrier and reset maps.
Previously we'd get to dag-maps-huge-region number of instructions, then
add a barrier in the middle of the current set of instructions, and
continue processing the second half of remaining instructions.

With this change, now we simply add a barrier every time we reach
dag-maps-huge-region number of memory instructions, and blow away all
previous instructions.

So now instead of waiting until we get to 1000 memory operations before
creating a barrier for 500 of them, we do it at 500 and do it for all
500.

With this change, -dag-maps-huge-region=500 still has
addChainDependencies() taking up over half of the codegen pipeline in
some cases I looked at, but it's much better than the previous 90%.
DeltaFile
+3,563-3,543llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
+921-907llvm/test/CodeGen/X86/vector-interleaved-load-i64-stride-8.ll
+401-399llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-8.ll
+31-116llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+60-0llvm/test/CodeGen/AArch64/dag-maps-huge-region.ll
+2-13llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
+4,978-4,9781 files not shown
+4,980-4,9807 files

LLVM/project 50347f5cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts lit.local.cfg

[Dexter][NFC] Mark script tests unsupported for non-lldb debuggers (#201596)

The recently-added structured script feature currently relies on
DAP-based debuggers, of which the only one currently supported by Dexter
is LLDB. In order to prevent the tests that depend on this feature from
running for other debuggers, we require LLDB for the script test
directory.
DeltaFile
+3-0cross-project-tests/debuginfo-tests/dexter/feature_tests/scripts/lit.local.cfg
+3-01 files

LLVM/project 4046fd0llvm/lib/Analysis ModuleSummaryAnalysis.cpp, llvm/lib/Transforms/IPO FunctionImport.cpp

[ThinLTO][AIX] Teach ModuleSummaryAnalysis to include globals
referenced via !implicit.ref metadata as explicit reference edges in the ThinLTO
module summary via a new helper findImplicitRefEdges. Add imported
implicit ref strings (available_externally GVs) to llvm.compiler.used during thinLTO interaction with pragma comment copyright.
DeltaFile
+60-38llvm/test/LTO/PowerPC/pragma-comment-copyright-lto.ll
+67-0llvm/test/LTO/PowerPC/pragma-comment-copyright-thinlto.ll
+39-0llvm/test/Analysis/ModuleSummaryAnalysis/implicit-ref-edges.ll
+34-0llvm/lib/Transforms/IPO/FunctionImport.cpp
+17-11llvm/lib/Transforms/Utils/LowerCommentStringPass.cpp
+24-0llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
+241-492 files not shown
+254-598 files

LLVM/project 9fbb941mlir/lib/Conversion/FuncToEmitC FuncToEmitC.cpp, mlir/test/Conversion/FuncToEmitC func-to-emitc-failed.mlir

[mlir][Func][EmitC] Bail-out to avoid errors from MemRef array conversions (#198583)

Update FuncToEmitC to bail-out before creating invalid EmitC ops for
unsupported cases.

FuncToEmitC now rejects functions, calls, and returns whose converted
result type is `emitc.array`, instead of relying on later `emitc.func`,
`emitc.call`, or `emitc.return` verifier failures.

This does not add support for returning memrefs from functions. It only
makes the existing limitation explicit at the conversion boundary.

## Tests

Added negative tests for the standalone conversion pass. This pass marks
their source ops illegal, so when a pattern bails-out the pass reports a
legalization failure. This is the expected behavior and documents the
unsupported cases directly.


    [5 lines not shown]
DeltaFile
+93-0mlir/test/Conversion/FuncToEmitC/func-to-emitc-failed.mlir
+18-0mlir/lib/Conversion/FuncToEmitC/FuncToEmitC.cpp
+111-02 files

LLVM/project 2172884clang/include/clang/Basic arm_sve.td, clang/test/CodeGen/AArch64/sme2p3-intrinsics acle_sme2p3_luti6.c

fixup! Reformat classes to make more sense, and other CR updates
DeltaFile
+27-27llvm/lib/Target/AArch64/SVEInstrFormats.td
+45-3llvm/test/CodeGen/AArch64/sme2p3-intrinsics-luti6.ll
+22-23llvm/lib/Target/AArch64/SMEInstrFormats.td
+26-18llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+32-8clang/test/CodeGen/AArch64/sme2p3-intrinsics/acle_sme2p3_luti6.c
+2-2clang/include/clang/Basic/arm_sve.td
+154-813 files not shown
+156-859 files

LLVM/project 040070dclang/test/Sema/AArch64 arm_sve_streaming_only_sme_AND_sme2p3.c arm_sve_feature_dependent_sve_AND_sve2p3___sme_AND_LP_sve2p3_OR_sme2p3_RP.c

fixup! Run `clang/utils/aarch64_builtins_test_generator.py`
DeltaFile
+118-0clang/test/Sema/AArch64/arm_sve_streaming_only_sme_AND_sme2p3.c
+77-0clang/test/Sema/AArch64/arm_sve_feature_dependent_sve_AND_sve2p3___sme_AND_LP_sve2p3_OR_sme2p3_RP.c
+62-0clang/test/Sema/AArch64/arm_sve_non_streaming_only_sve_AND_sve2p3.c
+56-0clang/test/Sema/AArch64/arm_sme_streaming_only_sme_AND_sme2p3.c
+313-04 files

LLVM/project 5666fd2llvm/include/llvm/IR IntrinsicsAArch64.td, llvm/lib/Target/AArch64 SVEInstrFormats.td AArch64ISelDAGToDAG.cpp

fixup! Amend after PR comments
DeltaFile
+11-8llvm/include/llvm/IR/IntrinsicsAArch64.td
+4-4llvm/lib/Target/AArch64/SVEInstrFormats.td
+2-3llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+1-1llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
+18-164 files