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[MLIR][Transform] tile_using_for: allow transform.any_param in mixed args (#183178)

Changes check to be on the interface so that `!transform.any_param`
typed values are accepted in addition to `!transform.param<...>`.

[libc] Add backwards-compatibility macro to struct stat. (#182601)

Older code may use `st_atime` which recorded timestamps with one-second
precision, instead of `struct timespec st_atim` that is available in
later POSIX versions.

Add `#define st_atime` (& friends) to type declaration as suggested in
https://man7.org/linux/man-pages/man3/stat.3type.html

[lldb-dap] Correct types in cancel reqs. (#183169)

Correcting the types in cancel arguments. The `progressId` should have
been a string and updating the requestId to default to 0.

[ORC] Simplify WaitingOnGraph::Coalescer::remove. (#183175)

WaitingOnGraph::Coalescer::remove used to apply a should-remove
predicate to all SuperNodes currently registered with the coalescer.
This commit updates it to take a single SuperNode at a time, similar to
standard container erase methods.

To enable this, WaitingOnGraph::Coalescer now holds a map of registered
SuperNodes to hashes.

This allows us to remove individual SuperNodes, rather than checking all
SuperNodes in the Coalescer against a should-remove predicate.

CodeGen, Driver: Introduce -fpreferred-function-alignment option.

This option may be used to specify a function's preferred alignment.
The -falign-functions option and the aligned attribute now control
both the minimum alignment and the preferred alignment for consistency
with gcc. In contrast to the previous approach implemented in #149444
the preferred alignment is retained for member functions.

Part of this RFC:
https://discourse.llvm.org/t/rfc-enhancing-function-alignment-attributes/88019

Reviewers: vitalybuka, MaskRay, AaronBallman, jansvoboda11

Pull Request: https://github.com/llvm/llvm-project/pull/155528

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[AMDGPU] Use register pair for PC spill

Change-Id: Ibedeef926f7ff235a06de65a83087c151f66a416

[AMDGPU] Implement CFI for non-kernel functions

This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.

Change-Id: I5e3a9a62cf9189245011a82a129790d813d49373
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[LLDB]Fix logic in matches method for thread comparison (#179873)

The method claims to check if a is a subset of b, but the implementation
`a | b ==a` actually checks if b is a subset of a. This patch updated
the docstring.

Reapply "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (#182972) (#183154)

This reverts commit 19daed352f218f866ebcbbf3f35b14918588d8a1 but keeping
the original cmake in compiler-rt/lib/asan/CMakeLists.txt as is. Prior
we were attempting to use clang-cl for building ASM with all the normal
flags but extra flags are needed to force clang-cl to be used as an
assembler. For now, it's just easier to not touch any of the cmake
machinery and omit building the assembly for windows builds, but we
still keep the `#if` in the asm file to avoid having a fuchsia-specific
exclusion.

[clang][libclang]Check auto type for type constraints (#172472)

the "auto" keyword was visited by the default visitor only, making any
type constraints unavailable through the libclang API.

Add an explicit visitor for AutoType, check for constraints, and visit
those.

Fixes issue #166580

I modeled the visiting after
https://github.com/llvm/llvm-project/blob/main/clang/tools/libclang/CIndex.cpp#L1346
, and the tests after what I found in
https://github.com/llvm/llvm-project/blob/main/clang/test/Index/index-concepts.cpp
. Hopefully it fits.

[AMDGPU][MC] Replace shifted registers in CFI instructions

Change-Id: I0d99e9fe43ec3b6fecac20531119956dca2e4e5c

[AMDGPU] Implement -amdgpu-spill-cfi-saved-regs

These spills need special CFI anyway, so implementing them directly
where CFI is emitted avoids the need to invent a mechanism to track them
from ISel.

Change-Id: If4f34abb3a8e0e46b859a7c74ade21eff58c4047
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[AMDGPU] Implement CFI for CSR spills

Introduce new SPILL pseudos to allow CFI to be generated for only CSR
spills, and to make ISA-instruction-level accurate information.

Other targets either generate slightly incorrect information or rely on
conventions for how spills are placed within the entry block. The
approach in this change produces larger unwind tables, with the
increased size being spent on additional DW_CFA_advance_location
instructions needed to describe the unwinding accurately.

Change-Id: I9b09646abd2ac4e56eddf5e9aeca1a5bebbd43dd
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[AMDGPU] Use register pair for PC spill

Change-Id: Ibedeef926f7ff235a06de65a83087c151f66a416

[Clang] Default to async unwind tables for amdgcn

To avoid codegen changes when enabling debug-info (see
https://bugs.llvm.org/show_bug.cgi?id=37240) we want to
enable unwind tables by default.

There is some pessimization in post-prologepilog scheduling, and a
general solution to the problem of CFI_INSTRUCTION-as-scheduling-barrier
should be explored.

Change-Id: I83625875966928c7c4411cd7b95174dc58bda25a

[MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU

While these can be represented with .cfi_escape, using these pseudo-cfi
instructions makes .s/.mir files more readable, and it is necessary to
support updating registers in CFI instructions (something that the
AMDGPU backend requires).

Change-Id: I763d0cabe5990394670281d4afb5a170981e55d0

[AMDGPU] Emit entry function Dwarf CFI

Entry functions represent the end of unwinding, as they are the
outer-most frame. This implies they can only have a meaningful
definition for the CFA, which AMDGPU defines using a memory location
description with a literal private address space address. The return
address is set to undefined as a sentinel value to signal the end of
unwinding.

Change-Id: I21580f6a24f4869ba32939c9c6332506032cc654
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[AMDGPU] Implement CFI for non-kernel functions

This does not implement CSR spills other than those AMDGPU handles
during PEI. The remaining spills are handled in a subsequent patch.

Change-Id: I5e3a9a62cf9189245011a82a129790d813d49373
Co-authored-by: Scott Linder <scott.linder at amd.com>
Co-authored-by: Venkata Ramanaiah Nalamothu <VenkataRamanaiah.Nalamothu at amd.com>

[MIR] Error on signed integer in getUnsigned

Previously we effectively took the absolute value of the APSInt, instead
diagnose the unexpected negative value.

Change-Id: I4efe961e7b29fdf1d5f97df12f8139aac12c9219

Remove moved method

[VPlan] Allow recursive narrowing in interleave group narrowing. (#167310)

This allows canNarrowOps to recursively check if operands can be
narrowed, enabling narrowing of longer chains of operations that
feed interleave groups.

Depends on https://github.com/llvm/llvm-project/pull/167309.

PR: https://github.com/llvm/llvm-project/pull/167310

[clang-tidy][NFC] Remove ad-hoc `unless(isExpansionInSystemHeader())` from matchers (#183020)

#151035 centralized the code to skip matching nodes in system headers,
so individual checks no longer need the
`unless(isExpansionInSystemHeader())` boilerplate to achieve that. You
can verify that the logic introduced in that PR is equivalent to
`unless(isExpansionInSystemHeader())`; they both essentially boil down
to
`!SourceManager.isInSystemHeader(Node.getBeginLoc())`:

https://github.com/llvm/llvm-project/blob/7c5c58cdc6553c969a11fee51bfd23ae659220d4/clang/include/clang/ASTMatchers/ASTMatchers.h#L283-L291

https://github.com/llvm/llvm-project/blob/7c5c58cdc6553c969a11fee51bfd23ae659220d4/clang/lib/ASTMatchers/ASTMatchFinder.cpp#L1363-L1372

I audited all the uses of `isExpansionInSystemHeader` in the codebase,
and the only one I found that wasn't redundant was one in
`TaggedUnionMemberCountCheck.cpp`.

Refactor to use common base class

[HIP] Adjust test after #123359

Summary:
Just make this use the old driver for now, since that appraently worked.
Delete this later

[lldb] fix Makefile cross platform macros (#183131)

This patch fixes cross platform Makefile.rules macros and adds the
`ECHO_TO_EXISTING_FILE` macros.

Using `echo` in a macro to write to a file had quoting issues.

This is a reland of https://github.com/llvm/llvm-project/issues/183090.

[clang] Check upperbound for attribute param index (#180424)

Fixes #176638

The `ParamIdx` class encodes attribute's parameter indexes in 30 bits,
check if assignments overflow and issue an "attribute parameter out of
bounds" error in that case.

[libc] Enable ifunc support in static startup (#182841)

Resolves ifunc targets before `main()` runs in static libc

This enables static binaries to use ifunc-based dispatch during early
process startup, so optimized implementations can be selected based on
CPU features. Without this relocation step in startup, those targets are
not ready when program code begins executing.

This change:
- adds IRELATIVE relocation handling for x86_64, AArch64, ARMv7 and RISC-V,
- reads `AT_HWCAP` / `AT_HWCAP2` from auxv and passes them to resolvers
where required (notably AArch64),
- runs IRELATIVE processing after base-address discovery and before TLS
setup,
- adds integration tests for both the ifunc path and the no-ifunc path,
- Changed the load bias type for ptrdiff_t to intptr_t to align with
IRELATIVE handling, which uses intptr_t for load bias calculations.