[AMDGPU][GlobalISel] Don't combine uniform fmin/max into clamp/fmed3 (#211456)
Uniform fmin/fmax/fmed3 makes the reg-bank combiner produce a
clamp/fmed3 with an sgpr-banked destination. As these clamp/fmed3 only
have VALU selection patterns, the sgpr bank cannot be selected. Only
combine when the destination is vgpr-banked.
[PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (#204170)
For the IR representation:
isnan(x) → %0 = tail call noundef i1 @llvm.is.fpclass.f64(double %x, i32
3)
!isnan(x) → %0 = tail call noundef i1 @llvm.is.fpclass.f64(double %x,
i32 1020)
Under `-ffp-model=strict`, the generic
TargetLowering::expandIS_FPCLASS() is used to lower these when
Subtarget.hasP9Vector() && Subtarget.useCRBits() is false. However,
PowerPC has more optimal assembly sequences for isnan(x) and !isnan(x)
on POWER7/8 and generic PPC targets.
We implement a custom lowering for isnan(x) and !isnan(x) under
`-ffp-model=strict`, using `fcmpu `for POWER7/8 and generic PPC targets,
and` xscmpudp` for targets where VSX is available.
[libunwind] XFAIL the za unwind test on Apple targets older than OS 27.0 (#211379)
When linking against the system unwinder on macOS < 27, the test
fails on platforms that support SME.
[libc++] Remove workaround for Clang < 20 in clang-tidy plugin (#211314)
The clang-tidy plugin is now always built with Clang >= 20, so the
workaround can be removed.
[AArch64] Add a ctpop cost with CSSC (#211189)
FEAT_CSSC adds a CNT instruction that can perform ctpop. This adds a
specific cost for it to prevent us from using the neon cost.
[lldb-dap] Migrate DAP attach tests. (#210814)
Address some issues with the previous tests.
- Always wait for the continued event after sending a continue request.
since the continue response is just an acknowlegement that we send a
continue packet.
- Retry reading stdin if it has an error when the debugger attaches.
- Update and enable the attachByPortNum test, this may now run on NetBSD
and Windows. will try to enable in a different PR.
[TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (#206274)
## Summary
glibc 2.35 extended x86_64 libmvec with vector implementations of `erf`,
`erfc`,
`cbrt`, `expm1`, `log1p`, `asinh`, `acosh` and `atanh` (among others),
but LLVM's
`LIBMVEC_X86` table in `VecFuncs.def` was never updated past the
original glibc-2.22
set. As a result `clang -fveclib=libmvec` cannot vectorize loops over
these functions
on x86_64, even though the vector symbols are present in the linked
`libmvec.so`. The
AArch64 libmvec table already maps several of them.
This patch adds the x86 mappings for the 8 GLIBC-2.35 functions that
have **no
corresponding LLVM intrinsic** (pure named/TLI mappings). The
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[llubi][NFC] Use context-aware value printer (#211275)
As discussed in
https://github.com/llvm/llvm-project/pull/200672#discussion_r3624927046,
we need information from the global state to provide a better debugging
representation of byte SSA values.
This patch adds a wrapper to pass `Context&` into the actual printer.
[Clang][X86] Introduce Clang ABI Gate for MSVC alignment (#210305)
On x86_64-windows-msvc after 8ecec455183f, clang applies the MSVC
size-based global-alignment scheme (Microsoft64BitMinGlobalAlign) and
does not apply the Sys V "large array" alignment increase. Users may
want to preserve the earlier ABI for compatibility with objects produced
by older clang releases.
Gate this behavior on the Clang ABI compatibility level. When
`-fclang-abi-compat=22` (or lower) is in effect,
MicrosoftX86_64TargetInfo restores LargeArrayMinWidth/LargeArrayAlign to
128 and getMinGlobalAlign skips the Microsoft64BitMinGlobalAlign step,
matching the older alignment choices.
Assisted by Claude (Anthropic).
[flang][OpenMP] Switch TableGen generation to use llvm::EnumSet
Replace the remaining uses of the common::EnumSet-based OmpClauseSet to
llvm::omp::ClauseSet.
[flang] Provide "clause set" type as parameter to DirectiveStructureChecker
This will remove the hardcoded dependence of DirectiveStructureChecker on
the common::EnumSet class. Both consumers of it will be able to use their
own type for the clause set.
The only complication was the ClauseSetToString member function, whose
implementation depended on the specifics of common::EnumSet, namely the
IterateOverMembers member function. It was moved out of the class, and
turned into a function template to make it possible to provide different
specializations for common::EnumSet and llvm::EnumSet.
[flang][OpenMP] Use llvm::omp::DirectiveSet instead of common::EnumSet
Replace uses of OmpDirectiveSet (defined in terms of common::EnumSet)
with the common llvm::omp::DirectiveSet (defined via llvm::EnumSet).
The llvm::omp::DirectiveSet class will also be used in openmp-parsers,
where OmpDirectiveSet was an instance of llvm::Bitset.
[flang][OpenMP] Use llvm::omp::ClauseSet instead of common::EnumSet
Replace uses of OmpClauseSet (defined in terms of common::EnumSet)
with the common llvm::omp::ClauseSet (defined via llvm::EnumSet).
[OpenMP] Implement EnumSet container
This is close to flang's common::EnumSet with the difference being that
it provides forward iterators.
The reason for having an implementation that is separate from
common::EnumSet is that this is intended to be shared for all consumers
of llvm/lib/Frontend/OpenMP. This class is also planned to be one of the
core containers for representing auto-generated OpenMP data in the future.
[SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (#195402)
## Summary
The SPIR-V backend handled only `G_STRICT_FLDEXP` (from
`llvm.experimental.constrained.ldexp`). Plain `Intrinsic::ldexp` lowers
to `G_FLDEXP` in `IRTranslator.cpp`, so device code that calls `ldexp()`
(or any libcall lowered to `llvm.ldexp.*`, including `scalbn`,
`scalbln`, integer-exponent `exp2`) failed legalization with `unable to
legalize instruction: G_FLDEXP`.
## Change
- `SPIRVLegalizerInfo.cpp`: extend the existing legalizer rule from
`{G_STRICT_FLDEXP}` to `{G_FLDEXP, G_STRICT_FLDEXP}`, sharing the same
`(allFloatScalarsAndVectors, allIntScalars)` cartesian product.
- `SPIRVInstructionSelector.cpp`: add a `case TargetOpcode::G_FLDEXP:`
next to the strict case, both selecting `selectExtInst(..., CL::ldexp,
GL::Ldexp)`. The `GL::Ldexp` opcode (53) was already declared in
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[Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (#211514)
abandonDependences() uses unique_ptr::release() which releases
ownership without freeing the Dependences object, causing a memory
leak. Use unique_ptr::reset() instead to properly delete the object
before nullifying the pointer.
The issue was found when AddressSanitizer is enabled in the build.
[libc++] Update release procedure for libc++ & friends (#210383)
The release procedure implied that some tasks were done by the release
manager, but in practice they are done by the libc++ developers.
Also, mention using the `llvm-premerge-libcxx-release-runners` runner
set on the release branch, which was overlooked in the previous notes.
Other than that, minor reformulations.
Write original source language when writing and reading AST (#209353)
FAIL: Clang :: Frontend/ast-main.c
FAIL: Clang :: Frontend/ast-main.cpp
were failing on z/OS; this change fixes these lit failures.
The issue here is that on z/OS the original source code language needs
to be passed through to the IR so that the backend can encode this
information in the PPA2 in the object file. That means that it needs to
be exported to the AST so that going from saved AST -> IR will carry the
language through.
[SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (#209351)
Vector SMULFIXSAT/UMULFIXSAT were not handled by expandFixedPointMul in
the vector legalizer (a FIXME) and were unrolled to per-lane scalar
code: a single <8 x i16> smul.fix.sat was ~100 instructions on both
AArch64 and x86.
Expand the saturating variants like the non-saturating ones, and build
the saturation clamp with SETCC + VSELECT for vector types so it stays
vectorized instead of being scalarized by SELECT_CC legalization. Scalar
lowering is unchanged: the clamp change is guarded on isVector(), so
scalar fixed-point codegen on every target is bit-identical.
Additionally custom-lower SMULFIXSAT on AArch64 for scale == eltbits-1,
which is exactly sqdmulh, to a single instruction.
To the FIXME note - results in a ~12x speedup over the unroll fallback.
AI was used in the making of this PR, and if its feedback is to be
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