LLVM/project d6ec2a9flang/test/Semantics/OpenMP affected-loops.f90

Update test
DeltaFile
+5-2flang/test/Semantics/OpenMP/affected-loops.f90
+5-21 files

LLVM/project 243cb25flang/test/Integration/OpenMP atomic-compare.f90

[flang][OpenMP] Make the atomic-compare test run on aarch64 too (#198849)
DeltaFile
+2-2flang/test/Integration/OpenMP/atomic-compare.f90
+2-21 files

LLVM/project 70518e5flang/test/Semantics/OpenMP affected-loops.f90

Remove no longer valid comment
DeltaFile
+0-3flang/test/Semantics/OpenMP/affected-loops.f90
+0-31 files

LLVM/project 8ef4456lldb/source/Host/windows PseudoConsole.cpp ConnectionGenericFileWindows.cpp, lldb/source/Plugins/Process/Windows/Common ProcessWindows.cpp

[NFC][lldb][windows] NULL to nullptr replacement (#199031)
DeltaFile
+8-8lldb/source/Host/windows/PseudoConsole.cpp
+8-7lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
+7-7lldb/source/Host/windows/ProcessLauncherWindows.cpp
+7-6lldb/source/Host/windows/MainLoopWindows.cpp
+5-7lldb/source/Plugins/Process/Windows/Common/arm64/RegisterContextWindows_arm64.cpp
+6-6lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
+41-4110 files not shown
+66-6616 files

LLVM/project 57011c9lldb/include/lldb/Host/windows MainLoopWindows.h, lldb/source/Host/windows ConnectionConPTYWindows.cpp

[NFC][lldb][windows] Default empty user-defined destructors (#199037)
DeltaFile
+1-1lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
+1-1lldb/source/Plugins/Process/Windows/Common/RegisterContextWindows.cpp
+1-1lldb/source/Plugins/Process/Windows/Common/arm/RegisterContextWindows_arm.cpp
+1-1lldb/source/Plugins/Process/Windows/Common/NativeThreadWindows.h
+1-1lldb/include/lldb/Host/windows/MainLoopWindows.h
+1-1lldb/source/Host/windows/ConnectionConPTYWindows.cpp
+6-63 files not shown
+9-99 files

LLVM/project a5bc2adlldb/test/API/windows/launch/missing-dll TestMissingDll.py

[lldb][windows] relax TestMissingDll.py assert (#199046)
DeltaFile
+2-1lldb/test/API/windows/launch/missing-dll/TestMissingDll.py
+2-11 files

LLVM/project 9b64970lldb/source/Host/windows PseudoConsole.cpp, lldb/source/Plugins/Process/Windows/Common ForwardDecl.h LocalDebugDelegate.h

[NFC][lldb][windows] Replace typedef with using (#199036)
DeltaFile
+4-4lldb/source/Host/windows/PseudoConsole.cpp
+4-4lldb/source/Plugins/Process/Windows/Common/ForwardDecl.h
+1-1lldb/source/Plugins/Process/Windows/Common/LocalDebugDelegate.h
+1-1lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.h
+10-104 files

LLVM/project a77010fclang/lib/CIR/CodeGen CIRGenCleanup.cpp, clang/test/CIR/CodeGen cleanup-conditional-with-wrapper-eh.cpp cleanup-conditional-with-wrapper.cpp

[CIR] Fix problem with multiple references to an alloca in a cleanup (#198928)

A recent change to hoist allocas out of a deferred cleanup scope had a
bug wherein if multiple entries in the deferred cleanup stack referenced
the same alloca, the second attempt to see if it needed to be hoisted
would assert in the MLIR region code. This was happening because when we
hoist the alloca, we hoist it to a block that is still under
construction. On the second encounter when we're walking its parent
chain to see if it is contained within the cleanup scope we're
processing, our call to get the parent region of the block containing
the alloca would assert because the alloca is in an unlinked block (it
gets added to a region after we're done constructing it).

To fix this problem, I changed the way we're checking for the alloca
being nested within the cleanup scope, using a more robust
implementation that will tolerate encountering unlinked operations.

Assisted-by: Cursor / claude-opus-4.7-thinking-xhigh
DeltaFile
+160-0clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
+128-0clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
+14-2clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
+302-23 files

LLVM/project e48fb36clang/lib/Driver ToolChain.cpp, clang/lib/Driver/ToolChains AMDGPU.cpp AMDGPUOpenMP.cpp

clang/AMDGPU: Use TranslateArgs from the base toolchain instead of the host

This fixes -Xopenmp-target / -Xarch for arbitrary arguments. HIP and OpenMP
had cargo-cult broken implementations of TranslateArgs, which called the host
toolchain's implementation, and then special case  transferred either -march
or -mcpu to the device argument list. The respective device forwarding flags
should work for any argument, not just this one. The main feature that needs
to be preserved is the shared filtering of unsupported sanitizers to degrade
them into warnings.

Most of the changes here are dealing with fallout observed when
the host target is darwin. The darwin toolchain happens to have
some hacky statefulness tracking the compile target version, which
gets written and rewritten on argument parsing. To maintain this hack,
there are a few unused calls to getArgsForToolChain; start passing OFK_Host
to these so the offload toolchains don't get confused and think they're in
a non-offload context.
DeltaFile
+43-16clang/lib/Driver/ToolChains/AMDGPU.cpp
+0-42clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
+5-35clang/lib/Driver/ToolChains/HIPAMD.cpp
+5-25clang/lib/Driver/ToolChains/AMDGPU.h
+12-3clang/lib/Driver/ToolChain.cpp
+7-6clang/lib/Driver/ToolChains/Gnu.cpp
+72-1275 files not shown
+92-13511 files

LLVM/project 6a13b99clang/lib/Driver SanitizerArgs.cpp, clang/lib/Driver/ToolChains AMDGPU.cpp AMDGPU.h

clang: Refactor handling of offload sanitizer arguments

Previously the AMDGPU toolchains hackily handled -fsanitize arguments.
They would lie and report that all host side sanitizers are available,
then TranslateArgs would filter out the device side cases that do not
work, providing diagnostics for the skipped cases. Move that logic
into the base sanitizer argument parsing.

This makes the produced diagnostics more consistent. Previously we
would get repeated warnings when a sanitizer is fully unsupported
by amdgpu, which should now be once for the toolchain. These could
be further improved; we're printing the specific field of -fsanitize
in more cases where it could be skipped. In other cases we have the
opposite problem, where we aren't reporting the exact sanitizer
from the -f flag in the case that depends on a subtarget feature.

This will help fix other broken target specific flag forwarding bugs
in the future.

Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
DeltaFile
+56-47clang/lib/Driver/ToolChains/AMDGPU.cpp
+85-11clang/lib/Driver/SanitizerArgs.cpp
+7-75clang/lib/Driver/ToolChains/AMDGPU.h
+21-24clang/lib/Driver/ToolChains/HIPAMD.cpp
+17-21clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
+14-14clang/test/Driver/hip-sanitize-options.hip
+200-1928 files not shown
+261-20714 files

LLVM/project 3c8670bclang/lib/Driver/ToolChains AMDGPU.h PS4CPU.cpp

clang: Add BoundArch/OffloadKind argument to getSupportedSanitizers (#196503)

Currently the AMDGPU HIP and OpenMP toolchains falsely report
all host sanitizers are supported, and then go out of their way
to skip forwarding those to the device compiles. Add an offloading
kind argument so that in the future this can be handled in one
place in the base toolchain.

Co-authored-by: Claude Sonnet 4 <noreply at anthropic.com>
DeltaFile
+11-2clang/lib/Driver/ToolChains/AMDGPU.h
+8-4clang/lib/Driver/ToolChains/PS4CPU.cpp
+6-3clang/lib/Driver/ToolChains/HIPSPV.cpp
+6-2clang/lib/Driver/ToolChains/PS4CPU.h
+5-2clang/lib/Driver/ToolChains/Fuchsia.cpp
+5-2clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
+41-1540 files not shown
+190-7246 files

LLVM/project 9d8e270utils/bazel/llvm-project-overlay/mlir BUILD.bazel

Fixes 20be2d6b
DeltaFile
+2-0utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
+2-01 files

LLVM/project c37cbc4llvm/lib/Target/AMDGPU AMDGPURegBankCombiner.cpp, llvm/test/CodeGen/AMDGPU global-saddr-load.ll

PR feedback, fix tests
DeltaFile
+24-90llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
+12-14llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+36-1042 files

LLVM/project 04875f3llvm/lib/Target/AMDGPU AMDGPURegBankCombiner.cpp, llvm/test/CodeGen/AMDGPU/GlobalISel load-d16.ll

[AMDGPU][True16] Add regbank combiner cases to fix regression around G_SEXTLOAD
DeltaFile
+63-165llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
+17-2llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+80-1672 files

LLVM/project b895637llvm/lib/Target/AMDGPU AMDGPURegBankLegalizeRules.cpp, llvm/test/CodeGen/AMDGPU global-saddr-load.ll

Add legalize rules and fix tests
DeltaFile
+165-63llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
+90-24llvm/test/CodeGen/AMDGPU/global-saddr-load.ll
+6-9llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-s16-true16.mir
+7-2llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+268-984 files

LLVM/project 128bcf8llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp

Update comment around destination reg size for clarity
DeltaFile
+5-1llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+5-11 files

LLVM/project 8591125llvm/lib/Target/AMDGPU AMDGPULegalizerInfo.cpp, llvm/test/CodeGen/AMDGPU flat-saddr-load.ll

[AMDGPU][True16] Legalize extloads into 16-bit registers

Signed-off-by: Domenic Nutile <domenic.nutile at gmail.com>
DeltaFile
+80-38llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
+2-2llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+82-402 files

LLVM/project b38ed9cllvm/test/CodeGen/AMDGPU/GlobalISel legalize-sextload-zextload-s16-true16.mir legalize-sextload-s16-true16.mir

PR feedback
DeltaFile
+0-376llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
+87-0llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-s16-true16.mir
+5-1llvm/test/CodeGen/AMDGPU/GlobalISel/load-d16.ll
+92-3773 files

LLVM/project 644e03cllvm/test/CodeGen/AMDGPU/GlobalISel legalize-sextload-zextload-s16-true16.mir

[AMDGPU][True16] Create tests that will demonstrate true16 G_SEXTLOAD/G_ZEXTLOAD legalization changes
DeltaFile
+376-0llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-zextload-s16-true16.mir
+376-01 files

LLVM/project 58ae6acllvm/lib/Target/RISCV RISCVISelLowering.cpp

[RISCV][P-ext] Return SDValue() instead of calling DAG.UnrollVectorOp for non-splat shift amounts. NFCI (#198914)

The generic legalizer can call DAG.UnrollVectorOp itself.
DeltaFile
+1-1llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+1-11 files

LLVM/project 205c773flang/lib/Optimizer/Transforms AddAliasTags.cpp

review comments
DeltaFile
+16-14flang/lib/Optimizer/Transforms/AddAliasTags.cpp
+16-141 files

LLVM/project 4d01007llvm/lib/CodeGen/SelectionDAG DAGCombiner.cpp, llvm/lib/Target/PowerPC PPCISelLowering.cpp

[PowerPC] set libcall lowering for fp setcc ops on SPE boards (#153238)

SPE fp comparison instructions don't comply with IEEE-754. They treat
special values like NaN and Inf as normalized numbers, which leads to
incorrect results. For example, when comparing NaN with a normal, the
result can be true, even though the standard requires comparisons with
NaN to be false.

This patch fixes the issue by lowering these operations to libcalls. SPE
comparison instructions can still be used when fast-math flag is
enabled.
DeltaFile
+888-182llvm/test/CodeGen/PowerPC/fp-strict-fcmp-spe.ll
+608-205llvm/test/CodeGen/PowerPC/spe.ll
+40-12llvm/test/CodeGen/PowerPC/legalize-invert-br_cc.ll
+47-4llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+6-6llvm/test/CodeGen/PowerPC/fast-isel-cmp-imm.ll
+2-0llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+1,591-4091 files not shown
+1,592-4097 files

LLVM/project 2b460b3llvm/lib/Target/RISCV RISCVInstrInfoP.td

[RISCV] Remove unnecessary HasStdExtZbbOrZbkb from some P extension patterns. NFC (#198970)

P implies Zbb so we don't need the extra Predicate.
DeltaFile
+12-15llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+12-151 files

LLVM/project 9279996flang/test/Integration/OpenMP atomic-compare.f90, llvm/lib/Frontend/OpenMP OMPIRBuilder.cpp

revert/reapply  "[Flang] [OpenMP] atomic compare (#184761)"" (#198978)

Reverts llvm/llvm-project#198848

Reverting the reverted PR
[https://github.com/llvm/llvm-project/pull/198848](https://github.com/llvm/llvm-project/pull/198848)
, since the actual issue was different and the original PR
[https://github.com/llvm/llvm-project/pull/184761](https://github.com/llvm/llvm-project/pull/184761)
was reverted incorrectly.

Ref :
https://github.com/llvm/llvm-project/pull/184761#issuecomment-4501760965
DeltaFile
+517-0mlir/test/Dialect/OpenMP/invalid.mlir
+359-0mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
+233-62llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
+250-0flang/test/Integration/OpenMP/atomic-compare.f90
+209-0mlir/test/Target/LLVMIR/openmp-llvm.mlir
+171-0mlir/include/mlir/Dialect/OpenACCMPCommon/Interfaces/AtomicInterfaces.td
+1,739-6213 files not shown
+2,286-13119 files

LLVM/project 97e0bd2llvm/lib/Target/RISCV RISCVInstrInfoP.td RISCVISelLowering.cpp, llvm/test/CodeGen/RISCV rvp-simd-64.ll rvp-simd-32.ll

[RISCV] P-ext support v8i8/v4i16/v2i32 setcc on RV32. (#198685)
DeltaFile
+194-982llvm/test/CodeGen/RISCV/rvp-simd-64.ll
+27-6llvm/test/CodeGen/RISCV/rvp-simd-32.ll
+13-0llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+5-0llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+239-9884 files

LLVM/project 9c26d8cllvm/lib/Transforms/Vectorize SLPVectorizer.cpp, llvm/test/Transforms/SLPVectorizer/RISCV buildvector-all-external-scalars.ll

[SLP] Unify IR flag and metadata propagation in vectorizeTree

Replace scattered propagateIRFlags/propagateMetadata calls with a single
PropagateIRFlags lambda. Excludes copyable scalars from the flag
intersection set and drops nnan/ninf when a copyable lane cannot prove
its operand is non-NaN/non-Inf.

Reviewers: hiraditya, RKSimon, bababuck

Pull Request: https://github.com/llvm/llvm-project/pull/198543
DeltaFile
+74-48llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+24-24llvm/test/Transforms/SLPVectorizer/RISCV/buildvector-all-external-scalars.ll
+6-6llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
+4-4llvm/test/Transforms/SLPVectorizer/X86/vect_copyable_in_binops.ll
+3-3llvm/test/Transforms/SLPVectorizer/X86/copyable_reorder.ll
+3-3llvm/test/Transforms/SLPVectorizer/X86/vectorize-pair-path.ll
+114-8815 files not shown
+135-10921 files

LLVM/project fa292acllvm/lib/DebugInfo/PDB/Native PDBFileBuilder.cpp

Initialize PDBFileBuilder::Strings
DeltaFile
+2-2llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
+2-21 files

LLVM/project dd101e2llvm/include/llvm/DebugInfo/PDB/Native PDBStringTableBuilder.h, llvm/lib/DebugInfo/PDB/Native PDBFileBuilder.cpp

Initialize InjectedSourceHashTraits along with Strings
DeltaFile
+4-3llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
+1-0llvm/include/llvm/DebugInfo/PDB/Native/PDBStringTableBuilder.h
+5-32 files

LLVM/project 8381677llvm/include/llvm/DebugInfo/PDB/Native PDBFileBuilder.h, llvm/lib/DebugInfo/PDB/Native PDBFileBuilder.cpp

[PDB][llvm-pdbutil] Add DXContainer support for yaml2pdb
DeltaFile
+47-21llvm/lib/DebugInfo/PDB/Native/PDBFileBuilder.cpp
+35-10llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
+3-1llvm/include/llvm/DebugInfo/PDB/Native/PDBFileBuilder.h
+0-2llvm/test/tools/llvm-pdbutil/dxcontainer.test
+85-344 files

LLVM/project 041b7d9llvm/tools/llvm-pdbutil YAMLOutputStyle.cpp PdbYaml.h

[llvm-pdbutil] Add DXContainer support for pdb2yaml
DeltaFile
+31-0llvm/tools/llvm-pdbutil/YAMLOutputStyle.cpp
+7-0llvm/tools/llvm-pdbutil/PdbYaml.h
+6-0llvm/tools/llvm-pdbutil/PdbYaml.cpp
+5-0llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
+1-0llvm/tools/llvm-pdbutil/YAMLOutputStyle.h
+1-0llvm/tools/llvm-pdbutil/llvm-pdbutil.h
+51-06 files