[Clang][Windows] Preserve natural alignment for vector and x86_fp80 arrays under #pragma pack. (#208256)
This is to fix a misalignment issue when using `-mlong-double-80` on
Windows with types containing `long double` inside STL containers or
structures with `#pragma pack(8)`.
On Windows, MSVC STL headers use `#pragma pack(8)` which limits struct
alignment to 8
bytes. When `-mlong-double-80` is used, `long double` becomes `x86_fp80`
which requires 16-byte alignment for correctness (movaps instructions).
This creates a conflict:
- Array allocated with 8-byte alignment (due to pragma pack)
- Element type requires 16-byte alignment
- memcpy assumes 16-byte alignment
- Result: Crash due to misaligned access
Example:
```cpp
#include <array>
struct Klass { long double a; };
void test() {
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[analyzer] Respect symbol complexity bound in tryRearrange (#227367)
The `tryRearrange` logic of the `SValBuilder` lets the analyzer engine
conclude e.g. that `(x + 1) - x` is equal to 1. Unfortunately it had to
be disabled by default because it used low-level `SymMgr.acquire` calls
to construct symbols, which did not respect the symbol complexity limit
and could cause exponential slowdowns in corner cases.
This commit switches to using `SValBuilder::makeSymExprValNN` instead of
those `acquire` calls, because that higher-level method respects the
symbol complexity limits.
This patch only affects the analysis in the case when off-by-default
option aggressive-binary-operation-simplification is enabled. In the
future I intend to enable this simplification by default, at least for
the case of additive operations (which are mathematically "simpler").
[analyzer] Ignore nonstandard function named 'memset' (#229119)
Previously CStringChecker ran into an assertion failure when it
encountered a function named 'memset' whose third argument was a `const
int &` instead of the standard `size_t`.
This PR introduces an early return to avoid this.
Fixes #228865
Reported-by: k-arrows
[Mips][GlobalISel] Ignore debug uses in register bank inference (#229948)
Mips GlobalISel currently considers debug instructions when inferring
register banks for ambiguous generic instructions. A `DBG_VALUE` can
therefore cause an ordinary floating-point value to be assigned to
`gprb` instead of `fprb`.
Ignore debug instructions when walking direct uses and COPY chains. This
also handles an unconstrained 32-bit `G_IMPLICIT_DEF` as an ambiguous
value, mapping it to `gprb` instead of asserting after its debug-only
use is ignored.
The MIR test covers a direct debug use, a COPY with only a debug use,
and a 32-bit `G_IMPLICIT_DEF` with only a debug use.
Fixes #229625
Assisted-by: OpenAI Codex 5.6 Sol, co-reviewed by Claude and Yongqiang
Tian.
[Passes] Run MergeICmps/ExpandMemCmps in LTO post-link pipeline (#230562)
Otherwise memcmp will never get expanded if running the combination of
ThinLTO pre-link and LTO post-link, which is what Rust does, and what
unified LTO does.
The pipeline position is chosen to roughly match what the module
optimization pipeline does. There is no compile-time impact.
For https://github.com/rust-lang/rust/issues/163677.
[lldb][test] Disable another part of TestMultithreaded.py on Windows (#231114)
Due to flaky results. See
https://github.com/llvm/llvm-project/issues/231113.
Fails on Windows on Arm mostly but I don't see why it wouldn't fail on
x86_64 too.
[NVPTX] Fold predicate boolean operations into comparisons (#229769)
Select the fused setp.CmpOp.BoolOp forms for integer and floating-point
comparisons followed by predicate AND, OR, or XOR to optimise away these
separate predicate operations.
[SPIR-V] Move MIR rewrites out of SPIRVModuleAnalysis (#229736)
Analysis pass must not change the IR it analyzes
Move all modifications from there to a new separate
spirv-prepare-module-analysis pass
Discussed in https://github.com/llvm/llvm-project/pull/227376
[libc] Implement clock_getres in time (#230826)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function
`clock_getres` in `<time.h>` on Linux and register it in the Linux
target entrypoints.
Fixes #230532
[libc++] Avoid key_eq calls in hash_table rehash (#216551)
Use the cached hash to avoid calling `key_eq` which might be costly.
Per `[unord.req.general]#9`, for `unordered_multiset` and
`unordered_multimap`,
rehashing preserves the relative ordering of equivalent elements. These
elements
are contiguous and share the same key and hash.
For elements with the same hash but different keys (if any), their
relative order
is not required, but it is preserved for simplicity.
This is still not applied to unique-key containers (`unordered_set` and
`unordered_map`), where same-hash contiguous blocks are rare and the
extra
check would not be worthwhile.
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[X86][AMX] Fix use iteration when reloading tiles in FastPreTileConfig (#228724)
`reload()` moved the rewritten operand off the use list being iterated,
so only the first use of a tile was reloaded. A DBG_VALUE was also
treated as a use; when it came first, the real use kept the clobbered
tile and `FastRegAlloc` crashed.
Iterate the non-debug uses with `make_early_inc_range`. Debug uses are
no longer reloaded, so `FastRegAlloc` drops their location.
Fixes #228712
Assisted-by: Claude Opus 5.5
[SelectionDAG] avoid rounding exact f32->bf16 (STRICT_)FP_ROUND
For f32-to-bf16, DAGTypeLegalizer::SoftPromoteHalfRes_FP_ROUND currently
ignores the Trunc flag and unconditionally lowers ISD::FP_ROUND to
ISD::FP_TO_BF16 as follows:
- On X86 targets with +avx512bf16 or +avxneconvert, ISD::FP_TO_BF16
lowers to vcvtneps2bf16, which is lossy (it flushes subnormals to
zero and quietens sNaNs.)
- On targets without hardware bf16 conversion instructions, it performs
rounding via a runtime libcall (e.g. __truncsfbf2) or a software
rounding sequence (which can also be lossy, e.g. quieting sNaNs).
The above is unnecessary and lossy; bitcasting to i32 and extracting
the upper 16 bits is cheaper and lossless. Do that.
Tested:
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[CIR][AMDGPU] Add support for AMDGCN raw buffer store format builtins (#223112)
Adds codegen for the following AMDGCN raw buffer store format builtins:
- __builtin_amdgcn_raw_buffer_store_format_v4f32 (v4f32)
- __builtin_amdgcn_raw_buffer_store_format_v4f16 (v4f16)
These are lowered to the corresponding
`llvm.amdgcn.raw.ptr.buffer.store.format` intrinsic.
[CIR][AMDGPU] Add support for raw ptr buffer atomic builtins (#223137)
Adds codegen for the following AMDGCN raw pointer buffer atomic
builtins:
- __builtin_amdgcn_raw_ptr_buffer_atomic_add_i32
- __builtin_amdgcn_raw_ptr_buffer_atomic_fadd_{f32,f64,v2f16}
- __builtin_amdgcn_raw_ptr_buffer_atomic_fmin_{f32,f64}
- __builtin_amdgcn_raw_ptr_buffer_atomic_fmax_{f32,f64}
These are lowered to the corresponding
`llvm.amdgcn.raw.ptr.buffer.atomic.*` intrinsics.
Co-Authored-By: Claude Opus 5
---------
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
[mlir][tosa] Fix no op clamp canonicalization when nan_mode = ignore (#229887)
When nan_mode = ignore, a no op clamp should not be folded. This is
because if a value of NaN is specified in the input, the output becomes
the minimum specified value. A regression test with clamp bounds of
infinity is provided.
[libc] Add linux syscall wrappers for exit and exit_group (#230528)
Add dedicated linux syscall wrappers for SYS_exit and SYS_exit_group,
and update existing call sites to call the appropriate one instead of
using raw syscall_impl:
- exit_group terminates all threads in the thread group (process), so it
is used by internal::exit, posix_spawn child error exits, and do_start
initialization failure paths.
- exit terminates only the calling thread, so it is used in thread_exit
and tls init error paths.
Assisted-by: Gemini
[SelectionDAG] Preserve demanded lanes in sign-bit queries (#230093)
Forward demanded lanes through multiplication and truncation.
Assisted by: GPT 6.1 Sol
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
[Mips] Update R6 FP condition checks after kill flag removal (#231107)
The instruction-selection checks added by #226838 still expect `killed`
operand flags. #229069 removed those flags from SelectionDAG emission
before #226838 landed, causing `r6-fp-condition-subregs.ll` to fail on
the CI after land.
Remove the five stale `killed` expectations.
Assisted-by: OpenAI Codex
Fix overflow issues associated with shufflevector for landing PR #229662 (#230410)
Consider the motivating case here: https://godbolt.org/z/7rTsxT4sG
I will provide some context why shufflevector APIs need to be modified.
PR #229662 detects adjacent loads `%L1`/`%L2`, feeding as shuffle
operands, and converts 2 loads into single load(say `%L`). Shufflevector
also needs to be modified so that 0th operand is `%L` and 1st operand is
poison. `ShuffleVectorInst::isValidOperands` API checks if the index
mask for the new shuffle is in range of `concat(%L, poison)`. Computing
range of concat i.e. `2 * sizeof(%L)` creates signed overflow.
For the same case, while computing the new shuffle cost,
`isSingleSourceMaskImpl` API also computes `2 * sizeof(%L)` and
oveflows.
This patch fixes these issues.
Note that such overflow issues, asssociated with shufflevector, are
present elsewhere I am not planning to fix them here
RuntimeLibcalls: Fix wrong types of some vector math functions (#231095)
The f32 x86 libmvec __expf_finite, __logf_finite and __powf_finite
variants were assigned to the f64 libcalls, and amd_vrd4_erf and
amd_vrd8_erf to the f32 ones.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
