LLVM/project cbc6e86clang/lib/AST/ByteCode Interp.h Compiler.cpp, clang/test/AST/ByteCode cxx14.cpp

[clang][bytecode] Allow const mutation in all variable initializers (#195794)

So the attached test case works even though it's just an `InitListExpr`.
DeltaFile
+12-0clang/test/AST/ByteCode/cxx14.cpp
+11-0clang/lib/AST/ByteCode/Interp.h
+6-0clang/lib/AST/ByteCode/Compiler.cpp
+4-0clang/lib/AST/ByteCode/Opcodes.td
+33-04 files

LLVM/project ce6605amlir/include/mlir/Dialect/LLVMIR NVVMOps.td NVVMDialect.td

[MLIR][NVVM][NFC] Restructure NVVM dialect (#195811)

Moves the declarations of the NVVM dialect and some widely used enums
(`FPRoundingModeAttr` and `SaturationModeAttr`) to separate files to make
them easier to maintain and also use in the NVGPU dialect.
DeltaFile
+7-136mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+94-0mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.td
+72-0mlir/include/mlir/Dialect/LLVMIR/NVVMEnums.td
+173-1363 files

LLVM/project 5a03b84llvm/lib/Target/AArch64 AArch64TargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AArch64 ctpop.ll sve-ctpop.ll

[AArch64][CostModel] Model sve costs for ctpop (#192428)

Targets supporting sve prefer sve for ctpop with fixed length vectors.
Update cost model to reflect the same.
DeltaFile
+146-41llvm/test/Analysis/CostModel/AArch64/ctpop.ll
+38-0llvm/test/Analysis/CostModel/AArch64/sve-ctpop.ll
+14-3llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+198-443 files

LLVM/project b84d09fclang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenModule.cpp

ROllback to TODO for AArch64 Function Multi Versioning
DeltaFile
+0-35clang/test/CIR/Lowering/fmv-features.cir
+2-26clang/lib/CIR/CodeGen/CIRGenModule.cpp
+1-0clang/include/clang/CIR/MissingFeatures.h
+3-613 files

LLVM/project 907d9c7clang/lib/CIR/CodeGen CIRGenModule.cpp, clang/test/CIR/Lowering fmv-features.cir

use interleaveComma and features.reserve
DeltaFile
+35-0clang/test/CIR/Lowering/fmv-features.cir
+6-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+41-32 files

LLVM/project e7a6a39clang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen CIRGenModule.cpp

[CIR] Implement function target/tune attrs and FMV metadata.
DeltaFile
+244-0clang/test/CIR/CodeGen/attr-target-aarch64.c
+186-0clang/test/CIR/CodeGen/attr-target-x86.c
+74-0clang/test/CIR/CodeGenHIP/attr-target-amdgpu.hip
+66-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+0-1clang/include/clang/CIR/MissingFeatures.h
+570-45 files

LLVM/project 805e38cclang/include/clang/CIR MissingFeatures.h, clang/lib/CIR/CodeGen Address.h CIRGenModule.cpp

Fix tests
DeltaFile
+8-5clang/lib/CIR/CodeGen/Address.h
+5-3clang/lib/CIR/CodeGen/CIRGenModule.cpp
+4-1clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
+1-0clang/include/clang/CIR/MissingFeatures.h
+18-94 files

LLVM/project 1bcdc4bclang/lib/Interpreter IncrementalParser.h, clang/tools/libclang CIndexDiagnostic.cpp

[NFC] Fix C++23 build failures caused by incomplete types (#196814)
DeltaFile
+6-0llvm/lib/Target/BPF/BPFAsmPrinter.cpp
+6-0llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+1-4clang/lib/Interpreter/IncrementalParser.h
+2-2llvm/lib/Target/BPF/BPFAsmPrinter.h
+2-1llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
+3-0clang/tools/libclang/CIndexDiagnostic.cpp
+20-72 files not shown
+24-98 files

LLVM/project 21c75f0llvm/lib/Transforms/InstCombine InstCombinePHI.cpp

[InstCombine][NFC] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (#183726)

SliceUpIllegalIntegerPHI searches for PHIs that have illegal type and
are only used by trunc or trunc(lshr) operations. It bails out if
encounters invoke or EH pad instructions.
It first checks whether it encounters invoke or EH pad, which is time
consuming as it checks every instruction. Then it checks whether it is
used by trunc or trunc(lshr). The former check is generally loose, while
the latter one is stricter. Switch the order of the checks will speed up
compilation.

Signed-off-by: XinlongZHANG-Bob <zhangxinlong.bob at bytedance.com>
DeltaFile
+28-26llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
+28-261 files

LLVM/project dccd300llvm/test/Transforms/LoopVectorize consecutive-ptr-uniforms.ll

[LV][NFC] Reshape pointer_iv_non_uniform_0 test to use distinct loads (#196494)

The followup [patch](https://github.com/llvm/llvm-project/pull/196080)
is folding some of the idempotent binary ops This test has `sub x - x`
operation which is affected by the followup patch. This patch is making
the test immune to the fold.
DeltaFile
+5-5llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
+5-51 files

LLVM/project 07aad88clang/include/clang/CIR/Dialect/Builder CIRBaseBuilder.h, clang/lib/CIR/CodeGen CIRGenFunction.h Address.h

fix fmt and some coding conventions
DeltaFile
+7-8clang/lib/CIR/CodeGen/CIRGenFunction.h
+2-2clang/lib/CIR/CodeGen/Address.h
+1-1clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+1-1clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+1-1clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
+12-135 files

LLVM/project 69d52b8clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp

use emitIntrinsicCallOp from builder
DeltaFile
+3-6clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+3-61 files

LLVM/project ca5fad0clang/lib/CIR/CodeGen CIRGenBuiltinAMDGPU.cpp, clang/test/CIR/CodeGenHIP builtins-amdgcn.hip

[CIR][AMDGPU] Add lowering for amdgcn ds swizzle builtin.
DeltaFile
+10-1clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
+8-0clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
+18-12 files

LLVM/project 11c8eedclang/lib/CIR/CodeGen CIRGenExpr.cpp Address.h, clang/test/CIR/CodeGen amdgpu-stack-alloca-array-decay.cpp

[CIR][CIRGen] Cast stack allocas to the language-visible address space
DeltaFile
+45-20clang/lib/CIR/CodeGen/CIRGenExpr.cpp
+42-0clang/test/CIR/CodeGen/amdgpu-stack-alloca-array-decay.cpp
+14-0clang/lib/CIR/CodeGen/Address.h
+7-6clang/lib/CIR/CodeGen/CIRGenFunction.cpp
+12-0clang/lib/CIR/CodeGen/CIRGenFunction.h
+5-4clang/lib/CIR/CodeGen/CIRGenDecl.cpp
+125-303 files not shown
+134-349 files

LLVM/project 084a5acclang/test/CodeGen arm64-neon-header.c

[clang][test] Add AArch64 requirement to arm64_neon.h test (#196867)

Only run test when the AArch64 target is built
DeltaFile
+2-0clang/test/CodeGen/arm64-neon-header.c
+2-01 files

LLVM/project 165ce5cclang/include/clang/Serialization ASTRecordReader.h, clang/lib/AST ASTContext.cpp Type.cpp

trivial changes
DeltaFile
+20-14clang/lib/Sema/SemaOpenMP.cpp
+18-14clang/lib/AST/ASTContext.cpp
+16-15clang/lib/Sema/SemaTemplate.cpp
+14-11clang/lib/AST/Type.cpp
+14-8clang/lib/AST/ASTDiagnostic.cpp
+11-6clang/include/clang/Serialization/ASTRecordReader.h
+93-6833 files not shown
+202-15239 files

LLVM/project 5b3da81clang/include/clang/AST ASTContext.h, clang/lib/AST ASTContext.cpp ItaniumMangle.cpp

[clang] implement CWG2064: ignore value dependence for decltype

The 'decltype' for a value-dependent (but non-type-dependent) should be known,
so this patch makes them non-opaque instead.

This patch also implements what's neceessary to allow overloading
on pure differences in instantiation dependence, making `std::void_t`
usable for SFINAE purposes.

This also readds a few test cases from da98651, which was a previous attempt
at resolving CWG2064.

Fixes #8740
Fixes #61818
Fixes #190388
DeltaFile
+888-161clang/lib/AST/ASTContext.cpp
+328-12clang/test/SemaTemplate/instantiation-dependence.cpp
+176-96clang/lib/AST/ItaniumMangle.cpp
+100-98clang/lib/Sema/SemaCXXScopeSpec.cpp
+62-57clang/lib/AST/Type.cpp
+88-11clang/include/clang/AST/ASTContext.h
+1,642-43570 files not shown
+2,397-78876 files

LLVM/project 3a7c0ebclang/lib/Headers arm64_neon.h module.modulemap, clang/test/CodeGen arm64-neon-header.c

[clang] Add arm64_neon.h wrapper on windows (#196014)

Add an MSVC-compatible <arm64_neon.h> resource header that forwards to
Clang's generated <arm_neon.h>. This lets ARM64 Windows code using the
MSVC header name lower NEON intrinsics through Clang builtins instead of
eaving external neon_* calls such as neon_ld1m4_q32

Fixes #195683
DeltaFile
+21-0clang/lib/Headers/arm64_neon.h
+14-0clang/test/CodeGen/arm64-neon-header.c
+6-0clang/lib/Headers/module.modulemap
+1-0clang/lib/Headers/CMakeLists.txt
+42-04 files

LLVM/project ed20210clang/docs ReleaseNotes.rst, clang/lib/Parse ParseDecl.cpp

[clangd][Parser][Sema] Fix TemplateIdAnnotation UAF with template-id declarator and lambda default argument (#196788)

I think this is another case of template annotations lifetime bug,
similar to the one fixed by
https://github.com/llvm/llvm-project/pull/89494.

Closes https://github.com/llvm/llvm-project/issues/196725.
DeltaFile
+8-0clang/lib/Parse/ParseDecl.cpp
+6-0clang/test/Parser/cxx-default-args.cpp
+1-0clang/docs/ReleaseNotes.rst
+15-03 files

LLVM/project 5ea4df0compiler-rt/lib/sanitizer_common sanitizer_common.h

Fix formatting of function declarations in sanitizer_common.h
DeltaFile
+2-2compiler-rt/lib/sanitizer_common/sanitizer_common.h
+2-21 files

LLVM/project fef9638compiler-rt/lib/asan asan_thread.h

Fix pointer declaration style for altstack_base_
DeltaFile
+1-1compiler-rt/lib/asan/asan_thread.h
+1-11 files

LLVM/project 3b93af2compiler-rt/lib/sanitizer_common sanitizer_posix_libcdep.cpp

Fix return statement formatting in sigaltstack check
DeltaFile
+2-1compiler-rt/lib/sanitizer_common/sanitizer_posix_libcdep.cpp
+2-11 files

LLVM/project 19231dbcompiler-rt/test/asan/TestCases/Posix multiple_sigaltstack.cpp

Reorder includes
DeltaFile
+1-1compiler-rt/test/asan/TestCases/Posix/multiple_sigaltstack.cpp
+1-11 files

LLVM/project 19a1532llvm/test/CodeGen/AMDGPU amdgcn.bitcast.1024bit.ll amdgcn.bitcast.512bit.ll, llvm/test/CodeGen/AMDGPU/NextUseAnalysis spill-vreg-many-lanes.mir acyclic-770bb.mir

Merge branch 'main' into users/ilovepi/signalstack
DeltaFile
+275,101-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/spill-vreg-many-lanes.mir
+87,984-82,073llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
+144,679-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/acyclic-770bb.mir
+66,293-29,491llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
+57,682-0llvm/test/CodeGen/AMDGPU/NextUseAnalysis/double-nested-loops-complex-cfg.mir
+27,592-26,643llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
+659,331-138,20728,075 files not shown
+3,490,982-1,327,98828,081 files

LLVM/project 578ba5fllvm/include/llvm/ADT MapVector.h

[ADT] Avoid map storage for small SmallMapVector (#196473)

SmallMapVector previously used SmallDenseMap for its index, which still
initializes and maintains map storage even when the number of entries is
tiny.

Teach MapVector to support a vector-only small mode. While the entry
count stays
within the configured small size, operations use the underlying vector
directly.
When the size grows past the threshold, the map index is built and
subsequent
operations use the regular MapVector path.

This mirrors the small-size strategy used by SmallSetVector.
DeltaFile
+73-15llvm/include/llvm/ADT/MapVector.h
+73-151 files

LLVM/project 16b7331llvm/lib/CodeGen AtomicExpandPass.cpp, llvm/test/CodeGen/ARM atomic-load-store.ll

[AtomicExpand] Add bitcasts when expanding load atomic vector

AtomicExpand fails for aligned `load atomic <n x T>` because it
does not find a compatible library call. This change adds appropriate
bitcasts so that the call can be lowered. It also adds support for
128 bit lowering in tablegen to support SSE/AVX.
DeltaFile
+226-61llvm/test/Transforms/AtomicExpand/X86/expand-atomic-non-integer.ll
+90-1llvm/test/CodeGen/X86/atomic-load-store.ll
+51-0llvm/test/CodeGen/ARM/atomic-load-store.ll
+15-4llvm/lib/CodeGen/AtomicExpandPass.cpp
+382-664 files

LLVM/project dff356dclang-tools-extra/clang-tidy/bugprone ArgumentCommentCheck.cpp ArgumentCommentCheck.h, clang-tools-extra/docs ReleaseNotes.rst

[clang-tidy] comment braced and parenthesized init arguments (#180408)

Handle arguments like `{}`, `Type{}` and `Type()` in
`bugprone-argument-comment` and
add coverage for `initializer_list` and designated initializers.

Fixes: https://github.com/llvm/llvm-project/issues/171842
DeltaFile
+239-0clang-tools-extra/test/clang-tidy/checkers/bugprone/argument-comment-init-list.cpp
+117-37clang-tools-extra/docs/clang-tidy/checks/bugprone/argument-comment.rst
+111-27clang-tools-extra/clang-tidy/bugprone/ArgumentCommentCheck.cpp
+69-0clang-tools-extra/test/clang-tidy/checkers/bugprone/argument-comment-init-list-cxx20.cpp
+18-7clang-tools-extra/clang-tidy/bugprone/ArgumentCommentCheck.h
+8-2clang-tools-extra/docs/ReleaseNotes.rst
+562-736 files

LLVM/project b66d798libc/src/__support high_precision_decimal.h

[libc] Fix a copyright comment typo (#196846)

No behavior change.
DeltaFile
+1-1libc/src/__support/high_precision_decimal.h
+1-11 files

LLVM/project fb53478llvm/include/llvm/Support VersionTuple.h ELFAttributeParser.h, llvm/lib/Support ConvertUTFWrapper.cpp APInt.cpp

Add missing direct includes for bit.h/SwapByteOrder.h. NFC (#196843)

These translation units use llvm::endianness, llvm::byteswap,
llvm::has_single_bit, or sys::IsLittleEndianHost without explicitly
including the header that declares them. They currently compile only
because llvm/ADT/Hashing.h transitively pulls in
llvm/Support/SwapByteOrder.h (which includes llvm/ADT/bit.h).
DeltaFile
+1-0llvm/unittests/Object/SymbolicFileTest.cpp
+1-0llvm/unittests/DebugInfo/DWARF/DWARFFormValueTest.cpp
+1-0llvm/lib/Support/ConvertUTFWrapper.cpp
+1-0llvm/lib/Support/APInt.cpp
+1-0llvm/include/llvm/Support/VersionTuple.h
+1-0llvm/include/llvm/Support/ELFAttributeParser.h
+6-02 files not shown
+8-08 files

LLVM/project d565d51llvm/test/Transforms/LoopVectorize/AArch64 reduction-cost.ll binop-costs.ll, llvm/test/Transforms/LoopVectorize/X86/CostModel vpinstruction-cost.ll

[LV] Add missing cost tests for various unary and binary ops (NFC) (#196841)
DeltaFile
+317-24llvm/test/Transforms/LoopVectorize/X86/CostModel/vpinstruction-cost.ll
+111-0llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
+34-1llvm/test/Transforms/LoopVectorize/AArch64/binop-costs.ll
+462-253 files