Displaying 1 50 of 239,137 commits (0.019s)

LLVM — llvm/trunk/lib/Target/X86 X86FixupBWInsts.cpp

[X86] Remove stale comment about FixupBWInsts pass being off by default. NFC

LLVM — llvm/trunk/lib/Target/X86 X86InstrInfo.cpp X86InstrAVX512.td

[AVX-512] Allow EVEX encoding unordered/ordered/equal/notequal VCMPPS/PD/SS/SD to be 
commuted just like the SSE and AVX counterparts.

LLVM — llvm/trunk/lib/Target/X86 X86InstrInfo.cpp X86InstrSSE.td, llvm/trunk/test/CodeGen/X86 fast-isel-cmp.ll

[X86] Enable FR32/FR64 cmpeq/cmpne/cmpunord/cmpord to be commuted.

LLVM — llvm/trunk/lib/Target/X86 X86InstrInfo.cpp, llvm/trunk/test/CodeGen/X86 stack-folding-fp-avx512vl.ll stack-folding-fp-avx512.ll

[AVX-512] Add load folding for EVEX vcmpps/pd/ss/sd.

LLVM — llvm/trunk/lib/LTO LTO.cpp, llvm/trunk/test/tools/gold/X86 common.ll start-lib-common.ll

[LTO] Don't create a new common unless merged has different size

This addresses a regression in common handling from the new LTO
API in r278338. Only create a new common if the size is different.
The type comparison against an array type fails when the size is
different but not an array. GlobalMerge does not handle the
array types as well and we lose some global merging opportunities.

Reviewers: mehdi_amini

Subscribers: junbuml, llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23955

LLVM — llvm/trunk/lib/Target/AMDGPU SISchedule.td

AMDGPU: Mark sched model complete

Fixes bug 26800

LLVM — llvm/trunk/lib/Target/AMDGPU SIInstructions.td SIInstrFormats.td

AMDGPU: Remove unneeded implicit exec uses/defs

SI_BREAK, SI_IF_BREAK, and SI_ELSE_BREAK do not def exec.
SI_IF_BREAK and SI_ELSE_BREAK do not read it either.

LLVM — llvm/trunk/unittests/ExecutionEngine/Orc LogicalDylibTest.cpp

[Orc] Explicitly specify type for assignment.

This should fix the MSVC errors in

LLVM — llvm/trunk/lib/Transforms/Scalar GVNHoist.cpp

GVN-hoist: invalidate MD cache (PR29144)

Without invalidating the entries in the MD cache we would try to access instructions
that were removed in previous iterations of hoisting.

Differential Revision: https://reviews.llvm.org/D23927

LLVM — llvm/trunk/include/llvm/CodeGen/GlobalISel RegBankSelect.h, llvm/trunk/lib/CodeGen/GlobalISel RegBankSelect.cpp

[RegBankSelect] Do not abort when the target wants to fall back.

LLVM — llvm/trunk/include/llvm/CodeGen/GlobalISel InstructionSelect.h, llvm/trunk/lib/CodeGen/GlobalISel InstructionSelect.cpp

[InstructionSelect] Do not abort when the target wants to fall back.

LLVM — llvm/trunk/include/llvm/CodeGen/GlobalISel MachineLegalizePass.h, llvm/trunk/lib/CodeGen/GlobalISel MachineLegalizePass.cpp MachineLegalizeHelper.cpp

[MachineLegalize] Do not abort when the target wants to fall back.

LLVM — libcxx/trunk/include system_error __locale

Add attribute noreturn to functions that throw

Reviewers: mclow.lists, EricWF, howard.hinnant, sebpop
Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D21232

LLVM — llvm/trunk/lib/Target/AMDGPU AMDGPUISelLowering.cpp R600Instructions.td, llvm/trunk/test/CodeGen/AMDGPU mul_uint24.ll mul_int24.ll

AMDGPU: Select mulhi 24-bit instructions

LLVM — llvm/trunk/lib/Target/AMDGPU SIISelLowering.cpp SIInstrInfo.cpp, llvm/trunk/test/CodeGen/AMDGPU ffloor.f64.ll fract.f64.ll

AMDGPU: Move cndmask pseudo to be isel pseudo

There's only one use of this for the convenience
of a pattern. I think v_mov_b64_pseudo should also be
moved, but SIFoldOperands does currently make use of it.

LLVM — llvm/trunk/lib/Target/AMDGPU SIInstructions.td

AMDGPU: Fix sched type for branches

LLVM — llvm/trunk/lib/Target/AMDGPU SILowerControlFlow.cpp SIInstructions.td

AMDGPU: Remove register operand from si_mask_branch

It isn't used for anything, and is also misleading since
it could be spilled at the end of the block, so it can't be relied
on. There ends up being a verifier error about using an undefined
register since the spill kills the register.

LLVM — lldb/trunk/packages/Python/lldbsuite/test/macosx/queues TestQueues.py

This test now succeeds.

LLVM — lldb/trunk/source/Plugins/ExpressionParser/Clang ClangExpressionParser.cpp

Fixed the location of a conditional to make the following code clearer.

LLVM — llvm/trunk/lib/Target/AMDGPU/MCTargetDesc AMDGPUAsmBackend.cpp, llvm/trunk/test/MC/AMDGPU max-branch-distance.s

AMDGPU: Improve error reporting for maximum branch distance

Unfortunately this seems to only help the assembler diagnostic.

LLVM — lldb/trunk/source/Plugins/ExpressionParser/Clang IRForTarget.cpp IRForTarget.h

The error stream in IRForTarget is never null, so use it instead of the log.

LLVM — llvm/trunk/runtimes CMakeLists.txt

[CMake] Only generate Components.cmake if components are specified

Generating the Components import file is useless if there are no components coming in from 
the runtimes configuration, so we should skip generation in that case.

This also should fix the configuration error that Renato reported on llvm-dev.
Delta File
+19 -17 llvm/trunk/runtimes/CMakeLists.txt
+19 -17 1 file

LLVM — llvm/trunk/include/llvm/ExecutionEngine/Orc LogicalDylib.h, llvm/trunk/unittests/ExecutionEngine/Orc LogicalDylibTest.cpp CMakeLists.txt

[ORC] Fix typo in LogicalDylib, add unit test.

LLVM — llvm/trunk/include/llvm InitializePasses.h, llvm/trunk/include/llvm/CodeGen Passes.h

[GlobalISel] Add a fallback path to SDISel.

When global-isel fails on a MachineFunction MF, MF will be cleaned up
and given to SDISel.
Thanks to this fallback, we can already perform correctness test even if
we support only a small portion of the functions in a test.

LLVM — llvm/trunk/lib/Target/AArch64 AArch64CallLowering.cpp

[AArch64][CallLowering] Do not assert for not implemented part.

When doing the ABI lowering, report a failure to the caller instead of
asserting. This gives a chance for the caller to recover.

LLVM — llvm/trunk/lib/CodeGen/GlobalISel InstructionSelect.cpp RegBankSelect.cpp

[GlobalISel] Teach the core pipeline not to run if ISel failed.

LLVM — llvm/trunk/test/CodeGen/X86 oddshuffles.ll

[X86] Add baseline test for "odd" shuffles. NFC.

Adds a baseline test for lowering shuffles where the width of the output
vector is not twice the size of the input vectors. Many of those sequences
are suboptimal, and will hopefully be improved in follow-up patches.

LLVM — llvm/trunk/include/llvm/CodeGen/GlobalISel IRTranslator.h, llvm/trunk/lib/CodeGen/GlobalISel IRTranslator.cpp

[IRTranslator] Do not abort when the target wants to fall back.

Every pass in the GlobalISel pipeline will need to do something similar.

LLVM — llvm/trunk/include/llvm/CodeGen MachineFunction.h, llvm/trunk/lib/CodeGen MachineFunction.cpp

[MFProperties] Introduce a FailedISel property.

This is used to communicate that the instruction selection pipeline
failed at some point.
Another way to achieve that would be to have some kind of conditional
scheduling in the PassManager, such that we only schedule a pass based
on the success/failure of another one. The property approach has the
advantage of being lightweight and solve the problem at stake.

LLVM — lldb/trunk/source/Plugins/ExpressionParser/Clang ClangExpressionParser.cpp

Fixed a bad lldbassert() condition.

LLVM — llvm/trunk/include/llvm/LTO Caching.h, llvm/trunk/lib/LTO Caching.cpp

[ThinLTO] Move loading of cache entry to client

Have the cache pass back the path to the cache entry when it
is ready to be loaded, instead of a buffer.

For gold-plugin we can simply pass this file back to gold directly,
which avoids expensive writing of a separate tmp file. Ensure
the cache entry is not deleted on cleanup by adjusting the setting
of the IsTemporary flags.

Moved the loading of the buffer into llvm-lto2 to maintain current

Reviewers: mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D23946

LLVM — lldb/trunk/source/Commands CommandObjectBreakpoint.cpp CommandObjectType.cpp

Tables of command options in LLDB benefit from hand-formatting to make it
easier to scan a set of options with a relatively large number of positional
arguments. This commit standardizes their formatting throughout LLDB and
applies surrounding directives to exempt them from being formatted by

These kinds of exemptions should be rare cases that benefit significantly
from alternative formatting. They also imply a long-term obligation to
maintain their format since the automated tools will not do so.

LLVM — llvm/trunk/docs OptBisect.rst index.rst

Adding document describing the use of the -opt-bisect-limit option.

LLVM — llvm/trunk/include/llvm/CodeGen TargetPassConfig.h, llvm/trunk/lib/CodeGen TargetPassConfig.cpp

[TargetPassConfig] Add a target hook to know what GlobalISel should do on error.

By default, this hook tells GlobalISel to abort (report a fatal error)
when it encounters an error. The alternative will be to fall back on
This fall back will be removed when the bring-up of GlobalISel is over.

LLVM — llvm/trunk/lib/CodeGen/GlobalISel IRTranslator.cpp

[IRTranslator][NFC] Use DEBUG_TYPE instead of repeating the name.

LLVM — llvm/trunk/lib/CodeGen/SelectionDAG SelectionDAGISel.cpp

[SelectionDAG] Do not run the ISel process on already selected code.

Right now, this cannot happen, but with the fall back path of GlobalISel
it will show up eventually.

LLVM — llvm/trunk/include/llvm/CodeGen MachineFunction.h, llvm/trunk/lib/CodeGen MachineFunction.cpp

[MachineFunction] Introduce a reset method.

This method allows to reset the state of a MachineFunction as if it was
just created. This will be used during the bring-up of GlobalISel to
provide a way to fallback on SelectionDAG. That way, we can start doing
correctness testing even if we are not able to select all functions via
the global instruction selector.

LLVM — llvm/trunk/utils/TableGen CodeGenRegisters.h

TableGen: Switch from a std::map to a DenseMap in CodeGenSubRegIndex. NFC

This mapping is between pointers, which DenseMap is particularly good
at. Most targets aren't really affected, but if there's a lot of
subregister composition this can shave off a good chunk of time from
generating registers.

LLVM — llvm/trunk/include/llvm/CodeGen MachineFunction.h, llvm/trunk/lib/CodeGen/MIRParser MIRParser.cpp

[MFProperties] Introduce a reset method with no argument.

This method allows to reset all the properties in one go.

LLVM — llvm/trunk/include/llvm/CodeGen MachineFunction.h MachineRegisterInfo.h, llvm/trunk/lib/CodeGen MachineFunctionPass.cpp

[MFProperties][NFC] Rename clear into reset to match BitVector naming.

The name clear is used to reset all the bit in bitvectors and using it
to reset just properties was confusing.

LLVM — cfe/trunk/include/clang/Driver CLCompatOptions.td, cfe/trunk/test/Driver cl-options.c

clang-cl: Support MSVC2015's /validate-charset flag.

Clang always assumes that files are utf-8. If an invalidly encoded character is
used in an identifier, clang always errors. If it's used in a character
literal, clang warns Winvalid-source-encoding (on by default). Clang never
checks the encoding of things in comments (adding this seems like a nice
feature if it doesn't impact performance).

For cl.exe /utf-8 (which enables /validate-charset), if a bad character is used
in an identifier, it emits both an error and a warning. If it's used in a
literal or a comment, it emits a warning.

So mapping /validate-charset to -Winvalid-source-encoding seems like a fairly
decent fit.


LLVM — llvm/trunk/lib/Target/AMDGPU SILoadStoreOptimizer.cpp, llvm/trunk/test/CodeGen/AMDGPU local-64.ll load-local-i16.ll

AMDGPU/SI: Canonicalize offset order for merged DS instructions

If the scheduler clusters the loads, then the offsets will be sorted,
but it is possible for the scheduler to scheduler loads together
without out explicitly clustering them, which would give us non-sorted

Also, we will want to do this if we move the load/store optimizer before
the scheduler.

Reviewers: arsenm

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23776

LLVM — cfe/trunk/include/clang/Driver CLCompatOptions.td, cfe/trunk/test/Driver cl-options.c

clang-cl: Accept MSVC2015's '/utf-8' flag.

Clang always behaves as if that's passed, so just ignore the flag.

LLVM — llvm/trunk/lib/Target/AMDGPU SIRegisterInfo.cpp


LLVM — llvm/trunk/lib/Target/AMDGPU SIRegisterInfo.cpp SIRegisterInfo.h

AMDGPU/SI: Use a better method for determining the largest pressure sets

There are a few different sgpr pressure sets, but we only care about
the one which covers all of the sgprs.  We were using hard-coded
register pressure set names to determine the reg set id for the
biggest sgpr set.  However, we were using the wrong name, and this
method is pretty fragile, since the reg pressure set names may

The new method just looks for the pressure set that contains the most
reg units and sets that set as our SGPR pressure set.  We've also
adopted the same technique for determining our VGPR pressure set.

Reviewers: arsenm

Subscribers: MatzeB, arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D23687

LLVM — cfe/trunk/include/clang/Driver CLCompatOptions.td, cfe/trunk/lib/Driver Tools.cpp

clang-cl: Accept MSVC 2015's `/execution-charset:utf-8` flag.

Also makes -fexec-charset accept utf-8 case-insensitively.
Like https://reviews.llvm.org/D23807, but for execution-charset.
Also replace a few .lower() comparisons with equals_lower().


LLVM — llvm/trunk/runtimes CMakeLists.txt

[CMake] Expose runtime component check targets

This will expose the check targets for runtime project components into the top-level 
build. It will enable exposing targets like check-asan.

LLVM — llvm/trunk/include/llvm/Analysis OptimizationDiagnosticInfo.h, llvm/trunk/lib/Analysis OptimizationDiagnosticInfo.cpp

[Inliner] Report when inlining fails because callee's def is unavailable

This is obviously an interesting case because it may motivate code
restructuring or LTO.

Reporting this requires instantiation of ORE in the loop where the call
sites are first gathered.  I've checked compile-time
overhead *with* -Rpass-with-hotness and the worst slow-down was 6% in
mcf and quickly tailing off.  As before without -Rpass-with-hotness
there is no overhead.

Because this could be a pretty noisy diagnostics, it is currently
qualified as 'verbose'.  As of this patch, 'verbose' diagnostics are
only emitted with -Rpass-with-hotness, i.e. when the output is expected
to be filtered.

Reviewers: eraman, chandlerc, davidxl, hfinkel

Subscribers: tejohnson, Prazek, davide, llvm-commits

Differential Revision: https://reviews.llvm.org/D23415

LLVM — llvm/trunk/include/llvm/LTO LTO.h, llvm/trunk/lib/LTO LTO.cpp

Make writeToResolutionFile a static helper.

LLVM — llvm/trunk/include/llvm/CodeGen TailDuplicator.h, llvm/trunk/lib/CodeGen TailDuplicator.cpp

TailDuplication: Record blocks that received the duplicated block. NFC.

This will allow tail duplication during layout to handle the cfg changes more