LLVM/project ebb04b2llvm/lib/Transforms/IPO ExpandVariadics.cpp, llvm/test/Transforms/ExpandVariadics expand-va-intrinsic-split-linkage.ll expand-va-intrinsic-split-simple.ll

[profcheck] Propagate profile metadata to Wrapper function in optimize mode of ExpandVariadic. (#168161)

This PR fixes the issue where profile metadata (`!prof`) is dropped from
the `VariadicWrapper` when `ExpandVariadics` runs in
`--expand-variadics-override=optimize` mode.

In optimize mode, the pass splits the original variadic function into
two parts:

- A **VariadicWrapper** (retaining the original name) that handles the
`va_list` setup.
- A **FixedArityReplacement** (new function) that contains the original
core logic.

During this process, the basic blocks and associated metadata are
spliced into the `FixedArityReplacement`. Consequently, the
`VariadicWrapper`—which serves as the entry point for callers—is left
without function entry count metadata.


    [4 lines not shown]
DeltaFile
+40-28llvm/test/Transforms/ExpandVariadics/expand-va-intrinsic-split-linkage.ll
+16-4llvm/test/Transforms/ExpandVariadics/expand-va-intrinsic-split-simple.ll
+16-2llvm/test/Transforms/ExpandVariadics/intrinsics.ll
+7-0llvm/lib/Transforms/IPO/ExpandVariadics.cpp
+79-344 files

LLVM/project 1a29a23clang/lib/Sema SemaChecking.cpp, clang/test/Sema warn-fortify-source.c

[Clang][Sema] Add fortify warnings for strcat (#168965)

Continue to add fortify warnings that are missing in Clang for string
functions as part of #142230
DeltaFile
+8-0clang/test/Sema/warn-fortify-source.c
+3-0clang/lib/Sema/SemaChecking.cpp
+11-02 files

LLVM/project 76425fdclang/test/CodeGen sanitize-type-outlined.cpp

fix tysan test failing on unsupported arches (#169066)

DeltaFile
+1-1clang/test/CodeGen/sanitize-type-outlined.cpp
+1-11 files

LLVM/project 6344651clang-tools-extra/clang-doc/assets class-template.mustache namespace-template.mustache, clang-tools-extra/test/clang-doc mustache-index.cpp

[clang-doc] `<ul>` must be nested in `<li>`

The HTML spec states that only `<li>` can be children of `<ul>`. Nested
`<ul>` tags in an unordered list must be children of `<li>`.
DeltaFile
+50-38clang-tools-extra/clang-doc/assets/class-template.mustache
+18-14clang-tools-extra/clang-doc/assets/namespace-template.mustache
+12-10clang-tools-extra/test/clang-doc/mustache-index.cpp
+80-623 files

LLVM/project c82802eclang-tools-extra/clang-doc/assets namespace-template.mustache, clang-tools-extra/test/clang-doc mustache-separate-namespace.cpp

[clang-doc] Fix `</section>` mismatch in the namespace template

A `</section>` tag wasn't inside the `{{#HasRecords}}` Mustache tag, which caused a
mismatch if there weren't any records to render.
DeltaFile
+16-0clang-tools-extra/test/clang-doc/mustache-separate-namespace.cpp
+1-1clang-tools-extra/clang-doc/assets/namespace-template.mustache
+17-12 files

OPNSense/src f10f826sys/netlink netlink_snl.h

netlink: in snl_init_writer() don't overwrite error in case of failure

PR:     290050
(cherry picked from commit 488718ff42346888243496c00cbeb42ba004171e)
DeltaFile
+3-3sys/netlink/netlink_snl.h
+3-31 files

LLVM/project d5944fbllvm/lib/Target/AMDGPU AMDGPUTargetTransformInfo.cpp, llvm/test/Analysis/CostModel/AMDGPU shufflevector.ll

AMDGPU: Improve getShuffleCost accuracy for 8- and 16-bit shuffles

These shuffles can always be implemented using v_perm_b32, and so this
rewrites the analysis from the perspective of "how many v_perm_b32s does
it take to assemble each register of the result?"

The test changes in Transforms/SLPVectorizer/reduction.ll are
reasonable: VI (gfx8) has native f16 math, but not packed math.

commit-id:8b76e888
DeltaFile
+498-488llvm/test/Analysis/CostModel/AMDGPU/shufflevector.ll
+111-34llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
+107-20llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
+33-64llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
+17-34llvm/test/Transforms/SLPVectorizer/AMDGPU/slp-v2f16.ll
+1-31llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-chain-to-shuffles.ll
+767-6716 files

LLVM/project e673cdallvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine/AMDGPU extract-insert-i8.ll

VectorCombine: Improve the insert/extract fold in the narrowing case

Keeping the extracted element in a natural position in the narrowed
vector has two beneficial effects:

1. It makes the narrowing shuffles cheaper (at least on AMDGPU), which
   allows the insert/extract fold to trigger.
2. It makes the narrowing shuffles in a chain of extract/insert
   compatible, which allows foldLengthChangingShuffles to successfully
   recognize a chain that can be folded.

There are minor X86 test changes that look reasonable to me. The IR
change for AVX2 in llvm/test/Transforms/VectorCombine/X86/extract-insert-poison.ll
doesn't change the assembly generated by `llc -mtriple=x86_64-- -mattr=AVX2`
at all.

commit-id:c151bb04
DeltaFile
+6-16llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+2-15llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
+8-4llvm/test/Transforms/VectorCombine/X86/extract-insert-poison.ll
+4-4llvm/test/Transforms/VectorCombine/X86/extract-insert.ll
+2-2llvm/test/Transforms/VectorCombine/X86/pr126085.ll
+22-415 files

LLVM/project 459939fllvm/lib/Transforms/Vectorize VectorCombine.cpp, llvm/test/Transforms/VectorCombine/AMDGPU extract-insert-i8.ll

VectorCombine: Fold chains of shuffles fed by length-changing shuffles

Such chains can arise from folding insert/extract chains.

commit-id:a960175d
DeltaFile
+168-0llvm/lib/Transforms/Vectorize/VectorCombine.cpp
+8-33llvm/test/Transforms/VectorCombine/AMDGPU/extract-insert-i8.ll
+176-332 files

FreeBSD/ports ff235afemulators/virtualbox-ose-70 Makefile, emulators/virtualbox-ose-71 Makefile

emulators/virtualbox-ose-{,-nox11}-7{0,1,2}: Make Qt optional for building

Remove build dependency for Qt when NLS and graphical frontend is not
required.

PR:             291023
Co-authored-by: takahiro.kurosawa at gmail.com
MFH:            2025Q4
(cherry picked from commit 4f1b651ebc7aa3fca1b19f4f45fed00e5a397d57)
DeltaFile
+9-3emulators/virtualbox-ose-72/Makefile
+8-3emulators/virtualbox-ose-70/Makefile
+8-3emulators/virtualbox-ose-71/Makefile
+25-93 files

HardenedBSD/src 15e61ebsys/dev/sound/pci via8233.c envy24ht.c, sys/dev/sound/pcm mixer.c

Merge remote-tracking branch 'origin/hardened/current/master' into hardened/current/cross-dso-cfi
DeltaFile
+51-54sys/dev/sound/pcm/mixer.c
+50-51sys/dev/sound/pci/via8233.c
+34-35sys/dev/sound/pci/envy24ht.c
+34-34sys/dev/sound/pci/envy24.c
+29-28sys/dev/sound/pci/emu10k1.c
+27-27sys/dev/sound/pci/cmi.c
+225-22950 files not shown
+730-68656 files

HardenedBSD/src d2222f8sys/dev/sound/pci via8233.c envy24ht.c, sys/dev/sound/pcm mixer.c

Merge branch 'freebsd/current/main' into hardened/current/master
DeltaFile
+51-54sys/dev/sound/pcm/mixer.c
+50-51sys/dev/sound/pci/via8233.c
+34-35sys/dev/sound/pci/envy24ht.c
+34-34sys/dev/sound/pci/envy24.c
+29-28sys/dev/sound/pci/emu10k1.c
+27-27sys/dev/sound/pci/cmi.c
+225-22950 files not shown
+730-68656 files

HardenedBSD/src 47d5989sbin/dmesg dmesg.8, sys/netlink netlink_snl.h

Merge branch 'freebsd/14-stable/main' into hardened/14-stable/master
DeltaFile
+3-3sys/netlink/netlink_snl.h
+2-2sbin/dmesg/dmesg.8
+5-52 files

HardenedBSD/src 727f3dbshare/man/man4 vt.4, stand/man loader.8 loader_simp.8

Merge branch 'freebsd/15-stable/main' into hardened/15-stable/main
DeltaFile
+47-1stand/man/loader.8
+29-0tests/sys/kern/unix_passfd_test.c
+9-9sys/kern/uipc_usrreq.c
+8-1share/man/man4/vt.4
+8-0usr.bin/fortune/datfiles/freebsd-tips
+2-2stand/man/loader_simp.8
+103-133 files not shown
+111-149 files

HardenedBSD/ports 8982243benchmarks/iperf3/files patch-RELNOTES.md, databases/mongodb70/files patch-SConstruct

Merge branch 'freebsd/main' into hardenedbsd/main
DeltaFile
+2-44databases/mongodb70/files/patch-SConstruct
+26-10emulators/virtualbox-ose-71/files/patch-src_VBox_Additions_common_VBoxService_VBoxServiceVMInfo.cpp
+24-8emulators/virtualbox-ose-70/files/patch-src_VBox_Additions_common_VBoxService_VBoxServiceVMInfo.cpp
+18-2emulators/virtualbox-ose-legacy/files/patch-src_VBox_Additions_common_VBoxService_VBoxServiceVMInfo.cpp
+17-1emulators/virtualbox-ose-72/files/patch-src_VBox_Additions_common_VBoxService_VBoxServiceVMInfo.cpp
+18-0benchmarks/iperf3/files/patch-RELNOTES.md
+105-6534 files not shown
+208-15140 files

FreeBSD/poudriere ae1762csrc/share/poudriere jail.sh

Merge pull request #887 from yasuhirokimura/build_jail_silently

Add new configuration variable BUILD_JAIL_SILENTLY
DeltaFile
+3-0src/share/poudriere/jail.sh
+3-01 files

FreeBSD/ports 4f1b651emulators/virtualbox-ose-70 Makefile, emulators/virtualbox-ose-71 Makefile

emulators/virtualbox-ose-{,-nox11}-7{0,1,2}: Make Qt optional for building

Remove build dependency for Qt when NLS and graphical frontend is not
required.

PR:             291023
Co-authored-by: takahiro.kurosawa at gmail.com
MFH:            2025Q4
DeltaFile
+9-3emulators/virtualbox-ose-72/Makefile
+8-3emulators/virtualbox-ose-71/Makefile
+8-3emulators/virtualbox-ose-70/Makefile
+25-93 files

LLVM/project f8bbb21llvm/lib/Target/AMDGPU SIISelLowering.cpp

AMDGPU: Handle invariant when lowering global loads (#168914)

Global with invariant should be treated identically to
constant.
DeltaFile
+1-1llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+1-11 files

LLVM/project c687660llvm/test/CodeGen/AMDGPU load-global-invariant.ll

AMDGPU: Add baseline test for split/widen invariant loads (#168913)

This works fine on main, but broke after a future patch.
DeltaFile
+77-0llvm/test/CodeGen/AMDGPU/load-global-invariant.ll
+77-01 files

LLVM/project a1ad146llvm/include/llvm/CodeGen SDPatternMatch.h

inline
DeltaFile
+1-1llvm/include/llvm/CodeGen/SDPatternMatch.h
+1-11 files

LLVM/project 5dbe83cclang/lib/CIR/CodeGen CIRGenDeclOpenACC.cpp CIRGenOpenACCClause.cpp, clang/test/CIR/CodeGenOpenACC declare-link.cpp openacc-not-implemented.cpp

[OpenACC][CIR] Handle 'declare' construct local lowering (&link clause) (#168793)

'declare' is a declaration directive, so it can appear at 3 places:
Global/NS scope, class scope, or local scope. This patch implements ONLY
the 'local' scope lowering for 'declare'.

A 'declare' is lowered as a 'declare_enter' and 'declare_exit'
operation, plus data operands like all others. Sema restricts the form
of some of these, but they are otherwise identical.

'declare' DOES require at least 1 clause for the examples to make sense,
so this ALSO implements 'link', which is the 'simpliest' one. It is ONLY
attached to the 'declare_enter', and doesn't require any additional work
besides a very small addition to how we handle clauses.
DeltaFile
+130-0clang/test/CIR/CodeGenOpenACC/declare-link.cpp
+29-1clang/lib/CIR/CodeGen/CIRGenDeclOpenACC.cpp
+13-0clang/lib/CIR/CodeGen/CIRGenOpenACCClause.cpp
+3-2clang/test/CIR/CodeGenOpenACC/openacc-not-implemented.cpp
+175-34 files

NetBSD/src vCUazsstests/lib/libc/misc Makefile

   hack around:

   (a) clang not enabling ultrasparc mode on netbsd (seems like a bug)
   (b) the version of clang in-tree not having -mvis
VersionDeltaFile
1.12+3-1tests/lib/libc/misc/Makefile
+3-11 files

LLVM/project 6662319llvm/include/llvm/CodeGen SDPatternMatch.h

Remove template arguments
DeltaFile
+1-1llvm/include/llvm/CodeGen/SDPatternMatch.h
+1-11 files

pfSense/pfsense 5ebbd87src/etc/inc captiveportal.inc

Remove l3 check when passing ARP for authenticated clients

Followup to 604a7b0d4d31e332d6fd4111b22ee29416e0700d.
DeltaFile
+2-2src/etc/inc/captiveportal.inc
+2-21 files

LLVM/project 0182a76llvm/include/llvm/ExecutionEngine/Orc/Debugging ELFDebugObjectPlugin.h, llvm/lib/ExecutionEngine/Orc/Debugging ELFDebugObjectPlugin.cpp

Revert "[ORC] Tailor ELF debugger support plugin to load-address patching only" (#169073)

Reverts llvm/llvm-project#168518
DeltaFile
+387-219llvm/lib/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.cpp
+22-12llvm/include/llvm/ExecutionEngine/Orc/Debugging/ELFDebugObjectPlugin.h
+409-2312 files

LLVM/project fea070bclang/lib/CodeGen CGHLSLBuiltins.cpp, clang/lib/Sema HLSLBuiltinTypeDeclBuilder.cpp

[HLSL] Add Load overload with status (#166449)

This PR adds a Load method for resources, which takes an additional
parameter by reference, status. It fills the status parameter with a 1
or 0, depending on whether or not the resource access was mapped.
CheckAccessFullyMapped is also added as an intrinsic, and called in the
production of this status bit.
Only addresses DXIL for the below issue:
https://github.com/llvm/llvm-project/issues/138910
Also only addresses the DXIL variant for the below issue:
https://github.com/llvm/llvm-project/issues/99204
DeltaFile
+43-0clang/lib/CodeGen/CGHLSLBuiltins.cpp
+38-0clang/test/CodeGenHLSL/resources/TypedBuffers-methods.hlsl
+38-0clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-lib.hlsl
+37-0clang/test/CodeGenHLSL/resources/StructuredBuffers-methods-ps.hlsl
+28-1llvm/lib/Target/DirectX/DXILShaderFlags.cpp
+19-2clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
+203-36 files not shown
+272-312 files

LLVM/project 00fb67allvm/lib/Support CommandLine.cpp

[Support] Use range-based for loops (NFC) (#169001)

Identified with modernize-loop-convert.
DeltaFile
+1-4llvm/lib/Support/CommandLine.cpp
+1-41 files

LLVM/project 226c51cclang/lib/Sema SemaStmt.cpp SemaExprCXX.cpp, clang/test/OpenMP target_exceptions_messages.cpp nvptx_target_exceptions_messages.cpp

[clang][Sema][OpenMP] Fix GPU exception target check (#169056)

Looks like I missed this when I added `Triple::isGPU()`.

Signed-off-by: Nick Sarnie <nick.sarnie at intel.com>
DeltaFile
+119-0clang/test/OpenMP/target_exceptions_messages.cpp
+0-103clang/test/OpenMP/nvptx_target_exceptions_messages.cpp
+2-2clang/lib/Sema/SemaStmt.cpp
+1-1clang/lib/Sema/SemaExprCXX.cpp
+122-1064 files

LLVM/project 36d7e91mlir/test/Target/SPIRV mlir-translate.mlir module.mlir

[MLIR] Drop use of REQUIRES:shell from tests (#168989)

This patch drops two instances of REQUIRES: shell from MLIR tests. This
feature does not mean much given the internal shell is the default for
MLIR. It does prevent these tests from running on Windows, but it does
not seem like there is anything inherent to these tests preventing them
from running on Windows (minus maybe the lack of spirv-tools, which is
explicitly required anyways.
DeltaFile
+0-1mlir/test/Target/SPIRV/mlir-translate.mlir
+0-1mlir/test/Target/SPIRV/module.mlir
+0-22 files

LLVM/project dbac917clang/lib/CIR/CodeGen CIRGenBuiltin.cpp

[CIR] Add NYI cases to builtin switch statement and move existing cases into functions (#168699)

This PR adds a number of cases to the switch statement in
`CIRGenBUiltin.cpp`. Some existing cases were relocated, so the order
matches the order from the switch statement in clangs codegen.
Additionally, some exisiting cases were moved to functions, to keep the
code a little cleaner. In the future, it will be easier to keep track of
which builtins have not been implemented, since there would always be a
NYI case for unimplemented builtins.
DeltaFile
+536-88clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
+536-881 files