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   csh: remove obsolete lint workaround

   lint: do not warn about '(void)&arg' having a null effect

   No need to do the initial assignment of curlwp here.

   Put setting curlwp behind a macro just like getting curlwp.

   Optimize cpu_switchto()'s handling of restartable atomic sequences:
   - We can us any callee-saved register we want, since we've already
     saved them in the outgoing PCB, so so this to avoid having to
     re-load curlwp, etc. from memory.  This let's us to eliminate a
     branch target.
   - ras_lookup() returns a pointer in %a0, but also returns the same
     value in %d0.  We don't care about the pointer-ness of the return
     value, so just use the %d0 return and shave off several insns.

   G/C the curpcb global on m68k.  It's redundant (the current PCB can always
   be accessed via the current LWP) and its presence means wasted work in
   cpu_switchto().

   For cases where asm code does need to get to to it, add a GET_CURPCB()
   macro that places curlwp's PCB pointer into the specified register.

   G/C the intr_depth global and just use the ci_idepth field in cpu_info
   that's just been hanging out there unused for years and years.

   Use INTR_DEPTH_{INCR,DECR}

   Use INTR_DEPTH_{INCR,DECR}

   Use INTR_DEPTH_{INCR,DECR}

   Comments / formatting around struct cpu_info.  NFC.

   Add and use a preprocessor macro for incrementing / decrementing
   the interrupt depth from asm code.

   pte_update(): Use CAS.L if !__HAVE_M68K_BROKEN_RMC.

   Change pte_update() to return the actual-pte rather than a bool.  When
   they don't match, we need to re-load the old PTE anyway, so this saves
   a redundant load.

   new pppd

   merge conflicts between ppp-2.5.2 and ppp-2.5.5

   Import pppd-2.5.5 (previous was 2.5.2)

   Release 2.5.5
   =============
   This is a bug-fix and security release, with no new features. Changes include:
   * Fix bugs where hook scripts such as /etc/ppp/ip-up were not being run.
   * Fix bugs causing PPP_SCRIPT_INSTANCE to be set incorrectly for some
     scripts.
   * Fix validation of received frames in the RADIUS plugin, along with some
     further hardening against incorrect received frames.
   * Fix generation of MPPE keys when EAP-TLS is being used with TLS 1.3.
   * This makes it work with Windows clients, but breaks compatibility with
     earlier versions of pppd (but only in the case where EAP-TLS and MPPE and
     the 'max-tls-version 1.3' option are all being used).
   * Various cases existed in the MPPE code where the link could come up without
     MPPE encryption despite it being requested via one or more of the 'require-
     mppe', 'require-mppe-40' or 'require-mppe-128' options. This is now fixed.
     Also, pppd will now accept an MPPE CCP configuration option requesting no
     encryption from the peer if MPPE is not required (rather than rejecting

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   Support the PMAP_WRITE_THROUGH cache mode.

   Add a PMAP_WRITE_THROUGH cache mode.

   PMAP_NOCACHE is not a flag -- it's one value in an enumeration of
   pmap_enter() cache mode specifiers.  Treat it as such, and also
   handle the PMAP_WRITE_COMBINE and PMAP_NOCACHE_OVR modes (which
   on MMUs supported by this pmap are equivalent to PMAP_NOCACHE).

   Load the kernel at 0x2000 instead of 0x0 so that VA 0 can remain
   unmapped in order to catch NULL-pointer derefs.  Use those pages
   at the beginning of RAM for the LWP0 u-area so they don't go to
   waste.

   nvme: Work around lost INTx notifications

   Some controllers fail to reassert INTx for completions posted while
   interrupts are masked. Recheck completion queues after unmasking and
   reschedule the soft interrupt if work remains. For PCI INTx, also mask
   PCI interrupt delivery while servicing the interrupt and recheck after
   reenabling it.

   It's unclear why this workaround is needed, but until the root cause
   is found it makes more drives work.

   Patch from berte on port-riscv

   https://mail-index.netbsd.org/port-riscv/2026/11/09/msg000339.html

   As with cpu_switchto(), eliminate the conditional fputype branching
   in savectx(), fpu_save(), and fpu_restore().

   Fix typo in 1.313/1.311

   Update to reflect cesfic status.

   Enable __HAVE_NEW_PMAP_68K by default on cesfic.

   Minimum changes needed to convert cesfic to use the new pmap_68k.

   Eliminate the (multiple) conditional branches based on fputype in the
   m68k context switch path.  Instead, the FPU save and restore blocks
   begin with a BRA.W insn that branches around the FPU code, essentially
   refleching FPU_NONE.  Once the FPU is probed, these BRA.W insns are
   patched with the displacement for the correct code fragment for the
   detected FPU.

   pmap_db_write_text_{enter,exit}() -> pmap_write_text_{enter,exit}().
   These functions are soon to be useful in more places than just the
   kernel debugger.

   And regen...