pciconf: Sort resource windows in order of decreasing alignment
instead of size.
Consider pci0 has two ppb's. ppb0 has a memory window larger in
size, but smaller in alignment. ppb1 has one smaller in size, but
larger in alignment.
In this case, the memory window of ppb1 must be allocated earlier.
Otherwise, total size of required memory exceeds pci0's mem_total,
in general, due to padding region.
pciconf: Fix round-up logics for total sizes of bridge resources
The previous ones are valid only if alignments are 4K or 1M,
for I/O or memory, respectively.
pciconf: Fix alignments of device memory and I/O resources
Resources must be their-size-aligned. While here:
- Switch *align variable from int to more suitable integer types.
- Make some conditions clearer (NFC).
sdmmc: dmamap_load bounce buffer on demand
When using a bounce buffer, cmd->c_dmamap->dm_segs[0]->ds_len did not agree with cmd->c_datalen because the bounce buffer is loaded once at initialization, so cmd->c_dmamap->dm_segs[0]->ds_len never gets updated before executing a sdmmc command.
This is problematic when the dmamap is passed on to an API like fdt_dma that treats the dmamap as the source of truth.
This problem probably hasn't surfaced yet because it needs three preconditions:
- using bounce buffers is already an edge case for when we can't allocate block size aligned dma memory
- the driver needs CAPS_DMA, but not CAPS_MULTI_SEG_DMA
- the driver needs to use cmd->c_dmamap->dm_segs[0]->ds_len and not cmd->c_datalen
The fix is to bus_dmamap_load the bounce buffer just when we need it. This allows us to load it with the correct size.
evbarm/ti_edma: enable on am18xx SoCs
The linux dt-bindings allow two different ways to specify power/clock domains for the edma3. This commit adds support for the way used on the am18xx (powerdomains).
igc: Fix KASSERT failure when `ifconfig igc%d down`
When we invoke callout_halt(9) for rxr->rx_refill, both in
igc_stop_locked() and igc_free_receive_buffers(), we don't hold
rxr->rxr_lock.
Also, `drvctl -d igc%d` does not trigger KASSERT failure now.
Make is possible to de-select depended options (which are processed in
a separate pass). Example:
<files.foo>
defflag SOME_OPTION: SOME_OTHER_OPTION
<MYFOO>
options SOME_OPTION
no options SOME_OTHER_OPTION
Prior to this change, a warning that SOME_OTHER_OPTION was not selected
would be issued and SOME_OTHER_OPTION would remain selected in the output.
After this change, no warning is issued and SOME_OTHER_OPTION is not
selected in the output as expected.
This does not have broad utility, but can quite useful in certain situations.
s/mipsNN_cp0_cause_read/mips_cp0_cause_read/ in INGENIC_INTR_DEBUG guarded code.
It is disabled though, thus moving #ifdef 0 higher to make option build.
(otherwise buffer is unused and compiler complains)
Not sure why the code was disabled, potentially it was too verbose.
Replace MFC0 macro with CP0 accessor functions in debug code.
Include ingenic_var.h in ingenic/mainbus.c when INGENIC_DEBUG is enabled and
move "opt_ingenic.h" higher so this option is visible for the include.
MFC0 macro was removed in ingenic_regs.h v1.25, but debug code was not adopted.
Fixes INGENIC_DEBUG enabled build for the evbmips CI20 kernel config.
Rename the "basic 4BSD" disklabel routines readdisklabel_4bsd()
and writedisklabel_4bsd(), but add weak aliases to the standard
names. This easily allows machine-specific code to look for an
odd-ball machine-firmware-specific format that might be required
only for booting but otherwise use garden-variety BSD disklabels.
