NetBSD/src pYwoKg9distrib/sets/lists/base shl.mi, distrib/sets/lists/debug shl.mi

   Bump libc minor 222->223
VersionDeltaFile
1.1002+3-3distrib/sets/lists/base/shl.mi
1.362+3-3distrib/sets/lists/debug/shl.mi
+6-62 files

NetBSD/src nepLtJ2distrib/sets/lists/comp mi

   Add entries for timespec_getres(3) - which should be needed regardless
   of whether that remains a separate man page, or becomes a link to another.
VersionDeltaFile
1.2492+4-1distrib/sets/lists/comp/mi
+4-11 files

NetBSD/src Q9gnoFDtests/kernel/arch/mips stack_pointer.h

   t_signal_and_sp: mips: Fix {MISALIGN,FIX}_SP() for !o32

   Use `daddiu` instead of `addiu` as done in <mips/asm.h>.

   Otherwise, +/-1 is added to lower-32-bits of sp, and then
   results are sign-extended to whole-64-bits register (oops!!).
VersionDeltaFile
1.2+6-1tests/kernel/arch/mips/stack_pointer.h
+6-11 files

NetBSD/src b4v4xXHlib/libc shlib_version

   libc: Bump shlib minor for timespec_getres(3).
VersionDeltaFile
1.298+2-2lib/libc/shlib_version
+2-21 files

NetBSD/src Kk4hcbTinclude time.h, lib/libc/gen timespec_getres.3 timespec_getres.c

   libc: C23: add timespec_getres(3) function

   timespec_getres is to timespec_get as clock_getres is to clock_gettime.

   PR standards/58608
   PR lib/59140
VersionDeltaFile
1.1+79-0lib/libc/gen/timespec_getres.3
1.1+60-0lib/libc/gen/timespec_getres.c
1.7+11-5lib/libc/gen/timespec_get.3
1.56+11-1include/time.h
1.224+4-3lib/libc/gen/Makefile.inc
+165-95 files

NetBSD/src AZAQV30tests/kernel t_signal_and_sp.c, tests/kernel/arch/hppa contextspfunc.S

   t_signal_and_sp: Fix threadsp test to actually test the thread sp.

   Copypasta error had it testing alignment of signalsp instead, and
   since it was always null, that always passed.  Mark it xfail on mips
   now as originally expected.

   While here, deal with some other issues:

   - Test was failing on riscv for me because I haven't updated this
     `current' VM in a while so it didn't have the fix for 57721
     (pthread_attr_setstack incorrectly adjusts address as if for guard
     page).  Don't mark it xfail.

   - Fix amd64 threadspfunc.S to adjust rsp like in all the other amd64
     stubs so it's congruent to 0 mod 16, not congruent to 8 mod 16.

   - Fix hppa contextspfunc.S to use separate registers for separate
     purposes at the same time, instead of expecting addil to preserve
     %r1 AND yield a result we use later in %r1.

    [2 lines not shown]
VersionDeltaFile
1.10+10-29tests/kernel/t_signal_and_sp.c
1.2+14-3tests/kernel/arch/x86_64/threadspfunc.S
1.2+8-8tests/kernel/arch/hppa/contextspfunc.S
+32-403 files

NetBSD/src mOv221Tinclude time.h, lib/libc/gen timespec_get.3 timespec_get.c

   libc: C23: Add TIME_MONOTONIC as a base for timespec_get

   PR standards/58608
VersionDeltaFile
1.6+18-2lib/libc/gen/timespec_get.3
1.3+6-2lib/libc/gen/timespec_get.c
1.55+5-1include/time.h
+29-53 files

NetBSD/src gQywXOVinclude time.h, lib/libc/time offtime.3

   libc: Expose timegm to standard C23 applications.
VersionDeltaFile
1.54+8-3include/time.h
1.5+7-2lib/libc/time/offtime.3
+15-52 files

NetBSD/src 9wAennMtests/kernel t_signal_and_sp.c

   t_signal_and_sp: Test makecontext with uc_link too.

   This exercises the resumecontext path, which currently leaves the
   stack pointer misaligned on mipsn64 (note: not mips64, which is
   64-bit mips with n32 ABI).

   Also add some assertions about the stack pointer lying within the
   expected stack range and mark riscv inexplicably broken for the
   pthread_create sp.  And mark the hppa context/thread tests broken --
   not yet sure what's wrong with them.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.9+162-15tests/kernel/t_signal_and_sp.c
+162-151 files

NetBSD/src P3lKP1rtests/kernel t_signal_and_sp.c, tests/kernel/arch/mips threadspfunc.S

   t_signal_and_sp: Fix threadspfunc on mips.

   1. Writing branch delay slots requires `.set noreorder'.  Got used to
      reading and writing RISCy code with branch delay slots ages ago,
      still haven't gotten used to having to tell the assembler `no, I
      really want you to assemble the instructions I wrote, as I wrote
      them, and not some other instructions in some other order'.

   2. Return value is v0 on mips, not a0 like modern mips^W^Wriscv.

   With this, the threadsp test passes on mips.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.8+2-7tests/kernel/t_signal_and_sp.c
1.2+4-3tests/kernel/arch/mips/threadspfunc.S
+6-102 files

NetBSD/src dwPpeGDtests/kernel t_signal_and_sp.c, tests/kernel/arch/alpha contextspfunc.S

   t_signal_and_sp: Test makecontext and pthread_create stack alignment.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.7+142-3tests/kernel/t_signal_and_sp.c
1.1+64-0tests/kernel/arch/sparc/contextspfunc.S
1.1+56-0tests/kernel/arch/i386/contextspfunc.S
1.1+55-0tests/kernel/arch/x86_64/contextspfunc.S
1.1+55-0tests/kernel/arch/mips/contextspfunc.S
1.1+50-0tests/kernel/arch/alpha/contextspfunc.S
+422-312 files not shown
+923-418 files

NetBSD/src 024jhDFtests/kernel/arch/alpha execsp.S

   t_signal_and_sp: Fix main function on alpha so it returns zero.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.2+3-2tests/kernel/arch/alpha/execsp.S
+3-21 files

NetBSD/src p1A0pSutests/kernel/arch/riscv execsp.S signalsphandler.S

   t_signal_sp: Add riscv support.

   riscv64 looks good, haven't tested riscv32.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.1+100-0tests/kernel/arch/riscv/execsp.S
1.1+45-0tests/kernel/arch/riscv/signalsphandler.S
1.1+35-0tests/kernel/arch/riscv/stack_pointer.h
+180-03 files

NetBSD/src OWsq8Ofsys/arch/sparc/include param.h, tests/kernel/arch/sparc execsp.S signalsphandler.S

   t_signal_and_sp: Add sparc support.

   Seems fine!  Would be nice if we had a well-known macro to abstract
   PIC vs non-PIC `sethi/ori/(ld)' like I invented here, to reduce
   needless #ifdef __PIC__ conditionals.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.1+123-0tests/kernel/arch/sparc/execsp.S
1.1+62-0tests/kernel/arch/sparc/signalsphandler.S
1.1+35-0tests/kernel/arch/sparc/stack_pointer.h
1.76+3-1sys/arch/sparc/include/param.h
+223-14 files

NetBSD/src X1DoZwSsys/arch/i386/include param.h, tests/kernel t_signal_and_sp.c

   t_signal_and_sp: Add i386 support.

   i386 too is confused by misaligned sigaltstack or esp on interrupt.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.1+112-0tests/kernel/arch/i386/execsp.S
1.1+56-0tests/kernel/arch/i386/signalsphandler.S
1.1+35-0tests/kernel/arch/i386/stack_pointer.h
1.89+9-1sys/arch/i386/include/param.h
1.6+4-4tests/kernel/t_signal_and_sp.c
+216-55 files

NetBSD/src j1n7sX1sys/arch/hppa/include param.h, tests/kernel/arch/hppa execsp.S signalsphandler.S

   t_signal_and_sp: Add hppa support.

   Fortunately, hppa -- which uses monster 64-byte(!) stack alignment --
   looks good already.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.1+130-0tests/kernel/arch/hppa/execsp.S
1.1+46-0tests/kernel/arch/hppa/signalsphandler.S
1.1+35-0tests/kernel/arch/hppa/stack_pointer.h
1.31+3-1sys/arch/hppa/include/param.h
+214-14 files

NetBSD/src zcsq5NQsys/arch/mips/include mips_param.h, tests/kernel Makefile t_signal_and_sp.c

   t_signal_and_sp: Add mips support.

   PR kern/59327: user stack pointer is not aligned properly

   PR kern/58149: Cannot return from a signal handler if SP was
   misaligned when the signal arrived

   Stack pointer misaligment in some cases hypothesized to be a possible
   cause of:

   PR port-evbmips/59236: Multiple segfaults in erlite3 boot
VersionDeltaFile
1.1+126-0tests/kernel/arch/mips/execsp.S
1.1+55-0tests/kernel/arch/mips/signalsphandler.S
1.1+35-0tests/kernel/arch/mips/stack_pointer.h
1.89+10-1tests/kernel/Makefile
1.53+7-1sys/arch/mips/include/mips_param.h
1.5+4-4tests/kernel/t_signal_and_sp.c
+237-66 files

NetBSD/src 8QwnObDtests/kernel t_signal_and_sp.c, tests/kernel/arch/alpha execsp.S signalsphandler.S

   t_signal_and_sp: Add alpha support.

   Turns out alpha too gets confused by by misaligned sigaltstack, and
   by misaligned sp in the interrupted code, when a signal is delivered.

   PR kern/59327: user stack pointer is not aligned properly

   PR kern/58149: Cannot return from a signal handler if SP was
   misaligned when the signal arrived
VersionDeltaFile
1.1+105-0tests/kernel/arch/alpha/execsp.S
1.1+49-0tests/kernel/arch/alpha/signalsphandler.S
1.1+35-0tests/kernel/arch/alpha/stack_pointer.h
1.4+13-2tests/kernel/t_signal_and_sp.c
+202-24 files

NetBSD/src UMBLfPstests/kernel t_signal_and_sp.c h_execsp.c, tests/kernel/arch/aarch64 execsp.S

   t_signal_and_sp: Check sp on elf constructor/destructor entry too.

   XXX Should maybe test both .ctors/.dtors and .init/fini_array, but
   for now I'm limiting this to whatever gcc uses by default for each
   architecture.

   PR kern/59327: user stack pointer is not aligned properly
VersionDeltaFile
1.2+44-7tests/kernel/arch/x86_64/execsp.S
1.2+44-5tests/kernel/arch/aarch64/execsp.S
1.3+16-3tests/kernel/t_signal_and_sp.c
1.2+8-3tests/kernel/h_execsp.c
1.2+5-2tests/kernel/h_execsp.h
+117-205 files

NetBSD/src V4IsWM6tests/kernel t_signal_and_sp.c h_execsp.c, tests/kernel/arch/aarch64 execsp.S signalsphandler.S

   Test stack pointer alignment in various scenarios.

   1. elf entry point
   2. main function
   3. signal handler

   Extend the test to amd64 while here -- fortunately both aarch64 and
   amd64 pass, but others, such as mips, will fail:

   PR kern/59327: user stack pointer is not aligned properly

   This extends the test that was previously written for:

   PR kern/58149: aarch64: Cannot return from a signal handler if SP was
   misaligned when the signal arrived

   With any luck, this will help us to systematically eradicate misaligned
   stack pointers as hypothesized to be the reason for:

   PR port-mips/59236: Multiple segfaults in erlite3 boot
VersionDeltaFile
1.2+255-23tests/kernel/t_signal_and_sp.c
1.1+74-0tests/kernel/arch/x86_64/execsp.S
1.1+63-0tests/kernel/h_execsp.c
1.1+60-0tests/kernel/arch/aarch64/execsp.S
1.1+55-0tests/kernel/arch/x86_64/signalsphandler.S
1.1+46-0tests/kernel/arch/aarch64/signalsphandler.S
+553-236 files not shown
+669-4912 files

NetBSD/src eHdUFtPtests/kernel Makefile

   h_execregs: Properly request to statically link this.

   Adding -static to LDFLAGS doesn't work because we end up passing
   various other flags that cause it to come out as a dynamic executable
   anyway, which would crash on SIGSEGV early at startup -- except that
   the entry point exits before calling the normal start routine, so by
   accident it works.

   PR kern/59084: exec/spawn leaks register content
VersionDeltaFile
1.87+3-2tests/kernel/Makefile
+3-21 files

NetBSD/src Qmutlt7sys/dev/pci viaide.c

   viaide(4): use __func__ in via_setup_channel() ATADEBUG_PRINT message.
   Fixes function name in debug message, otherwise NFCI.
VersionDeltaFile
1.99+4-3sys/dev/pci/viaide.c
+4-31 files

NetBSD/src aSDpRhJsys/dev/pci viaide.c

   viaide(4): check if chip enable register returns 0 before emulating enable
   bits.

   At least some VT6410 controllers have register exposed. In fact, some
   motherboards allow to control IDE channels (enable/disable them).
VersionDeltaFile
1.98+4-5sys/dev/pci/viaide.c
+4-51 files

NetBSD/src xS7pX3Esys/dev/pci pcidevs_data.h pcidevs.h

   regen.
VersionDeltaFile
1.1500+401-400sys/dev/pci/pcidevs_data.h
1.1501+4-3sys/dev/pci/pcidevs.h
+405-4032 files

NetBSD/src 3ZApoqHsys/dev/pci viaide.c ahcisata_pci.c

   viaide(4): Improve VT8251 integrated SATA controller support in IDE/RAID modes.

   Use via_chip_map() to attach this controller in IDE and RAID modes, similarly
   to VX800. This allows drives to be identified and attached successfully on all
   four ports (two channels with master/slave ports).

   Switch channel setup to sata_setup_channel(), replacing via_setup_channel().
   This avoids writes to the 0x50 register, which is only relevant for IDE
   controllers. Writes to SATA controller registers caused drives on the IDE
   controller (0x0571) to fail to attach. Apply this fix also to VX900 and VT8261.

   Rename VT8237R_SATA to VT8251_SATA (0x3349 is not used for VT8237R, AFAIK).
   This PCI ID is used in RAID mode on newer (CE) chipset revision and in all
   modes (IDE/RAID/AHCI) on older revision.
   Add the 0x5287 PCI ID, used in IDE mode on newer (CE) chipset revision.
   Rename VT8251_SATA to VT8251_AHCI (0x6287 is used only in AHCI mode).
   Add VT8251_AHCI to the ahcisata(4) quirk list, same as VT8251_SATA.

   For more details, see the tech-kern thread:

    [7 lines not shown]
VersionDeltaFile
1.97+27-6sys/dev/pci/viaide.c
1.72+4-4sys/dev/pci/ahcisata_pci.c
1.1522+4-3sys/dev/pci/pcidevs
+35-133 files

NetBSD/src VBaUkMtdoc CHANGES-9.5

   Ticket #1941
VersionDeltaFile
1.1.2.54+8-1doc/CHANGES-9.5
+8-11 files

NetBSD/src IwnCISXexternal/ibm-public/postfix/sbin/postconf Makefile

   Pull up following revision(s) (requested by tls in ticket #1941):

        external/ibm-public/postfix/sbin/postconf/Makefile: revision 1.10

   Fix toolchain/59302 which, as it turns out, is caused not by building
   on Linux, but by building in any directory whose full path to the root
   contains "tls" or "global".
VersionDeltaFile
1.8.14.2+7-2external/ibm-public/postfix/sbin/postconf/Makefile
+7-21 files

NetBSD/src ojA5EWsdoc CHANGES-10.2

   Ticket #1097
VersionDeltaFile
1.1.2.18+7-1doc/CHANGES-10.2
+7-11 files

NetBSD/src ZJ0phZ4external/ibm-public/postfix/sbin/postconf Makefile

   Pull up following revision(s) (requested by tls in ticket #1097):

        external/ibm-public/postfix/sbin/postconf/Makefile: revision 1.10

   Fix toolchain/59302 which, as it turns out, is caused not by building
   on Linux, but by building in any directory whose full path to the root
   contains "tls" or "global".
VersionDeltaFile
1.9.6.1+7-2external/ibm-public/postfix/sbin/postconf/Makefile
+7-21 files

NetBSD/src NeYPC1dsys/arch/riscv/riscv cpu_switch.S

   PR/59304: kernel longjmp(9) fails to make setjmp(9) return 1

   Fix riscv longjmp.
VersionDeltaFile
1.7+2-2sys/arch/riscv/riscv/cpu_switch.S
+2-21 files