For platforms that can support multiple processors, arrange to put
every CPU's cpu_info at the same virtual address (enabled by that
platform defining CPUINFO_VA in <machine/pmap.h>). The cpu_info_store
symbol is aliased to this so curcpu() works the same way on UP vs MP
configurations for the sake of loadable modules.
Enable this on virt68k (even on uniprocessor configurations).
(Actual work to set this up on MP systems is TBD.)
Centralize the declaration of tmpstk and use the same region of memory
for the primary CPU's cpu_info structure.
For UP systems, &cpu_info_store is equivalent to &cpu_info_primary.
On future MP systems, &cpu_info_store will always point to the referencing
CPU's cpu_info using VM chicanery.
cpu_switchto(): Don't bother with tmpstk. Just restore the %sp
from the PCB first before restoring the other regs.
(missed in previous commit to switch_subr.s)
Re-work AST processing, eliminating the global "astpending" variable.
The need for an AST is now tracked on a per-LWP basis (patterned after
the Alpha port).
The elimination of the "astpending" global necessitated an overhaul
of the code flow for checking for them. The old rei code block leveraged
that "astpending" could be checked without having to use a register.
Now, a register must be used, so the check for pending ASTs needs to
be done before registers are restored after a trap. So, a couple of
new asm macros are introduced to aid in this split-duty regime:
- CHECK_ASTPENDING() uses the specified scratch register to check for
pending ASTs and sets the Z flag accordingly (Z set == no pending AST).
- RTE_AST replaces the old pattern of unconditionally branching to the
rei code block and instead conditionally branches to the now-renamed-to-
rte_ast code block and perfors an RTE if the branch is not taken. This
makes the code ever so slightly larger, but actually eliminates a branch
in the case where an AST was not pending.
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Allocate display rows on demand (Hua Zhong)
libedit (unlike readline) allocates a buffer for the entire terminal width *
height from the beginning, which is often wasteful as most of the time very
few rows are needed. This change introduces delayed allocation for row buffers.
Initially, the row-pointer array is allocated with NULL pointers. When we need
row N, we allocate all row buffers up to that row.
Display buffer allocation failures are reported through existing API errors.
A subsequent API call such as el_gets() retries the allocation if needed.
Add rescan functions for obio(4) bus.
Allows obio attachments to be modules.
Patch and testing by Ray Tran.
Addreses PR/60694.
Next thing to do is to make modules of non-critical obio devices...
g->charjump was adjusted to &g->charjump[-(CHAR_MIN)] in computejumps() so
that it can be indexed by signed chars (all archs except arm); undo the
adjustment before freeing it, same as regfree() does.
Start laying the foundation for MP support:
- curlwp does into struct cpu_info
- cpu_info gets cache line aware layout based on field access patterns
(with some reserved slots for future work).
- cpu_number() and curlwp are now implemented in terms of curcpu().
- curcpu() remains streamlined for UP systems, and an ABI-stable
version is provided if _MODULE so that modules will work with UP or MP.
Optimize cpu_switchto()'s handling of restartable atomic sequences:
- We can us any callee-saved register we want, since we've already
saved them in the outgoing PCB, so so this to avoid having to
re-load curlwp, etc. from memory. This let's us to eliminate a
branch target.
- ras_lookup() returns a pointer in %a0, but also returns the same
value in %d0. We don't care about the pointer-ness of the return
value, so just use the %d0 return and shave off several insns.
G/C the curpcb global on m68k. It's redundant (the current PCB can always
be accessed via the current LWP) and its presence means wasted work in
cpu_switchto().
For cases where asm code does need to get to to it, add a GET_CURPCB()
macro that places curlwp's PCB pointer into the specified register.
