SCSI-2 and later define READ(6) as optional and READ(10) as mandatory
and some devices (e.g. the Linux iSCSI tgtd) reject the small commands.
MODE_SENSE(6) and MODE_SENSE(10) can both be optional, so it's possible
that a SCSI-2 device only implements READ(10) and MODE_SENSE(6), which
then needs further refinement.
t_dlclose_thread: Test recursive dlopen/dlclose too.
Simple test first:
- h_helper_recurdso dlopens h_helper_dso2
- h_helper_dso2 needs h_helper_dso1
When dlopening h_helper_recurdso, the initialization order must be:
ENTER h_helper_recurdso
-> h_helper_dso1
-> h_helper_dso2
LEAVE h_helper_recurdso
For the more complex test, we have the relations:
- h_helper_recurdso2 needs h_helper_recurdso
- h_helper_recurdso dlopens h_helper_dso2
- h_helper_dso2 needs h_helper_dso1
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Add support for experimental Rendition Verite 3D acceleration interface.
This allow userland process to load 3D firmware (like v2000gl.uc) and
execute it on the chip's RISC CPU. It also provides the necessary support
infrastructure like basic VRAM accounting and ability to feed commands
and data through DMA.
In conjuction with customized userland Mesa, this allows OpenGL 1.x
workloads to run accelerated on the Verite.
While here, add related debugging facilities.
/etc/rc.d/unbound: Fix order of migration and trust anchor setup.
Add some comments explaining the order, and make sure we propagate
various failures back to the caller.
Based on a patch by Erik LaBine.
PR bin/60447: unbound rc.d fails on fresh install before
configuration migration can run
t_signal_and_fpu: Fix XMM register trashing.
The units we read from memory into registers are 16 bytes (128 bits)
each, not 32 bytes (256 bits).
Fortunately, this mistake didn't prevent the test from generally
working: reading past the end of our stack frame will just give us
other garbage that is unlikely to coincide with the register content
that the interrupted code expects.
PR kern/60426: Signal handler corrupts AVX (YMM) registers
nvmm: Add support for extended CPU state (XSAVE) beyond x87/SSE.
New machine-dependent x86 vCPU configuration command
NVMM_VCPU_CONF_XCR0_MASK sets the vCPU's XCR0 mask, that is, the set
of XSAVE features that the guest sees as supported in the vCPU. This
command is advertised by the new machine capability
NVMM_CAP_ARCH_VCPU_CONF_XCR0_MASK. (Changing the XCR0 mask after the
guest has begun execution will clear all extended CPU state for now;
it is unlikely that hypervisor software will do this anyway.)
This change doesn't expose the XSAVE area to userland in the comm
page -- there are already machine-independent members in struct
nvmm_comm_page at fixed offsets past the machine-dependent state so
we can't just extend struct nvmm_vcpu_state without breaking the ABI.
And the XSAVE area may exceed a page, but the address space for the
virtual machine uvm object packs comm areas in consecutive pages, so
we can't put it in the comm page at all without breaking the ABI
another way.
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meta_ignore use :N with .MAKE.META.IGNORE_PATTERNS
By using :N .MAKE.META.IGNORE_PATTERNS is just a special case
of .MAKE.META.IGNORE_FILTER and processed the same way.
Now that bad144 handling is isolated to the places that care about it,
garbage-collect it from all of the various machine-dependent files that
have been cargo-culting it around needlessly for 20+ years.
Version bump to 11.99.7 because this changes the size of struct cpu_disklabel
on some platforms, and that structure is exposed in the module ABI.
