FreshBSD

Merging r181363:
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r181363 | cdavis | 2013-05-07 14:14:15 -0700 (Tue, 07 May 2013) | 3 lines

MCStreamer: Also clear vector of W64UnwindInfos on reset().

Patch by Kai Nacke!
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Merging r181366:
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r181366 | enderby | 2013-05-07 14:40:58 -0700 (Tue, 07 May 2013) | 6 lines

Fix a bug in the MC asm parser evaluating expressions.  It was treating:
A = 9
B = 3 * A - 2 * A + 1 as  B = 3 * A - (2 * A + 1)

rdar://13816516

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Merging r182385:
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r182385 | hfinkel | 2013-05-21 07:21:09 -0700 (Tue, 21 May 2013) | 9 lines

Fix PPC branch selection for counter-based branches

Although I had added some support for the BDZ/BDNZ branches into the selector
(in r158204), I had not correctly adjusted the condition at the top of the
loop. As a result, these branches were still essentially unsupported.

This fixes PR16086. Unfortunately, any test case would be very large (because
it would need to force the loop backedge to exceed the range of the 16-bit
immediate).
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Merging r182387:
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r182387 | jholewinski | 2013-05-21 07:37:16 -0700 (Tue, 21 May 2013) | 7 lines

Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen.

The intrinsic calls are dropped, but the annotated value is propagated.

Fixes PR 15253

Original patch by Zeng Bin!
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Merging r182112:
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r182112 | tstellar | 2013-05-17 08:23:12 -0700 (Fri, 17 May 2013) | 1 line

R600: Pass MCSubtargetInfo reference to R600CodeEmitter
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Merging r182364:
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r182364 | d0k | 2013-05-21 02:58:54 -0700 (Tue, 21 May 2013) | 4 lines

X86: When emulating unsigned PCMPGTQ with PCMPGTD, fix the sign bit for the smaller type.

Otherwise we'll get a mix of signed and unsigned compares.
Fixes PR15977.
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Merging r182344:
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r182344 | mren | 2013-05-20 17:57:22 -0700 (Mon, 20 May 2013) | 7 lines

Dwarf: use a single line table to generate assembly when .loc is used.

This is to fix PR15408 where an undefined symbol Lline_table_start1 is used.
Since we do not generate the debug_line section when .loc is used,
Lline_table_start1 is not emitted and we can't refer to it when calculating
at_stmt_list for a compile unit.

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Merging r181283:
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r181283 | rsmith | 2013-05-06 19:55:48 -0700 (Mon, 06 May 2013) | 6 lines

C++ status:
 - fix paper links to point to isocpp.org, where most of the papers are already up
 - update "SVN" features to "Clang 3.3" to distinguish them from features which we
   complete after the branch
 - document use of -std=c++1y to enable c++1y support

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Merging r181342:
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r181342 | rsmith | 2013-05-07 12:32:56 -0700 (Tue, 07 May 2013) | 4 lines

C++1y: Update __cplusplus to temporary value 201305L to allow detection of provisional 
C++1y support.
Add __has_feature and __has_extension checks for C++1y features (based on the provisional 
names from
the C++ features study group), and update documentation to match.

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Merging r181487:
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r181487 | fjahanian | 2013-05-08 16:38:56 -0700 (Wed, 08 May 2013) | 4 lines

put noisy "unknown command tag name"  warning
under -Wdocumentation-unknown-command and off by default.
patch by Dmitri Gribenko.

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Merging r182266:
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r182266 | rnk | 2013-05-20 07:02:37 -0700 (Mon, 20 May 2013) | 13 lines

Implement __declspec(selectany) under -fms-extensions

selectany only applies to externally visible global variables.  It has
the effect of making the data weak_odr.

The MSDN docs suggest that unused definitions can only be dropped at
linktime, so Clang uses weak instead of linkonce.  MSVC optimizes away
references to constant selectany data, so it must assume that there is
only one definition, hence weak_odr.

Reviewers: espindola

Differential Revision: http://llvm-reviews.chandlerc.com/D814
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The DWARF EH pass doesn't need the TargetMachine, only the TargetLoweringBase like the 
other EH passes.

No need to store the TargetMachine variable in this class.

Remove unused #include.

Remove 'svn' from version.

Remove the 'svn' from the version.

Merging r182113:
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r182113 | tstellar | 2013-05-17 08:23:21 -0700 (Fri, 17 May 2013) | 9 lines

R600: Fix encoding for R600 family GPUs

Reviewed-by: Vincent Lejeune <vljn at ovi.com>

https://bugs.freedesktop.org/show_bug.cgi?id=64193
https://bugs.freedesktop.org/show_bug.cgi?id=64257
https://bugs.freedesktop.org/show_bug.cgi?id=64320

NOTE: This is a candidate for the 3.3 branch.
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Merging r182072:
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r182072 | rsmith | 2013-05-16 19:19:35 -0700 (Thu, 16 May 2013) | 6 lines

PR15757: When we instantiate an inheriting constructor template, also
instantiate the inherited constructor template and mark that as the constructor
which the instantiated specialization is inheriting. This fixes a
crash-on-valid when trying to compute the exception specification of a
specialization of the inheriting constructor.

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Merging r181864:
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r181864 | chapuni | 2013-05-14 19:16:23 -0700 (Tue, 14 May 2013) | 10 lines

ELFRelocationEntry::operator<(): Try to stabilize the order. r_offset was insufficient to 
sort Relocs.

It should fix llvm/test/CodeGen/ARM/ehabi-mc-compact-pr*.ll on some hosts.

  RELOCATION RECORDS FOR [.ARM.exidx]:
  0 R_ARM_PREL31 .text
  0 R_ARM_NONE __aeabi_unwind_cpp_pr0

FIXME: I am not sure of the directions of extra comparators, in Type and Index.
For now, they are different from the direction in r_offset.
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Merging r181706:
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r181706 | rafael | 2013-05-13 07:34:48 -0700 (Mon, 13 May 2013) | 1 line

Remove unused fields and arguments.
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Merging r181678:
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r181678 | rafael | 2013-05-12 17:18:24 -0700 (Sun, 12 May 2013) | 1 line

XFAIL this test for mingw too.
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Merging r181600:
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r181600 | aaronballman | 2013-05-10 07:42:16 -0700 (Fri, 10 May 2013) | 1 line

XFAILing this test on Win32 to unbreak the build bots.
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Merging r181465:
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r181465 | rsmith | 2013-05-08 13:32:14 -0700 (Wed, 08 May 2013) | 2 lines

Add missing triple to unit test.

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Merging r181529:
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r181529 | void | 2013-05-09 11:21:45 -0700 (Thu, 09 May 2013) | 8 lines

Simplify the code a bit.

The compact unwind registers were defined in two different
places. It's better just to place them in the function that uses them
and specify that this is a 64-bit or 32-bit machine.

No functionality change.

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Merging r181540:
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r181540 | void | 2013-05-09 13:10:38 -0700 (Thu, 09 May 2013) | 11 lines

Generate a compact unwind encoding in the face of a stack alignment push.

We generate a `push' of a random register (%rax) if the stack needs to be
aligned by the size of that register. However, this could mess up compact unwind
generation. In particular, we want to still generate compact unwind in the
presence of this monstrosity.

Check if the push of of the %rax/%eax register. If it is and it's marked with
the `FrameSetup' flag, then we can generate a compact unwind encoding for the
function only if the push is the last FrameSetup instruction.

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Merging r181580:
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r181580 | tstellar | 2013-05-09 19:09:45 -0700 (Thu, 09 May 2013) | 10 lines

R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns

The BFE optimization was the only one we were actually using, and it was
emitting an intrinsic that we don't support.

https://bugs.freedesktop.org/show_bug.cgi?id=64201

Reviewed-by: Christian König <christian.koenig at amd.com>

NOTE: This is a candidate for the 3.3 branch.
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Merging r181579:
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r181579 | tstellar | 2013-05-09 19:09:39 -0700 (Thu, 09 May 2013) | 8 lines

R600: Expand SUB for v2i32/v4i32

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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Merging r181578:
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r181578 | tstellar | 2013-05-09 19:09:34 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand MUL for v4i32/v2i32

Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run.

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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Merging r181577:
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r181577 | tstellar | 2013-05-09 19:09:29 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand SRA for v4i32/v2i32

v2: Add v4i32 test

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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Merging r181576:
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r181576 | tstellar | 2013-05-09 19:09:24 -0700 (Thu, 09 May 2013) | 10 lines

R600: Expand vselect for v4i32 and v2i32

v2: Add vselect v4i32 test

Patch by: Aaron Watry

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Aaron Watry <awatry at gmail.com>

NOTE: This is a candidate for the 3.3 branch.
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Merging r181792:
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r181792 | tstellar | 2013-05-14 07:42:56 -0700 (Tue, 14 May 2013) | 8 lines

R600/SI: Add processor type for Hainan asic

Patch by: Alex Deucher

Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher at amd.com>

NOTE: This is a candidate for the 3.3 branch.
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Merging r181842:
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r181842 | arnolds | 2013-05-14 15:33:24 -0700 (Tue, 14 May 2013) | 14 lines

ARM ISel: Don't create illegal types during LowerMUL

The transformation happening here is that we want to turn a
"mul(ext(X), ext(X))" into a "vmull(X, X)", stripping off the extension. We have
to make sure that X still has a valid vector type - possibly recreate an
extension to a smaller type. In case of a extload of a memory type smaller than
64 bit we used create a ext(load()). The problem with doing this - instead of
recreating an extload - is that an illegal type is exposed.

This patch fixes this by creating extloads instead of ext(load()) sequences.

Fixes PR15970.

radar://13871383
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Creating release candidate rc1 from release_33 branch

Creating release directory for release_33.

Use proper syntax.

Creating release_33 branch

Add lldb and polly to the projects to tag.

Merging r181750:
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r181750 | rafael | 2013-05-13 17:44:24 -0700 (Mon, 13 May 2013) | 4 lines

Use atomic instructions on linux thumb v7.

This matches gcc's behaviour. The patch also explicitly parses the version so
that this keeps working when we add support for v8.
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Merging r181728:
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r181728 | rafael | 2013-05-13 13:09:47 -0700 (Mon, 13 May 2013) | 6 lines

Use atomic instructions on ARM linux.

This is safe given how the pre-v6 atomic ops funcions in libgcc are
implemented.

This fixes pr15429.
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Merging r181524:
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r181524 | rafael | 2013-05-09 10:22:59 -0700 (Thu, 09 May 2013) | 4 lines

Don't replace an alias in llvm.used with its target.

When we replace an internal alias with its target, be careful not to
replace the entry in llvm.used (and llvm.compiler_used).
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Merging r181450:
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r181450 | uweigand | 2013-05-08 10:50:07 -0700 (Wed, 08 May 2013) | 16 lines


[PowerPC] Fix regression in generating @ha/@l relocs

The patch I committed as revision 167864 introduced a regression that
causes LLVM to no longer generate appropriate relocs for @ha/@l symbol
references (but fail an assertion instead).

This is fixed here by re-enabling support for the VK_PPC_GAS_HA16/
VK_PPC_GAS_LO16 variant kinds (and their Darwin variants) in
PPCELFObjectWriter.cpp.

Tested by running projects/test-suite in -m32 mode with the integrated
assembler forced on.  A standalone test case will be committed shortly
as well.


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Merging r181800:
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r181800 | wschmidt | 2013-05-14 09:08:32 -0700 (Tue, 14 May 2013) | 15 lines

PPC32: Fix stack collision between FP and CR save areas.

The changes to CR spill handling missed a case for 32-bit PowerPC.
The code in PPCFrameLowering::processFunctionBeforeFrameFinalized()
checks whether CR spill has occurred using a flag in the function
info.  This flag is only set by storeRegToStackSlot and
loadRegFromStackSlot.  spillCalleeSavedRegisters does not call
storeRegToStackSlot, but instead produces MI directly.  Thus we don't
see the CR is spilled when assigning frame offsets, and the CR spill
ends up colliding with some other location (generally the FP slot).

This patch sets the flag in spillCalleeSavedRegisters for PPC32 so
that the CR spill is properly detected and gets its own slot in the
stack frame.

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Merging r181586:
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r181586 | d0k | 2013-05-10 02:16:52 -0700 (Fri, 10 May 2013) | 3 lines

InstCombine: Verify the type before transforming uitofp into select.

PR15952.
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Merging r181397:
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r181397 | nicholas | 2013-05-08 02:00:10 -0700 (Wed, 08 May 2013) | 3 lines

Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst
by switching to a ValueMap. Patch by Andrea DiBiagio!

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Generate a compact unwind encoding in the face of a stack alignment push.

We generate a `push' of a random register (%rax) if the stack needs to be
aligned by the size of that register. However, this could mess up compact unwind
generation. In particular, we want to still generate compact unwind in the
presence of this monstrosity.

Check if the push of of the %rax/%eax register. If it is and it's marked with
the `FrameSetup' flag, then we can generate a compact unwind encoding for the
function only if the push is the last FrameSetup instruction.

Simplify the code a bit.

The compact unwind registers were defined in two different
places. It's better just to place them in the function that uses them
and specify that this is a 64-bit or 32-bit machine.

No functionality change.

Merging r181423:
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r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines

PPCInstrInfo::optimizeCompareInstr should not optimize FP compares

The floating-point record forms on PPC don't set the condition register bits
based on a comparison with zero (like the integer record forms do), but rather
based on the exception status bits.
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Merging r181286:
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r181286 | arnolds | 2013-05-06 21:37:05 -0700 (Mon, 06 May 2013) | 7 lines

LoopVectorize: getConsecutiveVector must respect signed arithmetic

We were passing an i32 to ConstantInt::get where an i64 was needed and we must
also pass the sign if we pass negatives numbers. The start index passed to
getConsecutiveVector must also be signed.

Should fix PR15882.
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Add libcxx and clang-tools-extra to the testing thing.

Creating release candidate rc1 from release_33 branch